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; ModuleID = 'AnghaBench/freebsd/sys/dev/aic7xxx/extr_aic79xx_osm.c_ahd_platform_intr.c' source_filename = "AnghaBench/freebsd/sys/dev/aic7xxx/extr_aic79xx_osm.c_ahd_platform_intr.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local void @ahd_platform_intr(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call i32 @ahd_lock(ptr noundef %0) #2 %3 = tail call i32 @ahd_intr(ptr noundef %0) #2 %4 = tail call i32 @ahd_unlock(ptr noundef %0) #2 ret void } declare i32 @ahd_lock(ptr noundef) local_unnamed_addr #1 declare i32 @ahd_intr(ptr noundef) local_unnamed_addr #1 declare i32 @ahd_unlock(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/freebsd/sys/dev/aic7xxx/extr_aic79xx_osm.c_ahd_platform_intr.c' source_filename = "AnghaBench/freebsd/sys/dev/aic7xxx/extr_aic79xx_osm.c_ahd_platform_intr.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define void @ahd_platform_intr(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call i32 @ahd_lock(ptr noundef %0) #2 %3 = tail call i32 @ahd_intr(ptr noundef %0) #2 %4 = tail call i32 @ahd_unlock(ptr noundef %0) #2 ret void } declare i32 @ahd_lock(ptr noundef) local_unnamed_addr #1 declare i32 @ahd_intr(ptr noundef) local_unnamed_addr #1 declare i32 @ahd_unlock(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
freebsd_sys_dev_aic7xxx_extr_aic79xx_osm.c_ahd_platform_intr
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sfc/extr_efx.c_efx_pci_probe.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/sfc/extr_efx.c_efx_pci_probe.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.efx_nic = type { i32, ptr, i64, i32 } %struct.efx_nic_type = type { ptr, i32 } @EFX_MAX_CORE_TX_QUEUES = dso_local local_unnamed_addr global i32 0, align 4 @EFX_MAX_RX_QUEUES = dso_local local_unnamed_addr global i32 0, align 4 @ENOMEM = dso_local local_unnamed_addr global i32 0, align 4 @NETIF_F_HIGHDMA = dso_local local_unnamed_addr global i32 0, align 4 @probe = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [25 x i8] c"Solarflare NIC detected\0A\00", align 1 @.str.1 = private unnamed_addr constant [27 x i8] c"initialisation successful\0A\00", align 1 @EPERM = dso_local local_unnamed_addr global i32 0, align 4 @.str.2 = private unnamed_addr constant [28 x i8] c"failed to create MTDs (%d)\0A\00", align 1 @drv = dso_local local_unnamed_addr global i32 0, align 4 @.str.3 = private unnamed_addr constant [30 x i8] c"initialisation failed. rc=%d\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @efx_pci_probe], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @efx_pci_probe(ptr noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = alloca i8, align 1 %4 = load i32, ptr @EFX_MAX_CORE_TX_QUEUES, align 4, !tbaa !5 %5 = load i32, ptr @EFX_MAX_RX_QUEUES, align 4, !tbaa !5 %6 = tail call ptr @alloc_etherdev_mqs(i32 noundef 32, i32 noundef %4, i32 noundef %5) #3 %7 = icmp eq ptr %6, null br i1 %7, label %8, label %11 8: ; preds = %2 %9 = load i32, ptr @ENOMEM, align 4, !tbaa !5 %10 = sub nsw i32 0, %9 br label %89 11: ; preds = %2 %12 = tail call ptr @netdev_priv(ptr noundef nonnull %6) #3 %13 = load i64, ptr %1, align 8, !tbaa !9 %14 = inttoptr i64 %13 to ptr %15 = getelementptr inbounds %struct.efx_nic, ptr %12, i64 0, i32 1 store ptr %14, ptr %15, align 8, !tbaa !12 %16 = load i32, ptr @NETIF_F_HIGHDMA, align 4, !tbaa !5 %17 = getelementptr inbounds %struct.efx_nic, ptr %12, i64 0, i32 3 %18 = load i32, ptr %17, align 8, !tbaa !15 %19 = or i32 %18, %16 store i32 %19, ptr %17, align 8, !tbaa !15 %20 = tail call i32 @pci_set_drvdata(ptr noundef %0, ptr noundef %12) #3 %21 = tail call i32 @SET_NETDEV_DEV(ptr noundef nonnull %6, ptr noundef %0) #3 %22 = tail call i32 @efx_init_struct(ptr noundef %12, ptr noundef %0, ptr noundef nonnull %6) #3 %23 = icmp eq i32 %22, 0 br i1 %23, label %24, label %80 24: ; preds = %11 %25 = load i32, ptr @probe, align 4, !tbaa !5 %26 = load i32, ptr %12, align 8, !tbaa !16 %27 = tail call i32 @netif_info(ptr noundef nonnull %12, i32 noundef %25, i32 noundef %26, ptr noundef nonnull @.str) #3 %28 = load ptr, ptr %15, align 8, !tbaa !12 %29 = getelementptr inbounds %struct.efx_nic_type, ptr %28, i64 0, i32 1 %30 = load i32, ptr %29, align 8, !tbaa !17 %31 = icmp eq i32 %30, 0 br i1 %31, label %32, label %34 32: ; preds = %24 %33 = tail call i32 @efx_probe_vpd_strings(ptr noundef nonnull %12) #3 br label %34 34: ; preds = %32, %24 %35 = tail call i32 @efx_init_io(ptr noundef nonnull %12) #3 %36 = icmp eq i32 %35, 0 br i1 %36, label %37, label %77 37: ; preds = %34 %38 = tail call i32 @efx_pci_probe_post_io(ptr noundef nonnull %12) #3 %39 = icmp eq i32 %38, 0 br i1 %39, label %52, label %40 40: ; preds = %37 %41 = getelementptr inbounds %struct.efx_nic, ptr %12, i64 0, i32 2 store i64 0, ptr %41, align 8, !tbaa !19 %42 = tail call i32 @efx_pci_probe_post_io(ptr noundef nonnull %12) #3 %43 = icmp eq i32 %42, 0 br i1 %43, label %52, label %44 44: ; preds = %40 call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #3 %45 = call i32 @get_random_bytes(ptr noundef nonnull %3, i32 noundef 1) #3 %46 = load i8, ptr %3, align 1, !tbaa !20 %47 = zext i8 %46 to i32 %48 = add nuw nsw i32 %47, 50 %49 = call i32 @msleep(i32 noundef %48) #3 store i64 0, ptr %41, align 8, !tbaa !19 %50 = call i32 @efx_pci_probe_post_io(ptr noundef nonnull %12) #3 call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #3 %51 = icmp eq i32 %50, 0 br i1 %51, label %52, label %75 52: ; preds = %37, %40, %44 %53 = load i32, ptr @probe, align 4, !tbaa !5 %54 = load i32, ptr %12, align 8, !tbaa !16 %55 = call i32 (ptr, i32, i32, ptr, ...) @netif_dbg(ptr noundef nonnull %12, i32 noundef %53, i32 noundef %54, ptr noundef nonnull @.str.1) #3 %56 = call i32 (...) @rtnl_lock() #3 %57 = call i32 @efx_mtd_probe(ptr noundef nonnull %12) #3 %58 = call i32 (...) @rtnl_unlock() #3 %59 = icmp eq i32 %57, 0 br i1 %59, label %68, label %60 60: ; preds = %52 %61 = load i32, ptr @EPERM, align 4, !tbaa !5 %62 = sub nsw i32 0, %61 %63 = icmp eq i32 %57, %62 br i1 %63, label %68, label %64 64: ; preds = %60 %65 = load i32, ptr @probe, align 4, !tbaa !5 %66 = load i32, ptr %12, align 8, !tbaa !16 %67 = call i32 @netif_warn(ptr noundef nonnull %12, i32 noundef %65, i32 noundef %66, ptr noundef nonnull @.str.2, i32 noundef %57) #3 br label %68 68: ; preds = %64, %60, %52 %69 = call i32 @pci_enable_pcie_error_reporting(ptr noundef %0) #3 %70 = load ptr, ptr %15, align 8, !tbaa !12 %71 = load ptr, ptr %70, align 8, !tbaa !21 %72 = icmp eq ptr %71, null br i1 %72, label %89, label %73 73: ; preds = %68 %74 = call i32 %71(ptr noundef nonnull %12) #3 br label %89 75: ; preds = %44 %76 = call i32 @efx_fini_io(ptr noundef nonnull %12) #3 br label %77 77: ; preds = %34, %75 %78 = phi i32 [ %35, %34 ], [ %50, %75 ] %79 = call i32 @efx_fini_struct(ptr noundef nonnull %12) #3 br label %80 80: ; preds = %11, %77 %81 = phi i32 [ %22, %11 ], [ %78, %77 ] %82 = icmp sgt i32 %81, 0 %83 = zext i1 %82 to i32 %84 = call i32 @WARN_ON(i32 noundef %83) #3 %85 = load i32, ptr @drv, align 4, !tbaa !5 %86 = load i32, ptr %12, align 8, !tbaa !16 %87 = call i32 (ptr, i32, i32, ptr, ...) @netif_dbg(ptr noundef nonnull %12, i32 noundef %85, i32 noundef %86, ptr noundef nonnull @.str.3, i32 noundef %81) #3 %88 = call i32 @free_netdev(ptr noundef nonnull %6) #3 br label %89 89: ; preds = %68, %73, %80, %8 %90 = phi i32 [ %81, %80 ], [ %10, %8 ], [ 0, %73 ], [ 0, %68 ] ret i32 %90 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @alloc_etherdev_mqs(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #2 declare i32 @pci_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @SET_NETDEV_DEV(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @efx_init_struct(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @netif_info(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @efx_probe_vpd_strings(ptr noundef) local_unnamed_addr #2 declare i32 @efx_init_io(ptr noundef) local_unnamed_addr #2 declare i32 @efx_pci_probe_post_io(ptr noundef) local_unnamed_addr #2 declare i32 @get_random_bytes(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @msleep(i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 declare i32 @netif_dbg(ptr noundef, i32 noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #2 declare i32 @rtnl_lock(...) local_unnamed_addr #2 declare i32 @efx_mtd_probe(ptr noundef) local_unnamed_addr #2 declare i32 @rtnl_unlock(...) local_unnamed_addr #2 declare i32 @netif_warn(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @pci_enable_pcie_error_reporting(ptr noundef) local_unnamed_addr #2 declare i32 @efx_fini_io(ptr noundef) local_unnamed_addr #2 declare i32 @efx_fini_struct(ptr noundef) local_unnamed_addr #2 declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #2 declare i32 @free_netdev(ptr noundef) local_unnamed_addr #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"pci_device_id", !11, i64 0} !11 = !{!"long", !7, i64 0} !12 = !{!13, !14, i64 8} !13 = !{!"efx_nic", !6, i64 0, !14, i64 8, !11, i64 16, !6, i64 24} !14 = !{!"any pointer", !7, i64 0} !15 = !{!13, !6, i64 24} !16 = !{!13, !6, i64 0} !17 = !{!18, !6, i64 8} !18 = !{!"efx_nic_type", !14, i64 0, !6, i64 8} !19 = !{!13, !11, i64 16} !20 = !{!7, !7, i64 0} !21 = !{!18, !14, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sfc/extr_efx.c_efx_pci_probe.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/sfc/extr_efx.c_efx_pci_probe.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EFX_MAX_CORE_TX_QUEUES = common local_unnamed_addr global i32 0, align 4 @EFX_MAX_RX_QUEUES = common local_unnamed_addr global i32 0, align 4 @ENOMEM = common local_unnamed_addr global i32 0, align 4 @NETIF_F_HIGHDMA = common local_unnamed_addr global i32 0, align 4 @probe = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [25 x i8] c"Solarflare NIC detected\0A\00", align 1 @.str.1 = private unnamed_addr constant [27 x i8] c"initialisation successful\0A\00", align 1 @EPERM = common local_unnamed_addr global i32 0, align 4 @.str.2 = private unnamed_addr constant [28 x i8] c"failed to create MTDs (%d)\0A\00", align 1 @drv = common local_unnamed_addr global i32 0, align 4 @.str.3 = private unnamed_addr constant [30 x i8] c"initialisation failed. rc=%d\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @efx_pci_probe], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @efx_pci_probe(ptr noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = alloca i8, align 1 %4 = load i32, ptr @EFX_MAX_CORE_TX_QUEUES, align 4, !tbaa !6 %5 = load i32, ptr @EFX_MAX_RX_QUEUES, align 4, !tbaa !6 %6 = tail call ptr @alloc_etherdev_mqs(i32 noundef 32, i32 noundef %4, i32 noundef %5) #3 %7 = icmp eq ptr %6, null br i1 %7, label %8, label %11 8: ; preds = %2 %9 = load i32, ptr @ENOMEM, align 4, !tbaa !6 %10 = sub nsw i32 0, %9 br label %89 11: ; preds = %2 %12 = tail call ptr @netdev_priv(ptr noundef nonnull %6) #3 %13 = load i64, ptr %1, align 8, !tbaa !10 %14 = inttoptr i64 %13 to ptr %15 = getelementptr inbounds i8, ptr %12, i64 8 store ptr %14, ptr %15, align 8, !tbaa !13 %16 = load i32, ptr @NETIF_F_HIGHDMA, align 4, !tbaa !6 %17 = getelementptr inbounds i8, ptr %12, i64 24 %18 = load i32, ptr %17, align 8, !tbaa !16 %19 = or i32 %18, %16 store i32 %19, ptr %17, align 8, !tbaa !16 %20 = tail call i32 @pci_set_drvdata(ptr noundef %0, ptr noundef %12) #3 %21 = tail call i32 @SET_NETDEV_DEV(ptr noundef nonnull %6, ptr noundef %0) #3 %22 = tail call i32 @efx_init_struct(ptr noundef %12, ptr noundef %0, ptr noundef nonnull %6) #3 %23 = icmp eq i32 %22, 0 br i1 %23, label %24, label %80 24: ; preds = %11 %25 = load i32, ptr @probe, align 4, !tbaa !6 %26 = load i32, ptr %12, align 8, !tbaa !17 %27 = tail call i32 @netif_info(ptr noundef nonnull %12, i32 noundef %25, i32 noundef %26, ptr noundef nonnull @.str) #3 %28 = load ptr, ptr %15, align 8, !tbaa !13 %29 = getelementptr inbounds i8, ptr %28, i64 8 %30 = load i32, ptr %29, align 8, !tbaa !18 %31 = icmp eq i32 %30, 0 br i1 %31, label %32, label %34 32: ; preds = %24 %33 = tail call i32 @efx_probe_vpd_strings(ptr noundef nonnull %12) #3 br label %34 34: ; preds = %32, %24 %35 = tail call i32 @efx_init_io(ptr noundef nonnull %12) #3 %36 = icmp eq i32 %35, 0 br i1 %36, label %37, label %77 37: ; preds = %34 %38 = tail call i32 @efx_pci_probe_post_io(ptr noundef nonnull %12) #3 %39 = icmp eq i32 %38, 0 br i1 %39, label %52, label %40 40: ; preds = %37 %41 = getelementptr inbounds i8, ptr %12, i64 16 store i64 0, ptr %41, align 8, !tbaa !20 %42 = tail call i32 @efx_pci_probe_post_io(ptr noundef nonnull %12) #3 %43 = icmp eq i32 %42, 0 br i1 %43, label %52, label %44 44: ; preds = %40 call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #3 %45 = call i32 @get_random_bytes(ptr noundef nonnull %3, i32 noundef 1) #3 %46 = load i8, ptr %3, align 1, !tbaa !21 %47 = zext i8 %46 to i32 %48 = add nuw nsw i32 %47, 50 %49 = call i32 @msleep(i32 noundef %48) #3 store i64 0, ptr %41, align 8, !tbaa !20 %50 = call i32 @efx_pci_probe_post_io(ptr noundef nonnull %12) #3 call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #3 %51 = icmp eq i32 %50, 0 br i1 %51, label %52, label %75 52: ; preds = %37, %40, %44 %53 = load i32, ptr @probe, align 4, !tbaa !6 %54 = load i32, ptr %12, align 8, !tbaa !17 %55 = call i32 (ptr, i32, i32, ptr, ...) @netif_dbg(ptr noundef nonnull %12, i32 noundef %53, i32 noundef %54, ptr noundef nonnull @.str.1) #3 %56 = call i32 @rtnl_lock() #3 %57 = call i32 @efx_mtd_probe(ptr noundef nonnull %12) #3 %58 = call i32 @rtnl_unlock() #3 %59 = icmp eq i32 %57, 0 br i1 %59, label %68, label %60 60: ; preds = %52 %61 = load i32, ptr @EPERM, align 4, !tbaa !6 %62 = sub nsw i32 0, %61 %63 = icmp eq i32 %57, %62 br i1 %63, label %68, label %64 64: ; preds = %60 %65 = load i32, ptr @probe, align 4, !tbaa !6 %66 = load i32, ptr %12, align 8, !tbaa !17 %67 = call i32 @netif_warn(ptr noundef nonnull %12, i32 noundef %65, i32 noundef %66, ptr noundef nonnull @.str.2, i32 noundef %57) #3 br label %68 68: ; preds = %64, %60, %52 %69 = call i32 @pci_enable_pcie_error_reporting(ptr noundef %0) #3 %70 = load ptr, ptr %15, align 8, !tbaa !13 %71 = load ptr, ptr %70, align 8, !tbaa !22 %72 = icmp eq ptr %71, null br i1 %72, label %89, label %73 73: ; preds = %68 %74 = call i32 %71(ptr noundef nonnull %12) #3 br label %89 75: ; preds = %44 %76 = call i32 @efx_fini_io(ptr noundef nonnull %12) #3 br label %77 77: ; preds = %34, %75 %78 = phi i32 [ %35, %34 ], [ %50, %75 ] %79 = call i32 @efx_fini_struct(ptr noundef nonnull %12) #3 br label %80 80: ; preds = %11, %77 %81 = phi i32 [ %22, %11 ], [ %78, %77 ] %82 = icmp sgt i32 %81, 0 %83 = zext i1 %82 to i32 %84 = call i32 @WARN_ON(i32 noundef %83) #3 %85 = load i32, ptr @drv, align 4, !tbaa !6 %86 = load i32, ptr %12, align 8, !tbaa !17 %87 = call i32 (ptr, i32, i32, ptr, ...) @netif_dbg(ptr noundef nonnull %12, i32 noundef %85, i32 noundef %86, ptr noundef nonnull @.str.3, i32 noundef %81) #3 %88 = call i32 @free_netdev(ptr noundef nonnull %6) #3 br label %89 89: ; preds = %68, %73, %80, %8 %90 = phi i32 [ %81, %80 ], [ %10, %8 ], [ 0, %73 ], [ 0, %68 ] ret i32 %90 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @alloc_etherdev_mqs(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #2 declare i32 @pci_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @SET_NETDEV_DEV(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @efx_init_struct(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @netif_info(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @efx_probe_vpd_strings(ptr noundef) local_unnamed_addr #2 declare i32 @efx_init_io(ptr noundef) local_unnamed_addr #2 declare i32 @efx_pci_probe_post_io(ptr noundef) local_unnamed_addr #2 declare i32 @get_random_bytes(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @msleep(i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 declare i32 @netif_dbg(ptr noundef, i32 noundef, i32 noundef, ptr noundef, ...) local_unnamed_addr #2 declare i32 @rtnl_lock(...) local_unnamed_addr #2 declare i32 @efx_mtd_probe(ptr noundef) local_unnamed_addr #2 declare i32 @rtnl_unlock(...) local_unnamed_addr #2 declare i32 @netif_warn(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @pci_enable_pcie_error_reporting(ptr noundef) local_unnamed_addr #2 declare i32 @efx_fini_io(ptr noundef) local_unnamed_addr #2 declare i32 @efx_fini_struct(ptr noundef) local_unnamed_addr #2 declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #2 declare i32 @free_netdev(ptr noundef) local_unnamed_addr #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"pci_device_id", !12, i64 0} !12 = !{!"long", !8, i64 0} !13 = !{!14, !15, i64 8} !14 = !{!"efx_nic", !7, i64 0, !15, i64 8, !12, i64 16, !7, i64 24} !15 = !{!"any pointer", !8, i64 0} !16 = !{!14, !7, i64 24} !17 = !{!14, !7, i64 0} !18 = !{!19, !7, i64 8} !19 = !{!"efx_nic_type", !15, i64 0, !7, i64 8} !20 = !{!14, !12, i64 16} !21 = !{!8, !8, i64 0} !22 = !{!19, !15, i64 0}
linux_drivers_net_ethernet_sfc_extr_efx.c_efx_pci_probe
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/vt6655/extr_device_main.c_device_free_rings.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/vt6655/extr_device_main.c_device_free_rings.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_5__ = type { i32, i64, %struct.TYPE_4__, i32, i32, i64 } %struct.TYPE_4__ = type { i32, i32, ptr } @PKT_BUF_SZ = dso_local local_unnamed_addr global i32 0, align 4 @CB_BEACON_BUF_SIZE = dso_local local_unnamed_addr global i32 0, align 4 @CB_MAX_BUF_SIZE = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @device_free_rings], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @device_free_rings(ptr nocapture noundef readonly %0) #0 { %2 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 3 %3 = load i32, ptr %2, align 8, !tbaa !5 %4 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 2 %5 = load i32, ptr %4, align 8, !tbaa !13 %6 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 2, i32 1 %7 = load i32, ptr %6, align 4, !tbaa !14 %8 = add i32 %7, %5 %9 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 2, i32 2 %10 = load ptr, ptr %9, align 8, !tbaa !15 %11 = load i32, ptr %10, align 4, !tbaa !16 %12 = add i32 %8, %11 %13 = getelementptr inbounds i32, ptr %10, i64 1 %14 = load i32, ptr %13, align 4, !tbaa !16 %15 = add i32 %12, %14 %16 = shl i32 %15, 2 %17 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 5 %18 = load i64, ptr %17, align 8, !tbaa !17 %19 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 4 %20 = load i32, ptr %19, align 4, !tbaa !18 %21 = tail call i32 @pci_free_consistent(i32 noundef %3, i32 noundef %16, i64 noundef %18, i32 noundef %20) #2 %22 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1 %23 = load i64, ptr %22, align 8, !tbaa !19 %24 = icmp eq i64 %23, 0 br i1 %24, label %40, label %25 25: ; preds = %1 %26 = load i32, ptr %2, align 8, !tbaa !5 %27 = load ptr, ptr %9, align 8, !tbaa !15 %28 = load i32, ptr %27, align 4, !tbaa !16 %29 = load i32, ptr @PKT_BUF_SZ, align 4, !tbaa !16 %30 = getelementptr inbounds i32, ptr %27, i64 1 %31 = load i32, ptr %30, align 4, !tbaa !16 %32 = add i32 %31, %28 %33 = mul i32 %32, %29 %34 = load i32, ptr @CB_BEACON_BUF_SIZE, align 4, !tbaa !16 %35 = add nsw i32 %33, %34 %36 = load i32, ptr @CB_MAX_BUF_SIZE, align 4, !tbaa !16 %37 = add nsw i32 %35, %36 %38 = load i32, ptr %0, align 8, !tbaa !20 %39 = tail call i32 @pci_free_consistent(i32 noundef %26, i32 noundef %37, i64 noundef %23, i32 noundef %38) #2 br label %40 40: ; preds = %25, %1 ret void } declare i32 @pci_free_consistent(i32 noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 32} !6 = !{!"TYPE_5__", !7, i64 0, !10, i64 8, !11, i64 16, !7, i64 32, !7, i64 36, !10, i64 40} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"long", !8, i64 0} !11 = !{!"TYPE_4__", !7, i64 0, !7, i64 4, !12, i64 8} !12 = !{!"any pointer", !8, i64 0} !13 = !{!6, !7, i64 16} !14 = !{!6, !7, i64 20} !15 = !{!6, !12, i64 24} !16 = !{!7, !7, i64 0} !17 = !{!6, !10, i64 40} !18 = !{!6, !7, i64 36} !19 = !{!6, !10, i64 8} !20 = !{!6, !7, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/vt6655/extr_device_main.c_device_free_rings.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/vt6655/extr_device_main.c_device_free_rings.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @PKT_BUF_SZ = common local_unnamed_addr global i32 0, align 4 @CB_BEACON_BUF_SIZE = common local_unnamed_addr global i32 0, align 4 @CB_MAX_BUF_SIZE = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @device_free_rings], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @device_free_rings(ptr nocapture noundef readonly %0) #0 { %2 = getelementptr inbounds i8, ptr %0, i64 32 %3 = load i32, ptr %2, align 8, !tbaa !6 %4 = getelementptr inbounds i8, ptr %0, i64 16 %5 = load <2 x i32>, ptr %4, align 8, !tbaa !14 %6 = getelementptr inbounds i8, ptr %0, i64 24 %7 = load ptr, ptr %6, align 8, !tbaa !15 %8 = load <2 x i32>, ptr %7, align 4, !tbaa !14 %9 = shufflevector <2 x i32> %8, <2 x i32> %5, <4 x i32> <i32 0, i32 1, i32 2, i32 3> %10 = tail call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %9) %11 = shl i32 %10, 2 %12 = getelementptr inbounds i8, ptr %0, i64 40 %13 = load i64, ptr %12, align 8, !tbaa !16 %14 = getelementptr inbounds i8, ptr %0, i64 36 %15 = load i32, ptr %14, align 4, !tbaa !17 %16 = tail call i32 @pci_free_consistent(i32 noundef %3, i32 noundef %11, i64 noundef %13, i32 noundef %15) #3 %17 = getelementptr inbounds i8, ptr %0, i64 8 %18 = load i64, ptr %17, align 8, !tbaa !18 %19 = icmp eq i64 %18, 0 br i1 %19, label %35, label %20 20: ; preds = %1 %21 = load i32, ptr %2, align 8, !tbaa !6 %22 = load ptr, ptr %6, align 8, !tbaa !15 %23 = load i32, ptr %22, align 4, !tbaa !14 %24 = load i32, ptr @PKT_BUF_SZ, align 4, !tbaa !14 %25 = getelementptr inbounds i8, ptr %22, i64 4 %26 = load i32, ptr %25, align 4, !tbaa !14 %27 = add i32 %26, %23 %28 = mul i32 %27, %24 %29 = load i32, ptr @CB_BEACON_BUF_SIZE, align 4, !tbaa !14 %30 = add nsw i32 %28, %29 %31 = load i32, ptr @CB_MAX_BUF_SIZE, align 4, !tbaa !14 %32 = add nsw i32 %30, %31 %33 = load i32, ptr %0, align 8, !tbaa !19 %34 = tail call i32 @pci_free_consistent(i32 noundef %21, i32 noundef %32, i64 noundef %18, i32 noundef %33) #3 br label %35 35: ; preds = %20, %1 ret void } declare i32 @pci_free_consistent(i32 noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>) #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 32} !7 = !{!"TYPE_5__", !8, i64 0, !11, i64 8, !12, i64 16, !8, i64 32, !8, i64 36, !11, i64 40} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"long", !9, i64 0} !12 = !{!"TYPE_4__", !8, i64 0, !8, i64 4, !13, i64 8} !13 = !{!"any pointer", !9, i64 0} !14 = !{!8, !8, i64 0} !15 = !{!7, !13, i64 24} !16 = !{!7, !11, i64 40} !17 = !{!7, !8, i64 36} !18 = !{!7, !11, i64 8} !19 = !{!7, !8, i64 0}
fastsocket_kernel_drivers_staging_vt6655_extr_device_main.c_device_free_rings
; ModuleID = 'AnghaBench/linux/arch/um/drivers/extr_net_kern.c_get_output_buffer.c' source_filename = "AnghaBench/linux/arch/um/drivers/extr_net_kern.c_get_output_buffer.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4 @PAGE_SIZE = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local ptr @get_output_buffer(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 { %2 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5 %3 = tail call i64 @__get_free_pages(i32 noundef %2, i32 noundef 0) #2 %4 = icmp eq i64 %3, 0 %5 = load i32, ptr @PAGE_SIZE, align 4 %6 = select i1 %4, i32 0, i32 %5 store i32 %6, ptr %0, align 4, !tbaa !5 %7 = inttoptr i64 %3 to ptr ret ptr %7 } declare i64 @__get_free_pages(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/arch/um/drivers/extr_net_kern.c_get_output_buffer.c' source_filename = "AnghaBench/linux/arch/um/drivers/extr_net_kern.c_get_output_buffer.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @GFP_KERNEL = common local_unnamed_addr global i32 0, align 4 @PAGE_SIZE = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define ptr @get_output_buffer(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 { %2 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6 %3 = tail call i64 @__get_free_pages(i32 noundef %2, i32 noundef 0) #2 %4 = icmp eq i64 %3, 0 %5 = load i32, ptr @PAGE_SIZE, align 4 %6 = select i1 %4, i32 0, i32 %5 store i32 %6, ptr %0, align 4, !tbaa !6 %7 = inttoptr i64 %3 to ptr ret ptr %7 } declare i64 @__get_free_pages(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_arch_um_drivers_extr_net_kern.c_get_output_buffer
; ModuleID = 'AnghaBench/linux/drivers/crypto/qce/extr_dma.c_qce_dma_prep_sg.c' source_filename = "AnghaBench/linux/drivers/crypto/qce/extr_dma.c_qce_dma_prep_sg.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.dma_async_tx_descriptor = type { ptr, i32 } @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @qce_dma_prep_sg], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @qce_dma_prep_sg(ptr noundef %0, ptr noundef %1, i32 noundef %2, i64 noundef %3, i32 noundef %4, i32 noundef %5, ptr noundef %6) #0 { %8 = icmp ne ptr %1, null %9 = icmp ne i32 %2, 0 %10 = and i1 %8, %9 br i1 %10, label %14, label %11 11: ; preds = %7 %12 = load i32, ptr @EINVAL, align 4, !tbaa !5 %13 = sub nsw i32 0, %12 br label %24 14: ; preds = %7 %15 = tail call ptr @dmaengine_prep_slave_sg(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %2, i32 noundef %4, i64 noundef %3) #2 %16 = icmp eq ptr %15, null br i1 %16, label %17, label %20 17: ; preds = %14 %18 = load i32, ptr @EINVAL, align 4, !tbaa !5 %19 = sub nsw i32 0, %18 br label %24 20: ; preds = %14 %21 = getelementptr inbounds %struct.dma_async_tx_descriptor, ptr %15, i64 0, i32 1 store i32 %5, ptr %21, align 8, !tbaa !9 store ptr %6, ptr %15, align 8, !tbaa !12 %22 = tail call i32 @dmaengine_submit(ptr noundef nonnull %15) #2 %23 = tail call i32 @dma_submit_error(i32 noundef %22) #2 br label %24 24: ; preds = %20, %17, %11 %25 = phi i32 [ %23, %20 ], [ %19, %17 ], [ %13, %11 ] ret i32 %25 } declare ptr @dmaengine_prep_slave_sg(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @dmaengine_submit(ptr noundef) local_unnamed_addr #1 declare i32 @dma_submit_error(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 8} !10 = !{!"dma_async_tx_descriptor", !11, i64 0, !6, i64 8} !11 = !{!"any pointer", !7, i64 0} !12 = !{!10, !11, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/crypto/qce/extr_dma.c_qce_dma_prep_sg.c' source_filename = "AnghaBench/linux/drivers/crypto/qce/extr_dma.c_qce_dma_prep_sg.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EINVAL = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @qce_dma_prep_sg], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @qce_dma_prep_sg(ptr noundef %0, ptr noundef %1, i32 noundef %2, i64 noundef %3, i32 noundef %4, i32 noundef %5, ptr noundef %6) #0 { %8 = icmp ne ptr %1, null %9 = icmp ne i32 %2, 0 %10 = and i1 %8, %9 br i1 %10, label %14, label %11 11: ; preds = %7 %12 = load i32, ptr @EINVAL, align 4, !tbaa !6 %13 = sub nsw i32 0, %12 br label %24 14: ; preds = %7 %15 = tail call ptr @dmaengine_prep_slave_sg(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %2, i32 noundef %4, i64 noundef %3) #2 %16 = icmp eq ptr %15, null br i1 %16, label %17, label %20 17: ; preds = %14 %18 = load i32, ptr @EINVAL, align 4, !tbaa !6 %19 = sub nsw i32 0, %18 br label %24 20: ; preds = %14 %21 = getelementptr inbounds i8, ptr %15, i64 8 store i32 %5, ptr %21, align 8, !tbaa !10 store ptr %6, ptr %15, align 8, !tbaa !13 %22 = tail call i32 @dmaengine_submit(ptr noundef nonnull %15) #2 %23 = tail call i32 @dma_submit_error(i32 noundef %22) #2 br label %24 24: ; preds = %20, %17, %11 %25 = phi i32 [ %23, %20 ], [ %19, %17 ], [ %13, %11 ] ret i32 %25 } declare ptr @dmaengine_prep_slave_sg(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @dmaengine_submit(ptr noundef) local_unnamed_addr #1 declare i32 @dma_submit_error(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 8} !11 = !{!"dma_async_tx_descriptor", !12, i64 0, !7, i64 8} !12 = !{!"any pointer", !8, i64 0} !13 = !{!11, !12, i64 0}
linux_drivers_crypto_qce_extr_dma.c_qce_dma_prep_sg
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/igb/extr_e1000_phy.c_igb_phy_force_speed_duplex_m88.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/igb/extr_e1000_phy.c_igb_phy_force_speed_duplex_m88.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.e1000_phy_info = type { i64, i32, %struct.TYPE_2__, i64 } %struct.TYPE_2__ = type { ptr, ptr } @e1000_phy_i210 = dso_local local_unnamed_addr global i64 0, align 8 @M88E1000_PHY_SPEC_CTRL = dso_local local_unnamed_addr global i32 0, align 4 @M88E1000_PSCR_AUTO_X_MODE = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [19 x i8] c"M88E1000 PSCR: %X\0A\00", align 1 @PHY_CONTROL = dso_local local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [50 x i8] c"Waiting for forced speed/duplex link on M88 phy.\0A\00", align 1 @PHY_FORCE_LIMIT = dso_local local_unnamed_addr global i32 0, align 4 @e1000_phy_m88 = dso_local local_unnamed_addr global i64 0, align 8 @.str.2 = private unnamed_addr constant [35 x i8] c"Link taking longer than expected.\0A\00", align 1 @M88E1000_PHY_PAGE_SELECT = dso_local local_unnamed_addr global i32 0, align 4 @M88E1000_EXT_PHY_SPEC_CTRL = dso_local local_unnamed_addr global i32 0, align 4 @M88E1000_EPSCR_TX_CLK_25 = dso_local local_unnamed_addr global i32 0, align 4 @M88E1000_PSCR_ASSERT_CRS_ON_TX = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local i64 @igb_phy_force_speed_duplex_m88(ptr noundef %0) local_unnamed_addr #0 { %2 = alloca i32, align 4 %3 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %4 = load i64, ptr %0, align 8, !tbaa !5 %5 = load i64, ptr @e1000_phy_i210, align 8, !tbaa !13 %6 = icmp eq i64 %4, %5 br i1 %6, label %26, label %7 7: ; preds = %1 %8 = getelementptr inbounds %struct.e1000_phy_info, ptr %0, i64 0, i32 2, i32 1 %9 = load ptr, ptr %8, align 8, !tbaa !14 %10 = load i32, ptr @M88E1000_PHY_SPEC_CTRL, align 4, !tbaa !15 %11 = call i64 %9(ptr noundef nonnull %0, i32 noundef %10, ptr noundef nonnull %2) #3 %12 = icmp eq i64 %11, 0 br i1 %12, label %13, label %112 13: ; preds = %7 %14 = getelementptr inbounds %struct.e1000_phy_info, ptr %0, i64 0, i32 2 %15 = load i32, ptr @M88E1000_PSCR_AUTO_X_MODE, align 4, !tbaa !15 %16 = xor i32 %15, -1 %17 = load i32, ptr %2, align 4, !tbaa !15 %18 = and i32 %17, %16 store i32 %18, ptr %2, align 4, !tbaa !15 %19 = load ptr, ptr %14, align 8, !tbaa !16 %20 = load i32, ptr @M88E1000_PHY_SPEC_CTRL, align 4, !tbaa !15 %21 = call i64 %19(ptr noundef nonnull %0, i32 noundef %20, i32 noundef %18) #3 %22 = icmp eq i64 %21, 0 br i1 %22, label %23, label %112 23: ; preds = %13 %24 = load i32, ptr %2, align 4, !tbaa !15 %25 = call i32 (ptr, ...) @hw_dbg(ptr noundef nonnull @.str, i32 noundef %24) #3 br label %26 26: ; preds = %23, %1 %27 = getelementptr inbounds %struct.e1000_phy_info, ptr %0, i64 0, i32 2 %28 = getelementptr inbounds %struct.e1000_phy_info, ptr %0, i64 0, i32 2, i32 1 %29 = load ptr, ptr %28, align 8, !tbaa !14 %30 = load i32, ptr @PHY_CONTROL, align 4, !tbaa !15 %31 = call i64 %29(ptr noundef nonnull %0, i32 noundef %30, ptr noundef nonnull %2) #3 %32 = icmp eq i64 %31, 0 br i1 %32, label %33, label %112 33: ; preds = %26 %34 = call i32 @igb_phy_force_speed_duplex_setup(ptr noundef nonnull %0, ptr noundef nonnull %2) #3 %35 = load ptr, ptr %27, align 8, !tbaa !16 %36 = load i32, ptr @PHY_CONTROL, align 4, !tbaa !15 %37 = load i32, ptr %2, align 4, !tbaa !15 %38 = call i64 %35(ptr noundef nonnull %0, i32 noundef %36, i32 noundef %37) #3 %39 = icmp eq i64 %38, 0 br i1 %39, label %40, label %112 40: ; preds = %33 %41 = call i64 @igb_phy_sw_reset(ptr noundef nonnull %0) #3 %42 = icmp eq i64 %41, 0 br i1 %42, label %43, label %112 43: ; preds = %40 %44 = getelementptr inbounds %struct.e1000_phy_info, ptr %0, i64 0, i32 3 %45 = load i64, ptr %44, align 8, !tbaa !17 %46 = icmp eq i64 %45, 0 br i1 %46, label %78, label %47 47: ; preds = %43 %48 = call i32 (ptr, ...) @hw_dbg(ptr noundef nonnull @.str.1) #3 %49 = load i32, ptr @PHY_FORCE_LIMIT, align 4, !tbaa !15 %50 = call i64 @igb_phy_has_link(ptr noundef nonnull %0, i32 noundef %49, i32 noundef 100000, ptr noundef nonnull %3) #3 %51 = icmp eq i64 %50, 0 br i1 %51, label %52, label %112 52: ; preds = %47 %53 = load i32, ptr %3, align 4, !tbaa !15 %54 = icmp eq i32 %53, 0 br i1 %54, label %55, label %74 55: ; preds = %52 %56 = getelementptr inbounds %struct.e1000_phy_info, ptr %0, i64 0, i32 1 %57 = load i32, ptr %56, align 8, !tbaa !18 %58 = add i32 %57, -128 %59 = icmp ult i32 %58, 3 br i1 %59, label %64, label %60 60: ; preds = %55 %61 = load i64, ptr %0, align 8, !tbaa !20 %62 = load i64, ptr @e1000_phy_m88, align 8, !tbaa !13 %63 = icmp eq i64 %61, %62 br i1 %63, label %66, label %64 64: ; preds = %55, %60 %65 = call i32 (ptr, ...) @hw_dbg(ptr noundef nonnull @.str.2) #3 br label %74 66: ; preds = %60 %67 = load ptr, ptr %27, align 8, !tbaa !16 %68 = load i32, ptr @M88E1000_PHY_PAGE_SELECT, align 4, !tbaa !15 %69 = call i64 %67(ptr noundef nonnull %0, i32 noundef %68, i32 noundef 29) #3 %70 = icmp eq i64 %69, 0 br i1 %70, label %71, label %112 71: ; preds = %66 %72 = call i64 @igb_phy_reset_dsp(ptr noundef nonnull %0) #3 %73 = icmp eq i64 %72, 0 br i1 %73, label %74, label %112 74: ; preds = %71, %64, %52 %75 = load i32, ptr @PHY_FORCE_LIMIT, align 4, !tbaa !15 %76 = call i64 @igb_phy_has_link(ptr noundef nonnull %0, i32 noundef %75, i32 noundef 100000, ptr noundef nonnull %3) #3 %77 = icmp eq i64 %76, 0 br i1 %77, label %78, label %112 78: ; preds = %74, %43 %79 = load i64, ptr %0, align 8, !tbaa !20 %80 = load i64, ptr @e1000_phy_m88, align 8, !tbaa !13 %81 = icmp eq i64 %79, %80 br i1 %81, label %82, label %112 82: ; preds = %78 %83 = getelementptr inbounds %struct.e1000_phy_info, ptr %0, i64 0, i32 1 %84 = load i32, ptr %83, align 8, !tbaa !18 %85 = add i32 %84, -128 %86 = icmp ult i32 %85, 3 br i1 %86, label %112, label %87 87: ; preds = %82 %88 = load ptr, ptr %28, align 8, !tbaa !14 %89 = load i32, ptr @M88E1000_EXT_PHY_SPEC_CTRL, align 4, !tbaa !15 %90 = call i64 %88(ptr noundef nonnull %0, i32 noundef %89, ptr noundef nonnull %2) #3 %91 = icmp eq i64 %90, 0 br i1 %91, label %92, label %112 92: ; preds = %87 %93 = load i32, ptr @M88E1000_EPSCR_TX_CLK_25, align 4, !tbaa !15 %94 = load i32, ptr %2, align 4, !tbaa !15 %95 = or i32 %94, %93 store i32 %95, ptr %2, align 4, !tbaa !15 %96 = load ptr, ptr %27, align 8, !tbaa !16 %97 = load i32, ptr @M88E1000_EXT_PHY_SPEC_CTRL, align 4, !tbaa !15 %98 = call i64 %96(ptr noundef nonnull %0, i32 noundef %97, i32 noundef %95) #3 %99 = icmp eq i64 %98, 0 br i1 %99, label %100, label %112 100: ; preds = %92 %101 = load ptr, ptr %28, align 8, !tbaa !14 %102 = load i32, ptr @M88E1000_PHY_SPEC_CTRL, align 4, !tbaa !15 %103 = call i64 %101(ptr noundef nonnull %0, i32 noundef %102, ptr noundef nonnull %2) #3 %104 = icmp eq i64 %103, 0 br i1 %104, label %105, label %112 105: ; preds = %100 %106 = load i32, ptr @M88E1000_PSCR_ASSERT_CRS_ON_TX, align 4, !tbaa !15 %107 = load i32, ptr %2, align 4, !tbaa !15 %108 = or i32 %107, %106 store i32 %108, ptr %2, align 4, !tbaa !15 %109 = load ptr, ptr %27, align 8, !tbaa !16 %110 = load i32, ptr @M88E1000_PHY_SPEC_CTRL, align 4, !tbaa !15 %111 = call i64 %109(ptr noundef nonnull %0, i32 noundef %110, i32 noundef %108) #3 br label %112 112: ; preds = %71, %66, %82, %105, %7, %13, %26, %33, %40, %47, %74, %78, %87, %92, %100 %113 = phi i64 [ %11, %7 ], [ %21, %13 ], [ %31, %26 ], [ %38, %33 ], [ %41, %40 ], [ %50, %47 ], [ %76, %74 ], [ 0, %78 ], [ %90, %87 ], [ %98, %92 ], [ %103, %100 ], [ %111, %105 ], [ 0, %82 ], [ %72, %71 ], [ %69, %66 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 ret i64 %113 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @hw_dbg(ptr noundef, ...) local_unnamed_addr #2 declare i32 @igb_phy_force_speed_duplex_setup(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @igb_phy_sw_reset(ptr noundef) local_unnamed_addr #2 declare i64 @igb_phy_has_link(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare i64 @igb_phy_reset_dsp(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"e1000_phy_info", !7, i64 0, !10, i64 8, !11, i64 16, !7, i64 32} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0} !11 = !{!"TYPE_2__", !12, i64 0, !12, i64 8} !12 = !{!"any pointer", !8, i64 0} !13 = !{!7, !7, i64 0} !14 = !{!6, !12, i64 24} !15 = !{!10, !10, i64 0} !16 = !{!6, !12, i64 16} !17 = !{!6, !7, i64 32} !18 = !{!19, !10, i64 8} !19 = !{!"e1000_hw", !6, i64 0} !20 = !{!19, !7, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/igb/extr_e1000_phy.c_igb_phy_force_speed_duplex_m88.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/igb/extr_e1000_phy.c_igb_phy_force_speed_duplex_m88.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @e1000_phy_i210 = common local_unnamed_addr global i64 0, align 8 @M88E1000_PHY_SPEC_CTRL = common local_unnamed_addr global i32 0, align 4 @M88E1000_PSCR_AUTO_X_MODE = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [19 x i8] c"M88E1000 PSCR: %X\0A\00", align 1 @PHY_CONTROL = common local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [50 x i8] c"Waiting for forced speed/duplex link on M88 phy.\0A\00", align 1 @PHY_FORCE_LIMIT = common local_unnamed_addr global i32 0, align 4 @e1000_phy_m88 = common local_unnamed_addr global i64 0, align 8 @.str.2 = private unnamed_addr constant [35 x i8] c"Link taking longer than expected.\0A\00", align 1 @M88E1000_PHY_PAGE_SELECT = common local_unnamed_addr global i32 0, align 4 @M88E1000_EXT_PHY_SPEC_CTRL = common local_unnamed_addr global i32 0, align 4 @M88E1000_EPSCR_TX_CLK_25 = common local_unnamed_addr global i32 0, align 4 @M88E1000_PSCR_ASSERT_CRS_ON_TX = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define i64 @igb_phy_force_speed_duplex_m88(ptr noundef %0) local_unnamed_addr #0 { %2 = alloca i32, align 4 %3 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %4 = load i64, ptr %0, align 8, !tbaa !6 %5 = load i64, ptr @e1000_phy_i210, align 8, !tbaa !14 %6 = icmp eq i64 %4, %5 br i1 %6, label %26, label %7 7: ; preds = %1 %8 = getelementptr inbounds i8, ptr %0, i64 24 %9 = load ptr, ptr %8, align 8, !tbaa !15 %10 = load i32, ptr @M88E1000_PHY_SPEC_CTRL, align 4, !tbaa !16 %11 = call i64 %9(ptr noundef nonnull %0, i32 noundef %10, ptr noundef nonnull %2) #3 %12 = icmp eq i64 %11, 0 br i1 %12, label %13, label %112 13: ; preds = %7 %14 = getelementptr inbounds i8, ptr %0, i64 16 %15 = load i32, ptr @M88E1000_PSCR_AUTO_X_MODE, align 4, !tbaa !16 %16 = xor i32 %15, -1 %17 = load i32, ptr %2, align 4, !tbaa !16 %18 = and i32 %17, %16 store i32 %18, ptr %2, align 4, !tbaa !16 %19 = load ptr, ptr %14, align 8, !tbaa !17 %20 = load i32, ptr @M88E1000_PHY_SPEC_CTRL, align 4, !tbaa !16 %21 = call i64 %19(ptr noundef nonnull %0, i32 noundef %20, i32 noundef %18) #3 %22 = icmp eq i64 %21, 0 br i1 %22, label %23, label %112 23: ; preds = %13 %24 = load i32, ptr %2, align 4, !tbaa !16 %25 = call i32 (ptr, ...) @hw_dbg(ptr noundef nonnull @.str, i32 noundef %24) #3 br label %26 26: ; preds = %23, %1 %27 = getelementptr inbounds i8, ptr %0, i64 16 %28 = getelementptr inbounds i8, ptr %0, i64 24 %29 = load ptr, ptr %28, align 8, !tbaa !15 %30 = load i32, ptr @PHY_CONTROL, align 4, !tbaa !16 %31 = call i64 %29(ptr noundef nonnull %0, i32 noundef %30, ptr noundef nonnull %2) #3 %32 = icmp eq i64 %31, 0 br i1 %32, label %33, label %112 33: ; preds = %26 %34 = call i32 @igb_phy_force_speed_duplex_setup(ptr noundef nonnull %0, ptr noundef nonnull %2) #3 %35 = load ptr, ptr %27, align 8, !tbaa !17 %36 = load i32, ptr @PHY_CONTROL, align 4, !tbaa !16 %37 = load i32, ptr %2, align 4, !tbaa !16 %38 = call i64 %35(ptr noundef nonnull %0, i32 noundef %36, i32 noundef %37) #3 %39 = icmp eq i64 %38, 0 br i1 %39, label %40, label %112 40: ; preds = %33 %41 = call i64 @igb_phy_sw_reset(ptr noundef nonnull %0) #3 %42 = icmp eq i64 %41, 0 br i1 %42, label %43, label %112 43: ; preds = %40 %44 = getelementptr inbounds i8, ptr %0, i64 32 %45 = load i64, ptr %44, align 8, !tbaa !18 %46 = icmp eq i64 %45, 0 br i1 %46, label %78, label %47 47: ; preds = %43 %48 = call i32 (ptr, ...) @hw_dbg(ptr noundef nonnull @.str.1) #3 %49 = load i32, ptr @PHY_FORCE_LIMIT, align 4, !tbaa !16 %50 = call i64 @igb_phy_has_link(ptr noundef nonnull %0, i32 noundef %49, i32 noundef 100000, ptr noundef nonnull %3) #3 %51 = icmp eq i64 %50, 0 br i1 %51, label %52, label %112 52: ; preds = %47 %53 = load i32, ptr %3, align 4, !tbaa !16 %54 = icmp eq i32 %53, 0 br i1 %54, label %55, label %74 55: ; preds = %52 %56 = getelementptr inbounds i8, ptr %0, i64 8 %57 = load i32, ptr %56, align 8, !tbaa !19 %58 = add i32 %57, -128 %59 = icmp ult i32 %58, 3 br i1 %59, label %64, label %60 60: ; preds = %55 %61 = load i64, ptr %0, align 8, !tbaa !21 %62 = load i64, ptr @e1000_phy_m88, align 8, !tbaa !14 %63 = icmp eq i64 %61, %62 br i1 %63, label %66, label %64 64: ; preds = %55, %60 %65 = call i32 (ptr, ...) @hw_dbg(ptr noundef nonnull @.str.2) #3 br label %74 66: ; preds = %60 %67 = load ptr, ptr %27, align 8, !tbaa !17 %68 = load i32, ptr @M88E1000_PHY_PAGE_SELECT, align 4, !tbaa !16 %69 = call i64 %67(ptr noundef nonnull %0, i32 noundef %68, i32 noundef 29) #3 %70 = icmp eq i64 %69, 0 br i1 %70, label %71, label %112 71: ; preds = %66 %72 = call i64 @igb_phy_reset_dsp(ptr noundef nonnull %0) #3 %73 = icmp eq i64 %72, 0 br i1 %73, label %74, label %112 74: ; preds = %71, %64, %52 %75 = load i32, ptr @PHY_FORCE_LIMIT, align 4, !tbaa !16 %76 = call i64 @igb_phy_has_link(ptr noundef nonnull %0, i32 noundef %75, i32 noundef 100000, ptr noundef nonnull %3) #3 %77 = icmp eq i64 %76, 0 br i1 %77, label %78, label %112 78: ; preds = %74, %43 %79 = load i64, ptr %0, align 8, !tbaa !21 %80 = load i64, ptr @e1000_phy_m88, align 8, !tbaa !14 %81 = icmp eq i64 %79, %80 br i1 %81, label %82, label %112 82: ; preds = %78 %83 = getelementptr inbounds i8, ptr %0, i64 8 %84 = load i32, ptr %83, align 8, !tbaa !19 %85 = add i32 %84, -128 %86 = icmp ult i32 %85, 3 br i1 %86, label %112, label %87 87: ; preds = %82 %88 = load ptr, ptr %28, align 8, !tbaa !15 %89 = load i32, ptr @M88E1000_EXT_PHY_SPEC_CTRL, align 4, !tbaa !16 %90 = call i64 %88(ptr noundef nonnull %0, i32 noundef %89, ptr noundef nonnull %2) #3 %91 = icmp eq i64 %90, 0 br i1 %91, label %92, label %112 92: ; preds = %87 %93 = load i32, ptr @M88E1000_EPSCR_TX_CLK_25, align 4, !tbaa !16 %94 = load i32, ptr %2, align 4, !tbaa !16 %95 = or i32 %94, %93 store i32 %95, ptr %2, align 4, !tbaa !16 %96 = load ptr, ptr %27, align 8, !tbaa !17 %97 = load i32, ptr @M88E1000_EXT_PHY_SPEC_CTRL, align 4, !tbaa !16 %98 = call i64 %96(ptr noundef nonnull %0, i32 noundef %97, i32 noundef %95) #3 %99 = icmp eq i64 %98, 0 br i1 %99, label %100, label %112 100: ; preds = %92 %101 = load ptr, ptr %28, align 8, !tbaa !15 %102 = load i32, ptr @M88E1000_PHY_SPEC_CTRL, align 4, !tbaa !16 %103 = call i64 %101(ptr noundef nonnull %0, i32 noundef %102, ptr noundef nonnull %2) #3 %104 = icmp eq i64 %103, 0 br i1 %104, label %105, label %112 105: ; preds = %100 %106 = load i32, ptr @M88E1000_PSCR_ASSERT_CRS_ON_TX, align 4, !tbaa !16 %107 = load i32, ptr %2, align 4, !tbaa !16 %108 = or i32 %107, %106 store i32 %108, ptr %2, align 4, !tbaa !16 %109 = load ptr, ptr %27, align 8, !tbaa !17 %110 = load i32, ptr @M88E1000_PHY_SPEC_CTRL, align 4, !tbaa !16 %111 = call i64 %109(ptr noundef nonnull %0, i32 noundef %110, i32 noundef %108) #3 br label %112 112: ; preds = %71, %66, %82, %105, %7, %13, %26, %33, %40, %47, %74, %78, %87, %92, %100 %113 = phi i64 [ %11, %7 ], [ %21, %13 ], [ %31, %26 ], [ %38, %33 ], [ %41, %40 ], [ %50, %47 ], [ %76, %74 ], [ 0, %78 ], [ %90, %87 ], [ %98, %92 ], [ %103, %100 ], [ %111, %105 ], [ 0, %82 ], [ %72, %71 ], [ %69, %66 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 ret i64 %113 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @hw_dbg(ptr noundef, ...) local_unnamed_addr #2 declare i32 @igb_phy_force_speed_duplex_setup(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @igb_phy_sw_reset(ptr noundef) local_unnamed_addr #2 declare i64 @igb_phy_has_link(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare i64 @igb_phy_reset_dsp(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"e1000_phy_info", !8, i64 0, !11, i64 8, !12, i64 16, !8, i64 32} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"int", !9, i64 0} !12 = !{!"TYPE_2__", !13, i64 0, !13, i64 8} !13 = !{!"any pointer", !9, i64 0} !14 = !{!8, !8, i64 0} !15 = !{!7, !13, i64 24} !16 = !{!11, !11, i64 0} !17 = !{!7, !13, i64 16} !18 = !{!7, !8, i64 32} !19 = !{!20, !11, i64 8} !20 = !{!"e1000_hw", !7, i64 0} !21 = !{!20, !8, i64 0}
fastsocket_kernel_drivers_net_igb_extr_e1000_phy.c_igb_phy_force_speed_duplex_m88
; ModuleID = 'AnghaBench/freebsd/tools/regression/include/tgmath/extr_tgmath.c_frexpf.c' source_filename = "AnghaBench/freebsd/tools/regression/include/tgmath/extr_tgmath.c_frexpf.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @n_float = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable define dso_local float @frexpf(float noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 { %3 = load i32, ptr @n_float, align 4, !tbaa !5 %4 = add nsw i32 %3, 1 store i32 %4, ptr @n_float, align 4, !tbaa !5 ret float undef } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/freebsd/tools/regression/include/tgmath/extr_tgmath.c_frexpf.c' source_filename = "AnghaBench/freebsd/tools/regression/include/tgmath/extr_tgmath.c_frexpf.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @n_float = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable(sync) define float @frexpf(float noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 { %3 = load i32, ptr @n_float, align 4, !tbaa !6 %4 = add nsw i32 %3, 1 store i32 %4, ptr @n_float, align 4, !tbaa !6 ret float undef } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
freebsd_tools_regression_include_tgmath_extr_tgmath.c_frexpf
; ModuleID = 'AnghaBench/mpv/player/extr_command.c_mp_property_generic_option.c' source_filename = "AnghaBench/mpv/player/extr_command.c_mp_property_generic_option.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_4__ = type { i32, ptr } %struct.m_config_option = type { i32, ptr } @M_PROPERTY_UNKNOWN = dso_local local_unnamed_addr global i32 0, align 4 @M_PROPERTY_OK = dso_local local_unnamed_addr global i32 0, align 4 @M_PROPERTY_NOT_IMPLEMENTED = dso_local local_unnamed_addr global i32 0, align 4 @M_PROPERTY_ERROR = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @mp_property_generic_option], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @mp_property_generic_option(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i32 noundef %2, ptr noundef %3) #0 { %5 = load ptr, ptr %1, align 8, !tbaa !5 %6 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1 %7 = load ptr, ptr %6, align 8, !tbaa !10 %8 = load i64, ptr %7, align 8, !tbaa !13 %9 = icmp eq i64 %8, 0 %10 = load i32, ptr %0, align 8, !tbaa !16 %11 = tail call i32 @bstr0(ptr noundef %5) #2 br i1 %9, label %14, label %12 12: ; preds = %4 %13 = tail call ptr @m_config_get_co_raw(i32 noundef %10, i32 noundef %11) #2 br label %16 14: ; preds = %4 %15 = tail call ptr @m_config_get_co(i32 noundef %10, i32 noundef %11) #2 br label %16 16: ; preds = %14, %12 %17 = phi ptr [ %13, %12 ], [ %15, %14 ] %18 = icmp eq ptr %17, null br i1 %18, label %36, label %19 19: ; preds = %16 switch i32 %2, label %36 [ i32 129, label %20 i32 130, label %24 i32 128, label %31 ] 20: ; preds = %19 %21 = getelementptr inbounds %struct.m_config_option, ptr %17, i64 0, i32 1 %22 = load ptr, ptr %21, align 8, !tbaa !17 %23 = load i32, ptr %22, align 4, !tbaa !19 store i32 %23, ptr %3, align 4, !tbaa !19 br label %36 24: ; preds = %19 %25 = load i32, ptr %17, align 8, !tbaa !20 %26 = icmp eq i32 %25, 0 br i1 %26, label %36, label %27 27: ; preds = %24 %28 = getelementptr inbounds %struct.m_config_option, ptr %17, i64 0, i32 1 %29 = load ptr, ptr %28, align 8, !tbaa !17 %30 = tail call i32 @m_option_copy(ptr noundef %29, ptr noundef %3, i32 noundef %25) #2 br label %36 31: ; preds = %19 %32 = load i32, ptr %0, align 8, !tbaa !16 %33 = tail call i32 @m_config_set_option_raw_direct(i32 noundef %32, ptr noundef nonnull %17, ptr noundef %3, i32 noundef 0) #2 %34 = icmp slt i32 %33, 0 %35 = select i1 %34, ptr @M_PROPERTY_ERROR, ptr @M_PROPERTY_OK br label %36 36: ; preds = %19, %31, %24, %16, %27, %20 %37 = phi ptr [ @M_PROPERTY_OK, %27 ], [ @M_PROPERTY_OK, %20 ], [ @M_PROPERTY_UNKNOWN, %16 ], [ @M_PROPERTY_NOT_IMPLEMENTED, %24 ], [ %35, %31 ], [ @M_PROPERTY_NOT_IMPLEMENTED, %19 ] %38 = load i32, ptr %37, align 4, !tbaa !19 ret i32 %38 } declare ptr @m_config_get_co_raw(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @bstr0(ptr noundef) local_unnamed_addr #1 declare ptr @m_config_get_co(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @m_option_copy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @m_config_set_option_raw_direct(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"m_property", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 8} !11 = !{!"TYPE_4__", !12, i64 0, !7, i64 8} !12 = !{!"int", !8, i64 0} !13 = !{!14, !15, i64 0} !14 = !{!"TYPE_3__", !15, i64 0} !15 = !{!"long", !8, i64 0} !16 = !{!11, !12, i64 0} !17 = !{!18, !7, i64 8} !18 = !{!"m_config_option", !12, i64 0, !7, i64 8} !19 = !{!12, !12, i64 0} !20 = !{!18, !12, i64 0}
; ModuleID = 'AnghaBench/mpv/player/extr_command.c_mp_property_generic_option.c' source_filename = "AnghaBench/mpv/player/extr_command.c_mp_property_generic_option.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @M_PROPERTY_UNKNOWN = common local_unnamed_addr global i32 0, align 4 @M_PROPERTY_OK = common local_unnamed_addr global i32 0, align 4 @M_PROPERTY_NOT_IMPLEMENTED = common local_unnamed_addr global i32 0, align 4 @M_PROPERTY_ERROR = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @mp_property_generic_option], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @mp_property_generic_option(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, i32 noundef %2, ptr noundef %3) #0 { %5 = load ptr, ptr %1, align 8, !tbaa !6 %6 = getelementptr inbounds i8, ptr %0, i64 8 %7 = load ptr, ptr %6, align 8, !tbaa !11 %8 = load i64, ptr %7, align 8, !tbaa !14 %9 = icmp eq i64 %8, 0 %10 = load i32, ptr %0, align 8, !tbaa !17 %11 = tail call i32 @bstr0(ptr noundef %5) #2 br i1 %9, label %14, label %12 12: ; preds = %4 %13 = tail call ptr @m_config_get_co_raw(i32 noundef %10, i32 noundef %11) #2 br label %16 14: ; preds = %4 %15 = tail call ptr @m_config_get_co(i32 noundef %10, i32 noundef %11) #2 br label %16 16: ; preds = %14, %12 %17 = phi ptr [ %13, %12 ], [ %15, %14 ] %18 = icmp eq ptr %17, null br i1 %18, label %36, label %19 19: ; preds = %16 switch i32 %2, label %36 [ i32 129, label %20 i32 130, label %24 i32 128, label %31 ] 20: ; preds = %19 %21 = getelementptr inbounds i8, ptr %17, i64 8 %22 = load ptr, ptr %21, align 8, !tbaa !18 %23 = load i32, ptr %22, align 4, !tbaa !20 store i32 %23, ptr %3, align 4, !tbaa !20 br label %36 24: ; preds = %19 %25 = load i32, ptr %17, align 8, !tbaa !21 %26 = icmp eq i32 %25, 0 br i1 %26, label %36, label %27 27: ; preds = %24 %28 = getelementptr inbounds i8, ptr %17, i64 8 %29 = load ptr, ptr %28, align 8, !tbaa !18 %30 = tail call i32 @m_option_copy(ptr noundef %29, ptr noundef %3, i32 noundef %25) #2 br label %36 31: ; preds = %19 %32 = load i32, ptr %0, align 8, !tbaa !17 %33 = tail call i32 @m_config_set_option_raw_direct(i32 noundef %32, ptr noundef nonnull %17, ptr noundef %3, i32 noundef 0) #2 %34 = icmp slt i32 %33, 0 %35 = select i1 %34, ptr @M_PROPERTY_ERROR, ptr @M_PROPERTY_OK br label %36 36: ; preds = %19, %31, %24, %16, %27, %20 %37 = phi ptr [ @M_PROPERTY_OK, %27 ], [ @M_PROPERTY_OK, %20 ], [ @M_PROPERTY_UNKNOWN, %16 ], [ @M_PROPERTY_NOT_IMPLEMENTED, %24 ], [ %35, %31 ], [ @M_PROPERTY_NOT_IMPLEMENTED, %19 ] %38 = load i32, ptr %37, align 4, !tbaa !20 ret i32 %38 } declare ptr @m_config_get_co_raw(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @bstr0(ptr noundef) local_unnamed_addr #1 declare ptr @m_config_get_co(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @m_option_copy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @m_config_set_option_raw_direct(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"m_property", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 8} !12 = !{!"TYPE_4__", !13, i64 0, !8, i64 8} !13 = !{!"int", !9, i64 0} !14 = !{!15, !16, i64 0} !15 = !{!"TYPE_3__", !16, i64 0} !16 = !{!"long", !9, i64 0} !17 = !{!12, !13, i64 0} !18 = !{!19, !8, i64 8} !19 = !{!"m_config_option", !13, i64 0, !8, i64 8} !20 = !{!13, !13, i64 0} !21 = !{!19, !13, i64 0}
mpv_player_extr_command.c_mp_property_generic_option
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sfc/falcon/extr_ethtool.c_ef4_ethtool_get_strings.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/sfc/falcon/extr_ethtool.c_ef4_ethtool_get_strings.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_4__ = type { i32 } @ETH_GSTRING_LEN = dso_local local_unnamed_addr global i32 0, align 4 @EF4_ETHTOOL_SW_STAT_COUNT = dso_local local_unnamed_addr global i32 0, align 4 @ef4_sw_stat_desc = dso_local local_unnamed_addr global ptr null, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @ef4_ethtool_get_strings], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @ef4_ethtool_get_strings(ptr noundef %0, i32 noundef %1, ptr noundef %2) #0 { %4 = tail call ptr @netdev_priv(ptr noundef %0) #2 switch i32 %1, label %41 [ i32 129, label %5 i32 128, label %39 ] 5: ; preds = %3 %6 = load ptr, ptr %4, align 8, !tbaa !5 %7 = load ptr, ptr %6, align 8, !tbaa !10 %8 = tail call i32 %7(ptr noundef nonnull %4, ptr noundef %2) #2 %9 = load i32, ptr @ETH_GSTRING_LEN, align 4, !tbaa !12 %10 = mul nsw i32 %9, %8 %11 = sext i32 %10 to i64 %12 = getelementptr inbounds i32, ptr %2, i64 %11 %13 = load i32, ptr @EF4_ETHTOOL_SW_STAT_COUNT, align 4, !tbaa !12 %14 = icmp sgt i32 %13, 0 br i1 %14, label %15, label %32 15: ; preds = %5, %15 %16 = phi i64 [ %26, %15 ], [ 0, %5 ] %17 = load i32, ptr @ETH_GSTRING_LEN, align 4, !tbaa !12 %18 = trunc i64 %16 to i32 %19 = mul nsw i32 %17, %18 %20 = sext i32 %19 to i64 %21 = getelementptr inbounds i32, ptr %12, i64 %20 %22 = load ptr, ptr @ef4_sw_stat_desc, align 8, !tbaa !14 %23 = getelementptr inbounds %struct.TYPE_4__, ptr %22, i64 %16 %24 = load i32, ptr %23, align 4, !tbaa !15 %25 = tail call i32 @strlcpy(ptr noundef %21, i32 noundef %24, i32 noundef %17) #2 %26 = add nuw nsw i64 %16, 1 %27 = load i32, ptr @EF4_ETHTOOL_SW_STAT_COUNT, align 4, !tbaa !12 %28 = sext i32 %27 to i64 %29 = icmp slt i64 %26, %28 br i1 %29, label %15, label %30, !llvm.loop !17 30: ; preds = %15 %31 = load i32, ptr @ETH_GSTRING_LEN, align 4, !tbaa !12 br label %32 32: ; preds = %30, %5 %33 = phi i32 [ %9, %5 ], [ %31, %30 ] %34 = phi i32 [ %13, %5 ], [ %27, %30 ] %35 = mul nsw i32 %33, %34 %36 = sext i32 %35 to i64 %37 = getelementptr inbounds i32, ptr %12, i64 %36 %38 = tail call i32 @ef4_describe_per_queue_stats(ptr noundef nonnull %4, ptr noundef %37) #2 br label %41 39: ; preds = %3 %40 = tail call i32 @ef4_ethtool_fill_self_tests(ptr noundef %4, ptr noundef null, ptr noundef %2, ptr noundef null) #2 br label %41 41: ; preds = %3, %39, %32 ret void } declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1 declare i32 @strlcpy(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ef4_describe_per_queue_stats(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @ef4_ethtool_fill_self_tests(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"ef4_nic", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"TYPE_3__", !7, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"int", !8, i64 0} !14 = !{!7, !7, i64 0} !15 = !{!16, !13, i64 0} !16 = !{!"TYPE_4__", !13, i64 0} !17 = distinct !{!17, !18} !18 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sfc/falcon/extr_ethtool.c_ef4_ethtool_get_strings.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/sfc/falcon/extr_ethtool.c_ef4_ethtool_get_strings.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_4__ = type { i32 } @ETH_GSTRING_LEN = common local_unnamed_addr global i32 0, align 4 @EF4_ETHTOOL_SW_STAT_COUNT = common local_unnamed_addr global i32 0, align 4 @ef4_sw_stat_desc = common local_unnamed_addr global ptr null, align 8 @llvm.used = appending global [1 x ptr] [ptr @ef4_ethtool_get_strings], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @ef4_ethtool_get_strings(ptr noundef %0, i32 noundef %1, ptr noundef %2) #0 { %4 = tail call ptr @netdev_priv(ptr noundef %0) #2 switch i32 %1, label %41 [ i32 129, label %5 i32 128, label %39 ] 5: ; preds = %3 %6 = load ptr, ptr %4, align 8, !tbaa !6 %7 = load ptr, ptr %6, align 8, !tbaa !11 %8 = tail call i32 %7(ptr noundef nonnull %4, ptr noundef %2) #2 %9 = load i32, ptr @ETH_GSTRING_LEN, align 4, !tbaa !13 %10 = mul nsw i32 %9, %8 %11 = sext i32 %10 to i64 %12 = getelementptr inbounds i32, ptr %2, i64 %11 %13 = load i32, ptr @EF4_ETHTOOL_SW_STAT_COUNT, align 4, !tbaa !13 %14 = icmp sgt i32 %13, 0 br i1 %14, label %15, label %32 15: ; preds = %5, %15 %16 = phi i64 [ %26, %15 ], [ 0, %5 ] %17 = load i32, ptr @ETH_GSTRING_LEN, align 4, !tbaa !13 %18 = trunc nuw nsw i64 %16 to i32 %19 = mul nsw i32 %17, %18 %20 = sext i32 %19 to i64 %21 = getelementptr inbounds i32, ptr %12, i64 %20 %22 = load ptr, ptr @ef4_sw_stat_desc, align 8, !tbaa !15 %23 = getelementptr inbounds %struct.TYPE_4__, ptr %22, i64 %16 %24 = load i32, ptr %23, align 4, !tbaa !16 %25 = tail call i32 @strlcpy(ptr noundef %21, i32 noundef %24, i32 noundef %17) #2 %26 = add nuw nsw i64 %16, 1 %27 = load i32, ptr @EF4_ETHTOOL_SW_STAT_COUNT, align 4, !tbaa !13 %28 = sext i32 %27 to i64 %29 = icmp slt i64 %26, %28 br i1 %29, label %15, label %30, !llvm.loop !18 30: ; preds = %15 %31 = load i32, ptr @ETH_GSTRING_LEN, align 4, !tbaa !13 br label %32 32: ; preds = %30, %5 %33 = phi i32 [ %9, %5 ], [ %31, %30 ] %34 = phi i32 [ %13, %5 ], [ %27, %30 ] %35 = mul nsw i32 %33, %34 %36 = sext i32 %35 to i64 %37 = getelementptr inbounds i32, ptr %12, i64 %36 %38 = tail call i32 @ef4_describe_per_queue_stats(ptr noundef nonnull %4, ptr noundef %37) #2 br label %41 39: ; preds = %3 %40 = tail call i32 @ef4_ethtool_fill_self_tests(ptr noundef %4, ptr noundef null, ptr noundef %2, ptr noundef null) #2 br label %41 41: ; preds = %3, %39, %32 ret void } declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1 declare i32 @strlcpy(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ef4_describe_per_queue_stats(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @ef4_ethtool_fill_self_tests(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"ef4_nic", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 0} !12 = !{!"TYPE_3__", !8, i64 0} !13 = !{!14, !14, i64 0} !14 = !{!"int", !9, i64 0} !15 = !{!8, !8, i64 0} !16 = !{!17, !14, i64 0} !17 = !{!"TYPE_4__", !14, i64 0} !18 = distinct !{!18, !19} !19 = !{!"llvm.loop.mustprogress"}
linux_drivers_net_ethernet_sfc_falcon_extr_ethtool.c_ef4_ethtool_get_strings
; ModuleID = 'AnghaBench/reactos/dll/3rdparty/libtiff/extr_tif_open.c_TIFFGetMode.c' source_filename = "AnghaBench/reactos/dll/3rdparty/libtiff/extr_tif_open.c_TIFFGetMode.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable define dso_local i32 @TIFFGetMode(ptr nocapture noundef readonly %0) local_unnamed_addr #0 { %2 = load i32, ptr %0, align 4, !tbaa !5 ret i32 %2 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_3__", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/reactos/dll/3rdparty/libtiff/extr_tif_open.c_TIFFGetMode.c' source_filename = "AnghaBench/reactos/dll/3rdparty/libtiff/extr_tif_open.c_TIFFGetMode.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) define i32 @TIFFGetMode(ptr nocapture noundef readonly %0) local_unnamed_addr #0 { %2 = load i32, ptr %0, align 4, !tbaa !6 ret i32 %2 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_3__", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
reactos_dll_3rdparty_libtiff_extr_tif_open.c_TIFFGetMode
; ModuleID = 'AnghaBench/linux/fs/nfs/extr_io.c_nfs_block_buffered.c' source_filename = "AnghaBench/linux/fs/nfs/extr_io.c_nfs_block_buffered.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @NFS_INO_ODIRECT = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @nfs_block_buffered], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @nfs_block_buffered(ptr noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = load i32, ptr @NFS_INO_ODIRECT, align 4, !tbaa !5 %4 = tail call i32 @test_bit(i32 noundef %3, ptr noundef %0) #2 %5 = icmp eq i32 %4, 0 br i1 %5, label %6, label %11 6: ; preds = %2 %7 = load i32, ptr @NFS_INO_ODIRECT, align 4, !tbaa !5 %8 = tail call i32 @set_bit(i32 noundef %7, ptr noundef %0) #2 %9 = load i32, ptr %1, align 4, !tbaa !9 %10 = tail call i32 @nfs_sync_mapping(i32 noundef %9) #2 br label %11 11: ; preds = %6, %2 ret void } declare i32 @test_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @nfs_sync_mapping(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"inode", !6, i64 0}
; ModuleID = 'AnghaBench/linux/fs/nfs/extr_io.c_nfs_block_buffered.c' source_filename = "AnghaBench/linux/fs/nfs/extr_io.c_nfs_block_buffered.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @NFS_INO_ODIRECT = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @nfs_block_buffered], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @nfs_block_buffered(ptr noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = load i32, ptr @NFS_INO_ODIRECT, align 4, !tbaa !6 %4 = tail call i32 @test_bit(i32 noundef %3, ptr noundef %0) #2 %5 = icmp eq i32 %4, 0 br i1 %5, label %6, label %11 6: ; preds = %2 %7 = load i32, ptr @NFS_INO_ODIRECT, align 4, !tbaa !6 %8 = tail call i32 @set_bit(i32 noundef %7, ptr noundef %0) #2 %9 = load i32, ptr %1, align 4, !tbaa !10 %10 = tail call i32 @nfs_sync_mapping(i32 noundef %9) #2 br label %11 11: ; preds = %6, %2 ret void } declare i32 @test_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @nfs_sync_mapping(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"inode", !7, i64 0}
linux_fs_nfs_extr_io.c_nfs_block_buffered
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/shell32/extr_shlfileop.c_dir_exists.c' source_filename = "AnghaBench/reactos/modules/rostests/winetests/shell32/extr_shlfileop.c_dir_exists.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @FILE_ATTRIBUTE_DIRECTORY = dso_local local_unnamed_addr global i32 0, align 4 @INVALID_FILE_ATTRIBUTES = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @dir_exists], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @dir_exists(ptr noundef %0) #0 { %2 = tail call i32 @GetFileAttributesA(ptr noundef %0) #2 %3 = load i32, ptr @FILE_ATTRIBUTE_DIRECTORY, align 4, !tbaa !5 %4 = and i32 %3, %2 %5 = icmp eq i32 %4, %3 %6 = load i32, ptr @INVALID_FILE_ATTRIBUTES, align 4, !tbaa !5 %7 = icmp ne i32 %2, %6 %8 = select i1 %7, i1 %5, i1 false %9 = zext i1 %8 to i32 ret i32 %9 } declare i32 @GetFileAttributesA(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/shell32/extr_shlfileop.c_dir_exists.c' source_filename = "AnghaBench/reactos/modules/rostests/winetests/shell32/extr_shlfileop.c_dir_exists.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @FILE_ATTRIBUTE_DIRECTORY = common local_unnamed_addr global i32 0, align 4 @INVALID_FILE_ATTRIBUTES = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @dir_exists], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 0, 2) i32 @dir_exists(ptr noundef %0) #0 { %2 = tail call i32 @GetFileAttributesA(ptr noundef %0) #2 %3 = load i32, ptr @FILE_ATTRIBUTE_DIRECTORY, align 4, !tbaa !6 %4 = and i32 %3, %2 %5 = icmp eq i32 %4, %3 %6 = load i32, ptr @INVALID_FILE_ATTRIBUTES, align 4, !tbaa !6 %7 = icmp ne i32 %2, %6 %8 = select i1 %7, i1 %5, i1 false %9 = zext i1 %8 to i32 ret i32 %9 } declare i32 @GetFileAttributesA(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
reactos_modules_rostests_winetests_shell32_extr_shlfileop.c_dir_exists
; ModuleID = 'AnghaBench/freebsd/sys/netinet6/extr_ip6_output.c_ip6_calcmtu.c' source_filename = "AnghaBench/freebsd/sys/netinet6/extr_ip6_output.c_ip6_calcmtu.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.in_conninfo = type { %struct.in6_addr, i32 } %struct.in6_addr = type { i32 } @INC_ISIPV6 = dso_local local_unnamed_addr global i32 0, align 4 @IPPROTO_TCP = dso_local local_unnamed_addr global i64 0, align 8 @IPV6_MMTU = dso_local local_unnamed_addr global ptr null, align 8 @EHOSTUNREACH = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ip6_calcmtu], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @ip6_calcmtu(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2, ptr nocapture noundef writeonly %3, ptr noundef writeonly %4, i64 noundef %5) #0 { %7 = alloca %struct.in_conninfo, align 4 %8 = icmp eq ptr %2, null br i1 %8, label %33, label %9 9: ; preds = %6 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #3 %10 = call i32 @bzero(ptr noundef nonnull %7, i32 noundef 8) #3 %11 = load i32, ptr @INC_ISIPV6, align 4, !tbaa !5 %12 = getelementptr inbounds %struct.in_conninfo, ptr %7, i64 0, i32 1 %13 = load i32, ptr %12, align 4, !tbaa !9 %14 = or i32 %13, %11 store i32 %14, ptr %12, align 4, !tbaa !9 %15 = load i32, ptr %1, align 4, !tbaa !5 store i32 %15, ptr %7, align 4, !tbaa !5 %16 = call ptr @IN6_LINKMTU(ptr noundef %0) #3 %17 = load i64, ptr @IPPROTO_TCP, align 8, !tbaa !12 %18 = icmp eq i64 %17, %5 br i1 %18, label %24, label %19 19: ; preds = %9 %20 = call ptr @tcp_hc_getmtu(ptr noundef nonnull %7) #3 %21 = icmp eq ptr %20, null br i1 %21, label %24, label %22 22: ; preds = %19 %23 = call ptr @min(ptr noundef nonnull %20, ptr noundef nonnull %2) #3 br label %24 24: ; preds = %9, %19, %22 %25 = phi ptr [ %23, %22 ], [ %2, %19 ], [ %2, %9 ] %26 = icmp ne ptr %25, null %27 = load ptr, ptr @IPV6_MMTU, align 8 %28 = icmp ult ptr %25, %27 %29 = select i1 %28, ptr %27, ptr %25 %30 = select i1 %26, i1 %28, i1 false %31 = zext i1 %30 to i32 %32 = select i1 %26, ptr %29, ptr %16 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3 br label %39 33: ; preds = %6 %34 = icmp eq ptr %0, null br i1 %34, label %37, label %35 35: ; preds = %33 %36 = tail call ptr @IN6_LINKMTU(ptr noundef nonnull %0) #3 br label %39 37: ; preds = %33 %38 = load i32, ptr @EHOSTUNREACH, align 4, !tbaa !5 br label %39 39: ; preds = %35, %37, %24 %40 = phi i32 [ %31, %24 ], [ 0, %35 ], [ 0, %37 ] %41 = phi i32 [ 0, %24 ], [ 0, %35 ], [ %38, %37 ] %42 = phi ptr [ %32, %24 ], [ %36, %35 ], [ null, %37 ] store ptr %42, ptr %3, align 8, !tbaa !14 %43 = icmp eq ptr %4, null br i1 %43, label %45, label %44 44: ; preds = %39 store i32 %40, ptr %4, align 4, !tbaa !5 br label %45 45: ; preds = %44, %39 ret i32 %41 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @bzero(ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @IN6_LINKMTU(ptr noundef) local_unnamed_addr #2 declare ptr @tcp_hc_getmtu(ptr noundef) local_unnamed_addr #2 declare ptr @min(ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 4} !10 = !{!"in_conninfo", !11, i64 0, !6, i64 4} !11 = !{!"in6_addr", !6, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"long", !7, i64 0} !14 = !{!15, !15, i64 0} !15 = !{!"any pointer", !7, i64 0}
; ModuleID = 'AnghaBench/freebsd/sys/netinet6/extr_ip6_output.c_ip6_calcmtu.c' source_filename = "AnghaBench/freebsd/sys/netinet6/extr_ip6_output.c_ip6_calcmtu.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.in_conninfo = type { %struct.in6_addr, i32 } %struct.in6_addr = type { i32 } @INC_ISIPV6 = common local_unnamed_addr global i32 0, align 4 @IPPROTO_TCP = common local_unnamed_addr global i64 0, align 8 @IPV6_MMTU = common local_unnamed_addr global ptr null, align 8 @EHOSTUNREACH = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ip6_calcmtu], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @ip6_calcmtu(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2, ptr nocapture noundef writeonly %3, ptr noundef writeonly %4, i64 noundef %5) #0 { %7 = alloca %struct.in_conninfo, align 4 %8 = icmp eq ptr %2, null br i1 %8, label %33, label %9 9: ; preds = %6 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #3 %10 = call i32 @bzero(ptr noundef nonnull %7, i32 noundef 8) #3 %11 = load i32, ptr @INC_ISIPV6, align 4, !tbaa !6 %12 = getelementptr inbounds i8, ptr %7, i64 4 %13 = load i32, ptr %12, align 4, !tbaa !10 %14 = or i32 %13, %11 store i32 %14, ptr %12, align 4, !tbaa !10 %15 = load i32, ptr %1, align 4, !tbaa !6 store i32 %15, ptr %7, align 4, !tbaa !6 %16 = call ptr @IN6_LINKMTU(ptr noundef %0) #3 %17 = load i64, ptr @IPPROTO_TCP, align 8, !tbaa !13 %18 = icmp eq i64 %17, %5 br i1 %18, label %24, label %19 19: ; preds = %9 %20 = call ptr @tcp_hc_getmtu(ptr noundef nonnull %7) #3 %21 = icmp eq ptr %20, null br i1 %21, label %24, label %22 22: ; preds = %19 %23 = call ptr @min(ptr noundef nonnull %20, ptr noundef nonnull %2) #3 br label %24 24: ; preds = %9, %19, %22 %25 = phi ptr [ %23, %22 ], [ %2, %19 ], [ %2, %9 ] %26 = icmp ne ptr %25, null %27 = load ptr, ptr @IPV6_MMTU, align 8 %28 = icmp ult ptr %25, %27 %29 = select i1 %28, ptr %27, ptr %25 %30 = select i1 %26, i1 %28, i1 false %31 = zext i1 %30 to i32 %32 = select i1 %26, ptr %29, ptr %16 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3 br label %39 33: ; preds = %6 %34 = icmp eq ptr %0, null br i1 %34, label %37, label %35 35: ; preds = %33 %36 = tail call ptr @IN6_LINKMTU(ptr noundef nonnull %0) #3 br label %39 37: ; preds = %33 %38 = load i32, ptr @EHOSTUNREACH, align 4, !tbaa !6 br label %39 39: ; preds = %35, %37, %24 %40 = phi i32 [ %31, %24 ], [ 0, %35 ], [ 0, %37 ] %41 = phi i32 [ 0, %24 ], [ 0, %35 ], [ %38, %37 ] %42 = phi ptr [ %32, %24 ], [ %36, %35 ], [ null, %37 ] store ptr %42, ptr %3, align 8, !tbaa !15 %43 = icmp eq ptr %4, null br i1 %43, label %45, label %44 44: ; preds = %39 store i32 %40, ptr %4, align 4, !tbaa !6 br label %45 45: ; preds = %44, %39 ret i32 %41 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @bzero(ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @IN6_LINKMTU(ptr noundef) local_unnamed_addr #2 declare ptr @tcp_hc_getmtu(ptr noundef) local_unnamed_addr #2 declare ptr @min(ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 4} !11 = !{!"in_conninfo", !12, i64 0, !7, i64 4} !12 = !{!"in6_addr", !7, i64 0} !13 = !{!14, !14, i64 0} !14 = !{!"long", !8, i64 0} !15 = !{!16, !16, i64 0} !16 = !{!"any pointer", !8, i64 0}
freebsd_sys_netinet6_extr_ip6_output.c_ip6_calcmtu
; ModuleID = 'AnghaBench/postgres/src/backend/nodes/extr_outfuncs.c__outHashPath.c' source_filename = "AnghaBench/postgres/src/backend/nodes/extr_outfuncs.c__outHashPath.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [9 x i8] c"HASHPATH\00", align 1 @path_hashclauses = dso_local local_unnamed_addr global i32 0, align 4 @num_batches = dso_local local_unnamed_addr global i32 0, align 4 @inner_rows_total = dso_local local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [5 x i8] c"%.0f\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @_outHashPath], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @_outHashPath(i32 noundef %0, ptr noundef %1) #0 { %3 = tail call i32 @WRITE_NODE_TYPE(ptr noundef nonnull @.str) #2 %4 = tail call i32 @_outJoinPathInfo(i32 noundef %0, ptr noundef %1) #2 %5 = load i32, ptr @path_hashclauses, align 4, !tbaa !5 %6 = tail call i32 @WRITE_NODE_FIELD(i32 noundef %5) #2 %7 = load i32, ptr @num_batches, align 4, !tbaa !5 %8 = tail call i32 @WRITE_INT_FIELD(i32 noundef %7) #2 %9 = load i32, ptr @inner_rows_total, align 4, !tbaa !5 %10 = tail call i32 @WRITE_FLOAT_FIELD(i32 noundef %9, ptr noundef nonnull @.str.1) #2 ret void } declare i32 @WRITE_NODE_TYPE(ptr noundef) local_unnamed_addr #1 declare i32 @_outJoinPathInfo(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @WRITE_NODE_FIELD(i32 noundef) local_unnamed_addr #1 declare i32 @WRITE_INT_FIELD(i32 noundef) local_unnamed_addr #1 declare i32 @WRITE_FLOAT_FIELD(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/postgres/src/backend/nodes/extr_outfuncs.c__outHashPath.c' source_filename = "AnghaBench/postgres/src/backend/nodes/extr_outfuncs.c__outHashPath.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [9 x i8] c"HASHPATH\00", align 1 @path_hashclauses = common local_unnamed_addr global i32 0, align 4 @num_batches = common local_unnamed_addr global i32 0, align 4 @inner_rows_total = common local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [5 x i8] c"%.0f\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @_outHashPath], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @_outHashPath(i32 noundef %0, ptr noundef %1) #0 { %3 = tail call i32 @WRITE_NODE_TYPE(ptr noundef nonnull @.str) #2 %4 = tail call i32 @_outJoinPathInfo(i32 noundef %0, ptr noundef %1) #2 %5 = load i32, ptr @path_hashclauses, align 4, !tbaa !6 %6 = tail call i32 @WRITE_NODE_FIELD(i32 noundef %5) #2 %7 = load i32, ptr @num_batches, align 4, !tbaa !6 %8 = tail call i32 @WRITE_INT_FIELD(i32 noundef %7) #2 %9 = load i32, ptr @inner_rows_total, align 4, !tbaa !6 %10 = tail call i32 @WRITE_FLOAT_FIELD(i32 noundef %9, ptr noundef nonnull @.str.1) #2 ret void } declare i32 @WRITE_NODE_TYPE(ptr noundef) local_unnamed_addr #1 declare i32 @_outJoinPathInfo(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @WRITE_NODE_FIELD(i32 noundef) local_unnamed_addr #1 declare i32 @WRITE_INT_FIELD(i32 noundef) local_unnamed_addr #1 declare i32 @WRITE_FLOAT_FIELD(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
postgres_src_backend_nodes_extr_outfuncs.c__outHashPath
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/ipw2x00/extr_ipw2200.c_ipw_tx_queue_free.c' source_filename = "AnghaBench/linux/drivers/net/wireless/intel/ipw2x00/extr_ipw2200.c_ipw_tx_queue_free.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.ipw_priv = type { ptr, i32 } @llvm.compiler.used = appending global [1 x ptr] [ptr @ipw_tx_queue_free], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @ipw_tx_queue_free(ptr noundef %0) #0 { %2 = getelementptr inbounds %struct.ipw_priv, ptr %0, i64 0, i32 1 %3 = tail call i32 @ipw_queue_tx_free(ptr noundef %0, ptr noundef nonnull %2) #2 %4 = load ptr, ptr %0, align 8, !tbaa !5 %5 = tail call i32 @ipw_queue_tx_free(ptr noundef nonnull %0, ptr noundef %4) #2 %6 = load ptr, ptr %0, align 8, !tbaa !5 %7 = getelementptr inbounds i32, ptr %6, i64 1 %8 = tail call i32 @ipw_queue_tx_free(ptr noundef nonnull %0, ptr noundef nonnull %7) #2 %9 = load ptr, ptr %0, align 8, !tbaa !5 %10 = getelementptr inbounds i32, ptr %9, i64 2 %11 = tail call i32 @ipw_queue_tx_free(ptr noundef nonnull %0, ptr noundef nonnull %10) #2 %12 = load ptr, ptr %0, align 8, !tbaa !5 %13 = getelementptr inbounds i32, ptr %12, i64 3 %14 = tail call i32 @ipw_queue_tx_free(ptr noundef nonnull %0, ptr noundef nonnull %13) #2 ret void } declare i32 @ipw_queue_tx_free(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"ipw_priv", !7, i64 0, !10, i64 8} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/ipw2x00/extr_ipw2200.c_ipw_tx_queue_free.c' source_filename = "AnghaBench/linux/drivers/net/wireless/intel/ipw2x00/extr_ipw2200.c_ipw_tx_queue_free.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @ipw_tx_queue_free], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @ipw_tx_queue_free(ptr noundef %0) #0 { %2 = getelementptr inbounds i8, ptr %0, i64 8 %3 = tail call i32 @ipw_queue_tx_free(ptr noundef %0, ptr noundef nonnull %2) #2 %4 = load ptr, ptr %0, align 8, !tbaa !6 %5 = tail call i32 @ipw_queue_tx_free(ptr noundef nonnull %0, ptr noundef %4) #2 %6 = load ptr, ptr %0, align 8, !tbaa !6 %7 = getelementptr inbounds i8, ptr %6, i64 4 %8 = tail call i32 @ipw_queue_tx_free(ptr noundef nonnull %0, ptr noundef nonnull %7) #2 %9 = load ptr, ptr %0, align 8, !tbaa !6 %10 = getelementptr inbounds i8, ptr %9, i64 8 %11 = tail call i32 @ipw_queue_tx_free(ptr noundef nonnull %0, ptr noundef nonnull %10) #2 %12 = load ptr, ptr %0, align 8, !tbaa !6 %13 = getelementptr inbounds i8, ptr %12, i64 12 %14 = tail call i32 @ipw_queue_tx_free(ptr noundef nonnull %0, ptr noundef nonnull %13) #2 ret void } declare i32 @ipw_queue_tx_free(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"ipw_priv", !8, i64 0, !11, i64 8} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"int", !9, i64 0}
linux_drivers_net_wireless_intel_ipw2x00_extr_ipw2200.c_ipw_tx_queue_free
; ModuleID = 'AnghaBench/linux/kernel/events/extr_core.c_ctx_resched.c' source_filename = "AnghaBench/linux/kernel/events/extr_core.c_ctx_resched.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @EVENT_CPU = dso_local local_unnamed_addr global i32 0, align 4 @EVENT_PINNED = dso_local local_unnamed_addr global i32 0, align 4 @EVENT_FLEXIBLE = dso_local local_unnamed_addr global i32 0, align 4 @EVENT_ALL = dso_local local_unnamed_addr global i32 0, align 4 @current = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ctx_resched], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @ctx_resched(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 { %4 = load i32, ptr @EVENT_CPU, align 4, !tbaa !5 %5 = and i32 %4, %2 %6 = icmp eq i32 %5, 0 %7 = load i32, ptr @EVENT_PINNED, align 4, !tbaa !5 %8 = and i32 %7, %2 %9 = icmp eq i32 %8, 0 %10 = load i32, ptr @EVENT_FLEXIBLE, align 4 %11 = select i1 %9, i32 0, i32 %10 %12 = or i32 %11, %2 %13 = load i32, ptr @EVENT_ALL, align 4, !tbaa !5 %14 = and i32 %12, %13 %15 = load i32, ptr %0, align 4, !tbaa !9 %16 = tail call i32 @perf_pmu_disable(i32 noundef %15) #2 %17 = icmp eq ptr %1, null br i1 %17, label %20, label %18 18: ; preds = %3 %19 = tail call i32 @task_ctx_sched_out(ptr noundef nonnull %0, ptr noundef nonnull %1, i32 noundef %12) #2 br label %20 20: ; preds = %18, %3 br i1 %6, label %21, label %27 21: ; preds = %20 %22 = load i32, ptr @EVENT_PINNED, align 4, !tbaa !5 %23 = and i32 %22, %14 %24 = icmp eq i32 %23, 0 br i1 %24, label %30, label %25 25: ; preds = %21 %26 = load i32, ptr @EVENT_FLEXIBLE, align 4, !tbaa !5 br label %27 27: ; preds = %20, %25 %28 = phi i32 [ %26, %25 ], [ %14, %20 ] %29 = tail call i32 @cpu_ctx_sched_out(ptr noundef nonnull %0, i32 noundef %28) #2 br label %30 30: ; preds = %27, %21 %31 = load i32, ptr @current, align 4, !tbaa !5 %32 = tail call i32 @perf_event_sched_in(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %31) #2 %33 = load i32, ptr %0, align 4, !tbaa !9 %34 = tail call i32 @perf_pmu_enable(i32 noundef %33) #2 ret void } declare i32 @perf_pmu_disable(i32 noundef) local_unnamed_addr #1 declare i32 @task_ctx_sched_out(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @cpu_ctx_sched_out(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @perf_event_sched_in(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @perf_pmu_enable(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"perf_cpu_context", !11, i64 0} !11 = !{!"TYPE_2__", !6, i64 0}
; ModuleID = 'AnghaBench/linux/kernel/events/extr_core.c_ctx_resched.c' source_filename = "AnghaBench/linux/kernel/events/extr_core.c_ctx_resched.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EVENT_CPU = common local_unnamed_addr global i32 0, align 4 @EVENT_PINNED = common local_unnamed_addr global i32 0, align 4 @EVENT_FLEXIBLE = common local_unnamed_addr global i32 0, align 4 @EVENT_ALL = common local_unnamed_addr global i32 0, align 4 @current = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ctx_resched], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @ctx_resched(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 { %4 = load i32, ptr @EVENT_CPU, align 4, !tbaa !6 %5 = and i32 %4, %2 %6 = icmp eq i32 %5, 0 %7 = load i32, ptr @EVENT_PINNED, align 4, !tbaa !6 %8 = and i32 %7, %2 %9 = icmp eq i32 %8, 0 %10 = load i32, ptr @EVENT_FLEXIBLE, align 4 %11 = select i1 %9, i32 0, i32 %10 %12 = or i32 %11, %2 %13 = load i32, ptr @EVENT_ALL, align 4, !tbaa !6 %14 = and i32 %12, %13 %15 = load i32, ptr %0, align 4, !tbaa !10 %16 = tail call i32 @perf_pmu_disable(i32 noundef %15) #2 %17 = icmp eq ptr %1, null br i1 %17, label %20, label %18 18: ; preds = %3 %19 = tail call i32 @task_ctx_sched_out(ptr noundef nonnull %0, ptr noundef nonnull %1, i32 noundef %12) #2 br label %20 20: ; preds = %18, %3 br i1 %6, label %21, label %27 21: ; preds = %20 %22 = load i32, ptr @EVENT_PINNED, align 4, !tbaa !6 %23 = and i32 %22, %14 %24 = icmp eq i32 %23, 0 br i1 %24, label %30, label %25 25: ; preds = %21 %26 = load i32, ptr @EVENT_FLEXIBLE, align 4, !tbaa !6 br label %27 27: ; preds = %20, %25 %28 = phi i32 [ %26, %25 ], [ %14, %20 ] %29 = tail call i32 @cpu_ctx_sched_out(ptr noundef nonnull %0, i32 noundef %28) #2 br label %30 30: ; preds = %27, %21 %31 = load i32, ptr @current, align 4, !tbaa !6 %32 = tail call i32 @perf_event_sched_in(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %31) #2 %33 = load i32, ptr %0, align 4, !tbaa !10 %34 = tail call i32 @perf_pmu_enable(i32 noundef %33) #2 ret void } declare i32 @perf_pmu_disable(i32 noundef) local_unnamed_addr #1 declare i32 @task_ctx_sched_out(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @cpu_ctx_sched_out(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @perf_event_sched_in(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @perf_pmu_enable(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"perf_cpu_context", !12, i64 0} !12 = !{!"TYPE_2__", !7, i64 0}
linux_kernel_events_extr_core.c_ctx_resched
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/pci/extr_pci.h_pci_match_one_device.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/pci/extr_pci.h_pci_match_one_device.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.pci_device_id = type { i64, i64, i64, i64, i32, i32 } %struct.pci_dev = type { i64, i64, i64, i64, i32 } @PCI_ANY_ID = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @pci_match_one_device], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable define internal noundef ptr @pci_match_one_device(ptr noundef readonly %0, ptr nocapture noundef readonly %1) #0 { %3 = load i64, ptr %0, align 8, !tbaa !5 %4 = load i64, ptr @PCI_ANY_ID, align 8, !tbaa !11 %5 = icmp eq i64 %3, %4 br i1 %5, label %9, label %6 6: ; preds = %2 %7 = load i64, ptr %1, align 8, !tbaa !12 %8 = icmp eq i64 %3, %7 br i1 %8, label %9, label %43 9: ; preds = %6, %2 %10 = getelementptr inbounds %struct.pci_device_id, ptr %0, i64 0, i32 1 %11 = load i64, ptr %10, align 8, !tbaa !14 %12 = icmp eq i64 %11, %4 br i1 %12, label %17, label %13 13: ; preds = %9 %14 = getelementptr inbounds %struct.pci_dev, ptr %1, i64 0, i32 1 %15 = load i64, ptr %14, align 8, !tbaa !15 %16 = icmp eq i64 %11, %15 br i1 %16, label %17, label %43 17: ; preds = %13, %9 %18 = getelementptr inbounds %struct.pci_device_id, ptr %0, i64 0, i32 2 %19 = load i64, ptr %18, align 8, !tbaa !16 %20 = icmp eq i64 %19, %4 br i1 %20, label %25, label %21 21: ; preds = %17 %22 = getelementptr inbounds %struct.pci_dev, ptr %1, i64 0, i32 2 %23 = load i64, ptr %22, align 8, !tbaa !17 %24 = icmp eq i64 %19, %23 br i1 %24, label %25, label %43 25: ; preds = %21, %17 %26 = getelementptr inbounds %struct.pci_device_id, ptr %0, i64 0, i32 3 %27 = load i64, ptr %26, align 8, !tbaa !18 %28 = icmp eq i64 %27, %4 br i1 %28, label %33, label %29 29: ; preds = %25 %30 = getelementptr inbounds %struct.pci_dev, ptr %1, i64 0, i32 3 %31 = load i64, ptr %30, align 8, !tbaa !19 %32 = icmp eq i64 %27, %31 br i1 %32, label %33, label %43 33: ; preds = %29, %25 %34 = getelementptr inbounds %struct.pci_device_id, ptr %0, i64 0, i32 4 %35 = load i32, ptr %34, align 8, !tbaa !20 %36 = getelementptr inbounds %struct.pci_dev, ptr %1, i64 0, i32 4 %37 = load i32, ptr %36, align 8, !tbaa !21 %38 = xor i32 %37, %35 %39 = getelementptr inbounds %struct.pci_device_id, ptr %0, i64 0, i32 5 %40 = load i32, ptr %39, align 4, !tbaa !22 %41 = and i32 %38, %40 %42 = icmp eq i32 %41, 0 br i1 %42, label %44, label %43 43: ; preds = %33, %29, %21, %13, %6 br label %44 44: ; preds = %33, %43 %45 = phi ptr [ null, %43 ], [ %0, %33 ] ret ptr %45 } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"pci_device_id", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !10, i64 32, !10, i64 36} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0} !11 = !{!7, !7, i64 0} !12 = !{!13, !7, i64 0} !13 = !{!"pci_dev", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !10, i64 32} !14 = !{!6, !7, i64 8} !15 = !{!13, !7, i64 8} !16 = !{!6, !7, i64 16} !17 = !{!13, !7, i64 16} !18 = !{!6, !7, i64 24} !19 = !{!13, !7, i64 24} !20 = !{!6, !10, i64 32} !21 = !{!13, !10, i64 32} !22 = !{!6, !10, i64 36}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/pci/extr_pci.h_pci_match_one_device.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/pci/extr_pci.h_pci_match_one_device.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @PCI_ANY_ID = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @pci_match_one_device], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) define internal noundef ptr @pci_match_one_device(ptr noundef readonly %0, ptr nocapture noundef readonly %1) #0 { %3 = load i64, ptr %0, align 8, !tbaa !6 %4 = load i64, ptr @PCI_ANY_ID, align 8, !tbaa !12 %5 = icmp eq i64 %3, %4 br i1 %5, label %9, label %6 6: ; preds = %2 %7 = load i64, ptr %1, align 8, !tbaa !13 %8 = icmp eq i64 %3, %7 br i1 %8, label %9, label %43 9: ; preds = %6, %2 %10 = getelementptr inbounds i8, ptr %0, i64 8 %11 = load i64, ptr %10, align 8, !tbaa !15 %12 = icmp eq i64 %11, %4 br i1 %12, label %17, label %13 13: ; preds = %9 %14 = getelementptr inbounds i8, ptr %1, i64 8 %15 = load i64, ptr %14, align 8, !tbaa !16 %16 = icmp eq i64 %11, %15 br i1 %16, label %17, label %43 17: ; preds = %13, %9 %18 = getelementptr inbounds i8, ptr %0, i64 16 %19 = load i64, ptr %18, align 8, !tbaa !17 %20 = icmp eq i64 %19, %4 br i1 %20, label %25, label %21 21: ; preds = %17 %22 = getelementptr inbounds i8, ptr %1, i64 16 %23 = load i64, ptr %22, align 8, !tbaa !18 %24 = icmp eq i64 %19, %23 br i1 %24, label %25, label %43 25: ; preds = %21, %17 %26 = getelementptr inbounds i8, ptr %0, i64 24 %27 = load i64, ptr %26, align 8, !tbaa !19 %28 = icmp eq i64 %27, %4 br i1 %28, label %33, label %29 29: ; preds = %25 %30 = getelementptr inbounds i8, ptr %1, i64 24 %31 = load i64, ptr %30, align 8, !tbaa !20 %32 = icmp eq i64 %27, %31 br i1 %32, label %33, label %43 33: ; preds = %29, %25 %34 = getelementptr inbounds i8, ptr %0, i64 32 %35 = load i32, ptr %34, align 8, !tbaa !21 %36 = getelementptr inbounds i8, ptr %1, i64 32 %37 = load i32, ptr %36, align 8, !tbaa !22 %38 = xor i32 %37, %35 %39 = getelementptr inbounds i8, ptr %0, i64 36 %40 = load i32, ptr %39, align 4, !tbaa !23 %41 = and i32 %38, %40 %42 = icmp eq i32 %41, 0 br i1 %42, label %44, label %43 43: ; preds = %33, %29, %21, %13, %6 br label %44 44: ; preds = %33, %43 %45 = phi ptr [ null, %43 ], [ %0, %33 ] ret ptr %45 } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"pci_device_id", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !11, i64 32, !11, i64 36} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"int", !9, i64 0} !12 = !{!8, !8, i64 0} !13 = !{!14, !8, i64 0} !14 = !{!"pci_dev", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !11, i64 32} !15 = !{!7, !8, i64 8} !16 = !{!14, !8, i64 8} !17 = !{!7, !8, i64 16} !18 = !{!14, !8, i64 16} !19 = !{!7, !8, i64 24} !20 = !{!14, !8, i64 24} !21 = !{!7, !11, i64 32} !22 = !{!14, !11, i64 32} !23 = !{!7, !11, i64 36}
fastsocket_kernel_drivers_pci_extr_pci.h_pci_match_one_device
; ModuleID = 'AnghaBench/freebsd/contrib/lua/src/extr_lcode.c_luaK_numberK.c' source_filename = "AnghaBench/freebsd/contrib/lua/src/extr_lcode.c_luaK_numberK.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @luaK_numberK], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @luaK_numberK(ptr noundef %0, i32 noundef %1) #0 { %3 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %4 = call i32 @setfltvalue(ptr noundef nonnull %3, i32 noundef %1) #3 %5 = call i32 @addk(ptr noundef %0, ptr noundef nonnull %3, ptr noundef nonnull %3) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 ret i32 %5 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @setfltvalue(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @addk(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/freebsd/contrib/lua/src/extr_lcode.c_luaK_numberK.c' source_filename = "AnghaBench/freebsd/contrib/lua/src/extr_lcode.c_luaK_numberK.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @luaK_numberK], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @luaK_numberK(ptr noundef %0, i32 noundef %1) #0 { %3 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %4 = call i32 @setfltvalue(ptr noundef nonnull %3, i32 noundef %1) #3 %5 = call i32 @addk(ptr noundef %0, ptr noundef nonnull %3, ptr noundef nonnull %3) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 ret i32 %5 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @setfltvalue(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @addk(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
freebsd_contrib_lua_src_extr_lcode.c_luaK_numberK
; ModuleID = 'AnghaBench/linux/net/decnet/extr_dn_dev.c_dn_nl_newaddr.c' source_filename = "AnghaBench/linux/net/decnet/extr_dn_dev.c_dn_nl_newaddr.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.ifaddrmsg = type { i32, i32, i32 } %struct.net_device = type { i32, i32 } %struct.dn_ifaddr = type { i32, ptr, i32, i32, ptr, ptr } @IFA_MAX = dso_local local_unnamed_addr global i32 0, align 4 @CAP_NET_ADMIN = dso_local local_unnamed_addr global i32 0, align 4 @EPERM = dso_local local_unnamed_addr global i32 0, align 4 @init_net = dso_local global i32 0, align 4 @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @dn_ifa_policy = dso_local local_unnamed_addr global i32 0, align 4 @IFA_LOCAL = dso_local local_unnamed_addr global i64 0, align 8 @ENODEV = dso_local local_unnamed_addr global i32 0, align 4 @ENOBUFS = dso_local local_unnamed_addr global i32 0, align 4 @IFA_ADDRESS = dso_local local_unnamed_addr global i64 0, align 8 @IFA_FLAGS = dso_local local_unnamed_addr global i64 0, align 8 @IFA_LABEL = dso_local local_unnamed_addr global i64 0, align 8 @IFNAMSIZ = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @dn_nl_newaddr], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @dn_nl_newaddr(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 { %4 = alloca i32, align 4 %5 = load i32, ptr %0, align 4, !tbaa !5 %6 = tail call ptr @sock_net(i32 noundef %5) #3 %7 = load i32, ptr @IFA_MAX, align 4, !tbaa !10 %8 = add nsw i32 %7, 1 %9 = zext i32 %8 to i64 %10 = alloca ptr, i64 %9, align 16 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3 %11 = load i32, ptr @CAP_NET_ADMIN, align 4, !tbaa !10 %12 = tail call i32 @netlink_capable(ptr noundef nonnull %0, i32 noundef %11) #3 %13 = icmp eq i32 %12, 0 br i1 %13, label %14, label %17 14: ; preds = %3 %15 = load i32, ptr @EPERM, align 4, !tbaa !10 %16 = sub nsw i32 0, %15 br label %112 17: ; preds = %3 %18 = tail call i32 @net_eq(ptr noundef %6, ptr noundef nonnull @init_net) #3 %19 = icmp eq i32 %18, 0 br i1 %19, label %20, label %23 20: ; preds = %17 %21 = load i32, ptr @EINVAL, align 4, !tbaa !10 %22 = sub nsw i32 0, %21 br label %112 23: ; preds = %17 %24 = load i32, ptr @IFA_MAX, align 4, !tbaa !10 %25 = load i32, ptr @dn_ifa_policy, align 4, !tbaa !10 %26 = call i32 @nlmsg_parse_deprecated(ptr noundef %1, i32 noundef 12, ptr noundef nonnull %10, i32 noundef %24, i32 noundef %25, ptr noundef %2) #3 store i32 %26, ptr %4, align 4, !tbaa !10 %27 = icmp slt i32 %26, 0 br i1 %27, label %112, label %28 28: ; preds = %23 %29 = load i64, ptr @IFA_LOCAL, align 8, !tbaa !11 %30 = getelementptr inbounds ptr, ptr %10, i64 %29 %31 = load ptr, ptr %30, align 8, !tbaa !13 %32 = icmp eq ptr %31, null br i1 %32, label %33, label %36 33: ; preds = %28 %34 = load i32, ptr @EINVAL, align 4, !tbaa !10 %35 = sub nsw i32 0, %34 br label %112 36: ; preds = %28 %37 = call ptr @nlmsg_data(ptr noundef %1) #3 %38 = getelementptr inbounds %struct.ifaddrmsg, ptr %37, i64 0, i32 2 %39 = load i32, ptr %38, align 4, !tbaa !15 %40 = call ptr @__dev_get_by_index(ptr noundef nonnull @init_net, i32 noundef %39) #3 %41 = icmp eq ptr %40, null br i1 %41, label %42, label %45 42: ; preds = %36 %43 = load i32, ptr @ENODEV, align 4, !tbaa !10 %44 = sub nsw i32 0, %43 br label %112 45: ; preds = %36 %46 = getelementptr inbounds %struct.net_device, ptr %40, i64 0, i32 1 %47 = load i32, ptr %46, align 4, !tbaa !17 %48 = call ptr @rtnl_dereference(i32 noundef %47) #3 %49 = icmp eq ptr %48, null br i1 %49, label %50, label %55 50: ; preds = %45 %51 = call ptr @dn_dev_create(ptr noundef nonnull %40, ptr noundef nonnull %4) #3 %52 = icmp eq ptr %51, null br i1 %52, label %53, label %55 53: ; preds = %50 %54 = load i32, ptr %4, align 4, !tbaa !10 br label %112 55: ; preds = %50, %45 %56 = phi ptr [ %51, %50 ], [ %48, %45 ] %57 = call ptr (...) @dn_dev_alloc_ifa() #3 %58 = icmp eq ptr %57, null br i1 %58, label %59, label %62 59: ; preds = %55 %60 = load i32, ptr @ENOBUFS, align 4, !tbaa !10 %61 = sub nsw i32 0, %60 br label %112 62: ; preds = %55 %63 = load i64, ptr @IFA_ADDRESS, align 8, !tbaa !11 %64 = getelementptr inbounds ptr, ptr %10, i64 %63 %65 = load ptr, ptr %64, align 8, !tbaa !13 %66 = icmp eq ptr %65, null %67 = load i64, ptr @IFA_LOCAL, align 8, !tbaa !11 %68 = getelementptr inbounds ptr, ptr %10, i64 %67 %69 = load ptr, ptr %68, align 8, !tbaa !13 br i1 %66, label %70, label %71 70: ; preds = %62 store ptr %69, ptr %64, align 8, !tbaa !13 br label %71 71: ; preds = %62, %70 %72 = call ptr @nla_get_le16(ptr noundef %69) #3 %73 = getelementptr inbounds %struct.dn_ifaddr, ptr %57, i64 0, i32 5 store ptr %72, ptr %73, align 8, !tbaa !19 %74 = load i64, ptr @IFA_ADDRESS, align 8, !tbaa !11 %75 = getelementptr inbounds ptr, ptr %10, i64 %74 %76 = load ptr, ptr %75, align 8, !tbaa !13 %77 = call ptr @nla_get_le16(ptr noundef %76) #3 %78 = getelementptr inbounds %struct.dn_ifaddr, ptr %57, i64 0, i32 4 store ptr %77, ptr %78, align 8, !tbaa !21 %79 = load i64, ptr @IFA_FLAGS, align 8, !tbaa !11 %80 = getelementptr inbounds ptr, ptr %10, i64 %79 %81 = load ptr, ptr %80, align 8, !tbaa !13 %82 = icmp eq ptr %81, null br i1 %82, label %85, label %83 83: ; preds = %71 %84 = call i32 @nla_get_u32(ptr noundef nonnull %81) #3 br label %88 85: ; preds = %71 %86 = getelementptr inbounds %struct.ifaddrmsg, ptr %37, i64 0, i32 1 %87 = load i32, ptr %86, align 4, !tbaa !22 br label %88 88: ; preds = %85, %83 %89 = phi i32 [ %84, %83 ], [ %87, %85 ] %90 = getelementptr inbounds %struct.dn_ifaddr, ptr %57, i64 0, i32 3 store i32 %89, ptr %90, align 4, !tbaa !23 %91 = load i32, ptr %37, align 4, !tbaa !24 %92 = getelementptr inbounds %struct.dn_ifaddr, ptr %57, i64 0, i32 2 store i32 %91, ptr %92, align 8, !tbaa !25 %93 = getelementptr inbounds %struct.dn_ifaddr, ptr %57, i64 0, i32 1 store ptr %56, ptr %93, align 8, !tbaa !26 %94 = load i64, ptr @IFA_LABEL, align 8, !tbaa !11 %95 = getelementptr inbounds ptr, ptr %10, i64 %94 %96 = load ptr, ptr %95, align 8, !tbaa !13 %97 = icmp eq ptr %96, null %98 = load i32, ptr %57, align 8, !tbaa !27 br i1 %97, label %102, label %99 99: ; preds = %88 %100 = load i32, ptr @IFNAMSIZ, align 4, !tbaa !10 %101 = call i32 @nla_strlcpy(i32 noundef %98, ptr noundef nonnull %96, i32 noundef %100) #3 br label %106 102: ; preds = %88 %103 = load i32, ptr %40, align 4, !tbaa !28 %104 = load i32, ptr @IFNAMSIZ, align 4, !tbaa !10 %105 = call i32 @memcpy(i32 noundef %98, i32 noundef %103, i32 noundef %104) #3 br label %106 106: ; preds = %102, %99 %107 = call i32 @dn_dev_insert_ifa(ptr noundef nonnull %56, ptr noundef nonnull %57) #3 store i32 %107, ptr %4, align 4, !tbaa !10 %108 = icmp eq i32 %107, 0 br i1 %108, label %112, label %109 109: ; preds = %106 %110 = call i32 @dn_dev_free_ifa(ptr noundef nonnull %57) #3 %111 = load i32, ptr %4, align 4, !tbaa !10 br label %112 112: ; preds = %106, %109, %23, %59, %53, %42, %33, %20, %14 %113 = phi i32 [ %35, %33 ], [ %44, %42 ], [ %61, %59 ], [ %54, %53 ], [ %22, %20 ], [ %16, %14 ], [ %26, %23 ], [ %111, %109 ], [ 0, %106 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3 ret i32 %113 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @sock_net(i32 noundef) local_unnamed_addr #2 declare i32 @netlink_capable(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @net_eq(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @nlmsg_parse_deprecated(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare ptr @nlmsg_data(ptr noundef) local_unnamed_addr #2 declare ptr @__dev_get_by_index(ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @rtnl_dereference(i32 noundef) local_unnamed_addr #2 declare ptr @dn_dev_create(ptr noundef, ptr noundef) local_unnamed_addr #2 declare ptr @dn_dev_alloc_ifa(...) local_unnamed_addr #2 declare ptr @nla_get_le16(ptr noundef) local_unnamed_addr #2 declare i32 @nla_get_u32(ptr noundef) local_unnamed_addr #2 declare i32 @nla_strlcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @dn_dev_insert_ifa(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @dn_dev_free_ifa(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"sk_buff", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!7, !7, i64 0} !11 = !{!12, !12, i64 0} !12 = !{!"long", !8, i64 0} !13 = !{!14, !14, i64 0} !14 = !{!"any pointer", !8, i64 0} !15 = !{!16, !7, i64 8} !16 = !{!"ifaddrmsg", !7, i64 0, !7, i64 4, !7, i64 8} !17 = !{!18, !7, i64 4} !18 = !{!"net_device", !7, i64 0, !7, i64 4} !19 = !{!20, !14, i64 32} !20 = !{!"dn_ifaddr", !7, i64 0, !14, i64 8, !7, i64 16, !7, i64 20, !14, i64 24, !14, i64 32} !21 = !{!20, !14, i64 24} !22 = !{!16, !7, i64 4} !23 = !{!20, !7, i64 20} !24 = !{!16, !7, i64 0} !25 = !{!20, !7, i64 16} !26 = !{!20, !14, i64 8} !27 = !{!20, !7, i64 0} !28 = !{!18, !7, i64 0}
; ModuleID = 'AnghaBench/linux/net/decnet/extr_dn_dev.c_dn_nl_newaddr.c' source_filename = "AnghaBench/linux/net/decnet/extr_dn_dev.c_dn_nl_newaddr.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @IFA_MAX = common local_unnamed_addr global i32 0, align 4 @CAP_NET_ADMIN = common local_unnamed_addr global i32 0, align 4 @EPERM = common local_unnamed_addr global i32 0, align 4 @init_net = common global i32 0, align 4 @EINVAL = common local_unnamed_addr global i32 0, align 4 @dn_ifa_policy = common local_unnamed_addr global i32 0, align 4 @IFA_LOCAL = common local_unnamed_addr global i64 0, align 8 @ENODEV = common local_unnamed_addr global i32 0, align 4 @ENOBUFS = common local_unnamed_addr global i32 0, align 4 @IFA_ADDRESS = common local_unnamed_addr global i64 0, align 8 @IFA_FLAGS = common local_unnamed_addr global i64 0, align 8 @IFA_LABEL = common local_unnamed_addr global i64 0, align 8 @IFNAMSIZ = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @dn_nl_newaddr], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @dn_nl_newaddr(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 { %4 = alloca i32, align 4 %5 = load i32, ptr %0, align 4, !tbaa !6 %6 = tail call ptr @sock_net(i32 noundef %5) #3 %7 = load i32, ptr @IFA_MAX, align 4, !tbaa !11 %8 = add nsw i32 %7, 1 %9 = zext i32 %8 to i64 %10 = alloca ptr, i64 %9, align 8 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3 %11 = load i32, ptr @CAP_NET_ADMIN, align 4, !tbaa !11 %12 = tail call i32 @netlink_capable(ptr noundef nonnull %0, i32 noundef %11) #3 %13 = icmp eq i32 %12, 0 br i1 %13, label %14, label %17 14: ; preds = %3 %15 = load i32, ptr @EPERM, align 4, !tbaa !11 %16 = sub nsw i32 0, %15 br label %112 17: ; preds = %3 %18 = tail call i32 @net_eq(ptr noundef %6, ptr noundef nonnull @init_net) #3 %19 = icmp eq i32 %18, 0 br i1 %19, label %20, label %23 20: ; preds = %17 %21 = load i32, ptr @EINVAL, align 4, !tbaa !11 %22 = sub nsw i32 0, %21 br label %112 23: ; preds = %17 %24 = load i32, ptr @IFA_MAX, align 4, !tbaa !11 %25 = load i32, ptr @dn_ifa_policy, align 4, !tbaa !11 %26 = call i32 @nlmsg_parse_deprecated(ptr noundef %1, i32 noundef 12, ptr noundef nonnull %10, i32 noundef %24, i32 noundef %25, ptr noundef %2) #3 store i32 %26, ptr %4, align 4, !tbaa !11 %27 = icmp slt i32 %26, 0 br i1 %27, label %112, label %28 28: ; preds = %23 %29 = load i64, ptr @IFA_LOCAL, align 8, !tbaa !12 %30 = getelementptr inbounds ptr, ptr %10, i64 %29 %31 = load ptr, ptr %30, align 8, !tbaa !14 %32 = icmp eq ptr %31, null br i1 %32, label %33, label %36 33: ; preds = %28 %34 = load i32, ptr @EINVAL, align 4, !tbaa !11 %35 = sub nsw i32 0, %34 br label %112 36: ; preds = %28 %37 = call ptr @nlmsg_data(ptr noundef %1) #3 %38 = getelementptr inbounds i8, ptr %37, i64 8 %39 = load i32, ptr %38, align 4, !tbaa !16 %40 = call ptr @__dev_get_by_index(ptr noundef nonnull @init_net, i32 noundef %39) #3 %41 = icmp eq ptr %40, null br i1 %41, label %42, label %45 42: ; preds = %36 %43 = load i32, ptr @ENODEV, align 4, !tbaa !11 %44 = sub nsw i32 0, %43 br label %112 45: ; preds = %36 %46 = getelementptr inbounds i8, ptr %40, i64 4 %47 = load i32, ptr %46, align 4, !tbaa !18 %48 = call ptr @rtnl_dereference(i32 noundef %47) #3 %49 = icmp eq ptr %48, null br i1 %49, label %50, label %55 50: ; preds = %45 %51 = call ptr @dn_dev_create(ptr noundef nonnull %40, ptr noundef nonnull %4) #3 %52 = icmp eq ptr %51, null br i1 %52, label %53, label %55 53: ; preds = %50 %54 = load i32, ptr %4, align 4, !tbaa !11 br label %112 55: ; preds = %50, %45 %56 = phi ptr [ %51, %50 ], [ %48, %45 ] %57 = call ptr @dn_dev_alloc_ifa() #3 %58 = icmp eq ptr %57, null br i1 %58, label %59, label %62 59: ; preds = %55 %60 = load i32, ptr @ENOBUFS, align 4, !tbaa !11 %61 = sub nsw i32 0, %60 br label %112 62: ; preds = %55 %63 = load i64, ptr @IFA_ADDRESS, align 8, !tbaa !12 %64 = getelementptr inbounds ptr, ptr %10, i64 %63 %65 = load ptr, ptr %64, align 8, !tbaa !14 %66 = icmp eq ptr %65, null %67 = load i64, ptr @IFA_LOCAL, align 8, !tbaa !12 %68 = getelementptr inbounds ptr, ptr %10, i64 %67 %69 = load ptr, ptr %68, align 8, !tbaa !14 br i1 %66, label %70, label %71 70: ; preds = %62 store ptr %69, ptr %64, align 8, !tbaa !14 br label %71 71: ; preds = %62, %70 %72 = call ptr @nla_get_le16(ptr noundef %69) #3 %73 = getelementptr inbounds i8, ptr %57, i64 32 store ptr %72, ptr %73, align 8, !tbaa !20 %74 = load i64, ptr @IFA_ADDRESS, align 8, !tbaa !12 %75 = getelementptr inbounds ptr, ptr %10, i64 %74 %76 = load ptr, ptr %75, align 8, !tbaa !14 %77 = call ptr @nla_get_le16(ptr noundef %76) #3 %78 = getelementptr inbounds i8, ptr %57, i64 24 store ptr %77, ptr %78, align 8, !tbaa !22 %79 = load i64, ptr @IFA_FLAGS, align 8, !tbaa !12 %80 = getelementptr inbounds ptr, ptr %10, i64 %79 %81 = load ptr, ptr %80, align 8, !tbaa !14 %82 = icmp eq ptr %81, null br i1 %82, label %85, label %83 83: ; preds = %71 %84 = call i32 @nla_get_u32(ptr noundef nonnull %81) #3 br label %88 85: ; preds = %71 %86 = getelementptr inbounds i8, ptr %37, i64 4 %87 = load i32, ptr %86, align 4, !tbaa !23 br label %88 88: ; preds = %85, %83 %89 = phi i32 [ %84, %83 ], [ %87, %85 ] %90 = getelementptr inbounds i8, ptr %57, i64 20 store i32 %89, ptr %90, align 4, !tbaa !24 %91 = load i32, ptr %37, align 4, !tbaa !25 %92 = getelementptr inbounds i8, ptr %57, i64 16 store i32 %91, ptr %92, align 8, !tbaa !26 %93 = getelementptr inbounds i8, ptr %57, i64 8 store ptr %56, ptr %93, align 8, !tbaa !27 %94 = load i64, ptr @IFA_LABEL, align 8, !tbaa !12 %95 = getelementptr inbounds ptr, ptr %10, i64 %94 %96 = load ptr, ptr %95, align 8, !tbaa !14 %97 = icmp eq ptr %96, null %98 = load i32, ptr %57, align 8, !tbaa !28 br i1 %97, label %102, label %99 99: ; preds = %88 %100 = load i32, ptr @IFNAMSIZ, align 4, !tbaa !11 %101 = call i32 @nla_strlcpy(i32 noundef %98, ptr noundef nonnull %96, i32 noundef %100) #3 br label %106 102: ; preds = %88 %103 = load i32, ptr %40, align 4, !tbaa !29 %104 = load i32, ptr @IFNAMSIZ, align 4, !tbaa !11 %105 = call i32 @memcpy(i32 noundef %98, i32 noundef %103, i32 noundef %104) #3 br label %106 106: ; preds = %102, %99 %107 = call i32 @dn_dev_insert_ifa(ptr noundef nonnull %56, ptr noundef nonnull %57) #3 store i32 %107, ptr %4, align 4, !tbaa !11 %108 = icmp eq i32 %107, 0 br i1 %108, label %112, label %109 109: ; preds = %106 %110 = call i32 @dn_dev_free_ifa(ptr noundef nonnull %57) #3 %111 = load i32, ptr %4, align 4, !tbaa !11 br label %112 112: ; preds = %106, %109, %23, %59, %53, %42, %33, %20, %14 %113 = phi i32 [ %35, %33 ], [ %44, %42 ], [ %61, %59 ], [ %54, %53 ], [ %22, %20 ], [ %16, %14 ], [ %26, %23 ], [ %111, %109 ], [ 0, %106 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3 ret i32 %113 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @sock_net(i32 noundef) local_unnamed_addr #2 declare i32 @netlink_capable(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @net_eq(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @nlmsg_parse_deprecated(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare ptr @nlmsg_data(ptr noundef) local_unnamed_addr #2 declare ptr @__dev_get_by_index(ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @rtnl_dereference(i32 noundef) local_unnamed_addr #2 declare ptr @dn_dev_create(ptr noundef, ptr noundef) local_unnamed_addr #2 declare ptr @dn_dev_alloc_ifa(...) local_unnamed_addr #2 declare ptr @nla_get_le16(ptr noundef) local_unnamed_addr #2 declare i32 @nla_get_u32(ptr noundef) local_unnamed_addr #2 declare i32 @nla_strlcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @dn_dev_insert_ifa(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @dn_dev_free_ifa(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"sk_buff", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"long", !9, i64 0} !14 = !{!15, !15, i64 0} !15 = !{!"any pointer", !9, i64 0} !16 = !{!17, !8, i64 8} !17 = !{!"ifaddrmsg", !8, i64 0, !8, i64 4, !8, i64 8} !18 = !{!19, !8, i64 4} !19 = !{!"net_device", !8, i64 0, !8, i64 4} !20 = !{!21, !15, i64 32} !21 = !{!"dn_ifaddr", !8, i64 0, !15, i64 8, !8, i64 16, !8, i64 20, !15, i64 24, !15, i64 32} !22 = !{!21, !15, i64 24} !23 = !{!17, !8, i64 4} !24 = !{!21, !8, i64 20} !25 = !{!17, !8, i64 0} !26 = !{!21, !8, i64 16} !27 = !{!21, !15, i64 8} !28 = !{!21, !8, i64 0} !29 = !{!19, !8, i64 0}
linux_net_decnet_extr_dn_dev.c_dn_nl_newaddr
; ModuleID = 'AnghaBench/linux/arch/x86/kvm/extr_emulate.c_stack_mask.c' source_filename = "AnghaBench/linux/arch/x86/kvm/extr_emulate.c_stack_mask.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.desc_struct = type { i32 } %struct.x86_emulate_ctxt = type { i64, ptr } @X86EMUL_MODE_PROT64 = dso_local local_unnamed_addr global i64 0, align 8 @VCPU_SREG_SS = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @stack_mask], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i64 @stack_mask(ptr noundef %0) #0 { %2 = alloca i32, align 4 %3 = alloca %struct.desc_struct, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #2 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #2 %4 = load i64, ptr %0, align 8, !tbaa !5 %5 = load i64, ptr @X86EMUL_MODE_PROT64, align 8, !tbaa !11 %6 = icmp eq i64 %4, %5 br i1 %6, label %18, label %7 7: ; preds = %1 %8 = getelementptr inbounds %struct.x86_emulate_ctxt, ptr %0, i64 0, i32 1 %9 = load ptr, ptr %8, align 8, !tbaa !12 %10 = load ptr, ptr %9, align 8, !tbaa !13 %11 = load i32, ptr @VCPU_SREG_SS, align 4, !tbaa !15 %12 = call i32 %10(ptr noundef nonnull %0, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef null, i32 noundef %11) #2 %13 = load i32, ptr %3, align 4, !tbaa !17 %14 = shl i32 %13, 4 %15 = xor i32 %14, 16 %16 = lshr i32 -1, %15 %17 = zext i32 %16 to i64 br label %18 18: ; preds = %1, %7 %19 = phi i64 [ %17, %7 ], [ -1, %1 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #2 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #2 ret i64 %19 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"x86_emulate_ctxt", !7, i64 0, !10, i64 8} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!7, !7, i64 0} !12 = !{!6, !10, i64 8} !13 = !{!14, !10, i64 0} !14 = !{!"TYPE_2__", !10, i64 0} !15 = !{!16, !16, i64 0} !16 = !{!"int", !8, i64 0} !17 = !{!18, !16, i64 0} !18 = !{!"desc_struct", !16, i64 0}
; ModuleID = 'AnghaBench/linux/arch/x86/kvm/extr_emulate.c_stack_mask.c' source_filename = "AnghaBench/linux/arch/x86/kvm/extr_emulate.c_stack_mask.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.desc_struct = type { i32 } @X86EMUL_MODE_PROT64 = common local_unnamed_addr global i64 0, align 8 @VCPU_SREG_SS = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @stack_mask], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i64 -1, 4294967296) i64 @stack_mask(ptr noundef %0) #0 { %2 = alloca i32, align 4 %3 = alloca %struct.desc_struct, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #2 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #2 %4 = load i64, ptr %0, align 8, !tbaa !6 %5 = load i64, ptr @X86EMUL_MODE_PROT64, align 8, !tbaa !12 %6 = icmp eq i64 %4, %5 br i1 %6, label %18, label %7 7: ; preds = %1 %8 = getelementptr inbounds i8, ptr %0, i64 8 %9 = load ptr, ptr %8, align 8, !tbaa !13 %10 = load ptr, ptr %9, align 8, !tbaa !14 %11 = load i32, ptr @VCPU_SREG_SS, align 4, !tbaa !16 %12 = call i32 %10(ptr noundef nonnull %0, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef null, i32 noundef %11) #2 %13 = load i32, ptr %3, align 4, !tbaa !18 %14 = shl i32 %13, 4 %15 = xor i32 %14, 16 %16 = lshr i32 -1, %15 %17 = zext i32 %16 to i64 br label %18 18: ; preds = %1, %7 %19 = phi i64 [ %17, %7 ], [ -1, %1 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #2 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #2 ret i64 %19 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"x86_emulate_ctxt", !8, i64 0, !11, i64 8} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!8, !8, i64 0} !13 = !{!7, !11, i64 8} !14 = !{!15, !11, i64 0} !15 = !{!"TYPE_2__", !11, i64 0} !16 = !{!17, !17, i64 0} !17 = !{!"int", !9, i64 0} !18 = !{!19, !17, i64 0} !19 = !{!"desc_struct", !17, i64 0}
linux_arch_x86_kvm_extr_emulate.c_stack_mask
; ModuleID = 'AnghaBench/hashcat/deps/secp256k1/src/extr_secp256k1.c_secp256k1_context_randomize.c' source_filename = "AnghaBench/hashcat/deps/secp256k1/src/extr_secp256k1.c_secp256k1_context_randomize.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local noundef i32 @secp256k1_context_randomize(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = icmp ne ptr %0, null %4 = zext i1 %3 to i32 %5 = tail call i32 @VERIFY_CHECK(i32 noundef %4) #2 %6 = tail call i64 @secp256k1_ecmult_gen_context_is_built(ptr noundef %0) #2 %7 = icmp eq i64 %6, 0 br i1 %7, label %10, label %8 8: ; preds = %2 %9 = tail call i32 @secp256k1_ecmult_gen_blind(ptr noundef %0, ptr noundef %1) #2 br label %10 10: ; preds = %8, %2 ret i32 1 } declare i32 @VERIFY_CHECK(i32 noundef) local_unnamed_addr #1 declare i64 @secp256k1_ecmult_gen_context_is_built(ptr noundef) local_unnamed_addr #1 declare i32 @secp256k1_ecmult_gen_blind(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/hashcat/deps/secp256k1/src/extr_secp256k1.c_secp256k1_context_randomize.c' source_filename = "AnghaBench/hashcat/deps/secp256k1/src/extr_secp256k1.c_secp256k1_context_randomize.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define noundef i32 @secp256k1_context_randomize(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = icmp ne ptr %0, null %4 = zext i1 %3 to i32 %5 = tail call i32 @VERIFY_CHECK(i32 noundef %4) #2 %6 = tail call i64 @secp256k1_ecmult_gen_context_is_built(ptr noundef %0) #2 %7 = icmp eq i64 %6, 0 br i1 %7, label %10, label %8 8: ; preds = %2 %9 = tail call i32 @secp256k1_ecmult_gen_blind(ptr noundef %0, ptr noundef %1) #2 br label %10 10: ; preds = %8, %2 ret i32 1 } declare i32 @VERIFY_CHECK(i32 noundef) local_unnamed_addr #1 declare i64 @secp256k1_ecmult_gen_context_is_built(ptr noundef) local_unnamed_addr #1 declare i32 @secp256k1_ecmult_gen_blind(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
hashcat_deps_secp256k1_src_extr_secp256k1.c_secp256k1_context_randomize
; ModuleID = 'AnghaBench/freebsd/cddl/contrib/opensolaris/cmd/zfs/extr_zfs_main.c_munge_args.c' source_filename = "AnghaBench/freebsd/cddl/contrib/opensolaris/cmd/zfs/extr_zfs_main.c_munge_args.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @B_FALSE = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [28 x i8] c"wrong number of parameters\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @munge_args], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal ptr @munge_args(i32 noundef %0, ptr nocapture noundef readonly %1, i64 noundef %2, i64 noundef %3, ptr nocapture noundef writeonly %4) #0 { %6 = icmp ne i64 %2, 0 %7 = sext i32 %0 to i64 %8 = add i64 %3, -1 %9 = icmp eq i64 %8, %7 %10 = and i1 %6, %9 br i1 %10, label %11, label %12 11: ; preds = %5 store ptr null, ptr %4, align 8, !tbaa !5 br label %22 12: ; preds = %5 %13 = icmp eq i64 %7, %3 br i1 %13, label %14, label %18 14: ; preds = %12 %15 = getelementptr ptr, ptr %1, i64 %3 %16 = getelementptr ptr, ptr %15, i64 -2 %17 = load ptr, ptr %16, align 8, !tbaa !5 store ptr %17, ptr %4, align 8, !tbaa !5 br label %22 18: ; preds = %12 %19 = load i32, ptr @B_FALSE, align 4, !tbaa !9 %20 = tail call i32 @gettext(ptr noundef nonnull @.str) #2 %21 = tail call i32 @allow_usage(i64 noundef %2, i32 noundef %19, i32 noundef %20) #2 br label %22 22: ; preds = %14, %18, %11 %23 = phi i64 [ %3, %14 ], [ %7, %18 ], [ %7, %11 ] %24 = getelementptr ptr, ptr %1, i64 %23 %25 = getelementptr ptr, ptr %24, i64 -1 %26 = load ptr, ptr %25, align 8, !tbaa !5 ret ptr %26 } declare i32 @allow_usage(i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @gettext(ptr noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"int", !7, i64 0}
; ModuleID = 'AnghaBench/freebsd/cddl/contrib/opensolaris/cmd/zfs/extr_zfs_main.c_munge_args.c' source_filename = "AnghaBench/freebsd/cddl/contrib/opensolaris/cmd/zfs/extr_zfs_main.c_munge_args.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @B_FALSE = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [28 x i8] c"wrong number of parameters\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @munge_args], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal ptr @munge_args(i32 noundef %0, ptr nocapture noundef readonly %1, i64 noundef %2, i64 noundef %3, ptr nocapture noundef writeonly %4) #0 { %6 = icmp ne i64 %2, 0 %7 = sext i32 %0 to i64 %8 = add i64 %3, -1 %9 = icmp eq i64 %8, %7 %10 = and i1 %6, %9 br i1 %10, label %11, label %12 11: ; preds = %5 store ptr null, ptr %4, align 8, !tbaa !6 br label %22 12: ; preds = %5 %13 = icmp eq i64 %7, %3 br i1 %13, label %14, label %18 14: ; preds = %12 %15 = getelementptr ptr, ptr %1, i64 %3 %16 = getelementptr i8, ptr %15, i64 -16 %17 = load ptr, ptr %16, align 8, !tbaa !6 store ptr %17, ptr %4, align 8, !tbaa !6 br label %22 18: ; preds = %12 %19 = load i32, ptr @B_FALSE, align 4, !tbaa !10 %20 = tail call i32 @gettext(ptr noundef nonnull @.str) #2 %21 = tail call i32 @allow_usage(i64 noundef %2, i32 noundef %19, i32 noundef %20) #2 br label %22 22: ; preds = %14, %18, %11 %23 = getelementptr ptr, ptr %1, i64 %7 %24 = getelementptr i8, ptr %23, i64 -8 %25 = load ptr, ptr %24, align 8, !tbaa !6 ret ptr %25 } declare i32 @allow_usage(i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @gettext(ptr noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0}
freebsd_cddl_contrib_opensolaris_cmd_zfs_extr_zfs_main.c_munge_args
; ModuleID = 'AnghaBench/linux/drivers/net/phy/extr_spi_ks8995.c_ks8995_stop.c' source_filename = "AnghaBench/linux/drivers/net/phy/extr_spi_ks8995.c_ks8995_stop.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @KS8995_REG_ID1 = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ks8995_stop], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @ks8995_stop(ptr noundef %0) #0 { %2 = load i32, ptr @KS8995_REG_ID1, align 4, !tbaa !5 %3 = tail call i32 @ks8995_write_reg(ptr noundef %0, i32 noundef %2, i32 noundef 0) #2 ret i32 %3 } declare i32 @ks8995_write_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/net/phy/extr_spi_ks8995.c_ks8995_stop.c' source_filename = "AnghaBench/linux/drivers/net/phy/extr_spi_ks8995.c_ks8995_stop.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @KS8995_REG_ID1 = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ks8995_stop], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @ks8995_stop(ptr noundef %0) #0 { %2 = load i32, ptr @KS8995_REG_ID1, align 4, !tbaa !6 %3 = tail call i32 @ks8995_write_reg(ptr noundef %0, i32 noundef %2, i32 noundef 0) #2 ret i32 %3 } declare i32 @ks8995_write_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_drivers_net_phy_extr_spi_ks8995.c_ks8995_stop
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_multiq3.c_multiq3_ao_insn_read.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_multiq3.c_multiq3_ao_insn_read.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.comedi_insn = type { i32, i32 } @devpriv = dso_local local_unnamed_addr global ptr null, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @multiq3_ao_insn_read], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @multiq3_ao_insn_read(ptr nocapture readnone %0, ptr nocapture readnone %1, ptr nocapture noundef readonly %2, ptr nocapture noundef writeonly %3) #0 { %5 = getelementptr inbounds %struct.comedi_insn, ptr %2, i64 0, i32 1 %6 = load i32, ptr %5, align 4, !tbaa !5 %7 = tail call i32 @CR_CHAN(i32 noundef %6) #2 %8 = load i32, ptr %2, align 4, !tbaa !10 %9 = icmp sgt i32 %8, 0 br i1 %9, label %10, label %25 10: ; preds = %4 %11 = load ptr, ptr @devpriv, align 8, !tbaa !11 %12 = load ptr, ptr %11, align 8, !tbaa !13 %13 = sext i32 %7 to i64 %14 = getelementptr inbounds i32, ptr %12, i64 %13 %15 = load i32, ptr %14, align 4, !tbaa !15 br label %16 16: ; preds = %10, %16 %17 = phi i64 [ 0, %10 ], [ %19, %16 ] %18 = getelementptr inbounds i32, ptr %3, i64 %17 store i32 %15, ptr %18, align 4, !tbaa !15 %19 = add nuw nsw i64 %17, 1 %20 = load i32, ptr %2, align 4, !tbaa !10 %21 = sext i32 %20 to i64 %22 = icmp slt i64 %19, %21 br i1 %22, label %16, label %23, !llvm.loop !16 23: ; preds = %16 %24 = trunc i64 %19 to i32 br label %25 25: ; preds = %23, %4 %26 = phi i32 [ 0, %4 ], [ %24, %23 ] ret i32 %26 } declare i32 @CR_CHAN(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 4} !6 = !{!"comedi_insn", !7, i64 0, !7, i64 4} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!6, !7, i64 0} !11 = !{!12, !12, i64 0} !12 = !{!"any pointer", !8, i64 0} !13 = !{!14, !12, i64 0} !14 = !{!"TYPE_2__", !12, i64 0} !15 = !{!7, !7, i64 0} !16 = distinct !{!16, !17} !17 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_multiq3.c_multiq3_ao_insn_read.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_multiq3.c_multiq3_ao_insn_read.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @devpriv = common local_unnamed_addr global ptr null, align 8 @llvm.used = appending global [1 x ptr] [ptr @multiq3_ao_insn_read], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @multiq3_ao_insn_read(ptr nocapture readnone %0, ptr nocapture readnone %1, ptr nocapture noundef readonly %2, ptr nocapture noundef writeonly %3) #0 { %5 = getelementptr inbounds i8, ptr %2, i64 4 %6 = load i32, ptr %5, align 4, !tbaa !6 %7 = tail call i32 @CR_CHAN(i32 noundef %6) #2 %8 = load i32, ptr %2, align 4, !tbaa !11 %9 = icmp sgt i32 %8, 0 br i1 %9, label %10, label %25 10: ; preds = %4 %11 = load ptr, ptr @devpriv, align 8, !tbaa !12 %12 = load ptr, ptr %11, align 8, !tbaa !14 %13 = sext i32 %7 to i64 %14 = getelementptr inbounds i32, ptr %12, i64 %13 %15 = load i32, ptr %14, align 4, !tbaa !16 br label %16 16: ; preds = %10, %16 %17 = phi i64 [ 0, %10 ], [ %19, %16 ] %18 = getelementptr inbounds i32, ptr %3, i64 %17 store i32 %15, ptr %18, align 4, !tbaa !16 %19 = add nuw nsw i64 %17, 1 %20 = load i32, ptr %2, align 4, !tbaa !11 %21 = sext i32 %20 to i64 %22 = icmp slt i64 %19, %21 br i1 %22, label %16, label %23, !llvm.loop !17 23: ; preds = %16 %24 = trunc nuw nsw i64 %19 to i32 br label %25 25: ; preds = %23, %4 %26 = phi i32 [ 0, %4 ], [ %24, %23 ] ret i32 %26 } declare i32 @CR_CHAN(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 4} !7 = !{!"comedi_insn", !8, i64 0, !8, i64 4} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!7, !8, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"any pointer", !9, i64 0} !14 = !{!15, !13, i64 0} !15 = !{!"TYPE_2__", !13, i64 0} !16 = !{!8, !8, i64 0} !17 = distinct !{!17, !18} !18 = !{!"llvm.loop.mustprogress"}
fastsocket_kernel_drivers_staging_comedi_drivers_extr_multiq3.c_multiq3_ao_insn_read
; ModuleID = 'AnghaBench/nuklear/demo/glfw_opengl2/extr_....nuklear.h_nk_ttULONG.c' source_filename = "AnghaBench/nuklear/demo/glfw_opengl2/extr_....nuklear.h_nk_ttULONG.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @nk_ttULONG], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable define internal i32 @nk_ttULONG(ptr nocapture noundef readonly %0) #0 { %2 = load i32, ptr %0, align 4, !tbaa !5 %3 = shl i32 %2, 24 %4 = getelementptr inbounds i32, ptr %0, i64 1 %5 = load i32, ptr %4, align 4, !tbaa !5 %6 = shl i32 %5, 16 %7 = add nsw i32 %6, %3 %8 = getelementptr inbounds i32, ptr %0, i64 2 %9 = load i32, ptr %8, align 4, !tbaa !5 %10 = shl i32 %9, 8 %11 = add nsw i32 %7, %10 %12 = getelementptr inbounds i32, ptr %0, i64 3 %13 = load i32, ptr %12, align 4, !tbaa !5 %14 = add nsw i32 %11, %13 ret i32 %14 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/nuklear/demo/glfw_opengl2/extr_....nuklear.h_nk_ttULONG.c' source_filename = "AnghaBench/nuklear/demo/glfw_opengl2/extr_....nuklear.h_nk_ttULONG.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @nk_ttULONG], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) define internal i32 @nk_ttULONG(ptr nocapture noundef readonly %0) #0 { %2 = load i32, ptr %0, align 4, !tbaa !6 %3 = shl i32 %2, 24 %4 = getelementptr inbounds i8, ptr %0, i64 4 %5 = load i32, ptr %4, align 4, !tbaa !6 %6 = shl i32 %5, 16 %7 = add nsw i32 %6, %3 %8 = getelementptr inbounds i8, ptr %0, i64 8 %9 = load i32, ptr %8, align 4, !tbaa !6 %10 = shl i32 %9, 8 %11 = add nsw i32 %7, %10 %12 = getelementptr inbounds i8, ptr %0, i64 12 %13 = load i32, ptr %12, align 4, !tbaa !6 %14 = add nsw i32 %11, %13 ret i32 %14 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
nuklear_demo_glfw_opengl2_extr_....nuklear.h_nk_ttULONG
; ModuleID = 'AnghaBench/freebsd/sbin/nvmecontrol/extr_logpage.c_kv_lookup.c' source_filename = "AnghaBench/freebsd/sbin/nvmecontrol/extr_logpage.c_kv_lookup.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.kv_name = type { i32, ptr } @kv_lookup.bad = internal global [32 x i8] zeroinitializer, align 16 @.str = private unnamed_addr constant [14 x i8] c"Attribute %#x\00", align 1 ; Function Attrs: nounwind uwtable define dso_local ptr @kv_lookup(ptr nocapture noundef readonly %0, i64 noundef %1, i32 noundef %2) local_unnamed_addr #0 { %4 = icmp eq i64 %1, 0 br i1 %4, label %17, label %5 5: ; preds = %3, %13 %6 = phi i64 [ %14, %13 ], [ 0, %3 ] %7 = phi ptr [ %15, %13 ], [ %0, %3 ] %8 = load i32, ptr %7, align 8, !tbaa !5 %9 = icmp eq i32 %8, %2 br i1 %9, label %10, label %13 10: ; preds = %5 %11 = getelementptr inbounds %struct.kv_name, ptr %7, i64 0, i32 1 %12 = load ptr, ptr %11, align 8, !tbaa !11 br label %19 13: ; preds = %5 %14 = add nuw i64 %6, 1 %15 = getelementptr inbounds %struct.kv_name, ptr %7, i64 1 %16 = icmp eq i64 %14, %1 br i1 %16, label %17, label %5, !llvm.loop !12 17: ; preds = %13, %3 %18 = tail call i32 @snprintf(ptr noundef nonnull @kv_lookup.bad, i32 noundef 32, ptr noundef nonnull @.str, i32 noundef %2) #2 br label %19 19: ; preds = %17, %10 %20 = phi ptr [ %12, %10 ], [ @kv_lookup.bad, %17 ] ret ptr %20 } declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"kv_name", !7, i64 0, !10, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!6, !10, i64 8} !12 = distinct !{!12, !13} !13 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/freebsd/sbin/nvmecontrol/extr_logpage.c_kv_lookup.c' source_filename = "AnghaBench/freebsd/sbin/nvmecontrol/extr_logpage.c_kv_lookup.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @kv_lookup.bad = internal global [32 x i8] zeroinitializer, align 1 @.str = private unnamed_addr constant [14 x i8] c"Attribute %#x\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define ptr @kv_lookup(ptr nocapture noundef readonly %0, i64 noundef %1, i32 noundef %2) local_unnamed_addr #0 { %4 = icmp eq i64 %1, 0 br i1 %4, label %17, label %5 5: ; preds = %3, %13 %6 = phi i64 [ %14, %13 ], [ 0, %3 ] %7 = phi ptr [ %15, %13 ], [ %0, %3 ] %8 = load i32, ptr %7, align 8, !tbaa !6 %9 = icmp eq i32 %8, %2 br i1 %9, label %10, label %13 10: ; preds = %5 %11 = getelementptr inbounds i8, ptr %7, i64 8 %12 = load ptr, ptr %11, align 8, !tbaa !12 br label %19 13: ; preds = %5 %14 = add nuw i64 %6, 1 %15 = getelementptr inbounds i8, ptr %7, i64 16 %16 = icmp eq i64 %14, %1 br i1 %16, label %17, label %5, !llvm.loop !13 17: ; preds = %13, %3 %18 = tail call i32 @snprintf(ptr noundef nonnull @kv_lookup.bad, i32 noundef 32, ptr noundef nonnull @.str, i32 noundef %2) #2 br label %19 19: ; preds = %17, %10 %20 = phi ptr [ %12, %10 ], [ @kv_lookup.bad, %17 ] ret ptr %20 } declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"kv_name", !8, i64 0, !11, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!7, !11, i64 8} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"}
freebsd_sbin_nvmecontrol_extr_logpage.c_kv_lookup
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/d3dcompiler_43/extr_asm.c_ps_1_3_test.c' source_filename = "AnghaBench/reactos/modules/rostests/winetests/d3dcompiler_43/extr_asm.c_ps_1_3_test.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.shader_test = type { ptr, %struct.TYPE_2__ } %struct.TYPE_2__ = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } @.str = private unnamed_addr constant [19 x i8] c"ps_1_3\0Amov r0, r1\0A\00", align 1 @.str.1 = private unnamed_addr constant [23 x i8] c"ps_1_3\0Aadd r0, r1, r0\0A\00", align 1 @.str.2 = private unnamed_addr constant [19 x i8] c"ps_1_3\0Amov r0, v0\0A\00", align 1 @.str.3 = private unnamed_addr constant [19 x i8] c"ps_1_3\0Amov r0, v1\0A\00", align 1 @.str.4 = private unnamed_addr constant [15 x i8] c"ps_1_3\0Atex t0\0A\00", align 1 @.str.5 = private unnamed_addr constant [32 x i8] c"ps_1_3\0Atex t0\0Atexreg2ar t1, t0\0A\00", align 1 @.str.6 = private unnamed_addr constant [32 x i8] c"ps_1_3\0Atex t0\0Atexreg2gb t1, t0\0A\00", align 1 @.str.7 = private unnamed_addr constant [33 x i8] c"ps_1_3\0Atex t0\0Atexreg2rgb t1, t0\0A\00", align 1 @.str.8 = private unnamed_addr constant [27 x i8] c"ps_1_3\0Acnd r0, r1, r0, v0\0A\00", align 1 @.str.9 = private unnamed_addr constant [27 x i8] c"ps_1_3\0Acmp r0, r1, r0, v0\0A\00", align 1 @.str.10 = private unnamed_addr constant [19 x i8] c"ps_1_3\0Atexkill t0\0A\00", align 1 @.str.11 = private unnamed_addr constant [51 x i8] c"ps_1_3\0Atex t0\0Atexm3x2pad t1, t0\0Atexm3x2tex t2, t0\0A\00", align 1 @.str.12 = private unnamed_addr constant [53 x i8] c"ps_1_3\0Atex t0\0Atexm3x2pad t1, t0\0Atexm3x2depth t2, t0\0A\00", align 1 @.str.13 = private unnamed_addr constant [29 x i8] c"ps_1_3\0Atex t0\0Atexbem t1, t0\0A\00", align 1 @.str.14 = private unnamed_addr constant [30 x i8] c"ps_1_3\0Atex t0\0Atexbeml t1, t0\0A\00", align 1 @.str.15 = private unnamed_addr constant [32 x i8] c"ps_1_3\0Atex t0\0Atexdp3tex t1, t0\0A\00", align 1 @.str.16 = private unnamed_addr constant [29 x i8] c"ps_1_3\0Atex t0\0Atexdp3 t1, t0\0A\00", align 1 @.str.17 = private unnamed_addr constant [69 x i8] c"ps_1_3\0Atex t0\0Atexm3x3pad t1, t0\0Atexm3x3pad t2, t0\0Atexm3x3tex t3, t0\0A\00", align 1 @.str.18 = private unnamed_addr constant [66 x i8] c"ps_1_3\0Atex t0\0Atexm3x3pad t1, t0\0Atexm3x3pad t2, t0\0Atexm3x3 t3, t0\0A\00", align 1 @.str.19 = private unnamed_addr constant [74 x i8] c"ps_1_3\0Atex t0\0Atexm3x3pad t1, t0\0Atexm3x3pad t2, t0\0Atexm3x3spec t3, t0, c0\0A\00", align 1 @.str.20 = private unnamed_addr constant [71 x i8] c"ps_1_3\0Atex t0\0Atexm3x3pad t1, t0\0Atexm3x3pad t2, t0\0Atexm3x3vspec t3, t0\0A\00", align 1 @.str.21 = private unnamed_addr constant [20 x i8] c"ps_1_3\0Atexcoord t0\0A\00", align 1 @.str.22 = private unnamed_addr constant [30 x i8] c"ps_1_3\0Amov_x2_sat r0, 1 - r1\0A\00", align 1 @.str.23 = private unnamed_addr constant [23 x i8] c"ps_1_3\0Amov_d8 r0, -r1\0A\00", align 1 @.str.24 = private unnamed_addr constant [27 x i8] c"ps_1_3\0Amov_sat r0, r1_bx2\0A\00", align 1 @.str.25 = private unnamed_addr constant [28 x i8] c"ps_1_3\0Amov_sat r0, r1_bias\0A\00", align 1 @.str.26 = private unnamed_addr constant [29 x i8] c"ps_1_3\0Amov_sat r0, -r1_bias\0A\00", align 1 @.str.27 = private unnamed_addr constant [28 x i8] c"ps_1_3\0Amov_sat r0, -r1_bx2\0A\00", align 1 @.str.28 = private unnamed_addr constant [27 x i8] c"ps_1_3\0Amov_sat r0, -r1_x2\0A\00", align 1 @.str.29 = private unnamed_addr constant [35 x i8] c"ps_1_3\0Amov_x4_sat r0.a, -r1_bx2.a\0A\00", align 1 @.str.30 = private unnamed_addr constant [23 x i8] c"ps_1_3\0Atexcoord_x2 t0\0A\00", align 1 @.str.31 = private unnamed_addr constant [18 x i8] c"ps_1_3\0Atex_x2 t0\0A\00", align 1 @.str.32 = private unnamed_addr constant [28 x i8] c"ps_1_3\0Atexreg2ar_x4 t0, t1\0A\00", align 1 @.str.33 = private unnamed_addr constant [25 x i8] c"ps_1_3\0Atexbem_d4 t1, t0\0A\00", align 1 @.str.34 = private unnamed_addr constant [78 x i8] c"ps_1_3\0Atex t0\0Atexm3x3pad_x2 t1, t0\0Atexm3x3pad_x2 t2, t0\0Atexm3x3tex_x2 t3, t0\0A\00", align 1 @.str.35 = private unnamed_addr constant [35 x i8] c"ps.1.3\0Atex t0\0Atexdp3tex_x8 t1, t0\0A\00", align 1 @__const.ps_1_3_test.tests = private unnamed_addr constant [36 x %struct.shader_test] [%struct.shader_test { ptr @.str, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2146500608, i32 -2132541439, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.1, %struct.TYPE_2__ { i32 -65277, i32 2, i32 -2146500608, i32 -2132541439, i32 -2132541440, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.2, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2146500608, i32 -1864105984, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.3, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2146500608, i32 -1864105983, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.4, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.5, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 69, i32 -1341194239, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.6, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 70, i32 -1341194239, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.7, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 82, i32 -1341194239, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.8, %struct.TYPE_2__ { i32 -65277, i32 80, i32 -2146500608, i32 -2132541439, i32 -2132541440, i32 -1864105984, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.9, %struct.TYPE_2__ { i32 -65277, i32 88, i32 -2146500608, i32 -2132541439, i32 -2132541440, i32 -1864105984, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.10, %struct.TYPE_2__ { i32 -65277, i32 65, i32 -1341194240, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.11, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 71, i32 -1341194239, i32 -1327235072, i32 72, i32 -1341194238, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.12, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 71, i32 -1341194239, i32 -1327235072, i32 84, i32 -1341194238, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.13, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 67, i32 -1341194239, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.14, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 68, i32 -1341194239, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.15, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 83, i32 -1341194239, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.16, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 85, i32 -1341194239, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.17, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 73, i32 -1341194239, i32 -1327235072, i32 73, i32 -1341194238, i32 -1327235072, i32 74, i32 -1341194237, i32 -1327235072, i32 65535, i32 0 } }, %struct.shader_test { ptr @.str.18, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 73, i32 -1341194239, i32 -1327235072, i32 73, i32 -1341194238, i32 -1327235072, i32 86, i32 -1341194237, i32 -1327235072, i32 65535, i32 0 } }, %struct.shader_test { ptr @.str.19, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 73, i32 -1341194239, i32 -1327235072, i32 73, i32 -1341194238, i32 -1327235072, i32 76, i32 -1341194237, i32 -1327235072, i32 -1595670528, i32 65535 } }, %struct.shader_test { ptr @.str.20, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 73, i32 -1341194239, i32 -1327235072, i32 73, i32 -1341194238, i32 -1327235072, i32 77, i32 -1341194237, i32 -1327235072, i32 65535, i32 0 } }, %struct.shader_test { ptr @.str.21, %struct.TYPE_2__ { i32 -65277, i32 64, i32 -1341194240, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.22, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2128674816, i32 -2031878143, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.23, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -1928396800, i32 -2115764223, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.24, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2145452032, i32 -2065432575, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.25, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2145452032, i32 -2098987007, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.26, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2145452032, i32 -2082209791, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.27, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2145452032, i32 -2048655359, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.28, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2145452032, i32 -1998323711, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.29, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2112356352, i32 -2046885887, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.30, %struct.TYPE_2__ { i32 -65277, i32 64, i32 -1324417024, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.31, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1324417024, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.32, %struct.TYPE_2__ { i32 -65277, i32 69, i32 -1307639808, i32 -1327235071, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.33, %struct.TYPE_2__ { i32 -65277, i32 67, i32 -1106313215, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.34, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 73, i32 -1324417023, i32 -1327235072, i32 73, i32 -1324417022, i32 -1327235072, i32 74, i32 -1324417021, i32 -1327235072, i32 65535, i32 0 } }, %struct.shader_test { ptr @.str.35, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 83, i32 -1290862591, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }], align 16 @.str.36 = private unnamed_addr constant [7 x i8] c"ps_1_3\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @ps_1_3_test], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @ps_1_3_test() #0 { %1 = alloca [36 x %struct.shader_test], align 16 call void @llvm.lifetime.start.p0(i64 2304, ptr nonnull %1) #4 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(2304) %1, ptr noundef nonnull align 16 dereferenceable(2304) @__const.ps_1_3_test.tests, i64 2304, i1 false) %2 = call i32 @ARRAY_SIZE(ptr noundef nonnull %1) #4 %3 = call i32 @exec_tests(ptr noundef nonnull @.str.36, ptr noundef nonnull %1, i32 noundef %2) #4 call void @llvm.lifetime.end.p0(i64 2304, ptr nonnull %1) #4 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2 declare i32 @exec_tests(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3 declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #3 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) } attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #4 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/d3dcompiler_43/extr_asm.c_ps_1_3_test.c' source_filename = "AnghaBench/reactos/modules/rostests/winetests/d3dcompiler_43/extr_asm.c_ps_1_3_test.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.shader_test = type { ptr, %struct.TYPE_2__ } %struct.TYPE_2__ = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } @.str = private unnamed_addr constant [19 x i8] c"ps_1_3\0Amov r0, r1\0A\00", align 1 @.str.1 = private unnamed_addr constant [23 x i8] c"ps_1_3\0Aadd r0, r1, r0\0A\00", align 1 @.str.2 = private unnamed_addr constant [19 x i8] c"ps_1_3\0Amov r0, v0\0A\00", align 1 @.str.3 = private unnamed_addr constant [19 x i8] c"ps_1_3\0Amov r0, v1\0A\00", align 1 @.str.4 = private unnamed_addr constant [15 x i8] c"ps_1_3\0Atex t0\0A\00", align 1 @.str.5 = private unnamed_addr constant [32 x i8] c"ps_1_3\0Atex t0\0Atexreg2ar t1, t0\0A\00", align 1 @.str.6 = private unnamed_addr constant [32 x i8] c"ps_1_3\0Atex t0\0Atexreg2gb t1, t0\0A\00", align 1 @.str.7 = private unnamed_addr constant [33 x i8] c"ps_1_3\0Atex t0\0Atexreg2rgb t1, t0\0A\00", align 1 @.str.8 = private unnamed_addr constant [27 x i8] c"ps_1_3\0Acnd r0, r1, r0, v0\0A\00", align 1 @.str.9 = private unnamed_addr constant [27 x i8] c"ps_1_3\0Acmp r0, r1, r0, v0\0A\00", align 1 @.str.10 = private unnamed_addr constant [19 x i8] c"ps_1_3\0Atexkill t0\0A\00", align 1 @.str.11 = private unnamed_addr constant [51 x i8] c"ps_1_3\0Atex t0\0Atexm3x2pad t1, t0\0Atexm3x2tex t2, t0\0A\00", align 1 @.str.12 = private unnamed_addr constant [53 x i8] c"ps_1_3\0Atex t0\0Atexm3x2pad t1, t0\0Atexm3x2depth t2, t0\0A\00", align 1 @.str.13 = private unnamed_addr constant [29 x i8] c"ps_1_3\0Atex t0\0Atexbem t1, t0\0A\00", align 1 @.str.14 = private unnamed_addr constant [30 x i8] c"ps_1_3\0Atex t0\0Atexbeml t1, t0\0A\00", align 1 @.str.15 = private unnamed_addr constant [32 x i8] c"ps_1_3\0Atex t0\0Atexdp3tex t1, t0\0A\00", align 1 @.str.16 = private unnamed_addr constant [29 x i8] c"ps_1_3\0Atex t0\0Atexdp3 t1, t0\0A\00", align 1 @.str.17 = private unnamed_addr constant [69 x i8] c"ps_1_3\0Atex t0\0Atexm3x3pad t1, t0\0Atexm3x3pad t2, t0\0Atexm3x3tex t3, t0\0A\00", align 1 @.str.18 = private unnamed_addr constant [66 x i8] c"ps_1_3\0Atex t0\0Atexm3x3pad t1, t0\0Atexm3x3pad t2, t0\0Atexm3x3 t3, t0\0A\00", align 1 @.str.19 = private unnamed_addr constant [74 x i8] c"ps_1_3\0Atex t0\0Atexm3x3pad t1, t0\0Atexm3x3pad t2, t0\0Atexm3x3spec t3, t0, c0\0A\00", align 1 @.str.20 = private unnamed_addr constant [71 x i8] c"ps_1_3\0Atex t0\0Atexm3x3pad t1, t0\0Atexm3x3pad t2, t0\0Atexm3x3vspec t3, t0\0A\00", align 1 @.str.21 = private unnamed_addr constant [20 x i8] c"ps_1_3\0Atexcoord t0\0A\00", align 1 @.str.22 = private unnamed_addr constant [30 x i8] c"ps_1_3\0Amov_x2_sat r0, 1 - r1\0A\00", align 1 @.str.23 = private unnamed_addr constant [23 x i8] c"ps_1_3\0Amov_d8 r0, -r1\0A\00", align 1 @.str.24 = private unnamed_addr constant [27 x i8] c"ps_1_3\0Amov_sat r0, r1_bx2\0A\00", align 1 @.str.25 = private unnamed_addr constant [28 x i8] c"ps_1_3\0Amov_sat r0, r1_bias\0A\00", align 1 @.str.26 = private unnamed_addr constant [29 x i8] c"ps_1_3\0Amov_sat r0, -r1_bias\0A\00", align 1 @.str.27 = private unnamed_addr constant [28 x i8] c"ps_1_3\0Amov_sat r0, -r1_bx2\0A\00", align 1 @.str.28 = private unnamed_addr constant [27 x i8] c"ps_1_3\0Amov_sat r0, -r1_x2\0A\00", align 1 @.str.29 = private unnamed_addr constant [35 x i8] c"ps_1_3\0Amov_x4_sat r0.a, -r1_bx2.a\0A\00", align 1 @.str.30 = private unnamed_addr constant [23 x i8] c"ps_1_3\0Atexcoord_x2 t0\0A\00", align 1 @.str.31 = private unnamed_addr constant [18 x i8] c"ps_1_3\0Atex_x2 t0\0A\00", align 1 @.str.32 = private unnamed_addr constant [28 x i8] c"ps_1_3\0Atexreg2ar_x4 t0, t1\0A\00", align 1 @.str.33 = private unnamed_addr constant [25 x i8] c"ps_1_3\0Atexbem_d4 t1, t0\0A\00", align 1 @.str.34 = private unnamed_addr constant [78 x i8] c"ps_1_3\0Atex t0\0Atexm3x3pad_x2 t1, t0\0Atexm3x3pad_x2 t2, t0\0Atexm3x3tex_x2 t3, t0\0A\00", align 1 @.str.35 = private unnamed_addr constant [35 x i8] c"ps.1.3\0Atex t0\0Atexdp3tex_x8 t1, t0\0A\00", align 1 @__const.ps_1_3_test.tests = private unnamed_addr constant [36 x %struct.shader_test] [%struct.shader_test { ptr @.str, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2146500608, i32 -2132541439, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.1, %struct.TYPE_2__ { i32 -65277, i32 2, i32 -2146500608, i32 -2132541439, i32 -2132541440, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.2, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2146500608, i32 -1864105984, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.3, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2146500608, i32 -1864105983, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.4, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.5, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 69, i32 -1341194239, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.6, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 70, i32 -1341194239, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.7, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 82, i32 -1341194239, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.8, %struct.TYPE_2__ { i32 -65277, i32 80, i32 -2146500608, i32 -2132541439, i32 -2132541440, i32 -1864105984, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.9, %struct.TYPE_2__ { i32 -65277, i32 88, i32 -2146500608, i32 -2132541439, i32 -2132541440, i32 -1864105984, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.10, %struct.TYPE_2__ { i32 -65277, i32 65, i32 -1341194240, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.11, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 71, i32 -1341194239, i32 -1327235072, i32 72, i32 -1341194238, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.12, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 71, i32 -1341194239, i32 -1327235072, i32 84, i32 -1341194238, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.13, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 67, i32 -1341194239, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.14, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 68, i32 -1341194239, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.15, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 83, i32 -1341194239, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.16, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 85, i32 -1341194239, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.17, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 73, i32 -1341194239, i32 -1327235072, i32 73, i32 -1341194238, i32 -1327235072, i32 74, i32 -1341194237, i32 -1327235072, i32 65535, i32 0 } }, %struct.shader_test { ptr @.str.18, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 73, i32 -1341194239, i32 -1327235072, i32 73, i32 -1341194238, i32 -1327235072, i32 86, i32 -1341194237, i32 -1327235072, i32 65535, i32 0 } }, %struct.shader_test { ptr @.str.19, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 73, i32 -1341194239, i32 -1327235072, i32 73, i32 -1341194238, i32 -1327235072, i32 76, i32 -1341194237, i32 -1327235072, i32 -1595670528, i32 65535 } }, %struct.shader_test { ptr @.str.20, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 73, i32 -1341194239, i32 -1327235072, i32 73, i32 -1341194238, i32 -1327235072, i32 77, i32 -1341194237, i32 -1327235072, i32 65535, i32 0 } }, %struct.shader_test { ptr @.str.21, %struct.TYPE_2__ { i32 -65277, i32 64, i32 -1341194240, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.22, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2128674816, i32 -2031878143, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.23, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -1928396800, i32 -2115764223, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.24, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2145452032, i32 -2065432575, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.25, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2145452032, i32 -2098987007, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.26, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2145452032, i32 -2082209791, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.27, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2145452032, i32 -2048655359, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.28, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2145452032, i32 -1998323711, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.29, %struct.TYPE_2__ { i32 -65277, i32 1, i32 -2112356352, i32 -2046885887, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.30, %struct.TYPE_2__ { i32 -65277, i32 64, i32 -1324417024, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.31, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1324417024, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.32, %struct.TYPE_2__ { i32 -65277, i32 69, i32 -1307639808, i32 -1327235071, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.33, %struct.TYPE_2__ { i32 -65277, i32 67, i32 -1106313215, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }, %struct.shader_test { ptr @.str.34, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 73, i32 -1324417023, i32 -1327235072, i32 73, i32 -1324417022, i32 -1327235072, i32 74, i32 -1324417021, i32 -1327235072, i32 65535, i32 0 } }, %struct.shader_test { ptr @.str.35, %struct.TYPE_2__ { i32 -65277, i32 66, i32 -1341194240, i32 83, i32 -1290862591, i32 -1327235072, i32 65535, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0, i32 0 } }], align 8 @.str.36 = private unnamed_addr constant [7 x i8] c"ps_1_3\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @ps_1_3_test], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @ps_1_3_test() #0 { %1 = alloca [36 x %struct.shader_test], align 8 call void @llvm.lifetime.start.p0(i64 2304, ptr nonnull %1) #4 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(2304) %1, ptr noundef nonnull align 8 dereferenceable(2304) @__const.ps_1_3_test.tests, i64 2304, i1 false) %2 = call i32 @ARRAY_SIZE(ptr noundef nonnull %1) #4 %3 = call i32 @exec_tests(ptr noundef nonnull @.str.36, ptr noundef nonnull %1, i32 noundef %2) #4 call void @llvm.lifetime.end.p0(i64 2304, ptr nonnull %1) #4 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2 declare i32 @exec_tests(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #3 declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #3 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) } attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #4 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
reactos_modules_rostests_winetests_d3dcompiler_43_extr_asm.c_ps_1_3_test
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_g723_1.c_ff_g723_1_scale_vector.c' source_filename = "AnghaBench/FFmpeg/libavcodec/extr_g723_1.c_ff_g723_1_scale_vector.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local i32 @ff_g723_1_scale_vector(ptr nocapture noundef writeonly %0, ptr nocapture noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 { %4 = ptrtoint ptr %1 to i64 %5 = ptrtoint ptr %0 to i64 %6 = icmp sgt i32 %2, 0 br i1 %6, label %7, label %18 7: ; preds = %3 %8 = zext nneg i32 %2 to i64 br label %9 9: ; preds = %7, %9 %10 = phi i64 [ 0, %7 ], [ %16, %9 ] %11 = phi i32 [ 0, %7 ], [ %15, %9 ] %12 = getelementptr inbounds i32, ptr %1, i64 %10 %13 = load i32, ptr %12, align 4, !tbaa !5 %14 = tail call i32 @FFABS(i32 noundef %13) #2 %15 = or i32 %14, %11 %16 = add nuw nsw i64 %10, 1 %17 = icmp eq i64 %16, %8 br i1 %17, label %18, label %9, !llvm.loop !9 18: ; preds = %9, %3 %19 = phi i32 [ 0, %3 ], [ %15, %9 ] %20 = tail call i32 @av_log2_16bit(i32 noundef %19) #2 %21 = sub nsw i32 14, %20 %22 = tail call i32 @FFMAX(i32 noundef %21, i32 noundef 0) #2 br i1 %6, label %23, label %95 23: ; preds = %18 %24 = zext nneg i32 %2 to i64 %25 = icmp ult i32 %2, 8 %26 = sub i64 %5, %4 %27 = icmp ult i64 %26, 32 %28 = or i1 %25, %27 br i1 %28, label %49, label %29 29: ; preds = %23 %30 = and i64 %24, 2147483640 %31 = insertelement <4 x i32> poison, i32 %22, i64 0 %32 = shufflevector <4 x i32> %31, <4 x i32> poison, <4 x i32> zeroinitializer br label %33 33: ; preds = %33, %29 %34 = phi i64 [ 0, %29 ], [ %45, %33 ] %35 = getelementptr inbounds i32, ptr %1, i64 %34 %36 = getelementptr inbounds i32, ptr %35, i64 4 %37 = load <4 x i32>, ptr %35, align 4, !tbaa !5 %38 = load <4 x i32>, ptr %36, align 4, !tbaa !5 %39 = shl <4 x i32> %37, %32 %40 = shl <4 x i32> %38, %32 %41 = ashr <4 x i32> %39, <i32 3, i32 3, i32 3, i32 3> %42 = ashr <4 x i32> %40, <i32 3, i32 3, i32 3, i32 3> %43 = getelementptr inbounds i32, ptr %0, i64 %34 %44 = getelementptr inbounds i32, ptr %43, i64 4 store <4 x i32> %41, ptr %43, align 4, !tbaa !5 store <4 x i32> %42, ptr %44, align 4, !tbaa !5 %45 = add nuw i64 %34, 8 %46 = icmp eq i64 %45, %30 br i1 %46, label %47, label %33, !llvm.loop !11 47: ; preds = %33 %48 = icmp eq i64 %30, %24 br i1 %48, label %95, label %49 49: ; preds = %23, %47 %50 = phi i64 [ 0, %23 ], [ %30, %47 ] %51 = and i64 %24, 3 %52 = icmp eq i64 %51, 0 br i1 %52, label %64, label %53 53: ; preds = %49, %53 %54 = phi i64 [ %61, %53 ], [ %50, %49 ] %55 = phi i64 [ %62, %53 ], [ 0, %49 ] %56 = getelementptr inbounds i32, ptr %1, i64 %54 %57 = load i32, ptr %56, align 4, !tbaa !5 %58 = shl i32 %57, %22 %59 = ashr i32 %58, 3 %60 = getelementptr inbounds i32, ptr %0, i64 %54 store i32 %59, ptr %60, align 4, !tbaa !5 %61 = add nuw nsw i64 %54, 1 %62 = add i64 %55, 1 %63 = icmp eq i64 %62, %51 br i1 %63, label %64, label %53, !llvm.loop !14 64: ; preds = %53, %49 %65 = phi i64 [ %50, %49 ], [ %61, %53 ] %66 = sub nsw i64 %50, %24 %67 = icmp ugt i64 %66, -4 br i1 %67, label %95, label %68 68: ; preds = %64, %68 %69 = phi i64 [ %93, %68 ], [ %65, %64 ] %70 = getelementptr inbounds i32, ptr %1, i64 %69 %71 = load i32, ptr %70, align 4, !tbaa !5 %72 = shl i32 %71, %22 %73 = ashr i32 %72, 3 %74 = getelementptr inbounds i32, ptr %0, i64 %69 store i32 %73, ptr %74, align 4, !tbaa !5 %75 = add nuw nsw i64 %69, 1 %76 = getelementptr inbounds i32, ptr %1, i64 %75 %77 = load i32, ptr %76, align 4, !tbaa !5 %78 = shl i32 %77, %22 %79 = ashr i32 %78, 3 %80 = getelementptr inbounds i32, ptr %0, i64 %75 store i32 %79, ptr %80, align 4, !tbaa !5 %81 = add nuw nsw i64 %69, 2 %82 = getelementptr inbounds i32, ptr %1, i64 %81 %83 = load i32, ptr %82, align 4, !tbaa !5 %84 = shl i32 %83, %22 %85 = ashr i32 %84, 3 %86 = getelementptr inbounds i32, ptr %0, i64 %81 store i32 %85, ptr %86, align 4, !tbaa !5 %87 = add nuw nsw i64 %69, 3 %88 = getelementptr inbounds i32, ptr %1, i64 %87 %89 = load i32, ptr %88, align 4, !tbaa !5 %90 = shl i32 %89, %22 %91 = ashr i32 %90, 3 %92 = getelementptr inbounds i32, ptr %0, i64 %87 store i32 %91, ptr %92, align 4, !tbaa !5 %93 = add nuw nsw i64 %69, 4 %94 = icmp eq i64 %93, %24 br i1 %94, label %95, label %68, !llvm.loop !16 95: ; preds = %64, %68, %47, %18 %96 = add nsw i32 %22, -3 ret i32 %96 } declare i32 @FFABS(i32 noundef) local_unnamed_addr #1 declare i32 @av_log2_16bit(i32 noundef) local_unnamed_addr #1 declare i32 @FFMAX(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = distinct !{!9, !10} !10 = !{!"llvm.loop.mustprogress"} !11 = distinct !{!11, !10, !12, !13} !12 = !{!"llvm.loop.isvectorized", i32 1} !13 = !{!"llvm.loop.unroll.runtime.disable"} !14 = distinct !{!14, !15} !15 = !{!"llvm.loop.unroll.disable"} !16 = distinct !{!16, !10, !12}
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_g723_1.c_ff_g723_1_scale_vector.c' source_filename = "AnghaBench/FFmpeg/libavcodec/extr_g723_1.c_ff_g723_1_scale_vector.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define range(i32 -2147483648, 2147483645) i32 @ff_g723_1_scale_vector(ptr nocapture noundef writeonly %0, ptr nocapture noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 { %4 = ptrtoint ptr %1 to i64 %5 = ptrtoint ptr %0 to i64 %6 = icmp sgt i32 %2, 0 br i1 %6, label %7, label %18 7: ; preds = %3 %8 = zext nneg i32 %2 to i64 br label %9 9: ; preds = %7, %9 %10 = phi i64 [ 0, %7 ], [ %16, %9 ] %11 = phi i32 [ 0, %7 ], [ %15, %9 ] %12 = getelementptr inbounds i32, ptr %1, i64 %10 %13 = load i32, ptr %12, align 4, !tbaa !6 %14 = tail call i32 @FFABS(i32 noundef %13) #2 %15 = or i32 %14, %11 %16 = add nuw nsw i64 %10, 1 %17 = icmp eq i64 %16, %8 br i1 %17, label %18, label %9, !llvm.loop !10 18: ; preds = %9, %3 %19 = phi i32 [ 0, %3 ], [ %15, %9 ] %20 = tail call i32 @av_log2_16bit(i32 noundef %19) #2 %21 = sub nsw i32 14, %20 %22 = tail call i32 @FFMAX(i32 noundef %21, i32 noundef 0) #2 br i1 %6, label %23, label %70 23: ; preds = %18 %24 = zext nneg i32 %2 to i64 %25 = icmp ult i32 %2, 16 %26 = sub i64 %5, %4 %27 = icmp ult i64 %26, 64 %28 = or i1 %25, %27 br i1 %28, label %59, label %29 29: ; preds = %23 %30 = and i64 %24, 2147483632 %31 = insertelement <4 x i32> poison, i32 %22, i64 0 %32 = shufflevector <4 x i32> %31, <4 x i32> poison, <4 x i32> zeroinitializer br label %33 33: ; preds = %33, %29 %34 = phi i64 [ 0, %29 ], [ %55, %33 ] %35 = getelementptr inbounds i32, ptr %1, i64 %34 %36 = getelementptr inbounds i8, ptr %35, i64 16 %37 = getelementptr inbounds i8, ptr %35, i64 32 %38 = getelementptr inbounds i8, ptr %35, i64 48 %39 = load <4 x i32>, ptr %35, align 4, !tbaa !6 %40 = load <4 x i32>, ptr %36, align 4, !tbaa !6 %41 = load <4 x i32>, ptr %37, align 4, !tbaa !6 %42 = load <4 x i32>, ptr %38, align 4, !tbaa !6 %43 = shl <4 x i32> %39, %32 %44 = shl <4 x i32> %40, %32 %45 = shl <4 x i32> %41, %32 %46 = shl <4 x i32> %42, %32 %47 = ashr <4 x i32> %43, <i32 3, i32 3, i32 3, i32 3> %48 = ashr <4 x i32> %44, <i32 3, i32 3, i32 3, i32 3> %49 = ashr <4 x i32> %45, <i32 3, i32 3, i32 3, i32 3> %50 = ashr <4 x i32> %46, <i32 3, i32 3, i32 3, i32 3> %51 = getelementptr inbounds i32, ptr %0, i64 %34 %52 = getelementptr inbounds i8, ptr %51, i64 16 %53 = getelementptr inbounds i8, ptr %51, i64 32 %54 = getelementptr inbounds i8, ptr %51, i64 48 store <4 x i32> %47, ptr %51, align 4, !tbaa !6 store <4 x i32> %48, ptr %52, align 4, !tbaa !6 store <4 x i32> %49, ptr %53, align 4, !tbaa !6 store <4 x i32> %50, ptr %54, align 4, !tbaa !6 %55 = add nuw i64 %34, 16 %56 = icmp eq i64 %55, %30 br i1 %56, label %57, label %33, !llvm.loop !12 57: ; preds = %33 %58 = icmp eq i64 %30, %24 br i1 %58, label %70, label %59 59: ; preds = %57, %23 %60 = phi i64 [ 0, %23 ], [ %30, %57 ] br label %61 61: ; preds = %59, %61 %62 = phi i64 [ %68, %61 ], [ %60, %59 ] %63 = getelementptr inbounds i32, ptr %1, i64 %62 %64 = load i32, ptr %63, align 4, !tbaa !6 %65 = shl i32 %64, %22 %66 = ashr i32 %65, 3 %67 = getelementptr inbounds i32, ptr %0, i64 %62 store i32 %66, ptr %67, align 4, !tbaa !6 %68 = add nuw nsw i64 %62, 1 %69 = icmp eq i64 %68, %24 br i1 %69, label %70, label %61, !llvm.loop !15 70: ; preds = %61, %57, %18 %71 = add nsw i32 %22, -3 ret i32 %71 } declare i32 @FFABS(i32 noundef) local_unnamed_addr #1 declare i32 @av_log2_16bit(i32 noundef) local_unnamed_addr #1 declare i32 @FFMAX(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = distinct !{!10, !11} !11 = !{!"llvm.loop.mustprogress"} !12 = distinct !{!12, !11, !13, !14} !13 = !{!"llvm.loop.isvectorized", i32 1} !14 = !{!"llvm.loop.unroll.runtime.disable"} !15 = distinct !{!15, !11, !13}
FFmpeg_libavcodec_extr_g723_1.c_ff_g723_1_scale_vector
; ModuleID = 'AnghaBench/sumatrapdf/mupdf/platform/gl/extr_gl-main.c_get_accelerator_filename.c' source_filename = "AnghaBench/sumatrapdf/mupdf/platform/gl/extr_gl-main.c_get_accelerator_filename.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @PATH_MAX = dso_local local_unnamed_addr global i32 0, align 4 @filename = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @get_accelerator_filename], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @get_accelerator_filename(ptr noundef %0, i64 noundef %1) #0 { %3 = load i32, ptr @PATH_MAX, align 4, !tbaa !5 %4 = zext i32 %3 to i64 %5 = alloca i8, i64 %4, align 16 %6 = load i32, ptr @filename, align 4, !tbaa !5 %7 = call i32 @realpath(i32 noundef %6, ptr noundef nonnull %5) #2 %8 = icmp eq i32 %7, 0 br i1 %8, label %13, label %9 9: ; preds = %2 %10 = call i32 @convert_to_accel_path(ptr noundef %0, ptr noundef nonnull %5, i64 noundef %1) #2 %11 = icmp ne i32 %10, 0 %12 = zext i1 %11 to i32 br label %13 13: ; preds = %9, %2 %14 = phi i32 [ 0, %2 ], [ %12, %9 ] ret i32 %14 } declare i32 @realpath(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @convert_to_accel_path(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/sumatrapdf/mupdf/platform/gl/extr_gl-main.c_get_accelerator_filename.c' source_filename = "AnghaBench/sumatrapdf/mupdf/platform/gl/extr_gl-main.c_get_accelerator_filename.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @PATH_MAX = common local_unnamed_addr global i32 0, align 4 @filename = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @get_accelerator_filename], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 0, 2) i32 @get_accelerator_filename(ptr noundef %0, i64 noundef %1) #0 { %3 = load i32, ptr @PATH_MAX, align 4, !tbaa !6 %4 = zext i32 %3 to i64 %5 = alloca i8, i64 %4, align 1 %6 = load i32, ptr @filename, align 4, !tbaa !6 %7 = call i32 @realpath(i32 noundef %6, ptr noundef nonnull %5) #2 %8 = icmp eq i32 %7, 0 br i1 %8, label %13, label %9 9: ; preds = %2 %10 = call i32 @convert_to_accel_path(ptr noundef %0, ptr noundef nonnull %5, i64 noundef %1) #2 %11 = icmp ne i32 %10, 0 %12 = zext i1 %11 to i32 br label %13 13: ; preds = %9, %2 %14 = phi i32 [ 0, %2 ], [ %12, %9 ] ret i32 %14 } declare i32 @realpath(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @convert_to_accel_path(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
sumatrapdf_mupdf_platform_gl_extr_gl-main.c_get_accelerator_filename
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/windowscodecs/extr_metadata.c_test_WICMapShortNameToGuid.c' source_filename = "AnghaBench/reactos/modules/rostests/winetests/windowscodecs/extr_metadata.c_test_WICMapShortNameToGuid.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @test_WICMapShortNameToGuid.unkW = internal constant [4 x i8] c"unk\00", align 1 @test_WICMapShortNameToGuid.xmpW = internal constant [4 x i8] c"xmp\00", align 1 @test_WICMapShortNameToGuid.XmPW = internal constant [4 x i8] c"XmP\00", align 1 @test_WICMapShortNameToGuid.unknownW = internal constant [8 x i8] c"unknown\00", align 1 @E_INVALIDARG = dso_local local_unnamed_addr global i64 0, align 8 @.str = private unnamed_addr constant [9 x i8] c"got %#x\0A\00", align 1 @WINCODEC_ERR_PROPERTYNOTFOUND = dso_local local_unnamed_addr global i64 0, align 8 @S_OK = dso_local local_unnamed_addr global i64 0, align 8 @GUID_MetadataFormatUnknown = dso_local global i32 0, align 4 @.str.1 = private unnamed_addr constant [8 x i8] c"got %s\0A\00", align 1 @GUID_MetadataFormatXMP = dso_local global i32 0, align 4 @GUID_NULL = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @test_WICMapShortNameToGuid], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @test_WICMapShortNameToGuid() #0 { %1 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3 %2 = tail call i64 @WICMapShortNameToGuid(ptr noundef null, ptr noundef null) #3 %3 = load i64, ptr @E_INVALIDARG, align 8, !tbaa !5 %4 = icmp eq i64 %2, %3 %5 = zext i1 %4 to i32 %6 = tail call i32 @ok(i32 noundef %5, ptr noundef nonnull @.str, i64 noundef %2) #3 %7 = call i64 @WICMapShortNameToGuid(ptr noundef null, ptr noundef nonnull %1) #3 %8 = load i64, ptr @E_INVALIDARG, align 8, !tbaa !5 %9 = icmp eq i64 %7, %8 %10 = zext i1 %9 to i32 %11 = call i32 @ok(i32 noundef %10, ptr noundef nonnull @.str, i64 noundef %7) #3 %12 = call i64 @WICMapShortNameToGuid(ptr noundef nonnull @test_WICMapShortNameToGuid.unknownW, ptr noundef null) #3 %13 = load i64, ptr @E_INVALIDARG, align 8, !tbaa !5 %14 = icmp eq i64 %12, %13 %15 = zext i1 %14 to i32 %16 = call i32 @ok(i32 noundef %15, ptr noundef nonnull @.str, i64 noundef %12) #3 %17 = call i64 @WICMapShortNameToGuid(ptr noundef nonnull @test_WICMapShortNameToGuid.unkW, ptr noundef nonnull %1) #3 %18 = load i64, ptr @WINCODEC_ERR_PROPERTYNOTFOUND, align 8, !tbaa !5 %19 = icmp eq i64 %17, %18 %20 = zext i1 %19 to i32 %21 = call i32 @ok(i32 noundef %20, ptr noundef nonnull @.str, i64 noundef %17) #3 %22 = call i64 @WICMapShortNameToGuid(ptr noundef nonnull @test_WICMapShortNameToGuid.unknownW, ptr noundef nonnull %1) #3 %23 = load i64, ptr @S_OK, align 8, !tbaa !5 %24 = icmp eq i64 %22, %23 %25 = zext i1 %24 to i32 %26 = call i32 @ok(i32 noundef %25, ptr noundef nonnull @.str, i64 noundef %22) #3 %27 = call i32 @IsEqualGUID(ptr noundef nonnull %1, ptr noundef nonnull @GUID_MetadataFormatUnknown) #3 %28 = call i64 @wine_dbgstr_guid(ptr noundef nonnull %1) #3 %29 = call i32 @ok(i32 noundef %27, ptr noundef nonnull @.str.1, i64 noundef %28) #3 %30 = call i64 @WICMapShortNameToGuid(ptr noundef nonnull @test_WICMapShortNameToGuid.xmpW, ptr noundef nonnull %1) #3 %31 = load i64, ptr @S_OK, align 8, !tbaa !5 %32 = icmp eq i64 %30, %31 %33 = zext i1 %32 to i32 %34 = call i32 @ok(i32 noundef %33, ptr noundef nonnull @.str, i64 noundef %30) #3 %35 = call i32 @IsEqualGUID(ptr noundef nonnull %1, ptr noundef nonnull @GUID_MetadataFormatXMP) #3 %36 = call i64 @wine_dbgstr_guid(ptr noundef nonnull %1) #3 %37 = call i32 @ok(i32 noundef %35, ptr noundef nonnull @.str.1, i64 noundef %36) #3 %38 = load i32, ptr @GUID_NULL, align 4, !tbaa !9 store i32 %38, ptr %1, align 4, !tbaa !9 %39 = call i64 @WICMapShortNameToGuid(ptr noundef nonnull @test_WICMapShortNameToGuid.XmPW, ptr noundef nonnull %1) #3 %40 = load i64, ptr @S_OK, align 8, !tbaa !5 %41 = icmp eq i64 %39, %40 %42 = zext i1 %41 to i32 %43 = call i32 @ok(i32 noundef %42, ptr noundef nonnull @.str, i64 noundef %39) #3 %44 = call i32 @IsEqualGUID(ptr noundef nonnull %1, ptr noundef nonnull @GUID_MetadataFormatXMP) #3 %45 = call i64 @wine_dbgstr_guid(ptr noundef nonnull %1) #3 %46 = call i32 @ok(i32 noundef %44, ptr noundef nonnull @.str.1, i64 noundef %45) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i64 @WICMapShortNameToGuid(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @ok(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #2 declare i32 @IsEqualGUID(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @wine_dbgstr_guid(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"int", !7, i64 0}
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/windowscodecs/extr_metadata.c_test_WICMapShortNameToGuid.c' source_filename = "AnghaBench/reactos/modules/rostests/winetests/windowscodecs/extr_metadata.c_test_WICMapShortNameToGuid.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @test_WICMapShortNameToGuid.unkW = internal constant [4 x i8] c"unk\00", align 1 @test_WICMapShortNameToGuid.xmpW = internal constant [4 x i8] c"xmp\00", align 1 @test_WICMapShortNameToGuid.XmPW = internal constant [4 x i8] c"XmP\00", align 1 @test_WICMapShortNameToGuid.unknownW = internal constant [8 x i8] c"unknown\00", align 1 @E_INVALIDARG = common local_unnamed_addr global i64 0, align 8 @.str = private unnamed_addr constant [9 x i8] c"got %#x\0A\00", align 1 @WINCODEC_ERR_PROPERTYNOTFOUND = common local_unnamed_addr global i64 0, align 8 @S_OK = common local_unnamed_addr global i64 0, align 8 @GUID_MetadataFormatUnknown = common global i32 0, align 4 @.str.1 = private unnamed_addr constant [8 x i8] c"got %s\0A\00", align 1 @GUID_MetadataFormatXMP = common global i32 0, align 4 @GUID_NULL = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @test_WICMapShortNameToGuid], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @test_WICMapShortNameToGuid() #0 { %1 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3 %2 = tail call i64 @WICMapShortNameToGuid(ptr noundef null, ptr noundef null) #3 %3 = load i64, ptr @E_INVALIDARG, align 8, !tbaa !6 %4 = icmp eq i64 %2, %3 %5 = zext i1 %4 to i32 %6 = tail call i32 @ok(i32 noundef %5, ptr noundef nonnull @.str, i64 noundef %2) #3 %7 = call i64 @WICMapShortNameToGuid(ptr noundef null, ptr noundef nonnull %1) #3 %8 = load i64, ptr @E_INVALIDARG, align 8, !tbaa !6 %9 = icmp eq i64 %7, %8 %10 = zext i1 %9 to i32 %11 = call i32 @ok(i32 noundef %10, ptr noundef nonnull @.str, i64 noundef %7) #3 %12 = call i64 @WICMapShortNameToGuid(ptr noundef nonnull @test_WICMapShortNameToGuid.unknownW, ptr noundef null) #3 %13 = load i64, ptr @E_INVALIDARG, align 8, !tbaa !6 %14 = icmp eq i64 %12, %13 %15 = zext i1 %14 to i32 %16 = call i32 @ok(i32 noundef %15, ptr noundef nonnull @.str, i64 noundef %12) #3 %17 = call i64 @WICMapShortNameToGuid(ptr noundef nonnull @test_WICMapShortNameToGuid.unkW, ptr noundef nonnull %1) #3 %18 = load i64, ptr @WINCODEC_ERR_PROPERTYNOTFOUND, align 8, !tbaa !6 %19 = icmp eq i64 %17, %18 %20 = zext i1 %19 to i32 %21 = call i32 @ok(i32 noundef %20, ptr noundef nonnull @.str, i64 noundef %17) #3 %22 = call i64 @WICMapShortNameToGuid(ptr noundef nonnull @test_WICMapShortNameToGuid.unknownW, ptr noundef nonnull %1) #3 %23 = load i64, ptr @S_OK, align 8, !tbaa !6 %24 = icmp eq i64 %22, %23 %25 = zext i1 %24 to i32 %26 = call i32 @ok(i32 noundef %25, ptr noundef nonnull @.str, i64 noundef %22) #3 %27 = call i32 @IsEqualGUID(ptr noundef nonnull %1, ptr noundef nonnull @GUID_MetadataFormatUnknown) #3 %28 = call i64 @wine_dbgstr_guid(ptr noundef nonnull %1) #3 %29 = call i32 @ok(i32 noundef %27, ptr noundef nonnull @.str.1, i64 noundef %28) #3 %30 = call i64 @WICMapShortNameToGuid(ptr noundef nonnull @test_WICMapShortNameToGuid.xmpW, ptr noundef nonnull %1) #3 %31 = load i64, ptr @S_OK, align 8, !tbaa !6 %32 = icmp eq i64 %30, %31 %33 = zext i1 %32 to i32 %34 = call i32 @ok(i32 noundef %33, ptr noundef nonnull @.str, i64 noundef %30) #3 %35 = call i32 @IsEqualGUID(ptr noundef nonnull %1, ptr noundef nonnull @GUID_MetadataFormatXMP) #3 %36 = call i64 @wine_dbgstr_guid(ptr noundef nonnull %1) #3 %37 = call i32 @ok(i32 noundef %35, ptr noundef nonnull @.str.1, i64 noundef %36) #3 %38 = load i32, ptr @GUID_NULL, align 4, !tbaa !10 store i32 %38, ptr %1, align 4, !tbaa !10 %39 = call i64 @WICMapShortNameToGuid(ptr noundef nonnull @test_WICMapShortNameToGuid.XmPW, ptr noundef nonnull %1) #3 %40 = load i64, ptr @S_OK, align 8, !tbaa !6 %41 = icmp eq i64 %39, %40 %42 = zext i1 %41 to i32 %43 = call i32 @ok(i32 noundef %42, ptr noundef nonnull @.str, i64 noundef %39) #3 %44 = call i32 @IsEqualGUID(ptr noundef nonnull %1, ptr noundef nonnull @GUID_MetadataFormatXMP) #3 %45 = call i64 @wine_dbgstr_guid(ptr noundef nonnull %1) #3 %46 = call i32 @ok(i32 noundef %44, ptr noundef nonnull @.str.1, i64 noundef %45) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i64 @WICMapShortNameToGuid(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @ok(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #2 declare i32 @IsEqualGUID(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @wine_dbgstr_guid(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0}
reactos_modules_rostests_winetests_windowscodecs_extr_metadata.c_test_WICMapShortNameToGuid
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/infiniband/hw/qib/extr_qib_mad.c_pma_set_portcounters_cong.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/infiniband/hw/qib/extr_qib_mad.c_pma_set_portcounters_cong.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.qib_verbs_counters = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %struct.qib_pportdata = type { %struct.TYPE_6__, %struct.TYPE_5__ } %struct.TYPE_6__ = type { i32 } %struct.TYPE_5__ = type { i64 } %struct.qib_ibport = type { i32, i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } @IB_PMA_SEL_CONG_XMIT = dso_local local_unnamed_addr global i32 0, align 4 @QIB_CONG_TIMER_PSINTERVAL = dso_local local_unnamed_addr global i32 0, align 4 @IB_PMA_SEL_CONG_PORT_DATA = dso_local local_unnamed_addr global i32 0, align 4 @IB_PMA_SEL_CONG_ALL = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @pma_set_portcounters_cong], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @pma_set_portcounters_cong(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 { %4 = alloca %struct.qib_verbs_counters, align 4 %5 = tail call ptr @to_iport(ptr noundef %1, i32 noundef %2) #3 %6 = tail call ptr @ppd_from_ibp(ptr noundef %5) #3 %7 = tail call ptr @dd_from_ppd(ptr noundef %6) #3 call void @llvm.lifetime.start.p0(i64 52, ptr nonnull %4) #3 %8 = load i32, ptr %0, align 4, !tbaa !5 %9 = tail call i32 @be32_to_cpu(i32 noundef %8) #3 %10 = lshr i32 %9, 24 %11 = call i32 @qib_get_counters(ptr noundef %6, ptr noundef nonnull %4) #3 %12 = call i32 @pma_get_portcounters_cong(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %2) #3 %13 = load i32, ptr @IB_PMA_SEL_CONG_XMIT, align 4, !tbaa !11 %14 = and i32 %13, %10 %15 = icmp eq i32 %14, 0 br i1 %15, label %23, label %16 16: ; preds = %3 %17 = call i32 @spin_lock_irqsave(ptr noundef %6, i64 noundef undef) #3 %18 = getelementptr inbounds %struct.qib_pportdata, ptr %6, i64 0, i32 1 store i64 0, ptr %18, align 8, !tbaa !12 %19 = load ptr, ptr %7, align 8, !tbaa !17 %20 = load i32, ptr @QIB_CONG_TIMER_PSINTERVAL, align 4, !tbaa !11 %21 = call i32 %19(ptr noundef %6, i32 noundef %20, i32 noundef 0) #3 %22 = call i32 @spin_unlock_irqrestore(ptr noundef %6, i64 noundef undef) #3 br label %23 23: ; preds = %16, %3 %24 = load i32, ptr @IB_PMA_SEL_CONG_PORT_DATA, align 4, !tbaa !11 %25 = and i32 %24, %10 %26 = icmp eq i32 %25, 0 br i1 %26, label %31, label %27 27: ; preds = %23 %28 = getelementptr inbounds %struct.qib_verbs_counters, ptr %4, i64 0, i32 9 %29 = getelementptr inbounds %struct.qib_ibport, ptr %5, i64 0, i32 10 %30 = load <4 x i32>, ptr %28, align 4, !tbaa !11 store <4 x i32> %30, ptr %29, align 8, !tbaa !11 br label %31 31: ; preds = %27, %23 %32 = load i32, ptr @IB_PMA_SEL_CONG_ALL, align 4, !tbaa !11 %33 = and i32 %32, %10 %34 = icmp eq i32 %33, 0 br i1 %34, label %44, label %35 35: ; preds = %31 %36 = getelementptr inbounds %struct.qib_verbs_counters, ptr %4, i64 0, i32 5 %37 = getelementptr inbounds %struct.qib_ibport, ptr %5, i64 0, i32 6 %38 = load <4 x i32>, ptr %36, align 4, !tbaa !11 store <4 x i32> %38, ptr %37, align 8, !tbaa !11 %39 = getelementptr inbounds %struct.qib_verbs_counters, ptr %4, i64 0, i32 1 %40 = getelementptr inbounds %struct.qib_ibport, ptr %5, i64 0, i32 2 %41 = load <4 x i32>, ptr %39, align 4, !tbaa !11 store <4 x i32> %41, ptr %40, align 8, !tbaa !11 %42 = getelementptr inbounds %struct.qib_ibport, ptr %5, i64 0, i32 1 store i64 0, ptr %42, align 8, !tbaa !20 %43 = load i32, ptr %4, align 4, !tbaa !22 store i32 %43, ptr %5, align 8, !tbaa !24 br label %44 44: ; preds = %35, %31 call void @llvm.lifetime.end.p0(i64 52, ptr nonnull %4) #3 ret i32 %12 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @to_iport(ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @ppd_from_ibp(ptr noundef) local_unnamed_addr #2 declare ptr @dd_from_ppd(ptr noundef) local_unnamed_addr #2 declare i32 @be32_to_cpu(i32 noundef) local_unnamed_addr #2 declare i32 @qib_get_counters(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @pma_get_portcounters_cong(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #2 declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !8, i64 0} !6 = !{!"ib_pma_mad", !7, i64 0} !7 = !{!"TYPE_4__", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0} !12 = !{!13, !16, i64 8} !13 = !{!"qib_pportdata", !14, i64 0, !15, i64 8} !14 = !{!"TYPE_6__", !8, i64 0} !15 = !{!"TYPE_5__", !16, i64 0} !16 = !{!"long", !9, i64 0} !17 = !{!18, !19, i64 0} !18 = !{!"qib_devdata", !19, i64 0} !19 = !{!"any pointer", !9, i64 0} !20 = !{!21, !16, i64 8} !21 = !{!"qib_ibport", !8, i64 0, !16, i64 8, !8, i64 16, !8, i64 20, !8, i64 24, !8, i64 28, !8, i64 32, !8, i64 36, !8, i64 40, !8, i64 44, !8, i64 48, !8, i64 52, !8, i64 56, !8, i64 60} !22 = !{!23, !8, i64 0} !23 = !{!"qib_verbs_counters", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !8, i64 24, !8, i64 28, !8, i64 32, !8, i64 36, !8, i64 40, !8, i64 44, !8, i64 48} !24 = !{!21, !8, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/infiniband/hw/qib/extr_qib_mad.c_pma_set_portcounters_cong.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/infiniband/hw/qib/extr_qib_mad.c_pma_set_portcounters_cong.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.qib_verbs_counters = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } @IB_PMA_SEL_CONG_XMIT = common local_unnamed_addr global i32 0, align 4 @QIB_CONG_TIMER_PSINTERVAL = common local_unnamed_addr global i32 0, align 4 @IB_PMA_SEL_CONG_PORT_DATA = common local_unnamed_addr global i32 0, align 4 @IB_PMA_SEL_CONG_ALL = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @pma_set_portcounters_cong], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @pma_set_portcounters_cong(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 { %4 = alloca %struct.qib_verbs_counters, align 4 %5 = tail call ptr @to_iport(ptr noundef %1, i32 noundef %2) #3 %6 = tail call ptr @ppd_from_ibp(ptr noundef %5) #3 %7 = tail call ptr @dd_from_ppd(ptr noundef %6) #3 call void @llvm.lifetime.start.p0(i64 52, ptr nonnull %4) #3 %8 = load i32, ptr %0, align 4, !tbaa !6 %9 = tail call i32 @be32_to_cpu(i32 noundef %8) #3 %10 = lshr i32 %9, 24 %11 = call i32 @qib_get_counters(ptr noundef %6, ptr noundef nonnull %4) #3 %12 = call i32 @pma_get_portcounters_cong(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %2) #3 %13 = load i32, ptr @IB_PMA_SEL_CONG_XMIT, align 4, !tbaa !12 %14 = and i32 %13, %10 %15 = icmp eq i32 %14, 0 br i1 %15, label %23, label %16 16: ; preds = %3 %17 = call i32 @spin_lock_irqsave(ptr noundef %6, i64 noundef undef) #3 %18 = getelementptr inbounds i8, ptr %6, i64 8 store i64 0, ptr %18, align 8, !tbaa !13 %19 = load ptr, ptr %7, align 8, !tbaa !18 %20 = load i32, ptr @QIB_CONG_TIMER_PSINTERVAL, align 4, !tbaa !12 %21 = call i32 %19(ptr noundef %6, i32 noundef %20, i32 noundef 0) #3 %22 = call i32 @spin_unlock_irqrestore(ptr noundef %6, i64 noundef undef) #3 br label %23 23: ; preds = %16, %3 %24 = load i32, ptr @IB_PMA_SEL_CONG_PORT_DATA, align 4, !tbaa !12 %25 = and i32 %24, %10 %26 = icmp eq i32 %25, 0 br i1 %26, label %31, label %27 27: ; preds = %23 %28 = getelementptr inbounds i8, ptr %4, i64 36 %29 = getelementptr inbounds i8, ptr %5, i64 48 %30 = load <4 x i32>, ptr %28, align 4, !tbaa !12 store <4 x i32> %30, ptr %29, align 8, !tbaa !12 br label %31 31: ; preds = %27, %23 %32 = load i32, ptr @IB_PMA_SEL_CONG_ALL, align 4, !tbaa !12 %33 = and i32 %32, %10 %34 = icmp eq i32 %33, 0 br i1 %34, label %44, label %35 35: ; preds = %31 %36 = getelementptr inbounds i8, ptr %4, i64 20 %37 = getelementptr inbounds i8, ptr %5, i64 32 %38 = load <4 x i32>, ptr %36, align 4, !tbaa !12 store <4 x i32> %38, ptr %37, align 8, !tbaa !12 %39 = getelementptr inbounds i8, ptr %4, i64 4 %40 = getelementptr inbounds i8, ptr %5, i64 16 %41 = load <4 x i32>, ptr %39, align 4, !tbaa !12 store <4 x i32> %41, ptr %40, align 8, !tbaa !12 %42 = getelementptr inbounds i8, ptr %5, i64 8 store i64 0, ptr %42, align 8, !tbaa !21 %43 = load i32, ptr %4, align 4, !tbaa !23 store i32 %43, ptr %5, align 8, !tbaa !25 br label %44 44: ; preds = %35, %31 call void @llvm.lifetime.end.p0(i64 52, ptr nonnull %4) #3 ret i32 %12 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @to_iport(ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @ppd_from_ibp(ptr noundef) local_unnamed_addr #2 declare ptr @dd_from_ppd(ptr noundef) local_unnamed_addr #2 declare i32 @be32_to_cpu(i32 noundef) local_unnamed_addr #2 declare i32 @qib_get_counters(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @pma_get_portcounters_cong(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #2 declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !9, i64 0} !7 = !{!"ib_pma_mad", !8, i64 0} !8 = !{!"TYPE_4__", !9, i64 0} !9 = !{!"int", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"} !12 = !{!9, !9, i64 0} !13 = !{!14, !17, i64 8} !14 = !{!"qib_pportdata", !15, i64 0, !16, i64 8} !15 = !{!"TYPE_6__", !9, i64 0} !16 = !{!"TYPE_5__", !17, i64 0} !17 = !{!"long", !10, i64 0} !18 = !{!19, !20, i64 0} !19 = !{!"qib_devdata", !20, i64 0} !20 = !{!"any pointer", !10, i64 0} !21 = !{!22, !17, i64 8} !22 = !{!"qib_ibport", !9, i64 0, !17, i64 8, !9, i64 16, !9, i64 20, !9, i64 24, !9, i64 28, !9, i64 32, !9, i64 36, !9, i64 40, !9, i64 44, !9, i64 48, !9, i64 52, !9, i64 56, !9, i64 60} !23 = !{!24, !9, i64 0} !24 = !{!"qib_verbs_counters", !9, i64 0, !9, i64 4, !9, i64 8, !9, i64 12, !9, i64 16, !9, i64 20, !9, i64 24, !9, i64 28, !9, i64 32, !9, i64 36, !9, i64 40, !9, i64 44, !9, i64 48} !25 = !{!22, !9, i64 0}
fastsocket_kernel_drivers_infiniband_hw_qib_extr_qib_mad.c_pma_set_portcounters_cong
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/ipw2x00/extr_ipw2200.c_ipw_set_geo.c' source_filename = "AnghaBench/linux/drivers/net/wireless/intel/ipw2x00/extr_ipw2200.c_ipw_set_geo.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.ipw_priv = type { i32, ptr } %struct.TYPE_4__ = type { i32 } @ipw_geos = dso_local local_unnamed_addr global ptr null, align 8 @EEPROM_COUNTRY_CODE = dso_local local_unnamed_addr global i64 0, align 8 @.str = private unnamed_addr constant [30 x i8] c"SKU [%c%c%c] not recognized.\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @ipw_set_geo], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @ipw_set_geo(ptr nocapture noundef readonly %0) #0 { %2 = getelementptr inbounds %struct.ipw_priv, ptr %0, i64 0, i32 1 %3 = load ptr, ptr @ipw_geos, align 8, !tbaa !5 %4 = tail call i32 @ARRAY_SIZE(ptr noundef %3) #2 %5 = icmp sgt i32 %4, 0 br i1 %5, label %6, label %25 6: ; preds = %1, %16 %7 = phi i64 [ %17, %16 ], [ 0, %1 ] %8 = load ptr, ptr %2, align 8, !tbaa !9 %9 = load i64, ptr @EEPROM_COUNTRY_CODE, align 8, !tbaa !12 %10 = getelementptr inbounds i32, ptr %8, i64 %9 %11 = load ptr, ptr @ipw_geos, align 8, !tbaa !5 %12 = getelementptr inbounds %struct.TYPE_4__, ptr %11, i64 %7 %13 = load i32, ptr %12, align 4, !tbaa !14 %14 = tail call i32 @memcmp(ptr noundef %10, i32 noundef %13, i32 noundef 3) #2 %15 = icmp eq i32 %14, 0 br i1 %15, label %22, label %16 16: ; preds = %6 %17 = add nuw nsw i64 %7, 1 %18 = load ptr, ptr @ipw_geos, align 8, !tbaa !5 %19 = tail call i32 @ARRAY_SIZE(ptr noundef %18) #2 %20 = sext i32 %19 to i64 %21 = icmp slt i64 %17, %20 br i1 %21, label %6, label %22, !llvm.loop !16 22: ; preds = %6, %16 %23 = phi i64 [ %17, %16 ], [ %7, %6 ] %24 = trunc i64 %23 to i32 br label %25 25: ; preds = %22, %1 %26 = phi i32 [ 0, %1 ], [ %24, %22 ] %27 = load ptr, ptr @ipw_geos, align 8, !tbaa !5 %28 = tail call i32 @ARRAY_SIZE(ptr noundef %27) #2 %29 = icmp eq i32 %26, %28 br i1 %29, label %30, label %40 30: ; preds = %25 %31 = load ptr, ptr %2, align 8, !tbaa !9 %32 = load i64, ptr @EEPROM_COUNTRY_CODE, align 8, !tbaa !12 %33 = getelementptr inbounds i32, ptr %31, i64 %32 %34 = load i32, ptr %33, align 4, !tbaa !18 %35 = getelementptr i32, ptr %33, i64 1 %36 = load i32, ptr %35, align 4, !tbaa !18 %37 = getelementptr i32, ptr %33, i64 2 %38 = load i32, ptr %37, align 4, !tbaa !18 %39 = tail call i32 @IPW_WARNING(ptr noundef nonnull @.str, i32 noundef %34, i32 noundef %36, i32 noundef %38) #2 br label %40 40: ; preds = %30, %25 %41 = phi i32 [ 0, %30 ], [ %26, %25 ] %42 = load i32, ptr %0, align 8, !tbaa !19 %43 = load ptr, ptr @ipw_geos, align 8, !tbaa !5 %44 = zext nneg i32 %41 to i64 %45 = getelementptr inbounds %struct.TYPE_4__, ptr %43, i64 %44 %46 = tail call i32 @libipw_set_geo(i32 noundef %42, ptr noundef %45) #2 ret void } declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1 declare i32 @memcmp(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @IPW_WARNING(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @libipw_set_geo(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 8} !10 = !{!"ipw_priv", !11, i64 0, !6, i64 8} !11 = !{!"int", !7, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"long", !7, i64 0} !14 = !{!15, !11, i64 0} !15 = !{!"TYPE_4__", !11, i64 0} !16 = distinct !{!16, !17} !17 = !{!"llvm.loop.mustprogress"} !18 = !{!11, !11, i64 0} !19 = !{!10, !11, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/ipw2x00/extr_ipw2200.c_ipw_set_geo.c' source_filename = "AnghaBench/linux/drivers/net/wireless/intel/ipw2x00/extr_ipw2200.c_ipw_set_geo.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_4__ = type { i32 } @ipw_geos = common local_unnamed_addr global ptr null, align 8 @EEPROM_COUNTRY_CODE = common local_unnamed_addr global i64 0, align 8 @.str = private unnamed_addr constant [30 x i8] c"SKU [%c%c%c] not recognized.\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @ipw_set_geo], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @ipw_set_geo(ptr nocapture noundef readonly %0) #0 { %2 = getelementptr inbounds i8, ptr %0, i64 8 %3 = load ptr, ptr @ipw_geos, align 8, !tbaa !6 %4 = tail call i32 @ARRAY_SIZE(ptr noundef %3) #2 %5 = icmp sgt i32 %4, 0 br i1 %5, label %6, label %25 6: ; preds = %1, %16 %7 = phi i64 [ %17, %16 ], [ 0, %1 ] %8 = load ptr, ptr %2, align 8, !tbaa !10 %9 = load i64, ptr @EEPROM_COUNTRY_CODE, align 8, !tbaa !13 %10 = getelementptr inbounds i32, ptr %8, i64 %9 %11 = load ptr, ptr @ipw_geos, align 8, !tbaa !6 %12 = getelementptr inbounds %struct.TYPE_4__, ptr %11, i64 %7 %13 = load i32, ptr %12, align 4, !tbaa !15 %14 = tail call i32 @memcmp(ptr noundef %10, i32 noundef %13, i32 noundef 3) #2 %15 = icmp eq i32 %14, 0 br i1 %15, label %22, label %16 16: ; preds = %6 %17 = add nuw nsw i64 %7, 1 %18 = load ptr, ptr @ipw_geos, align 8, !tbaa !6 %19 = tail call i32 @ARRAY_SIZE(ptr noundef %18) #2 %20 = sext i32 %19 to i64 %21 = icmp slt i64 %17, %20 br i1 %21, label %6, label %22, !llvm.loop !17 22: ; preds = %6, %16 %23 = phi i64 [ %17, %16 ], [ %7, %6 ] %24 = trunc i64 %23 to i32 br label %25 25: ; preds = %22, %1 %26 = phi i32 [ 0, %1 ], [ %24, %22 ] %27 = load ptr, ptr @ipw_geos, align 8, !tbaa !6 %28 = tail call i32 @ARRAY_SIZE(ptr noundef %27) #2 %29 = icmp eq i32 %26, %28 br i1 %29, label %30, label %40 30: ; preds = %25 %31 = load ptr, ptr %2, align 8, !tbaa !10 %32 = load i64, ptr @EEPROM_COUNTRY_CODE, align 8, !tbaa !13 %33 = getelementptr inbounds i32, ptr %31, i64 %32 %34 = load i32, ptr %33, align 4, !tbaa !19 %35 = getelementptr i8, ptr %33, i64 4 %36 = load i32, ptr %35, align 4, !tbaa !19 %37 = getelementptr i8, ptr %33, i64 8 %38 = load i32, ptr %37, align 4, !tbaa !19 %39 = tail call i32 @IPW_WARNING(ptr noundef nonnull @.str, i32 noundef %34, i32 noundef %36, i32 noundef %38) #2 br label %40 40: ; preds = %30, %25 %41 = phi i32 [ 0, %30 ], [ %26, %25 ] %42 = load i32, ptr %0, align 8, !tbaa !20 %43 = load ptr, ptr @ipw_geos, align 8, !tbaa !6 %44 = zext nneg i32 %41 to i64 %45 = getelementptr inbounds %struct.TYPE_4__, ptr %43, i64 %44 %46 = tail call i32 @libipw_set_geo(i32 noundef %42, ptr noundef %45) #2 ret void } declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1 declare i32 @memcmp(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @IPW_WARNING(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @libipw_set_geo(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 8} !11 = !{!"ipw_priv", !12, i64 0, !7, i64 8} !12 = !{!"int", !8, i64 0} !13 = !{!14, !14, i64 0} !14 = !{!"long", !8, i64 0} !15 = !{!16, !12, i64 0} !16 = !{!"TYPE_4__", !12, i64 0} !17 = distinct !{!17, !18} !18 = !{!"llvm.loop.mustprogress"} !19 = !{!12, !12, i64 0} !20 = !{!11, !12, i64 0}
linux_drivers_net_wireless_intel_ipw2x00_extr_ipw2200.c_ipw_set_geo
; ModuleID = 'AnghaBench/freebsd/sys/kern/extr_kern_lockf.c_graph_alloc_vertex.c' source_filename = "AnghaBench/freebsd/sys/kern/extr_kern_lockf.c_graph_alloc_vertex.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.owner_graph = type { i64, i64, ptr, i32, ptr } %struct.owner_vertex = type { i64, ptr, i32, i32, i32 } @lf_owner_graph_lock = dso_local global i32 0, align 4 @SX_XLOCKED = dso_local local_unnamed_addr global i32 0, align 4 @M_LOCKF = dso_local local_unnamed_addr global i32 0, align 4 @M_WAITOK = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @graph_alloc_vertex], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal ptr @graph_alloc_vertex(ptr nocapture noundef %0, ptr noundef %1) #0 { %3 = load i32, ptr @SX_XLOCKED, align 4, !tbaa !5 %4 = tail call i32 @sx_assert(ptr noundef nonnull @lf_owner_graph_lock, i32 noundef %3) #2 %5 = load i32, ptr @M_LOCKF, align 4, !tbaa !5 %6 = load i32, ptr @M_WAITOK, align 4, !tbaa !5 %7 = tail call ptr @malloc(i32 noundef 32, i32 noundef %5, i32 noundef %6) #2 %8 = load i64, ptr %0, align 8, !tbaa !9 %9 = getelementptr inbounds %struct.owner_graph, ptr %0, i64 0, i32 1 %10 = load i64, ptr %9, align 8, !tbaa !13 %11 = icmp eq i64 %8, %10 br i1 %11, label %12, label %33 12: ; preds = %2 %13 = getelementptr inbounds %struct.owner_graph, ptr %0, i64 0, i32 2 %14 = load ptr, ptr %13, align 8, !tbaa !14 %15 = trunc i64 %8 to i32 %16 = shl i32 %15, 4 %17 = load i32, ptr @M_LOCKF, align 4, !tbaa !5 %18 = load i32, ptr @M_WAITOK, align 4, !tbaa !5 %19 = tail call ptr @realloc(ptr noundef %14, i32 noundef %16, i32 noundef %17, i32 noundef %18) #2 store ptr %19, ptr %13, align 8, !tbaa !14 %20 = getelementptr inbounds %struct.owner_graph, ptr %0, i64 0, i32 4 %21 = load ptr, ptr %20, align 8, !tbaa !15 %22 = load i32, ptr @M_LOCKF, align 4, !tbaa !5 %23 = tail call i32 @free(ptr noundef %21, i32 noundef %22) #2 %24 = load i64, ptr %9, align 8, !tbaa !13 %25 = trunc i64 %24 to i32 %26 = shl i32 %25, 3 %27 = load i32, ptr @M_LOCKF, align 4, !tbaa !5 %28 = load i32, ptr @M_WAITOK, align 4, !tbaa !5 %29 = tail call ptr @malloc(i32 noundef %26, i32 noundef %27, i32 noundef %28) #2 store ptr %29, ptr %20, align 8, !tbaa !15 %30 = load i64, ptr %9, align 8, !tbaa !13 %31 = shl i64 %30, 1 store i64 %31, ptr %9, align 8, !tbaa !13 %32 = load i64, ptr %0, align 8, !tbaa !9 br label %33 33: ; preds = %12, %2 %34 = phi i64 [ %32, %12 ], [ %8, %2 ] store i64 %34, ptr %7, align 8, !tbaa !16 %35 = getelementptr inbounds %struct.owner_graph, ptr %0, i64 0, i32 3 %36 = load i32, ptr %35, align 8, !tbaa !18 %37 = getelementptr inbounds %struct.owner_vertex, ptr %7, i64 0, i32 4 store i32 %36, ptr %37, align 8, !tbaa !19 %38 = getelementptr inbounds %struct.owner_graph, ptr %0, i64 0, i32 2 %39 = load ptr, ptr %38, align 8, !tbaa !14 %40 = getelementptr inbounds ptr, ptr %39, i64 %34 store ptr %7, ptr %40, align 8, !tbaa !20 %41 = add i64 %34, 1 store i64 %41, ptr %0, align 8, !tbaa !9 %42 = getelementptr inbounds %struct.owner_vertex, ptr %7, i64 0, i32 3 %43 = tail call i32 @LIST_INIT(ptr noundef nonnull %42) #2 %44 = getelementptr inbounds %struct.owner_vertex, ptr %7, i64 0, i32 2 %45 = tail call i32 @LIST_INIT(ptr noundef nonnull %44) #2 %46 = getelementptr inbounds %struct.owner_vertex, ptr %7, i64 0, i32 1 store ptr %1, ptr %46, align 8, !tbaa !21 ret ptr %7 } declare i32 @sx_assert(ptr noundef, i32 noundef) local_unnamed_addr #1 declare ptr @malloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare ptr @realloc(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @free(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @LIST_INIT(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"owner_graph", !11, i64 0, !11, i64 8, !12, i64 16, !6, i64 24, !12, i64 32} !11 = !{!"long", !7, i64 0} !12 = !{!"any pointer", !7, i64 0} !13 = !{!10, !11, i64 8} !14 = !{!10, !12, i64 16} !15 = !{!10, !12, i64 32} !16 = !{!17, !11, i64 0} !17 = !{!"owner_vertex", !11, i64 0, !12, i64 8, !6, i64 16, !6, i64 20, !6, i64 24} !18 = !{!10, !6, i64 24} !19 = !{!17, !6, i64 24} !20 = !{!12, !12, i64 0} !21 = !{!17, !12, i64 8}
; ModuleID = 'AnghaBench/freebsd/sys/kern/extr_kern_lockf.c_graph_alloc_vertex.c' source_filename = "AnghaBench/freebsd/sys/kern/extr_kern_lockf.c_graph_alloc_vertex.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @lf_owner_graph_lock = common global i32 0, align 4 @SX_XLOCKED = common local_unnamed_addr global i32 0, align 4 @M_LOCKF = common local_unnamed_addr global i32 0, align 4 @M_WAITOK = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @graph_alloc_vertex], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal ptr @graph_alloc_vertex(ptr nocapture noundef %0, ptr noundef %1) #0 { %3 = load i32, ptr @SX_XLOCKED, align 4, !tbaa !6 %4 = tail call i32 @sx_assert(ptr noundef nonnull @lf_owner_graph_lock, i32 noundef %3) #2 %5 = load i32, ptr @M_LOCKF, align 4, !tbaa !6 %6 = load i32, ptr @M_WAITOK, align 4, !tbaa !6 %7 = tail call ptr @malloc(i32 noundef 32, i32 noundef %5, i32 noundef %6) #2 %8 = load i64, ptr %0, align 8, !tbaa !10 %9 = getelementptr inbounds i8, ptr %0, i64 8 %10 = load i64, ptr %9, align 8, !tbaa !14 %11 = icmp eq i64 %8, %10 br i1 %11, label %12, label %33 12: ; preds = %2 %13 = getelementptr inbounds i8, ptr %0, i64 16 %14 = load ptr, ptr %13, align 8, !tbaa !15 %15 = trunc i64 %8 to i32 %16 = shl i32 %15, 4 %17 = load i32, ptr @M_LOCKF, align 4, !tbaa !6 %18 = load i32, ptr @M_WAITOK, align 4, !tbaa !6 %19 = tail call ptr @realloc(ptr noundef %14, i32 noundef %16, i32 noundef %17, i32 noundef %18) #2 store ptr %19, ptr %13, align 8, !tbaa !15 %20 = getelementptr inbounds i8, ptr %0, i64 32 %21 = load ptr, ptr %20, align 8, !tbaa !16 %22 = load i32, ptr @M_LOCKF, align 4, !tbaa !6 %23 = tail call i32 @free(ptr noundef %21, i32 noundef %22) #2 %24 = load i64, ptr %9, align 8, !tbaa !14 %25 = trunc i64 %24 to i32 %26 = shl i32 %25, 3 %27 = load i32, ptr @M_LOCKF, align 4, !tbaa !6 %28 = load i32, ptr @M_WAITOK, align 4, !tbaa !6 %29 = tail call ptr @malloc(i32 noundef %26, i32 noundef %27, i32 noundef %28) #2 store ptr %29, ptr %20, align 8, !tbaa !16 %30 = load i64, ptr %9, align 8, !tbaa !14 %31 = shl i64 %30, 1 store i64 %31, ptr %9, align 8, !tbaa !14 %32 = load i64, ptr %0, align 8, !tbaa !10 br label %33 33: ; preds = %12, %2 %34 = phi i64 [ %32, %12 ], [ %8, %2 ] store i64 %34, ptr %7, align 8, !tbaa !17 %35 = getelementptr inbounds i8, ptr %0, i64 24 %36 = load i32, ptr %35, align 8, !tbaa !19 %37 = getelementptr inbounds i8, ptr %7, i64 24 store i32 %36, ptr %37, align 8, !tbaa !20 %38 = getelementptr inbounds i8, ptr %0, i64 16 %39 = load ptr, ptr %38, align 8, !tbaa !15 %40 = getelementptr inbounds ptr, ptr %39, i64 %34 store ptr %7, ptr %40, align 8, !tbaa !21 %41 = add i64 %34, 1 store i64 %41, ptr %0, align 8, !tbaa !10 %42 = getelementptr inbounds i8, ptr %7, i64 20 %43 = tail call i32 @LIST_INIT(ptr noundef nonnull %42) #2 %44 = getelementptr inbounds i8, ptr %7, i64 16 %45 = tail call i32 @LIST_INIT(ptr noundef nonnull %44) #2 %46 = getelementptr inbounds i8, ptr %7, i64 8 store ptr %1, ptr %46, align 8, !tbaa !22 ret ptr %7 } declare i32 @sx_assert(ptr noundef, i32 noundef) local_unnamed_addr #1 declare ptr @malloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare ptr @realloc(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @free(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @LIST_INIT(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"owner_graph", !12, i64 0, !12, i64 8, !13, i64 16, !7, i64 24, !13, i64 32} !12 = !{!"long", !8, i64 0} !13 = !{!"any pointer", !8, i64 0} !14 = !{!11, !12, i64 8} !15 = !{!11, !13, i64 16} !16 = !{!11, !13, i64 32} !17 = !{!18, !12, i64 0} !18 = !{!"owner_vertex", !12, i64 0, !13, i64 8, !7, i64 16, !7, i64 20, !7, i64 24} !19 = !{!11, !7, i64 24} !20 = !{!18, !7, i64 24} !21 = !{!13, !13, i64 0} !22 = !{!18, !13, i64 8}
freebsd_sys_kern_extr_kern_lockf.c_graph_alloc_vertex
; ModuleID = 'AnghaBench/libuv/src/unix/extr_tty.c_uv_tty_set_vterm_state.c' source_filename = "AnghaBench/libuv/src/unix/extr_tty.c_uv_tty_set_vterm_state.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define dso_local void @uv_tty_set_vterm_state(i32 noundef %0) local_unnamed_addr #0 { ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/libuv/src/unix/extr_tty.c_uv_tty_set_vterm_state.c' source_filename = "AnghaBench/libuv/src/unix/extr_tty.c_uv_tty_set_vterm_state.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define void @uv_tty_set_vterm_state(i32 noundef %0) local_unnamed_addr #0 { ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
libuv_src_unix_extr_tty.c_uv_tty_set_vterm_state
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/gfs2/extr_ops_fstype.c_gfs2_lookup_root.c' source_filename = "AnghaBench/fastsocket/kernel/fs/gfs2/extr_ops_fstype.c_gfs2_lookup_root.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @DT_DIR = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [29 x i8] c"can't read in %s inode: %ld\0A\00", align 1 @.str.1 = private unnamed_addr constant [23 x i8] c"can't alloc %s dentry\0A\00", align 1 @ENOMEM = dso_local local_unnamed_addr global i32 0, align 4 @gfs2_dops = dso_local global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @gfs2_lookup_root], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @gfs2_lookup_root(ptr noundef %0, ptr nocapture noundef writeonly %1, i32 noundef %2, ptr noundef %3) #0 { %5 = load ptr, ptr %0, align 8, !tbaa !5 %6 = load i32, ptr @DT_DIR, align 4, !tbaa !10 %7 = tail call ptr @gfs2_inode_lookup(ptr noundef nonnull %0, i32 noundef %6, i32 noundef %2, i32 noundef 0, i32 noundef 0) #2 %8 = tail call i64 @IS_ERR(ptr noundef %7) #2 %9 = icmp eq i64 %8, 0 br i1 %9, label %14, label %10 10: ; preds = %4 %11 = tail call i32 @PTR_ERR(ptr noundef %7) #2 %12 = tail call i32 (ptr, ptr, ptr, ...) @fs_err(ptr noundef %5, ptr noundef nonnull @.str, ptr noundef %3, i32 noundef %11) #2 %13 = tail call i32 @PTR_ERR(ptr noundef %7) #2 br label %23 14: ; preds = %4 %15 = tail call ptr @d_alloc_root(ptr noundef %7) #2 %16 = icmp eq ptr %15, null br i1 %16, label %17, label %22 17: ; preds = %14 %18 = tail call i32 (ptr, ptr, ptr, ...) @fs_err(ptr noundef %5, ptr noundef nonnull @.str.1, ptr noundef %3) #2 %19 = tail call i32 @iput(ptr noundef %7) #2 %20 = load i32, ptr @ENOMEM, align 4, !tbaa !10 %21 = sub nsw i32 0, %20 br label %23 22: ; preds = %14 store ptr @gfs2_dops, ptr %15, align 8, !tbaa !12 store ptr %15, ptr %1, align 8, !tbaa !14 br label %23 23: ; preds = %22, %17, %10 %24 = phi i32 [ %13, %10 ], [ 0, %22 ], [ %21, %17 ] ret i32 %24 } declare ptr @gfs2_inode_lookup(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @fs_err(ptr noundef, ptr noundef, ptr noundef, ...) local_unnamed_addr #1 declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1 declare ptr @d_alloc_root(ptr noundef) local_unnamed_addr #1 declare i32 @iput(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"super_block", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0} !12 = !{!13, !7, i64 0} !13 = !{!"dentry", !7, i64 0} !14 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/gfs2/extr_ops_fstype.c_gfs2_lookup_root.c' source_filename = "AnghaBench/fastsocket/kernel/fs/gfs2/extr_ops_fstype.c_gfs2_lookup_root.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @DT_DIR = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [29 x i8] c"can't read in %s inode: %ld\0A\00", align 1 @.str.1 = private unnamed_addr constant [23 x i8] c"can't alloc %s dentry\0A\00", align 1 @ENOMEM = common local_unnamed_addr global i32 0, align 4 @gfs2_dops = common global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @gfs2_lookup_root], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @gfs2_lookup_root(ptr noundef %0, ptr nocapture noundef writeonly %1, i32 noundef %2, ptr noundef %3) #0 { %5 = load ptr, ptr %0, align 8, !tbaa !6 %6 = load i32, ptr @DT_DIR, align 4, !tbaa !11 %7 = tail call ptr @gfs2_inode_lookup(ptr noundef nonnull %0, i32 noundef %6, i32 noundef %2, i32 noundef 0, i32 noundef 0) #2 %8 = tail call i64 @IS_ERR(ptr noundef %7) #2 %9 = icmp eq i64 %8, 0 br i1 %9, label %14, label %10 10: ; preds = %4 %11 = tail call i32 @PTR_ERR(ptr noundef %7) #2 %12 = tail call i32 (ptr, ptr, ptr, ...) @fs_err(ptr noundef %5, ptr noundef nonnull @.str, ptr noundef %3, i32 noundef %11) #2 %13 = tail call i32 @PTR_ERR(ptr noundef %7) #2 br label %23 14: ; preds = %4 %15 = tail call ptr @d_alloc_root(ptr noundef %7) #2 %16 = icmp eq ptr %15, null br i1 %16, label %17, label %22 17: ; preds = %14 %18 = tail call i32 (ptr, ptr, ptr, ...) @fs_err(ptr noundef %5, ptr noundef nonnull @.str.1, ptr noundef %3) #2 %19 = tail call i32 @iput(ptr noundef %7) #2 %20 = load i32, ptr @ENOMEM, align 4, !tbaa !11 %21 = sub nsw i32 0, %20 br label %23 22: ; preds = %14 store ptr @gfs2_dops, ptr %15, align 8, !tbaa !13 store ptr %15, ptr %1, align 8, !tbaa !15 br label %23 23: ; preds = %22, %17, %10 %24 = phi i32 [ %13, %10 ], [ 0, %22 ], [ %21, %17 ] ret i32 %24 } declare ptr @gfs2_inode_lookup(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @fs_err(ptr noundef, ptr noundef, ptr noundef, ...) local_unnamed_addr #1 declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1 declare ptr @d_alloc_root(ptr noundef) local_unnamed_addr #1 declare i32 @iput(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"super_block", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !12, i64 0} !12 = !{!"int", !9, i64 0} !13 = !{!14, !8, i64 0} !14 = !{!"dentry", !8, i64 0} !15 = !{!8, !8, i64 0}
fastsocket_kernel_fs_gfs2_extr_ops_fstype.c_gfs2_lookup_root
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/hda/extr_hda_generic.c_create_extra_out.c' source_filename = "AnghaBench/fastsocket/kernel/sound/pci/hda/extr_hda_generic.c_create_extra_out.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @create_extra_out], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @create_extra_out(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #0 { %5 = tail call ptr @snd_hda_get_path_from_idx(ptr noundef %0, i32 noundef %1) #3 %6 = icmp eq ptr %5, null br i1 %6, label %13, label %7 7: ; preds = %4 %8 = tail call i32 @add_stereo_vol(ptr noundef %0, ptr noundef %2, i32 noundef %3, ptr noundef nonnull %5) #3 %9 = icmp slt i32 %8, 0 br i1 %9, label %13, label %10 10: ; preds = %7 %11 = tail call i32 @add_stereo_sw(ptr noundef %0, ptr noundef %2, i32 noundef %3, ptr noundef nonnull %5) #3 %12 = tail call i32 @llvm.smin.i32(i32 %11, i32 0) br label %13 13: ; preds = %10, %7, %4 %14 = phi i32 [ 0, %4 ], [ %8, %7 ], [ %12, %10 ] ret i32 %14 } declare ptr @snd_hda_get_path_from_idx(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @add_stereo_vol(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @add_stereo_sw(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.smin.i32(i32, i32) #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/hda/extr_hda_generic.c_create_extra_out.c' source_filename = "AnghaBench/fastsocket/kernel/sound/pci/hda/extr_hda_generic.c_create_extra_out.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @create_extra_out], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 -2147483648, 1) i32 @create_extra_out(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #0 { %5 = tail call ptr @snd_hda_get_path_from_idx(ptr noundef %0, i32 noundef %1) #3 %6 = icmp eq ptr %5, null br i1 %6, label %13, label %7 7: ; preds = %4 %8 = tail call i32 @add_stereo_vol(ptr noundef %0, ptr noundef %2, i32 noundef %3, ptr noundef nonnull %5) #3 %9 = icmp slt i32 %8, 0 br i1 %9, label %13, label %10 10: ; preds = %7 %11 = tail call i32 @add_stereo_sw(ptr noundef %0, ptr noundef %2, i32 noundef %3, ptr noundef nonnull %5) #3 %12 = tail call i32 @llvm.smin.i32(i32 %11, i32 0) br label %13 13: ; preds = %10, %7, %4 %14 = phi i32 [ 0, %4 ], [ %8, %7 ], [ %12, %10 ] ret i32 %14 } declare ptr @snd_hda_get_path_from_idx(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @add_stereo_vol(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @add_stereo_sw(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.smin.i32(i32, i32) #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
fastsocket_kernel_sound_pci_hda_extr_hda_generic.c_create_extra_out
; ModuleID = 'AnghaBench/RetroArch/gfx/drivers/extr_vga_gfx.c_vga_gfx_get_poke_interface.c' source_filename = "AnghaBench/RetroArch/gfx/drivers/extr_vga_gfx.c_vga_gfx_get_poke_interface.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @vga_poke_interface = dso_local global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @vga_gfx_get_poke_interface], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable define internal void @vga_gfx_get_poke_interface(ptr nocapture readnone %0, ptr nocapture noundef writeonly %1) #0 { store ptr @vga_poke_interface, ptr %1, align 8, !tbaa !5 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/RetroArch/gfx/drivers/extr_vga_gfx.c_vga_gfx_get_poke_interface.c' source_filename = "AnghaBench/RetroArch/gfx/drivers/extr_vga_gfx.c_vga_gfx_get_poke_interface.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @vga_poke_interface = common global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @vga_gfx_get_poke_interface], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) define internal void @vga_gfx_get_poke_interface(ptr nocapture readnone %0, ptr nocapture noundef writeonly %1) #0 { store ptr @vga_poke_interface, ptr %1, align 8, !tbaa !6 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
RetroArch_gfx_drivers_extr_vga_gfx.c_vga_gfx_get_poke_interface
; ModuleID = 'AnghaBench/Quake-III-Arena/code/game/extr_q_shared.c_Com_Clamp.c' source_filename = "AnghaBench/Quake-III-Arena/code/game/extr_q_shared.c_Com_Clamp.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define dso_local noundef float @Com_Clamp(float noundef %0, float noundef %1, float noundef %2) local_unnamed_addr #0 { %4 = fcmp olt float %2, %0 %5 = fcmp ogt float %2, %1 %6 = select i1 %5, float %1, float %2 %7 = select i1 %4, float %0, float %6 ret float %7 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/Quake-III-Arena/code/game/extr_q_shared.c_Com_Clamp.c' source_filename = "AnghaBench/Quake-III-Arena/code/game/extr_q_shared.c_Com_Clamp.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define noundef float @Com_Clamp(float noundef %0, float noundef %1, float noundef %2) local_unnamed_addr #0 { %4 = fcmp olt float %2, %0 %5 = fcmp ogt float %2, %1 %6 = select i1 %5, float %1, float %2 %7 = select i1 %4, float %0, float %6 ret float %7 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
Quake-III-Arena_code_game_extr_q_shared.c_Com_Clamp
; ModuleID = 'AnghaBench/curl/tests/libtest/extr_lib557.c_test_weird_arguments.c' source_filename = "AnghaBench/curl/tests/libtest/extr_lib557.c_test_weird_arguments.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [257 x i8] c"%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d\00", align 1 @.str.1 = private unnamed_addr constant [41 x i8] c"curl_mprintf() returned %d and not 128!\0A\00", align 1 @.str.2 = private unnamed_addr constant [129 x i8] c"01234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567\00", align 1 @.str.3 = private unnamed_addr constant [259 x i8] c"%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d\00", align 1 @.str.4 = private unnamed_addr constant [40 x i8] c"curl_mprintf() returned %d and not -1!\0A\00", align 1 @.str.5 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1 @str = private unnamed_addr constant [50 x i8] c"Some curl_mprintf() weird arguments tests failed!\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @test_weird_arguments], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @test_weird_arguments() #0 { %1 = alloca [256 x i8], align 16 call void @llvm.lifetime.start.p0(i64 256, ptr nonnull %1) #5 %2 = call i32 (ptr, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ...) @curl_msnprintf(ptr noundef nonnull %1, i32 noundef 256, ptr noundef nonnull @.str, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7) #5 %3 = icmp eq i32 %2, 128 br i1 %3, label %6, label %4 4: ; preds = %0 %5 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, i32 noundef %2) br label %6 6: ; preds = %4, %0 %7 = phi i64 [ 1, %4 ], [ 0, %0 ] %8 = call i64 @string_check(ptr noundef nonnull %1, ptr noundef nonnull @.str.2) #5 %9 = add nsw i64 %8, %7 store i8 0, ptr %1, align 16, !tbaa !5 %10 = call i32 (ptr, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ...) @curl_msnprintf(ptr noundef nonnull %1, i32 noundef 256, ptr noundef nonnull @.str.3, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8) #5 %11 = icmp eq i32 %10, -1 br i1 %11, label %15, label %12 12: ; preds = %6 %13 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, i32 noundef %10) %14 = add i64 %9, 1 br label %15 15: ; preds = %12, %6 %16 = phi i64 [ %14, %12 ], [ %9, %6 ] %17 = call i64 @string_check(ptr noundef nonnull %1, ptr noundef nonnull @.str.5) #5 %18 = add i64 %17, %16 %19 = trunc i64 %18 to i32 %20 = icmp eq i32 %19, 0 br i1 %20, label %23, label %21 21: ; preds = %15 %22 = call i32 @puts(ptr nonnull dereferenceable(1) @str) br label %23 23: ; preds = %21, %15 call void @llvm.lifetime.end.p0(i64 256, ptr nonnull %1) #5 ret i32 %19 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @curl_msnprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ...) local_unnamed_addr #2 ; Function Attrs: nofree nounwind declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3 declare i64 @string_check(ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: nofree nounwind declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #4 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #4 = { nofree nounwind } attributes #5 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"omnipotent char", !7, i64 0} !7 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/curl/tests/libtest/extr_lib557.c_test_weird_arguments.c' source_filename = "AnghaBench/curl/tests/libtest/extr_lib557.c_test_weird_arguments.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [257 x i8] c"%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d\00", align 1 @.str.1 = private unnamed_addr constant [41 x i8] c"curl_mprintf() returned %d and not 128!\0A\00", align 1 @.str.2 = private unnamed_addr constant [129 x i8] c"01234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567890123456789012345678901234567\00", align 1 @.str.3 = private unnamed_addr constant [259 x i8] c"%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d\00", align 1 @.str.4 = private unnamed_addr constant [40 x i8] c"curl_mprintf() returned %d and not -1!\0A\00", align 1 @.str.5 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1 @str = private unnamed_addr constant [50 x i8] c"Some curl_mprintf() weird arguments tests failed!\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @test_weird_arguments], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @test_weird_arguments() #0 { %1 = alloca [256 x i8], align 1 call void @llvm.lifetime.start.p0(i64 256, ptr nonnull %1) #5 %2 = call i32 (ptr, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ...) @curl_msnprintf(ptr noundef nonnull %1, i32 noundef 256, ptr noundef nonnull @.str, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7) #5 %3 = icmp eq i32 %2, 128 br i1 %3, label %6, label %4 4: ; preds = %0 %5 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.1, i32 noundef %2) br label %6 6: ; preds = %4, %0 %7 = phi i64 [ 1, %4 ], [ 0, %0 ] %8 = call i64 @string_check(ptr noundef nonnull %1, ptr noundef nonnull @.str.2) #5 %9 = add nsw i64 %8, %7 store i8 0, ptr %1, align 1, !tbaa !6 %10 = call i32 (ptr, i32, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ...) @curl_msnprintf(ptr noundef nonnull %1, i32 noundef 256, ptr noundef nonnull @.str.3, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8, i32 noundef 9, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef 3, i32 noundef 4, i32 noundef 5, i32 noundef 6, i32 noundef 7, i32 noundef 8) #5 %11 = icmp eq i32 %10, -1 br i1 %11, label %15, label %12 12: ; preds = %6 %13 = call i32 (ptr, ...) @printf(ptr noundef nonnull dereferenceable(1) @.str.4, i32 noundef %10) %14 = add i64 %9, 1 br label %15 15: ; preds = %12, %6 %16 = phi i64 [ %14, %12 ], [ %9, %6 ] %17 = call i64 @string_check(ptr noundef nonnull %1, ptr noundef nonnull @.str.5) #5 %18 = add i64 %17, %16 %19 = trunc i64 %18 to i32 %20 = icmp eq i32 %19, 0 br i1 %20, label %23, label %21 21: ; preds = %15 %22 = call i32 @puts(ptr nonnull dereferenceable(1) @str) br label %23 23: ; preds = %21, %15 call void @llvm.lifetime.end.p0(i64 256, ptr nonnull %1) #5 ret i32 %19 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @curl_msnprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ...) local_unnamed_addr #2 ; Function Attrs: nofree nounwind declare noundef i32 @printf(ptr nocapture noundef readonly, ...) local_unnamed_addr #3 declare i64 @string_check(ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: nofree nounwind declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #4 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #4 = { nofree nounwind } attributes #5 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
curl_tests_libtest_extr_lib557.c_test_weird_arguments
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/extr_s2255drv.c_vidioc_enum_fmt_vid_cap.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/extr_s2255drv.c_vidioc_enum_fmt_vid_cap.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_3__ = type { i32, i32 } %struct.v4l2_fmtdesc = type { i32, i32, i32 } @formats = dso_local local_unnamed_addr global ptr null, align 8 @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [9 x i8] c"name %s\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @vidioc_enum_fmt_vid_cap], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @vidioc_enum_fmt_vid_cap(ptr nocapture readnone %0, ptr nocapture readnone %1, ptr noundef %2) #0 { %4 = icmp eq ptr %2, null br i1 %4, label %7, label %5 5: ; preds = %3 %6 = load i32, ptr %2, align 4, !tbaa !5 br label %7 7: ; preds = %5, %3 %8 = phi i32 [ %6, %5 ], [ 0, %3 ] %9 = load ptr, ptr @formats, align 8, !tbaa !10 %10 = tail call i32 @ARRAY_SIZE(ptr noundef %9) #2 %11 = icmp slt i32 %8, %10 br i1 %11, label %15, label %12 12: ; preds = %7 %13 = load i32, ptr @EINVAL, align 4, !tbaa !12 %14 = sub nsw i32 0, %13 br label %31 15: ; preds = %7 %16 = load ptr, ptr @formats, align 8, !tbaa !10 %17 = sext i32 %8 to i64 %18 = getelementptr inbounds %struct.TYPE_3__, ptr %16, i64 %17, i32 1 %19 = load i32, ptr %18, align 4, !tbaa !13 %20 = tail call i32 @dprintk(i32 noundef 4, ptr noundef nonnull @.str, i32 noundef %19) #2 %21 = getelementptr inbounds %struct.v4l2_fmtdesc, ptr %2, i64 0, i32 2 %22 = load i32, ptr %21, align 4, !tbaa !15 %23 = load ptr, ptr @formats, align 8, !tbaa !10 %24 = getelementptr inbounds %struct.TYPE_3__, ptr %23, i64 %17, i32 1 %25 = load i32, ptr %24, align 4, !tbaa !13 %26 = tail call i32 @strlcpy(i32 noundef %22, i32 noundef %25, i32 noundef 4) #2 %27 = load ptr, ptr @formats, align 8, !tbaa !10 %28 = getelementptr inbounds %struct.TYPE_3__, ptr %27, i64 %17 %29 = load i32, ptr %28, align 4, !tbaa !16 %30 = getelementptr inbounds %struct.v4l2_fmtdesc, ptr %2, i64 0, i32 1 store i32 %29, ptr %30, align 4, !tbaa !17 br label %31 31: ; preds = %15, %12 %32 = phi i32 [ %14, %12 ], [ 0, %15 ] ret i32 %32 } declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1 declare i32 @dprintk(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @strlcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"v4l2_fmtdesc", !7, i64 0, !7, i64 4, !7, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"any pointer", !8, i64 0} !12 = !{!7, !7, i64 0} !13 = !{!14, !7, i64 4} !14 = !{!"TYPE_3__", !7, i64 0, !7, i64 4} !15 = !{!6, !7, i64 8} !16 = !{!14, !7, i64 0} !17 = !{!6, !7, i64 4}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/extr_s2255drv.c_vidioc_enum_fmt_vid_cap.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/extr_s2255drv.c_vidioc_enum_fmt_vid_cap.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_3__ = type { i32, i32 } @formats = common local_unnamed_addr global ptr null, align 8 @EINVAL = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [9 x i8] c"name %s\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @vidioc_enum_fmt_vid_cap], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 -2147483647, -2147483648) i32 @vidioc_enum_fmt_vid_cap(ptr nocapture readnone %0, ptr nocapture readnone %1, ptr noundef %2) #0 { %4 = icmp eq ptr %2, null br i1 %4, label %7, label %5 5: ; preds = %3 %6 = load i32, ptr %2, align 4, !tbaa !6 br label %7 7: ; preds = %5, %3 %8 = phi i32 [ %6, %5 ], [ 0, %3 ] %9 = load ptr, ptr @formats, align 8, !tbaa !11 %10 = tail call i32 @ARRAY_SIZE(ptr noundef %9) #2 %11 = icmp slt i32 %8, %10 br i1 %11, label %15, label %12 12: ; preds = %7 %13 = load i32, ptr @EINVAL, align 4, !tbaa !13 %14 = sub nsw i32 0, %13 br label %31 15: ; preds = %7 %16 = load ptr, ptr @formats, align 8, !tbaa !11 %17 = sext i32 %8 to i64 %18 = getelementptr inbounds %struct.TYPE_3__, ptr %16, i64 %17, i32 1 %19 = load i32, ptr %18, align 4, !tbaa !14 %20 = tail call i32 @dprintk(i32 noundef 4, ptr noundef nonnull @.str, i32 noundef %19) #2 %21 = getelementptr inbounds i8, ptr %2, i64 8 %22 = load i32, ptr %21, align 4, !tbaa !16 %23 = load ptr, ptr @formats, align 8, !tbaa !11 %24 = getelementptr inbounds %struct.TYPE_3__, ptr %23, i64 %17, i32 1 %25 = load i32, ptr %24, align 4, !tbaa !14 %26 = tail call i32 @strlcpy(i32 noundef %22, i32 noundef %25, i32 noundef 4) #2 %27 = load ptr, ptr @formats, align 8, !tbaa !11 %28 = getelementptr inbounds %struct.TYPE_3__, ptr %27, i64 %17 %29 = load i32, ptr %28, align 4, !tbaa !17 %30 = getelementptr inbounds i8, ptr %2, i64 4 store i32 %29, ptr %30, align 4, !tbaa !18 br label %31 31: ; preds = %15, %12 %32 = phi i32 [ %14, %12 ], [ 0, %15 ] ret i32 %32 } declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1 declare i32 @dprintk(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @strlcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"v4l2_fmtdesc", !8, i64 0, !8, i64 4, !8, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !12, i64 0} !12 = !{!"any pointer", !9, i64 0} !13 = !{!8, !8, i64 0} !14 = !{!15, !8, i64 4} !15 = !{!"TYPE_3__", !8, i64 0, !8, i64 4} !16 = !{!7, !8, i64 8} !17 = !{!15, !8, i64 0} !18 = !{!7, !8, i64 4}
fastsocket_kernel_drivers_media_video_extr_s2255drv.c_vidioc_enum_fmt_vid_cap
; ModuleID = 'AnghaBench/linux/drivers/net/extr_vsockmon.c_vsockmon_setup.c' source_filename = "AnghaBench/linux/drivers/net/extr_vsockmon.c_vsockmon_setup.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.net_device = type { i32, i32, i32, i32, ptr, ptr, i32, i32 } @ARPHRD_VSOCKMON = dso_local local_unnamed_addr global i32 0, align 4 @IFF_NO_QUEUE = dso_local local_unnamed_addr global i32 0, align 4 @vsockmon_ops = dso_local global i32 0, align 4 @vsockmon_ethtool_ops = dso_local global i32 0, align 4 @NETIF_F_SG = dso_local local_unnamed_addr global i32 0, align 4 @NETIF_F_FRAGLIST = dso_local local_unnamed_addr global i32 0, align 4 @NETIF_F_HIGHDMA = dso_local local_unnamed_addr global i32 0, align 4 @NETIF_F_LLTX = dso_local local_unnamed_addr global i32 0, align 4 @IFF_NOARP = dso_local local_unnamed_addr global i32 0, align 4 @DEFAULT_MTU = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @vsockmon_setup], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable define internal void @vsockmon_setup(ptr nocapture noundef %0) #0 { %2 = load i32, ptr @ARPHRD_VSOCKMON, align 4, !tbaa !5 %3 = getelementptr inbounds %struct.net_device, ptr %0, i64 0, i32 7 store i32 %2, ptr %3, align 4, !tbaa !9 %4 = load i32, ptr @IFF_NO_QUEUE, align 4, !tbaa !5 %5 = getelementptr inbounds %struct.net_device, ptr %0, i64 0, i32 6 %6 = load i32, ptr %5, align 8, !tbaa !12 %7 = or i32 %6, %4 store i32 %7, ptr %5, align 8, !tbaa !12 %8 = getelementptr inbounds %struct.net_device, ptr %0, i64 0, i32 5 store ptr @vsockmon_ops, ptr %8, align 8, !tbaa !13 %9 = getelementptr inbounds %struct.net_device, ptr %0, i64 0, i32 4 store ptr @vsockmon_ethtool_ops, ptr %9, align 8, !tbaa !14 store i32 1, ptr %0, align 8, !tbaa !15 %10 = load i32, ptr @NETIF_F_SG, align 4, !tbaa !5 %11 = load i32, ptr @NETIF_F_FRAGLIST, align 4, !tbaa !5 %12 = or i32 %11, %10 %13 = load i32, ptr @NETIF_F_HIGHDMA, align 4, !tbaa !5 %14 = or i32 %12, %13 %15 = load i32, ptr @NETIF_F_LLTX, align 4, !tbaa !5 %16 = or i32 %14, %15 %17 = getelementptr inbounds %struct.net_device, ptr %0, i64 0, i32 1 store i32 %16, ptr %17, align 4, !tbaa !16 %18 = load i32, ptr @IFF_NOARP, align 4, !tbaa !5 %19 = getelementptr inbounds %struct.net_device, ptr %0, i64 0, i32 3 store i32 %18, ptr %19, align 4, !tbaa !17 %20 = load i32, ptr @DEFAULT_MTU, align 4, !tbaa !5 %21 = getelementptr inbounds %struct.net_device, ptr %0, i64 0, i32 2 store i32 %20, ptr %21, align 8, !tbaa !18 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 36} !10 = !{!"net_device", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !11, i64 16, !11, i64 24, !6, i64 32, !6, i64 36} !11 = !{!"any pointer", !7, i64 0} !12 = !{!10, !6, i64 32} !13 = !{!10, !11, i64 24} !14 = !{!10, !11, i64 16} !15 = !{!10, !6, i64 0} !16 = !{!10, !6, i64 4} !17 = !{!10, !6, i64 12} !18 = !{!10, !6, i64 8}
; ModuleID = 'AnghaBench/linux/drivers/net/extr_vsockmon.c_vsockmon_setup.c' source_filename = "AnghaBench/linux/drivers/net/extr_vsockmon.c_vsockmon_setup.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @ARPHRD_VSOCKMON = common local_unnamed_addr global i32 0, align 4 @IFF_NO_QUEUE = common local_unnamed_addr global i32 0, align 4 @vsockmon_ops = common global i32 0, align 4 @vsockmon_ethtool_ops = common global i32 0, align 4 @NETIF_F_SG = common local_unnamed_addr global i32 0, align 4 @NETIF_F_FRAGLIST = common local_unnamed_addr global i32 0, align 4 @NETIF_F_HIGHDMA = common local_unnamed_addr global i32 0, align 4 @NETIF_F_LLTX = common local_unnamed_addr global i32 0, align 4 @IFF_NOARP = common local_unnamed_addr global i32 0, align 4 @DEFAULT_MTU = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @vsockmon_setup], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) define internal void @vsockmon_setup(ptr nocapture noundef %0) #0 { %2 = load i32, ptr @ARPHRD_VSOCKMON, align 4, !tbaa !6 %3 = getelementptr inbounds i8, ptr %0, i64 36 store i32 %2, ptr %3, align 4, !tbaa !10 %4 = load i32, ptr @IFF_NO_QUEUE, align 4, !tbaa !6 %5 = getelementptr inbounds i8, ptr %0, i64 32 %6 = load i32, ptr %5, align 8, !tbaa !13 %7 = or i32 %6, %4 store i32 %7, ptr %5, align 8, !tbaa !13 %8 = getelementptr inbounds i8, ptr %0, i64 24 store ptr @vsockmon_ops, ptr %8, align 8, !tbaa !14 %9 = getelementptr inbounds i8, ptr %0, i64 16 store ptr @vsockmon_ethtool_ops, ptr %9, align 8, !tbaa !15 store i32 1, ptr %0, align 8, !tbaa !16 %10 = load i32, ptr @NETIF_F_SG, align 4, !tbaa !6 %11 = load i32, ptr @NETIF_F_FRAGLIST, align 4, !tbaa !6 %12 = or i32 %11, %10 %13 = load i32, ptr @NETIF_F_HIGHDMA, align 4, !tbaa !6 %14 = or i32 %12, %13 %15 = load i32, ptr @NETIF_F_LLTX, align 4, !tbaa !6 %16 = or i32 %14, %15 %17 = getelementptr inbounds i8, ptr %0, i64 4 store i32 %16, ptr %17, align 4, !tbaa !17 %18 = load i32, ptr @IFF_NOARP, align 4, !tbaa !6 %19 = getelementptr inbounds i8, ptr %0, i64 12 store i32 %18, ptr %19, align 4, !tbaa !18 %20 = load i32, ptr @DEFAULT_MTU, align 4, !tbaa !6 %21 = getelementptr inbounds i8, ptr %0, i64 8 store i32 %20, ptr %21, align 8, !tbaa !19 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 36} !11 = !{!"net_device", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !12, i64 16, !12, i64 24, !7, i64 32, !7, i64 36} !12 = !{!"any pointer", !8, i64 0} !13 = !{!11, !7, i64 32} !14 = !{!11, !12, i64 24} !15 = !{!11, !12, i64 16} !16 = !{!11, !7, i64 0} !17 = !{!11, !7, i64 4} !18 = !{!11, !7, i64 12} !19 = !{!11, !7, i64 8}
linux_drivers_net_extr_vsockmon.c_vsockmon_setup
; ModuleID = 'AnghaBench/linux/fs/btrfs/extr_transaction.c_update_super_roots.c' source_filename = "AnghaBench/linux/fs/btrfs/extr_transaction.c_update_super_roots.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.btrfs_fs_info = type { i32, ptr, ptr, ptr } %struct.btrfs_root_item = type { i32, i32, i32 } %struct.btrfs_super_block = type { i32, i32, i32, i32, i32, i32, i32, i32 } @SPACE_CACHE = dso_local local_unnamed_addr global i32 0, align 4 @BTRFS_FS_UPDATE_UUID_TREE_GEN = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @update_super_roots], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @update_super_roots(ptr noundef %0) #0 { %2 = getelementptr inbounds %struct.btrfs_fs_info, ptr %0, i64 0, i32 3 %3 = load ptr, ptr %2, align 8, !tbaa !5 %4 = getelementptr inbounds %struct.btrfs_fs_info, ptr %0, i64 0, i32 2 %5 = load ptr, ptr %4, align 8, !tbaa !11 %6 = getelementptr inbounds %struct.btrfs_root_item, ptr %5, i64 0, i32 2 %7 = load i32, ptr %6, align 4, !tbaa !12 %8 = getelementptr inbounds %struct.btrfs_super_block, ptr %3, i64 0, i32 7 store i32 %7, ptr %8, align 4, !tbaa !14 %9 = getelementptr inbounds %struct.btrfs_super_block, ptr %3, i64 0, i32 5 %10 = load <2 x i32>, ptr %5, align 4, !tbaa !16 %11 = shufflevector <2 x i32> %10, <2 x i32> poison, <2 x i32> <i32 1, i32 0> store <2 x i32> %11, ptr %9, align 4, !tbaa !16 %12 = getelementptr inbounds %struct.btrfs_fs_info, ptr %0, i64 0, i32 1 %13 = load ptr, ptr %12, align 8, !tbaa !17 %14 = getelementptr inbounds %struct.btrfs_root_item, ptr %13, i64 0, i32 2 %15 = load i32, ptr %14, align 4, !tbaa !12 %16 = getelementptr inbounds %struct.btrfs_super_block, ptr %3, i64 0, i32 4 store i32 %15, ptr %16, align 4, !tbaa !18 %17 = getelementptr inbounds %struct.btrfs_super_block, ptr %3, i64 0, i32 2 %18 = load <2 x i32>, ptr %13, align 4, !tbaa !16 %19 = shufflevector <2 x i32> %18, <2 x i32> poison, <2 x i32> <i32 1, i32 0> store <2 x i32> %19, ptr %17, align 4, !tbaa !16 %20 = load i32, ptr @SPACE_CACHE, align 4, !tbaa !16 %21 = tail call i64 @btrfs_test_opt(ptr noundef %0, i32 noundef %20) #2 %22 = icmp eq i64 %21, 0 br i1 %22, label %26, label %23 23: ; preds = %1 %24 = load i32, ptr %13, align 4, !tbaa !19 %25 = getelementptr inbounds %struct.btrfs_super_block, ptr %3, i64 0, i32 1 store i32 %24, ptr %25, align 4, !tbaa !20 br label %26 26: ; preds = %23, %1 %27 = load i32, ptr @BTRFS_FS_UPDATE_UUID_TREE_GEN, align 4, !tbaa !16 %28 = tail call i64 @test_bit(i32 noundef %27, ptr noundef nonnull %0) #2 %29 = icmp eq i64 %28, 0 br i1 %29, label %32, label %30 30: ; preds = %26 %31 = load i32, ptr %13, align 4, !tbaa !19 store i32 %31, ptr %3, align 4, !tbaa !21 br label %32 32: ; preds = %30, %26 ret void } declare i64 @btrfs_test_opt(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i64 @test_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 24} !6 = !{!"btrfs_fs_info", !7, i64 0, !10, i64 8, !10, i64 16, !10, i64 24} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!6, !10, i64 16} !12 = !{!13, !7, i64 8} !13 = !{!"btrfs_root_item", !7, i64 0, !7, i64 4, !7, i64 8} !14 = !{!15, !7, i64 28} !15 = !{!"btrfs_super_block", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28} !16 = !{!7, !7, i64 0} !17 = !{!6, !10, i64 8} !18 = !{!15, !7, i64 16} !19 = !{!13, !7, i64 0} !20 = !{!15, !7, i64 4} !21 = !{!15, !7, i64 0}
; ModuleID = 'AnghaBench/linux/fs/btrfs/extr_transaction.c_update_super_roots.c' source_filename = "AnghaBench/linux/fs/btrfs/extr_transaction.c_update_super_roots.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SPACE_CACHE = common local_unnamed_addr global i32 0, align 4 @BTRFS_FS_UPDATE_UUID_TREE_GEN = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @update_super_roots], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @update_super_roots(ptr noundef %0) #0 { %2 = getelementptr inbounds i8, ptr %0, i64 24 %3 = load ptr, ptr %2, align 8, !tbaa !6 %4 = getelementptr inbounds i8, ptr %0, i64 16 %5 = load ptr, ptr %4, align 8, !tbaa !12 %6 = getelementptr inbounds i8, ptr %5, i64 8 %7 = load i32, ptr %6, align 4, !tbaa !13 %8 = getelementptr inbounds i8, ptr %3, i64 28 store i32 %7, ptr %8, align 4, !tbaa !15 %9 = getelementptr inbounds i8, ptr %3, i64 20 %10 = load <2 x i32>, ptr %5, align 4, !tbaa !17 %11 = shufflevector <2 x i32> %10, <2 x i32> poison, <2 x i32> <i32 1, i32 0> store <2 x i32> %11, ptr %9, align 4, !tbaa !17 %12 = getelementptr inbounds i8, ptr %0, i64 8 %13 = load ptr, ptr %12, align 8, !tbaa !18 %14 = getelementptr inbounds i8, ptr %13, i64 8 %15 = load i32, ptr %14, align 4, !tbaa !13 %16 = getelementptr inbounds i8, ptr %3, i64 16 store i32 %15, ptr %16, align 4, !tbaa !19 %17 = getelementptr inbounds i8, ptr %3, i64 8 %18 = load <2 x i32>, ptr %13, align 4, !tbaa !17 %19 = shufflevector <2 x i32> %18, <2 x i32> poison, <2 x i32> <i32 1, i32 0> store <2 x i32> %19, ptr %17, align 4, !tbaa !17 %20 = load i32, ptr @SPACE_CACHE, align 4, !tbaa !17 %21 = tail call i64 @btrfs_test_opt(ptr noundef %0, i32 noundef %20) #2 %22 = icmp eq i64 %21, 0 br i1 %22, label %26, label %23 23: ; preds = %1 %24 = load i32, ptr %13, align 4, !tbaa !20 %25 = getelementptr inbounds i8, ptr %3, i64 4 store i32 %24, ptr %25, align 4, !tbaa !21 br label %26 26: ; preds = %23, %1 %27 = load i32, ptr @BTRFS_FS_UPDATE_UUID_TREE_GEN, align 4, !tbaa !17 %28 = tail call i64 @test_bit(i32 noundef %27, ptr noundef nonnull %0) #2 %29 = icmp eq i64 %28, 0 br i1 %29, label %32, label %30 30: ; preds = %26 %31 = load i32, ptr %13, align 4, !tbaa !20 store i32 %31, ptr %3, align 4, !tbaa !22 br label %32 32: ; preds = %30, %26 ret void } declare i64 @btrfs_test_opt(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i64 @test_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 24} !7 = !{!"btrfs_fs_info", !8, i64 0, !11, i64 8, !11, i64 16, !11, i64 24} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!7, !11, i64 16} !13 = !{!14, !8, i64 8} !14 = !{!"btrfs_root_item", !8, i64 0, !8, i64 4, !8, i64 8} !15 = !{!16, !8, i64 28} !16 = !{!"btrfs_super_block", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !8, i64 24, !8, i64 28} !17 = !{!8, !8, i64 0} !18 = !{!7, !11, i64 8} !19 = !{!16, !8, i64 16} !20 = !{!14, !8, i64 0} !21 = !{!16, !8, i64 4} !22 = !{!16, !8, i64 0}
linux_fs_btrfs_extr_transaction.c_update_super_roots
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/input/keyboard/extr_matrix_keypad.c_enable_row_irqs.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/input/keyboard/extr_matrix_keypad.c_enable_row_irqs.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.matrix_keypad_platform_data = type { i32, ptr } @llvm.compiler.used = appending global [1 x ptr] [ptr @enable_row_irqs], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @enable_row_irqs(ptr nocapture noundef readonly %0) #0 { %2 = load ptr, ptr %0, align 8, !tbaa !5 %3 = load i32, ptr %2, align 8, !tbaa !10 %4 = icmp sgt i32 %3, 0 br i1 %4, label %5, label %18 5: ; preds = %1 %6 = getelementptr inbounds %struct.matrix_keypad_platform_data, ptr %2, i64 0, i32 1 br label %7 7: ; preds = %5, %7 %8 = phi i64 [ 0, %5 ], [ %14, %7 ] %9 = load ptr, ptr %6, align 8, !tbaa !13 %10 = getelementptr inbounds i32, ptr %9, i64 %8 %11 = load i32, ptr %10, align 4, !tbaa !14 %12 = tail call i32 @gpio_to_irq(i32 noundef %11) #2 %13 = tail call i32 @enable_irq(i32 noundef %12) #2 %14 = add nuw nsw i64 %8, 1 %15 = load i32, ptr %2, align 8, !tbaa !10 %16 = sext i32 %15 to i64 %17 = icmp slt i64 %14, %16 br i1 %17, label %7, label %18, !llvm.loop !15 18: ; preds = %7, %1 ret void } declare i32 @enable_irq(i32 noundef) local_unnamed_addr #1 declare i32 @gpio_to_irq(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"matrix_keypad", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"matrix_keypad_platform_data", !12, i64 0, !7, i64 8} !12 = !{!"int", !8, i64 0} !13 = !{!11, !7, i64 8} !14 = !{!12, !12, i64 0} !15 = distinct !{!15, !16} !16 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/input/keyboard/extr_matrix_keypad.c_enable_row_irqs.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/input/keyboard/extr_matrix_keypad.c_enable_row_irqs.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @enable_row_irqs], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @enable_row_irqs(ptr nocapture noundef readonly %0) #0 { %2 = load ptr, ptr %0, align 8, !tbaa !6 %3 = load i32, ptr %2, align 8, !tbaa !11 %4 = icmp sgt i32 %3, 0 br i1 %4, label %5, label %18 5: ; preds = %1 %6 = getelementptr inbounds i8, ptr %2, i64 8 br label %7 7: ; preds = %5, %7 %8 = phi i64 [ 0, %5 ], [ %14, %7 ] %9 = load ptr, ptr %6, align 8, !tbaa !14 %10 = getelementptr inbounds i32, ptr %9, i64 %8 %11 = load i32, ptr %10, align 4, !tbaa !15 %12 = tail call i32 @gpio_to_irq(i32 noundef %11) #2 %13 = tail call i32 @enable_irq(i32 noundef %12) #2 %14 = add nuw nsw i64 %8, 1 %15 = load i32, ptr %2, align 8, !tbaa !11 %16 = sext i32 %15 to i64 %17 = icmp slt i64 %14, %16 br i1 %17, label %7, label %18, !llvm.loop !16 18: ; preds = %7, %1 ret void } declare i32 @enable_irq(i32 noundef) local_unnamed_addr #1 declare i32 @gpio_to_irq(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"matrix_keypad", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !13, i64 0} !12 = !{!"matrix_keypad_platform_data", !13, i64 0, !8, i64 8} !13 = !{!"int", !9, i64 0} !14 = !{!12, !8, i64 8} !15 = !{!13, !13, i64 0} !16 = distinct !{!16, !17} !17 = !{!"llvm.loop.mustprogress"}
fastsocket_kernel_drivers_input_keyboard_extr_matrix_keypad.c_enable_row_irqs
; ModuleID = 'AnghaBench/fastsocket/kernel/net/sched/extr_sch_cbq.c_cbq_set_lss.c' source_filename = "AnghaBench/fastsocket/kernel/net/sched/extr_sch_cbq.c_cbq_set_lss.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.tc_cbq_lssopt = type { i32, i32, i32, i32, i64, i32, i32 } %struct.cbq_class = type { i64, i32, i32, i32, i32, i32, ptr, ptr, ptr } @TCF_CBQ_LSS_FLAGS = dso_local local_unnamed_addr global i32 0, align 4 @TCF_CBQ_LSS_ISOLATED = dso_local local_unnamed_addr global i32 0, align 4 @TCF_CBQ_LSS_BOUNDED = dso_local local_unnamed_addr global i32 0, align 4 @TCF_CBQ_LSS_EWMA = dso_local local_unnamed_addr global i32 0, align 4 @TCF_CBQ_LSS_AVPKT = dso_local local_unnamed_addr global i32 0, align 4 @TCF_CBQ_LSS_MINIDLE = dso_local local_unnamed_addr global i32 0, align 4 @TCF_CBQ_LSS_MAXIDLE = dso_local local_unnamed_addr global i32 0, align 4 @TCF_CBQ_LSS_OFFTIME = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @cbq_set_lss], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable define internal noundef i32 @cbq_set_lss(ptr nocapture noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = load i32, ptr %1, align 8, !tbaa !5 %4 = load i32, ptr @TCF_CBQ_LSS_FLAGS, align 4, !tbaa !11 %5 = and i32 %4, %3 %6 = icmp eq i32 %5, 0 br i1 %6, label %28, label %7 7: ; preds = %2 %8 = getelementptr inbounds %struct.tc_cbq_lssopt, ptr %1, i64 0, i32 1 %9 = load i32, ptr %8, align 4, !tbaa !12 %10 = load i32, ptr @TCF_CBQ_LSS_ISOLATED, align 4, !tbaa !11 %11 = and i32 %10, %9 %12 = icmp eq i32 %11, 0 br i1 %12, label %13, label %16 13: ; preds = %7 %14 = getelementptr inbounds %struct.cbq_class, ptr %0, i64 0, i32 6 %15 = load ptr, ptr %14, align 8, !tbaa !13 br label %16 16: ; preds = %7, %13 %17 = phi ptr [ %15, %13 ], [ null, %7 ] %18 = getelementptr inbounds %struct.cbq_class, ptr %0, i64 0, i32 8 store ptr %17, ptr %18, align 8, !tbaa !16 %19 = load i32, ptr @TCF_CBQ_LSS_BOUNDED, align 4, !tbaa !11 %20 = and i32 %19, %9 %21 = icmp eq i32 %20, 0 br i1 %21, label %22, label %25 22: ; preds = %16 %23 = getelementptr inbounds %struct.cbq_class, ptr %0, i64 0, i32 6 %24 = load ptr, ptr %23, align 8, !tbaa !13 br label %25 25: ; preds = %16, %22 %26 = phi ptr [ %24, %22 ], [ null, %16 ] %27 = getelementptr inbounds %struct.cbq_class, ptr %0, i64 0, i32 7 store ptr %26, ptr %27, align 8, !tbaa !17 br label %28 28: ; preds = %25, %2 %29 = load i32, ptr @TCF_CBQ_LSS_EWMA, align 4, !tbaa !11 %30 = and i32 %29, %3 %31 = icmp eq i32 %30, 0 br i1 %31, label %36, label %32 32: ; preds = %28 %33 = getelementptr inbounds %struct.tc_cbq_lssopt, ptr %1, i64 0, i32 6 %34 = load i32, ptr %33, align 4, !tbaa !18 %35 = getelementptr inbounds %struct.cbq_class, ptr %0, i64 0, i32 5 store i32 %34, ptr %35, align 8, !tbaa !19 br label %36 36: ; preds = %32, %28 %37 = load i32, ptr @TCF_CBQ_LSS_AVPKT, align 4, !tbaa !11 %38 = and i32 %37, %3 %39 = icmp eq i32 %38, 0 br i1 %39, label %44, label %40 40: ; preds = %36 %41 = getelementptr inbounds %struct.tc_cbq_lssopt, ptr %1, i64 0, i32 5 %42 = load i32, ptr %41, align 8, !tbaa !20 %43 = getelementptr inbounds %struct.cbq_class, ptr %0, i64 0, i32 4 store i32 %42, ptr %43, align 4, !tbaa !21 br label %44 44: ; preds = %40, %36 %45 = load i32, ptr @TCF_CBQ_LSS_MINIDLE, align 4, !tbaa !11 %46 = and i32 %45, %3 %47 = icmp eq i32 %46, 0 br i1 %47, label %52, label %48 48: ; preds = %44 %49 = getelementptr inbounds %struct.tc_cbq_lssopt, ptr %1, i64 0, i32 4 %50 = load i64, ptr %49, align 8, !tbaa !22 %51 = sub nsw i64 0, %50 store i64 %51, ptr %0, align 8, !tbaa !23 br label %52 52: ; preds = %48, %44 %53 = load i32, ptr @TCF_CBQ_LSS_MAXIDLE, align 4, !tbaa !11 %54 = and i32 %53, %3 %55 = icmp eq i32 %54, 0 br i1 %55, label %61, label %56 56: ; preds = %52 %57 = getelementptr inbounds %struct.tc_cbq_lssopt, ptr %1, i64 0, i32 3 %58 = load i32, ptr %57, align 4, !tbaa !24 %59 = getelementptr inbounds %struct.cbq_class, ptr %0, i64 0, i32 3 store i32 %58, ptr %59, align 8, !tbaa !25 %60 = getelementptr inbounds %struct.cbq_class, ptr %0, i64 0, i32 2 store i32 %58, ptr %60, align 4, !tbaa !26 br label %61 61: ; preds = %56, %52 %62 = load i32, ptr @TCF_CBQ_LSS_OFFTIME, align 4, !tbaa !11 %63 = and i32 %62, %3 %64 = icmp eq i32 %63, 0 br i1 %64, label %69, label %65 65: ; preds = %61 %66 = getelementptr inbounds %struct.tc_cbq_lssopt, ptr %1, i64 0, i32 2 %67 = load i32, ptr %66, align 8, !tbaa !27 %68 = getelementptr inbounds %struct.cbq_class, ptr %0, i64 0, i32 1 store i32 %67, ptr %68, align 8, !tbaa !28 br label %69 69: ; preds = %65, %61 ret i32 0 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"tc_cbq_lssopt", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !10, i64 16, !7, i64 24, !7, i64 28} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"long", !8, i64 0} !11 = !{!7, !7, i64 0} !12 = !{!6, !7, i64 4} !13 = !{!14, !15, i64 32} !14 = !{!"cbq_class", !10, i64 0, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !15, i64 32, !15, i64 40, !15, i64 48} !15 = !{!"any pointer", !8, i64 0} !16 = !{!14, !15, i64 48} !17 = !{!14, !15, i64 40} !18 = !{!6, !7, i64 28} !19 = !{!14, !7, i64 24} !20 = !{!6, !7, i64 24} !21 = !{!14, !7, i64 20} !22 = !{!6, !10, i64 16} !23 = !{!14, !10, i64 0} !24 = !{!6, !7, i64 12} !25 = !{!14, !7, i64 16} !26 = !{!14, !7, i64 12} !27 = !{!6, !7, i64 8} !28 = !{!14, !7, i64 8}
; ModuleID = 'AnghaBench/fastsocket/kernel/net/sched/extr_sch_cbq.c_cbq_set_lss.c' source_filename = "AnghaBench/fastsocket/kernel/net/sched/extr_sch_cbq.c_cbq_set_lss.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @TCF_CBQ_LSS_FLAGS = common local_unnamed_addr global i32 0, align 4 @TCF_CBQ_LSS_ISOLATED = common local_unnamed_addr global i32 0, align 4 @TCF_CBQ_LSS_BOUNDED = common local_unnamed_addr global i32 0, align 4 @TCF_CBQ_LSS_EWMA = common local_unnamed_addr global i32 0, align 4 @TCF_CBQ_LSS_AVPKT = common local_unnamed_addr global i32 0, align 4 @TCF_CBQ_LSS_MINIDLE = common local_unnamed_addr global i32 0, align 4 @TCF_CBQ_LSS_MAXIDLE = common local_unnamed_addr global i32 0, align 4 @TCF_CBQ_LSS_OFFTIME = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @cbq_set_lss], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) define internal noundef i32 @cbq_set_lss(ptr nocapture noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = load i32, ptr %1, align 8, !tbaa !6 %4 = load i32, ptr @TCF_CBQ_LSS_FLAGS, align 4, !tbaa !12 %5 = and i32 %4, %3 %6 = icmp eq i32 %5, 0 br i1 %6, label %28, label %7 7: ; preds = %2 %8 = getelementptr inbounds i8, ptr %1, i64 4 %9 = load i32, ptr %8, align 4, !tbaa !13 %10 = load i32, ptr @TCF_CBQ_LSS_ISOLATED, align 4, !tbaa !12 %11 = and i32 %10, %9 %12 = icmp eq i32 %11, 0 br i1 %12, label %13, label %16 13: ; preds = %7 %14 = getelementptr inbounds i8, ptr %0, i64 32 %15 = load ptr, ptr %14, align 8, !tbaa !14 br label %16 16: ; preds = %7, %13 %17 = phi ptr [ %15, %13 ], [ null, %7 ] %18 = getelementptr inbounds i8, ptr %0, i64 48 store ptr %17, ptr %18, align 8, !tbaa !17 %19 = load i32, ptr @TCF_CBQ_LSS_BOUNDED, align 4, !tbaa !12 %20 = and i32 %19, %9 %21 = icmp eq i32 %20, 0 br i1 %21, label %22, label %25 22: ; preds = %16 %23 = getelementptr inbounds i8, ptr %0, i64 32 %24 = load ptr, ptr %23, align 8, !tbaa !14 br label %25 25: ; preds = %16, %22 %26 = phi ptr [ %24, %22 ], [ null, %16 ] %27 = getelementptr inbounds i8, ptr %0, i64 40 store ptr %26, ptr %27, align 8, !tbaa !18 br label %28 28: ; preds = %25, %2 %29 = load i32, ptr @TCF_CBQ_LSS_EWMA, align 4, !tbaa !12 %30 = and i32 %29, %3 %31 = icmp eq i32 %30, 0 br i1 %31, label %36, label %32 32: ; preds = %28 %33 = getelementptr inbounds i8, ptr %1, i64 28 %34 = load i32, ptr %33, align 4, !tbaa !19 %35 = getelementptr inbounds i8, ptr %0, i64 24 store i32 %34, ptr %35, align 8, !tbaa !20 br label %36 36: ; preds = %32, %28 %37 = load i32, ptr @TCF_CBQ_LSS_AVPKT, align 4, !tbaa !12 %38 = and i32 %37, %3 %39 = icmp eq i32 %38, 0 br i1 %39, label %44, label %40 40: ; preds = %36 %41 = getelementptr inbounds i8, ptr %1, i64 24 %42 = load i32, ptr %41, align 8, !tbaa !21 %43 = getelementptr inbounds i8, ptr %0, i64 20 store i32 %42, ptr %43, align 4, !tbaa !22 br label %44 44: ; preds = %40, %36 %45 = load i32, ptr @TCF_CBQ_LSS_MINIDLE, align 4, !tbaa !12 %46 = and i32 %45, %3 %47 = icmp eq i32 %46, 0 br i1 %47, label %52, label %48 48: ; preds = %44 %49 = getelementptr inbounds i8, ptr %1, i64 16 %50 = load i64, ptr %49, align 8, !tbaa !23 %51 = sub nsw i64 0, %50 store i64 %51, ptr %0, align 8, !tbaa !24 br label %52 52: ; preds = %48, %44 %53 = load i32, ptr @TCF_CBQ_LSS_MAXIDLE, align 4, !tbaa !12 %54 = and i32 %53, %3 %55 = icmp eq i32 %54, 0 br i1 %55, label %61, label %56 56: ; preds = %52 %57 = getelementptr inbounds i8, ptr %1, i64 12 %58 = load i32, ptr %57, align 4, !tbaa !25 %59 = getelementptr inbounds i8, ptr %0, i64 16 store i32 %58, ptr %59, align 8, !tbaa !26 %60 = getelementptr inbounds i8, ptr %0, i64 12 store i32 %58, ptr %60, align 4, !tbaa !27 br label %61 61: ; preds = %56, %52 %62 = load i32, ptr @TCF_CBQ_LSS_OFFTIME, align 4, !tbaa !12 %63 = and i32 %62, %3 %64 = icmp eq i32 %63, 0 br i1 %64, label %69, label %65 65: ; preds = %61 %66 = getelementptr inbounds i8, ptr %1, i64 8 %67 = load i32, ptr %66, align 8, !tbaa !28 %68 = getelementptr inbounds i8, ptr %0, i64 8 store i32 %67, ptr %68, align 8, !tbaa !29 br label %69 69: ; preds = %65, %61 ret i32 0 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"tc_cbq_lssopt", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !11, i64 16, !8, i64 24, !8, i64 28} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"long", !9, i64 0} !12 = !{!8, !8, i64 0} !13 = !{!7, !8, i64 4} !14 = !{!15, !16, i64 32} !15 = !{!"cbq_class", !11, i64 0, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !8, i64 24, !16, i64 32, !16, i64 40, !16, i64 48} !16 = !{!"any pointer", !9, i64 0} !17 = !{!15, !16, i64 48} !18 = !{!15, !16, i64 40} !19 = !{!7, !8, i64 28} !20 = !{!15, !8, i64 24} !21 = !{!7, !8, i64 24} !22 = !{!15, !8, i64 20} !23 = !{!7, !11, i64 16} !24 = !{!15, !11, i64 0} !25 = !{!7, !8, i64 12} !26 = !{!15, !8, i64 16} !27 = !{!15, !8, i64 12} !28 = !{!7, !8, i64 8} !29 = !{!15, !8, i64 8}
fastsocket_kernel_net_sched_extr_sch_cbq.c_cbq_set_lss
; ModuleID = 'AnghaBench/radare2/libr/asm/arch/xtensa/gnu/extr_xtensa-isa.c_xtensa_operand_num_regs.c' source_filename = "AnghaBench/radare2/libr/asm/arch/xtensa/gnu/extr_xtensa-isa.c_xtensa_operand_num_regs.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @XTENSA_UNDEFINED = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local i32 @xtensa_operand_num_regs(i64 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 { %4 = inttoptr i64 %0 to ptr %5 = tail call ptr @get_operand(ptr noundef %4, i32 noundef %1, i32 noundef %2) #2 %6 = icmp eq ptr %5, null %7 = select i1 %6, ptr @XTENSA_UNDEFINED, ptr %5 %8 = load i32, ptr %7, align 4, !tbaa !5 ret i32 %8 } declare ptr @get_operand(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/radare2/libr/asm/arch/xtensa/gnu/extr_xtensa-isa.c_xtensa_operand_num_regs.c' source_filename = "AnghaBench/radare2/libr/asm/arch/xtensa/gnu/extr_xtensa-isa.c_xtensa_operand_num_regs.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @XTENSA_UNDEFINED = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @xtensa_operand_num_regs(i64 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 { %4 = inttoptr i64 %0 to ptr %5 = tail call ptr @get_operand(ptr noundef %4, i32 noundef %1, i32 noundef %2) #2 %6 = icmp eq ptr %5, null %7 = select i1 %6, ptr @XTENSA_UNDEFINED, ptr %5 %8 = load i32, ptr %7, align 4, !tbaa !6 ret i32 %8 } declare ptr @get_operand(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
radare2_libr_asm_arch_xtensa_gnu_extr_xtensa-isa.c_xtensa_operand_num_regs
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/usb/gadget/extr_pxa27x_udc.c_ep_is_full.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/usb/gadget/extr_pxa27x_udc.c_ep_is_full.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @UDCCSR = dso_local local_unnamed_addr global i32 0, align 4 @UDCCSR0_IPR = dso_local local_unnamed_addr global i32 0, align 4 @EOPNOTSUPP = dso_local local_unnamed_addr global i32 0, align 4 @UDCCSR_BNF = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ep_is_full], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @ep_is_full(ptr noundef %0) #0 { %2 = tail call i64 @is_ep0(ptr noundef %0) #2 %3 = icmp eq i64 %2, 0 br i1 %3, label %9, label %4 4: ; preds = %1 %5 = load i32, ptr @UDCCSR, align 4, !tbaa !5 %6 = tail call i32 @udc_ep_readl(ptr noundef %0, i32 noundef %5) #2 %7 = load i32, ptr @UDCCSR0_IPR, align 4, !tbaa !5 %8 = and i32 %7, %6 br label %22 9: ; preds = %1 %10 = load i32, ptr %0, align 4, !tbaa !9 %11 = icmp eq i32 %10, 0 br i1 %11, label %12, label %15 12: ; preds = %9 %13 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !5 %14 = sub nsw i32 0, %13 br label %22 15: ; preds = %9 %16 = load i32, ptr @UDCCSR, align 4, !tbaa !5 %17 = tail call i32 @udc_ep_readl(ptr noundef nonnull %0, i32 noundef %16) #2 %18 = load i32, ptr @UDCCSR_BNF, align 4, !tbaa !5 %19 = and i32 %18, %17 %20 = icmp eq i32 %19, 0 %21 = zext i1 %20 to i32 br label %22 22: ; preds = %15, %12, %4 %23 = phi i32 [ %8, %4 ], [ %21, %15 ], [ %14, %12 ] ret i32 %23 } declare i64 @is_ep0(ptr noundef) local_unnamed_addr #1 declare i32 @udc_ep_readl(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"pxa_ep", !6, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/usb/gadget/extr_pxa27x_udc.c_ep_is_full.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/usb/gadget/extr_pxa27x_udc.c_ep_is_full.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @UDCCSR = common local_unnamed_addr global i32 0, align 4 @UDCCSR0_IPR = common local_unnamed_addr global i32 0, align 4 @EOPNOTSUPP = common local_unnamed_addr global i32 0, align 4 @UDCCSR_BNF = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ep_is_full], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @ep_is_full(ptr noundef %0) #0 { %2 = tail call i64 @is_ep0(ptr noundef %0) #2 %3 = icmp eq i64 %2, 0 br i1 %3, label %9, label %4 4: ; preds = %1 %5 = load i32, ptr @UDCCSR, align 4, !tbaa !6 %6 = tail call i32 @udc_ep_readl(ptr noundef %0, i32 noundef %5) #2 %7 = load i32, ptr @UDCCSR0_IPR, align 4, !tbaa !6 %8 = and i32 %7, %6 br label %22 9: ; preds = %1 %10 = load i32, ptr %0, align 4, !tbaa !10 %11 = icmp eq i32 %10, 0 br i1 %11, label %12, label %15 12: ; preds = %9 %13 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !6 %14 = sub nsw i32 0, %13 br label %22 15: ; preds = %9 %16 = load i32, ptr @UDCCSR, align 4, !tbaa !6 %17 = tail call i32 @udc_ep_readl(ptr noundef nonnull %0, i32 noundef %16) #2 %18 = load i32, ptr @UDCCSR_BNF, align 4, !tbaa !6 %19 = and i32 %18, %17 %20 = icmp eq i32 %19, 0 %21 = zext i1 %20 to i32 br label %22 22: ; preds = %15, %12, %4 %23 = phi i32 [ %8, %4 ], [ %21, %15 ], [ %14, %12 ] ret i32 %23 } declare i64 @is_ep0(ptr noundef) local_unnamed_addr #1 declare i32 @udc_ep_readl(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"pxa_ep", !7, i64 0}
fastsocket_kernel_drivers_usb_gadget_extr_pxa27x_udc.c_ep_is_full
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/extr_stk-sensor.c_stk_sensor_configure.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/extr_stk-sensor.c_stk_sensor_configure.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_2__ = type { i32, i32, i64, i64 } @COM7_FMT_QCIF = dso_local local_unnamed_addr global i32 0, align 4 @COM7_FMT_QVGA = dso_local local_unnamed_addr global i32 0, align 4 @COM7_FMT_CIF = dso_local local_unnamed_addr global i32 0, align 4 @COM7_FMT_VGA = dso_local local_unnamed_addr global i32 0, align 4 @COM7_FMT_SXGA = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [21 x i8] c"Unsupported mode %d\0A\00", align 1 @EFAULT = dso_local local_unnamed_addr global i32 0, align 4 @COM7_YUV = dso_local local_unnamed_addr global i32 0, align 4 @ov_fmt_uyvy = dso_local local_unnamed_addr global ptr null, align 8 @ov_fmt_yuyv = dso_local local_unnamed_addr global ptr null, align 8 @COM7_RGB = dso_local local_unnamed_addr global i32 0, align 4 @ov_fmt_rgbp = dso_local local_unnamed_addr global ptr null, align 8 @ov_fmt_rgbr = dso_local local_unnamed_addr global ptr null, align 8 @COM7_PBAYER = dso_local local_unnamed_addr global i32 0, align 4 @ov_fmt_bayer = dso_local local_unnamed_addr global ptr null, align 8 @.str.1 = private unnamed_addr constant [24 x i8] c"Unsupported colorspace\0A\00", align 1 @REG_COM7 = dso_local local_unnamed_addr global i32 0, align 4 @MVFP_FLIP = dso_local local_unnamed_addr global i32 0, align 4 @MVFP_MIRROR = dso_local local_unnamed_addr global i32 0, align 4 @REG_MVFP = dso_local local_unnamed_addr global i32 0, align 4 @REG_TSLB = dso_local local_unnamed_addr global i32 0, align 4 @REG_ADVFH = dso_local local_unnamed_addr global i32 0, align 4 @REG_ADVFL = dso_local local_unnamed_addr global i32 0, align 4 @.str.2 = private unnamed_addr constant [32 x i8] c"stk_sensor_set_hw failed (VGA)\0A\00", align 1 @switch.table.stk_sensor_configure = private unnamed_addr constant [5 x ptr] [ptr @COM7_FMT_VGA, ptr @COM7_FMT_SXGA, ptr @COM7_FMT_QVGA, ptr @COM7_FMT_QCIF, ptr @COM7_FMT_CIF], align 8 @switch.table.stk_sensor_configure.3 = private unnamed_addr constant [5 x i32] [i32 11, i32 0, i32 267, i32 604, i32 412], align 4 @switch.table.stk_sensor_configure.4 = private unnamed_addr constant [5 x ptr] [ptr @COM7_YUV, ptr @COM7_YUV, ptr @COM7_PBAYER, ptr @COM7_RGB, ptr @COM7_RGB], align 8 @switch.table.stk_sensor_configure.5 = private unnamed_addr constant [5 x ptr] [ptr @ov_fmt_yuyv, ptr @ov_fmt_uyvy, ptr @ov_fmt_bayer, ptr @ov_fmt_rgbr, ptr @ov_fmt_rgbp], align 8 ; Function Attrs: nounwind uwtable define dso_local i32 @stk_sensor_configure(ptr noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr %0, align 8, !tbaa !5 %3 = add i32 %2, -133 %4 = icmp ult i32 %3, 5 br i1 %4, label %9, label %5 5: ; preds = %1 %6 = tail call i32 (ptr, ...) @STK_ERROR(ptr noundef nonnull @.str, i32 noundef %2) #2 %7 = load i32, ptr @EFAULT, align 4, !tbaa !12 %8 = sub nsw i32 0, %7 br label %77 9: ; preds = %1 %10 = zext nneg i32 %3 to i64 %11 = getelementptr inbounds [5 x i32], ptr @switch.table.stk_sensor_configure.3, i64 0, i64 %10 %12 = load i32, ptr %11, align 4 %13 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 1 %14 = load i32, ptr %13, align 4, !tbaa !13 %15 = add i32 %14, -128 %16 = icmp ult i32 %15, 5 br i1 %16, label %21, label %17 17: ; preds = %9 %18 = tail call i32 (ptr, ...) @STK_ERROR(ptr noundef nonnull @.str.1) #2 %19 = load i32, ptr @EFAULT, align 4, !tbaa !12 %20 = sub nsw i32 0, %19 br label %77 21: ; preds = %9 %22 = zext nneg i32 %3 to i64 %23 = getelementptr inbounds [5 x ptr], ptr @switch.table.stk_sensor_configure, i64 0, i64 %22 %24 = load ptr, ptr %23, align 8 %25 = load i32, ptr %24, align 4, !tbaa !12 %26 = zext nneg i32 %15 to i64 %27 = getelementptr inbounds [5 x ptr], ptr @switch.table.stk_sensor_configure.4, i64 0, i64 %26 %28 = load ptr, ptr %27, align 8 %29 = zext nneg i32 %15 to i64 %30 = getelementptr inbounds [5 x ptr], ptr @switch.table.stk_sensor_configure.5, i64 0, i64 %29 %31 = load ptr, ptr %30, align 8 %32 = load ptr, ptr %31, align 8, !tbaa !14 %33 = load i32, ptr %28, align 4, !tbaa !12 %34 = or i32 %33, %25 %35 = load i32, ptr @REG_COM7, align 4, !tbaa !12 %36 = tail call i32 @stk_sensor_outb(ptr noundef nonnull %0, i32 noundef %35, i32 noundef %34) #2 %37 = tail call i32 @msleep(i32 noundef 50) #2 %38 = tail call i32 @stk_sensor_write_regvals(ptr noundef nonnull %0, ptr noundef %32) #2 %39 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 2 %40 = load i64, ptr %39, align 8, !tbaa !16 %41 = icmp eq i64 %40, 0 %42 = load i32, ptr @MVFP_FLIP, align 4 %43 = select i1 %41, i32 0, i32 %42 %44 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 3 %45 = load i64, ptr %44, align 8, !tbaa !17 %46 = icmp eq i64 %45, 0 %47 = load i32, ptr @MVFP_MIRROR, align 4 %48 = select i1 %46, i32 0, i32 %47 %49 = or i32 %48, %43 %50 = load i32, ptr @REG_MVFP, align 4, !tbaa !12 %51 = tail call i32 @stk_sensor_outb(ptr noundef nonnull %0, i32 noundef %50, i32 noundef %49) #2 %52 = load i32, ptr %13, align 4, !tbaa !13 %53 = icmp eq i32 %52, 130 br i1 %53, label %54, label %60 54: ; preds = %21 %55 = load i64, ptr %39, align 8, !tbaa !16 %56 = icmp eq i64 %55, 0 br i1 %56, label %57, label %60 57: ; preds = %54 %58 = load i32, ptr @REG_TSLB, align 4, !tbaa !12 %59 = tail call i32 @stk_sensor_outb(ptr noundef nonnull %0, i32 noundef %58, i32 noundef 8) #2 br label %60 60: ; preds = %57, %54, %21 %61 = load i32, ptr @REG_ADVFH, align 4, !tbaa !12 %62 = lshr i32 %12, 8 %63 = tail call i32 @stk_sensor_outb(ptr noundef nonnull %0, i32 noundef %61, i32 noundef %62) #2 %64 = load i32, ptr @REG_ADVFL, align 4, !tbaa !12 %65 = and i32 %12, 223 %66 = tail call i32 @stk_sensor_outb(ptr noundef nonnull %0, i32 noundef %64, i32 noundef %65) #2 %67 = tail call i32 @msleep(i32 noundef 50) #2 %68 = load i32, ptr %0, align 8, !tbaa !5 %69 = icmp eq i32 %68, 133 br i1 %69, label %70, label %75 70: ; preds = %60 %71 = tail call i32 @stk_sensor_set_hw(ptr noundef nonnull %0, i32 noundef 302, i32 noundef 1582, i32 noundef 6, i32 noundef 486) #2 %72 = icmp eq i32 %71, 0 br i1 %72, label %75, label %73 73: ; preds = %70 %74 = tail call i32 (ptr, ...) @STK_ERROR(ptr noundef nonnull @.str.2) #2 br label %75 75: ; preds = %60, %70, %73 %76 = tail call i32 @msleep(i32 noundef 10) #2 br label %77 77: ; preds = %75, %17, %5 %78 = phi i32 [ %8, %5 ], [ %20, %17 ], [ 0, %75 ] ret i32 %78 } declare i32 @STK_ERROR(ptr noundef, ...) local_unnamed_addr #1 declare i32 @stk_sensor_outb(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @msleep(i32 noundef) local_unnamed_addr #1 declare i32 @stk_sensor_write_regvals(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @stk_sensor_set_hw(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !8, i64 0} !6 = !{!"stk_camera", !7, i64 0} !7 = !{!"TYPE_2__", !8, i64 0, !8, i64 4, !11, i64 8, !11, i64 16} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"long", !9, i64 0} !12 = !{!8, !8, i64 0} !13 = !{!6, !8, i64 4} !14 = !{!15, !15, i64 0} !15 = !{!"any pointer", !9, i64 0} !16 = !{!6, !11, i64 8} !17 = !{!6, !11, i64 16}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/video/extr_stk-sensor.c_stk_sensor_configure.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/media/video/extr_stk-sensor.c_stk_sensor_configure.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @COM7_FMT_QCIF = common local_unnamed_addr global i32 0, align 4 @COM7_FMT_QVGA = common local_unnamed_addr global i32 0, align 4 @COM7_FMT_CIF = common local_unnamed_addr global i32 0, align 4 @COM7_FMT_VGA = common local_unnamed_addr global i32 0, align 4 @COM7_FMT_SXGA = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [21 x i8] c"Unsupported mode %d\0A\00", align 1 @EFAULT = common local_unnamed_addr global i32 0, align 4 @COM7_YUV = common local_unnamed_addr global i32 0, align 4 @ov_fmt_uyvy = common local_unnamed_addr global ptr null, align 8 @ov_fmt_yuyv = common local_unnamed_addr global ptr null, align 8 @COM7_RGB = common local_unnamed_addr global i32 0, align 4 @ov_fmt_rgbp = common local_unnamed_addr global ptr null, align 8 @ov_fmt_rgbr = common local_unnamed_addr global ptr null, align 8 @COM7_PBAYER = common local_unnamed_addr global i32 0, align 4 @ov_fmt_bayer = common local_unnamed_addr global ptr null, align 8 @.str.1 = private unnamed_addr constant [24 x i8] c"Unsupported colorspace\0A\00", align 1 @REG_COM7 = common local_unnamed_addr global i32 0, align 4 @MVFP_FLIP = common local_unnamed_addr global i32 0, align 4 @MVFP_MIRROR = common local_unnamed_addr global i32 0, align 4 @REG_MVFP = common local_unnamed_addr global i32 0, align 4 @REG_TSLB = common local_unnamed_addr global i32 0, align 4 @REG_ADVFH = common local_unnamed_addr global i32 0, align 4 @REG_ADVFL = common local_unnamed_addr global i32 0, align 4 @.str.2 = private unnamed_addr constant [32 x i8] c"stk_sensor_set_hw failed (VGA)\0A\00", align 1 @switch.table.stk_sensor_configure = private unnamed_addr constant [5 x ptr] [ptr @COM7_FMT_VGA, ptr @COM7_FMT_SXGA, ptr @COM7_FMT_QVGA, ptr @COM7_FMT_QCIF, ptr @COM7_FMT_CIF], align 8 @switch.table.stk_sensor_configure.3 = private unnamed_addr constant [5 x i32] [i32 11, i32 0, i32 267, i32 604, i32 412], align 4 @switch.table.stk_sensor_configure.4 = private unnamed_addr constant [5 x ptr] [ptr @COM7_YUV, ptr @COM7_YUV, ptr @COM7_PBAYER, ptr @COM7_RGB, ptr @COM7_RGB], align 8 @switch.table.stk_sensor_configure.5 = private unnamed_addr constant [5 x ptr] [ptr @ov_fmt_yuyv, ptr @ov_fmt_uyvy, ptr @ov_fmt_bayer, ptr @ov_fmt_rgbr, ptr @ov_fmt_rgbp], align 8 ; Function Attrs: nounwind ssp uwtable(sync) define range(i32 -2147483647, -2147483648) i32 @stk_sensor_configure(ptr noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr %0, align 8, !tbaa !6 %3 = add i32 %2, -133 %4 = icmp ult i32 %3, 5 br i1 %4, label %9, label %5 5: ; preds = %1 %6 = tail call i32 (ptr, ...) @STK_ERROR(ptr noundef nonnull @.str, i32 noundef %2) #2 %7 = load i32, ptr @EFAULT, align 4, !tbaa !13 %8 = sub nsw i32 0, %7 br label %77 9: ; preds = %1 %10 = zext nneg i32 %3 to i64 %11 = getelementptr inbounds [5 x i32], ptr @switch.table.stk_sensor_configure.3, i64 0, i64 %10 %12 = load i32, ptr %11, align 4 %13 = getelementptr inbounds i8, ptr %0, i64 4 %14 = load i32, ptr %13, align 4, !tbaa !14 %15 = add i32 %14, -128 %16 = icmp ult i32 %15, 5 br i1 %16, label %21, label %17 17: ; preds = %9 %18 = tail call i32 (ptr, ...) @STK_ERROR(ptr noundef nonnull @.str.1) #2 %19 = load i32, ptr @EFAULT, align 4, !tbaa !13 %20 = sub nsw i32 0, %19 br label %77 21: ; preds = %9 %22 = zext nneg i32 %3 to i64 %23 = getelementptr inbounds [5 x ptr], ptr @switch.table.stk_sensor_configure, i64 0, i64 %22 %24 = load ptr, ptr %23, align 8 %25 = load i32, ptr %24, align 4, !tbaa !13 %26 = zext nneg i32 %15 to i64 %27 = getelementptr inbounds [5 x ptr], ptr @switch.table.stk_sensor_configure.4, i64 0, i64 %26 %28 = load ptr, ptr %27, align 8 %29 = zext nneg i32 %15 to i64 %30 = getelementptr inbounds [5 x ptr], ptr @switch.table.stk_sensor_configure.5, i64 0, i64 %29 %31 = load ptr, ptr %30, align 8 %32 = load ptr, ptr %31, align 8, !tbaa !15 %33 = load i32, ptr %28, align 4, !tbaa !13 %34 = or i32 %33, %25 %35 = load i32, ptr @REG_COM7, align 4, !tbaa !13 %36 = tail call i32 @stk_sensor_outb(ptr noundef nonnull %0, i32 noundef %35, i32 noundef %34) #2 %37 = tail call i32 @msleep(i32 noundef 50) #2 %38 = tail call i32 @stk_sensor_write_regvals(ptr noundef nonnull %0, ptr noundef %32) #2 %39 = getelementptr inbounds i8, ptr %0, i64 8 %40 = load i64, ptr %39, align 8, !tbaa !17 %41 = icmp eq i64 %40, 0 %42 = load i32, ptr @MVFP_FLIP, align 4 %43 = select i1 %41, i32 0, i32 %42 %44 = getelementptr inbounds i8, ptr %0, i64 16 %45 = load i64, ptr %44, align 8, !tbaa !18 %46 = icmp eq i64 %45, 0 %47 = load i32, ptr @MVFP_MIRROR, align 4 %48 = select i1 %46, i32 0, i32 %47 %49 = or i32 %48, %43 %50 = load i32, ptr @REG_MVFP, align 4, !tbaa !13 %51 = tail call i32 @stk_sensor_outb(ptr noundef nonnull %0, i32 noundef %50, i32 noundef %49) #2 %52 = load i32, ptr %13, align 4, !tbaa !14 %53 = icmp eq i32 %52, 130 br i1 %53, label %54, label %60 54: ; preds = %21 %55 = load i64, ptr %39, align 8, !tbaa !17 %56 = icmp eq i64 %55, 0 br i1 %56, label %57, label %60 57: ; preds = %54 %58 = load i32, ptr @REG_TSLB, align 4, !tbaa !13 %59 = tail call i32 @stk_sensor_outb(ptr noundef nonnull %0, i32 noundef %58, i32 noundef 8) #2 br label %60 60: ; preds = %57, %54, %21 %61 = load i32, ptr @REG_ADVFH, align 4, !tbaa !13 %62 = lshr i32 %12, 8 %63 = tail call i32 @stk_sensor_outb(ptr noundef nonnull %0, i32 noundef %61, i32 noundef %62) #2 %64 = load i32, ptr @REG_ADVFL, align 4, !tbaa !13 %65 = and i32 %12, 223 %66 = tail call i32 @stk_sensor_outb(ptr noundef nonnull %0, i32 noundef %64, i32 noundef %65) #2 %67 = tail call i32 @msleep(i32 noundef 50) #2 %68 = load i32, ptr %0, align 8, !tbaa !6 %69 = icmp eq i32 %68, 133 br i1 %69, label %70, label %75 70: ; preds = %60 %71 = tail call i32 @stk_sensor_set_hw(ptr noundef nonnull %0, i32 noundef 302, i32 noundef 1582, i32 noundef 6, i32 noundef 486) #2 %72 = icmp eq i32 %71, 0 br i1 %72, label %75, label %73 73: ; preds = %70 %74 = tail call i32 (ptr, ...) @STK_ERROR(ptr noundef nonnull @.str.2) #2 br label %75 75: ; preds = %60, %70, %73 %76 = tail call i32 @msleep(i32 noundef 10) #2 br label %77 77: ; preds = %75, %17, %5 %78 = phi i32 [ %8, %5 ], [ %20, %17 ], [ 0, %75 ] ret i32 %78 } declare i32 @STK_ERROR(ptr noundef, ...) local_unnamed_addr #1 declare i32 @stk_sensor_outb(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @msleep(i32 noundef) local_unnamed_addr #1 declare i32 @stk_sensor_write_regvals(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @stk_sensor_set_hw(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !9, i64 0} !7 = !{!"stk_camera", !8, i64 0} !8 = !{!"TYPE_2__", !9, i64 0, !9, i64 4, !12, i64 8, !12, i64 16} !9 = !{!"int", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"} !12 = !{!"long", !10, i64 0} !13 = !{!9, !9, i64 0} !14 = !{!7, !9, i64 4} !15 = !{!16, !16, i64 0} !16 = !{!"any pointer", !10, i64 0} !17 = !{!7, !12, i64 8} !18 = !{!7, !12, i64 16}
fastsocket_kernel_drivers_media_video_extr_stk-sensor.c_stk_sensor_configure
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_radeon_legacy_crtc.c_radeon_legacy_rmx_mode_set.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_radeon_legacy_crtc.c_radeon_legacy_rmx_mode_set.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.drm_display_mode = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 } %struct.radeon_crtc = type { i32, %struct.drm_display_mode } @RADEON_FP_VERT_STRETCH = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_VERT_STRETCH_RESERVED = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_VERT_AUTO_RATIO_INC = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_FP_HORZ_STRETCH = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_HORZ_FP_LOOP_STRETCH = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_HORZ_AUTO_RATIO_INC = dso_local local_unnamed_addr global i32 0, align 4 @CHIP_RS100 = dso_local local_unnamed_addr global i64 0, align 8 @CHIP_RS200 = dso_local local_unnamed_addr global i64 0, align 8 @RADEON_CRTC_H_CUTOFF_ACTIVE_EN = dso_local local_unnamed_addr global i32 0, align 4 @DRM_MODE_FLAG_NHSYNC = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_CRTC_H_SYNC_POL = dso_local local_unnamed_addr global i32 0, align 4 @DRM_MODE_FLAG_NVSYNC = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_CRTC_V_SYNC_POL = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_HORZ_STRETCH_RATIO_MAX = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_HORZ_STRETCH_RATIO_MASK = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_HORZ_STRETCH_BLEND = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_HORZ_STRETCH_ENABLE = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_VERT_STRETCH_RATIO_MAX = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_VERT_STRETCH_RATIO_MASK = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_VERT_STRETCH_ENABLE = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_VERT_STRETCH_BLEND = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_CRTC_AUTO_HORZ_CENTER_EN = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_CRTC_AUTO_VERT_CENTER_EN = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_CRTC_MORE_CNTL = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_FP_HORZ_VERT_ACTIVE = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_FP_H_SYNC_STRT_WID = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_FP_V_SYNC_STRT_WID = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_FP_CRTC_H_TOTAL_DISP = dso_local local_unnamed_addr global i32 0, align 4 @RADEON_FP_CRTC_V_TOTAL_DISP = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @radeon_legacy_rmx_mode_set], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @radeon_legacy_rmx_mode_set(ptr noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = load ptr, ptr %0, align 8, !tbaa !5 %4 = load ptr, ptr %3, align 8, !tbaa !10 %5 = tail call ptr @to_radeon_crtc(ptr noundef nonnull %0) #3 %6 = load i32, ptr %1, align 4, !tbaa !12 %7 = getelementptr inbounds %struct.drm_display_mode, ptr %1, i64 0, i32 1 %8 = load i32, ptr %7, align 4, !tbaa !15 %9 = getelementptr inbounds %struct.radeon_crtc, ptr %5, i64 0, i32 1 %10 = load i32, ptr @RADEON_FP_VERT_STRETCH, align 4, !tbaa !16 %11 = tail call i32 @RREG32(i32 noundef %10) #3 %12 = load i32, ptr @RADEON_VERT_STRETCH_RESERVED, align 4, !tbaa !16 %13 = load i32, ptr @RADEON_VERT_AUTO_RATIO_INC, align 4, !tbaa !16 %14 = or i32 %13, %12 %15 = and i32 %14, %11 %16 = load i32, ptr @RADEON_FP_HORZ_STRETCH, align 4, !tbaa !16 %17 = tail call i32 @RREG32(i32 noundef %16) #3 %18 = load i32, ptr @RADEON_HORZ_FP_LOOP_STRETCH, align 4, !tbaa !16 %19 = load i32, ptr @RADEON_HORZ_AUTO_RATIO_INC, align 4, !tbaa !16 %20 = load i64, ptr %4, align 8, !tbaa !17 %21 = load i64, ptr @CHIP_RS100, align 8, !tbaa !20 %22 = icmp eq i64 %20, %21 %23 = load i64, ptr @CHIP_RS200, align 8 %24 = icmp eq i64 %20, %23 %25 = select i1 %22, i1 true, i1 %24 %26 = load i32, ptr @RADEON_CRTC_H_CUTOFF_ACTIVE_EN, align 4 %27 = select i1 %25, i32 %26, i32 0 %28 = getelementptr inbounds %struct.drm_display_mode, ptr %1, i64 0, i32 2 %29 = load i32, ptr %28, align 4, !tbaa !21 %30 = sdiv i32 %29, 8 %31 = add nsw i32 %30, 1023 %32 = getelementptr inbounds %struct.drm_display_mode, ptr %1, i64 0, i32 3 %33 = load i32, ptr %32, align 4, !tbaa !22 %34 = getelementptr inbounds %struct.drm_display_mode, ptr %1, i64 0, i32 4 %35 = load i32, ptr %34, align 4, !tbaa !23 %36 = getelementptr inbounds %struct.drm_display_mode, ptr %1, i64 0, i32 5 %37 = load i32, ptr %36, align 4, !tbaa !24 %38 = add i32 %37, 8184 %39 = getelementptr inbounds %struct.drm_display_mode, ptr %1, i64 0, i32 6 %40 = load i32, ptr %39, align 4, !tbaa !25 %41 = load i32, ptr @DRM_MODE_FLAG_NHSYNC, align 4, !tbaa !16 %42 = load i32, ptr @RADEON_CRTC_H_SYNC_POL, align 4 %43 = getelementptr inbounds %struct.drm_display_mode, ptr %1, i64 0, i32 7 %44 = load i32, ptr %43, align 4, !tbaa !26 %45 = add i32 %44, 65535 %46 = getelementptr inbounds %struct.drm_display_mode, ptr %1, i64 0, i32 8 %47 = load i32, ptr %46, align 4, !tbaa !27 %48 = getelementptr inbounds %struct.drm_display_mode, ptr %1, i64 0, i32 9 %49 = load i32, ptr %48, align 4, !tbaa !28 %50 = getelementptr inbounds %struct.drm_display_mode, ptr %1, i64 0, i32 10 %51 = load i32, ptr %50, align 4, !tbaa !29 %52 = add i32 %51, 4095 %53 = load i32, ptr @DRM_MODE_FLAG_NVSYNC, align 4, !tbaa !16 %54 = load i32, ptr @RADEON_CRTC_V_SYNC_POL, align 4 %55 = load i32, ptr %9, align 4, !tbaa !12 %56 = icmp eq i32 %55, 0 br i1 %56, label %66, label %57 57: ; preds = %2 %58 = getelementptr inbounds %struct.radeon_crtc, ptr %5, i64 0, i32 1, i32 1 %59 = load i32, ptr %58, align 4, !tbaa !15 %60 = icmp eq i32 %59, 0 br i1 %60, label %66, label %61 61: ; preds = %57 %62 = tail call i32 @llvm.smin.i32(i32 %6, i32 %55) %63 = tail call i32 @llvm.smin.i32(i32 %8, i32 %59) %64 = icmp sle i32 %55, %6 %65 = icmp sle i32 %59, %8 br label %66 66: ; preds = %61, %2, %57 %67 = phi i1 [ true, %57 ], [ true, %2 ], [ %65, %61 ] %68 = phi i1 [ true, %57 ], [ true, %2 ], [ %64, %61 ] %69 = phi i32 [ %8, %57 ], [ %8, %2 ], [ %63, %61 ] %70 = phi i32 [ %6, %57 ], [ %6, %2 ], [ %62, %61 ] %71 = load i32, ptr %5, align 4, !tbaa !30 switch i32 %71, label %154 [ i32 129, label %72 i32 131, label %72 i32 130, label %122 ] 72: ; preds = %66, %66 br i1 %68, label %73, label %77 73: ; preds = %72 %74 = sdiv i32 %70, 8 %75 = shl i32 %74, 16 %76 = add i32 %75, -65536 br label %96 77: ; preds = %72 %78 = and i32 %19, %17 %79 = icmp ne i32 %78, 0 %80 = zext i1 %79 to i32 %81 = add nsw i32 %70, %80 %82 = load i32, ptr @RADEON_HORZ_STRETCH_RATIO_MAX, align 4, !tbaa !16 %83 = mul nsw i32 %82, %81 %84 = sdiv i32 %83, %55 %85 = add nsw i32 %84, 1 %86 = load i32, ptr @RADEON_HORZ_STRETCH_RATIO_MASK, align 4, !tbaa !16 %87 = and i32 %85, %86 %88 = load i32, ptr @RADEON_HORZ_STRETCH_BLEND, align 4, !tbaa !16 %89 = load i32, ptr @RADEON_HORZ_STRETCH_ENABLE, align 4, !tbaa !16 %90 = sdiv i32 %55, 8 %91 = shl i32 %90, 16 %92 = add i32 %91, -65536 %93 = or i32 %88, %92 %94 = or i32 %93, %87 %95 = or i32 %94, %89 br label %96 96: ; preds = %77, %73 %97 = phi i32 [ %95, %77 ], [ %76, %73 ] br i1 %67, label %98, label %101 98: ; preds = %96 %99 = shl i32 %69, 12 %100 = add i32 %99, -4096 br label %160 101: ; preds = %96 %102 = load i32, ptr @RADEON_VERT_AUTO_RATIO_INC, align 4, !tbaa !16 %103 = and i32 %102, %15 %104 = icmp ne i32 %103, 0 %105 = zext i1 %104 to i32 %106 = add nsw i32 %69, %105 %107 = load i32, ptr @RADEON_VERT_STRETCH_RATIO_MAX, align 4, !tbaa !16 %108 = mul nsw i32 %106, %107 %109 = getelementptr inbounds %struct.radeon_crtc, ptr %5, i64 0, i32 1, i32 1 %110 = load i32, ptr %109, align 4, !tbaa !15 %111 = sdiv i32 %108, %110 %112 = add nsw i32 %111, 1 %113 = load i32, ptr @RADEON_VERT_STRETCH_RATIO_MASK, align 4, !tbaa !16 %114 = and i32 %112, %113 %115 = load i32, ptr @RADEON_VERT_STRETCH_ENABLE, align 4, !tbaa !16 %116 = load i32, ptr @RADEON_VERT_STRETCH_BLEND, align 4, !tbaa !16 %117 = shl i32 %110, 12 %118 = add i32 %117, -4096 %119 = or i32 %115, %118 %120 = or i32 %119, %114 %121 = or i32 %120, %116 br label %160 122: ; preds = %66 %123 = sdiv i32 %70, 8 %124 = shl i32 %123, 16 %125 = add i32 %124, -65536 %126 = shl i32 %69, 12 %127 = add i32 %126, -4096 %128 = load i32, ptr @RADEON_CRTC_AUTO_HORZ_CENTER_EN, align 4, !tbaa !16 %129 = load i32, ptr @RADEON_CRTC_AUTO_VERT_CENTER_EN, align 4, !tbaa !16 %130 = or i32 %128, %129 %131 = or i32 %130, %27 %132 = getelementptr inbounds %struct.drm_display_mode, ptr %1, i64 0, i32 11 %133 = load i32, ptr %132, align 4, !tbaa !32 %134 = getelementptr inbounds %struct.drm_display_mode, ptr %1, i64 0, i32 12 %135 = load i32, ptr %134, align 4, !tbaa !33 %136 = sub nsw i32 %133, %135 %137 = sdiv i32 %136, 8 %138 = tail call i32 @llvm.smin.i32(i32 %137, i32 110) %139 = sub nsw i32 %37, %135 %140 = sdiv i32 %139, 8 %141 = getelementptr inbounds %struct.drm_display_mode, ptr %1, i64 0, i32 13 %142 = load i32, ptr %141, align 4, !tbaa !34 %143 = getelementptr inbounds %struct.drm_display_mode, ptr %1, i64 0, i32 14 %144 = load i32, ptr %143, align 4, !tbaa !35 %145 = sub nsw i32 %142, %144 %146 = sub nsw i32 %51, %144 %147 = getelementptr inbounds %struct.radeon_crtc, ptr %5, i64 0, i32 1, i32 1 %148 = load i32, ptr %147, align 4, !tbaa !15 %149 = and i32 %148, 4095 %150 = sdiv i32 %55, 8 %151 = shl i32 %150, 16 %152 = and i32 %151, 33488896 %153 = or disjoint i32 %149, %152 br label %160 154: ; preds = %66 %155 = sdiv i32 %70, 8 %156 = shl i32 %155, 16 %157 = add i32 %156, -65536 %158 = shl i32 %69, 12 %159 = add i32 %158, -4096 br label %160 160: ; preds = %98, %101, %154, %122 %161 = phi i32 [ %27, %154 ], [ %131, %122 ], [ %27, %101 ], [ %27, %98 ] %162 = phi i32 [ %157, %154 ], [ %125, %122 ], [ %97, %101 ], [ %97, %98 ] %163 = phi i32 [ %159, %154 ], [ %127, %122 ], [ %121, %101 ], [ %100, %98 ] %164 = phi i32 [ 0, %154 ], [ %153, %122 ], [ 0, %101 ], [ 0, %98 ] %165 = phi i32 [ %38, %154 ], [ %140, %122 ], [ %38, %101 ], [ %38, %98 ] %166 = phi i32 [ %31, %154 ], [ %138, %122 ], [ %31, %101 ], [ %31, %98 ] %167 = phi i32 [ %52, %154 ], [ %146, %122 ], [ %52, %101 ], [ %52, %98 ] %168 = phi i32 [ %45, %154 ], [ %145, %122 ], [ %45, %101 ], [ %45, %98 ] %169 = shl i32 %47, 16 %170 = add i32 %169, -65536 %171 = and i32 %168, 65535 %172 = or disjoint i32 %171, %170 %173 = and i32 %53, %40 %174 = icmp eq i32 %173, 0 %175 = select i1 %174, i32 0, i32 %54 %176 = icmp eq i32 %49, %51 %177 = sub nsw i32 %49, %51 %178 = shl i32 %177, 16 %179 = and i32 %178, 2031616 %180 = select i1 %176, i32 65536, i32 %179 %181 = and i32 %167, 4095 %182 = or i32 %175, %180 %183 = or i32 %182, %181 %184 = sdiv i32 %33, 8 %185 = shl i32 %184, 16 %186 = add i32 %185, 33488896 %187 = and i32 %186, 33488896 %188 = and i32 %166, 1023 %189 = or disjoint i32 %188, %187 %190 = and i32 %41, %40 %191 = icmp eq i32 %190, 0 %192 = select i1 %191, i32 0, i32 %42 %193 = sub nsw i32 %35, %37 %194 = add i32 %193, 7 %195 = icmp ult i32 %194, 15 %196 = sdiv i32 %193, 8 %197 = shl i32 %196, 16 %198 = and i32 %197, 4128768 %199 = select i1 %195, i32 65536, i32 %198 %200 = and i32 %165, 8191 %201 = or i32 %192, %199 %202 = or i32 %201, %200 %203 = or i32 %19, %18 %204 = and i32 %203, %17 %205 = or i32 %163, %15 %206 = or i32 %162, %204 %207 = load i32, ptr @RADEON_FP_HORZ_STRETCH, align 4, !tbaa !16 %208 = tail call i32 @WREG32(i32 noundef %207, i32 noundef %206) #3 %209 = load i32, ptr @RADEON_FP_VERT_STRETCH, align 4, !tbaa !16 %210 = tail call i32 @WREG32(i32 noundef %209, i32 noundef %205) #3 %211 = load i32, ptr @RADEON_CRTC_MORE_CNTL, align 4, !tbaa !16 %212 = tail call i32 @WREG32(i32 noundef %211, i32 noundef %161) #3 %213 = load i32, ptr @RADEON_FP_HORZ_VERT_ACTIVE, align 4, !tbaa !16 %214 = tail call i32 @WREG32(i32 noundef %213, i32 noundef %164) #3 %215 = load i32, ptr @RADEON_FP_H_SYNC_STRT_WID, align 4, !tbaa !16 %216 = tail call i32 @WREG32(i32 noundef %215, i32 noundef %202) #3 %217 = load i32, ptr @RADEON_FP_V_SYNC_STRT_WID, align 4, !tbaa !16 %218 = tail call i32 @WREG32(i32 noundef %217, i32 noundef %183) #3 %219 = load i32, ptr @RADEON_FP_CRTC_H_TOTAL_DISP, align 4, !tbaa !16 %220 = tail call i32 @WREG32(i32 noundef %219, i32 noundef %189) #3 %221 = load i32, ptr @RADEON_FP_CRTC_V_TOTAL_DISP, align 4, !tbaa !16 %222 = tail call i32 @WREG32(i32 noundef %221, i32 noundef %172) #3 ret void } declare ptr @to_radeon_crtc(ptr noundef) local_unnamed_addr #1 declare i32 @RREG32(i32 noundef) local_unnamed_addr #1 declare i32 @WREG32(i32 noundef, i32 noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.smin.i32(i32, i32) #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"drm_crtc", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"drm_device", !7, i64 0} !12 = !{!13, !14, i64 0} !13 = !{!"drm_display_mode", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16, !14, i64 20, !14, i64 24, !14, i64 28, !14, i64 32, !14, i64 36, !14, i64 40, !14, i64 44, !14, i64 48, !14, i64 52, !14, i64 56} !14 = !{!"int", !8, i64 0} !15 = !{!13, !14, i64 4} !16 = !{!14, !14, i64 0} !17 = !{!18, !19, i64 0} !18 = !{!"radeon_device", !19, i64 0} !19 = !{!"long", !8, i64 0} !20 = !{!19, !19, i64 0} !21 = !{!13, !14, i64 8} !22 = !{!13, !14, i64 12} !23 = !{!13, !14, i64 16} !24 = !{!13, !14, i64 20} !25 = !{!13, !14, i64 24} !26 = !{!13, !14, i64 28} !27 = !{!13, !14, i64 32} !28 = !{!13, !14, i64 36} !29 = !{!13, !14, i64 40} !30 = !{!31, !14, i64 0} !31 = !{!"radeon_crtc", !14, i64 0, !13, i64 4} !32 = !{!13, !14, i64 44} !33 = !{!13, !14, i64 48} !34 = !{!13, !14, i64 52} !35 = !{!13, !14, i64 56}
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_radeon_legacy_crtc.c_radeon_legacy_rmx_mode_set.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_radeon_legacy_crtc.c_radeon_legacy_rmx_mode_set.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @RADEON_FP_VERT_STRETCH = common local_unnamed_addr global i32 0, align 4 @RADEON_VERT_STRETCH_RESERVED = common local_unnamed_addr global i32 0, align 4 @RADEON_VERT_AUTO_RATIO_INC = common local_unnamed_addr global i32 0, align 4 @RADEON_FP_HORZ_STRETCH = common local_unnamed_addr global i32 0, align 4 @RADEON_HORZ_FP_LOOP_STRETCH = common local_unnamed_addr global i32 0, align 4 @RADEON_HORZ_AUTO_RATIO_INC = common local_unnamed_addr global i32 0, align 4 @CHIP_RS100 = common local_unnamed_addr global i64 0, align 8 @CHIP_RS200 = common local_unnamed_addr global i64 0, align 8 @RADEON_CRTC_H_CUTOFF_ACTIVE_EN = common local_unnamed_addr global i32 0, align 4 @DRM_MODE_FLAG_NHSYNC = common local_unnamed_addr global i32 0, align 4 @RADEON_CRTC_H_SYNC_POL = common local_unnamed_addr global i32 0, align 4 @DRM_MODE_FLAG_NVSYNC = common local_unnamed_addr global i32 0, align 4 @RADEON_CRTC_V_SYNC_POL = common local_unnamed_addr global i32 0, align 4 @RADEON_HORZ_STRETCH_RATIO_MAX = common local_unnamed_addr global i32 0, align 4 @RADEON_HORZ_STRETCH_RATIO_MASK = common local_unnamed_addr global i32 0, align 4 @RADEON_HORZ_STRETCH_BLEND = common local_unnamed_addr global i32 0, align 4 @RADEON_HORZ_STRETCH_ENABLE = common local_unnamed_addr global i32 0, align 4 @RADEON_VERT_STRETCH_RATIO_MAX = common local_unnamed_addr global i32 0, align 4 @RADEON_VERT_STRETCH_RATIO_MASK = common local_unnamed_addr global i32 0, align 4 @RADEON_VERT_STRETCH_ENABLE = common local_unnamed_addr global i32 0, align 4 @RADEON_VERT_STRETCH_BLEND = common local_unnamed_addr global i32 0, align 4 @RADEON_CRTC_AUTO_HORZ_CENTER_EN = common local_unnamed_addr global i32 0, align 4 @RADEON_CRTC_AUTO_VERT_CENTER_EN = common local_unnamed_addr global i32 0, align 4 @RADEON_CRTC_MORE_CNTL = common local_unnamed_addr global i32 0, align 4 @RADEON_FP_HORZ_VERT_ACTIVE = common local_unnamed_addr global i32 0, align 4 @RADEON_FP_H_SYNC_STRT_WID = common local_unnamed_addr global i32 0, align 4 @RADEON_FP_V_SYNC_STRT_WID = common local_unnamed_addr global i32 0, align 4 @RADEON_FP_CRTC_H_TOTAL_DISP = common local_unnamed_addr global i32 0, align 4 @RADEON_FP_CRTC_V_TOTAL_DISP = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @radeon_legacy_rmx_mode_set], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @radeon_legacy_rmx_mode_set(ptr noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = load ptr, ptr %0, align 8, !tbaa !6 %4 = load ptr, ptr %3, align 8, !tbaa !11 %5 = tail call ptr @to_radeon_crtc(ptr noundef nonnull %0) #3 %6 = load i32, ptr %1, align 4, !tbaa !13 %7 = getelementptr inbounds i8, ptr %1, i64 4 %8 = load i32, ptr %7, align 4, !tbaa !16 %9 = getelementptr inbounds i8, ptr %5, i64 4 %10 = load i32, ptr @RADEON_FP_VERT_STRETCH, align 4, !tbaa !17 %11 = tail call i32 @RREG32(i32 noundef %10) #3 %12 = load i32, ptr @RADEON_VERT_STRETCH_RESERVED, align 4, !tbaa !17 %13 = load i32, ptr @RADEON_VERT_AUTO_RATIO_INC, align 4, !tbaa !17 %14 = or i32 %13, %12 %15 = and i32 %14, %11 %16 = load i32, ptr @RADEON_FP_HORZ_STRETCH, align 4, !tbaa !17 %17 = tail call i32 @RREG32(i32 noundef %16) #3 %18 = load i32, ptr @RADEON_HORZ_FP_LOOP_STRETCH, align 4, !tbaa !17 %19 = load i32, ptr @RADEON_HORZ_AUTO_RATIO_INC, align 4, !tbaa !17 %20 = load i64, ptr %4, align 8, !tbaa !18 %21 = load i64, ptr @CHIP_RS100, align 8, !tbaa !21 %22 = icmp eq i64 %20, %21 %23 = load i64, ptr @CHIP_RS200, align 8 %24 = icmp eq i64 %20, %23 %25 = select i1 %22, i1 true, i1 %24 %26 = load i32, ptr @RADEON_CRTC_H_CUTOFF_ACTIVE_EN, align 4 %27 = select i1 %25, i32 %26, i32 0 %28 = getelementptr inbounds i8, ptr %1, i64 8 %29 = load i32, ptr %28, align 4, !tbaa !22 %30 = sdiv i32 %29, 8 %31 = add nsw i32 %30, 1023 %32 = getelementptr inbounds i8, ptr %1, i64 12 %33 = load i32, ptr %32, align 4, !tbaa !23 %34 = getelementptr inbounds i8, ptr %1, i64 16 %35 = load i32, ptr %34, align 4, !tbaa !24 %36 = getelementptr inbounds i8, ptr %1, i64 20 %37 = load i32, ptr %36, align 4, !tbaa !25 %38 = add i32 %37, 8184 %39 = getelementptr inbounds i8, ptr %1, i64 24 %40 = load i32, ptr %39, align 4, !tbaa !26 %41 = load i32, ptr @DRM_MODE_FLAG_NHSYNC, align 4, !tbaa !17 %42 = load i32, ptr @RADEON_CRTC_H_SYNC_POL, align 4 %43 = getelementptr inbounds i8, ptr %1, i64 28 %44 = load i32, ptr %43, align 4, !tbaa !27 %45 = add i32 %44, 65535 %46 = getelementptr inbounds i8, ptr %1, i64 32 %47 = load i32, ptr %46, align 4, !tbaa !28 %48 = getelementptr inbounds i8, ptr %1, i64 36 %49 = load i32, ptr %48, align 4, !tbaa !29 %50 = getelementptr inbounds i8, ptr %1, i64 40 %51 = load i32, ptr %50, align 4, !tbaa !30 %52 = add i32 %51, 4095 %53 = load i32, ptr @DRM_MODE_FLAG_NVSYNC, align 4, !tbaa !17 %54 = load i32, ptr @RADEON_CRTC_V_SYNC_POL, align 4 %55 = load i32, ptr %9, align 4, !tbaa !13 %56 = icmp eq i32 %55, 0 br i1 %56, label %66, label %57 57: ; preds = %2 %58 = getelementptr inbounds i8, ptr %5, i64 8 %59 = load i32, ptr %58, align 4, !tbaa !16 %60 = icmp eq i32 %59, 0 br i1 %60, label %66, label %61 61: ; preds = %57 %62 = tail call i32 @llvm.smin.i32(i32 %6, i32 %55) %63 = tail call i32 @llvm.smin.i32(i32 %8, i32 %59) %64 = icmp sle i32 %55, %6 %65 = icmp sle i32 %59, %8 br label %66 66: ; preds = %61, %2, %57 %67 = phi i1 [ true, %57 ], [ true, %2 ], [ %65, %61 ] %68 = phi i1 [ true, %57 ], [ true, %2 ], [ %64, %61 ] %69 = phi i32 [ %8, %57 ], [ %8, %2 ], [ %63, %61 ] %70 = phi i32 [ %6, %57 ], [ %6, %2 ], [ %62, %61 ] %71 = load i32, ptr %5, align 4, !tbaa !31 switch i32 %71, label %154 [ i32 129, label %72 i32 131, label %72 i32 130, label %122 ] 72: ; preds = %66, %66 br i1 %68, label %73, label %77 73: ; preds = %72 %74 = sdiv i32 %70, 8 %75 = shl i32 %74, 16 %76 = add i32 %75, -65536 br label %96 77: ; preds = %72 %78 = and i32 %19, %17 %79 = icmp ne i32 %78, 0 %80 = zext i1 %79 to i32 %81 = add nsw i32 %70, %80 %82 = load i32, ptr @RADEON_HORZ_STRETCH_RATIO_MAX, align 4, !tbaa !17 %83 = mul nsw i32 %82, %81 %84 = sdiv i32 %83, %55 %85 = add nsw i32 %84, 1 %86 = load i32, ptr @RADEON_HORZ_STRETCH_RATIO_MASK, align 4, !tbaa !17 %87 = and i32 %85, %86 %88 = load i32, ptr @RADEON_HORZ_STRETCH_BLEND, align 4, !tbaa !17 %89 = load i32, ptr @RADEON_HORZ_STRETCH_ENABLE, align 4, !tbaa !17 %90 = sdiv i32 %55, 8 %91 = shl i32 %90, 16 %92 = add i32 %91, -65536 %93 = or i32 %88, %92 %94 = or i32 %93, %87 %95 = or i32 %94, %89 br label %96 96: ; preds = %77, %73 %97 = phi i32 [ %95, %77 ], [ %76, %73 ] br i1 %67, label %98, label %101 98: ; preds = %96 %99 = shl i32 %69, 12 %100 = add i32 %99, -4096 br label %160 101: ; preds = %96 %102 = load i32, ptr @RADEON_VERT_AUTO_RATIO_INC, align 4, !tbaa !17 %103 = and i32 %102, %15 %104 = icmp ne i32 %103, 0 %105 = zext i1 %104 to i32 %106 = add nsw i32 %69, %105 %107 = load i32, ptr @RADEON_VERT_STRETCH_RATIO_MAX, align 4, !tbaa !17 %108 = mul nsw i32 %106, %107 %109 = getelementptr inbounds i8, ptr %5, i64 8 %110 = load i32, ptr %109, align 4, !tbaa !16 %111 = sdiv i32 %108, %110 %112 = add nsw i32 %111, 1 %113 = load i32, ptr @RADEON_VERT_STRETCH_RATIO_MASK, align 4, !tbaa !17 %114 = and i32 %112, %113 %115 = load i32, ptr @RADEON_VERT_STRETCH_ENABLE, align 4, !tbaa !17 %116 = load i32, ptr @RADEON_VERT_STRETCH_BLEND, align 4, !tbaa !17 %117 = shl i32 %110, 12 %118 = add i32 %117, -4096 %119 = or i32 %115, %118 %120 = or i32 %119, %114 %121 = or i32 %120, %116 br label %160 122: ; preds = %66 %123 = sdiv i32 %70, 8 %124 = shl i32 %123, 16 %125 = add i32 %124, -65536 %126 = shl i32 %69, 12 %127 = add i32 %126, -4096 %128 = load i32, ptr @RADEON_CRTC_AUTO_HORZ_CENTER_EN, align 4, !tbaa !17 %129 = load i32, ptr @RADEON_CRTC_AUTO_VERT_CENTER_EN, align 4, !tbaa !17 %130 = or i32 %128, %129 %131 = or i32 %130, %27 %132 = getelementptr inbounds i8, ptr %1, i64 44 %133 = load i32, ptr %132, align 4, !tbaa !33 %134 = getelementptr inbounds i8, ptr %1, i64 48 %135 = load i32, ptr %134, align 4, !tbaa !34 %136 = sub nsw i32 %133, %135 %137 = sdiv i32 %136, 8 %138 = tail call i32 @llvm.smin.i32(i32 %137, i32 110) %139 = sub nsw i32 %37, %135 %140 = sdiv i32 %139, 8 %141 = getelementptr inbounds i8, ptr %1, i64 52 %142 = load i32, ptr %141, align 4, !tbaa !35 %143 = getelementptr inbounds i8, ptr %1, i64 56 %144 = load i32, ptr %143, align 4, !tbaa !36 %145 = sub nsw i32 %142, %144 %146 = sub nsw i32 %51, %144 %147 = getelementptr inbounds i8, ptr %5, i64 8 %148 = load i32, ptr %147, align 4, !tbaa !16 %149 = and i32 %148, 4095 %150 = sdiv i32 %55, 8 %151 = shl i32 %150, 16 %152 = and i32 %151, 33488896 %153 = or disjoint i32 %149, %152 br label %160 154: ; preds = %66 %155 = sdiv i32 %70, 8 %156 = shl i32 %155, 16 %157 = add i32 %156, -65536 %158 = shl i32 %69, 12 %159 = add i32 %158, -4096 br label %160 160: ; preds = %98, %101, %154, %122 %161 = phi i32 [ %27, %154 ], [ %131, %122 ], [ %27, %101 ], [ %27, %98 ] %162 = phi i32 [ %157, %154 ], [ %125, %122 ], [ %97, %101 ], [ %97, %98 ] %163 = phi i32 [ %159, %154 ], [ %127, %122 ], [ %121, %101 ], [ %100, %98 ] %164 = phi i32 [ 0, %154 ], [ %153, %122 ], [ 0, %101 ], [ 0, %98 ] %165 = phi i32 [ %38, %154 ], [ %140, %122 ], [ %38, %101 ], [ %38, %98 ] %166 = phi i32 [ %31, %154 ], [ %138, %122 ], [ %31, %101 ], [ %31, %98 ] %167 = phi i32 [ %52, %154 ], [ %146, %122 ], [ %52, %101 ], [ %52, %98 ] %168 = phi i32 [ %45, %154 ], [ %145, %122 ], [ %45, %101 ], [ %45, %98 ] %169 = shl i32 %47, 16 %170 = add i32 %169, -65536 %171 = and i32 %168, 65535 %172 = or disjoint i32 %171, %170 %173 = and i32 %53, %40 %174 = icmp eq i32 %173, 0 %175 = select i1 %174, i32 0, i32 %54 %176 = icmp eq i32 %49, %51 %177 = sub nsw i32 %49, %51 %178 = shl i32 %177, 16 %179 = and i32 %178, 2031616 %180 = select i1 %176, i32 65536, i32 %179 %181 = and i32 %167, 4095 %182 = or i32 %175, %180 %183 = or i32 %182, %181 %184 = sdiv i32 %33, 8 %185 = shl i32 %184, 16 %186 = add i32 %185, 33488896 %187 = and i32 %186, 33488896 %188 = and i32 %166, 1023 %189 = or disjoint i32 %188, %187 %190 = and i32 %41, %40 %191 = icmp eq i32 %190, 0 %192 = select i1 %191, i32 0, i32 %42 %193 = sub nsw i32 %35, %37 %194 = add i32 %193, 7 %195 = icmp ult i32 %194, 15 %196 = sdiv i32 %193, 8 %197 = shl i32 %196, 16 %198 = and i32 %197, 4128768 %199 = select i1 %195, i32 65536, i32 %198 %200 = and i32 %165, 8191 %201 = or i32 %192, %199 %202 = or i32 %201, %200 %203 = or i32 %19, %18 %204 = and i32 %203, %17 %205 = or i32 %163, %15 %206 = or i32 %162, %204 %207 = load i32, ptr @RADEON_FP_HORZ_STRETCH, align 4, !tbaa !17 %208 = tail call i32 @WREG32(i32 noundef %207, i32 noundef %206) #3 %209 = load i32, ptr @RADEON_FP_VERT_STRETCH, align 4, !tbaa !17 %210 = tail call i32 @WREG32(i32 noundef %209, i32 noundef %205) #3 %211 = load i32, ptr @RADEON_CRTC_MORE_CNTL, align 4, !tbaa !17 %212 = tail call i32 @WREG32(i32 noundef %211, i32 noundef %161) #3 %213 = load i32, ptr @RADEON_FP_HORZ_VERT_ACTIVE, align 4, !tbaa !17 %214 = tail call i32 @WREG32(i32 noundef %213, i32 noundef %164) #3 %215 = load i32, ptr @RADEON_FP_H_SYNC_STRT_WID, align 4, !tbaa !17 %216 = tail call i32 @WREG32(i32 noundef %215, i32 noundef %202) #3 %217 = load i32, ptr @RADEON_FP_V_SYNC_STRT_WID, align 4, !tbaa !17 %218 = tail call i32 @WREG32(i32 noundef %217, i32 noundef %183) #3 %219 = load i32, ptr @RADEON_FP_CRTC_H_TOTAL_DISP, align 4, !tbaa !17 %220 = tail call i32 @WREG32(i32 noundef %219, i32 noundef %189) #3 %221 = load i32, ptr @RADEON_FP_CRTC_V_TOTAL_DISP, align 4, !tbaa !17 %222 = tail call i32 @WREG32(i32 noundef %221, i32 noundef %172) #3 ret void } declare ptr @to_radeon_crtc(ptr noundef) local_unnamed_addr #1 declare i32 @RREG32(i32 noundef) local_unnamed_addr #1 declare i32 @WREG32(i32 noundef, i32 noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.smin.i32(i32, i32) #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"drm_crtc", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 0} !12 = !{!"drm_device", !8, i64 0} !13 = !{!14, !15, i64 0} !14 = !{!"drm_display_mode", !15, i64 0, !15, i64 4, !15, i64 8, !15, i64 12, !15, i64 16, !15, i64 20, !15, i64 24, !15, i64 28, !15, i64 32, !15, i64 36, !15, i64 40, !15, i64 44, !15, i64 48, !15, i64 52, !15, i64 56} !15 = !{!"int", !9, i64 0} !16 = !{!14, !15, i64 4} !17 = !{!15, !15, i64 0} !18 = !{!19, !20, i64 0} !19 = !{!"radeon_device", !20, i64 0} !20 = !{!"long", !9, i64 0} !21 = !{!20, !20, i64 0} !22 = !{!14, !15, i64 8} !23 = !{!14, !15, i64 12} !24 = !{!14, !15, i64 16} !25 = !{!14, !15, i64 20} !26 = !{!14, !15, i64 24} !27 = !{!14, !15, i64 28} !28 = !{!14, !15, i64 32} !29 = !{!14, !15, i64 36} !30 = !{!14, !15, i64 40} !31 = !{!32, !15, i64 0} !32 = !{!"radeon_crtc", !15, i64 0, !14, i64 4} !33 = !{!14, !15, i64 44} !34 = !{!14, !15, i64 48} !35 = !{!14, !15, i64 52} !36 = !{!14, !15, i64 56}
linux_drivers_gpu_drm_radeon_extr_radeon_legacy_crtc.c_radeon_legacy_rmx_mode_set
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/extr_vmap.c_nvbios_vmap_entry.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/extr_vmap.c_nvbios_vmap_entry.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local i32 @nvbios_vmap_entry(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 { %5 = alloca i32, align 4 %6 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3 %7 = call i32 @nvbios_vmap_table(ptr noundef %0, ptr noundef %2, ptr noundef nonnull %5, ptr noundef nonnull %6, ptr noundef %3) #3 %8 = icmp ne i32 %7, 0 %9 = load i32, ptr %6, align 4 %10 = icmp sgt i32 %9, %1 %11 = select i1 %8, i1 %10, i1 false br i1 %11, label %12, label %18 12: ; preds = %4 %13 = load i32, ptr %5, align 4, !tbaa !5 %14 = add nsw i32 %13, %7 %15 = load i32, ptr %3, align 4, !tbaa !5 %16 = mul nsw i32 %15, %1 %17 = add nsw i32 %14, %16 br label %18 18: ; preds = %4, %12 %19 = phi i32 [ %17, %12 ], [ 0, %4 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3 ret i32 %19 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @nvbios_vmap_table(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/extr_vmap.c_nvbios_vmap_entry.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/nouveau/nvkm/subdev/bios/extr_vmap.c_nvbios_vmap_entry.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define i32 @nvbios_vmap_entry(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 { %5 = alloca i32, align 4 %6 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3 %7 = call i32 @nvbios_vmap_table(ptr noundef %0, ptr noundef %2, ptr noundef nonnull %5, ptr noundef nonnull %6, ptr noundef %3) #3 %8 = icmp ne i32 %7, 0 %9 = load i32, ptr %6, align 4 %10 = icmp sgt i32 %9, %1 %11 = select i1 %8, i1 %10, i1 false br i1 %11, label %12, label %18 12: ; preds = %4 %13 = load i32, ptr %5, align 4, !tbaa !6 %14 = add nsw i32 %13, %7 %15 = load i32, ptr %3, align 4, !tbaa !6 %16 = mul nsw i32 %15, %1 %17 = add nsw i32 %14, %16 br label %18 18: ; preds = %4, %12 %19 = phi i32 [ %17, %12 ], [ 0, %4 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3 ret i32 %19 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @nvbios_vmap_table(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_drivers_gpu_drm_nouveau_nvkm_subdev_bios_extr_vmap.c_nvbios_vmap_entry
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/rsa/extr_rsa_none.c_RSA_padding_add_none.c' source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/rsa/extr_rsa_none.c_RSA_padding_add_none.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @RSA_F_RSA_PADDING_ADD_NONE = dso_local local_unnamed_addr global i32 0, align 4 @RSA_R_DATA_TOO_LARGE_FOR_KEY_SIZE = dso_local local_unnamed_addr global i32 0, align 4 @RSA_R_DATA_TOO_SMALL_FOR_KEY_SIZE = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local noundef i32 @RSA_padding_add_none(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 { %5 = icmp sgt i32 %3, %1 br i1 %5, label %6, label %10 6: ; preds = %4 %7 = load i32, ptr @RSA_F_RSA_PADDING_ADD_NONE, align 4, !tbaa !5 %8 = load i32, ptr @RSA_R_DATA_TOO_LARGE_FOR_KEY_SIZE, align 4, !tbaa !5 %9 = tail call i32 @RSAerr(i32 noundef %7, i32 noundef %8) #2 br label %18 10: ; preds = %4 %11 = icmp slt i32 %3, %1 br i1 %11, label %12, label %16 12: ; preds = %10 %13 = load i32, ptr @RSA_F_RSA_PADDING_ADD_NONE, align 4, !tbaa !5 %14 = load i32, ptr @RSA_R_DATA_TOO_SMALL_FOR_KEY_SIZE, align 4, !tbaa !5 %15 = tail call i32 @RSAerr(i32 noundef %13, i32 noundef %14) #2 br label %18 16: ; preds = %10 %17 = tail call i32 @memcpy(ptr noundef %0, ptr noundef %2, i32 noundef %3) #2 br label %18 18: ; preds = %16, %12, %6 %19 = phi i32 [ 0, %6 ], [ 0, %12 ], [ 1, %16 ] ret i32 %19 } declare i32 @RSAerr(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/rsa/extr_rsa_none.c_RSA_padding_add_none.c' source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/rsa/extr_rsa_none.c_RSA_padding_add_none.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @RSA_F_RSA_PADDING_ADD_NONE = common local_unnamed_addr global i32 0, align 4 @RSA_R_DATA_TOO_LARGE_FOR_KEY_SIZE = common local_unnamed_addr global i32 0, align 4 @RSA_R_DATA_TOO_SMALL_FOR_KEY_SIZE = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define range(i32 0, 2) i32 @RSA_padding_add_none(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) local_unnamed_addr #0 { %5 = icmp sgt i32 %3, %1 br i1 %5, label %6, label %10 6: ; preds = %4 %7 = load i32, ptr @RSA_F_RSA_PADDING_ADD_NONE, align 4, !tbaa !6 %8 = load i32, ptr @RSA_R_DATA_TOO_LARGE_FOR_KEY_SIZE, align 4, !tbaa !6 %9 = tail call i32 @RSAerr(i32 noundef %7, i32 noundef %8) #2 br label %18 10: ; preds = %4 %11 = icmp slt i32 %3, %1 br i1 %11, label %12, label %16 12: ; preds = %10 %13 = load i32, ptr @RSA_F_RSA_PADDING_ADD_NONE, align 4, !tbaa !6 %14 = load i32, ptr @RSA_R_DATA_TOO_SMALL_FOR_KEY_SIZE, align 4, !tbaa !6 %15 = tail call i32 @RSAerr(i32 noundef %13, i32 noundef %14) #2 br label %18 16: ; preds = %10 %17 = tail call i32 @memcpy(ptr noundef %0, ptr noundef %2, i32 noundef %3) #2 br label %18 18: ; preds = %16, %12, %6 %19 = phi i32 [ 0, %6 ], [ 0, %12 ], [ 1, %16 ] ret i32 %19 } declare i32 @RSAerr(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
freebsd_crypto_openssl_crypto_rsa_extr_rsa_none.c_RSA_padding_add_none
; ModuleID = 'AnghaBench/glfw/deps/extr_glad_vulkan.c_glad_vk_get_extensions.c' source_filename = "AnghaBench/glfw/deps/extr_glad_vulkan.c_glad_vk_get_extensions.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_4__ = type { i32 } @VK_SUCCESS = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @glad_vk_get_extensions], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef i32 @glad_vk_get_extensions(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef writeonly %2) #0 { %4 = alloca i32, align 4 %5 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4 store i32 0, ptr %4, align 4, !tbaa !5 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #4 store i32 0, ptr %5, align 4, !tbaa !5 %6 = call i64 @vkEnumerateInstanceExtensionProperties(ptr noundef null, ptr noundef nonnull %4, ptr noundef null) #4 %7 = load i64, ptr @VK_SUCCESS, align 8, !tbaa !9 %8 = icmp eq i64 %6, %7 br i1 %8, label %9, label %100 9: ; preds = %3 %10 = icmp eq ptr %0, null br i1 %10, label %17, label %11 11: ; preds = %9 %12 = call i64 @vkEnumerateDeviceExtensionProperties(ptr noundef nonnull %0, ptr noundef null, ptr noundef nonnull %5, ptr noundef null) #4 %13 = load i64, ptr @VK_SUCCESS, align 8, !tbaa !9 %14 = icmp eq i64 %12, %13 br i1 %14, label %15, label %100 15: ; preds = %11 %16 = load i32, ptr %5, align 4 br label %17 17: ; preds = %15, %9 %18 = phi i32 [ %16, %15 ], [ 0, %9 ] %19 = load i32, ptr %4, align 4 %20 = add nsw i32 %18, %19 %21 = call i32 @llvm.smax.i32(i32 %19, i32 %18) %22 = sext i32 %21 to i64 %23 = shl nsw i64 %22, 2 %24 = call i64 @malloc(i64 noundef %23) #4 %25 = inttoptr i64 %24 to ptr %26 = icmp eq i64 %24, 0 br i1 %26, label %100, label %27 27: ; preds = %17 %28 = call i64 @vkEnumerateInstanceExtensionProperties(ptr noundef null, ptr noundef nonnull %4, ptr noundef nonnull %25) #4 %29 = load i64, ptr @VK_SUCCESS, align 8, !tbaa !9 %30 = icmp eq i64 %28, %29 br i1 %30, label %33, label %31 31: ; preds = %27 %32 = call i32 @free(ptr noundef nonnull %25) #4 br label %100 33: ; preds = %27 %34 = call i64 @calloc(i32 noundef %20, i32 noundef 8) #4 %35 = inttoptr i64 %34 to ptr %36 = icmp eq i64 %34, 0 br i1 %36, label %40, label %37 37: ; preds = %33 %38 = load i32, ptr %4, align 4, !tbaa !5 %39 = icmp sgt i32 %38, 0 br i1 %39, label %42, label %57 40: ; preds = %33 %41 = call i32 @free(ptr noundef nonnull %25) #4 br label %100 42: ; preds = %37, %42 %43 = phi i64 [ %53, %42 ], [ 0, %37 ] %44 = getelementptr inbounds %struct.TYPE_4__, ptr %25, i64 %43 %45 = load i32, ptr %44, align 4, !tbaa.struct !11 %46 = call i32 @strlen(i32 noundef %45) #4 %47 = add nsw i32 %46, 1 %48 = sext i32 %47 to i64 %49 = call i64 @malloc(i64 noundef %48) #4 %50 = inttoptr i64 %49 to ptr %51 = getelementptr inbounds ptr, ptr %35, i64 %43 store ptr %50, ptr %51, align 8, !tbaa !12 %52 = call i32 @memcpy(ptr noundef %50, i32 noundef %45, i64 noundef %48) #4 %53 = add nuw nsw i64 %43, 1 %54 = load i32, ptr %4, align 4, !tbaa !5 %55 = sext i32 %54 to i64 %56 = icmp slt i64 %53, %55 br i1 %56, label %42, label %57, !llvm.loop !14 57: ; preds = %42, %37 br i1 %10, label %98, label %58 58: ; preds = %57 %59 = call i64 @vkEnumerateDeviceExtensionProperties(ptr noundef nonnull %0, ptr noundef null, ptr noundef nonnull %5, ptr noundef nonnull %25) #4 %60 = load i64, ptr @VK_SUCCESS, align 8, !tbaa !9 %61 = icmp eq i64 %59, %60 br i1 %61, label %65, label %62 62: ; preds = %58 %63 = load i32, ptr %4, align 4, !tbaa !5 %64 = icmp sgt i32 %63, 0 br i1 %64, label %68, label %77 65: ; preds = %58 %66 = load i32, ptr %5, align 4, !tbaa !5 %67 = icmp sgt i32 %66, 0 br i1 %67, label %79, label %98 68: ; preds = %62, %68 %69 = phi i64 [ %73, %68 ], [ 0, %62 ] %70 = getelementptr inbounds ptr, ptr %35, i64 %69 %71 = load ptr, ptr %70, align 8, !tbaa !12 %72 = call i32 @free(ptr noundef %71) #4 %73 = add nuw nsw i64 %69, 1 %74 = load i32, ptr %4, align 4, !tbaa !5 %75 = sext i32 %74 to i64 %76 = icmp slt i64 %73, %75 br i1 %76, label %68, label %77, !llvm.loop !16 77: ; preds = %68, %62 %78 = call i32 @free(ptr noundef nonnull %35) #4 br label %100 79: ; preds = %65, %79 %80 = phi i64 [ %94, %79 ], [ 0, %65 ] %81 = getelementptr inbounds %struct.TYPE_4__, ptr %25, i64 %80 %82 = load i32, ptr %81, align 4, !tbaa.struct !11 %83 = call i32 @strlen(i32 noundef %82) #4 %84 = add nsw i32 %83, 1 %85 = sext i32 %84 to i64 %86 = call i64 @malloc(i64 noundef %85) #4 %87 = inttoptr i64 %86 to ptr %88 = load i32, ptr %4, align 4, !tbaa !5 %89 = trunc i64 %80 to i32 %90 = add nsw i32 %88, %89 %91 = sext i32 %90 to i64 %92 = getelementptr inbounds ptr, ptr %35, i64 %91 store ptr %87, ptr %92, align 8, !tbaa !12 %93 = call i32 @memcpy(ptr noundef %87, i32 noundef %82, i64 noundef %85) #4 %94 = add nuw nsw i64 %80, 1 %95 = load i32, ptr %5, align 4, !tbaa !5 %96 = sext i32 %95 to i64 %97 = icmp slt i64 %94, %96 br i1 %97, label %79, label %98, !llvm.loop !17 98: ; preds = %79, %65, %57 %99 = call i32 @free(ptr noundef nonnull %25) #4 store i32 %20, ptr %1, align 4, !tbaa !5 store ptr %35, ptr %2, align 8, !tbaa !12 br label %100 100: ; preds = %17, %11, %3, %98, %77, %40, %31 %101 = phi i32 [ 0, %31 ], [ 0, %40 ], [ 0, %77 ], [ 1, %98 ], [ 0, %3 ], [ 0, %11 ], [ 0, %17 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #4 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4 ret i32 %101 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i64 @vkEnumerateDeviceExtensionProperties(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @vkEnumerateInstanceExtensionProperties(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @malloc(i64 noundef) local_unnamed_addr #2 declare i32 @free(ptr noundef) local_unnamed_addr #2 declare i64 @calloc(i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @strlen(i32 noundef) local_unnamed_addr #2 declare i32 @memcpy(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.smax.i32(i32, i32) #3 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #4 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"long", !7, i64 0} !11 = !{i64 0, i64 4, !5} !12 = !{!13, !13, i64 0} !13 = !{!"any pointer", !7, i64 0} !14 = distinct !{!14, !15} !15 = !{!"llvm.loop.mustprogress"} !16 = distinct !{!16, !15} !17 = distinct !{!17, !15}
; ModuleID = 'AnghaBench/glfw/deps/extr_glad_vulkan.c_glad_vk_get_extensions.c' source_filename = "AnghaBench/glfw/deps/extr_glad_vulkan.c_glad_vk_get_extensions.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_4__ = type { i32 } @VK_SUCCESS = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @glad_vk_get_extensions], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 0, 2) i32 @glad_vk_get_extensions(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef writeonly %2) #0 { %4 = alloca i32, align 4 %5 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4 store i32 0, ptr %4, align 4, !tbaa !6 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #4 store i32 0, ptr %5, align 4, !tbaa !6 %6 = call i64 @vkEnumerateInstanceExtensionProperties(ptr noundef null, ptr noundef nonnull %4, ptr noundef null) #4 %7 = load i64, ptr @VK_SUCCESS, align 8, !tbaa !10 %8 = icmp eq i64 %6, %7 br i1 %8, label %9, label %100 9: ; preds = %3 %10 = icmp eq ptr %0, null br i1 %10, label %17, label %11 11: ; preds = %9 %12 = call i64 @vkEnumerateDeviceExtensionProperties(ptr noundef nonnull %0, ptr noundef null, ptr noundef nonnull %5, ptr noundef null) #4 %13 = load i64, ptr @VK_SUCCESS, align 8, !tbaa !10 %14 = icmp eq i64 %12, %13 br i1 %14, label %15, label %100 15: ; preds = %11 %16 = load i32, ptr %5, align 4 br label %17 17: ; preds = %15, %9 %18 = phi i32 [ %16, %15 ], [ 0, %9 ] %19 = load i32, ptr %4, align 4 %20 = add nsw i32 %18, %19 %21 = call i32 @llvm.smax.i32(i32 %19, i32 %18) %22 = sext i32 %21 to i64 %23 = shl nsw i64 %22, 2 %24 = call i64 @malloc(i64 noundef %23) #4 %25 = inttoptr i64 %24 to ptr %26 = icmp eq i64 %24, 0 br i1 %26, label %100, label %27 27: ; preds = %17 %28 = call i64 @vkEnumerateInstanceExtensionProperties(ptr noundef null, ptr noundef nonnull %4, ptr noundef nonnull %25) #4 %29 = load i64, ptr @VK_SUCCESS, align 8, !tbaa !10 %30 = icmp eq i64 %28, %29 br i1 %30, label %33, label %31 31: ; preds = %27 %32 = call i32 @free(ptr noundef nonnull %25) #4 br label %100 33: ; preds = %27 %34 = call i64 @calloc(i32 noundef %20, i32 noundef 8) #4 %35 = inttoptr i64 %34 to ptr %36 = icmp eq i64 %34, 0 br i1 %36, label %40, label %37 37: ; preds = %33 %38 = load i32, ptr %4, align 4, !tbaa !6 %39 = icmp sgt i32 %38, 0 br i1 %39, label %42, label %57 40: ; preds = %33 %41 = call i32 @free(ptr noundef nonnull %25) #4 br label %100 42: ; preds = %37, %42 %43 = phi i64 [ %53, %42 ], [ 0, %37 ] %44 = getelementptr inbounds %struct.TYPE_4__, ptr %25, i64 %43 %45 = load i32, ptr %44, align 4, !tbaa !6 %46 = call i32 @strlen(i32 noundef %45) #4 %47 = add nsw i32 %46, 1 %48 = sext i32 %47 to i64 %49 = call i64 @malloc(i64 noundef %48) #4 %50 = inttoptr i64 %49 to ptr %51 = getelementptr inbounds ptr, ptr %35, i64 %43 store ptr %50, ptr %51, align 8, !tbaa !12 %52 = call i32 @memcpy(ptr noundef %50, i32 noundef %45, i64 noundef %48) #4 %53 = add nuw nsw i64 %43, 1 %54 = load i32, ptr %4, align 4, !tbaa !6 %55 = sext i32 %54 to i64 %56 = icmp slt i64 %53, %55 br i1 %56, label %42, label %57, !llvm.loop !14 57: ; preds = %42, %37 br i1 %10, label %98, label %58 58: ; preds = %57 %59 = call i64 @vkEnumerateDeviceExtensionProperties(ptr noundef nonnull %0, ptr noundef null, ptr noundef nonnull %5, ptr noundef nonnull %25) #4 %60 = load i64, ptr @VK_SUCCESS, align 8, !tbaa !10 %61 = icmp eq i64 %59, %60 br i1 %61, label %65, label %62 62: ; preds = %58 %63 = load i32, ptr %4, align 4, !tbaa !6 %64 = icmp sgt i32 %63, 0 br i1 %64, label %68, label %77 65: ; preds = %58 %66 = load i32, ptr %5, align 4, !tbaa !6 %67 = icmp sgt i32 %66, 0 br i1 %67, label %79, label %98 68: ; preds = %62, %68 %69 = phi i64 [ %73, %68 ], [ 0, %62 ] %70 = getelementptr inbounds ptr, ptr %35, i64 %69 %71 = load ptr, ptr %70, align 8, !tbaa !12 %72 = call i32 @free(ptr noundef %71) #4 %73 = add nuw nsw i64 %69, 1 %74 = load i32, ptr %4, align 4, !tbaa !6 %75 = sext i32 %74 to i64 %76 = icmp slt i64 %73, %75 br i1 %76, label %68, label %77, !llvm.loop !16 77: ; preds = %68, %62 %78 = call i32 @free(ptr noundef nonnull %35) #4 br label %100 79: ; preds = %65, %79 %80 = phi i64 [ %94, %79 ], [ 0, %65 ] %81 = getelementptr inbounds %struct.TYPE_4__, ptr %25, i64 %80 %82 = load i32, ptr %81, align 4, !tbaa !6 %83 = call i32 @strlen(i32 noundef %82) #4 %84 = add nsw i32 %83, 1 %85 = sext i32 %84 to i64 %86 = call i64 @malloc(i64 noundef %85) #4 %87 = inttoptr i64 %86 to ptr %88 = load i32, ptr %4, align 4, !tbaa !6 %89 = trunc nuw nsw i64 %80 to i32 %90 = add nsw i32 %88, %89 %91 = sext i32 %90 to i64 %92 = getelementptr inbounds ptr, ptr %35, i64 %91 store ptr %87, ptr %92, align 8, !tbaa !12 %93 = call i32 @memcpy(ptr noundef %87, i32 noundef %82, i64 noundef %85) #4 %94 = add nuw nsw i64 %80, 1 %95 = load i32, ptr %5, align 4, !tbaa !6 %96 = sext i32 %95 to i64 %97 = icmp slt i64 %94, %96 br i1 %97, label %79, label %98, !llvm.loop !17 98: ; preds = %79, %65, %57 %99 = call i32 @free(ptr noundef nonnull %25) #4 store i32 %20, ptr %1, align 4, !tbaa !6 store ptr %35, ptr %2, align 8, !tbaa !12 br label %100 100: ; preds = %17, %11, %3, %98, %77, %40, %31 %101 = phi i32 [ 0, %31 ], [ 0, %40 ], [ 0, %77 ], [ 1, %98 ], [ 0, %3 ], [ 0, %11 ], [ 0, %17 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #4 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4 ret i32 %101 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i64 @vkEnumerateDeviceExtensionProperties(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @vkEnumerateInstanceExtensionProperties(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @malloc(i64 noundef) local_unnamed_addr #2 declare i32 @free(ptr noundef) local_unnamed_addr #2 declare i64 @calloc(i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @strlen(i32 noundef) local_unnamed_addr #2 declare i32 @memcpy(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.smax.i32(i32, i32) #3 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #4 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"long", !8, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"any pointer", !8, i64 0} !14 = distinct !{!14, !15} !15 = !{!"llvm.loop.mustprogress"} !16 = distinct !{!16, !15} !17 = distinct !{!17, !15}
glfw_deps_extr_glad_vulkan.c_glad_vk_get_extensions
; ModuleID = 'AnghaBench/linux/drivers/mmc/host/extr_wbsd.c_wbsd_request_region.c' source_filename = "AnghaBench/linux/drivers/mmc/host/extr_wbsd.c_wbsd_request_region.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @DRIVER_NAME = dso_local local_unnamed_addr global i32 0, align 4 @EIO = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @wbsd_request_region], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @wbsd_request_region(ptr nocapture noundef writeonly %0, i32 noundef %1) #0 { %3 = and i32 %1, 7 %4 = icmp eq i32 %3, 0 br i1 %4, label %8, label %5 5: ; preds = %2 %6 = load i32, ptr @EINVAL, align 4, !tbaa !5 %7 = sub nsw i32 0, %6 br label %16 8: ; preds = %2 %9 = load i32, ptr @DRIVER_NAME, align 4, !tbaa !5 %10 = tail call i32 @request_region(i32 noundef %1, i32 noundef 8, i32 noundef %9) #2 %11 = icmp eq i32 %10, 0 br i1 %11, label %12, label %15 12: ; preds = %8 %13 = load i32, ptr @EIO, align 4, !tbaa !5 %14 = sub nsw i32 0, %13 br label %16 15: ; preds = %8 store i32 %1, ptr %0, align 4, !tbaa !9 br label %16 16: ; preds = %15, %12, %5 %17 = phi i32 [ %7, %5 ], [ 0, %15 ], [ %14, %12 ] ret i32 %17 } declare i32 @request_region(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"wbsd_host", !6, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/mmc/host/extr_wbsd.c_wbsd_request_region.c' source_filename = "AnghaBench/linux/drivers/mmc/host/extr_wbsd.c_wbsd_request_region.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EINVAL = common local_unnamed_addr global i32 0, align 4 @DRIVER_NAME = common local_unnamed_addr global i32 0, align 4 @EIO = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @wbsd_request_region], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 -2147483647, -2147483648) i32 @wbsd_request_region(ptr nocapture noundef writeonly %0, i32 noundef %1) #0 { %3 = and i32 %1, 7 %4 = icmp eq i32 %3, 0 br i1 %4, label %8, label %5 5: ; preds = %2 %6 = load i32, ptr @EINVAL, align 4, !tbaa !6 %7 = sub nsw i32 0, %6 br label %16 8: ; preds = %2 %9 = load i32, ptr @DRIVER_NAME, align 4, !tbaa !6 %10 = tail call i32 @request_region(i32 noundef %1, i32 noundef 8, i32 noundef %9) #2 %11 = icmp eq i32 %10, 0 br i1 %11, label %12, label %15 12: ; preds = %8 %13 = load i32, ptr @EIO, align 4, !tbaa !6 %14 = sub nsw i32 0, %13 br label %16 15: ; preds = %8 store i32 %1, ptr %0, align 4, !tbaa !10 br label %16 16: ; preds = %15, %12, %5 %17 = phi i32 [ %7, %5 ], [ 0, %15 ], [ %14, %12 ] ret i32 %17 } declare i32 @request_region(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"wbsd_host", !7, i64 0}
linux_drivers_mmc_host_extr_wbsd.c_wbsd_request_region
; ModuleID = 'AnghaBench/vlc/src/input/extr_es_out.h_es_out_SetPauseState.c' source_filename = "AnghaBench/vlc/src/input/extr_es_out.h_es_out_SetPauseState.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @ES_OUT_SET_PAUSE_STATE = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @es_out_SetPauseState], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal i32 @es_out_SetPauseState(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 { %5 = load i32, ptr @ES_OUT_SET_PAUSE_STATE, align 4, !tbaa !5 %6 = tail call i32 @es_out_Control(ptr noundef %0, i32 noundef %5, i32 noundef %1, i32 noundef %2, i32 noundef %3) #2 ret i32 %6 } declare i32 @es_out_Control(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/vlc/src/input/extr_es_out.h_es_out_SetPauseState.c' source_filename = "AnghaBench/vlc/src/input/extr_es_out.h_es_out_SetPauseState.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @ES_OUT_SET_PAUSE_STATE = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @es_out_SetPauseState], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal i32 @es_out_SetPauseState(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 { %5 = load i32, ptr @ES_OUT_SET_PAUSE_STATE, align 4, !tbaa !6 %6 = tail call i32 @es_out_Control(ptr noundef %0, i32 noundef %5, i32 noundef %1, i32 noundef %2, i32 noundef %3) #2 ret i32 %6 } declare i32 @es_out_Control(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
vlc_src_input_extr_es_out.h_es_out_SetPauseState
; ModuleID = 'AnghaBench/postgres/src/backend/optimizer/util/extr_clauses.c_is_pseudo_constant_clause.c' source_filename = "AnghaBench/postgres/src/backend/optimizer/util/extr_clauses.c_is_pseudo_constant_clause.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local noundef i32 @is_pseudo_constant_clause(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call i32 @contain_var_clause(ptr noundef %0) #2 %3 = icmp eq i32 %2, 0 br i1 %3, label %4, label %7 4: ; preds = %1 %5 = tail call i32 @contain_volatile_functions(ptr noundef %0) #2 %6 = icmp eq i32 %5, 0 br i1 %6, label %8, label %7 7: ; preds = %4, %1 br label %8 8: ; preds = %4, %7 %9 = phi i32 [ 0, %7 ], [ 1, %4 ] ret i32 %9 } declare i32 @contain_var_clause(ptr noundef) local_unnamed_addr #1 declare i32 @contain_volatile_functions(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/postgres/src/backend/optimizer/util/extr_clauses.c_is_pseudo_constant_clause.c' source_filename = "AnghaBench/postgres/src/backend/optimizer/util/extr_clauses.c_is_pseudo_constant_clause.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define range(i32 0, 2) i32 @is_pseudo_constant_clause(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call i32 @contain_var_clause(ptr noundef %0) #2 %3 = icmp eq i32 %2, 0 br i1 %3, label %4, label %7 4: ; preds = %1 %5 = tail call i32 @contain_volatile_functions(ptr noundef %0) #2 %6 = icmp eq i32 %5, 0 br i1 %6, label %8, label %7 7: ; preds = %4, %1 br label %8 8: ; preds = %4, %7 %9 = phi i32 [ 0, %7 ], [ 1, %4 ] ret i32 %9 } declare i32 @contain_var_clause(ptr noundef) local_unnamed_addr #1 declare i32 @contain_volatile_functions(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
postgres_src_backend_optimizer_util_extr_clauses.c_is_pseudo_constant_clause
; ModuleID = 'AnghaBench/linux/drivers/net/dsa/mv88e6xxx/extr_chip.c_mv88e6xxx_port_fdb_add.c' source_filename = "AnghaBench/linux/drivers/net/dsa/mv88e6xxx/extr_chip.c_mv88e6xxx_port_fdb_add.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @mv88e6xxx_port_fdb_add], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @mv88e6xxx_port_fdb_add(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #0 { %5 = load ptr, ptr %0, align 8, !tbaa !5 %6 = tail call i32 @mv88e6xxx_reg_lock(ptr noundef %5) #2 %7 = load i32, ptr @MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC, align 4, !tbaa !10 %8 = tail call i32 @mv88e6xxx_port_db_load_purge(ptr noundef %5, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %7) #2 %9 = tail call i32 @mv88e6xxx_reg_unlock(ptr noundef %5) #2 ret i32 %8 } declare i32 @mv88e6xxx_reg_lock(ptr noundef) local_unnamed_addr #1 declare i32 @mv88e6xxx_port_db_load_purge(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @mv88e6xxx_reg_unlock(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"dsa_switch", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/dsa/mv88e6xxx/extr_chip.c_mv88e6xxx_port_fdb_add.c' source_filename = "AnghaBench/linux/drivers/net/dsa/mv88e6xxx/extr_chip.c_mv88e6xxx_port_fdb_add.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @mv88e6xxx_port_fdb_add], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @mv88e6xxx_port_fdb_add(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #0 { %5 = load ptr, ptr %0, align 8, !tbaa !6 %6 = tail call i32 @mv88e6xxx_reg_lock(ptr noundef %5) #2 %7 = load i32, ptr @MV88E6XXX_G1_ATU_DATA_STATE_UC_STATIC, align 4, !tbaa !11 %8 = tail call i32 @mv88e6xxx_port_db_load_purge(ptr noundef %5, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %7) #2 %9 = tail call i32 @mv88e6xxx_reg_unlock(ptr noundef %5) #2 ret i32 %8 } declare i32 @mv88e6xxx_reg_lock(ptr noundef) local_unnamed_addr #1 declare i32 @mv88e6xxx_port_db_load_purge(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @mv88e6xxx_reg_unlock(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"dsa_switch", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !12, i64 0} !12 = !{!"int", !9, i64 0}
linux_drivers_net_dsa_mv88e6xxx_extr_chip.c_mv88e6xxx_port_fdb_add
; ModuleID = 'AnghaBench/linux/drivers/watchdog/extr_pcwd_usb.c_usb_pcwd_send_command.c' source_filename = "AnghaBench/linux/drivers/watchdog/extr_pcwd_usb.c_usb_pcwd_send_command.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.usb_pcwd_private = type { i8, i8, i8, i32, ptr, i32, i32, i32 } @GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [56 x i8] c"sending following data cmd=0x%02x msb=0x%02x lsb=0x%02x\00", align 1 @HID_REQ_SET_REPORT = dso_local local_unnamed_addr global i32 0, align 4 @HID_DT_REPORT = dso_local local_unnamed_addr global i32 0, align 4 @USB_COMMAND_TIMEOUT = dso_local local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [72 x i8] c"usb_pcwd_send_command: error in usb_control_msg for cmd 0x%x 0x%x 0x%x\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @usb_pcwd_send_command], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @usb_pcwd_send_command(ptr noundef %0, i8 noundef zeroext %1, ptr nocapture noundef %2, ptr nocapture noundef %3) #0 { %5 = icmp eq ptr %0, null br i1 %5, label %68, label %6 6: ; preds = %4 %7 = getelementptr inbounds %struct.usb_pcwd_private, ptr %0, i64 0, i32 7 %8 = load i32, ptr %7, align 8, !tbaa !5 %9 = icmp eq i32 %8, 0 br i1 %9, label %68, label %10 10: ; preds = %6 %11 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !11 %12 = tail call ptr @kmalloc(i32 noundef 6, i32 noundef %11) #2 %13 = icmp eq ptr %12, null br i1 %13, label %68, label %14 14: ; preds = %10 store i8 %1, ptr %12, align 1, !tbaa !12 %15 = load i8, ptr %2, align 1, !tbaa !12 %16 = getelementptr inbounds i8, ptr %12, i64 1 store i8 %15, ptr %16, align 1, !tbaa !12 %17 = load i8, ptr %3, align 1, !tbaa !12 %18 = getelementptr inbounds i8, ptr %12, i64 2 store i8 %17, ptr %18, align 1, !tbaa !12 %19 = getelementptr inbounds i8, ptr %12, i64 5 store i8 0, ptr %19, align 1, !tbaa !12 %20 = getelementptr inbounds i8, ptr %12, i64 4 store i8 0, ptr %20, align 1, !tbaa !12 %21 = getelementptr inbounds i8, ptr %12, i64 3 store i8 0, ptr %21, align 1, !tbaa !12 %22 = getelementptr inbounds %struct.usb_pcwd_private, ptr %0, i64 0, i32 4 %23 = load ptr, ptr %22, align 8, !tbaa !13 %24 = tail call i32 @dev_dbg(ptr noundef %23, ptr noundef nonnull @.str, i8 noundef zeroext %1, i8 noundef zeroext %15, i8 noundef zeroext %17) #2 %25 = getelementptr inbounds %struct.usb_pcwd_private, ptr %0, i64 0, i32 3 %26 = tail call i32 @atomic_set(ptr noundef nonnull %25, i32 noundef 0) #2 %27 = getelementptr inbounds %struct.usb_pcwd_private, ptr %0, i64 0, i32 6 %28 = load i32, ptr %27, align 4, !tbaa !14 %29 = tail call i32 @usb_sndctrlpipe(i32 noundef %28, i32 noundef 0) #2 %30 = load i32, ptr @HID_REQ_SET_REPORT, align 4, !tbaa !11 %31 = load i32, ptr @HID_DT_REPORT, align 4, !tbaa !11 %32 = getelementptr inbounds %struct.usb_pcwd_private, ptr %0, i64 0, i32 5 %33 = load i32, ptr %32, align 8, !tbaa !15 %34 = load i32, ptr @USB_COMMAND_TIMEOUT, align 4, !tbaa !11 %35 = tail call i32 @usb_control_msg(i32 noundef %28, i32 noundef %29, i32 noundef %30, i32 noundef %31, i32 noundef 512, i32 noundef %33, ptr noundef nonnull %12, i32 noundef 6, i32 noundef %34) #2 %36 = icmp eq i32 %35, 6 br i1 %36, label %42, label %37 37: ; preds = %14 %38 = load ptr, ptr %22, align 8, !tbaa !13 %39 = load i8, ptr %2, align 1, !tbaa !12 %40 = load i8, ptr %3, align 1, !tbaa !12 %41 = tail call i32 @dev_dbg(ptr noundef %38, ptr noundef nonnull @.str.1, i8 noundef zeroext %1, i8 noundef zeroext %39, i8 noundef zeroext %40) #2 br label %42 42: ; preds = %37, %14 %43 = load i32, ptr @USB_COMMAND_TIMEOUT, align 4, !tbaa !11 %44 = icmp sgt i32 %43, 0 br i1 %44, label %45, label %64 45: ; preds = %42, %45 %46 = phi i32 [ %50, %45 ], [ 0, %42 ] %47 = tail call i32 @mdelay(i32 noundef 1) #2 %48 = tail call i64 @atomic_read(ptr noundef nonnull %25) #2 %49 = icmp eq i64 %48, 0 %50 = add nuw nsw i32 %46, 1 %51 = load i32, ptr @USB_COMMAND_TIMEOUT, align 4, !tbaa !11 %52 = icmp slt i32 %50, %51 %53 = select i1 %52, i1 %49, i1 false br i1 %53, label %45, label %54, !llvm.loop !16 54: ; preds = %45 %55 = xor i1 %49, true br i1 %49, label %64, label %56 56: ; preds = %54 %57 = load i8, ptr %0, align 8, !tbaa !18 %58 = icmp eq i8 %57, %1 br i1 %58, label %59, label %64 59: ; preds = %56 %60 = getelementptr inbounds %struct.usb_pcwd_private, ptr %0, i64 0, i32 1 %61 = load i8, ptr %60, align 1, !tbaa !19 store i8 %61, ptr %2, align 1, !tbaa !12 %62 = getelementptr inbounds %struct.usb_pcwd_private, ptr %0, i64 0, i32 2 %63 = load i8, ptr %62, align 2, !tbaa !20 store i8 %63, ptr %3, align 1, !tbaa !12 br label %64 64: ; preds = %42, %59, %56, %54 %65 = phi i1 [ %55, %59 ], [ %55, %56 ], [ %55, %54 ], [ false, %42 ] %66 = zext i1 %65 to i32 %67 = tail call i32 @kfree(ptr noundef nonnull %12) #2 br label %68 68: ; preds = %10, %4, %6, %64 %69 = phi i32 [ %66, %64 ], [ -1, %6 ], [ -1, %4 ], [ 0, %10 ] ret i32 %69 } declare ptr @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dev_dbg(ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1 declare i32 @atomic_set(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @usb_control_msg(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @usb_sndctrlpipe(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @mdelay(i32 noundef) local_unnamed_addr #1 declare i64 @atomic_read(ptr noundef) local_unnamed_addr #1 declare i32 @kfree(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !9, i64 24} !6 = !{!"usb_pcwd_private", !7, i64 0, !7, i64 1, !7, i64 2, !9, i64 4, !10, i64 8, !9, i64 16, !9, i64 20, !9, i64 24} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!"int", !7, i64 0} !10 = !{!"any pointer", !7, i64 0} !11 = !{!9, !9, i64 0} !12 = !{!7, !7, i64 0} !13 = !{!6, !10, i64 8} !14 = !{!6, !9, i64 20} !15 = !{!6, !9, i64 16} !16 = distinct !{!16, !17} !17 = !{!"llvm.loop.mustprogress"} !18 = !{!6, !7, i64 0} !19 = !{!6, !7, i64 1} !20 = !{!6, !7, i64 2}
; ModuleID = 'AnghaBench/linux/drivers/watchdog/extr_pcwd_usb.c_usb_pcwd_send_command.c' source_filename = "AnghaBench/linux/drivers/watchdog/extr_pcwd_usb.c_usb_pcwd_send_command.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @GFP_KERNEL = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [56 x i8] c"sending following data cmd=0x%02x msb=0x%02x lsb=0x%02x\00", align 1 @HID_REQ_SET_REPORT = common local_unnamed_addr global i32 0, align 4 @HID_DT_REPORT = common local_unnamed_addr global i32 0, align 4 @USB_COMMAND_TIMEOUT = common local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [72 x i8] c"usb_pcwd_send_command: error in usb_control_msg for cmd 0x%x 0x%x 0x%x\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @usb_pcwd_send_command], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 -1, 2) i32 @usb_pcwd_send_command(ptr noundef %0, i8 noundef zeroext %1, ptr nocapture noundef %2, ptr nocapture noundef %3) #0 { %5 = icmp eq ptr %0, null br i1 %5, label %68, label %6 6: ; preds = %4 %7 = getelementptr inbounds i8, ptr %0, i64 24 %8 = load i32, ptr %7, align 8, !tbaa !6 %9 = icmp eq i32 %8, 0 br i1 %9, label %68, label %10 10: ; preds = %6 %11 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !12 %12 = tail call ptr @kmalloc(i32 noundef 6, i32 noundef %11) #2 %13 = icmp eq ptr %12, null br i1 %13, label %68, label %14 14: ; preds = %10 store i8 %1, ptr %12, align 1, !tbaa !13 %15 = load i8, ptr %2, align 1, !tbaa !13 %16 = getelementptr inbounds i8, ptr %12, i64 1 store i8 %15, ptr %16, align 1, !tbaa !13 %17 = load i8, ptr %3, align 1, !tbaa !13 %18 = getelementptr inbounds i8, ptr %12, i64 2 store i8 %17, ptr %18, align 1, !tbaa !13 %19 = getelementptr inbounds i8, ptr %12, i64 5 store i8 0, ptr %19, align 1, !tbaa !13 %20 = getelementptr inbounds i8, ptr %12, i64 4 store i8 0, ptr %20, align 1, !tbaa !13 %21 = getelementptr inbounds i8, ptr %12, i64 3 store i8 0, ptr %21, align 1, !tbaa !13 %22 = getelementptr inbounds i8, ptr %0, i64 8 %23 = load ptr, ptr %22, align 8, !tbaa !14 %24 = tail call i32 @dev_dbg(ptr noundef %23, ptr noundef nonnull @.str, i8 noundef zeroext %1, i8 noundef zeroext %15, i8 noundef zeroext %17) #2 %25 = getelementptr inbounds i8, ptr %0, i64 4 %26 = tail call i32 @atomic_set(ptr noundef nonnull %25, i32 noundef 0) #2 %27 = getelementptr inbounds i8, ptr %0, i64 20 %28 = load i32, ptr %27, align 4, !tbaa !15 %29 = tail call i32 @usb_sndctrlpipe(i32 noundef %28, i32 noundef 0) #2 %30 = load i32, ptr @HID_REQ_SET_REPORT, align 4, !tbaa !12 %31 = load i32, ptr @HID_DT_REPORT, align 4, !tbaa !12 %32 = getelementptr inbounds i8, ptr %0, i64 16 %33 = load i32, ptr %32, align 8, !tbaa !16 %34 = load i32, ptr @USB_COMMAND_TIMEOUT, align 4, !tbaa !12 %35 = tail call i32 @usb_control_msg(i32 noundef %28, i32 noundef %29, i32 noundef %30, i32 noundef %31, i32 noundef 512, i32 noundef %33, ptr noundef nonnull %12, i32 noundef 6, i32 noundef %34) #2 %36 = icmp eq i32 %35, 6 br i1 %36, label %42, label %37 37: ; preds = %14 %38 = load ptr, ptr %22, align 8, !tbaa !14 %39 = load i8, ptr %2, align 1, !tbaa !13 %40 = load i8, ptr %3, align 1, !tbaa !13 %41 = tail call i32 @dev_dbg(ptr noundef %38, ptr noundef nonnull @.str.1, i8 noundef zeroext %1, i8 noundef zeroext %39, i8 noundef zeroext %40) #2 br label %42 42: ; preds = %37, %14 %43 = load i32, ptr @USB_COMMAND_TIMEOUT, align 4, !tbaa !12 %44 = icmp sgt i32 %43, 0 br i1 %44, label %45, label %64 45: ; preds = %42, %45 %46 = phi i32 [ %50, %45 ], [ 0, %42 ] %47 = tail call i32 @mdelay(i32 noundef 1) #2 %48 = tail call i64 @atomic_read(ptr noundef nonnull %25) #2 %49 = icmp eq i64 %48, 0 %50 = add nuw nsw i32 %46, 1 %51 = load i32, ptr @USB_COMMAND_TIMEOUT, align 4, !tbaa !12 %52 = icmp slt i32 %50, %51 %53 = select i1 %52, i1 %49, i1 false br i1 %53, label %45, label %54, !llvm.loop !17 54: ; preds = %45 %55 = xor i1 %49, true br i1 %49, label %64, label %56 56: ; preds = %54 %57 = load i8, ptr %0, align 8, !tbaa !19 %58 = icmp eq i8 %57, %1 br i1 %58, label %59, label %64 59: ; preds = %56 %60 = getelementptr inbounds i8, ptr %0, i64 1 %61 = load i8, ptr %60, align 1, !tbaa !20 store i8 %61, ptr %2, align 1, !tbaa !13 %62 = getelementptr inbounds i8, ptr %0, i64 2 %63 = load i8, ptr %62, align 2, !tbaa !21 store i8 %63, ptr %3, align 1, !tbaa !13 br label %64 64: ; preds = %42, %59, %56, %54 %65 = phi i1 [ %55, %59 ], [ %55, %56 ], [ %55, %54 ], [ false, %42 ] %66 = zext i1 %65 to i32 %67 = tail call i32 @kfree(ptr noundef nonnull %12) #2 br label %68 68: ; preds = %10, %4, %6, %64 %69 = phi i32 [ %66, %64 ], [ -1, %6 ], [ -1, %4 ], [ 0, %10 ] ret i32 %69 } declare ptr @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dev_dbg(ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1 declare i32 @atomic_set(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @usb_control_msg(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @usb_sndctrlpipe(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @mdelay(i32 noundef) local_unnamed_addr #1 declare i64 @atomic_read(ptr noundef) local_unnamed_addr #1 declare i32 @kfree(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !10, i64 24} !7 = !{!"usb_pcwd_private", !8, i64 0, !8, i64 1, !8, i64 2, !10, i64 4, !11, i64 8, !10, i64 16, !10, i64 20, !10, i64 24} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0} !11 = !{!"any pointer", !8, i64 0} !12 = !{!10, !10, i64 0} !13 = !{!8, !8, i64 0} !14 = !{!7, !11, i64 8} !15 = !{!7, !10, i64 20} !16 = !{!7, !10, i64 16} !17 = distinct !{!17, !18} !18 = !{!"llvm.loop.mustprogress"} !19 = !{!7, !8, i64 0} !20 = !{!7, !8, i64 1} !21 = !{!7, !8, i64 2}
linux_drivers_watchdog_extr_pcwd_usb.c_usb_pcwd_send_command
; ModuleID = 'AnghaBench/timescaledb/src/extr_chunk_index.c_ts_chunk_index_set_tablespace.c' source_filename = "AnghaBench/timescaledb/src/extr_chunk_index.c_ts_chunk_index_set_tablespace.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @Anum_chunk_index_hypertable_id_hypertable_index_name_idx_hypertable_id = dso_local local_unnamed_addr global i32 0, align 4 @BTEqualStrategyNumber = dso_local local_unnamed_addr global i32 0, align 4 @F_INT4EQ = dso_local local_unnamed_addr global i32 0, align 4 @Anum_chunk_index_hypertable_id_hypertable_index_name_idx_hypertable_index_name = dso_local local_unnamed_addr global i32 0, align 4 @F_NAMEEQ = dso_local local_unnamed_addr global i32 0, align 4 @CHUNK_INDEX_HYPERTABLE_ID_HYPERTABLE_INDEX_NAME_IDX = dso_local local_unnamed_addr global i32 0, align 4 @chunk_index_tuple_set_tablespace = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local i32 @ts_chunk_index_set_tablespace(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #0 { %4 = alloca [2 x i32], align 4 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3 %5 = tail call ptr @get_rel_name(i32 noundef %1) #3 %6 = load i32, ptr @Anum_chunk_index_hypertable_id_hypertable_index_name_idx_hypertable_id, align 4, !tbaa !5 %7 = load i32, ptr @BTEqualStrategyNumber, align 4, !tbaa !5 %8 = load i32, ptr @F_INT4EQ, align 4, !tbaa !5 %9 = load i32, ptr %0, align 4, !tbaa !9 %10 = tail call i32 @Int32GetDatum(i32 noundef %9) #3 %11 = call i32 @ScanKeyInit(ptr noundef nonnull %4, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %10) #3 %12 = getelementptr inbounds [2 x i32], ptr %4, i64 0, i64 1 %13 = load i32, ptr @Anum_chunk_index_hypertable_id_hypertable_index_name_idx_hypertable_index_name, align 4, !tbaa !5 %14 = load i32, ptr @BTEqualStrategyNumber, align 4, !tbaa !5 %15 = load i32, ptr @F_NAMEEQ, align 4, !tbaa !5 %16 = call i32 @CStringGetDatum(ptr noundef %5) #3 %17 = call i32 @ScanKeyInit(ptr noundef nonnull %12, i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef %16) #3 %18 = load i32, ptr @CHUNK_INDEX_HYPERTABLE_ID_HYPERTABLE_INDEX_NAME_IDX, align 4, !tbaa !5 %19 = load i32, ptr @chunk_index_tuple_set_tablespace, align 4, !tbaa !5 %20 = call i32 @chunk_index_scan_update(i32 noundef %18, ptr noundef nonnull %4, i32 noundef 2, i32 noundef %19, ptr noundef null, ptr noundef %2) #3 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3 ret i32 %20 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @get_rel_name(i32 noundef) local_unnamed_addr #2 declare i32 @ScanKeyInit(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @Int32GetDatum(i32 noundef) local_unnamed_addr #2 declare i32 @CStringGetDatum(ptr noundef) local_unnamed_addr #2 declare i32 @chunk_index_scan_update(i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"TYPE_5__", !11, i64 0} !11 = !{!"TYPE_4__", !6, i64 0}
; ModuleID = 'AnghaBench/timescaledb/src/extr_chunk_index.c_ts_chunk_index_set_tablespace.c' source_filename = "AnghaBench/timescaledb/src/extr_chunk_index.c_ts_chunk_index_set_tablespace.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @Anum_chunk_index_hypertable_id_hypertable_index_name_idx_hypertable_id = common local_unnamed_addr global i32 0, align 4 @BTEqualStrategyNumber = common local_unnamed_addr global i32 0, align 4 @F_INT4EQ = common local_unnamed_addr global i32 0, align 4 @Anum_chunk_index_hypertable_id_hypertable_index_name_idx_hypertable_index_name = common local_unnamed_addr global i32 0, align 4 @F_NAMEEQ = common local_unnamed_addr global i32 0, align 4 @CHUNK_INDEX_HYPERTABLE_ID_HYPERTABLE_INDEX_NAME_IDX = common local_unnamed_addr global i32 0, align 4 @chunk_index_tuple_set_tablespace = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @ts_chunk_index_set_tablespace(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #0 { %4 = alloca [2 x i32], align 4 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3 %5 = tail call ptr @get_rel_name(i32 noundef %1) #3 %6 = load i32, ptr @Anum_chunk_index_hypertable_id_hypertable_index_name_idx_hypertable_id, align 4, !tbaa !6 %7 = load i32, ptr @BTEqualStrategyNumber, align 4, !tbaa !6 %8 = load i32, ptr @F_INT4EQ, align 4, !tbaa !6 %9 = load i32, ptr %0, align 4, !tbaa !10 %10 = tail call i32 @Int32GetDatum(i32 noundef %9) #3 %11 = call i32 @ScanKeyInit(ptr noundef nonnull %4, i32 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef %10) #3 %12 = getelementptr inbounds i8, ptr %4, i64 4 %13 = load i32, ptr @Anum_chunk_index_hypertable_id_hypertable_index_name_idx_hypertable_index_name, align 4, !tbaa !6 %14 = load i32, ptr @BTEqualStrategyNumber, align 4, !tbaa !6 %15 = load i32, ptr @F_NAMEEQ, align 4, !tbaa !6 %16 = call i32 @CStringGetDatum(ptr noundef %5) #3 %17 = call i32 @ScanKeyInit(ptr noundef nonnull %12, i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef %16) #3 %18 = load i32, ptr @CHUNK_INDEX_HYPERTABLE_ID_HYPERTABLE_INDEX_NAME_IDX, align 4, !tbaa !6 %19 = load i32, ptr @chunk_index_tuple_set_tablespace, align 4, !tbaa !6 %20 = call i32 @chunk_index_scan_update(i32 noundef %18, ptr noundef nonnull %4, i32 noundef 2, i32 noundef %19, ptr noundef null, ptr noundef %2) #3 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3 ret i32 %20 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @get_rel_name(i32 noundef) local_unnamed_addr #2 declare i32 @ScanKeyInit(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @Int32GetDatum(i32 noundef) local_unnamed_addr #2 declare i32 @CStringGetDatum(ptr noundef) local_unnamed_addr #2 declare i32 @chunk_index_scan_update(i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"TYPE_5__", !12, i64 0} !12 = !{!"TYPE_4__", !7, i64 0}
timescaledb_src_extr_chunk_index.c_ts_chunk_index_set_tablespace
; ModuleID = 'AnghaBench/freebsd/sys/dev/ocs_fc/extr_ocs_cam.c_ocs_scsi_tgt_del_device.c' source_filename = "AnghaBench/freebsd/sys/dev/ocs_fc/extr_ocs_cam.c_ocs_scsi_tgt_del_device.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define dso_local noundef i32 @ocs_scsi_tgt_del_device(ptr nocapture noundef readnone %0) local_unnamed_addr #0 { ret i32 0 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/freebsd/sys/dev/ocs_fc/extr_ocs_cam.c_ocs_scsi_tgt_del_device.c' source_filename = "AnghaBench/freebsd/sys/dev/ocs_fc/extr_ocs_cam.c_ocs_scsi_tgt_del_device.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define noundef i32 @ocs_scsi_tgt_del_device(ptr nocapture noundef readnone %0) local_unnamed_addr #0 { ret i32 0 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
freebsd_sys_dev_ocs_fc_extr_ocs_cam.c_ocs_scsi_tgt_del_device
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_dce_v6_0.c_dce_v6_0_pick_pll.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_dce_v6_0.c_dce_v6_0_pick_pll.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @ATOM_PPLL_INVALID = dso_local local_unnamed_addr global i32 0, align 4 @ATOM_PPLL0 = dso_local local_unnamed_addr global i32 0, align 4 @ATOM_PPLL2 = dso_local local_unnamed_addr global i32 0, align 4 @ATOM_PPLL1 = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [27 x i8] c"unable to allocate a PPLL\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @dce_v6_0_pick_pll], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @dce_v6_0_pick_pll(ptr noundef %0) #0 { %2 = tail call ptr @to_amdgpu_crtc(ptr noundef %0) #2 %3 = load ptr, ptr %0, align 8, !tbaa !5 %4 = load ptr, ptr %3, align 8, !tbaa !10 %5 = load i32, ptr %2, align 4, !tbaa !12 %6 = tail call i32 @amdgpu_atombios_encoder_get_encoder_mode(i32 noundef %5) #2 %7 = tail call i64 @ENCODER_MODE_IS_DP(i32 noundef %6) #2 %8 = icmp eq i64 %7, 0 br i1 %8, label %16, label %9 9: ; preds = %1 %10 = load i64, ptr %4, align 8, !tbaa !15 %11 = icmp eq i64 %10, 0 br i1 %11, label %14, label %12 12: ; preds = %9 %13 = load i32, ptr @ATOM_PPLL_INVALID, align 4, !tbaa !19 br label %34 14: ; preds = %9 %15 = load i32, ptr @ATOM_PPLL0, align 4, !tbaa !19 br label %34 16: ; preds = %1 %17 = tail call i32 @amdgpu_pll_get_shared_nondp_ppll(ptr noundef nonnull %0) #2 %18 = load i32, ptr @ATOM_PPLL_INVALID, align 4, !tbaa !19 %19 = icmp eq i32 %17, %18 br i1 %19, label %20, label %34 20: ; preds = %16 %21 = tail call i32 @amdgpu_pll_get_use_mask(ptr noundef nonnull %0) #2 %22 = load i32, ptr @ATOM_PPLL2, align 4, !tbaa !19 %23 = shl nuw i32 1, %22 %24 = and i32 %23, %21 %25 = icmp eq i32 %24, 0 br i1 %25, label %34, label %26 26: ; preds = %20 %27 = load i32, ptr @ATOM_PPLL1, align 4, !tbaa !19 %28 = shl nuw i32 1, %27 %29 = and i32 %28, %21 %30 = icmp eq i32 %29, 0 br i1 %30, label %34, label %31 31: ; preds = %26 %32 = tail call i32 @DRM_ERROR(ptr noundef nonnull @.str) #2 %33 = load i32, ptr @ATOM_PPLL_INVALID, align 4, !tbaa !19 br label %34 34: ; preds = %26, %20, %16, %31, %14, %12 %35 = phi i32 [ %13, %12 ], [ %15, %14 ], [ %33, %31 ], [ %17, %16 ], [ %22, %20 ], [ %27, %26 ] ret i32 %35 } declare ptr @to_amdgpu_crtc(ptr noundef) local_unnamed_addr #1 declare i64 @ENCODER_MODE_IS_DP(i32 noundef) local_unnamed_addr #1 declare i32 @amdgpu_atombios_encoder_get_encoder_mode(i32 noundef) local_unnamed_addr #1 declare i32 @amdgpu_pll_get_shared_nondp_ppll(ptr noundef) local_unnamed_addr #1 declare i32 @amdgpu_pll_get_use_mask(ptr noundef) local_unnamed_addr #1 declare i32 @DRM_ERROR(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"drm_crtc", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"drm_device", !7, i64 0} !12 = !{!13, !14, i64 0} !13 = !{!"amdgpu_crtc", !14, i64 0} !14 = !{!"int", !8, i64 0} !15 = !{!16, !18, i64 0} !16 = !{!"amdgpu_device", !17, i64 0} !17 = !{!"TYPE_2__", !18, i64 0} !18 = !{!"long", !8, i64 0} !19 = !{!14, !14, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_dce_v6_0.c_dce_v6_0_pick_pll.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_dce_v6_0.c_dce_v6_0_pick_pll.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @ATOM_PPLL_INVALID = common local_unnamed_addr global i32 0, align 4 @ATOM_PPLL0 = common local_unnamed_addr global i32 0, align 4 @ATOM_PPLL2 = common local_unnamed_addr global i32 0, align 4 @ATOM_PPLL1 = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [27 x i8] c"unable to allocate a PPLL\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @dce_v6_0_pick_pll], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @dce_v6_0_pick_pll(ptr noundef %0) #0 { %2 = tail call ptr @to_amdgpu_crtc(ptr noundef %0) #2 %3 = load ptr, ptr %0, align 8, !tbaa !6 %4 = load ptr, ptr %3, align 8, !tbaa !11 %5 = load i32, ptr %2, align 4, !tbaa !13 %6 = tail call i32 @amdgpu_atombios_encoder_get_encoder_mode(i32 noundef %5) #2 %7 = tail call i64 @ENCODER_MODE_IS_DP(i32 noundef %6) #2 %8 = icmp eq i64 %7, 0 br i1 %8, label %16, label %9 9: ; preds = %1 %10 = load i64, ptr %4, align 8, !tbaa !16 %11 = icmp eq i64 %10, 0 br i1 %11, label %14, label %12 12: ; preds = %9 %13 = load i32, ptr @ATOM_PPLL_INVALID, align 4, !tbaa !20 br label %34 14: ; preds = %9 %15 = load i32, ptr @ATOM_PPLL0, align 4, !tbaa !20 br label %34 16: ; preds = %1 %17 = tail call i32 @amdgpu_pll_get_shared_nondp_ppll(ptr noundef nonnull %0) #2 %18 = load i32, ptr @ATOM_PPLL_INVALID, align 4, !tbaa !20 %19 = icmp eq i32 %17, %18 br i1 %19, label %20, label %34 20: ; preds = %16 %21 = tail call i32 @amdgpu_pll_get_use_mask(ptr noundef nonnull %0) #2 %22 = load i32, ptr @ATOM_PPLL2, align 4, !tbaa !20 %23 = shl nuw i32 1, %22 %24 = and i32 %23, %21 %25 = icmp eq i32 %24, 0 br i1 %25, label %34, label %26 26: ; preds = %20 %27 = load i32, ptr @ATOM_PPLL1, align 4, !tbaa !20 %28 = shl nuw i32 1, %27 %29 = and i32 %28, %21 %30 = icmp eq i32 %29, 0 br i1 %30, label %34, label %31 31: ; preds = %26 %32 = tail call i32 @DRM_ERROR(ptr noundef nonnull @.str) #2 %33 = load i32, ptr @ATOM_PPLL_INVALID, align 4, !tbaa !20 br label %34 34: ; preds = %26, %20, %16, %31, %14, %12 %35 = phi i32 [ %13, %12 ], [ %15, %14 ], [ %33, %31 ], [ %17, %16 ], [ %22, %20 ], [ %27, %26 ] ret i32 %35 } declare ptr @to_amdgpu_crtc(ptr noundef) local_unnamed_addr #1 declare i64 @ENCODER_MODE_IS_DP(i32 noundef) local_unnamed_addr #1 declare i32 @amdgpu_atombios_encoder_get_encoder_mode(i32 noundef) local_unnamed_addr #1 declare i32 @amdgpu_pll_get_shared_nondp_ppll(ptr noundef) local_unnamed_addr #1 declare i32 @amdgpu_pll_get_use_mask(ptr noundef) local_unnamed_addr #1 declare i32 @DRM_ERROR(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"drm_crtc", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 0} !12 = !{!"drm_device", !8, i64 0} !13 = !{!14, !15, i64 0} !14 = !{!"amdgpu_crtc", !15, i64 0} !15 = !{!"int", !9, i64 0} !16 = !{!17, !19, i64 0} !17 = !{!"amdgpu_device", !18, i64 0} !18 = !{!"TYPE_2__", !19, i64 0} !19 = !{!"long", !9, i64 0} !20 = !{!15, !15, i64 0}
linux_drivers_gpu_drm_amd_amdgpu_extr_dce_v6_0.c_dce_v6_0_pick_pll
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/m32r/kernel/extr_process.c_flush_thread.c' source_filename = "AnghaBench/fastsocket/kernel/arch/m32r/kernel/extr_process.c_flush_thread.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_4__ = type { %struct.TYPE_3__, i32 } %struct.TYPE_3__ = type { i32 } @.str = private unnamed_addr constant [10 x i8] c"pid = %d\0A\00", align 1 @current = dso_local local_unnamed_addr global ptr null, align 8 ; Function Attrs: nounwind uwtable define dso_local void @flush_thread() local_unnamed_addr #0 { %1 = load ptr, ptr @current, align 8, !tbaa !5 %2 = getelementptr inbounds %struct.TYPE_4__, ptr %1, i64 0, i32 1 %3 = load i32, ptr %2, align 4, !tbaa !9 %4 = tail call i32 @DPRINTK(ptr noundef nonnull @.str, i32 noundef %3) #2 %5 = load ptr, ptr @current, align 8, !tbaa !5 %6 = tail call i32 @memset(ptr noundef %5, i32 noundef 0, i32 noundef 4) #2 ret void } declare i32 @DPRINTK(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !12, i64 4} !10 = !{!"TYPE_4__", !11, i64 0, !12, i64 4} !11 = !{!"TYPE_3__", !12, i64 0} !12 = !{!"int", !7, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/m32r/kernel/extr_process.c_flush_thread.c' source_filename = "AnghaBench/fastsocket/kernel/arch/m32r/kernel/extr_process.c_flush_thread.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [10 x i8] c"pid = %d\0A\00", align 1 @current = common local_unnamed_addr global ptr null, align 8 ; Function Attrs: nounwind ssp uwtable(sync) define void @flush_thread() local_unnamed_addr #0 { %1 = load ptr, ptr @current, align 8, !tbaa !6 %2 = getelementptr inbounds i8, ptr %1, i64 4 %3 = load i32, ptr %2, align 4, !tbaa !10 %4 = tail call i32 @DPRINTK(ptr noundef nonnull @.str, i32 noundef %3) #2 %5 = load ptr, ptr @current, align 8, !tbaa !6 %6 = tail call i32 @memset(ptr noundef %5, i32 noundef 0, i32 noundef 4) #2 ret void } declare i32 @DPRINTK(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !13, i64 4} !11 = !{!"TYPE_4__", !12, i64 0, !13, i64 4} !12 = !{!"TYPE_3__", !13, i64 0} !13 = !{!"int", !8, i64 0}
fastsocket_kernel_arch_m32r_kernel_extr_process.c_flush_thread
; ModuleID = 'AnghaBench/linux/drivers/tty/extr_tty_ldsem.c___ldsem_wake.c' source_filename = "AnghaBench/linux/drivers/tty/extr_tty_ldsem.c___ldsem_wake.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.ld_semaphore = type { i32, i32 } @llvm.compiler.used = appending global [1 x ptr] [ptr @__ldsem_wake], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @__ldsem_wake(ptr noundef %0) #0 { %2 = getelementptr inbounds %struct.ld_semaphore, ptr %0, i64 0, i32 1 %3 = tail call i32 @list_empty(ptr noundef nonnull %2) #2 %4 = icmp eq i32 %3, 0 br i1 %4, label %5, label %7 5: ; preds = %1 %6 = tail call i32 @__ldsem_wake_writer(ptr noundef %0) #2 br label %12 7: ; preds = %1 %8 = tail call i32 @list_empty(ptr noundef %0) #2 %9 = icmp eq i32 %8, 0 br i1 %9, label %10, label %12 10: ; preds = %7 %11 = tail call i32 @__ldsem_wake_readers(ptr noundef %0) #2 br label %12 12: ; preds = %7, %10, %5 ret void } declare i32 @list_empty(ptr noundef) local_unnamed_addr #1 declare i32 @__ldsem_wake_writer(ptr noundef) local_unnamed_addr #1 declare i32 @__ldsem_wake_readers(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/linux/drivers/tty/extr_tty_ldsem.c___ldsem_wake.c' source_filename = "AnghaBench/linux/drivers/tty/extr_tty_ldsem.c___ldsem_wake.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @__ldsem_wake], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @__ldsem_wake(ptr noundef %0) #0 { %2 = getelementptr inbounds i8, ptr %0, i64 4 %3 = tail call i32 @list_empty(ptr noundef nonnull %2) #2 %4 = icmp eq i32 %3, 0 br i1 %4, label %5, label %7 5: ; preds = %1 %6 = tail call i32 @__ldsem_wake_writer(ptr noundef %0) #2 br label %12 7: ; preds = %1 %8 = tail call i32 @list_empty(ptr noundef %0) #2 %9 = icmp eq i32 %8, 0 br i1 %9, label %10, label %12 10: ; preds = %7 %11 = tail call i32 @__ldsem_wake_readers(ptr noundef %0) #2 br label %12 12: ; preds = %7, %10, %5 ret void } declare i32 @list_empty(ptr noundef) local_unnamed_addr #1 declare i32 @__ldsem_wake_writer(ptr noundef) local_unnamed_addr #1 declare i32 @__ldsem_wake_readers(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
linux_drivers_tty_extr_tty_ldsem.c___ldsem_wake
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/ssl/statem/extr_extensions_srvr.c_tls_parse_ctos_status_request.c' source_filename = "AnghaBench/freebsd/crypto/openssl/ssl/statem/extr_extensions_srvr.c_tls_parse_ctos_status_request.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_8__ = type { %struct.TYPE_7__, i64 } %struct.TYPE_7__ = type { i64, %struct.TYPE_6__ } %struct.TYPE_6__ = type { ptr, ptr } @SSL_AD_DECODE_ERROR = dso_local local_unnamed_addr global i32 0, align 4 @SSL_F_TLS_PARSE_CTOS_STATUS_REQUEST = dso_local local_unnamed_addr global i32 0, align 4 @SSL_R_BAD_EXTENSION = dso_local local_unnamed_addr global i32 0, align 4 @TLSEXT_STATUSTYPE_ocsp = dso_local local_unnamed_addr global i64 0, align 8 @TLSEXT_STATUSTYPE_nothing = dso_local local_unnamed_addr global i64 0, align 8 @SSL_AD_INTERNAL_ERROR = dso_local local_unnamed_addr global i32 0, align 4 @ERR_R_MALLOC_FAILURE = dso_local local_unnamed_addr global i32 0, align 4 @ERR_R_INTERNAL_ERROR = dso_local local_unnamed_addr global i32 0, align 4 @X509_EXTENSION_free = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local noundef i32 @tls_parse_ctos_status_request(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef readnone %3, i64 noundef %4) local_unnamed_addr #0 { %6 = alloca i32, align 4 %7 = alloca i32, align 4 %8 = alloca i32, align 4 %9 = alloca ptr, align 8 %10 = alloca ptr, align 8 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3 %11 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1 %12 = load i64, ptr %11, align 8, !tbaa !5 %13 = icmp eq i64 %12, 0 %14 = icmp eq ptr %3, null %15 = and i1 %14, %13 br i1 %15, label %16, label %121 16: ; preds = %5 %17 = tail call i32 @PACKET_get_1(ptr noundef %1, ptr noundef nonnull %0) #3 %18 = icmp eq i32 %17, 0 br i1 %18, label %19, label %24 19: ; preds = %16 %20 = load i32, ptr @SSL_AD_DECODE_ERROR, align 4, !tbaa !13 %21 = load i32, ptr @SSL_F_TLS_PARSE_CTOS_STATUS_REQUEST, align 4, !tbaa !13 %22 = load i32, ptr @SSL_R_BAD_EXTENSION, align 4, !tbaa !13 %23 = tail call i32 @SSLfatal(ptr noundef nonnull %0, i32 noundef %20, i32 noundef %21, i32 noundef %22) #3 br label %121 24: ; preds = %16 %25 = load i64, ptr %0, align 8, !tbaa !15 %26 = load i64, ptr @TLSEXT_STATUSTYPE_ocsp, align 8, !tbaa !16 %27 = icmp eq i64 %25, %26 br i1 %27, label %30, label %28 28: ; preds = %24 %29 = load i64, ptr @TLSEXT_STATUSTYPE_nothing, align 8, !tbaa !16 store i64 %29, ptr %0, align 8, !tbaa !15 br label %121 30: ; preds = %24 %31 = call i32 @PACKET_get_length_prefixed_2(ptr noundef %1, ptr noundef nonnull %6) #3 %32 = icmp eq i32 %31, 0 br i1 %32, label %33, label %38 33: ; preds = %30 %34 = load i32, ptr @SSL_AD_DECODE_ERROR, align 4, !tbaa !13 %35 = load i32, ptr @SSL_F_TLS_PARSE_CTOS_STATUS_REQUEST, align 4, !tbaa !13 %36 = load i32, ptr @SSL_R_BAD_EXTENSION, align 4, !tbaa !13 %37 = call i32 @SSLfatal(ptr noundef nonnull %0, i32 noundef %34, i32 noundef %35, i32 noundef %36) #3 br label %121 38: ; preds = %30 %39 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 1 %40 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 1, i32 1 %41 = load ptr, ptr %40, align 8, !tbaa !17 %42 = call i32 @sk_OCSP_RESPID_pop_free(ptr noundef %41, ptr noundef nonnull @OCSP_RESPID_free) #3 %43 = call i64 @PACKET_remaining(ptr noundef nonnull %6) #3 %44 = icmp sgt i64 %43, 0 br i1 %44, label %45, label %53 45: ; preds = %38 %46 = call ptr (...) @sk_OCSP_RESPID_new_null() #3 store ptr %46, ptr %40, align 8, !tbaa !17 %47 = icmp eq ptr %46, null br i1 %47, label %48, label %54 48: ; preds = %45 %49 = load i32, ptr @SSL_AD_INTERNAL_ERROR, align 4, !tbaa !13 %50 = load i32, ptr @SSL_F_TLS_PARSE_CTOS_STATUS_REQUEST, align 4, !tbaa !13 %51 = load i32, ptr @ERR_R_MALLOC_FAILURE, align 4, !tbaa !13 %52 = call i32 @SSLfatal(ptr noundef nonnull %0, i32 noundef %49, i32 noundef %50, i32 noundef %51) #3 br label %121 53: ; preds = %38 store ptr null, ptr %40, align 8, !tbaa !17 br label %54 54: ; preds = %45, %53 %55 = call i64 @PACKET_remaining(ptr noundef nonnull %6) #3 %56 = icmp sgt i64 %55, 0 br i1 %56, label %57, label %80 57: ; preds = %54, %77 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #3 %58 = call i32 @PACKET_get_length_prefixed_2(ptr noundef nonnull %6, ptr noundef nonnull %8) #3 %59 = icmp eq i32 %58, 0 br i1 %59, label %114, label %60 60: ; preds = %57 %61 = call i64 @PACKET_remaining(ptr noundef nonnull %8) #3 %62 = icmp eq i64 %61, 0 br i1 %62, label %114, label %63 63: ; preds = %60 %64 = call ptr @PACKET_data(ptr noundef nonnull %8) #3 store ptr %64, ptr %9, align 8, !tbaa !18 %65 = call i64 @PACKET_remaining(ptr noundef nonnull %8) #3 %66 = trunc i64 %65 to i32 %67 = call ptr @d2i_OCSP_RESPID(ptr noundef null, ptr noundef nonnull %9, i32 noundef %66) #3 %68 = icmp eq ptr %67, null br i1 %68, label %114, label %69 69: ; preds = %63 %70 = load ptr, ptr %9, align 8, !tbaa !18 %71 = call ptr @PACKET_end(ptr noundef nonnull %8) #3 %72 = icmp eq ptr %70, %71 br i1 %72, label %73, label %110 73: ; preds = %69 %74 = load ptr, ptr %40, align 8, !tbaa !17 %75 = call i32 @sk_OCSP_RESPID_push(ptr noundef %74, ptr noundef nonnull %67) #3 %76 = icmp eq i32 %75, 0 br i1 %76, label %110, label %77 77: ; preds = %73 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3 %78 = call i64 @PACKET_remaining(ptr noundef nonnull %6) #3 %79 = icmp sgt i64 %78, 0 br i1 %79, label %57, label %80, !llvm.loop !19 80: ; preds = %77, %54 %81 = call i32 @PACKET_as_length_prefixed_2(ptr noundef %1, ptr noundef nonnull %7) #3 %82 = icmp eq i32 %81, 0 br i1 %82, label %83, label %88 83: ; preds = %80 %84 = load i32, ptr @SSL_AD_DECODE_ERROR, align 4, !tbaa !13 %85 = load i32, ptr @SSL_F_TLS_PARSE_CTOS_STATUS_REQUEST, align 4, !tbaa !13 %86 = load i32, ptr @SSL_R_BAD_EXTENSION, align 4, !tbaa !13 %87 = call i32 @SSLfatal(ptr noundef nonnull %0, i32 noundef %84, i32 noundef %85, i32 noundef %86) #3 br label %121 88: ; preds = %80 %89 = call i64 @PACKET_remaining(ptr noundef nonnull %7) #3 %90 = icmp sgt i64 %89, 0 br i1 %90, label %91, label %121 91: ; preds = %88 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %10) #3 %92 = call ptr @PACKET_data(ptr noundef nonnull %7) #3 store ptr %92, ptr %10, align 8, !tbaa !18 %93 = load ptr, ptr %39, align 8, !tbaa !21 %94 = load i32, ptr @X509_EXTENSION_free, align 4, !tbaa !13 %95 = call i32 @sk_X509_EXTENSION_pop_free(ptr noundef %93, i32 noundef %94) #3 %96 = call i64 @PACKET_remaining(ptr noundef nonnull %7) #3 %97 = trunc i64 %96 to i32 %98 = call ptr @d2i_X509_EXTENSIONS(ptr noundef null, ptr noundef nonnull %10, i32 noundef %97) #3 store ptr %98, ptr %39, align 8, !tbaa !21 %99 = icmp eq ptr %98, null br i1 %99, label %104, label %100 100: ; preds = %91 %101 = load ptr, ptr %10, align 8, !tbaa !18 %102 = call ptr @PACKET_end(ptr noundef nonnull %7) #3 %103 = icmp eq ptr %101, %102 br i1 %103, label %109, label %104 104: ; preds = %100, %91 %105 = load i32, ptr @SSL_AD_DECODE_ERROR, align 4, !tbaa !13 %106 = load i32, ptr @SSL_F_TLS_PARSE_CTOS_STATUS_REQUEST, align 4, !tbaa !13 %107 = load i32, ptr @SSL_R_BAD_EXTENSION, align 4, !tbaa !13 %108 = call i32 @SSLfatal(ptr noundef nonnull %0, i32 noundef %105, i32 noundef %106, i32 noundef %107) #3 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %10) #3 br label %121 109: ; preds = %100 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %10) #3 br label %121 110: ; preds = %73, %69 %111 = phi ptr [ @SSL_AD_DECODE_ERROR, %69 ], [ @SSL_AD_INTERNAL_ERROR, %73 ] %112 = phi ptr [ @SSL_R_BAD_EXTENSION, %69 ], [ @ERR_R_INTERNAL_ERROR, %73 ] %113 = call i32 @OCSP_RESPID_free(ptr noundef nonnull %67) #3 br label %114 114: ; preds = %63, %57, %60, %110 %115 = phi ptr [ %111, %110 ], [ @SSL_AD_DECODE_ERROR, %60 ], [ @SSL_AD_DECODE_ERROR, %57 ], [ @SSL_AD_DECODE_ERROR, %63 ] %116 = phi ptr [ %112, %110 ], [ @SSL_R_BAD_EXTENSION, %60 ], [ @SSL_R_BAD_EXTENSION, %57 ], [ @SSL_R_BAD_EXTENSION, %63 ] %117 = load i32, ptr %115, align 4, !tbaa !13 %118 = load i32, ptr @SSL_F_TLS_PARSE_CTOS_STATUS_REQUEST, align 4, !tbaa !13 %119 = load i32, ptr %116, align 4, !tbaa !13 %120 = call i32 @SSLfatal(ptr noundef nonnull %0, i32 noundef %117, i32 noundef %118, i32 noundef %119) #3 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3 br label %121 121: ; preds = %88, %109, %104, %114, %5, %83, %48, %33, %28, %19 %122 = phi i32 [ 1, %28 ], [ 0, %48 ], [ 0, %83 ], [ 0, %33 ], [ 0, %19 ], [ 1, %5 ], [ 0, %114 ], [ 0, %104 ], [ 1, %109 ], [ 1, %88 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3 ret i32 %122 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @PACKET_get_1(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @SSLfatal(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @PACKET_get_length_prefixed_2(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @sk_OCSP_RESPID_pop_free(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @OCSP_RESPID_free(ptr noundef) #2 declare i64 @PACKET_remaining(ptr noundef) local_unnamed_addr #2 declare ptr @sk_OCSP_RESPID_new_null(...) local_unnamed_addr #2 declare ptr @PACKET_data(ptr noundef) local_unnamed_addr #2 declare ptr @d2i_OCSP_RESPID(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @PACKET_end(ptr noundef) local_unnamed_addr #2 declare i32 @sk_OCSP_RESPID_push(ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 declare i32 @PACKET_as_length_prefixed_2(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @sk_X509_EXTENSION_pop_free(ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @d2i_X509_EXTENSIONS(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !8, i64 24} !6 = !{!"TYPE_8__", !7, i64 0, !8, i64 24} !7 = !{!"TYPE_7__", !8, i64 0, !11, i64 8} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"TYPE_6__", !12, i64 0, !12, i64 8} !12 = !{!"any pointer", !9, i64 0} !13 = !{!14, !14, i64 0} !14 = !{!"int", !9, i64 0} !15 = !{!6, !8, i64 0} !16 = !{!8, !8, i64 0} !17 = !{!6, !12, i64 16} !18 = !{!12, !12, i64 0} !19 = distinct !{!19, !20} !20 = !{!"llvm.loop.mustprogress"} !21 = !{!6, !12, i64 8}
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/ssl/statem/extr_extensions_srvr.c_tls_parse_ctos_status_request.c' source_filename = "AnghaBench/freebsd/crypto/openssl/ssl/statem/extr_extensions_srvr.c_tls_parse_ctos_status_request.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SSL_AD_DECODE_ERROR = common local_unnamed_addr global i32 0, align 4 @SSL_F_TLS_PARSE_CTOS_STATUS_REQUEST = common local_unnamed_addr global i32 0, align 4 @SSL_R_BAD_EXTENSION = common local_unnamed_addr global i32 0, align 4 @TLSEXT_STATUSTYPE_ocsp = common local_unnamed_addr global i64 0, align 8 @TLSEXT_STATUSTYPE_nothing = common local_unnamed_addr global i64 0, align 8 @SSL_AD_INTERNAL_ERROR = common local_unnamed_addr global i32 0, align 4 @ERR_R_MALLOC_FAILURE = common local_unnamed_addr global i32 0, align 4 @ERR_R_INTERNAL_ERROR = common local_unnamed_addr global i32 0, align 4 @X509_EXTENSION_free = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define noundef i32 @tls_parse_ctos_status_request(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef readnone %3, i64 noundef %4) local_unnamed_addr #0 { %6 = alloca i32, align 4 %7 = alloca i32, align 4 %8 = alloca i32, align 4 %9 = alloca ptr, align 8 %10 = alloca ptr, align 8 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3 %11 = getelementptr inbounds i8, ptr %0, i64 24 %12 = load i64, ptr %11, align 8, !tbaa !6 %13 = icmp eq i64 %12, 0 %14 = icmp eq ptr %3, null %15 = and i1 %14, %13 br i1 %15, label %16, label %121 16: ; preds = %5 %17 = tail call i32 @PACKET_get_1(ptr noundef %1, ptr noundef nonnull %0) #3 %18 = icmp eq i32 %17, 0 br i1 %18, label %19, label %24 19: ; preds = %16 %20 = load i32, ptr @SSL_AD_DECODE_ERROR, align 4, !tbaa !14 %21 = load i32, ptr @SSL_F_TLS_PARSE_CTOS_STATUS_REQUEST, align 4, !tbaa !14 %22 = load i32, ptr @SSL_R_BAD_EXTENSION, align 4, !tbaa !14 %23 = tail call i32 @SSLfatal(ptr noundef nonnull %0, i32 noundef %20, i32 noundef %21, i32 noundef %22) #3 br label %121 24: ; preds = %16 %25 = load i64, ptr %0, align 8, !tbaa !16 %26 = load i64, ptr @TLSEXT_STATUSTYPE_ocsp, align 8, !tbaa !17 %27 = icmp eq i64 %25, %26 br i1 %27, label %30, label %28 28: ; preds = %24 %29 = load i64, ptr @TLSEXT_STATUSTYPE_nothing, align 8, !tbaa !17 store i64 %29, ptr %0, align 8, !tbaa !16 br label %121 30: ; preds = %24 %31 = call i32 @PACKET_get_length_prefixed_2(ptr noundef %1, ptr noundef nonnull %6) #3 %32 = icmp eq i32 %31, 0 br i1 %32, label %33, label %38 33: ; preds = %30 %34 = load i32, ptr @SSL_AD_DECODE_ERROR, align 4, !tbaa !14 %35 = load i32, ptr @SSL_F_TLS_PARSE_CTOS_STATUS_REQUEST, align 4, !tbaa !14 %36 = load i32, ptr @SSL_R_BAD_EXTENSION, align 4, !tbaa !14 %37 = call i32 @SSLfatal(ptr noundef nonnull %0, i32 noundef %34, i32 noundef %35, i32 noundef %36) #3 br label %121 38: ; preds = %30 %39 = getelementptr inbounds i8, ptr %0, i64 8 %40 = getelementptr inbounds i8, ptr %0, i64 16 %41 = load ptr, ptr %40, align 8, !tbaa !18 %42 = call i32 @sk_OCSP_RESPID_pop_free(ptr noundef %41, ptr noundef nonnull @OCSP_RESPID_free) #3 %43 = call i64 @PACKET_remaining(ptr noundef nonnull %6) #3 %44 = icmp sgt i64 %43, 0 br i1 %44, label %45, label %53 45: ; preds = %38 %46 = call ptr @sk_OCSP_RESPID_new_null() #3 store ptr %46, ptr %40, align 8, !tbaa !18 %47 = icmp eq ptr %46, null br i1 %47, label %48, label %54 48: ; preds = %45 %49 = load i32, ptr @SSL_AD_INTERNAL_ERROR, align 4, !tbaa !14 %50 = load i32, ptr @SSL_F_TLS_PARSE_CTOS_STATUS_REQUEST, align 4, !tbaa !14 %51 = load i32, ptr @ERR_R_MALLOC_FAILURE, align 4, !tbaa !14 %52 = call i32 @SSLfatal(ptr noundef nonnull %0, i32 noundef %49, i32 noundef %50, i32 noundef %51) #3 br label %121 53: ; preds = %38 store ptr null, ptr %40, align 8, !tbaa !18 br label %54 54: ; preds = %45, %53 %55 = call i64 @PACKET_remaining(ptr noundef nonnull %6) #3 %56 = icmp sgt i64 %55, 0 br i1 %56, label %57, label %80 57: ; preds = %54, %77 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %9) #3 %58 = call i32 @PACKET_get_length_prefixed_2(ptr noundef nonnull %6, ptr noundef nonnull %8) #3 %59 = icmp eq i32 %58, 0 br i1 %59, label %114, label %60 60: ; preds = %57 %61 = call i64 @PACKET_remaining(ptr noundef nonnull %8) #3 %62 = icmp eq i64 %61, 0 br i1 %62, label %114, label %63 63: ; preds = %60 %64 = call ptr @PACKET_data(ptr noundef nonnull %8) #3 store ptr %64, ptr %9, align 8, !tbaa !19 %65 = call i64 @PACKET_remaining(ptr noundef nonnull %8) #3 %66 = trunc i64 %65 to i32 %67 = call ptr @d2i_OCSP_RESPID(ptr noundef null, ptr noundef nonnull %9, i32 noundef %66) #3 %68 = icmp eq ptr %67, null br i1 %68, label %114, label %69 69: ; preds = %63 %70 = load ptr, ptr %9, align 8, !tbaa !19 %71 = call ptr @PACKET_end(ptr noundef nonnull %8) #3 %72 = icmp eq ptr %70, %71 br i1 %72, label %73, label %110 73: ; preds = %69 %74 = load ptr, ptr %40, align 8, !tbaa !18 %75 = call i32 @sk_OCSP_RESPID_push(ptr noundef %74, ptr noundef nonnull %67) #3 %76 = icmp eq i32 %75, 0 br i1 %76, label %110, label %77 77: ; preds = %73 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3 %78 = call i64 @PACKET_remaining(ptr noundef nonnull %6) #3 %79 = icmp sgt i64 %78, 0 br i1 %79, label %57, label %80, !llvm.loop !20 80: ; preds = %77, %54 %81 = call i32 @PACKET_as_length_prefixed_2(ptr noundef %1, ptr noundef nonnull %7) #3 %82 = icmp eq i32 %81, 0 br i1 %82, label %83, label %88 83: ; preds = %80 %84 = load i32, ptr @SSL_AD_DECODE_ERROR, align 4, !tbaa !14 %85 = load i32, ptr @SSL_F_TLS_PARSE_CTOS_STATUS_REQUEST, align 4, !tbaa !14 %86 = load i32, ptr @SSL_R_BAD_EXTENSION, align 4, !tbaa !14 %87 = call i32 @SSLfatal(ptr noundef nonnull %0, i32 noundef %84, i32 noundef %85, i32 noundef %86) #3 br label %121 88: ; preds = %80 %89 = call i64 @PACKET_remaining(ptr noundef nonnull %7) #3 %90 = icmp sgt i64 %89, 0 br i1 %90, label %91, label %121 91: ; preds = %88 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %10) #3 %92 = call ptr @PACKET_data(ptr noundef nonnull %7) #3 store ptr %92, ptr %10, align 8, !tbaa !19 %93 = load ptr, ptr %39, align 8, !tbaa !22 %94 = load i32, ptr @X509_EXTENSION_free, align 4, !tbaa !14 %95 = call i32 @sk_X509_EXTENSION_pop_free(ptr noundef %93, i32 noundef %94) #3 %96 = call i64 @PACKET_remaining(ptr noundef nonnull %7) #3 %97 = trunc i64 %96 to i32 %98 = call ptr @d2i_X509_EXTENSIONS(ptr noundef null, ptr noundef nonnull %10, i32 noundef %97) #3 store ptr %98, ptr %39, align 8, !tbaa !22 %99 = icmp eq ptr %98, null br i1 %99, label %104, label %100 100: ; preds = %91 %101 = load ptr, ptr %10, align 8, !tbaa !19 %102 = call ptr @PACKET_end(ptr noundef nonnull %7) #3 %103 = icmp eq ptr %101, %102 br i1 %103, label %109, label %104 104: ; preds = %100, %91 %105 = load i32, ptr @SSL_AD_DECODE_ERROR, align 4, !tbaa !14 %106 = load i32, ptr @SSL_F_TLS_PARSE_CTOS_STATUS_REQUEST, align 4, !tbaa !14 %107 = load i32, ptr @SSL_R_BAD_EXTENSION, align 4, !tbaa !14 %108 = call i32 @SSLfatal(ptr noundef nonnull %0, i32 noundef %105, i32 noundef %106, i32 noundef %107) #3 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %10) #3 br label %121 109: ; preds = %100 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %10) #3 br label %121 110: ; preds = %73, %69 %111 = phi ptr [ @SSL_AD_DECODE_ERROR, %69 ], [ @SSL_AD_INTERNAL_ERROR, %73 ] %112 = phi ptr [ @SSL_R_BAD_EXTENSION, %69 ], [ @ERR_R_INTERNAL_ERROR, %73 ] %113 = call i32 @OCSP_RESPID_free(ptr noundef nonnull %67) #3 br label %114 114: ; preds = %63, %57, %60, %110 %115 = phi ptr [ %111, %110 ], [ @SSL_AD_DECODE_ERROR, %60 ], [ @SSL_AD_DECODE_ERROR, %57 ], [ @SSL_AD_DECODE_ERROR, %63 ] %116 = phi ptr [ %112, %110 ], [ @SSL_R_BAD_EXTENSION, %60 ], [ @SSL_R_BAD_EXTENSION, %57 ], [ @SSL_R_BAD_EXTENSION, %63 ] %117 = load i32, ptr %115, align 4, !tbaa !14 %118 = load i32, ptr @SSL_F_TLS_PARSE_CTOS_STATUS_REQUEST, align 4, !tbaa !14 %119 = load i32, ptr %116, align 4, !tbaa !14 %120 = call i32 @SSLfatal(ptr noundef nonnull %0, i32 noundef %117, i32 noundef %118, i32 noundef %119) #3 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %9) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3 br label %121 121: ; preds = %88, %109, %104, %114, %5, %83, %48, %33, %28, %19 %122 = phi i32 [ 1, %28 ], [ 0, %48 ], [ 0, %83 ], [ 0, %33 ], [ 0, %19 ], [ 1, %5 ], [ 0, %114 ], [ 0, %104 ], [ 1, %109 ], [ 1, %88 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3 ret i32 %122 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @PACKET_get_1(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @SSLfatal(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @PACKET_get_length_prefixed_2(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @sk_OCSP_RESPID_pop_free(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @OCSP_RESPID_free(ptr noundef) #2 declare i64 @PACKET_remaining(ptr noundef) local_unnamed_addr #2 declare ptr @sk_OCSP_RESPID_new_null(...) local_unnamed_addr #2 declare ptr @PACKET_data(ptr noundef) local_unnamed_addr #2 declare ptr @d2i_OCSP_RESPID(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @PACKET_end(ptr noundef) local_unnamed_addr #2 declare i32 @sk_OCSP_RESPID_push(ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 declare i32 @PACKET_as_length_prefixed_2(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @sk_X509_EXTENSION_pop_free(ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @d2i_X509_EXTENSIONS(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !9, i64 24} !7 = !{!"TYPE_8__", !8, i64 0, !9, i64 24} !8 = !{!"TYPE_7__", !9, i64 0, !12, i64 8} !9 = !{!"long", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"} !12 = !{!"TYPE_6__", !13, i64 0, !13, i64 8} !13 = !{!"any pointer", !10, i64 0} !14 = !{!15, !15, i64 0} !15 = !{!"int", !10, i64 0} !16 = !{!7, !9, i64 0} !17 = !{!9, !9, i64 0} !18 = !{!7, !13, i64 16} !19 = !{!13, !13, i64 0} !20 = distinct !{!20, !21} !21 = !{!"llvm.loop.mustprogress"} !22 = !{!7, !13, i64 8}
freebsd_crypto_openssl_ssl_statem_extr_extensions_srvr.c_tls_parse_ctos_status_request
; ModuleID = 'AnghaBench/linux/drivers/scsi/extr_aha1542.c_aha1542_free_cmd.c' source_filename = "AnghaBench/linux/drivers/scsi/extr_aha1542.c_aha1542_free_cmd.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.aha1542_cmd = type { ptr, i32 } @DMA_TO_DEVICE = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @aha1542_free_cmd], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @aha1542_free_cmd(ptr noundef %0) #0 { %2 = tail call ptr @scsi_cmd_priv(ptr noundef %0) #2 %3 = load ptr, ptr %0, align 8, !tbaa !5 %4 = load ptr, ptr %3, align 8, !tbaa !10 %5 = load ptr, ptr %4, align 8, !tbaa !12 %6 = tail call i32 @scsi_sg_count(ptr noundef nonnull %0) #2 %7 = load ptr, ptr %2, align 8, !tbaa !14 %8 = icmp eq ptr %7, null br i1 %8, label %18, label %9 9: ; preds = %1 %10 = sext i32 %6 to i64 %11 = shl nsw i64 %10, 2 %12 = getelementptr inbounds %struct.aha1542_cmd, ptr %2, i64 0, i32 1 %13 = load i32, ptr %12, align 8, !tbaa !17 %14 = load i32, ptr @DMA_TO_DEVICE, align 4, !tbaa !18 %15 = tail call i32 @dma_unmap_single(ptr noundef %5, i32 noundef %13, i64 noundef %11, i32 noundef %14) #2 %16 = load ptr, ptr %2, align 8, !tbaa !14 %17 = tail call i32 @kfree(ptr noundef %16) #2 br label %18 18: ; preds = %9, %1 store ptr null, ptr %2, align 8, !tbaa !14 %19 = tail call i32 @scsi_dma_unmap(ptr noundef nonnull %0) #2 ret void } declare ptr @scsi_cmd_priv(ptr noundef) local_unnamed_addr #1 declare i32 @scsi_sg_count(ptr noundef) local_unnamed_addr #1 declare i32 @dma_unmap_single(ptr noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @kfree(ptr noundef) local_unnamed_addr #1 declare i32 @scsi_dma_unmap(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"scsi_cmnd", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"TYPE_4__", !7, i64 0} !12 = !{!13, !7, i64 0} !13 = !{!"TYPE_3__", !7, i64 0} !14 = !{!15, !7, i64 0} !15 = !{!"aha1542_cmd", !7, i64 0, !16, i64 8} !16 = !{!"int", !8, i64 0} !17 = !{!15, !16, i64 8} !18 = !{!16, !16, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/scsi/extr_aha1542.c_aha1542_free_cmd.c' source_filename = "AnghaBench/linux/drivers/scsi/extr_aha1542.c_aha1542_free_cmd.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @DMA_TO_DEVICE = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @aha1542_free_cmd], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @aha1542_free_cmd(ptr noundef %0) #0 { %2 = tail call ptr @scsi_cmd_priv(ptr noundef %0) #2 %3 = load ptr, ptr %0, align 8, !tbaa !6 %4 = load ptr, ptr %3, align 8, !tbaa !11 %5 = load ptr, ptr %4, align 8, !tbaa !13 %6 = tail call i32 @scsi_sg_count(ptr noundef nonnull %0) #2 %7 = load ptr, ptr %2, align 8, !tbaa !15 %8 = icmp eq ptr %7, null br i1 %8, label %18, label %9 9: ; preds = %1 %10 = sext i32 %6 to i64 %11 = shl nsw i64 %10, 2 %12 = getelementptr inbounds i8, ptr %2, i64 8 %13 = load i32, ptr %12, align 8, !tbaa !18 %14 = load i32, ptr @DMA_TO_DEVICE, align 4, !tbaa !19 %15 = tail call i32 @dma_unmap_single(ptr noundef %5, i32 noundef %13, i64 noundef %11, i32 noundef %14) #2 %16 = load ptr, ptr %2, align 8, !tbaa !15 %17 = tail call i32 @kfree(ptr noundef %16) #2 br label %18 18: ; preds = %9, %1 store ptr null, ptr %2, align 8, !tbaa !15 %19 = tail call i32 @scsi_dma_unmap(ptr noundef nonnull %0) #2 ret void } declare ptr @scsi_cmd_priv(ptr noundef) local_unnamed_addr #1 declare i32 @scsi_sg_count(ptr noundef) local_unnamed_addr #1 declare i32 @dma_unmap_single(ptr noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @kfree(ptr noundef) local_unnamed_addr #1 declare i32 @scsi_dma_unmap(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"scsi_cmnd", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 0} !12 = !{!"TYPE_4__", !8, i64 0} !13 = !{!14, !8, i64 0} !14 = !{!"TYPE_3__", !8, i64 0} !15 = !{!16, !8, i64 0} !16 = !{!"aha1542_cmd", !8, i64 0, !17, i64 8} !17 = !{!"int", !9, i64 0} !18 = !{!16, !17, i64 8} !19 = !{!17, !17, i64 0}
linux_drivers_scsi_extr_aha1542.c_aha1542_free_cmd
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/svnadmin/extr_svnadmin.c_get_dump_range.c' source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/svnadmin/extr_svnadmin.c_get_dump_range.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.svnadmin_opt_state = type { i32, i32 } @SVN_INVALID_REVNUM = dso_local local_unnamed_addr global i64 0, align 8 @SVN_ERR_CL_ARG_PARSING_ERROR = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [44 x i8] c"First revision cannot be higher than second\00", align 1 @SVN_NO_ERROR = dso_local local_unnamed_addr global ptr null, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @get_dump_range], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal ptr @get_dump_range(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #0 { %6 = alloca i64, align 8 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3 %7 = load i64, ptr @SVN_INVALID_REVNUM, align 8, !tbaa !5 store i64 %7, ptr %0, align 8, !tbaa !5 store i64 %7, ptr %1, align 8, !tbaa !5 %8 = tail call ptr @svn_repos_fs(ptr noundef %2) #3 %9 = call i32 @svn_fs_youngest_rev(ptr noundef nonnull %6, ptr noundef %8, ptr noundef %4) #3 %10 = call i32 @SVN_ERR(i32 noundef %9) #3 %11 = getelementptr inbounds %struct.svnadmin_opt_state, ptr %3, i64 0, i32 1 %12 = load i64, ptr %6, align 8, !tbaa !5 %13 = call i32 @get_revnum(ptr noundef nonnull %0, ptr noundef nonnull %11, i64 noundef %12, ptr noundef %2, ptr noundef %4) #3 %14 = call i32 @SVN_ERR(i32 noundef %13) #3 %15 = load i64, ptr %6, align 8, !tbaa !5 %16 = call i32 @get_revnum(ptr noundef nonnull %1, ptr noundef %3, i64 noundef %15, ptr noundef %2, ptr noundef %4) #3 %17 = call i32 @SVN_ERR(i32 noundef %16) #3 %18 = load i64, ptr %0, align 8, !tbaa !5 %19 = load i64, ptr @SVN_INVALID_REVNUM, align 8, !tbaa !5 %20 = icmp eq i64 %18, %19 br i1 %20, label %21, label %23 21: ; preds = %5 store i64 0, ptr %0, align 8, !tbaa !5 %22 = load i64, ptr %6, align 8, !tbaa !5 br label %26 23: ; preds = %5 %24 = load i64, ptr %1, align 8, !tbaa !5 %25 = icmp eq i64 %24, %19 br i1 %25, label %26, label %28 26: ; preds = %23, %21 %27 = phi i64 [ %22, %21 ], [ %18, %23 ] store i64 %27, ptr %1, align 8, !tbaa !5 br label %28 28: ; preds = %26, %23 %29 = phi i64 [ %24, %23 ], [ %27, %26 ] %30 = load i64, ptr %0, align 8, !tbaa !5 %31 = icmp sgt i64 %30, %29 br i1 %31, label %32, label %36 32: ; preds = %28 %33 = load i32, ptr @SVN_ERR_CL_ARG_PARSING_ERROR, align 4, !tbaa !9 %34 = call i32 @_(ptr noundef nonnull @.str) #3 %35 = call ptr @svn_error_create(i32 noundef %33, ptr noundef null, i32 noundef %34) #3 br label %38 36: ; preds = %28 %37 = load ptr, ptr @SVN_NO_ERROR, align 8, !tbaa !11 br label %38 38: ; preds = %36, %32 %39 = phi ptr [ %35, %32 ], [ %37, %36 ] call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3 ret ptr %39 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @svn_repos_fs(ptr noundef) local_unnamed_addr #2 declare i32 @SVN_ERR(i32 noundef) local_unnamed_addr #2 declare i32 @svn_fs_youngest_rev(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @get_revnum(ptr noundef, ptr noundef, i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare ptr @svn_error_create(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @_(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"int", !7, i64 0} !11 = !{!12, !12, i64 0} !12 = !{!"any pointer", !7, i64 0}
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/svnadmin/extr_svnadmin.c_get_dump_range.c' source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/svnadmin/extr_svnadmin.c_get_dump_range.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SVN_INVALID_REVNUM = common local_unnamed_addr global i64 0, align 8 @SVN_ERR_CL_ARG_PARSING_ERROR = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [44 x i8] c"First revision cannot be higher than second\00", align 1 @SVN_NO_ERROR = common local_unnamed_addr global ptr null, align 8 @llvm.used = appending global [1 x ptr] [ptr @get_dump_range], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal ptr @get_dump_range(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #0 { %6 = alloca i64, align 8 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3 %7 = load i64, ptr @SVN_INVALID_REVNUM, align 8, !tbaa !6 store i64 %7, ptr %0, align 8, !tbaa !6 store i64 %7, ptr %1, align 8, !tbaa !6 %8 = tail call ptr @svn_repos_fs(ptr noundef %2) #3 %9 = call i32 @svn_fs_youngest_rev(ptr noundef nonnull %6, ptr noundef %8, ptr noundef %4) #3 %10 = call i32 @SVN_ERR(i32 noundef %9) #3 %11 = getelementptr inbounds i8, ptr %3, i64 4 %12 = load i64, ptr %6, align 8, !tbaa !6 %13 = call i32 @get_revnum(ptr noundef nonnull %0, ptr noundef nonnull %11, i64 noundef %12, ptr noundef %2, ptr noundef %4) #3 %14 = call i32 @SVN_ERR(i32 noundef %13) #3 %15 = load i64, ptr %6, align 8, !tbaa !6 %16 = call i32 @get_revnum(ptr noundef nonnull %1, ptr noundef %3, i64 noundef %15, ptr noundef %2, ptr noundef %4) #3 %17 = call i32 @SVN_ERR(i32 noundef %16) #3 %18 = load i64, ptr %0, align 8, !tbaa !6 %19 = load i64, ptr @SVN_INVALID_REVNUM, align 8, !tbaa !6 %20 = icmp eq i64 %18, %19 br i1 %20, label %21, label %23 21: ; preds = %5 store i64 0, ptr %0, align 8, !tbaa !6 %22 = load i64, ptr %6, align 8, !tbaa !6 br label %26 23: ; preds = %5 %24 = load i64, ptr %1, align 8, !tbaa !6 %25 = icmp eq i64 %24, %19 br i1 %25, label %26, label %28 26: ; preds = %23, %21 %27 = phi i64 [ %22, %21 ], [ %18, %23 ] store i64 %27, ptr %1, align 8, !tbaa !6 br label %28 28: ; preds = %26, %23 %29 = phi i64 [ %24, %23 ], [ %27, %26 ] %30 = load i64, ptr %0, align 8, !tbaa !6 %31 = icmp sgt i64 %30, %29 br i1 %31, label %32, label %36 32: ; preds = %28 %33 = load i32, ptr @SVN_ERR_CL_ARG_PARSING_ERROR, align 4, !tbaa !10 %34 = call i32 @_(ptr noundef nonnull @.str) #3 %35 = call ptr @svn_error_create(i32 noundef %33, ptr noundef null, i32 noundef %34) #3 br label %38 36: ; preds = %28 %37 = load ptr, ptr @SVN_NO_ERROR, align 8, !tbaa !12 br label %38 38: ; preds = %36, %32 %39 = phi ptr [ %35, %32 ], [ %37, %36 ] call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3 ret ptr %39 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @svn_repos_fs(ptr noundef) local_unnamed_addr #2 declare i32 @SVN_ERR(i32 noundef) local_unnamed_addr #2 declare i32 @svn_fs_youngest_rev(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @get_revnum(ptr noundef, ptr noundef, i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare ptr @svn_error_create(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @_(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"any pointer", !8, i64 0}
freebsd_contrib_subversion_subversion_svnadmin_extr_svnadmin.c_get_dump_range
; ModuleID = 'AnghaBench/mpv/video/out/extr_drm_common.c_setup_mode_by_idx.c' source_filename = "AnghaBench/mpv/video/out/extr_drm_common.c_setup_mode_by_idx.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_4__ = type { i32, ptr } %struct.kms = type { ptr, %struct.TYPE_3__ } %struct.TYPE_3__ = type { i32 } @.str = private unnamed_addr constant [28 x i8] c"Bad mode index (max = %d).\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @setup_mode_by_idx], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef i32 @setup_mode_by_idx(ptr noundef %0, i32 noundef %1) #0 { %3 = load ptr, ptr %0, align 8, !tbaa !5 %4 = load i32, ptr %3, align 8, !tbaa !12 %5 = icmp ugt i32 %4, %1 br i1 %5, label %9, label %6 6: ; preds = %2 %7 = add i32 %4, -1 %8 = tail call i32 @MP_ERR(ptr noundef nonnull %0, ptr noundef nonnull @.str, i32 noundef %7) #2 br label %16 9: ; preds = %2 %10 = getelementptr inbounds %struct.TYPE_4__, ptr %3, i64 0, i32 1 %11 = load ptr, ptr %10, align 8, !tbaa !14 %12 = zext i32 %1 to i64 %13 = getelementptr inbounds i32, ptr %11, i64 %12 %14 = load i32, ptr %13, align 4, !tbaa !15 %15 = getelementptr inbounds %struct.kms, ptr %0, i64 0, i32 1 store i32 %14, ptr %15, align 8, !tbaa !16 br label %16 16: ; preds = %9, %6 %17 = phi i32 [ 0, %6 ], [ 1, %9 ] ret i32 %17 } declare i32 @MP_ERR(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"kms", !7, i64 0, !10, i64 8} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"TYPE_3__", !11, i64 0} !11 = !{!"int", !8, i64 0} !12 = !{!13, !11, i64 0} !13 = !{!"TYPE_4__", !11, i64 0, !7, i64 8} !14 = !{!13, !7, i64 8} !15 = !{!11, !11, i64 0} !16 = !{!6, !11, i64 8}
; ModuleID = 'AnghaBench/mpv/video/out/extr_drm_common.c_setup_mode_by_idx.c' source_filename = "AnghaBench/mpv/video/out/extr_drm_common.c_setup_mode_by_idx.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [28 x i8] c"Bad mode index (max = %d).\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @setup_mode_by_idx], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 0, 2) i32 @setup_mode_by_idx(ptr noundef %0, i32 noundef %1) #0 { %3 = load ptr, ptr %0, align 8, !tbaa !6 %4 = load i32, ptr %3, align 8, !tbaa !13 %5 = icmp ugt i32 %4, %1 br i1 %5, label %9, label %6 6: ; preds = %2 %7 = add i32 %4, -1 %8 = tail call i32 @MP_ERR(ptr noundef nonnull %0, ptr noundef nonnull @.str, i32 noundef %7) #2 br label %16 9: ; preds = %2 %10 = getelementptr inbounds i8, ptr %3, i64 8 %11 = load ptr, ptr %10, align 8, !tbaa !15 %12 = zext i32 %1 to i64 %13 = getelementptr inbounds i32, ptr %11, i64 %12 %14 = load i32, ptr %13, align 4, !tbaa !16 %15 = getelementptr inbounds i8, ptr %0, i64 8 store i32 %14, ptr %15, align 8, !tbaa !17 br label %16 16: ; preds = %9, %6 %17 = phi i32 [ 0, %6 ], [ 1, %9 ] ret i32 %17 } declare i32 @MP_ERR(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"kms", !8, i64 0, !11, i64 8} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"TYPE_3__", !12, i64 0} !12 = !{!"int", !9, i64 0} !13 = !{!14, !12, i64 0} !14 = !{!"TYPE_4__", !12, i64 0, !8, i64 8} !15 = !{!14, !8, i64 8} !16 = !{!12, !12, i64 0} !17 = !{!7, !12, i64 8}
mpv_video_out_extr_drm_common.c_setup_mode_by_idx
; ModuleID = 'AnghaBench/redis/deps/jemalloc/src/extr_ckh.c_ckh_string_keycomp.c' source_filename = "AnghaBench/redis/deps/jemalloc/src/extr_ckh.c_ckh_string_keycomp.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local i32 @ckh_string_keycomp(ptr noundef readonly %0, ptr noundef readonly %1) local_unnamed_addr #0 { %3 = icmp ne ptr %0, null %4 = zext i1 %3 to i32 %5 = tail call i32 @assert(i32 noundef %4) #3 %6 = icmp ne ptr %1, null %7 = zext i1 %6 to i32 %8 = tail call i32 @assert(i32 noundef %7) #3 %9 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %0, ptr noundef nonnull dereferenceable(1) %1) %10 = icmp eq i32 %9, 0 %11 = zext i1 %10 to i32 ret i32 %11 } declare i32 @assert(i32 noundef) local_unnamed_addr #1 ; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read) declare i32 @strcmp(ptr nocapture noundef, ptr nocapture noundef) local_unnamed_addr #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/redis/deps/jemalloc/src/extr_ckh.c_ckh_string_keycomp.c' source_filename = "AnghaBench/redis/deps/jemalloc/src/extr_ckh.c_ckh_string_keycomp.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define range(i32 0, 2) i32 @ckh_string_keycomp(ptr noundef readonly %0, ptr noundef readonly %1) local_unnamed_addr #0 { %3 = icmp ne ptr %0, null %4 = zext i1 %3 to i32 %5 = tail call i32 @assert(i32 noundef %4) #3 %6 = icmp ne ptr %1, null %7 = zext i1 %6 to i32 %8 = tail call i32 @assert(i32 noundef %7) #3 %9 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %0, ptr noundef nonnull dereferenceable(1) %1) %10 = icmp eq i32 %9, 0 %11 = zext i1 %10 to i32 ret i32 %11 } declare i32 @assert(i32 noundef) local_unnamed_addr #1 ; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read) declare i32 @strcmp(ptr nocapture noundef, ptr nocapture noundef) local_unnamed_addr #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
redis_deps_jemalloc_src_extr_ckh.c_ckh_string_keycomp
; ModuleID = 'AnghaBench/linux/net/bridge/extr_br_stp_if.c_br_stp_disable_port.c' source_filename = "AnghaBench/linux/net/bridge/extr_br_stp_if.c_br_stp_disable_port.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.net_bridge_port = type { i32, i32, i32, i32, i64, i64, ptr } @BR_STATE_DISABLED = dso_local local_unnamed_addr global i32 0, align 4 @RTM_NEWLINK = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local void @br_stp_disable_port(ptr noundef %0) local_unnamed_addr #0 { %2 = getelementptr inbounds %struct.net_bridge_port, ptr %0, i64 0, i32 6 %3 = load ptr, ptr %2, align 8, !tbaa !5 %4 = tail call i32 @br_is_root_bridge(ptr noundef %3) #3 %5 = tail call i32 @br_become_designated_port(ptr noundef %0) #3 %6 = load i32, ptr @BR_STATE_DISABLED, align 4, !tbaa !12 %7 = tail call i32 @br_set_state(ptr noundef %0, i32 noundef %6) #3 %8 = getelementptr inbounds %struct.net_bridge_port, ptr %0, i64 0, i32 4 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %8, i8 0, i64 16, i1 false) %9 = load i32, ptr @RTM_NEWLINK, align 4, !tbaa !12 %10 = tail call i32 @br_ifinfo_notify(i32 noundef %9, ptr noundef null, ptr noundef %0) #3 %11 = getelementptr inbounds %struct.net_bridge_port, ptr %0, i64 0, i32 3 %12 = tail call i32 @del_timer(ptr noundef nonnull %11) #3 %13 = getelementptr inbounds %struct.net_bridge_port, ptr %0, i64 0, i32 2 %14 = tail call i32 @del_timer(ptr noundef nonnull %13) #3 %15 = getelementptr inbounds %struct.net_bridge_port, ptr %0, i64 0, i32 1 %16 = tail call i32 @del_timer(ptr noundef nonnull %15) #3 %17 = load i32, ptr %0, align 8, !tbaa !13 %18 = tail call i32 @rcu_access_pointer(i32 noundef %17) #3 %19 = icmp eq i32 %18, 0 br i1 %19, label %20, label %22 20: ; preds = %1 %21 = tail call i32 @br_fdb_delete_by_port(ptr noundef %3, ptr noundef nonnull %0, i32 noundef 0, i32 noundef 0) #3 br label %22 22: ; preds = %20, %1 %23 = tail call i32 @br_multicast_disable_port(ptr noundef nonnull %0) #3 %24 = tail call i32 @br_configuration_update(ptr noundef %3) #3 %25 = tail call i32 @br_port_state_selection(ptr noundef %3) #3 %26 = tail call i32 @br_is_root_bridge(ptr noundef %3) #3 %27 = icmp eq i32 %26, 0 %28 = icmp ne i32 %4, 0 %29 = select i1 %27, i1 true, i1 %28 br i1 %29, label %32, label %30 30: ; preds = %22 %31 = tail call i32 @br_become_root_bridge(ptr noundef %3) #3 br label %32 32: ; preds = %30, %22 ret void } declare i32 @br_is_root_bridge(ptr noundef) local_unnamed_addr #1 declare i32 @br_become_designated_port(ptr noundef) local_unnamed_addr #1 declare i32 @br_set_state(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @br_ifinfo_notify(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @del_timer(ptr noundef) local_unnamed_addr #1 declare i32 @rcu_access_pointer(i32 noundef) local_unnamed_addr #1 declare i32 @br_fdb_delete_by_port(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @br_multicast_disable_port(ptr noundef) local_unnamed_addr #1 declare i32 @br_configuration_update(ptr noundef) local_unnamed_addr #1 declare i32 @br_port_state_selection(ptr noundef) local_unnamed_addr #1 declare i32 @br_become_root_bridge(ptr noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !11, i64 32} !6 = !{!"net_bridge_port", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !10, i64 16, !10, i64 24, !11, i64 32} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"long", !8, i64 0} !11 = !{!"any pointer", !8, i64 0} !12 = !{!7, !7, i64 0} !13 = !{!6, !7, i64 0}
; ModuleID = 'AnghaBench/linux/net/bridge/extr_br_stp_if.c_br_stp_disable_port.c' source_filename = "AnghaBench/linux/net/bridge/extr_br_stp_if.c_br_stp_disable_port.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @BR_STATE_DISABLED = common local_unnamed_addr global i32 0, align 4 @RTM_NEWLINK = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define void @br_stp_disable_port(ptr noundef %0) local_unnamed_addr #0 { %2 = getelementptr inbounds i8, ptr %0, i64 32 %3 = load ptr, ptr %2, align 8, !tbaa !6 %4 = tail call i32 @br_is_root_bridge(ptr noundef %3) #3 %5 = tail call i32 @br_become_designated_port(ptr noundef %0) #3 %6 = load i32, ptr @BR_STATE_DISABLED, align 4, !tbaa !13 %7 = tail call i32 @br_set_state(ptr noundef %0, i32 noundef %6) #3 %8 = getelementptr inbounds i8, ptr %0, i64 16 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %8, i8 0, i64 16, i1 false) %9 = load i32, ptr @RTM_NEWLINK, align 4, !tbaa !13 %10 = tail call i32 @br_ifinfo_notify(i32 noundef %9, ptr noundef null, ptr noundef %0) #3 %11 = getelementptr inbounds i8, ptr %0, i64 12 %12 = tail call i32 @del_timer(ptr noundef nonnull %11) #3 %13 = getelementptr inbounds i8, ptr %0, i64 8 %14 = tail call i32 @del_timer(ptr noundef nonnull %13) #3 %15 = getelementptr inbounds i8, ptr %0, i64 4 %16 = tail call i32 @del_timer(ptr noundef nonnull %15) #3 %17 = load i32, ptr %0, align 8, !tbaa !14 %18 = tail call i32 @rcu_access_pointer(i32 noundef %17) #3 %19 = icmp eq i32 %18, 0 br i1 %19, label %20, label %22 20: ; preds = %1 %21 = tail call i32 @br_fdb_delete_by_port(ptr noundef %3, ptr noundef nonnull %0, i32 noundef 0, i32 noundef 0) #3 br label %22 22: ; preds = %20, %1 %23 = tail call i32 @br_multicast_disable_port(ptr noundef nonnull %0) #3 %24 = tail call i32 @br_configuration_update(ptr noundef %3) #3 %25 = tail call i32 @br_port_state_selection(ptr noundef %3) #3 %26 = tail call i32 @br_is_root_bridge(ptr noundef %3) #3 %27 = icmp eq i32 %26, 0 %28 = icmp ne i32 %4, 0 %29 = select i1 %27, i1 true, i1 %28 br i1 %29, label %32, label %30 30: ; preds = %22 %31 = tail call i32 @br_become_root_bridge(ptr noundef %3) #3 br label %32 32: ; preds = %30, %22 ret void } declare i32 @br_is_root_bridge(ptr noundef) local_unnamed_addr #1 declare i32 @br_become_designated_port(ptr noundef) local_unnamed_addr #1 declare i32 @br_set_state(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @br_ifinfo_notify(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @del_timer(ptr noundef) local_unnamed_addr #1 declare i32 @rcu_access_pointer(i32 noundef) local_unnamed_addr #1 declare i32 @br_fdb_delete_by_port(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @br_multicast_disable_port(ptr noundef) local_unnamed_addr #1 declare i32 @br_configuration_update(ptr noundef) local_unnamed_addr #1 declare i32 @br_port_state_selection(ptr noundef) local_unnamed_addr #1 declare i32 @br_become_root_bridge(ptr noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !12, i64 32} !7 = !{!"net_bridge_port", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !11, i64 16, !11, i64 24, !12, i64 32} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"long", !9, i64 0} !12 = !{!"any pointer", !9, i64 0} !13 = !{!8, !8, i64 0} !14 = !{!7, !8, i64 0}
linux_net_bridge_extr_br_stp_if.c_br_stp_disable_port
; ModuleID = 'AnghaBench/mimikatz/modules/rpc/extr_kull_m_rpc_ms-pac.c_PKERB_VALIDATION_INFO_Encode.c' source_filename = "AnghaBench/mimikatz/modules/rpc/extr_kull_m_rpc_ms-pac.c_PKERB_VALIDATION_INFO_Encode.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_2__ = type { ptr } @__MIDL_TypePicklingInfo = dso_local global i32 0, align 4 @msKrbPac_StubDesc = dso_local global i32 0, align 4 @ms_pac__MIDL_TypeFormatString = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8 @_ms_pac_PKERB_VALIDATION_INFO_idx = dso_local local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind uwtable define dso_local void @PKERB_VALIDATION_INFO_Encode(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = load ptr, ptr @ms_pac__MIDL_TypeFormatString, align 8, !tbaa !5 %4 = load i64, ptr @_ms_pac_PKERB_VALIDATION_INFO_idx, align 8, !tbaa !10 %5 = getelementptr inbounds i32, ptr %3, i64 %4 %6 = ptrtoint ptr %5 to i64 %7 = trunc i64 %6 to i32 %8 = tail call i32 @NdrMesTypeEncode2(i32 noundef %0, i32 noundef ptrtoint (ptr @__MIDL_TypePicklingInfo to i32), ptr noundef nonnull @msKrbPac_StubDesc, i32 noundef %7, ptr noundef %1) #2 ret void } declare i32 @NdrMesTypeEncode2(i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_2__", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"long", !8, i64 0}
; ModuleID = 'AnghaBench/mimikatz/modules/rpc/extr_kull_m_rpc_ms-pac.c_PKERB_VALIDATION_INFO_Encode.c' source_filename = "AnghaBench/mimikatz/modules/rpc/extr_kull_m_rpc_ms-pac.c_PKERB_VALIDATION_INFO_Encode.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_2__ = type { ptr } @__MIDL_TypePicklingInfo = common global i32 0, align 4 @msKrbPac_StubDesc = common global i32 0, align 4 @ms_pac__MIDL_TypeFormatString = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8 @_ms_pac_PKERB_VALIDATION_INFO_idx = common local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind ssp uwtable(sync) define void @PKERB_VALIDATION_INFO_Encode(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = load ptr, ptr @ms_pac__MIDL_TypeFormatString, align 8, !tbaa !6 %4 = load i64, ptr @_ms_pac_PKERB_VALIDATION_INFO_idx, align 8, !tbaa !11 %5 = getelementptr inbounds i32, ptr %3, i64 %4 %6 = ptrtoint ptr %5 to i64 %7 = trunc i64 %6 to i32 %8 = tail call i32 @NdrMesTypeEncode2(i32 noundef %0, i32 noundef ptrtoint (ptr @__MIDL_TypePicklingInfo to i32), ptr noundef nonnull @msKrbPac_StubDesc, i32 noundef %7, ptr noundef %1) #2 ret void } declare i32 @NdrMesTypeEncode2(i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_2__", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !12, i64 0} !12 = !{!"long", !9, i64 0}
mimikatz_modules_rpc_extr_kull_m_rpc_ms-pac.c_PKERB_VALIDATION_INFO_Encode
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_s626.c_GetLoadTrig_B.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_s626.c_GetLoadTrig_B.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @CRBBIT_LOADSRC_B = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @GetLoadTrig_B], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @GetLoadTrig_B(ptr noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = load i32, ptr %1, align 4, !tbaa !5 %4 = tail call i32 @DEBIread(ptr noundef %0, i32 noundef %3) #2 %5 = load i32, ptr @CRBBIT_LOADSRC_B, align 4, !tbaa !10 %6 = ashr i32 %4, %5 %7 = and i32 %6, 3 ret i32 %7 } declare i32 @DEBIread(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"enc_private", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_s626.c_GetLoadTrig_B.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_s626.c_GetLoadTrig_B.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @CRBBIT_LOADSRC_B = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @GetLoadTrig_B], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 0, 4) i32 @GetLoadTrig_B(ptr noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = load i32, ptr %1, align 4, !tbaa !6 %4 = tail call i32 @DEBIread(ptr noundef %0, i32 noundef %3) #2 %5 = load i32, ptr @CRBBIT_LOADSRC_B, align 4, !tbaa !11 %6 = ashr i32 %4, %5 %7 = and i32 %6, 3 ret i32 %7 } declare i32 @DEBIread(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"enc_private", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0}
fastsocket_kernel_drivers_staging_comedi_drivers_extr_s626.c_GetLoadTrig_B
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/extr_hclge_main.c_hclge_reset.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/extr_hclge_main.c_hclge_reset.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.hclge_dev = type { i32, i32, i32, %struct.TYPE_2__, i32, i32 } %struct.TYPE_2__ = type { i32, i32, i32, i32 } @HNAE3_DOWN_CLIENT = dso_local local_unnamed_addr global i32 0, align 4 @HNAE3_UNINIT_CLIENT = dso_local local_unnamed_addr global i32 0, align 4 @HNAE3_INIT_CLIENT = dso_local local_unnamed_addr global i32 0, align 4 @HCLGE_RESET_MAX_FAIL_CNT = dso_local local_unnamed_addr global i32 0, align 4 @HNAE3_UP_CLIENT = dso_local local_unnamed_addr global i32 0, align 4 @jiffies = dso_local local_unnamed_addr global i32 0, align 4 @HNAE3_NONE_RESET = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @hclge_reset], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @hclge_reset(ptr noundef %0) #0 { %2 = getelementptr inbounds %struct.hclge_dev, ptr %0, i64 0, i32 5 %3 = load i32, ptr %2, align 4, !tbaa !5 %4 = tail call ptr @pci_get_drvdata(i32 noundef %3) #2 %5 = load i32, ptr %0, align 4, !tbaa !11 store i32 %5, ptr %4, align 4, !tbaa !12 %6 = getelementptr inbounds %struct.hclge_dev, ptr %0, i64 0, i32 3 %7 = getelementptr inbounds %struct.hclge_dev, ptr %0, i64 0, i32 3, i32 3 %8 = load i32, ptr %7, align 4, !tbaa !14 %9 = add nsw i32 %8, 1 store i32 %9, ptr %7, align 4, !tbaa !14 %10 = load i32, ptr @HNAE3_DOWN_CLIENT, align 4, !tbaa !15 %11 = tail call i32 @hclge_notify_roce_client(ptr noundef nonnull %0, i32 noundef %10) #2 %12 = icmp eq i32 %11, 0 br i1 %12, label %13, label %79 13: ; preds = %1 %14 = tail call i32 @hclge_reset_prepare_down(ptr noundef nonnull %0) #2 %15 = icmp eq i32 %14, 0 br i1 %15, label %16, label %79 16: ; preds = %13 %17 = tail call i32 (...) @rtnl_lock() #2 %18 = load i32, ptr @HNAE3_DOWN_CLIENT, align 4, !tbaa !15 %19 = tail call i32 @hclge_notify_client(ptr noundef nonnull %0, i32 noundef %18) #2 %20 = icmp eq i32 %19, 0 br i1 %20, label %21, label %77 21: ; preds = %16 %22 = tail call i32 (...) @rtnl_unlock() #2 %23 = tail call i32 @hclge_reset_prepare_wait(ptr noundef nonnull %0) #2 %24 = icmp eq i32 %23, 0 br i1 %24, label %25, label %79 25: ; preds = %21 %26 = tail call i64 @hclge_reset_wait(ptr noundef nonnull %0) #2 %27 = icmp eq i64 %26, 0 br i1 %27, label %28, label %79 28: ; preds = %25 %29 = getelementptr inbounds %struct.hclge_dev, ptr %0, i64 0, i32 3, i32 2 %30 = load i32, ptr %29, align 4, !tbaa !16 %31 = add nsw i32 %30, 1 store i32 %31, ptr %29, align 4, !tbaa !16 %32 = load i32, ptr @HNAE3_UNINIT_CLIENT, align 4, !tbaa !15 %33 = tail call i32 @hclge_notify_roce_client(ptr noundef nonnull %0, i32 noundef %32) #2 %34 = icmp eq i32 %33, 0 br i1 %34, label %35, label %79 35: ; preds = %28 %36 = tail call i32 (...) @rtnl_lock() #2 %37 = tail call i32 @hclge_reset_stack(ptr noundef nonnull %0) #2 %38 = icmp eq i32 %37, 0 br i1 %38, label %39, label %77 39: ; preds = %35 %40 = tail call i32 @hclge_clear_reset_cause(ptr noundef nonnull %0) #2 %41 = tail call i32 @hclge_reset_prepare_up(ptr noundef nonnull %0) #2 %42 = icmp eq i32 %41, 0 br i1 %42, label %43, label %77 43: ; preds = %39 %44 = tail call i32 (...) @rtnl_unlock() #2 %45 = load i32, ptr @HNAE3_INIT_CLIENT, align 4, !tbaa !15 %46 = tail call i32 @hclge_notify_roce_client(ptr noundef nonnull %0, i32 noundef %45) #2 %47 = icmp eq i32 %46, 0 br i1 %47, label %53, label %48 48: ; preds = %43 %49 = load i32, ptr %6, align 4, !tbaa !17 %50 = load i32, ptr @HCLGE_RESET_MAX_FAIL_CNT, align 4, !tbaa !15 %51 = add nsw i32 %50, -1 %52 = icmp slt i32 %49, %51 br i1 %52, label %79, label %53 53: ; preds = %48, %43 %54 = tail call i32 (...) @rtnl_lock() #2 %55 = load i32, ptr @HNAE3_UP_CLIENT, align 4, !tbaa !15 %56 = tail call i32 @hclge_notify_client(ptr noundef nonnull %0, i32 noundef %55) #2 %57 = icmp eq i32 %56, 0 br i1 %57, label %58, label %77 58: ; preds = %53 %59 = tail call i32 (...) @rtnl_unlock() #2 %60 = load i32, ptr @HNAE3_UP_CLIENT, align 4, !tbaa !15 %61 = tail call i32 @hclge_notify_roce_client(ptr noundef nonnull %0, i32 noundef %60) #2 %62 = icmp eq i32 %61, 0 br i1 %62, label %63, label %79 63: ; preds = %58 %64 = load i32, ptr @jiffies, align 4, !tbaa !15 %65 = getelementptr inbounds %struct.hclge_dev, ptr %0, i64 0, i32 4 store i32 %64, ptr %65, align 4, !tbaa !18 store i32 0, ptr %6, align 4, !tbaa !17 %66 = getelementptr inbounds %struct.hclge_dev, ptr %0, i64 0, i32 3, i32 1 %67 = load i32, ptr %66, align 4, !tbaa !19 %68 = add nsw i32 %67, 1 store i32 %68, ptr %66, align 4, !tbaa !19 %69 = load i32, ptr @HNAE3_NONE_RESET, align 4, !tbaa !15 store i32 %69, ptr %4, align 4, !tbaa !12 %70 = getelementptr inbounds %struct.hclge_dev, ptr %0, i64 0, i32 2 %71 = tail call i32 @hclge_get_reset_level(ptr noundef nonnull %4, ptr noundef nonnull %70) #2 %72 = load i32, ptr @HNAE3_NONE_RESET, align 4, !tbaa !15 %73 = icmp eq i32 %71, %72 br i1 %73, label %84, label %74 74: ; preds = %63 %75 = getelementptr inbounds %struct.hclge_dev, ptr %0, i64 0, i32 1 %76 = tail call i32 @set_bit(i32 noundef %71, ptr noundef nonnull %75) #2 br label %84 77: ; preds = %53, %39, %35, %16 %78 = tail call i32 (...) @rtnl_unlock() #2 br label %79 79: ; preds = %58, %48, %28, %25, %21, %13, %1, %77 %80 = tail call i64 @hclge_reset_err_handle(ptr noundef nonnull %0) #2 %81 = icmp eq i64 %80, 0 br i1 %81, label %84, label %82 82: ; preds = %79 %83 = tail call i32 @hclge_reset_task_schedule(ptr noundef nonnull %0) #2 br label %84 84: ; preds = %79, %82, %63, %74 ret void } declare ptr @pci_get_drvdata(i32 noundef) local_unnamed_addr #1 declare i32 @hclge_notify_roce_client(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @hclge_reset_prepare_down(ptr noundef) local_unnamed_addr #1 declare i32 @rtnl_lock(...) local_unnamed_addr #1 declare i32 @hclge_notify_client(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @rtnl_unlock(...) local_unnamed_addr #1 declare i32 @hclge_reset_prepare_wait(ptr noundef) local_unnamed_addr #1 declare i64 @hclge_reset_wait(ptr noundef) local_unnamed_addr #1 declare i32 @hclge_reset_stack(ptr noundef) local_unnamed_addr #1 declare i32 @hclge_clear_reset_cause(ptr noundef) local_unnamed_addr #1 declare i32 @hclge_reset_prepare_up(ptr noundef) local_unnamed_addr #1 declare i32 @hclge_get_reset_level(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i64 @hclge_reset_err_handle(ptr noundef) local_unnamed_addr #1 declare i32 @hclge_reset_task_schedule(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 32} !6 = !{!"hclge_dev", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 12, !7, i64 28, !7, i64 32} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"TYPE_2__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12} !11 = !{!6, !7, i64 0} !12 = !{!13, !7, i64 0} !13 = !{!"hnae3_ae_dev", !7, i64 0} !14 = !{!6, !7, i64 24} !15 = !{!7, !7, i64 0} !16 = !{!6, !7, i64 20} !17 = !{!6, !7, i64 12} !18 = !{!6, !7, i64 28} !19 = !{!6, !7, i64 16}
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/extr_hclge_main.c_hclge_reset.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/extr_hclge_main.c_hclge_reset.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @HNAE3_DOWN_CLIENT = common local_unnamed_addr global i32 0, align 4 @HNAE3_UNINIT_CLIENT = common local_unnamed_addr global i32 0, align 4 @HNAE3_INIT_CLIENT = common local_unnamed_addr global i32 0, align 4 @HCLGE_RESET_MAX_FAIL_CNT = common local_unnamed_addr global i32 0, align 4 @HNAE3_UP_CLIENT = common local_unnamed_addr global i32 0, align 4 @jiffies = common local_unnamed_addr global i32 0, align 4 @HNAE3_NONE_RESET = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @hclge_reset], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @hclge_reset(ptr noundef %0) #0 { %2 = getelementptr inbounds i8, ptr %0, i64 32 %3 = load i32, ptr %2, align 4, !tbaa !6 %4 = tail call ptr @pci_get_drvdata(i32 noundef %3) #2 %5 = load i32, ptr %0, align 4, !tbaa !12 store i32 %5, ptr %4, align 4, !tbaa !13 %6 = getelementptr inbounds i8, ptr %0, i64 12 %7 = getelementptr inbounds i8, ptr %0, i64 24 %8 = load i32, ptr %7, align 4, !tbaa !15 %9 = add nsw i32 %8, 1 store i32 %9, ptr %7, align 4, !tbaa !15 %10 = load i32, ptr @HNAE3_DOWN_CLIENT, align 4, !tbaa !16 %11 = tail call i32 @hclge_notify_roce_client(ptr noundef nonnull %0, i32 noundef %10) #2 %12 = icmp eq i32 %11, 0 br i1 %12, label %13, label %79 13: ; preds = %1 %14 = tail call i32 @hclge_reset_prepare_down(ptr noundef nonnull %0) #2 %15 = icmp eq i32 %14, 0 br i1 %15, label %16, label %79 16: ; preds = %13 %17 = tail call i32 @rtnl_lock() #2 %18 = load i32, ptr @HNAE3_DOWN_CLIENT, align 4, !tbaa !16 %19 = tail call i32 @hclge_notify_client(ptr noundef nonnull %0, i32 noundef %18) #2 %20 = icmp eq i32 %19, 0 br i1 %20, label %21, label %77 21: ; preds = %16 %22 = tail call i32 @rtnl_unlock() #2 %23 = tail call i32 @hclge_reset_prepare_wait(ptr noundef nonnull %0) #2 %24 = icmp eq i32 %23, 0 br i1 %24, label %25, label %79 25: ; preds = %21 %26 = tail call i64 @hclge_reset_wait(ptr noundef nonnull %0) #2 %27 = icmp eq i64 %26, 0 br i1 %27, label %28, label %79 28: ; preds = %25 %29 = getelementptr inbounds i8, ptr %0, i64 20 %30 = load i32, ptr %29, align 4, !tbaa !17 %31 = add nsw i32 %30, 1 store i32 %31, ptr %29, align 4, !tbaa !17 %32 = load i32, ptr @HNAE3_UNINIT_CLIENT, align 4, !tbaa !16 %33 = tail call i32 @hclge_notify_roce_client(ptr noundef nonnull %0, i32 noundef %32) #2 %34 = icmp eq i32 %33, 0 br i1 %34, label %35, label %79 35: ; preds = %28 %36 = tail call i32 @rtnl_lock() #2 %37 = tail call i32 @hclge_reset_stack(ptr noundef nonnull %0) #2 %38 = icmp eq i32 %37, 0 br i1 %38, label %39, label %77 39: ; preds = %35 %40 = tail call i32 @hclge_clear_reset_cause(ptr noundef nonnull %0) #2 %41 = tail call i32 @hclge_reset_prepare_up(ptr noundef nonnull %0) #2 %42 = icmp eq i32 %41, 0 br i1 %42, label %43, label %77 43: ; preds = %39 %44 = tail call i32 @rtnl_unlock() #2 %45 = load i32, ptr @HNAE3_INIT_CLIENT, align 4, !tbaa !16 %46 = tail call i32 @hclge_notify_roce_client(ptr noundef nonnull %0, i32 noundef %45) #2 %47 = icmp eq i32 %46, 0 br i1 %47, label %53, label %48 48: ; preds = %43 %49 = load i32, ptr %6, align 4, !tbaa !18 %50 = load i32, ptr @HCLGE_RESET_MAX_FAIL_CNT, align 4, !tbaa !16 %51 = add nsw i32 %50, -1 %52 = icmp slt i32 %49, %51 br i1 %52, label %79, label %53 53: ; preds = %48, %43 %54 = tail call i32 @rtnl_lock() #2 %55 = load i32, ptr @HNAE3_UP_CLIENT, align 4, !tbaa !16 %56 = tail call i32 @hclge_notify_client(ptr noundef nonnull %0, i32 noundef %55) #2 %57 = icmp eq i32 %56, 0 br i1 %57, label %58, label %77 58: ; preds = %53 %59 = tail call i32 @rtnl_unlock() #2 %60 = load i32, ptr @HNAE3_UP_CLIENT, align 4, !tbaa !16 %61 = tail call i32 @hclge_notify_roce_client(ptr noundef nonnull %0, i32 noundef %60) #2 %62 = icmp eq i32 %61, 0 br i1 %62, label %63, label %79 63: ; preds = %58 %64 = load i32, ptr @jiffies, align 4, !tbaa !16 %65 = getelementptr inbounds i8, ptr %0, i64 28 store i32 %64, ptr %65, align 4, !tbaa !19 store i32 0, ptr %6, align 4, !tbaa !18 %66 = getelementptr inbounds i8, ptr %0, i64 16 %67 = load i32, ptr %66, align 4, !tbaa !20 %68 = add nsw i32 %67, 1 store i32 %68, ptr %66, align 4, !tbaa !20 %69 = load i32, ptr @HNAE3_NONE_RESET, align 4, !tbaa !16 store i32 %69, ptr %4, align 4, !tbaa !13 %70 = getelementptr inbounds i8, ptr %0, i64 8 %71 = tail call i32 @hclge_get_reset_level(ptr noundef nonnull %4, ptr noundef nonnull %70) #2 %72 = load i32, ptr @HNAE3_NONE_RESET, align 4, !tbaa !16 %73 = icmp eq i32 %71, %72 br i1 %73, label %84, label %74 74: ; preds = %63 %75 = getelementptr inbounds i8, ptr %0, i64 4 %76 = tail call i32 @set_bit(i32 noundef %71, ptr noundef nonnull %75) #2 br label %84 77: ; preds = %53, %39, %35, %16 %78 = tail call i32 @rtnl_unlock() #2 br label %79 79: ; preds = %58, %48, %28, %25, %21, %13, %1, %77 %80 = tail call i64 @hclge_reset_err_handle(ptr noundef nonnull %0) #2 %81 = icmp eq i64 %80, 0 br i1 %81, label %84, label %82 82: ; preds = %79 %83 = tail call i32 @hclge_reset_task_schedule(ptr noundef nonnull %0) #2 br label %84 84: ; preds = %79, %82, %63, %74 ret void } declare ptr @pci_get_drvdata(i32 noundef) local_unnamed_addr #1 declare i32 @hclge_notify_roce_client(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @hclge_reset_prepare_down(ptr noundef) local_unnamed_addr #1 declare i32 @rtnl_lock(...) local_unnamed_addr #1 declare i32 @hclge_notify_client(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @rtnl_unlock(...) local_unnamed_addr #1 declare i32 @hclge_reset_prepare_wait(ptr noundef) local_unnamed_addr #1 declare i64 @hclge_reset_wait(ptr noundef) local_unnamed_addr #1 declare i32 @hclge_reset_stack(ptr noundef) local_unnamed_addr #1 declare i32 @hclge_clear_reset_cause(ptr noundef) local_unnamed_addr #1 declare i32 @hclge_reset_prepare_up(ptr noundef) local_unnamed_addr #1 declare i32 @hclge_get_reset_level(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i64 @hclge_reset_err_handle(ptr noundef) local_unnamed_addr #1 declare i32 @hclge_reset_task_schedule(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 32} !7 = !{!"hclge_dev", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 12, !8, i64 28, !8, i64 32} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"TYPE_2__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12} !12 = !{!7, !8, i64 0} !13 = !{!14, !8, i64 0} !14 = !{!"hnae3_ae_dev", !8, i64 0} !15 = !{!7, !8, i64 24} !16 = !{!8, !8, i64 0} !17 = !{!7, !8, i64 20} !18 = !{!7, !8, i64 12} !19 = !{!7, !8, i64 28} !20 = !{!7, !8, i64 16}
linux_drivers_net_ethernet_hisilicon_hns3_hns3pf_extr_hclge_main.c_hclge_reset
; ModuleID = 'AnghaBench/nginx-rtmp-module/extr_ngx_rtmp_play_module.c_ngx_rtmp_play_do_init.c' source_filename = "AnghaBench/nginx-rtmp-module/extr_ngx_rtmp_play_module.c_ngx_rtmp_play_do_init.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64-pc-linux-gnu" %struct.TYPE_5__ = type { i32, i32, i32, %struct.TYPE_4__* } %struct.TYPE_4__ = type { i64 (i32*, i32*, i32, i32)* } @ngx_rtmp_play_module = dso_local local_unnamed_addr global i32 0, align 4 @NGX_ERROR = dso_local local_unnamed_addr global i64 0, align 8 @NGX_OK = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (i64 (i32*)* @ngx_rtmp_play_do_init to i8*)], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i64 @ngx_rtmp_play_do_init(i32* noundef %0) #0 { %2 = load i32, i32* @ngx_rtmp_play_module, align 4, !tbaa !5 %3 = tail call %struct.TYPE_5__* @ngx_rtmp_get_module_ctx(i32* noundef %0, i32 noundef %2) #2 %4 = icmp eq %struct.TYPE_5__* %3, null br i1 %4, label %23, label %5 5: ; preds = %1 %6 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %3, i64 0, i32 3 %7 = load %struct.TYPE_4__*, %struct.TYPE_4__** %6, align 8, !tbaa !9 %8 = icmp eq %struct.TYPE_4__* %7, null br i1 %8, label %22, label %9 9: ; preds = %5 %10 = getelementptr inbounds %struct.TYPE_4__, %struct.TYPE_4__* %7, i64 0, i32 0 %11 = load i64 (i32*, i32*, i32, i32)*, i64 (i32*, i32*, i32, i32)** %10, align 8, !tbaa !12 %12 = icmp eq i64 (i32*, i32*, i32, i32)* %11, null br i1 %12, label %22, label %13 13: ; preds = %9 %14 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %3, i64 0, i32 2 %15 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %3, i64 0, i32 1 %16 = load i32, i32* %15, align 4, !tbaa !14 %17 = getelementptr inbounds %struct.TYPE_5__, %struct.TYPE_5__* %3, i64 0, i32 0 %18 = load i32, i32* %17, align 8, !tbaa !15 %19 = tail call i64 %11(i32* noundef %0, i32* noundef nonnull %14, i32 noundef %16, i32 noundef %18) #2 %20 = load i64, i64* @NGX_OK, align 8, !tbaa !16 %21 = icmp eq i64 %19, %20 br i1 %21, label %22, label %23 22: ; preds = %13, %9, %5 br label %23 23: ; preds = %13, %1, %22 %24 = phi i64* [ @NGX_OK, %22 ], [ @NGX_ERROR, %1 ], [ @NGX_ERROR, %13 ] %25 = load i64, i64* %24, align 8, !tbaa !16 ret i64 %25 } declare %struct.TYPE_5__* @ngx_rtmp_get_module_ctx(i32* noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 7, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{!"Ubuntu clang version 14.0.0-1ubuntu1.1"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 16} !10 = !{!"TYPE_5__", !6, i64 0, !6, i64 4, !6, i64 8, !11, i64 16} !11 = !{!"any pointer", !7, i64 0} !12 = !{!13, !11, i64 0} !13 = !{!"TYPE_4__", !11, i64 0} !14 = !{!10, !6, i64 4} !15 = !{!10, !6, i64 0} !16 = !{!17, !17, i64 0} !17 = !{!"long", !7, i64 0}
; ModuleID = 'AnghaBench/nginx-rtmp-module/extr_ngx_rtmp_play_module.c_ngx_rtmp_play_do_init.c' source_filename = "AnghaBench/nginx-rtmp-module/extr_ngx_rtmp_play_module.c_ngx_rtmp_play_do_init.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @ngx_rtmp_play_module = common local_unnamed_addr global i32 0, align 4 @NGX_ERROR = common local_unnamed_addr global i64 0, align 8 @NGX_OK = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @ngx_rtmp_play_do_init], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i64 @ngx_rtmp_play_do_init(ptr noundef %0) #0 { %2 = load i32, ptr @ngx_rtmp_play_module, align 4, !tbaa !6 %3 = tail call ptr @ngx_rtmp_get_module_ctx(ptr noundef %0, i32 noundef %2) #2 %4 = icmp eq ptr %3, null br i1 %4, label %21, label %5 5: ; preds = %1 %6 = getelementptr inbounds i8, ptr %3, i64 16 %7 = load ptr, ptr %6, align 8, !tbaa !10 %8 = icmp eq ptr %7, null br i1 %8, label %20, label %9 9: ; preds = %5 %10 = load ptr, ptr %7, align 8, !tbaa !13 %11 = icmp eq ptr %10, null br i1 %11, label %20, label %12 12: ; preds = %9 %13 = getelementptr inbounds i8, ptr %3, i64 8 %14 = getelementptr inbounds i8, ptr %3, i64 4 %15 = load i32, ptr %14, align 4, !tbaa !15 %16 = load i32, ptr %3, align 8, !tbaa !16 %17 = tail call i64 %10(ptr noundef %0, ptr noundef nonnull %13, i32 noundef %15, i32 noundef %16) #2 %18 = load i64, ptr @NGX_OK, align 8, !tbaa !17 %19 = icmp eq i64 %17, %18 br i1 %19, label %20, label %21 20: ; preds = %12, %9, %5 br label %21 21: ; preds = %12, %1, %20 %22 = phi ptr [ @NGX_OK, %20 ], [ @NGX_ERROR, %1 ], [ @NGX_ERROR, %12 ] %23 = load i64, ptr %22, align 8, !tbaa !17 ret i64 %23 } declare ptr @ngx_rtmp_get_module_ctx(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 16} !11 = !{!"TYPE_5__", !7, i64 0, !7, i64 4, !7, i64 8, !12, i64 16} !12 = !{!"any pointer", !8, i64 0} !13 = !{!14, !12, i64 0} !14 = !{!"TYPE_4__", !12, i64 0} !15 = !{!11, !7, i64 4} !16 = !{!11, !7, i64 0} !17 = !{!18, !18, i64 0} !18 = !{!"long", !8, i64 0}
nginx-rtmp-module_extr_ngx_rtmp_play_module.c_ngx_rtmp_play_do_init
; ModuleID = 'AnghaBench/linux/sound/mips/extr_hal2.c_hal2_playback_ack.c' source_filename = "AnghaBench/linux/sound/mips/extr_hal2.c_hal2_playback_ack.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @hal2_playback_transfer = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @hal2_playback_ack], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @hal2_playback_ack(ptr noundef %0) #0 { %2 = tail call ptr @snd_pcm_substream_chip(ptr noundef %0) #2 %3 = load i32, ptr @hal2_playback_transfer, align 4, !tbaa !5 %4 = tail call i32 @snd_pcm_indirect_playback_transfer(ptr noundef %0, ptr noundef %2, i32 noundef %3) #2 ret i32 %4 } declare ptr @snd_pcm_substream_chip(ptr noundef) local_unnamed_addr #1 declare i32 @snd_pcm_indirect_playback_transfer(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/sound/mips/extr_hal2.c_hal2_playback_ack.c' source_filename = "AnghaBench/linux/sound/mips/extr_hal2.c_hal2_playback_ack.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @hal2_playback_transfer = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @hal2_playback_ack], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @hal2_playback_ack(ptr noundef %0) #0 { %2 = tail call ptr @snd_pcm_substream_chip(ptr noundef %0) #2 %3 = load i32, ptr @hal2_playback_transfer, align 4, !tbaa !6 %4 = tail call i32 @snd_pcm_indirect_playback_transfer(ptr noundef %0, ptr noundef %2, i32 noundef %3) #2 ret i32 %4 } declare ptr @snd_pcm_substream_chip(ptr noundef) local_unnamed_addr #1 declare i32 @snd_pcm_indirect_playback_transfer(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_sound_mips_extr_hal2.c_hal2_playback_ack
; ModuleID = 'AnghaBench/php-src/ext/opcache/jit/libudis86/extr_udis86.c_ud_set_input_file.c' source_filename = "AnghaBench/php-src/ext/opcache/jit/libudis86/extr_udis86.c_ud_set_input_file.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.ud = type { ptr, i32 } @inp_file_hook = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local void @ud_set_input_file(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = tail call i32 @ud_inp_init(ptr noundef %0) #2 %4 = load i32, ptr @inp_file_hook, align 4, !tbaa !5 %5 = getelementptr inbounds %struct.ud, ptr %0, i64 0, i32 1 store i32 %4, ptr %5, align 8, !tbaa !9 store ptr %1, ptr %0, align 8, !tbaa !12 ret void } declare i32 @ud_inp_init(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 8} !10 = !{!"ud", !11, i64 0, !6, i64 8} !11 = !{!"any pointer", !7, i64 0} !12 = !{!10, !11, i64 0}
; ModuleID = 'AnghaBench/php-src/ext/opcache/jit/libudis86/extr_udis86.c_ud_set_input_file.c' source_filename = "AnghaBench/php-src/ext/opcache/jit/libudis86/extr_udis86.c_ud_set_input_file.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @inp_file_hook = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define void @ud_set_input_file(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = tail call i32 @ud_inp_init(ptr noundef %0) #2 %4 = load i32, ptr @inp_file_hook, align 4, !tbaa !6 %5 = getelementptr inbounds i8, ptr %0, i64 8 store i32 %4, ptr %5, align 8, !tbaa !10 store ptr %1, ptr %0, align 8, !tbaa !13 ret void } declare i32 @ud_inp_init(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 8} !11 = !{!"ud", !12, i64 0, !7, i64 8} !12 = !{!"any pointer", !8, i64 0} !13 = !{!11, !12, i64 0}
php-src_ext_opcache_jit_libudis86_extr_udis86.c_ud_set_input_file
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/net/extr_qeth_l3_main.c_qeth_l3_free_vlan_addresses4.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/net/extr_qeth_l3_main.c_qeth_l3_free_vlan_addresses4.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.qeth_ipaddr = type { i32, %struct.TYPE_4__ } %struct.TYPE_4__ = type { %struct.TYPE_3__ } %struct.TYPE_3__ = type { i32, i32 } %struct.in_ifaddr = type { i32, i32, ptr } @TRACE = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [9 x i8] c"frvaddr4\00", align 1 @QETH_PROT_IPV4 = dso_local local_unnamed_addr global i32 0, align 4 @QETH_IP_TYPE_NORMAL = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @qeth_l3_free_vlan_addresses4], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @qeth_l3_free_vlan_addresses4(ptr noundef %0, i16 noundef zeroext %1) #0 { %3 = load i32, ptr @TRACE, align 4, !tbaa !5 %4 = tail call i32 @QETH_DBF_TEXT(i32 noundef %3, i32 noundef 4, ptr noundef nonnull @.str) #2 %5 = load i32, ptr %0, align 4, !tbaa !9 %6 = tail call i32 @vlan_group_get_device(i32 noundef %5, i16 noundef zeroext %1) #2 %7 = tail call ptr @in_dev_get(i32 noundef %6) #2 %8 = icmp eq ptr %7, null br i1 %8, label %31, label %9 9: ; preds = %2 %10 = load ptr, ptr %7, align 8, !tbaa !11 %11 = icmp eq ptr %10, null br i1 %11, label %29, label %12 12: ; preds = %9, %25 %13 = phi ptr [ %27, %25 ], [ %10, %9 ] %14 = load i32, ptr @QETH_PROT_IPV4, align 4, !tbaa !5 %15 = tail call ptr @qeth_l3_get_addr_buffer(i32 noundef %14) #2 %16 = icmp eq ptr %15, null br i1 %16, label %25, label %17 17: ; preds = %12 %18 = getelementptr inbounds %struct.qeth_ipaddr, ptr %15, i64 0, i32 1 %19 = load <2 x i32>, ptr %13, align 8, !tbaa !5 store <2 x i32> %19, ptr %18, align 4, !tbaa !5 %20 = load i32, ptr @QETH_IP_TYPE_NORMAL, align 4, !tbaa !5 store i32 %20, ptr %15, align 4, !tbaa !13 %21 = tail call i32 @qeth_l3_delete_ip(ptr noundef nonnull %0, ptr noundef nonnull %15) #2 %22 = icmp eq i32 %21, 0 br i1 %22, label %23, label %25 23: ; preds = %17 %24 = tail call i32 @kfree(ptr noundef nonnull %15) #2 br label %25 25: ; preds = %12, %23, %17 %26 = getelementptr inbounds %struct.in_ifaddr, ptr %13, i64 0, i32 2 %27 = load ptr, ptr %26, align 8, !tbaa !11 %28 = icmp eq ptr %27, null br i1 %28, label %29, label %12, !llvm.loop !17 29: ; preds = %25, %9 %30 = tail call i32 @in_dev_put(ptr noundef nonnull %7) #2 br label %31 31: ; preds = %2, %29 ret void } declare i32 @QETH_DBF_TEXT(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare ptr @in_dev_get(i32 noundef) local_unnamed_addr #1 declare i32 @vlan_group_get_device(i32 noundef, i16 noundef zeroext) local_unnamed_addr #1 declare ptr @qeth_l3_get_addr_buffer(i32 noundef) local_unnamed_addr #1 declare i32 @qeth_l3_delete_ip(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @kfree(ptr noundef) local_unnamed_addr #1 declare i32 @in_dev_put(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"qeth_card", !6, i64 0} !11 = !{!12, !12, i64 0} !12 = !{!"any pointer", !7, i64 0} !13 = !{!14, !6, i64 0} !14 = !{!"qeth_ipaddr", !6, i64 0, !15, i64 4} !15 = !{!"TYPE_4__", !16, i64 0} !16 = !{!"TYPE_3__", !6, i64 0, !6, i64 4} !17 = distinct !{!17, !18} !18 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/s390/net/extr_qeth_l3_main.c_qeth_l3_free_vlan_addresses4.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/s390/net/extr_qeth_l3_main.c_qeth_l3_free_vlan_addresses4.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @TRACE = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [9 x i8] c"frvaddr4\00", align 1 @QETH_PROT_IPV4 = common local_unnamed_addr global i32 0, align 4 @QETH_IP_TYPE_NORMAL = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @qeth_l3_free_vlan_addresses4], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @qeth_l3_free_vlan_addresses4(ptr noundef %0, i16 noundef zeroext %1) #0 { %3 = load i32, ptr @TRACE, align 4, !tbaa !6 %4 = tail call i32 @QETH_DBF_TEXT(i32 noundef %3, i32 noundef 4, ptr noundef nonnull @.str) #2 %5 = load i32, ptr %0, align 4, !tbaa !10 %6 = tail call i32 @vlan_group_get_device(i32 noundef %5, i16 noundef zeroext %1) #2 %7 = tail call ptr @in_dev_get(i32 noundef %6) #2 %8 = icmp eq ptr %7, null br i1 %8, label %31, label %9 9: ; preds = %2 %10 = load ptr, ptr %7, align 8, !tbaa !12 %11 = icmp eq ptr %10, null br i1 %11, label %29, label %12 12: ; preds = %9, %25 %13 = phi ptr [ %27, %25 ], [ %10, %9 ] %14 = load i32, ptr @QETH_PROT_IPV4, align 4, !tbaa !6 %15 = tail call ptr @qeth_l3_get_addr_buffer(i32 noundef %14) #2 %16 = icmp eq ptr %15, null br i1 %16, label %25, label %17 17: ; preds = %12 %18 = getelementptr inbounds i8, ptr %15, i64 4 %19 = load <2 x i32>, ptr %13, align 8, !tbaa !6 store <2 x i32> %19, ptr %18, align 4, !tbaa !6 %20 = load i32, ptr @QETH_IP_TYPE_NORMAL, align 4, !tbaa !6 store i32 %20, ptr %15, align 4, !tbaa !14 %21 = tail call i32 @qeth_l3_delete_ip(ptr noundef nonnull %0, ptr noundef nonnull %15) #2 %22 = icmp eq i32 %21, 0 br i1 %22, label %23, label %25 23: ; preds = %17 %24 = tail call i32 @kfree(ptr noundef nonnull %15) #2 br label %25 25: ; preds = %12, %23, %17 %26 = getelementptr inbounds i8, ptr %13, i64 8 %27 = load ptr, ptr %26, align 8, !tbaa !12 %28 = icmp eq ptr %27, null br i1 %28, label %29, label %12, !llvm.loop !18 29: ; preds = %25, %9 %30 = tail call i32 @in_dev_put(ptr noundef nonnull %7) #2 br label %31 31: ; preds = %2, %29 ret void } declare i32 @QETH_DBF_TEXT(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare ptr @in_dev_get(i32 noundef) local_unnamed_addr #1 declare i32 @vlan_group_get_device(i32 noundef, i16 noundef zeroext) local_unnamed_addr #1 declare ptr @qeth_l3_get_addr_buffer(i32 noundef) local_unnamed_addr #1 declare i32 @qeth_l3_delete_ip(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @kfree(ptr noundef) local_unnamed_addr #1 declare i32 @in_dev_put(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"qeth_card", !7, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"any pointer", !8, i64 0} !14 = !{!15, !7, i64 0} !15 = !{!"qeth_ipaddr", !7, i64 0, !16, i64 4} !16 = !{!"TYPE_4__", !17, i64 0} !17 = !{!"TYPE_3__", !7, i64 0, !7, i64 4} !18 = distinct !{!18, !19} !19 = !{!"llvm.loop.mustprogress"}
fastsocket_kernel_drivers_s390_net_extr_qeth_l3_main.c_qeth_l3_free_vlan_addresses4
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/m68knommu/platform/68360/extr_commproc.c_m360_cpm_dpalloc.c' source_filename = "AnghaBench/fastsocket/kernel/arch/m68knommu/platform/68360/extr_commproc.c_m360_cpm_dpalloc.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @dp_alloc_base = dso_local local_unnamed_addr global i64 0, align 8 @dp_alloc_top = dso_local local_unnamed_addr global i64 0, align 8 @CPM_DP_NOSPACE = dso_local local_unnamed_addr global i64 0, align 8 ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable define dso_local i64 @m360_cpm_dpalloc(i64 noundef %0) local_unnamed_addr #0 { %2 = load i64, ptr @dp_alloc_base, align 8, !tbaa !5 %3 = add nsw i64 %2, %0 %4 = load i64, ptr @dp_alloc_top, align 8, !tbaa !5 %5 = icmp slt i64 %3, %4 br i1 %5, label %8, label %6 6: ; preds = %1 %7 = load i64, ptr @CPM_DP_NOSPACE, align 8, !tbaa !5 br label %9 8: ; preds = %1 store i64 %3, ptr @dp_alloc_base, align 8, !tbaa !5 br label %9 9: ; preds = %8, %6 %10 = phi i64 [ %7, %6 ], [ %2, %8 ] ret i64 %10 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/m68knommu/platform/68360/extr_commproc.c_m360_cpm_dpalloc.c' source_filename = "AnghaBench/fastsocket/kernel/arch/m68knommu/platform/68360/extr_commproc.c_m360_cpm_dpalloc.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @dp_alloc_base = common local_unnamed_addr global i64 0, align 8 @dp_alloc_top = common local_unnamed_addr global i64 0, align 8 @CPM_DP_NOSPACE = common local_unnamed_addr global i64 0, align 8 ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable(sync) define i64 @m360_cpm_dpalloc(i64 noundef %0) local_unnamed_addr #0 { %2 = load i64, ptr @dp_alloc_base, align 8, !tbaa !6 %3 = add nsw i64 %2, %0 %4 = load i64, ptr @dp_alloc_top, align 8, !tbaa !6 %5 = icmp slt i64 %3, %4 br i1 %5, label %8, label %6 6: ; preds = %1 %7 = load i64, ptr @CPM_DP_NOSPACE, align 8, !tbaa !6 br label %9 8: ; preds = %1 store i64 %3, ptr @dp_alloc_base, align 8, !tbaa !6 br label %9 9: ; preds = %8, %6 %10 = phi i64 [ %7, %6 ], [ %2, %8 ] ret i64 %10 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
fastsocket_kernel_arch_m68knommu_platform_68360_extr_commproc.c_m360_cpm_dpalloc
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/mlx5/extr_main.c_mlx5_ib_stage_common_roce_init.c' source_filename = "AnghaBench/linux/drivers/infiniband/hw/mlx5/extr_main.c_mlx5_ib_stage_common_roce_init.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.mlx5_ib_dev = type { i32, %struct.TYPE_2__ } %struct.TYPE_2__ = type { i64 } @IB_USER_VERBS_EX_CMD_CREATE_WQ = dso_local local_unnamed_addr global i64 0, align 8 @IB_USER_VERBS_EX_CMD_MODIFY_WQ = dso_local local_unnamed_addr global i64 0, align 8 @IB_USER_VERBS_EX_CMD_DESTROY_WQ = dso_local local_unnamed_addr global i64 0, align 8 @IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL = dso_local local_unnamed_addr global i64 0, align 8 @IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL = dso_local local_unnamed_addr global i64 0, align 8 @mlx5_ib_dev_common_roce_ops = dso_local global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @mlx5_ib_stage_common_roce_init], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @mlx5_ib_stage_common_roce_init(ptr noundef %0) #0 { %2 = load i64, ptr @IB_USER_VERBS_EX_CMD_CREATE_WQ, align 8, !tbaa !5 %3 = shl nuw i64 1, %2 %4 = load i64, ptr @IB_USER_VERBS_EX_CMD_MODIFY_WQ, align 8, !tbaa !5 %5 = shl nuw i64 1, %4 %6 = or i64 %5, %3 %7 = load i64, ptr @IB_USER_VERBS_EX_CMD_DESTROY_WQ, align 8, !tbaa !5 %8 = shl nuw i64 1, %7 %9 = or i64 %6, %8 %10 = load i64, ptr @IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL, align 8, !tbaa !5 %11 = shl nuw i64 1, %10 %12 = or i64 %9, %11 %13 = load i64, ptr @IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL, align 8, !tbaa !5 %14 = shl nuw i64 1, %13 %15 = or i64 %12, %14 %16 = getelementptr inbounds %struct.mlx5_ib_dev, ptr %0, i64 0, i32 1 %17 = load i64, ptr %16, align 8, !tbaa !9 %18 = or i64 %15, %17 store i64 %18, ptr %16, align 8, !tbaa !9 %19 = tail call i32 @ib_set_device_ops(ptr noundef nonnull %16, ptr noundef nonnull @mlx5_ib_dev_common_roce_ops) #2 %20 = load i32, ptr %0, align 8, !tbaa !13 %21 = tail call i64 @mlx5_core_native_port_num(i32 noundef %20) #2 %22 = add nsw i64 %21, -1 %23 = tail call i32 @mlx5_add_netdev_notifier(ptr noundef nonnull %0, i64 noundef %22) #2 ret i32 %23 } declare i32 @ib_set_device_ops(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i64 @mlx5_core_native_port_num(i32 noundef) local_unnamed_addr #1 declare i32 @mlx5_add_netdev_notifier(ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 8} !10 = !{!"mlx5_ib_dev", !11, i64 0, !12, i64 8} !11 = !{!"int", !7, i64 0} !12 = !{!"TYPE_2__", !6, i64 0} !13 = !{!10, !11, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/mlx5/extr_main.c_mlx5_ib_stage_common_roce_init.c' source_filename = "AnghaBench/linux/drivers/infiniband/hw/mlx5/extr_main.c_mlx5_ib_stage_common_roce_init.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @IB_USER_VERBS_EX_CMD_CREATE_WQ = common local_unnamed_addr global i64 0, align 8 @IB_USER_VERBS_EX_CMD_MODIFY_WQ = common local_unnamed_addr global i64 0, align 8 @IB_USER_VERBS_EX_CMD_DESTROY_WQ = common local_unnamed_addr global i64 0, align 8 @IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL = common local_unnamed_addr global i64 0, align 8 @IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL = common local_unnamed_addr global i64 0, align 8 @mlx5_ib_dev_common_roce_ops = common global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @mlx5_ib_stage_common_roce_init], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @mlx5_ib_stage_common_roce_init(ptr noundef %0) #0 { %2 = load i64, ptr @IB_USER_VERBS_EX_CMD_CREATE_WQ, align 8, !tbaa !6 %3 = shl nuw i64 1, %2 %4 = load i64, ptr @IB_USER_VERBS_EX_CMD_MODIFY_WQ, align 8, !tbaa !6 %5 = shl nuw i64 1, %4 %6 = or i64 %5, %3 %7 = load i64, ptr @IB_USER_VERBS_EX_CMD_DESTROY_WQ, align 8, !tbaa !6 %8 = shl nuw i64 1, %7 %9 = or i64 %6, %8 %10 = load i64, ptr @IB_USER_VERBS_EX_CMD_CREATE_RWQ_IND_TBL, align 8, !tbaa !6 %11 = shl nuw i64 1, %10 %12 = or i64 %9, %11 %13 = load i64, ptr @IB_USER_VERBS_EX_CMD_DESTROY_RWQ_IND_TBL, align 8, !tbaa !6 %14 = shl nuw i64 1, %13 %15 = or i64 %12, %14 %16 = getelementptr inbounds i8, ptr %0, i64 8 %17 = load i64, ptr %16, align 8, !tbaa !10 %18 = or i64 %15, %17 store i64 %18, ptr %16, align 8, !tbaa !10 %19 = tail call i32 @ib_set_device_ops(ptr noundef nonnull %16, ptr noundef nonnull @mlx5_ib_dev_common_roce_ops) #2 %20 = load i32, ptr %0, align 8, !tbaa !14 %21 = tail call i64 @mlx5_core_native_port_num(i32 noundef %20) #2 %22 = add nsw i64 %21, -1 %23 = tail call i32 @mlx5_add_netdev_notifier(ptr noundef nonnull %0, i64 noundef %22) #2 ret i32 %23 } declare i32 @ib_set_device_ops(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i64 @mlx5_core_native_port_num(i32 noundef) local_unnamed_addr #1 declare i32 @mlx5_add_netdev_notifier(ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 8} !11 = !{!"mlx5_ib_dev", !12, i64 0, !13, i64 8} !12 = !{!"int", !8, i64 0} !13 = !{!"TYPE_2__", !7, i64 0} !14 = !{!11, !12, i64 0}
linux_drivers_infiniband_hw_mlx5_extr_main.c_mlx5_ib_stage_common_roce_init
; ModuleID = 'AnghaBench/linux/drivers/dma/extr_idma64.c_idma64_stop_transfer.c' source_filename = "AnghaBench/linux/drivers/dma/extr_idma64.c_idma64_stop_transfer.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @idma64_stop_transfer], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @idma64_stop_transfer(ptr noundef %0) #0 { %2 = load i32, ptr %0, align 4, !tbaa !5 %3 = tail call ptr @to_idma64(i32 noundef %2) #2 %4 = tail call i32 @idma64_chan_stop(ptr noundef %3, ptr noundef nonnull %0) #2 ret void } declare ptr @to_idma64(i32 noundef) local_unnamed_addr #1 declare i32 @idma64_chan_stop(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !9, i64 0} !6 = !{!"idma64_chan", !7, i64 0} !7 = !{!"TYPE_4__", !8, i64 0} !8 = !{!"TYPE_3__", !9, i64 0} !9 = !{!"int", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/dma/extr_idma64.c_idma64_stop_transfer.c' source_filename = "AnghaBench/linux/drivers/dma/extr_idma64.c_idma64_stop_transfer.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @idma64_stop_transfer], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @idma64_stop_transfer(ptr noundef %0) #0 { %2 = load i32, ptr %0, align 4, !tbaa !6 %3 = tail call ptr @to_idma64(i32 noundef %2) #2 %4 = tail call i32 @idma64_chan_stop(ptr noundef %3, ptr noundef nonnull %0) #2 ret void } declare ptr @to_idma64(i32 noundef) local_unnamed_addr #1 declare i32 @idma64_chan_stop(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !10, i64 0} !7 = !{!"idma64_chan", !8, i64 0} !8 = !{!"TYPE_4__", !9, i64 0} !9 = !{!"TYPE_3__", !10, i64 0} !10 = !{!"int", !11, i64 0} !11 = !{!"omnipotent char", !12, i64 0} !12 = !{!"Simple C/C++ TBAA"}
linux_drivers_dma_extr_idma64.c_idma64_stop_transfer
; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/extr_sock-dummy.c_YabSockSelect.c' source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/extr_sock-dummy.c_YabSockSelect.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define dso_local noundef i32 @YabSockSelect(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 { ret i32 -1 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/Provenance/Cores/Yabause/yabause/src/extr_sock-dummy.c_YabSockSelect.c' source_filename = "AnghaBench/Provenance/Cores/Yabause/yabause/src/extr_sock-dummy.c_YabSockSelect.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define noundef i32 @YabSockSelect(i32 noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 { ret i32 -1 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
Provenance_Cores_Yabause_yabause_src_extr_sock-dummy.c_YabSockSelect
; ModuleID = 'AnghaBench/exploitdb/exploits/macos/local/extr_44234.c_deallocate_map_address.c' source_filename = "AnghaBench/exploitdb/exploits/macos/local/extr_44234.c_deallocate_map_address.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @deallocate_map_address], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @deallocate_map_address(ptr noundef %0, i64 noundef %1) #0 { %3 = tail call i32 (...) @mach_task_self() #2 %4 = ptrtoint ptr %0 to i64 %5 = trunc i64 %4 to i32 %6 = tail call i32 @mach_vm_deallocate(i32 noundef %3, i32 noundef %5, i64 noundef %1) #2 ret void } declare i32 @mach_vm_deallocate(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @mach_task_self(...) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/exploitdb/exploits/macos/local/extr_44234.c_deallocate_map_address.c' source_filename = "AnghaBench/exploitdb/exploits/macos/local/extr_44234.c_deallocate_map_address.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @deallocate_map_address], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @deallocate_map_address(ptr noundef %0, i64 noundef %1) #0 { %3 = tail call i32 @mach_task_self() #2 %4 = ptrtoint ptr %0 to i64 %5 = trunc i64 %4 to i32 %6 = tail call i32 @mach_vm_deallocate(i32 noundef %3, i32 noundef %5, i64 noundef %1) #2 ret void } declare i32 @mach_vm_deallocate(i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @mach_task_self(...) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
exploitdb_exploits_macos_local_extr_44234.c_deallocate_map_address
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/addi-data/extr_..comedi_fc.h_cfc_write_to_buffer.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/addi-data/extr_..comedi_fc.h_cfc_write_to_buffer.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @cfc_write_to_buffer], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal i32 @cfc_write_to_buffer(ptr noundef %0, i16 noundef signext %1) #0 { %3 = alloca i16, align 2 store i16 %1, ptr %3, align 2, !tbaa !5 %4 = call i32 @cfc_write_array_to_buffer(ptr noundef %0, ptr noundef nonnull %3, i32 noundef 2) #2 ret i32 %4 } declare i32 @cfc_write_array_to_buffer(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"short", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/addi-data/extr_..comedi_fc.h_cfc_write_to_buffer.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/addi-data/extr_..comedi_fc.h_cfc_write_to_buffer.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @cfc_write_to_buffer], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal i32 @cfc_write_to_buffer(ptr noundef %0, i16 noundef signext %1) #0 { %3 = alloca i16, align 2 store i16 %1, ptr %3, align 2, !tbaa !6 %4 = call i32 @cfc_write_array_to_buffer(ptr noundef %0, ptr noundef nonnull %3, i32 noundef 2) #2 ret i32 %4 } declare i32 @cfc_write_array_to_buffer(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"short", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
fastsocket_kernel_drivers_staging_comedi_drivers_addi-data_extr_..comedi_fc.h_cfc_write_to_buffer
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/char/extr_tb0219.c_set_led.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/char/extr_tb0219.c_set_led.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @TB0219_LED = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @set_led], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal noundef i32 @set_led(i8 noundef signext %0) #0 { %2 = load i32, ptr @TB0219_LED, align 4, !tbaa !5 %3 = tail call i32 @tb0219_write(i32 noundef %2, i8 noundef signext %0) #2 ret i32 0 } declare i32 @tb0219_write(i32 noundef, i8 noundef signext) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/char/extr_tb0219.c_set_led.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/char/extr_tb0219.c_set_led.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @TB0219_LED = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @set_led], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal noundef i32 @set_led(i8 noundef signext %0) #0 { %2 = load i32, ptr @TB0219_LED, align 4, !tbaa !6 %3 = tail call i32 @tb0219_write(i32 noundef %2, i8 noundef signext %0) #2 ret i32 0 } declare i32 @tb0219_write(i32 noundef, i8 noundef signext) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
fastsocket_kernel_drivers_char_extr_tb0219.c_set_led
; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv4/extr_tcp_ipv4.c_tcp_v4_tw_remember_stamp.c' source_filename = "AnghaBench/fastsocket/kernel/net/ipv4/extr_tcp_ipv4.c_tcp_v4_tw_remember_stamp.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.inet_peer = type { i64, i64 } %struct.tcp_timewait_sock = type { i64, i64 } @TCP_PAWS_MSL = dso_local local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind uwtable define dso_local noundef i32 @tcp_v4_tw_remember_stamp(ptr noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr %0, align 4, !tbaa !5 %3 = tail call ptr @inet_getpeer(i32 noundef %2, i32 noundef 1) #2 %4 = icmp eq ptr %3, null br i1 %4, label %31, label %5 5: ; preds = %1 %6 = tail call ptr @tcp_twsk(ptr noundef nonnull %0) #2 %7 = getelementptr inbounds %struct.inet_peer, ptr %3, i64 0, i32 1 %8 = load i64, ptr %7, align 8, !tbaa !10 %9 = getelementptr inbounds %struct.tcp_timewait_sock, ptr %6, i64 0, i32 1 %10 = load i64, ptr %9, align 8, !tbaa !13 %11 = icmp sgt i64 %8, %10 br i1 %11, label %14, label %12 12: ; preds = %5 %13 = load i64, ptr %6, align 8, !tbaa !15 br label %26 14: ; preds = %5 %15 = load i64, ptr %3, align 8, !tbaa !16 %16 = load i64, ptr @TCP_PAWS_MSL, align 8, !tbaa !17 %17 = add nsw i64 %16, %15 %18 = tail call i64 (...) @get_seconds() #2 %19 = icmp slt i64 %17, %18 br i1 %19, label %20, label %29 20: ; preds = %14 %21 = load i64, ptr %3, align 8, !tbaa !16 %22 = load i64, ptr %6, align 8, !tbaa !15 %23 = icmp sgt i64 %21, %22 br i1 %23, label %29, label %24 24: ; preds = %20 %25 = load i64, ptr %9, align 8, !tbaa !13 br label %26 26: ; preds = %24, %12 %27 = phi i64 [ %10, %12 ], [ %25, %24 ] %28 = phi i64 [ %13, %12 ], [ %22, %24 ] store i64 %28, ptr %3, align 8, !tbaa !16 store i64 %27, ptr %7, align 8, !tbaa !10 br label %29 29: ; preds = %26, %20, %14 %30 = tail call i32 @inet_putpeer(ptr noundef nonnull %3) #2 br label %31 31: ; preds = %1, %29 %32 = phi i32 [ 1, %29 ], [ 0, %1 ] ret i32 %32 } declare ptr @inet_getpeer(i32 noundef, i32 noundef) local_unnamed_addr #1 declare ptr @tcp_twsk(ptr noundef) local_unnamed_addr #1 declare i64 @get_seconds(...) local_unnamed_addr #1 declare i32 @inet_putpeer(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"inet_timewait_sock", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 8} !11 = !{!"inet_peer", !12, i64 0, !12, i64 8} !12 = !{!"long", !8, i64 0} !13 = !{!14, !12, i64 8} !14 = !{!"tcp_timewait_sock", !12, i64 0, !12, i64 8} !15 = !{!14, !12, i64 0} !16 = !{!11, !12, i64 0} !17 = !{!12, !12, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv4/extr_tcp_ipv4.c_tcp_v4_tw_remember_stamp.c' source_filename = "AnghaBench/fastsocket/kernel/net/ipv4/extr_tcp_ipv4.c_tcp_v4_tw_remember_stamp.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @TCP_PAWS_MSL = common local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind ssp uwtable(sync) define range(i32 0, 2) i32 @tcp_v4_tw_remember_stamp(ptr noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr %0, align 4, !tbaa !6 %3 = tail call ptr @inet_getpeer(i32 noundef %2, i32 noundef 1) #2 %4 = icmp eq ptr %3, null br i1 %4, label %31, label %5 5: ; preds = %1 %6 = tail call ptr @tcp_twsk(ptr noundef nonnull %0) #2 %7 = getelementptr inbounds i8, ptr %3, i64 8 %8 = load i64, ptr %7, align 8, !tbaa !11 %9 = getelementptr inbounds i8, ptr %6, i64 8 %10 = load i64, ptr %9, align 8, !tbaa !14 %11 = icmp sgt i64 %8, %10 br i1 %11, label %14, label %12 12: ; preds = %5 %13 = load i64, ptr %6, align 8, !tbaa !16 br label %26 14: ; preds = %5 %15 = load i64, ptr %3, align 8, !tbaa !17 %16 = load i64, ptr @TCP_PAWS_MSL, align 8, !tbaa !18 %17 = add nsw i64 %16, %15 %18 = tail call i64 @get_seconds() #2 %19 = icmp slt i64 %17, %18 br i1 %19, label %20, label %29 20: ; preds = %14 %21 = load i64, ptr %3, align 8, !tbaa !17 %22 = load i64, ptr %6, align 8, !tbaa !16 %23 = icmp sgt i64 %21, %22 br i1 %23, label %29, label %24 24: ; preds = %20 %25 = load i64, ptr %9, align 8, !tbaa !14 br label %26 26: ; preds = %24, %12 %27 = phi i64 [ %10, %12 ], [ %25, %24 ] %28 = phi i64 [ %13, %12 ], [ %22, %24 ] store i64 %28, ptr %3, align 8, !tbaa !17 store i64 %27, ptr %7, align 8, !tbaa !11 br label %29 29: ; preds = %26, %20, %14 %30 = tail call i32 @inet_putpeer(ptr noundef nonnull %3) #2 br label %31 31: ; preds = %1, %29 %32 = phi i32 [ 1, %29 ], [ 0, %1 ] ret i32 %32 } declare ptr @inet_getpeer(i32 noundef, i32 noundef) local_unnamed_addr #1 declare ptr @tcp_twsk(ptr noundef) local_unnamed_addr #1 declare i64 @get_seconds(...) local_unnamed_addr #1 declare i32 @inet_putpeer(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"inet_timewait_sock", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !13, i64 8} !12 = !{!"inet_peer", !13, i64 0, !13, i64 8} !13 = !{!"long", !9, i64 0} !14 = !{!15, !13, i64 8} !15 = !{!"tcp_timewait_sock", !13, i64 0, !13, i64 8} !16 = !{!15, !13, i64 0} !17 = !{!12, !13, i64 0} !18 = !{!13, !13, i64 0}
fastsocket_kernel_net_ipv4_extr_tcp_ipv4.c_tcp_v4_tw_remember_stamp
; ModuleID = 'AnghaBench/linux/drivers/tty/extr_mxser.c_mxser_overlapping_vector.c' source_filename = "AnghaBench/linux/drivers/tty/extr_mxser.c_mxser_overlapping_vector.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.mxser_board = type { i64, ptr, ptr } @allow_overlapping_vector = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @mxser_overlapping_vector], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable define internal i32 @mxser_overlapping_vector(ptr nocapture noundef readonly %0) #0 { %2 = load i64, ptr @allow_overlapping_vector, align 8, !tbaa !5 %3 = icmp eq i64 %2, 0 br i1 %3, label %19, label %4 4: ; preds = %1 %5 = load i64, ptr %0, align 8, !tbaa !9 %6 = getelementptr inbounds %struct.mxser_board, ptr %0, i64 0, i32 2 %7 = load ptr, ptr %6, align 8, !tbaa !12 %8 = load i64, ptr %7, align 8, !tbaa !13 %9 = icmp slt i64 %5, %8 br i1 %9, label %19, label %10 10: ; preds = %4 %11 = getelementptr inbounds %struct.mxser_board, ptr %0, i64 0, i32 1 %12 = load ptr, ptr %11, align 8, !tbaa !15 %13 = load i32, ptr %12, align 4, !tbaa !16 %14 = shl nsw i32 %13, 3 %15 = sext i32 %14 to i64 %16 = add nsw i64 %8, %15 %17 = icmp slt i64 %5, %16 %18 = zext i1 %17 to i32 br label %19 19: ; preds = %10, %4, %1 %20 = phi i32 [ 0, %4 ], [ 0, %1 ], [ %18, %10 ] ret i32 %20 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"mxser_board", !6, i64 0, !11, i64 8, !11, i64 16} !11 = !{!"any pointer", !7, i64 0} !12 = !{!10, !11, i64 16} !13 = !{!14, !6, i64 0} !14 = !{!"TYPE_3__", !6, i64 0} !15 = !{!10, !11, i64 8} !16 = !{!17, !18, i64 0} !17 = !{!"TYPE_4__", !18, i64 0} !18 = !{!"int", !7, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/tty/extr_mxser.c_mxser_overlapping_vector.c' source_filename = "AnghaBench/linux/drivers/tty/extr_mxser.c_mxser_overlapping_vector.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @allow_overlapping_vector = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @mxser_overlapping_vector], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) define internal range(i32 0, 2) i32 @mxser_overlapping_vector(ptr nocapture noundef readonly %0) #0 { %2 = load i64, ptr @allow_overlapping_vector, align 8, !tbaa !6 %3 = icmp eq i64 %2, 0 br i1 %3, label %19, label %4 4: ; preds = %1 %5 = load i64, ptr %0, align 8, !tbaa !10 %6 = getelementptr inbounds i8, ptr %0, i64 16 %7 = load ptr, ptr %6, align 8, !tbaa !13 %8 = load i64, ptr %7, align 8, !tbaa !14 %9 = icmp slt i64 %5, %8 br i1 %9, label %19, label %10 10: ; preds = %4 %11 = getelementptr inbounds i8, ptr %0, i64 8 %12 = load ptr, ptr %11, align 8, !tbaa !16 %13 = load i32, ptr %12, align 4, !tbaa !17 %14 = shl nsw i32 %13, 3 %15 = sext i32 %14 to i64 %16 = add nsw i64 %8, %15 %17 = icmp slt i64 %5, %16 %18 = zext i1 %17 to i32 br label %19 19: ; preds = %10, %4, %1 %20 = phi i32 [ 0, %4 ], [ 0, %1 ], [ %18, %10 ] ret i32 %20 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"mxser_board", !7, i64 0, !12, i64 8, !12, i64 16} !12 = !{!"any pointer", !8, i64 0} !13 = !{!11, !12, i64 16} !14 = !{!15, !7, i64 0} !15 = !{!"TYPE_3__", !7, i64 0} !16 = !{!11, !12, i64 8} !17 = !{!18, !19, i64 0} !18 = !{!"TYPE_4__", !19, i64 0} !19 = !{!"int", !8, i64 0}
linux_drivers_tty_extr_mxser.c_mxser_overlapping_vector
; ModuleID = 'AnghaBench/linux/drivers/scsi/qla4xxx/extr_ql4_init.c_qla4xxx_alloc_fw_dump.c' source_filename = "AnghaBench/linux/drivers/scsi/qla4xxx/extr_ql4_init.c_qla4xxx_alloc_fw_dump.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.scsi_qla_host = type { i32, i32, i32, i32, ptr, i64, i64, i32 } %struct.qla4_8xxx_minidump_template_hdr = type { i32, i32, i32, ptr } @KERN_WARNING = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [37 x i8] c"Firmware dump previously allocated.\0A\00", align 1 @QLA_SUCCESS = dso_local local_unnamed_addr global i32 0, align 4 @KERN_INFO = dso_local local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [38 x i8] c"scsi%ld: Failed to get template size\0A\00", align 1 @AF_82XX_FW_DUMPED = dso_local local_unnamed_addr global i32 0, align 4 @GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4 @.str.2 = private unnamed_addr constant [40 x i8] c"scsi%ld: Failed to allocate DMA memory\0A\00", align 1 @.str.3 = private unnamed_addr constant [42 x i8] c"scsi%ld: Failed to get minidump template\0A\00", align 1 @ql4xmdcapmask = dso_local local_unnamed_addr global i32 0, align 4 @.str.4 = private unnamed_addr constant [67 x i8] c"Falling back to default capture mask, as PEX DMA is not supported\0A\00", align 1 @.str.5 = private unnamed_addr constant [29 x i8] c"Minimum num of entries = %d\0A\00", align 1 @.str.6 = private unnamed_addr constant [26 x i8] c"Dump template size = %d\0A\00", align 1 @.str.7 = private unnamed_addr constant [29 x i8] c"Selected Capture mask =0x%x\0A\00", align 1 @.str.8 = private unnamed_addr constant [34 x i8] c"Minidump Template Size = 0x%x KB\0A\00", align 1 @.str.9 = private unnamed_addr constant [31 x i8] c"Total Minidump size = 0x%x KB\0A\00", align 1 ; Function Attrs: nounwind uwtable define dso_local void @qla4xxx_alloc_fw_dump(ptr noundef %0) local_unnamed_addr #0 { %2 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 %3 = getelementptr inbounds %struct.scsi_qla_host, ptr %0, i64 0, i32 5 %4 = load i64, ptr %3, align 8, !tbaa !5 %5 = icmp eq i64 %4, 0 br i1 %5, label %9, label %6 6: ; preds = %1 %7 = load i32, ptr @KERN_WARNING, align 4, !tbaa !12 %8 = tail call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %7, ptr noundef nonnull %0, ptr noundef nonnull @.str) #3 br label %172 9: ; preds = %1 %10 = tail call i32 @qla4xxx_req_template_size(ptr noundef nonnull %0) #3 %11 = load i32, ptr @QLA_SUCCESS, align 4, !tbaa !12 %12 = icmp eq i32 %10, %11 br i1 %12, label %17, label %13 13: ; preds = %9 %14 = load i32, ptr @KERN_INFO, align 4, !tbaa !12 %15 = load i32, ptr %0, align 8, !tbaa !13 %16 = tail call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %14, ptr noundef nonnull %0, ptr noundef nonnull @.str.1, i32 noundef %15) #3 br label %172 17: ; preds = %9 %18 = load i32, ptr @AF_82XX_FW_DUMPED, align 4, !tbaa !12 %19 = getelementptr inbounds %struct.scsi_qla_host, ptr %0, i64 0, i32 7 %20 = tail call i32 @clear_bit(i32 noundef %18, ptr noundef nonnull %19) #3 %21 = getelementptr inbounds %struct.scsi_qla_host, ptr %0, i64 0, i32 4 %22 = load ptr, ptr %21, align 8, !tbaa !14 %23 = getelementptr inbounds %struct.scsi_qla_host, ptr %0, i64 0, i32 1 %24 = load i32, ptr %23, align 4, !tbaa !15 %25 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !12 %26 = call ptr @dma_alloc_coherent(ptr noundef %22, i32 noundef %24, ptr noundef nonnull %2, i32 noundef %25) #3 %27 = icmp eq ptr %26, null br i1 %27, label %28, label %32 28: ; preds = %17 %29 = load i32, ptr @KERN_INFO, align 4, !tbaa !12 %30 = load i32, ptr %0, align 8, !tbaa !13 %31 = call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %29, ptr noundef nonnull %0, ptr noundef nonnull @.str.2, i32 noundef %30) #3 br label %172 32: ; preds = %17 %33 = load i32, ptr %2, align 4, !tbaa !12 %34 = call i32 @qla4xxx_get_minidump_template(ptr noundef nonnull %0, i32 noundef %33) #3 %35 = load i32, ptr @QLA_SUCCESS, align 4, !tbaa !12 %36 = icmp eq i32 %34, %35 br i1 %36, label %41, label %37 37: ; preds = %32 %38 = load i32, ptr @KERN_INFO, align 4, !tbaa !12 %39 = load i32, ptr %0, align 8, !tbaa !13 %40 = call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %38, ptr noundef nonnull %0, ptr noundef nonnull @.str.3, i32 noundef %39) #3 br label %167 41: ; preds = %32 %42 = call i32 @qla4_80xx_is_minidump_dma_capable(ptr noundef nonnull %0, ptr noundef nonnull %26) #3 %43 = load i32, ptr %26, align 8, !tbaa !16 %44 = load i32, ptr @ql4xmdcapmask, align 4 %45 = add i32 %44, -3 %46 = icmp ult i32 %45, 125 br i1 %46, label %57, label %47 47: ; preds = %41 %48 = icmp eq i32 %44, 255 %49 = icmp ne i32 %42, 0 %50 = select i1 %48, i1 %49, i1 false %51 = xor i1 %48, true %52 = or i1 %50, %51 %53 = select i1 %50, i32 %44, i32 %43 br i1 %52, label %57, label %54 54: ; preds = %47 %55 = load i32, ptr @KERN_INFO, align 4, !tbaa !12 %56 = call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %55, ptr noundef nonnull %0, ptr noundef nonnull @.str.4) #3 br label %57 57: ; preds = %47, %54, %41 %58 = phi i32 [ %53, %47 ], [ %44, %41 ], [ %43, %54 ] %59 = getelementptr inbounds %struct.scsi_qla_host, ptr %0, i64 0, i32 2 store i32 %58, ptr %59, align 8, !tbaa !18 %60 = getelementptr inbounds %struct.scsi_qla_host, ptr %0, i64 0, i32 2 %61 = getelementptr inbounds %struct.qla4_8xxx_minidump_template_hdr, ptr %26, i64 0, i32 1 store i32 %58, ptr %61, align 4, !tbaa !19 %62 = load i32, ptr @KERN_INFO, align 4, !tbaa !12 %63 = getelementptr inbounds %struct.qla4_8xxx_minidump_template_hdr, ptr %26, i64 0, i32 2 %64 = load i32, ptr %63, align 8, !tbaa !20 %65 = call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %62, ptr noundef nonnull %0, ptr noundef nonnull @.str.5, i32 noundef %64) #3 %66 = call i32 @DEBUG2(i32 noundef %65) #3 %67 = load i32, ptr @KERN_INFO, align 4, !tbaa !12 %68 = load i32, ptr %23, align 4, !tbaa !15 %69 = call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %67, ptr noundef nonnull %0, ptr noundef nonnull @.str.6, i32 noundef %68) #3 %70 = call i32 @DEBUG2(i32 noundef %69) #3 %71 = load i32, ptr @KERN_INFO, align 4, !tbaa !12 %72 = load i32, ptr %60, align 8, !tbaa !18 %73 = call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %71, ptr noundef nonnull %0, ptr noundef nonnull @.str.7, i32 noundef %72) #3 %74 = call i32 @DEBUG2(i32 noundef %73) #3 %75 = load i32, ptr %60, align 8, !tbaa !18 %76 = getelementptr inbounds %struct.qla4_8xxx_minidump_template_hdr, ptr %26, i64 0, i32 3 %77 = getelementptr inbounds %struct.scsi_qla_host, ptr %0, i64 0, i32 3 %78 = and i32 %75, 2 %79 = icmp eq i32 %78, 0 %80 = load i32, ptr %77, align 4, !tbaa !21 br i1 %79, label %87, label %81 81: ; preds = %57 %82 = load ptr, ptr %76, align 8, !tbaa !22 %83 = getelementptr inbounds i64, ptr %82, i64 1 %84 = load i64, ptr %83, align 8, !tbaa !23 %85 = trunc i64 %84 to i32 %86 = add i32 %80, %85 br label %87 87: ; preds = %57, %81 %88 = phi i32 [ %80, %57 ], [ %86, %81 ] %89 = and i32 %75, 4 %90 = icmp eq i32 %89, 0 br i1 %90, label %97, label %91 91: ; preds = %87 %92 = load ptr, ptr %76, align 8, !tbaa !22 %93 = getelementptr inbounds i64, ptr %92, i64 2 %94 = load i64, ptr %93, align 8, !tbaa !23 %95 = trunc i64 %94 to i32 %96 = add i32 %88, %95 br label %97 97: ; preds = %91, %87 %98 = phi i32 [ %96, %91 ], [ %88, %87 ] %99 = and i32 %75, 8 %100 = icmp eq i32 %99, 0 br i1 %100, label %107, label %101 101: ; preds = %97 %102 = load ptr, ptr %76, align 8, !tbaa !22 %103 = getelementptr inbounds i64, ptr %102, i64 3 %104 = load i64, ptr %103, align 8, !tbaa !23 %105 = trunc i64 %104 to i32 %106 = add i32 %98, %105 br label %107 107: ; preds = %101, %97 %108 = phi i32 [ %106, %101 ], [ %98, %97 ] %109 = and i32 %75, 16 %110 = icmp eq i32 %109, 0 br i1 %110, label %117, label %111 111: ; preds = %107 %112 = load ptr, ptr %76, align 8, !tbaa !22 %113 = getelementptr inbounds i64, ptr %112, i64 4 %114 = load i64, ptr %113, align 8, !tbaa !23 %115 = trunc i64 %114 to i32 %116 = add i32 %108, %115 br label %117 117: ; preds = %111, %107 %118 = phi i32 [ %116, %111 ], [ %108, %107 ] %119 = and i32 %75, 32 %120 = icmp eq i32 %119, 0 br i1 %120, label %127, label %121 121: ; preds = %117 %122 = load ptr, ptr %76, align 8, !tbaa !22 %123 = getelementptr inbounds i64, ptr %122, i64 5 %124 = load i64, ptr %123, align 8, !tbaa !23 %125 = trunc i64 %124 to i32 %126 = add i32 %118, %125 br label %127 127: ; preds = %121, %117 %128 = phi i32 [ %126, %121 ], [ %118, %117 ] %129 = and i32 %75, 64 %130 = icmp eq i32 %129, 0 br i1 %130, label %137, label %131 131: ; preds = %127 %132 = load ptr, ptr %76, align 8, !tbaa !22 %133 = getelementptr inbounds i64, ptr %132, i64 6 %134 = load i64, ptr %133, align 8, !tbaa !23 %135 = trunc i64 %134 to i32 %136 = add i32 %128, %135 br label %137 137: ; preds = %131, %127 %138 = phi i32 [ %136, %131 ], [ %128, %127 ] %139 = and i32 %75, 128 %140 = icmp eq i32 %139, 0 br i1 %140, label %147, label %141 141: ; preds = %137 %142 = load ptr, ptr %76, align 8, !tbaa !22 %143 = getelementptr inbounds i64, ptr %142, i64 7 %144 = load i64, ptr %143, align 8, !tbaa !23 %145 = trunc i64 %144 to i32 %146 = add i32 %138, %145 br label %147 147: ; preds = %141, %137 %148 = phi i32 [ %146, %141 ], [ %138, %137 ] %149 = load i32, ptr %23, align 4, !tbaa !15 %150 = add nsw i32 %148, %149 store i32 %150, ptr %77, align 4, !tbaa !21 %151 = call i64 @vmalloc(i32 noundef %150) #3 store i64 %151, ptr %3, align 8, !tbaa !5 %152 = icmp eq i64 %151, 0 br i1 %152, label %167, label %153 153: ; preds = %147 %154 = load i32, ptr @KERN_INFO, align 4, !tbaa !12 %155 = load i32, ptr %23, align 4, !tbaa !15 %156 = call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %154, ptr noundef nonnull %0, ptr noundef nonnull @.str.8, i32 noundef %155) #3 %157 = call i32 @DEBUG2(i32 noundef %156) #3 %158 = load i32, ptr @KERN_INFO, align 4, !tbaa !12 %159 = load i32, ptr %77, align 4, !tbaa !21 %160 = call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %158, ptr noundef nonnull %0, ptr noundef nonnull @.str.9, i32 noundef %159) #3 %161 = call i32 @DEBUG2(i32 noundef %160) #3 %162 = load i64, ptr %3, align 8, !tbaa !5 %163 = load i32, ptr %23, align 4, !tbaa !15 %164 = call i32 @memcpy(i64 noundef %162, ptr noundef nonnull %26, i32 noundef %163) #3 %165 = load i64, ptr %3, align 8, !tbaa !5 %166 = getelementptr inbounds %struct.scsi_qla_host, ptr %0, i64 0, i32 6 store i64 %165, ptr %166, align 8, !tbaa !24 br label %167 167: ; preds = %147, %153, %37 %168 = load ptr, ptr %21, align 8, !tbaa !14 %169 = load i32, ptr %23, align 4, !tbaa !15 %170 = load i32, ptr %2, align 4, !tbaa !12 %171 = call i32 @dma_free_coherent(ptr noundef %168, i32 noundef %169, ptr noundef nonnull %26, i32 noundef %170) #3 br label %172 172: ; preds = %167, %28, %13, %6 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @ql4_printk(i32 noundef, ptr noundef, ptr noundef, ...) local_unnamed_addr #2 declare i32 @qla4xxx_req_template_size(ptr noundef) local_unnamed_addr #2 declare i32 @clear_bit(i32 noundef, ptr noundef) local_unnamed_addr #2 declare ptr @dma_alloc_coherent(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @qla4xxx_get_minidump_template(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @qla4_80xx_is_minidump_dma_capable(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @DEBUG2(i32 noundef) local_unnamed_addr #2 declare i64 @vmalloc(i32 noundef) local_unnamed_addr #2 declare i32 @memcpy(i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @dma_free_coherent(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !11, i64 24} !6 = !{!"scsi_qla_host", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !10, i64 16, !11, i64 24, !11, i64 32, !7, i64 40} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!"long", !8, i64 0} !12 = !{!7, !7, i64 0} !13 = !{!6, !7, i64 0} !14 = !{!6, !10, i64 16} !15 = !{!6, !7, i64 4} !16 = !{!17, !7, i64 0} !17 = !{!"qla4_8xxx_minidump_template_hdr", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16} !18 = !{!6, !7, i64 8} !19 = !{!17, !7, i64 4} !20 = !{!17, !7, i64 8} !21 = !{!6, !7, i64 12} !22 = !{!17, !10, i64 16} !23 = !{!11, !11, i64 0} !24 = !{!6, !11, i64 32}
; ModuleID = 'AnghaBench/linux/drivers/scsi/qla4xxx/extr_ql4_init.c_qla4xxx_alloc_fw_dump.c' source_filename = "AnghaBench/linux/drivers/scsi/qla4xxx/extr_ql4_init.c_qla4xxx_alloc_fw_dump.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @KERN_WARNING = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [37 x i8] c"Firmware dump previously allocated.\0A\00", align 1 @QLA_SUCCESS = common local_unnamed_addr global i32 0, align 4 @KERN_INFO = common local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [38 x i8] c"scsi%ld: Failed to get template size\0A\00", align 1 @AF_82XX_FW_DUMPED = common local_unnamed_addr global i32 0, align 4 @GFP_KERNEL = common local_unnamed_addr global i32 0, align 4 @.str.2 = private unnamed_addr constant [40 x i8] c"scsi%ld: Failed to allocate DMA memory\0A\00", align 1 @.str.3 = private unnamed_addr constant [42 x i8] c"scsi%ld: Failed to get minidump template\0A\00", align 1 @ql4xmdcapmask = common local_unnamed_addr global i32 0, align 4 @.str.4 = private unnamed_addr constant [67 x i8] c"Falling back to default capture mask, as PEX DMA is not supported\0A\00", align 1 @.str.5 = private unnamed_addr constant [29 x i8] c"Minimum num of entries = %d\0A\00", align 1 @.str.6 = private unnamed_addr constant [26 x i8] c"Dump template size = %d\0A\00", align 1 @.str.7 = private unnamed_addr constant [29 x i8] c"Selected Capture mask =0x%x\0A\00", align 1 @.str.8 = private unnamed_addr constant [34 x i8] c"Minidump Template Size = 0x%x KB\0A\00", align 1 @.str.9 = private unnamed_addr constant [31 x i8] c"Total Minidump size = 0x%x KB\0A\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define void @qla4xxx_alloc_fw_dump(ptr noundef %0) local_unnamed_addr #0 { %2 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 %3 = getelementptr inbounds i8, ptr %0, i64 24 %4 = load i64, ptr %3, align 8, !tbaa !6 %5 = icmp eq i64 %4, 0 br i1 %5, label %9, label %6 6: ; preds = %1 %7 = load i32, ptr @KERN_WARNING, align 4, !tbaa !13 %8 = tail call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %7, ptr noundef nonnull %0, ptr noundef nonnull @.str) #3 br label %171 9: ; preds = %1 %10 = tail call i32 @qla4xxx_req_template_size(ptr noundef nonnull %0) #3 %11 = load i32, ptr @QLA_SUCCESS, align 4, !tbaa !13 %12 = icmp eq i32 %10, %11 br i1 %12, label %17, label %13 13: ; preds = %9 %14 = load i32, ptr @KERN_INFO, align 4, !tbaa !13 %15 = load i32, ptr %0, align 8, !tbaa !14 %16 = tail call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %14, ptr noundef nonnull %0, ptr noundef nonnull @.str.1, i32 noundef %15) #3 br label %171 17: ; preds = %9 %18 = load i32, ptr @AF_82XX_FW_DUMPED, align 4, !tbaa !13 %19 = getelementptr inbounds i8, ptr %0, i64 40 %20 = tail call i32 @clear_bit(i32 noundef %18, ptr noundef nonnull %19) #3 %21 = getelementptr inbounds i8, ptr %0, i64 16 %22 = load ptr, ptr %21, align 8, !tbaa !15 %23 = getelementptr inbounds i8, ptr %0, i64 4 %24 = load i32, ptr %23, align 4, !tbaa !16 %25 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !13 %26 = call ptr @dma_alloc_coherent(ptr noundef %22, i32 noundef %24, ptr noundef nonnull %2, i32 noundef %25) #3 %27 = icmp eq ptr %26, null br i1 %27, label %28, label %32 28: ; preds = %17 %29 = load i32, ptr @KERN_INFO, align 4, !tbaa !13 %30 = load i32, ptr %0, align 8, !tbaa !14 %31 = call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %29, ptr noundef nonnull %0, ptr noundef nonnull @.str.2, i32 noundef %30) #3 br label %171 32: ; preds = %17 %33 = load i32, ptr %2, align 4, !tbaa !13 %34 = call i32 @qla4xxx_get_minidump_template(ptr noundef nonnull %0, i32 noundef %33) #3 %35 = load i32, ptr @QLA_SUCCESS, align 4, !tbaa !13 %36 = icmp eq i32 %34, %35 br i1 %36, label %41, label %37 37: ; preds = %32 %38 = load i32, ptr @KERN_INFO, align 4, !tbaa !13 %39 = load i32, ptr %0, align 8, !tbaa !14 %40 = call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %38, ptr noundef nonnull %0, ptr noundef nonnull @.str.3, i32 noundef %39) #3 br label %166 41: ; preds = %32 %42 = call i32 @qla4_80xx_is_minidump_dma_capable(ptr noundef nonnull %0, ptr noundef nonnull %26) #3 %43 = load i32, ptr %26, align 8, !tbaa !17 %44 = load i32, ptr @ql4xmdcapmask, align 4 %45 = add i32 %44, -3 %46 = icmp ult i32 %45, 125 br i1 %46, label %57, label %47 47: ; preds = %41 %48 = icmp eq i32 %44, 255 %49 = icmp ne i32 %42, 0 %50 = select i1 %48, i1 %49, i1 false %51 = xor i1 %48, true %52 = select i1 %51, i1 true, i1 %49 %53 = select i1 %50, i32 %44, i32 %43 br i1 %52, label %57, label %54 54: ; preds = %47 %55 = load i32, ptr @KERN_INFO, align 4, !tbaa !13 %56 = call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %55, ptr noundef nonnull %0, ptr noundef nonnull @.str.4) #3 br label %57 57: ; preds = %47, %54, %41 %58 = phi i32 [ %53, %47 ], [ %44, %41 ], [ %43, %54 ] %59 = getelementptr inbounds i8, ptr %0, i64 8 store i32 %58, ptr %59, align 8, !tbaa !19 %60 = getelementptr inbounds i8, ptr %26, i64 4 store i32 %58, ptr %60, align 4, !tbaa !20 %61 = load i32, ptr @KERN_INFO, align 4, !tbaa !13 %62 = getelementptr inbounds i8, ptr %26, i64 8 %63 = load i32, ptr %62, align 8, !tbaa !21 %64 = call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %61, ptr noundef nonnull %0, ptr noundef nonnull @.str.5, i32 noundef %63) #3 %65 = call i32 @DEBUG2(i32 noundef %64) #3 %66 = load i32, ptr @KERN_INFO, align 4, !tbaa !13 %67 = load i32, ptr %23, align 4, !tbaa !16 %68 = call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %66, ptr noundef nonnull %0, ptr noundef nonnull @.str.6, i32 noundef %67) #3 %69 = call i32 @DEBUG2(i32 noundef %68) #3 %70 = load i32, ptr @KERN_INFO, align 4, !tbaa !13 %71 = load i32, ptr %59, align 8, !tbaa !19 %72 = call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %70, ptr noundef nonnull %0, ptr noundef nonnull @.str.7, i32 noundef %71) #3 %73 = call i32 @DEBUG2(i32 noundef %72) #3 %74 = load i32, ptr %59, align 8, !tbaa !19 %75 = getelementptr inbounds i8, ptr %26, i64 16 %76 = getelementptr inbounds i8, ptr %0, i64 12 %77 = and i32 %74, 2 %78 = icmp eq i32 %77, 0 %79 = load i32, ptr %76, align 4, !tbaa !22 br i1 %78, label %86, label %80 80: ; preds = %57 %81 = load ptr, ptr %75, align 8, !tbaa !23 %82 = getelementptr inbounds i8, ptr %81, i64 8 %83 = load i64, ptr %82, align 8, !tbaa !24 %84 = trunc i64 %83 to i32 %85 = add i32 %79, %84 br label %86 86: ; preds = %57, %80 %87 = phi i32 [ %79, %57 ], [ %85, %80 ] %88 = and i32 %74, 4 %89 = icmp eq i32 %88, 0 br i1 %89, label %96, label %90 90: ; preds = %86 %91 = load ptr, ptr %75, align 8, !tbaa !23 %92 = getelementptr inbounds i8, ptr %91, i64 16 %93 = load i64, ptr %92, align 8, !tbaa !24 %94 = trunc i64 %93 to i32 %95 = add i32 %87, %94 br label %96 96: ; preds = %90, %86 %97 = phi i32 [ %95, %90 ], [ %87, %86 ] %98 = and i32 %74, 8 %99 = icmp eq i32 %98, 0 br i1 %99, label %106, label %100 100: ; preds = %96 %101 = load ptr, ptr %75, align 8, !tbaa !23 %102 = getelementptr inbounds i8, ptr %101, i64 24 %103 = load i64, ptr %102, align 8, !tbaa !24 %104 = trunc i64 %103 to i32 %105 = add i32 %97, %104 br label %106 106: ; preds = %100, %96 %107 = phi i32 [ %105, %100 ], [ %97, %96 ] %108 = and i32 %74, 16 %109 = icmp eq i32 %108, 0 br i1 %109, label %116, label %110 110: ; preds = %106 %111 = load ptr, ptr %75, align 8, !tbaa !23 %112 = getelementptr inbounds i8, ptr %111, i64 32 %113 = load i64, ptr %112, align 8, !tbaa !24 %114 = trunc i64 %113 to i32 %115 = add i32 %107, %114 br label %116 116: ; preds = %110, %106 %117 = phi i32 [ %115, %110 ], [ %107, %106 ] %118 = and i32 %74, 32 %119 = icmp eq i32 %118, 0 br i1 %119, label %126, label %120 120: ; preds = %116 %121 = load ptr, ptr %75, align 8, !tbaa !23 %122 = getelementptr inbounds i8, ptr %121, i64 40 %123 = load i64, ptr %122, align 8, !tbaa !24 %124 = trunc i64 %123 to i32 %125 = add i32 %117, %124 br label %126 126: ; preds = %120, %116 %127 = phi i32 [ %125, %120 ], [ %117, %116 ] %128 = and i32 %74, 64 %129 = icmp eq i32 %128, 0 br i1 %129, label %136, label %130 130: ; preds = %126 %131 = load ptr, ptr %75, align 8, !tbaa !23 %132 = getelementptr inbounds i8, ptr %131, i64 48 %133 = load i64, ptr %132, align 8, !tbaa !24 %134 = trunc i64 %133 to i32 %135 = add i32 %127, %134 br label %136 136: ; preds = %130, %126 %137 = phi i32 [ %135, %130 ], [ %127, %126 ] %138 = and i32 %74, 128 %139 = icmp eq i32 %138, 0 br i1 %139, label %146, label %140 140: ; preds = %136 %141 = load ptr, ptr %75, align 8, !tbaa !23 %142 = getelementptr inbounds i8, ptr %141, i64 56 %143 = load i64, ptr %142, align 8, !tbaa !24 %144 = trunc i64 %143 to i32 %145 = add i32 %137, %144 br label %146 146: ; preds = %140, %136 %147 = phi i32 [ %145, %140 ], [ %137, %136 ] %148 = load i32, ptr %23, align 4, !tbaa !16 %149 = add nsw i32 %147, %148 store i32 %149, ptr %76, align 4, !tbaa !22 %150 = call i64 @vmalloc(i32 noundef %149) #3 store i64 %150, ptr %3, align 8, !tbaa !6 %151 = icmp eq i64 %150, 0 br i1 %151, label %166, label %152 152: ; preds = %146 %153 = load i32, ptr @KERN_INFO, align 4, !tbaa !13 %154 = load i32, ptr %23, align 4, !tbaa !16 %155 = call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %153, ptr noundef nonnull %0, ptr noundef nonnull @.str.8, i32 noundef %154) #3 %156 = call i32 @DEBUG2(i32 noundef %155) #3 %157 = load i32, ptr @KERN_INFO, align 4, !tbaa !13 %158 = load i32, ptr %76, align 4, !tbaa !22 %159 = call i32 (i32, ptr, ptr, ...) @ql4_printk(i32 noundef %157, ptr noundef nonnull %0, ptr noundef nonnull @.str.9, i32 noundef %158) #3 %160 = call i32 @DEBUG2(i32 noundef %159) #3 %161 = load i64, ptr %3, align 8, !tbaa !6 %162 = load i32, ptr %23, align 4, !tbaa !16 %163 = call i32 @memcpy(i64 noundef %161, ptr noundef nonnull %26, i32 noundef %162) #3 %164 = load i64, ptr %3, align 8, !tbaa !6 %165 = getelementptr inbounds i8, ptr %0, i64 32 store i64 %164, ptr %165, align 8, !tbaa !25 br label %166 166: ; preds = %146, %152, %37 %167 = load ptr, ptr %21, align 8, !tbaa !15 %168 = load i32, ptr %23, align 4, !tbaa !16 %169 = load i32, ptr %2, align 4, !tbaa !13 %170 = call i32 @dma_free_coherent(ptr noundef %167, i32 noundef %168, ptr noundef nonnull %26, i32 noundef %169) #3 br label %171 171: ; preds = %166, %28, %13, %6 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @ql4_printk(i32 noundef, ptr noundef, ptr noundef, ...) local_unnamed_addr #2 declare i32 @qla4xxx_req_template_size(ptr noundef) local_unnamed_addr #2 declare i32 @clear_bit(i32 noundef, ptr noundef) local_unnamed_addr #2 declare ptr @dma_alloc_coherent(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @qla4xxx_get_minidump_template(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @qla4_80xx_is_minidump_dma_capable(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @DEBUG2(i32 noundef) local_unnamed_addr #2 declare i64 @vmalloc(i32 noundef) local_unnamed_addr #2 declare i32 @memcpy(i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @dma_free_coherent(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !12, i64 24} !7 = !{!"scsi_qla_host", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !11, i64 16, !12, i64 24, !12, i64 32, !8, i64 40} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!"long", !9, i64 0} !13 = !{!8, !8, i64 0} !14 = !{!7, !8, i64 0} !15 = !{!7, !11, i64 16} !16 = !{!7, !8, i64 4} !17 = !{!18, !8, i64 0} !18 = !{!"qla4_8xxx_minidump_template_hdr", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 16} !19 = !{!7, !8, i64 8} !20 = !{!18, !8, i64 4} !21 = !{!18, !8, i64 8} !22 = !{!7, !8, i64 12} !23 = !{!18, !11, i64 16} !24 = !{!12, !12, i64 0} !25 = !{!7, !12, i64 32}
linux_drivers_scsi_qla4xxx_extr_ql4_init.c_qla4xxx_alloc_fw_dump
; ModuleID = 'AnghaBench/freebsd/usr.bin/ncal/extr_ncal.c_printeaster.c' source_filename = "AnghaBench/freebsd/usr.bin/ncal/extr_ncal.c_printeaster.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_5__ = type { i32, i64, i64 } %struct.tm = type { i32, i64, i64 } @MAX_WIDTH = dso_local local_unnamed_addr global i32 0, align 4 @printeaster.d_first = internal unnamed_addr global i32 -1, align 4 @D_MD_ORDER = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [9 x i8] c"%e %B %Y\00", align 1 @.str.1 = private unnamed_addr constant [9 x i8] c"%B %e %Y\00", align 1 @.str.2 = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @printeaster], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @printeaster(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 { %4 = alloca %struct.TYPE_5__, align 8 %5 = alloca %struct.tm, align 8 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #4 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #4 %6 = load i32, ptr @MAX_WIDTH, align 4, !tbaa !5 %7 = zext i32 %6 to i64 %8 = tail call ptr @llvm.stacksave.p0() %9 = alloca i8, i64 %7, align 16 %10 = load i32, ptr @printeaster.d_first, align 4, !tbaa !5 %11 = icmp slt i32 %10, 0 br i1 %11, label %12, label %18 12: ; preds = %3 %13 = load i32, ptr @D_MD_ORDER, align 4, !tbaa !5 %14 = tail call ptr @nl_langinfo(i32 noundef %13) #4 %15 = load i8, ptr %14, align 1, !tbaa !9 %16 = icmp eq i8 %15, 100 %17 = zext i1 %16 to i32 store i32 %17, ptr @printeaster.d_first, align 4, !tbaa !5 br label %18 18: ; preds = %12, %3 %19 = icmp sgt i32 %0, 1582 %20 = icmp eq i32 %2, 0 %21 = and i1 %19, %20 br i1 %21, label %28, label %22 22: ; preds = %18 %23 = icmp eq i32 %1, 0 br i1 %23, label %26, label %24 24: ; preds = %22 %25 = call i32 @easteroj(i32 noundef %0, ptr noundef nonnull %4) #4 br label %30 26: ; preds = %22 %27 = call i32 @easterog(i32 noundef %0, ptr noundef nonnull %4) #4 br label %30 28: ; preds = %18 %29 = call i32 @easterg(i32 noundef %0, ptr noundef nonnull %4) #4 br label %30 30: ; preds = %24, %26, %28 %31 = call i32 @memset(ptr noundef nonnull %5, i32 noundef 0, i32 noundef 24) #4 %32 = getelementptr inbounds %struct.TYPE_5__, ptr %4, i64 0, i32 1 %33 = getelementptr inbounds %struct.tm, ptr %5, i64 0, i32 1 %34 = load <2 x i64>, ptr %32, align 8, !tbaa !10 %35 = add nsw <2 x i64> %34, <i64 -1, i64 -1900> store <2 x i64> %35, ptr %33, align 8, !tbaa !10 %36 = load i32, ptr %4, align 8, !tbaa !12 store i32 %36, ptr %5, align 8, !tbaa !14 %37 = load i32, ptr @printeaster.d_first, align 4, !tbaa !5 %38 = icmp eq i32 %37, 0 %39 = select i1 %38, ptr @.str.1, ptr @.str %40 = call i32 @strftime(ptr noundef nonnull %9, i32 noundef %6, ptr noundef nonnull %39, ptr noundef nonnull %5) #4 %41 = call i32 @printf(ptr noundef nonnull @.str.2, ptr noundef nonnull %9) #4 call void @llvm.stackrestore.p0(ptr %8) call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #4 call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #4 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn declare ptr @llvm.stacksave.p0() #2 declare ptr @nl_langinfo(i32 noundef) local_unnamed_addr #3 declare i32 @easteroj(i32 noundef, ptr noundef) local_unnamed_addr #3 declare i32 @easterog(i32 noundef, ptr noundef) local_unnamed_addr #3 declare i32 @easterg(i32 noundef, ptr noundef) local_unnamed_addr #3 declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3 declare i32 @strftime(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #3 declare i32 @printf(ptr noundef, ptr noundef) local_unnamed_addr #3 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn declare void @llvm.stackrestore.p0(ptr) #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn } attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #4 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!7, !7, i64 0} !10 = !{!11, !11, i64 0} !11 = !{!"long", !7, i64 0} !12 = !{!13, !6, i64 0} !13 = !{!"TYPE_5__", !6, i64 0, !11, i64 8, !11, i64 16} !14 = !{!15, !6, i64 0} !15 = !{!"tm", !6, i64 0, !11, i64 8, !11, i64 16}
; ModuleID = 'AnghaBench/freebsd/usr.bin/ncal/extr_ncal.c_printeaster.c' source_filename = "AnghaBench/freebsd/usr.bin/ncal/extr_ncal.c_printeaster.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_5__ = type { i32, i64, i64 } %struct.tm = type { i32, i64, i64 } @MAX_WIDTH = common local_unnamed_addr global i32 0, align 4 @printeaster.d_first = internal unnamed_addr global i32 -1, align 4 @D_MD_ORDER = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [9 x i8] c"%e %B %Y\00", align 1 @.str.1 = private unnamed_addr constant [9 x i8] c"%B %e %Y\00", align 1 @.str.2 = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @printeaster], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @printeaster(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 { %4 = alloca %struct.TYPE_5__, align 8 %5 = alloca %struct.tm, align 8 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #4 call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #4 %6 = load i32, ptr @MAX_WIDTH, align 4, !tbaa !6 %7 = zext i32 %6 to i64 %8 = tail call ptr @llvm.stacksave.p0() %9 = alloca i8, i64 %7, align 1 %10 = load i32, ptr @printeaster.d_first, align 4, !tbaa !6 %11 = icmp slt i32 %10, 0 br i1 %11, label %12, label %18 12: ; preds = %3 %13 = load i32, ptr @D_MD_ORDER, align 4, !tbaa !6 %14 = tail call ptr @nl_langinfo(i32 noundef %13) #4 %15 = load i8, ptr %14, align 1, !tbaa !10 %16 = icmp eq i8 %15, 100 %17 = zext i1 %16 to i32 store i32 %17, ptr @printeaster.d_first, align 4, !tbaa !6 br label %18 18: ; preds = %12, %3 %19 = icmp sgt i32 %0, 1582 %20 = icmp eq i32 %2, 0 %21 = and i1 %19, %20 br i1 %21, label %28, label %22 22: ; preds = %18 %23 = icmp eq i32 %1, 0 br i1 %23, label %26, label %24 24: ; preds = %22 %25 = call i32 @easteroj(i32 noundef %0, ptr noundef nonnull %4) #4 br label %30 26: ; preds = %22 %27 = call i32 @easterog(i32 noundef %0, ptr noundef nonnull %4) #4 br label %30 28: ; preds = %18 %29 = call i32 @easterg(i32 noundef %0, ptr noundef nonnull %4) #4 br label %30 30: ; preds = %24, %26, %28 %31 = call i32 @memset(ptr noundef nonnull %5, i32 noundef 0, i32 noundef 24) #4 %32 = getelementptr inbounds i8, ptr %4, i64 8 %33 = getelementptr inbounds i8, ptr %5, i64 8 %34 = load <2 x i64>, ptr %32, align 8, !tbaa !11 %35 = add nsw <2 x i64> %34, <i64 -1, i64 -1900> store <2 x i64> %35, ptr %33, align 8, !tbaa !11 %36 = load i32, ptr %4, align 8, !tbaa !13 store i32 %36, ptr %5, align 8, !tbaa !15 %37 = load i32, ptr @printeaster.d_first, align 4, !tbaa !6 %38 = icmp eq i32 %37, 0 %39 = select i1 %38, ptr @.str.1, ptr @.str %40 = call i32 @strftime(ptr noundef nonnull %9, i32 noundef %6, ptr noundef nonnull %39, ptr noundef nonnull %5) #4 %41 = call i32 @printf(ptr noundef nonnull @.str.2, ptr noundef nonnull %9) #4 call void @llvm.stackrestore.p0(ptr %8) call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #4 call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #4 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn declare ptr @llvm.stacksave.p0() #2 declare ptr @nl_langinfo(i32 noundef) local_unnamed_addr #3 declare i32 @easteroj(i32 noundef, ptr noundef) local_unnamed_addr #3 declare i32 @easterog(i32 noundef, ptr noundef) local_unnamed_addr #3 declare i32 @easterg(i32 noundef, ptr noundef) local_unnamed_addr #3 declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3 declare i32 @strftime(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #3 declare i32 @printf(ptr noundef, ptr noundef) local_unnamed_addr #3 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn declare void @llvm.stackrestore.p0(ptr) #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn } attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #4 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!8, !8, i64 0} !11 = !{!12, !12, i64 0} !12 = !{!"long", !8, i64 0} !13 = !{!14, !7, i64 0} !14 = !{!"TYPE_5__", !7, i64 0, !12, i64 8, !12, i64 16} !15 = !{!16, !7, i64 0} !16 = !{!"tm", !7, i64 0, !12, i64 8, !12, i64 16}
freebsd_usr.bin_ncal_extr_ncal.c_printeaster
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/exynos/extr_exynos_drm_drv.h_exynos_dpi_remove.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/exynos/extr_exynos_drm_drv.h_exynos_dpi_remove.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @exynos_dpi_remove], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define internal noundef i32 @exynos_dpi_remove(ptr nocapture readnone %0) #0 { ret i32 0 } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/exynos/extr_exynos_drm_drv.h_exynos_dpi_remove.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/exynos/extr_exynos_drm_drv.h_exynos_dpi_remove.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @exynos_dpi_remove], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define internal noundef i32 @exynos_dpi_remove(ptr nocapture readnone %0) #0 { ret i32 0 } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
linux_drivers_gpu_drm_exynos_extr_exynos_drm_drv.h_exynos_dpi_remove
; ModuleID = 'AnghaBench/postgres/src/bin/pg_basebackup/extr_receivelog.c_ProcessXLogDataMsg.c' source_filename = "AnghaBench/postgres/src/bin/pg_basebackup/extr_receivelog.c_ProcessXLogDataMsg.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_7__ = type { i32, ptr, ptr } %struct.TYPE_6__ = type { ptr, ptr, ptr } @still_sending = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [31 x i8] c"streaming header too small: %d\00", align 1 @WalSegSz = dso_local local_unnamed_addr global i32 0, align 4 @walfile = dso_local local_unnamed_addr global ptr null, align 8 @.str.1 = private unnamed_addr constant [64 x i8] c"received write-ahead log record for offset %u with no file open\00", align 1 @.str.2 = private unnamed_addr constant [40 x i8] c"got WAL data offset %08x, expected %08x\00", align 1 @.str.3 = private unnamed_addr constant [46 x i8] c"could not write %u bytes to WAL file \22%s\22: %s\00", align 1 @current_walfile_name = dso_local local_unnamed_addr global i32 0, align 4 @.str.4 = private unnamed_addr constant [35 x i8] c"could not send copy-end packet: %s\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @ProcessXLogDataMsg], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef i32 @ProcessXLogDataMsg(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3, ptr nocapture noundef %4) #0 { %6 = load i32, ptr @still_sending, align 4, !tbaa !5 %7 = icmp eq i32 %6, 0 br i1 %7, label %110, label %8 8: ; preds = %5 %9 = icmp slt i32 %3, 25 br i1 %9, label %10, label %12 10: ; preds = %8 %11 = tail call i32 (ptr, i32, ...) @pg_log_error(ptr noundef nonnull @.str, i32 noundef %3) #2 br label %110 12: ; preds = %8 %13 = getelementptr inbounds i8, ptr %2, i64 1 %14 = tail call i32 @fe_recvint64(ptr noundef nonnull %13) #2 store i32 %14, ptr %4, align 4, !tbaa !5 %15 = load i32, ptr @WalSegSz, align 4, !tbaa !5 %16 = tail call i32 @XLogSegmentOffset(i32 noundef %14, i32 noundef %15) #2 %17 = load ptr, ptr @walfile, align 8, !tbaa !9 %18 = icmp eq ptr %17, null br i1 %18, label %19, label %23 19: ; preds = %12 %20 = icmp eq i32 %16, 0 br i1 %20, label %35, label %21 21: ; preds = %19 %22 = tail call i32 (ptr, i32, ...) @pg_log_error(ptr noundef nonnull @.str.1, i32 noundef %16) #2 br label %110 23: ; preds = %12 %24 = getelementptr inbounds %struct.TYPE_7__, ptr %1, i64 0, i32 2 %25 = load ptr, ptr %24, align 8, !tbaa !11 %26 = load ptr, ptr %25, align 8, !tbaa !13 %27 = tail call i32 %26(ptr noundef nonnull %17) #2 %28 = icmp eq i32 %27, %16 br i1 %28, label %35, label %29 29: ; preds = %23 %30 = load ptr, ptr %24, align 8, !tbaa !11 %31 = load ptr, ptr %30, align 8, !tbaa !13 %32 = load ptr, ptr @walfile, align 8, !tbaa !9 %33 = tail call i32 %31(ptr noundef %32) #2 %34 = tail call i32 (ptr, i32, ...) @pg_log_error(ptr noundef nonnull @.str.2, i32 noundef %16, i32 noundef %33) #2 br label %110 35: ; preds = %23, %19 %36 = add nsw i32 %3, -25 %37 = icmp eq i32 %36, 0 br i1 %37, label %110, label %38 38: ; preds = %35 %39 = getelementptr inbounds %struct.TYPE_7__, ptr %1, i64 0, i32 2 %40 = getelementptr inbounds i8, ptr %2, i64 25 %41 = getelementptr inbounds %struct.TYPE_7__, ptr %1, i64 0, i32 1 br label %42 42: ; preds = %38, %107 %43 = phi i32 [ 0, %38 ], [ %76, %107 ] %44 = phi i32 [ %36, %38 ], [ %77, %107 ] %45 = phi i32 [ %16, %38 ], [ %108, %107 ] %46 = add nsw i32 %44, %45 %47 = load i32, ptr @WalSegSz, align 4, !tbaa !5 %48 = icmp sgt i32 %46, %47 %49 = sub nsw i32 %47, %45 %50 = select i1 %48, i32 %49, i32 %44 %51 = load ptr, ptr @walfile, align 8, !tbaa !9 %52 = icmp eq ptr %51, null br i1 %52, label %53, label %59 53: ; preds = %42 %54 = load i32, ptr %4, align 4, !tbaa !5 %55 = tail call i32 @open_walfile(ptr noundef %1, i32 noundef %54) #2 %56 = icmp eq i32 %55, 0 br i1 %56, label %110, label %57 57: ; preds = %53 %58 = load ptr, ptr @walfile, align 8, !tbaa !9 br label %59 59: ; preds = %57, %42 %60 = phi ptr [ %58, %57 ], [ %51, %42 ] %61 = load ptr, ptr %39, align 8, !tbaa !11 %62 = getelementptr inbounds %struct.TYPE_6__, ptr %61, i64 0, i32 1 %63 = load ptr, ptr %62, align 8, !tbaa !15 %64 = sext i32 %43 to i64 %65 = getelementptr inbounds i8, ptr %40, i64 %64 %66 = tail call i32 %63(ptr noundef %60, ptr noundef nonnull %65, i32 noundef %50) #2 %67 = icmp eq i32 %66, %50 br i1 %67, label %75, label %68 68: ; preds = %59 %69 = load i32, ptr @current_walfile_name, align 4, !tbaa !5 %70 = load ptr, ptr %39, align 8, !tbaa !11 %71 = getelementptr inbounds %struct.TYPE_6__, ptr %70, i64 0, i32 2 %72 = load ptr, ptr %71, align 8, !tbaa !16 %73 = tail call i32 (...) %72() #2 %74 = tail call i32 (ptr, i32, ...) @pg_log_error(ptr noundef nonnull @.str.3, i32 noundef %50, i32 noundef %69, i32 noundef %73) #2 br label %110 75: ; preds = %59 %76 = add nsw i32 %50, %43 %77 = sub nsw i32 %44, %50 %78 = load i32, ptr %4, align 4, !tbaa !5 %79 = add nsw i32 %78, %50 store i32 %79, ptr %4, align 4, !tbaa !5 %80 = add nsw i32 %50, %45 %81 = load i32, ptr @WalSegSz, align 4, !tbaa !5 %82 = tail call i32 @XLogSegmentOffset(i32 noundef %79, i32 noundef %81) #2 %83 = icmp eq i32 %82, 0 br i1 %83, label %84, label %107 84: ; preds = %75 %85 = load i32, ptr %4, align 4, !tbaa !5 %86 = tail call i32 @close_walfile(ptr noundef nonnull %1, i32 noundef %85) #2 %87 = icmp eq i32 %86, 0 br i1 %87, label %110, label %88 88: ; preds = %84 %89 = load i32, ptr @still_sending, align 4, !tbaa !5 %90 = icmp eq i32 %89, 0 br i1 %90, label %107, label %91 91: ; preds = %88 %92 = load ptr, ptr %41, align 8, !tbaa !17 %93 = load i32, ptr %4, align 4, !tbaa !5 %94 = load i32, ptr %1, align 8, !tbaa !18 %95 = tail call i64 %92(i32 noundef %93, i32 noundef %94, i32 noundef 1) #2 %96 = icmp eq i64 %95, 0 br i1 %96, label %107, label %97 97: ; preds = %91 %98 = tail call i64 @PQputCopyEnd(ptr noundef %0, ptr noundef null) #2 %99 = icmp slt i64 %98, 1 br i1 %99, label %103, label %100 100: ; preds = %97 %101 = tail call i64 @PQflush(ptr noundef %0) #2 %102 = icmp eq i64 %101, 0 br i1 %102, label %106, label %103 103: ; preds = %100, %97 %104 = tail call i32 @PQerrorMessage(ptr noundef %0) #2 %105 = tail call i32 (ptr, i32, ...) @pg_log_error(ptr noundef nonnull @.str.4, i32 noundef %104) #2 br label %110 106: ; preds = %100 store i32 0, ptr @still_sending, align 4, !tbaa !5 br label %110 107: ; preds = %75, %91, %88 %108 = phi i32 [ 0, %91 ], [ 0, %88 ], [ %80, %75 ] %109 = icmp eq i32 %77, 0 br i1 %109, label %110, label %42, !llvm.loop !19 110: ; preds = %107, %53, %84, %35, %106, %103, %68, %5, %29, %21, %10 %111 = phi i32 [ 0, %10 ], [ 0, %21 ], [ 0, %29 ], [ 1, %5 ], [ 1, %106 ], [ 0, %103 ], [ 0, %68 ], [ 1, %35 ], [ 1, %107 ], [ 0, %53 ], [ 0, %84 ] ret i32 %111 } declare i32 @pg_log_error(ptr noundef, i32 noundef, ...) local_unnamed_addr #1 declare i32 @fe_recvint64(ptr noundef) local_unnamed_addr #1 declare i32 @XLogSegmentOffset(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @open_walfile(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @close_walfile(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i64 @PQputCopyEnd(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i64 @PQflush(ptr noundef) local_unnamed_addr #1 declare i32 @PQerrorMessage(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"any pointer", !7, i64 0} !11 = !{!12, !10, i64 16} !12 = !{!"TYPE_7__", !6, i64 0, !10, i64 8, !10, i64 16} !13 = !{!14, !10, i64 0} !14 = !{!"TYPE_6__", !10, i64 0, !10, i64 8, !10, i64 16} !15 = !{!14, !10, i64 8} !16 = !{!14, !10, i64 16} !17 = !{!12, !10, i64 8} !18 = !{!12, !6, i64 0} !19 = distinct !{!19, !20} !20 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/postgres/src/bin/pg_basebackup/extr_receivelog.c_ProcessXLogDataMsg.c' source_filename = "AnghaBench/postgres/src/bin/pg_basebackup/extr_receivelog.c_ProcessXLogDataMsg.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @still_sending = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [31 x i8] c"streaming header too small: %d\00", align 1 @WalSegSz = common local_unnamed_addr global i32 0, align 4 @walfile = common local_unnamed_addr global ptr null, align 8 @.str.1 = private unnamed_addr constant [64 x i8] c"received write-ahead log record for offset %u with no file open\00", align 1 @.str.2 = private unnamed_addr constant [40 x i8] c"got WAL data offset %08x, expected %08x\00", align 1 @.str.3 = private unnamed_addr constant [46 x i8] c"could not write %u bytes to WAL file \22%s\22: %s\00", align 1 @current_walfile_name = common local_unnamed_addr global i32 0, align 4 @.str.4 = private unnamed_addr constant [35 x i8] c"could not send copy-end packet: %s\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @ProcessXLogDataMsg], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal noundef i32 @ProcessXLogDataMsg(ptr noundef %0, ptr noundef %1, ptr noundef %2, i32 noundef %3, ptr nocapture noundef %4) #0 { %6 = load i32, ptr @still_sending, align 4, !tbaa !6 %7 = icmp eq i32 %6, 0 br i1 %7, label %110, label %8 8: ; preds = %5 %9 = icmp slt i32 %3, 25 br i1 %9, label %10, label %12 10: ; preds = %8 %11 = tail call i32 (ptr, i32, ...) @pg_log_error(ptr noundef nonnull @.str, i32 noundef %3) #2 br label %110 12: ; preds = %8 %13 = getelementptr inbounds i8, ptr %2, i64 1 %14 = tail call i32 @fe_recvint64(ptr noundef nonnull %13) #2 store i32 %14, ptr %4, align 4, !tbaa !6 %15 = load i32, ptr @WalSegSz, align 4, !tbaa !6 %16 = tail call i32 @XLogSegmentOffset(i32 noundef %14, i32 noundef %15) #2 %17 = load ptr, ptr @walfile, align 8, !tbaa !10 %18 = icmp eq ptr %17, null br i1 %18, label %19, label %23 19: ; preds = %12 %20 = icmp eq i32 %16, 0 br i1 %20, label %35, label %21 21: ; preds = %19 %22 = tail call i32 (ptr, i32, ...) @pg_log_error(ptr noundef nonnull @.str.1, i32 noundef %16) #2 br label %110 23: ; preds = %12 %24 = getelementptr inbounds i8, ptr %1, i64 16 %25 = load ptr, ptr %24, align 8, !tbaa !12 %26 = load ptr, ptr %25, align 8, !tbaa !14 %27 = tail call i32 %26(ptr noundef nonnull %17) #2 %28 = icmp eq i32 %27, %16 br i1 %28, label %35, label %29 29: ; preds = %23 %30 = load ptr, ptr %24, align 8, !tbaa !12 %31 = load ptr, ptr %30, align 8, !tbaa !14 %32 = load ptr, ptr @walfile, align 8, !tbaa !10 %33 = tail call i32 %31(ptr noundef %32) #2 %34 = tail call i32 (ptr, i32, ...) @pg_log_error(ptr noundef nonnull @.str.2, i32 noundef %16, i32 noundef %33) #2 br label %110 35: ; preds = %23, %19 %36 = add nsw i32 %3, -25 %37 = icmp eq i32 %36, 0 br i1 %37, label %110, label %38 38: ; preds = %35 %39 = getelementptr inbounds i8, ptr %1, i64 16 %40 = getelementptr inbounds i8, ptr %2, i64 25 %41 = getelementptr inbounds i8, ptr %1, i64 8 br label %42 42: ; preds = %38, %107 %43 = phi i32 [ 0, %38 ], [ %76, %107 ] %44 = phi i32 [ %36, %38 ], [ %77, %107 ] %45 = phi i32 [ %16, %38 ], [ %108, %107 ] %46 = add nsw i32 %44, %45 %47 = load i32, ptr @WalSegSz, align 4, !tbaa !6 %48 = icmp sgt i32 %46, %47 %49 = sub nsw i32 %47, %45 %50 = select i1 %48, i32 %49, i32 %44 %51 = load ptr, ptr @walfile, align 8, !tbaa !10 %52 = icmp eq ptr %51, null br i1 %52, label %53, label %59 53: ; preds = %42 %54 = load i32, ptr %4, align 4, !tbaa !6 %55 = tail call i32 @open_walfile(ptr noundef %1, i32 noundef %54) #2 %56 = icmp eq i32 %55, 0 br i1 %56, label %110, label %57 57: ; preds = %53 %58 = load ptr, ptr @walfile, align 8, !tbaa !10 br label %59 59: ; preds = %57, %42 %60 = phi ptr [ %58, %57 ], [ %51, %42 ] %61 = load ptr, ptr %39, align 8, !tbaa !12 %62 = getelementptr inbounds i8, ptr %61, i64 8 %63 = load ptr, ptr %62, align 8, !tbaa !16 %64 = sext i32 %43 to i64 %65 = getelementptr inbounds i8, ptr %40, i64 %64 %66 = tail call i32 %63(ptr noundef %60, ptr noundef nonnull %65, i32 noundef %50) #2 %67 = icmp eq i32 %66, %50 br i1 %67, label %75, label %68 68: ; preds = %59 %69 = load i32, ptr @current_walfile_name, align 4, !tbaa !6 %70 = load ptr, ptr %39, align 8, !tbaa !12 %71 = getelementptr inbounds i8, ptr %70, i64 16 %72 = load ptr, ptr %71, align 8, !tbaa !17 %73 = tail call i32 %72() #2 %74 = tail call i32 (ptr, i32, ...) @pg_log_error(ptr noundef nonnull @.str.3, i32 noundef %50, i32 noundef %69, i32 noundef %73) #2 br label %110 75: ; preds = %59 %76 = add nsw i32 %50, %43 %77 = sub nsw i32 %44, %50 %78 = load i32, ptr %4, align 4, !tbaa !6 %79 = add nsw i32 %78, %50 store i32 %79, ptr %4, align 4, !tbaa !6 %80 = add nsw i32 %50, %45 %81 = load i32, ptr @WalSegSz, align 4, !tbaa !6 %82 = tail call i32 @XLogSegmentOffset(i32 noundef %79, i32 noundef %81) #2 %83 = icmp eq i32 %82, 0 br i1 %83, label %84, label %107 84: ; preds = %75 %85 = load i32, ptr %4, align 4, !tbaa !6 %86 = tail call i32 @close_walfile(ptr noundef nonnull %1, i32 noundef %85) #2 %87 = icmp eq i32 %86, 0 br i1 %87, label %110, label %88 88: ; preds = %84 %89 = load i32, ptr @still_sending, align 4, !tbaa !6 %90 = icmp eq i32 %89, 0 br i1 %90, label %107, label %91 91: ; preds = %88 %92 = load ptr, ptr %41, align 8, !tbaa !18 %93 = load i32, ptr %4, align 4, !tbaa !6 %94 = load i32, ptr %1, align 8, !tbaa !19 %95 = tail call i64 %92(i32 noundef %93, i32 noundef %94, i32 noundef 1) #2 %96 = icmp eq i64 %95, 0 br i1 %96, label %107, label %97 97: ; preds = %91 %98 = tail call i64 @PQputCopyEnd(ptr noundef %0, ptr noundef null) #2 %99 = icmp slt i64 %98, 1 br i1 %99, label %103, label %100 100: ; preds = %97 %101 = tail call i64 @PQflush(ptr noundef %0) #2 %102 = icmp eq i64 %101, 0 br i1 %102, label %106, label %103 103: ; preds = %100, %97 %104 = tail call i32 @PQerrorMessage(ptr noundef %0) #2 %105 = tail call i32 (ptr, i32, ...) @pg_log_error(ptr noundef nonnull @.str.4, i32 noundef %104) #2 br label %110 106: ; preds = %100 store i32 0, ptr @still_sending, align 4, !tbaa !6 br label %110 107: ; preds = %75, %91, %88 %108 = phi i32 [ 0, %91 ], [ 0, %88 ], [ %80, %75 ] %109 = icmp eq i32 %77, 0 br i1 %109, label %110, label %42, !llvm.loop !20 110: ; preds = %107, %53, %84, %35, %106, %103, %68, %5, %29, %21, %10 %111 = phi i32 [ 0, %10 ], [ 0, %21 ], [ 0, %29 ], [ 1, %5 ], [ 1, %106 ], [ 0, %103 ], [ 0, %68 ], [ 1, %35 ], [ 1, %107 ], [ 0, %53 ], [ 0, %84 ] ret i32 %111 } declare i32 @pg_log_error(ptr noundef, i32 noundef, ...) local_unnamed_addr #1 declare i32 @fe_recvint64(ptr noundef) local_unnamed_addr #1 declare i32 @XLogSegmentOffset(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @open_walfile(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @close_walfile(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i64 @PQputCopyEnd(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i64 @PQflush(ptr noundef) local_unnamed_addr #1 declare i32 @PQerrorMessage(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"any pointer", !8, i64 0} !12 = !{!13, !11, i64 16} !13 = !{!"TYPE_7__", !7, i64 0, !11, i64 8, !11, i64 16} !14 = !{!15, !11, i64 0} !15 = !{!"TYPE_6__", !11, i64 0, !11, i64 8, !11, i64 16} !16 = !{!15, !11, i64 8} !17 = !{!15, !11, i64 16} !18 = !{!13, !11, i64 8} !19 = !{!13, !7, i64 0} !20 = distinct !{!20, !21} !21 = !{!"llvm.loop.mustprogress"}
postgres_src_bin_pg_basebackup_extr_receivelog.c_ProcessXLogDataMsg
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/lpfc/extr_lpfc_sli.c_lpfc_sli_fp_intr_handler.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/lpfc/extr_lpfc_sli.c_lpfc_sli_fp_intr_handler.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.lpfc_hba = type { i64, i32, i32, i32, i32, %struct.TYPE_2__, i32, i32 } %struct.TYPE_2__ = type { ptr } @IRQ_NONE = dso_local local_unnamed_addr global i32 0, align 4 @MSIX = dso_local local_unnamed_addr global i64 0, align 8 @IRQ_HANDLED = dso_local local_unnamed_addr global i32 0, align 4 @DEFER_ERATT = dso_local local_unnamed_addr global i32 0, align 4 @HA_R0_CLR_MSK = dso_local local_unnamed_addr global i32 0, align 4 @HA_R1_CLR_MSK = dso_local local_unnamed_addr global i32 0, align 4 @HA_RXMASK = dso_local local_unnamed_addr global i32 0, align 4 @LPFC_FCP_RING = dso_local local_unnamed_addr global i32 0, align 4 @LPFC_EXTRA_RING = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local i32 @lpfc_sli_fp_intr_handler(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %4 = icmp eq ptr %1, null %5 = zext i1 %4 to i32 %6 = tail call i64 @unlikely(i32 noundef %5) #3 %7 = icmp eq i64 %6, 0 br i1 %7, label %8, label %91 8: ; preds = %2 %9 = load i64, ptr %1, align 8, !tbaa !5 %10 = load i64, ptr @MSIX, align 8, !tbaa !13 %11 = icmp eq i64 %9, %10 br i1 %11, label %12, label %42 12: ; preds = %8 %13 = tail call i64 @lpfc_intr_state_check(ptr noundef nonnull %1) #3 %14 = icmp eq i64 %13, 0 br i1 %14, label %15, label %91 15: ; preds = %12 %16 = getelementptr inbounds %struct.lpfc_hba, ptr %1, i64 0, i32 7 %17 = load i32, ptr %16, align 4, !tbaa !14 %18 = call i64 @lpfc_readl(i32 noundef %17, ptr noundef nonnull %3) #3 %19 = icmp eq i64 %18, 0 br i1 %19, label %20, label %91 20: ; preds = %15 %21 = getelementptr inbounds %struct.lpfc_hba, ptr %1, i64 0, i32 6 %22 = call i32 @spin_lock_irqsave(ptr noundef nonnull %21, i64 noundef undef) #3 %23 = getelementptr inbounds %struct.lpfc_hba, ptr %1, i64 0, i32 1 %24 = load i32, ptr %23, align 8, !tbaa !15 %25 = load i32, ptr @DEFER_ERATT, align 4, !tbaa !16 %26 = and i32 %25, %24 %27 = call i64 @unlikely(i32 noundef %26) #3 %28 = icmp eq i64 %27, 0 br i1 %28, label %31, label %29 29: ; preds = %20 %30 = call i32 @spin_unlock_irqrestore(ptr noundef nonnull %21, i64 noundef undef) #3 br label %91 31: ; preds = %20 %32 = load i32, ptr %3, align 4, !tbaa !16 %33 = load i32, ptr @HA_R0_CLR_MSK, align 4, !tbaa !16 %34 = load i32, ptr @HA_R1_CLR_MSK, align 4, !tbaa !16 %35 = or i32 %34, %33 %36 = and i32 %35, %32 %37 = load i32, ptr %16, align 4, !tbaa !14 %38 = call i32 @writel(i32 noundef %36, i32 noundef %37) #3 %39 = load i32, ptr %16, align 4, !tbaa !14 %40 = call i32 @readl(i32 noundef %39) #3 %41 = call i32 @spin_unlock_irqrestore(ptr noundef nonnull %21, i64 noundef undef) #3 br label %44 42: ; preds = %8 %43 = getelementptr inbounds %struct.lpfc_hba, ptr %1, i64 0, i32 2 br label %44 44: ; preds = %42, %31 %45 = phi ptr [ %43, %42 ], [ %3, %31 ] %46 = load i32, ptr %45, align 4, !tbaa !16 %47 = getelementptr inbounds %struct.lpfc_hba, ptr %1, i64 0, i32 3 %48 = load i32, ptr %47, align 8, !tbaa !17 %49 = xor i32 %48, -1 %50 = and i32 %46, %49 store i32 %50, ptr %3, align 4, !tbaa !16 %51 = load i32, ptr @HA_RXMASK, align 4, !tbaa !16 %52 = load i32, ptr @LPFC_FCP_RING, align 4, !tbaa !16 %53 = shl nsw i32 %52, 2 %54 = shl i32 %51, %53 %55 = and i32 %54, %50 %56 = sext i32 %55 to i64 %57 = zext nneg i32 %53 to i64 %58 = lshr i64 %56, %57 %59 = sext i32 %51 to i64 %60 = and i64 %58, %59 %61 = icmp eq i64 %60, 0 br i1 %61, label %68, label %62 62: ; preds = %44 %63 = getelementptr inbounds %struct.lpfc_hba, ptr %1, i64 0, i32 5 %64 = load ptr, ptr %63, align 8, !tbaa !18 %65 = sext i32 %52 to i64 %66 = getelementptr inbounds i32, ptr %64, i64 %65 %67 = call i32 @lpfc_sli_handle_fast_ring_event(ptr noundef nonnull %1, ptr noundef %66, i64 noundef %58) #3 br label %68 68: ; preds = %62, %44 %69 = getelementptr inbounds %struct.lpfc_hba, ptr %1, i64 0, i32 4 %70 = load i32, ptr %69, align 4, !tbaa !19 %71 = icmp eq i32 %70, 2 br i1 %71, label %72, label %91 72: ; preds = %68 %73 = load i32, ptr %3, align 4, !tbaa !16 %74 = load i32, ptr @HA_RXMASK, align 4, !tbaa !16 %75 = load i32, ptr @LPFC_EXTRA_RING, align 4, !tbaa !16 %76 = shl nsw i32 %75, 2 %77 = shl i32 %74, %76 %78 = and i32 %77, %73 %79 = sext i32 %78 to i64 %80 = zext nneg i32 %76 to i64 %81 = lshr i64 %79, %80 %82 = sext i32 %74 to i64 %83 = and i64 %81, %82 %84 = icmp eq i64 %83, 0 br i1 %84, label %91, label %85 85: ; preds = %72 %86 = getelementptr inbounds %struct.lpfc_hba, ptr %1, i64 0, i32 5 %87 = load ptr, ptr %86, align 8, !tbaa !18 %88 = sext i32 %75 to i64 %89 = getelementptr inbounds i32, ptr %87, i64 %88 %90 = call i32 @lpfc_sli_handle_fast_ring_event(ptr noundef nonnull %1, ptr noundef %89, i64 noundef %81) #3 br label %91 91: ; preds = %68, %85, %72, %15, %12, %2, %29 %92 = phi ptr [ @IRQ_NONE, %29 ], [ @IRQ_NONE, %2 ], [ @IRQ_NONE, %12 ], [ @IRQ_HANDLED, %15 ], [ @IRQ_HANDLED, %72 ], [ @IRQ_HANDLED, %85 ], [ @IRQ_HANDLED, %68 ] %93 = load i32, ptr %92, align 4, !tbaa !16 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 ret i32 %93 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i64 @unlikely(i32 noundef) local_unnamed_addr #2 declare i64 @lpfc_intr_state_check(ptr noundef) local_unnamed_addr #2 declare i64 @lpfc_readl(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #2 declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #2 declare i32 @writel(i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @readl(i32 noundef) local_unnamed_addr #2 declare i32 @lpfc_sli_handle_fast_ring_event(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"lpfc_hba", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !11, i64 24, !10, i64 32, !10, i64 36} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0} !11 = !{!"TYPE_2__", !12, i64 0} !12 = !{!"any pointer", !8, i64 0} !13 = !{!7, !7, i64 0} !14 = !{!6, !10, i64 36} !15 = !{!6, !10, i64 8} !16 = !{!10, !10, i64 0} !17 = !{!6, !10, i64 16} !18 = !{!6, !12, i64 24} !19 = !{!6, !10, i64 20}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/lpfc/extr_lpfc_sli.c_lpfc_sli_fp_intr_handler.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/lpfc/extr_lpfc_sli.c_lpfc_sli_fp_intr_handler.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @IRQ_NONE = common local_unnamed_addr global i32 0, align 4 @MSIX = common local_unnamed_addr global i64 0, align 8 @IRQ_HANDLED = common local_unnamed_addr global i32 0, align 4 @DEFER_ERATT = common local_unnamed_addr global i32 0, align 4 @HA_R0_CLR_MSK = common local_unnamed_addr global i32 0, align 4 @HA_R1_CLR_MSK = common local_unnamed_addr global i32 0, align 4 @HA_RXMASK = common local_unnamed_addr global i32 0, align 4 @LPFC_FCP_RING = common local_unnamed_addr global i32 0, align 4 @LPFC_EXTRA_RING = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @lpfc_sli_fp_intr_handler(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %4 = icmp eq ptr %1, null %5 = zext i1 %4 to i32 %6 = tail call i64 @unlikely(i32 noundef %5) #3 %7 = icmp eq i64 %6, 0 br i1 %7, label %8, label %91 8: ; preds = %2 %9 = load i64, ptr %1, align 8, !tbaa !6 %10 = load i64, ptr @MSIX, align 8, !tbaa !14 %11 = icmp eq i64 %9, %10 br i1 %11, label %12, label %42 12: ; preds = %8 %13 = tail call i64 @lpfc_intr_state_check(ptr noundef nonnull %1) #3 %14 = icmp eq i64 %13, 0 br i1 %14, label %15, label %91 15: ; preds = %12 %16 = getelementptr inbounds i8, ptr %1, i64 36 %17 = load i32, ptr %16, align 4, !tbaa !15 %18 = call i64 @lpfc_readl(i32 noundef %17, ptr noundef nonnull %3) #3 %19 = icmp eq i64 %18, 0 br i1 %19, label %20, label %91 20: ; preds = %15 %21 = getelementptr inbounds i8, ptr %1, i64 32 %22 = call i32 @spin_lock_irqsave(ptr noundef nonnull %21, i64 noundef undef) #3 %23 = getelementptr inbounds i8, ptr %1, i64 8 %24 = load i32, ptr %23, align 8, !tbaa !16 %25 = load i32, ptr @DEFER_ERATT, align 4, !tbaa !17 %26 = and i32 %25, %24 %27 = call i64 @unlikely(i32 noundef %26) #3 %28 = icmp eq i64 %27, 0 br i1 %28, label %31, label %29 29: ; preds = %20 %30 = call i32 @spin_unlock_irqrestore(ptr noundef nonnull %21, i64 noundef undef) #3 br label %91 31: ; preds = %20 %32 = load i32, ptr %3, align 4, !tbaa !17 %33 = load i32, ptr @HA_R0_CLR_MSK, align 4, !tbaa !17 %34 = load i32, ptr @HA_R1_CLR_MSK, align 4, !tbaa !17 %35 = or i32 %34, %33 %36 = and i32 %35, %32 %37 = load i32, ptr %16, align 4, !tbaa !15 %38 = call i32 @writel(i32 noundef %36, i32 noundef %37) #3 %39 = load i32, ptr %16, align 4, !tbaa !15 %40 = call i32 @readl(i32 noundef %39) #3 %41 = call i32 @spin_unlock_irqrestore(ptr noundef nonnull %21, i64 noundef undef) #3 br label %44 42: ; preds = %8 %43 = getelementptr inbounds i8, ptr %1, i64 12 br label %44 44: ; preds = %42, %31 %45 = phi ptr [ %43, %42 ], [ %3, %31 ] %46 = load i32, ptr %45, align 4, !tbaa !17 %47 = getelementptr inbounds i8, ptr %1, i64 16 %48 = load i32, ptr %47, align 8, !tbaa !18 %49 = xor i32 %48, -1 %50 = and i32 %46, %49 store i32 %50, ptr %3, align 4, !tbaa !17 %51 = load i32, ptr @HA_RXMASK, align 4, !tbaa !17 %52 = load i32, ptr @LPFC_FCP_RING, align 4, !tbaa !17 %53 = shl nsw i32 %52, 2 %54 = shl i32 %51, %53 %55 = and i32 %54, %50 %56 = sext i32 %55 to i64 %57 = zext nneg i32 %53 to i64 %58 = lshr i64 %56, %57 %59 = sext i32 %51 to i64 %60 = and i64 %58, %59 %61 = icmp eq i64 %60, 0 br i1 %61, label %68, label %62 62: ; preds = %44 %63 = getelementptr inbounds i8, ptr %1, i64 24 %64 = load ptr, ptr %63, align 8, !tbaa !19 %65 = sext i32 %52 to i64 %66 = getelementptr inbounds i32, ptr %64, i64 %65 %67 = call i32 @lpfc_sli_handle_fast_ring_event(ptr noundef nonnull %1, ptr noundef %66, i64 noundef %58) #3 br label %68 68: ; preds = %62, %44 %69 = getelementptr inbounds i8, ptr %1, i64 20 %70 = load i32, ptr %69, align 4, !tbaa !20 %71 = icmp eq i32 %70, 2 br i1 %71, label %72, label %91 72: ; preds = %68 %73 = load i32, ptr %3, align 4, !tbaa !17 %74 = load i32, ptr @HA_RXMASK, align 4, !tbaa !17 %75 = load i32, ptr @LPFC_EXTRA_RING, align 4, !tbaa !17 %76 = shl nsw i32 %75, 2 %77 = shl i32 %74, %76 %78 = and i32 %77, %73 %79 = sext i32 %78 to i64 %80 = zext nneg i32 %76 to i64 %81 = lshr i64 %79, %80 %82 = sext i32 %74 to i64 %83 = and i64 %81, %82 %84 = icmp eq i64 %83, 0 br i1 %84, label %91, label %85 85: ; preds = %72 %86 = getelementptr inbounds i8, ptr %1, i64 24 %87 = load ptr, ptr %86, align 8, !tbaa !19 %88 = sext i32 %75 to i64 %89 = getelementptr inbounds i32, ptr %87, i64 %88 %90 = call i32 @lpfc_sli_handle_fast_ring_event(ptr noundef nonnull %1, ptr noundef %89, i64 noundef %81) #3 br label %91 91: ; preds = %68, %85, %72, %15, %12, %2, %29 %92 = phi ptr [ @IRQ_NONE, %29 ], [ @IRQ_NONE, %2 ], [ @IRQ_NONE, %12 ], [ @IRQ_HANDLED, %15 ], [ @IRQ_HANDLED, %72 ], [ @IRQ_HANDLED, %85 ], [ @IRQ_HANDLED, %68 ] %93 = load i32, ptr %92, align 4, !tbaa !17 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 ret i32 %93 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i64 @unlikely(i32 noundef) local_unnamed_addr #2 declare i64 @lpfc_intr_state_check(ptr noundef) local_unnamed_addr #2 declare i64 @lpfc_readl(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #2 declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #2 declare i32 @writel(i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @readl(i32 noundef) local_unnamed_addr #2 declare i32 @lpfc_sli_handle_fast_ring_event(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"lpfc_hba", !8, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !12, i64 24, !11, i64 32, !11, i64 36} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"int", !9, i64 0} !12 = !{!"TYPE_2__", !13, i64 0} !13 = !{!"any pointer", !9, i64 0} !14 = !{!8, !8, i64 0} !15 = !{!7, !11, i64 36} !16 = !{!7, !11, i64 8} !17 = !{!11, !11, i64 0} !18 = !{!7, !11, i64 16} !19 = !{!7, !13, i64 24} !20 = !{!7, !11, i64 20}
fastsocket_kernel_drivers_scsi_lpfc_extr_lpfc_sli.c_lpfc_sli_fp_intr_handler
; ModuleID = 'AnghaBench/linux/arch/arm/common/extr_sa1111.c_sa1111_pll_clock.c' source_filename = "AnghaBench/linux/arch/arm/common/extr_sa1111.c_sa1111_pll_clock.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local i32 @sa1111_pll_clock(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call ptr @sa1111_chip_driver(ptr noundef %0) #2 %3 = tail call i32 @__sa1111_pll_clock(ptr noundef %2) #2 ret i32 %3 } declare ptr @sa1111_chip_driver(ptr noundef) local_unnamed_addr #1 declare i32 @__sa1111_pll_clock(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/linux/arch/arm/common/extr_sa1111.c_sa1111_pll_clock.c' source_filename = "AnghaBench/linux/arch/arm/common/extr_sa1111.c_sa1111_pll_clock.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define i32 @sa1111_pll_clock(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call ptr @sa1111_chip_driver(ptr noundef %0) #2 %3 = tail call i32 @__sa1111_pll_clock(ptr noundef %2) #2 ret i32 %3 } declare ptr @sa1111_chip_driver(ptr noundef) local_unnamed_addr #1 declare i32 @__sa1111_pll_clock(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
linux_arch_arm_common_extr_sa1111.c_sa1111_pll_clock
; ModuleID = 'AnghaBench/linux/drivers/misc/habanalabs/extr_sysfs.c_hard_reset_store.c' source_filename = "AnghaBench/linux/drivers/misc/habanalabs/extr_sysfs.c_hard_reset_store.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @EINVAL = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @hard_reset_store], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i64 @hard_reset_store(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2, i64 noundef %3) #0 { %5 = alloca i64, align 8 %6 = tail call ptr @dev_get_drvdata(ptr noundef %0) #3 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3 %7 = call i32 @kstrtoul(ptr noundef %2, i32 noundef 0, ptr noundef nonnull %5) #3 %8 = icmp eq i32 %7, 0 br i1 %8, label %12, label %9 9: ; preds = %4 %10 = load i64, ptr @EINVAL, align 8, !tbaa !5 %11 = sub i64 0, %10 br label %14 12: ; preds = %4 %13 = call i32 @hl_device_reset(ptr noundef %6, i32 noundef 1, i32 noundef 0) #3 br label %14 14: ; preds = %12, %9 %15 = phi i64 [ %11, %9 ], [ %3, %12 ] call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3 ret i64 %15 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #2 declare i32 @kstrtoul(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @hl_device_reset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/misc/habanalabs/extr_sysfs.c_hard_reset_store.c' source_filename = "AnghaBench/linux/drivers/misc/habanalabs/extr_sysfs.c_hard_reset_store.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EINVAL = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @hard_reset_store], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i64 @hard_reset_store(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2, i64 noundef %3) #0 { %5 = alloca i64, align 8 %6 = tail call ptr @dev_get_drvdata(ptr noundef %0) #3 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3 %7 = call i32 @kstrtoul(ptr noundef %2, i32 noundef 0, ptr noundef nonnull %5) #3 %8 = icmp eq i32 %7, 0 br i1 %8, label %12, label %9 9: ; preds = %4 %10 = load i64, ptr @EINVAL, align 8, !tbaa !6 %11 = sub i64 0, %10 br label %14 12: ; preds = %4 %13 = call i32 @hl_device_reset(ptr noundef %6, i32 noundef 1, i32 noundef 0) #3 br label %14 14: ; preds = %12, %9 %15 = phi i64 [ %11, %9 ], [ %3, %12 ] call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3 ret i64 %15 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #2 declare i32 @kstrtoul(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @hl_device_reset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_drivers_misc_habanalabs_extr_sysfs.c_hard_reset_store
; ModuleID = 'AnghaBench/nodemcu-firmware/app/sqlite3/extr_sqlite3.c_walIndexHdr.c' source_filename = "AnghaBench/nodemcu-firmware/app/sqlite3/extr_sqlite3.c_walIndexHdr.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_3__ = type { i64, ptr } @llvm.compiler.used = appending global [1 x ptr] [ptr @walIndexHdr], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal ptr @walIndexHdr(ptr nocapture noundef readonly %0) #0 { %2 = load i64, ptr %0, align 8, !tbaa !5 %3 = icmp sgt i64 %2, 0 br i1 %3, label %4, label %10 4: ; preds = %1 %5 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1 %6 = load ptr, ptr %5, align 8, !tbaa !11 %7 = load i64, ptr %6, align 8, !tbaa !12 %8 = icmp ne i64 %7, 0 %9 = zext i1 %8 to i32 br label %10 10: ; preds = %4, %1 %11 = phi i32 [ 0, %1 ], [ %9, %4 ] %12 = tail call i32 @assert(i32 noundef %11) #2 %13 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1 %14 = load ptr, ptr %13, align 8, !tbaa !11 %15 = load i64, ptr %14, align 8, !tbaa !12 %16 = inttoptr i64 %15 to ptr ret ptr %16 } declare i32 @assert(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!6, !10, i64 8} !12 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/nodemcu-firmware/app/sqlite3/extr_sqlite3.c_walIndexHdr.c' source_filename = "AnghaBench/nodemcu-firmware/app/sqlite3/extr_sqlite3.c_walIndexHdr.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @walIndexHdr], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal ptr @walIndexHdr(ptr nocapture noundef readonly %0) #0 { %2 = load i64, ptr %0, align 8, !tbaa !6 %3 = icmp sgt i64 %2, 0 br i1 %3, label %4, label %10 4: ; preds = %1 %5 = getelementptr inbounds i8, ptr %0, i64 8 %6 = load ptr, ptr %5, align 8, !tbaa !12 %7 = load i64, ptr %6, align 8, !tbaa !13 %8 = icmp ne i64 %7, 0 %9 = zext i1 %8 to i32 br label %10 10: ; preds = %4, %1 %11 = phi i32 [ 0, %1 ], [ %9, %4 ] %12 = tail call i32 @assert(i32 noundef %11) #2 %13 = getelementptr inbounds i8, ptr %0, i64 8 %14 = load ptr, ptr %13, align 8, !tbaa !12 %15 = load i64, ptr %14, align 8, !tbaa !13 %16 = inttoptr i64 %15 to ptr ret ptr %16 } declare i32 @assert(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!7, !11, i64 8} !13 = !{!8, !8, i64 0}
nodemcu-firmware_app_sqlite3_extr_sqlite3.c_walIndexHdr
; ModuleID = 'AnghaBench/linux/drivers/watchdog/extr_sprd_wdt.c_sprd_wdt_start.c' source_filename = "AnghaBench/linux/drivers/watchdog/extr_sprd_wdt.c_sprd_wdt_start.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.watchdog_device = type { i32, i32, i32 } @SPRD_WDT_CTRL = dso_local local_unnamed_addr global i64 0, align 8 @SPRD_WDT_CNT_EN_BIT = dso_local local_unnamed_addr global i32 0, align 4 @SPRD_WDT_INT_EN_BIT = dso_local local_unnamed_addr global i32 0, align 4 @SPRD_WDT_RST_EN_BIT = dso_local local_unnamed_addr global i32 0, align 4 @WDOG_HW_RUNNING = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @sprd_wdt_start], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @sprd_wdt_start(ptr noundef %0) #0 { %2 = tail call ptr @to_sprd_wdt(ptr noundef %0) #2 %3 = getelementptr inbounds %struct.watchdog_device, ptr %0, i64 0, i32 2 %4 = load i32, ptr %3, align 4, !tbaa !5 %5 = getelementptr inbounds %struct.watchdog_device, ptr %0, i64 0, i32 1 %6 = load i32, ptr %5, align 4, !tbaa !10 %7 = tail call i32 @sprd_wdt_load_value(ptr noundef %2, i32 noundef %4, i32 noundef %6) #2 %8 = icmp eq i32 %7, 0 br i1 %8, label %9, label %30 9: ; preds = %1 %10 = load i64, ptr %2, align 8, !tbaa !11 %11 = tail call i32 @sprd_wdt_unlock(i64 noundef %10) #2 %12 = load i64, ptr %2, align 8, !tbaa !11 %13 = load i64, ptr @SPRD_WDT_CTRL, align 8, !tbaa !14 %14 = add nsw i64 %13, %12 %15 = tail call i32 @readl_relaxed(i64 noundef %14) #2 %16 = load i32, ptr @SPRD_WDT_CNT_EN_BIT, align 4, !tbaa !15 %17 = load i32, ptr @SPRD_WDT_INT_EN_BIT, align 4, !tbaa !15 %18 = load i32, ptr @SPRD_WDT_RST_EN_BIT, align 4, !tbaa !15 %19 = or i32 %16, %15 %20 = or i32 %19, %17 %21 = or i32 %20, %18 %22 = load i64, ptr %2, align 8, !tbaa !11 %23 = load i64, ptr @SPRD_WDT_CTRL, align 8, !tbaa !14 %24 = add nsw i64 %23, %22 %25 = tail call i32 @writel_relaxed(i32 noundef %21, i64 noundef %24) #2 %26 = load i64, ptr %2, align 8, !tbaa !11 %27 = tail call i32 @sprd_wdt_lock(i64 noundef %26) #2 %28 = load i32, ptr @WDOG_HW_RUNNING, align 4, !tbaa !15 %29 = tail call i32 @set_bit(i32 noundef %28, ptr noundef nonnull %0) #2 br label %30 30: ; preds = %1, %9 ret i32 %7 } declare ptr @to_sprd_wdt(ptr noundef) local_unnamed_addr #1 declare i32 @sprd_wdt_load_value(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sprd_wdt_unlock(i64 noundef) local_unnamed_addr #1 declare i32 @readl_relaxed(i64 noundef) local_unnamed_addr #1 declare i32 @writel_relaxed(i32 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @sprd_wdt_lock(i64 noundef) local_unnamed_addr #1 declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 8} !6 = !{!"watchdog_device", !7, i64 0, !7, i64 4, !7, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!6, !7, i64 4} !11 = !{!12, !13, i64 0} !12 = !{!"sprd_wdt", !13, i64 0} !13 = !{!"long", !8, i64 0} !14 = !{!13, !13, i64 0} !15 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/watchdog/extr_sprd_wdt.c_sprd_wdt_start.c' source_filename = "AnghaBench/linux/drivers/watchdog/extr_sprd_wdt.c_sprd_wdt_start.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SPRD_WDT_CTRL = common local_unnamed_addr global i64 0, align 8 @SPRD_WDT_CNT_EN_BIT = common local_unnamed_addr global i32 0, align 4 @SPRD_WDT_INT_EN_BIT = common local_unnamed_addr global i32 0, align 4 @SPRD_WDT_RST_EN_BIT = common local_unnamed_addr global i32 0, align 4 @WDOG_HW_RUNNING = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @sprd_wdt_start], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @sprd_wdt_start(ptr noundef %0) #0 { %2 = tail call ptr @to_sprd_wdt(ptr noundef %0) #2 %3 = getelementptr inbounds i8, ptr %0, i64 8 %4 = load i32, ptr %3, align 4, !tbaa !6 %5 = getelementptr inbounds i8, ptr %0, i64 4 %6 = load i32, ptr %5, align 4, !tbaa !11 %7 = tail call i32 @sprd_wdt_load_value(ptr noundef %2, i32 noundef %4, i32 noundef %6) #2 %8 = icmp eq i32 %7, 0 br i1 %8, label %9, label %30 9: ; preds = %1 %10 = load i64, ptr %2, align 8, !tbaa !12 %11 = tail call i32 @sprd_wdt_unlock(i64 noundef %10) #2 %12 = load i64, ptr %2, align 8, !tbaa !12 %13 = load i64, ptr @SPRD_WDT_CTRL, align 8, !tbaa !15 %14 = add nsw i64 %13, %12 %15 = tail call i32 @readl_relaxed(i64 noundef %14) #2 %16 = load i32, ptr @SPRD_WDT_CNT_EN_BIT, align 4, !tbaa !16 %17 = load i32, ptr @SPRD_WDT_INT_EN_BIT, align 4, !tbaa !16 %18 = load i32, ptr @SPRD_WDT_RST_EN_BIT, align 4, !tbaa !16 %19 = or i32 %16, %15 %20 = or i32 %19, %17 %21 = or i32 %20, %18 %22 = load i64, ptr %2, align 8, !tbaa !12 %23 = load i64, ptr @SPRD_WDT_CTRL, align 8, !tbaa !15 %24 = add nsw i64 %23, %22 %25 = tail call i32 @writel_relaxed(i32 noundef %21, i64 noundef %24) #2 %26 = load i64, ptr %2, align 8, !tbaa !12 %27 = tail call i32 @sprd_wdt_lock(i64 noundef %26) #2 %28 = load i32, ptr @WDOG_HW_RUNNING, align 4, !tbaa !16 %29 = tail call i32 @set_bit(i32 noundef %28, ptr noundef nonnull %0) #2 br label %30 30: ; preds = %1, %9 ret i32 %7 } declare ptr @to_sprd_wdt(ptr noundef) local_unnamed_addr #1 declare i32 @sprd_wdt_load_value(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sprd_wdt_unlock(i64 noundef) local_unnamed_addr #1 declare i32 @readl_relaxed(i64 noundef) local_unnamed_addr #1 declare i32 @writel_relaxed(i32 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @sprd_wdt_lock(i64 noundef) local_unnamed_addr #1 declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 8} !7 = !{!"watchdog_device", !8, i64 0, !8, i64 4, !8, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!7, !8, i64 4} !12 = !{!13, !14, i64 0} !13 = !{!"sprd_wdt", !14, i64 0} !14 = !{!"long", !9, i64 0} !15 = !{!14, !14, i64 0} !16 = !{!8, !8, i64 0}
linux_drivers_watchdog_extr_sprd_wdt.c_sprd_wdt_start
; ModuleID = 'AnghaBench/freebsd/contrib/dtc/libfdt/extr_libfdt.h_fdt_setprop_inplace_u32.c' source_filename = "AnghaBench/freebsd/contrib/dtc/libfdt/extr_libfdt.h_fdt_setprop_inplace_u32.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @fdt_setprop_inplace_u32], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal i32 @fdt_setprop_inplace_u32(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #0 { %5 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3 %6 = tail call i32 @cpu_to_fdt32(i32 noundef %3) #3 store i32 %6, ptr %5, align 4, !tbaa !5 %7 = call i32 @fdt_setprop_inplace(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef nonnull %5, i32 noundef 4) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3 ret i32 %7 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @cpu_to_fdt32(i32 noundef) local_unnamed_addr #2 declare i32 @fdt_setprop_inplace(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/freebsd/contrib/dtc/libfdt/extr_libfdt.h_fdt_setprop_inplace_u32.c' source_filename = "AnghaBench/freebsd/contrib/dtc/libfdt/extr_libfdt.h_fdt_setprop_inplace_u32.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @fdt_setprop_inplace_u32], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal i32 @fdt_setprop_inplace_u32(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3) #0 { %5 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3 %6 = tail call i32 @cpu_to_fdt32(i32 noundef %3) #3 store i32 %6, ptr %5, align 4, !tbaa !6 %7 = call i32 @fdt_setprop_inplace(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef nonnull %5, i32 noundef 4) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3 ret i32 %7 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @cpu_to_fdt32(i32 noundef) local_unnamed_addr #2 declare i32 @fdt_setprop_inplace(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
freebsd_contrib_dtc_libfdt_extr_libfdt.h_fdt_setprop_inplace_u32
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/vm/extr_vm_user.c_vm_map_get_phys_page.c' source_filename = "AnghaBench/darwin-xnu/osfmk/vm/extr_vm_user.c_vm_map_get_phys_page.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_13__ = type { i32, i64 } %struct.TYPE_12__ = type { i32, ptr, i64 } @PAGE_MASK = dso_local local_unnamed_addr global i32 0, align 4 @VM_OBJECT_NULL = dso_local local_unnamed_addr global ptr null, align 8 @VM_PROT_NONE = dso_local local_unnamed_addr global i32 0, align 4 @FALSE = dso_local local_unnamed_addr global i32 0, align 4 @VM_KERN_MEMORY_NONE = dso_local local_unnamed_addr global i32 0, align 4 @THREAD_UNINT = dso_local local_unnamed_addr global i32 0, align 4 @PAGE_SHIFT = dso_local local_unnamed_addr global i32 0, align 4 @TRUE = dso_local local_unnamed_addr global i64 0, align 8 @VM_PAGE_NULL = dso_local local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind uwtable define dso_local i64 @vm_map_get_phys_page(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 { %3 = alloca ptr, align 8 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3 %4 = load i32, ptr @PAGE_MASK, align 4, !tbaa !5 %5 = tail call i32 @vm_map_trunc_page(i32 noundef %1, i32 noundef %4) #3 %6 = tail call i32 @vm_map_lock(i32 noundef %0) #3 %7 = call i64 @vm_map_lookup_entry(i32 noundef %0, i32 noundef %5, ptr noundef nonnull %3) #3 %8 = icmp eq i64 %7, 0 br i1 %8, label %103, label %9 9: ; preds = %2, %22 %10 = phi i32 [ %26, %22 ], [ %0, %2 ] %11 = phi i32 [ %32, %22 ], [ %5, %2 ] br label %12 12: ; preds = %9, %46 %13 = load ptr, ptr %3, align 8, !tbaa !9 %14 = call ptr @VME_OBJECT(ptr noundef %13) #3 %15 = load ptr, ptr @VM_OBJECT_NULL, align 8, !tbaa !9 %16 = icmp eq ptr %14, %15 br i1 %16, label %103, label %17 17: ; preds = %12 %18 = load ptr, ptr %3, align 8, !tbaa !9 %19 = getelementptr inbounds %struct.TYPE_13__, ptr %18, i64 0, i32 1 %20 = load i64, ptr %19, align 8, !tbaa !11 %21 = icmp eq i64 %20, 0 br i1 %21, label %36, label %22 22: ; preds = %17 %23 = call i32 @VME_SUBMAP(ptr noundef nonnull %18) #3 %24 = call i32 @vm_map_lock(i32 noundef %23) #3 %25 = load ptr, ptr %3, align 8, !tbaa !9 %26 = call i32 @VME_SUBMAP(ptr noundef %25) #3 %27 = load ptr, ptr %3, align 8, !tbaa !9 %28 = call i32 @VME_OFFSET(ptr noundef %27) #3 %29 = load ptr, ptr %3, align 8, !tbaa !9 %30 = load i32, ptr %29, align 8, !tbaa !14 %31 = add i32 %28, %11 %32 = sub i32 %31, %30 %33 = call i32 @vm_map_unlock(i32 noundef %10) #3 %34 = call i64 @vm_map_lookup_entry(i32 noundef %26, i32 noundef %32, ptr noundef nonnull %3) #3 %35 = icmp eq i64 %34, 0 br i1 %35, label %103, label %9 36: ; preds = %17 %37 = call ptr @VME_OBJECT(ptr noundef nonnull %18) #3 %38 = getelementptr inbounds %struct.TYPE_12__, ptr %37, i64 0, i32 2 %39 = load i64, ptr %38, align 8, !tbaa !15 %40 = icmp eq i64 %39, 0 %41 = load ptr, ptr %3, align 8, !tbaa !9 br i1 %40, label %69, label %42 42: ; preds = %36 %43 = call ptr @VME_OBJECT(ptr noundef %41) #3 %44 = load i32, ptr %43, align 8, !tbaa !17 %45 = icmp eq i32 %44, 0 br i1 %45, label %46, label %56 46: ; preds = %42 %47 = call i32 @vm_map_unlock(i32 noundef %10) #3 %48 = load i32, ptr @VM_PROT_NONE, align 4, !tbaa !5 %49 = load i32, ptr @FALSE, align 4, !tbaa !5 %50 = load i32, ptr @VM_KERN_MEMORY_NONE, align 4, !tbaa !5 %51 = load i32, ptr @THREAD_UNINT, align 4, !tbaa !5 %52 = call i32 @vm_fault(i32 noundef %10, i32 noundef %11, i32 noundef %48, i32 noundef %49, i32 noundef %50, i32 noundef %51, ptr noundef null, i32 noundef 0) #3 %53 = call i32 @vm_map_lock(i32 noundef %10) #3 %54 = call i64 @vm_map_lookup_entry(i32 noundef %10, i32 noundef %11, ptr noundef nonnull %3) #3 %55 = icmp eq i64 %54, 0 br i1 %55, label %103, label %12, !llvm.loop !18 56: ; preds = %42 %57 = load ptr, ptr %3, align 8, !tbaa !9 %58 = call i32 @VME_OFFSET(ptr noundef %57) #3 %59 = load ptr, ptr %3, align 8, !tbaa !9 %60 = load i32, ptr %59, align 8, !tbaa !14 %61 = call ptr @VME_OBJECT(ptr noundef nonnull %59) #3 %62 = load i32, ptr %61, align 8, !tbaa !17 %63 = add i32 %58, %11 %64 = sub i32 %63, %60 %65 = add nsw i32 %64, %62 %66 = load i32, ptr @PAGE_SHIFT, align 4, !tbaa !5 %67 = ashr i32 %65, %66 %68 = sext i32 %67 to i64 br label %103 69: ; preds = %36 %70 = call i32 @VME_OFFSET(ptr noundef %41) #3 %71 = load ptr, ptr %3, align 8, !tbaa !9 %72 = load i32, ptr %71, align 8, !tbaa !14 %73 = call ptr @VME_OBJECT(ptr noundef nonnull %71) #3 %74 = call i32 @vm_object_lock(ptr noundef %73) #3 %75 = load i64, ptr @TRUE, align 8, !tbaa !20 %76 = icmp eq i64 %75, 0 br i1 %76, label %103, label %77 77: ; preds = %69 %78 = add i32 %70, %11 %79 = sub i32 %78, %72 br label %80 80: ; preds = %77, %95 %81 = phi i32 [ %98, %95 ], [ %79, %77 ] %82 = phi ptr [ %99, %95 ], [ %73, %77 ] %83 = call i64 @vm_page_lookup(ptr noundef %82, i32 noundef %81) #3 %84 = load i64, ptr @VM_PAGE_NULL, align 8, !tbaa !20 %85 = icmp eq i64 %83, %84 br i1 %85, label %86, label %92 86: ; preds = %80 %87 = getelementptr inbounds %struct.TYPE_12__, ptr %82, i64 0, i32 1 %88 = load ptr, ptr %87, align 8, !tbaa !21 %89 = icmp eq ptr %88, null br i1 %89, label %90, label %95 90: ; preds = %86 %91 = call i32 @vm_object_unlock(ptr noundef nonnull %82) #3 br label %103 92: ; preds = %80 %93 = call i64 @VM_PAGE_GET_PHYS_PAGE(i64 noundef %83) #3 %94 = call i32 @vm_object_unlock(ptr noundef %82) #3 br label %103 95: ; preds = %86 %96 = call i32 @vm_object_lock(ptr noundef nonnull %88) #3 %97 = load i32, ptr %82, align 8, !tbaa !17 %98 = add nsw i32 %97, %81 %99 = load ptr, ptr %87, align 8, !tbaa !21 %100 = call i32 @vm_object_unlock(ptr noundef nonnull %82) #3 %101 = load i64, ptr @TRUE, align 8, !tbaa !20 %102 = icmp eq i64 %101, 0 br i1 %102, label %103, label %80 103: ; preds = %22, %46, %12, %95, %56, %90, %92, %69, %2 %104 = phi i32 [ %10, %56 ], [ %10, %92 ], [ %10, %90 ], [ %10, %69 ], [ %0, %2 ], [ %10, %95 ], [ %10, %12 ], [ %10, %46 ], [ %26, %22 ] %105 = phi i64 [ %68, %56 ], [ %93, %92 ], [ 0, %90 ], [ 0, %69 ], [ 0, %2 ], [ 0, %95 ], [ 0, %12 ], [ 0, %46 ], [ 0, %22 ] %106 = call i32 @vm_map_unlock(i32 noundef %104) #3 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3 ret i64 %105 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @vm_map_trunc_page(i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @vm_map_lock(i32 noundef) local_unnamed_addr #2 declare i64 @vm_map_lookup_entry(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare ptr @VME_OBJECT(ptr noundef) local_unnamed_addr #2 declare i32 @vm_map_unlock(i32 noundef) local_unnamed_addr #2 declare i32 @VME_SUBMAP(ptr noundef) local_unnamed_addr #2 declare i32 @VME_OFFSET(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 declare i32 @vm_fault(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @vm_object_lock(ptr noundef) local_unnamed_addr #2 declare i64 @vm_page_lookup(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @vm_object_unlock(ptr noundef) local_unnamed_addr #2 declare i64 @VM_PAGE_GET_PHYS_PAGE(i64 noundef) local_unnamed_addr #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"any pointer", !7, i64 0} !11 = !{!12, !13, i64 8} !12 = !{!"TYPE_13__", !6, i64 0, !13, i64 8} !13 = !{!"long", !7, i64 0} !14 = !{!12, !6, i64 0} !15 = !{!16, !13, i64 16} !16 = !{!"TYPE_12__", !6, i64 0, !10, i64 8, !13, i64 16} !17 = !{!16, !6, i64 0} !18 = distinct !{!18, !19} !19 = !{!"llvm.loop.mustprogress"} !20 = !{!13, !13, i64 0} !21 = !{!16, !10, i64 8}
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/vm/extr_vm_user.c_vm_map_get_phys_page.c' source_filename = "AnghaBench/darwin-xnu/osfmk/vm/extr_vm_user.c_vm_map_get_phys_page.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @PAGE_MASK = common local_unnamed_addr global i32 0, align 4 @VM_OBJECT_NULL = common local_unnamed_addr global ptr null, align 8 @VM_PROT_NONE = common local_unnamed_addr global i32 0, align 4 @FALSE = common local_unnamed_addr global i32 0, align 4 @VM_KERN_MEMORY_NONE = common local_unnamed_addr global i32 0, align 4 @THREAD_UNINT = common local_unnamed_addr global i32 0, align 4 @PAGE_SHIFT = common local_unnamed_addr global i32 0, align 4 @TRUE = common local_unnamed_addr global i64 0, align 8 @VM_PAGE_NULL = common local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind ssp uwtable(sync) define i64 @vm_map_get_phys_page(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 { %3 = alloca ptr, align 8 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3 %4 = load i32, ptr @PAGE_MASK, align 4, !tbaa !6 %5 = tail call i32 @vm_map_trunc_page(i32 noundef %1, i32 noundef %4) #3 %6 = tail call i32 @vm_map_lock(i32 noundef %0) #3 %7 = call i64 @vm_map_lookup_entry(i32 noundef %0, i32 noundef %5, ptr noundef nonnull %3) #3 %8 = icmp eq i64 %7, 0 br i1 %8, label %103, label %9 9: ; preds = %2, %22 %10 = phi i32 [ %26, %22 ], [ %0, %2 ] %11 = phi i32 [ %32, %22 ], [ %5, %2 ] br label %12 12: ; preds = %9, %46 %13 = load ptr, ptr %3, align 8, !tbaa !10 %14 = call ptr @VME_OBJECT(ptr noundef %13) #3 %15 = load ptr, ptr @VM_OBJECT_NULL, align 8, !tbaa !10 %16 = icmp eq ptr %14, %15 br i1 %16, label %103, label %17 17: ; preds = %12 %18 = load ptr, ptr %3, align 8, !tbaa !10 %19 = getelementptr inbounds i8, ptr %18, i64 8 %20 = load i64, ptr %19, align 8, !tbaa !12 %21 = icmp eq i64 %20, 0 br i1 %21, label %36, label %22 22: ; preds = %17 %23 = call i32 @VME_SUBMAP(ptr noundef nonnull %18) #3 %24 = call i32 @vm_map_lock(i32 noundef %23) #3 %25 = load ptr, ptr %3, align 8, !tbaa !10 %26 = call i32 @VME_SUBMAP(ptr noundef %25) #3 %27 = load ptr, ptr %3, align 8, !tbaa !10 %28 = call i32 @VME_OFFSET(ptr noundef %27) #3 %29 = load ptr, ptr %3, align 8, !tbaa !10 %30 = load i32, ptr %29, align 8, !tbaa !15 %31 = add i32 %28, %11 %32 = sub i32 %31, %30 %33 = call i32 @vm_map_unlock(i32 noundef %10) #3 %34 = call i64 @vm_map_lookup_entry(i32 noundef %26, i32 noundef %32, ptr noundef nonnull %3) #3 %35 = icmp eq i64 %34, 0 br i1 %35, label %103, label %9 36: ; preds = %17 %37 = call ptr @VME_OBJECT(ptr noundef nonnull %18) #3 %38 = getelementptr inbounds i8, ptr %37, i64 16 %39 = load i64, ptr %38, align 8, !tbaa !16 %40 = icmp eq i64 %39, 0 %41 = load ptr, ptr %3, align 8, !tbaa !10 br i1 %40, label %69, label %42 42: ; preds = %36 %43 = call ptr @VME_OBJECT(ptr noundef %41) #3 %44 = load i32, ptr %43, align 8, !tbaa !18 %45 = icmp eq i32 %44, 0 br i1 %45, label %46, label %56 46: ; preds = %42 %47 = call i32 @vm_map_unlock(i32 noundef %10) #3 %48 = load i32, ptr @VM_PROT_NONE, align 4, !tbaa !6 %49 = load i32, ptr @FALSE, align 4, !tbaa !6 %50 = load i32, ptr @VM_KERN_MEMORY_NONE, align 4, !tbaa !6 %51 = load i32, ptr @THREAD_UNINT, align 4, !tbaa !6 %52 = call i32 @vm_fault(i32 noundef %10, i32 noundef %11, i32 noundef %48, i32 noundef %49, i32 noundef %50, i32 noundef %51, ptr noundef null, i32 noundef 0) #3 %53 = call i32 @vm_map_lock(i32 noundef %10) #3 %54 = call i64 @vm_map_lookup_entry(i32 noundef %10, i32 noundef %11, ptr noundef nonnull %3) #3 %55 = icmp eq i64 %54, 0 br i1 %55, label %103, label %12, !llvm.loop !19 56: ; preds = %42 %57 = load ptr, ptr %3, align 8, !tbaa !10 %58 = call i32 @VME_OFFSET(ptr noundef %57) #3 %59 = load ptr, ptr %3, align 8, !tbaa !10 %60 = load i32, ptr %59, align 8, !tbaa !15 %61 = call ptr @VME_OBJECT(ptr noundef nonnull %59) #3 %62 = load i32, ptr %61, align 8, !tbaa !18 %63 = add i32 %58, %11 %64 = sub i32 %63, %60 %65 = add nsw i32 %64, %62 %66 = load i32, ptr @PAGE_SHIFT, align 4, !tbaa !6 %67 = ashr i32 %65, %66 %68 = sext i32 %67 to i64 br label %103 69: ; preds = %36 %70 = call i32 @VME_OFFSET(ptr noundef %41) #3 %71 = load ptr, ptr %3, align 8, !tbaa !10 %72 = load i32, ptr %71, align 8, !tbaa !15 %73 = call ptr @VME_OBJECT(ptr noundef nonnull %71) #3 %74 = call i32 @vm_object_lock(ptr noundef %73) #3 %75 = load i64, ptr @TRUE, align 8, !tbaa !21 %76 = icmp eq i64 %75, 0 br i1 %76, label %103, label %77 77: ; preds = %69 %78 = add i32 %70, %11 %79 = sub i32 %78, %72 br label %80 80: ; preds = %77, %95 %81 = phi i32 [ %98, %95 ], [ %79, %77 ] %82 = phi ptr [ %99, %95 ], [ %73, %77 ] %83 = call i64 @vm_page_lookup(ptr noundef %82, i32 noundef %81) #3 %84 = load i64, ptr @VM_PAGE_NULL, align 8, !tbaa !21 %85 = icmp eq i64 %83, %84 br i1 %85, label %86, label %92 86: ; preds = %80 %87 = getelementptr inbounds i8, ptr %82, i64 8 %88 = load ptr, ptr %87, align 8, !tbaa !22 %89 = icmp eq ptr %88, null br i1 %89, label %90, label %95 90: ; preds = %86 %91 = call i32 @vm_object_unlock(ptr noundef nonnull %82) #3 br label %103 92: ; preds = %80 %93 = call i64 @VM_PAGE_GET_PHYS_PAGE(i64 noundef %83) #3 %94 = call i32 @vm_object_unlock(ptr noundef %82) #3 br label %103 95: ; preds = %86 %96 = call i32 @vm_object_lock(ptr noundef nonnull %88) #3 %97 = load i32, ptr %82, align 8, !tbaa !18 %98 = add nsw i32 %97, %81 %99 = load ptr, ptr %87, align 8, !tbaa !22 %100 = call i32 @vm_object_unlock(ptr noundef nonnull %82) #3 %101 = load i64, ptr @TRUE, align 8, !tbaa !21 %102 = icmp eq i64 %101, 0 br i1 %102, label %103, label %80 103: ; preds = %22, %46, %12, %95, %56, %90, %92, %69, %2 %104 = phi i32 [ %10, %56 ], [ %10, %92 ], [ %10, %90 ], [ %10, %69 ], [ %0, %2 ], [ %10, %95 ], [ %10, %12 ], [ %10, %46 ], [ %26, %22 ] %105 = phi i64 [ %68, %56 ], [ %93, %92 ], [ 0, %90 ], [ 0, %69 ], [ 0, %2 ], [ 0, %95 ], [ 0, %12 ], [ 0, %46 ], [ 0, %22 ] %106 = call i32 @vm_map_unlock(i32 noundef %104) #3 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3 ret i64 %105 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @vm_map_trunc_page(i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @vm_map_lock(i32 noundef) local_unnamed_addr #2 declare i64 @vm_map_lookup_entry(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare ptr @VME_OBJECT(ptr noundef) local_unnamed_addr #2 declare i32 @vm_map_unlock(i32 noundef) local_unnamed_addr #2 declare i32 @VME_SUBMAP(ptr noundef) local_unnamed_addr #2 declare i32 @VME_OFFSET(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 declare i32 @vm_fault(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @vm_object_lock(ptr noundef) local_unnamed_addr #2 declare i64 @vm_page_lookup(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @vm_object_unlock(ptr noundef) local_unnamed_addr #2 declare i64 @VM_PAGE_GET_PHYS_PAGE(i64 noundef) local_unnamed_addr #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"any pointer", !8, i64 0} !12 = !{!13, !14, i64 8} !13 = !{!"TYPE_13__", !7, i64 0, !14, i64 8} !14 = !{!"long", !8, i64 0} !15 = !{!13, !7, i64 0} !16 = !{!17, !14, i64 16} !17 = !{!"TYPE_12__", !7, i64 0, !11, i64 8, !14, i64 16} !18 = !{!17, !7, i64 0} !19 = distinct !{!19, !20} !20 = !{!"llvm.loop.mustprogress"} !21 = !{!14, !14, i64 0} !22 = !{!17, !11, i64 8}
darwin-xnu_osfmk_vm_extr_vm_user.c_vm_map_get_phys_page
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_except.c_gen_eh_region_allowed.c' source_filename = "AnghaBench/freebsd/contrib/gcc/extr_except.c_gen_eh_region_allowed.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @ERT_ALLOWED_EXCEPTIONS = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local noundef ptr @gen_eh_region_allowed(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 { %3 = load i32, ptr @ERT_ALLOWED_EXCEPTIONS, align 4, !tbaa !5 %4 = tail call ptr @gen_eh_region(i32 noundef %3, ptr noundef %0) #2 store i64 %1, ptr %4, align 8, !tbaa !9 %5 = icmp eq i64 %1, 0 br i1 %5, label %12, label %6 6: ; preds = %2, %6 %7 = phi i64 [ %10, %6 ], [ %1, %2 ] %8 = tail call i32 @TREE_VALUE(i64 noundef %7) #2 %9 = tail call i32 @add_type_for_runtime(i32 noundef %8) #2 %10 = tail call i64 @TREE_CHAIN(i64 noundef %7) #2 %11 = icmp eq i64 %10, 0 br i1 %11, label %12, label %6, !llvm.loop !14 12: ; preds = %6, %2 ret ptr %4 } declare ptr @gen_eh_region(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @add_type_for_runtime(i32 noundef) local_unnamed_addr #1 declare i32 @TREE_VALUE(i64 noundef) local_unnamed_addr #1 declare i64 @TREE_CHAIN(i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !13, i64 0} !10 = !{!"eh_region", !11, i64 0} !11 = !{!"TYPE_4__", !12, i64 0} !12 = !{!"TYPE_3__", !13, i64 0} !13 = !{!"long", !7, i64 0} !14 = distinct !{!14, !15} !15 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_except.c_gen_eh_region_allowed.c' source_filename = "AnghaBench/freebsd/contrib/gcc/extr_except.c_gen_eh_region_allowed.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @ERT_ALLOWED_EXCEPTIONS = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define noundef ptr @gen_eh_region_allowed(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 { %3 = load i32, ptr @ERT_ALLOWED_EXCEPTIONS, align 4, !tbaa !6 %4 = tail call ptr @gen_eh_region(i32 noundef %3, ptr noundef %0) #2 store i64 %1, ptr %4, align 8, !tbaa !10 %5 = icmp eq i64 %1, 0 br i1 %5, label %12, label %6 6: ; preds = %2, %6 %7 = phi i64 [ %10, %6 ], [ %1, %2 ] %8 = tail call i32 @TREE_VALUE(i64 noundef %7) #2 %9 = tail call i32 @add_type_for_runtime(i32 noundef %8) #2 %10 = tail call i64 @TREE_CHAIN(i64 noundef %7) #2 %11 = icmp eq i64 %10, 0 br i1 %11, label %12, label %6, !llvm.loop !15 12: ; preds = %6, %2 ret ptr %4 } declare ptr @gen_eh_region(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @add_type_for_runtime(i32 noundef) local_unnamed_addr #1 declare i32 @TREE_VALUE(i64 noundef) local_unnamed_addr #1 declare i64 @TREE_CHAIN(i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !14, i64 0} !11 = !{!"eh_region", !12, i64 0} !12 = !{!"TYPE_4__", !13, i64 0} !13 = !{!"TYPE_3__", !14, i64 0} !14 = !{!"long", !8, i64 0} !15 = distinct !{!15, !16} !16 = !{!"llvm.loop.mustprogress"}
freebsd_contrib_gcc_extr_except.c_gen_eh_region_allowed
; ModuleID = 'AnghaBench/linux/kernel/extr_module.c___module_text_address.c' source_filename = "AnghaBench/linux/kernel/extr_module.c___module_text_address.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.module = type { %struct.TYPE_4__, %struct.TYPE_3__ } %struct.TYPE_4__ = type { i32, i32 } %struct.TYPE_3__ = type { i32, i32 } ; Function Attrs: nounwind uwtable define dso_local ptr @__module_text_address(i64 noundef %0) local_unnamed_addr #0 { %2 = tail call ptr @__module_address(i64 noundef %0) #2 %3 = icmp eq ptr %2, null br i1 %3, label %18, label %4 4: ; preds = %1 %5 = getelementptr inbounds %struct.module, ptr %2, i64 0, i32 1 %6 = getelementptr inbounds %struct.module, ptr %2, i64 0, i32 1, i32 1 %7 = load i32, ptr %6, align 4, !tbaa !5 %8 = load i32, ptr %5, align 4, !tbaa !12 %9 = tail call i32 @within(i64 noundef %0, i32 noundef %7, i32 noundef %8) #2 %10 = icmp eq i32 %9, 0 br i1 %10, label %11, label %18 11: ; preds = %4 %12 = getelementptr inbounds %struct.TYPE_4__, ptr %2, i64 0, i32 1 %13 = load i32, ptr %12, align 4, !tbaa !13 %14 = load i32, ptr %2, align 4, !tbaa !14 %15 = tail call i32 @within(i64 noundef %0, i32 noundef %13, i32 noundef %14) #2 %16 = icmp eq i32 %15, 0 %17 = select i1 %16, ptr null, ptr %2 br label %18 18: ; preds = %11, %4, %1 %19 = phi ptr [ %2, %4 ], [ null, %1 ], [ %17, %11 ] ret ptr %19 } declare ptr @__module_address(i64 noundef) local_unnamed_addr #1 declare i32 @within(i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !8, i64 12} !6 = !{!"module", !7, i64 0, !11, i64 8} !7 = !{!"TYPE_4__", !8, i64 0, !8, i64 4} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"TYPE_3__", !8, i64 0, !8, i64 4} !12 = !{!6, !8, i64 8} !13 = !{!6, !8, i64 4} !14 = !{!6, !8, i64 0}
; ModuleID = 'AnghaBench/linux/kernel/extr_module.c___module_text_address.c' source_filename = "AnghaBench/linux/kernel/extr_module.c___module_text_address.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define ptr @__module_text_address(i64 noundef %0) local_unnamed_addr #0 { %2 = tail call ptr @__module_address(i64 noundef %0) #2 %3 = icmp eq ptr %2, null br i1 %3, label %18, label %4 4: ; preds = %1 %5 = getelementptr inbounds i8, ptr %2, i64 8 %6 = getelementptr inbounds i8, ptr %2, i64 12 %7 = load i32, ptr %6, align 4, !tbaa !6 %8 = load i32, ptr %5, align 4, !tbaa !13 %9 = tail call i32 @within(i64 noundef %0, i32 noundef %7, i32 noundef %8) #2 %10 = icmp eq i32 %9, 0 br i1 %10, label %11, label %18 11: ; preds = %4 %12 = getelementptr inbounds i8, ptr %2, i64 4 %13 = load i32, ptr %12, align 4, !tbaa !14 %14 = load i32, ptr %2, align 4, !tbaa !15 %15 = tail call i32 @within(i64 noundef %0, i32 noundef %13, i32 noundef %14) #2 %16 = icmp eq i32 %15, 0 %17 = select i1 %16, ptr null, ptr %2 br label %18 18: ; preds = %11, %4, %1 %19 = phi ptr [ %2, %4 ], [ null, %1 ], [ %17, %11 ] ret ptr %19 } declare ptr @__module_address(i64 noundef) local_unnamed_addr #1 declare i32 @within(i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !9, i64 12} !7 = !{!"module", !8, i64 0, !12, i64 8} !8 = !{!"TYPE_4__", !9, i64 0, !9, i64 4} !9 = !{!"int", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"} !12 = !{!"TYPE_3__", !9, i64 0, !9, i64 4} !13 = !{!7, !9, i64 8} !14 = !{!7, !9, i64 4} !15 = !{!7, !9, i64 0}
linux_kernel_extr_module.c___module_text_address
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/imx/extr_parallel-display.c_imx_pd_connector_get_modes.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/imx/extr_parallel-display.c_imx_pd_connector_get_modes.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.imx_parallel_display = type { i32, i32, i64, i32, ptr } @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @OF_USE_NATIVE_MODE = dso_local local_unnamed_addr global i32 0, align 4 @DRM_MODE_TYPE_DRIVER = dso_local local_unnamed_addr global i32 0, align 4 @DRM_MODE_TYPE_PREFERRED = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @imx_pd_connector_get_modes], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @imx_pd_connector_get_modes(ptr noundef %0) #0 { %2 = tail call ptr @con_to_imxpd(ptr noundef %0) #2 %3 = getelementptr inbounds %struct.imx_parallel_display, ptr %2, i64 0, i32 4 %4 = load ptr, ptr %3, align 8, !tbaa !5 %5 = load ptr, ptr %4, align 8, !tbaa !12 %6 = getelementptr inbounds %struct.imx_parallel_display, ptr %2, i64 0, i32 3 %7 = load i32, ptr %6, align 8, !tbaa !14 %8 = tail call i32 @drm_panel_get_modes(i32 noundef %7) #2 %9 = icmp sgt i32 %8, 0 br i1 %9, label %42, label %10 10: ; preds = %1 %11 = getelementptr inbounds %struct.imx_parallel_display, ptr %2, i64 0, i32 2 %12 = load i64, ptr %11, align 8, !tbaa !15 %13 = icmp eq i64 %12, 0 br i1 %13, label %18, label %14 14: ; preds = %10 %15 = tail call i32 @drm_connector_update_edid_property(ptr noundef %0, i64 noundef %12) #2 %16 = load i64, ptr %11, align 8, !tbaa !15 %17 = tail call i32 @drm_add_edid_modes(ptr noundef %0, i64 noundef %16) #2 br label %18 18: ; preds = %14, %10 %19 = phi i32 [ %17, %14 ], [ %8, %10 ] %20 = icmp eq ptr %5, null br i1 %20, label %42, label %21 21: ; preds = %18 %22 = load i32, ptr %0, align 4, !tbaa !16 %23 = tail call ptr @drm_mode_create(i32 noundef %22) #2 %24 = icmp eq ptr %23, null br i1 %24, label %25, label %28 25: ; preds = %21 %26 = load i32, ptr @EINVAL, align 4, !tbaa !18 %27 = sub nsw i32 0, %26 br label %42 28: ; preds = %21 %29 = getelementptr inbounds %struct.imx_parallel_display, ptr %2, i64 0, i32 1 %30 = load i32, ptr @OF_USE_NATIVE_MODE, align 4, !tbaa !18 %31 = tail call i32 @of_get_drm_display_mode(ptr noundef nonnull %5, ptr noundef nonnull %2, ptr noundef nonnull %29, i32 noundef %30) #2 %32 = icmp eq i32 %31, 0 br i1 %32, label %33, label %42 33: ; preds = %28 %34 = tail call i32 @drm_mode_copy(ptr noundef nonnull %23, ptr noundef nonnull %2) #2 %35 = load i32, ptr @DRM_MODE_TYPE_DRIVER, align 4, !tbaa !18 %36 = load i32, ptr @DRM_MODE_TYPE_PREFERRED, align 4, !tbaa !18 %37 = or i32 %36, %35 %38 = load i32, ptr %23, align 4, !tbaa !19 %39 = or i32 %37, %38 store i32 %39, ptr %23, align 4, !tbaa !19 %40 = tail call i32 @drm_mode_probed_add(ptr noundef nonnull %0, ptr noundef nonnull %23) #2 %41 = add nsw i32 %19, 1 br label %42 42: ; preds = %28, %25, %33, %18, %1 %43 = phi i32 [ %8, %1 ], [ %19, %18 ], [ %41, %33 ], [ %31, %28 ], [ %27, %25 ] ret i32 %43 } declare ptr @con_to_imxpd(ptr noundef) local_unnamed_addr #1 declare i32 @drm_panel_get_modes(i32 noundef) local_unnamed_addr #1 declare i32 @drm_connector_update_edid_property(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @drm_add_edid_modes(ptr noundef, i64 noundef) local_unnamed_addr #1 declare ptr @drm_mode_create(i32 noundef) local_unnamed_addr #1 declare i32 @of_get_drm_display_mode(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @drm_mode_copy(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @drm_mode_probed_add(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !11, i64 24} !6 = !{!"imx_parallel_display", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16, !11, i64 24} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"long", !8, i64 0} !11 = !{!"any pointer", !8, i64 0} !12 = !{!13, !11, i64 0} !13 = !{!"TYPE_2__", !11, i64 0} !14 = !{!6, !7, i64 16} !15 = !{!6, !10, i64 8} !16 = !{!17, !7, i64 0} !17 = !{!"drm_connector", !7, i64 0} !18 = !{!7, !7, i64 0} !19 = !{!20, !7, i64 0} !20 = !{!"drm_display_mode", !7, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/imx/extr_parallel-display.c_imx_pd_connector_get_modes.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/imx/extr_parallel-display.c_imx_pd_connector_get_modes.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EINVAL = common local_unnamed_addr global i32 0, align 4 @OF_USE_NATIVE_MODE = common local_unnamed_addr global i32 0, align 4 @DRM_MODE_TYPE_DRIVER = common local_unnamed_addr global i32 0, align 4 @DRM_MODE_TYPE_PREFERRED = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @imx_pd_connector_get_modes], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @imx_pd_connector_get_modes(ptr noundef %0) #0 { %2 = tail call ptr @con_to_imxpd(ptr noundef %0) #2 %3 = getelementptr inbounds i8, ptr %2, i64 24 %4 = load ptr, ptr %3, align 8, !tbaa !6 %5 = load ptr, ptr %4, align 8, !tbaa !13 %6 = getelementptr inbounds i8, ptr %2, i64 16 %7 = load i32, ptr %6, align 8, !tbaa !15 %8 = tail call i32 @drm_panel_get_modes(i32 noundef %7) #2 %9 = icmp sgt i32 %8, 0 br i1 %9, label %42, label %10 10: ; preds = %1 %11 = getelementptr inbounds i8, ptr %2, i64 8 %12 = load i64, ptr %11, align 8, !tbaa !16 %13 = icmp eq i64 %12, 0 br i1 %13, label %18, label %14 14: ; preds = %10 %15 = tail call i32 @drm_connector_update_edid_property(ptr noundef %0, i64 noundef %12) #2 %16 = load i64, ptr %11, align 8, !tbaa !16 %17 = tail call i32 @drm_add_edid_modes(ptr noundef %0, i64 noundef %16) #2 br label %18 18: ; preds = %14, %10 %19 = phi i32 [ %17, %14 ], [ %8, %10 ] %20 = icmp eq ptr %5, null br i1 %20, label %42, label %21 21: ; preds = %18 %22 = load i32, ptr %0, align 4, !tbaa !17 %23 = tail call ptr @drm_mode_create(i32 noundef %22) #2 %24 = icmp eq ptr %23, null br i1 %24, label %25, label %28 25: ; preds = %21 %26 = load i32, ptr @EINVAL, align 4, !tbaa !19 %27 = sub nsw i32 0, %26 br label %42 28: ; preds = %21 %29 = getelementptr inbounds i8, ptr %2, i64 4 %30 = load i32, ptr @OF_USE_NATIVE_MODE, align 4, !tbaa !19 %31 = tail call i32 @of_get_drm_display_mode(ptr noundef nonnull %5, ptr noundef nonnull %2, ptr noundef nonnull %29, i32 noundef %30) #2 %32 = icmp eq i32 %31, 0 br i1 %32, label %33, label %42 33: ; preds = %28 %34 = tail call i32 @drm_mode_copy(ptr noundef nonnull %23, ptr noundef nonnull %2) #2 %35 = load i32, ptr @DRM_MODE_TYPE_DRIVER, align 4, !tbaa !19 %36 = load i32, ptr @DRM_MODE_TYPE_PREFERRED, align 4, !tbaa !19 %37 = or i32 %36, %35 %38 = load i32, ptr %23, align 4, !tbaa !20 %39 = or i32 %37, %38 store i32 %39, ptr %23, align 4, !tbaa !20 %40 = tail call i32 @drm_mode_probed_add(ptr noundef nonnull %0, ptr noundef nonnull %23) #2 %41 = add nsw i32 %19, 1 br label %42 42: ; preds = %28, %25, %18, %33, %1 %43 = phi i32 [ %8, %1 ], [ %41, %33 ], [ %19, %18 ], [ %31, %28 ], [ %27, %25 ] ret i32 %43 } declare ptr @con_to_imxpd(ptr noundef) local_unnamed_addr #1 declare i32 @drm_panel_get_modes(i32 noundef) local_unnamed_addr #1 declare i32 @drm_connector_update_edid_property(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @drm_add_edid_modes(ptr noundef, i64 noundef) local_unnamed_addr #1 declare ptr @drm_mode_create(i32 noundef) local_unnamed_addr #1 declare i32 @of_get_drm_display_mode(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @drm_mode_copy(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @drm_mode_probed_add(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !12, i64 24} !7 = !{!"imx_parallel_display", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16, !12, i64 24} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"long", !9, i64 0} !12 = !{!"any pointer", !9, i64 0} !13 = !{!14, !12, i64 0} !14 = !{!"TYPE_2__", !12, i64 0} !15 = !{!7, !8, i64 16} !16 = !{!7, !11, i64 8} !17 = !{!18, !8, i64 0} !18 = !{!"drm_connector", !8, i64 0} !19 = !{!8, !8, i64 0} !20 = !{!21, !8, i64 0} !21 = !{!"drm_display_mode", !8, i64 0}
linux_drivers_gpu_drm_imx_extr_parallel-display.c_imx_pd_connector_get_modes
; ModuleID = 'AnghaBench/twemproxy/src/extr_nc_request.c_req_recv_done.c' source_filename = "AnghaBench/twemproxy/src/extr_nc_request.c_req_recv_done.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.msg_tqh = type { i32 } %struct.conn = type { ptr, ptr, ptr, ptr, i32, i64 } %struct.msg = type { i32, ptr, ptr, i32, i64, ptr } @NC_OK = dso_local local_unnamed_addr global i64 0, align 8 @errno = dso_local local_unnamed_addr global ptr null, align 8 @m_tqe = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local void @req_recv_done(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 { %5 = alloca %struct.msg_tqh, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3 %6 = getelementptr inbounds %struct.conn, ptr %1, i64 0, i32 5 %7 = load i64, ptr %6, align 8, !tbaa !5 %8 = icmp eq i64 %7, 0 br i1 %8, label %14, label %9 9: ; preds = %4 %10 = getelementptr inbounds %struct.conn, ptr %1, i64 0, i32 4 %11 = load i32, ptr %10, align 8, !tbaa !12 %12 = icmp eq i32 %11, 0 %13 = zext i1 %12 to i32 br label %14 14: ; preds = %9, %4 %15 = phi i32 [ 0, %4 ], [ %13, %9 ] %16 = tail call i32 @ASSERT(i32 noundef %15) #3 %17 = load i32, ptr %2, align 8, !tbaa !13 %18 = tail call i32 @ASSERT(i32 noundef %17) #3 %19 = getelementptr inbounds %struct.msg, ptr %2, i64 0, i32 5 %20 = load ptr, ptr %19, align 8, !tbaa !15 %21 = icmp eq ptr %20, %1 %22 = zext i1 %21 to i32 %23 = tail call i32 @ASSERT(i32 noundef %22) #3 %24 = getelementptr inbounds %struct.conn, ptr %1, i64 0, i32 3 %25 = load ptr, ptr %24, align 8, !tbaa !16 %26 = icmp eq ptr %25, %2 %27 = zext i1 %26 to i32 %28 = tail call i32 @ASSERT(i32 noundef %27) #3 %29 = icmp eq ptr %3, null br i1 %29, label %34, label %30 30: ; preds = %14 %31 = load i32, ptr %3, align 8, !tbaa !13 %32 = icmp ne i32 %31, 0 %33 = zext i1 %32 to i32 br label %34 34: ; preds = %30, %14 %35 = phi i32 [ 1, %14 ], [ %33, %30 ] %36 = tail call i32 @ASSERT(i32 noundef %35) #3 store ptr %3, ptr %24, align 8, !tbaa !16 %37 = tail call i64 @req_filter(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2) #3 %38 = icmp eq i64 %37, 0 br i1 %38, label %39, label %118 39: ; preds = %34 %40 = getelementptr inbounds %struct.msg, ptr %2, i64 0, i32 4 %41 = load i64, ptr %40, align 8, !tbaa !17 %42 = icmp eq i64 %41, 0 br i1 %42, label %67, label %43 43: ; preds = %39 %44 = tail call i64 @req_make_reply(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2) #3 %45 = load i64, ptr @NC_OK, align 8, !tbaa !18 %46 = icmp eq i64 %44, %45 br i1 %46, label %50, label %47 47: ; preds = %43 %48 = load ptr, ptr @errno, align 8, !tbaa !19 %49 = getelementptr inbounds %struct.conn, ptr %1, i64 0, i32 2 store ptr %48, ptr %49, align 8, !tbaa !20 br label %118 50: ; preds = %43 %51 = getelementptr inbounds %struct.msg, ptr %2, i64 0, i32 1 %52 = load ptr, ptr %51, align 8, !tbaa !21 %53 = tail call i64 %52(ptr noundef nonnull %2) #3 %54 = load i64, ptr @NC_OK, align 8, !tbaa !18 %55 = icmp eq i64 %53, %54 br i1 %55, label %59, label %56 56: ; preds = %50 %57 = load ptr, ptr @errno, align 8, !tbaa !19 %58 = getelementptr inbounds %struct.conn, ptr %1, i64 0, i32 2 store ptr %57, ptr %58, align 8, !tbaa !20 br label %118 59: ; preds = %50 %60 = load i32, ptr %0, align 4, !tbaa !22 %61 = tail call i64 @event_add_out(i32 noundef %60, ptr noundef nonnull %1) #3 %62 = load i64, ptr @NC_OK, align 8, !tbaa !18 %63 = icmp eq i64 %61, %62 br i1 %63, label %118, label %64 64: ; preds = %59 %65 = load ptr, ptr @errno, align 8, !tbaa !19 %66 = getelementptr inbounds %struct.conn, ptr %1, i64 0, i32 2 store ptr %65, ptr %66, align 8, !tbaa !20 br label %118 67: ; preds = %39 %68 = getelementptr inbounds %struct.conn, ptr %1, i64 0, i32 1 %69 = load ptr, ptr %68, align 8, !tbaa !24 %70 = call i32 @TAILQ_INIT(ptr noundef nonnull %5) #3 %71 = getelementptr inbounds %struct.msg, ptr %2, i64 0, i32 2 %72 = load ptr, ptr %71, align 8, !tbaa !25 %73 = load i32, ptr %69, align 4, !tbaa !26 %74 = call i64 %72(ptr noundef nonnull %2, i32 noundef %73, ptr noundef nonnull %5) #3 %75 = load i64, ptr @NC_OK, align 8, !tbaa !18 %76 = icmp eq i64 %74, %75 br i1 %76, label %86, label %77 77: ; preds = %67 %78 = getelementptr inbounds %struct.msg, ptr %2, i64 0, i32 3 %79 = load i32, ptr %78, align 8, !tbaa !28 %80 = icmp eq i32 %79, 0 br i1 %80, label %81, label %84 81: ; preds = %77 %82 = load ptr, ptr %1, align 8, !tbaa !29 %83 = call i32 %82(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2) #3 br label %84 84: ; preds = %81, %77 %85 = call i32 @req_forward_error(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2) #3 br label %86 86: ; preds = %84, %67 %87 = call i32 @TAILQ_EMPTY(ptr noundef nonnull %5) #3 %88 = icmp eq i32 %87, 0 br i1 %88, label %91, label %89 89: ; preds = %86 %90 = call i32 @req_forward(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2) #3 br label %118 91: ; preds = %86 %92 = call i64 @req_make_reply(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2) #3 %93 = load i64, ptr @NC_OK, align 8, !tbaa !18 %94 = icmp eq i64 %92, %93 br i1 %94, label %104, label %95 95: ; preds = %91 %96 = getelementptr inbounds %struct.msg, ptr %2, i64 0, i32 3 %97 = load i32, ptr %96, align 8, !tbaa !28 %98 = icmp eq i32 %97, 0 br i1 %98, label %99, label %102 99: ; preds = %95 %100 = load ptr, ptr %1, align 8, !tbaa !29 %101 = call i32 %100(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2) #3 br label %102 102: ; preds = %99, %95 %103 = call i32 @req_forward_error(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2) #3 br label %104 104: ; preds = %102, %91 %105 = call ptr @TAILQ_FIRST(ptr noundef nonnull %5) #3 %106 = icmp eq ptr %105, null br i1 %106, label %115, label %107 107: ; preds = %104, %107 %108 = phi ptr [ %110, %107 ], [ %105, %104 ] %109 = load i32, ptr @m_tqe, align 4, !tbaa !30 %110 = call ptr @TAILQ_NEXT(ptr noundef nonnull %108, i32 noundef %109) #3 %111 = load i32, ptr @m_tqe, align 4, !tbaa !30 %112 = call i32 @TAILQ_REMOVE(ptr noundef nonnull %5, ptr noundef nonnull %108, i32 noundef %111) #3 %113 = call i32 @req_forward(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %108) #3 %114 = icmp eq ptr %110, null br i1 %114, label %115, label %107, !llvm.loop !31 115: ; preds = %107, %104 %116 = call i32 @TAILQ_EMPTY(ptr noundef nonnull %5) #3 %117 = call i32 @ASSERT(i32 noundef %116) #3 br label %118 118: ; preds = %59, %64, %34, %115, %89, %56, %47 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @ASSERT(i32 noundef) local_unnamed_addr #2 declare i64 @req_filter(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @req_make_reply(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @event_add_out(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @TAILQ_INIT(ptr noundef) local_unnamed_addr #2 declare i32 @req_forward_error(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @TAILQ_EMPTY(ptr noundef) local_unnamed_addr #2 declare i32 @req_forward(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare ptr @TAILQ_FIRST(ptr noundef) local_unnamed_addr #2 declare ptr @TAILQ_NEXT(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @TAILQ_REMOVE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !11, i64 40} !6 = !{!"conn", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !10, i64 32, !11, i64 40} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0} !11 = !{!"long", !8, i64 0} !12 = !{!6, !10, i64 32} !13 = !{!14, !10, i64 0} !14 = !{!"msg", !10, i64 0, !7, i64 8, !7, i64 16, !10, i64 24, !11, i64 32, !7, i64 40} !15 = !{!14, !7, i64 40} !16 = !{!6, !7, i64 24} !17 = !{!14, !11, i64 32} !18 = !{!11, !11, i64 0} !19 = !{!7, !7, i64 0} !20 = !{!6, !7, i64 16} !21 = !{!14, !7, i64 8} !22 = !{!23, !10, i64 0} !23 = !{!"context", !10, i64 0} !24 = !{!6, !7, i64 8} !25 = !{!14, !7, i64 16} !26 = !{!27, !10, i64 0} !27 = !{!"server_pool", !10, i64 0} !28 = !{!14, !10, i64 24} !29 = !{!6, !7, i64 0} !30 = !{!10, !10, i64 0} !31 = distinct !{!31, !32} !32 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/twemproxy/src/extr_nc_request.c_req_recv_done.c' source_filename = "AnghaBench/twemproxy/src/extr_nc_request.c_req_recv_done.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.msg_tqh = type { i32 } @NC_OK = common local_unnamed_addr global i64 0, align 8 @errno = common local_unnamed_addr global ptr null, align 8 @m_tqe = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define void @req_recv_done(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 { %5 = alloca %struct.msg_tqh, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3 %6 = getelementptr inbounds i8, ptr %1, i64 40 %7 = load i64, ptr %6, align 8, !tbaa !6 %8 = icmp eq i64 %7, 0 br i1 %8, label %14, label %9 9: ; preds = %4 %10 = getelementptr inbounds i8, ptr %1, i64 32 %11 = load i32, ptr %10, align 8, !tbaa !13 %12 = icmp eq i32 %11, 0 %13 = zext i1 %12 to i32 br label %14 14: ; preds = %9, %4 %15 = phi i32 [ 0, %4 ], [ %13, %9 ] %16 = tail call i32 @ASSERT(i32 noundef %15) #3 %17 = load i32, ptr %2, align 8, !tbaa !14 %18 = tail call i32 @ASSERT(i32 noundef %17) #3 %19 = getelementptr inbounds i8, ptr %2, i64 40 %20 = load ptr, ptr %19, align 8, !tbaa !16 %21 = icmp eq ptr %20, %1 %22 = zext i1 %21 to i32 %23 = tail call i32 @ASSERT(i32 noundef %22) #3 %24 = getelementptr inbounds i8, ptr %1, i64 24 %25 = load ptr, ptr %24, align 8, !tbaa !17 %26 = icmp eq ptr %25, %2 %27 = zext i1 %26 to i32 %28 = tail call i32 @ASSERT(i32 noundef %27) #3 %29 = icmp eq ptr %3, null br i1 %29, label %34, label %30 30: ; preds = %14 %31 = load i32, ptr %3, align 8, !tbaa !14 %32 = icmp ne i32 %31, 0 %33 = zext i1 %32 to i32 br label %34 34: ; preds = %30, %14 %35 = phi i32 [ 1, %14 ], [ %33, %30 ] %36 = tail call i32 @ASSERT(i32 noundef %35) #3 store ptr %3, ptr %24, align 8, !tbaa !17 %37 = tail call i64 @req_filter(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2) #3 %38 = icmp eq i64 %37, 0 br i1 %38, label %39, label %118 39: ; preds = %34 %40 = getelementptr inbounds i8, ptr %2, i64 32 %41 = load i64, ptr %40, align 8, !tbaa !18 %42 = icmp eq i64 %41, 0 br i1 %42, label %67, label %43 43: ; preds = %39 %44 = tail call i64 @req_make_reply(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2) #3 %45 = load i64, ptr @NC_OK, align 8, !tbaa !19 %46 = icmp eq i64 %44, %45 br i1 %46, label %50, label %47 47: ; preds = %43 %48 = load ptr, ptr @errno, align 8, !tbaa !20 %49 = getelementptr inbounds i8, ptr %1, i64 16 store ptr %48, ptr %49, align 8, !tbaa !21 br label %118 50: ; preds = %43 %51 = getelementptr inbounds i8, ptr %2, i64 8 %52 = load ptr, ptr %51, align 8, !tbaa !22 %53 = tail call i64 %52(ptr noundef nonnull %2) #3 %54 = load i64, ptr @NC_OK, align 8, !tbaa !19 %55 = icmp eq i64 %53, %54 br i1 %55, label %59, label %56 56: ; preds = %50 %57 = load ptr, ptr @errno, align 8, !tbaa !20 %58 = getelementptr inbounds i8, ptr %1, i64 16 store ptr %57, ptr %58, align 8, !tbaa !21 br label %118 59: ; preds = %50 %60 = load i32, ptr %0, align 4, !tbaa !23 %61 = tail call i64 @event_add_out(i32 noundef %60, ptr noundef nonnull %1) #3 %62 = load i64, ptr @NC_OK, align 8, !tbaa !19 %63 = icmp eq i64 %61, %62 br i1 %63, label %118, label %64 64: ; preds = %59 %65 = load ptr, ptr @errno, align 8, !tbaa !20 %66 = getelementptr inbounds i8, ptr %1, i64 16 store ptr %65, ptr %66, align 8, !tbaa !21 br label %118 67: ; preds = %39 %68 = getelementptr inbounds i8, ptr %1, i64 8 %69 = load ptr, ptr %68, align 8, !tbaa !25 %70 = call i32 @TAILQ_INIT(ptr noundef nonnull %5) #3 %71 = getelementptr inbounds i8, ptr %2, i64 16 %72 = load ptr, ptr %71, align 8, !tbaa !26 %73 = load i32, ptr %69, align 4, !tbaa !27 %74 = call i64 %72(ptr noundef nonnull %2, i32 noundef %73, ptr noundef nonnull %5) #3 %75 = load i64, ptr @NC_OK, align 8, !tbaa !19 %76 = icmp eq i64 %74, %75 br i1 %76, label %86, label %77 77: ; preds = %67 %78 = getelementptr inbounds i8, ptr %2, i64 24 %79 = load i32, ptr %78, align 8, !tbaa !29 %80 = icmp eq i32 %79, 0 br i1 %80, label %81, label %84 81: ; preds = %77 %82 = load ptr, ptr %1, align 8, !tbaa !30 %83 = call i32 %82(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2) #3 br label %84 84: ; preds = %81, %77 %85 = call i32 @req_forward_error(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2) #3 br label %86 86: ; preds = %84, %67 %87 = call i32 @TAILQ_EMPTY(ptr noundef nonnull %5) #3 %88 = icmp eq i32 %87, 0 br i1 %88, label %91, label %89 89: ; preds = %86 %90 = call i32 @req_forward(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2) #3 br label %118 91: ; preds = %86 %92 = call i64 @req_make_reply(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2) #3 %93 = load i64, ptr @NC_OK, align 8, !tbaa !19 %94 = icmp eq i64 %92, %93 br i1 %94, label %104, label %95 95: ; preds = %91 %96 = getelementptr inbounds i8, ptr %2, i64 24 %97 = load i32, ptr %96, align 8, !tbaa !29 %98 = icmp eq i32 %97, 0 br i1 %98, label %99, label %102 99: ; preds = %95 %100 = load ptr, ptr %1, align 8, !tbaa !30 %101 = call i32 %100(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2) #3 br label %102 102: ; preds = %99, %95 %103 = call i32 @req_forward_error(ptr noundef %0, ptr noundef nonnull %1, ptr noundef nonnull %2) #3 br label %104 104: ; preds = %102, %91 %105 = call ptr @TAILQ_FIRST(ptr noundef nonnull %5) #3 %106 = icmp eq ptr %105, null br i1 %106, label %115, label %107 107: ; preds = %104, %107 %108 = phi ptr [ %110, %107 ], [ %105, %104 ] %109 = load i32, ptr @m_tqe, align 4, !tbaa !31 %110 = call ptr @TAILQ_NEXT(ptr noundef nonnull %108, i32 noundef %109) #3 %111 = load i32, ptr @m_tqe, align 4, !tbaa !31 %112 = call i32 @TAILQ_REMOVE(ptr noundef nonnull %5, ptr noundef nonnull %108, i32 noundef %111) #3 %113 = call i32 @req_forward(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %108) #3 %114 = icmp eq ptr %110, null br i1 %114, label %115, label %107, !llvm.loop !32 115: ; preds = %107, %104 %116 = call i32 @TAILQ_EMPTY(ptr noundef nonnull %5) #3 %117 = call i32 @ASSERT(i32 noundef %116) #3 br label %118 118: ; preds = %59, %64, %34, %115, %89, %56, %47 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @ASSERT(i32 noundef) local_unnamed_addr #2 declare i64 @req_filter(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @req_make_reply(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i64 @event_add_out(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @TAILQ_INIT(ptr noundef) local_unnamed_addr #2 declare i32 @req_forward_error(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @TAILQ_EMPTY(ptr noundef) local_unnamed_addr #2 declare i32 @req_forward(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare ptr @TAILQ_FIRST(ptr noundef) local_unnamed_addr #2 declare ptr @TAILQ_NEXT(ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @TAILQ_REMOVE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !12, i64 40} !7 = !{!"conn", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !11, i64 32, !12, i64 40} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"int", !9, i64 0} !12 = !{!"long", !9, i64 0} !13 = !{!7, !11, i64 32} !14 = !{!15, !11, i64 0} !15 = !{!"msg", !11, i64 0, !8, i64 8, !8, i64 16, !11, i64 24, !12, i64 32, !8, i64 40} !16 = !{!15, !8, i64 40} !17 = !{!7, !8, i64 24} !18 = !{!15, !12, i64 32} !19 = !{!12, !12, i64 0} !20 = !{!8, !8, i64 0} !21 = !{!7, !8, i64 16} !22 = !{!15, !8, i64 8} !23 = !{!24, !11, i64 0} !24 = !{!"context", !11, i64 0} !25 = !{!7, !8, i64 8} !26 = !{!15, !8, i64 16} !27 = !{!28, !11, i64 0} !28 = !{!"server_pool", !11, i64 0} !29 = !{!15, !11, i64 24} !30 = !{!7, !8, i64 0} !31 = !{!11, !11, i64 0} !32 = distinct !{!32, !33} !33 = !{!"llvm.loop.mustprogress"}
twemproxy_src_extr_nc_request.c_req_recv_done
; ModuleID = 'AnghaBench/obs-studio/libobs/graphics/extr_image-file.c_bi_def_bitmap_destroy.c' source_filename = "AnghaBench/obs-studio/libobs/graphics/extr_image-file.c_bi_def_bitmap_destroy.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @bi_def_bitmap_destroy], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @bi_def_bitmap_destroy(ptr noundef %0) #0 { %2 = tail call i32 @bfree(ptr noundef %0) #2 ret void } declare i32 @bfree(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/obs-studio/libobs/graphics/extr_image-file.c_bi_def_bitmap_destroy.c' source_filename = "AnghaBench/obs-studio/libobs/graphics/extr_image-file.c_bi_def_bitmap_destroy.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @bi_def_bitmap_destroy], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @bi_def_bitmap_destroy(ptr noundef %0) #0 { %2 = tail call i32 @bfree(ptr noundef %0) #2 ret void } declare i32 @bfree(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
obs-studio_libobs_graphics_extr_image-file.c_bi_def_bitmap_destroy
; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv4/netfilter/extr_nf_nat_snmp_basic.c_asn1_eoc_decode.c' source_filename = "AnghaBench/fastsocket/kernel/net/ipv4/netfilter/extr_nf_nat_snmp_basic.c_asn1_eoc_decode.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.asn1_ctx = type { ptr, ptr } @ASN1_ERR_DEC_EOC_MISMATCH = dso_local local_unnamed_addr global ptr null, align 8 @ASN1_ERR_DEC_LENGTH_MISMATCH = dso_local local_unnamed_addr global ptr null, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @asn1_eoc_decode], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef zeroext i8 @asn1_eoc_decode(ptr noundef %0, ptr noundef readnone %1) #0 { %3 = alloca i8, align 1 call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #3 %4 = icmp eq ptr %1, null br i1 %4, label %5, label %17 5: ; preds = %2 %6 = call i32 @asn1_octet_decode(ptr noundef %0, ptr noundef nonnull %3) #3 %7 = icmp eq i32 %6, 0 br i1 %7, label %24, label %8 8: ; preds = %5 %9 = load i8, ptr %3, align 1, !tbaa !5 %10 = icmp eq i8 %9, 0 br i1 %10, label %11, label %20 11: ; preds = %8 %12 = call i32 @asn1_octet_decode(ptr noundef %0, ptr noundef nonnull %3) #3 %13 = icmp eq i32 %12, 0 br i1 %13, label %24, label %14 14: ; preds = %11 %15 = load i8, ptr %3, align 1, !tbaa !5 %16 = icmp eq i8 %15, 0 br i1 %16, label %24, label %20 17: ; preds = %2 %18 = load ptr, ptr %0, align 8, !tbaa !8 %19 = icmp eq ptr %18, %1 br i1 %19, label %24, label %20 20: ; preds = %17, %14, %8 %21 = phi ptr [ @ASN1_ERR_DEC_EOC_MISMATCH, %8 ], [ @ASN1_ERR_DEC_EOC_MISMATCH, %14 ], [ @ASN1_ERR_DEC_LENGTH_MISMATCH, %17 ] %22 = load ptr, ptr %21, align 8, !tbaa !11 %23 = getelementptr inbounds %struct.asn1_ctx, ptr %0, i64 0, i32 1 store ptr %22, ptr %23, align 8, !tbaa !12 br label %24 24: ; preds = %20, %17, %14, %11, %5 %25 = phi i8 [ 0, %5 ], [ 0, %11 ], [ 1, %14 ], [ 1, %17 ], [ 0, %20 ] call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #3 ret i8 %25 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @asn1_octet_decode(ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"omnipotent char", !7, i64 0} !7 = !{!"Simple C/C++ TBAA"} !8 = !{!9, !10, i64 0} !9 = !{!"asn1_ctx", !10, i64 0, !10, i64 8} !10 = !{!"any pointer", !6, i64 0} !11 = !{!10, !10, i64 0} !12 = !{!9, !10, i64 8}
; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv4/netfilter/extr_nf_nat_snmp_basic.c_asn1_eoc_decode.c' source_filename = "AnghaBench/fastsocket/kernel/net/ipv4/netfilter/extr_nf_nat_snmp_basic.c_asn1_eoc_decode.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @ASN1_ERR_DEC_EOC_MISMATCH = common local_unnamed_addr global ptr null, align 8 @ASN1_ERR_DEC_LENGTH_MISMATCH = common local_unnamed_addr global ptr null, align 8 @llvm.used = appending global [1 x ptr] [ptr @asn1_eoc_decode], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal zeroext range(i8 0, 2) i8 @asn1_eoc_decode(ptr noundef %0, ptr noundef readnone %1) #0 { %3 = alloca i8, align 1 call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %3) #3 %4 = icmp eq ptr %1, null br i1 %4, label %5, label %17 5: ; preds = %2 %6 = call i32 @asn1_octet_decode(ptr noundef %0, ptr noundef nonnull %3) #3 %7 = icmp eq i32 %6, 0 br i1 %7, label %24, label %8 8: ; preds = %5 %9 = load i8, ptr %3, align 1, !tbaa !6 %10 = icmp eq i8 %9, 0 br i1 %10, label %11, label %20 11: ; preds = %8 %12 = call i32 @asn1_octet_decode(ptr noundef %0, ptr noundef nonnull %3) #3 %13 = icmp eq i32 %12, 0 br i1 %13, label %24, label %14 14: ; preds = %11 %15 = load i8, ptr %3, align 1, !tbaa !6 %16 = icmp eq i8 %15, 0 br i1 %16, label %24, label %20 17: ; preds = %2 %18 = load ptr, ptr %0, align 8, !tbaa !9 %19 = icmp eq ptr %18, %1 br i1 %19, label %24, label %20 20: ; preds = %17, %14, %8 %21 = phi ptr [ @ASN1_ERR_DEC_EOC_MISMATCH, %8 ], [ @ASN1_ERR_DEC_EOC_MISMATCH, %14 ], [ @ASN1_ERR_DEC_LENGTH_MISMATCH, %17 ] %22 = load ptr, ptr %21, align 8, !tbaa !12 %23 = getelementptr inbounds i8, ptr %0, i64 8 store ptr %22, ptr %23, align 8, !tbaa !13 br label %24 24: ; preds = %20, %17, %14, %11, %5 %25 = phi i8 [ 0, %5 ], [ 0, %11 ], [ 1, %14 ], [ 1, %17 ], [ 0, %20 ] call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %3) #3 ret i8 %25 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @asn1_octet_decode(ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"asn1_ctx", !11, i64 0, !11, i64 8} !11 = !{!"any pointer", !7, i64 0} !12 = !{!11, !11, i64 0} !13 = !{!10, !11, i64 8}
fastsocket_kernel_net_ipv4_netfilter_extr_nf_nat_snmp_basic.c_asn1_eoc_decode