IR_x86 string | IR_arm string | filename string |
|---|---|---|
; ModuleID = 'AnghaBench/linux/drivers/gpu/host1x/extr_dev.h_host1x_hw_intr_set_syncpt_threshold.c'
source_filename = "AnghaBench/linux/drivers/gpu/host1x/extr_dev.h_host1x_hw_intr_set_syncpt_threshold.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @host1x_hw_intr_set_syncpt_threshold], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @host1x_hw_intr_set_syncpt_threshold(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !5
%5 = load ptr, ptr %4, align 8, !tbaa !10
%6 = tail call i32 %5(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %2) #1
ret void
}
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"host1x", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/host1x/extr_dev.h_host1x_hw_intr_set_syncpt_threshold.c'
source_filename = "AnghaBench/linux/drivers/gpu/host1x/extr_dev.h_host1x_hw_intr_set_syncpt_threshold.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @host1x_hw_intr_set_syncpt_threshold], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @host1x_hw_intr_set_syncpt_threshold(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = load ptr, ptr %4, align 8, !tbaa !11
%6 = tail call i32 %5(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %2) #1
ret void
}
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"host1x", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_2__", !8, i64 0}
| linux_drivers_gpu_host1x_extr_dev.h_host1x_hw_intr_set_syncpt_threshold |
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_x/extr_tree.c_x_report_changes.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_x/extr_tree.c_x_report_changes.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, i32, i64 }
%struct.TYPE_10__ = type { i32, i32, ptr }
%struct.TYPE_9__ = type { ptr, ptr }
@txn_changes_iterator_vtable = dso_local global i32 0, align 4
@rev_changes_iterator_vtable = dso_local global i32 0, align 4
@SVN_NO_ERROR = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @x_report_changes], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @x_report_changes(ptr nocapture noundef writeonly %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = alloca ptr, align 8
%6 = tail call ptr @apr_pcalloc(ptr noundef %2, i32 noundef 16) #3
%7 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 2
%8 = load i64, ptr %7, align 8, !tbaa !5
%9 = icmp eq i64 %8, 0
br i1 %9, label %18, label %10
10: ; preds = %4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%11 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 1
%12 = load i32, ptr %11, align 4, !tbaa !11
%13 = tail call i32 @svn_fs_x__root_txn_id(ptr noundef nonnull %1) #3
%14 = call i32 @svn_fs_x__txn_changes_fetch(ptr noundef nonnull %5, i32 noundef %12, i32 noundef %13, ptr noundef %2) #3
%15 = call i32 @SVN_ERR(i32 noundef %14) #3
%16 = load ptr, ptr %5, align 8, !tbaa !12
%17 = call ptr @apr_hash_first(ptr noundef %2, ptr noundef %16) #3
store ptr @txn_changes_iterator_vtable, ptr %6, align 8, !tbaa !14
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
br label %32
18: ; preds = %4
%19 = tail call ptr @svn_pool_create(ptr noundef %2) #3
%20 = tail call ptr @apr_pcalloc(ptr noundef %2, i32 noundef 16) #3
%21 = tail call ptr @svn_pool_create(ptr noundef %2) #3
%22 = getelementptr inbounds %struct.TYPE_10__, ptr %20, i64 0, i32 2
store ptr %21, ptr %22, align 8, !tbaa !16
%23 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 1
%24 = load i32, ptr %23, align 4, !tbaa !11
%25 = load i32, ptr %1, align 8, !tbaa !18
%26 = tail call i32 @svn_fs_x__create_changes_context(ptr noundef %20, i32 noundef %24, i32 noundef %25, ptr noundef %2, ptr noundef %3) #3
%27 = tail call i32 @SVN_ERR(i32 noundef %26) #3
%28 = getelementptr inbounds %struct.TYPE_10__, ptr %20, i64 0, i32 1
%29 = load i32, ptr %20, align 8, !tbaa !19
%30 = tail call i32 @svn_fs_x__get_changes(ptr noundef nonnull %28, i32 noundef %29, ptr noundef %19, ptr noundef %3) #3
%31 = tail call i32 @SVN_ERR(i32 noundef %30) #3
store ptr @rev_changes_iterator_vtable, ptr %6, align 8, !tbaa !14
br label %32
32: ; preds = %18, %10
%33 = phi ptr [ %20, %18 ], [ %17, %10 ]
%34 = getelementptr inbounds %struct.TYPE_9__, ptr %6, i64 0, i32 1
store ptr %33, ptr %34, align 8
store ptr %6, ptr %0, align 8, !tbaa !12
%35 = load ptr, ptr @SVN_NO_ERROR, align 8, !tbaa !12
ret ptr %35
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @apr_pcalloc(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @SVN_ERR(i32 noundef) local_unnamed_addr #2
declare i32 @svn_fs_x__txn_changes_fetch(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @svn_fs_x__root_txn_id(ptr noundef) local_unnamed_addr #2
declare ptr @apr_hash_first(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare ptr @svn_pool_create(ptr noundef) local_unnamed_addr #2
declare i32 @svn_fs_x__create_changes_context(ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @svn_fs_x__get_changes(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_8__", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"TYPE_9__", !13, i64 0, !13, i64 8}
!16 = !{!17, !13, i64 8}
!17 = !{!"TYPE_10__", !7, i64 0, !7, i64 4, !13, i64 8}
!18 = !{!6, !7, i64 0}
!19 = !{!17, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_x/extr_tree.c_x_report_changes.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_x/extr_tree.c_x_report_changes.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@txn_changes_iterator_vtable = common global i32 0, align 4
@rev_changes_iterator_vtable = common global i32 0, align 4
@SVN_NO_ERROR = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @x_report_changes], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @x_report_changes(ptr nocapture noundef writeonly %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = alloca ptr, align 8
%6 = tail call ptr @apr_pcalloc(ptr noundef %2, i32 noundef 16) #3
%7 = getelementptr inbounds i8, ptr %1, i64 8
%8 = load i64, ptr %7, align 8, !tbaa !6
%9 = icmp eq i64 %8, 0
br i1 %9, label %18, label %10
10: ; preds = %4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%11 = getelementptr inbounds i8, ptr %1, i64 4
%12 = load i32, ptr %11, align 4, !tbaa !12
%13 = tail call i32 @svn_fs_x__root_txn_id(ptr noundef nonnull %1) #3
%14 = call i32 @svn_fs_x__txn_changes_fetch(ptr noundef nonnull %5, i32 noundef %12, i32 noundef %13, ptr noundef %2) #3
%15 = call i32 @SVN_ERR(i32 noundef %14) #3
%16 = load ptr, ptr %5, align 8, !tbaa !13
%17 = call ptr @apr_hash_first(ptr noundef %2, ptr noundef %16) #3
store ptr @txn_changes_iterator_vtable, ptr %6, align 8, !tbaa !15
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
br label %32
18: ; preds = %4
%19 = tail call ptr @svn_pool_create(ptr noundef %2) #3
%20 = tail call ptr @apr_pcalloc(ptr noundef %2, i32 noundef 16) #3
%21 = tail call ptr @svn_pool_create(ptr noundef %2) #3
%22 = getelementptr inbounds i8, ptr %20, i64 8
store ptr %21, ptr %22, align 8, !tbaa !17
%23 = getelementptr inbounds i8, ptr %1, i64 4
%24 = load i32, ptr %23, align 4, !tbaa !12
%25 = load i32, ptr %1, align 8, !tbaa !19
%26 = tail call i32 @svn_fs_x__create_changes_context(ptr noundef %20, i32 noundef %24, i32 noundef %25, ptr noundef %2, ptr noundef %3) #3
%27 = tail call i32 @SVN_ERR(i32 noundef %26) #3
%28 = getelementptr inbounds i8, ptr %20, i64 4
%29 = load i32, ptr %20, align 8, !tbaa !20
%30 = tail call i32 @svn_fs_x__get_changes(ptr noundef nonnull %28, i32 noundef %29, ptr noundef %19, ptr noundef %3) #3
%31 = tail call i32 @SVN_ERR(i32 noundef %30) #3
store ptr @rev_changes_iterator_vtable, ptr %6, align 8, !tbaa !15
br label %32
32: ; preds = %18, %10
%33 = phi ptr [ %20, %18 ], [ %17, %10 ]
%34 = getelementptr inbounds i8, ptr %6, i64 8
store ptr %33, ptr %34, align 8
store ptr %6, ptr %0, align 8, !tbaa !13
%35 = load ptr, ptr @SVN_NO_ERROR, align 8, !tbaa !13
ret ptr %35
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @apr_pcalloc(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @SVN_ERR(i32 noundef) local_unnamed_addr #2
declare i32 @svn_fs_x__txn_changes_fetch(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @svn_fs_x__root_txn_id(ptr noundef) local_unnamed_addr #2
declare ptr @apr_hash_first(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare ptr @svn_pool_create(ptr noundef) local_unnamed_addr #2
declare i32 @svn_fs_x__create_changes_context(ptr noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @svn_fs_x__get_changes(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_8__", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !8, i64 4}
!13 = !{!14, !14, i64 0}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"TYPE_9__", !14, i64 0, !14, i64 8}
!17 = !{!18, !14, i64 8}
!18 = !{!"TYPE_10__", !8, i64 0, !8, i64 4, !14, i64 8}
!19 = !{!7, !8, i64 0}
!20 = !{!18, !8, i64 0}
| freebsd_contrib_subversion_subversion_libsvn_fs_x_extr_tree.c_x_report_changes |
; ModuleID = 'AnghaBench/linux/drivers/nvme/host/extr_lightnvm.c_nvme_nvm_rqtocmd.c'
source_filename = "AnghaBench/linux/drivers/nvme/host/extr_lightnvm.c_nvme_nvm_rqtocmd.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.nvm_rq = type { i64, i64, i32, %struct.TYPE_5__, i32 }
%struct.TYPE_5__ = type { i32 }
%struct.TYPE_6__ = type { ptr, ptr, ptr, ptr, i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @nvme_nvm_rqtocmd], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @nvme_nvm_rqtocmd(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2) #0 {
%4 = getelementptr inbounds %struct.nvm_rq, ptr %0, i64 0, i32 4
%5 = load i32, ptr %4, align 8, !tbaa !5
%6 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 5
store i32 %5, ptr %6, align 4, !tbaa !12
%7 = load ptr, ptr %1, align 8, !tbaa !16
%8 = load i32, ptr %7, align 4, !tbaa !18
%9 = tail call i32 @cpu_to_le32(i32 noundef %8) #2
%10 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 4
store i32 %9, ptr %10, align 8, !tbaa !20
%11 = getelementptr inbounds %struct.nvm_rq, ptr %0, i64 0, i32 3
%12 = load i32, ptr %11, align 4, !tbaa !21
%13 = tail call ptr @cpu_to_le64(i32 noundef %12) #2
%14 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 3
store ptr %13, ptr %14, align 8, !tbaa !22
%15 = getelementptr inbounds %struct.nvm_rq, ptr %0, i64 0, i32 2
%16 = load i32, ptr %15, align 8, !tbaa !23
%17 = tail call ptr @cpu_to_le64(i32 noundef %16) #2
%18 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 2
store ptr %17, ptr %18, align 8, !tbaa !24
%19 = getelementptr inbounds %struct.nvm_rq, ptr %0, i64 0, i32 1
%20 = load i64, ptr %19, align 8, !tbaa !25
%21 = tail call ptr @cpu_to_le16(i64 noundef %20) #2
%22 = getelementptr inbounds %struct.TYPE_6__, ptr %2, i64 0, i32 1
store ptr %21, ptr %22, align 8, !tbaa !26
%23 = load i64, ptr %0, align 8, !tbaa !27
%24 = add nsw i64 %23, -1
%25 = tail call ptr @cpu_to_le16(i64 noundef %24) #2
store ptr %25, ptr %2, align 8, !tbaa !28
ret void
}
declare i32 @cpu_to_le32(i32 noundef) local_unnamed_addr #1
declare ptr @cpu_to_le64(i32 noundef) local_unnamed_addr #1
declare ptr @cpu_to_le16(i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 24}
!6 = !{!"nvm_rq", !7, i64 0, !7, i64 8, !10, i64 16, !11, i64 20, !10, i64 24}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"TYPE_5__", !10, i64 0}
!12 = !{!13, !10, i64 36}
!13 = !{!"nvme_nvm_command", !14, i64 0}
!14 = !{!"TYPE_6__", !15, i64 0, !15, i64 8, !15, i64 16, !15, i64 24, !10, i64 32, !10, i64 36}
!15 = !{!"any pointer", !8, i64 0}
!16 = !{!17, !15, i64 0}
!17 = !{!"nvme_ns", !15, i64 0}
!18 = !{!19, !10, i64 0}
!19 = !{!"TYPE_4__", !10, i64 0}
!20 = !{!13, !10, i64 32}
!21 = !{!6, !10, i64 20}
!22 = !{!13, !15, i64 24}
!23 = !{!6, !10, i64 16}
!24 = !{!13, !15, i64 16}
!25 = !{!6, !7, i64 8}
!26 = !{!13, !15, i64 8}
!27 = !{!6, !7, i64 0}
!28 = !{!13, !15, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/nvme/host/extr_lightnvm.c_nvme_nvm_rqtocmd.c'
source_filename = "AnghaBench/linux/drivers/nvme/host/extr_lightnvm.c_nvme_nvm_rqtocmd.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @nvme_nvm_rqtocmd], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @nvme_nvm_rqtocmd(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2) #0 {
%4 = getelementptr inbounds i8, ptr %0, i64 24
%5 = load i32, ptr %4, align 8, !tbaa !6
%6 = getelementptr inbounds i8, ptr %2, i64 36
store i32 %5, ptr %6, align 4, !tbaa !13
%7 = load ptr, ptr %1, align 8, !tbaa !17
%8 = load i32, ptr %7, align 4, !tbaa !19
%9 = tail call i32 @cpu_to_le32(i32 noundef %8) #2
%10 = getelementptr inbounds i8, ptr %2, i64 32
store i32 %9, ptr %10, align 8, !tbaa !21
%11 = getelementptr inbounds i8, ptr %0, i64 20
%12 = load i32, ptr %11, align 4, !tbaa !22
%13 = tail call ptr @cpu_to_le64(i32 noundef %12) #2
%14 = getelementptr inbounds i8, ptr %2, i64 24
store ptr %13, ptr %14, align 8, !tbaa !23
%15 = getelementptr inbounds i8, ptr %0, i64 16
%16 = load i32, ptr %15, align 8, !tbaa !24
%17 = tail call ptr @cpu_to_le64(i32 noundef %16) #2
%18 = getelementptr inbounds i8, ptr %2, i64 16
store ptr %17, ptr %18, align 8, !tbaa !25
%19 = getelementptr inbounds i8, ptr %0, i64 8
%20 = load i64, ptr %19, align 8, !tbaa !26
%21 = tail call ptr @cpu_to_le16(i64 noundef %20) #2
%22 = getelementptr inbounds i8, ptr %2, i64 8
store ptr %21, ptr %22, align 8, !tbaa !27
%23 = load i64, ptr %0, align 8, !tbaa !28
%24 = add nsw i64 %23, -1
%25 = tail call ptr @cpu_to_le16(i64 noundef %24) #2
store ptr %25, ptr %2, align 8, !tbaa !29
ret void
}
declare i32 @cpu_to_le32(i32 noundef) local_unnamed_addr #1
declare ptr @cpu_to_le64(i32 noundef) local_unnamed_addr #1
declare ptr @cpu_to_le16(i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 24}
!7 = !{!"nvm_rq", !8, i64 0, !8, i64 8, !11, i64 16, !12, i64 20, !11, i64 24}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"TYPE_5__", !11, i64 0}
!13 = !{!14, !11, i64 36}
!14 = !{!"nvme_nvm_command", !15, i64 0}
!15 = !{!"TYPE_6__", !16, i64 0, !16, i64 8, !16, i64 16, !16, i64 24, !11, i64 32, !11, i64 36}
!16 = !{!"any pointer", !9, i64 0}
!17 = !{!18, !16, i64 0}
!18 = !{!"nvme_ns", !16, i64 0}
!19 = !{!20, !11, i64 0}
!20 = !{!"TYPE_4__", !11, i64 0}
!21 = !{!14, !11, i64 32}
!22 = !{!7, !11, i64 20}
!23 = !{!14, !16, i64 24}
!24 = !{!7, !11, i64 16}
!25 = !{!14, !16, i64 16}
!26 = !{!7, !8, i64 8}
!27 = !{!14, !16, i64 8}
!28 = !{!7, !8, i64 0}
!29 = !{!14, !16, i64 0}
| linux_drivers_nvme_host_extr_lightnvm.c_nvme_nvm_rqtocmd |
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_global.c_rpost_cmp.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_global.c_rpost_cmp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @rpost_cmp], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @rpost_cmp(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = load i32, ptr %1, align 4, !tbaa !5
%5 = tail call ptr @BB_INFO(i32 noundef %4) #2
%6 = load i32, ptr %5, align 4, !tbaa !9
%7 = tail call ptr @BB_INFO(i32 noundef %3) #2
%8 = load i32, ptr %7, align 4, !tbaa !9
%9 = sub nsw i32 %6, %8
ret i32 %9
}
declare ptr @BB_INFO(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_2__", !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_global.c_rpost_cmp.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_global.c_rpost_cmp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @rpost_cmp], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @rpost_cmp(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = load i32, ptr %1, align 4, !tbaa !6
%5 = tail call ptr @BB_INFO(i32 noundef %4) #2
%6 = load i32, ptr %5, align 4, !tbaa !10
%7 = tail call ptr @BB_INFO(i32 noundef %3) #2
%8 = load i32, ptr %7, align 4, !tbaa !10
%9 = sub nsw i32 %6, %8
ret i32 %9
}
declare ptr @BB_INFO(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
| freebsd_contrib_gcc_extr_global.c_rpost_cmp |
; ModuleID = 'AnghaBench/freebsd/crypto/heimdal/lib/asn1/extr_check-gen.c_cmp_TESTImplicit.c'
source_filename = "AnghaBench/freebsd/crypto/heimdal/lib/asn1/extr_check-gen.c_cmp_TESTImplicit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32 }
@ti1 = dso_local local_unnamed_addr global i32 0, align 4
@ti2 = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
@ti3 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cmp_TESTImplicit], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @cmp_TESTImplicit(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @ti1, align 4, !tbaa !5
%4 = tail call i32 @COMPARE_INTEGER(ptr noundef %0, ptr noundef %1, i32 noundef %3) #2
%5 = load i32, ptr @ti2, align 4, !tbaa !9
%6 = tail call i32 @COMPARE_INTEGER(ptr noundef %0, ptr noundef %1, i32 noundef %5) #2
%7 = load i32, ptr @ti3, align 4, !tbaa !5
%8 = tail call i32 @COMPARE_INTEGER(ptr noundef %0, ptr noundef %1, i32 noundef %7) #2
ret i32 0
}
declare i32 @COMPARE_INTEGER(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_2__", !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/crypto/heimdal/lib/asn1/extr_check-gen.c_cmp_TESTImplicit.c'
source_filename = "AnghaBench/freebsd/crypto/heimdal/lib/asn1/extr_check-gen.c_cmp_TESTImplicit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32 }
@ti1 = common local_unnamed_addr global i32 0, align 4
@ti2 = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
@ti3 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cmp_TESTImplicit], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @cmp_TESTImplicit(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i32, ptr @ti1, align 4, !tbaa !6
%4 = tail call i32 @COMPARE_INTEGER(ptr noundef %0, ptr noundef %1, i32 noundef %3) #2
%5 = load i32, ptr @ti2, align 4, !tbaa !10
%6 = tail call i32 @COMPARE_INTEGER(ptr noundef %0, ptr noundef %1, i32 noundef %5) #2
%7 = load i32, ptr @ti3, align 4, !tbaa !6
%8 = tail call i32 @COMPARE_INTEGER(ptr noundef %0, ptr noundef %1, i32 noundef %7) #2
ret i32 0
}
declare i32 @COMPARE_INTEGER(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
| freebsd_crypto_heimdal_lib_asn1_extr_check-gen.c_cmp_TESTImplicit |
; ModuleID = 'AnghaBench/freebsd/contrib/byacc/extr_reader.c_declare_expect.c'
source_filename = "AnghaBench/freebsd/contrib/byacc/extr_reader.c_declare_expect.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EXPECT = dso_local local_unnamed_addr global i32 0, align 4
@EXPECT_RR = dso_local local_unnamed_addr global i32 0, align 4
@prec = dso_local local_unnamed_addr global i32 0, align 4
@cptr = dso_local local_unnamed_addr global ptr null, align 8
@EOF = dso_local local_unnamed_addr global i32 0, align 4
@SRexpect = dso_local local_unnamed_addr global ptr null, align 8
@RRexpect = dso_local local_unnamed_addr global ptr null, align 8
@lineno = dso_local local_unnamed_addr global i32 0, align 4
@line = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @declare_expect], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @declare_expect(i32 noundef %0) #0 {
%2 = load i32, ptr @EXPECT, align 4, !tbaa !5
%3 = icmp eq i32 %2, %0
%4 = load i32, ptr @EXPECT_RR, align 4
%5 = icmp eq i32 %4, %0
%6 = select i1 %3, i1 true, i1 %5
br i1 %6, label %10, label %7
7: ; preds = %1
%8 = load i32, ptr @prec, align 4, !tbaa !5
%9 = add nsw i32 %8, 1
store i32 %9, ptr @prec, align 4, !tbaa !5
br label %10
10: ; preds = %7, %1
%11 = load ptr, ptr @cptr, align 8, !tbaa !9
%12 = getelementptr inbounds i32, ptr %11, i64 1
store ptr %12, ptr @cptr, align 8, !tbaa !9
%13 = load i32, ptr %12, align 4, !tbaa !5
%14 = load i32, ptr @EOF, align 4, !tbaa !5
%15 = icmp eq i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = tail call i32 (...) @unexpected_EOF() #3
br label %18
18: ; preds = %16, %10
%19 = tail call i64 @isdigit(i32 noundef %13) #3
%20 = icmp eq i64 %19, 0
br i1 %20, label %26, label %21
21: ; preds = %48, %18
%22 = load i32, ptr @EXPECT, align 4, !tbaa !5
%23 = icmp eq i32 %22, %0
%24 = tail call ptr (...) @get_number() #3
%25 = select i1 %23, ptr @SRexpect, ptr @RRexpect
store ptr %24, ptr %25, align 8, !tbaa !9
ret void
26: ; preds = %18, %48
%27 = phi i32 [ %49, %48 ], [ %13, %18 ]
%28 = icmp eq i32 %27, 10
br i1 %28, label %35, label %29
29: ; preds = %26
%30 = tail call i64 @isalpha(i32 noundef %27) #3
%31 = icmp eq i64 %30, 0
br i1 %31, label %32, label %35
32: ; preds = %29
%33 = tail call i32 @isspace(i32 noundef %27) #4
%34 = icmp eq i32 %33, 0
br i1 %34, label %35, label %40
35: ; preds = %32, %29, %26
%36 = load i32, ptr @lineno, align 4, !tbaa !5
%37 = load i32, ptr @line, align 4, !tbaa !5
%38 = load ptr, ptr @cptr, align 8, !tbaa !9
%39 = tail call i32 @syntax_error(i32 noundef %36, i32 noundef %37, ptr noundef %38) #3
br label %48
40: ; preds = %32
%41 = load ptr, ptr @cptr, align 8, !tbaa !9
%42 = getelementptr inbounds i32, ptr %41, i64 1
store ptr %42, ptr @cptr, align 8, !tbaa !9
%43 = load i32, ptr %42, align 4, !tbaa !5
%44 = load i32, ptr @EOF, align 4, !tbaa !5
%45 = icmp eq i32 %43, %44
br i1 %45, label %46, label %48
46: ; preds = %40
%47 = tail call i32 (...) @unexpected_EOF() #3
br label %48
48: ; preds = %35, %46, %40
%49 = phi i32 [ %27, %35 ], [ %43, %46 ], [ %43, %40 ]
%50 = tail call i64 @isdigit(i32 noundef %49) #3
%51 = icmp eq i64 %50, 0
br i1 %51, label %26, label %21
}
declare i32 @unexpected_EOF(...) local_unnamed_addr #1
declare i64 @isdigit(i32 noundef) local_unnamed_addr #1
declare ptr @get_number(...) local_unnamed_addr #1
declare i64 @isalpha(i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(read)
declare i32 @isspace(i32 noundef) local_unnamed_addr #2
declare i32 @syntax_error(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { nounwind willreturn memory(read) }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/byacc/extr_reader.c_declare_expect.c'
source_filename = "AnghaBench/freebsd/contrib/byacc/extr_reader.c_declare_expect.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EXPECT = common local_unnamed_addr global i32 0, align 4
@EXPECT_RR = common local_unnamed_addr global i32 0, align 4
@prec = common local_unnamed_addr global i32 0, align 4
@cptr = common local_unnamed_addr global ptr null, align 8
@EOF = common local_unnamed_addr global i32 0, align 4
@SRexpect = common local_unnamed_addr global ptr null, align 8
@RRexpect = common local_unnamed_addr global ptr null, align 8
@lineno = common local_unnamed_addr global i32 0, align 4
@line = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @declare_expect], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @declare_expect(i32 noundef %0) #0 {
%2 = load i32, ptr @EXPECT, align 4, !tbaa !6
%3 = icmp eq i32 %2, %0
%4 = load i32, ptr @EXPECT_RR, align 4
%5 = icmp eq i32 %4, %0
%6 = select i1 %3, i1 true, i1 %5
br i1 %6, label %10, label %7
7: ; preds = %1
%8 = load i32, ptr @prec, align 4, !tbaa !6
%9 = add nsw i32 %8, 1
store i32 %9, ptr @prec, align 4, !tbaa !6
br label %10
10: ; preds = %7, %1
%11 = load ptr, ptr @cptr, align 8, !tbaa !10
%12 = getelementptr inbounds i8, ptr %11, i64 4
store ptr %12, ptr @cptr, align 8, !tbaa !10
%13 = load i32, ptr %12, align 4, !tbaa !6
%14 = load i32, ptr @EOF, align 4, !tbaa !6
%15 = icmp eq i32 %13, %14
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = tail call i32 @unexpected_EOF() #3
br label %18
18: ; preds = %16, %10
%19 = tail call i64 @isdigit(i32 noundef %13) #3
%20 = icmp eq i64 %19, 0
br i1 %20, label %26, label %21
21: ; preds = %48, %18
%22 = load i32, ptr @EXPECT, align 4, !tbaa !6
%23 = icmp eq i32 %22, %0
%24 = tail call ptr @get_number() #3
%25 = select i1 %23, ptr @SRexpect, ptr @RRexpect
store ptr %24, ptr %25, align 8, !tbaa !10
ret void
26: ; preds = %18, %48
%27 = phi i32 [ %49, %48 ], [ %13, %18 ]
%28 = icmp eq i32 %27, 10
br i1 %28, label %35, label %29
29: ; preds = %26
%30 = tail call i64 @isalpha(i32 noundef %27) #3
%31 = icmp eq i64 %30, 0
br i1 %31, label %32, label %35
32: ; preds = %29
%33 = tail call i32 @isspace(i32 noundef %27) #4
%34 = icmp eq i32 %33, 0
br i1 %34, label %35, label %40
35: ; preds = %32, %29, %26
%36 = load i32, ptr @lineno, align 4, !tbaa !6
%37 = load i32, ptr @line, align 4, !tbaa !6
%38 = load ptr, ptr @cptr, align 8, !tbaa !10
%39 = tail call i32 @syntax_error(i32 noundef %36, i32 noundef %37, ptr noundef %38) #3
br label %48
40: ; preds = %32
%41 = load ptr, ptr @cptr, align 8, !tbaa !10
%42 = getelementptr inbounds i8, ptr %41, i64 4
store ptr %42, ptr @cptr, align 8, !tbaa !10
%43 = load i32, ptr %42, align 4, !tbaa !6
%44 = load i32, ptr @EOF, align 4, !tbaa !6
%45 = icmp eq i32 %43, %44
br i1 %45, label %46, label %48
46: ; preds = %40
%47 = tail call i32 @unexpected_EOF() #3
br label %48
48: ; preds = %35, %46, %40
%49 = phi i32 [ %27, %35 ], [ %43, %46 ], [ %43, %40 ]
%50 = tail call i64 @isdigit(i32 noundef %49) #3
%51 = icmp eq i64 %50, 0
br i1 %51, label %26, label %21
}
declare i32 @unexpected_EOF(...) local_unnamed_addr #1
declare i64 @isdigit(i32 noundef) local_unnamed_addr #1
declare ptr @get_number(...) local_unnamed_addr #1
declare i64 @isalpha(i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(read)
declare i32 @isspace(i32 noundef) local_unnamed_addr #2
declare i32 @syntax_error(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
attributes #4 = { nounwind willreturn memory(read) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
| freebsd_contrib_byacc_extr_reader.c_declare_expect |
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/hns/extr_hns_roce_hw_v1.c_hns_roce_v1_profile.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/hns/extr_hns_roce_hw_v1.c_hns_roce_v1_profile.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.hns_roce_dev = type { i32, i32, i32, i32, %struct.hns_roce_caps }
%struct.hns_roce_caps = type { i32, i32, i32, ptr, ptr, i32, i32, i32, i32, i32, i64, i64, i64, i64, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, ptr, ptr, i32, i32, i32, i32, i32, i32 }
@ROCEE_VENDOR_ID_REG = dso_local local_unnamed_addr global i32 0, align 4
@ROCEE_VENDOR_PART_ID_REG = dso_local local_unnamed_addr global i32 0, align 4
@ROCEE_SYS_IMAGE_GUID_L_REG = dso_local local_unnamed_addr global i32 0, align 4
@ROCEE_SYS_IMAGE_GUID_H_REG = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_HW_VER1 = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_QP_NUM = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_WQE_NUM = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_MIN_WQE_NUM = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_CQ_NUM = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_MIN_CQE_NUM = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_CQE_NUM = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_SG_NUM = dso_local local_unnamed_addr global ptr null, align 8
@HNS_ROCE_V1_INLINE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_UAR_NUM = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_PHY_UAR_NUM = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_AEQE_VEC_NUM = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_COMP_VEC_NUM = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_ABNORMAL_VEC_NUM = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_MTPT_NUM = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_MTT_SEGS = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_PD_NUM = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_QP_INIT_RDMA = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_QP_DEST_RDMA = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_SQ_DESC_SZ = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_RQ_DESC_SZ = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_QPC_ENTRY_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_IRRL_ENTRY_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_CQC_ENTRY_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MTPT_ENTRY_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MTT_ENTRY_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_CQE_ENTRY_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_PAGE_SIZE_SUPPORT = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_TABLE_CHUNK_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_GID_NUM = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_COMP_EQE_NUM = dso_local local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_ASYNC_EQE_NUM = dso_local local_unnamed_addr global i32 0, align 4
@ROCEE_ACK_DELAY_REG = dso_local local_unnamed_addr global i32 0, align 4
@IB_MTU_2048 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @hns_roce_v1_profile], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @hns_roce_v1_profile(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4
%3 = load i32, ptr @ROCEE_VENDOR_ID_REG, align 4, !tbaa !5
%4 = tail call i32 @roce_read(ptr noundef %0, i32 noundef %3) #3
store i32 %4, ptr %0, align 8, !tbaa !9
%5 = load i32, ptr @ROCEE_VENDOR_PART_ID_REG, align 4, !tbaa !5
%6 = tail call i32 @roce_read(ptr noundef nonnull %0, i32 noundef %5) #3
%7 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 1
store i32 %6, ptr %7, align 4, !tbaa !14
%8 = load i32, ptr @ROCEE_SYS_IMAGE_GUID_L_REG, align 4, !tbaa !5
%9 = tail call i32 @roce_read(ptr noundef nonnull %0, i32 noundef %8) #3
%10 = load i32, ptr @ROCEE_SYS_IMAGE_GUID_H_REG, align 4, !tbaa !5
%11 = tail call i32 @roce_read(ptr noundef nonnull %0, i32 noundef %10) #3
%12 = load i32, ptr @HNS_ROCE_HW_VER1, align 4, !tbaa !5
%13 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 3
store i32 %12, ptr %13, align 4, !tbaa !15
%14 = load i32, ptr @HNS_ROCE_V1_MAX_QP_NUM, align 4, !tbaa !5
%15 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 41
store i32 %14, ptr %15, align 4, !tbaa !16
%16 = load i32, ptr @HNS_ROCE_V1_MAX_WQE_NUM, align 4, !tbaa !5
%17 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 40
store i32 %16, ptr %17, align 8, !tbaa !17
%18 = load i32, ptr @HNS_ROCE_MIN_WQE_NUM, align 4, !tbaa !5
%19 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 39
store i32 %18, ptr %19, align 4, !tbaa !18
%20 = load i32, ptr @HNS_ROCE_V1_MAX_CQ_NUM, align 4, !tbaa !5
%21 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 38
store i32 %20, ptr %21, align 8, !tbaa !19
%22 = load i32, ptr @HNS_ROCE_MIN_CQE_NUM, align 4, !tbaa !5
%23 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 37
store i32 %22, ptr %23, align 4, !tbaa !20
%24 = load i32, ptr @HNS_ROCE_V1_MAX_CQE_NUM, align 4, !tbaa !5
%25 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 36
store i32 %24, ptr %25, align 8, !tbaa !21
%26 = load ptr, ptr @HNS_ROCE_V1_SG_NUM, align 8, !tbaa !22
%27 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 35
store ptr %26, ptr %27, align 8, !tbaa !23
%28 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 34
store ptr %26, ptr %28, align 8, !tbaa !24
%29 = load i32, ptr @HNS_ROCE_V1_INLINE_SIZE, align 4, !tbaa !5
%30 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 33
store i32 %29, ptr %30, align 4, !tbaa !25
%31 = load i32, ptr @HNS_ROCE_V1_UAR_NUM, align 4, !tbaa !5
%32 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 32
store i32 %31, ptr %32, align 8, !tbaa !26
%33 = load i32, ptr @HNS_ROCE_V1_PHY_UAR_NUM, align 4, !tbaa !5
%34 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 31
store i32 %33, ptr %34, align 4, !tbaa !27
%35 = load i32, ptr @HNS_ROCE_V1_AEQE_VEC_NUM, align 4, !tbaa !5
%36 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 30
store i32 %35, ptr %36, align 8, !tbaa !28
%37 = load i32, ptr @HNS_ROCE_V1_COMP_VEC_NUM, align 4, !tbaa !5
%38 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 29
store i32 %37, ptr %38, align 4, !tbaa !29
%39 = load i32, ptr @HNS_ROCE_V1_ABNORMAL_VEC_NUM, align 4, !tbaa !5
%40 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 28
store i32 %39, ptr %40, align 8, !tbaa !30
%41 = load i32, ptr @HNS_ROCE_V1_MAX_MTPT_NUM, align 4, !tbaa !5
%42 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 27
store i32 %41, ptr %42, align 4, !tbaa !31
%43 = load i32, ptr @HNS_ROCE_V1_MAX_MTT_SEGS, align 4, !tbaa !5
%44 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 26
store i32 %43, ptr %44, align 8, !tbaa !32
%45 = load i32, ptr @HNS_ROCE_V1_MAX_PD_NUM, align 4, !tbaa !5
%46 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 25
store i32 %45, ptr %46, align 4, !tbaa !33
%47 = load i32, ptr @HNS_ROCE_V1_MAX_QP_INIT_RDMA, align 4, !tbaa !5
%48 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 24
store i32 %47, ptr %48, align 8, !tbaa !34
%49 = load i32, ptr @HNS_ROCE_V1_MAX_QP_DEST_RDMA, align 4, !tbaa !5
%50 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 23
store i32 %49, ptr %50, align 4, !tbaa !35
%51 = load i32, ptr @HNS_ROCE_V1_MAX_SQ_DESC_SZ, align 4, !tbaa !5
%52 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 22
store i32 %51, ptr %52, align 8, !tbaa !36
%53 = load i32, ptr @HNS_ROCE_V1_MAX_RQ_DESC_SZ, align 4, !tbaa !5
%54 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 21
store i32 %53, ptr %54, align 4, !tbaa !37
%55 = load i32, ptr @HNS_ROCE_V1_QPC_ENTRY_SIZE, align 4, !tbaa !5
%56 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 20
store i32 %55, ptr %56, align 8, !tbaa !38
%57 = load i32, ptr @HNS_ROCE_V1_IRRL_ENTRY_SIZE, align 4, !tbaa !5
%58 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 19
store i32 %57, ptr %58, align 4, !tbaa !39
%59 = load i32, ptr @HNS_ROCE_V1_CQC_ENTRY_SIZE, align 4, !tbaa !5
%60 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 18
store i32 %59, ptr %60, align 8, !tbaa !40
%61 = load i32, ptr @HNS_ROCE_V1_MTPT_ENTRY_SIZE, align 4, !tbaa !5
%62 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 17
store i32 %61, ptr %62, align 4, !tbaa !41
%63 = load i32, ptr @HNS_ROCE_V1_MTT_ENTRY_SIZE, align 4, !tbaa !5
%64 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 16
store i32 %63, ptr %64, align 8, !tbaa !42
%65 = load i32, ptr @HNS_ROCE_V1_CQE_ENTRY_SIZE, align 4, !tbaa !5
%66 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 15
store i32 %65, ptr %66, align 4, !tbaa !43
%67 = load i32, ptr @HNS_ROCE_V1_PAGE_SIZE_SUPPORT, align 4, !tbaa !5
%68 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 14
store i32 %67, ptr %68, align 8, !tbaa !44
%69 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 12
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %69, i8 0, i64 16, i1 false)
store i32 1, ptr %2, align 8, !tbaa !45
%70 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 10
%71 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 1
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %70, i8 0, i64 16, i1 false)
store i32 12, ptr %71, align 4, !tbaa !46
%72 = load i32, ptr @HNS_ROCE_V1_TABLE_CHUNK_SIZE, align 4, !tbaa !5
%73 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 9
store i32 %72, ptr %73, align 8, !tbaa !47
%74 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 2
%75 = load i32, ptr %74, align 8, !tbaa !48
%76 = icmp sgt i32 %75, 0
br i1 %76, label %77, label %107
77: ; preds = %1
%78 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 3
%79 = load ptr, ptr %78, align 8, !tbaa !49
br label %85
80: ; preds = %85
%81 = icmp sgt i32 %89, 0
br i1 %81, label %82, label %107
82: ; preds = %80
%83 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 4
%84 = load ptr, ptr %83, align 8, !tbaa !50
br label %92
85: ; preds = %77, %85
%86 = phi i64 [ 0, %77 ], [ %88, %85 ]
%87 = getelementptr inbounds i32, ptr %79, i64 %86
store i32 1, ptr %87, align 4, !tbaa !5
%88 = add nuw nsw i64 %86, 1
%89 = load i32, ptr %74, align 8, !tbaa !48
%90 = sext i32 %89 to i64
%91 = icmp slt i64 %88, %90
br i1 %91, label %85, label %80, !llvm.loop !51
92: ; preds = %82, %92
%93 = phi i64 [ 0, %82 ], [ %103, %92 ]
%94 = phi i32 [ %89, %82 ], [ %104, %92 ]
%95 = load i32, ptr @HNS_ROCE_V1_GID_NUM, align 4, !tbaa !5
%96 = srem i32 %95, %94
%97 = sext i32 %96 to i64
%98 = icmp slt i64 %93, %97
%99 = sdiv i32 %95, %94
%100 = zext i1 %98 to i32
%101 = add nsw i32 %99, %100
%102 = getelementptr inbounds i32, ptr %84, i64 %93
store i32 %101, ptr %102, align 4, !tbaa !5
%103 = add nuw nsw i64 %93, 1
%104 = load i32, ptr %74, align 8, !tbaa !48
%105 = sext i32 %104 to i64
%106 = icmp slt i64 %103, %105
br i1 %106, label %92, label %107, !llvm.loop !53
107: ; preds = %92, %1, %80
%108 = load i32, ptr @HNS_ROCE_V1_COMP_EQE_NUM, align 4, !tbaa !5
%109 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 8
store i32 %108, ptr %109, align 4, !tbaa !54
%110 = load i32, ptr @HNS_ROCE_V1_ASYNC_EQE_NUM, align 4, !tbaa !5
%111 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 7
store i32 %110, ptr %111, align 8, !tbaa !55
%112 = load i32, ptr @ROCEE_ACK_DELAY_REG, align 4, !tbaa !5
%113 = tail call i32 @roce_read(ptr noundef nonnull %0, i32 noundef %112) #3
%114 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 5
store i32 %113, ptr %114, align 8, !tbaa !56
%115 = load i32, ptr @IB_MTU_2048, align 4, !tbaa !5
%116 = getelementptr inbounds %struct.hns_roce_dev, ptr %0, i64 0, i32 4, i32 6
store i32 %115, ptr %116, align 4, !tbaa !57
ret i32 0
}
declare i32 @roce_read(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"hns_roce_dev", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !11, i64 16}
!11 = !{!"hns_roce_caps", !6, i64 0, !6, i64 4, !6, i64 8, !12, i64 16, !12, i64 24, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !6, i64 48, !13, i64 56, !13, i64 64, !13, i64 72, !13, i64 80, !6, i64 88, !6, i64 92, !6, i64 96, !6, i64 100, !6, i64 104, !6, i64 108, !6, i64 112, !6, i64 116, !6, i64 120, !6, i64 124, !6, i64 128, !6, i64 132, !6, i64 136, !6, i64 140, !6, i64 144, !6, i64 148, !6, i64 152, !6, i64 156, !6, i64 160, !6, i64 164, !12, i64 168, !12, i64 176, !6, i64 184, !6, i64 188, !6, i64 192, !6, i64 196, !6, i64 200, !6, i64 204}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!"long", !7, i64 0}
!14 = !{!10, !6, i64 4}
!15 = !{!10, !6, i64 12}
!16 = !{!11, !6, i64 204}
!17 = !{!11, !6, i64 200}
!18 = !{!11, !6, i64 196}
!19 = !{!11, !6, i64 192}
!20 = !{!11, !6, i64 188}
!21 = !{!11, !6, i64 184}
!22 = !{!12, !12, i64 0}
!23 = !{!11, !12, i64 176}
!24 = !{!11, !12, i64 168}
!25 = !{!11, !6, i64 164}
!26 = !{!11, !6, i64 160}
!27 = !{!11, !6, i64 156}
!28 = !{!11, !6, i64 152}
!29 = !{!11, !6, i64 148}
!30 = !{!11, !6, i64 144}
!31 = !{!11, !6, i64 140}
!32 = !{!11, !6, i64 136}
!33 = !{!11, !6, i64 132}
!34 = !{!11, !6, i64 128}
!35 = !{!11, !6, i64 124}
!36 = !{!11, !6, i64 120}
!37 = !{!11, !6, i64 116}
!38 = !{!11, !6, i64 112}
!39 = !{!11, !6, i64 108}
!40 = !{!11, !6, i64 104}
!41 = !{!11, !6, i64 100}
!42 = !{!11, !6, i64 96}
!43 = !{!11, !6, i64 92}
!44 = !{!11, !6, i64 88}
!45 = !{!11, !6, i64 0}
!46 = !{!11, !6, i64 4}
!47 = !{!11, !6, i64 48}
!48 = !{!11, !6, i64 8}
!49 = !{!11, !12, i64 16}
!50 = !{!11, !12, i64 24}
!51 = distinct !{!51, !52}
!52 = !{!"llvm.loop.mustprogress"}
!53 = distinct !{!53, !52}
!54 = !{!11, !6, i64 44}
!55 = !{!11, !6, i64 40}
!56 = !{!11, !6, i64 32}
!57 = !{!11, !6, i64 36}
| ; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/hns/extr_hns_roce_hw_v1.c_hns_roce_v1_profile.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/hns/extr_hns_roce_hw_v1.c_hns_roce_v1_profile.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ROCEE_VENDOR_ID_REG = common local_unnamed_addr global i32 0, align 4
@ROCEE_VENDOR_PART_ID_REG = common local_unnamed_addr global i32 0, align 4
@ROCEE_SYS_IMAGE_GUID_L_REG = common local_unnamed_addr global i32 0, align 4
@ROCEE_SYS_IMAGE_GUID_H_REG = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_HW_VER1 = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_QP_NUM = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_WQE_NUM = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_MIN_WQE_NUM = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_CQ_NUM = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_MIN_CQE_NUM = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_CQE_NUM = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_SG_NUM = common local_unnamed_addr global ptr null, align 8
@HNS_ROCE_V1_INLINE_SIZE = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_UAR_NUM = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_PHY_UAR_NUM = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_AEQE_VEC_NUM = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_COMP_VEC_NUM = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_ABNORMAL_VEC_NUM = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_MTPT_NUM = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_MTT_SEGS = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_PD_NUM = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_QP_INIT_RDMA = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_QP_DEST_RDMA = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_SQ_DESC_SZ = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MAX_RQ_DESC_SZ = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_QPC_ENTRY_SIZE = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_IRRL_ENTRY_SIZE = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_CQC_ENTRY_SIZE = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MTPT_ENTRY_SIZE = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_MTT_ENTRY_SIZE = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_CQE_ENTRY_SIZE = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_PAGE_SIZE_SUPPORT = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_TABLE_CHUNK_SIZE = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_GID_NUM = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_COMP_EQE_NUM = common local_unnamed_addr global i32 0, align 4
@HNS_ROCE_V1_ASYNC_EQE_NUM = common local_unnamed_addr global i32 0, align 4
@ROCEE_ACK_DELAY_REG = common local_unnamed_addr global i32 0, align 4
@IB_MTU_2048 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @hns_roce_v1_profile], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @hns_roce_v1_profile(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load i32, ptr @ROCEE_VENDOR_ID_REG, align 4, !tbaa !6
%4 = tail call i32 @roce_read(ptr noundef %0, i32 noundef %3) #3
store i32 %4, ptr %0, align 8, !tbaa !10
%5 = load i32, ptr @ROCEE_VENDOR_PART_ID_REG, align 4, !tbaa !6
%6 = tail call i32 @roce_read(ptr noundef nonnull %0, i32 noundef %5) #3
%7 = getelementptr inbounds i8, ptr %0, i64 4
store i32 %6, ptr %7, align 4, !tbaa !15
%8 = load i32, ptr @ROCEE_SYS_IMAGE_GUID_L_REG, align 4, !tbaa !6
%9 = tail call i32 @roce_read(ptr noundef nonnull %0, i32 noundef %8) #3
%10 = load i32, ptr @ROCEE_SYS_IMAGE_GUID_H_REG, align 4, !tbaa !6
%11 = tail call i32 @roce_read(ptr noundef nonnull %0, i32 noundef %10) #3
%12 = load i32, ptr @HNS_ROCE_HW_VER1, align 4, !tbaa !6
%13 = getelementptr inbounds i8, ptr %0, i64 12
store i32 %12, ptr %13, align 4, !tbaa !16
%14 = load i32, ptr @HNS_ROCE_V1_MAX_QP_NUM, align 4, !tbaa !6
%15 = getelementptr inbounds i8, ptr %0, i64 220
store i32 %14, ptr %15, align 4, !tbaa !17
%16 = load i32, ptr @HNS_ROCE_V1_MAX_WQE_NUM, align 4, !tbaa !6
%17 = getelementptr inbounds i8, ptr %0, i64 216
store i32 %16, ptr %17, align 8, !tbaa !18
%18 = load i32, ptr @HNS_ROCE_MIN_WQE_NUM, align 4, !tbaa !6
%19 = getelementptr inbounds i8, ptr %0, i64 212
store i32 %18, ptr %19, align 4, !tbaa !19
%20 = load i32, ptr @HNS_ROCE_V1_MAX_CQ_NUM, align 4, !tbaa !6
%21 = getelementptr inbounds i8, ptr %0, i64 208
store i32 %20, ptr %21, align 8, !tbaa !20
%22 = load i32, ptr @HNS_ROCE_MIN_CQE_NUM, align 4, !tbaa !6
%23 = getelementptr inbounds i8, ptr %0, i64 204
store i32 %22, ptr %23, align 4, !tbaa !21
%24 = load i32, ptr @HNS_ROCE_V1_MAX_CQE_NUM, align 4, !tbaa !6
%25 = getelementptr inbounds i8, ptr %0, i64 200
store i32 %24, ptr %25, align 8, !tbaa !22
%26 = load ptr, ptr @HNS_ROCE_V1_SG_NUM, align 8, !tbaa !23
%27 = getelementptr inbounds i8, ptr %0, i64 192
store ptr %26, ptr %27, align 8, !tbaa !24
%28 = getelementptr inbounds i8, ptr %0, i64 184
store ptr %26, ptr %28, align 8, !tbaa !25
%29 = load i32, ptr @HNS_ROCE_V1_INLINE_SIZE, align 4, !tbaa !6
%30 = getelementptr inbounds i8, ptr %0, i64 180
store i32 %29, ptr %30, align 4, !tbaa !26
%31 = load i32, ptr @HNS_ROCE_V1_UAR_NUM, align 4, !tbaa !6
%32 = getelementptr inbounds i8, ptr %0, i64 176
store i32 %31, ptr %32, align 8, !tbaa !27
%33 = load i32, ptr @HNS_ROCE_V1_PHY_UAR_NUM, align 4, !tbaa !6
%34 = getelementptr inbounds i8, ptr %0, i64 172
store i32 %33, ptr %34, align 4, !tbaa !28
%35 = load i32, ptr @HNS_ROCE_V1_AEQE_VEC_NUM, align 4, !tbaa !6
%36 = getelementptr inbounds i8, ptr %0, i64 168
store i32 %35, ptr %36, align 8, !tbaa !29
%37 = load i32, ptr @HNS_ROCE_V1_COMP_VEC_NUM, align 4, !tbaa !6
%38 = getelementptr inbounds i8, ptr %0, i64 164
store i32 %37, ptr %38, align 4, !tbaa !30
%39 = load i32, ptr @HNS_ROCE_V1_ABNORMAL_VEC_NUM, align 4, !tbaa !6
%40 = getelementptr inbounds i8, ptr %0, i64 160
store i32 %39, ptr %40, align 8, !tbaa !31
%41 = load i32, ptr @HNS_ROCE_V1_MAX_MTPT_NUM, align 4, !tbaa !6
%42 = getelementptr inbounds i8, ptr %0, i64 156
store i32 %41, ptr %42, align 4, !tbaa !32
%43 = load i32, ptr @HNS_ROCE_V1_MAX_MTT_SEGS, align 4, !tbaa !6
%44 = getelementptr inbounds i8, ptr %0, i64 152
store i32 %43, ptr %44, align 8, !tbaa !33
%45 = load i32, ptr @HNS_ROCE_V1_MAX_PD_NUM, align 4, !tbaa !6
%46 = getelementptr inbounds i8, ptr %0, i64 148
store i32 %45, ptr %46, align 4, !tbaa !34
%47 = load i32, ptr @HNS_ROCE_V1_MAX_QP_INIT_RDMA, align 4, !tbaa !6
%48 = getelementptr inbounds i8, ptr %0, i64 144
store i32 %47, ptr %48, align 8, !tbaa !35
%49 = load i32, ptr @HNS_ROCE_V1_MAX_QP_DEST_RDMA, align 4, !tbaa !6
%50 = getelementptr inbounds i8, ptr %0, i64 140
store i32 %49, ptr %50, align 4, !tbaa !36
%51 = load i32, ptr @HNS_ROCE_V1_MAX_SQ_DESC_SZ, align 4, !tbaa !6
%52 = getelementptr inbounds i8, ptr %0, i64 136
store i32 %51, ptr %52, align 8, !tbaa !37
%53 = load i32, ptr @HNS_ROCE_V1_MAX_RQ_DESC_SZ, align 4, !tbaa !6
%54 = getelementptr inbounds i8, ptr %0, i64 132
store i32 %53, ptr %54, align 4, !tbaa !38
%55 = load i32, ptr @HNS_ROCE_V1_QPC_ENTRY_SIZE, align 4, !tbaa !6
%56 = getelementptr inbounds i8, ptr %0, i64 128
store i32 %55, ptr %56, align 8, !tbaa !39
%57 = load i32, ptr @HNS_ROCE_V1_IRRL_ENTRY_SIZE, align 4, !tbaa !6
%58 = getelementptr inbounds i8, ptr %0, i64 124
store i32 %57, ptr %58, align 4, !tbaa !40
%59 = load i32, ptr @HNS_ROCE_V1_CQC_ENTRY_SIZE, align 4, !tbaa !6
%60 = getelementptr inbounds i8, ptr %0, i64 120
store i32 %59, ptr %60, align 8, !tbaa !41
%61 = load i32, ptr @HNS_ROCE_V1_MTPT_ENTRY_SIZE, align 4, !tbaa !6
%62 = getelementptr inbounds i8, ptr %0, i64 116
store i32 %61, ptr %62, align 4, !tbaa !42
%63 = load i32, ptr @HNS_ROCE_V1_MTT_ENTRY_SIZE, align 4, !tbaa !6
%64 = getelementptr inbounds i8, ptr %0, i64 112
store i32 %63, ptr %64, align 8, !tbaa !43
%65 = load i32, ptr @HNS_ROCE_V1_CQE_ENTRY_SIZE, align 4, !tbaa !6
%66 = getelementptr inbounds i8, ptr %0, i64 108
store i32 %65, ptr %66, align 4, !tbaa !44
%67 = load i32, ptr @HNS_ROCE_V1_PAGE_SIZE_SUPPORT, align 4, !tbaa !6
%68 = getelementptr inbounds i8, ptr %0, i64 104
store i32 %67, ptr %68, align 8, !tbaa !45
%69 = getelementptr inbounds i8, ptr %0, i64 88
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %69, i8 0, i64 16, i1 false)
%70 = getelementptr inbounds i8, ptr %0, i64 72
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %70, i8 0, i64 16, i1 false)
store <2 x i32> <i32 1, i32 12>, ptr %2, align 8, !tbaa !6
%71 = load i32, ptr @HNS_ROCE_V1_TABLE_CHUNK_SIZE, align 4, !tbaa !6
%72 = getelementptr inbounds i8, ptr %0, i64 64
store i32 %71, ptr %72, align 8, !tbaa !46
%73 = getelementptr inbounds i8, ptr %0, i64 24
%74 = load i32, ptr %73, align 8, !tbaa !47
%75 = icmp sgt i32 %74, 0
br i1 %75, label %76, label %109
76: ; preds = %1
%77 = getelementptr inbounds i8, ptr %0, i64 32
%78 = load ptr, ptr %77, align 8, !tbaa !48
br label %84
79: ; preds = %84
%80 = icmp sgt i32 %88, 0
br i1 %80, label %81, label %109
81: ; preds = %79
%82 = getelementptr inbounds i8, ptr %0, i64 40
%83 = load ptr, ptr %82, align 8, !tbaa !49
br label %91
84: ; preds = %76, %84
%85 = phi i64 [ 0, %76 ], [ %87, %84 ]
%86 = getelementptr inbounds i32, ptr %78, i64 %85
store i32 1, ptr %86, align 4, !tbaa !6
%87 = add nuw nsw i64 %85, 1
%88 = load i32, ptr %73, align 8, !tbaa !47
%89 = sext i32 %88 to i64
%90 = icmp slt i64 %87, %89
br i1 %90, label %84, label %79, !llvm.loop !50
91: ; preds = %81, %91
%92 = phi i64 [ 0, %81 ], [ %105, %91 ]
%93 = phi i32 [ %88, %81 ], [ %106, %91 ]
%94 = load i32, ptr @HNS_ROCE_V1_GID_NUM, align 4, !tbaa !6
%95 = freeze i32 %94
%96 = freeze i32 %93
%97 = sdiv i32 %95, %96
%98 = mul i32 %97, %96
%99 = sub i32 %95, %98
%100 = sext i32 %99 to i64
%101 = icmp slt i64 %92, %100
%102 = zext i1 %101 to i32
%103 = add nsw i32 %97, %102
%104 = getelementptr inbounds i32, ptr %83, i64 %92
store i32 %103, ptr %104, align 4, !tbaa !6
%105 = add nuw nsw i64 %92, 1
%106 = load i32, ptr %73, align 8, !tbaa !47
%107 = sext i32 %106 to i64
%108 = icmp slt i64 %105, %107
br i1 %108, label %91, label %109, !llvm.loop !52
109: ; preds = %91, %1, %79
%110 = load i32, ptr @HNS_ROCE_V1_COMP_EQE_NUM, align 4, !tbaa !6
%111 = getelementptr inbounds i8, ptr %0, i64 60
store i32 %110, ptr %111, align 4, !tbaa !53
%112 = load i32, ptr @HNS_ROCE_V1_ASYNC_EQE_NUM, align 4, !tbaa !6
%113 = getelementptr inbounds i8, ptr %0, i64 56
store i32 %112, ptr %113, align 8, !tbaa !54
%114 = load i32, ptr @ROCEE_ACK_DELAY_REG, align 4, !tbaa !6
%115 = tail call i32 @roce_read(ptr noundef nonnull %0, i32 noundef %114) #3
%116 = getelementptr inbounds i8, ptr %0, i64 48
store i32 %115, ptr %116, align 8, !tbaa !55
%117 = load i32, ptr @IB_MTU_2048, align 4, !tbaa !6
%118 = getelementptr inbounds i8, ptr %0, i64 52
store i32 %117, ptr %118, align 4, !tbaa !56
ret i32 0
}
declare i32 @roce_read(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"hns_roce_dev", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !12, i64 16}
!12 = !{!"hns_roce_caps", !7, i64 0, !7, i64 4, !7, i64 8, !13, i64 16, !13, i64 24, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !7, i64 48, !14, i64 56, !14, i64 64, !14, i64 72, !14, i64 80, !7, i64 88, !7, i64 92, !7, i64 96, !7, i64 100, !7, i64 104, !7, i64 108, !7, i64 112, !7, i64 116, !7, i64 120, !7, i64 124, !7, i64 128, !7, i64 132, !7, i64 136, !7, i64 140, !7, i64 144, !7, i64 148, !7, i64 152, !7, i64 156, !7, i64 160, !7, i64 164, !13, i64 168, !13, i64 176, !7, i64 184, !7, i64 188, !7, i64 192, !7, i64 196, !7, i64 200, !7, i64 204}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!11, !7, i64 4}
!16 = !{!11, !7, i64 12}
!17 = !{!12, !7, i64 204}
!18 = !{!12, !7, i64 200}
!19 = !{!12, !7, i64 196}
!20 = !{!12, !7, i64 192}
!21 = !{!12, !7, i64 188}
!22 = !{!12, !7, i64 184}
!23 = !{!13, !13, i64 0}
!24 = !{!12, !13, i64 176}
!25 = !{!12, !13, i64 168}
!26 = !{!12, !7, i64 164}
!27 = !{!12, !7, i64 160}
!28 = !{!12, !7, i64 156}
!29 = !{!12, !7, i64 152}
!30 = !{!12, !7, i64 148}
!31 = !{!12, !7, i64 144}
!32 = !{!12, !7, i64 140}
!33 = !{!12, !7, i64 136}
!34 = !{!12, !7, i64 132}
!35 = !{!12, !7, i64 128}
!36 = !{!12, !7, i64 124}
!37 = !{!12, !7, i64 120}
!38 = !{!12, !7, i64 116}
!39 = !{!12, !7, i64 112}
!40 = !{!12, !7, i64 108}
!41 = !{!12, !7, i64 104}
!42 = !{!12, !7, i64 100}
!43 = !{!12, !7, i64 96}
!44 = !{!12, !7, i64 92}
!45 = !{!12, !7, i64 88}
!46 = !{!12, !7, i64 48}
!47 = !{!12, !7, i64 8}
!48 = !{!12, !13, i64 16}
!49 = !{!12, !13, i64 24}
!50 = distinct !{!50, !51}
!51 = !{!"llvm.loop.mustprogress"}
!52 = distinct !{!52, !51}
!53 = !{!12, !7, i64 44}
!54 = !{!12, !7, i64 40}
!55 = !{!12, !7, i64 32}
!56 = !{!12, !7, i64 36}
| linux_drivers_infiniband_hw_hns_extr_hns_roce_hw_v1.c_hns_roce_v1_profile |
; ModuleID = 'AnghaBench/freebsd/contrib/lua/src/extr_lua.c_main.c'
source_filename = "AnghaBench/freebsd/contrib/lua/src/extr_lua.c_main.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [39 x i8] c"cannot create state: not enough memory\00", align 1
@EXIT_FAILURE = dso_local local_unnamed_addr global i32 0, align 4
@pmain = dso_local global i32 0, align 4
@LUA_OK = dso_local local_unnamed_addr global i32 0, align 4
@EXIT_SUCCESS = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @main(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr (...) @luaL_newstate() #2
%4 = icmp eq ptr %3, null
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = load ptr, ptr %1, align 8, !tbaa !5
%7 = tail call i32 @l_message(ptr noundef %6, ptr noundef nonnull @.str) #2
br label %21
8: ; preds = %2
%9 = tail call i32 @lua_pushcfunction(ptr noundef nonnull %3, ptr noundef nonnull @pmain) #2
%10 = tail call i32 @lua_pushinteger(ptr noundef nonnull %3, i32 noundef %0) #2
%11 = tail call i32 @lua_pushlightuserdata(ptr noundef nonnull %3, ptr noundef %1) #2
%12 = tail call i32 @lua_pcall(ptr noundef nonnull %3, i32 noundef 2, i32 noundef 1, i32 noundef 0) #2
%13 = tail call i32 @lua_toboolean(ptr noundef nonnull %3, i32 noundef -1) #2
%14 = tail call i32 @report(ptr noundef nonnull %3, i32 noundef %12) #2
%15 = tail call i32 @lua_close(ptr noundef nonnull %3) #2
%16 = icmp ne i32 %13, 0
%17 = load i32, ptr @LUA_OK, align 4
%18 = icmp eq i32 %12, %17
%19 = select i1 %16, i1 %18, i1 false
%20 = select i1 %19, ptr @EXIT_SUCCESS, ptr @EXIT_FAILURE
br label %21
21: ; preds = %8, %5
%22 = phi ptr [ @EXIT_FAILURE, %5 ], [ %20, %8 ]
%23 = load i32, ptr %22, align 4, !tbaa !9
ret i32 %23
}
declare ptr @luaL_newstate(...) local_unnamed_addr #1
declare i32 @l_message(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @lua_pushcfunction(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @lua_pushinteger(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_pushlightuserdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @lua_pcall(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_toboolean(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @report(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_close(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/lua/src/extr_lua.c_main.c'
source_filename = "AnghaBench/freebsd/contrib/lua/src/extr_lua.c_main.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [39 x i8] c"cannot create state: not enough memory\00", align 1
@EXIT_FAILURE = common local_unnamed_addr global i32 0, align 4
@pmain = common global i32 0, align 4
@LUA_OK = common local_unnamed_addr global i32 0, align 4
@EXIT_SUCCESS = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @main(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @luaL_newstate() #2
%4 = icmp eq ptr %3, null
br i1 %4, label %5, label %8
5: ; preds = %2
%6 = load ptr, ptr %1, align 8, !tbaa !6
%7 = tail call i32 @l_message(ptr noundef %6, ptr noundef nonnull @.str) #2
br label %21
8: ; preds = %2
%9 = tail call i32 @lua_pushcfunction(ptr noundef nonnull %3, ptr noundef nonnull @pmain) #2
%10 = tail call i32 @lua_pushinteger(ptr noundef nonnull %3, i32 noundef %0) #2
%11 = tail call i32 @lua_pushlightuserdata(ptr noundef nonnull %3, ptr noundef %1) #2
%12 = tail call i32 @lua_pcall(ptr noundef nonnull %3, i32 noundef 2, i32 noundef 1, i32 noundef 0) #2
%13 = tail call i32 @lua_toboolean(ptr noundef nonnull %3, i32 noundef -1) #2
%14 = tail call i32 @report(ptr noundef nonnull %3, i32 noundef %12) #2
%15 = tail call i32 @lua_close(ptr noundef nonnull %3) #2
%16 = icmp ne i32 %13, 0
%17 = load i32, ptr @LUA_OK, align 4
%18 = icmp eq i32 %12, %17
%19 = select i1 %16, i1 %18, i1 false
%20 = select i1 %19, ptr @EXIT_SUCCESS, ptr @EXIT_FAILURE
br label %21
21: ; preds = %8, %5
%22 = phi ptr [ @EXIT_FAILURE, %5 ], [ %20, %8 ]
%23 = load i32, ptr %22, align 4, !tbaa !10
ret i32 %23
}
declare ptr @luaL_newstate(...) local_unnamed_addr #1
declare i32 @l_message(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @lua_pushcfunction(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @lua_pushinteger(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_pushlightuserdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @lua_pcall(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_toboolean(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @report(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_close(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| freebsd_contrib_lua_src_extr_lua.c_main |
; ModuleID = 'AnghaBench/Provenance/Cores/FCEU/FCEU/lua/src/extr_lvm.c_luaV_equalval.c'
source_filename = "AnghaBench/Provenance/Cores/FCEU/FCEU/lua/src/extr_lvm.c_luaV_equalval.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@TM_EQ = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @luaV_equalval(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = tail call i32 @ttype(ptr noundef %1) #2
%5 = tail call i32 @ttype(ptr noundef %2) #2
%6 = icmp eq i32 %4, %5
%7 = zext i1 %6 to i32
%8 = tail call i32 @lua_assert(i32 noundef %7) #2
%9 = tail call i32 @ttype(ptr noundef %1) #2
switch i32 %9, label %40 [
i32 131, label %59
i32 130, label %10
i32 133, label %14
i32 132, label %19
i32 128, label %24
i32 129, label %32
]
10: ; preds = %3
%11 = tail call i32 @nvalue(ptr noundef %1) #2
%12 = tail call i32 @nvalue(ptr noundef %2) #2
%13 = tail call i32 @luai_numeq(i32 noundef %11, i32 noundef %12) #2
br label %59
14: ; preds = %3
%15 = tail call i32 @bvalue(ptr noundef %1) #2
%16 = tail call i32 @bvalue(ptr noundef %2) #2
%17 = icmp eq i32 %15, %16
%18 = zext i1 %17 to i32
br label %59
19: ; preds = %3
%20 = tail call i32 @pvalue(ptr noundef %1) #2
%21 = tail call i32 @pvalue(ptr noundef %2) #2
%22 = icmp eq i32 %20, %21
%23 = zext i1 %22 to i32
br label %59
24: ; preds = %3
%25 = tail call ptr @uvalue(ptr noundef %1) #2
%26 = tail call ptr @uvalue(ptr noundef %2) #2
%27 = icmp eq ptr %25, %26
br i1 %27, label %59, label %28
28: ; preds = %24
%29 = tail call ptr @uvalue(ptr noundef %1) #2
%30 = load i32, ptr %29, align 4, !tbaa !5
%31 = tail call ptr @uvalue(ptr noundef %2) #2
br label %45
32: ; preds = %3
%33 = tail call ptr @hvalue(ptr noundef %1) #2
%34 = tail call ptr @hvalue(ptr noundef %2) #2
%35 = icmp eq ptr %33, %34
br i1 %35, label %59, label %36
36: ; preds = %32
%37 = tail call ptr @hvalue(ptr noundef %1) #2
%38 = load i32, ptr %37, align 4, !tbaa !10
%39 = tail call ptr @hvalue(ptr noundef %2) #2
br label %45
40: ; preds = %3
%41 = tail call i32 @gcvalue(ptr noundef %1) #2
%42 = tail call i32 @gcvalue(ptr noundef %2) #2
%43 = icmp eq i32 %41, %42
%44 = zext i1 %43 to i32
br label %59
45: ; preds = %36, %28
%46 = phi ptr [ %39, %36 ], [ %31, %28 ]
%47 = phi i32 [ %38, %36 ], [ %30, %28 ]
%48 = load i32, ptr %46, align 4, !tbaa !12
%49 = load i32, ptr @TM_EQ, align 4, !tbaa !12
%50 = tail call ptr @get_compTM(ptr noundef %0, i32 noundef %47, i32 noundef %48, i32 noundef %49) #2
%51 = icmp eq ptr %50, null
br i1 %51, label %59, label %52
52: ; preds = %45
%53 = load i32, ptr %0, align 4, !tbaa !13
%54 = tail call i32 @callTMres(ptr noundef nonnull %0, i32 noundef %53, ptr noundef nonnull %50, ptr noundef %1, ptr noundef %2) #2
%55 = load i32, ptr %0, align 4, !tbaa !13
%56 = tail call i32 @l_isfalse(i32 noundef %55) #2
%57 = icmp eq i32 %56, 0
%58 = zext i1 %57 to i32
br label %59
59: ; preds = %45, %32, %24, %3, %52, %40, %19, %14, %10
%60 = phi i32 [ %44, %40 ], [ %58, %52 ], [ %23, %19 ], [ %18, %14 ], [ %13, %10 ], [ 1, %3 ], [ 1, %24 ], [ 1, %32 ], [ 0, %45 ]
ret i32 %60
}
declare i32 @lua_assert(i32 noundef) local_unnamed_addr #1
declare i32 @ttype(ptr noundef) local_unnamed_addr #1
declare i32 @luai_numeq(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @nvalue(ptr noundef) local_unnamed_addr #1
declare i32 @bvalue(ptr noundef) local_unnamed_addr #1
declare i32 @pvalue(ptr noundef) local_unnamed_addr #1
declare ptr @uvalue(ptr noundef) local_unnamed_addr #1
declare ptr @get_compTM(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @hvalue(ptr noundef) local_unnamed_addr #1
declare i32 @gcvalue(ptr noundef) local_unnamed_addr #1
declare i32 @callTMres(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @l_isfalse(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_8__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_9__", !7, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_7__", !7, i64 0}
| ; ModuleID = 'AnghaBench/Provenance/Cores/FCEU/FCEU/lua/src/extr_lvm.c_luaV_equalval.c'
source_filename = "AnghaBench/Provenance/Cores/FCEU/FCEU/lua/src/extr_lvm.c_luaV_equalval.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@TM_EQ = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @luaV_equalval(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = tail call i32 @ttype(ptr noundef %1) #2
%5 = tail call i32 @ttype(ptr noundef %2) #2
%6 = icmp eq i32 %4, %5
%7 = zext i1 %6 to i32
%8 = tail call i32 @lua_assert(i32 noundef %7) #2
%9 = tail call i32 @ttype(ptr noundef %1) #2
switch i32 %9, label %40 [
i32 131, label %59
i32 130, label %10
i32 133, label %14
i32 132, label %19
i32 128, label %24
i32 129, label %32
]
10: ; preds = %3
%11 = tail call i32 @nvalue(ptr noundef %1) #2
%12 = tail call i32 @nvalue(ptr noundef %2) #2
%13 = tail call i32 @luai_numeq(i32 noundef %11, i32 noundef %12) #2
br label %59
14: ; preds = %3
%15 = tail call i32 @bvalue(ptr noundef %1) #2
%16 = tail call i32 @bvalue(ptr noundef %2) #2
%17 = icmp eq i32 %15, %16
%18 = zext i1 %17 to i32
br label %59
19: ; preds = %3
%20 = tail call i32 @pvalue(ptr noundef %1) #2
%21 = tail call i32 @pvalue(ptr noundef %2) #2
%22 = icmp eq i32 %20, %21
%23 = zext i1 %22 to i32
br label %59
24: ; preds = %3
%25 = tail call ptr @uvalue(ptr noundef %1) #2
%26 = tail call ptr @uvalue(ptr noundef %2) #2
%27 = icmp eq ptr %25, %26
br i1 %27, label %59, label %28
28: ; preds = %24
%29 = tail call ptr @uvalue(ptr noundef %1) #2
%30 = load i32, ptr %29, align 4, !tbaa !6
%31 = tail call ptr @uvalue(ptr noundef %2) #2
br label %45
32: ; preds = %3
%33 = tail call ptr @hvalue(ptr noundef %1) #2
%34 = tail call ptr @hvalue(ptr noundef %2) #2
%35 = icmp eq ptr %33, %34
br i1 %35, label %59, label %36
36: ; preds = %32
%37 = tail call ptr @hvalue(ptr noundef %1) #2
%38 = load i32, ptr %37, align 4, !tbaa !11
%39 = tail call ptr @hvalue(ptr noundef %2) #2
br label %45
40: ; preds = %3
%41 = tail call i32 @gcvalue(ptr noundef %1) #2
%42 = tail call i32 @gcvalue(ptr noundef %2) #2
%43 = icmp eq i32 %41, %42
%44 = zext i1 %43 to i32
br label %59
45: ; preds = %36, %28
%46 = phi ptr [ %39, %36 ], [ %31, %28 ]
%47 = phi i32 [ %38, %36 ], [ %30, %28 ]
%48 = load i32, ptr %46, align 4, !tbaa !13
%49 = load i32, ptr @TM_EQ, align 4, !tbaa !13
%50 = tail call ptr @get_compTM(ptr noundef %0, i32 noundef %47, i32 noundef %48, i32 noundef %49) #2
%51 = icmp eq ptr %50, null
br i1 %51, label %59, label %52
52: ; preds = %45
%53 = load i32, ptr %0, align 4, !tbaa !14
%54 = tail call i32 @callTMres(ptr noundef nonnull %0, i32 noundef %53, ptr noundef nonnull %50, ptr noundef %1, ptr noundef %2) #2
%55 = load i32, ptr %0, align 4, !tbaa !14
%56 = tail call i32 @l_isfalse(i32 noundef %55) #2
%57 = icmp eq i32 %56, 0
%58 = zext i1 %57 to i32
br label %59
59: ; preds = %45, %32, %24, %3, %52, %40, %19, %14, %10
%60 = phi i32 [ %44, %40 ], [ %58, %52 ], [ %23, %19 ], [ %18, %14 ], [ %13, %10 ], [ 1, %3 ], [ 1, %24 ], [ 1, %32 ], [ 0, %45 ]
ret i32 %60
}
declare i32 @lua_assert(i32 noundef) local_unnamed_addr #1
declare i32 @ttype(ptr noundef) local_unnamed_addr #1
declare i32 @luai_numeq(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @nvalue(ptr noundef) local_unnamed_addr #1
declare i32 @bvalue(ptr noundef) local_unnamed_addr #1
declare i32 @pvalue(ptr noundef) local_unnamed_addr #1
declare ptr @uvalue(ptr noundef) local_unnamed_addr #1
declare ptr @get_compTM(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @hvalue(ptr noundef) local_unnamed_addr #1
declare i32 @gcvalue(ptr noundef) local_unnamed_addr #1
declare i32 @callTMres(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @l_isfalse(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_8__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_9__", !8, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"TYPE_7__", !8, i64 0}
| Provenance_Cores_FCEU_FCEU_lua_src_extr_lvm.c_luaV_equalval |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_cmn.c_bnx2x_nic_load_afex_dcc.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_cmn.c_bnx2x_nic_load_afex_dcc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bnx2x = type { i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i64 }
@FW_MSG_CODE_DRV_LOAD_COMMON = dso_local local_unnamed_addr global i32 0, align 4
@FW_MSG_CODE_DRV_LOAD_COMMON_CHIP = dso_local local_unnamed_addr global i32 0, align 4
@dcc_support = dso_local local_unnamed_addr global i32 0, align 4
@SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV = dso_local local_unnamed_addr global i32 0, align 4
@SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV = dso_local local_unnamed_addr global i32 0, align 4
@afex_driver_support = dso_local local_unnamed_addr global i32 0, align 4
@SHMEM_AFEX_SUPPORTED_VERSION_ONE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @bnx2x_nic_load_afex_dcc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @bnx2x_nic_load_afex_dcc(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @FW_MSG_CODE_DRV_LOAD_COMMON, align 4, !tbaa !5
%4 = icmp eq i32 %3, %1
%5 = load i32, ptr @FW_MSG_CODE_DRV_LOAD_COMMON_CHIP, align 4
%6 = icmp eq i32 %5, %1
%7 = select i1 %4, i1 true, i1 %6
br i1 %7, label %8, label %30
8: ; preds = %2
%9 = getelementptr inbounds %struct.bnx2x, ptr %0, i64 0, i32 1
%10 = load i64, ptr %9, align 8, !tbaa !9
%11 = icmp eq i64 %10, 0
br i1 %11, label %30, label %12
12: ; preds = %8
%13 = load i32, ptr @dcc_support, align 4, !tbaa !5
%14 = tail call i64 @SHMEM2_HAS(ptr noundef nonnull %0, i32 noundef %13) #2
%15 = icmp eq i64 %14, 0
br i1 %15, label %22, label %16
16: ; preds = %12
%17 = load i32, ptr @dcc_support, align 4, !tbaa !5
%18 = load i32, ptr @SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV, align 4, !tbaa !5
%19 = load i32, ptr @SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV, align 4, !tbaa !5
%20 = or i32 %19, %18
%21 = tail call i32 @SHMEM2_WR(ptr noundef nonnull %0, i32 noundef %17, i32 noundef %20) #2
br label %22
22: ; preds = %16, %12
%23 = load i32, ptr @afex_driver_support, align 4, !tbaa !5
%24 = tail call i64 @SHMEM2_HAS(ptr noundef nonnull %0, i32 noundef %23) #2
%25 = icmp eq i64 %24, 0
br i1 %25, label %30, label %26
26: ; preds = %22
%27 = load i32, ptr @afex_driver_support, align 4, !tbaa !5
%28 = load i32, ptr @SHMEM_AFEX_SUPPORTED_VERSION_ONE, align 4, !tbaa !5
%29 = tail call i32 @SHMEM2_WR(ptr noundef nonnull %0, i32 noundef %27, i32 noundef %28) #2
br label %30
30: ; preds = %2, %22, %26, %8
store i32 -1, ptr %0, align 8, !tbaa !13
ret void
}
declare i64 @SHMEM2_HAS(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SHMEM2_WR(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"bnx2x", !6, i64 0, !11, i64 8}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!10, !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_cmn.c_bnx2x_nic_load_afex_dcc.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_cmn.c_bnx2x_nic_load_afex_dcc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FW_MSG_CODE_DRV_LOAD_COMMON = common local_unnamed_addr global i32 0, align 4
@FW_MSG_CODE_DRV_LOAD_COMMON_CHIP = common local_unnamed_addr global i32 0, align 4
@dcc_support = common local_unnamed_addr global i32 0, align 4
@SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV = common local_unnamed_addr global i32 0, align 4
@SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV = common local_unnamed_addr global i32 0, align 4
@afex_driver_support = common local_unnamed_addr global i32 0, align 4
@SHMEM_AFEX_SUPPORTED_VERSION_ONE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @bnx2x_nic_load_afex_dcc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @bnx2x_nic_load_afex_dcc(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @FW_MSG_CODE_DRV_LOAD_COMMON, align 4, !tbaa !6
%4 = icmp eq i32 %3, %1
%5 = load i32, ptr @FW_MSG_CODE_DRV_LOAD_COMMON_CHIP, align 4
%6 = icmp eq i32 %5, %1
%7 = select i1 %4, i1 true, i1 %6
br i1 %7, label %8, label %30
8: ; preds = %2
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = load i64, ptr %9, align 8, !tbaa !10
%11 = icmp eq i64 %10, 0
br i1 %11, label %30, label %12
12: ; preds = %8
%13 = load i32, ptr @dcc_support, align 4, !tbaa !6
%14 = tail call i64 @SHMEM2_HAS(ptr noundef nonnull %0, i32 noundef %13) #2
%15 = icmp eq i64 %14, 0
br i1 %15, label %22, label %16
16: ; preds = %12
%17 = load i32, ptr @dcc_support, align 4, !tbaa !6
%18 = load i32, ptr @SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV, align 4, !tbaa !6
%19 = load i32, ptr @SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV, align 4, !tbaa !6
%20 = or i32 %19, %18
%21 = tail call i32 @SHMEM2_WR(ptr noundef nonnull %0, i32 noundef %17, i32 noundef %20) #2
br label %22
22: ; preds = %16, %12
%23 = load i32, ptr @afex_driver_support, align 4, !tbaa !6
%24 = tail call i64 @SHMEM2_HAS(ptr noundef nonnull %0, i32 noundef %23) #2
%25 = icmp eq i64 %24, 0
br i1 %25, label %30, label %26
26: ; preds = %22
%27 = load i32, ptr @afex_driver_support, align 4, !tbaa !6
%28 = load i32, ptr @SHMEM_AFEX_SUPPORTED_VERSION_ONE, align 4, !tbaa !6
%29 = tail call i32 @SHMEM2_WR(ptr noundef nonnull %0, i32 noundef %27, i32 noundef %28) #2
br label %30
30: ; preds = %2, %22, %26, %8
store i32 -1, ptr %0, align 8, !tbaa !14
ret void
}
declare i64 @SHMEM2_HAS(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SHMEM2_WR(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 8}
!11 = !{!"bnx2x", !7, i64 0, !12, i64 8}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!11, !7, i64 0}
| linux_drivers_net_ethernet_broadcom_bnx2x_extr_bnx2x_cmn.c_bnx2x_nic_load_afex_dcc |
; ModuleID = 'AnghaBench/freebsd/sys/netpfil/ipfw/extr_ip_fw_table_algo.c_ta_init_radix.c'
source_filename = "AnghaBench/freebsd/sys/netpfil/ipfw/extr_ip_fw_table_algo.c_ta_init_radix.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.table_info = type { i32, i32, i32 }
@OFF_LEN_INET = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@OFF_LEN_INET6 = dso_local local_unnamed_addr global i32 0, align 4
@M_IPFW = dso_local local_unnamed_addr global i32 0, align 4
@M_WAITOK = dso_local local_unnamed_addr global i32 0, align 4
@M_ZERO = dso_local local_unnamed_addr global i32 0, align 4
@ta_lookup_radix = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ta_init_radix], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ta_init_radix(ptr nocapture readnone %0, ptr nocapture noundef writeonly %1, ptr noundef %2, ptr nocapture readnone %3, i32 %4) #0 {
%6 = getelementptr inbounds %struct.table_info, ptr %2, i64 0, i32 1
%7 = load i32, ptr @OFF_LEN_INET, align 4, !tbaa !5
%8 = tail call i32 @rn_inithead(ptr noundef nonnull %6, i32 noundef %7) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %5
%11 = load i32, ptr @ENOMEM, align 4, !tbaa !5
br label %27
12: ; preds = %5
%13 = getelementptr inbounds %struct.table_info, ptr %2, i64 0, i32 2
%14 = load i32, ptr @OFF_LEN_INET6, align 4, !tbaa !5
%15 = tail call i32 @rn_inithead(ptr noundef nonnull %13, i32 noundef %14) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %12
%18 = tail call i32 @rn_detachhead(ptr noundef nonnull %6) #2
%19 = load i32, ptr @ENOMEM, align 4, !tbaa !5
br label %27
20: ; preds = %12
%21 = load i32, ptr @M_IPFW, align 4, !tbaa !5
%22 = load i32, ptr @M_WAITOK, align 4, !tbaa !5
%23 = load i32, ptr @M_ZERO, align 4, !tbaa !5
%24 = or i32 %23, %22
%25 = tail call ptr @malloc(i32 noundef 4, i32 noundef %21, i32 noundef %24) #2
store ptr %25, ptr %1, align 8, !tbaa !9
%26 = load i32, ptr @ta_lookup_radix, align 4, !tbaa !5
store i32 %26, ptr %2, align 4, !tbaa !11
br label %27
27: ; preds = %20, %17, %10
%28 = phi i32 [ 0, %20 ], [ %19, %17 ], [ %11, %10 ]
ret i32 %28
}
declare i32 @rn_inithead(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rn_detachhead(ptr noundef) local_unnamed_addr #1
declare ptr @malloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"table_info", !6, i64 0, !6, i64 4, !6, i64 8}
| ; ModuleID = 'AnghaBench/freebsd/sys/netpfil/ipfw/extr_ip_fw_table_algo.c_ta_init_radix.c'
source_filename = "AnghaBench/freebsd/sys/netpfil/ipfw/extr_ip_fw_table_algo.c_ta_init_radix.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@OFF_LEN_INET = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@OFF_LEN_INET6 = common local_unnamed_addr global i32 0, align 4
@M_IPFW = common local_unnamed_addr global i32 0, align 4
@M_WAITOK = common local_unnamed_addr global i32 0, align 4
@M_ZERO = common local_unnamed_addr global i32 0, align 4
@ta_lookup_radix = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ta_init_radix], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ta_init_radix(ptr nocapture readnone %0, ptr nocapture noundef writeonly %1, ptr noundef %2, ptr nocapture readnone %3, i32 %4) #0 {
%6 = getelementptr inbounds i8, ptr %2, i64 4
%7 = load i32, ptr @OFF_LEN_INET, align 4, !tbaa !6
%8 = tail call i32 @rn_inithead(ptr noundef nonnull %6, i32 noundef %7) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %5
%11 = load i32, ptr @ENOMEM, align 4, !tbaa !6
br label %27
12: ; preds = %5
%13 = getelementptr inbounds i8, ptr %2, i64 8
%14 = load i32, ptr @OFF_LEN_INET6, align 4, !tbaa !6
%15 = tail call i32 @rn_inithead(ptr noundef nonnull %13, i32 noundef %14) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %12
%18 = tail call i32 @rn_detachhead(ptr noundef nonnull %6) #2
%19 = load i32, ptr @ENOMEM, align 4, !tbaa !6
br label %27
20: ; preds = %12
%21 = load i32, ptr @M_IPFW, align 4, !tbaa !6
%22 = load i32, ptr @M_WAITOK, align 4, !tbaa !6
%23 = load i32, ptr @M_ZERO, align 4, !tbaa !6
%24 = or i32 %23, %22
%25 = tail call ptr @malloc(i32 noundef 4, i32 noundef %21, i32 noundef %24) #2
store ptr %25, ptr %1, align 8, !tbaa !10
%26 = load i32, ptr @ta_lookup_radix, align 4, !tbaa !6
store i32 %26, ptr %2, align 4, !tbaa !12
br label %27
27: ; preds = %20, %17, %10
%28 = phi i32 [ 0, %20 ], [ %19, %17 ], [ %11, %10 ]
ret i32 %28
}
declare i32 @rn_inithead(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rn_detachhead(ptr noundef) local_unnamed_addr #1
declare ptr @malloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"table_info", !7, i64 0, !7, i64 4, !7, i64 8}
| freebsd_sys_netpfil_ipfw_extr_ip_fw_table_algo.c_ta_init_radix |
; ModuleID = 'AnghaBench/postgres/src/backend/postmaster/extr_pgstat.c_pgstat_recv_tempfile.c'
source_filename = "AnghaBench/postgres/src/backend/postmaster/extr_pgstat.c_pgstat_recv_tempfile.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i64, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @pgstat_recv_tempfile], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @pgstat_recv_tempfile(ptr nocapture noundef readonly %0, i32 %1) #0 {
%3 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1
%4 = load i32, ptr %3, align 8, !tbaa !5
%5 = tail call ptr @pgstat_get_db_entry(i32 noundef %4, i32 noundef 1) #2
%6 = load i64, ptr %0, align 8, !tbaa !11
%7 = trunc i64 %6 to i32
%8 = load <2 x i32>, ptr %5, align 4, !tbaa !12
%9 = insertelement <2 x i32> <i32 1, i32 poison>, i32 %7, i64 1
%10 = add <2 x i32> %8, %9
store <2 x i32> %10, ptr %5, align 4, !tbaa !12
ret void
}
declare ptr @pgstat_get_db_entry(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_6__", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/postgres/src/backend/postmaster/extr_pgstat.c_pgstat_recv_tempfile.c'
source_filename = "AnghaBench/postgres/src/backend/postmaster/extr_pgstat.c_pgstat_recv_tempfile.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pgstat_recv_tempfile], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @pgstat_recv_tempfile(ptr nocapture noundef readonly %0, i32 %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load i32, ptr %3, align 8, !tbaa !6
%5 = tail call ptr @pgstat_get_db_entry(i32 noundef %4, i32 noundef 1) #2
%6 = load i64, ptr %0, align 8, !tbaa !12
%7 = trunc i64 %6 to i32
%8 = load <2 x i32>, ptr %5, align 4, !tbaa !13
%9 = insertelement <2 x i32> <i32 1, i32 poison>, i32 %7, i64 1
%10 = add <2 x i32> %8, %9
store <2 x i32> %10, ptr %5, align 4, !tbaa !13
ret void
}
declare ptr @pgstat_get_db_entry(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_6__", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!11, !11, i64 0}
| postgres_src_backend_postmaster_extr_pgstat.c_pgstat_recv_tempfile |
; ModuleID = 'AnghaBench/lab/engine/code/bspc/extr_map_sin.c_Sin_ParseBSPBrushes.c'
source_filename = "AnghaBench/lab/engine/code/bspc/extr_map_sin.c_Sin_ParseBSPBrushes.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@sin_numbrushes = dso_local local_unnamed_addr global i32 0, align 4
@brushmodelnumbers = dso_local local_unnamed_addr global ptr null, align 8
@sin_dbrushes = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local void @Sin_ParseBSPBrushes(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @Sin_SetBrushModelNumbers(ptr noundef %0) #2
%3 = load i32, ptr @sin_numbrushes, align 4, !tbaa !5
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %27
5: ; preds = %1
%6 = load ptr, ptr @brushmodelnumbers, align 8, !tbaa !9
br label %7
7: ; preds = %5, %21
%8 = phi i32 [ %3, %5 ], [ %22, %21 ]
%9 = phi ptr [ %6, %5 ], [ %23, %21 ]
%10 = phi i64 [ 0, %5 ], [ %24, %21 ]
%11 = getelementptr inbounds i64, ptr %9, i64 %10
%12 = load i64, ptr %11, align 8, !tbaa !11
%13 = load i64, ptr %0, align 8, !tbaa !13
%14 = icmp eq i64 %12, %13
br i1 %14, label %15, label %21
15: ; preds = %7
%16 = load ptr, ptr @sin_dbrushes, align 8, !tbaa !9
%17 = getelementptr inbounds i32, ptr %16, i64 %10
%18 = tail call i32 @Sin_BSPBrushToMapBrush(ptr noundef %17, ptr noundef nonnull %0) #2
%19 = load ptr, ptr @brushmodelnumbers, align 8, !tbaa !9
%20 = load i32, ptr @sin_numbrushes, align 4, !tbaa !5
br label %21
21: ; preds = %7, %15
%22 = phi i32 [ %20, %15 ], [ %8, %7 ]
%23 = phi ptr [ %19, %15 ], [ %9, %7 ]
%24 = add nuw nsw i64 %10, 1
%25 = sext i32 %22 to i64
%26 = icmp slt i64 %24, %25
br i1 %26, label %7, label %27, !llvm.loop !15
27: ; preds = %21, %1
ret void
}
declare i32 @Sin_SetBrushModelNumbers(ptr noundef) local_unnamed_addr #1
declare i32 @Sin_BSPBrushToMapBrush(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"TYPE_5__", !12, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/lab/engine/code/bspc/extr_map_sin.c_Sin_ParseBSPBrushes.c'
source_filename = "AnghaBench/lab/engine/code/bspc/extr_map_sin.c_Sin_ParseBSPBrushes.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@sin_numbrushes = common local_unnamed_addr global i32 0, align 4
@brushmodelnumbers = common local_unnamed_addr global ptr null, align 8
@sin_dbrushes = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @Sin_ParseBSPBrushes(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @Sin_SetBrushModelNumbers(ptr noundef %0) #2
%3 = load i32, ptr @sin_numbrushes, align 4, !tbaa !6
%4 = icmp sgt i32 %3, 0
br i1 %4, label %5, label %27
5: ; preds = %1
%6 = load ptr, ptr @brushmodelnumbers, align 8, !tbaa !10
br label %7
7: ; preds = %5, %21
%8 = phi i32 [ %3, %5 ], [ %22, %21 ]
%9 = phi ptr [ %6, %5 ], [ %23, %21 ]
%10 = phi i64 [ 0, %5 ], [ %24, %21 ]
%11 = getelementptr inbounds i64, ptr %9, i64 %10
%12 = load i64, ptr %11, align 8, !tbaa !12
%13 = load i64, ptr %0, align 8, !tbaa !14
%14 = icmp eq i64 %12, %13
br i1 %14, label %15, label %21
15: ; preds = %7
%16 = load ptr, ptr @sin_dbrushes, align 8, !tbaa !10
%17 = getelementptr inbounds i32, ptr %16, i64 %10
%18 = tail call i32 @Sin_BSPBrushToMapBrush(ptr noundef %17, ptr noundef nonnull %0) #2
%19 = load ptr, ptr @brushmodelnumbers, align 8, !tbaa !10
%20 = load i32, ptr @sin_numbrushes, align 4, !tbaa !6
br label %21
21: ; preds = %7, %15
%22 = phi i32 [ %20, %15 ], [ %8, %7 ]
%23 = phi ptr [ %19, %15 ], [ %9, %7 ]
%24 = add nuw nsw i64 %10, 1
%25 = sext i32 %22 to i64
%26 = icmp slt i64 %24, %25
br i1 %26, label %7, label %27, !llvm.loop !16
27: ; preds = %21, %1
ret void
}
declare i32 @Sin_SetBrushModelNumbers(ptr noundef) local_unnamed_addr #1
declare i32 @Sin_BSPBrushToMapBrush(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"TYPE_5__", !13, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| lab_engine_code_bspc_extr_map_sin.c_Sin_ParseBSPBrushes |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_si.c_si_suspend.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_si.c_si_suspend.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.radeon_device = type { i64, i64 }
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @si_suspend(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @radeon_pm_suspend(ptr noundef %0) #2
%3 = tail call i32 @radeon_audio_fini(ptr noundef %0) #2
%4 = tail call i32 @radeon_vm_manager_fini(ptr noundef %0) #2
%5 = tail call i32 @si_cp_enable(ptr noundef %0, i32 noundef 0) #2
%6 = tail call i32 @cayman_dma_stop(ptr noundef %0) #2
%7 = getelementptr inbounds %struct.radeon_device, ptr %0, i64 0, i32 1
%8 = load i64, ptr %7, align 8, !tbaa !5
%9 = icmp eq i64 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %1
%11 = tail call i32 @uvd_v1_0_fini(ptr noundef nonnull %0) #2
%12 = tail call i32 @radeon_uvd_suspend(ptr noundef nonnull %0) #2
br label %13
13: ; preds = %10, %1
%14 = load i64, ptr %0, align 8, !tbaa !10
%15 = icmp eq i64 %14, 0
br i1 %15, label %18, label %16
16: ; preds = %13
%17 = tail call i32 @radeon_vce_suspend(ptr noundef nonnull %0) #2
br label %18
18: ; preds = %16, %13
%19 = tail call i32 @si_fini_pg(ptr noundef nonnull %0) #2
%20 = tail call i32 @si_fini_cg(ptr noundef nonnull %0) #2
%21 = tail call i32 @si_irq_suspend(ptr noundef nonnull %0) #2
%22 = tail call i32 @radeon_wb_disable(ptr noundef nonnull %0) #2
%23 = tail call i32 @si_pcie_gart_disable(ptr noundef nonnull %0) #2
ret i32 0
}
declare i32 @radeon_pm_suspend(ptr noundef) local_unnamed_addr #1
declare i32 @radeon_audio_fini(ptr noundef) local_unnamed_addr #1
declare i32 @radeon_vm_manager_fini(ptr noundef) local_unnamed_addr #1
declare i32 @si_cp_enable(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cayman_dma_stop(ptr noundef) local_unnamed_addr #1
declare i32 @uvd_v1_0_fini(ptr noundef) local_unnamed_addr #1
declare i32 @radeon_uvd_suspend(ptr noundef) local_unnamed_addr #1
declare i32 @radeon_vce_suspend(ptr noundef) local_unnamed_addr #1
declare i32 @si_fini_pg(ptr noundef) local_unnamed_addr #1
declare i32 @si_fini_cg(ptr noundef) local_unnamed_addr #1
declare i32 @si_irq_suspend(ptr noundef) local_unnamed_addr #1
declare i32 @radeon_wb_disable(ptr noundef) local_unnamed_addr #1
declare i32 @si_pcie_gart_disable(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"radeon_device", !7, i64 0, !7, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_si.c_si_suspend.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_si.c_si_suspend.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @si_suspend(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @radeon_pm_suspend(ptr noundef %0) #2
%3 = tail call i32 @radeon_audio_fini(ptr noundef %0) #2
%4 = tail call i32 @radeon_vm_manager_fini(ptr noundef %0) #2
%5 = tail call i32 @si_cp_enable(ptr noundef %0, i32 noundef 0) #2
%6 = tail call i32 @cayman_dma_stop(ptr noundef %0) #2
%7 = getelementptr inbounds i8, ptr %0, i64 8
%8 = load i64, ptr %7, align 8, !tbaa !6
%9 = icmp eq i64 %8, 0
br i1 %9, label %13, label %10
10: ; preds = %1
%11 = tail call i32 @uvd_v1_0_fini(ptr noundef nonnull %0) #2
%12 = tail call i32 @radeon_uvd_suspend(ptr noundef nonnull %0) #2
br label %13
13: ; preds = %10, %1
%14 = load i64, ptr %0, align 8, !tbaa !11
%15 = icmp eq i64 %14, 0
br i1 %15, label %18, label %16
16: ; preds = %13
%17 = tail call i32 @radeon_vce_suspend(ptr noundef nonnull %0) #2
br label %18
18: ; preds = %16, %13
%19 = tail call i32 @si_fini_pg(ptr noundef nonnull %0) #2
%20 = tail call i32 @si_fini_cg(ptr noundef nonnull %0) #2
%21 = tail call i32 @si_irq_suspend(ptr noundef nonnull %0) #2
%22 = tail call i32 @radeon_wb_disable(ptr noundef nonnull %0) #2
%23 = tail call i32 @si_pcie_gart_disable(ptr noundef nonnull %0) #2
ret i32 0
}
declare i32 @radeon_pm_suspend(ptr noundef) local_unnamed_addr #1
declare i32 @radeon_audio_fini(ptr noundef) local_unnamed_addr #1
declare i32 @radeon_vm_manager_fini(ptr noundef) local_unnamed_addr #1
declare i32 @si_cp_enable(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cayman_dma_stop(ptr noundef) local_unnamed_addr #1
declare i32 @uvd_v1_0_fini(ptr noundef) local_unnamed_addr #1
declare i32 @radeon_uvd_suspend(ptr noundef) local_unnamed_addr #1
declare i32 @radeon_vce_suspend(ptr noundef) local_unnamed_addr #1
declare i32 @si_fini_pg(ptr noundef) local_unnamed_addr #1
declare i32 @si_fini_cg(ptr noundef) local_unnamed_addr #1
declare i32 @si_irq_suspend(ptr noundef) local_unnamed_addr #1
declare i32 @radeon_wb_disable(ptr noundef) local_unnamed_addr #1
declare i32 @si_pcie_gart_disable(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"radeon_device", !8, i64 0, !8, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
| linux_drivers_gpu_drm_radeon_extr_si.c_si_suspend |
; ModuleID = 'AnghaBench/freebsd/contrib/ntp/sntp/libevent/test/extr_regress_util.c_regress_ipv6_parse.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/sntp/libevent/test/extr_regress_util.c_regress_ipv6_parse.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [31 x i8] c"Skipping IPv6 address parsing.\00", align 1
@AF_INET6 = dso_local local_unnamed_addr global i32 0, align 4
@BAD = dso_local local_unnamed_addr global i64 0, align 8
@CANONICAL = dso_local local_unnamed_addr global i64 0, align 8
@ipv6_entries = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @regress_ipv6_parse], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @regress_ipv6_parse(ptr nocapture readnone %0) #0 {
%2 = tail call i32 @TT_BLATHER(ptr noundef nonnull @.str) #2
ret void
}
declare i32 @TT_BLATHER(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ntp/sntp/libevent/test/extr_regress_util.c_regress_ipv6_parse.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/sntp/libevent/test/extr_regress_util.c_regress_ipv6_parse.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [31 x i8] c"Skipping IPv6 address parsing.\00", align 1
@AF_INET6 = common local_unnamed_addr global i32 0, align 4
@BAD = common local_unnamed_addr global i64 0, align 8
@CANONICAL = common local_unnamed_addr global i64 0, align 8
@ipv6_entries = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @regress_ipv6_parse], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @regress_ipv6_parse(ptr nocapture readnone %0) #0 {
%2 = tail call i32 @TT_BLATHER(ptr noundef nonnull @.str) #2
ret void
}
declare i32 @TT_BLATHER(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_ntp_sntp_libevent_test_extr_regress_util.c_regress_ipv6_parse |
; ModuleID = 'AnghaBench/freebsd/usr.sbin/moused/extr_moused.c_pnpgets.c'
source_filename = "AnghaBench/freebsd/usr.sbin/moused/extr_moused.c_pnpgets.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32 }
%struct.timeval = type { i32, i64 }
@TIOCM_DTR = dso_local local_unnamed_addr global i32 0, align 4
@TIOCM_RTS = dso_local local_unnamed_addr global i32 0, align 4
@rodent = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
@TIOCMBIS = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [14 x i8] c"begin-id %02x\00", align 1
@.str.1 = private unnamed_addr constant [8 x i8] c"%c %02x\00", align 1
@FD_SETSIZE = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [17 x i8] c"len:%d, '%-*.*s'\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @pnpgets], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @pnpgets(ptr noundef %0) #0 {
%2 = alloca %struct.timeval, align 8
%3 = alloca i32, align 4
%4 = alloca i32, align 4
%5 = alloca i8, align 1
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %5) #3
%6 = tail call i32 (...) @pnpwakeup1() #3
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %18
8: ; preds = %1
%9 = tail call i32 (...) @pnpwakeup2() #3
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %18
11: ; preds = %8
%12 = load i32, ptr @TIOCM_DTR, align 4, !tbaa !5
%13 = load i32, ptr @TIOCM_RTS, align 4, !tbaa !5
%14 = or i32 %13, %12
store i32 %14, ptr %4, align 4, !tbaa !5
%15 = load i32, ptr @rodent, align 4, !tbaa !9
%16 = load i32, ptr @TIOCMBIS, align 4, !tbaa !5
%17 = call i32 @ioctl(i32 noundef %15, i32 noundef %16, ptr noundef nonnull %4) #3
br label %80
18: ; preds = %8, %1
%19 = tail call i32 @usleep(i32 noundef 240000) #3
br label %20
20: ; preds = %33, %18
%21 = phi i32 [ %27, %33 ], [ 0, %18 ]
%22 = load i32, ptr @rodent, align 4, !tbaa !9
%23 = call i32 @read(i32 noundef %22, ptr noundef nonnull %5, i32 noundef 1) #3
%24 = icmp eq i32 %23, 1
br i1 %24, label %25, label %77
25: ; preds = %20
%26 = load i8, ptr %5, align 1
%27 = add nuw nsw i32 %21, 1
%28 = zext nneg i32 %21 to i64
%29 = getelementptr inbounds i8, ptr %0, i64 %28
store i8 %26, ptr %29, align 1, !tbaa !11
%30 = sext i8 %26 to i32
%31 = and i8 %26, -33
%32 = icmp eq i8 %31, 8
br i1 %32, label %36, label %33
33: ; preds = %25
%34 = call i32 (ptr, i32, ...) @debug(ptr noundef nonnull @.str.1, i32 noundef %30, i32 noundef %30) #3
%35 = icmp ugt i32 %21, 254
br i1 %35, label %77, label %20, !llvm.loop !12
36: ; preds = %25
%37 = call i32 (ptr, i32, ...) @debug(ptr noundef nonnull @.str, i32 noundef %30) #3
%38 = load i8, ptr %5, align 1, !tbaa !11
%39 = add i8 %38, 1
store i8 %39, ptr %5, align 1, !tbaa !11
%40 = getelementptr inbounds %struct.timeval, ptr %2, i64 0, i32 1
br label %41
41: ; preds = %49, %36
%42 = phi i32 [ %54, %49 ], [ %27, %36 ]
%43 = call i32 @FD_ZERO(ptr noundef nonnull %3) #3
%44 = load i32, ptr @rodent, align 4, !tbaa !9
%45 = call i32 @FD_SET(i32 noundef %44, ptr noundef nonnull %3) #3
store i64 0, ptr %40, align 8, !tbaa !14
store i32 240000, ptr %2, align 8, !tbaa !17
%46 = load i32, ptr @FD_SETSIZE, align 4, !tbaa !5
%47 = call i64 @select(i32 noundef %46, ptr noundef nonnull %3, ptr noundef null, ptr noundef null, ptr noundef nonnull %2) #3
%48 = icmp slt i64 %47, 1
br i1 %48, label %60, label %49
49: ; preds = %41
%50 = load i32, ptr @rodent, align 4, !tbaa !9
%51 = zext nneg i32 %42 to i64
%52 = getelementptr inbounds i8, ptr %0, i64 %51
%53 = call i32 @read(i32 noundef %50, ptr noundef nonnull %52, i32 noundef 1) #3
%54 = add nuw nsw i32 %42, 1
%55 = load i8, ptr %52, align 1, !tbaa !11
%56 = load i8, ptr %5, align 1, !tbaa !11
%57 = icmp eq i8 %55, %56
%58 = icmp ugt i32 %42, 254
%59 = or i1 %58, %57
br i1 %59, label %60, label %41
60: ; preds = %49, %41
%61 = phi i32 [ %54, %49 ], [ %42, %41 ]
%62 = icmp eq i32 %21, 0
br i1 %62, label %68, label %63
63: ; preds = %60
%64 = sub nsw i32 %61, %21
%65 = zext nneg i32 %21 to i64
%66 = getelementptr inbounds i8, ptr %0, i64 %65
%67 = call i32 @bcopy(ptr noundef nonnull %66, ptr noundef %0, i32 noundef %64) #3
br label %68
68: ; preds = %63, %60
%69 = phi i32 [ %64, %63 ], [ %61, %60 ]
%70 = call i32 (ptr, i32, ...) @debug(ptr noundef nonnull @.str.2, i32 noundef %69, i32 noundef %69, i32 noundef %69, ptr noundef %0) #3
%71 = sext i32 %69 to i64
%72 = getelementptr i8, ptr %0, i64 %71
%73 = getelementptr i8, ptr %72, i64 -1
%74 = load i8, ptr %73, align 1, !tbaa !11
%75 = load i8, ptr %5, align 1, !tbaa !11
%76 = icmp eq i8 %74, %75
br i1 %76, label %80, label %77
77: ; preds = %20, %33, %68
%78 = phi i32 [ %69, %68 ], [ %21, %20 ], [ %27, %33 ]
%79 = call i32 @MAX(i32 noundef %78, i32 noundef 0) #3
br label %80
80: ; preds = %68, %77, %11
%81 = phi i32 [ %79, %77 ], [ 0, %11 ], [ %69, %68 ]
call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #3
ret i32 %81
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @pnpwakeup1(...) local_unnamed_addr #2
declare i32 @pnpwakeup2(...) local_unnamed_addr #2
declare i32 @ioctl(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @usleep(i32 noundef) local_unnamed_addr #2
declare i32 @read(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @debug(ptr noundef, i32 noundef, ...) local_unnamed_addr #2
declare i32 @FD_ZERO(ptr noundef) local_unnamed_addr #2
declare i32 @FD_SET(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @select(i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @bcopy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @MAX(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_2__", !6, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!15, !16, i64 8}
!15 = !{!"timeval", !6, i64 0, !16, i64 8}
!16 = !{!"long", !7, i64 0}
!17 = !{!15, !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/usr.sbin/moused/extr_moused.c_pnpgets.c'
source_filename = "AnghaBench/freebsd/usr.sbin/moused/extr_moused.c_pnpgets.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32 }
%struct.timeval = type { i32, i64 }
@TIOCM_DTR = common local_unnamed_addr global i32 0, align 4
@TIOCM_RTS = common local_unnamed_addr global i32 0, align 4
@rodent = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
@TIOCMBIS = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [14 x i8] c"begin-id %02x\00", align 1
@.str.1 = private unnamed_addr constant [8 x i8] c"%c %02x\00", align 1
@FD_SETSIZE = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [17 x i8] c"len:%d, '%-*.*s'\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @pnpgets], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @pnpgets(ptr noundef %0) #0 {
%2 = alloca %struct.timeval, align 8
%3 = alloca i32, align 4
%4 = alloca i32, align 4
%5 = alloca i8, align 1
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %5) #3
%6 = tail call i32 @pnpwakeup1() #3
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %18
8: ; preds = %1
%9 = tail call i32 @pnpwakeup2() #3
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %18
11: ; preds = %8
%12 = load i32, ptr @TIOCM_DTR, align 4, !tbaa !6
%13 = load i32, ptr @TIOCM_RTS, align 4, !tbaa !6
%14 = or i32 %13, %12
store i32 %14, ptr %4, align 4, !tbaa !6
%15 = load i32, ptr @rodent, align 4, !tbaa !10
%16 = load i32, ptr @TIOCMBIS, align 4, !tbaa !6
%17 = call i32 @ioctl(i32 noundef %15, i32 noundef %16, ptr noundef nonnull %4) #3
br label %79
18: ; preds = %8, %1
%19 = tail call i32 @usleep(i32 noundef 240000) #3
br label %20
20: ; preds = %33, %18
%21 = phi i32 [ %27, %33 ], [ 0, %18 ]
%22 = load i32, ptr @rodent, align 4, !tbaa !10
%23 = call i32 @read(i32 noundef %22, ptr noundef nonnull %5, i32 noundef 1) #3
%24 = icmp eq i32 %23, 1
br i1 %24, label %25, label %76
25: ; preds = %20
%26 = load i8, ptr %5, align 1
%27 = add nuw nsw i32 %21, 1
%28 = zext nneg i32 %21 to i64
%29 = getelementptr inbounds i8, ptr %0, i64 %28
store i8 %26, ptr %29, align 1, !tbaa !12
%30 = sext i8 %26 to i32
%31 = and i8 %26, -33
%32 = icmp eq i8 %31, 8
br i1 %32, label %36, label %33
33: ; preds = %25
%34 = call i32 (ptr, i32, ...) @debug(ptr noundef nonnull @.str.1, i32 noundef %30, i32 noundef %30) #3
%35 = icmp ugt i32 %21, 254
br i1 %35, label %76, label %20, !llvm.loop !13
36: ; preds = %25
%37 = getelementptr inbounds i8, ptr %0, i64 %28
%38 = call i32 (ptr, i32, ...) @debug(ptr noundef nonnull @.str, i32 noundef %30) #3
%39 = load i8, ptr %5, align 1, !tbaa !12
%40 = add i8 %39, 1
store i8 %40, ptr %5, align 1, !tbaa !12
%41 = getelementptr inbounds i8, ptr %2, i64 8
br label %42
42: ; preds = %50, %36
%43 = phi i32 [ %55, %50 ], [ %27, %36 ]
%44 = call i32 @FD_ZERO(ptr noundef nonnull %3) #3
%45 = load i32, ptr @rodent, align 4, !tbaa !10
%46 = call i32 @FD_SET(i32 noundef %45, ptr noundef nonnull %3) #3
store i64 0, ptr %41, align 8, !tbaa !15
store i32 240000, ptr %2, align 8, !tbaa !18
%47 = load i32, ptr @FD_SETSIZE, align 4, !tbaa !6
%48 = call i64 @select(i32 noundef %47, ptr noundef nonnull %3, ptr noundef null, ptr noundef null, ptr noundef nonnull %2) #3
%49 = icmp slt i64 %48, 1
br i1 %49, label %61, label %50
50: ; preds = %42
%51 = load i32, ptr @rodent, align 4, !tbaa !10
%52 = zext nneg i32 %43 to i64
%53 = getelementptr inbounds i8, ptr %0, i64 %52
%54 = call i32 @read(i32 noundef %51, ptr noundef nonnull %53, i32 noundef 1) #3
%55 = add nuw nsw i32 %43, 1
%56 = load i8, ptr %53, align 1, !tbaa !12
%57 = load i8, ptr %5, align 1, !tbaa !12
%58 = icmp eq i8 %56, %57
%59 = icmp ugt i32 %43, 254
%60 = or i1 %59, %58
br i1 %60, label %61, label %42
61: ; preds = %50, %42
%62 = phi i32 [ %55, %50 ], [ %43, %42 ]
%63 = icmp eq i32 %21, 0
br i1 %63, label %67, label %64
64: ; preds = %61
%65 = sub nsw i32 %62, %21
%66 = call i32 @bcopy(ptr noundef nonnull %37, ptr noundef %0, i32 noundef %65) #3
br label %67
67: ; preds = %64, %61
%68 = phi i32 [ %65, %64 ], [ %62, %61 ]
%69 = call i32 (ptr, i32, ...) @debug(ptr noundef nonnull @.str.2, i32 noundef %68, i32 noundef %68, i32 noundef %68, ptr noundef %0) #3
%70 = sext i32 %68 to i64
%71 = getelementptr i8, ptr %0, i64 %70
%72 = getelementptr i8, ptr %71, i64 -1
%73 = load i8, ptr %72, align 1, !tbaa !12
%74 = load i8, ptr %5, align 1, !tbaa !12
%75 = icmp eq i8 %73, %74
br i1 %75, label %79, label %76
76: ; preds = %20, %33, %67
%77 = phi i32 [ %68, %67 ], [ %21, %20 ], [ %27, %33 ]
%78 = call i32 @MAX(i32 noundef %77, i32 noundef 0) #3
br label %79
79: ; preds = %67, %76, %11
%80 = phi i32 [ %78, %76 ], [ 0, %11 ], [ %68, %67 ]
call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #3
ret i32 %80
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @pnpwakeup1(...) local_unnamed_addr #2
declare i32 @pnpwakeup2(...) local_unnamed_addr #2
declare i32 @ioctl(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @usleep(i32 noundef) local_unnamed_addr #2
declare i32 @read(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @debug(ptr noundef, i32 noundef, ...) local_unnamed_addr #2
declare i32 @FD_ZERO(ptr noundef) local_unnamed_addr #2
declare i32 @FD_SET(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @select(i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @bcopy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @MAX(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
!12 = !{!8, !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!16, !17, i64 8}
!16 = !{!"timeval", !7, i64 0, !17, i64 8}
!17 = !{!"long", !8, i64 0}
!18 = !{!16, !7, i64 0}
| freebsd_usr.sbin_moused_extr_moused.c_pnpgets |
; ModuleID = 'AnghaBench/sumatrapdf/ext/libwebp/src/enc/extr_frame_enc.c_FinalizeTokenProbas.c'
source_filename = "AnghaBench/sumatrapdf/ext/libwebp/src/enc/extr_frame_enc.c_FinalizeTokenProbas.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { ptr, ptr, i32 }
@NUM_TYPES = dso_local local_unnamed_addr global i32 0, align 4
@NUM_BANDS = dso_local local_unnamed_addr global i32 0, align 4
@NUM_CTX = dso_local local_unnamed_addr global i32 0, align 4
@NUM_PROBAS = dso_local local_unnamed_addr global i32 0, align 4
@VP8CoeffsUpdateProba = dso_local local_unnamed_addr global ptr null, align 8
@VP8CoeffsProba0 = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @FinalizeTokenProbas], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @FinalizeTokenProbas(ptr nocapture noundef %0) #0 {
%2 = load i32, ptr @NUM_TYPES, align 4, !tbaa !5
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %132
4: ; preds = %1
%5 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%6 = load i32, ptr @NUM_BANDS, align 4, !tbaa !5
br label %7
7: ; preds = %4, %123
%8 = phi i32 [ %2, %4 ], [ %124, %123 ]
%9 = phi i32 [ %6, %4 ], [ %125, %123 ]
%10 = phi i32 [ %6, %4 ], [ %126, %123 ]
%11 = phi i64 [ 0, %4 ], [ %129, %123 ]
%12 = phi i32 [ 0, %4 ], [ %128, %123 ]
%13 = phi i32 [ 0, %4 ], [ %127, %123 ]
%14 = icmp sgt i32 %10, 0
br i1 %14, label %15, label %123
15: ; preds = %7
%16 = load i32, ptr @NUM_CTX, align 4, !tbaa !5
br label %17
17: ; preds = %15, %112
%18 = phi i32 [ %9, %15 ], [ %113, %112 ]
%19 = phi i32 [ %16, %15 ], [ %114, %112 ]
%20 = phi i32 [ %16, %15 ], [ %115, %112 ]
%21 = phi i64 [ 0, %15 ], [ %118, %112 ]
%22 = phi i32 [ %12, %15 ], [ %117, %112 ]
%23 = phi i32 [ %13, %15 ], [ %116, %112 ]
%24 = icmp sgt i32 %20, 0
br i1 %24, label %25, label %112
25: ; preds = %17
%26 = load i32, ptr @NUM_PROBAS, align 4, !tbaa !5
br label %27
27: ; preds = %25, %102
%28 = phi i32 [ %19, %25 ], [ %103, %102 ]
%29 = phi i32 [ %26, %25 ], [ %104, %102 ]
%30 = phi i64 [ 0, %25 ], [ %107, %102 ]
%31 = phi i32 [ %22, %25 ], [ %106, %102 ]
%32 = phi i32 [ %23, %25 ], [ %105, %102 ]
%33 = icmp sgt i32 %29, 0
br i1 %33, label %34, label %102
34: ; preds = %27, %93
%35 = phi i64 [ %96, %93 ], [ 0, %27 ]
%36 = phi i32 [ %95, %93 ], [ %31, %27 ]
%37 = phi i32 [ %94, %93 ], [ %32, %27 ]
%38 = load ptr, ptr %0, align 8, !tbaa !9
%39 = getelementptr inbounds ptr, ptr %38, i64 %11
%40 = load ptr, ptr %39, align 8, !tbaa !12
%41 = getelementptr inbounds ptr, ptr %40, i64 %21
%42 = load ptr, ptr %41, align 8, !tbaa !12
%43 = getelementptr inbounds ptr, ptr %42, i64 %30
%44 = load ptr, ptr %43, align 8, !tbaa !12
%45 = getelementptr inbounds i32, ptr %44, i64 %35
%46 = load i32, ptr %45, align 4, !tbaa !5
%47 = and i32 %46, 65535
%48 = lshr i32 %46, 16
%49 = load ptr, ptr @VP8CoeffsUpdateProba, align 8, !tbaa !12
%50 = getelementptr inbounds ptr, ptr %49, i64 %11
%51 = load ptr, ptr %50, align 8, !tbaa !12
%52 = getelementptr inbounds ptr, ptr %51, i64 %21
%53 = load ptr, ptr %52, align 8, !tbaa !12
%54 = getelementptr inbounds ptr, ptr %53, i64 %30
%55 = load ptr, ptr %54, align 8, !tbaa !12
%56 = getelementptr inbounds i32, ptr %55, i64 %35
%57 = load i32, ptr %56, align 4, !tbaa !5
%58 = load ptr, ptr @VP8CoeffsProba0, align 8, !tbaa !12
%59 = getelementptr inbounds ptr, ptr %58, i64 %11
%60 = load ptr, ptr %59, align 8, !tbaa !12
%61 = getelementptr inbounds ptr, ptr %60, i64 %21
%62 = load ptr, ptr %61, align 8, !tbaa !12
%63 = getelementptr inbounds ptr, ptr %62, i64 %30
%64 = load ptr, ptr %63, align 8, !tbaa !12
%65 = getelementptr inbounds i32, ptr %64, i64 %35
%66 = load i32, ptr %65, align 4, !tbaa !5
%67 = tail call i32 @CalcTokenProba(i32 noundef %47, i32 noundef %48) #2
%68 = tail call i32 @BranchCost(i32 noundef %47, i32 noundef %48, i32 noundef %66) #2
%69 = tail call i32 @VP8BitCost(i32 noundef 0, i32 noundef %57) #2
%70 = add nsw i32 %69, %68
%71 = tail call i32 @BranchCost(i32 noundef %47, i32 noundef %48, i32 noundef %67) #2
%72 = tail call i32 @VP8BitCost(i32 noundef 1, i32 noundef %57) #2
%73 = add i32 %71, 2048
%74 = add i32 %73, %72
%75 = icmp sgt i32 %70, %74
%76 = zext i1 %75 to i32
%77 = tail call i32 @VP8BitCost(i32 noundef %76, i32 noundef %57) #2
%78 = add nsw i32 %77, %37
%79 = load ptr, ptr %5, align 8, !tbaa !13
%80 = getelementptr inbounds ptr, ptr %79, i64 %11
%81 = load ptr, ptr %80, align 8, !tbaa !12
%82 = getelementptr inbounds ptr, ptr %81, i64 %21
%83 = load ptr, ptr %82, align 8, !tbaa !12
%84 = getelementptr inbounds ptr, ptr %83, i64 %30
%85 = load ptr, ptr %84, align 8, !tbaa !12
%86 = getelementptr inbounds i32, ptr %85, i64 %35
br i1 %75, label %87, label %92
87: ; preds = %34
store i32 %67, ptr %86, align 4, !tbaa !5
%88 = icmp ne i32 %67, %66
%89 = zext i1 %88 to i32
%90 = or i32 %36, %89
%91 = add nsw i32 %78, 2048
br label %93
92: ; preds = %34
store i32 %66, ptr %86, align 4, !tbaa !5
br label %93
93: ; preds = %92, %87
%94 = phi i32 [ %91, %87 ], [ %78, %92 ]
%95 = phi i32 [ %90, %87 ], [ %36, %92 ]
%96 = add nuw nsw i64 %35, 1
%97 = load i32, ptr @NUM_PROBAS, align 4, !tbaa !5
%98 = sext i32 %97 to i64
%99 = icmp slt i64 %96, %98
br i1 %99, label %34, label %100, !llvm.loop !14
100: ; preds = %93
%101 = load i32, ptr @NUM_CTX, align 4, !tbaa !5
br label %102
102: ; preds = %100, %27
%103 = phi i32 [ %28, %27 ], [ %101, %100 ]
%104 = phi i32 [ %29, %27 ], [ %97, %100 ]
%105 = phi i32 [ %32, %27 ], [ %94, %100 ]
%106 = phi i32 [ %31, %27 ], [ %95, %100 ]
%107 = add nuw nsw i64 %30, 1
%108 = sext i32 %103 to i64
%109 = icmp slt i64 %107, %108
br i1 %109, label %27, label %110, !llvm.loop !16
110: ; preds = %102
%111 = load i32, ptr @NUM_BANDS, align 4, !tbaa !5
br label %112
112: ; preds = %110, %17
%113 = phi i32 [ %18, %17 ], [ %111, %110 ]
%114 = phi i32 [ %19, %17 ], [ %103, %110 ]
%115 = phi i32 [ %20, %17 ], [ %103, %110 ]
%116 = phi i32 [ %23, %17 ], [ %105, %110 ]
%117 = phi i32 [ %22, %17 ], [ %106, %110 ]
%118 = add nuw nsw i64 %21, 1
%119 = sext i32 %113 to i64
%120 = icmp slt i64 %118, %119
br i1 %120, label %17, label %121, !llvm.loop !17
121: ; preds = %112
%122 = load i32, ptr @NUM_TYPES, align 4, !tbaa !5
br label %123
123: ; preds = %121, %7
%124 = phi i32 [ %8, %7 ], [ %122, %121 ]
%125 = phi i32 [ %9, %7 ], [ %113, %121 ]
%126 = phi i32 [ %10, %7 ], [ %113, %121 ]
%127 = phi i32 [ %13, %7 ], [ %116, %121 ]
%128 = phi i32 [ %12, %7 ], [ %117, %121 ]
%129 = add nuw nsw i64 %11, 1
%130 = sext i32 %124 to i64
%131 = icmp slt i64 %129, %130
br i1 %131, label %7, label %132, !llvm.loop !18
132: ; preds = %123, %1
%133 = phi i32 [ 0, %1 ], [ %127, %123 ]
%134 = phi i32 [ 0, %1 ], [ %128, %123 ]
%135 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
store i32 %134, ptr %135, align 8, !tbaa !19
ret i32 %133
}
declare i32 @CalcTokenProba(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BranchCost(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @VP8BitCost(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_3__", !11, i64 0, !11, i64 8, !6, i64 16}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!10, !11, i64 8}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = distinct !{!16, !15}
!17 = distinct !{!17, !15}
!18 = distinct !{!18, !15}
!19 = !{!10, !6, i64 16}
| ; ModuleID = 'AnghaBench/sumatrapdf/ext/libwebp/src/enc/extr_frame_enc.c_FinalizeTokenProbas.c'
source_filename = "AnghaBench/sumatrapdf/ext/libwebp/src/enc/extr_frame_enc.c_FinalizeTokenProbas.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NUM_TYPES = common local_unnamed_addr global i32 0, align 4
@NUM_BANDS = common local_unnamed_addr global i32 0, align 4
@NUM_CTX = common local_unnamed_addr global i32 0, align 4
@NUM_PROBAS = common local_unnamed_addr global i32 0, align 4
@VP8CoeffsUpdateProba = common local_unnamed_addr global ptr null, align 8
@VP8CoeffsProba0 = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @FinalizeTokenProbas], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @FinalizeTokenProbas(ptr nocapture noundef %0) #0 {
%2 = load i32, ptr @NUM_TYPES, align 4, !tbaa !6
%3 = icmp sgt i32 %2, 0
br i1 %3, label %4, label %132
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load i32, ptr @NUM_BANDS, align 4, !tbaa !6
br label %7
7: ; preds = %4, %123
%8 = phi i32 [ %2, %4 ], [ %124, %123 ]
%9 = phi i32 [ %6, %4 ], [ %125, %123 ]
%10 = phi i32 [ %6, %4 ], [ %126, %123 ]
%11 = phi i64 [ 0, %4 ], [ %129, %123 ]
%12 = phi i32 [ 0, %4 ], [ %128, %123 ]
%13 = phi i32 [ 0, %4 ], [ %127, %123 ]
%14 = icmp sgt i32 %10, 0
br i1 %14, label %15, label %123
15: ; preds = %7
%16 = load i32, ptr @NUM_CTX, align 4, !tbaa !6
br label %17
17: ; preds = %15, %112
%18 = phi i32 [ %9, %15 ], [ %113, %112 ]
%19 = phi i32 [ %16, %15 ], [ %114, %112 ]
%20 = phi i32 [ %16, %15 ], [ %115, %112 ]
%21 = phi i64 [ 0, %15 ], [ %118, %112 ]
%22 = phi i32 [ %12, %15 ], [ %117, %112 ]
%23 = phi i32 [ %13, %15 ], [ %116, %112 ]
%24 = icmp sgt i32 %20, 0
br i1 %24, label %25, label %112
25: ; preds = %17
%26 = load i32, ptr @NUM_PROBAS, align 4, !tbaa !6
br label %27
27: ; preds = %25, %102
%28 = phi i32 [ %19, %25 ], [ %103, %102 ]
%29 = phi i32 [ %26, %25 ], [ %104, %102 ]
%30 = phi i64 [ 0, %25 ], [ %107, %102 ]
%31 = phi i32 [ %22, %25 ], [ %106, %102 ]
%32 = phi i32 [ %23, %25 ], [ %105, %102 ]
%33 = icmp sgt i32 %29, 0
br i1 %33, label %34, label %102
34: ; preds = %27, %93
%35 = phi i64 [ %96, %93 ], [ 0, %27 ]
%36 = phi i32 [ %95, %93 ], [ %31, %27 ]
%37 = phi i32 [ %94, %93 ], [ %32, %27 ]
%38 = load ptr, ptr %0, align 8, !tbaa !10
%39 = getelementptr inbounds ptr, ptr %38, i64 %11
%40 = load ptr, ptr %39, align 8, !tbaa !13
%41 = getelementptr inbounds ptr, ptr %40, i64 %21
%42 = load ptr, ptr %41, align 8, !tbaa !13
%43 = getelementptr inbounds ptr, ptr %42, i64 %30
%44 = load ptr, ptr %43, align 8, !tbaa !13
%45 = getelementptr inbounds i32, ptr %44, i64 %35
%46 = load i32, ptr %45, align 4, !tbaa !6
%47 = and i32 %46, 65535
%48 = lshr i32 %46, 16
%49 = load ptr, ptr @VP8CoeffsUpdateProba, align 8, !tbaa !13
%50 = getelementptr inbounds ptr, ptr %49, i64 %11
%51 = load ptr, ptr %50, align 8, !tbaa !13
%52 = getelementptr inbounds ptr, ptr %51, i64 %21
%53 = load ptr, ptr %52, align 8, !tbaa !13
%54 = getelementptr inbounds ptr, ptr %53, i64 %30
%55 = load ptr, ptr %54, align 8, !tbaa !13
%56 = getelementptr inbounds i32, ptr %55, i64 %35
%57 = load i32, ptr %56, align 4, !tbaa !6
%58 = load ptr, ptr @VP8CoeffsProba0, align 8, !tbaa !13
%59 = getelementptr inbounds ptr, ptr %58, i64 %11
%60 = load ptr, ptr %59, align 8, !tbaa !13
%61 = getelementptr inbounds ptr, ptr %60, i64 %21
%62 = load ptr, ptr %61, align 8, !tbaa !13
%63 = getelementptr inbounds ptr, ptr %62, i64 %30
%64 = load ptr, ptr %63, align 8, !tbaa !13
%65 = getelementptr inbounds i32, ptr %64, i64 %35
%66 = load i32, ptr %65, align 4, !tbaa !6
%67 = tail call i32 @CalcTokenProba(i32 noundef %47, i32 noundef %48) #2
%68 = tail call i32 @BranchCost(i32 noundef %47, i32 noundef %48, i32 noundef %66) #2
%69 = tail call i32 @VP8BitCost(i32 noundef 0, i32 noundef %57) #2
%70 = add nsw i32 %69, %68
%71 = tail call i32 @BranchCost(i32 noundef %47, i32 noundef %48, i32 noundef %67) #2
%72 = tail call i32 @VP8BitCost(i32 noundef 1, i32 noundef %57) #2
%73 = add i32 %71, 2048
%74 = add i32 %73, %72
%75 = icmp sgt i32 %70, %74
%76 = zext i1 %75 to i32
%77 = tail call i32 @VP8BitCost(i32 noundef %76, i32 noundef %57) #2
%78 = add nsw i32 %77, %37
%79 = load ptr, ptr %5, align 8, !tbaa !14
%80 = getelementptr inbounds ptr, ptr %79, i64 %11
%81 = load ptr, ptr %80, align 8, !tbaa !13
%82 = getelementptr inbounds ptr, ptr %81, i64 %21
%83 = load ptr, ptr %82, align 8, !tbaa !13
%84 = getelementptr inbounds ptr, ptr %83, i64 %30
%85 = load ptr, ptr %84, align 8, !tbaa !13
%86 = getelementptr inbounds i32, ptr %85, i64 %35
br i1 %75, label %87, label %92
87: ; preds = %34
store i32 %67, ptr %86, align 4, !tbaa !6
%88 = icmp ne i32 %67, %66
%89 = zext i1 %88 to i32
%90 = or i32 %36, %89
%91 = add nsw i32 %78, 2048
br label %93
92: ; preds = %34
store i32 %66, ptr %86, align 4, !tbaa !6
br label %93
93: ; preds = %92, %87
%94 = phi i32 [ %91, %87 ], [ %78, %92 ]
%95 = phi i32 [ %90, %87 ], [ %36, %92 ]
%96 = add nuw nsw i64 %35, 1
%97 = load i32, ptr @NUM_PROBAS, align 4, !tbaa !6
%98 = sext i32 %97 to i64
%99 = icmp slt i64 %96, %98
br i1 %99, label %34, label %100, !llvm.loop !15
100: ; preds = %93
%101 = load i32, ptr @NUM_CTX, align 4, !tbaa !6
br label %102
102: ; preds = %100, %27
%103 = phi i32 [ %28, %27 ], [ %101, %100 ]
%104 = phi i32 [ %29, %27 ], [ %97, %100 ]
%105 = phi i32 [ %32, %27 ], [ %94, %100 ]
%106 = phi i32 [ %31, %27 ], [ %95, %100 ]
%107 = add nuw nsw i64 %30, 1
%108 = sext i32 %103 to i64
%109 = icmp slt i64 %107, %108
br i1 %109, label %27, label %110, !llvm.loop !17
110: ; preds = %102
%111 = load i32, ptr @NUM_BANDS, align 4, !tbaa !6
br label %112
112: ; preds = %110, %17
%113 = phi i32 [ %18, %17 ], [ %111, %110 ]
%114 = phi i32 [ %19, %17 ], [ %103, %110 ]
%115 = phi i32 [ %20, %17 ], [ %103, %110 ]
%116 = phi i32 [ %23, %17 ], [ %105, %110 ]
%117 = phi i32 [ %22, %17 ], [ %106, %110 ]
%118 = add nuw nsw i64 %21, 1
%119 = sext i32 %113 to i64
%120 = icmp slt i64 %118, %119
br i1 %120, label %17, label %121, !llvm.loop !18
121: ; preds = %112
%122 = load i32, ptr @NUM_TYPES, align 4, !tbaa !6
br label %123
123: ; preds = %121, %7
%124 = phi i32 [ %8, %7 ], [ %122, %121 ]
%125 = phi i32 [ %9, %7 ], [ %113, %121 ]
%126 = phi i32 [ %10, %7 ], [ %113, %121 ]
%127 = phi i32 [ %13, %7 ], [ %116, %121 ]
%128 = phi i32 [ %12, %7 ], [ %117, %121 ]
%129 = add nuw nsw i64 %11, 1
%130 = sext i32 %124 to i64
%131 = icmp slt i64 %129, %130
br i1 %131, label %7, label %132, !llvm.loop !19
132: ; preds = %123, %1
%133 = phi i32 [ 0, %1 ], [ %127, %123 ]
%134 = phi i32 [ 0, %1 ], [ %128, %123 ]
%135 = getelementptr inbounds i8, ptr %0, i64 16
store i32 %134, ptr %135, align 8, !tbaa !20
ret i32 %133
}
declare i32 @CalcTokenProba(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BranchCost(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @VP8BitCost(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_3__", !12, i64 0, !12, i64 8, !7, i64 16}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!11, !12, i64 8}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}
!18 = distinct !{!18, !16}
!19 = distinct !{!19, !16}
!20 = !{!11, !7, i64 16}
| sumatrapdf_ext_libwebp_src_enc_extr_frame_enc.c_FinalizeTokenProbas |
; ModuleID = 'AnghaBench/reactos/modules/rostests/apitests/wlanapi/extr_wlanapi.c_WlanGetInterfaceCapability_test.c'
source_filename = "AnghaBench/reactos/modules/rostests/apitests/wlanapi/extr_wlanapi.c_WlanGetInterfaceCapability_test.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@InterfaceGuid = dso_local global i32 0, align 4
@ERROR_INVALID_PARAMETER = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [18 x i8] c"expected failure\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @WlanGetInterfaceCapability_test], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @WlanGetInterfaceCapability_test() #0 {
%1 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
%2 = call i64 @WlanGetInterfaceCapability(i32 noundef -1, ptr noundef nonnull @InterfaceGuid, ptr noundef nonnull inttoptr (i64 1 to ptr), ptr noundef nonnull %1) #3
%3 = load i64, ptr @ERROR_INVALID_PARAMETER, align 8, !tbaa !5
%4 = icmp eq i64 %2, %3
%5 = zext i1 %4 to i32
%6 = call i32 @ok(i32 noundef %5, ptr noundef nonnull @.str) #3
%7 = call i64 @WlanGetInterfaceCapability(i32 noundef -1, ptr noundef null, ptr noundef null, ptr noundef nonnull %1) #3
%8 = load i64, ptr @ERROR_INVALID_PARAMETER, align 8, !tbaa !5
%9 = icmp eq i64 %7, %8
%10 = zext i1 %9 to i32
%11 = call i32 @ok(i32 noundef %10, ptr noundef nonnull @.str) #3
%12 = call i64 @WlanGetInterfaceCapability(i32 noundef -1, ptr noundef nonnull @InterfaceGuid, ptr noundef null, ptr noundef null) #3
%13 = load i64, ptr @ERROR_INVALID_PARAMETER, align 8, !tbaa !5
%14 = icmp eq i64 %12, %13
%15 = zext i1 %14 to i32
%16 = call i32 @ok(i32 noundef %15, ptr noundef nonnull @.str) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @WlanGetInterfaceCapability(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ok(i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/reactos/modules/rostests/apitests/wlanapi/extr_wlanapi.c_WlanGetInterfaceCapability_test.c'
source_filename = "AnghaBench/reactos/modules/rostests/apitests/wlanapi/extr_wlanapi.c_WlanGetInterfaceCapability_test.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@InterfaceGuid = common global i32 0, align 4
@ERROR_INVALID_PARAMETER = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [18 x i8] c"expected failure\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @WlanGetInterfaceCapability_test], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @WlanGetInterfaceCapability_test() #0 {
%1 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
%2 = call i64 @WlanGetInterfaceCapability(i32 noundef -1, ptr noundef nonnull @InterfaceGuid, ptr noundef nonnull inttoptr (i64 1 to ptr), ptr noundef nonnull %1) #3
%3 = load i64, ptr @ERROR_INVALID_PARAMETER, align 8, !tbaa !6
%4 = icmp eq i64 %2, %3
%5 = zext i1 %4 to i32
%6 = call i32 @ok(i32 noundef %5, ptr noundef nonnull @.str) #3
%7 = call i64 @WlanGetInterfaceCapability(i32 noundef -1, ptr noundef null, ptr noundef null, ptr noundef nonnull %1) #3
%8 = load i64, ptr @ERROR_INVALID_PARAMETER, align 8, !tbaa !6
%9 = icmp eq i64 %7, %8
%10 = zext i1 %9 to i32
%11 = call i32 @ok(i32 noundef %10, ptr noundef nonnull @.str) #3
%12 = call i64 @WlanGetInterfaceCapability(i32 noundef -1, ptr noundef nonnull @InterfaceGuid, ptr noundef null, ptr noundef null) #3
%13 = load i64, ptr @ERROR_INVALID_PARAMETER, align 8, !tbaa !6
%14 = icmp eq i64 %12, %13
%15 = zext i1 %14 to i32
%16 = call i32 @ok(i32 noundef %15, ptr noundef nonnull @.str) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @WlanGetInterfaceCapability(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ok(i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| reactos_modules_rostests_apitests_wlanapi_extr_wlanapi.c_WlanGetInterfaceCapability_test |
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/dumbpad/keymaps/imchipwood/extr_keymap.c_led_set_user.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/dumbpad/keymaps/imchipwood/extr_keymap.c_led_set_user.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local void @led_set_user(i32 noundef %0) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/qmk_firmware/keyboards/dumbpad/keymaps/imchipwood/extr_keymap.c_led_set_user.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/dumbpad/keymaps/imchipwood/extr_keymap.c_led_set_user.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @led_set_user(i32 noundef %0) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| qmk_firmware_keyboards_dumbpad_keymaps_imchipwood_extr_keymap.c_led_set_user |
; ModuleID = 'AnghaBench/RetroArch/griffin/extr_..libretro-commonqueuestask_queue.c_task_get_finished.c'
source_filename = "AnghaBench/RetroArch/griffin/extr_..libretro-commonqueuestask_queue.c_task_get_finished.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@property_lock = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @task_get_finished(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr @property_lock, align 4, !tbaa !5
%3 = tail call i32 @SLOCK_LOCK(i32 noundef %2) #2
%4 = load i32, ptr %0, align 4, !tbaa !9
%5 = load i32, ptr @property_lock, align 4, !tbaa !5
%6 = tail call i32 @SLOCK_UNLOCK(i32 noundef %5) #2
ret i32 %4
}
declare i32 @SLOCK_LOCK(i32 noundef) local_unnamed_addr #1
declare i32 @SLOCK_UNLOCK(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_3__", !6, i64 0}
| ; ModuleID = 'AnghaBench/RetroArch/griffin/extr_..libretro-commonqueuestask_queue.c_task_get_finished.c'
source_filename = "AnghaBench/RetroArch/griffin/extr_..libretro-commonqueuestask_queue.c_task_get_finished.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@property_lock = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @task_get_finished(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr @property_lock, align 4, !tbaa !6
%3 = tail call i32 @SLOCK_LOCK(i32 noundef %2) #2
%4 = load i32, ptr %0, align 4, !tbaa !10
%5 = load i32, ptr @property_lock, align 4, !tbaa !6
%6 = tail call i32 @SLOCK_UNLOCK(i32 noundef %5) #2
ret i32 %4
}
declare i32 @SLOCK_LOCK(i32 noundef) local_unnamed_addr #1
declare i32 @SLOCK_UNLOCK(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_3__", !7, i64 0}
| RetroArch_griffin_extr_..libretro-commonqueuestask_queue.c_task_get_finished |
; ModuleID = 'AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_clr_32_aw.c'
source_filename = "AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_clr_32_aw.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@NFLAG_CLEAR = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_N = dso_local local_unnamed_addr global i32 0, align 4
@VFLAG_CLEAR = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_V = dso_local local_unnamed_addr global i32 0, align 4
@CFLAG_CLEAR = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_C = dso_local local_unnamed_addr global i32 0, align 4
@ZFLAG_SET = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_Z = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @m68k_op_clr_32_aw], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @m68k_op_clr_32_aw() #0 {
%1 = tail call i32 (...) @EA_AW_32() #2
%2 = tail call i32 @m68ki_write_32(i32 noundef %1, i32 noundef 0) #2
%3 = load i32, ptr @NFLAG_CLEAR, align 4, !tbaa !5
store i32 %3, ptr @FLAG_N, align 4, !tbaa !5
%4 = load i32, ptr @VFLAG_CLEAR, align 4, !tbaa !5
store i32 %4, ptr @FLAG_V, align 4, !tbaa !5
%5 = load i32, ptr @CFLAG_CLEAR, align 4, !tbaa !5
store i32 %5, ptr @FLAG_C, align 4, !tbaa !5
%6 = load i32, ptr @ZFLAG_SET, align 4, !tbaa !5
store i32 %6, ptr @FLAG_Z, align 4, !tbaa !5
ret void
}
declare i32 @m68ki_write_32(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @EA_AW_32(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_clr_32_aw.c'
source_filename = "AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_clr_32_aw.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NFLAG_CLEAR = common local_unnamed_addr global i32 0, align 4
@FLAG_N = common local_unnamed_addr global i32 0, align 4
@VFLAG_CLEAR = common local_unnamed_addr global i32 0, align 4
@FLAG_V = common local_unnamed_addr global i32 0, align 4
@CFLAG_CLEAR = common local_unnamed_addr global i32 0, align 4
@FLAG_C = common local_unnamed_addr global i32 0, align 4
@ZFLAG_SET = common local_unnamed_addr global i32 0, align 4
@FLAG_Z = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @m68k_op_clr_32_aw], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @m68k_op_clr_32_aw() #0 {
%1 = tail call i32 @EA_AW_32() #2
%2 = tail call i32 @m68ki_write_32(i32 noundef %1, i32 noundef 0) #2
%3 = load i32, ptr @NFLAG_CLEAR, align 4, !tbaa !6
store i32 %3, ptr @FLAG_N, align 4, !tbaa !6
%4 = load i32, ptr @VFLAG_CLEAR, align 4, !tbaa !6
store i32 %4, ptr @FLAG_V, align 4, !tbaa !6
%5 = load i32, ptr @CFLAG_CLEAR, align 4, !tbaa !6
store i32 %5, ptr @FLAG_C, align 4, !tbaa !6
%6 = load i32, ptr @ZFLAG_SET, align 4, !tbaa !6
store i32 %6, ptr @FLAG_Z, align 4, !tbaa !6
ret void
}
declare i32 @m68ki_write_32(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @EA_AW_32(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| Provenance_Cores_Genesis-Plus-GX_PVGenesis_Genesis_GenesisCore_genplusgx_source_m68k_extr_m68kops.h_m68k_op_clr_32_aw |
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/extr_rme96.c_snd_rme96_setframelog.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/extr_rme96.c_snd_rme96_setframelog.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.rme96 = type { i32, i32, i32 }
@RME96_WCR_MODE24 = dso_local local_unnamed_addr global i32 0, align 4
@RME96_WCR_MODE24_2 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_rme96_setframelog], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define internal void @snd_rme96_setframelog(ptr nocapture noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = icmp eq i32 %1, 2
%5 = select i1 %4, i32 1, i32 3
%6 = icmp eq i32 %2, 0
%7 = load i32, ptr %0, align 4, !tbaa !5
br i1 %6, label %15, label %8
8: ; preds = %3
%9 = load i32, ptr @RME96_WCR_MODE24, align 4, !tbaa !10
%10 = and i32 %9, %7
%11 = icmp eq i32 %10, 0
%12 = select i1 %11, i32 1, i32 2
%13 = add nuw nsw i32 %12, %5
%14 = getelementptr inbounds %struct.rme96, ptr %0, i64 0, i32 1
store i32 %13, ptr %14, align 4, !tbaa !11
br label %22
15: ; preds = %3
%16 = load i32, ptr @RME96_WCR_MODE24_2, align 4, !tbaa !10
%17 = and i32 %16, %7
%18 = icmp eq i32 %17, 0
%19 = select i1 %18, i32 1, i32 2
%20 = add nuw nsw i32 %19, %5
%21 = getelementptr inbounds %struct.rme96, ptr %0, i64 0, i32 2
store i32 %20, ptr %21, align 4, !tbaa !12
br label %22
22: ; preds = %15, %8
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"rme96", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!6, !7, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/extr_rme96.c_snd_rme96_setframelog.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/extr_rme96.c_snd_rme96_setframelog.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RME96_WCR_MODE24 = common local_unnamed_addr global i32 0, align 4
@RME96_WCR_MODE24_2 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @snd_rme96_setframelog], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @snd_rme96_setframelog(ptr nocapture noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = icmp eq i32 %1, 2
%5 = select i1 %4, i32 1, i32 3
%6 = icmp eq i32 %2, 0
%7 = load i32, ptr %0, align 4, !tbaa !6
%8 = select i1 %6, i64 8, i64 4
%9 = load i32, ptr @RME96_WCR_MODE24_2, align 4
%10 = load i32, ptr @RME96_WCR_MODE24, align 4
%11 = select i1 %6, i32 %9, i32 %10
%12 = and i32 %11, %7
%13 = icmp eq i32 %12, 0
%14 = select i1 %13, i32 1, i32 2
%15 = add nuw nsw i32 %14, %5
%16 = getelementptr inbounds i8, ptr %0, i64 %8
store i32 %15, ptr %16, align 4, !tbaa !11
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"rme96", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| fastsocket_kernel_sound_pci_extr_rme96.c_snd_rme96_setframelog |
; ModuleID = 'AnghaBench/wcdb/repair/extr_sqliterk_api.c_sqliterk_column_type.c'
source_filename = "AnghaBench/wcdb/repair/extr_sqliterk_api.c_sqliterk_column_type.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @sqliterk_column_type(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @sqliterkColumnGetValues(ptr noundef %0) #2
%4 = tail call i32 @sqliterkValuesGetType(i32 noundef %3, i32 noundef %1) #2
ret i32 %4
}
declare i32 @sqliterkValuesGetType(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sqliterkColumnGetValues(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/wcdb/repair/extr_sqliterk_api.c_sqliterk_column_type.c'
source_filename = "AnghaBench/wcdb/repair/extr_sqliterk_api.c_sqliterk_column_type.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @sqliterk_column_type(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @sqliterkColumnGetValues(ptr noundef %0) #2
%4 = tail call i32 @sqliterkValuesGetType(i32 noundef %3, i32 noundef %1) #2
ret i32 %4
}
declare i32 @sqliterkValuesGetType(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sqliterkColumnGetValues(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| wcdb_repair_extr_sqliterk_api.c_sqliterk_column_type |
; ModuleID = 'AnghaBench/freebsd/lib/libnv/extr_msgio.c_fd_send.c'
source_filename = "AnghaBench/freebsd/lib/libnv/extr_msgio.c_fd_send.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@errno = dso_local local_unnamed_addr global i32 0, align 4
@PKG_MAX_SIZE = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @fd_send(i32 noundef %0, ptr noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = icmp eq i64 %2, 0
%5 = icmp eq ptr %1, null
%6 = or i1 %5, %4
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i32, ptr @EINVAL, align 4, !tbaa !5
store i32 %8, ptr @errno, align 4, !tbaa !5
br label %23
9: ; preds = %13
%10 = add i32 %15, %19
%11 = zext i32 %10 to i64
%12 = icmp ult i64 %11, %2
br i1 %12, label %13, label %23, !llvm.loop !9
13: ; preds = %3, %9
%14 = phi i64 [ %11, %9 ], [ 0, %3 ]
%15 = phi i32 [ %10, %9 ], [ 0, %3 ]
%16 = load i64, ptr @PKG_MAX_SIZE, align 8, !tbaa !11
%17 = sub i64 %2, %14
%18 = tail call i64 @llvm.umin.i64(i64 %16, i64 %17)
%19 = trunc i64 %18 to i32
%20 = getelementptr inbounds i32, ptr %1, i64 %14
%21 = tail call i32 @fd_package_send(i32 noundef %0, ptr noundef %20, i32 noundef %19) #3
%22 = icmp eq i32 %21, 0
br i1 %22, label %9, label %23
23: ; preds = %9, %13, %7
%24 = phi i32 [ -1, %7 ], [ 0, %9 ], [ %21, %13 ]
ret i32 %24
}
declare i32 @fd_package_send(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umin.i64(i64, i64) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/lib/libnv/extr_msgio.c_fd_send.c'
source_filename = "AnghaBench/freebsd/lib/libnv/extr_msgio.c_fd_send.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@errno = common local_unnamed_addr global i32 0, align 4
@PKG_MAX_SIZE = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @fd_send(i32 noundef %0, ptr noundef %1, i64 noundef %2) local_unnamed_addr #0 {
%4 = icmp eq i64 %2, 0
%5 = icmp eq ptr %1, null
%6 = or i1 %5, %4
br i1 %6, label %7, label %13
7: ; preds = %3
%8 = load i32, ptr @EINVAL, align 4, !tbaa !6
store i32 %8, ptr @errno, align 4, !tbaa !6
br label %23
9: ; preds = %13
%10 = add i32 %15, %19
%11 = zext i32 %10 to i64
%12 = icmp ult i64 %11, %2
br i1 %12, label %13, label %23, !llvm.loop !10
13: ; preds = %3, %9
%14 = phi i64 [ %11, %9 ], [ 0, %3 ]
%15 = phi i32 [ %10, %9 ], [ 0, %3 ]
%16 = load i64, ptr @PKG_MAX_SIZE, align 8, !tbaa !12
%17 = sub i64 %2, %14
%18 = tail call i64 @llvm.umin.i64(i64 %16, i64 %17)
%19 = trunc i64 %18 to i32
%20 = getelementptr inbounds i32, ptr %1, i64 %14
%21 = tail call i32 @fd_package_send(i32 noundef %0, ptr noundef %20, i32 noundef %19) #3
%22 = icmp eq i32 %21, 0
br i1 %22, label %9, label %23
23: ; preds = %9, %13, %7
%24 = phi i32 [ -1, %7 ], [ 0, %9 ], [ %21, %13 ]
ret i32 %24
}
declare i32 @fd_package_send(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umin.i64(i64, i64) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
| freebsd_lib_libnv_extr_msgio.c_fd_send |
; ModuleID = 'AnghaBench/openssl/crypto/ocsp/extr_ocsp_ext.c_OCSP_SINGLERESP_add_ext.c'
source_filename = "AnghaBench/openssl/crypto/ocsp/extr_ocsp_ext.c_OCSP_SINGLERESP_add_ext.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @OCSP_SINGLERESP_add_ext(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = tail call ptr @X509v3_add_ext(ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
%5 = icmp ne ptr %4, null
%6 = zext i1 %5 to i32
ret i32 %6
}
declare ptr @X509v3_add_ext(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/openssl/crypto/ocsp/extr_ocsp_ext.c_OCSP_SINGLERESP_add_ext.c'
source_filename = "AnghaBench/openssl/crypto/ocsp/extr_ocsp_ext.c_OCSP_SINGLERESP_add_ext.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @OCSP_SINGLERESP_add_ext(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = tail call ptr @X509v3_add_ext(ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
%5 = icmp ne ptr %4, null
%6 = zext i1 %5 to i32
ret i32 %6
}
declare ptr @X509v3_add_ext(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| openssl_crypto_ocsp_extr_ocsp_ext.c_OCSP_SINGLERESP_add_ext |
; ModuleID = 'AnghaBench/fastsocket/kernel/security/smack/extr_smack_lsm.c_smack_socket_getpeersec_dgram.c'
source_filename = "AnghaBench/fastsocket/kernel/security/smack/extr_smack_lsm.c_smack_socket_getpeersec_dgram.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.netlbl_lsm_secattr = type { i32 }
@SMK_LABELLEN = dso_local local_unnamed_addr global i32 0, align 4
@PF_INET = dso_local local_unnamed_addr global i32 0, align 4
@PF_INET6 = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @smack_socket_getpeersec_dgram], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @smack_socket_getpeersec_dgram(ptr noundef readonly %0, ptr noundef %1, ptr nocapture noundef writeonly %2) #0 {
%4 = alloca %struct.netlbl_lsm_secattr, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
%5 = load i32, ptr @SMK_LABELLEN, align 4, !tbaa !5
%6 = zext i32 %5 to i64
%7 = tail call ptr @llvm.stacksave.p0()
%8 = alloca i8, i64 %6, align 16
%9 = load i32, ptr @PF_INET, align 4, !tbaa !5
%10 = icmp eq ptr %0, null
br i1 %10, label %18, label %11
11: ; preds = %3
%12 = load ptr, ptr %0, align 8, !tbaa !9
%13 = load i32, ptr %12, align 4, !tbaa !12
%14 = icmp eq i32 %13, %9
%15 = load i32, ptr @PF_INET6, align 4
%16 = icmp eq i32 %13, %15
%17 = select i1 %14, i1 true, i1 %16
br i1 %17, label %18, label %34
18: ; preds = %11, %3
%19 = phi i32 [ %9, %3 ], [ %13, %11 ]
%20 = call i32 @netlbl_secattr_init(ptr noundef nonnull %4) #4
%21 = call i32 @netlbl_skbuff_getattr(ptr noundef %1, i32 noundef %19, ptr noundef nonnull %4) #4
%22 = icmp eq i32 %21, 0
br i1 %22, label %25, label %23
23: ; preds = %18
%24 = call i32 @netlbl_secattr_destroy(ptr noundef nonnull %4) #4
br label %34
25: ; preds = %18
%26 = call i32 @smack_from_secattr(ptr noundef nonnull %4, ptr noundef nonnull %8) #4
%27 = call i32 @netlbl_secattr_destroy(ptr noundef nonnull %4) #4
%28 = call i64 @smack_to_secid(ptr noundef nonnull %8) #4
%29 = icmp eq i64 %28, 0
br i1 %29, label %30, label %33
30: ; preds = %25
%31 = load i32, ptr @EINVAL, align 4, !tbaa !5
%32 = sub nsw i32 0, %31
br label %34
33: ; preds = %25
store i64 %28, ptr %2, align 8, !tbaa !14
br label %34
34: ; preds = %23, %11, %33, %30
%35 = phi i32 [ %32, %30 ], [ 0, %33 ], [ 0, %11 ], [ %21, %23 ]
call void @llvm.stackrestore.p0(ptr %7)
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
ret i32 %35
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #2
declare i32 @netlbl_secattr_init(ptr noundef) local_unnamed_addr #3
declare i32 @netlbl_skbuff_getattr(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3
declare i32 @smack_from_secattr(ptr noundef, ptr noundef) local_unnamed_addr #3
declare i32 @netlbl_secattr_destroy(ptr noundef) local_unnamed_addr #3
declare i64 @smack_to_secid(ptr noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"socket", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"sock", !6, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/security/smack/extr_smack_lsm.c_smack_socket_getpeersec_dgram.c'
source_filename = "AnghaBench/fastsocket/kernel/security/smack/extr_smack_lsm.c_smack_socket_getpeersec_dgram.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.netlbl_lsm_secattr = type { i32 }
@SMK_LABELLEN = common local_unnamed_addr global i32 0, align 4
@PF_INET = common local_unnamed_addr global i32 0, align 4
@PF_INET6 = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @smack_socket_getpeersec_dgram], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @smack_socket_getpeersec_dgram(ptr noundef readonly %0, ptr noundef %1, ptr nocapture noundef writeonly %2) #0 {
%4 = alloca %struct.netlbl_lsm_secattr, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
%5 = load i32, ptr @SMK_LABELLEN, align 4, !tbaa !6
%6 = zext i32 %5 to i64
%7 = tail call ptr @llvm.stacksave.p0()
%8 = alloca i8, i64 %6, align 1
%9 = load i32, ptr @PF_INET, align 4, !tbaa !6
%10 = icmp eq ptr %0, null
br i1 %10, label %18, label %11
11: ; preds = %3
%12 = load ptr, ptr %0, align 8, !tbaa !10
%13 = load i32, ptr %12, align 4, !tbaa !13
%14 = icmp eq i32 %13, %9
%15 = load i32, ptr @PF_INET6, align 4
%16 = icmp eq i32 %13, %15
%17 = select i1 %14, i1 true, i1 %16
br i1 %17, label %18, label %34
18: ; preds = %11, %3
%19 = phi i32 [ %9, %3 ], [ %13, %11 ]
%20 = call i32 @netlbl_secattr_init(ptr noundef nonnull %4) #4
%21 = call i32 @netlbl_skbuff_getattr(ptr noundef %1, i32 noundef %19, ptr noundef nonnull %4) #4
%22 = icmp eq i32 %21, 0
br i1 %22, label %25, label %23
23: ; preds = %18
%24 = call i32 @netlbl_secattr_destroy(ptr noundef nonnull %4) #4
br label %34
25: ; preds = %18
%26 = call i32 @smack_from_secattr(ptr noundef nonnull %4, ptr noundef nonnull %8) #4
%27 = call i32 @netlbl_secattr_destroy(ptr noundef nonnull %4) #4
%28 = call i64 @smack_to_secid(ptr noundef nonnull %8) #4
%29 = icmp eq i64 %28, 0
br i1 %29, label %30, label %33
30: ; preds = %25
%31 = load i32, ptr @EINVAL, align 4, !tbaa !6
%32 = sub nsw i32 0, %31
br label %34
33: ; preds = %25
store i64 %28, ptr %2, align 8, !tbaa !15
br label %34
34: ; preds = %23, %11, %33, %30
%35 = phi i32 [ %32, %30 ], [ 0, %33 ], [ 0, %11 ], [ %21, %23 ]
call void @llvm.stackrestore.p0(ptr %7)
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
ret i32 %35
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #2
declare i32 @netlbl_secattr_init(ptr noundef) local_unnamed_addr #3
declare i32 @netlbl_skbuff_getattr(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3
declare i32 @smack_from_secattr(ptr noundef, ptr noundef) local_unnamed_addr #3
declare i32 @netlbl_secattr_destroy(ptr noundef) local_unnamed_addr #3
declare i64 @smack_to_secid(ptr noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nosync nounwind willreturn }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"socket", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"sock", !7, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !8, i64 0}
| fastsocket_kernel_security_smack_extr_smack_lsm.c_smack_socket_getpeersec_dgram |
; ModuleID = 'AnghaBench/freebsd/contrib/ntp/libntp/extr_vint64ops.c_addv64.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/libntp/extr_vint64ops.c_addv64.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local { i64, i64 } @addv64(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = load i64, ptr %0, align 8, !tbaa.struct !5
%4 = trunc i64 %3 to i32
%5 = lshr i64 %3, 32
%6 = trunc i64 %5 to i32
%7 = getelementptr inbounds i8, ptr %0, i64 8
%8 = load i64, ptr %7, align 8, !tbaa.struct !12
%9 = getelementptr inbounds %struct.TYPE_6__, ptr %1, i64 0, i32 1
%10 = load i32, ptr %9, align 4, !tbaa !13
%11 = load i32, ptr %1, align 8, !tbaa !16
%12 = tail call i32 @M_ADD(i32 noundef %6, i32 noundef %4, i32 noundef %10, i32 noundef %11) #2
%13 = insertvalue { i64, i64 } poison, i64 %3, 0
%14 = insertvalue { i64, i64 } %13, i64 %8, 1
ret { i64, i64 } %14
}
declare i32 @M_ADD(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{i64 0, i64 4, !6, i64 4, i64 4, !6, i64 8, i64 8, !10}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{i64 0, i64 8, !10}
!13 = !{!14, !7, i64 4}
!14 = !{!"TYPE_7__", !15, i64 0, !11, i64 8}
!15 = !{!"TYPE_6__", !7, i64 0, !7, i64 4}
!16 = !{!14, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ntp/libntp/extr_vint64ops.c_addv64.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/libntp/extr_vint64ops.c_addv64.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define [2 x i64] @addv64(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = load i64, ptr %0, align 8
%4 = trunc i64 %3 to i32
%5 = lshr i64 %3, 32
%6 = trunc nuw i64 %5 to i32
%7 = getelementptr inbounds i8, ptr %0, i64 8
%8 = load i64, ptr %7, align 8, !tbaa !6
%9 = getelementptr inbounds i8, ptr %1, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !10
%11 = load i32, ptr %1, align 8, !tbaa !14
%12 = tail call i32 @M_ADD(i32 noundef %6, i32 noundef %4, i32 noundef %10, i32 noundef %11) #2
%13 = insertvalue [2 x i64] poison, i64 %3, 0
%14 = insertvalue [2 x i64] %13, i64 %8, 1
ret [2 x i64] %14
}
declare i32 @M_ADD(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 4}
!11 = !{!"TYPE_7__", !12, i64 0, !7, i64 8}
!12 = !{!"TYPE_6__", !13, i64 0, !13, i64 4}
!13 = !{!"int", !8, i64 0}
!14 = !{!11, !13, i64 0}
| freebsd_contrib_ntp_libntp_extr_vint64ops.c_addv64 |
; ModuleID = 'AnghaBench/linux/sound/mips/extr_sgio2audio.c_snd_sgio2audio_pcm_prepare.c'
source_filename = "AnghaBench/linux/sound/mips/extr_sgio2audio.c_snd_sgio2audio_pcm_prepare.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.snd_pcm_substream = type { i32, ptr }
%struct.snd_pcm_runtime = type { i32, i32, ptr }
%struct.TYPE_2__ = type { i32, ptr, i64, i64 }
%struct.snd_sgio2audio = type { ptr, i32 }
@SNDRV_PCM_FORMAT_S16_LE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_sgio2audio_pcm_prepare], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @snd_sgio2audio_pcm_prepare(ptr noundef %0) #0 {
%2 = tail call ptr @snd_pcm_substream_chip(ptr noundef %0) #3
%3 = getelementptr inbounds %struct.snd_pcm_substream, ptr %0, i64 0, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.snd_pcm_runtime, ptr %4, i64 0, i32 2
%6 = load ptr, ptr %5, align 8, !tbaa !11
%7 = load i32, ptr %6, align 4, !tbaa !13
%8 = load ptr, ptr %2, align 8, !tbaa !15
%9 = sext i32 %7 to i64
%10 = getelementptr inbounds %struct.TYPE_2__, ptr %8, i64 %9
%11 = tail call i32 @spin_lock_irqsave(ptr noundef %10, i64 noundef undef) #3
%12 = load ptr, ptr %2, align 8, !tbaa !15
%13 = getelementptr inbounds %struct.TYPE_2__, ptr %12, i64 %9, i32 2
%14 = getelementptr inbounds %struct.TYPE_2__, ptr %12, i64 %9, i32 1
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %13, i8 0, i64 16, i1 false)
store ptr %0, ptr %14, align 8, !tbaa !17
%15 = load i32, ptr %0, align 8, !tbaa !20
switch i32 %15, label %31 [
i32 128, label %16
i32 129, label %24
]
16: ; preds = %1
%17 = getelementptr inbounds %struct.snd_sgio2audio, ptr %2, i64 0, i32 1
%18 = add nsw i32 %7, -1
%19 = getelementptr inbounds %struct.snd_pcm_runtime, ptr %4, i64 0, i32 1
%20 = load i32, ptr %19, align 4, !tbaa !21
%21 = load i32, ptr @SNDRV_PCM_FORMAT_S16_LE, align 4, !tbaa !22
%22 = load i32, ptr %4, align 8, !tbaa !23
%23 = tail call i32 @ad1843_setup_dac(ptr noundef nonnull %17, i32 noundef %18, i32 noundef %20, i32 noundef %21, i32 noundef %22) #3
br label %31
24: ; preds = %1
%25 = getelementptr inbounds %struct.snd_sgio2audio, ptr %2, i64 0, i32 1
%26 = getelementptr inbounds %struct.snd_pcm_runtime, ptr %4, i64 0, i32 1
%27 = load i32, ptr %26, align 4, !tbaa !21
%28 = load i32, ptr @SNDRV_PCM_FORMAT_S16_LE, align 4, !tbaa !22
%29 = load i32, ptr %4, align 8, !tbaa !23
%30 = tail call i32 @ad1843_setup_adc(ptr noundef nonnull %25, i32 noundef %27, i32 noundef %28, i32 noundef %29) #3
br label %31
31: ; preds = %1, %24, %16
%32 = load ptr, ptr %2, align 8, !tbaa !15
%33 = getelementptr inbounds %struct.TYPE_2__, ptr %32, i64 %9
%34 = tail call i32 @spin_unlock_irqrestore(ptr noundef %33, i64 noundef undef) #3
ret i32 0
}
declare ptr @snd_pcm_substream_chip(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ad1843_setup_dac(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ad1843_setup_adc(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"snd_pcm_substream", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"snd_pcm_runtime", !7, i64 0, !7, i64 4, !10, i64 8}
!13 = !{!14, !7, i64 0}
!14 = !{!"snd_sgio2audio_chan", !7, i64 0}
!15 = !{!16, !10, i64 0}
!16 = !{!"snd_sgio2audio", !10, i64 0, !7, i64 8}
!17 = !{!18, !10, i64 8}
!18 = !{!"TYPE_2__", !7, i64 0, !10, i64 8, !19, i64 16, !19, i64 24}
!19 = !{!"long", !8, i64 0}
!20 = !{!6, !7, i64 0}
!21 = !{!12, !7, i64 4}
!22 = !{!7, !7, i64 0}
!23 = !{!12, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/sound/mips/extr_sgio2audio.c_snd_sgio2audio_pcm_prepare.c'
source_filename = "AnghaBench/linux/sound/mips/extr_sgio2audio.c_snd_sgio2audio_pcm_prepare.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32, ptr, i64, i64 }
@SNDRV_PCM_FORMAT_S16_LE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @snd_sgio2audio_pcm_prepare], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @snd_sgio2audio_pcm_prepare(ptr noundef %0) #0 {
%2 = tail call ptr @snd_pcm_substream_chip(ptr noundef %0) #3
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %4, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !12
%7 = load i32, ptr %6, align 4, !tbaa !14
%8 = load ptr, ptr %2, align 8, !tbaa !16
%9 = sext i32 %7 to i64
%10 = getelementptr inbounds %struct.TYPE_2__, ptr %8, i64 %9
%11 = tail call i32 @spin_lock_irqsave(ptr noundef %10, i64 noundef undef) #3
%12 = load ptr, ptr %2, align 8, !tbaa !16
%13 = getelementptr inbounds %struct.TYPE_2__, ptr %12, i64 %9, i32 2
%14 = getelementptr inbounds %struct.TYPE_2__, ptr %12, i64 %9, i32 1
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %13, i8 0, i64 16, i1 false)
store ptr %0, ptr %14, align 8, !tbaa !18
%15 = load i32, ptr %0, align 8, !tbaa !21
switch i32 %15, label %31 [
i32 128, label %16
i32 129, label %24
]
16: ; preds = %1
%17 = getelementptr inbounds i8, ptr %2, i64 8
%18 = add nsw i32 %7, -1
%19 = getelementptr inbounds i8, ptr %4, i64 4
%20 = load i32, ptr %19, align 4, !tbaa !22
%21 = load i32, ptr @SNDRV_PCM_FORMAT_S16_LE, align 4, !tbaa !23
%22 = load i32, ptr %4, align 8, !tbaa !24
%23 = tail call i32 @ad1843_setup_dac(ptr noundef nonnull %17, i32 noundef %18, i32 noundef %20, i32 noundef %21, i32 noundef %22) #3
br label %31
24: ; preds = %1
%25 = getelementptr inbounds i8, ptr %2, i64 8
%26 = getelementptr inbounds i8, ptr %4, i64 4
%27 = load i32, ptr %26, align 4, !tbaa !22
%28 = load i32, ptr @SNDRV_PCM_FORMAT_S16_LE, align 4, !tbaa !23
%29 = load i32, ptr %4, align 8, !tbaa !24
%30 = tail call i32 @ad1843_setup_adc(ptr noundef nonnull %25, i32 noundef %27, i32 noundef %28, i32 noundef %29) #3
br label %31
31: ; preds = %1, %24, %16
%32 = load ptr, ptr %2, align 8, !tbaa !16
%33 = getelementptr inbounds %struct.TYPE_2__, ptr %32, i64 %9
%34 = tail call i32 @spin_unlock_irqrestore(ptr noundef %33, i64 noundef undef) #3
ret i32 0
}
declare ptr @snd_pcm_substream_chip(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @ad1843_setup_dac(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ad1843_setup_adc(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"snd_pcm_substream", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 8}
!13 = !{!"snd_pcm_runtime", !8, i64 0, !8, i64 4, !11, i64 8}
!14 = !{!15, !8, i64 0}
!15 = !{!"snd_sgio2audio_chan", !8, i64 0}
!16 = !{!17, !11, i64 0}
!17 = !{!"snd_sgio2audio", !11, i64 0, !8, i64 8}
!18 = !{!19, !11, i64 8}
!19 = !{!"TYPE_2__", !8, i64 0, !11, i64 8, !20, i64 16, !20, i64 24}
!20 = !{!"long", !9, i64 0}
!21 = !{!7, !8, i64 0}
!22 = !{!13, !8, i64 4}
!23 = !{!8, !8, i64 0}
!24 = !{!13, !8, i64 0}
| linux_sound_mips_extr_sgio2audio.c_snd_sgio2audio_pcm_prepare |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_si.c_si_uvd_resume.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_si.c_si_uvd_resume.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.radeon_device = type { i32, ptr, i32 }
%struct.radeon_ring = type { i32 }
@R600_RING_TYPE_UVD_INDEX = dso_local local_unnamed_addr global i64 0, align 8
@UVD_NO_OP = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [36 x i8] c"failed initializing UVD ring (%d).\0A\00", align 1
@.str.1 = private unnamed_addr constant [31 x i8] c"failed initializing UVD (%d).\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @si_uvd_resume], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @si_uvd_resume(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.radeon_device, ptr %0, i64 0, i32 2
%3 = load i32, ptr %2, align 8, !tbaa !5
%4 = icmp eq i32 %3, 0
br i1 %4, label %26, label %5
5: ; preds = %1
%6 = getelementptr inbounds %struct.radeon_device, ptr %0, i64 0, i32 1
%7 = load ptr, ptr %6, align 8, !tbaa !11
%8 = load i64, ptr @R600_RING_TYPE_UVD_INDEX, align 8, !tbaa !12
%9 = getelementptr inbounds %struct.radeon_ring, ptr %7, i64 %8
%10 = load i32, ptr %9, align 4, !tbaa !14
%11 = icmp eq i32 %10, 0
br i1 %11, label %26, label %12
12: ; preds = %5
%13 = load i32, ptr @UVD_NO_OP, align 4, !tbaa !16
%14 = tail call i32 @PACKET0(i32 noundef %13, i32 noundef 0) #2
%15 = tail call i32 @radeon_ring_init(ptr noundef nonnull %0, ptr noundef nonnull %9, i32 noundef %10, i32 noundef 0, i32 noundef %14) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %12
%18 = load i32, ptr %0, align 8, !tbaa !17
%19 = tail call i32 @dev_err(i32 noundef %18, ptr noundef nonnull @.str, i32 noundef %15) #2
br label %26
20: ; preds = %12
%21 = tail call i32 @uvd_v1_0_init(ptr noundef nonnull %0) #2
%22 = icmp eq i32 %21, 0
br i1 %22, label %26, label %23
23: ; preds = %20
%24 = load i32, ptr %0, align 8, !tbaa !17
%25 = tail call i32 @dev_err(i32 noundef %24, ptr noundef nonnull @.str.1, i32 noundef %21) #2
br label %26
26: ; preds = %20, %1, %5, %23, %17
ret void
}
declare i32 @radeon_ring_init(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PACKET0(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @uvd_v1_0_init(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"radeon_device", !7, i64 0, !10, i64 8, !7, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!15, !7, i64 0}
!15 = !{!"radeon_ring", !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_si.c_si_uvd_resume.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_si.c_si_uvd_resume.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.radeon_ring = type { i32 }
@R600_RING_TYPE_UVD_INDEX = common local_unnamed_addr global i64 0, align 8
@UVD_NO_OP = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [36 x i8] c"failed initializing UVD ring (%d).\0A\00", align 1
@.str.1 = private unnamed_addr constant [31 x i8] c"failed initializing UVD (%d).\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @si_uvd_resume], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @si_uvd_resume(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load i32, ptr %2, align 8, !tbaa !6
%4 = icmp eq i32 %3, 0
br i1 %4, label %26, label %5
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !12
%8 = load i64, ptr @R600_RING_TYPE_UVD_INDEX, align 8, !tbaa !13
%9 = getelementptr inbounds %struct.radeon_ring, ptr %7, i64 %8
%10 = load i32, ptr %9, align 4, !tbaa !15
%11 = icmp eq i32 %10, 0
br i1 %11, label %26, label %12
12: ; preds = %5
%13 = load i32, ptr @UVD_NO_OP, align 4, !tbaa !17
%14 = tail call i32 @PACKET0(i32 noundef %13, i32 noundef 0) #2
%15 = tail call i32 @radeon_ring_init(ptr noundef nonnull %0, ptr noundef nonnull %9, i32 noundef %10, i32 noundef 0, i32 noundef %14) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %12
%18 = load i32, ptr %0, align 8, !tbaa !18
%19 = tail call i32 @dev_err(i32 noundef %18, ptr noundef nonnull @.str, i32 noundef %15) #2
br label %26
20: ; preds = %12
%21 = tail call i32 @uvd_v1_0_init(ptr noundef nonnull %0) #2
%22 = icmp eq i32 %21, 0
br i1 %22, label %26, label %23
23: ; preds = %20
%24 = load i32, ptr %0, align 8, !tbaa !18
%25 = tail call i32 @dev_err(i32 noundef %24, ptr noundef nonnull @.str.1, i32 noundef %21) #2
br label %26
26: ; preds = %20, %1, %5, %23, %17
ret void
}
declare i32 @radeon_ring_init(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PACKET0(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @uvd_v1_0_init(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"radeon_device", !8, i64 0, !11, i64 8, !8, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!16, !8, i64 0}
!16 = !{!"radeon_ring", !8, i64 0}
!17 = !{!8, !8, i64 0}
!18 = !{!7, !8, i64 0}
| linux_drivers_gpu_drm_radeon_extr_si.c_si_uvd_resume |
; ModuleID = 'AnghaBench/php-src/ext/hash/sha3/generic64lc/extr_KeccakP-1600-opt64.c_KeccakP1600_OverwriteBytesInLane.c'
source_filename = "AnghaBench/php-src/ext/hash/sha3/generic64lc/extr_KeccakP-1600-opt64.c_KeccakP1600_OverwriteBytesInLane.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @KeccakP1600_OverwriteBytesInLane(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
%6 = shl i32 %1, 3
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds i8, ptr %0, i64 %7
%9 = zext i32 %3 to i64
%10 = getelementptr inbounds i8, ptr %8, i64 %9
%11 = tail call i32 @memcpy(ptr noundef %10, ptr noundef %2, i32 noundef %4) #2
ret void
}
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/php-src/ext/hash/sha3/generic64lc/extr_KeccakP-1600-opt64.c_KeccakP1600_OverwriteBytesInLane.c'
source_filename = "AnghaBench/php-src/ext/hash/sha3/generic64lc/extr_KeccakP-1600-opt64.c_KeccakP1600_OverwriteBytesInLane.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @KeccakP1600_OverwriteBytesInLane(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
%6 = shl i32 %1, 3
%7 = zext i32 %6 to i64
%8 = getelementptr inbounds i8, ptr %0, i64 %7
%9 = zext i32 %3 to i64
%10 = getelementptr inbounds i8, ptr %8, i64 %9
%11 = tail call i32 @memcpy(ptr noundef %10, ptr noundef %2, i32 noundef %4) #2
ret void
}
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| php-src_ext_hash_sha3_generic64lc_extr_KeccakP-1600-opt64.c_KeccakP1600_OverwriteBytesInLane |
; ModuleID = 'AnghaBench/xLua/build/lua-5.1.5/src/extr_loadlib.c_ll_loadlib.c'
source_filename = "AnghaBench/xLua/build/lua-5.1.5/src/extr_loadlib.c_ll_loadlib.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ERRLIB = dso_local local_unnamed_addr global i32 0, align 4
@LIB_FAIL = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [5 x i8] c"init\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @ll_loadlib], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @ll_loadlib(ptr noundef %0) #0 {
%2 = tail call ptr @luaL_checkstring(ptr noundef %0, i32 noundef 1) #2
%3 = tail call ptr @luaL_checkstring(ptr noundef %0, i32 noundef 2) #2
%4 = tail call i32 @ll_loadfunc(ptr noundef %0, ptr noundef %2, ptr noundef %3) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = tail call i32 @lua_pushnil(ptr noundef %0) #2
%8 = tail call i32 @lua_insert(ptr noundef %0, i32 noundef -2) #2
%9 = load i32, ptr @ERRLIB, align 4, !tbaa !5
%10 = icmp eq i32 %4, %9
%11 = load ptr, ptr @LIB_FAIL, align 8
%12 = select i1 %10, ptr %11, ptr @.str
%13 = tail call i32 @lua_pushstring(ptr noundef %0, ptr noundef %12) #2
br label %14
14: ; preds = %1, %6
%15 = phi i32 [ 3, %6 ], [ 1, %1 ]
ret i32 %15
}
declare ptr @luaL_checkstring(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ll_loadfunc(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @lua_pushnil(ptr noundef) local_unnamed_addr #1
declare i32 @lua_insert(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_pushstring(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/xLua/build/lua-5.1.5/src/extr_loadlib.c_ll_loadlib.c'
source_filename = "AnghaBench/xLua/build/lua-5.1.5/src/extr_loadlib.c_ll_loadlib.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ERRLIB = common local_unnamed_addr global i32 0, align 4
@LIB_FAIL = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [5 x i8] c"init\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ll_loadlib], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 1, 4) i32 @ll_loadlib(ptr noundef %0) #0 {
%2 = tail call ptr @luaL_checkstring(ptr noundef %0, i32 noundef 1) #2
%3 = tail call ptr @luaL_checkstring(ptr noundef %0, i32 noundef 2) #2
%4 = tail call i32 @ll_loadfunc(ptr noundef %0, ptr noundef %2, ptr noundef %3) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = tail call i32 @lua_pushnil(ptr noundef %0) #2
%8 = tail call i32 @lua_insert(ptr noundef %0, i32 noundef -2) #2
%9 = load i32, ptr @ERRLIB, align 4, !tbaa !6
%10 = icmp eq i32 %4, %9
%11 = load ptr, ptr @LIB_FAIL, align 8
%12 = select i1 %10, ptr %11, ptr @.str
%13 = tail call i32 @lua_pushstring(ptr noundef %0, ptr noundef %12) #2
br label %14
14: ; preds = %1, %6
%15 = phi i32 [ 3, %6 ], [ 1, %1 ]
ret i32 %15
}
declare ptr @luaL_checkstring(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ll_loadfunc(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @lua_pushnil(ptr noundef) local_unnamed_addr #1
declare i32 @lua_insert(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_pushstring(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| xLua_build_lua-5.1.5_src_extr_loadlib.c_ll_loadlib |
; ModuleID = 'AnghaBench/freebsd/contrib/ofed/libibmad/extr_cc.c_cc_query_status_via.c'
source_filename = "AnghaBench/freebsd/contrib/ofed/libibmad/extr_cc.c_cc_query_status_via.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, i32, i32, i32, i32, i32, %struct.TYPE_7__, i32, i32 }
%struct.TYPE_7__ = type { i32, i32 }
%struct.TYPE_9__ = type { i32, i64 }
@.str = private unnamed_addr constant [28 x i8] c"attr 0x%x mod 0x%x route %s\00", align 1
@IB_MAD_METHOD_GET = dso_local local_unnamed_addr global i32 0, align 4
@IB_CC_ATTR_CONGESTION_LOG = dso_local local_unnamed_addr global i32 0, align 4
@IB_CC_LOG_DATA_SZ = dso_local local_unnamed_addr global i32 0, align 4
@IB_CC_LOG_DATA_OFFS = dso_local local_unnamed_addr global i32 0, align 4
@IB_CC_DATA_SZ = dso_local local_unnamed_addr global i32 0, align 4
@IB_CC_DATA_OFFS = dso_local local_unnamed_addr global i32 0, align 4
@IB_CC_CLASS = dso_local local_unnamed_addr global i32 0, align 4
@IB_DEFAULT_QP1_QKEY = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local ptr @cc_query_status_via(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef writeonly %5, ptr noundef %6, i32 noundef %7) local_unnamed_addr #0 {
%9 = alloca %struct.TYPE_8__, align 4
call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %9) #4
%10 = getelementptr inbounds i8, ptr %9, i64 4
call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(40) %10, i8 0, i64 36, i1 false)
%11 = tail call i32 @portid2str(ptr noundef %1) #4
%12 = tail call i32 @DEBUG(ptr noundef nonnull @.str, i32 noundef %2, i32 noundef %3, i32 noundef %11) #4
%13 = load i32, ptr @IB_MAD_METHOD_GET, align 4, !tbaa !5
%14 = getelementptr inbounds %struct.TYPE_8__, ptr %9, i64 0, i32 7
store i32 %13, ptr %14, align 4, !tbaa !9
%15 = getelementptr inbounds %struct.TYPE_8__, ptr %9, i64 0, i32 6
store i32 %2, ptr %15, align 4, !tbaa !12
%16 = getelementptr inbounds %struct.TYPE_8__, ptr %9, i64 0, i32 6, i32 1
store i32 %3, ptr %16, align 4, !tbaa !13
store i32 %4, ptr %9, align 4, !tbaa !14
%17 = load i32, ptr @IB_CC_ATTR_CONGESTION_LOG, align 4, !tbaa !5
%18 = icmp eq i32 %17, %2
%19 = load i32, ptr @IB_CC_LOG_DATA_OFFS, align 4
%20 = load i32, ptr @IB_CC_DATA_OFFS, align 4
%21 = select i1 %18, i32 %19, i32 %20
%22 = load i32, ptr @IB_CC_LOG_DATA_SZ, align 4
%23 = load i32, ptr @IB_CC_DATA_SZ, align 4
%24 = select i1 %18, i32 %22, i32 %23
%25 = getelementptr inbounds %struct.TYPE_8__, ptr %9, i64 0, i32 5
store i32 %24, ptr %25, align 4
%26 = getelementptr inbounds %struct.TYPE_8__, ptr %9, i64 0, i32 4
store i32 %21, ptr %26, align 4
%27 = load i32, ptr @IB_CC_CLASS, align 4, !tbaa !5
%28 = getelementptr inbounds %struct.TYPE_8__, ptr %9, i64 0, i32 3
store i32 %27, ptr %28, align 4, !tbaa !15
%29 = getelementptr inbounds %struct.TYPE_8__, ptr %9, i64 0, i32 2
store i32 %7, ptr %29, align 4, !tbaa !16
store i32 1, ptr %1, align 8, !tbaa !17
%30 = getelementptr inbounds %struct.TYPE_9__, ptr %1, i64 0, i32 1
%31 = load i64, ptr %30, align 8, !tbaa !20
%32 = icmp eq i64 %31, 0
br i1 %32, label %33, label %35
33: ; preds = %8
%34 = load i64, ptr @IB_DEFAULT_QP1_QKEY, align 8, !tbaa !21
store i64 %34, ptr %30, align 8, !tbaa !20
br label %35
35: ; preds = %33, %8
%36 = call ptr @mad_rpc(ptr noundef %6, ptr noundef nonnull %9, ptr noundef nonnull %1, ptr noundef %0, ptr noundef %0) #4
%37 = icmp eq ptr %5, null
br i1 %37, label %41, label %38
38: ; preds = %35
%39 = getelementptr inbounds %struct.TYPE_8__, ptr %9, i64 0, i32 1
%40 = load i32, ptr %39, align 4, !tbaa !22
store i32 %40, ptr %5, align 4, !tbaa !5
br label %41
41: ; preds = %38, %35
call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %9) #4
ret ptr %36
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
declare i32 @DEBUG(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #3
declare i32 @portid2str(ptr noundef) local_unnamed_addr #3
declare ptr @mad_rpc(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 32}
!10 = !{!"TYPE_8__", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !11, i64 24, !6, i64 32, !6, i64 36}
!11 = !{!"TYPE_7__", !6, i64 0, !6, i64 4}
!12 = !{!10, !6, i64 24}
!13 = !{!10, !6, i64 28}
!14 = !{!10, !6, i64 0}
!15 = !{!10, !6, i64 12}
!16 = !{!10, !6, i64 8}
!17 = !{!18, !6, i64 0}
!18 = !{!"TYPE_9__", !6, i64 0, !19, i64 8}
!19 = !{!"long", !7, i64 0}
!20 = !{!18, !19, i64 8}
!21 = !{!19, !19, i64 0}
!22 = !{!10, !6, i64 4}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ofed/libibmad/extr_cc.c_cc_query_status_via.c'
source_filename = "AnghaBench/freebsd/contrib/ofed/libibmad/extr_cc.c_cc_query_status_via.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_8__ = type { i32, i32, i32, i32, i32, i32, %struct.TYPE_7__, i32, i32 }
%struct.TYPE_7__ = type { i32, i32 }
@.str = private unnamed_addr constant [28 x i8] c"attr 0x%x mod 0x%x route %s\00", align 1
@IB_MAD_METHOD_GET = common local_unnamed_addr global i32 0, align 4
@IB_CC_ATTR_CONGESTION_LOG = common local_unnamed_addr global i32 0, align 4
@IB_CC_LOG_DATA_SZ = common local_unnamed_addr global i32 0, align 4
@IB_CC_LOG_DATA_OFFS = common local_unnamed_addr global i32 0, align 4
@IB_CC_DATA_SZ = common local_unnamed_addr global i32 0, align 4
@IB_CC_DATA_OFFS = common local_unnamed_addr global i32 0, align 4
@IB_CC_CLASS = common local_unnamed_addr global i32 0, align 4
@IB_DEFAULT_QP1_QKEY = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @cc_query_status_via(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef writeonly %5, ptr noundef %6, i32 noundef %7) local_unnamed_addr #0 {
%9 = alloca %struct.TYPE_8__, align 4
call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %9) #4
%10 = getelementptr inbounds i8, ptr %9, i64 4
call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(40) %10, i8 0, i64 36, i1 false)
%11 = tail call i32 @portid2str(ptr noundef %1) #4
%12 = tail call i32 @DEBUG(ptr noundef nonnull @.str, i32 noundef %2, i32 noundef %3, i32 noundef %11) #4
%13 = load i32, ptr @IB_MAD_METHOD_GET, align 4, !tbaa !6
%14 = getelementptr inbounds i8, ptr %9, i64 32
store i32 %13, ptr %14, align 4, !tbaa !10
%15 = getelementptr inbounds i8, ptr %9, i64 24
store i32 %2, ptr %15, align 4, !tbaa !13
%16 = getelementptr inbounds i8, ptr %9, i64 28
store i32 %3, ptr %16, align 4, !tbaa !14
store i32 %4, ptr %9, align 4, !tbaa !15
%17 = load i32, ptr @IB_CC_ATTR_CONGESTION_LOG, align 4, !tbaa !6
%18 = icmp eq i32 %17, %2
%19 = load i32, ptr @IB_CC_LOG_DATA_OFFS, align 4
%20 = load i32, ptr @IB_CC_DATA_OFFS, align 4
%21 = select i1 %18, i32 %19, i32 %20
%22 = load i32, ptr @IB_CC_LOG_DATA_SZ, align 4
%23 = load i32, ptr @IB_CC_DATA_SZ, align 4
%24 = select i1 %18, i32 %22, i32 %23
%25 = getelementptr inbounds i8, ptr %9, i64 20
store i32 %24, ptr %25, align 4
%26 = getelementptr inbounds i8, ptr %9, i64 16
store i32 %21, ptr %26, align 4
%27 = load i32, ptr @IB_CC_CLASS, align 4, !tbaa !6
%28 = getelementptr inbounds i8, ptr %9, i64 12
store i32 %27, ptr %28, align 4, !tbaa !16
%29 = getelementptr inbounds i8, ptr %9, i64 8
store i32 %7, ptr %29, align 4, !tbaa !17
store i32 1, ptr %1, align 8, !tbaa !18
%30 = getelementptr inbounds i8, ptr %1, i64 8
%31 = load i64, ptr %30, align 8, !tbaa !21
%32 = icmp eq i64 %31, 0
br i1 %32, label %33, label %35
33: ; preds = %8
%34 = load i64, ptr @IB_DEFAULT_QP1_QKEY, align 8, !tbaa !22
store i64 %34, ptr %30, align 8, !tbaa !21
br label %35
35: ; preds = %33, %8
%36 = call ptr @mad_rpc(ptr noundef %6, ptr noundef nonnull %9, ptr noundef nonnull %1, ptr noundef %0, ptr noundef %0) #4
%37 = icmp eq ptr %5, null
br i1 %37, label %40, label %38
38: ; preds = %35
%39 = load i32, ptr %10, align 4, !tbaa !23
store i32 %39, ptr %5, align 4, !tbaa !6
br label %40
40: ; preds = %38, %35
call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %9) #4
ret ptr %36
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
declare i32 @DEBUG(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #3
declare i32 @portid2str(ptr noundef) local_unnamed_addr #3
declare ptr @mad_rpc(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 32}
!11 = !{!"TYPE_8__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !12, i64 24, !7, i64 32, !7, i64 36}
!12 = !{!"TYPE_7__", !7, i64 0, !7, i64 4}
!13 = !{!11, !7, i64 24}
!14 = !{!11, !7, i64 28}
!15 = !{!11, !7, i64 0}
!16 = !{!11, !7, i64 12}
!17 = !{!11, !7, i64 8}
!18 = !{!19, !7, i64 0}
!19 = !{!"TYPE_9__", !7, i64 0, !20, i64 8}
!20 = !{!"long", !8, i64 0}
!21 = !{!19, !20, i64 8}
!22 = !{!20, !20, i64 0}
!23 = !{!11, !7, i64 4}
| freebsd_contrib_ofed_libibmad_extr_cc.c_cc_query_status_via |
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/au88x0/extr_au88x0_core.c_vortex_wtdma_stopfifo.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/au88x0/extr_au88x0_core.c_vortex_wtdma_stopfifo.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i64, i64, i32 }
@FIFO_START = dso_local local_unnamed_addr global i64 0, align 8
@FIFO_STOP = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @vortex_wtdma_stopfifo], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @vortex_wtdma_stopfifo(ptr noundef %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds %struct.TYPE_6__, ptr %3, i64 %4
%6 = load i64, ptr %5, align 8, !tbaa !10
%7 = load i64, ptr @FIFO_START, align 8, !tbaa !14
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = getelementptr inbounds %struct.TYPE_6__, ptr %3, i64 %4, i32 2
%11 = load i32, ptr %10, align 8, !tbaa !15
%12 = tail call i32 @vortex_fifo_setwtctrl(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %11, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
%13 = load i64, ptr @FIFO_STOP, align 8, !tbaa !14
br label %17
14: ; preds = %2
%15 = load i64, ptr @FIFO_STOP, align 8, !tbaa !14
%16 = icmp eq i64 %6, %15
br i1 %16, label %20, label %17
17: ; preds = %14, %9
%18 = phi i64 [ %15, %14 ], [ %13, %9 ]
store i64 %18, ptr %5, align 8, !tbaa !10
%19 = getelementptr inbounds %struct.TYPE_6__, ptr %3, i64 %4, i32 1
store i64 0, ptr %19, align 8, !tbaa !16
br label %20
20: ; preds = %14, %17
ret void
}
declare i32 @vortex_fifo_setwtctrl(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_6__", !12, i64 0, !12, i64 8, !13, i64 16}
!12 = !{!"long", !8, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!12, !12, i64 0}
!15 = !{!11, !13, i64 16}
!16 = !{!11, !12, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/au88x0/extr_au88x0_core.c_vortex_wtdma_stopfifo.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/au88x0/extr_au88x0_core.c_vortex_wtdma_stopfifo.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_6__ = type { i64, i64, i32 }
@FIFO_START = common local_unnamed_addr global i64 0, align 8
@FIFO_STOP = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @vortex_wtdma_stopfifo], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @vortex_wtdma_stopfifo(ptr noundef %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = sext i32 %1 to i64
%5 = getelementptr inbounds %struct.TYPE_6__, ptr %3, i64 %4
%6 = load i64, ptr %5, align 8, !tbaa !11
%7 = load i64, ptr @FIFO_START, align 8, !tbaa !15
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %14
9: ; preds = %2
%10 = getelementptr inbounds i8, ptr %5, i64 16
%11 = load i32, ptr %10, align 8, !tbaa !16
%12 = tail call i32 @vortex_fifo_setwtctrl(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %11, i32 noundef 0, i32 noundef 0, i32 noundef 0, i32 noundef 0) #2
%13 = load i64, ptr @FIFO_STOP, align 8, !tbaa !15
br label %17
14: ; preds = %2
%15 = load i64, ptr @FIFO_STOP, align 8, !tbaa !15
%16 = icmp eq i64 %6, %15
br i1 %16, label %20, label %17
17: ; preds = %14, %9
%18 = phi i64 [ %15, %14 ], [ %13, %9 ]
store i64 %18, ptr %5, align 8, !tbaa !11
%19 = getelementptr inbounds i8, ptr %5, i64 8
store i64 0, ptr %19, align 8, !tbaa !17
br label %20
20: ; preds = %14, %17
ret void
}
declare i32 @vortex_fifo_setwtctrl(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_6__", !13, i64 0, !13, i64 8, !14, i64 16}
!13 = !{!"long", !9, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!13, !13, i64 0}
!16 = !{!12, !14, i64 16}
!17 = !{!12, !13, i64 8}
| fastsocket_kernel_sound_pci_au88x0_extr_au88x0_core.c_vortex_wtdma_stopfifo |
; ModuleID = 'AnghaBench/freebsd/contrib/ncurses/progs/extr_toe.c_term_description.c'
source_filename = "AnghaBench/freebsd/contrib/ncurses/progs/extr_toe.c_term_description.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [17 x i8] c"(No description)\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @term_description], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef nonnull ptr @term_description(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = icmp eq i64 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = tail call ptr @strrchr(i64 noundef %2, i8 noundef signext 124) #2
%6 = icmp eq ptr %5, null
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = getelementptr inbounds i8, ptr %5, i64 1
%9 = load i8, ptr %8, align 1, !tbaa !10
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7, %4, %1
br label %12
12: ; preds = %11, %7
%13 = phi ptr [ @.str, %11 ], [ %8, %7 ]
ret ptr %13
}
declare ptr @strrchr(i64 noundef, i8 noundef signext) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ncurses/progs/extr_toe.c_term_description.c'
source_filename = "AnghaBench/freebsd/contrib/ncurses/progs/extr_toe.c_term_description.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [17 x i8] c"(No description)\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @term_description], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef nonnull ptr @term_description(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = icmp eq i64 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = tail call ptr @strrchr(i64 noundef %2, i8 noundef signext 124) #2
%6 = icmp eq ptr %5, null
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = getelementptr inbounds i8, ptr %5, i64 1
%9 = load i8, ptr %8, align 1, !tbaa !11
%10 = icmp eq i8 %9, 0
br i1 %10, label %11, label %12
11: ; preds = %7, %4, %1
br label %12
12: ; preds = %11, %7
%13 = phi ptr [ @.str, %11 ], [ %8, %7 ]
ret ptr %13
}
declare ptr @strrchr(i64 noundef, i8 noundef signext) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!9, !9, i64 0}
| freebsd_contrib_ncurses_progs_extr_toe.c_term_description |
; ModuleID = 'AnghaBench/obs-studio/deps/glad/src/extr_glad.c_load_GL_NV_bindless_multi_draw_indirect.c'
source_filename = "AnghaBench/obs-studio/deps/glad/src/extr_glad.c_load_GL_NV_bindless_multi_draw_indirect.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@GLAD_GL_NV_bindless_multi_draw_indirect = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [36 x i8] c"glMultiDrawArraysIndirectBindlessNV\00", align 1
@glad_glMultiDrawArraysIndirectBindlessNV = dso_local local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [38 x i8] c"glMultiDrawElementsIndirectBindlessNV\00", align 1
@glad_glMultiDrawElementsIndirectBindlessNV = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @load_GL_NV_bindless_multi_draw_indirect], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @load_GL_NV_bindless_multi_draw_indirect(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr @GLAD_GL_NV_bindless_multi_draw_indirect, align 4, !tbaa !5
%3 = icmp eq i32 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i64 %0(ptr noundef nonnull @.str) #1
store i64 %5, ptr @glad_glMultiDrawArraysIndirectBindlessNV, align 8, !tbaa !9
%6 = tail call i64 %0(ptr noundef nonnull @.str.1) #1
store i64 %6, ptr @glad_glMultiDrawElementsIndirectBindlessNV, align 8, !tbaa !9
br label %7
7: ; preds = %1, %4
ret void
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/obs-studio/deps/glad/src/extr_glad.c_load_GL_NV_bindless_multi_draw_indirect.c'
source_filename = "AnghaBench/obs-studio/deps/glad/src/extr_glad.c_load_GL_NV_bindless_multi_draw_indirect.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GLAD_GL_NV_bindless_multi_draw_indirect = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [36 x i8] c"glMultiDrawArraysIndirectBindlessNV\00", align 1
@glad_glMultiDrawArraysIndirectBindlessNV = common local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [38 x i8] c"glMultiDrawElementsIndirectBindlessNV\00", align 1
@glad_glMultiDrawElementsIndirectBindlessNV = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @load_GL_NV_bindless_multi_draw_indirect], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @load_GL_NV_bindless_multi_draw_indirect(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr @GLAD_GL_NV_bindless_multi_draw_indirect, align 4, !tbaa !6
%3 = icmp eq i32 %2, 0
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = tail call i64 %0(ptr noundef nonnull @.str) #1
store i64 %5, ptr @glad_glMultiDrawArraysIndirectBindlessNV, align 8, !tbaa !10
%6 = tail call i64 %0(ptr noundef nonnull @.str.1) #1
store i64 %6, ptr @glad_glMultiDrawElementsIndirectBindlessNV, align 8, !tbaa !10
br label %7
7: ; preds = %1, %4
ret void
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
| obs-studio_deps_glad_src_extr_glad.c_load_GL_NV_bindless_multi_draw_indirect |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/iwlwifi/extr_iwl-phy-db.c_channel_id_to_papd.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/iwlwifi/extr_iwl-phy-db.c_channel_id_to_papd.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @channel_id_to_papd], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @channel_id_to_papd(i32 noundef %0) #0 {
%2 = tail call i32 @is_valid_channel(i32 noundef %0) #2
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
%5 = tail call i64 @WARN_ON(i32 noundef %4) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %17
7: ; preds = %1
%8 = add i32 %0, -1
%9 = icmp ult i32 %8, 14
br i1 %9, label %17, label %10
10: ; preds = %7
%11 = add i32 %0, -36
%12 = icmp ult i32 %11, 29
br i1 %12, label %17, label %13
13: ; preds = %10
%14 = add i32 %0, -100
%15 = icmp ult i32 %14, 41
%16 = select i1 %15, i32 2, i32 3
br label %17
17: ; preds = %13, %10, %7, %1
%18 = phi i32 [ 255, %1 ], [ 0, %7 ], [ 1, %10 ], [ %16, %13 ]
ret i32 %18
}
declare i64 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @is_valid_channel(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/iwlwifi/extr_iwl-phy-db.c_channel_id_to_papd.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/iwlwifi/extr_iwl-phy-db.c_channel_id_to_papd.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @channel_id_to_papd], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 256) i32 @channel_id_to_papd(i32 noundef %0) #0 {
%2 = tail call i32 @is_valid_channel(i32 noundef %0) #2
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
%5 = tail call i64 @WARN_ON(i32 noundef %4) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %7, label %17
7: ; preds = %1
%8 = add i32 %0, -1
%9 = icmp ult i32 %8, 14
br i1 %9, label %17, label %10
10: ; preds = %7
%11 = add i32 %0, -36
%12 = icmp ult i32 %11, 29
br i1 %12, label %17, label %13
13: ; preds = %10
%14 = add i32 %0, -100
%15 = icmp ult i32 %14, 41
%16 = select i1 %15, i32 2, i32 3
br label %17
17: ; preds = %13, %10, %7, %1
%18 = phi i32 [ 255, %1 ], [ 0, %7 ], [ 1, %10 ], [ %16, %13 ]
ret i32 %18
}
declare i64 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @is_valid_channel(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_net_wireless_iwlwifi_extr_iwl-phy-db.c_channel_id_to_papd |
; ModuleID = 'AnghaBench/anypixel/firmware/controller/ThirdParty/ETH/src/extr_stm32f4x7_eth.c_ETH_SetDMARxDescOwnBit.c'
source_filename = "AnghaBench/anypixel/firmware/controller/ThirdParty/ETH/src/extr_stm32f4x7_eth.c_ETH_SetDMARxDescOwnBit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ETH_DMARxDesc_OWN = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define dso_local void @ETH_SetDMARxDescOwnBit(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @ETH_DMARxDesc_OWN, align 4, !tbaa !5
%3 = load i32, ptr %0, align 4, !tbaa !9
%4 = or i32 %3, %2
store i32 %4, ptr %0, align 4, !tbaa !9
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_3__", !6, i64 0}
| ; ModuleID = 'AnghaBench/anypixel/firmware/controller/ThirdParty/ETH/src/extr_stm32f4x7_eth.c_ETH_SetDMARxDescOwnBit.c'
source_filename = "AnghaBench/anypixel/firmware/controller/ThirdParty/ETH/src/extr_stm32f4x7_eth.c_ETH_SetDMARxDescOwnBit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ETH_DMARxDesc_OWN = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define void @ETH_SetDMARxDescOwnBit(ptr nocapture noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @ETH_DMARxDesc_OWN, align 4, !tbaa !6
%3 = load i32, ptr %0, align 4, !tbaa !10
%4 = or i32 %3, %2
store i32 %4, ptr %0, align 4, !tbaa !10
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_3__", !7, i64 0}
| anypixel_firmware_controller_ThirdParty_ETH_src_extr_stm32f4x7_eth.c_ETH_SetDMARxDescOwnBit |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_dp.c_intel_dp_handle_test_request.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_dp.c_intel_dp_handle_test_request.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DP_TEST_RESPONSE = dso_local local_unnamed_addr global i32 0, align 4
@DP_TEST_NAK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @intel_dp_handle_test_request], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @intel_dp_handle_test_request(ptr noundef %0) #0 {
%2 = load i32, ptr @DP_TEST_RESPONSE, align 4, !tbaa !5
%3 = load i32, ptr @DP_TEST_NAK, align 4, !tbaa !5
%4 = tail call i32 @intel_dp_aux_native_write_1(ptr noundef %0, i32 noundef %2, i32 noundef %3) #2
ret void
}
declare i32 @intel_dp_aux_native_write_1(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_dp.c_intel_dp_handle_test_request.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_intel_dp.c_intel_dp_handle_test_request.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DP_TEST_RESPONSE = common local_unnamed_addr global i32 0, align 4
@DP_TEST_NAK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @intel_dp_handle_test_request], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @intel_dp_handle_test_request(ptr noundef %0) #0 {
%2 = load i32, ptr @DP_TEST_RESPONSE, align 4, !tbaa !6
%3 = load i32, ptr @DP_TEST_NAK, align 4, !tbaa !6
%4 = tail call i32 @intel_dp_aux_native_write_1(ptr noundef %0, i32 noundef %2, i32 noundef %3) #2
ret void
}
declare i32 @intel_dp_aux_native_write_1(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_gpu_drm_i915_extr_intel_dp.c_intel_dp_handle_test_request |
; ModuleID = 'AnghaBench/FFmpeg/libavfilter/extr_af_replaygain.c_yule_filter_stereo_samples.c'
source_filename = "AnghaBench/FFmpeg/libavfilter/extr_af_replaygain.c_yule_filter_stereo_samples.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { ptr, ptr, ptr, ptr, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @yule_filter_stereo_samples], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @yule_filter_stereo_samples(ptr nocapture noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2, i32 noundef %3) #0 {
%5 = load ptr, ptr %0, align 8, !tbaa !5
%6 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%7 = load ptr, ptr %6, align 8, !tbaa !11
%8 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
%9 = load ptr, ptr %8, align 8, !tbaa !12
%10 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 3
%11 = load ptr, ptr %10, align 8, !tbaa !13
%12 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 4
%13 = load i32, ptr %12, align 8, !tbaa !14
%14 = sext i32 %13 to i64
br label %15
15: ; preds = %39, %4
%16 = phi i64 [ -20, %4 ], [ %40, %39 ]
%17 = add nsw i64 %16, %14
%18 = getelementptr inbounds float, ptr %9, i64 %17
%19 = load float, ptr %18, align 4, !tbaa !15
%20 = tail call i32 @fabs(float noundef %19) #3
%21 = icmp sgt i32 %20, 0
br i1 %21, label %47, label %22
22: ; preds = %15
%23 = getelementptr inbounds float, ptr %11, i64 %17
%24 = load float, ptr %23, align 4, !tbaa !15
%25 = tail call i32 @fabs(float noundef %24) #3
%26 = icmp sgt i32 %25, 0
br i1 %26, label %47, label %27
27: ; preds = %22
%28 = or disjoint i64 %16, 1
%29 = add nsw i64 %28, %14
%30 = getelementptr inbounds float, ptr %9, i64 %29
%31 = load float, ptr %30, align 4, !tbaa !15
%32 = tail call i32 @fabs(float noundef %31) #3
%33 = icmp sgt i32 %32, 0
br i1 %33, label %47, label %34
34: ; preds = %27
%35 = getelementptr inbounds float, ptr %11, i64 %29
%36 = load float, ptr %35, align 4, !tbaa !15
%37 = tail call i32 @fabs(float noundef %36) #3
%38 = icmp sgt i32 %37, 0
br i1 %38, label %47, label %39
39: ; preds = %34
%40 = add nsw i64 %16, 2
%41 = icmp eq i64 %40, 0
br i1 %41, label %42, label %15, !llvm.loop !17
42: ; preds = %39
%43 = load ptr, ptr %8, align 8, !tbaa !12
%44 = tail call i32 @memset(ptr noundef %43, i32 noundef 0, i32 noundef 8) #3
%45 = load ptr, ptr %10, align 8, !tbaa !13
%46 = tail call i32 @memset(ptr noundef %45, i32 noundef 0, i32 noundef 8) #3
br label %47
47: ; preds = %22, %15, %27, %34, %42
%48 = icmp eq i32 %3, 0
br i1 %48, label %356, label %49
49: ; preds = %47
%50 = getelementptr inbounds double, ptr %7, i64 1
%51 = getelementptr inbounds double, ptr %5, i64 1
%52 = getelementptr inbounds double, ptr %7, i64 2
%53 = getelementptr inbounds double, ptr %5, i64 2
%54 = getelementptr inbounds double, ptr %7, i64 3
%55 = getelementptr inbounds double, ptr %5, i64 3
%56 = getelementptr inbounds double, ptr %7, i64 4
%57 = getelementptr inbounds double, ptr %5, i64 4
%58 = getelementptr inbounds double, ptr %7, i64 5
%59 = getelementptr inbounds double, ptr %5, i64 5
%60 = getelementptr inbounds double, ptr %7, i64 6
%61 = getelementptr inbounds double, ptr %5, i64 6
%62 = getelementptr inbounds double, ptr %7, i64 7
%63 = getelementptr inbounds double, ptr %5, i64 7
%64 = getelementptr inbounds double, ptr %7, i64 8
%65 = getelementptr inbounds double, ptr %5, i64 8
%66 = getelementptr inbounds double, ptr %7, i64 9
%67 = getelementptr inbounds double, ptr %5, i64 9
%68 = getelementptr inbounds double, ptr %7, i64 10
%69 = getelementptr inbounds double, ptr %5, i64 10
%70 = getelementptr inbounds float, ptr %9, i64 236
%71 = getelementptr inbounds float, ptr %11, i64 236
br label %72
72: ; preds = %49, %353
%73 = phi i32 [ %3, %49 ], [ %77, %353 ]
%74 = phi i32 [ %13, %49 ], [ %354, %353 ]
%75 = phi ptr [ %1, %49 ], [ %346, %353 ]
%76 = phi ptr [ %2, %49 ], [ %347, %353 ]
%77 = add nsw i32 %73, -1
%78 = load float, ptr %75, align 4, !tbaa !15
%79 = sext i32 %74 to i64
%80 = getelementptr inbounds float, ptr %11, i64 %79
store float %78, ptr %80, align 4, !tbaa !15
%81 = fpext float %78 to double
%82 = load double, ptr %7, align 8, !tbaa !19
%83 = fmul double %82, %81
%84 = getelementptr inbounds float, ptr %75, i64 1
%85 = load float, ptr %84, align 4, !tbaa !15
%86 = add nsw i32 %74, 1
%87 = sext i32 %86 to i64
%88 = getelementptr inbounds float, ptr %11, i64 %87
store float %85, ptr %88, align 4, !tbaa !15
%89 = fpext float %85 to double
%90 = fmul double %82, %89
%91 = add nsw i32 %74, -2
%92 = sext i32 %91 to i64
%93 = getelementptr inbounds float, ptr %11, i64 %92
%94 = load float, ptr %93, align 4, !tbaa !15
%95 = fpext float %94 to double
%96 = load double, ptr %50, align 8, !tbaa !19
%97 = getelementptr inbounds float, ptr %9, i64 %92
%98 = load float, ptr %97, align 4, !tbaa !15
%99 = fpext float %98 to double
%100 = load double, ptr %51, align 8, !tbaa !19
%101 = fneg double %100
%102 = fmul double %101, %99
%103 = tail call double @llvm.fmuladd.f64(double %95, double %96, double %102)
%104 = fadd double %83, %103
%105 = add nsw i32 %74, -1
%106 = sext i32 %105 to i64
%107 = getelementptr inbounds float, ptr %11, i64 %106
%108 = load float, ptr %107, align 4, !tbaa !15
%109 = fpext float %108 to double
%110 = getelementptr inbounds float, ptr %9, i64 %106
%111 = load float, ptr %110, align 4, !tbaa !15
%112 = fpext float %111 to double
%113 = fmul double %101, %112
%114 = tail call double @llvm.fmuladd.f64(double %109, double %96, double %113)
%115 = fadd double %90, %114
%116 = add nsw i32 %74, -4
%117 = sext i32 %116 to i64
%118 = getelementptr inbounds float, ptr %11, i64 %117
%119 = load float, ptr %118, align 4, !tbaa !15
%120 = fpext float %119 to double
%121 = load double, ptr %52, align 8, !tbaa !19
%122 = getelementptr inbounds float, ptr %9, i64 %117
%123 = load float, ptr %122, align 4, !tbaa !15
%124 = fpext float %123 to double
%125 = load double, ptr %53, align 8, !tbaa !19
%126 = fneg double %125
%127 = fmul double %126, %124
%128 = tail call double @llvm.fmuladd.f64(double %120, double %121, double %127)
%129 = fadd double %104, %128
%130 = add nsw i32 %74, -3
%131 = sext i32 %130 to i64
%132 = getelementptr inbounds float, ptr %11, i64 %131
%133 = load float, ptr %132, align 4, !tbaa !15
%134 = fpext float %133 to double
%135 = getelementptr inbounds float, ptr %9, i64 %131
%136 = load float, ptr %135, align 4, !tbaa !15
%137 = fpext float %136 to double
%138 = fmul double %126, %137
%139 = tail call double @llvm.fmuladd.f64(double %134, double %121, double %138)
%140 = fadd double %115, %139
%141 = add nsw i32 %74, -6
%142 = sext i32 %141 to i64
%143 = getelementptr inbounds float, ptr %11, i64 %142
%144 = load float, ptr %143, align 4, !tbaa !15
%145 = fpext float %144 to double
%146 = load double, ptr %54, align 8, !tbaa !19
%147 = getelementptr inbounds float, ptr %9, i64 %142
%148 = load float, ptr %147, align 4, !tbaa !15
%149 = fpext float %148 to double
%150 = load double, ptr %55, align 8, !tbaa !19
%151 = fneg double %150
%152 = fmul double %151, %149
%153 = tail call double @llvm.fmuladd.f64(double %145, double %146, double %152)
%154 = fadd double %129, %153
%155 = add nsw i32 %74, -5
%156 = sext i32 %155 to i64
%157 = getelementptr inbounds float, ptr %11, i64 %156
%158 = load float, ptr %157, align 4, !tbaa !15
%159 = fpext float %158 to double
%160 = getelementptr inbounds float, ptr %9, i64 %156
%161 = load float, ptr %160, align 4, !tbaa !15
%162 = fpext float %161 to double
%163 = fmul double %151, %162
%164 = tail call double @llvm.fmuladd.f64(double %159, double %146, double %163)
%165 = fadd double %140, %164
%166 = add nsw i32 %74, -8
%167 = sext i32 %166 to i64
%168 = getelementptr inbounds float, ptr %11, i64 %167
%169 = load float, ptr %168, align 4, !tbaa !15
%170 = fpext float %169 to double
%171 = load double, ptr %56, align 8, !tbaa !19
%172 = getelementptr inbounds float, ptr %9, i64 %167
%173 = load float, ptr %172, align 4, !tbaa !15
%174 = fpext float %173 to double
%175 = load double, ptr %57, align 8, !tbaa !19
%176 = fneg double %175
%177 = fmul double %176, %174
%178 = tail call double @llvm.fmuladd.f64(double %170, double %171, double %177)
%179 = fadd double %154, %178
%180 = add nsw i32 %74, -7
%181 = sext i32 %180 to i64
%182 = getelementptr inbounds float, ptr %11, i64 %181
%183 = load float, ptr %182, align 4, !tbaa !15
%184 = fpext float %183 to double
%185 = getelementptr inbounds float, ptr %9, i64 %181
%186 = load float, ptr %185, align 4, !tbaa !15
%187 = fpext float %186 to double
%188 = fmul double %176, %187
%189 = tail call double @llvm.fmuladd.f64(double %184, double %171, double %188)
%190 = fadd double %165, %189
%191 = add nsw i32 %74, -10
%192 = sext i32 %191 to i64
%193 = getelementptr inbounds float, ptr %11, i64 %192
%194 = load float, ptr %193, align 4, !tbaa !15
%195 = fpext float %194 to double
%196 = load double, ptr %58, align 8, !tbaa !19
%197 = getelementptr inbounds float, ptr %9, i64 %192
%198 = load float, ptr %197, align 4, !tbaa !15
%199 = fpext float %198 to double
%200 = load double, ptr %59, align 8, !tbaa !19
%201 = fneg double %200
%202 = fmul double %201, %199
%203 = tail call double @llvm.fmuladd.f64(double %195, double %196, double %202)
%204 = fadd double %179, %203
%205 = add nsw i32 %74, -9
%206 = sext i32 %205 to i64
%207 = getelementptr inbounds float, ptr %11, i64 %206
%208 = load float, ptr %207, align 4, !tbaa !15
%209 = fpext float %208 to double
%210 = getelementptr inbounds float, ptr %9, i64 %206
%211 = load float, ptr %210, align 4, !tbaa !15
%212 = fpext float %211 to double
%213 = fmul double %201, %212
%214 = tail call double @llvm.fmuladd.f64(double %209, double %196, double %213)
%215 = fadd double %190, %214
%216 = add nsw i32 %74, -12
%217 = sext i32 %216 to i64
%218 = getelementptr inbounds float, ptr %11, i64 %217
%219 = load float, ptr %218, align 4, !tbaa !15
%220 = fpext float %219 to double
%221 = load double, ptr %60, align 8, !tbaa !19
%222 = getelementptr inbounds float, ptr %9, i64 %217
%223 = load float, ptr %222, align 4, !tbaa !15
%224 = fpext float %223 to double
%225 = load double, ptr %61, align 8, !tbaa !19
%226 = fneg double %225
%227 = fmul double %226, %224
%228 = tail call double @llvm.fmuladd.f64(double %220, double %221, double %227)
%229 = fadd double %204, %228
%230 = add nsw i32 %74, -11
%231 = sext i32 %230 to i64
%232 = getelementptr inbounds float, ptr %11, i64 %231
%233 = load float, ptr %232, align 4, !tbaa !15
%234 = fpext float %233 to double
%235 = getelementptr inbounds float, ptr %9, i64 %231
%236 = load float, ptr %235, align 4, !tbaa !15
%237 = fpext float %236 to double
%238 = fmul double %226, %237
%239 = tail call double @llvm.fmuladd.f64(double %234, double %221, double %238)
%240 = fadd double %215, %239
%241 = add nsw i32 %74, -14
%242 = sext i32 %241 to i64
%243 = getelementptr inbounds float, ptr %11, i64 %242
%244 = load float, ptr %243, align 4, !tbaa !15
%245 = fpext float %244 to double
%246 = load double, ptr %62, align 8, !tbaa !19
%247 = getelementptr inbounds float, ptr %9, i64 %242
%248 = load float, ptr %247, align 4, !tbaa !15
%249 = fpext float %248 to double
%250 = load double, ptr %63, align 8, !tbaa !19
%251 = fneg double %250
%252 = fmul double %251, %249
%253 = tail call double @llvm.fmuladd.f64(double %245, double %246, double %252)
%254 = fadd double %229, %253
%255 = add nsw i32 %74, -13
%256 = sext i32 %255 to i64
%257 = getelementptr inbounds float, ptr %11, i64 %256
%258 = load float, ptr %257, align 4, !tbaa !15
%259 = fpext float %258 to double
%260 = getelementptr inbounds float, ptr %9, i64 %256
%261 = load float, ptr %260, align 4, !tbaa !15
%262 = fpext float %261 to double
%263 = fmul double %251, %262
%264 = tail call double @llvm.fmuladd.f64(double %259, double %246, double %263)
%265 = fadd double %240, %264
%266 = add nsw i32 %74, -16
%267 = sext i32 %266 to i64
%268 = getelementptr inbounds float, ptr %11, i64 %267
%269 = load float, ptr %268, align 4, !tbaa !15
%270 = fpext float %269 to double
%271 = load double, ptr %64, align 8, !tbaa !19
%272 = getelementptr inbounds float, ptr %9, i64 %267
%273 = load float, ptr %272, align 4, !tbaa !15
%274 = fpext float %273 to double
%275 = load double, ptr %65, align 8, !tbaa !19
%276 = fneg double %275
%277 = fmul double %276, %274
%278 = tail call double @llvm.fmuladd.f64(double %270, double %271, double %277)
%279 = fadd double %254, %278
%280 = add nsw i32 %74, -15
%281 = sext i32 %280 to i64
%282 = getelementptr inbounds float, ptr %11, i64 %281
%283 = load float, ptr %282, align 4, !tbaa !15
%284 = fpext float %283 to double
%285 = getelementptr inbounds float, ptr %9, i64 %281
%286 = load float, ptr %285, align 4, !tbaa !15
%287 = fpext float %286 to double
%288 = fmul double %276, %287
%289 = tail call double @llvm.fmuladd.f64(double %284, double %271, double %288)
%290 = fadd double %265, %289
%291 = add nsw i32 %74, -18
%292 = sext i32 %291 to i64
%293 = getelementptr inbounds float, ptr %11, i64 %292
%294 = load float, ptr %293, align 4, !tbaa !15
%295 = fpext float %294 to double
%296 = load double, ptr %66, align 8, !tbaa !19
%297 = getelementptr inbounds float, ptr %9, i64 %292
%298 = load float, ptr %297, align 4, !tbaa !15
%299 = fpext float %298 to double
%300 = load double, ptr %67, align 8, !tbaa !19
%301 = fneg double %300
%302 = fmul double %301, %299
%303 = tail call double @llvm.fmuladd.f64(double %295, double %296, double %302)
%304 = fadd double %279, %303
%305 = add nsw i32 %74, -17
%306 = sext i32 %305 to i64
%307 = getelementptr inbounds float, ptr %11, i64 %306
%308 = load float, ptr %307, align 4, !tbaa !15
%309 = fpext float %308 to double
%310 = getelementptr inbounds float, ptr %9, i64 %306
%311 = load float, ptr %310, align 4, !tbaa !15
%312 = fpext float %311 to double
%313 = fmul double %301, %312
%314 = tail call double @llvm.fmuladd.f64(double %309, double %296, double %313)
%315 = fadd double %290, %314
%316 = add nsw i32 %74, -20
%317 = sext i32 %316 to i64
%318 = getelementptr inbounds float, ptr %11, i64 %317
%319 = load float, ptr %318, align 4, !tbaa !15
%320 = fpext float %319 to double
%321 = load double, ptr %68, align 8, !tbaa !19
%322 = getelementptr inbounds float, ptr %9, i64 %317
%323 = load float, ptr %322, align 4, !tbaa !15
%324 = fpext float %323 to double
%325 = load double, ptr %69, align 8, !tbaa !19
%326 = fneg double %325
%327 = fmul double %326, %324
%328 = tail call double @llvm.fmuladd.f64(double %320, double %321, double %327)
%329 = fadd double %304, %328
%330 = add nsw i32 %74, -19
%331 = sext i32 %330 to i64
%332 = getelementptr inbounds float, ptr %11, i64 %331
%333 = load float, ptr %332, align 4, !tbaa !15
%334 = fpext float %333 to double
%335 = getelementptr inbounds float, ptr %9, i64 %331
%336 = load float, ptr %335, align 4, !tbaa !15
%337 = fpext float %336 to double
%338 = fmul double %326, %337
%339 = tail call double @llvm.fmuladd.f64(double %334, double %321, double %338)
%340 = fadd double %315, %339
%341 = fptrunc double %329 to float
%342 = getelementptr inbounds float, ptr %9, i64 %79
store float %341, ptr %342, align 4, !tbaa !15
store float %341, ptr %76, align 4, !tbaa !15
%343 = fptrunc double %340 to float
%344 = getelementptr inbounds float, ptr %9, i64 %87
store float %343, ptr %344, align 4, !tbaa !15
%345 = getelementptr inbounds float, ptr %76, i64 1
store float %343, ptr %345, align 4, !tbaa !15
%346 = getelementptr inbounds float, ptr %75, i64 2
%347 = getelementptr inbounds float, ptr %76, i64 2
%348 = add nsw i32 %74, 2
%349 = icmp eq i32 %348, 256
br i1 %349, label %350, label %353
350: ; preds = %72
%351 = tail call i32 @memcpy(ptr noundef nonnull %9, ptr noundef nonnull %70, i32 noundef 80) #3
%352 = tail call i32 @memcpy(ptr noundef nonnull %11, ptr noundef nonnull %71, i32 noundef 80) #3
br label %353
353: ; preds = %350, %72
%354 = phi i32 [ 20, %350 ], [ %348, %72 ]
%355 = icmp eq i32 %77, 0
br i1 %355, label %356, label %72, !llvm.loop !21
356: ; preds = %353, %47
%357 = phi i32 [ %13, %47 ], [ %354, %353 ]
store i32 %357, ptr %12, align 8, !tbaa !14
ret void
}
declare i32 @fabs(float noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #2
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !10, i64 32}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 8}
!12 = !{!6, !7, i64 16}
!13 = !{!6, !7, i64 24}
!14 = !{!6, !10, i64 32}
!15 = !{!16, !16, i64 0}
!16 = !{!"float", !8, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!20, !20, i64 0}
!20 = !{!"double", !8, i64 0}
!21 = distinct !{!21, !18}
| ; ModuleID = 'AnghaBench/FFmpeg/libavfilter/extr_af_replaygain.c_yule_filter_stereo_samples.c'
source_filename = "AnghaBench/FFmpeg/libavfilter/extr_af_replaygain.c_yule_filter_stereo_samples.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @yule_filter_stereo_samples], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @yule_filter_stereo_samples(ptr nocapture noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2, i32 noundef %3) #0 {
%5 = load ptr, ptr %0, align 8, !tbaa !6
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !12
%8 = getelementptr inbounds i8, ptr %0, i64 16
%9 = load ptr, ptr %8, align 8, !tbaa !13
%10 = getelementptr inbounds i8, ptr %0, i64 24
%11 = load ptr, ptr %10, align 8, !tbaa !14
%12 = getelementptr inbounds i8, ptr %0, i64 32
%13 = load i32, ptr %12, align 8, !tbaa !15
%14 = sext i32 %13 to i64
br label %15
15: ; preds = %4, %27
%16 = phi i64 [ -20, %4 ], [ %28, %27 ]
%17 = add nsw i64 %16, %14
%18 = getelementptr inbounds float, ptr %9, i64 %17
%19 = load float, ptr %18, align 4, !tbaa !16
%20 = tail call i32 @fabs(float noundef %19) #3
%21 = icmp sgt i32 %20, 0
br i1 %21, label %35, label %22
22: ; preds = %15
%23 = getelementptr inbounds float, ptr %11, i64 %17
%24 = load float, ptr %23, align 4, !tbaa !16
%25 = tail call i32 @fabs(float noundef %24) #3
%26 = icmp sgt i32 %25, 0
br i1 %26, label %35, label %27
27: ; preds = %22
%28 = add nsw i64 %16, 1
%29 = icmp eq i64 %28, 0
br i1 %29, label %30, label %15, !llvm.loop !18
30: ; preds = %27
%31 = load ptr, ptr %8, align 8, !tbaa !13
%32 = tail call i32 @memset(ptr noundef %31, i32 noundef 0, i32 noundef 8) #3
%33 = load ptr, ptr %10, align 8, !tbaa !14
%34 = tail call i32 @memset(ptr noundef %33, i32 noundef 0, i32 noundef 8) #3
br label %35
35: ; preds = %22, %15, %30
%36 = icmp eq i32 %3, 0
br i1 %36, label %344, label %37
37: ; preds = %35
%38 = getelementptr inbounds i8, ptr %7, i64 8
%39 = getelementptr inbounds i8, ptr %5, i64 8
%40 = getelementptr inbounds i8, ptr %7, i64 16
%41 = getelementptr inbounds i8, ptr %5, i64 16
%42 = getelementptr inbounds i8, ptr %7, i64 24
%43 = getelementptr inbounds i8, ptr %5, i64 24
%44 = getelementptr inbounds i8, ptr %7, i64 32
%45 = getelementptr inbounds i8, ptr %5, i64 32
%46 = getelementptr inbounds i8, ptr %7, i64 40
%47 = getelementptr inbounds i8, ptr %5, i64 40
%48 = getelementptr inbounds i8, ptr %7, i64 48
%49 = getelementptr inbounds i8, ptr %5, i64 48
%50 = getelementptr inbounds i8, ptr %7, i64 56
%51 = getelementptr inbounds i8, ptr %5, i64 56
%52 = getelementptr inbounds i8, ptr %7, i64 64
%53 = getelementptr inbounds i8, ptr %5, i64 64
%54 = getelementptr inbounds i8, ptr %7, i64 72
%55 = getelementptr inbounds i8, ptr %5, i64 72
%56 = getelementptr inbounds i8, ptr %7, i64 80
%57 = getelementptr inbounds i8, ptr %5, i64 80
%58 = getelementptr inbounds i8, ptr %9, i64 944
%59 = getelementptr inbounds i8, ptr %11, i64 944
br label %60
60: ; preds = %37, %341
%61 = phi i32 [ %3, %37 ], [ %65, %341 ]
%62 = phi i32 [ %13, %37 ], [ %342, %341 ]
%63 = phi ptr [ %1, %37 ], [ %334, %341 ]
%64 = phi ptr [ %2, %37 ], [ %335, %341 ]
%65 = add nsw i32 %61, -1
%66 = load float, ptr %63, align 4, !tbaa !16
%67 = sext i32 %62 to i64
%68 = getelementptr inbounds float, ptr %11, i64 %67
store float %66, ptr %68, align 4, !tbaa !16
%69 = fpext float %66 to double
%70 = load double, ptr %7, align 8, !tbaa !20
%71 = fmul double %70, %69
%72 = getelementptr inbounds i8, ptr %63, i64 4
%73 = load float, ptr %72, align 4, !tbaa !16
%74 = add nsw i32 %62, 1
%75 = sext i32 %74 to i64
%76 = getelementptr inbounds float, ptr %11, i64 %75
store float %73, ptr %76, align 4, !tbaa !16
%77 = fpext float %73 to double
%78 = fmul double %70, %77
%79 = add nsw i32 %62, -2
%80 = sext i32 %79 to i64
%81 = getelementptr inbounds float, ptr %11, i64 %80
%82 = load float, ptr %81, align 4, !tbaa !16
%83 = fpext float %82 to double
%84 = load double, ptr %38, align 8, !tbaa !20
%85 = getelementptr inbounds float, ptr %9, i64 %80
%86 = load float, ptr %85, align 4, !tbaa !16
%87 = fpext float %86 to double
%88 = load double, ptr %39, align 8, !tbaa !20
%89 = fneg double %88
%90 = fmul double %89, %87
%91 = tail call double @llvm.fmuladd.f64(double %83, double %84, double %90)
%92 = fadd double %71, %91
%93 = add nsw i32 %62, -1
%94 = sext i32 %93 to i64
%95 = getelementptr inbounds float, ptr %11, i64 %94
%96 = load float, ptr %95, align 4, !tbaa !16
%97 = fpext float %96 to double
%98 = getelementptr inbounds float, ptr %9, i64 %94
%99 = load float, ptr %98, align 4, !tbaa !16
%100 = fpext float %99 to double
%101 = fmul double %89, %100
%102 = tail call double @llvm.fmuladd.f64(double %97, double %84, double %101)
%103 = fadd double %78, %102
%104 = add nsw i32 %62, -4
%105 = sext i32 %104 to i64
%106 = getelementptr inbounds float, ptr %11, i64 %105
%107 = load float, ptr %106, align 4, !tbaa !16
%108 = fpext float %107 to double
%109 = load double, ptr %40, align 8, !tbaa !20
%110 = getelementptr inbounds float, ptr %9, i64 %105
%111 = load float, ptr %110, align 4, !tbaa !16
%112 = fpext float %111 to double
%113 = load double, ptr %41, align 8, !tbaa !20
%114 = fneg double %113
%115 = fmul double %114, %112
%116 = tail call double @llvm.fmuladd.f64(double %108, double %109, double %115)
%117 = fadd double %92, %116
%118 = add nsw i32 %62, -3
%119 = sext i32 %118 to i64
%120 = getelementptr inbounds float, ptr %11, i64 %119
%121 = load float, ptr %120, align 4, !tbaa !16
%122 = fpext float %121 to double
%123 = getelementptr inbounds float, ptr %9, i64 %119
%124 = load float, ptr %123, align 4, !tbaa !16
%125 = fpext float %124 to double
%126 = fmul double %114, %125
%127 = tail call double @llvm.fmuladd.f64(double %122, double %109, double %126)
%128 = fadd double %103, %127
%129 = add nsw i32 %62, -6
%130 = sext i32 %129 to i64
%131 = getelementptr inbounds float, ptr %11, i64 %130
%132 = load float, ptr %131, align 4, !tbaa !16
%133 = fpext float %132 to double
%134 = load double, ptr %42, align 8, !tbaa !20
%135 = getelementptr inbounds float, ptr %9, i64 %130
%136 = load float, ptr %135, align 4, !tbaa !16
%137 = fpext float %136 to double
%138 = load double, ptr %43, align 8, !tbaa !20
%139 = fneg double %138
%140 = fmul double %139, %137
%141 = tail call double @llvm.fmuladd.f64(double %133, double %134, double %140)
%142 = fadd double %117, %141
%143 = add nsw i32 %62, -5
%144 = sext i32 %143 to i64
%145 = getelementptr inbounds float, ptr %11, i64 %144
%146 = load float, ptr %145, align 4, !tbaa !16
%147 = fpext float %146 to double
%148 = getelementptr inbounds float, ptr %9, i64 %144
%149 = load float, ptr %148, align 4, !tbaa !16
%150 = fpext float %149 to double
%151 = fmul double %139, %150
%152 = tail call double @llvm.fmuladd.f64(double %147, double %134, double %151)
%153 = fadd double %128, %152
%154 = add nsw i32 %62, -8
%155 = sext i32 %154 to i64
%156 = getelementptr inbounds float, ptr %11, i64 %155
%157 = load float, ptr %156, align 4, !tbaa !16
%158 = fpext float %157 to double
%159 = load double, ptr %44, align 8, !tbaa !20
%160 = getelementptr inbounds float, ptr %9, i64 %155
%161 = load float, ptr %160, align 4, !tbaa !16
%162 = fpext float %161 to double
%163 = load double, ptr %45, align 8, !tbaa !20
%164 = fneg double %163
%165 = fmul double %164, %162
%166 = tail call double @llvm.fmuladd.f64(double %158, double %159, double %165)
%167 = fadd double %142, %166
%168 = add nsw i32 %62, -7
%169 = sext i32 %168 to i64
%170 = getelementptr inbounds float, ptr %11, i64 %169
%171 = load float, ptr %170, align 4, !tbaa !16
%172 = fpext float %171 to double
%173 = getelementptr inbounds float, ptr %9, i64 %169
%174 = load float, ptr %173, align 4, !tbaa !16
%175 = fpext float %174 to double
%176 = fmul double %164, %175
%177 = tail call double @llvm.fmuladd.f64(double %172, double %159, double %176)
%178 = fadd double %153, %177
%179 = add nsw i32 %62, -10
%180 = sext i32 %179 to i64
%181 = getelementptr inbounds float, ptr %11, i64 %180
%182 = load float, ptr %181, align 4, !tbaa !16
%183 = fpext float %182 to double
%184 = load double, ptr %46, align 8, !tbaa !20
%185 = getelementptr inbounds float, ptr %9, i64 %180
%186 = load float, ptr %185, align 4, !tbaa !16
%187 = fpext float %186 to double
%188 = load double, ptr %47, align 8, !tbaa !20
%189 = fneg double %188
%190 = fmul double %189, %187
%191 = tail call double @llvm.fmuladd.f64(double %183, double %184, double %190)
%192 = fadd double %167, %191
%193 = add nsw i32 %62, -9
%194 = sext i32 %193 to i64
%195 = getelementptr inbounds float, ptr %11, i64 %194
%196 = load float, ptr %195, align 4, !tbaa !16
%197 = fpext float %196 to double
%198 = getelementptr inbounds float, ptr %9, i64 %194
%199 = load float, ptr %198, align 4, !tbaa !16
%200 = fpext float %199 to double
%201 = fmul double %189, %200
%202 = tail call double @llvm.fmuladd.f64(double %197, double %184, double %201)
%203 = fadd double %178, %202
%204 = add nsw i32 %62, -12
%205 = sext i32 %204 to i64
%206 = getelementptr inbounds float, ptr %11, i64 %205
%207 = load float, ptr %206, align 4, !tbaa !16
%208 = fpext float %207 to double
%209 = load double, ptr %48, align 8, !tbaa !20
%210 = getelementptr inbounds float, ptr %9, i64 %205
%211 = load float, ptr %210, align 4, !tbaa !16
%212 = fpext float %211 to double
%213 = load double, ptr %49, align 8, !tbaa !20
%214 = fneg double %213
%215 = fmul double %214, %212
%216 = tail call double @llvm.fmuladd.f64(double %208, double %209, double %215)
%217 = fadd double %192, %216
%218 = add nsw i32 %62, -11
%219 = sext i32 %218 to i64
%220 = getelementptr inbounds float, ptr %11, i64 %219
%221 = load float, ptr %220, align 4, !tbaa !16
%222 = fpext float %221 to double
%223 = getelementptr inbounds float, ptr %9, i64 %219
%224 = load float, ptr %223, align 4, !tbaa !16
%225 = fpext float %224 to double
%226 = fmul double %214, %225
%227 = tail call double @llvm.fmuladd.f64(double %222, double %209, double %226)
%228 = fadd double %203, %227
%229 = add nsw i32 %62, -14
%230 = sext i32 %229 to i64
%231 = getelementptr inbounds float, ptr %11, i64 %230
%232 = load float, ptr %231, align 4, !tbaa !16
%233 = fpext float %232 to double
%234 = load double, ptr %50, align 8, !tbaa !20
%235 = getelementptr inbounds float, ptr %9, i64 %230
%236 = load float, ptr %235, align 4, !tbaa !16
%237 = fpext float %236 to double
%238 = load double, ptr %51, align 8, !tbaa !20
%239 = fneg double %238
%240 = fmul double %239, %237
%241 = tail call double @llvm.fmuladd.f64(double %233, double %234, double %240)
%242 = fadd double %217, %241
%243 = add nsw i32 %62, -13
%244 = sext i32 %243 to i64
%245 = getelementptr inbounds float, ptr %11, i64 %244
%246 = load float, ptr %245, align 4, !tbaa !16
%247 = fpext float %246 to double
%248 = getelementptr inbounds float, ptr %9, i64 %244
%249 = load float, ptr %248, align 4, !tbaa !16
%250 = fpext float %249 to double
%251 = fmul double %239, %250
%252 = tail call double @llvm.fmuladd.f64(double %247, double %234, double %251)
%253 = fadd double %228, %252
%254 = add nsw i32 %62, -16
%255 = sext i32 %254 to i64
%256 = getelementptr inbounds float, ptr %11, i64 %255
%257 = load float, ptr %256, align 4, !tbaa !16
%258 = fpext float %257 to double
%259 = load double, ptr %52, align 8, !tbaa !20
%260 = getelementptr inbounds float, ptr %9, i64 %255
%261 = load float, ptr %260, align 4, !tbaa !16
%262 = fpext float %261 to double
%263 = load double, ptr %53, align 8, !tbaa !20
%264 = fneg double %263
%265 = fmul double %264, %262
%266 = tail call double @llvm.fmuladd.f64(double %258, double %259, double %265)
%267 = fadd double %242, %266
%268 = add nsw i32 %62, -15
%269 = sext i32 %268 to i64
%270 = getelementptr inbounds float, ptr %11, i64 %269
%271 = load float, ptr %270, align 4, !tbaa !16
%272 = fpext float %271 to double
%273 = getelementptr inbounds float, ptr %9, i64 %269
%274 = load float, ptr %273, align 4, !tbaa !16
%275 = fpext float %274 to double
%276 = fmul double %264, %275
%277 = tail call double @llvm.fmuladd.f64(double %272, double %259, double %276)
%278 = fadd double %253, %277
%279 = add nsw i32 %62, -18
%280 = sext i32 %279 to i64
%281 = getelementptr inbounds float, ptr %11, i64 %280
%282 = load float, ptr %281, align 4, !tbaa !16
%283 = fpext float %282 to double
%284 = load double, ptr %54, align 8, !tbaa !20
%285 = getelementptr inbounds float, ptr %9, i64 %280
%286 = load float, ptr %285, align 4, !tbaa !16
%287 = fpext float %286 to double
%288 = load double, ptr %55, align 8, !tbaa !20
%289 = fneg double %288
%290 = fmul double %289, %287
%291 = tail call double @llvm.fmuladd.f64(double %283, double %284, double %290)
%292 = fadd double %267, %291
%293 = add nsw i32 %62, -17
%294 = sext i32 %293 to i64
%295 = getelementptr inbounds float, ptr %11, i64 %294
%296 = load float, ptr %295, align 4, !tbaa !16
%297 = fpext float %296 to double
%298 = getelementptr inbounds float, ptr %9, i64 %294
%299 = load float, ptr %298, align 4, !tbaa !16
%300 = fpext float %299 to double
%301 = fmul double %289, %300
%302 = tail call double @llvm.fmuladd.f64(double %297, double %284, double %301)
%303 = fadd double %278, %302
%304 = add nsw i32 %62, -20
%305 = sext i32 %304 to i64
%306 = getelementptr inbounds float, ptr %11, i64 %305
%307 = load float, ptr %306, align 4, !tbaa !16
%308 = fpext float %307 to double
%309 = load double, ptr %56, align 8, !tbaa !20
%310 = getelementptr inbounds float, ptr %9, i64 %305
%311 = load float, ptr %310, align 4, !tbaa !16
%312 = fpext float %311 to double
%313 = load double, ptr %57, align 8, !tbaa !20
%314 = fneg double %313
%315 = fmul double %314, %312
%316 = tail call double @llvm.fmuladd.f64(double %308, double %309, double %315)
%317 = fadd double %292, %316
%318 = add nsw i32 %62, -19
%319 = sext i32 %318 to i64
%320 = getelementptr inbounds float, ptr %11, i64 %319
%321 = load float, ptr %320, align 4, !tbaa !16
%322 = fpext float %321 to double
%323 = getelementptr inbounds float, ptr %9, i64 %319
%324 = load float, ptr %323, align 4, !tbaa !16
%325 = fpext float %324 to double
%326 = fmul double %314, %325
%327 = tail call double @llvm.fmuladd.f64(double %322, double %309, double %326)
%328 = fadd double %303, %327
%329 = fptrunc double %317 to float
%330 = getelementptr inbounds float, ptr %9, i64 %67
store float %329, ptr %330, align 4, !tbaa !16
store float %329, ptr %64, align 4, !tbaa !16
%331 = fptrunc double %328 to float
%332 = getelementptr inbounds float, ptr %9, i64 %75
store float %331, ptr %332, align 4, !tbaa !16
%333 = getelementptr inbounds i8, ptr %64, i64 4
store float %331, ptr %333, align 4, !tbaa !16
%334 = getelementptr inbounds i8, ptr %63, i64 8
%335 = getelementptr inbounds i8, ptr %64, i64 8
%336 = add nsw i32 %62, 2
%337 = icmp eq i32 %336, 256
br i1 %337, label %338, label %341
338: ; preds = %60
%339 = tail call i32 @memcpy(ptr noundef nonnull %9, ptr noundef nonnull %58, i32 noundef 80) #3
%340 = tail call i32 @memcpy(ptr noundef nonnull %11, ptr noundef nonnull %59, i32 noundef 80) #3
br label %341
341: ; preds = %338, %60
%342 = phi i32 [ 20, %338 ], [ %336, %60 ]
%343 = icmp eq i32 %65, 0
br i1 %343, label %344, label %60, !llvm.loop !22
344: ; preds = %341, %35
%345 = phi i32 [ %13, %35 ], [ %342, %341 ]
store i32 %345, ptr %12, align 8, !tbaa !15
ret void
}
declare i32 @fabs(float noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare double @llvm.fmuladd.f64(double, double, double) #2
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !11, i64 32}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !8, i64 8}
!13 = !{!7, !8, i64 16}
!14 = !{!7, !8, i64 24}
!15 = !{!7, !11, i64 32}
!16 = !{!17, !17, i64 0}
!17 = !{!"float", !9, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!21, !21, i64 0}
!21 = !{!"double", !9, i64 0}
!22 = distinct !{!22, !19}
| FFmpeg_libavfilter_extr_af_replaygain.c_yule_filter_stereo_samples |
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/i2c/other/extr_ak4117.c_snd_ak4117_spdif_get.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/i2c/other/extr_ak4117.c_snd_ak4117_spdif_get.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@AK4117_REG_RXCSB_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@AK4117_REG_RXCSB0 = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_ak4117_spdif_get], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @snd_ak4117_spdif_get(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call ptr @snd_kcontrol_chip(ptr noundef %0) #2
%4 = load i32, ptr @AK4117_REG_RXCSB_SIZE, align 4, !tbaa !5
%5 = icmp eq i32 %4, 0
br i1 %5, label %17, label %6
6: ; preds = %2, %6
%7 = phi i64 [ %13, %6 ], [ 0, %2 ]
%8 = load i64, ptr @AK4117_REG_RXCSB0, align 8, !tbaa !9
%9 = add nsw i64 %8, %7
%10 = tail call i32 @reg_read(ptr noundef %3, i64 noundef %9) #2
%11 = load ptr, ptr %1, align 8, !tbaa !11
%12 = getelementptr inbounds i32, ptr %11, i64 %7
store i32 %10, ptr %12, align 4, !tbaa !5
%13 = add nuw nsw i64 %7, 1
%14 = load i32, ptr @AK4117_REG_RXCSB_SIZE, align 4, !tbaa !5
%15 = zext i32 %14 to i64
%16 = icmp ult i64 %13, %15
br i1 %16, label %6, label %17, !llvm.loop !16
17: ; preds = %6, %2
ret i32 0
}
declare ptr @snd_kcontrol_chip(ptr noundef) local_unnamed_addr #1
declare i32 @reg_read(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !15, i64 0}
!12 = !{!"snd_ctl_elem_value", !13, i64 0}
!13 = !{!"TYPE_4__", !14, i64 0}
!14 = !{!"TYPE_3__", !15, i64 0}
!15 = !{!"any pointer", !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/i2c/other/extr_ak4117.c_snd_ak4117_spdif_get.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/i2c/other/extr_ak4117.c_snd_ak4117_spdif_get.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AK4117_REG_RXCSB_SIZE = common local_unnamed_addr global i32 0, align 4
@AK4117_REG_RXCSB0 = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @snd_ak4117_spdif_get], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @snd_ak4117_spdif_get(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call ptr @snd_kcontrol_chip(ptr noundef %0) #2
%4 = load i32, ptr @AK4117_REG_RXCSB_SIZE, align 4, !tbaa !6
%5 = icmp eq i32 %4, 0
br i1 %5, label %17, label %6
6: ; preds = %2, %6
%7 = phi i64 [ %13, %6 ], [ 0, %2 ]
%8 = load i64, ptr @AK4117_REG_RXCSB0, align 8, !tbaa !10
%9 = add nsw i64 %8, %7
%10 = tail call i32 @reg_read(ptr noundef %3, i64 noundef %9) #2
%11 = load ptr, ptr %1, align 8, !tbaa !12
%12 = getelementptr inbounds i32, ptr %11, i64 %7
store i32 %10, ptr %12, align 4, !tbaa !6
%13 = add nuw nsw i64 %7, 1
%14 = load i32, ptr @AK4117_REG_RXCSB_SIZE, align 4, !tbaa !6
%15 = zext i32 %14 to i64
%16 = icmp ult i64 %13, %15
br i1 %16, label %6, label %17, !llvm.loop !17
17: ; preds = %6, %2
ret i32 0
}
declare ptr @snd_kcontrol_chip(ptr noundef) local_unnamed_addr #1
declare i32 @reg_read(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !16, i64 0}
!13 = !{!"snd_ctl_elem_value", !14, i64 0}
!14 = !{!"TYPE_4__", !15, i64 0}
!15 = !{!"TYPE_3__", !16, i64 0}
!16 = !{!"any pointer", !8, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
| fastsocket_kernel_sound_i2c_other_extr_ak4117.c_snd_ak4117_spdif_get |
; ModuleID = 'AnghaBench/linux/drivers/usb/host/extr_bcma-hcd.c_bcma_hcd_usb20_old_arm_init.c'
source_filename = "AnghaBench/linux/drivers/usb/host/extr_bcma-hcd.c_bcma_hcd_usb20_old_arm_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bcma_device = type { i32, %struct.TYPE_2__, %struct.device }
%struct.TYPE_2__ = type { i32 }
%struct.device = type { i32 }
@BCMA_CORE_PMU = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"Could not find PMU core\0A\00", align 1
@ENOENT = dso_local local_unnamed_addr global i32 0, align 4
@BCMA_IOCTL = dso_local local_unnamed_addr global i32 0, align 4
@BCMA_IOCTL_CLK = dso_local local_unnamed_addr global i32 0, align 4
@BCMA_IOCTL_FGC = dso_local local_unnamed_addr global i32 0, align 4
@BCMA_RESET_CTL = dso_local local_unnamed_addr global i32 0, align 4
@BCMA_RESET_CTL_RESET = dso_local local_unnamed_addr global i32 0, align 4
@BCMA_CLKCTLST = dso_local local_unnamed_addr global i32 0, align 4
@BCMA_CLKCTLST_FORCEHT = dso_local local_unnamed_addr global i32 0, align 4
@BCMA_CLKCTLST_HQCLKREQ = dso_local local_unnamed_addr global i32 0, align 4
@USB_BCMA_CLKCTLST_USB_CLK_REQ = dso_local local_unnamed_addr global i32 0, align 4
@BCMA_CC_PMU_PLLCTL_ADDR = dso_local local_unnamed_addr global i32 0, align 4
@BCMA_CC_PMU_PLLCTL_DATA = dso_local local_unnamed_addr global i32 0, align 4
@BCMA_CC_PMU_CTL = dso_local local_unnamed_addr global i32 0, align 4
@BCMA_CC_PMU_CTL_PLL_UPD = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @bcma_hcd_usb20_old_arm_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @bcma_hcd_usb20_old_arm_init(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = getelementptr inbounds %struct.bcma_device, ptr %2, i64 0, i32 2
%4 = tail call i32 @usleep_range(i32 noundef 10000, i32 noundef 20000) #2
%5 = getelementptr inbounds %struct.bcma_device, ptr %2, i64 0, i32 1
%6 = load i32, ptr %5, align 4, !tbaa !10
%7 = icmp slt i32 %6, 5
br i1 %7, label %70, label %8
8: ; preds = %1
%9 = load i32, ptr %2, align 4, !tbaa !15
%10 = load i32, ptr @BCMA_CORE_PMU, align 4, !tbaa !16
%11 = tail call ptr @bcma_find_core(i32 noundef %9, i32 noundef %10) #2
%12 = icmp eq ptr %11, null
br i1 %12, label %13, label %17
13: ; preds = %8
%14 = tail call i32 @dev_err(ptr noundef nonnull %3, ptr noundef nonnull @.str) #2
%15 = load i32, ptr @ENOENT, align 4, !tbaa !16
%16 = sub nsw i32 0, %15
br label %70
17: ; preds = %8
%18 = load i32, ptr @BCMA_IOCTL, align 4, !tbaa !16
%19 = load i32, ptr @BCMA_IOCTL_CLK, align 4, !tbaa !16
%20 = load i32, ptr @BCMA_IOCTL_FGC, align 4, !tbaa !16
%21 = or i32 %20, %19
%22 = tail call i32 @bcma_awrite32(ptr noundef nonnull %2, i32 noundef %18, i32 noundef %21) #2
%23 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 200) #2
%24 = load i32, ptr @BCMA_RESET_CTL, align 4, !tbaa !16
%25 = load i32, ptr @BCMA_RESET_CTL_RESET, align 4, !tbaa !16
%26 = tail call i32 @bcma_awrite32(ptr noundef nonnull %2, i32 noundef %24, i32 noundef %25) #2
%27 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 200) #2
%28 = load i32, ptr @BCMA_RESET_CTL, align 4, !tbaa !16
%29 = tail call i32 @bcma_awrite32(ptr noundef nonnull %2, i32 noundef %28, i32 noundef 0) #2
%30 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 200) #2
%31 = load i32, ptr @BCMA_IOCTL, align 4, !tbaa !16
%32 = load i32, ptr @BCMA_IOCTL_CLK, align 4, !tbaa !16
%33 = tail call i32 @bcma_awrite32(ptr noundef nonnull %2, i32 noundef %31, i32 noundef %32) #2
%34 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 200) #2
%35 = load i32, ptr @BCMA_CLKCTLST, align 4, !tbaa !16
%36 = load i32, ptr @BCMA_CLKCTLST_FORCEHT, align 4, !tbaa !16
%37 = load i32, ptr @BCMA_CLKCTLST_HQCLKREQ, align 4, !tbaa !16
%38 = or i32 %37, %36
%39 = load i32, ptr @USB_BCMA_CLKCTLST_USB_CLK_REQ, align 4, !tbaa !16
%40 = or i32 %38, %39
%41 = tail call i32 @bcma_write32(ptr noundef nonnull %2, i32 noundef %35, i32 noundef %40) #2
%42 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 200) #2
%43 = tail call i32 @bcma_write32(ptr noundef nonnull %2, i32 noundef 1296, i32 noundef -940027904) #2
%44 = tail call i32 @bcma_write32(ptr noundef nonnull %2, i32 noundef 1296, i32 noundef -940027901) #2
%45 = tail call i32 @usleep_range(i32 noundef 300, i32 noundef 600) #2
%46 = load i32, ptr @BCMA_CC_PMU_PLLCTL_ADDR, align 4, !tbaa !16
%47 = tail call i32 @bcma_write32(ptr noundef nonnull %11, i32 noundef %46, i32 noundef 6) #2
%48 = load i32, ptr @BCMA_CC_PMU_PLLCTL_DATA, align 4, !tbaa !16
%49 = tail call i32 @bcma_write32(ptr noundef nonnull %11, i32 noundef %48, i32 noundef 5464257) #2
%50 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 200) #2
%51 = load i32, ptr @BCMA_CC_PMU_PLLCTL_ADDR, align 4, !tbaa !16
%52 = tail call i32 @bcma_write32(ptr noundef nonnull %11, i32 noundef %51, i32 noundef 7) #2
%53 = load i32, ptr @BCMA_CC_PMU_PLLCTL_DATA, align 4, !tbaa !16
%54 = tail call i32 @bcma_write32(ptr noundef nonnull %11, i32 noundef %53, i32 noundef 0) #2
%55 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 200) #2
%56 = load i32, ptr @BCMA_CC_PMU_CTL, align 4, !tbaa !16
%57 = load i32, ptr @BCMA_CC_PMU_CTL_PLL_UPD, align 4, !tbaa !16
%58 = tail call i32 @bcma_set32(ptr noundef nonnull %11, i32 noundef %56, i32 noundef %57) #2
%59 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 200) #2
%60 = tail call i32 @bcma_write32(ptr noundef nonnull %2, i32 noundef 1296, i32 noundef 133746695) #2
%61 = tail call i32 @udelay(i32 noundef 1000) #2
%62 = tail call i32 @bcma_write32(ptr noundef nonnull %2, i32 noundef 512, i32 noundef 1279) #2
%63 = tail call i32 @usleep_range(i32 noundef 25, i32 noundef 50) #2
%64 = tail call i32 @bcma_write32(ptr noundef nonnull %2, i32 noundef 512, i32 noundef 1791) #2
%65 = tail call i32 @usleep_range(i32 noundef 25, i32 noundef 50) #2
%66 = tail call i32 @bcma_write32(ptr noundef nonnull %2, i32 noundef 512, i32 noundef 2047) #2
%67 = tail call i32 @usleep_range(i32 noundef 25, i32 noundef 50) #2
%68 = load i32, ptr %3, align 4, !tbaa !17
%69 = tail call i32 @of_platform_default_populate(i32 noundef %68, ptr noundef null, ptr noundef nonnull %3) #2
br label %70
70: ; preds = %1, %17, %13
%71 = phi i32 [ 0, %17 ], [ %16, %13 ], [ 0, %1 ]
ret i32 %71
}
declare i32 @usleep_range(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @bcma_find_core(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @bcma_awrite32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bcma_write32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bcma_set32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
declare i32 @of_platform_default_populate(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"bcma_hcd_device", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 4}
!11 = !{!"bcma_device", !12, i64 0, !13, i64 4, !14, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!"TYPE_2__", !12, i64 0}
!14 = !{!"device", !12, i64 0}
!15 = !{!11, !12, i64 0}
!16 = !{!12, !12, i64 0}
!17 = !{!14, !12, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/host/extr_bcma-hcd.c_bcma_hcd_usb20_old_arm_init.c'
source_filename = "AnghaBench/linux/drivers/usb/host/extr_bcma-hcd.c_bcma_hcd_usb20_old_arm_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BCMA_CORE_PMU = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"Could not find PMU core\0A\00", align 1
@ENOENT = common local_unnamed_addr global i32 0, align 4
@BCMA_IOCTL = common local_unnamed_addr global i32 0, align 4
@BCMA_IOCTL_CLK = common local_unnamed_addr global i32 0, align 4
@BCMA_IOCTL_FGC = common local_unnamed_addr global i32 0, align 4
@BCMA_RESET_CTL = common local_unnamed_addr global i32 0, align 4
@BCMA_RESET_CTL_RESET = common local_unnamed_addr global i32 0, align 4
@BCMA_CLKCTLST = common local_unnamed_addr global i32 0, align 4
@BCMA_CLKCTLST_FORCEHT = common local_unnamed_addr global i32 0, align 4
@BCMA_CLKCTLST_HQCLKREQ = common local_unnamed_addr global i32 0, align 4
@USB_BCMA_CLKCTLST_USB_CLK_REQ = common local_unnamed_addr global i32 0, align 4
@BCMA_CC_PMU_PLLCTL_ADDR = common local_unnamed_addr global i32 0, align 4
@BCMA_CC_PMU_PLLCTL_DATA = common local_unnamed_addr global i32 0, align 4
@BCMA_CC_PMU_CTL = common local_unnamed_addr global i32 0, align 4
@BCMA_CC_PMU_CTL_PLL_UPD = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @bcma_hcd_usb20_old_arm_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @bcma_hcd_usb20_old_arm_init(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = getelementptr inbounds i8, ptr %2, i64 8
%4 = tail call i32 @usleep_range(i32 noundef 10000, i32 noundef 20000) #2
%5 = getelementptr inbounds i8, ptr %2, i64 4
%6 = load i32, ptr %5, align 4, !tbaa !11
%7 = icmp slt i32 %6, 5
br i1 %7, label %70, label %8
8: ; preds = %1
%9 = load i32, ptr %2, align 4, !tbaa !16
%10 = load i32, ptr @BCMA_CORE_PMU, align 4, !tbaa !17
%11 = tail call ptr @bcma_find_core(i32 noundef %9, i32 noundef %10) #2
%12 = icmp eq ptr %11, null
br i1 %12, label %13, label %17
13: ; preds = %8
%14 = tail call i32 @dev_err(ptr noundef nonnull %3, ptr noundef nonnull @.str) #2
%15 = load i32, ptr @ENOENT, align 4, !tbaa !17
%16 = sub nsw i32 0, %15
br label %70
17: ; preds = %8
%18 = load i32, ptr @BCMA_IOCTL, align 4, !tbaa !17
%19 = load i32, ptr @BCMA_IOCTL_CLK, align 4, !tbaa !17
%20 = load i32, ptr @BCMA_IOCTL_FGC, align 4, !tbaa !17
%21 = or i32 %20, %19
%22 = tail call i32 @bcma_awrite32(ptr noundef nonnull %2, i32 noundef %18, i32 noundef %21) #2
%23 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 200) #2
%24 = load i32, ptr @BCMA_RESET_CTL, align 4, !tbaa !17
%25 = load i32, ptr @BCMA_RESET_CTL_RESET, align 4, !tbaa !17
%26 = tail call i32 @bcma_awrite32(ptr noundef nonnull %2, i32 noundef %24, i32 noundef %25) #2
%27 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 200) #2
%28 = load i32, ptr @BCMA_RESET_CTL, align 4, !tbaa !17
%29 = tail call i32 @bcma_awrite32(ptr noundef nonnull %2, i32 noundef %28, i32 noundef 0) #2
%30 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 200) #2
%31 = load i32, ptr @BCMA_IOCTL, align 4, !tbaa !17
%32 = load i32, ptr @BCMA_IOCTL_CLK, align 4, !tbaa !17
%33 = tail call i32 @bcma_awrite32(ptr noundef nonnull %2, i32 noundef %31, i32 noundef %32) #2
%34 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 200) #2
%35 = load i32, ptr @BCMA_CLKCTLST, align 4, !tbaa !17
%36 = load i32, ptr @BCMA_CLKCTLST_FORCEHT, align 4, !tbaa !17
%37 = load i32, ptr @BCMA_CLKCTLST_HQCLKREQ, align 4, !tbaa !17
%38 = or i32 %37, %36
%39 = load i32, ptr @USB_BCMA_CLKCTLST_USB_CLK_REQ, align 4, !tbaa !17
%40 = or i32 %38, %39
%41 = tail call i32 @bcma_write32(ptr noundef nonnull %2, i32 noundef %35, i32 noundef %40) #2
%42 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 200) #2
%43 = tail call i32 @bcma_write32(ptr noundef nonnull %2, i32 noundef 1296, i32 noundef -940027904) #2
%44 = tail call i32 @bcma_write32(ptr noundef nonnull %2, i32 noundef 1296, i32 noundef -940027901) #2
%45 = tail call i32 @usleep_range(i32 noundef 300, i32 noundef 600) #2
%46 = load i32, ptr @BCMA_CC_PMU_PLLCTL_ADDR, align 4, !tbaa !17
%47 = tail call i32 @bcma_write32(ptr noundef nonnull %11, i32 noundef %46, i32 noundef 6) #2
%48 = load i32, ptr @BCMA_CC_PMU_PLLCTL_DATA, align 4, !tbaa !17
%49 = tail call i32 @bcma_write32(ptr noundef nonnull %11, i32 noundef %48, i32 noundef 5464257) #2
%50 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 200) #2
%51 = load i32, ptr @BCMA_CC_PMU_PLLCTL_ADDR, align 4, !tbaa !17
%52 = tail call i32 @bcma_write32(ptr noundef nonnull %11, i32 noundef %51, i32 noundef 7) #2
%53 = load i32, ptr @BCMA_CC_PMU_PLLCTL_DATA, align 4, !tbaa !17
%54 = tail call i32 @bcma_write32(ptr noundef nonnull %11, i32 noundef %53, i32 noundef 0) #2
%55 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 200) #2
%56 = load i32, ptr @BCMA_CC_PMU_CTL, align 4, !tbaa !17
%57 = load i32, ptr @BCMA_CC_PMU_CTL_PLL_UPD, align 4, !tbaa !17
%58 = tail call i32 @bcma_set32(ptr noundef nonnull %11, i32 noundef %56, i32 noundef %57) #2
%59 = tail call i32 @usleep_range(i32 noundef 100, i32 noundef 200) #2
%60 = tail call i32 @bcma_write32(ptr noundef nonnull %2, i32 noundef 1296, i32 noundef 133746695) #2
%61 = tail call i32 @udelay(i32 noundef 1000) #2
%62 = tail call i32 @bcma_write32(ptr noundef nonnull %2, i32 noundef 512, i32 noundef 1279) #2
%63 = tail call i32 @usleep_range(i32 noundef 25, i32 noundef 50) #2
%64 = tail call i32 @bcma_write32(ptr noundef nonnull %2, i32 noundef 512, i32 noundef 1791) #2
%65 = tail call i32 @usleep_range(i32 noundef 25, i32 noundef 50) #2
%66 = tail call i32 @bcma_write32(ptr noundef nonnull %2, i32 noundef 512, i32 noundef 2047) #2
%67 = tail call i32 @usleep_range(i32 noundef 25, i32 noundef 50) #2
%68 = load i32, ptr %3, align 4, !tbaa !18
%69 = tail call i32 @of_platform_default_populate(i32 noundef %68, ptr noundef null, ptr noundef nonnull %3) #2
br label %70
70: ; preds = %1, %17, %13
%71 = phi i32 [ 0, %17 ], [ %16, %13 ], [ 0, %1 ]
ret i32 %71
}
declare i32 @usleep_range(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @bcma_find_core(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @bcma_awrite32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bcma_write32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bcma_set32(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
declare i32 @of_platform_default_populate(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"bcma_hcd_device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 4}
!12 = !{!"bcma_device", !13, i64 0, !14, i64 4, !15, i64 8}
!13 = !{!"int", !9, i64 0}
!14 = !{!"TYPE_2__", !13, i64 0}
!15 = !{!"device", !13, i64 0}
!16 = !{!12, !13, i64 0}
!17 = !{!13, !13, i64 0}
!18 = !{!15, !13, i64 0}
| linux_drivers_usb_host_extr_bcma-hcd.c_bcma_hcd_usb20_old_arm_init |
; ModuleID = 'AnghaBench/linux/drivers/usb/usbip/extr_usbip_common.c_usbip_header_correct_endian.c'
source_filename = "AnghaBench/linux/drivers/usb/usbip/extr_usbip_common.c_usbip_header_correct_endian.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.usbip_header = type { %struct.TYPE_3__, %struct.TYPE_4__ }
%struct.TYPE_3__ = type { i32, i32, i32, i32 }
%struct.TYPE_4__ = type { i32 }
@.str = private unnamed_addr constant [17 x i8] c"unknown command\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @usbip_header_correct_endian(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq i32 %1, 0
%4 = getelementptr inbounds %struct.usbip_header, ptr %0, i64 0, i32 1
br i1 %3, label %8, label %5
5: ; preds = %2
%6 = load i32, ptr %4, align 4, !tbaa !5
%7 = tail call i32 @correct_endian_basic(ptr noundef nonnull %4, i32 noundef %1) #2
br label %11
8: ; preds = %2
%9 = tail call i32 @correct_endian_basic(ptr noundef nonnull %4, i32 noundef 0) #2
%10 = load i32, ptr %4, align 4, !tbaa !5
br label %11
11: ; preds = %5, %8
%12 = phi i32 [ %6, %5 ], [ %10, %8 ]
switch i32 %12, label %24 [
i32 131, label %13
i32 129, label %16
i32 130, label %19
i32 128, label %22
]
13: ; preds = %11
%14 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 3
%15 = tail call i32 @correct_endian_cmd_submit(ptr noundef nonnull %14, i32 noundef %1) #2
br label %26
16: ; preds = %11
%17 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
%18 = tail call i32 @correct_endian_ret_submit(ptr noundef nonnull %17, i32 noundef %1) #2
br label %26
19: ; preds = %11
%20 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%21 = tail call i32 @correct_endian_cmd_unlink(ptr noundef nonnull %20, i32 noundef %1) #2
br label %26
22: ; preds = %11
%23 = tail call i32 @correct_endian_ret_unlink(ptr noundef nonnull %0, i32 noundef %1) #2
br label %26
24: ; preds = %11
%25 = tail call i32 @pr_err(ptr noundef nonnull @.str) #2
br label %26
26: ; preds = %24, %22, %19, %16, %13
ret void
}
declare i32 @correct_endian_basic(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @correct_endian_cmd_submit(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @correct_endian_ret_submit(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @correct_endian_cmd_unlink(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @correct_endian_ret_unlink(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 16}
!6 = !{!"usbip_header", !7, i64 0, !11, i64 16}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_4__", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/usbip/extr_usbip_common.c_usbip_header_correct_endian.c'
source_filename = "AnghaBench/linux/drivers/usb/usbip/extr_usbip_common.c_usbip_header_correct_endian.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [17 x i8] c"unknown command\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @usbip_header_correct_endian(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq i32 %1, 0
%4 = getelementptr inbounds i8, ptr %0, i64 16
br i1 %3, label %8, label %5
5: ; preds = %2
%6 = load i32, ptr %4, align 4, !tbaa !6
%7 = tail call i32 @correct_endian_basic(ptr noundef nonnull %4, i32 noundef %1) #2
br label %11
8: ; preds = %2
%9 = tail call i32 @correct_endian_basic(ptr noundef nonnull %4, i32 noundef 0) #2
%10 = load i32, ptr %4, align 4, !tbaa !6
br label %11
11: ; preds = %5, %8
%12 = phi i32 [ %6, %5 ], [ %10, %8 ]
switch i32 %12, label %24 [
i32 131, label %13
i32 129, label %16
i32 130, label %19
i32 128, label %22
]
13: ; preds = %11
%14 = getelementptr inbounds i8, ptr %0, i64 12
%15 = tail call i32 @correct_endian_cmd_submit(ptr noundef nonnull %14, i32 noundef %1) #2
br label %26
16: ; preds = %11
%17 = getelementptr inbounds i8, ptr %0, i64 8
%18 = tail call i32 @correct_endian_ret_submit(ptr noundef nonnull %17, i32 noundef %1) #2
br label %26
19: ; preds = %11
%20 = getelementptr inbounds i8, ptr %0, i64 4
%21 = tail call i32 @correct_endian_cmd_unlink(ptr noundef nonnull %20, i32 noundef %1) #2
br label %26
22: ; preds = %11
%23 = tail call i32 @correct_endian_ret_unlink(ptr noundef nonnull %0, i32 noundef %1) #2
br label %26
24: ; preds = %11
%25 = tail call i32 @pr_err(ptr noundef nonnull @.str) #2
br label %26
26: ; preds = %24, %22, %19, %16, %13
ret void
}
declare i32 @correct_endian_basic(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @correct_endian_cmd_submit(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @correct_endian_ret_submit(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @correct_endian_cmd_unlink(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @correct_endian_ret_unlink(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 16}
!7 = !{!"usbip_header", !8, i64 0, !12, i64 16}
!8 = !{!"TYPE_3__", !9, i64 0, !9, i64 4, !9, i64 8, !9, i64 12}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"TYPE_4__", !9, i64 0}
| linux_drivers_usb_usbip_extr_usbip_common.c_usbip_header_correct_endian |
; ModuleID = 'AnghaBench/reactos/dll/directx/wine/dsound/extr_dsound.c_IDirectSoundImpl_AddRef.c'
source_filename = "AnghaBench/reactos/dll/directx/wine/dsound/extr_dsound.c_IDirectSoundImpl_AddRef.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [17 x i8] c"(%p) ref was %d\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @IDirectSoundImpl_AddRef], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @IDirectSoundImpl_AddRef(i64 noundef %0) #0 {
%2 = inttoptr i64 %0 to ptr
%3 = tail call i64 @InterlockedIncrement(ptr noundef %2) #2
%4 = add nsw i64 %3, -1
%5 = tail call i32 @TRACE(ptr noundef nonnull @.str, ptr noundef %2, i64 noundef %4) #2
ret i64 %3
}
declare i64 @InterlockedIncrement(ptr noundef) local_unnamed_addr #1
declare i32 @TRACE(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/reactos/dll/directx/wine/dsound/extr_dsound.c_IDirectSoundImpl_AddRef.c'
source_filename = "AnghaBench/reactos/dll/directx/wine/dsound/extr_dsound.c_IDirectSoundImpl_AddRef.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [17 x i8] c"(%p) ref was %d\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @IDirectSoundImpl_AddRef], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @IDirectSoundImpl_AddRef(i64 noundef %0) #0 {
%2 = inttoptr i64 %0 to ptr
%3 = tail call i64 @InterlockedIncrement(ptr noundef %2) #2
%4 = add nsw i64 %3, -1
%5 = tail call i32 @TRACE(ptr noundef nonnull @.str, ptr noundef %2, i64 noundef %4) #2
ret i64 %3
}
declare i64 @InterlockedIncrement(ptr noundef) local_unnamed_addr #1
declare i32 @TRACE(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| reactos_dll_directx_wine_dsound_extr_dsound.c_IDirectSoundImpl_AddRef |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/extr_intel_sideband.c_vlv_iosf_sb_write.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/extr_intel_sideband.c_vlv_iosf_sb_write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SB_CRWRDA_NP = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @vlv_iosf_sb_write(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = alloca i32, align 4
store i32 %3, ptr %5, align 4, !tbaa !5
%6 = tail call i32 @PCI_DEVFN(i32 noundef 0, i32 noundef 0) #2
%7 = load i32, ptr @SB_CRWRDA_NP, align 4, !tbaa !5
%8 = call i32 @vlv_sideband_rw(ptr noundef %0, i32 noundef %6, i32 noundef %1, i32 noundef %7, i32 noundef %2, ptr noundef nonnull %5) #2
ret void
}
declare i32 @vlv_sideband_rw(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @PCI_DEVFN(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/extr_intel_sideband.c_vlv_iosf_sb_write.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/extr_intel_sideband.c_vlv_iosf_sb_write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SB_CRWRDA_NP = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @vlv_iosf_sb_write(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = alloca i32, align 4
store i32 %3, ptr %5, align 4, !tbaa !6
%6 = tail call i32 @PCI_DEVFN(i32 noundef 0, i32 noundef 0) #2
%7 = load i32, ptr @SB_CRWRDA_NP, align 4, !tbaa !6
%8 = call i32 @vlv_sideband_rw(ptr noundef %0, i32 noundef %6, i32 noundef %1, i32 noundef %7, i32 noundef %2, ptr noundef nonnull %5) #2
ret void
}
declare i32 @vlv_sideband_rw(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @PCI_DEVFN(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_drm_i915_extr_intel_sideband.c_vlv_iosf_sb_write |
; ModuleID = 'AnghaBench/freebsd/crypto/heimdal/appl/gssmask/extr_gssmaestro.c_wrap_token_ext.c'
source_filename = "AnghaBench/freebsd/crypto/heimdal/appl/gssmask/extr_gssmaestro.c_wrap_token_ext.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@eWrapExt = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @wrap_token_ext], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @wrap_token_ext(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr nocapture noundef readonly %4, ptr nocapture noundef readonly %5, ptr nocapture noundef readonly %6, ptr nocapture noundef readonly %7) #0 {
%9 = load i32, ptr @eWrapExt, align 4, !tbaa !5
%10 = tail call i32 @put32(ptr noundef %0, i32 noundef %9) #2
%11 = tail call i32 @put32(ptr noundef %0, i32 noundef %1) #2
%12 = tail call i32 @put32(ptr noundef %0, i32 noundef %2) #2
%13 = tail call i32 @put32(ptr noundef %0, i32 noundef %3) #2
%14 = load i32, ptr %4, align 4, !tbaa !5
%15 = tail call i32 @putdata(ptr noundef %0, i32 noundef %14) #2
%16 = load i32, ptr %5, align 4, !tbaa !5
%17 = tail call i32 @putdata(ptr noundef %0, i32 noundef %16) #2
%18 = load i32, ptr %6, align 4, !tbaa !5
%19 = tail call i32 @putdata(ptr noundef %0, i32 noundef %18) #2
%20 = tail call i32 @ret32(ptr noundef %0, i32 noundef undef) #2
%21 = load i32, ptr %7, align 4, !tbaa !5
%22 = tail call i32 @retdata(ptr noundef %0, i32 noundef %21) #2
ret i32 undef
}
declare i32 @put32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @putdata(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ret32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @retdata(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/crypto/heimdal/appl/gssmask/extr_gssmaestro.c_wrap_token_ext.c'
source_filename = "AnghaBench/freebsd/crypto/heimdal/appl/gssmask/extr_gssmaestro.c_wrap_token_ext.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@eWrapExt = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @wrap_token_ext], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @wrap_token_ext(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, ptr nocapture noundef readonly %4, ptr nocapture noundef readonly %5, ptr nocapture noundef readonly %6, ptr nocapture noundef readonly %7) #0 {
%9 = load i32, ptr @eWrapExt, align 4, !tbaa !6
%10 = tail call i32 @put32(ptr noundef %0, i32 noundef %9) #2
%11 = tail call i32 @put32(ptr noundef %0, i32 noundef %1) #2
%12 = tail call i32 @put32(ptr noundef %0, i32 noundef %2) #2
%13 = tail call i32 @put32(ptr noundef %0, i32 noundef %3) #2
%14 = load i32, ptr %4, align 4, !tbaa !6
%15 = tail call i32 @putdata(ptr noundef %0, i32 noundef %14) #2
%16 = load i32, ptr %5, align 4, !tbaa !6
%17 = tail call i32 @putdata(ptr noundef %0, i32 noundef %16) #2
%18 = load i32, ptr %6, align 4, !tbaa !6
%19 = tail call i32 @putdata(ptr noundef %0, i32 noundef %18) #2
%20 = tail call i32 @ret32(ptr noundef %0, i32 noundef undef) #2
%21 = load i32, ptr %7, align 4, !tbaa !6
%22 = tail call i32 @retdata(ptr noundef %0, i32 noundef %21) #2
ret i32 undef
}
declare i32 @put32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @putdata(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ret32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @retdata(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_crypto_heimdal_appl_gssmask_extr_gssmaestro.c_wrap_token_ext |
; ModuleID = 'AnghaBench/linux/arch/x86/kernel/kprobes/extr_ftrace.c_arch_prepare_kprobe_ftrace.c'
source_filename = "AnghaBench/linux/arch/x86/kernel/kprobes/extr_ftrace.c_arch_prepare_kprobe_ftrace.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, ptr }
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable
define dso_local noundef i32 @arch_prepare_kprobe_ftrace(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 1
store ptr null, ptr %2, align 8, !tbaa !5
store i32 0, ptr %0, align 8, !tbaa !12
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: write) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"kprobe", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!6, !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/arch/x86/kernel/kprobes/extr_ftrace.c_arch_prepare_kprobe_ftrace.c'
source_filename = "AnghaBench/linux/arch/x86/kernel/kprobes/extr_ftrace.c_arch_prepare_kprobe_ftrace.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync)
define noundef i32 @arch_prepare_kprobe_ftrace(ptr nocapture noundef writeonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
store ptr null, ptr %2, align 8, !tbaa !6
store i32 0, ptr %0, align 8, !tbaa !13
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: write) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"kprobe", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0, !12, i64 8}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!7, !9, i64 0}
| linux_arch_x86_kernel_kprobes_extr_ftrace.c_arch_prepare_kprobe_ftrace |
; ModuleID = 'AnghaBench/freebsd/contrib/sqlite3/tea/generic/extr_tclsqlite3.c_findSqlFunc.c'
source_filename = "AnghaBench/freebsd/contrib/sqlite3/tea/generic/extr_tclsqlite3.c_findSqlFunc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { ptr, ptr, i64, ptr, i32 }
%struct.TYPE_5__ = type { ptr, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @findSqlFunc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef ptr @findSqlFunc(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @strlen30(ptr noundef %1) #2
%4 = add i32 %3, 41
%5 = tail call i64 @Tcl_Alloc(i32 noundef %4) #2
%6 = inttoptr i64 %5 to ptr
%7 = getelementptr inbounds %struct.TYPE_6__, ptr %6, i64 1
store ptr %7, ptr %6, align 8, !tbaa !5
%8 = add nsw i32 %3, 1
%9 = tail call i32 @memcpy(ptr noundef nonnull %7, ptr noundef %1, i32 noundef %8) #2
%10 = load ptr, ptr %0, align 8, !tbaa !12
%11 = icmp eq ptr %10, null
br i1 %11, label %26, label %12
12: ; preds = %2, %20
%13 = phi ptr [ %22, %20 ], [ %10, %2 ]
%14 = load ptr, ptr %13, align 8, !tbaa !5
%15 = load ptr, ptr %6, align 8, !tbaa !5
%16 = tail call i64 @sqlite3_stricmp(ptr noundef %14, ptr noundef %15) #2
%17 = icmp eq i64 %16, 0
br i1 %17, label %18, label %20
18: ; preds = %12
%19 = tail call i32 @Tcl_Free(ptr noundef nonnull %6) #2
br label %34
20: ; preds = %12
%21 = getelementptr inbounds %struct.TYPE_6__, ptr %13, i64 0, i32 1
%22 = load ptr, ptr %21, align 8, !tbaa !12
%23 = icmp eq ptr %22, null
br i1 %23, label %24, label %12, !llvm.loop !13
24: ; preds = %20
%25 = load ptr, ptr %0, align 8, !tbaa !15
br label %26
26: ; preds = %24, %2
%27 = phi ptr [ %25, %24 ], [ null, %2 ]
%28 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
%29 = load i32, ptr %28, align 8, !tbaa !17
%30 = getelementptr inbounds %struct.TYPE_6__, ptr %6, i64 0, i32 4
store i32 %29, ptr %30, align 8, !tbaa !18
%31 = getelementptr inbounds %struct.TYPE_6__, ptr %6, i64 0, i32 3
store ptr %0, ptr %31, align 8, !tbaa !19
%32 = getelementptr inbounds %struct.TYPE_6__, ptr %6, i64 0, i32 2
store i64 0, ptr %32, align 8, !tbaa !20
%33 = getelementptr inbounds %struct.TYPE_6__, ptr %6, i64 0, i32 1
store ptr %27, ptr %33, align 8, !tbaa !21
store ptr %6, ptr %0, align 8, !tbaa !15
br label %34
34: ; preds = %26, %18
%35 = phi ptr [ %13, %18 ], [ %6, %26 ]
ret ptr %35
}
declare i32 @strlen30(ptr noundef) local_unnamed_addr #1
declare i64 @Tcl_Alloc(i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @sqlite3_stricmp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @Tcl_Free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_6__", !7, i64 0, !7, i64 8, !10, i64 16, !7, i64 24, !11, i64 32}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!16, !7, i64 0}
!16 = !{!"TYPE_5__", !7, i64 0, !11, i64 8}
!17 = !{!16, !11, i64 8}
!18 = !{!6, !11, i64 32}
!19 = !{!6, !7, i64 24}
!20 = !{!6, !10, i64 16}
!21 = !{!6, !7, i64 8}
| ; ModuleID = 'AnghaBench/freebsd/contrib/sqlite3/tea/generic/extr_tclsqlite3.c_findSqlFunc.c'
source_filename = "AnghaBench/freebsd/contrib/sqlite3/tea/generic/extr_tclsqlite3.c_findSqlFunc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @findSqlFunc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef ptr @findSqlFunc(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @strlen30(ptr noundef %1) #2
%4 = add i32 %3, 41
%5 = tail call i64 @Tcl_Alloc(i32 noundef %4) #2
%6 = inttoptr i64 %5 to ptr
%7 = getelementptr inbounds i8, ptr %6, i64 40
store ptr %7, ptr %6, align 8, !tbaa !6
%8 = add nsw i32 %3, 1
%9 = tail call i32 @memcpy(ptr noundef nonnull %7, ptr noundef %1, i32 noundef %8) #2
%10 = load ptr, ptr %0, align 8, !tbaa !13
%11 = icmp eq ptr %10, null
br i1 %11, label %26, label %12
12: ; preds = %2, %20
%13 = phi ptr [ %22, %20 ], [ %10, %2 ]
%14 = load ptr, ptr %13, align 8, !tbaa !6
%15 = load ptr, ptr %6, align 8, !tbaa !6
%16 = tail call i64 @sqlite3_stricmp(ptr noundef %14, ptr noundef %15) #2
%17 = icmp eq i64 %16, 0
br i1 %17, label %18, label %20
18: ; preds = %12
%19 = tail call i32 @Tcl_Free(ptr noundef nonnull %6) #2
br label %34
20: ; preds = %12
%21 = getelementptr inbounds i8, ptr %13, i64 8
%22 = load ptr, ptr %21, align 8, !tbaa !13
%23 = icmp eq ptr %22, null
br i1 %23, label %24, label %12, !llvm.loop !14
24: ; preds = %20
%25 = load ptr, ptr %0, align 8, !tbaa !16
br label %26
26: ; preds = %24, %2
%27 = phi ptr [ %25, %24 ], [ null, %2 ]
%28 = getelementptr inbounds i8, ptr %0, i64 8
%29 = load i32, ptr %28, align 8, !tbaa !18
%30 = getelementptr inbounds i8, ptr %6, i64 32
store i32 %29, ptr %30, align 8, !tbaa !19
%31 = getelementptr inbounds i8, ptr %6, i64 24
store ptr %0, ptr %31, align 8, !tbaa !20
%32 = getelementptr inbounds i8, ptr %6, i64 16
store i64 0, ptr %32, align 8, !tbaa !21
%33 = getelementptr inbounds i8, ptr %6, i64 8
store ptr %27, ptr %33, align 8, !tbaa !22
store ptr %6, ptr %0, align 8, !tbaa !16
br label %34
34: ; preds = %26, %18
%35 = phi ptr [ %13, %18 ], [ %6, %26 ]
ret ptr %35
}
declare i32 @strlen30(ptr noundef) local_unnamed_addr #1
declare i64 @Tcl_Alloc(i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @sqlite3_stricmp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @Tcl_Free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0, !8, i64 8, !11, i64 16, !8, i64 24, !12, i64 32}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!17, !8, i64 0}
!17 = !{!"TYPE_5__", !8, i64 0, !12, i64 8}
!18 = !{!17, !12, i64 8}
!19 = !{!7, !12, i64 32}
!20 = !{!7, !8, i64 24}
!21 = !{!7, !11, i64 16}
!22 = !{!7, !8, i64 8}
| freebsd_contrib_sqlite3_tea_generic_extr_tclsqlite3.c_findSqlFunc |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/lib/extr_io_64.c___memcpy_toio.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/lib/extr_io_64.c___memcpy_toio.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @__memcpy_toio(i64 noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = inttoptr i64 %0 to ptr
%5 = tail call i32 @__inline_memcpy(ptr noundef %4, ptr noundef %1, i32 noundef %2) #2
ret void
}
declare i32 @__inline_memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/lib/extr_io_64.c___memcpy_toio.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/lib/extr_io_64.c___memcpy_toio.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @__memcpy_toio(i64 noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = inttoptr i64 %0 to ptr
%5 = tail call i32 @__inline_memcpy(ptr noundef %4, ptr noundef %1, i32 noundef %2) #2
ret void
}
declare i32 @__inline_memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_arch_x86_lib_extr_io_64.c___memcpy_toio |
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_mipsfbsd-tdep.c_mipsfbsd_cannot_store_register.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_mipsfbsd-tdep.c_mipsfbsd_cannot_store_register.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ZERO_REGNUM = dso_local local_unnamed_addr global i32 0, align 4
@current_gdbarch = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @mipsfbsd_cannot_store_register], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mipsfbsd_cannot_store_register(i32 noundef %0) #0 {
%2 = load i32, ptr @ZERO_REGNUM, align 4, !tbaa !5
%3 = icmp eq i32 %2, %0
br i1 %3, label %10, label %4
4: ; preds = %1
%5 = load i32, ptr @current_gdbarch, align 4, !tbaa !5
%6 = tail call ptr @mips_regnum(i32 noundef %5) #2
%7 = load i32, ptr %6, align 4, !tbaa !9
%8 = icmp eq i32 %7, %0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %4, %1
%11 = phi i32 [ 1, %1 ], [ %9, %4 ]
ret i32 %11
}
declare ptr @mips_regnum(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_2__", !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_mipsfbsd-tdep.c_mipsfbsd_cannot_store_register.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_mipsfbsd-tdep.c_mipsfbsd_cannot_store_register.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ZERO_REGNUM = common local_unnamed_addr global i32 0, align 4
@current_gdbarch = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mipsfbsd_cannot_store_register], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @mipsfbsd_cannot_store_register(i32 noundef %0) #0 {
%2 = load i32, ptr @ZERO_REGNUM, align 4, !tbaa !6
%3 = icmp eq i32 %2, %0
br i1 %3, label %10, label %4
4: ; preds = %1
%5 = load i32, ptr @current_gdbarch, align 4, !tbaa !6
%6 = tail call ptr @mips_regnum(i32 noundef %5) #2
%7 = load i32, ptr %6, align 4, !tbaa !10
%8 = icmp eq i32 %7, %0
%9 = zext i1 %8 to i32
br label %10
10: ; preds = %4, %1
%11 = phi i32 [ 1, %1 ], [ %9, %4 ]
ret i32 %11
}
declare ptr @mips_regnum(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
| freebsd_contrib_gdb_gdb_extr_mipsfbsd-tdep.c_mipsfbsd_cannot_store_register |
; ModuleID = 'AnghaBench/vlc/src/modules/extr_bank.c_module_list_get.c'
source_filename = "AnghaBench/vlc/src/modules/extr_bank.c_module_list_get.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i64, ptr, ptr }
@vlc_plugins = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local noundef ptr @module_list_get(ptr noundef writeonly %0) local_unnamed_addr #0 {
%2 = icmp ne ptr %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 noundef %3) #3
%5 = load ptr, ptr @vlc_plugins, align 8, !tbaa !5
%6 = icmp eq ptr %5, null
br i1 %6, label %37, label %7
7: ; preds = %1, %32
%8 = phi ptr [ %35, %32 ], [ %5, %1 ]
%9 = phi i64 [ %33, %32 ], [ 0, %1 ]
%10 = phi ptr [ %14, %32 ], [ null, %1 ]
%11 = load i64, ptr %8, align 8, !tbaa !9
%12 = add i64 %11, %9
%13 = shl i64 %12, 3
%14 = tail call ptr @realloc(ptr noundef %10, i64 noundef %13)
%15 = icmp eq ptr %14, null
%16 = zext i1 %15 to i32
%17 = tail call i64 @unlikely(i32 noundef %16) #3
%18 = icmp eq i64 %17, 0
br i1 %18, label %21, label %19
19: ; preds = %7
%20 = tail call i32 @free(ptr noundef %10) #3
br label %37
21: ; preds = %7
%22 = getelementptr inbounds %struct.TYPE_8__, ptr %8, i64 0, i32 1
%23 = load ptr, ptr %22, align 8, !tbaa !5
%24 = icmp eq ptr %23, null
br i1 %24, label %32, label %25
25: ; preds = %21, %25
%26 = phi ptr [ %30, %25 ], [ %23, %21 ]
%27 = phi i64 [ %28, %25 ], [ %9, %21 ]
%28 = add i64 %27, 1
%29 = getelementptr inbounds ptr, ptr %14, i64 %27
store ptr %26, ptr %29, align 8, !tbaa !5
%30 = load ptr, ptr %26, align 8, !tbaa !5
%31 = icmp eq ptr %30, null
br i1 %31, label %32, label %25, !llvm.loop !12
32: ; preds = %25, %21
%33 = phi i64 [ %9, %21 ], [ %28, %25 ]
%34 = getelementptr inbounds %struct.TYPE_8__, ptr %8, i64 0, i32 2
%35 = load ptr, ptr %34, align 8, !tbaa !5
%36 = icmp eq ptr %35, null
br i1 %36, label %37, label %7, !llvm.loop !14
37: ; preds = %32, %1, %19
%38 = phi i64 [ 0, %19 ], [ 0, %1 ], [ %33, %32 ]
%39 = phi ptr [ null, %19 ], [ null, %1 ], [ %14, %32 ]
store i64 %38, ptr %0, align 8, !tbaa !15
ret ptr %39
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nounwind willreturn allockind("realloc") allocsize(1) memory(argmem: readwrite, inaccessiblemem: readwrite)
declare noalias noundef ptr @realloc(ptr allocptr nocapture noundef, i64 noundef) local_unnamed_addr #2
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nounwind willreturn allockind("realloc") allocsize(1) memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_8__", !11, i64 0, !6, i64 8, !6, i64 16}
!11 = !{!"long", !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = distinct !{!14, !13}
!15 = !{!11, !11, i64 0}
| ; ModuleID = 'AnghaBench/vlc/src/modules/extr_bank.c_module_list_get.c'
source_filename = "AnghaBench/vlc/src/modules/extr_bank.c_module_list_get.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@vlc_plugins = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define noundef ptr @module_list_get(ptr noundef writeonly %0) local_unnamed_addr #0 {
%2 = icmp ne ptr %0, null
%3 = zext i1 %2 to i32
%4 = tail call i32 @assert(i32 noundef %3) #3
%5 = load ptr, ptr @vlc_plugins, align 8, !tbaa !6
%6 = icmp eq ptr %5, null
br i1 %6, label %37, label %7
7: ; preds = %1, %32
%8 = phi ptr [ %35, %32 ], [ %5, %1 ]
%9 = phi i64 [ %33, %32 ], [ 0, %1 ]
%10 = phi ptr [ %14, %32 ], [ null, %1 ]
%11 = load i64, ptr %8, align 8, !tbaa !10
%12 = add i64 %11, %9
%13 = shl i64 %12, 3
%14 = tail call ptr @realloc(ptr noundef %10, i64 noundef %13)
%15 = icmp eq ptr %14, null
%16 = zext i1 %15 to i32
%17 = tail call i64 @unlikely(i32 noundef %16) #3
%18 = icmp eq i64 %17, 0
br i1 %18, label %21, label %19
19: ; preds = %7
%20 = tail call i32 @free(ptr noundef %10) #3
br label %37
21: ; preds = %7
%22 = getelementptr inbounds i8, ptr %8, i64 8
%23 = load ptr, ptr %22, align 8, !tbaa !6
%24 = icmp eq ptr %23, null
br i1 %24, label %32, label %25
25: ; preds = %21, %25
%26 = phi ptr [ %30, %25 ], [ %23, %21 ]
%27 = phi i64 [ %28, %25 ], [ %9, %21 ]
%28 = add i64 %27, 1
%29 = getelementptr inbounds ptr, ptr %14, i64 %27
store ptr %26, ptr %29, align 8, !tbaa !6
%30 = load ptr, ptr %26, align 8, !tbaa !6
%31 = icmp eq ptr %30, null
br i1 %31, label %32, label %25, !llvm.loop !13
32: ; preds = %25, %21
%33 = phi i64 [ %9, %21 ], [ %28, %25 ]
%34 = getelementptr inbounds i8, ptr %8, i64 16
%35 = load ptr, ptr %34, align 8, !tbaa !6
%36 = icmp eq ptr %35, null
br i1 %36, label %37, label %7, !llvm.loop !15
37: ; preds = %32, %1, %19
%38 = phi i64 [ 0, %19 ], [ 0, %1 ], [ %33, %32 ]
%39 = phi ptr [ null, %19 ], [ null, %1 ], [ %14, %32 ]
store i64 %38, ptr %0, align 8, !tbaa !16
ret ptr %39
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nounwind willreturn allockind("realloc") allocsize(1) memory(argmem: readwrite, inaccessiblemem: readwrite)
declare noalias noundef ptr @realloc(ptr allocptr nocapture noundef, i64 noundef) local_unnamed_addr #2
declare i64 @unlikely(i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nounwind willreturn allockind("realloc") allocsize(1) memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_8__", !12, i64 0, !7, i64 8, !7, i64 16}
!12 = !{!"long", !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = distinct !{!15, !14}
!16 = !{!12, !12, i64 0}
| vlc_src_modules_extr_bank.c_module_list_get |
; ModuleID = 'AnghaBench/reactos/sdk/lib/3rdparty/libxml2/extr_globals.c_xmlThrDefOutputBufferCreateFilenameDefault.c'
source_filename = "AnghaBench/reactos/sdk/lib/3rdparty/libxml2/extr_globals.c_xmlThrDefOutputBufferCreateFilenameDefault.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@xmlThrDefMutex = dso_local local_unnamed_addr global i32 0, align 4
@xmlOutputBufferCreateFilenameValueThrDef = dso_local local_unnamed_addr global ptr null, align 8
@__xmlOutputBufferCreateFilename = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local ptr @xmlThrDefOutputBufferCreateFilenameDefault(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @xmlThrDefMutex, align 4, !tbaa !5
%3 = tail call i32 @xmlMutexLock(i32 noundef %2) #2
%4 = load ptr, ptr @xmlOutputBufferCreateFilenameValueThrDef, align 8, !tbaa !9
store ptr %0, ptr @xmlOutputBufferCreateFilenameValueThrDef, align 8, !tbaa !9
%5 = load i32, ptr @xmlThrDefMutex, align 4, !tbaa !5
%6 = tail call i32 @xmlMutexUnlock(i32 noundef %5) #2
ret ptr %4
}
declare i32 @xmlMutexLock(i32 noundef) local_unnamed_addr #1
declare i32 @xmlMutexUnlock(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/reactos/sdk/lib/3rdparty/libxml2/extr_globals.c_xmlThrDefOutputBufferCreateFilenameDefault.c'
source_filename = "AnghaBench/reactos/sdk/lib/3rdparty/libxml2/extr_globals.c_xmlThrDefOutputBufferCreateFilenameDefault.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@xmlThrDefMutex = common local_unnamed_addr global i32 0, align 4
@xmlOutputBufferCreateFilenameValueThrDef = common local_unnamed_addr global ptr null, align 8
@__xmlOutputBufferCreateFilename = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @xmlThrDefOutputBufferCreateFilenameDefault(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @xmlThrDefMutex, align 4, !tbaa !6
%3 = tail call i32 @xmlMutexLock(i32 noundef %2) #2
%4 = load ptr, ptr @xmlOutputBufferCreateFilenameValueThrDef, align 8, !tbaa !10
store ptr %0, ptr @xmlOutputBufferCreateFilenameValueThrDef, align 8, !tbaa !10
%5 = load i32, ptr @xmlThrDefMutex, align 4, !tbaa !6
%6 = tail call i32 @xmlMutexUnlock(i32 noundef %5) #2
ret ptr %4
}
declare i32 @xmlMutexLock(i32 noundef) local_unnamed_addr #1
declare i32 @xmlMutexUnlock(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
| reactos_sdk_lib_3rdparty_libxml2_extr_globals.c_xmlThrDefOutputBufferCreateFilenameDefault |
; ModuleID = 'AnghaBench/freebsd/lib/libthread_db/extr_libthr_db.c_pt_dbsuspend.c'
source_filename = "AnghaBench/freebsd/lib/libthread_db/extr_libthr_db.c_pt_dbsuspend.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @pt_dbsuspend], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @pt_dbsuspend(ptr noundef %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = tail call i32 (...) @TDBG_FUNC() #2
%6 = tail call i32 @pt_validate(ptr noundef %0) #2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %2
%9 = icmp eq i32 %1, 0
%10 = load i32, ptr %4, align 4, !tbaa !11
%11 = load i32, ptr %0, align 8, !tbaa !13
br i1 %9, label %14, label %12
12: ; preds = %8
%13 = tail call i32 @ps_lstop(i32 noundef %10, i32 noundef %11) #2
br label %16
14: ; preds = %8
%15 = tail call i32 @ps_lcontinue(i32 noundef %10, i32 noundef %11) #2
br label %16
16: ; preds = %14, %12
%17 = phi i32 [ %13, %12 ], [ %15, %14 ]
%18 = tail call i32 @P2T(i32 noundef %17) #2
br label %19
19: ; preds = %2, %16
%20 = phi i32 [ %18, %16 ], [ %6, %2 ]
ret i32 %20
}
declare i32 @TDBG_FUNC(...) local_unnamed_addr #1
declare i32 @pt_validate(ptr noundef) local_unnamed_addr #1
declare i32 @ps_lstop(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ps_lcontinue(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @P2T(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_5__", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"TYPE_6__", !7, i64 0}
!13 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/lib/libthread_db/extr_libthr_db.c_pt_dbsuspend.c'
source_filename = "AnghaBench/freebsd/lib/libthread_db/extr_libthr_db.c_pt_dbsuspend.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pt_dbsuspend], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @pt_dbsuspend(ptr noundef %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = tail call i32 @TDBG_FUNC() #2
%6 = tail call i32 @pt_validate(ptr noundef %0) #2
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %19
8: ; preds = %2
%9 = icmp eq i32 %1, 0
%10 = load i32, ptr %4, align 4, !tbaa !12
%11 = load i32, ptr %0, align 8, !tbaa !14
br i1 %9, label %14, label %12
12: ; preds = %8
%13 = tail call i32 @ps_lstop(i32 noundef %10, i32 noundef %11) #2
br label %16
14: ; preds = %8
%15 = tail call i32 @ps_lcontinue(i32 noundef %10, i32 noundef %11) #2
br label %16
16: ; preds = %14, %12
%17 = phi i32 [ %13, %12 ], [ %15, %14 ]
%18 = tail call i32 @P2T(i32 noundef %17) #2
br label %19
19: ; preds = %2, %16
%20 = phi i32 [ %18, %16 ], [ %6, %2 ]
ret i32 %20
}
declare i32 @TDBG_FUNC(...) local_unnamed_addr #1
declare i32 @pt_validate(ptr noundef) local_unnamed_addr #1
declare i32 @ps_lstop(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ps_lcontinue(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @P2T(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_5__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"TYPE_6__", !8, i64 0}
!14 = !{!7, !8, i64 0}
| freebsd_lib_libthread_db_extr_libthr_db.c_pt_dbsuspend |
; ModuleID = 'AnghaBench/fastsocket/kernel/kernel/extr_kmod.c_helper_lock.c'
source_filename = "AnghaBench/fastsocket/kernel/kernel/extr_kmod.c_helper_lock.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @helper_lock], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @helper_lock() #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/kernel/extr_kmod.c_helper_lock.c'
source_filename = "AnghaBench/fastsocket/kernel/kernel/extr_kmod.c_helper_lock.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @helper_lock], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @helper_lock() #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_kernel_extr_kmod.c_helper_lock |
; ModuleID = 'AnghaBench/linux/drivers/hid/extr_hid-wiimote-core.c_wiiproto_req_rmem.c'
source_filename = "AnghaBench/linux/drivers/hid/extr_hid-wiimote-core.c_wiiproto_req_rmem.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [32 x i8] c"Invalid length %d rmem request\0A\00", align 1
@WIIPROTO_REQ_RMEM = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @wiiproto_req_rmem(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = alloca [7 x i32], align 16
call void @llvm.lifetime.start.p0(i64 28, ptr nonnull %5) #3
%6 = icmp eq i32 %3, 0
br i1 %6, label %7, label %10
7: ; preds = %4
%8 = load i32, ptr %0, align 4, !tbaa !5
%9 = tail call i32 @hid_warn(i32 noundef %8, ptr noundef nonnull @.str, i32 noundef 0) #3
br label %31
10: ; preds = %4
%11 = load i32, ptr @WIIPROTO_REQ_RMEM, align 4, !tbaa !10
store i32 %11, ptr %5, align 16, !tbaa !10
%12 = getelementptr inbounds [7 x i32], ptr %5, i64 0, i64 1
store i32 0, ptr %12, align 4, !tbaa !10
%13 = lshr i32 %2, 16
%14 = and i32 %13, 255
%15 = getelementptr inbounds [7 x i32], ptr %5, i64 0, i64 2
store i32 %14, ptr %15, align 8, !tbaa !10
%16 = lshr i32 %2, 8
%17 = and i32 %16, 255
%18 = getelementptr inbounds [7 x i32], ptr %5, i64 0, i64 3
store i32 %17, ptr %18, align 4, !tbaa !10
%19 = and i32 %2, 255
%20 = getelementptr inbounds [7 x i32], ptr %5, i64 0, i64 4
store i32 %19, ptr %20, align 16, !tbaa !10
%21 = lshr i32 %3, 8
%22 = and i32 %21, 255
%23 = getelementptr inbounds [7 x i32], ptr %5, i64 0, i64 5
store i32 %22, ptr %23, align 4, !tbaa !10
%24 = and i32 %3, 255
%25 = getelementptr inbounds [7 x i32], ptr %5, i64 0, i64 6
store i32 %24, ptr %25, align 8, !tbaa !10
%26 = icmp eq i32 %1, 0
br i1 %26, label %27, label %28
27: ; preds = %10
store i32 4, ptr %12, align 4, !tbaa !10
br label %28
28: ; preds = %27, %10
%29 = call i32 @wiiproto_keep_rumble(ptr noundef %0, ptr noundef nonnull %12) #3
%30 = call i32 @wiimote_queue(ptr noundef %0, ptr noundef nonnull %5, i32 noundef 28) #3
br label %31
31: ; preds = %28, %7
call void @llvm.lifetime.end.p0(i64 28, ptr nonnull %5) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @hid_warn(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @wiiproto_keep_rumble(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @wiimote_queue(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"wiimote_data", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/hid/extr_hid-wiimote-core.c_wiiproto_req_rmem.c'
source_filename = "AnghaBench/linux/drivers/hid/extr_hid-wiimote-core.c_wiiproto_req_rmem.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [32 x i8] c"Invalid length %d rmem request\0A\00", align 1
@WIIPROTO_REQ_RMEM = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @wiiproto_req_rmem(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = alloca [7 x i32], align 4
call void @llvm.lifetime.start.p0(i64 28, ptr nonnull %5) #3
%6 = icmp eq i32 %3, 0
br i1 %6, label %7, label %10
7: ; preds = %4
%8 = load i32, ptr %0, align 4, !tbaa !6
%9 = tail call i32 @hid_warn(i32 noundef %8, ptr noundef nonnull @.str, i32 noundef 0) #3
br label %30
10: ; preds = %4
%11 = load i32, ptr @WIIPROTO_REQ_RMEM, align 4, !tbaa !11
store i32 %11, ptr %5, align 4, !tbaa !11
%12 = getelementptr inbounds i8, ptr %5, i64 4
store i32 0, ptr %12, align 4, !tbaa !11
%13 = insertelement <2 x i32> poison, i32 %2, i64 0
%14 = shufflevector <2 x i32> %13, <2 x i32> poison, <2 x i32> zeroinitializer
%15 = lshr <2 x i32> %14, <i32 16, i32 8>
%16 = getelementptr inbounds i8, ptr %5, i64 8
%17 = and <2 x i32> %15, <i32 255, i32 255>
store <2 x i32> %17, ptr %16, align 4, !tbaa !11
%18 = and i32 %2, 255
%19 = getelementptr inbounds i8, ptr %5, i64 16
store i32 %18, ptr %19, align 4, !tbaa !11
%20 = lshr i32 %3, 8
%21 = and i32 %20, 255
%22 = getelementptr inbounds i8, ptr %5, i64 20
store i32 %21, ptr %22, align 4, !tbaa !11
%23 = and i32 %3, 255
%24 = getelementptr inbounds i8, ptr %5, i64 24
store i32 %23, ptr %24, align 4, !tbaa !11
%25 = icmp eq i32 %1, 0
br i1 %25, label %26, label %27
26: ; preds = %10
store i32 4, ptr %12, align 4, !tbaa !11
br label %27
27: ; preds = %26, %10
%28 = call i32 @wiiproto_keep_rumble(ptr noundef %0, ptr noundef nonnull %12) #3
%29 = call i32 @wiimote_queue(ptr noundef %0, ptr noundef nonnull %5, i32 noundef 28) #3
br label %30
30: ; preds = %27, %7
call void @llvm.lifetime.end.p0(i64 28, ptr nonnull %5) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @hid_warn(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @wiiproto_keep_rumble(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @wiimote_queue(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"wiimote_data", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| linux_drivers_hid_extr_hid-wiimote-core.c_wiiproto_req_rmem |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/extr_scsi_tgt_if.c_scsi_tgt_if_init.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/extr_scsi_tgt_if.c_scsi_tgt_if_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@tx_ring = dso_local global i32 0, align 4
@rx_ring = dso_local global i32 0, align 4
@tgt_miscdev = dso_local global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @scsi_tgt_if_init() local_unnamed_addr #0 {
%1 = tail call i32 @tgt_ring_init(ptr noundef nonnull @tx_ring) #2
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %14
3: ; preds = %0
%4 = tail call i32 @tgt_ring_init(ptr noundef nonnull @rx_ring) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = tail call i32 @misc_register(ptr noundef nonnull @tgt_miscdev) #2
%8 = icmp eq i32 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %6
%10 = tail call i32 @tgt_ring_exit(ptr noundef nonnull @rx_ring) #2
br label %11
11: ; preds = %3, %9
%12 = phi i32 [ %4, %3 ], [ %7, %9 ]
%13 = tail call i32 @tgt_ring_exit(ptr noundef nonnull @tx_ring) #2
br label %14
14: ; preds = %6, %0, %11
%15 = phi i32 [ %12, %11 ], [ %1, %0 ], [ 0, %6 ]
ret i32 %15
}
declare i32 @tgt_ring_init(ptr noundef) local_unnamed_addr #1
declare i32 @misc_register(ptr noundef) local_unnamed_addr #1
declare i32 @tgt_ring_exit(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/extr_scsi_tgt_if.c_scsi_tgt_if_init.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/extr_scsi_tgt_if.c_scsi_tgt_if_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@tx_ring = common global i32 0, align 4
@rx_ring = common global i32 0, align 4
@tgt_miscdev = common global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @scsi_tgt_if_init() local_unnamed_addr #0 {
%1 = tail call i32 @tgt_ring_init(ptr noundef nonnull @tx_ring) #2
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %14
3: ; preds = %0
%4 = tail call i32 @tgt_ring_init(ptr noundef nonnull @rx_ring) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %11
6: ; preds = %3
%7 = tail call i32 @misc_register(ptr noundef nonnull @tgt_miscdev) #2
%8 = icmp eq i32 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %6
%10 = tail call i32 @tgt_ring_exit(ptr noundef nonnull @rx_ring) #2
br label %11
11: ; preds = %3, %9
%12 = phi i32 [ %4, %3 ], [ %7, %9 ]
%13 = tail call i32 @tgt_ring_exit(ptr noundef nonnull @tx_ring) #2
br label %14
14: ; preds = %6, %0, %11
%15 = phi i32 [ %12, %11 ], [ %1, %0 ], [ 0, %6 ]
ret i32 %15
}
declare i32 @tgt_ring_init(ptr noundef) local_unnamed_addr #1
declare i32 @misc_register(ptr noundef) local_unnamed_addr #1
declare i32 @tgt_ring_exit(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_scsi_extr_scsi_tgt_if.c_scsi_tgt_if_init |
; ModuleID = 'AnghaBench/fastdfs/storage/trunk_mgr/extr_trunk_shared.c_trunk_file_info_decode.c'
source_filename = "AnghaBench/fastdfs/storage/trunk_mgr/extr_trunk_shared.c_trunk_file_info_decode.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { ptr, ptr, ptr }
@FDFS_TRUNK_FILE_INFO_LEN = dso_local local_unnamed_addr global i32 0, align 4
@g_fdfs_base64_context = dso_local global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @trunk_file_info_decode(ptr noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
%4 = load i32, ptr @FDFS_TRUNK_FILE_INFO_LEN, align 4, !tbaa !5
%5 = zext i32 %4 to i64
%6 = alloca i8, i64 %5, align 16
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%7 = call i32 @base64_decode_auto(ptr noundef nonnull @g_fdfs_base64_context, ptr noundef %0, i32 noundef %4, ptr noundef nonnull %6, ptr noundef nonnull %3) #3
%8 = call ptr @buff2int(ptr noundef nonnull %6) #3
%9 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 2
store ptr %8, ptr %9, align 8, !tbaa !9
%10 = getelementptr inbounds i8, ptr %6, i64 4
%11 = call ptr @buff2int(ptr noundef nonnull %10) #3
%12 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 1
store ptr %11, ptr %12, align 8, !tbaa !12
%13 = getelementptr inbounds i8, ptr %6, i64 8
%14 = call ptr @buff2int(ptr noundef nonnull %13) #3
store ptr %14, ptr %1, align 8, !tbaa !13
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @base64_decode_auto(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @buff2int(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 16}
!10 = !{!"TYPE_3__", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!10, !11, i64 0}
| ; ModuleID = 'AnghaBench/fastdfs/storage/trunk_mgr/extr_trunk_shared.c_trunk_file_info_decode.c'
source_filename = "AnghaBench/fastdfs/storage/trunk_mgr/extr_trunk_shared.c_trunk_file_info_decode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FDFS_TRUNK_FILE_INFO_LEN = common local_unnamed_addr global i32 0, align 4
@g_fdfs_base64_context = common global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @trunk_file_info_decode(ptr noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
%4 = load i32, ptr @FDFS_TRUNK_FILE_INFO_LEN, align 4, !tbaa !6
%5 = zext i32 %4 to i64
%6 = alloca i8, i64 %5, align 1
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%7 = call i32 @base64_decode_auto(ptr noundef nonnull @g_fdfs_base64_context, ptr noundef %0, i32 noundef %4, ptr noundef nonnull %6, ptr noundef nonnull %3) #3
%8 = call ptr @buff2int(ptr noundef nonnull %6) #3
%9 = getelementptr inbounds i8, ptr %1, i64 16
store ptr %8, ptr %9, align 8, !tbaa !10
%10 = getelementptr inbounds i8, ptr %6, i64 4
%11 = call ptr @buff2int(ptr noundef nonnull %10) #3
%12 = getelementptr inbounds i8, ptr %1, i64 8
store ptr %11, ptr %12, align 8, !tbaa !13
%13 = getelementptr inbounds i8, ptr %6, i64 8
%14 = call ptr @buff2int(ptr noundef nonnull %13) #3
store ptr %14, ptr %1, align 8, !tbaa !14
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @base64_decode_auto(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @buff2int(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 16}
!11 = !{!"TYPE_3__", !12, i64 0, !12, i64 8, !12, i64 16}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!11, !12, i64 0}
| fastdfs_storage_trunk_mgr_extr_trunk_shared.c_trunk_file_info_decode |
; ModuleID = 'AnghaBench/reactos/dll/3rdparty/libtiff/extr_tif_aux.c__TIFFMultiply32.c'
source_filename = "AnghaBench/reactos/dll/3rdparty/libtiff/extr_tif_aux.c__TIFFMultiply32.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local i32 @_TIFFMultiply32(ptr nocapture noundef readnone %0, i32 noundef %1, i32 noundef %2, ptr nocapture noundef readnone %3) local_unnamed_addr #0 {
%5 = mul nsw i32 %2, %1
ret i32 %5
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/reactos/dll/3rdparty/libtiff/extr_tif_aux.c__TIFFMultiply32.c'
source_filename = "AnghaBench/reactos/dll/3rdparty/libtiff/extr_tif_aux.c__TIFFMultiply32.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define i32 @_TIFFMultiply32(ptr nocapture noundef readnone %0, i32 noundef %1, i32 noundef %2, ptr nocapture noundef readnone %3) local_unnamed_addr #0 {
%5 = mul nsw i32 %2, %1
ret i32 %5
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| reactos_dll_3rdparty_libtiff_extr_tif_aux.c__TIFFMultiply32 |
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/gdi32/extr_mapping.c_test_isotropic_mapping.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/gdi32/extr_mapping.c_test_isotropic_mapping.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32 }
@MM_ISOTROPIC = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @test_isotropic_mapping], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @test_isotropic_mapping() #0 {
%1 = alloca %struct.TYPE_4__, align 4
%2 = alloca %struct.TYPE_4__, align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%3 = tail call i32 @GetDC(i32 noundef 0) #3
%4 = load i32, ptr @MM_ISOTROPIC, align 4, !tbaa !5
%5 = tail call i32 @SetMapMode(i32 noundef %3, i32 noundef %4) #3
%6 = call i32 @GetWindowExtEx(i32 noundef %3, ptr noundef nonnull %1) #3
%7 = call i32 @GetViewportExtEx(i32 noundef %3, ptr noundef nonnull %2) #3
%8 = load i32, ptr %2, align 4, !tbaa !9
%9 = mul nsw i32 %8, 10
%10 = getelementptr inbounds %struct.TYPE_4__, ptr %2, i64 0, i32 1
%11 = load i32, ptr %10, align 4, !tbaa !11
%12 = mul nsw i32 %11, 10
%13 = call i32 @test_SetViewportExt(i32 noundef %3, i32 noundef %9, i32 noundef %12, i32 noundef %9, i32 noundef %12) #3
%14 = load i32, ptr %1, align 4, !tbaa !9
%15 = getelementptr inbounds %struct.TYPE_4__, ptr %1, i64 0, i32 1
%16 = load i32, ptr %15, align 4, !tbaa !11
%17 = load i32, ptr %2, align 4, !tbaa !9
%18 = mul nsw i32 %17, 10
%19 = load i32, ptr %10, align 4, !tbaa !11
%20 = mul nsw i32 %19, 10
%21 = call i32 @test_SetWindowExt(i32 noundef %3, i32 noundef %14, i32 noundef %16, i32 noundef %18, i32 noundef %20) #3
%22 = load i32, ptr %1, align 4, !tbaa !9
%23 = shl nsw i32 %22, 1
%24 = load i32, ptr %15, align 4, !tbaa !11
%25 = load i32, ptr %2, align 4, !tbaa !9
%26 = mul nsw i32 %25, 10
%27 = load i32, ptr %10, align 4, !tbaa !11
%28 = mul nsw i32 %27, 5
%29 = call i32 @test_SetWindowExt(i32 noundef %3, i32 noundef %23, i32 noundef %24, i32 noundef %26, i32 noundef %28) #3
%30 = load i32, ptr %1, align 4, !tbaa !9
%31 = load i32, ptr %15, align 4, !tbaa !11
%32 = load i32, ptr %2, align 4, !tbaa !9
%33 = mul nsw i32 %32, 5
%34 = load i32, ptr %10, align 4, !tbaa !11
%35 = mul nsw i32 %34, 5
%36 = call i32 @test_SetWindowExt(i32 noundef %3, i32 noundef %30, i32 noundef %31, i32 noundef %33, i32 noundef %35) #3
%37 = load i32, ptr %2, align 4, !tbaa !9
%38 = shl nsw i32 %37, 2
%39 = load i32, ptr %10, align 4, !tbaa !11
%40 = shl nsw i32 %39, 1
%41 = shl nsw i32 %37, 1
%42 = call i32 @test_SetViewportExt(i32 noundef %3, i32 noundef %38, i32 noundef %40, i32 noundef %41, i32 noundef %40) #3
%43 = load i32, ptr %2, align 4, !tbaa !9
%44 = load i32, ptr %10, align 4, !tbaa !11
%45 = shl nsw i32 %44, 1
%46 = call i32 @test_SetViewportExt(i32 noundef %3, i32 noundef %43, i32 noundef %45, i32 noundef %43, i32 noundef %44) #3
%47 = load i32, ptr %2, align 4, !tbaa !9
%48 = shl nsw i32 %47, 1
%49 = load i32, ptr %10, align 4, !tbaa !11
%50 = shl nsw i32 %49, 1
%51 = call i32 @test_SetViewportExt(i32 noundef %3, i32 noundef %48, i32 noundef %50, i32 noundef %48, i32 noundef %50) #3
%52 = load i32, ptr %2, align 4, !tbaa !9
%53 = shl nsw i32 %52, 2
%54 = load i32, ptr %10, align 4, !tbaa !11
%55 = shl nsw i32 %54, 1
%56 = shl nsw i32 %52, 1
%57 = call i32 @test_SetViewportExt(i32 noundef %3, i32 noundef %53, i32 noundef %55, i32 noundef %56, i32 noundef %55) #3
%58 = load i32, ptr %1, align 4, !tbaa !9
%59 = shl nsw i32 %58, 2
%60 = load i32, ptr %15, align 4, !tbaa !11
%61 = shl nsw i32 %60, 1
%62 = load i32, ptr %2, align 4, !tbaa !9
%63 = shl nsw i32 %62, 1
%64 = load i32, ptr %10, align 4, !tbaa !11
%65 = call i32 @test_SetWindowExt(i32 noundef %3, i32 noundef %59, i32 noundef %61, i32 noundef %63, i32 noundef %64) #3
%66 = load i32, ptr %2, align 4, !tbaa !9
%67 = mul nsw i32 %66, -2
%68 = load i32, ptr %10, align 4, !tbaa !11
%69 = mul nsw i32 %68, -4
%70 = sub nsw i32 0, %68
%71 = call i32 @test_SetViewportExt(i32 noundef %3, i32 noundef %67, i32 noundef %69, i32 noundef %67, i32 noundef %70) #3
%72 = load i32, ptr %2, align 4, !tbaa !9
%73 = mul nsw i32 %72, -2
%74 = load i32, ptr %10, align 4, !tbaa !11
%75 = sub nsw i32 0, %74
%76 = call i32 @test_SetViewportExt(i32 noundef %3, i32 noundef %73, i32 noundef %75, i32 noundef %73, i32 noundef %75) #3
%77 = load i32, ptr %1, align 4, !tbaa !9
%78 = mul nsw i32 %77, -4
%79 = load i32, ptr %15, align 4, !tbaa !11
%80 = mul nsw i32 %79, -2
%81 = load i32, ptr %2, align 4, !tbaa !9
%82 = mul nsw i32 %81, -2
%83 = load i32, ptr %10, align 4, !tbaa !11
%84 = sub nsw i32 0, %83
%85 = call i32 @test_SetWindowExt(i32 noundef %3, i32 noundef %78, i32 noundef %80, i32 noundef %82, i32 noundef %84) #3
%86 = load i32, ptr %1, align 4, !tbaa !9
%87 = shl nsw i32 %86, 2
%88 = load i32, ptr %15, align 4, !tbaa !11
%89 = mul nsw i32 %88, -4
%90 = load i32, ptr %2, align 4, !tbaa !9
%91 = sub nsw i32 0, %90
%92 = load i32, ptr %10, align 4, !tbaa !11
%93 = sub nsw i32 0, %92
%94 = call i32 @test_SetWindowExt(i32 noundef %3, i32 noundef %87, i32 noundef %89, i32 noundef %91, i32 noundef %93) #3
%95 = call i32 @ReleaseDC(i32 noundef 0, i32 noundef %3) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @GetDC(i32 noundef) local_unnamed_addr #2
declare i32 @SetMapMode(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @GetWindowExtEx(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @GetViewportExtEx(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @test_SetViewportExt(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @test_SetWindowExt(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ReleaseDC(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_4__", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 4}
| ; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/gdi32/extr_mapping.c_test_isotropic_mapping.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/gdi32/extr_mapping.c_test_isotropic_mapping.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i32, i32 }
@MM_ISOTROPIC = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @test_isotropic_mapping], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @test_isotropic_mapping() #0 {
%1 = alloca %struct.TYPE_4__, align 4
%2 = alloca %struct.TYPE_4__, align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %1) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%3 = tail call i32 @GetDC(i32 noundef 0) #3
%4 = load i32, ptr @MM_ISOTROPIC, align 4, !tbaa !6
%5 = tail call i32 @SetMapMode(i32 noundef %3, i32 noundef %4) #3
%6 = call i32 @GetWindowExtEx(i32 noundef %3, ptr noundef nonnull %1) #3
%7 = call i32 @GetViewportExtEx(i32 noundef %3, ptr noundef nonnull %2) #3
%8 = load i32, ptr %2, align 4, !tbaa !10
%9 = mul nsw i32 %8, 10
%10 = getelementptr inbounds i8, ptr %2, i64 4
%11 = load i32, ptr %10, align 4, !tbaa !12
%12 = mul nsw i32 %11, 10
%13 = call i32 @test_SetViewportExt(i32 noundef %3, i32 noundef %9, i32 noundef %12, i32 noundef %9, i32 noundef %12) #3
%14 = load i32, ptr %1, align 4, !tbaa !10
%15 = getelementptr inbounds i8, ptr %1, i64 4
%16 = load i32, ptr %15, align 4, !tbaa !12
%17 = load i32, ptr %2, align 4, !tbaa !10
%18 = mul nsw i32 %17, 10
%19 = load i32, ptr %10, align 4, !tbaa !12
%20 = mul nsw i32 %19, 10
%21 = call i32 @test_SetWindowExt(i32 noundef %3, i32 noundef %14, i32 noundef %16, i32 noundef %18, i32 noundef %20) #3
%22 = load i32, ptr %1, align 4, !tbaa !10
%23 = shl nsw i32 %22, 1
%24 = load i32, ptr %15, align 4, !tbaa !12
%25 = load i32, ptr %2, align 4, !tbaa !10
%26 = mul nsw i32 %25, 10
%27 = load i32, ptr %10, align 4, !tbaa !12
%28 = mul nsw i32 %27, 5
%29 = call i32 @test_SetWindowExt(i32 noundef %3, i32 noundef %23, i32 noundef %24, i32 noundef %26, i32 noundef %28) #3
%30 = load i32, ptr %1, align 4, !tbaa !10
%31 = load i32, ptr %15, align 4, !tbaa !12
%32 = load i32, ptr %2, align 4, !tbaa !10
%33 = mul nsw i32 %32, 5
%34 = load i32, ptr %10, align 4, !tbaa !12
%35 = mul nsw i32 %34, 5
%36 = call i32 @test_SetWindowExt(i32 noundef %3, i32 noundef %30, i32 noundef %31, i32 noundef %33, i32 noundef %35) #3
%37 = load i32, ptr %2, align 4, !tbaa !10
%38 = shl nsw i32 %37, 2
%39 = load i32, ptr %10, align 4, !tbaa !12
%40 = shl nsw i32 %39, 1
%41 = shl nsw i32 %37, 1
%42 = call i32 @test_SetViewportExt(i32 noundef %3, i32 noundef %38, i32 noundef %40, i32 noundef %41, i32 noundef %40) #3
%43 = load i32, ptr %2, align 4, !tbaa !10
%44 = load i32, ptr %10, align 4, !tbaa !12
%45 = shl nsw i32 %44, 1
%46 = call i32 @test_SetViewportExt(i32 noundef %3, i32 noundef %43, i32 noundef %45, i32 noundef %43, i32 noundef %44) #3
%47 = load i32, ptr %2, align 4, !tbaa !10
%48 = shl nsw i32 %47, 1
%49 = load i32, ptr %10, align 4, !tbaa !12
%50 = shl nsw i32 %49, 1
%51 = call i32 @test_SetViewportExt(i32 noundef %3, i32 noundef %48, i32 noundef %50, i32 noundef %48, i32 noundef %50) #3
%52 = load i32, ptr %2, align 4, !tbaa !10
%53 = shl nsw i32 %52, 2
%54 = load i32, ptr %10, align 4, !tbaa !12
%55 = shl nsw i32 %54, 1
%56 = shl nsw i32 %52, 1
%57 = call i32 @test_SetViewportExt(i32 noundef %3, i32 noundef %53, i32 noundef %55, i32 noundef %56, i32 noundef %55) #3
%58 = load i32, ptr %1, align 4, !tbaa !10
%59 = shl nsw i32 %58, 2
%60 = load i32, ptr %15, align 4, !tbaa !12
%61 = shl nsw i32 %60, 1
%62 = load i32, ptr %2, align 4, !tbaa !10
%63 = shl nsw i32 %62, 1
%64 = load i32, ptr %10, align 4, !tbaa !12
%65 = call i32 @test_SetWindowExt(i32 noundef %3, i32 noundef %59, i32 noundef %61, i32 noundef %63, i32 noundef %64) #3
%66 = load i32, ptr %2, align 4, !tbaa !10
%67 = mul nsw i32 %66, -2
%68 = load i32, ptr %10, align 4, !tbaa !12
%69 = mul nsw i32 %68, -4
%70 = sub nsw i32 0, %68
%71 = call i32 @test_SetViewportExt(i32 noundef %3, i32 noundef %67, i32 noundef %69, i32 noundef %67, i32 noundef %70) #3
%72 = load i32, ptr %2, align 4, !tbaa !10
%73 = mul nsw i32 %72, -2
%74 = load i32, ptr %10, align 4, !tbaa !12
%75 = sub nsw i32 0, %74
%76 = call i32 @test_SetViewportExt(i32 noundef %3, i32 noundef %73, i32 noundef %75, i32 noundef %73, i32 noundef %75) #3
%77 = load i32, ptr %1, align 4, !tbaa !10
%78 = mul nsw i32 %77, -4
%79 = load i32, ptr %15, align 4, !tbaa !12
%80 = mul nsw i32 %79, -2
%81 = load i32, ptr %2, align 4, !tbaa !10
%82 = mul nsw i32 %81, -2
%83 = load i32, ptr %10, align 4, !tbaa !12
%84 = sub nsw i32 0, %83
%85 = call i32 @test_SetWindowExt(i32 noundef %3, i32 noundef %78, i32 noundef %80, i32 noundef %82, i32 noundef %84) #3
%86 = load i32, ptr %1, align 4, !tbaa !10
%87 = shl nsw i32 %86, 2
%88 = load i32, ptr %15, align 4, !tbaa !12
%89 = mul nsw i32 %88, -4
%90 = load i32, ptr %2, align 4, !tbaa !10
%91 = sub nsw i32 0, %90
%92 = load i32, ptr %10, align 4, !tbaa !12
%93 = sub nsw i32 0, %92
%94 = call i32 @test_SetWindowExt(i32 noundef %3, i32 noundef %87, i32 noundef %89, i32 noundef %91, i32 noundef %93) #3
%95 = call i32 @ReleaseDC(i32 noundef 0, i32 noundef %3) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @GetDC(i32 noundef) local_unnamed_addr #2
declare i32 @SetMapMode(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @GetWindowExtEx(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @GetViewportExtEx(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @test_SetViewportExt(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @test_SetWindowExt(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ReleaseDC(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 4}
| reactos_modules_rostests_winetests_gdi32_extr_mapping.c_test_isotropic_mapping |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/ixgbe/extr_ixgbe_mbx.c_ixgbe_obtain_mbx_lock_pf.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/ixgbe/extr_ixgbe_mbx.c_ixgbe_obtain_mbx_lock_pf.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@IXGBE_ERR_MBX = dso_local local_unnamed_addr global i64 0, align 8
@IXGBE_PFMAILBOX_PFU = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ixgbe_obtain_mbx_lock_pf], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @ixgbe_obtain_mbx_lock_pf(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i64, ptr @IXGBE_ERR_MBX, align 8, !tbaa !5
%4 = tail call i32 @IXGBE_PFMAILBOX(i32 noundef %1) #2
%5 = load i32, ptr @IXGBE_PFMAILBOX_PFU, align 4, !tbaa !9
%6 = tail call i32 @IXGBE_WRITE_REG(ptr noundef %0, i32 noundef %4, i32 noundef %5) #2
%7 = tail call i32 @IXGBE_PFMAILBOX(i32 noundef %1) #2
%8 = tail call i32 @IXGBE_READ_REG(ptr noundef %0, i32 noundef %7) #2
%9 = load i32, ptr @IXGBE_PFMAILBOX_PFU, align 4, !tbaa !9
%10 = and i32 %9, %8
%11 = icmp eq i32 %10, 0
%12 = select i1 %11, i64 %3, i64 0
ret i64 %12
}
declare i32 @IXGBE_WRITE_REG(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @IXGBE_PFMAILBOX(i32 noundef) local_unnamed_addr #1
declare i32 @IXGBE_READ_REG(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/ixgbe/extr_ixgbe_mbx.c_ixgbe_obtain_mbx_lock_pf.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/ixgbe/extr_ixgbe_mbx.c_ixgbe_obtain_mbx_lock_pf.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IXGBE_ERR_MBX = common local_unnamed_addr global i64 0, align 8
@IXGBE_PFMAILBOX_PFU = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ixgbe_obtain_mbx_lock_pf], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @ixgbe_obtain_mbx_lock_pf(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i64, ptr @IXGBE_ERR_MBX, align 8, !tbaa !6
%4 = tail call i32 @IXGBE_PFMAILBOX(i32 noundef %1) #2
%5 = load i32, ptr @IXGBE_PFMAILBOX_PFU, align 4, !tbaa !10
%6 = tail call i32 @IXGBE_WRITE_REG(ptr noundef %0, i32 noundef %4, i32 noundef %5) #2
%7 = tail call i32 @IXGBE_PFMAILBOX(i32 noundef %1) #2
%8 = tail call i32 @IXGBE_READ_REG(ptr noundef %0, i32 noundef %7) #2
%9 = load i32, ptr @IXGBE_PFMAILBOX_PFU, align 4, !tbaa !10
%10 = and i32 %9, %8
%11 = icmp eq i32 %10, 0
%12 = select i1 %11, i64 %3, i64 0
ret i64 %12
}
declare i32 @IXGBE_WRITE_REG(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @IXGBE_PFMAILBOX(i32 noundef) local_unnamed_addr #1
declare i32 @IXGBE_READ_REG(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| fastsocket_kernel_drivers_net_ixgbe_extr_ixgbe_mbx.c_ixgbe_obtain_mbx_lock_pf |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_ar9002_phy.c_ar9002_hw_set_channel.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_ar9002_phy.c_ar9002_hw_set_channel.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.chan_centers = type { i32 }
%struct.ath_hw = type { ptr, ptr, i32, i32 }
@AR_PHY_SYNTH_CONTROL = dso_local local_unnamed_addr global i32 0, align 4
@AR_PHY_CCK_TX_CTRL = dso_local local_unnamed_addr global i32 0, align 4
@AR_PHY_CCK_TX_CTRL_JAPAN = dso_local local_unnamed_addr global i32 0, align 4
@EEP_FRAC_N_5G = dso_local local_unnamed_addr global i32 0, align 4
@AR_AN_SYNTH9 = dso_local local_unnamed_addr global i32 0, align 4
@AR_AN_SYNTH9_REFDIVA = dso_local local_unnamed_addr global i32 0, align 4
@AR_AN_SYNTH9_REFDIVA_S = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ar9002_hw_set_channel], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @ar9002_hw_set_channel(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca %struct.chan_centers, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = call i32 @ath9k_hw_get_channel_centers(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %3) #3
%5 = load i32, ptr %3, align 4, !tbaa !5
%6 = load i32, ptr @AR_PHY_SYNTH_CONTROL, align 4, !tbaa !10
%7 = call i32 @REG_READ(ptr noundef %0, i32 noundef %6) #3
%8 = icmp slt i32 %5, 4800
br i1 %8, label %9, label %34
9: ; preds = %2
%10 = call i32 @CHANSEL_2G(i32 noundef %5) #3
%11 = call i64 @AR_SREV_9287_11_OR_LATER(ptr noundef %0) #3
%12 = icmp eq i64 %11, 0
br i1 %12, label %21, label %13
13: ; preds = %9
%14 = icmp eq i32 %5, 2484
br i1 %14, label %15, label %18
15: ; preds = %13
%16 = getelementptr inbounds %struct.ath_hw, ptr %0, i64 0, i32 3
%17 = call i32 @REG_WRITE_ARRAY(ptr noundef nonnull %16, i32 noundef 1, i32 noundef 0) #3
br label %70
18: ; preds = %13
%19 = getelementptr inbounds %struct.ath_hw, ptr %0, i64 0, i32 2
%20 = call i32 @REG_WRITE_ARRAY(ptr noundef nonnull %19, i32 noundef 1, i32 noundef 0) #3
br label %70
21: ; preds = %9
%22 = load i32, ptr @AR_PHY_CCK_TX_CTRL, align 4, !tbaa !10
%23 = call i32 @REG_READ(ptr noundef %0, i32 noundef %22) #3
%24 = icmp eq i32 %5, 2484
%25 = load i32, ptr @AR_PHY_CCK_TX_CTRL, align 4, !tbaa !10
%26 = load i32, ptr @AR_PHY_CCK_TX_CTRL_JAPAN, align 4, !tbaa !10
br i1 %24, label %27, label %30
27: ; preds = %21
%28 = or i32 %26, %23
%29 = call i32 @REG_WRITE(ptr noundef %0, i32 noundef %25, i32 noundef %28) #3
br label %70
30: ; preds = %21
%31 = xor i32 %26, -1
%32 = and i32 %23, %31
%33 = call i32 @REG_WRITE(ptr noundef %0, i32 noundef %25, i32 noundef %32) #3
br label %70
34: ; preds = %2
%35 = getelementptr inbounds %struct.ath_hw, ptr %0, i64 0, i32 1
%36 = load ptr, ptr %35, align 8, !tbaa !11
%37 = load ptr, ptr %36, align 8, !tbaa !14
%38 = load i32, ptr @EEP_FRAC_N_5G, align 4, !tbaa !10
%39 = call i32 %37(ptr noundef %0, i32 noundef %38) #3
%40 = icmp eq i32 %39, 0
br i1 %40, label %41, label %53
41: ; preds = %34
%42 = call i32 @IS_CHAN_HALF_RATE(ptr noundef %1) #3
%43 = icmp eq i32 %42, 0
br i1 %43, label %44, label %53
44: ; preds = %41
%45 = call i32 @IS_CHAN_QUARTER_RATE(ptr noundef %1) #3
%46 = icmp eq i32 %45, 0
br i1 %46, label %47, label %53
47: ; preds = %44
%48 = urem i32 %5, 20
%49 = icmp eq i32 %48, 0
br i1 %49, label %59, label %50
50: ; preds = %47
%51 = urem i32 %5, 10
%52 = icmp eq i32 %51, 0
br i1 %52, label %59, label %53
53: ; preds = %41, %44, %50, %34
%54 = call i32 @CHANSEL_5G(i32 noundef %5) #3
%55 = load i32, ptr @AR_AN_SYNTH9, align 4, !tbaa !10
%56 = load i32, ptr @AR_AN_SYNTH9_REFDIVA, align 4, !tbaa !10
%57 = load i32, ptr @AR_AN_SYNTH9_REFDIVA_S, align 4, !tbaa !10
%58 = call i32 @ath9k_hw_analog_shift_rmw(ptr noundef nonnull %0, i32 noundef %55, i32 noundef %56, i32 noundef %57, i32 noundef 1) #3
br label %70
59: ; preds = %47, %50
%60 = phi i32 [ 2, %50 ], [ 3, %47 ]
%61 = lshr exact i32 24, %60
%62 = mul nsw i32 %61, %5
%63 = udiv i32 %62, 60
%64 = shl nuw nsw i32 %63, 1
%65 = and i32 %64, 134216704
%66 = shl i32 %63, 17
%67 = and i32 %66, 66977792
%68 = or i32 %67, %65
%69 = shl nuw nsw i32 %60, 26
br label %70
70: ; preds = %53, %18, %15, %30, %27, %59
%71 = phi i32 [ 0, %53 ], [ %69, %59 ], [ 0, %27 ], [ 0, %30 ], [ 0, %15 ], [ 0, %18 ]
%72 = phi i32 [ %54, %53 ], [ %68, %59 ], [ %10, %27 ], [ %10, %30 ], [ %10, %15 ], [ %10, %18 ]
%73 = phi i32 [ 268435456, %53 ], [ 0, %59 ], [ 268435456, %27 ], [ 268435456, %30 ], [ 268435456, %15 ], [ 268435456, %18 ]
%74 = phi i32 [ 0, %53 ], [ 0, %59 ], [ 536870912, %27 ], [ 536870912, %30 ], [ 536870912, %15 ], [ 536870912, %18 ]
%75 = and i32 %7, -1073741824
%76 = or i32 %71, %75
%77 = or i32 %76, %72
%78 = or i32 %77, %73
%79 = or i32 %78, %74
%80 = load i32, ptr @AR_PHY_SYNTH_CONTROL, align 4, !tbaa !10
%81 = call i32 @REG_WRITE(ptr noundef %0, i32 noundef %80, i32 noundef %79) #3
store ptr %1, ptr %0, align 8, !tbaa !16
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ath9k_hw_get_channel_centers(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @REG_READ(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @CHANSEL_2G(i32 noundef) local_unnamed_addr #2
declare i64 @AR_SREV_9287_11_OR_LATER(ptr noundef) local_unnamed_addr #2
declare i32 @REG_WRITE_ARRAY(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @REG_WRITE(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @IS_CHAN_HALF_RATE(ptr noundef) local_unnamed_addr #2
declare i32 @IS_CHAN_QUARTER_RATE(ptr noundef) local_unnamed_addr #2
declare i32 @CHANSEL_5G(i32 noundef) local_unnamed_addr #2
declare i32 @ath9k_hw_analog_shift_rmw(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"chan_centers", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !13, i64 8}
!12 = !{!"ath_hw", !13, i64 0, !13, i64 8, !7, i64 16, !7, i64 20}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"TYPE_2__", !13, i64 0}
!16 = !{!12, !13, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_ar9002_phy.c_ar9002_hw_set_channel.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_ar9002_phy.c_ar9002_hw_set_channel.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.chan_centers = type { i32 }
@AR_PHY_SYNTH_CONTROL = common local_unnamed_addr global i32 0, align 4
@AR_PHY_CCK_TX_CTRL = common local_unnamed_addr global i32 0, align 4
@AR_PHY_CCK_TX_CTRL_JAPAN = common local_unnamed_addr global i32 0, align 4
@EEP_FRAC_N_5G = common local_unnamed_addr global i32 0, align 4
@AR_AN_SYNTH9 = common local_unnamed_addr global i32 0, align 4
@AR_AN_SYNTH9_REFDIVA = common local_unnamed_addr global i32 0, align 4
@AR_AN_SYNTH9_REFDIVA_S = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ar9002_hw_set_channel], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @ar9002_hw_set_channel(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca %struct.chan_centers, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = call i32 @ath9k_hw_get_channel_centers(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %3) #3
%5 = load i32, ptr %3, align 4, !tbaa !6
%6 = load i32, ptr @AR_PHY_SYNTH_CONTROL, align 4, !tbaa !11
%7 = call i32 @REG_READ(ptr noundef %0, i32 noundef %6) #3
%8 = icmp slt i32 %5, 4800
br i1 %8, label %9, label %34
9: ; preds = %2
%10 = call i32 @CHANSEL_2G(i32 noundef %5) #3
%11 = call i64 @AR_SREV_9287_11_OR_LATER(ptr noundef %0) #3
%12 = icmp eq i64 %11, 0
br i1 %12, label %21, label %13
13: ; preds = %9
%14 = icmp eq i32 %5, 2484
br i1 %14, label %15, label %18
15: ; preds = %13
%16 = getelementptr inbounds i8, ptr %0, i64 20
%17 = call i32 @REG_WRITE_ARRAY(ptr noundef nonnull %16, i32 noundef 1, i32 noundef 0) #3
br label %70
18: ; preds = %13
%19 = getelementptr inbounds i8, ptr %0, i64 16
%20 = call i32 @REG_WRITE_ARRAY(ptr noundef nonnull %19, i32 noundef 1, i32 noundef 0) #3
br label %70
21: ; preds = %9
%22 = load i32, ptr @AR_PHY_CCK_TX_CTRL, align 4, !tbaa !11
%23 = call i32 @REG_READ(ptr noundef %0, i32 noundef %22) #3
%24 = icmp eq i32 %5, 2484
%25 = load i32, ptr @AR_PHY_CCK_TX_CTRL, align 4, !tbaa !11
%26 = load i32, ptr @AR_PHY_CCK_TX_CTRL_JAPAN, align 4, !tbaa !11
br i1 %24, label %27, label %30
27: ; preds = %21
%28 = or i32 %26, %23
%29 = call i32 @REG_WRITE(ptr noundef %0, i32 noundef %25, i32 noundef %28) #3
br label %70
30: ; preds = %21
%31 = xor i32 %26, -1
%32 = and i32 %23, %31
%33 = call i32 @REG_WRITE(ptr noundef %0, i32 noundef %25, i32 noundef %32) #3
br label %70
34: ; preds = %2
%35 = getelementptr inbounds i8, ptr %0, i64 8
%36 = load ptr, ptr %35, align 8, !tbaa !12
%37 = load ptr, ptr %36, align 8, !tbaa !15
%38 = load i32, ptr @EEP_FRAC_N_5G, align 4, !tbaa !11
%39 = call i32 %37(ptr noundef %0, i32 noundef %38) #3
%40 = icmp eq i32 %39, 0
br i1 %40, label %41, label %53
41: ; preds = %34
%42 = call i32 @IS_CHAN_HALF_RATE(ptr noundef %1) #3
%43 = icmp eq i32 %42, 0
br i1 %43, label %44, label %53
44: ; preds = %41
%45 = call i32 @IS_CHAN_QUARTER_RATE(ptr noundef %1) #3
%46 = icmp eq i32 %45, 0
br i1 %46, label %47, label %53
47: ; preds = %44
%48 = urem i32 %5, 20
%49 = icmp eq i32 %48, 0
br i1 %49, label %59, label %50
50: ; preds = %47
%51 = urem i32 %5, 10
%52 = icmp eq i32 %51, 0
br i1 %52, label %59, label %53
53: ; preds = %41, %44, %50, %34
%54 = call i32 @CHANSEL_5G(i32 noundef %5) #3
%55 = load i32, ptr @AR_AN_SYNTH9, align 4, !tbaa !11
%56 = load i32, ptr @AR_AN_SYNTH9_REFDIVA, align 4, !tbaa !11
%57 = load i32, ptr @AR_AN_SYNTH9_REFDIVA_S, align 4, !tbaa !11
%58 = call i32 @ath9k_hw_analog_shift_rmw(ptr noundef nonnull %0, i32 noundef %55, i32 noundef %56, i32 noundef %57, i32 noundef 1) #3
br label %70
59: ; preds = %47, %50
%60 = phi i32 [ 2, %50 ], [ 3, %47 ]
%61 = lshr exact i32 24, %60
%62 = mul nuw nsw i32 %61, %5
%63 = udiv i32 %62, 60
%64 = shl nuw nsw i32 %63, 1
%65 = and i32 %64, 134216704
%66 = shl i32 %63, 17
%67 = and i32 %66, 66977792
%68 = or i32 %67, %65
%69 = shl nuw nsw i32 %60, 26
br label %70
70: ; preds = %53, %18, %15, %30, %27, %59
%71 = phi i32 [ 0, %53 ], [ %69, %59 ], [ 0, %27 ], [ 0, %30 ], [ 0, %15 ], [ 0, %18 ]
%72 = phi i32 [ %54, %53 ], [ %68, %59 ], [ %10, %27 ], [ %10, %30 ], [ %10, %15 ], [ %10, %18 ]
%73 = phi i32 [ 268435456, %53 ], [ 0, %59 ], [ 268435456, %27 ], [ 268435456, %30 ], [ 268435456, %15 ], [ 268435456, %18 ]
%74 = phi i32 [ 0, %53 ], [ 0, %59 ], [ 536870912, %27 ], [ 536870912, %30 ], [ 536870912, %15 ], [ 536870912, %18 ]
%75 = and i32 %7, -1073741824
%76 = or i32 %71, %75
%77 = or i32 %76, %72
%78 = or i32 %77, %73
%79 = or i32 %78, %74
%80 = load i32, ptr @AR_PHY_SYNTH_CONTROL, align 4, !tbaa !11
%81 = call i32 @REG_WRITE(ptr noundef %0, i32 noundef %80, i32 noundef %79) #3
store ptr %1, ptr %0, align 8, !tbaa !17
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @ath9k_hw_get_channel_centers(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @REG_READ(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @CHANSEL_2G(i32 noundef) local_unnamed_addr #2
declare i64 @AR_SREV_9287_11_OR_LATER(ptr noundef) local_unnamed_addr #2
declare i32 @REG_WRITE_ARRAY(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @REG_WRITE(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @IS_CHAN_HALF_RATE(ptr noundef) local_unnamed_addr #2
declare i32 @IS_CHAN_QUARTER_RATE(ptr noundef) local_unnamed_addr #2
declare i32 @CHANSEL_5G(i32 noundef) local_unnamed_addr #2
declare i32 @ath9k_hw_analog_shift_rmw(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"chan_centers", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !14, i64 8}
!13 = !{!"ath_hw", !14, i64 0, !14, i64 8, !8, i64 16, !8, i64 20}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"TYPE_2__", !14, i64 0}
!17 = !{!13, !14, i64 0}
| linux_drivers_net_wireless_ath_ath9k_extr_ar9002_phy.c_ar9002_hw_set_channel |
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_intrax8.c_x8_update_predictions.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_intrax8.c_x8_update_predictions.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { ptr, i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @x8_update_predictions], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable
define internal void @x8_update_predictions(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = shl i32 %2, 2
%5 = icmp eq i32 %1, 4
%6 = zext i1 %5 to i32
%7 = or disjoint i32 %4, %6
%8 = icmp eq i32 %1, 8
%9 = select i1 %8, i32 2, i32 0
%10 = or disjoint i32 %7, %9
%11 = load ptr, ptr %0, align 8, !tbaa !5
%12 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%13 = load i32, ptr %12, align 8, !tbaa !11
%14 = shl nsw i32 %13, 1
%15 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
%16 = load i32, ptr %15, align 4, !tbaa !12
%17 = and i32 %16, 1
%18 = or disjoint i32 %17, %14
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, ptr %11, i64 %19
store i32 %10, ptr %20, align 4, !tbaa !13
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8, !10, i64 12}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!6, !10, i64 12}
!13 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_intrax8.c_x8_update_predictions.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_intrax8.c_x8_update_predictions.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @x8_update_predictions], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @x8_update_predictions(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = shl i32 %2, 2
%5 = icmp eq i32 %1, 4
%6 = zext i1 %5 to i32
%7 = or disjoint i32 %4, %6
%8 = icmp eq i32 %1, 8
%9 = select i1 %8, i32 2, i32 0
%10 = or disjoint i32 %7, %9
%11 = load ptr, ptr %0, align 8, !tbaa !6
%12 = getelementptr inbounds i8, ptr %0, i64 8
%13 = load i32, ptr %12, align 8, !tbaa !12
%14 = shl nsw i32 %13, 1
%15 = getelementptr inbounds i8, ptr %0, i64 12
%16 = load i32, ptr %15, align 4, !tbaa !13
%17 = and i32 %16, 1
%18 = or disjoint i32 %17, %14
%19 = sext i32 %18 to i64
%20 = getelementptr inbounds i32, ptr %11, i64 %19
store i32 %10, ptr %20, align 4, !tbaa !14
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8, !11, i64 12}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!7, !11, i64 12}
!14 = !{!11, !11, i64 0}
| FFmpeg_libavcodec_extr_intrax8.c_x8_update_predictions |
; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_w83627hf.c_alarms_show.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_w83627hf.c_alarms_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [5 x i8] c"%ld\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @alarms_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @alarms_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @w83627hf_update_device(ptr noundef %0) #2
%5 = load i64, ptr %4, align 8, !tbaa !5
%6 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, i64 noundef %5) #2
ret i32 %6
}
declare ptr @w83627hf_update_device(ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"w83627hf_data", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/hwmon/extr_w83627hf.c_alarms_show.c'
source_filename = "AnghaBench/linux/drivers/hwmon/extr_w83627hf.c_alarms_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [5 x i8] c"%ld\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @alarms_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @alarms_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @w83627hf_update_device(ptr noundef %0) #2
%5 = load i64, ptr %4, align 8, !tbaa !6
%6 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, i64 noundef %5) #2
ret i32 %6
}
declare ptr @w83627hf_update_device(ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"w83627hf_data", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_hwmon_extr_w83627hf.c_alarms_show |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/en/extr_port.c_mlx5e_get_fec_cap_field.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/en/extr_port.c_mlx5e_get_fec_cap_field.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@pplm_reg = dso_local local_unnamed_addr global i32 0, align 4
@fec_override_cap_10g_40g = dso_local local_unnamed_addr global i32 0, align 4
@fec_override_cap_25g = dso_local local_unnamed_addr global i32 0, align 4
@fec_override_cap_50g = dso_local local_unnamed_addr global i32 0, align 4
@fec_override_cap_56g = dso_local local_unnamed_addr global i32 0, align 4
@fec_override_cap_100g = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @mlx5e_get_fec_cap_field], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mlx5e_get_fec_cap_field(ptr noundef %0, ptr nocapture noundef writeonly %1, i32 noundef %2) #0 {
switch i32 %2, label %24 [
i32 10000, label %4
i32 40000, label %4
i32 25000, label %8
i32 50000, label %12
i32 56000, label %16
i32 100000, label %20
]
4: ; preds = %3, %3
%5 = load i32, ptr @pplm_reg, align 4, !tbaa !5
%6 = load i32, ptr @fec_override_cap_10g_40g, align 4, !tbaa !5
%7 = tail call i32 @MLX5_GET(i32 noundef %5, ptr noundef %0, i32 noundef %6) #2
store i32 %7, ptr %1, align 4, !tbaa !5
br label %27
8: ; preds = %3
%9 = load i32, ptr @pplm_reg, align 4, !tbaa !5
%10 = load i32, ptr @fec_override_cap_25g, align 4, !tbaa !5
%11 = tail call i32 @MLX5_GET(i32 noundef %9, ptr noundef %0, i32 noundef %10) #2
store i32 %11, ptr %1, align 4, !tbaa !5
br label %27
12: ; preds = %3
%13 = load i32, ptr @pplm_reg, align 4, !tbaa !5
%14 = load i32, ptr @fec_override_cap_50g, align 4, !tbaa !5
%15 = tail call i32 @MLX5_GET(i32 noundef %13, ptr noundef %0, i32 noundef %14) #2
store i32 %15, ptr %1, align 4, !tbaa !5
br label %27
16: ; preds = %3
%17 = load i32, ptr @pplm_reg, align 4, !tbaa !5
%18 = load i32, ptr @fec_override_cap_56g, align 4, !tbaa !5
%19 = tail call i32 @MLX5_GET(i32 noundef %17, ptr noundef %0, i32 noundef %18) #2
store i32 %19, ptr %1, align 4, !tbaa !5
br label %27
20: ; preds = %3
%21 = load i32, ptr @pplm_reg, align 4, !tbaa !5
%22 = load i32, ptr @fec_override_cap_100g, align 4, !tbaa !5
%23 = tail call i32 @MLX5_GET(i32 noundef %21, ptr noundef %0, i32 noundef %22) #2
store i32 %23, ptr %1, align 4, !tbaa !5
br label %27
24: ; preds = %3
%25 = load i32, ptr @EINVAL, align 4, !tbaa !5
%26 = sub nsw i32 0, %25
br label %27
27: ; preds = %4, %8, %12, %16, %20, %24
%28 = phi i32 [ %26, %24 ], [ 0, %20 ], [ 0, %16 ], [ 0, %12 ], [ 0, %8 ], [ 0, %4 ]
ret i32 %28
}
declare i32 @MLX5_GET(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/en/extr_port.c_mlx5e_get_fec_cap_field.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx5/core/en/extr_port.c_mlx5e_get_fec_cap_field.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@pplm_reg = common local_unnamed_addr global i32 0, align 4
@fec_override_cap_10g_40g = common local_unnamed_addr global i32 0, align 4
@fec_override_cap_25g = common local_unnamed_addr global i32 0, align 4
@fec_override_cap_50g = common local_unnamed_addr global i32 0, align 4
@fec_override_cap_56g = common local_unnamed_addr global i32 0, align 4
@fec_override_cap_100g = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mlx5e_get_fec_cap_field], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @mlx5e_get_fec_cap_field(ptr noundef %0, ptr nocapture noundef writeonly %1, i32 noundef %2) #0 {
switch i32 %2, label %24 [
i32 10000, label %4
i32 40000, label %4
i32 25000, label %8
i32 50000, label %12
i32 56000, label %16
i32 100000, label %20
]
4: ; preds = %3, %3
%5 = load i32, ptr @pplm_reg, align 4, !tbaa !6
%6 = load i32, ptr @fec_override_cap_10g_40g, align 4, !tbaa !6
%7 = tail call i32 @MLX5_GET(i32 noundef %5, ptr noundef %0, i32 noundef %6) #2
store i32 %7, ptr %1, align 4, !tbaa !6
br label %27
8: ; preds = %3
%9 = load i32, ptr @pplm_reg, align 4, !tbaa !6
%10 = load i32, ptr @fec_override_cap_25g, align 4, !tbaa !6
%11 = tail call i32 @MLX5_GET(i32 noundef %9, ptr noundef %0, i32 noundef %10) #2
store i32 %11, ptr %1, align 4, !tbaa !6
br label %27
12: ; preds = %3
%13 = load i32, ptr @pplm_reg, align 4, !tbaa !6
%14 = load i32, ptr @fec_override_cap_50g, align 4, !tbaa !6
%15 = tail call i32 @MLX5_GET(i32 noundef %13, ptr noundef %0, i32 noundef %14) #2
store i32 %15, ptr %1, align 4, !tbaa !6
br label %27
16: ; preds = %3
%17 = load i32, ptr @pplm_reg, align 4, !tbaa !6
%18 = load i32, ptr @fec_override_cap_56g, align 4, !tbaa !6
%19 = tail call i32 @MLX5_GET(i32 noundef %17, ptr noundef %0, i32 noundef %18) #2
store i32 %19, ptr %1, align 4, !tbaa !6
br label %27
20: ; preds = %3
%21 = load i32, ptr @pplm_reg, align 4, !tbaa !6
%22 = load i32, ptr @fec_override_cap_100g, align 4, !tbaa !6
%23 = tail call i32 @MLX5_GET(i32 noundef %21, ptr noundef %0, i32 noundef %22) #2
store i32 %23, ptr %1, align 4, !tbaa !6
br label %27
24: ; preds = %3
%25 = load i32, ptr @EINVAL, align 4, !tbaa !6
%26 = sub nsw i32 0, %25
br label %27
27: ; preds = %4, %8, %12, %16, %20, %24
%28 = phi i32 [ %26, %24 ], [ 0, %20 ], [ 0, %16 ], [ 0, %12 ], [ 0, %8 ], [ 0, %4 ]
ret i32 %28
}
declare i32 @MLX5_GET(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_net_ethernet_mellanox_mlx5_core_en_extr_port.c_mlx5e_get_fec_cap_field |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_link.c_bnx2x_set_xgxs_loopback.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_link.c_bnx2x_set_xgxs_loopback.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.link_params = type { i32, ptr }
@SPEED_1000 = dso_local local_unnamed_addr global i64 0, align 8
@NETIF_MSG_LINK = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [26 x i8] c"XGXS 10G loopback enable\0A\00", align 1
@NIG_REG_XGXS0_CTRL_MD_DEVAD = dso_local local_unnamed_addr global i64 0, align 8
@MDIO_REG_BANK_AER_BLOCK = dso_local local_unnamed_addr global i64 0, align 8
@MDIO_AER_BLOCK_AER_REG = dso_local local_unnamed_addr global i32 0, align 4
@MDIO_REG_BANK_CL73_IEEEB0 = dso_local local_unnamed_addr global i64 0, align 8
@MDIO_CL73_IEEEB0_CL73_AN_CONTROL = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [25 x i8] c"XGXS 1G loopback enable\0A\00", align 1
@MDIO_REG_BANK_COMBO_IEEE0 = dso_local local_unnamed_addr global i64 0, align 8
@MDIO_COMBO_IEEE0_MII_CONTROL = dso_local local_unnamed_addr global i32 0, align 4
@MDIO_COMBO_IEEO_MII_CONTROL_LOOPBACK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @bnx2x_set_xgxs_loopback], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @bnx2x_set_xgxs_loopback(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
%4 = load i32, ptr %1, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.link_params, ptr %1, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !11
%7 = load i64, ptr %0, align 8, !tbaa !12
%8 = load i64, ptr @SPEED_1000, align 8, !tbaa !15
%9 = icmp eq i64 %7, %8
br i1 %9, label %48, label %10
10: ; preds = %2
%11 = load i32, ptr @NETIF_MSG_LINK, align 4, !tbaa !16
%12 = tail call i32 @DP(i32 noundef %11, ptr noundef nonnull @.str) #3
%13 = tail call i32 @CHIP_IS_E3(ptr noundef %6) #3
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %24
15: ; preds = %10
%16 = load i64, ptr @NIG_REG_XGXS0_CTRL_MD_DEVAD, align 8, !tbaa !15
%17 = mul nsw i32 %4, 24
%18 = sext i32 %17 to i64
%19 = add nsw i64 %16, %18
%20 = tail call i32 @REG_RD(ptr noundef %6, i64 noundef %19) #3
%21 = load i64, ptr @NIG_REG_XGXS0_CTRL_MD_DEVAD, align 8, !tbaa !15
%22 = add nsw i64 %21, %18
%23 = tail call i32 @REG_WR(ptr noundef %6, i64 noundef %22, i32 noundef 5) #3
br label %24
24: ; preds = %15, %10
%25 = phi i32 [ 0, %10 ], [ %20, %15 ]
%26 = load i64, ptr @MDIO_REG_BANK_AER_BLOCK, align 8, !tbaa !15
%27 = load i32, ptr @MDIO_AER_BLOCK_AER_REG, align 4, !tbaa !16
%28 = and i32 %27, 15
%29 = zext nneg i32 %28 to i64
%30 = add nsw i64 %26, %29
%31 = tail call i32 @bnx2x_cl45_write(ptr noundef %6, ptr noundef nonnull %0, i32 noundef 5, i64 noundef %30, i32 noundef 10240) #3
%32 = load i64, ptr @MDIO_REG_BANK_CL73_IEEEB0, align 8, !tbaa !15
%33 = load i32, ptr @MDIO_CL73_IEEEB0_CL73_AN_CONTROL, align 4, !tbaa !16
%34 = and i32 %33, 15
%35 = zext nneg i32 %34 to i64
%36 = add nsw i64 %32, %35
%37 = tail call i32 @bnx2x_cl45_write(ptr noundef %6, ptr noundef nonnull %0, i32 noundef 5, i64 noundef %36, i32 noundef 24641) #3
%38 = tail call i32 @msleep(i32 noundef 200) #3
%39 = tail call i32 @bnx2x_set_aer_mmd(ptr noundef nonnull %1, ptr noundef nonnull %0) #3
%40 = tail call i32 @CHIP_IS_E3(ptr noundef %6) #3
%41 = icmp eq i32 %40, 0
br i1 %41, label %42, label %66
42: ; preds = %24
%43 = load i64, ptr @NIG_REG_XGXS0_CTRL_MD_DEVAD, align 8, !tbaa !15
%44 = mul nsw i32 %4, 24
%45 = sext i32 %44 to i64
%46 = add nsw i64 %43, %45
%47 = tail call i32 @REG_WR(ptr noundef %6, i64 noundef %46, i32 noundef %25) #3
br label %66
48: ; preds = %2
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%49 = load i32, ptr @NETIF_MSG_LINK, align 4, !tbaa !16
%50 = tail call i32 @DP(i32 noundef %49, ptr noundef nonnull @.str.1) #3
%51 = load i64, ptr @MDIO_REG_BANK_COMBO_IEEE0, align 8, !tbaa !15
%52 = load i32, ptr @MDIO_COMBO_IEEE0_MII_CONTROL, align 4, !tbaa !16
%53 = and i32 %52, 15
%54 = zext nneg i32 %53 to i64
%55 = add nsw i64 %51, %54
%56 = call i32 @bnx2x_cl45_read(ptr noundef %6, ptr noundef nonnull %0, i32 noundef 5, i64 noundef %55, ptr noundef nonnull %3) #3
%57 = load i64, ptr @MDIO_REG_BANK_COMBO_IEEE0, align 8, !tbaa !15
%58 = load i32, ptr @MDIO_COMBO_IEEE0_MII_CONTROL, align 4, !tbaa !16
%59 = and i32 %58, 15
%60 = zext nneg i32 %59 to i64
%61 = add nsw i64 %57, %60
%62 = load i32, ptr %3, align 4, !tbaa !16
%63 = load i32, ptr @MDIO_COMBO_IEEO_MII_CONTROL_LOOPBACK, align 4, !tbaa !16
%64 = or i32 %63, %62
%65 = call i32 @bnx2x_cl45_write(ptr noundef %6, ptr noundef nonnull %0, i32 noundef 5, i64 noundef %61, i32 noundef %64) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
br label %66
66: ; preds = %24, %42, %48
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @DP(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @CHIP_IS_E3(ptr noundef) local_unnamed_addr #2
declare i32 @REG_RD(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @REG_WR(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @bnx2x_cl45_write(ptr noundef, ptr noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @msleep(i32 noundef) local_unnamed_addr #2
declare i32 @bnx2x_set_aer_mmd(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @bnx2x_cl45_read(ptr noundef, ptr noundef, i32 noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"link_params", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!13, !14, i64 0}
!13 = !{!"bnx2x_phy", !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!14, !14, i64 0}
!16 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_link.c_bnx2x_set_xgxs_loopback.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_link.c_bnx2x_set_xgxs_loopback.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SPEED_1000 = common local_unnamed_addr global i64 0, align 8
@NETIF_MSG_LINK = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [26 x i8] c"XGXS 10G loopback enable\0A\00", align 1
@NIG_REG_XGXS0_CTRL_MD_DEVAD = common local_unnamed_addr global i64 0, align 8
@MDIO_REG_BANK_AER_BLOCK = common local_unnamed_addr global i64 0, align 8
@MDIO_AER_BLOCK_AER_REG = common local_unnamed_addr global i32 0, align 4
@MDIO_REG_BANK_CL73_IEEEB0 = common local_unnamed_addr global i64 0, align 8
@MDIO_CL73_IEEEB0_CL73_AN_CONTROL = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [25 x i8] c"XGXS 1G loopback enable\0A\00", align 1
@MDIO_REG_BANK_COMBO_IEEE0 = common local_unnamed_addr global i64 0, align 8
@MDIO_COMBO_IEEE0_MII_CONTROL = common local_unnamed_addr global i32 0, align 4
@MDIO_COMBO_IEEO_MII_CONTROL_LOOPBACK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @bnx2x_set_xgxs_loopback], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @bnx2x_set_xgxs_loopback(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
%4 = load i32, ptr %1, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %1, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !12
%7 = load i64, ptr %0, align 8, !tbaa !13
%8 = load i64, ptr @SPEED_1000, align 8, !tbaa !16
%9 = icmp eq i64 %7, %8
br i1 %9, label %48, label %10
10: ; preds = %2
%11 = load i32, ptr @NETIF_MSG_LINK, align 4, !tbaa !17
%12 = tail call i32 @DP(i32 noundef %11, ptr noundef nonnull @.str) #3
%13 = tail call i32 @CHIP_IS_E3(ptr noundef %6) #3
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %24
15: ; preds = %10
%16 = load i64, ptr @NIG_REG_XGXS0_CTRL_MD_DEVAD, align 8, !tbaa !16
%17 = mul nsw i32 %4, 24
%18 = sext i32 %17 to i64
%19 = add nsw i64 %16, %18
%20 = tail call i32 @REG_RD(ptr noundef %6, i64 noundef %19) #3
%21 = load i64, ptr @NIG_REG_XGXS0_CTRL_MD_DEVAD, align 8, !tbaa !16
%22 = add nsw i64 %21, %18
%23 = tail call i32 @REG_WR(ptr noundef %6, i64 noundef %22, i32 noundef 5) #3
br label %24
24: ; preds = %15, %10
%25 = phi i32 [ 0, %10 ], [ %20, %15 ]
%26 = load i64, ptr @MDIO_REG_BANK_AER_BLOCK, align 8, !tbaa !16
%27 = load i32, ptr @MDIO_AER_BLOCK_AER_REG, align 4, !tbaa !17
%28 = and i32 %27, 15
%29 = zext nneg i32 %28 to i64
%30 = add nsw i64 %26, %29
%31 = tail call i32 @bnx2x_cl45_write(ptr noundef %6, ptr noundef nonnull %0, i32 noundef 5, i64 noundef %30, i32 noundef 10240) #3
%32 = load i64, ptr @MDIO_REG_BANK_CL73_IEEEB0, align 8, !tbaa !16
%33 = load i32, ptr @MDIO_CL73_IEEEB0_CL73_AN_CONTROL, align 4, !tbaa !17
%34 = and i32 %33, 15
%35 = zext nneg i32 %34 to i64
%36 = add nsw i64 %32, %35
%37 = tail call i32 @bnx2x_cl45_write(ptr noundef %6, ptr noundef nonnull %0, i32 noundef 5, i64 noundef %36, i32 noundef 24641) #3
%38 = tail call i32 @msleep(i32 noundef 200) #3
%39 = tail call i32 @bnx2x_set_aer_mmd(ptr noundef nonnull %1, ptr noundef nonnull %0) #3
%40 = tail call i32 @CHIP_IS_E3(ptr noundef %6) #3
%41 = icmp eq i32 %40, 0
br i1 %41, label %42, label %66
42: ; preds = %24
%43 = load i64, ptr @NIG_REG_XGXS0_CTRL_MD_DEVAD, align 8, !tbaa !16
%44 = mul nsw i32 %4, 24
%45 = sext i32 %44 to i64
%46 = add nsw i64 %43, %45
%47 = tail call i32 @REG_WR(ptr noundef %6, i64 noundef %46, i32 noundef %25) #3
br label %66
48: ; preds = %2
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%49 = load i32, ptr @NETIF_MSG_LINK, align 4, !tbaa !17
%50 = tail call i32 @DP(i32 noundef %49, ptr noundef nonnull @.str.1) #3
%51 = load i64, ptr @MDIO_REG_BANK_COMBO_IEEE0, align 8, !tbaa !16
%52 = load i32, ptr @MDIO_COMBO_IEEE0_MII_CONTROL, align 4, !tbaa !17
%53 = and i32 %52, 15
%54 = zext nneg i32 %53 to i64
%55 = add nsw i64 %51, %54
%56 = call i32 @bnx2x_cl45_read(ptr noundef %6, ptr noundef nonnull %0, i32 noundef 5, i64 noundef %55, ptr noundef nonnull %3) #3
%57 = load i64, ptr @MDIO_REG_BANK_COMBO_IEEE0, align 8, !tbaa !16
%58 = load i32, ptr @MDIO_COMBO_IEEE0_MII_CONTROL, align 4, !tbaa !17
%59 = and i32 %58, 15
%60 = zext nneg i32 %59 to i64
%61 = add nsw i64 %57, %60
%62 = load i32, ptr %3, align 4, !tbaa !17
%63 = load i32, ptr @MDIO_COMBO_IEEO_MII_CONTROL_LOOPBACK, align 4, !tbaa !17
%64 = or i32 %63, %62
%65 = call i32 @bnx2x_cl45_write(ptr noundef %6, ptr noundef nonnull %0, i32 noundef 5, i64 noundef %61, i32 noundef %64) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
br label %66
66: ; preds = %24, %42, %48
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @DP(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @CHIP_IS_E3(ptr noundef) local_unnamed_addr #2
declare i32 @REG_RD(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @REG_WR(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @bnx2x_cl45_write(ptr noundef, ptr noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @msleep(i32 noundef) local_unnamed_addr #2
declare i32 @bnx2x_set_aer_mmd(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @bnx2x_cl45_read(ptr noundef, ptr noundef, i32 noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"link_params", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!14, !15, i64 0}
!14 = !{!"bnx2x_phy", !15, i64 0}
!15 = !{!"long", !9, i64 0}
!16 = !{!15, !15, i64 0}
!17 = !{!8, !8, i64 0}
| linux_drivers_net_ethernet_broadcom_bnx2x_extr_bnx2x_link.c_bnx2x_set_xgxs_loopback |
; ModuleID = 'AnghaBench/libgit2/tests/revwalk/extr_mergebase.c_test_revwalk_mergebase__no_common_ancestor_returns_ENOTFOUND.c'
source_filename = "AnghaBench/libgit2/tests/revwalk/extr_mergebase.c_test_revwalk_mergebase__no_common_ancestor_returns_ENOTFOUND.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [41 x i8] c"763d71aadf09a7951596c9746c024e7eece7c7af\00", align 1
@.str.1 = private unnamed_addr constant [41 x i8] c"e90810b8df3e80c413d903f631643c716887138d\00", align 1
@_repo = dso_local local_unnamed_addr global i32 0, align 4
@GIT_ENOTFOUND = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @test_revwalk_mergebase__no_common_ancestor_returns_ENOTFOUND() local_unnamed_addr #0 {
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
%4 = alloca i64, align 8
%5 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%6 = call i32 @git_oid_fromstr(ptr noundef nonnull %2, ptr noundef nonnull @.str) #3
%7 = call i32 @cl_git_pass(i32 noundef %6) #3
%8 = call i32 @git_oid_fromstr(ptr noundef nonnull %3, ptr noundef nonnull @.str.1) #3
%9 = call i32 @cl_git_pass(i32 noundef %8) #3
%10 = load i32, ptr @_repo, align 4, !tbaa !5
%11 = call i32 @git_merge_base(ptr noundef nonnull %1, i32 noundef %10, ptr noundef nonnull %2, ptr noundef nonnull %3) #3
%12 = call i32 @cl_git_fail(i32 noundef %11) #3
%13 = load i32, ptr @GIT_ENOTFOUND, align 4, !tbaa !5
%14 = call i32 @cl_assert_equal_i(i32 noundef %13, i32 noundef %11) #3
%15 = load i32, ptr @_repo, align 4, !tbaa !5
%16 = call i32 @git_graph_ahead_behind(ptr noundef nonnull %4, ptr noundef nonnull %5, i32 noundef %15, ptr noundef nonnull %2, ptr noundef nonnull %3) #3
%17 = call i32 @cl_git_pass(i32 noundef %16) #3
%18 = load i64, ptr %4, align 8, !tbaa !9
%19 = call i32 @cl_assert_equal_sz(i32 noundef 4, i64 noundef %18) #3
%20 = load i64, ptr %5, align 8, !tbaa !9
%21 = call i32 @cl_assert_equal_sz(i32 noundef 2, i64 noundef %20) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cl_git_pass(i32 noundef) local_unnamed_addr #2
declare i32 @git_oid_fromstr(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @git_merge_base(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @cl_git_fail(i32 noundef) local_unnamed_addr #2
declare i32 @cl_assert_equal_i(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @git_graph_ahead_behind(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @cl_assert_equal_sz(i32 noundef, i64 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/libgit2/tests/revwalk/extr_mergebase.c_test_revwalk_mergebase__no_common_ancestor_returns_ENOTFOUND.c'
source_filename = "AnghaBench/libgit2/tests/revwalk/extr_mergebase.c_test_revwalk_mergebase__no_common_ancestor_returns_ENOTFOUND.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [41 x i8] c"763d71aadf09a7951596c9746c024e7eece7c7af\00", align 1
@.str.1 = private unnamed_addr constant [41 x i8] c"e90810b8df3e80c413d903f631643c716887138d\00", align 1
@_repo = common local_unnamed_addr global i32 0, align 4
@GIT_ENOTFOUND = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @test_revwalk_mergebase__no_common_ancestor_returns_ENOTFOUND() local_unnamed_addr #0 {
%1 = alloca i32, align 4
%2 = alloca i32, align 4
%3 = alloca i32, align 4
%4 = alloca i64, align 8
%5 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%6 = call i32 @git_oid_fromstr(ptr noundef nonnull %2, ptr noundef nonnull @.str) #3
%7 = call i32 @cl_git_pass(i32 noundef %6) #3
%8 = call i32 @git_oid_fromstr(ptr noundef nonnull %3, ptr noundef nonnull @.str.1) #3
%9 = call i32 @cl_git_pass(i32 noundef %8) #3
%10 = load i32, ptr @_repo, align 4, !tbaa !6
%11 = call i32 @git_merge_base(ptr noundef nonnull %1, i32 noundef %10, ptr noundef nonnull %2, ptr noundef nonnull %3) #3
%12 = call i32 @cl_git_fail(i32 noundef %11) #3
%13 = load i32, ptr @GIT_ENOTFOUND, align 4, !tbaa !6
%14 = call i32 @cl_assert_equal_i(i32 noundef %13, i32 noundef %11) #3
%15 = load i32, ptr @_repo, align 4, !tbaa !6
%16 = call i32 @git_graph_ahead_behind(ptr noundef nonnull %4, ptr noundef nonnull %5, i32 noundef %15, ptr noundef nonnull %2, ptr noundef nonnull %3) #3
%17 = call i32 @cl_git_pass(i32 noundef %16) #3
%18 = load i64, ptr %4, align 8, !tbaa !10
%19 = call i32 @cl_assert_equal_sz(i32 noundef 4, i64 noundef %18) #3
%20 = load i64, ptr %5, align 8, !tbaa !10
%21 = call i32 @cl_assert_equal_sz(i32 noundef 2, i64 noundef %20) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cl_git_pass(i32 noundef) local_unnamed_addr #2
declare i32 @git_oid_fromstr(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @git_merge_base(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @cl_git_fail(i32 noundef) local_unnamed_addr #2
declare i32 @cl_assert_equal_i(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @git_graph_ahead_behind(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @cl_assert_equal_sz(i32 noundef, i64 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
| libgit2_tests_revwalk_extr_mergebase.c_test_revwalk_mergebase__no_common_ancestor_returns_ENOTFOUND |
; ModuleID = 'AnghaBench/vlc/modules/services_discovery/extr_xcb_apps.c_DelApp.c'
source_filename = "AnghaBench/vlc/modules/services_discovery/extr_xcb_apps.c_DelApp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.app = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @DelApp], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @DelApp(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.app, ptr %0, i64 0, i32 1
%3 = load i32, ptr %2, align 4, !tbaa !5
%4 = load i32, ptr %0, align 4, !tbaa !10
%5 = tail call i32 @services_discovery_RemoveItem(i32 noundef %3, i32 noundef %4) #2
%6 = load i32, ptr %0, align 4, !tbaa !10
%7 = tail call i32 @input_item_Release(i32 noundef %6) #2
%8 = tail call i32 @free(ptr noundef nonnull %0) #2
ret void
}
declare i32 @services_discovery_RemoveItem(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @input_item_Release(i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"app", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/vlc/modules/services_discovery/extr_xcb_apps.c_DelApp.c'
source_filename = "AnghaBench/vlc/modules/services_discovery/extr_xcb_apps.c_DelApp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @DelApp], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @DelApp(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = load i32, ptr %0, align 4, !tbaa !11
%5 = tail call i32 @services_discovery_RemoveItem(i32 noundef %3, i32 noundef %4) #2
%6 = load i32, ptr %0, align 4, !tbaa !11
%7 = tail call i32 @input_item_Release(i32 noundef %6) #2
%8 = tail call i32 @free(ptr noundef nonnull %0) #2
ret void
}
declare i32 @services_discovery_RemoveItem(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @input_item_Release(i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"app", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
| vlc_modules_services_discovery_extr_xcb_apps.c_DelApp |
; ModuleID = 'AnghaBench/How-to-Make-a-Computer-Operating-System/src/sdk/src/libc/src/stdio/extr_fgetc.c_fgetc.c'
source_filename = "AnghaBench/How-to-Make-a-Computer-Operating-System/src/sdk/src/libc/src/stdio/extr_fgetc.c_fgetc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, i32, i64, i64, ptr, i32, i32, i64 }
@__FILE_CAN_READ = dso_local local_unnamed_addr global i32 0, align 4
@__FILE_BUFINPUT = dso_local local_unnamed_addr global i32 0, align 4
@__FILE_ERROR = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [8 x i8] c"EOF ! \0A\00", align 1
@EOF = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [11 x i8] c"un get ! \0A\00", align 1
@__FILE_EOF = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @fgetc(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 8, !tbaa !5
%3 = load i32, ptr @__FILE_CAN_READ, align 4, !tbaa !12
%4 = and i32 %3, %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %1
%7 = load i32, ptr @__FILE_BUFINPUT, align 4, !tbaa !12
%8 = tail call i64 @__set_stream_flags(ptr noundef nonnull %0, i32 noundef %7) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i32, ptr %0, align 8, !tbaa !5
br label %12
12: ; preds = %10, %1
%13 = phi i32 [ %11, %10 ], [ %2, %1 ]
%14 = load i32, ptr @__FILE_ERROR, align 4, !tbaa !12
%15 = or i32 %13, %14
store i32 %15, ptr %0, align 8, !tbaa !5
%16 = tail call i32 @printf(ptr noundef nonnull @.str) #2
%17 = load i32, ptr @EOF, align 4, !tbaa !12
br label %70
18: ; preds = %6
%19 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 7
%20 = load i64, ptr %19, align 8, !tbaa !13
%21 = icmp eq i64 %20, 0
br i1 %21, label %26, label %22
22: ; preds = %18
store i64 0, ptr %19, align 8, !tbaa !13
%23 = tail call i32 @printf(ptr noundef nonnull @.str.1) #2
%24 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
%25 = load i32, ptr %24, align 4, !tbaa !14
br label %70
26: ; preds = %18
%27 = tail call i64 @feof(ptr noundef nonnull %0) #2
%28 = icmp eq i64 %27, 0
br i1 %28, label %32, label %29
29: ; preds = %26
%30 = tail call i32 @printf(ptr noundef nonnull @.str) #2
%31 = load i32, ptr @EOF, align 4, !tbaa !12
br label %70
32: ; preds = %26
%33 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 2
%34 = load i64, ptr %33, align 8, !tbaa !15
%35 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 3
%36 = load i64, ptr %35, align 8, !tbaa !16
%37 = icmp ult i64 %34, %36
br i1 %37, label %62, label %38
38: ; preds = %32
%39 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 6
%40 = load i32, ptr %39, align 4, !tbaa !17
%41 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 4
%42 = load ptr, ptr %41, align 8, !tbaa !18
%43 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 5
%44 = load i32, ptr %43, align 8, !tbaa !19
%45 = tail call i64 @read(i32 noundef %40, ptr noundef %42, i32 noundef %44) #2
%46 = icmp eq i64 %45, 0
br i1 %46, label %47, label %53
47: ; preds = %38
%48 = load i32, ptr @__FILE_EOF, align 4, !tbaa !12
%49 = load i32, ptr %0, align 8, !tbaa !5
%50 = or i32 %49, %48
store i32 %50, ptr %0, align 8, !tbaa !5
%51 = tail call i32 @printf(ptr noundef nonnull @.str) #2
%52 = load i32, ptr @EOF, align 4, !tbaa !12
br label %70
53: ; preds = %38
%54 = icmp slt i64 %45, 0
br i1 %54, label %55, label %61
55: ; preds = %53
%56 = load i32, ptr @__FILE_ERROR, align 4, !tbaa !12
%57 = load i32, ptr %0, align 8, !tbaa !5
%58 = or i32 %57, %56
store i32 %58, ptr %0, align 8, !tbaa !5
%59 = tail call i32 @printf(ptr noundef nonnull @.str) #2
%60 = load i32, ptr @EOF, align 4, !tbaa !12
br label %70
61: ; preds = %53
store i64 0, ptr %33, align 8, !tbaa !15
store i64 %45, ptr %35, align 8, !tbaa !16
br label %62
62: ; preds = %61, %32
%63 = phi i64 [ 0, %61 ], [ %34, %32 ]
%64 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 4
%65 = load ptr, ptr %64, align 8, !tbaa !18
%66 = getelementptr inbounds i8, ptr %65, i64 %63
%67 = load i8, ptr %66, align 1, !tbaa !20
%68 = add nuw i64 %63, 1
store i64 %68, ptr %33, align 8, !tbaa !15
%69 = zext i8 %67 to i32
br label %70
70: ; preds = %55, %47, %62, %29, %22, %12
%71 = phi i32 [ %17, %12 ], [ %25, %22 ], [ %31, %29 ], [ %69, %62 ], [ %60, %55 ], [ %52, %47 ]
ret i32 %71
}
declare i64 @__set_stream_flags(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @printf(ptr noundef) local_unnamed_addr #1
declare i64 @feof(ptr noundef) local_unnamed_addr #1
declare i64 @read(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0, !7, i64 4, !10, i64 8, !10, i64 16, !11, i64 24, !7, i64 32, !7, i64 36, !10, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !10, i64 40}
!14 = !{!6, !7, i64 4}
!15 = !{!6, !10, i64 8}
!16 = !{!6, !10, i64 16}
!17 = !{!6, !7, i64 36}
!18 = !{!6, !11, i64 24}
!19 = !{!6, !7, i64 32}
!20 = !{!8, !8, i64 0}
| ; ModuleID = 'AnghaBench/How-to-Make-a-Computer-Operating-System/src/sdk/src/libc/src/stdio/extr_fgetc.c_fgetc.c'
source_filename = "AnghaBench/How-to-Make-a-Computer-Operating-System/src/sdk/src/libc/src/stdio/extr_fgetc.c_fgetc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@__FILE_CAN_READ = common local_unnamed_addr global i32 0, align 4
@__FILE_BUFINPUT = common local_unnamed_addr global i32 0, align 4
@__FILE_ERROR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [8 x i8] c"EOF ! \0A\00", align 1
@EOF = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [11 x i8] c"un get ! \0A\00", align 1
@__FILE_EOF = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @fgetc(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 8, !tbaa !6
%3 = load i32, ptr @__FILE_CAN_READ, align 4, !tbaa !13
%4 = and i32 %3, %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %12, label %6
6: ; preds = %1
%7 = load i32, ptr @__FILE_BUFINPUT, align 4, !tbaa !13
%8 = tail call i64 @__set_stream_flags(ptr noundef nonnull %0, i32 noundef %7) #2
%9 = icmp eq i64 %8, 0
br i1 %9, label %18, label %10
10: ; preds = %6
%11 = load i32, ptr %0, align 8, !tbaa !6
br label %12
12: ; preds = %10, %1
%13 = phi i32 [ %11, %10 ], [ %2, %1 ]
%14 = load i32, ptr @__FILE_ERROR, align 4, !tbaa !13
%15 = or i32 %13, %14
store i32 %15, ptr %0, align 8, !tbaa !6
%16 = tail call i32 @printf(ptr noundef nonnull @.str) #2
%17 = load i32, ptr @EOF, align 4, !tbaa !13
br label %70
18: ; preds = %6
%19 = getelementptr inbounds i8, ptr %0, i64 40
%20 = load i64, ptr %19, align 8, !tbaa !14
%21 = icmp eq i64 %20, 0
br i1 %21, label %26, label %22
22: ; preds = %18
store i64 0, ptr %19, align 8, !tbaa !14
%23 = tail call i32 @printf(ptr noundef nonnull @.str.1) #2
%24 = getelementptr inbounds i8, ptr %0, i64 4
%25 = load i32, ptr %24, align 4, !tbaa !15
br label %70
26: ; preds = %18
%27 = tail call i64 @feof(ptr noundef nonnull %0) #2
%28 = icmp eq i64 %27, 0
br i1 %28, label %32, label %29
29: ; preds = %26
%30 = tail call i32 @printf(ptr noundef nonnull @.str) #2
%31 = load i32, ptr @EOF, align 4, !tbaa !13
br label %70
32: ; preds = %26
%33 = getelementptr inbounds i8, ptr %0, i64 8
%34 = load i64, ptr %33, align 8, !tbaa !16
%35 = getelementptr inbounds i8, ptr %0, i64 16
%36 = load i64, ptr %35, align 8, !tbaa !17
%37 = icmp ult i64 %34, %36
br i1 %37, label %62, label %38
38: ; preds = %32
%39 = getelementptr inbounds i8, ptr %0, i64 36
%40 = load i32, ptr %39, align 4, !tbaa !18
%41 = getelementptr inbounds i8, ptr %0, i64 24
%42 = load ptr, ptr %41, align 8, !tbaa !19
%43 = getelementptr inbounds i8, ptr %0, i64 32
%44 = load i32, ptr %43, align 8, !tbaa !20
%45 = tail call i64 @read(i32 noundef %40, ptr noundef %42, i32 noundef %44) #2
%46 = icmp eq i64 %45, 0
br i1 %46, label %47, label %53
47: ; preds = %38
%48 = load i32, ptr @__FILE_EOF, align 4, !tbaa !13
%49 = load i32, ptr %0, align 8, !tbaa !6
%50 = or i32 %49, %48
store i32 %50, ptr %0, align 8, !tbaa !6
%51 = tail call i32 @printf(ptr noundef nonnull @.str) #2
%52 = load i32, ptr @EOF, align 4, !tbaa !13
br label %70
53: ; preds = %38
%54 = icmp slt i64 %45, 0
br i1 %54, label %55, label %61
55: ; preds = %53
%56 = load i32, ptr @__FILE_ERROR, align 4, !tbaa !13
%57 = load i32, ptr %0, align 8, !tbaa !6
%58 = or i32 %57, %56
store i32 %58, ptr %0, align 8, !tbaa !6
%59 = tail call i32 @printf(ptr noundef nonnull @.str) #2
%60 = load i32, ptr @EOF, align 4, !tbaa !13
br label %70
61: ; preds = %53
store i64 0, ptr %33, align 8, !tbaa !16
store i64 %45, ptr %35, align 8, !tbaa !17
br label %62
62: ; preds = %61, %32
%63 = phi i64 [ 0, %61 ], [ %34, %32 ]
%64 = getelementptr inbounds i8, ptr %0, i64 24
%65 = load ptr, ptr %64, align 8, !tbaa !19
%66 = getelementptr inbounds i8, ptr %65, i64 %63
%67 = load i8, ptr %66, align 1, !tbaa !21
%68 = add nuw i64 %63, 1
store i64 %68, ptr %33, align 8, !tbaa !16
%69 = zext i8 %67 to i32
br label %70
70: ; preds = %55, %47, %62, %29, %22, %12
%71 = phi i32 [ %17, %12 ], [ %25, %22 ], [ %31, %29 ], [ %69, %62 ], [ %60, %55 ], [ %52, %47 ]
ret i32 %71
}
declare i64 @__set_stream_flags(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @printf(ptr noundef) local_unnamed_addr #1
declare i64 @feof(ptr noundef) local_unnamed_addr #1
declare i64 @read(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0, !8, i64 4, !11, i64 8, !11, i64 16, !12, i64 24, !8, i64 32, !8, i64 36, !11, i64 40}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !11, i64 40}
!15 = !{!7, !8, i64 4}
!16 = !{!7, !11, i64 8}
!17 = !{!7, !11, i64 16}
!18 = !{!7, !8, i64 36}
!19 = !{!7, !12, i64 24}
!20 = !{!7, !8, i64 32}
!21 = !{!9, !9, i64 0}
| How-to-Make-a-Computer-Operating-System_src_sdk_src_libc_src_stdio_extr_fgetc.c_fgetc |
; ModuleID = 'AnghaBench/linux/drivers/thunderbolt/extr_xdomain.c_tb_xdomain_exit.c'
source_filename = "AnghaBench/linux/drivers/thunderbolt/extr_xdomain.c_tb_xdomain_exit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@xdomain_property_block = dso_local local_unnamed_addr global i32 0, align 4
@xdomain_property_dir = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @tb_xdomain_exit() local_unnamed_addr #0 {
%1 = load i32, ptr @xdomain_property_block, align 4, !tbaa !5
%2 = tail call i32 @kfree(i32 noundef %1) #2
%3 = load i32, ptr @xdomain_property_dir, align 4, !tbaa !5
%4 = tail call i32 @tb_property_free_dir(i32 noundef %3) #2
ret void
}
declare i32 @kfree(i32 noundef) local_unnamed_addr #1
declare i32 @tb_property_free_dir(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/thunderbolt/extr_xdomain.c_tb_xdomain_exit.c'
source_filename = "AnghaBench/linux/drivers/thunderbolt/extr_xdomain.c_tb_xdomain_exit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@xdomain_property_block = common local_unnamed_addr global i32 0, align 4
@xdomain_property_dir = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @tb_xdomain_exit() local_unnamed_addr #0 {
%1 = load i32, ptr @xdomain_property_block, align 4, !tbaa !6
%2 = tail call i32 @kfree(i32 noundef %1) #2
%3 = load i32, ptr @xdomain_property_dir, align 4, !tbaa !6
%4 = tail call i32 @tb_property_free_dir(i32 noundef %3) #2
ret void
}
declare i32 @kfree(i32 noundef) local_unnamed_addr #1
declare i32 @tb_property_free_dir(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_thunderbolt_extr_xdomain.c_tb_xdomain_exit |
; ModuleID = 'AnghaBench/linux/arch/s390/kvm/extr_priv.c_handle_sckpf.c'
source_filename = "AnghaBench/linux/arch/s390/kvm/extr_priv.c_handle_sckpf.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.kvm_vcpu = type { %struct.TYPE_14__, ptr, %struct.TYPE_11__ }
%struct.TYPE_14__ = type { ptr }
%struct.TYPE_11__ = type { i32 }
%struct.TYPE_13__ = type { i32, %struct.TYPE_12__ }
%struct.TYPE_12__ = type { i32 }
@PSW_MASK_PSTATE = dso_local local_unnamed_addr global i32 0, align 4
@PGM_PRIVILEGED_OP = dso_local local_unnamed_addr global i32 0, align 4
@PGM_SPECIFICATION = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @handle_sckpf], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @handle_sckpf(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.kvm_vcpu, ptr %0, i64 0, i32 2
%3 = load i32, ptr %2, align 8, !tbaa !5
%4 = add nsw i32 %3, 1
store i32 %4, ptr %2, align 8, !tbaa !5
%5 = load ptr, ptr %0, align 8, !tbaa !13
%6 = getelementptr inbounds %struct.TYPE_13__, ptr %5, i64 0, i32 1
%7 = load i32, ptr %6, align 4, !tbaa !14
%8 = load i32, ptr @PSW_MASK_PSTATE, align 4, !tbaa !17
%9 = and i32 %8, %7
%10 = icmp eq i32 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %1
%12 = load i32, ptr @PGM_PRIVILEGED_OP, align 4, !tbaa !17
%13 = tail call i32 @kvm_s390_inject_program_int(ptr noundef nonnull %0, i32 noundef %12) #2
br label %24
14: ; preds = %1
%15 = getelementptr inbounds %struct.kvm_vcpu, ptr %0, i64 0, i32 1
%16 = load ptr, ptr %15, align 8, !tbaa !18
%17 = load ptr, ptr %16, align 8, !tbaa !19
%18 = load i32, ptr %17, align 4, !tbaa !17
%19 = icmp ult i32 %18, 65536
br i1 %19, label %23, label %20
20: ; preds = %14
%21 = load i32, ptr @PGM_SPECIFICATION, align 4, !tbaa !17
%22 = tail call i32 @kvm_s390_inject_program_int(ptr noundef nonnull %0, i32 noundef %21) #2
br label %24
23: ; preds = %14
store i32 %18, ptr %5, align 4, !tbaa !23
br label %24
24: ; preds = %23, %20, %11
%25 = phi i32 [ %13, %11 ], [ %22, %20 ], [ 0, %23 ]
ret i32 %25
}
declare i32 @kvm_s390_inject_program_int(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !12, i64 16}
!6 = !{!"kvm_vcpu", !7, i64 0, !8, i64 8, !11, i64 16}
!7 = !{!"TYPE_14__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_11__", !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!6, !8, i64 0}
!14 = !{!15, !12, i64 4}
!15 = !{!"TYPE_13__", !12, i64 0, !16, i64 4}
!16 = !{!"TYPE_12__", !12, i64 0}
!17 = !{!12, !12, i64 0}
!18 = !{!6, !8, i64 8}
!19 = !{!20, !8, i64 0}
!20 = !{!"TYPE_10__", !21, i64 0}
!21 = !{!"TYPE_9__", !22, i64 0}
!22 = !{!"TYPE_8__", !8, i64 0}
!23 = !{!15, !12, i64 0}
| ; ModuleID = 'AnghaBench/linux/arch/s390/kvm/extr_priv.c_handle_sckpf.c'
source_filename = "AnghaBench/linux/arch/s390/kvm/extr_priv.c_handle_sckpf.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PSW_MASK_PSTATE = common local_unnamed_addr global i32 0, align 4
@PGM_PRIVILEGED_OP = common local_unnamed_addr global i32 0, align 4
@PGM_SPECIFICATION = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @handle_sckpf], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @handle_sckpf(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load i32, ptr %2, align 8, !tbaa !6
%4 = add nsw i32 %3, 1
store i32 %4, ptr %2, align 8, !tbaa !6
%5 = load ptr, ptr %0, align 8, !tbaa !14
%6 = getelementptr inbounds i8, ptr %5, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !15
%8 = load i32, ptr @PSW_MASK_PSTATE, align 4, !tbaa !18
%9 = and i32 %8, %7
%10 = icmp eq i32 %9, 0
br i1 %10, label %14, label %11
11: ; preds = %1
%12 = load i32, ptr @PGM_PRIVILEGED_OP, align 4, !tbaa !18
%13 = tail call i32 @kvm_s390_inject_program_int(ptr noundef nonnull %0, i32 noundef %12) #2
br label %24
14: ; preds = %1
%15 = getelementptr inbounds i8, ptr %0, i64 8
%16 = load ptr, ptr %15, align 8, !tbaa !19
%17 = load ptr, ptr %16, align 8, !tbaa !20
%18 = load i32, ptr %17, align 4, !tbaa !18
%19 = icmp ult i32 %18, 65536
br i1 %19, label %23, label %20
20: ; preds = %14
%21 = load i32, ptr @PGM_SPECIFICATION, align 4, !tbaa !18
%22 = tail call i32 @kvm_s390_inject_program_int(ptr noundef nonnull %0, i32 noundef %21) #2
br label %24
23: ; preds = %14
store i32 %18, ptr %5, align 4, !tbaa !24
br label %24
24: ; preds = %23, %20, %11
%25 = phi i32 [ %13, %11 ], [ %22, %20 ], [ 0, %23 ]
ret i32 %25
}
declare i32 @kvm_s390_inject_program_int(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !13, i64 16}
!7 = !{!"kvm_vcpu", !8, i64 0, !9, i64 8, !12, i64 16}
!8 = !{!"TYPE_14__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"TYPE_11__", !13, i64 0}
!13 = !{!"int", !10, i64 0}
!14 = !{!7, !9, i64 0}
!15 = !{!16, !13, i64 4}
!16 = !{!"TYPE_13__", !13, i64 0, !17, i64 4}
!17 = !{!"TYPE_12__", !13, i64 0}
!18 = !{!13, !13, i64 0}
!19 = !{!7, !9, i64 8}
!20 = !{!21, !9, i64 0}
!21 = !{!"TYPE_10__", !22, i64 0}
!22 = !{!"TYPE_9__", !23, i64 0}
!23 = !{!"TYPE_8__", !9, i64 0}
!24 = !{!16, !13, i64 0}
| linux_arch_s390_kvm_extr_priv.c_handle_sckpf |
; ModuleID = 'AnghaBench/linux/arch/arm/mach-omap2/extr_clockdomain.c_clkdm_allow_idle_nolock.c'
source_filename = "AnghaBench/linux/arch/arm/mach-omap2/extr_clockdomain.c_clkdm_allow_idle_nolock.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.clockdomain = type { i32, %struct.TYPE_3__, i32, i32, i32, i64 }
%struct.TYPE_3__ = type { i32 }
@CLKDM_CAN_FORCE_SLEEP = dso_local local_unnamed_addr global i32 0, align 4
@CLKDM_CAN_ENABLE_AUTO = dso_local local_unnamed_addr global i32 0, align 4
@CLKDM_MISSING_IDLE_REPORTING = dso_local local_unnamed_addr global i32 0, align 4
@arch_clkdm = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [57 x i8] c"clockdomain: enabling automatic idle transitions for %s\0A\00", align 1
@_CLKDM_FLAG_HWSUP_ENABLED = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @clkdm_allow_idle_nolock(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %57, label %3
3: ; preds = %1
%4 = getelementptr inbounds %struct.clockdomain, ptr %0, i64 0, i32 5
%5 = load i64, ptr %4, align 8, !tbaa !5
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i32 @WARN_ON(i32 noundef %7) #2
%9 = icmp eq i32 %8, 0
%10 = load i64, ptr %4, align 8, !tbaa !5
br i1 %9, label %11, label %13
11: ; preds = %3
%12 = add nsw i64 %10, -1
store i64 %12, ptr %4, align 8, !tbaa !5
br label %13
13: ; preds = %3, %11
%14 = phi i64 [ %12, %11 ], [ %10, %3 ]
%15 = icmp eq i64 %14, 0
br i1 %15, label %16, label %57
16: ; preds = %13
%17 = getelementptr inbounds %struct.clockdomain, ptr %0, i64 0, i32 4
%18 = load i32, ptr %17, align 8, !tbaa !12
%19 = icmp eq i32 %18, 0
%20 = load i32, ptr %0, align 8, !tbaa !13
br i1 %19, label %21, label %28
21: ; preds = %16
%22 = load i32, ptr @CLKDM_CAN_FORCE_SLEEP, align 4, !tbaa !14
%23 = and i32 %22, %20
%24 = icmp eq i32 %23, 0
br i1 %24, label %28, label %25
25: ; preds = %21
%26 = tail call i32 @clkdm_sleep_nolock(ptr noundef nonnull %0) #2
%27 = load i32, ptr %0, align 8, !tbaa !13
br label %28
28: ; preds = %25, %21, %16
%29 = phi i32 [ %27, %25 ], [ %20, %21 ], [ %20, %16 ]
%30 = load i32, ptr @CLKDM_CAN_ENABLE_AUTO, align 4, !tbaa !14
%31 = and i32 %30, %29
%32 = icmp eq i32 %31, 0
br i1 %32, label %57, label %33
33: ; preds = %28
%34 = load i32, ptr @CLKDM_MISSING_IDLE_REPORTING, align 4, !tbaa !14
%35 = and i32 %34, %29
%36 = icmp eq i32 %35, 0
%37 = load ptr, ptr @arch_clkdm, align 8
%38 = icmp ne ptr %37, null
%39 = select i1 %36, i1 %38, i1 false
br i1 %39, label %40, label %57
40: ; preds = %33
%41 = load ptr, ptr %37, align 8, !tbaa !15
%42 = icmp eq ptr %41, null
br i1 %42, label %57, label %43
43: ; preds = %40
%44 = getelementptr inbounds %struct.clockdomain, ptr %0, i64 0, i32 3
%45 = load i32, ptr %44, align 4, !tbaa !18
%46 = tail call i32 @pr_debug(ptr noundef nonnull @.str, i32 noundef %45) #2
%47 = load i32, ptr @_CLKDM_FLAG_HWSUP_ENABLED, align 4, !tbaa !14
%48 = getelementptr inbounds %struct.clockdomain, ptr %0, i64 0, i32 2
%49 = load i32, ptr %48, align 8, !tbaa !19
%50 = or i32 %49, %47
store i32 %50, ptr %48, align 8, !tbaa !19
%51 = load ptr, ptr @arch_clkdm, align 8, !tbaa !20
%52 = load ptr, ptr %51, align 8, !tbaa !15
%53 = tail call i32 %52(ptr noundef nonnull %0) #2
%54 = getelementptr inbounds %struct.clockdomain, ptr %0, i64 0, i32 1
%55 = load i32, ptr %54, align 4, !tbaa !21
%56 = tail call i32 @pwrdm_state_switch_nolock(i32 noundef %55) #2
br label %57
57: ; preds = %40, %33, %28, %13, %1, %43
ret void
}
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @clkdm_sleep_nolock(ptr noundef) local_unnamed_addr #1
declare i32 @pr_debug(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pwrdm_state_switch_nolock(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 24}
!6 = !{!"clockdomain", !7, i64 0, !10, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !11, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_3__", !7, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!6, !7, i64 16}
!13 = !{!6, !7, i64 0}
!14 = !{!7, !7, i64 0}
!15 = !{!16, !17, i64 0}
!16 = !{!"TYPE_4__", !17, i64 0}
!17 = !{!"any pointer", !8, i64 0}
!18 = !{!6, !7, i64 12}
!19 = !{!6, !7, i64 8}
!20 = !{!17, !17, i64 0}
!21 = !{!6, !7, i64 4}
| ; ModuleID = 'AnghaBench/linux/arch/arm/mach-omap2/extr_clockdomain.c_clkdm_allow_idle_nolock.c'
source_filename = "AnghaBench/linux/arch/arm/mach-omap2/extr_clockdomain.c_clkdm_allow_idle_nolock.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CLKDM_CAN_FORCE_SLEEP = common local_unnamed_addr global i32 0, align 4
@CLKDM_CAN_ENABLE_AUTO = common local_unnamed_addr global i32 0, align 4
@CLKDM_MISSING_IDLE_REPORTING = common local_unnamed_addr global i32 0, align 4
@arch_clkdm = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [57 x i8] c"clockdomain: enabling automatic idle transitions for %s\0A\00", align 1
@_CLKDM_FLAG_HWSUP_ENABLED = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @clkdm_allow_idle_nolock(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %57, label %3
3: ; preds = %1
%4 = getelementptr inbounds i8, ptr %0, i64 24
%5 = load i64, ptr %4, align 8, !tbaa !6
%6 = icmp eq i64 %5, 0
%7 = zext i1 %6 to i32
%8 = tail call i32 @WARN_ON(i32 noundef %7) #2
%9 = icmp eq i32 %8, 0
%10 = load i64, ptr %4, align 8, !tbaa !6
br i1 %9, label %11, label %13
11: ; preds = %3
%12 = add nsw i64 %10, -1
store i64 %12, ptr %4, align 8, !tbaa !6
br label %13
13: ; preds = %3, %11
%14 = phi i64 [ %12, %11 ], [ %10, %3 ]
%15 = icmp eq i64 %14, 0
br i1 %15, label %16, label %57
16: ; preds = %13
%17 = getelementptr inbounds i8, ptr %0, i64 16
%18 = load i32, ptr %17, align 8, !tbaa !13
%19 = icmp eq i32 %18, 0
%20 = load i32, ptr %0, align 8, !tbaa !14
br i1 %19, label %21, label %28
21: ; preds = %16
%22 = load i32, ptr @CLKDM_CAN_FORCE_SLEEP, align 4, !tbaa !15
%23 = and i32 %22, %20
%24 = icmp eq i32 %23, 0
br i1 %24, label %28, label %25
25: ; preds = %21
%26 = tail call i32 @clkdm_sleep_nolock(ptr noundef nonnull %0) #2
%27 = load i32, ptr %0, align 8, !tbaa !14
br label %28
28: ; preds = %25, %21, %16
%29 = phi i32 [ %27, %25 ], [ %20, %21 ], [ %20, %16 ]
%30 = load i32, ptr @CLKDM_CAN_ENABLE_AUTO, align 4, !tbaa !15
%31 = and i32 %30, %29
%32 = icmp eq i32 %31, 0
br i1 %32, label %57, label %33
33: ; preds = %28
%34 = load i32, ptr @CLKDM_MISSING_IDLE_REPORTING, align 4, !tbaa !15
%35 = and i32 %34, %29
%36 = icmp eq i32 %35, 0
%37 = load ptr, ptr @arch_clkdm, align 8
%38 = icmp ne ptr %37, null
%39 = select i1 %36, i1 %38, i1 false
br i1 %39, label %40, label %57
40: ; preds = %33
%41 = load ptr, ptr %37, align 8, !tbaa !16
%42 = icmp eq ptr %41, null
br i1 %42, label %57, label %43
43: ; preds = %40
%44 = getelementptr inbounds i8, ptr %0, i64 12
%45 = load i32, ptr %44, align 4, !tbaa !19
%46 = tail call i32 @pr_debug(ptr noundef nonnull @.str, i32 noundef %45) #2
%47 = load i32, ptr @_CLKDM_FLAG_HWSUP_ENABLED, align 4, !tbaa !15
%48 = getelementptr inbounds i8, ptr %0, i64 8
%49 = load i32, ptr %48, align 8, !tbaa !20
%50 = or i32 %49, %47
store i32 %50, ptr %48, align 8, !tbaa !20
%51 = load ptr, ptr @arch_clkdm, align 8, !tbaa !21
%52 = load ptr, ptr %51, align 8, !tbaa !16
%53 = tail call i32 %52(ptr noundef nonnull %0) #2
%54 = getelementptr inbounds i8, ptr %0, i64 4
%55 = load i32, ptr %54, align 4, !tbaa !22
%56 = tail call i32 @pwrdm_state_switch_nolock(i32 noundef %55) #2
br label %57
57: ; preds = %40, %33, %28, %13, %1, %43
ret void
}
declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1
declare i32 @clkdm_sleep_nolock(ptr noundef) local_unnamed_addr #1
declare i32 @pr_debug(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pwrdm_state_switch_nolock(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 24}
!7 = !{!"clockdomain", !8, i64 0, !11, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !12, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_3__", !8, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!7, !8, i64 16}
!14 = !{!7, !8, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!17, !18, i64 0}
!17 = !{!"TYPE_4__", !18, i64 0}
!18 = !{!"any pointer", !9, i64 0}
!19 = !{!7, !8, i64 12}
!20 = !{!7, !8, i64 8}
!21 = !{!18, !18, i64 0}
!22 = !{!7, !8, i64 4}
| linux_arch_arm_mach-omap2_extr_clockdomain.c_clkdm_allow_idle_nolock |
; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/cpu/musashi/extr_m68kdasm.c_d68000_eori_8.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/cpu/musashi/extr_m68kdasm.c_d68000_eori_8.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@g_dasm_str = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [15 x i8] c"eori.b %s, %s\00", align 1
@g_cpu_ir = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @d68000_eori_8], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @d68000_eori_8() #0 {
%1 = tail call ptr (...) @get_imm_str_u8() #2
%2 = load i32, ptr @g_dasm_str, align 4, !tbaa !5
%3 = load i32, ptr @g_cpu_ir, align 4, !tbaa !5
%4 = tail call ptr @get_ea_mode_str_8(i32 noundef %3) #2
%5 = tail call i32 @sprintf(i32 noundef %2, ptr noundef nonnull @.str, ptr noundef %1, ptr noundef %4) #2
ret void
}
declare ptr @get_imm_str_u8(...) local_unnamed_addr #1
declare i32 @sprintf(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @get_ea_mode_str_8(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/cpu/musashi/extr_m68kdasm.c_d68000_eori_8.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/cpu/musashi/extr_m68kdasm.c_d68000_eori_8.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@g_dasm_str = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [15 x i8] c"eori.b %s, %s\00", align 1
@g_cpu_ir = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @d68000_eori_8], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @d68000_eori_8() #0 {
%1 = tail call ptr @get_imm_str_u8() #2
%2 = load i32, ptr @g_dasm_str, align 4, !tbaa !6
%3 = load i32, ptr @g_cpu_ir, align 4, !tbaa !6
%4 = tail call ptr @get_ea_mode_str_8(i32 noundef %3) #2
%5 = tail call i32 @sprintf(i32 noundef %2, ptr noundef nonnull @.str, ptr noundef %1, ptr noundef %4) #2
ret void
}
declare ptr @get_imm_str_u8(...) local_unnamed_addr #1
declare i32 @sprintf(i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @get_ea_mode_str_8(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| Provenance_Cores_PicoDrive_cpu_musashi_extr_m68kdasm.c_d68000_eori_8 |
; ModuleID = 'AnghaBench/linux/drivers/scsi/fcoe/extr_fcoe_ctlr.c_fcoe_ctlr_vn_send_claim.c'
source_filename = "AnghaBench/linux/drivers/scsi/fcoe/extr_fcoe_ctlr.c_fcoe_ctlr_vn_send_claim.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@FIP_SC_VN_CLAIM_NOTIFY = dso_local local_unnamed_addr global i32 0, align 4
@fcoe_all_vn2vn = dso_local local_unnamed_addr global i32 0, align 4
@jiffies = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @fcoe_ctlr_vn_send_claim], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @fcoe_ctlr_vn_send_claim(ptr noundef %0) #0 {
%2 = load i32, ptr @FIP_SC_VN_CLAIM_NOTIFY, align 4, !tbaa !5
%3 = load i32, ptr @fcoe_all_vn2vn, align 4, !tbaa !5
%4 = tail call i32 @fcoe_ctlr_vn_send(ptr noundef %0, i32 noundef %2, i32 noundef %3, i32 noundef 0) #2
%5 = load i32, ptr @jiffies, align 4, !tbaa !5
store i32 %5, ptr %0, align 4, !tbaa !9
ret void
}
declare i32 @fcoe_ctlr_vn_send(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"fcoe_ctlr", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/fcoe/extr_fcoe_ctlr.c_fcoe_ctlr_vn_send_claim.c'
source_filename = "AnghaBench/linux/drivers/scsi/fcoe/extr_fcoe_ctlr.c_fcoe_ctlr_vn_send_claim.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FIP_SC_VN_CLAIM_NOTIFY = common local_unnamed_addr global i32 0, align 4
@fcoe_all_vn2vn = common local_unnamed_addr global i32 0, align 4
@jiffies = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @fcoe_ctlr_vn_send_claim], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @fcoe_ctlr_vn_send_claim(ptr noundef %0) #0 {
%2 = load i32, ptr @FIP_SC_VN_CLAIM_NOTIFY, align 4, !tbaa !6
%3 = load i32, ptr @fcoe_all_vn2vn, align 4, !tbaa !6
%4 = tail call i32 @fcoe_ctlr_vn_send(ptr noundef %0, i32 noundef %2, i32 noundef %3, i32 noundef 0) #2
%5 = load i32, ptr @jiffies, align 4, !tbaa !6
store i32 %5, ptr %0, align 4, !tbaa !10
ret void
}
declare i32 @fcoe_ctlr_vn_send(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"fcoe_ctlr", !7, i64 0}
| linux_drivers_scsi_fcoe_extr_fcoe_ctlr.c_fcoe_ctlr_vn_send_claim |
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_golomb.h_dirac_get_se_golomb.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_golomb.h_dirac_get_se_golomb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @dirac_get_se_golomb], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @dirac_get_se_golomb(ptr noundef %0) #0 {
%2 = tail call i32 @get_interleaved_ue_golomb(ptr noundef %0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = tail call i32 @get_bits1(ptr noundef %0) #2
%6 = sub nsw i32 0, %5
%7 = xor i32 %2, %6
%8 = add nsw i32 %7, %5
br label %9
9: ; preds = %4, %1
%10 = phi i32 [ %8, %4 ], [ 0, %1 ]
ret i32 %10
}
declare i32 @get_interleaved_ue_golomb(ptr noundef) local_unnamed_addr #1
declare i32 @get_bits1(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_golomb.h_dirac_get_se_golomb.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_golomb.h_dirac_get_se_golomb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dirac_get_se_golomb], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @dirac_get_se_golomb(ptr noundef %0) #0 {
%2 = tail call i32 @get_interleaved_ue_golomb(ptr noundef %0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = tail call i32 @get_bits1(ptr noundef %0) #2
%6 = sub nsw i32 0, %5
%7 = xor i32 %2, %6
%8 = add nsw i32 %7, %5
br label %9
9: ; preds = %4, %1
%10 = phi i32 [ %8, %4 ], [ 0, %1 ]
ret i32 %10
}
declare i32 @get_interleaved_ue_golomb(ptr noundef) local_unnamed_addr #1
declare i32 @get_bits1(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| FFmpeg_libavcodec_extr_golomb.h_dirac_get_se_golomb |
; ModuleID = 'AnghaBench/freebsd/contrib/binutils/libiberty/extr_partition.c_partition_delete.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/libiberty/extr_partition.c_partition_delete.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @partition_delete(i32 noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @free(i32 noundef %0) #2
ret void
}
declare i32 @free(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/binutils/libiberty/extr_partition.c_partition_delete.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/libiberty/extr_partition.c_partition_delete.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @partition_delete(i32 noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @free(i32 noundef %0) #2
ret void
}
declare i32 @free(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_binutils_libiberty_extr_partition.c_partition_delete |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/pasemi/extr_pasemi_mac.c_pasemi_mac_rx_intr.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/pasemi/extr_pasemi_mac.c_pasemi_mac_rx_intr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pasemi_mac_rxring = type { %struct.pasemi_dmachan, ptr }
%struct.pasemi_dmachan = type { ptr, i32 }
@PAS_STATUS_CAUSE_M = dso_local local_unnamed_addr global i32 0, align 4
@IRQ_NONE = dso_local local_unnamed_addr global i32 0, align 4
@PAS_STATUS_SOFT = dso_local local_unnamed_addr global i32 0, align 4
@PAS_IOB_DMA_RXCH_RESET_SINTC = dso_local local_unnamed_addr global i32 0, align 4
@PAS_STATUS_ERROR = dso_local local_unnamed_addr global i32 0, align 4
@PAS_IOB_DMA_RXCH_RESET_DINTC = dso_local local_unnamed_addr global i32 0, align 4
@IRQ_HANDLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @pasemi_mac_rx_intr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @pasemi_mac_rx_intr(i32 %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !5
%4 = load i32, ptr %3, align 4, !tbaa !11
%5 = load i32, ptr @PAS_STATUS_CAUSE_M, align 4, !tbaa !11
%6 = and i32 %5, %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %27, label %8
8: ; preds = %2
%9 = getelementptr inbounds %struct.pasemi_mac_rxring, ptr %1, i64 0, i32 1
%10 = load ptr, ptr %9, align 8, !tbaa !12
%11 = load i32, ptr @PAS_STATUS_SOFT, align 4, !tbaa !11
%12 = and i32 %11, %4
%13 = icmp eq i32 %12, 0
%14 = load i32, ptr @PAS_IOB_DMA_RXCH_RESET_SINTC, align 4
%15 = select i1 %13, i32 0, i32 %14
%16 = load i32, ptr @PAS_STATUS_ERROR, align 4, !tbaa !11
%17 = and i32 %16, %4
%18 = icmp eq i32 %17, 0
%19 = load i32, ptr @PAS_IOB_DMA_RXCH_RESET_DINTC, align 4
%20 = select i1 %18, i32 0, i32 %19
%21 = or i32 %20, %15
%22 = tail call i32 @napi_schedule(ptr noundef %10) #2
%23 = getelementptr inbounds %struct.pasemi_dmachan, ptr %1, i64 0, i32 1
%24 = load i32, ptr %23, align 8, !tbaa !14
%25 = tail call i32 @PAS_IOB_DMA_RXCH_RESET(i32 noundef %24) #2
%26 = tail call i32 @write_iob_reg(i32 noundef %25, i32 noundef %21) #2
br label %27
27: ; preds = %2, %8
%28 = phi ptr [ @IRQ_HANDLED, %8 ], [ @IRQ_NONE, %2 ]
%29 = load i32, ptr %28, align 4, !tbaa !11
ret i32 %29
}
declare i32 @napi_schedule(ptr noundef) local_unnamed_addr #1
declare i32 @write_iob_reg(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PAS_IOB_DMA_RXCH_RESET(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"pasemi_dmachan", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!13, !7, i64 16}
!13 = !{!"pasemi_mac_rxring", !6, i64 0, !7, i64 16}
!14 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/pasemi/extr_pasemi_mac.c_pasemi_mac_rx_intr.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/pasemi/extr_pasemi_mac.c_pasemi_mac_rx_intr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PAS_STATUS_CAUSE_M = common local_unnamed_addr global i32 0, align 4
@IRQ_NONE = common local_unnamed_addr global i32 0, align 4
@PAS_STATUS_SOFT = common local_unnamed_addr global i32 0, align 4
@PAS_IOB_DMA_RXCH_RESET_SINTC = common local_unnamed_addr global i32 0, align 4
@PAS_STATUS_ERROR = common local_unnamed_addr global i32 0, align 4
@PAS_IOB_DMA_RXCH_RESET_DINTC = common local_unnamed_addr global i32 0, align 4
@IRQ_HANDLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @pasemi_mac_rx_intr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @pasemi_mac_rx_intr(i32 %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !6
%4 = load i32, ptr %3, align 4, !tbaa !12
%5 = load i32, ptr @PAS_STATUS_CAUSE_M, align 4, !tbaa !12
%6 = and i32 %5, %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %27, label %8
8: ; preds = %2
%9 = getelementptr inbounds i8, ptr %1, i64 16
%10 = load ptr, ptr %9, align 8, !tbaa !13
%11 = load i32, ptr @PAS_STATUS_SOFT, align 4, !tbaa !12
%12 = and i32 %11, %4
%13 = icmp eq i32 %12, 0
%14 = load i32, ptr @PAS_IOB_DMA_RXCH_RESET_SINTC, align 4
%15 = select i1 %13, i32 0, i32 %14
%16 = load i32, ptr @PAS_STATUS_ERROR, align 4, !tbaa !12
%17 = and i32 %16, %4
%18 = icmp eq i32 %17, 0
%19 = load i32, ptr @PAS_IOB_DMA_RXCH_RESET_DINTC, align 4
%20 = select i1 %18, i32 0, i32 %19
%21 = or i32 %20, %15
%22 = tail call i32 @napi_schedule(ptr noundef %10) #2
%23 = getelementptr inbounds i8, ptr %1, i64 8
%24 = load i32, ptr %23, align 8, !tbaa !15
%25 = tail call i32 @PAS_IOB_DMA_RXCH_RESET(i32 noundef %24) #2
%26 = tail call i32 @write_iob_reg(i32 noundef %25, i32 noundef %21) #2
br label %27
27: ; preds = %2, %8
%28 = phi ptr [ @IRQ_HANDLED, %8 ], [ @IRQ_NONE, %2 ]
%29 = load i32, ptr %28, align 4, !tbaa !12
ret i32 %29
}
declare i32 @napi_schedule(ptr noundef) local_unnamed_addr #1
declare i32 @write_iob_reg(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @PAS_IOB_DMA_RXCH_RESET(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"pasemi_dmachan", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!14, !8, i64 16}
!14 = !{!"pasemi_mac_rxring", !7, i64 0, !8, i64 16}
!15 = !{!7, !11, i64 8}
| linux_drivers_net_ethernet_pasemi_extr_pasemi_mac.c_pasemi_mac_rx_intr |
; ModuleID = 'AnghaBench/fastsocket/kernel/mm/extr_memcontrol.c_mem_cgroup_zone_nr_pages.c'
source_filename = "AnghaBench/fastsocket/kernel/mm/extr_memcontrol.c_mem_cgroup_zone_nr_pages.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i64 @mem_cgroup_zone_nr_pages(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load ptr, ptr %1, align 8, !tbaa !5
%5 = load i32, ptr %4, align 4, !tbaa !10
%6 = tail call i32 @zone_idx(ptr noundef nonnull %1) #2
%7 = tail call ptr @mem_cgroup_zoneinfo(ptr noundef %0, i32 noundef %5, i32 noundef %6) #2
%8 = tail call i64 @MEM_CGROUP_ZSTAT(ptr noundef %7, i32 noundef %2) #2
ret i64 %8
}
declare i32 @zone_idx(ptr noundef) local_unnamed_addr #1
declare ptr @mem_cgroup_zoneinfo(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @MEM_CGROUP_ZSTAT(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"zone", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/mm/extr_memcontrol.c_mem_cgroup_zone_nr_pages.c'
source_filename = "AnghaBench/fastsocket/kernel/mm/extr_memcontrol.c_mem_cgroup_zone_nr_pages.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @mem_cgroup_zone_nr_pages(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load ptr, ptr %1, align 8, !tbaa !6
%5 = load i32, ptr %4, align 4, !tbaa !11
%6 = tail call i32 @zone_idx(ptr noundef nonnull %1) #2
%7 = tail call ptr @mem_cgroup_zoneinfo(ptr noundef %0, i32 noundef %5, i32 noundef %6) #2
%8 = tail call i64 @MEM_CGROUP_ZSTAT(ptr noundef %7, i32 noundef %2) #2
ret i64 %8
}
declare i32 @zone_idx(ptr noundef) local_unnamed_addr #1
declare ptr @mem_cgroup_zoneinfo(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @MEM_CGROUP_ZSTAT(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"zone", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"int", !9, i64 0}
| fastsocket_kernel_mm_extr_memcontrol.c_mem_cgroup_zone_nr_pages |
; ModuleID = 'AnghaBench/linux/sound/pci/hda/extr_hda_local.h_snd_hda_sync_power_state.c'
source_filename = "AnghaBench/linux/sound/pci/hda/extr_hda_local.h_snd_hda_sync_power_state.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_hda_sync_power_state], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @snd_hda_sync_power_state(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = tail call i32 @snd_hdac_sync_power_state(ptr noundef %0, i32 noundef %1, i32 noundef %2) #2
ret i32 %4
}
declare i32 @snd_hdac_sync_power_state(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/sound/pci/hda/extr_hda_local.h_snd_hda_sync_power_state.c'
source_filename = "AnghaBench/linux/sound/pci/hda/extr_hda_local.h_snd_hda_sync_power_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @snd_hda_sync_power_state], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @snd_hda_sync_power_state(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = tail call i32 @snd_hdac_sync_power_state(ptr noundef %0, i32 noundef %1, i32 noundef %2) #2
ret i32 %4
}
declare i32 @snd_hdac_sync_power_state(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_sound_pci_hda_extr_hda_local.h_snd_hda_sync_power_state |
; ModuleID = 'AnghaBench/freebsd/libexec/rtld-elf/extr_rtld_lock.c_thread_mask_set.c'
source_filename = "AnghaBench/freebsd/libexec/rtld-elf/extr_rtld_lock.c_thread_mask_set.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { ptr }
@lockinfo = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @thread_mask_set], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @thread_mask_set(i32 noundef %0) #0 {
%2 = load ptr, ptr @lockinfo, align 8, !tbaa !5
%3 = tail call i32 %2(i32 noundef %0) #1
ret i32 %3
}
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/libexec/rtld-elf/extr_rtld_lock.c_thread_mask_set.c'
source_filename = "AnghaBench/freebsd/libexec/rtld-elf/extr_rtld_lock.c_thread_mask_set.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { ptr }
@lockinfo = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
@llvm.used = appending global [1 x ptr] [ptr @thread_mask_set], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @thread_mask_set(i32 noundef %0) #0 {
%2 = load ptr, ptr @lockinfo, align 8, !tbaa !6
%3 = tail call i32 %2(i32 noundef %0) #1
ret i32 %3
}
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_libexec_rtld-elf_extr_rtld_lock.c_thread_mask_set |
; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/dtrace/extr_dtrace.c_dtrace_match_string.c'
source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/dtrace/extr_dtrace.c_dtrace_match_string.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @dtrace_match_string], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @dtrace_match_string(ptr noundef %0, ptr noundef %1, i32 %2) #0 {
%4 = icmp eq ptr %0, null
br i1 %4, label %9, label %5
5: ; preds = %3
%6 = tail call i64 @strcmp(ptr noundef nonnull %0, ptr noundef %1) #2
%7 = icmp eq i64 %6, 0
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %5, %3
%10 = phi i32 [ 0, %3 ], [ %8, %5 ]
ret i32 %10
}
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/dtrace/extr_dtrace.c_dtrace_match_string.c'
source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/dtrace/extr_dtrace.c_dtrace_match_string.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dtrace_match_string], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @dtrace_match_string(ptr noundef %0, ptr noundef %1, i32 %2) #0 {
%4 = icmp eq ptr %0, null
br i1 %4, label %9, label %5
5: ; preds = %3
%6 = tail call i64 @strcmp(ptr noundef nonnull %0, ptr noundef %1) #2
%7 = icmp eq i64 %6, 0
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %5, %3
%10 = phi i32 [ 0, %3 ], [ %8, %5 ]
ret i32 %10
}
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_sys_cddl_contrib_opensolaris_uts_common_dtrace_extr_dtrace.c_dtrace_match_string |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/rapidio/extr_rio-driver.c_rio_dev_put.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/rapidio/extr_rio-driver.c_rio_dev_put.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @rio_dev_put(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @put_device(ptr noundef nonnull %0) #2
br label %5
5: ; preds = %3, %1
ret void
}
declare i32 @put_device(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/rapidio/extr_rio-driver.c_rio_dev_put.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/rapidio/extr_rio-driver.c_rio_dev_put.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @rio_dev_put(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %5, label %3
3: ; preds = %1
%4 = tail call i32 @put_device(ptr noundef nonnull %0) #2
br label %5
5: ; preds = %3, %1
ret void
}
declare i32 @put_device(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_rapidio_extr_rio-driver.c_rio_dev_put |
; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv6/extr_reassembly.c_ip6_frags_sysctl_register.c'
source_filename = "AnghaBench/fastsocket/kernel/net/ipv6/extr_reassembly.c_ip6_frags_sysctl_register.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ip6_frags_sysctl_register], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @ip6_frags_sysctl_register() #0 {
ret i32 0
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv6/extr_reassembly.c_ip6_frags_sysctl_register.c'
source_filename = "AnghaBench/fastsocket/kernel/net/ipv6/extr_reassembly.c_ip6_frags_sysctl_register.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ip6_frags_sysctl_register], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @ip6_frags_sysctl_register() #0 {
ret i32 0
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_net_ipv6_extr_reassembly.c_ip6_frags_sysctl_register |
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/ap/extr_wps_hostapd.c_wps_stop_registrar.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/ap/extr_wps_hostapd.c_wps_stop_registrar.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.wps_stop_reg_data = type { i32, i32, i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @wps_stop_registrar], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @wps_stop_registrar(ptr noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds %struct.wps_stop_reg_data, ptr %1, i64 0, i32 3
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = icmp eq ptr %4, %0
br i1 %5, label %17, label %6
6: ; preds = %2
%7 = load ptr, ptr %0, align 8, !tbaa !11
%8 = icmp eq ptr %7, null
br i1 %8, label %17, label %9
9: ; preds = %6
%10 = load i32, ptr %7, align 4, !tbaa !13
%11 = getelementptr inbounds %struct.wps_stop_reg_data, ptr %1, i64 0, i32 2
%12 = load i32, ptr %11, align 8, !tbaa !15
%13 = getelementptr inbounds %struct.wps_stop_reg_data, ptr %1, i64 0, i32 1
%14 = load i32, ptr %13, align 4, !tbaa !16
%15 = load i32, ptr %1, align 8, !tbaa !17
%16 = tail call i32 @wps_registrar_complete(i32 noundef %10, i32 noundef %12, i32 noundef %14, i32 noundef %15) #2
br label %17
17: ; preds = %9, %6, %2
ret i32 0
}
declare i32 @wps_registrar_complete(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"wps_stop_reg_data", !7, i64 0, !7, i64 4, !7, i64 8, !10, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"hostapd_data", !10, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_2__", !7, i64 0}
!15 = !{!6, !7, i64 8}
!16 = !{!6, !7, i64 4}
!17 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/ap/extr_wps_hostapd.c_wps_stop_registrar.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/ap/extr_wps_hostapd.c_wps_stop_registrar.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @wps_stop_registrar], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @wps_stop_registrar(ptr noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 16
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = icmp eq ptr %4, %0
br i1 %5, label %17, label %6
6: ; preds = %2
%7 = load ptr, ptr %0, align 8, !tbaa !12
%8 = icmp eq ptr %7, null
br i1 %8, label %17, label %9
9: ; preds = %6
%10 = load i32, ptr %7, align 4, !tbaa !14
%11 = getelementptr inbounds i8, ptr %1, i64 8
%12 = load i32, ptr %11, align 8, !tbaa !16
%13 = getelementptr inbounds i8, ptr %1, i64 4
%14 = load i32, ptr %13, align 4, !tbaa !17
%15 = load i32, ptr %1, align 8, !tbaa !18
%16 = tail call i32 @wps_registrar_complete(i32 noundef %10, i32 noundef %12, i32 noundef %14, i32 noundef %15) #2
br label %17
17: ; preds = %9, %6, %2
ret i32 0
}
declare i32 @wps_registrar_complete(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"wps_stop_reg_data", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"hostapd_data", !11, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"TYPE_2__", !8, i64 0}
!16 = !{!7, !8, i64 8}
!17 = !{!7, !8, i64 4}
!18 = !{!7, !8, i64 0}
| freebsd_contrib_wpa_src_ap_extr_wps_hostapd.c_wps_stop_registrar |
; ModuleID = 'AnghaBench/exploitdb/exploits/windows/dos/extr_20099.c_sends.c'
source_filename = "AnghaBench/exploitdb/exploits/windows/dos/extr_20099.c_sends.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @sends(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @strlen(ptr noundef %1) #2
%4 = tail call i32 @write(i32 noundef %0, ptr noundef %1, i32 noundef %3) #2
ret void
}
declare i32 @write(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/exploitdb/exploits/windows/dos/extr_20099.c_sends.c'
source_filename = "AnghaBench/exploitdb/exploits/windows/dos/extr_20099.c_sends.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @sends(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @strlen(ptr noundef %1) #2
%4 = tail call i32 @write(i32 noundef %0, ptr noundef %1, i32 noundef %3) #2
ret void
}
declare i32 @write(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| exploitdb_exploits_windows_dos_extr_20099.c_sends |
; ModuleID = 'AnghaBench/reactos/drivers/filesystems/ntfs/extr_close.c_NtfsClose.c'
source_filename = "AnghaBench/reactos/drivers/filesystems/ntfs/extr_close.c_NtfsClose.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_12__ = type { ptr, i32, i32, ptr }
@.str = private unnamed_addr constant [20 x i8] c"NtfsClose() called\0A\00", align 1
@NtfsGlobalData = dso_local local_unnamed_addr global ptr null, align 8
@.str.1 = private unnamed_addr constant [21 x i8] c"Closing file system\0A\00", align 1
@STATUS_SUCCESS = dso_local local_unnamed_addr global i64 0, align 8
@IRPCONTEXT_CANWAIT = dso_local local_unnamed_addr global i32 0, align 4
@STATUS_PENDING = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i64 @NtfsClose(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @DPRINT(ptr noundef nonnull @.str) #2
%3 = getelementptr inbounds %struct.TYPE_12__, ptr %0, i64 0, i32 3
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = load ptr, ptr @NtfsGlobalData, align 8, !tbaa !11
%6 = load ptr, ptr %5, align 8, !tbaa !12
%7 = icmp eq ptr %4, %6
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = tail call i32 @DPRINT(ptr noundef nonnull @.str.1) #2
%10 = load ptr, ptr %0, align 8, !tbaa !14
store i64 0, ptr %10, align 8, !tbaa !15
%11 = load i64, ptr @STATUS_SUCCESS, align 8, !tbaa !19
br label %33
12: ; preds = %1
%13 = getelementptr inbounds %struct.TYPE_12__, ptr %0, i64 0, i32 2
%14 = load i32, ptr %13, align 4, !tbaa !20
%15 = load ptr, ptr %4, align 8, !tbaa !21
%16 = getelementptr inbounds %struct.TYPE_12__, ptr %0, i64 0, i32 1
%17 = load i32, ptr %16, align 8, !tbaa !23
%18 = load i32, ptr @IRPCONTEXT_CANWAIT, align 4, !tbaa !24
%19 = tail call i32 @BooleanFlagOn(i32 noundef %17, i32 noundef %18) #2
%20 = tail call i32 @ExAcquireResourceExclusiveLite(ptr noundef %15, i32 noundef %19) #2
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %24
22: ; preds = %12
%23 = tail call i64 @NtfsMarkIrpContextForQueue(ptr noundef nonnull %0) #2
br label %33
24: ; preds = %12
%25 = tail call i64 @NtfsCloseFile(ptr noundef %15, i32 noundef %14) #2
%26 = tail call i32 @ExReleaseResourceLite(ptr noundef %15) #2
%27 = load i64, ptr @STATUS_PENDING, align 8, !tbaa !19
%28 = icmp eq i64 %25, %27
br i1 %28, label %29, label %31
29: ; preds = %24
%30 = tail call i64 @NtfsMarkIrpContextForQueue(ptr noundef nonnull %0) #2
br label %33
31: ; preds = %24
%32 = load ptr, ptr %0, align 8, !tbaa !14
store i64 0, ptr %32, align 8, !tbaa !15
br label %33
33: ; preds = %31, %29, %22, %8
%34 = phi i64 [ %11, %8 ], [ %30, %29 ], [ %25, %31 ], [ %23, %22 ]
ret i64 %34
}
declare i32 @DPRINT(ptr noundef) local_unnamed_addr #1
declare i32 @ExAcquireResourceExclusiveLite(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BooleanFlagOn(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @NtfsMarkIrpContextForQueue(ptr noundef) local_unnamed_addr #1
declare i64 @NtfsCloseFile(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExReleaseResourceLite(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"TYPE_12__", !7, i64 0, !10, i64 8, !10, i64 12, !7, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"TYPE_15__", !7, i64 0}
!14 = !{!6, !7, i64 0}
!15 = !{!16, !18, i64 0}
!16 = !{!"TYPE_11__", !17, i64 0}
!17 = !{!"TYPE_10__", !18, i64 0}
!18 = !{!"long", !8, i64 0}
!19 = !{!18, !18, i64 0}
!20 = !{!6, !10, i64 12}
!21 = !{!22, !7, i64 0}
!22 = !{!"TYPE_13__", !7, i64 0}
!23 = !{!6, !10, i64 8}
!24 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/reactos/drivers/filesystems/ntfs/extr_close.c_NtfsClose.c'
source_filename = "AnghaBench/reactos/drivers/filesystems/ntfs/extr_close.c_NtfsClose.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [20 x i8] c"NtfsClose() called\0A\00", align 1
@NtfsGlobalData = common local_unnamed_addr global ptr null, align 8
@.str.1 = private unnamed_addr constant [21 x i8] c"Closing file system\0A\00", align 1
@STATUS_SUCCESS = common local_unnamed_addr global i64 0, align 8
@IRPCONTEXT_CANWAIT = common local_unnamed_addr global i32 0, align 4
@STATUS_PENDING = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @NtfsClose(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @DPRINT(ptr noundef nonnull @.str) #2
%3 = getelementptr inbounds i8, ptr %0, i64 16
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load ptr, ptr @NtfsGlobalData, align 8, !tbaa !12
%6 = load ptr, ptr %5, align 8, !tbaa !13
%7 = icmp eq ptr %4, %6
br i1 %7, label %8, label %12
8: ; preds = %1
%9 = tail call i32 @DPRINT(ptr noundef nonnull @.str.1) #2
%10 = load ptr, ptr %0, align 8, !tbaa !15
store i64 0, ptr %10, align 8, !tbaa !16
%11 = load i64, ptr @STATUS_SUCCESS, align 8, !tbaa !20
br label %33
12: ; preds = %1
%13 = getelementptr inbounds i8, ptr %0, i64 12
%14 = load i32, ptr %13, align 4, !tbaa !21
%15 = load ptr, ptr %4, align 8, !tbaa !22
%16 = getelementptr inbounds i8, ptr %0, i64 8
%17 = load i32, ptr %16, align 8, !tbaa !24
%18 = load i32, ptr @IRPCONTEXT_CANWAIT, align 4, !tbaa !25
%19 = tail call i32 @BooleanFlagOn(i32 noundef %17, i32 noundef %18) #2
%20 = tail call i32 @ExAcquireResourceExclusiveLite(ptr noundef %15, i32 noundef %19) #2
%21 = icmp eq i32 %20, 0
br i1 %21, label %22, label %24
22: ; preds = %12
%23 = tail call i64 @NtfsMarkIrpContextForQueue(ptr noundef nonnull %0) #2
br label %33
24: ; preds = %12
%25 = tail call i64 @NtfsCloseFile(ptr noundef %15, i32 noundef %14) #2
%26 = tail call i32 @ExReleaseResourceLite(ptr noundef %15) #2
%27 = load i64, ptr @STATUS_PENDING, align 8, !tbaa !20
%28 = icmp eq i64 %25, %27
br i1 %28, label %29, label %31
29: ; preds = %24
%30 = tail call i64 @NtfsMarkIrpContextForQueue(ptr noundef nonnull %0) #2
br label %33
31: ; preds = %24
%32 = load ptr, ptr %0, align 8, !tbaa !15
store i64 0, ptr %32, align 8, !tbaa !16
br label %33
33: ; preds = %31, %29, %22, %8
%34 = phi i64 [ %11, %8 ], [ %30, %29 ], [ %25, %31 ], [ %23, %22 ]
ret i64 %34
}
declare i32 @DPRINT(ptr noundef) local_unnamed_addr #1
declare i32 @ExAcquireResourceExclusiveLite(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BooleanFlagOn(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @NtfsMarkIrpContextForQueue(ptr noundef) local_unnamed_addr #1
declare i64 @NtfsCloseFile(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExReleaseResourceLite(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"TYPE_12__", !8, i64 0, !11, i64 8, !11, i64 12, !8, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"TYPE_15__", !8, i64 0}
!15 = !{!7, !8, i64 0}
!16 = !{!17, !19, i64 0}
!17 = !{!"TYPE_11__", !18, i64 0}
!18 = !{!"TYPE_10__", !19, i64 0}
!19 = !{!"long", !9, i64 0}
!20 = !{!19, !19, i64 0}
!21 = !{!7, !11, i64 12}
!22 = !{!23, !8, i64 0}
!23 = !{!"TYPE_13__", !8, i64 0}
!24 = !{!7, !11, i64 8}
!25 = !{!11, !11, i64 0}
| reactos_drivers_filesystems_ntfs_extr_close.c_NtfsClose |
; ModuleID = 'AnghaBench/RetroArch/wii/libogc/libfat/extr_partition.c__FAT_partition_getPartitionFromPath.c'
source_filename = "AnghaBench/RetroArch/wii/libogc/libfat/extr_partition.c__FAT_partition_getPartitionFromPath.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local ptr @_FAT_partition_getPartitionFromPath(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @GetDeviceOpTab(ptr noundef %0) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = load i64, ptr %2, align 8, !tbaa !5
%6 = inttoptr i64 %5 to ptr
br label %7
7: ; preds = %1, %4
%8 = phi ptr [ %6, %4 ], [ null, %1 ]
ret ptr %8
}
declare ptr @GetDeviceOpTab(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/RetroArch/wii/libogc/libfat/extr_partition.c__FAT_partition_getPartitionFromPath.c'
source_filename = "AnghaBench/RetroArch/wii/libogc/libfat/extr_partition.c__FAT_partition_getPartitionFromPath.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @_FAT_partition_getPartitionFromPath(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @GetDeviceOpTab(ptr noundef %0) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = load i64, ptr %2, align 8, !tbaa !6
%6 = inttoptr i64 %5 to ptr
br label %7
7: ; preds = %1, %4
%8 = phi ptr [ %6, %4 ], [ null, %1 ]
ret ptr %8
}
declare ptr @GetDeviceOpTab(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| RetroArch_wii_libogc_libfat_extr_partition.c__FAT_partition_getPartitionFromPath |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/huawei/hinic/extr_hinic_tx.c_hinic_txq_clean_stats.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/huawei/hinic/extr_hinic_tx.c_hinic_txq_clean_stats.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.hinic_txq_stats = type { i32, i64, i64, i64, i64, i64, i64 }
; Function Attrs: nounwind uwtable
define dso_local void @hinic_txq_clean_stats(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @u64_stats_update_begin(ptr noundef %0) #3
%3 = getelementptr inbounds %struct.hinic_txq_stats, ptr %0, i64 0, i32 1
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(48) %3, i8 0, i64 48, i1 false)
%4 = tail call i32 @u64_stats_update_end(ptr noundef %0) #3
ret void
}
declare i32 @u64_stats_update_begin(ptr noundef) local_unnamed_addr #1
declare i32 @u64_stats_update_end(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/huawei/hinic/extr_hinic_tx.c_hinic_txq_clean_stats.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/huawei/hinic/extr_hinic_tx.c_hinic_txq_clean_stats.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @hinic_txq_clean_stats(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @u64_stats_update_begin(ptr noundef %0) #3
%3 = getelementptr inbounds i8, ptr %0, i64 8
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(48) %3, i8 0, i64 48, i1 false)
%4 = tail call i32 @u64_stats_update_end(ptr noundef %0) #3
ret void
}
declare i32 @u64_stats_update_begin(ptr noundef) local_unnamed_addr #1
declare i32 @u64_stats_update_end(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_net_ethernet_huawei_hinic_extr_hinic_tx.c_hinic_txq_clean_stats |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/extr_tg3.c_tg3_init_bcm8002.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/extr_tg3.c_tg3_init_bcm8002.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MAC_STATUS = dso_local local_unnamed_addr global i32 0, align 4
@INIT_COMPLETE = dso_local local_unnamed_addr global i32 0, align 4
@MAC_STATUS_PCS_SYNCED = dso_local local_unnamed_addr global i32 0, align 4
@MII_BMCR = dso_local local_unnamed_addr global i32 0, align 4
@BMCR_RESET = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @tg3_init_bcm8002], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @tg3_init_bcm8002(ptr noundef %0) #0 {
%2 = load i32, ptr @MAC_STATUS, align 4, !tbaa !5
%3 = tail call i32 @tr32(i32 noundef %2) #2
%4 = load i32, ptr @INIT_COMPLETE, align 4, !tbaa !5
%5 = tail call i64 @tg3_flag(ptr noundef %0, i32 noundef %4) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i32, ptr @MAC_STATUS_PCS_SYNCED, align 4, !tbaa !5
%9 = and i32 %8, %3
%10 = icmp eq i32 %9, 0
br i1 %10, label %39, label %11
11: ; preds = %7, %1
%12 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 22, i32 noundef 32775) #2
%13 = load i32, ptr @MII_BMCR, align 4, !tbaa !5
%14 = load i32, ptr @BMCR_RESET, align 4, !tbaa !5
%15 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef %13, i32 noundef %14) #2
br label %16
16: ; preds = %11, %16
%17 = phi i32 [ 0, %11 ], [ %19, %16 ]
%18 = tail call i32 @udelay(i32 noundef 10) #2
%19 = add nuw nsw i32 %17, 1
%20 = icmp eq i32 %19, 500
br i1 %20, label %21, label %16, !llvm.loop !9
21: ; preds = %16
%22 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 16, i32 noundef 33809) #2
%23 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 17, i32 noundef 2576) #2
%24 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 24, i32 noundef 160) #2
%25 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 22, i32 noundef 16895) #2
%26 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 19, i32 noundef 1024) #2
%27 = tail call i32 @udelay(i32 noundef 40) #2
%28 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 19, i32 noundef 0) #2
%29 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 17, i32 noundef 2640) #2
%30 = tail call i32 @udelay(i32 noundef 40) #2
%31 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 17, i32 noundef 2576) #2
br label %32
32: ; preds = %21, %32
%33 = phi i32 [ 0, %21 ], [ %35, %32 ]
%34 = tail call i32 @udelay(i32 noundef 10) #2
%35 = add nuw nsw i32 %33, 1
%36 = icmp eq i32 %35, 15000
br i1 %36, label %37, label %32, !llvm.loop !11
37: ; preds = %32
%38 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 16, i32 noundef 32785) #2
br label %39
39: ; preds = %7, %37
ret void
}
declare i32 @tr32(i32 noundef) local_unnamed_addr #1
declare i64 @tg3_flag(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tg3_writephy(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
!11 = distinct !{!11, !10}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/extr_tg3.c_tg3_init_bcm8002.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/extr_tg3.c_tg3_init_bcm8002.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MAC_STATUS = common local_unnamed_addr global i32 0, align 4
@INIT_COMPLETE = common local_unnamed_addr global i32 0, align 4
@MAC_STATUS_PCS_SYNCED = common local_unnamed_addr global i32 0, align 4
@MII_BMCR = common local_unnamed_addr global i32 0, align 4
@BMCR_RESET = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @tg3_init_bcm8002], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @tg3_init_bcm8002(ptr noundef %0) #0 {
%2 = load i32, ptr @MAC_STATUS, align 4, !tbaa !6
%3 = tail call i32 @tr32(i32 noundef %2) #2
%4 = load i32, ptr @INIT_COMPLETE, align 4, !tbaa !6
%5 = tail call i64 @tg3_flag(ptr noundef %0, i32 noundef %4) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %1
%8 = load i32, ptr @MAC_STATUS_PCS_SYNCED, align 4, !tbaa !6
%9 = and i32 %8, %3
%10 = icmp eq i32 %9, 0
br i1 %10, label %39, label %11
11: ; preds = %7, %1
%12 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 22, i32 noundef 32775) #2
%13 = load i32, ptr @MII_BMCR, align 4, !tbaa !6
%14 = load i32, ptr @BMCR_RESET, align 4, !tbaa !6
%15 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef %13, i32 noundef %14) #2
br label %16
16: ; preds = %11, %16
%17 = phi i32 [ 0, %11 ], [ %19, %16 ]
%18 = tail call i32 @udelay(i32 noundef 10) #2
%19 = add nuw nsw i32 %17, 1
%20 = icmp eq i32 %19, 500
br i1 %20, label %21, label %16, !llvm.loop !10
21: ; preds = %16
%22 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 16, i32 noundef 33809) #2
%23 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 17, i32 noundef 2576) #2
%24 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 24, i32 noundef 160) #2
%25 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 22, i32 noundef 16895) #2
%26 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 19, i32 noundef 1024) #2
%27 = tail call i32 @udelay(i32 noundef 40) #2
%28 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 19, i32 noundef 0) #2
%29 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 17, i32 noundef 2640) #2
%30 = tail call i32 @udelay(i32 noundef 40) #2
%31 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 17, i32 noundef 2576) #2
br label %32
32: ; preds = %21, %32
%33 = phi i32 [ 0, %21 ], [ %35, %32 ]
%34 = tail call i32 @udelay(i32 noundef 10) #2
%35 = add nuw nsw i32 %33, 1
%36 = icmp eq i32 %35, 15000
br i1 %36, label %37, label %32, !llvm.loop !12
37: ; preds = %32
%38 = tail call i32 @tg3_writephy(ptr noundef %0, i32 noundef 16, i32 noundef 32785) #2
br label %39
39: ; preds = %7, %37
ret void
}
declare i32 @tr32(i32 noundef) local_unnamed_addr #1
declare i64 @tg3_flag(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tg3_writephy(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
!12 = distinct !{!12, !11}
| linux_drivers_net_ethernet_broadcom_extr_tg3.c_tg3_init_bcm8002 |
; ModuleID = 'AnghaBench/linux/drivers/staging/media/hantro/extr_hantro_vp8.c_hantro_vp8_dec_exit.c'
source_filename = "AnghaBench/linux/drivers/staging/media/hantro/extr_hantro_vp8.c_hantro_vp8_dec_exit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.hantro_ctx = type { ptr, %struct.hantro_vp8_dec_hw_ctx }
%struct.hantro_vp8_dec_hw_ctx = type { %struct.TYPE_3__, %struct.TYPE_4__ }
%struct.TYPE_3__ = type { i32, i32, i32 }
%struct.TYPE_4__ = type { i32, i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local void @hantro_vp8_dec_exit(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.hantro_ctx, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load i32, ptr %3, align 4, !tbaa !14
%5 = getelementptr inbounds %struct.hantro_ctx, ptr %0, i64 0, i32 1, i32 1
%6 = getelementptr inbounds %struct.hantro_ctx, ptr %0, i64 0, i32 1, i32 1, i32 2
%7 = load i32, ptr %6, align 4, !tbaa !16
%8 = getelementptr inbounds %struct.hantro_ctx, ptr %0, i64 0, i32 1, i32 1, i32 1
%9 = load i32, ptr %8, align 4, !tbaa !17
%10 = load i32, ptr %5, align 4, !tbaa !18
%11 = tail call i32 @dma_free_coherent(i32 noundef %4, i32 noundef %7, i32 noundef %9, i32 noundef %10) #2
%12 = load i32, ptr %3, align 4, !tbaa !14
%13 = getelementptr inbounds %struct.hantro_ctx, ptr %0, i64 0, i32 1, i32 0, i32 2
%14 = load i32, ptr %13, align 4, !tbaa !19
%15 = getelementptr inbounds %struct.hantro_ctx, ptr %0, i64 0, i32 1, i32 0, i32 1
%16 = load i32, ptr %15, align 4, !tbaa !20
%17 = load i32, ptr %2, align 4, !tbaa !21
%18 = tail call i32 @dma_free_coherent(i32 noundef %12, i32 noundef %14, i32 noundef %16, i32 noundef %17) #2
ret void
}
declare i32 @dma_free_coherent(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"hantro_ctx", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"hantro_vp8_dec_hw_ctx", !11, i64 0, !13, i64 12}
!11 = !{!"TYPE_3__", !12, i64 0, !12, i64 4, !12, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!"TYPE_4__", !12, i64 0, !12, i64 4, !12, i64 8}
!14 = !{!15, !12, i64 0}
!15 = !{!"hantro_dev", !12, i64 0}
!16 = !{!10, !12, i64 20}
!17 = !{!10, !12, i64 16}
!18 = !{!10, !12, i64 12}
!19 = !{!10, !12, i64 8}
!20 = !{!10, !12, i64 4}
!21 = !{!10, !12, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/staging/media/hantro/extr_hantro_vp8.c_hantro_vp8_dec_exit.c'
source_filename = "AnghaBench/linux/drivers/staging/media/hantro/extr_hantro_vp8.c_hantro_vp8_dec_exit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @hantro_vp8_dec_exit(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load i32, ptr %3, align 4, !tbaa !15
%5 = getelementptr inbounds i8, ptr %0, i64 20
%6 = getelementptr inbounds i8, ptr %0, i64 28
%7 = load i32, ptr %6, align 4, !tbaa !17
%8 = getelementptr inbounds i8, ptr %0, i64 24
%9 = load i32, ptr %8, align 4, !tbaa !18
%10 = load i32, ptr %5, align 4, !tbaa !19
%11 = tail call i32 @dma_free_coherent(i32 noundef %4, i32 noundef %7, i32 noundef %9, i32 noundef %10) #2
%12 = load i32, ptr %3, align 4, !tbaa !15
%13 = getelementptr inbounds i8, ptr %0, i64 16
%14 = load i32, ptr %13, align 4, !tbaa !20
%15 = getelementptr inbounds i8, ptr %0, i64 12
%16 = load i32, ptr %15, align 4, !tbaa !21
%17 = load i32, ptr %2, align 4, !tbaa !22
%18 = tail call i32 @dma_free_coherent(i32 noundef %12, i32 noundef %14, i32 noundef %16, i32 noundef %17) #2
ret void
}
declare i32 @dma_free_coherent(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"hantro_ctx", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"hantro_vp8_dec_hw_ctx", !12, i64 0, !14, i64 12}
!12 = !{!"TYPE_3__", !13, i64 0, !13, i64 4, !13, i64 8}
!13 = !{!"int", !9, i64 0}
!14 = !{!"TYPE_4__", !13, i64 0, !13, i64 4, !13, i64 8}
!15 = !{!16, !13, i64 0}
!16 = !{!"hantro_dev", !13, i64 0}
!17 = !{!11, !13, i64 20}
!18 = !{!11, !13, i64 16}
!19 = !{!11, !13, i64 12}
!20 = !{!11, !13, i64 8}
!21 = !{!11, !13, i64 4}
!22 = !{!11, !13, i64 0}
| linux_drivers_staging_media_hantro_extr_hantro_vp8.c_hantro_vp8_dec_exit |
; ModuleID = 'AnghaBench/freebsd/sys/contrib/ncsw/Peripherals/FM/extr_fm_ncsw.c_FmSetMacMaxFrame.c'
source_filename = "AnghaBench/freebsd/sys/contrib/ncsw/Peripherals/FM/extr_fm_ncsw.c_FmSetMacMaxFrame.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_11__ = type { i64, %struct.TYPE_8__ }
%struct.TYPE_8__ = type { i64, i64 }
%struct.TYPE_10__ = type { i32, i32 }
%struct.TYPE_12__ = type { i64, ptr, ptr }
%struct.TYPE_9__ = type { ptr, ptr, ptr, ptr }
@NCSW_MASTER_ID = dso_local local_unnamed_addr global i64 0, align 8
@FM_SET_MAC_MAX_FRAME = dso_local local_unnamed_addr global i32 0, align 4
@E_OK = dso_local local_unnamed_addr global i64 0, align 8
@MINOR = dso_local local_unnamed_addr global i32 0, align 4
@NO_MSG = dso_local local_unnamed_addr global ptr null, align 8
@E_NOT_SUPPORTED = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [35 x i8] c"running in guest-mode without IPC!\00", align 1
@E_INVALID_VALUE = dso_local local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [54 x i8] c"MAC maxFrameLength is larger than Port maxFrameLength\00", align 1
@e_FM_MAC_10G = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i64 @FmSetMacMaxFrame(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = alloca %struct.TYPE_11__, align 8
%6 = alloca %struct.TYPE_10__, align 4
%7 = inttoptr i64 %0 to ptr
%8 = load i64, ptr %7, align 8, !tbaa !5
%9 = load i64, ptr @NCSW_MASTER_ID, align 8, !tbaa !11
%10 = icmp eq i64 %8, %9
br i1 %10, label %40, label %11
11: ; preds = %4
%12 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 2
%13 = load ptr, ptr %12, align 8, !tbaa !12
%14 = load i64, ptr %13, align 8, !tbaa !11
%15 = icmp eq i64 %14, 0
br i1 %15, label %36, label %16
16: ; preds = %11
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
%17 = call i32 @memset(ptr noundef nonnull %6, i32 noundef 0, i32 noundef 8) #3
%18 = getelementptr inbounds %struct.TYPE_11__, ptr %5, i64 0, i32 1
store i64 %2, ptr %18, align 8, !tbaa !13
%19 = getelementptr inbounds %struct.TYPE_11__, ptr %5, i64 0, i32 1, i32 1
store i64 %1, ptr %19, align 8, !tbaa !16
store i64 %3, ptr %5, align 8, !tbaa !17
%20 = load i32, ptr @FM_SET_MAC_MAX_FRAME, align 4, !tbaa !18
%21 = getelementptr inbounds %struct.TYPE_10__, ptr %6, i64 0, i32 1
store i32 %20, ptr %21, align 4, !tbaa !20
%22 = load i32, ptr %6, align 4, !tbaa !22
%23 = call i32 @memcpy(i32 noundef %22, ptr noundef nonnull %5, i32 noundef 24) #3
%24 = load ptr, ptr %12, align 8, !tbaa !12
%25 = load i64, ptr %24, align 8, !tbaa !11
%26 = call i64 @XX_IpcSendMessage(i64 noundef %25, ptr noundef nonnull %6, i32 noundef 28, ptr noundef null, ptr noundef null, ptr noundef null, ptr noundef null) #3
%27 = load i64, ptr @E_OK, align 8, !tbaa !11
%28 = icmp eq i64 %26, %27
br i1 %28, label %34, label %29
29: ; preds = %16
%30 = load i32, ptr @MINOR, align 4, !tbaa !18
%31 = load ptr, ptr @NO_MSG, align 8, !tbaa !23
%32 = call i32 @RETURN_ERROR(i32 noundef %30, i64 noundef %26, ptr noundef %31) #3
%33 = load i64, ptr @E_OK, align 8, !tbaa !11
br label %34
34: ; preds = %29, %16
%35 = phi i64 [ %33, %29 ], [ %26, %16 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3
br label %61
36: ; preds = %11
%37 = load i32, ptr @MINOR, align 4, !tbaa !18
%38 = load i64, ptr @E_NOT_SUPPORTED, align 8, !tbaa !11
%39 = tail call i32 @RETURN_ERROR(i32 noundef %37, i64 noundef %38, ptr noundef nonnull @.str) #3
br label %40
40: ; preds = %4, %36
%41 = tail call i32 @UNUSED(i64 noundef %1) #3
%42 = getelementptr inbounds %struct.TYPE_12__, ptr %7, i64 0, i32 1
%43 = load ptr, ptr %42, align 8, !tbaa !24
%44 = getelementptr inbounds %struct.TYPE_9__, ptr %43, i64 0, i32 1
%45 = load ptr, ptr %44, align 8, !tbaa !25
%46 = getelementptr inbounds i64, ptr %45, i64 %2
%47 = load i64, ptr %46, align 8, !tbaa !11
%48 = icmp ne i64 %47, 0
%49 = icmp slt i64 %47, %3
%50 = and i1 %48, %49
br i1 %50, label %55, label %51
51: ; preds = %40
%52 = getelementptr inbounds %struct.TYPE_9__, ptr %43, i64 0, i32 2
%53 = load ptr, ptr %52, align 8, !tbaa !27
%54 = getelementptr inbounds i64, ptr %53, i64 %2
store i64 %3, ptr %54, align 8, !tbaa !11
br label %59
55: ; preds = %40
%56 = load i32, ptr @MINOR, align 4, !tbaa !18
%57 = load i64, ptr @E_INVALID_VALUE, align 8, !tbaa !11
%58 = tail call i32 @RETURN_ERROR(i32 noundef %56, i64 noundef %57, ptr noundef nonnull @.str.1) #3
br label %59
59: ; preds = %55, %51
%60 = load i64, ptr @E_OK, align 8, !tbaa !11
br label %61
61: ; preds = %59, %34
%62 = phi i64 [ %35, %34 ], [ %60, %59 ]
ret i64 %62
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @XX_IpcSendMessage(i64 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @RETURN_ERROR(i32 noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @UNUSED(i64 noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_12__", !7, i64 0, !10, i64 8, !10, i64 16}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !10, i64 16}
!13 = !{!14, !7, i64 8}
!14 = !{!"TYPE_11__", !7, i64 0, !15, i64 8}
!15 = !{!"TYPE_8__", !7, i64 0, !7, i64 8}
!16 = !{!14, !7, i64 16}
!17 = !{!14, !7, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"int", !8, i64 0}
!20 = !{!21, !19, i64 4}
!21 = !{!"TYPE_10__", !19, i64 0, !19, i64 4}
!22 = !{!21, !19, i64 0}
!23 = !{!10, !10, i64 0}
!24 = !{!6, !10, i64 8}
!25 = !{!26, !10, i64 8}
!26 = !{!"TYPE_9__", !10, i64 0, !10, i64 8, !10, i64 16, !10, i64 24}
!27 = !{!26, !10, i64 16}
| ; ModuleID = 'AnghaBench/freebsd/sys/contrib/ncsw/Peripherals/FM/extr_fm_ncsw.c_FmSetMacMaxFrame.c'
source_filename = "AnghaBench/freebsd/sys/contrib/ncsw/Peripherals/FM/extr_fm_ncsw.c_FmSetMacMaxFrame.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_11__ = type { i64, %struct.TYPE_8__ }
%struct.TYPE_8__ = type { i64, i64 }
%struct.TYPE_10__ = type { i32, i32 }
@NCSW_MASTER_ID = common local_unnamed_addr global i64 0, align 8
@FM_SET_MAC_MAX_FRAME = common local_unnamed_addr global i32 0, align 4
@E_OK = common local_unnamed_addr global i64 0, align 8
@MINOR = common local_unnamed_addr global i32 0, align 4
@NO_MSG = common local_unnamed_addr global ptr null, align 8
@E_NOT_SUPPORTED = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [35 x i8] c"running in guest-mode without IPC!\00", align 1
@E_INVALID_VALUE = common local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [54 x i8] c"MAC maxFrameLength is larger than Port maxFrameLength\00", align 1
@e_FM_MAC_10G = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @FmSetMacMaxFrame(i64 noundef %0, i64 noundef %1, i64 noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = alloca %struct.TYPE_11__, align 8
%6 = alloca %struct.TYPE_10__, align 4
%7 = inttoptr i64 %0 to ptr
%8 = load i64, ptr %7, align 8, !tbaa !6
%9 = load i64, ptr @NCSW_MASTER_ID, align 8, !tbaa !12
%10 = icmp eq i64 %8, %9
br i1 %10, label %40, label %11
11: ; preds = %4
%12 = getelementptr inbounds i8, ptr %7, i64 16
%13 = load ptr, ptr %12, align 8, !tbaa !13
%14 = load i64, ptr %13, align 8, !tbaa !12
%15 = icmp eq i64 %14, 0
br i1 %15, label %36, label %16
16: ; preds = %11
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
%17 = call i32 @memset(ptr noundef nonnull %6, i32 noundef 0, i32 noundef 8) #3
%18 = getelementptr inbounds i8, ptr %5, i64 8
store i64 %2, ptr %18, align 8, !tbaa !14
%19 = getelementptr inbounds i8, ptr %5, i64 16
store i64 %1, ptr %19, align 8, !tbaa !17
store i64 %3, ptr %5, align 8, !tbaa !18
%20 = load i32, ptr @FM_SET_MAC_MAX_FRAME, align 4, !tbaa !19
%21 = getelementptr inbounds i8, ptr %6, i64 4
store i32 %20, ptr %21, align 4, !tbaa !21
%22 = load i32, ptr %6, align 4, !tbaa !23
%23 = call i32 @memcpy(i32 noundef %22, ptr noundef nonnull %5, i32 noundef 24) #3
%24 = load ptr, ptr %12, align 8, !tbaa !13
%25 = load i64, ptr %24, align 8, !tbaa !12
%26 = call i64 @XX_IpcSendMessage(i64 noundef %25, ptr noundef nonnull %6, i32 noundef 28, ptr noundef null, ptr noundef null, ptr noundef null, ptr noundef null) #3
%27 = load i64, ptr @E_OK, align 8, !tbaa !12
%28 = icmp eq i64 %26, %27
br i1 %28, label %34, label %29
29: ; preds = %16
%30 = load i32, ptr @MINOR, align 4, !tbaa !19
%31 = load ptr, ptr @NO_MSG, align 8, !tbaa !24
%32 = call i32 @RETURN_ERROR(i32 noundef %30, i64 noundef %26, ptr noundef %31) #3
%33 = load i64, ptr @E_OK, align 8, !tbaa !12
br label %34
34: ; preds = %29, %16
%35 = phi i64 [ %33, %29 ], [ %26, %16 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3
br label %61
36: ; preds = %11
%37 = load i32, ptr @MINOR, align 4, !tbaa !19
%38 = load i64, ptr @E_NOT_SUPPORTED, align 8, !tbaa !12
%39 = tail call i32 @RETURN_ERROR(i32 noundef %37, i64 noundef %38, ptr noundef nonnull @.str) #3
br label %40
40: ; preds = %4, %36
%41 = tail call i32 @UNUSED(i64 noundef %1) #3
%42 = getelementptr inbounds i8, ptr %7, i64 8
%43 = load ptr, ptr %42, align 8, !tbaa !25
%44 = getelementptr inbounds i8, ptr %43, i64 8
%45 = load ptr, ptr %44, align 8, !tbaa !26
%46 = getelementptr inbounds i64, ptr %45, i64 %2
%47 = load i64, ptr %46, align 8, !tbaa !12
%48 = icmp ne i64 %47, 0
%49 = icmp slt i64 %47, %3
%50 = and i1 %48, %49
br i1 %50, label %55, label %51
51: ; preds = %40
%52 = getelementptr inbounds i8, ptr %43, i64 16
%53 = load ptr, ptr %52, align 8, !tbaa !28
%54 = getelementptr inbounds i64, ptr %53, i64 %2
store i64 %3, ptr %54, align 8, !tbaa !12
br label %59
55: ; preds = %40
%56 = load i32, ptr @MINOR, align 4, !tbaa !19
%57 = load i64, ptr @E_INVALID_VALUE, align 8, !tbaa !12
%58 = tail call i32 @RETURN_ERROR(i32 noundef %56, i64 noundef %57, ptr noundef nonnull @.str.1) #3
br label %59
59: ; preds = %55, %51
%60 = load i64, ptr @E_OK, align 8, !tbaa !12
br label %61
61: ; preds = %59, %34
%62 = phi i64 [ %35, %34 ], [ %60, %59 ]
ret i64 %62
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @memcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @XX_IpcSendMessage(i64 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @RETURN_ERROR(i32 noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @UNUSED(i64 noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_12__", !8, i64 0, !11, i64 8, !11, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !11, i64 16}
!14 = !{!15, !8, i64 8}
!15 = !{!"TYPE_11__", !8, i64 0, !16, i64 8}
!16 = !{!"TYPE_8__", !8, i64 0, !8, i64 8}
!17 = !{!15, !8, i64 16}
!18 = !{!15, !8, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"int", !9, i64 0}
!21 = !{!22, !20, i64 4}
!22 = !{!"TYPE_10__", !20, i64 0, !20, i64 4}
!23 = !{!22, !20, i64 0}
!24 = !{!11, !11, i64 0}
!25 = !{!7, !11, i64 8}
!26 = !{!27, !11, i64 8}
!27 = !{!"TYPE_9__", !11, i64 0, !11, i64 8, !11, i64 16, !11, i64 24}
!28 = !{!27, !11, i64 16}
| freebsd_sys_contrib_ncsw_Peripherals_FM_extr_fm_ncsw.c_FmSetMacMaxFrame |
; ModuleID = 'AnghaBench/HandBrake/libhb/extr_hbavfilter.c_hb_avfilter_add_buf.c'
source_filename = "AnghaBench/HandBrake/libhb/extr_hbavfilter.c_hb_avfilter_add_buf.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, ptr }
; Function Attrs: nounwind uwtable
define dso_local i32 @hb_avfilter_add_buf(ptr nocapture noundef readonly %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %1, null
br i1 %3, label %11, label %4
4: ; preds = %2
%5 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = tail call i32 @hb_video_buffer_to_avframe(ptr noundef %6, ptr noundef nonnull %1) #2
%8 = load i32, ptr %0, align 8, !tbaa !11
%9 = load ptr, ptr %5, align 8, !tbaa !5
%10 = tail call i32 @av_buffersrc_add_frame(i32 noundef %8, ptr noundef %9) #2
br label %14
11: ; preds = %2
%12 = load i32, ptr %0, align 8, !tbaa !11
%13 = tail call i32 @av_buffersrc_add_frame(i32 noundef %12, ptr noundef null) #2
br label %14
14: ; preds = %11, %4
%15 = phi i32 [ %10, %4 ], [ %13, %11 ]
ret i32 %15
}
declare i32 @hb_video_buffer_to_avframe(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @av_buffersrc_add_frame(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/HandBrake/libhb/extr_hbavfilter.c_hb_avfilter_add_buf.c'
source_filename = "AnghaBench/HandBrake/libhb/extr_hbavfilter.c_hb_avfilter_add_buf.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @hb_avfilter_add_buf(ptr nocapture noundef readonly %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %1, null
br i1 %3, label %11, label %4
4: ; preds = %2
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = tail call i32 @hb_video_buffer_to_avframe(ptr noundef %6, ptr noundef nonnull %1) #2
%8 = load i32, ptr %0, align 8, !tbaa !12
%9 = load ptr, ptr %5, align 8, !tbaa !6
%10 = tail call i32 @av_buffersrc_add_frame(i32 noundef %8, ptr noundef %9) #2
br label %14
11: ; preds = %2
%12 = load i32, ptr %0, align 8, !tbaa !12
%13 = tail call i32 @av_buffersrc_add_frame(i32 noundef %12, ptr noundef null) #2
br label %14
14: ; preds = %11, %4
%15 = phi i32 [ %10, %4 ], [ %13, %11 ]
ret i32 %15
}
declare i32 @hb_video_buffer_to_avframe(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @av_buffersrc_add_frame(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 0}
| HandBrake_libhb_extr_hbavfilter.c_hb_avfilter_add_buf |
; ModuleID = 'AnghaBench/linux/arch/x86/lib/extr_msr-smp.c___wrmsr_on_cpu.c'
source_filename = "AnghaBench/linux/arch/x86/lib/extr_msr-smp.c___wrmsr_on_cpu.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.msr_info = type { i32, %struct.msr, i64 }
%struct.msr = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @__wrmsr_on_cpu], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @__wrmsr_on_cpu(ptr nocapture noundef readonly %0) #0 {
%2 = tail call i32 (...) @raw_smp_processor_id() #2
%3 = getelementptr inbounds %struct.msr_info, ptr %0, i64 0, i32 2
%4 = load i64, ptr %3, align 8, !tbaa !5
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call ptr @per_cpu_ptr(i64 noundef %4, i32 noundef %2) #2
br label %10
8: ; preds = %1
%9 = getelementptr inbounds %struct.msr_info, ptr %0, i64 0, i32 1
br label %10
10: ; preds = %8, %6
%11 = phi ptr [ %7, %6 ], [ %9, %8 ]
%12 = load i32, ptr %0, align 8, !tbaa !12
%13 = getelementptr inbounds %struct.msr, ptr %11, i64 0, i32 1
%14 = load i32, ptr %13, align 4, !tbaa !13
%15 = load i32, ptr %11, align 4, !tbaa !14
%16 = tail call i32 @wrmsr(i32 noundef %12, i32 noundef %14, i32 noundef %15) #2
ret void
}
declare i32 @raw_smp_processor_id(...) local_unnamed_addr #1
declare ptr @per_cpu_ptr(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wrmsr(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 16}
!6 = !{!"msr_info", !7, i64 0, !10, i64 4, !11, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"msr", !7, i64 0, !7, i64 4}
!11 = !{!"long", !8, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!10, !7, i64 4}
!14 = !{!10, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/arch/x86/lib/extr_msr-smp.c___wrmsr_on_cpu.c'
source_filename = "AnghaBench/linux/arch/x86/lib/extr_msr-smp.c___wrmsr_on_cpu.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @__wrmsr_on_cpu], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @__wrmsr_on_cpu(ptr nocapture noundef readonly %0) #0 {
%2 = tail call i32 @raw_smp_processor_id() #2
%3 = getelementptr inbounds i8, ptr %0, i64 16
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = tail call ptr @per_cpu_ptr(i64 noundef %4, i32 noundef %2) #2
br label %10
8: ; preds = %1
%9 = getelementptr inbounds i8, ptr %0, i64 4
br label %10
10: ; preds = %8, %6
%11 = phi ptr [ %7, %6 ], [ %9, %8 ]
%12 = load i32, ptr %0, align 8, !tbaa !13
%13 = getelementptr inbounds i8, ptr %11, i64 4
%14 = load i32, ptr %13, align 4, !tbaa !14
%15 = load i32, ptr %11, align 4, !tbaa !15
%16 = tail call i32 @wrmsr(i32 noundef %12, i32 noundef %14, i32 noundef %15) #2
ret void
}
declare i32 @raw_smp_processor_id(...) local_unnamed_addr #1
declare ptr @per_cpu_ptr(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wrmsr(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 16}
!7 = !{!"msr_info", !8, i64 0, !11, i64 4, !12, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"msr", !8, i64 0, !8, i64 4}
!12 = !{!"long", !9, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!11, !8, i64 4}
!15 = !{!11, !8, i64 0}
| linux_arch_x86_lib_extr_msr-smp.c___wrmsr_on_cpu |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/block/paride/extr_on26.c_on26_disconnect.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/block/paride/extr_on26.c_on26_disconnect.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32, i32 }
@P1 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @on26_disconnect], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @on26_disconnect(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = icmp sgt i32 %2, 1
br i1 %3, label %4, label %9
4: ; preds = %1
%5 = tail call i32 @w3(i32 noundef 4) #2
%6 = tail call i32 @w3(i32 noundef 4) #2
%7 = tail call i32 @w3(i32 noundef 4) #2
%8 = tail call i32 @w3(i32 noundef 4) #2
br label %12
9: ; preds = %1
%10 = tail call i32 @w0(i32 noundef 4) #2
%11 = tail call i32 @w0(i32 noundef 4) #2
br label %12
12: ; preds = %9, %4
%13 = tail call i32 @CCP(i32 noundef 48) #2
%14 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%15 = load i32, ptr %14, align 4, !tbaa !10
%16 = tail call i32 @w0(i32 noundef %15) #2
%17 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
%18 = load i32, ptr %17, align 4, !tbaa !11
%19 = tail call i32 @w2(i32 noundef %18) #2
ret void
}
declare i32 @w3(i32 noundef) local_unnamed_addr #1
declare i32 @w0(i32 noundef) local_unnamed_addr #1
declare i32 @CCP(i32 noundef) local_unnamed_addr #1
declare i32 @w2(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!6, !7, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/block/paride/extr_on26.c_on26_disconnect.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/block/paride/extr_on26.c_on26_disconnect.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@P1 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @on26_disconnect], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @on26_disconnect(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = icmp sgt i32 %2, 1
br i1 %3, label %4, label %9
4: ; preds = %1
%5 = tail call i32 @w3(i32 noundef 4) #2
%6 = tail call i32 @w3(i32 noundef 4) #2
%7 = tail call i32 @w3(i32 noundef 4) #2
%8 = tail call i32 @w3(i32 noundef 4) #2
br label %12
9: ; preds = %1
%10 = tail call i32 @w0(i32 noundef 4) #2
%11 = tail call i32 @w0(i32 noundef 4) #2
br label %12
12: ; preds = %9, %4
%13 = tail call i32 @CCP(i32 noundef 48) #2
%14 = getelementptr inbounds i8, ptr %0, i64 4
%15 = load i32, ptr %14, align 4, !tbaa !11
%16 = tail call i32 @w0(i32 noundef %15) #2
%17 = getelementptr inbounds i8, ptr %0, i64 8
%18 = load i32, ptr %17, align 4, !tbaa !12
%19 = tail call i32 @w2(i32 noundef %18) #2
ret void
}
declare i32 @w3(i32 noundef) local_unnamed_addr #1
declare i32 @w0(i32 noundef) local_unnamed_addr #1
declare i32 @CCP(i32 noundef) local_unnamed_addr #1
declare i32 @w2(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!7, !8, i64 8}
| fastsocket_kernel_drivers_block_paride_extr_on26.c_on26_disconnect |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/cdrom/extr_cdrom.c_dvd_read_copyright.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/cdrom/extr_cdrom.c_dvd_read_copyright.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32, ptr, ptr }
%struct.packet_command = type { ptr, i32 }
@CGC_DATA_READ = dso_local local_unnamed_addr global i32 0, align 4
@GPCMD_READ_DVD_STRUCTURE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @dvd_read_copyright], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @dvd_read_copyright(ptr noundef %0, ptr nocapture noundef %1, ptr noundef %2) #0 {
%4 = alloca [8 x ptr], align 16
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %4) #3
%5 = load ptr, ptr %0, align 8, !tbaa !5
%6 = load i32, ptr @CGC_DATA_READ, align 4, !tbaa !10
%7 = call i32 @init_cdrom_command(ptr noundef %2, ptr noundef nonnull %4, i32 noundef 64, i32 noundef %6) #3
%8 = load i32, ptr @GPCMD_READ_DVD_STRUCTURE, align 4, !tbaa !10
%9 = load ptr, ptr %2, align 8, !tbaa !12
store i32 %8, ptr %9, align 4, !tbaa !10
%10 = getelementptr inbounds %struct.TYPE_5__, ptr %1, i64 0, i32 1
%11 = load i32, ptr %10, align 8, !tbaa !14
%12 = getelementptr inbounds i32, ptr %9, i64 6
store i32 %11, ptr %12, align 4, !tbaa !10
%13 = load i32, ptr %1, align 8, !tbaa !17
%14 = getelementptr inbounds i32, ptr %9, i64 7
store i32 %13, ptr %14, align 4, !tbaa !10
%15 = getelementptr inbounds %struct.packet_command, ptr %2, i64 0, i32 1
%16 = load i32, ptr %15, align 8, !tbaa !18
%17 = ashr i32 %16, 8
%18 = getelementptr inbounds i32, ptr %9, i64 8
store i32 %17, ptr %18, align 4, !tbaa !10
%19 = load i32, ptr %15, align 8, !tbaa !18
%20 = and i32 %19, 255
%21 = getelementptr inbounds i32, ptr %9, i64 9
store i32 %20, ptr %21, align 4, !tbaa !10
%22 = load ptr, ptr %5, align 8, !tbaa !19
%23 = call i32 %22(ptr noundef nonnull %0, ptr noundef nonnull %2) #3
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %30
25: ; preds = %3
%26 = getelementptr inbounds [8 x ptr], ptr %4, i64 0, i64 4
%27 = getelementptr inbounds %struct.TYPE_5__, ptr %1, i64 0, i32 1, i32 1
%28 = load <2 x ptr>, ptr %26, align 16, !tbaa !21
%29 = shufflevector <2 x ptr> %28, <2 x ptr> poison, <2 x i32> <i32 1, i32 0>
store <2 x ptr> %29, ptr %27, align 8, !tbaa !21
br label %30
30: ; preds = %3, %25
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %4) #3
ret i32 %23
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @init_cdrom_command(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"cdrom_device_info", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"packet_command", !7, i64 0, !11, i64 8}
!14 = !{!15, !11, i64 8}
!15 = !{!"TYPE_5__", !11, i64 0, !16, i64 8}
!16 = !{!"TYPE_4__", !11, i64 0, !7, i64 8, !7, i64 16}
!17 = !{!15, !11, i64 0}
!18 = !{!13, !11, i64 8}
!19 = !{!20, !7, i64 0}
!20 = !{!"cdrom_device_ops", !7, i64 0}
!21 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/cdrom/extr_cdrom.c_dvd_read_copyright.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/cdrom/extr_cdrom.c_dvd_read_copyright.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CGC_DATA_READ = common local_unnamed_addr global i32 0, align 4
@GPCMD_READ_DVD_STRUCTURE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @dvd_read_copyright], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @dvd_read_copyright(ptr noundef %0, ptr nocapture noundef %1, ptr noundef %2) #0 {
%4 = alloca [8 x ptr], align 8
call void @llvm.lifetime.start.p0(i64 64, ptr nonnull %4) #3
%5 = load ptr, ptr %0, align 8, !tbaa !6
%6 = load i32, ptr @CGC_DATA_READ, align 4, !tbaa !11
%7 = call i32 @init_cdrom_command(ptr noundef %2, ptr noundef nonnull %4, i32 noundef 64, i32 noundef %6) #3
%8 = load i32, ptr @GPCMD_READ_DVD_STRUCTURE, align 4, !tbaa !11
%9 = load ptr, ptr %2, align 8, !tbaa !13
store i32 %8, ptr %9, align 4, !tbaa !11
%10 = getelementptr inbounds i8, ptr %1, i64 8
%11 = load i32, ptr %10, align 8, !tbaa !15
%12 = getelementptr inbounds i8, ptr %9, i64 24
store i32 %11, ptr %12, align 4, !tbaa !11
%13 = load i32, ptr %1, align 8, !tbaa !18
%14 = getelementptr inbounds i8, ptr %9, i64 28
store i32 %13, ptr %14, align 4, !tbaa !11
%15 = getelementptr inbounds i8, ptr %2, i64 8
%16 = load i32, ptr %15, align 8, !tbaa !19
%17 = ashr i32 %16, 8
%18 = getelementptr inbounds i8, ptr %9, i64 32
store i32 %17, ptr %18, align 4, !tbaa !11
%19 = load i32, ptr %15, align 8, !tbaa !19
%20 = and i32 %19, 255
%21 = getelementptr inbounds i8, ptr %9, i64 36
store i32 %20, ptr %21, align 4, !tbaa !11
%22 = load ptr, ptr %5, align 8, !tbaa !20
%23 = call i32 %22(ptr noundef nonnull %0, ptr noundef nonnull %2) #3
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %30
25: ; preds = %3
%26 = getelementptr inbounds i8, ptr %4, i64 32
%27 = getelementptr inbounds i8, ptr %1, i64 16
%28 = load <2 x ptr>, ptr %26, align 8, !tbaa !22
%29 = shufflevector <2 x ptr> %28, <2 x ptr> poison, <2 x i32> <i32 1, i32 0>
store <2 x ptr> %29, ptr %27, align 8, !tbaa !22
br label %30
30: ; preds = %3, %25
call void @llvm.lifetime.end.p0(i64 64, ptr nonnull %4) #3
ret i32 %23
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @init_cdrom_command(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"cdrom_device_info", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"packet_command", !8, i64 0, !12, i64 8}
!15 = !{!16, !12, i64 8}
!16 = !{!"TYPE_5__", !12, i64 0, !17, i64 8}
!17 = !{!"TYPE_4__", !12, i64 0, !8, i64 8, !8, i64 16}
!18 = !{!16, !12, i64 0}
!19 = !{!14, !12, i64 8}
!20 = !{!21, !8, i64 0}
!21 = !{!"cdrom_device_ops", !8, i64 0}
!22 = !{!8, !8, i64 0}
| fastsocket_kernel_drivers_cdrom_extr_cdrom.c_dvd_read_copyright |
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_emit-rtl.c_emit_call_insn.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_emit-rtl.c_emit_call_insn.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @emit_call_insn(i32 noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @GET_CODE(i32 noundef %0) #2
%3 = add i32 %2, -129
%4 = icmp ult i32 %3, 6
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @emit_insn(i32 noundef %0) #2
br label %10
7: ; preds = %1
%8 = tail call i32 @make_call_insn_raw(i32 noundef %0) #2
%9 = tail call i32 @add_insn(i32 noundef %8) #2
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ %8, %7 ], [ %6, %5 ]
ret i32 %11
}
declare i32 @GET_CODE(i32 noundef) local_unnamed_addr #1
declare i32 @emit_insn(i32 noundef) local_unnamed_addr #1
declare i32 @make_call_insn_raw(i32 noundef) local_unnamed_addr #1
declare i32 @add_insn(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_emit-rtl.c_emit_call_insn.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_emit-rtl.c_emit_call_insn.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @emit_call_insn(i32 noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @GET_CODE(i32 noundef %0) #2
%3 = add i32 %2, -129
%4 = icmp ult i32 %3, 6
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = tail call i32 @emit_insn(i32 noundef %0) #2
br label %10
7: ; preds = %1
%8 = tail call i32 @make_call_insn_raw(i32 noundef %0) #2
%9 = tail call i32 @add_insn(i32 noundef %8) #2
br label %10
10: ; preds = %7, %5
%11 = phi i32 [ %8, %7 ], [ %6, %5 ]
ret i32 %11
}
declare i32 @GET_CODE(i32 noundef) local_unnamed_addr #1
declare i32 @emit_insn(i32 noundef) local_unnamed_addr #1
declare i32 @make_call_insn_raw(i32 noundef) local_unnamed_addr #1
declare i32 @add_insn(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_gcc_extr_emit-rtl.c_emit_call_insn |
; ModuleID = 'AnghaBench/linux/drivers/platform/x86/extr_dell-laptop.c_kbd_led_als_enabled_store.c'
source_filename = "AnghaBench/linux/drivers/platform/x86/extr_dell-laptop.c_kbd_led_als_enabled_store.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32 }
%struct.kbd_state = type { i32 }
@kbd_led_mutex = dso_local global i32 0, align 4
@kbd_triggers_supported = dso_local local_unnamed_addr global i64 0, align 8
@KBD_MODE_BIT_TRIGGER_ALS = dso_local local_unnamed_addr global i32 0, align 4
@KBD_MODE_BIT_ALS = dso_local local_unnamed_addr global i32 0, align 4
@KBD_MODE_BIT_TRIGGER = dso_local local_unnamed_addr global i32 0, align 4
@kbd_previous_level = dso_local local_unnamed_addr global i32 0, align 4
@KBD_MODE_BIT_ON = dso_local local_unnamed_addr global i32 0, align 4
@kbd_info = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@kbd_previous_mode_bit = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @kbd_led_als_enabled_store], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @kbd_led_als_enabled_store(ptr nocapture readnone %0, ptr nocapture readnone %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = alloca %struct.kbd_state, align 4
%6 = alloca %struct.kbd_state, align 4
%7 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
%8 = call i32 @kstrtoint(ptr noundef %2, i32 noundef 0, ptr noundef nonnull %7) #3
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %64
10: ; preds = %4
%11 = call i32 @mutex_lock(ptr noundef nonnull @kbd_led_mutex) #3
%12 = call i32 @kbd_get_state(ptr noundef nonnull %6) #3
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %61
14: ; preds = %10
%15 = load i32, ptr %7, align 4, !tbaa !5
%16 = load i32, ptr %6, align 4, !tbaa !9
%17 = call i32 @kbd_is_als_mode_bit(i32 noundef %16) #3
%18 = icmp eq i32 %15, %17
br i1 %18, label %19, label %21
19: ; preds = %14
%20 = trunc i64 %3 to i32
br label %61
21: ; preds = %14
%22 = load i32, ptr %6, align 4, !tbaa !5
store i32 %22, ptr %5, align 4, !tbaa !5
%23 = load i64, ptr @kbd_triggers_supported, align 8, !tbaa !11
%24 = icmp eq i64 %23, 0
br i1 %24, label %30, label %25
25: ; preds = %21
%26 = call i32 @kbd_is_trigger_mode_bit(i32 noundef %22) #3
%27 = icmp eq i32 %26, 0
%28 = load i32, ptr %7, align 4, !tbaa !5
%29 = icmp eq i32 %28, 0
br i1 %29, label %38, label %33
30: ; preds = %21
%31 = load i32, ptr %7, align 4, !tbaa !5
%32 = icmp eq i32 %31, 0
br i1 %32, label %44, label %36
33: ; preds = %25
br i1 %27, label %36, label %34
34: ; preds = %33
%35 = load i32, ptr @KBD_MODE_BIT_TRIGGER_ALS, align 4, !tbaa !5
store i32 %35, ptr %5, align 4, !tbaa !9
br label %46
36: ; preds = %30, %33
%37 = load i32, ptr @KBD_MODE_BIT_ALS, align 4, !tbaa !5
store i32 %37, ptr %5, align 4, !tbaa !9
br label %46
38: ; preds = %25
br i1 %27, label %44, label %39
39: ; preds = %38
%40 = load i32, ptr @KBD_MODE_BIT_TRIGGER, align 4, !tbaa !5
store i32 %40, ptr %5, align 4, !tbaa !9
%41 = load i32, ptr @kbd_previous_level, align 4, !tbaa !5
%42 = call i32 @kbd_set_level(ptr noundef nonnull %5, i32 noundef %41) #3
%43 = load i32, ptr %5, align 4, !tbaa !9
br label %46
44: ; preds = %30, %38
%45 = load i32, ptr @KBD_MODE_BIT_ON, align 4, !tbaa !5
store i32 %45, ptr %5, align 4, !tbaa !9
br label %46
46: ; preds = %39, %44, %34, %36
%47 = phi i32 [ %43, %39 ], [ %45, %44 ], [ %35, %34 ], [ %37, %36 ]
%48 = load i32, ptr @kbd_info, align 4, !tbaa !13
%49 = call i32 @BIT(i32 noundef %47) #3
%50 = and i32 %49, %48
%51 = icmp eq i32 %50, 0
br i1 %51, label %52, label %55
52: ; preds = %46
%53 = load i32, ptr @EINVAL, align 4, !tbaa !5
%54 = sub nsw i32 0, %53
br label %61
55: ; preds = %46
%56 = call i32 @kbd_set_state_safe(ptr noundef nonnull %5, ptr noundef nonnull %6) #3
%57 = icmp eq i32 %56, 0
br i1 %57, label %58, label %61
58: ; preds = %55
%59 = load i32, ptr %5, align 4, !tbaa !9
store i32 %59, ptr @kbd_previous_mode_bit, align 4, !tbaa !5
%60 = trunc i64 %3 to i32
br label %61
61: ; preds = %55, %10, %58, %52, %19
%62 = phi i32 [ %12, %10 ], [ %20, %19 ], [ %56, %55 ], [ %60, %58 ], [ %54, %52 ]
%63 = call i32 @mutex_unlock(ptr noundef nonnull @kbd_led_mutex) #3
br label %64
64: ; preds = %4, %61
%65 = phi i32 [ %62, %61 ], [ %8, %4 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
ret i32 %65
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @kstrtoint(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #2
declare i32 @kbd_get_state(ptr noundef) local_unnamed_addr #2
declare i32 @kbd_is_als_mode_bit(i32 noundef) local_unnamed_addr #2
declare i32 @kbd_is_trigger_mode_bit(i32 noundef) local_unnamed_addr #2
declare i32 @kbd_set_level(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BIT(i32 noundef) local_unnamed_addr #2
declare i32 @kbd_set_state_safe(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"kbd_state", !6, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!14, !6, i64 0}
!14 = !{!"TYPE_2__", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/platform/x86/extr_dell-laptop.c_kbd_led_als_enabled_store.c'
source_filename = "AnghaBench/linux/drivers/platform/x86/extr_dell-laptop.c_kbd_led_als_enabled_store.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32 }
%struct.kbd_state = type { i32 }
@kbd_led_mutex = common global i32 0, align 4
@kbd_triggers_supported = common local_unnamed_addr global i64 0, align 8
@KBD_MODE_BIT_TRIGGER_ALS = common local_unnamed_addr global i32 0, align 4
@KBD_MODE_BIT_ALS = common local_unnamed_addr global i32 0, align 4
@KBD_MODE_BIT_TRIGGER = common local_unnamed_addr global i32 0, align 4
@kbd_previous_level = common local_unnamed_addr global i32 0, align 4
@KBD_MODE_BIT_ON = common local_unnamed_addr global i32 0, align 4
@kbd_info = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@kbd_previous_mode_bit = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @kbd_led_als_enabled_store], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @kbd_led_als_enabled_store(ptr nocapture readnone %0, ptr nocapture readnone %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = alloca %struct.kbd_state, align 4
%6 = alloca %struct.kbd_state, align 4
%7 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
%8 = call i32 @kstrtoint(ptr noundef %2, i32 noundef 0, ptr noundef nonnull %7) #3
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %64
10: ; preds = %4
%11 = call i32 @mutex_lock(ptr noundef nonnull @kbd_led_mutex) #3
%12 = call i32 @kbd_get_state(ptr noundef nonnull %6) #3
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %61
14: ; preds = %10
%15 = load i32, ptr %7, align 4, !tbaa !6
%16 = load i32, ptr %6, align 4, !tbaa !10
%17 = call i32 @kbd_is_als_mode_bit(i32 noundef %16) #3
%18 = icmp eq i32 %15, %17
br i1 %18, label %19, label %21
19: ; preds = %14
%20 = trunc i64 %3 to i32
br label %61
21: ; preds = %14
%22 = load i32, ptr %6, align 4, !tbaa !6
store i32 %22, ptr %5, align 4, !tbaa !6
%23 = load i64, ptr @kbd_triggers_supported, align 8, !tbaa !12
%24 = icmp eq i64 %23, 0
br i1 %24, label %30, label %25
25: ; preds = %21
%26 = call i32 @kbd_is_trigger_mode_bit(i32 noundef %22) #3
%27 = icmp eq i32 %26, 0
%28 = load i32, ptr %7, align 4, !tbaa !6
%29 = icmp eq i32 %28, 0
br i1 %29, label %38, label %33
30: ; preds = %21
%31 = load i32, ptr %7, align 4, !tbaa !6
%32 = icmp eq i32 %31, 0
br i1 %32, label %44, label %36
33: ; preds = %25
br i1 %27, label %36, label %34
34: ; preds = %33
%35 = load i32, ptr @KBD_MODE_BIT_TRIGGER_ALS, align 4, !tbaa !6
store i32 %35, ptr %5, align 4, !tbaa !10
br label %46
36: ; preds = %30, %33
%37 = load i32, ptr @KBD_MODE_BIT_ALS, align 4, !tbaa !6
store i32 %37, ptr %5, align 4, !tbaa !10
br label %46
38: ; preds = %25
br i1 %27, label %44, label %39
39: ; preds = %38
%40 = load i32, ptr @KBD_MODE_BIT_TRIGGER, align 4, !tbaa !6
store i32 %40, ptr %5, align 4, !tbaa !10
%41 = load i32, ptr @kbd_previous_level, align 4, !tbaa !6
%42 = call i32 @kbd_set_level(ptr noundef nonnull %5, i32 noundef %41) #3
%43 = load i32, ptr %5, align 4, !tbaa !10
br label %46
44: ; preds = %30, %38
%45 = load i32, ptr @KBD_MODE_BIT_ON, align 4, !tbaa !6
store i32 %45, ptr %5, align 4, !tbaa !10
br label %46
46: ; preds = %39, %44, %34, %36
%47 = phi i32 [ %43, %39 ], [ %45, %44 ], [ %35, %34 ], [ %37, %36 ]
%48 = load i32, ptr @kbd_info, align 4, !tbaa !14
%49 = call i32 @BIT(i32 noundef %47) #3
%50 = and i32 %49, %48
%51 = icmp eq i32 %50, 0
br i1 %51, label %52, label %55
52: ; preds = %46
%53 = load i32, ptr @EINVAL, align 4, !tbaa !6
%54 = sub nsw i32 0, %53
br label %61
55: ; preds = %46
%56 = call i32 @kbd_set_state_safe(ptr noundef nonnull %5, ptr noundef nonnull %6) #3
%57 = icmp eq i32 %56, 0
br i1 %57, label %58, label %61
58: ; preds = %55
%59 = load i32, ptr %5, align 4, !tbaa !10
store i32 %59, ptr @kbd_previous_mode_bit, align 4, !tbaa !6
%60 = trunc i64 %3 to i32
br label %61
61: ; preds = %55, %10, %58, %52, %19
%62 = phi i32 [ %12, %10 ], [ %20, %19 ], [ %56, %55 ], [ %60, %58 ], [ %54, %52 ]
%63 = call i32 @mutex_unlock(ptr noundef nonnull @kbd_led_mutex) #3
br label %64
64: ; preds = %4, %61
%65 = phi i32 [ %62, %61 ], [ %8, %4 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
ret i32 %65
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @kstrtoint(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #2
declare i32 @kbd_get_state(ptr noundef) local_unnamed_addr #2
declare i32 @kbd_is_als_mode_bit(i32 noundef) local_unnamed_addr #2
declare i32 @kbd_is_trigger_mode_bit(i32 noundef) local_unnamed_addr #2
declare i32 @kbd_set_level(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BIT(i32 noundef) local_unnamed_addr #2
declare i32 @kbd_set_state_safe(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"kbd_state", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!15, !7, i64 0}
!15 = !{!"TYPE_2__", !7, i64 0}
| linux_drivers_platform_x86_extr_dell-laptop.c_kbd_led_als_enabled_store |
; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/host_applications/linux/apps/tvservice/extr_tvservice.c_power_on_explicit.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/host_applications/linux/apps/tvservice/extr_tvservice.c_power_on_explicit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [53 x i8] c"Powering on HDMI with explicit settings (%s mode %u)\00", align 1
@HDMI_RES_GROUP_CEA = dso_local local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [4 x i8] c"CEA\00", align 1
@HDMI_RES_GROUP_DMT = dso_local local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [4 x i8] c"DMT\00", align 1
@.str.3 = private unnamed_addr constant [7 x i8] c"CUSTOM\00", align 1
@.str.4 = private unnamed_addr constant [60 x i8] c"Failed to power on HDMI with explicit settings (%s mode %u)\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @power_on_explicit], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @power_on_explicit(i64 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i64, ptr @HDMI_RES_GROUP_CEA, align 8, !tbaa !5
%5 = icmp eq i64 %4, %0
%6 = load i64, ptr @HDMI_RES_GROUP_DMT, align 8
%7 = icmp eq i64 %6, %0
%8 = select i1 %7, ptr @.str.2, ptr @.str.3
%9 = select i1 %5, ptr @.str.1, ptr %8
%10 = tail call i32 @LOG_STD(ptr noundef nonnull @.str, ptr noundef nonnull %9, i32 noundef %1) #2
%11 = tail call i32 @vc_tv_hdmi_power_on_explicit(i32 noundef %2, i64 noundef %0, i32 noundef %1) #2
%12 = icmp eq i32 %11, 0
br i1 %12, label %21, label %13
13: ; preds = %3
%14 = load i64, ptr @HDMI_RES_GROUP_CEA, align 8, !tbaa !5
%15 = icmp eq i64 %14, %0
%16 = load i64, ptr @HDMI_RES_GROUP_DMT, align 8
%17 = icmp eq i64 %16, %0
%18 = select i1 %17, ptr @.str.2, ptr @.str.3
%19 = select i1 %15, ptr @.str.1, ptr %18
%20 = tail call i32 @LOG_ERR(ptr noundef nonnull @.str.4, ptr noundef nonnull %19, i32 noundef %1) #2
br label %21
21: ; preds = %13, %3
ret i32 %11
}
declare i32 @LOG_STD(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vc_tv_hdmi_power_on_explicit(i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LOG_ERR(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/host_applications/linux/apps/tvservice/extr_tvservice.c_power_on_explicit.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/host_applications/linux/apps/tvservice/extr_tvservice.c_power_on_explicit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [53 x i8] c"Powering on HDMI with explicit settings (%s mode %u)\00", align 1
@HDMI_RES_GROUP_CEA = common local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [4 x i8] c"CEA\00", align 1
@HDMI_RES_GROUP_DMT = common local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [4 x i8] c"DMT\00", align 1
@.str.3 = private unnamed_addr constant [7 x i8] c"CUSTOM\00", align 1
@.str.4 = private unnamed_addr constant [60 x i8] c"Failed to power on HDMI with explicit settings (%s mode %u)\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @power_on_explicit], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @power_on_explicit(i64 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i64, ptr @HDMI_RES_GROUP_CEA, align 8, !tbaa !6
%5 = icmp eq i64 %4, %0
%6 = load i64, ptr @HDMI_RES_GROUP_DMT, align 8
%7 = icmp eq i64 %6, %0
%8 = select i1 %7, ptr @.str.2, ptr @.str.3
%9 = select i1 %5, ptr @.str.1, ptr %8
%10 = tail call i32 @LOG_STD(ptr noundef nonnull @.str, ptr noundef nonnull %9, i32 noundef %1) #2
%11 = tail call i32 @vc_tv_hdmi_power_on_explicit(i32 noundef %2, i64 noundef %0, i32 noundef %1) #2
%12 = icmp eq i32 %11, 0
br i1 %12, label %21, label %13
13: ; preds = %3
%14 = load i64, ptr @HDMI_RES_GROUP_CEA, align 8, !tbaa !6
%15 = icmp eq i64 %14, %0
%16 = load i64, ptr @HDMI_RES_GROUP_DMT, align 8
%17 = icmp eq i64 %16, %0
%18 = select i1 %17, ptr @.str.2, ptr @.str.3
%19 = select i1 %15, ptr @.str.1, ptr %18
%20 = tail call i32 @LOG_ERR(ptr noundef nonnull @.str.4, ptr noundef nonnull %19, i32 noundef %1) #2
br label %21
21: ; preds = %13, %3
ret i32 %11
}
declare i32 @LOG_STD(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vc_tv_hdmi_power_on_explicit(i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LOG_ERR(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| RetroArch_gfx_include_userland_host_applications_linux_apps_tvservice_extr_tvservice.c_power_on_explicit |
; ModuleID = 'AnghaBench/linux/arch/x86/events/amd/extr_power.c_pmu_event_init.c'
source_filename = "AnghaBench/linux/arch/x86/events/amd/extr_power.c_pmu_event_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i64 }
%struct.TYPE_3__ = type { i64, i64, i64 }
@AMD_POWER_EVENT_MASK = dso_local local_unnamed_addr global i64 0, align 8
@pmu_class = dso_local local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 8
@ENOENT = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@AMD_POWER_EVENTSEL_PKG = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @pmu_event_init], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define internal i32 @pmu_event_init(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = load i64, ptr @AMD_POWER_EVENT_MASK, align 8, !tbaa !11
%4 = and i64 %3, %2
%5 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%6 = load i64, ptr %5, align 8, !tbaa !12
%7 = load i64, ptr @pmu_class, align 8, !tbaa !13
%8 = icmp eq i64 %6, %7
br i1 %8, label %12, label %9
9: ; preds = %1
%10 = load i32, ptr @ENOENT, align 4, !tbaa !15
%11 = sub nsw i32 0, %10
br label %25
12: ; preds = %1
%13 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
%14 = load i64, ptr %13, align 8, !tbaa !17
%15 = icmp eq i64 %14, 0
br i1 %15, label %19, label %16
16: ; preds = %12
%17 = load i32, ptr @EINVAL, align 4, !tbaa !15
%18 = sub nsw i32 0, %17
br label %25
19: ; preds = %12
%20 = load i64, ptr @AMD_POWER_EVENTSEL_PKG, align 8, !tbaa !11
%21 = icmp eq i64 %4, %20
br i1 %21, label %25, label %22
22: ; preds = %19
%23 = load i32, ptr @EINVAL, align 4, !tbaa !15
%24 = sub nsw i32 0, %23
br label %25
25: ; preds = %19, %22, %16, %9
%26 = phi i32 [ %11, %9 ], [ %18, %16 ], [ %24, %22 ], [ 0, %19 ]
ret i32 %26
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"perf_event", !7, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 8, !8, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!6, !8, i64 8}
!13 = !{!14, !8, i64 0}
!14 = !{!"TYPE_4__", !8, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !9, i64 0}
!17 = !{!6, !8, i64 16}
| ; ModuleID = 'AnghaBench/linux/arch/x86/events/amd/extr_power.c_pmu_event_init.c'
source_filename = "AnghaBench/linux/arch/x86/events/amd/extr_power.c_pmu_event_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i64 }
@AMD_POWER_EVENT_MASK = common local_unnamed_addr global i64 0, align 8
@pmu_class = common local_unnamed_addr global %struct.TYPE_4__ zeroinitializer, align 8
@ENOENT = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@AMD_POWER_EVENTSEL_PKG = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @pmu_event_init], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @pmu_event_init(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = load i64, ptr @AMD_POWER_EVENT_MASK, align 8, !tbaa !12
%4 = and i64 %3, %2
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load i64, ptr %5, align 8, !tbaa !13
%7 = load i64, ptr @pmu_class, align 8, !tbaa !14
%8 = icmp eq i64 %6, %7
br i1 %8, label %12, label %9
9: ; preds = %1
%10 = load i32, ptr @ENOENT, align 4, !tbaa !16
%11 = sub nsw i32 0, %10
br label %25
12: ; preds = %1
%13 = getelementptr inbounds i8, ptr %0, i64 16
%14 = load i64, ptr %13, align 8, !tbaa !18
%15 = icmp eq i64 %14, 0
br i1 %15, label %19, label %16
16: ; preds = %12
%17 = load i32, ptr @EINVAL, align 4, !tbaa !16
%18 = sub nsw i32 0, %17
br label %25
19: ; preds = %12
%20 = load i64, ptr @AMD_POWER_EVENTSEL_PKG, align 8, !tbaa !12
%21 = icmp eq i64 %4, %20
br i1 %21, label %25, label %22
22: ; preds = %19
%23 = load i32, ptr @EINVAL, align 4, !tbaa !16
%24 = sub nsw i32 0, %23
br label %25
25: ; preds = %19, %22, %16, %9
%26 = phi i32 [ %11, %9 ], [ %18, %16 ], [ %24, %22 ], [ 0, %19 ]
ret i32 %26
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"perf_event", !8, i64 0}
!8 = !{!"TYPE_3__", !9, i64 0, !9, i64 8, !9, i64 16}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!9, !9, i64 0}
!13 = !{!7, !9, i64 8}
!14 = !{!15, !9, i64 0}
!15 = !{!"TYPE_4__", !9, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"int", !10, i64 0}
!18 = !{!7, !9, i64 16}
| linux_arch_x86_events_amd_extr_power.c_pmu_event_init |
; ModuleID = 'AnghaBench/linux/drivers/md/extr_dm-cache-target.c_set_config_value.c'
source_filename = "AnghaBench/linux/drivers/md/extr_dm-cache-target.c_set_config_value.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@NOT_CORE_OPTION = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [28 x i8] c"bad config value for %s: %s\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @set_config_value], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @set_config_value(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call i32 @process_config_option(ptr noundef %0, ptr noundef %1, ptr noundef %2) #2
%5 = load i32, ptr @NOT_CORE_OPTION, align 4, !tbaa !5
%6 = icmp eq i32 %4, %5
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i32, ptr %0, align 4, !tbaa !9
%9 = tail call i32 @policy_set_config_value(i32 noundef %8, ptr noundef %1, ptr noundef %2) #2
br label %10
10: ; preds = %7, %3
%11 = phi i32 [ %9, %7 ], [ %4, %3 ]
%12 = icmp eq i32 %11, 0
br i1 %12, label %15, label %13
13: ; preds = %10
%14 = tail call i32 @DMWARN(ptr noundef nonnull @.str, ptr noundef %1, ptr noundef %2) #2
br label %15
15: ; preds = %13, %10
ret i32 %11
}
declare i32 @process_config_option(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @policy_set_config_value(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @DMWARN(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"cache", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/md/extr_dm-cache-target.c_set_config_value.c'
source_filename = "AnghaBench/linux/drivers/md/extr_dm-cache-target.c_set_config_value.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NOT_CORE_OPTION = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [28 x i8] c"bad config value for %s: %s\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @set_config_value], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @set_config_value(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call i32 @process_config_option(ptr noundef %0, ptr noundef %1, ptr noundef %2) #2
%5 = load i32, ptr @NOT_CORE_OPTION, align 4, !tbaa !6
%6 = icmp eq i32 %4, %5
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i32, ptr %0, align 4, !tbaa !10
%9 = tail call i32 @policy_set_config_value(i32 noundef %8, ptr noundef %1, ptr noundef %2) #2
br label %10
10: ; preds = %7, %3
%11 = phi i32 [ %9, %7 ], [ %4, %3 ]
%12 = icmp eq i32 %11, 0
br i1 %12, label %15, label %13
13: ; preds = %10
%14 = tail call i32 @DMWARN(ptr noundef nonnull @.str, ptr noundef %1, ptr noundef %2) #2
br label %15
15: ; preds = %13, %10
ret i32 %11
}
declare i32 @process_config_option(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @policy_set_config_value(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @DMWARN(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"cache", !7, i64 0}
| linux_drivers_md_extr_dm-cache-target.c_set_config_value |
; ModuleID = 'AnghaBench/linux/drivers/platform/x86/extr_eeepc-laptop.c_eeepc_acpi_notify.c'
source_filename = "AnghaBench/linux/drivers/platform/x86/extr_eeepc-laptop.c_eeepc_acpi_notify.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.eeepc_laptop = type { i32, ptr }
%struct.acpi_device = type { i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32 }
@ACPI_MAX_SYS_NOTIFY = dso_local local_unnamed_addr global i32 0, align 4
@NOTIFY_BRN_MIN = dso_local local_unnamed_addr global i32 0, align 4
@NOTIFY_BRN_MAX = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @eeepc_acpi_notify], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @eeepc_acpi_notify(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @acpi_driver_data(ptr noundef %0) #2
%4 = load i32, ptr @ACPI_MAX_SYS_NOTIFY, align 4, !tbaa !5
%5 = icmp slt i32 %4, %1
br i1 %5, label %39, label %6
6: ; preds = %2
%7 = getelementptr inbounds %struct.eeepc_laptop, ptr %3, i64 0, i32 1
%8 = load ptr, ptr %7, align 8, !tbaa !9
%9 = srem i32 %1, 128
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, ptr %8, i64 %10
%12 = load i32, ptr %11, align 4, !tbaa !5
%13 = add nsw i32 %12, 1
store i32 %13, ptr %11, align 4, !tbaa !5
%14 = sext i32 %12 to i64
%15 = getelementptr inbounds %struct.acpi_device, ptr %0, i64 0, i32 1
%16 = load i32, ptr %15, align 4, !tbaa !12
%17 = tail call i32 @dev_name(ptr noundef %0) #2
%18 = tail call i32 @acpi_bus_generate_netlink_event(i32 noundef %16, i32 noundef %17, i32 noundef %1, i64 noundef %14) #2
%19 = load i32, ptr @NOTIFY_BRN_MIN, align 4, !tbaa !5
%20 = icmp sgt i32 %19, %1
%21 = load i32, ptr @NOTIFY_BRN_MAX, align 4
%22 = icmp slt i32 %21, %1
%23 = select i1 %20, i1 true, i1 %22
br i1 %23, label %36, label %24
24: ; preds = %6
%25 = load i32, ptr %3, align 8, !tbaa !15
%26 = icmp eq i32 %25, 0
br i1 %26, label %39, label %27
27: ; preds = %24
%28 = tail call i32 @eeepc_backlight_notify(ptr noundef nonnull %3) #2
%29 = load i32, ptr @NOTIFY_BRN_MIN, align 4, !tbaa !5
%30 = sub nsw i32 %1, %29
%31 = icmp slt i32 %30, %28
%32 = icmp sgt i32 %30, %28
%33 = load i32, ptr @NOTIFY_BRN_MAX, align 4
%34 = select i1 %32, i32 %33, i32 %1
%35 = select i1 %31, i32 %29, i32 %34
br label %36
36: ; preds = %6, %27
%37 = phi i32 [ %35, %27 ], [ %1, %6 ]
%38 = tail call i32 @eeepc_input_notify(ptr noundef nonnull %3, i32 noundef %37) #2
br label %39
39: ; preds = %36, %24, %2
ret void
}
declare ptr @acpi_driver_data(ptr noundef) local_unnamed_addr #1
declare i32 @acpi_bus_generate_netlink_event(i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @dev_name(ptr noundef) local_unnamed_addr #1
declare i32 @eeepc_input_notify(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @eeepc_backlight_notify(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"eeepc_laptop", !6, i64 0, !11, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !6, i64 4}
!13 = !{!"acpi_device", !6, i64 0, !14, i64 4}
!14 = !{!"TYPE_2__", !6, i64 0}
!15 = !{!10, !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/platform/x86/extr_eeepc-laptop.c_eeepc_acpi_notify.c'
source_filename = "AnghaBench/linux/drivers/platform/x86/extr_eeepc-laptop.c_eeepc_acpi_notify.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ACPI_MAX_SYS_NOTIFY = common local_unnamed_addr global i32 0, align 4
@NOTIFY_BRN_MIN = common local_unnamed_addr global i32 0, align 4
@NOTIFY_BRN_MAX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @eeepc_acpi_notify], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @eeepc_acpi_notify(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @acpi_driver_data(ptr noundef %0) #2
%4 = load i32, ptr @ACPI_MAX_SYS_NOTIFY, align 4, !tbaa !6
%5 = icmp slt i32 %4, %1
br i1 %5, label %39, label %6
6: ; preds = %2
%7 = getelementptr inbounds i8, ptr %3, i64 8
%8 = load ptr, ptr %7, align 8, !tbaa !10
%9 = srem i32 %1, 128
%10 = sext i32 %9 to i64
%11 = getelementptr inbounds i32, ptr %8, i64 %10
%12 = load i32, ptr %11, align 4, !tbaa !6
%13 = add nsw i32 %12, 1
store i32 %13, ptr %11, align 4, !tbaa !6
%14 = sext i32 %12 to i64
%15 = getelementptr inbounds i8, ptr %0, i64 4
%16 = load i32, ptr %15, align 4, !tbaa !13
%17 = tail call i32 @dev_name(ptr noundef %0) #2
%18 = tail call i32 @acpi_bus_generate_netlink_event(i32 noundef %16, i32 noundef %17, i32 noundef %1, i64 noundef %14) #2
%19 = load i32, ptr @NOTIFY_BRN_MIN, align 4, !tbaa !6
%20 = icmp sgt i32 %19, %1
%21 = load i32, ptr @NOTIFY_BRN_MAX, align 4
%22 = icmp slt i32 %21, %1
%23 = select i1 %20, i1 true, i1 %22
br i1 %23, label %36, label %24
24: ; preds = %6
%25 = load i32, ptr %3, align 8, !tbaa !16
%26 = icmp eq i32 %25, 0
br i1 %26, label %39, label %27
27: ; preds = %24
%28 = tail call i32 @eeepc_backlight_notify(ptr noundef nonnull %3) #2
%29 = load i32, ptr @NOTIFY_BRN_MIN, align 4, !tbaa !6
%30 = sub nsw i32 %1, %29
%31 = icmp slt i32 %30, %28
%32 = icmp sgt i32 %30, %28
%33 = load i32, ptr @NOTIFY_BRN_MAX, align 4
%34 = select i1 %32, i32 %33, i32 %1
%35 = select i1 %31, i32 %29, i32 %34
br label %36
36: ; preds = %6, %27
%37 = phi i32 [ %35, %27 ], [ %1, %6 ]
%38 = tail call i32 @eeepc_input_notify(ptr noundef nonnull %3, i32 noundef %37) #2
br label %39
39: ; preds = %36, %24, %2
ret void
}
declare ptr @acpi_driver_data(ptr noundef) local_unnamed_addr #1
declare i32 @acpi_bus_generate_netlink_event(i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @dev_name(ptr noundef) local_unnamed_addr #1
declare i32 @eeepc_input_notify(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @eeepc_backlight_notify(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"eeepc_laptop", !7, i64 0, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 4}
!14 = !{!"acpi_device", !7, i64 0, !15, i64 4}
!15 = !{!"TYPE_2__", !7, i64 0}
!16 = !{!11, !7, i64 0}
| linux_drivers_platform_x86_extr_eeepc-laptop.c_eeepc_acpi_notify |
; ModuleID = 'AnghaBench/linux/fs/nfs/extr_nfs4idmap.c_nfs_fattr_free_names.c'
source_filename = "AnghaBench/linux/fs/nfs/extr_nfs4idmap.c_nfs_fattr_free_names.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@NFS_ATTR_FATTR_OWNER_NAME = dso_local local_unnamed_addr global i32 0, align 4
@NFS_ATTR_FATTR_GROUP_NAME = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @nfs_fattr_free_names(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = load i32, ptr @NFS_ATTR_FATTR_OWNER_NAME, align 4, !tbaa !10
%4 = and i32 %3, %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = tail call i32 @nfs_fattr_free_owner_name(ptr noundef nonnull %0) #2
%8 = load i32, ptr %0, align 4, !tbaa !5
br label %9
9: ; preds = %6, %1
%10 = phi i32 [ %8, %6 ], [ %2, %1 ]
%11 = load i32, ptr @NFS_ATTR_FATTR_GROUP_NAME, align 4, !tbaa !10
%12 = and i32 %11, %10
%13 = icmp eq i32 %12, 0
br i1 %13, label %16, label %14
14: ; preds = %9
%15 = tail call i32 @nfs_fattr_free_group_name(ptr noundef nonnull %0) #2
br label %16
16: ; preds = %14, %9
ret void
}
declare i32 @nfs_fattr_free_owner_name(ptr noundef) local_unnamed_addr #1
declare i32 @nfs_fattr_free_group_name(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"nfs_fattr", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/fs/nfs/extr_nfs4idmap.c_nfs_fattr_free_names.c'
source_filename = "AnghaBench/linux/fs/nfs/extr_nfs4idmap.c_nfs_fattr_free_names.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NFS_ATTR_FATTR_OWNER_NAME = common local_unnamed_addr global i32 0, align 4
@NFS_ATTR_FATTR_GROUP_NAME = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @nfs_fattr_free_names(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = load i32, ptr @NFS_ATTR_FATTR_OWNER_NAME, align 4, !tbaa !11
%4 = and i32 %3, %2
%5 = icmp eq i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %1
%7 = tail call i32 @nfs_fattr_free_owner_name(ptr noundef nonnull %0) #2
%8 = load i32, ptr %0, align 4, !tbaa !6
br label %9
9: ; preds = %6, %1
%10 = phi i32 [ %8, %6 ], [ %2, %1 ]
%11 = load i32, ptr @NFS_ATTR_FATTR_GROUP_NAME, align 4, !tbaa !11
%12 = and i32 %11, %10
%13 = icmp eq i32 %12, 0
br i1 %13, label %16, label %14
14: ; preds = %9
%15 = tail call i32 @nfs_fattr_free_group_name(ptr noundef nonnull %0) #2
br label %16
16: ; preds = %14, %9
ret void
}
declare i32 @nfs_fattr_free_owner_name(ptr noundef) local_unnamed_addr #1
declare i32 @nfs_fattr_free_group_name(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"nfs_fattr", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| linux_fs_nfs_extr_nfs4idmap.c_nfs_fattr_free_names |
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