IR_x86 string | IR_arm string | filename string |
|---|---|---|
; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/platform/psp/extr_mp3.c_psp_sem_lock.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/platform/psp/extr_mp3.c_psp_sem_lock.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [42 x i8] c"sceKernelWaitSema(%08x) failed with %08x\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @psp_sem_lock], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @psp_sem_lock(i32 noundef %0) #0 {
%2 = tail call i32 @sceKernelWaitSema(i32 noundef %0, i32 noundef 1, i32 noundef 0) #2
%3 = icmp slt i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @lprintf(ptr noundef nonnull @.str, i32 noundef %0, i32 noundef %2) #2
br label %6
6: ; preds = %4, %1
ret void
}
declare i32 @sceKernelWaitSema(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lprintf(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/platform/psp/extr_mp3.c_psp_sem_lock.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/platform/psp/extr_mp3.c_psp_sem_lock.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [42 x i8] c"sceKernelWaitSema(%08x) failed with %08x\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @psp_sem_lock], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @psp_sem_lock(i32 noundef %0) #0 {
%2 = tail call i32 @sceKernelWaitSema(i32 noundef %0, i32 noundef 1, i32 noundef 0) #2
%3 = icmp slt i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = tail call i32 @lprintf(ptr noundef nonnull @.str, i32 noundef %0, i32 noundef %2) #2
br label %6
6: ; preds = %4, %1
ret void
}
declare i32 @sceKernelWaitSema(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lprintf(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| Provenance_Cores_PicoDrive_platform_psp_extr_mp3.c_psp_sem_lock |
; ModuleID = 'AnghaBench/sway/sway/config/extr_bar.c_load_swaybar.c'
source_filename = "AnghaBench/sway/sway/config/extr_bar.c_load_swaybar.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bar_config = type { i32, ptr }
@SWAY_DEBUG = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [33 x i8] c"Invoking swaybar for bar id '%s'\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @load_swaybar(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.bar_config, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = icmp eq ptr %3, null
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 @wl_client_destroy(ptr noundef nonnull %3) #2
br label %7
7: ; preds = %5, %1
%8 = load i32, ptr @SWAY_DEBUG, align 4, !tbaa !11
%9 = load i32, ptr %0, align 8, !tbaa !12
%10 = tail call i32 @sway_log(i32 noundef %8, ptr noundef nonnull @.str, i32 noundef %9) #2
%11 = tail call i32 @invoke_swaybar(ptr noundef nonnull %0) #2
ret void
}
declare i32 @wl_client_destroy(ptr noundef) local_unnamed_addr #1
declare i32 @sway_log(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @invoke_swaybar(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"bar_config", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/sway/sway/config/extr_bar.c_load_swaybar.c'
source_filename = "AnghaBench/sway/sway/config/extr_bar.c_load_swaybar.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SWAY_DEBUG = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [33 x i8] c"Invoking swaybar for bar id '%s'\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @load_swaybar(ptr noundef %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = icmp eq ptr %3, null
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 @wl_client_destroy(ptr noundef nonnull %3) #2
br label %7
7: ; preds = %5, %1
%8 = load i32, ptr @SWAY_DEBUG, align 4, !tbaa !12
%9 = load i32, ptr %0, align 8, !tbaa !13
%10 = tail call i32 @sway_log(i32 noundef %8, ptr noundef nonnull @.str, i32 noundef %9) #2
%11 = tail call i32 @invoke_swaybar(ptr noundef nonnull %0) #2
ret void
}
declare i32 @wl_client_destroy(ptr noundef) local_unnamed_addr #1
declare i32 @sway_log(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @invoke_swaybar(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"bar_config", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !8, i64 0}
| sway_sway_config_extr_bar.c_load_swaybar |
; ModuleID = 'AnghaBench/postgres/src/backend/executor/extr_nodeResult.c_ExecEndResult.c'
source_filename = "AnghaBench/postgres/src/backend/executor/extr_nodeResult.c_ExecEndResult.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @ExecEndResult(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @ExecFreeExprContext(ptr noundef %0) #2
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = tail call i32 @ExecClearTuple(i32 noundef %3) #2
%5 = tail call i32 @outerPlanState(ptr noundef nonnull %0) #2
%6 = tail call i32 @ExecEndNode(i32 noundef %5) #2
ret void
}
declare i32 @ExecFreeExprContext(ptr noundef) local_unnamed_addr #1
declare i32 @ExecClearTuple(i32 noundef) local_unnamed_addr #1
declare i32 @ExecEndNode(i32 noundef) local_unnamed_addr #1
declare i32 @outerPlanState(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/postgres/src/backend/executor/extr_nodeResult.c_ExecEndResult.c'
source_filename = "AnghaBench/postgres/src/backend/executor/extr_nodeResult.c_ExecEndResult.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @ExecEndResult(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @ExecFreeExprContext(ptr noundef %0) #2
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = tail call i32 @ExecClearTuple(i32 noundef %3) #2
%5 = tail call i32 @outerPlanState(ptr noundef nonnull %0) #2
%6 = tail call i32 @ExecEndNode(i32 noundef %5) #2
ret void
}
declare i32 @ExecFreeExprContext(ptr noundef) local_unnamed_addr #1
declare i32 @ExecClearTuple(i32 noundef) local_unnamed_addr #1
declare i32 @ExecEndNode(i32 noundef) local_unnamed_addr #1
declare i32 @outerPlanState(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"TYPE_6__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
| postgres_src_backend_executor_extr_nodeResult.c_ExecEndResult |
; ModuleID = 'AnghaBench/libgit2/tests/core/extr_vector.c_test_core_vector__0.c'
source_filename = "AnghaBench/libgit2/tests/core/extr_vector.c_test_core_vector__0.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @test_core_vector__0() local_unnamed_addr #0 {
%1 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
%2 = call i32 @git_vector_init(ptr noundef nonnull %1, i32 noundef 1, ptr noundef null) #3
%3 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%4 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%5 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%6 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%7 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%8 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%9 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%10 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%11 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%12 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%13 = call i32 @git_vector_free(ptr noundef nonnull %1) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @git_vector_init(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @git_vector_insert(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @git_vector_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/libgit2/tests/core/extr_vector.c_test_core_vector__0.c'
source_filename = "AnghaBench/libgit2/tests/core/extr_vector.c_test_core_vector__0.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @test_core_vector__0() local_unnamed_addr #0 {
%1 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
%2 = call i32 @git_vector_init(ptr noundef nonnull %1, i32 noundef 1, ptr noundef null) #3
%3 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%4 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%5 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%6 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%7 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%8 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%9 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%10 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%11 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%12 = call i32 @git_vector_insert(ptr noundef nonnull %1, ptr noundef nonnull inttoptr (i64 2748 to ptr)) #3
%13 = call i32 @git_vector_free(ptr noundef nonnull %1) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @git_vector_init(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @git_vector_insert(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @git_vector_free(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| libgit2_tests_core_extr_vector.c_test_core_vector__0 |
; ModuleID = 'AnghaBench/xLua/WebGLPlugins/extr_lauxlib.c_interror.c'
source_filename = "AnghaBench/xLua/WebGLPlugins/extr_lauxlib.c_interror.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [37 x i8] c"number has no integer representation\00", align 1
@LUA_TNUMBER = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @interror], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @interror(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call i64 @lua_isnumber(ptr noundef %0, i32 noundef %1) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @luaL_argerror(ptr noundef %0, i32 noundef %1, ptr noundef nonnull @.str) #2
br label %10
7: ; preds = %2
%8 = load i32, ptr @LUA_TNUMBER, align 4, !tbaa !5
%9 = tail call i32 @tag_error(ptr noundef %0, i32 noundef %1, i32 noundef %8) #2
br label %10
10: ; preds = %7, %5
ret void
}
declare i64 @lua_isnumber(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @luaL_argerror(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @tag_error(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/xLua/WebGLPlugins/extr_lauxlib.c_interror.c'
source_filename = "AnghaBench/xLua/WebGLPlugins/extr_lauxlib.c_interror.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [37 x i8] c"number has no integer representation\00", align 1
@LUA_TNUMBER = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @interror], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @interror(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call i64 @lua_isnumber(ptr noundef %0, i32 noundef %1) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @luaL_argerror(ptr noundef %0, i32 noundef %1, ptr noundef nonnull @.str) #2
br label %10
7: ; preds = %2
%8 = load i32, ptr @LUA_TNUMBER, align 4, !tbaa !6
%9 = tail call i32 @tag_error(ptr noundef %0, i32 noundef %1, i32 noundef %8) #2
br label %10
10: ; preds = %7, %5
ret void
}
declare i64 @lua_isnumber(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @luaL_argerror(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @tag_error(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| xLua_WebGLPlugins_extr_lauxlib.c_interror |
; ModuleID = 'AnghaBench/linux/drivers/crypto/extr_mxs-dcp.c_mxs_dcp_irq.c'
source_filename = "AnghaBench/linux/drivers/crypto/extr_mxs-dcp.c_mxs_dcp_irq.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.dcp = type { ptr, i64 }
@MXS_DCP_STAT = dso_local local_unnamed_addr global i64 0, align 8
@MXS_DCP_STAT_IRQ_MASK = dso_local local_unnamed_addr global i32 0, align 4
@IRQ_NONE = dso_local local_unnamed_addr global i32 0, align 4
@MXS_DCP_STAT_CLR = dso_local local_unnamed_addr global i64 0, align 8
@DCP_MAX_CHANS = dso_local local_unnamed_addr global i32 0, align 4
@IRQ_HANDLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @mxs_dcp_irq], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mxs_dcp_irq(i32 %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds %struct.dcp, ptr %1, i64 0, i32 1
%4 = load i64, ptr %3, align 8, !tbaa !5
%5 = load i64, ptr @MXS_DCP_STAT, align 8, !tbaa !11
%6 = add nsw i64 %5, %4
%7 = tail call i32 @readl(i64 noundef %6) #2
%8 = load i32, ptr @MXS_DCP_STAT_IRQ_MASK, align 4, !tbaa !12
%9 = and i32 %8, %7
%10 = icmp eq i32 %9, 0
br i1 %10, label %35, label %11
11: ; preds = %2
%12 = load i64, ptr %3, align 8, !tbaa !5
%13 = load i64, ptr @MXS_DCP_STAT_CLR, align 8, !tbaa !11
%14 = add nsw i64 %13, %12
%15 = tail call i32 @writel(i32 noundef %9, i64 noundef %14) #2
%16 = load i32, ptr @DCP_MAX_CHANS, align 4, !tbaa !12
%17 = icmp sgt i32 %16, 0
br i1 %17, label %18, label %35
18: ; preds = %11, %30
%19 = phi i32 [ %31, %30 ], [ %16, %11 ]
%20 = phi i64 [ %32, %30 ], [ 0, %11 ]
%21 = trunc i64 %20 to i32
%22 = shl nuw i32 1, %21
%23 = and i32 %22, %9
%24 = icmp eq i32 %23, 0
br i1 %24, label %30, label %25
25: ; preds = %18
%26 = load ptr, ptr %1, align 8, !tbaa !14
%27 = getelementptr inbounds i32, ptr %26, i64 %20
%28 = tail call i32 @complete(ptr noundef %27) #2
%29 = load i32, ptr @DCP_MAX_CHANS, align 4, !tbaa !12
br label %30
30: ; preds = %18, %25
%31 = phi i32 [ %19, %18 ], [ %29, %25 ]
%32 = add nuw nsw i64 %20, 1
%33 = sext i32 %31 to i64
%34 = icmp slt i64 %32, %33
br i1 %34, label %18, label %35, !llvm.loop !15
35: ; preds = %30, %11, %2
%36 = phi ptr [ @IRQ_NONE, %2 ], [ @IRQ_HANDLED, %11 ], [ @IRQ_HANDLED, %30 ]
%37 = load i32, ptr %36, align 4, !tbaa !12
ret i32 %37
}
declare i32 @readl(i64 noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @complete(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"dcp", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!6, !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/crypto/extr_mxs-dcp.c_mxs_dcp_irq.c'
source_filename = "AnghaBench/linux/drivers/crypto/extr_mxs-dcp.c_mxs_dcp_irq.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MXS_DCP_STAT = common local_unnamed_addr global i64 0, align 8
@MXS_DCP_STAT_IRQ_MASK = common local_unnamed_addr global i32 0, align 4
@IRQ_NONE = common local_unnamed_addr global i32 0, align 4
@MXS_DCP_STAT_CLR = common local_unnamed_addr global i64 0, align 8
@DCP_MAX_CHANS = common local_unnamed_addr global i32 0, align 4
@IRQ_HANDLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mxs_dcp_irq], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mxs_dcp_irq(i32 %0, ptr nocapture noundef readonly %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 8
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = load i64, ptr @MXS_DCP_STAT, align 8, !tbaa !12
%6 = add nsw i64 %5, %4
%7 = tail call i32 @readl(i64 noundef %6) #2
%8 = load i32, ptr @MXS_DCP_STAT_IRQ_MASK, align 4, !tbaa !13
%9 = and i32 %8, %7
%10 = icmp eq i32 %9, 0
br i1 %10, label %35, label %11
11: ; preds = %2
%12 = load i64, ptr %3, align 8, !tbaa !6
%13 = load i64, ptr @MXS_DCP_STAT_CLR, align 8, !tbaa !12
%14 = add nsw i64 %13, %12
%15 = tail call i32 @writel(i32 noundef %9, i64 noundef %14) #2
%16 = load i32, ptr @DCP_MAX_CHANS, align 4, !tbaa !13
%17 = icmp sgt i32 %16, 0
br i1 %17, label %18, label %35
18: ; preds = %11, %30
%19 = phi i32 [ %31, %30 ], [ %16, %11 ]
%20 = phi i64 [ %32, %30 ], [ 0, %11 ]
%21 = trunc nuw nsw i64 %20 to i32
%22 = shl nuw i32 1, %21
%23 = and i32 %22, %9
%24 = icmp eq i32 %23, 0
br i1 %24, label %30, label %25
25: ; preds = %18
%26 = load ptr, ptr %1, align 8, !tbaa !15
%27 = getelementptr inbounds i32, ptr %26, i64 %20
%28 = tail call i32 @complete(ptr noundef %27) #2
%29 = load i32, ptr @DCP_MAX_CHANS, align 4, !tbaa !13
br label %30
30: ; preds = %18, %25
%31 = phi i32 [ %19, %18 ], [ %29, %25 ]
%32 = add nuw nsw i64 %20, 1
%33 = sext i32 %31 to i64
%34 = icmp slt i64 %32, %33
br i1 %34, label %18, label %35, !llvm.loop !16
35: ; preds = %30, %11, %2
%36 = phi ptr [ @IRQ_NONE, %2 ], [ @IRQ_HANDLED, %11 ], [ @IRQ_HANDLED, %30 ]
%37 = load i32, ptr %36, align 4, !tbaa !13
ret i32 %37
}
declare i32 @readl(i64 noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @complete(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"dcp", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!7, !8, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| linux_drivers_crypto_extr_mxs-dcp.c_mxs_dcp_irq |
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/cifs/extr_cifsacl.c_parse_dacl.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/cifs/extr_cifsacl.c_parse_dacl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.cifs_sid = type { i32 }
%struct.cifs_acl = type { i32, i32, i32 }
%struct.cifs_ace = type { i32, i32, i32, i32 }
@S_IRWXUGO = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [28 x i8] c"ACL too small to parse DACL\00", align 1
@DBG2 = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [37 x i8] c"DACL revision %d size %d num aces %d\00", align 1
@S_IRWXU = dso_local local_unnamed_addr global i32 0, align 4
@S_IRWXG = dso_local local_unnamed_addr global i32 0, align 4
@S_IRWXO = dso_local local_unnamed_addr global i32 0, align 4
@ULONG_MAX = dso_local local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [29 x i8] c"DACL memory allocation error\00", align 1
@sid_everyone = dso_local global %struct.cifs_sid zeroinitializer, align 4
@sid_authusers = dso_local global %struct.cifs_sid zeroinitializer, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @parse_dacl], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @parse_dacl(ptr noundef %0, ptr noundef readnone %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #0 {
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca i32, align 4
%9 = icmp eq ptr %0, null
br i1 %9, label %10, label %14
10: ; preds = %5
%11 = load i32, ptr @S_IRWXUGO, align 4, !tbaa !5
%12 = load i32, ptr %4, align 4, !tbaa !9
%13 = or i32 %12, %11
store i32 %13, ptr %4, align 4, !tbaa !9
br label %120
14: ; preds = %5
%15 = getelementptr inbounds %struct.cifs_acl, ptr %0, i64 0, i32 1
%16 = load i32, ptr %15, align 4, !tbaa !11
%17 = tail call i32 @le16_to_cpu(i32 noundef %16) #3
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, ptr %0, i64 %18
%20 = icmp ugt ptr %19, %1
br i1 %20, label %21, label %23
21: ; preds = %14
%22 = tail call i32 @cERROR(i32 noundef 1, ptr noundef nonnull @.str) #3
br label %120
23: ; preds = %14
%24 = load i32, ptr @DBG2, align 4, !tbaa !5
%25 = getelementptr inbounds %struct.cifs_acl, ptr %0, i64 0, i32 2
%26 = load i32, ptr %25, align 4, !tbaa !13
%27 = tail call i32 @le16_to_cpu(i32 noundef %26) #3
%28 = load i32, ptr %15, align 4, !tbaa !11
%29 = tail call i32 @le16_to_cpu(i32 noundef %28) #3
%30 = load i32, ptr %0, align 4, !tbaa !14
%31 = tail call i32 @le32_to_cpu(i32 noundef %30) #3
%32 = tail call i32 @cFYI(i32 noundef %24, ptr noundef nonnull @.str.1, i32 noundef %27, i32 noundef %29, i32 noundef %31) #3
%33 = load i32, ptr @S_IRWXUGO, align 4, !tbaa !5
%34 = xor i32 %33, -1
%35 = load i32, ptr %4, align 4, !tbaa !9
%36 = and i32 %35, %34
store i32 %36, ptr %4, align 4, !tbaa !9
%37 = load i32, ptr %0, align 4, !tbaa !14
%38 = tail call i32 @le32_to_cpu(i32 noundef %37) #3
%39 = icmp sgt i32 %38, 0
br i1 %39, label %40, label %120
40: ; preds = %23
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
%41 = load i32, ptr @S_IRWXU, align 4, !tbaa !5
store i32 %41, ptr %6, align 4, !tbaa !5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
%42 = load i32, ptr @S_IRWXG, align 4, !tbaa !5
store i32 %42, ptr %7, align 4, !tbaa !5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
%43 = load i32, ptr @S_IRWXO, align 4, !tbaa !5
%44 = or i32 %41, %43
%45 = or i32 %44, %42
store i32 %45, ptr %8, align 4, !tbaa !5
%46 = zext nneg i32 %38 to i64
%47 = load i32, ptr @ULONG_MAX, align 4, !tbaa !5
%48 = sext i32 %47 to i64
%49 = lshr i64 %48, 3
%50 = icmp ult i64 %49, %46
br i1 %50, label %119, label %51
51: ; preds = %40
%52 = shl i32 %38, 3
%53 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%54 = tail call ptr @kmalloc(i32 noundef %52, i32 noundef %53) #3
%55 = icmp eq ptr %54, null
br i1 %55, label %56, label %58
56: ; preds = %51
%57 = tail call i32 @cERROR(i32 noundef 1, ptr noundef nonnull @.str.2) #3
br label %119
58: ; preds = %51, %111
%59 = phi i64 [ %115, %111 ], [ 0, %51 ]
%60 = phi ptr [ %112, %111 ], [ %0, %51 ]
%61 = phi i32 [ %114, %111 ], [ 12, %51 ]
%62 = sext i32 %61 to i64
%63 = getelementptr inbounds i8, ptr %60, i64 %62
%64 = getelementptr inbounds ptr, ptr %54, i64 %59
store ptr %63, ptr %64, align 8, !tbaa !15
%65 = getelementptr inbounds %struct.cifs_ace, ptr %63, i64 0, i32 3
%66 = call i64 @compare_sids(ptr noundef nonnull %65, ptr noundef %2) #3
%67 = icmp eq i64 %66, 0
br i1 %67, label %68, label %75
68: ; preds = %58
%69 = load ptr, ptr %64, align 8, !tbaa !15
%70 = getelementptr inbounds %struct.cifs_ace, ptr %69, i64 0, i32 2
%71 = load i32, ptr %70, align 4, !tbaa !17
%72 = getelementptr inbounds %struct.cifs_ace, ptr %69, i64 0, i32 1
%73 = load i32, ptr %72, align 4, !tbaa !19
%74 = call i32 @access_flags_to_mode(i32 noundef %71, i32 noundef %73, ptr noundef nonnull %4, ptr noundef nonnull %6) #3
br label %75
75: ; preds = %68, %58
%76 = load ptr, ptr %64, align 8, !tbaa !15
%77 = getelementptr inbounds %struct.cifs_ace, ptr %76, i64 0, i32 3
%78 = call i64 @compare_sids(ptr noundef nonnull %77, ptr noundef %3) #3
%79 = icmp eq i64 %78, 0
br i1 %79, label %80, label %87
80: ; preds = %75
%81 = load ptr, ptr %64, align 8, !tbaa !15
%82 = getelementptr inbounds %struct.cifs_ace, ptr %81, i64 0, i32 2
%83 = load i32, ptr %82, align 4, !tbaa !17
%84 = getelementptr inbounds %struct.cifs_ace, ptr %81, i64 0, i32 1
%85 = load i32, ptr %84, align 4, !tbaa !19
%86 = call i32 @access_flags_to_mode(i32 noundef %83, i32 noundef %85, ptr noundef nonnull %4, ptr noundef nonnull %7) #3
br label %87
87: ; preds = %80, %75
%88 = load ptr, ptr %64, align 8, !tbaa !15
%89 = getelementptr inbounds %struct.cifs_ace, ptr %88, i64 0, i32 3
%90 = call i64 @compare_sids(ptr noundef nonnull %89, ptr noundef nonnull @sid_everyone) #3
%91 = icmp eq i64 %90, 0
br i1 %91, label %92, label %99
92: ; preds = %87
%93 = load ptr, ptr %64, align 8, !tbaa !15
%94 = getelementptr inbounds %struct.cifs_ace, ptr %93, i64 0, i32 2
%95 = load i32, ptr %94, align 4, !tbaa !17
%96 = getelementptr inbounds %struct.cifs_ace, ptr %93, i64 0, i32 1
%97 = load i32, ptr %96, align 4, !tbaa !19
%98 = call i32 @access_flags_to_mode(i32 noundef %95, i32 noundef %97, ptr noundef nonnull %4, ptr noundef nonnull %8) #3
br label %99
99: ; preds = %92, %87
%100 = load ptr, ptr %64, align 8, !tbaa !15
%101 = getelementptr inbounds %struct.cifs_ace, ptr %100, i64 0, i32 3
%102 = call i64 @compare_sids(ptr noundef nonnull %101, ptr noundef nonnull @sid_authusers) #3
%103 = icmp eq i64 %102, 0
br i1 %103, label %104, label %111
104: ; preds = %99
%105 = load ptr, ptr %64, align 8, !tbaa !15
%106 = getelementptr inbounds %struct.cifs_ace, ptr %105, i64 0, i32 2
%107 = load i32, ptr %106, align 4, !tbaa !17
%108 = getelementptr inbounds %struct.cifs_ace, ptr %105, i64 0, i32 1
%109 = load i32, ptr %108, align 4, !tbaa !19
%110 = call i32 @access_flags_to_mode(i32 noundef %107, i32 noundef %109, ptr noundef nonnull %4, ptr noundef nonnull %8) #3
br label %111
111: ; preds = %104, %99
%112 = load ptr, ptr %64, align 8, !tbaa !15
%113 = load i32, ptr %112, align 4, !tbaa !20
%114 = call i32 @le16_to_cpu(i32 noundef %113) #3
%115 = add nuw nsw i64 %59, 1
%116 = icmp eq i64 %115, %46
br i1 %116, label %117, label %58, !llvm.loop !21
117: ; preds = %111
%118 = call i32 @kfree(ptr noundef nonnull %54) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
br label %120
119: ; preds = %40, %56
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
br label %120
120: ; preds = %23, %117, %119, %21, %10
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #2
declare i32 @cERROR(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @cFYI(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @le32_to_cpu(i32 noundef) local_unnamed_addr #2
declare ptr @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @compare_sids(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @access_flags_to_mode(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @kfree(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"cifs_fattr", !6, i64 0}
!11 = !{!12, !6, i64 4}
!12 = !{!"cifs_acl", !6, i64 0, !6, i64 4, !6, i64 8}
!13 = !{!12, !6, i64 8}
!14 = !{!12, !6, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"any pointer", !7, i64 0}
!17 = !{!18, !6, i64 8}
!18 = !{!"cifs_ace", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12}
!19 = !{!18, !6, i64 4}
!20 = !{!18, !6, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/fs/cifs/extr_cifsacl.c_parse_dacl.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/cifs/extr_cifsacl.c_parse_dacl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.cifs_sid = type { i32 }
@S_IRWXUGO = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [28 x i8] c"ACL too small to parse DACL\00", align 1
@DBG2 = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [37 x i8] c"DACL revision %d size %d num aces %d\00", align 1
@S_IRWXU = common local_unnamed_addr global i32 0, align 4
@S_IRWXG = common local_unnamed_addr global i32 0, align 4
@S_IRWXO = common local_unnamed_addr global i32 0, align 4
@ULONG_MAX = common local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [29 x i8] c"DACL memory allocation error\00", align 1
@sid_everyone = common global %struct.cifs_sid zeroinitializer, align 4
@sid_authusers = common global %struct.cifs_sid zeroinitializer, align 4
@llvm.used = appending global [1 x ptr] [ptr @parse_dacl], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @parse_dacl(ptr noundef %0, ptr noundef readnone %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #0 {
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca i32, align 4
%9 = icmp eq ptr %0, null
br i1 %9, label %10, label %14
10: ; preds = %5
%11 = load i32, ptr @S_IRWXUGO, align 4, !tbaa !6
%12 = load i32, ptr %4, align 4, !tbaa !10
%13 = or i32 %12, %11
store i32 %13, ptr %4, align 4, !tbaa !10
br label %120
14: ; preds = %5
%15 = getelementptr inbounds i8, ptr %0, i64 4
%16 = load i32, ptr %15, align 4, !tbaa !12
%17 = tail call i32 @le16_to_cpu(i32 noundef %16) #3
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i8, ptr %0, i64 %18
%20 = icmp ugt ptr %19, %1
br i1 %20, label %21, label %23
21: ; preds = %14
%22 = tail call i32 @cERROR(i32 noundef 1, ptr noundef nonnull @.str) #3
br label %120
23: ; preds = %14
%24 = load i32, ptr @DBG2, align 4, !tbaa !6
%25 = getelementptr inbounds i8, ptr %0, i64 8
%26 = load i32, ptr %25, align 4, !tbaa !14
%27 = tail call i32 @le16_to_cpu(i32 noundef %26) #3
%28 = load i32, ptr %15, align 4, !tbaa !12
%29 = tail call i32 @le16_to_cpu(i32 noundef %28) #3
%30 = load i32, ptr %0, align 4, !tbaa !15
%31 = tail call i32 @le32_to_cpu(i32 noundef %30) #3
%32 = tail call i32 @cFYI(i32 noundef %24, ptr noundef nonnull @.str.1, i32 noundef %27, i32 noundef %29, i32 noundef %31) #3
%33 = load i32, ptr @S_IRWXUGO, align 4, !tbaa !6
%34 = xor i32 %33, -1
%35 = load i32, ptr %4, align 4, !tbaa !10
%36 = and i32 %35, %34
store i32 %36, ptr %4, align 4, !tbaa !10
%37 = load i32, ptr %0, align 4, !tbaa !15
%38 = tail call i32 @le32_to_cpu(i32 noundef %37) #3
%39 = icmp sgt i32 %38, 0
br i1 %39, label %40, label %120
40: ; preds = %23
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
%41 = load i32, ptr @S_IRWXU, align 4, !tbaa !6
store i32 %41, ptr %6, align 4, !tbaa !6
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
%42 = load i32, ptr @S_IRWXG, align 4, !tbaa !6
store i32 %42, ptr %7, align 4, !tbaa !6
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
%43 = load i32, ptr @S_IRWXO, align 4, !tbaa !6
%44 = or i32 %41, %43
%45 = or i32 %44, %42
store i32 %45, ptr %8, align 4, !tbaa !6
%46 = zext nneg i32 %38 to i64
%47 = load i32, ptr @ULONG_MAX, align 4, !tbaa !6
%48 = sext i32 %47 to i64
%49 = lshr i64 %48, 3
%50 = icmp ult i64 %49, %46
br i1 %50, label %119, label %51
51: ; preds = %40
%52 = shl i32 %38, 3
%53 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%54 = tail call ptr @kmalloc(i32 noundef %52, i32 noundef %53) #3
%55 = icmp eq ptr %54, null
br i1 %55, label %56, label %58
56: ; preds = %51
%57 = tail call i32 @cERROR(i32 noundef 1, ptr noundef nonnull @.str.2) #3
br label %119
58: ; preds = %51, %111
%59 = phi i64 [ %115, %111 ], [ 0, %51 ]
%60 = phi ptr [ %112, %111 ], [ %0, %51 ]
%61 = phi i32 [ %114, %111 ], [ 12, %51 ]
%62 = sext i32 %61 to i64
%63 = getelementptr inbounds i8, ptr %60, i64 %62
%64 = getelementptr inbounds ptr, ptr %54, i64 %59
store ptr %63, ptr %64, align 8, !tbaa !16
%65 = getelementptr inbounds i8, ptr %63, i64 12
%66 = call i64 @compare_sids(ptr noundef nonnull %65, ptr noundef %2) #3
%67 = icmp eq i64 %66, 0
br i1 %67, label %68, label %75
68: ; preds = %58
%69 = load ptr, ptr %64, align 8, !tbaa !16
%70 = getelementptr inbounds i8, ptr %69, i64 8
%71 = load i32, ptr %70, align 4, !tbaa !18
%72 = getelementptr inbounds i8, ptr %69, i64 4
%73 = load i32, ptr %72, align 4, !tbaa !20
%74 = call i32 @access_flags_to_mode(i32 noundef %71, i32 noundef %73, ptr noundef nonnull %4, ptr noundef nonnull %6) #3
br label %75
75: ; preds = %68, %58
%76 = load ptr, ptr %64, align 8, !tbaa !16
%77 = getelementptr inbounds i8, ptr %76, i64 12
%78 = call i64 @compare_sids(ptr noundef nonnull %77, ptr noundef %3) #3
%79 = icmp eq i64 %78, 0
br i1 %79, label %80, label %87
80: ; preds = %75
%81 = load ptr, ptr %64, align 8, !tbaa !16
%82 = getelementptr inbounds i8, ptr %81, i64 8
%83 = load i32, ptr %82, align 4, !tbaa !18
%84 = getelementptr inbounds i8, ptr %81, i64 4
%85 = load i32, ptr %84, align 4, !tbaa !20
%86 = call i32 @access_flags_to_mode(i32 noundef %83, i32 noundef %85, ptr noundef nonnull %4, ptr noundef nonnull %7) #3
br label %87
87: ; preds = %80, %75
%88 = load ptr, ptr %64, align 8, !tbaa !16
%89 = getelementptr inbounds i8, ptr %88, i64 12
%90 = call i64 @compare_sids(ptr noundef nonnull %89, ptr noundef nonnull @sid_everyone) #3
%91 = icmp eq i64 %90, 0
br i1 %91, label %92, label %99
92: ; preds = %87
%93 = load ptr, ptr %64, align 8, !tbaa !16
%94 = getelementptr inbounds i8, ptr %93, i64 8
%95 = load i32, ptr %94, align 4, !tbaa !18
%96 = getelementptr inbounds i8, ptr %93, i64 4
%97 = load i32, ptr %96, align 4, !tbaa !20
%98 = call i32 @access_flags_to_mode(i32 noundef %95, i32 noundef %97, ptr noundef nonnull %4, ptr noundef nonnull %8) #3
br label %99
99: ; preds = %92, %87
%100 = load ptr, ptr %64, align 8, !tbaa !16
%101 = getelementptr inbounds i8, ptr %100, i64 12
%102 = call i64 @compare_sids(ptr noundef nonnull %101, ptr noundef nonnull @sid_authusers) #3
%103 = icmp eq i64 %102, 0
br i1 %103, label %104, label %111
104: ; preds = %99
%105 = load ptr, ptr %64, align 8, !tbaa !16
%106 = getelementptr inbounds i8, ptr %105, i64 8
%107 = load i32, ptr %106, align 4, !tbaa !18
%108 = getelementptr inbounds i8, ptr %105, i64 4
%109 = load i32, ptr %108, align 4, !tbaa !20
%110 = call i32 @access_flags_to_mode(i32 noundef %107, i32 noundef %109, ptr noundef nonnull %4, ptr noundef nonnull %8) #3
br label %111
111: ; preds = %104, %99
%112 = load ptr, ptr %64, align 8, !tbaa !16
%113 = load i32, ptr %112, align 4, !tbaa !21
%114 = call i32 @le16_to_cpu(i32 noundef %113) #3
%115 = add nuw nsw i64 %59, 1
%116 = icmp eq i64 %115, %46
br i1 %116, label %117, label %58, !llvm.loop !22
117: ; preds = %111
%118 = call i32 @kfree(ptr noundef nonnull %54) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
br label %120
119: ; preds = %40, %56
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
br label %120
120: ; preds = %23, %117, %119, %21, %10
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #2
declare i32 @cERROR(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @cFYI(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @le32_to_cpu(i32 noundef) local_unnamed_addr #2
declare ptr @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @compare_sids(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @access_flags_to_mode(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @kfree(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"cifs_fattr", !7, i64 0}
!12 = !{!13, !7, i64 4}
!13 = !{!"cifs_acl", !7, i64 0, !7, i64 4, !7, i64 8}
!14 = !{!13, !7, i64 8}
!15 = !{!13, !7, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"any pointer", !8, i64 0}
!18 = !{!19, !7, i64 8}
!19 = !{!"cifs_ace", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!20 = !{!19, !7, i64 4}
!21 = !{!19, !7, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
| fastsocket_kernel_fs_cifs_extr_cifsacl.c_parse_dacl |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/extr_nouveau_gem.c_nouveau_gem_set_domain.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/extr_nouveau_gem.c_nouveau_gem_set_domain.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.nouveau_bo = type { i32, %struct.ttm_buffer_object }
%struct.ttm_buffer_object = type { %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i64 }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@NOUVEAU_GEM_DOMAIN_VRAM = dso_local local_unnamed_addr global i32 0, align 4
@TTM_PL_FLAG_VRAM = dso_local local_unnamed_addr global i32 0, align 4
@NOUVEAU_GEM_DOMAIN_GART = dso_local local_unnamed_addr global i32 0, align 4
@TTM_PL_FLAG_TT = dso_local local_unnamed_addr global i32 0, align 4
@TTM_PL_VRAM = dso_local local_unnamed_addr global i64 0, align 8
@TTM_PL_TT = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @nouveau_gem_set_domain], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @nouveau_gem_set_domain(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = load ptr, ptr %0, align 8, !tbaa !5
%6 = getelementptr inbounds %struct.nouveau_bo, ptr %5, i64 0, i32 1
%7 = load i32, ptr %5, align 8, !tbaa !10
%8 = icmp eq i32 %2, 0
%9 = select i1 %8, i32 %1, i32 %2
%10 = and i32 %9, %7
%11 = and i32 %10, %3
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %4
%14 = load i32, ptr @EINVAL, align 4, !tbaa !16
%15 = sub nsw i32 0, %14
br label %47
16: ; preds = %4
%17 = load i32, ptr @NOUVEAU_GEM_DOMAIN_VRAM, align 4, !tbaa !16
%18 = and i32 %17, %3
%19 = icmp eq i32 %18, 0
%20 = load i32, ptr @TTM_PL_FLAG_VRAM, align 4
%21 = select i1 %19, i32 0, i32 %20
%22 = load i32, ptr @NOUVEAU_GEM_DOMAIN_GART, align 4, !tbaa !16
%23 = and i32 %22, %3
%24 = icmp eq i32 %23, 0
%25 = load i32, ptr @TTM_PL_FLAG_TT, align 4
%26 = select i1 %24, i32 0, i32 %25
%27 = or i32 %26, %21
%28 = and i32 %17, %11
%29 = icmp eq i32 %28, 0
br i1 %29, label %34, label %30
30: ; preds = %16
%31 = load i64, ptr %6, align 8, !tbaa !17
%32 = load i64, ptr @TTM_PL_VRAM, align 8, !tbaa !18
%33 = icmp eq i64 %31, %32
br i1 %33, label %43, label %34
34: ; preds = %30, %16
%35 = and i32 %22, %11
%36 = icmp eq i32 %35, 0
br i1 %36, label %41, label %37
37: ; preds = %34
%38 = load i64, ptr %6, align 8, !tbaa !17
%39 = load i64, ptr @TTM_PL_TT, align 8, !tbaa !18
%40 = icmp eq i64 %38, %39
br i1 %40, label %43, label %41
41: ; preds = %37, %34
%42 = select i1 %29, ptr @TTM_PL_FLAG_TT, ptr @TTM_PL_FLAG_VRAM
br label %43
43: ; preds = %41, %37, %30
%44 = phi ptr [ @TTM_PL_FLAG_VRAM, %30 ], [ @TTM_PL_FLAG_TT, %37 ], [ %42, %41 ]
%45 = load i32, ptr %44, align 4, !tbaa !16
%46 = tail call i32 @nouveau_bo_placement_set(ptr noundef nonnull %5, i32 noundef %45, i32 noundef %27) #2
br label %47
47: ; preds = %43, %13
%48 = phi i32 [ 0, %43 ], [ %15, %13 ]
ret i32 %48
}
declare i32 @nouveau_bo_placement_set(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"drm_gem_object", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"nouveau_bo", !12, i64 0, !13, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!"ttm_buffer_object", !14, i64 0}
!14 = !{!"TYPE_2__", !15, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!12, !12, i64 0}
!17 = !{!13, !15, i64 0}
!18 = !{!15, !15, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/extr_nouveau_gem.c_nouveau_gem_set_domain.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/nouveau/extr_nouveau_gem.c_nouveau_gem_set_domain.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@NOUVEAU_GEM_DOMAIN_VRAM = common local_unnamed_addr global i32 0, align 4
@TTM_PL_FLAG_VRAM = common local_unnamed_addr global i32 0, align 4
@NOUVEAU_GEM_DOMAIN_GART = common local_unnamed_addr global i32 0, align 4
@TTM_PL_FLAG_TT = common local_unnamed_addr global i32 0, align 4
@TTM_PL_VRAM = common local_unnamed_addr global i64 0, align 8
@TTM_PL_TT = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @nouveau_gem_set_domain], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @nouveau_gem_set_domain(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = load ptr, ptr %0, align 8, !tbaa !6
%6 = getelementptr inbounds i8, ptr %5, i64 8
%7 = load i32, ptr %5, align 8, !tbaa !11
%8 = icmp eq i32 %2, 0
%9 = select i1 %8, i32 %1, i32 %2
%10 = and i32 %9, %7
%11 = and i32 %10, %3
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %16
13: ; preds = %4
%14 = load i32, ptr @EINVAL, align 4, !tbaa !17
%15 = sub nsw i32 0, %14
br label %47
16: ; preds = %4
%17 = load i32, ptr @NOUVEAU_GEM_DOMAIN_VRAM, align 4, !tbaa !17
%18 = and i32 %17, %3
%19 = icmp eq i32 %18, 0
%20 = load i32, ptr @TTM_PL_FLAG_VRAM, align 4
%21 = select i1 %19, i32 0, i32 %20
%22 = load i32, ptr @NOUVEAU_GEM_DOMAIN_GART, align 4, !tbaa !17
%23 = and i32 %22, %3
%24 = icmp eq i32 %23, 0
%25 = load i32, ptr @TTM_PL_FLAG_TT, align 4
%26 = select i1 %24, i32 0, i32 %25
%27 = or i32 %26, %21
%28 = and i32 %17, %11
%29 = icmp eq i32 %28, 0
br i1 %29, label %34, label %30
30: ; preds = %16
%31 = load i64, ptr %6, align 8, !tbaa !18
%32 = load i64, ptr @TTM_PL_VRAM, align 8, !tbaa !19
%33 = icmp eq i64 %31, %32
br i1 %33, label %43, label %34
34: ; preds = %30, %16
%35 = and i32 %22, %11
%36 = icmp eq i32 %35, 0
br i1 %36, label %41, label %37
37: ; preds = %34
%38 = load i64, ptr %6, align 8, !tbaa !18
%39 = load i64, ptr @TTM_PL_TT, align 8, !tbaa !19
%40 = icmp eq i64 %38, %39
br i1 %40, label %43, label %41
41: ; preds = %37, %34
%42 = select i1 %29, ptr @TTM_PL_FLAG_TT, ptr @TTM_PL_FLAG_VRAM
br label %43
43: ; preds = %41, %37, %30
%44 = phi ptr [ @TTM_PL_FLAG_VRAM, %30 ], [ @TTM_PL_FLAG_TT, %37 ], [ %42, %41 ]
%45 = load i32, ptr %44, align 4, !tbaa !17
%46 = tail call i32 @nouveau_bo_placement_set(ptr noundef nonnull %5, i32 noundef %45, i32 noundef %27) #2
br label %47
47: ; preds = %43, %13
%48 = phi i32 [ 0, %43 ], [ %15, %13 ]
ret i32 %48
}
declare i32 @nouveau_bo_placement_set(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"drm_gem_object", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"nouveau_bo", !13, i64 0, !14, i64 8}
!13 = !{!"int", !9, i64 0}
!14 = !{!"ttm_buffer_object", !15, i64 0}
!15 = !{!"TYPE_2__", !16, i64 0}
!16 = !{!"long", !9, i64 0}
!17 = !{!13, !13, i64 0}
!18 = !{!14, !16, i64 0}
!19 = !{!16, !16, i64 0}
| fastsocket_kernel_drivers_gpu_drm_nouveau_extr_nouveau_gem.c_nouveau_gem_set_domain |
; ModuleID = 'AnghaBench/esp-idf/components/bt/host/bluedroid/stack/smp/extr_smp_act.c_smp_br_process_slave_keys_response.c'
source_filename = "AnghaBench/esp-idf/components/bt/host/bluedroid/stack/smp/extr_smp_act.c_smp_br_process_slave_keys_response.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @smp_br_process_slave_keys_response(ptr noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 {
%3 = tail call i32 @smp_br_send_pair_response(ptr noundef %0, ptr noundef null) #2
ret void
}
declare i32 @smp_br_send_pair_response(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/esp-idf/components/bt/host/bluedroid/stack/smp/extr_smp_act.c_smp_br_process_slave_keys_response.c'
source_filename = "AnghaBench/esp-idf/components/bt/host/bluedroid/stack/smp/extr_smp_act.c_smp_br_process_slave_keys_response.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @smp_br_process_slave_keys_response(ptr noundef %0, ptr nocapture noundef readnone %1) local_unnamed_addr #0 {
%3 = tail call i32 @smp_br_send_pair_response(ptr noundef %0, ptr noundef null) #2
ret void
}
declare i32 @smp_br_send_pair_response(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| esp-idf_components_bt_host_bluedroid_stack_smp_extr_smp_act.c_smp_br_process_slave_keys_response |
; ModuleID = 'AnghaBench/freebsd/sys/dev/bhnd/siba/extr_siba_subr.c_siba_cfg_agent_region.c'
source_filename = "AnghaBench/freebsd/sys/dev/bhnd/siba/extr_siba_subr.c_siba_cfg_agent_region.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @siba_cfg_agent_region(i32 noundef returned %0) local_unnamed_addr #0 {
ret i32 %0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/bhnd/siba/extr_siba_subr.c_siba_cfg_agent_region.c'
source_filename = "AnghaBench/freebsd/sys/dev/bhnd/siba/extr_siba_subr.c_siba_cfg_agent_region.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef i32 @siba_cfg_agent_region(i32 noundef returned %0) local_unnamed_addr #0 {
ret i32 %0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_sys_dev_bhnd_siba_extr_siba_subr.c_siba_cfg_agent_region |
; ModuleID = 'AnghaBench/lab/engine/code/ui/extr_ui_main.c_UI_DrawCrosshair.c'
source_filename = "AnghaBench/lab/engine/code/ui/extr_ui_main.c_UI_DrawCrosshair.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
%struct.TYPE_9__ = type { i64, %struct.TYPE_7__ }
%struct.TYPE_7__ = type { %struct.TYPE_6__ }
%struct.TYPE_6__ = type { i32* }
%struct.TYPE_8__ = type { i64, i32, i64, i32 }
@uiInfo = dso_local local_unnamed_addr global %struct.TYPE_9__ zeroinitializer, align 8
@llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (void (%struct.TYPE_8__*, float, i32*)* @UI_DrawCrosshair to i8*)], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @UI_DrawCrosshair(%struct.TYPE_8__* nocapture noundef readonly %0, float noundef %1, i32* noundef %2) #0 {
%4 = load i64, i64* getelementptr inbounds (%struct.TYPE_9__, %struct.TYPE_9__* @uiInfo, i64 0, i32 0), align 8, !tbaa !5
%5 = icmp eq i64 %4, 0
br i1 %5, label %23, label %6
6: ; preds = %3
%7 = tail call i32 @trap_R_SetColor(i32* noundef %2) #2
%8 = getelementptr inbounds %struct.TYPE_8__, %struct.TYPE_8__* %0, i64 0, i32 3
%9 = load i32, i32* %8, align 8, !tbaa !13
%10 = getelementptr inbounds %struct.TYPE_8__, %struct.TYPE_8__* %0, i64 0, i32 2
%11 = load i64, i64* %10, align 8, !tbaa !16
%12 = getelementptr inbounds %struct.TYPE_8__, %struct.TYPE_8__* %0, i64 0, i32 0
%13 = load i64, i64* %12, align 8, !tbaa !17
%14 = sub nsw i64 %11, %13
%15 = getelementptr inbounds %struct.TYPE_8__, %struct.TYPE_8__* %0, i64 0, i32 1
%16 = load i32, i32* %15, align 8, !tbaa !18
%17 = load i32*, i32** getelementptr inbounds (%struct.TYPE_9__, %struct.TYPE_9__* @uiInfo, i64 0, i32 1, i32 0, i32 0), align 8, !tbaa !19
%18 = load i64, i64* getelementptr inbounds (%struct.TYPE_9__, %struct.TYPE_9__* @uiInfo, i64 0, i32 0), align 8, !tbaa !5
%19 = getelementptr inbounds i32, i32* %17, i64 %18
%20 = load i32, i32* %19, align 4, !tbaa !20
%21 = tail call i32 @UI_DrawHandlePic(i32 noundef %9, i64 noundef %14, i32 noundef %16, i64 noundef %13, i32 noundef %20) #2
%22 = tail call i32 @trap_R_SetColor(i32* noundef null) #2
br label %23
23: ; preds = %3, %6
ret void
}
declare i32 @trap_R_SetColor(i32* noundef) local_unnamed_addr #1
declare i32 @UI_DrawHandlePic(i32 noundef, i64 noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 7, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{!"Ubuntu clang version 14.0.0-1ubuntu1.1"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_9__", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_7__", !11, i64 0}
!11 = !{!"TYPE_6__", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !15, i64 24}
!14 = !{!"TYPE_8__", !7, i64 0, !15, i64 8, !7, i64 16, !15, i64 24}
!15 = !{!"int", !8, i64 0}
!16 = !{!14, !7, i64 16}
!17 = !{!14, !7, i64 0}
!18 = !{!14, !15, i64 8}
!19 = !{!6, !12, i64 8}
!20 = !{!15, !15, i64 0}
| ; ModuleID = 'AnghaBench/lab/engine/code/ui/extr_ui_main.c_UI_DrawCrosshair.c'
source_filename = "AnghaBench/lab/engine/code/ui/extr_ui_main.c_UI_DrawCrosshair.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_9__ = type { i64, %struct.TYPE_7__ }
%struct.TYPE_7__ = type { %struct.TYPE_6__ }
%struct.TYPE_6__ = type { ptr }
@uiInfo = common local_unnamed_addr global %struct.TYPE_9__ zeroinitializer, align 8
@llvm.used = appending global [1 x ptr] [ptr @UI_DrawCrosshair], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @UI_DrawCrosshair(ptr nocapture noundef readonly %0, float %1, ptr noundef %2) #0 {
%4 = load i64, ptr @uiInfo, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
br i1 %5, label %22, label %6
6: ; preds = %3
%7 = tail call i32 @trap_R_SetColor(ptr noundef %2) #2
%8 = getelementptr inbounds i8, ptr %0, i64 24
%9 = load i32, ptr %8, align 8, !tbaa !14
%10 = getelementptr inbounds i8, ptr %0, i64 16
%11 = load i64, ptr %10, align 8, !tbaa !17
%12 = load i64, ptr %0, align 8, !tbaa !18
%13 = sub nsw i64 %11, %12
%14 = getelementptr inbounds i8, ptr %0, i64 8
%15 = load i32, ptr %14, align 8, !tbaa !19
%16 = load ptr, ptr getelementptr inbounds (i8, ptr @uiInfo, i64 8), align 8, !tbaa !20
%17 = load i64, ptr @uiInfo, align 8, !tbaa !6
%18 = getelementptr inbounds i32, ptr %16, i64 %17
%19 = load i32, ptr %18, align 4, !tbaa !21
%20 = tail call i32 @UI_DrawHandlePic(i32 noundef %9, i64 noundef %13, i32 noundef %15, i64 noundef %12, i32 noundef %19) #2
%21 = tail call i32 @trap_R_SetColor(ptr noundef null) #2
br label %22
22: ; preds = %3, %6
ret void
}
declare i32 @trap_R_SetColor(ptr noundef) local_unnamed_addr #1
declare i32 @UI_DrawHandlePic(i32 noundef, i64 noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_9__", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_7__", !12, i64 0}
!12 = !{!"TYPE_6__", !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!15, !16, i64 24}
!15 = !{!"TYPE_8__", !8, i64 0, !16, i64 8, !8, i64 16, !16, i64 24}
!16 = !{!"int", !9, i64 0}
!17 = !{!15, !8, i64 16}
!18 = !{!15, !8, i64 0}
!19 = !{!15, !16, i64 8}
!20 = !{!7, !13, i64 8}
!21 = !{!16, !16, i64 0}
| lab_engine_code_ui_extr_ui_main.c_UI_DrawCrosshair |
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/msi/extr_db.c_do_query.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/msi/extr_db.c_do_query.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ERROR_SUCCESS = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @do_query], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @do_query(i64 noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
store i64 0, ptr %4, align 8, !tbaa !5
%5 = icmp eq ptr %2, null
br i1 %5, label %7, label %6
6: ; preds = %3
store i64 0, ptr %2, align 8, !tbaa !5
br label %7
7: ; preds = %6, %3
%8 = call i64 @MsiDatabaseOpenViewA(i64 noundef %0, ptr noundef %1, ptr noundef nonnull %4) #3
%9 = load i64, ptr @ERROR_SUCCESS, align 8, !tbaa !5
%10 = icmp eq i64 %8, %9
br i1 %10, label %11, label %29
11: ; preds = %7
%12 = load i64, ptr %4, align 8, !tbaa !5
%13 = call i64 @MsiViewExecute(i64 noundef %12, i32 noundef 0) #3
%14 = load i64, ptr @ERROR_SUCCESS, align 8, !tbaa !5
%15 = icmp eq i64 %13, %14
br i1 %15, label %16, label %29
16: ; preds = %11
%17 = load i64, ptr %4, align 8, !tbaa !5
%18 = call i64 @MsiViewFetch(i64 noundef %17, ptr noundef %2) #3
%19 = load i64, ptr %4, align 8, !tbaa !5
%20 = call i64 @MsiViewClose(i64 noundef %19) #3
%21 = load i64, ptr @ERROR_SUCCESS, align 8, !tbaa !5
%22 = icmp eq i64 %20, %21
br i1 %22, label %23, label %29
23: ; preds = %16
%24 = load i64, ptr %4, align 8, !tbaa !5
%25 = call i64 @MsiCloseHandle(i64 noundef %24) #3
%26 = load i64, ptr @ERROR_SUCCESS, align 8, !tbaa !5
%27 = icmp eq i64 %25, %26
%28 = select i1 %27, i64 %18, i64 %25
br label %29
29: ; preds = %23, %16, %11, %7
%30 = phi i64 [ %8, %7 ], [ %13, %11 ], [ %20, %16 ], [ %28, %23 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret i64 %30
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @MsiDatabaseOpenViewA(i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @MsiViewExecute(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @MsiViewFetch(i64 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @MsiViewClose(i64 noundef) local_unnamed_addr #2
declare i64 @MsiCloseHandle(i64 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/msi/extr_db.c_do_query.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/msi/extr_db.c_do_query.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ERROR_SUCCESS = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @do_query], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @do_query(i64 noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
store i64 0, ptr %4, align 8, !tbaa !6
%5 = icmp eq ptr %2, null
br i1 %5, label %7, label %6
6: ; preds = %3
store i64 0, ptr %2, align 8, !tbaa !6
br label %7
7: ; preds = %6, %3
%8 = call i64 @MsiDatabaseOpenViewA(i64 noundef %0, ptr noundef %1, ptr noundef nonnull %4) #3
%9 = load i64, ptr @ERROR_SUCCESS, align 8, !tbaa !6
%10 = icmp eq i64 %8, %9
br i1 %10, label %11, label %29
11: ; preds = %7
%12 = load i64, ptr %4, align 8, !tbaa !6
%13 = call i64 @MsiViewExecute(i64 noundef %12, i32 noundef 0) #3
%14 = load i64, ptr @ERROR_SUCCESS, align 8, !tbaa !6
%15 = icmp eq i64 %13, %14
br i1 %15, label %16, label %29
16: ; preds = %11
%17 = load i64, ptr %4, align 8, !tbaa !6
%18 = call i64 @MsiViewFetch(i64 noundef %17, ptr noundef %2) #3
%19 = load i64, ptr %4, align 8, !tbaa !6
%20 = call i64 @MsiViewClose(i64 noundef %19) #3
%21 = load i64, ptr @ERROR_SUCCESS, align 8, !tbaa !6
%22 = icmp eq i64 %20, %21
br i1 %22, label %23, label %29
23: ; preds = %16
%24 = load i64, ptr %4, align 8, !tbaa !6
%25 = call i64 @MsiCloseHandle(i64 noundef %24) #3
%26 = load i64, ptr @ERROR_SUCCESS, align 8, !tbaa !6
%27 = icmp eq i64 %25, %26
%28 = select i1 %27, i64 %18, i64 %25
br label %29
29: ; preds = %23, %16, %11, %7
%30 = phi i64 [ %8, %7 ], [ %13, %11 ], [ %20, %16 ], [ %28, %23 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret i64 %30
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @MsiDatabaseOpenViewA(i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @MsiViewExecute(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @MsiViewFetch(i64 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @MsiViewClose(i64 noundef) local_unnamed_addr #2
declare i64 @MsiCloseHandle(i64 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| reactos_modules_rostests_winetests_msi_extr_db.c_do_query |
; ModuleID = 'AnghaBench/reactos/base/applications/winhlp32/extr_macro.lex.yy.c_yy_init_globals.c'
source_filename = "AnghaBench/reactos/base/applications/winhlp32/extr_macro.lex.yy.c_yy_init_globals.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@yy_buffer_stack = dso_local local_unnamed_addr global i64 0, align 8
@yy_buffer_stack_top = dso_local local_unnamed_addr global i64 0, align 8
@yy_buffer_stack_max = dso_local local_unnamed_addr global i64 0, align 8
@yy_c_buf_p = dso_local local_unnamed_addr global ptr null, align 8
@yy_init = dso_local local_unnamed_addr global i64 0, align 8
@yy_start = dso_local local_unnamed_addr global i64 0, align 8
@yyin = dso_local local_unnamed_addr global ptr null, align 8
@yyout = dso_local local_unnamed_addr global ptr null, align 8
@stdin = dso_local local_unnamed_addr global ptr null, align 8
@stdout = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @yy_init_globals], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable
define internal noundef i32 @yy_init_globals() #0 {
store i64 0, ptr @yy_buffer_stack, align 8, !tbaa !5
store i64 0, ptr @yy_buffer_stack_top, align 8, !tbaa !5
store i64 0, ptr @yy_buffer_stack_max, align 8, !tbaa !5
store ptr null, ptr @yy_c_buf_p, align 8, !tbaa !9
store i64 0, ptr @yy_init, align 8, !tbaa !5
store i64 0, ptr @yy_start, align 8, !tbaa !5
store ptr null, ptr @yyin, align 8, !tbaa !9
store ptr null, ptr @yyout, align 8, !tbaa !9
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/reactos/base/applications/winhlp32/extr_macro.lex.yy.c_yy_init_globals.c'
source_filename = "AnghaBench/reactos/base/applications/winhlp32/extr_macro.lex.yy.c_yy_init_globals.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@yy_buffer_stack = common local_unnamed_addr global i64 0, align 8
@yy_buffer_stack_top = common local_unnamed_addr global i64 0, align 8
@yy_buffer_stack_max = common local_unnamed_addr global i64 0, align 8
@yy_c_buf_p = common local_unnamed_addr global ptr null, align 8
@yy_init = common local_unnamed_addr global i64 0, align 8
@yy_start = common local_unnamed_addr global i64 0, align 8
@yyin = common local_unnamed_addr global ptr null, align 8
@yyout = common local_unnamed_addr global ptr null, align 8
@stdin = common local_unnamed_addr global ptr null, align 8
@stdout = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @yy_init_globals], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal noundef i32 @yy_init_globals() #0 {
store i64 0, ptr @yy_buffer_stack, align 8, !tbaa !6
store i64 0, ptr @yy_buffer_stack_top, align 8, !tbaa !6
store i64 0, ptr @yy_buffer_stack_max, align 8, !tbaa !6
store ptr null, ptr @yy_c_buf_p, align 8, !tbaa !10
store i64 0, ptr @yy_init, align 8, !tbaa !6
store i64 0, ptr @yy_start, align 8, !tbaa !6
store ptr null, ptr @yyin, align 8, !tbaa !10
store ptr null, ptr @yyout, align 8, !tbaa !10
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
| reactos_base_applications_winhlp32_extr_macro.lex.yy.c_yy_init_globals |
; ModuleID = 'AnghaBench/openvpn/src/openvpn/extr_forward.c_socks_preprocess_outgoing_link.c'
source_filename = "AnghaBench/openvpn/src/openvpn/extr_forward.c_socks_preprocess_outgoing_link.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { %struct.link_socket_actual, %struct.TYPE_4__, i64 }
%struct.link_socket_actual = type { i32 }
%struct.TYPE_4__ = type { i64 }
%struct.TYPE_6__ = type { ptr, i32, i32 }
@PROTO_UDP = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @socks_preprocess_outgoing_link], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @socks_preprocess_outgoing_link(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.TYPE_5__, ptr %4, i64 0, i32 2
%6 = load i64, ptr %5, align 8, !tbaa !12
%7 = icmp eq i64 %6, 0
br i1 %7, label %22, label %8
8: ; preds = %3
%9 = getelementptr inbounds %struct.TYPE_5__, ptr %4, i64 0, i32 1
%10 = load i64, ptr %9, align 8, !tbaa !17
%11 = load i64, ptr @PROTO_UDP, align 8, !tbaa !18
%12 = icmp eq i64 %10, %11
br i1 %12, label %13, label %22
13: ; preds = %8
%14 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 2
%15 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1
%16 = load i32, ptr %15, align 8, !tbaa !19
%17 = tail call i64 @socks_process_outgoing_udp(ptr noundef nonnull %14, i32 noundef %16) #2
%18 = load i32, ptr %2, align 4, !tbaa !20
%19 = trunc i64 %17 to i32
%20 = add i32 %18, %19
store i32 %20, ptr %2, align 4, !tbaa !20
%21 = load ptr, ptr %0, align 8, !tbaa !5
store ptr %21, ptr %1, align 8, !tbaa !21
br label %22
22: ; preds = %13, %8, %3
ret void
}
declare i64 @socks_process_outgoing_udp(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"context", !7, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0, !11, i64 8, !11, i64 12}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!13, !16, i64 16}
!13 = !{!"TYPE_5__", !14, i64 0, !15, i64 8, !16, i64 16}
!14 = !{!"link_socket_actual", !11, i64 0}
!15 = !{!"TYPE_4__", !16, i64 0}
!16 = !{!"long", !9, i64 0}
!17 = !{!13, !16, i64 8}
!18 = !{!16, !16, i64 0}
!19 = !{!6, !11, i64 8}
!20 = !{!11, !11, i64 0}
!21 = !{!8, !8, i64 0}
| ; ModuleID = 'AnghaBench/openvpn/src/openvpn/extr_forward.c_socks_preprocess_outgoing_link.c'
source_filename = "AnghaBench/openvpn/src/openvpn/extr_forward.c_socks_preprocess_outgoing_link.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PROTO_UDP = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @socks_preprocess_outgoing_link], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @socks_preprocess_outgoing_link(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %4, i64 16
%6 = load i64, ptr %5, align 8, !tbaa !13
%7 = icmp eq i64 %6, 0
br i1 %7, label %22, label %8
8: ; preds = %3
%9 = getelementptr inbounds i8, ptr %4, i64 8
%10 = load i64, ptr %9, align 8, !tbaa !18
%11 = load i64, ptr @PROTO_UDP, align 8, !tbaa !19
%12 = icmp eq i64 %10, %11
br i1 %12, label %13, label %22
13: ; preds = %8
%14 = getelementptr inbounds i8, ptr %0, i64 12
%15 = getelementptr inbounds i8, ptr %0, i64 8
%16 = load i32, ptr %15, align 8, !tbaa !20
%17 = tail call i64 @socks_process_outgoing_udp(ptr noundef nonnull %14, i32 noundef %16) #2
%18 = load i32, ptr %2, align 4, !tbaa !21
%19 = trunc i64 %17 to i32
%20 = add i32 %18, %19
store i32 %20, ptr %2, align 4, !tbaa !21
%21 = load ptr, ptr %0, align 8, !tbaa !6
store ptr %21, ptr %1, align 8, !tbaa !22
br label %22
22: ; preds = %13, %8, %3
ret void
}
declare i64 @socks_process_outgoing_udp(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"context", !8, i64 0}
!8 = !{!"TYPE_6__", !9, i64 0, !12, i64 8, !12, i64 12}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"int", !10, i64 0}
!13 = !{!14, !17, i64 16}
!14 = !{!"TYPE_5__", !15, i64 0, !16, i64 8, !17, i64 16}
!15 = !{!"link_socket_actual", !12, i64 0}
!16 = !{!"TYPE_4__", !17, i64 0}
!17 = !{!"long", !10, i64 0}
!18 = !{!14, !17, i64 8}
!19 = !{!17, !17, i64 0}
!20 = !{!7, !12, i64 8}
!21 = !{!12, !12, i64 0}
!22 = !{!9, !9, i64 0}
| openvpn_src_openvpn_extr_forward.c_socks_preprocess_outgoing_link |
; ModuleID = 'AnghaBench/curl/lib/extr_http.c_add_haproxy_protocol_header.c'
source_filename = "AnghaBench/curl/lib/extr_http.c_add_haproxy_protocol_header.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.connectdata = type { ptr, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i64 }
%struct.TYPE_5__ = type { i32, i32, i32, i32, i32 }
@.str = private unnamed_addr constant [5 x i8] c"TCP6\00", align 1
@.str.1 = private unnamed_addr constant [5 x i8] c"TCP4\00", align 1
@.str.2 = private unnamed_addr constant [25 x i8] c"PROXY %s %s %s %li %li\0D\0A\00", align 1
@CURLE_OUT_OF_MEMORY = dso_local local_unnamed_addr global i64 0, align 8
@FIRSTSOCKET = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @add_haproxy_protocol_header], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @add_haproxy_protocol_header(ptr noundef %0) #0 {
%2 = alloca [128 x i8], align 16
%3 = alloca ptr, align 8
%4 = alloca [5 x i8], align 1
call void @llvm.lifetime.start.p0(i64 128, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 5, ptr nonnull %4) #3
%5 = getelementptr inbounds %struct.connectdata, ptr %0, i64 0, i32 1
%6 = load i64, ptr %5, align 8, !tbaa !5
%7 = icmp eq i64 %6, 0
%8 = select i1 %7, ptr @.str.1, ptr @.str
%9 = call i32 @strcpy(ptr noundef nonnull %4, ptr noundef nonnull %8) #3
%10 = load ptr, ptr %0, align 8, !tbaa !12
%11 = getelementptr inbounds %struct.TYPE_5__, ptr %10, i64 0, i32 4
%12 = load i32, ptr %11, align 4, !tbaa !13
%13 = getelementptr inbounds %struct.TYPE_5__, ptr %10, i64 0, i32 3
%14 = load i32, ptr %13, align 4, !tbaa !17
%15 = getelementptr inbounds %struct.TYPE_5__, ptr %10, i64 0, i32 2
%16 = load i32, ptr %15, align 4, !tbaa !18
%17 = getelementptr inbounds %struct.TYPE_5__, ptr %10, i64 0, i32 1
%18 = load i32, ptr %17, align 4, !tbaa !19
%19 = call i32 @msnprintf(ptr noundef nonnull %2, i32 noundef 128, ptr noundef nonnull @.str.2, ptr noundef nonnull %4, i32 noundef %12, i32 noundef %14, i32 noundef %16, i32 noundef %18) #3
%20 = call ptr (...) @Curl_add_buffer_init() #3
store ptr %20, ptr %3, align 8, !tbaa !20
%21 = icmp eq ptr %20, null
br i1 %21, label %22, label %24
22: ; preds = %1
%23 = load i64, ptr @CURLE_OUT_OF_MEMORY, align 8, !tbaa !21
br label %31
24: ; preds = %1
%25 = call i64 @Curl_add_bufferf(ptr noundef nonnull %3, ptr noundef nonnull %2) #3
%26 = icmp eq i64 %25, 0
br i1 %26, label %27, label %31
27: ; preds = %24
%28 = load ptr, ptr %0, align 8, !tbaa !12
%29 = load i32, ptr @FIRSTSOCKET, align 4, !tbaa !22
%30 = call i64 @Curl_add_buffer_send(ptr noundef nonnull %3, ptr noundef nonnull %0, ptr noundef %28, i32 noundef 0, i32 noundef %29) #3
br label %31
31: ; preds = %24, %27, %22
%32 = phi i64 [ %30, %27 ], [ %23, %22 ], [ %25, %24 ]
call void @llvm.lifetime.end.p0(i64 5, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 128, ptr nonnull %2) #3
ret i64 %32
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @strcpy(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @msnprintf(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @Curl_add_buffer_init(...) local_unnamed_addr #2
declare i64 @Curl_add_bufferf(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @Curl_add_buffer_send(ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"connectdata", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_4__", !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!14, !16, i64 16}
!14 = !{!"TYPE_6__", !15, i64 0}
!15 = !{!"TYPE_5__", !16, i64 0, !16, i64 4, !16, i64 8, !16, i64 12, !16, i64 16}
!16 = !{!"int", !8, i64 0}
!17 = !{!14, !16, i64 12}
!18 = !{!14, !16, i64 8}
!19 = !{!14, !16, i64 4}
!20 = !{!7, !7, i64 0}
!21 = !{!11, !11, i64 0}
!22 = !{!16, !16, i64 0}
| ; ModuleID = 'AnghaBench/curl/lib/extr_http.c_add_haproxy_protocol_header.c'
source_filename = "AnghaBench/curl/lib/extr_http.c_add_haproxy_protocol_header.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [5 x i8] c"TCP6\00", align 1
@.str.1 = private unnamed_addr constant [5 x i8] c"TCP4\00", align 1
@.str.2 = private unnamed_addr constant [25 x i8] c"PROXY %s %s %s %li %li\0D\0A\00", align 1
@CURLE_OUT_OF_MEMORY = common local_unnamed_addr global i64 0, align 8
@FIRSTSOCKET = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @add_haproxy_protocol_header], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @add_haproxy_protocol_header(ptr noundef %0) #0 {
%2 = alloca [128 x i8], align 1
%3 = alloca ptr, align 8
%4 = alloca [5 x i8], align 1
call void @llvm.lifetime.start.p0(i64 128, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
call void @llvm.lifetime.start.p0(i64 5, ptr nonnull %4) #3
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load i64, ptr %5, align 8, !tbaa !6
%7 = icmp eq i64 %6, 0
%8 = select i1 %7, ptr @.str.1, ptr @.str
%9 = call i32 @strcpy(ptr noundef nonnull %4, ptr noundef nonnull %8) #3
%10 = load ptr, ptr %0, align 8, !tbaa !13
%11 = getelementptr inbounds i8, ptr %10, i64 16
%12 = load i32, ptr %11, align 4, !tbaa !14
%13 = getelementptr inbounds i8, ptr %10, i64 12
%14 = load i32, ptr %13, align 4, !tbaa !18
%15 = getelementptr inbounds i8, ptr %10, i64 8
%16 = load i32, ptr %15, align 4, !tbaa !19
%17 = getelementptr inbounds i8, ptr %10, i64 4
%18 = load i32, ptr %17, align 4, !tbaa !20
%19 = call i32 @msnprintf(ptr noundef nonnull %2, i32 noundef 128, ptr noundef nonnull @.str.2, ptr noundef nonnull %4, i32 noundef %12, i32 noundef %14, i32 noundef %16, i32 noundef %18) #3
%20 = call ptr @Curl_add_buffer_init() #3
store ptr %20, ptr %3, align 8, !tbaa !21
%21 = icmp eq ptr %20, null
br i1 %21, label %22, label %24
22: ; preds = %1
%23 = load i64, ptr @CURLE_OUT_OF_MEMORY, align 8, !tbaa !22
br label %31
24: ; preds = %1
%25 = call i64 @Curl_add_bufferf(ptr noundef nonnull %3, ptr noundef nonnull %2) #3
%26 = icmp eq i64 %25, 0
br i1 %26, label %27, label %31
27: ; preds = %24
%28 = load ptr, ptr %0, align 8, !tbaa !13
%29 = load i32, ptr @FIRSTSOCKET, align 4, !tbaa !23
%30 = call i64 @Curl_add_buffer_send(ptr noundef nonnull %3, ptr noundef nonnull %0, ptr noundef %28, i32 noundef 0, i32 noundef %29) #3
br label %31
31: ; preds = %24, %27, %22
%32 = phi i64 [ %30, %27 ], [ %23, %22 ], [ %25, %24 ]
call void @llvm.lifetime.end.p0(i64 5, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 128, ptr nonnull %2) #3
ret i64 %32
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @strcpy(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @msnprintf(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @Curl_add_buffer_init(...) local_unnamed_addr #2
declare i64 @Curl_add_bufferf(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @Curl_add_buffer_send(ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"connectdata", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!15, !17, i64 16}
!15 = !{!"TYPE_6__", !16, i64 0}
!16 = !{!"TYPE_5__", !17, i64 0, !17, i64 4, !17, i64 8, !17, i64 12, !17, i64 16}
!17 = !{!"int", !9, i64 0}
!18 = !{!15, !17, i64 12}
!19 = !{!15, !17, i64 8}
!20 = !{!15, !17, i64 4}
!21 = !{!8, !8, i64 0}
!22 = !{!12, !12, i64 0}
!23 = !{!17, !17, i64 0}
| curl_lib_extr_http.c_add_haproxy_protocol_header |
; ModuleID = 'AnghaBench/freebsd/contrib/lua/src/extr_liolib.c_io_noclose.c'
source_filename = "AnghaBench/freebsd/contrib/lua/src/extr_liolib.c_io_noclose.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [27 x i8] c"cannot close standard file\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @io_noclose], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @io_noclose(ptr noundef %0) #0 {
%2 = tail call ptr @tolstream(ptr noundef %0) #2
store ptr @io_noclose, ptr %2, align 8, !tbaa !5
%3 = tail call i32 @lua_pushnil(ptr noundef %0) #2
%4 = tail call i32 @lua_pushliteral(ptr noundef %0, ptr noundef nonnull @.str) #2
ret i32 2
}
declare ptr @tolstream(ptr noundef) local_unnamed_addr #1
declare i32 @lua_pushnil(ptr noundef) local_unnamed_addr #1
declare i32 @lua_pushliteral(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/lua/src/extr_liolib.c_io_noclose.c'
source_filename = "AnghaBench/freebsd/contrib/lua/src/extr_liolib.c_io_noclose.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [27 x i8] c"cannot close standard file\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @io_noclose], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @io_noclose(ptr noundef %0) #0 {
%2 = tail call ptr @tolstream(ptr noundef %0) #2
store ptr @io_noclose, ptr %2, align 8, !tbaa !6
%3 = tail call i32 @lua_pushnil(ptr noundef %0) #2
%4 = tail call i32 @lua_pushliteral(ptr noundef %0, ptr noundef nonnull @.str) #2
ret i32 2
}
declare ptr @tolstream(ptr noundef) local_unnamed_addr #1
declare i32 @lua_pushnil(ptr noundef) local_unnamed_addr #1
declare i32 @lua_pushliteral(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_lua_src_extr_liolib.c_io_noclose |
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/ac97/extr_ac97_patch.c_snd_ac97_ymf7x3_spdif_source_info.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/ac97/extr_ac97_patch.c_snd_ac97_ymf7x3_spdif_source_info.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.snd_ctl_elem_info = type { i32, %struct.TYPE_3__, i32 }
%struct.TYPE_3__ = type { %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32, i32, i32 }
@reltable.snd_ac97_ymf7x3_spdif_source_info = internal unnamed_addr constant [2 x i32] [i32 trunc (i64 sub (i64 ptrtoint (ptr @.str to i64), i64 ptrtoint (ptr @reltable.snd_ac97_ymf7x3_spdif_source_info to i64)) to i32), i32 trunc (i64 sub (i64 ptrtoint (ptr @.str.1 to i64), i64 ptrtoint (ptr @reltable.snd_ac97_ymf7x3_spdif_source_info to i64)) to i32)], align 4
@.str = private unnamed_addr constant [8 x i8] c"AC-Link\00", align 1
@.str.1 = private unnamed_addr constant [14 x i8] c"A/D Converter\00", align 1
@SNDRV_CTL_ELEM_TYPE_ENUMERATED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_ac97_ymf7x3_spdif_source_info], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @snd_ac97_ymf7x3_spdif_source_info(ptr nocapture readnone %0, ptr nocapture noundef %1) #0 {
%3 = load i32, ptr @SNDRV_CTL_ELEM_TYPE_ENUMERATED, align 4, !tbaa !5
%4 = getelementptr inbounds %struct.snd_ctl_elem_info, ptr %1, i64 0, i32 2
store i32 %3, ptr %4, align 4, !tbaa !9
store i32 1, ptr %1, align 4, !tbaa !13
%5 = getelementptr inbounds %struct.snd_ctl_elem_info, ptr %1, i64 0, i32 1
store i32 2, ptr %5, align 4, !tbaa !14
%6 = getelementptr inbounds %struct.snd_ctl_elem_info, ptr %1, i64 0, i32 1, i32 0, i32 1
%7 = load i32, ptr %6, align 4, !tbaa !15
%8 = icmp sgt i32 %7, 1
br i1 %8, label %9, label %10
9: ; preds = %2
store i32 1, ptr %6, align 4, !tbaa !15
br label %10
10: ; preds = %9, %2
%11 = phi i32 [ 1, %9 ], [ %7, %2 ]
%12 = getelementptr inbounds %struct.snd_ctl_elem_info, ptr %1, i64 0, i32 1, i32 0, i32 2
%13 = load i32, ptr %12, align 4, !tbaa !16
%14 = sext i32 %11 to i64
%15 = shl i64 %14, 2
%16 = call ptr @llvm.load.relative.i64(ptr @reltable.snd_ac97_ymf7x3_spdif_source_info, i64 %15)
%17 = tail call i32 @strcpy(i32 noundef %13, ptr noundef %16) #3
ret i32 0
}
declare i32 @strcpy(i32 noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: read)
declare ptr @llvm.load.relative.i64(ptr, i64) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind willreturn memory(argmem: read) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"snd_ctl_elem_info", !6, i64 0, !11, i64 4, !6, i64 16}
!11 = !{!"TYPE_3__", !12, i64 0}
!12 = !{!"TYPE_4__", !6, i64 0, !6, i64 4, !6, i64 8}
!13 = !{!10, !6, i64 0}
!14 = !{!10, !6, i64 4}
!15 = !{!10, !6, i64 8}
!16 = !{!10, !6, i64 12}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/ac97/extr_ac97_patch.c_snd_ac97_ymf7x3_spdif_source_info.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/ac97/extr_ac97_patch.c_snd_ac97_ymf7x3_spdif_source_info.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@snd_ac97_ymf7x3_spdif_source_info.texts = internal unnamed_addr constant [2 x ptr] [ptr @.str, ptr @.str.1], align 8
@.str = private unnamed_addr constant [8 x i8] c"AC-Link\00", align 1
@.str.1 = private unnamed_addr constant [14 x i8] c"A/D Converter\00", align 1
@SNDRV_CTL_ELEM_TYPE_ENUMERATED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @snd_ac97_ymf7x3_spdif_source_info], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @snd_ac97_ymf7x3_spdif_source_info(ptr nocapture readnone %0, ptr nocapture noundef %1) #0 {
%3 = load i32, ptr @SNDRV_CTL_ELEM_TYPE_ENUMERATED, align 4, !tbaa !6
%4 = getelementptr inbounds i8, ptr %1, i64 16
store i32 %3, ptr %4, align 4, !tbaa !10
store <2 x i32> <i32 1, i32 2>, ptr %1, align 4, !tbaa !6
%5 = getelementptr inbounds i8, ptr %1, i64 8
%6 = load i32, ptr %5, align 4, !tbaa !14
%7 = icmp sgt i32 %6, 1
br i1 %7, label %8, label %9
8: ; preds = %2
store i32 1, ptr %5, align 4, !tbaa !14
br label %9
9: ; preds = %8, %2
%10 = phi i32 [ 1, %8 ], [ %6, %2 ]
%11 = getelementptr inbounds i8, ptr %1, i64 12
%12 = load i32, ptr %11, align 4, !tbaa !15
%13 = sext i32 %10 to i64
%14 = getelementptr inbounds [2 x ptr], ptr @snd_ac97_ymf7x3_spdif_source_info.texts, i64 0, i64 %13
%15 = load ptr, ptr %14, align 8, !tbaa !16
%16 = tail call i32 @strcpy(i32 noundef %12, ptr noundef %15) #2
ret i32 0
}
declare i32 @strcpy(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 16}
!11 = !{!"snd_ctl_elem_info", !7, i64 0, !12, i64 4, !7, i64 16}
!12 = !{!"TYPE_3__", !13, i64 0}
!13 = !{!"TYPE_4__", !7, i64 0, !7, i64 4, !7, i64 8}
!14 = !{!11, !7, i64 8}
!15 = !{!11, !7, i64 12}
!16 = !{!17, !17, i64 0}
!17 = !{!"any pointer", !8, i64 0}
| fastsocket_kernel_sound_pci_ac97_extr_ac97_patch.c_snd_ac97_ymf7x3_spdif_source_info |
; ModuleID = 'AnghaBench/linux/drivers/i3c/extr_master.c_i2c_scl_frequency_show.c'
source_filename = "AnghaBench/linux/drivers/i3c/extr_master.c_i2c_scl_frequency_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [5 x i8] c"%ld\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @i2c_scl_frequency_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @i2c_scl_frequency_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @dev_to_i3cbus(ptr noundef %0) #2
%5 = tail call i32 @i3c_bus_normaluse_lock(ptr noundef %4) #2
%6 = load i32, ptr %4, align 4, !tbaa !5
%7 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, i32 noundef %6) #2
%8 = tail call i32 @i3c_bus_normaluse_unlock(ptr noundef nonnull %4) #2
ret i32 %7
}
declare ptr @dev_to_i3cbus(ptr noundef) local_unnamed_addr #1
declare i32 @i3c_bus_normaluse_lock(ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @i3c_bus_normaluse_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"i3c_bus", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/i3c/extr_master.c_i2c_scl_frequency_show.c'
source_filename = "AnghaBench/linux/drivers/i3c/extr_master.c_i2c_scl_frequency_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [5 x i8] c"%ld\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @i2c_scl_frequency_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @i2c_scl_frequency_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @dev_to_i3cbus(ptr noundef %0) #2
%5 = tail call i32 @i3c_bus_normaluse_lock(ptr noundef %4) #2
%6 = load i32, ptr %4, align 4, !tbaa !6
%7 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, i32 noundef %6) #2
%8 = tail call i32 @i3c_bus_normaluse_unlock(ptr noundef nonnull %4) #2
ret i32 %7
}
declare ptr @dev_to_i3cbus(ptr noundef) local_unnamed_addr #1
declare i32 @i3c_bus_normaluse_lock(ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @i3c_bus_normaluse_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"i3c_bus", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
| linux_drivers_i3c_extr_master.c_i2c_scl_frequency_show |
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_rs6000-tdep.c_rs6000_register_convertible.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_rs6000-tdep.c_rs6000_register_convertible.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.reg = type { i32 }
@current_gdbarch = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @rs6000_register_convertible], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @rs6000_register_convertible(i32 noundef %0) #0 {
%2 = load i32, ptr @current_gdbarch, align 4, !tbaa !5
%3 = tail call ptr @gdbarch_tdep(i32 noundef %2) #2
%4 = load ptr, ptr %3, align 8, !tbaa !9
%5 = sext i32 %0 to i64
%6 = getelementptr inbounds %struct.reg, ptr %4, i64 %5
%7 = load i32, ptr %6, align 4, !tbaa !12
ret i32 %7
}
declare ptr @gdbarch_tdep(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_2__", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"reg", !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_rs6000-tdep.c_rs6000_register_convertible.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_rs6000-tdep.c_rs6000_register_convertible.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.reg = type { i32 }
@current_gdbarch = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @rs6000_register_convertible], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @rs6000_register_convertible(i32 noundef %0) #0 {
%2 = load i32, ptr @current_gdbarch, align 4, !tbaa !6
%3 = tail call ptr @gdbarch_tdep(i32 noundef %2) #2
%4 = load ptr, ptr %3, align 8, !tbaa !10
%5 = sext i32 %0 to i64
%6 = getelementptr inbounds %struct.reg, ptr %4, i64 %5
%7 = load i32, ptr %6, align 4, !tbaa !13
ret i32 %7
}
declare ptr @gdbarch_tdep(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"reg", !7, i64 0}
| freebsd_contrib_gdb_gdb_extr_rs6000-tdep.c_rs6000_register_convertible |
; ModuleID = 'AnghaBench/Quake-III-Arena/code/cgame/extr_cg_marks.c_CG_AddParticles.c'
source_filename = "AnghaBench/Quake-III-Arena/code/cgame/extr_cg_marks.c_CG_AddParticles.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { double, %struct.TYPE_6__ }
%struct.TYPE_6__ = type { ptr }
@initparticles = dso_local local_unnamed_addr global i32 0, align 4
@cg = dso_local local_unnamed_addr global %struct.TYPE_8__ zeroinitializer, align 8
@pvforward = dso_local local_unnamed_addr global i32 0, align 4
@pvright = dso_local local_unnamed_addr global i32 0, align 4
@pvup = dso_local local_unnamed_addr global i32 0, align 4
@oldtime = dso_local local_unnamed_addr global double 0.000000e+00, align 8
@roll = dso_local local_unnamed_addr global double 0.000000e+00, align 8
@ROLL = dso_local local_unnamed_addr global i64 0, align 8
@rforward = dso_local local_unnamed_addr global i32 0, align 4
@rright = dso_local local_unnamed_addr global i32 0, align 4
@rup = dso_local local_unnamed_addr global i32 0, align 4
@active_particles = dso_local local_unnamed_addr global ptr null, align 8
@free_particles = dso_local local_unnamed_addr global ptr null, align 8
@P_SMOKE = dso_local local_unnamed_addr global i32 0, align 4
@P_ANIM = dso_local local_unnamed_addr global i32 0, align 4
@P_BLEED = dso_local local_unnamed_addr global i32 0, align 4
@P_SMOKE_IMPACT = dso_local local_unnamed_addr global i32 0, align 4
@P_WEATHER_FLURRY = dso_local local_unnamed_addr global i32 0, align 4
@P_FLAT_SCALEUP_FADE = dso_local local_unnamed_addr global i32 0, align 4
@P_BAT = dso_local local_unnamed_addr global i32 0, align 4
@P_SPRITE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: noreturn nounwind uwtable
define dso_local void @CG_AddParticles() local_unnamed_addr #0 {
%1 = load i32, ptr @initparticles, align 4, !tbaa !5
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 (...) @CG_ClearParticles() #2
br label %5
5: ; preds = %3, %0
%6 = load ptr, ptr getelementptr inbounds (%struct.TYPE_8__, ptr @cg, i64 0, i32 1), align 8, !tbaa !9
%7 = load i32, ptr %6, align 4, !tbaa !5
%8 = load i32, ptr @pvforward, align 4, !tbaa !5
%9 = tail call i32 @VectorCopy(i32 noundef %7, i32 noundef %8) #2
%10 = load ptr, ptr getelementptr inbounds (%struct.TYPE_8__, ptr @cg, i64 0, i32 1), align 8, !tbaa !9
%11 = getelementptr inbounds i32, ptr %10, i64 1
%12 = load i32, ptr %11, align 4, !tbaa !5
%13 = load i32, ptr @pvright, align 4, !tbaa !5
%14 = tail call i32 @VectorCopy(i32 noundef %12, i32 noundef %13) #2
%15 = load ptr, ptr getelementptr inbounds (%struct.TYPE_8__, ptr @cg, i64 0, i32 1), align 8, !tbaa !9
%16 = getelementptr inbounds i32, ptr %15, i64 2
%17 = load i32, ptr %16, align 4, !tbaa !5
%18 = load i32, ptr @pvup, align 4, !tbaa !5
%19 = tail call i32 @VectorCopy(i32 noundef %17, i32 noundef %18) #2
%20 = load ptr, ptr getelementptr inbounds (%struct.TYPE_8__, ptr @cg, i64 0, i32 1), align 8, !tbaa !9
%21 = load i32, ptr %20, align 4, !tbaa !5
%22 = tail call i32 @vectoangles(i32 noundef %21, ptr noundef undef) #2
unreachable
}
declare i32 @CG_ClearParticles(...) local_unnamed_addr #1
declare i32 @VectorCopy(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vectoangles(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 8}
!10 = !{!"TYPE_8__", !11, i64 0, !12, i64 8}
!11 = !{!"double", !7, i64 0}
!12 = !{!"TYPE_6__", !13, i64 0}
!13 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/Quake-III-Arena/code/cgame/extr_cg_marks.c_CG_AddParticles.c'
source_filename = "AnghaBench/Quake-III-Arena/code/cgame/extr_cg_marks.c_CG_AddParticles.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_8__ = type { double, %struct.TYPE_6__ }
%struct.TYPE_6__ = type { ptr }
@initparticles = common local_unnamed_addr global i32 0, align 4
@cg = common local_unnamed_addr global %struct.TYPE_8__ zeroinitializer, align 8
@pvforward = common local_unnamed_addr global i32 0, align 4
@pvright = common local_unnamed_addr global i32 0, align 4
@pvup = common local_unnamed_addr global i32 0, align 4
@oldtime = common local_unnamed_addr global double 0.000000e+00, align 8
@roll = common local_unnamed_addr global double 0.000000e+00, align 8
@ROLL = common local_unnamed_addr global i64 0, align 8
@rforward = common local_unnamed_addr global i32 0, align 4
@rright = common local_unnamed_addr global i32 0, align 4
@rup = common local_unnamed_addr global i32 0, align 4
@active_particles = common local_unnamed_addr global ptr null, align 8
@free_particles = common local_unnamed_addr global ptr null, align 8
@P_SMOKE = common local_unnamed_addr global i32 0, align 4
@P_ANIM = common local_unnamed_addr global i32 0, align 4
@P_BLEED = common local_unnamed_addr global i32 0, align 4
@P_SMOKE_IMPACT = common local_unnamed_addr global i32 0, align 4
@P_WEATHER_FLURRY = common local_unnamed_addr global i32 0, align 4
@P_FLAT_SCALEUP_FADE = common local_unnamed_addr global i32 0, align 4
@P_BAT = common local_unnamed_addr global i32 0, align 4
@P_SPRITE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: noreturn nounwind ssp uwtable(sync)
define void @CG_AddParticles() local_unnamed_addr #0 {
%1 = load i32, ptr @initparticles, align 4, !tbaa !6
%2 = icmp eq i32 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @CG_ClearParticles() #2
br label %5
5: ; preds = %3, %0
%6 = load ptr, ptr getelementptr inbounds (i8, ptr @cg, i64 8), align 8, !tbaa !10
%7 = load i32, ptr %6, align 4, !tbaa !6
%8 = load i32, ptr @pvforward, align 4, !tbaa !6
%9 = tail call i32 @VectorCopy(i32 noundef %7, i32 noundef %8) #2
%10 = load ptr, ptr getelementptr inbounds (i8, ptr @cg, i64 8), align 8, !tbaa !10
%11 = getelementptr inbounds i8, ptr %10, i64 4
%12 = load i32, ptr %11, align 4, !tbaa !6
%13 = load i32, ptr @pvright, align 4, !tbaa !6
%14 = tail call i32 @VectorCopy(i32 noundef %12, i32 noundef %13) #2
%15 = load ptr, ptr getelementptr inbounds (i8, ptr @cg, i64 8), align 8, !tbaa !10
%16 = getelementptr inbounds i8, ptr %15, i64 8
%17 = load i32, ptr %16, align 4, !tbaa !6
%18 = load i32, ptr @pvup, align 4, !tbaa !6
%19 = tail call i32 @VectorCopy(i32 noundef %17, i32 noundef %18) #2
%20 = load ptr, ptr getelementptr inbounds (i8, ptr @cg, i64 8), align 8, !tbaa !10
%21 = load i32, ptr %20, align 4, !tbaa !6
%22 = tail call i32 @vectoangles(i32 noundef %21, ptr noundef undef) #2
unreachable
}
declare i32 @CG_ClearParticles(...) local_unnamed_addr #1
declare i32 @VectorCopy(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vectoangles(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !14, i64 8}
!11 = !{!"TYPE_8__", !12, i64 0, !13, i64 8}
!12 = !{!"double", !8, i64 0}
!13 = !{!"TYPE_6__", !14, i64 0}
!14 = !{!"any pointer", !8, i64 0}
| Quake-III-Arena_code_cgame_extr_cg_marks.c_CG_AddParticles |
; ModuleID = 'AnghaBench/RetroArch/gfx/drivers/extr_gx_gfx.c_gx_set_rotation.c'
source_filename = "AnghaBench/RetroArch/gfx/drivers/extr_gx_gfx.c_gx_set_rotation.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@g_orientation = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @gx_set_rotation], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write, inaccessiblemem: none) uwtable
define internal void @gx_set_rotation(ptr noundef writeonly %0, i32 noundef %1) #0 {
store i32 %1, ptr @g_orientation, align 4, !tbaa !5
%3 = icmp eq ptr %0, null
br i1 %3, label %5, label %4
4: ; preds = %2
store i32 1, ptr %0, align 4, !tbaa !9
br label %5
5: ; preds = %4, %2
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(write, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_2__", !6, i64 0}
| ; ModuleID = 'AnghaBench/RetroArch/gfx/drivers/extr_gx_gfx.c_gx_set_rotation.c'
source_filename = "AnghaBench/RetroArch/gfx/drivers/extr_gx_gfx.c_gx_set_rotation.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@g_orientation = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @gx_set_rotation], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, inaccessiblemem: none) uwtable(sync)
define internal void @gx_set_rotation(ptr noundef writeonly %0, i32 noundef %1) #0 {
store i32 %1, ptr @g_orientation, align 4, !tbaa !6
%3 = icmp eq ptr %0, null
br i1 %3, label %5, label %4
4: ; preds = %2
store i32 1, ptr %0, align 4, !tbaa !10
br label %5
5: ; preds = %4, %2
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
| RetroArch_gfx_drivers_extr_gx_gfx.c_gx_set_rotation |
; ModuleID = 'AnghaBench/linux/drivers/scsi/sym53c8xx_2/extr_sym_nvram.c_S24C16_read_ack.c'
source_filename = "AnghaBench/linux/drivers/scsi/sym53c8xx_2/extr_sym_nvram.c_S24C16_read_ack.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@nc_gpcntl = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @S24C16_read_ack], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @S24C16_read_ack(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr nocapture noundef readonly %3) #0 {
%5 = load i32, ptr @nc_gpcntl, align 4, !tbaa !5
%6 = load i32, ptr %3, align 4, !tbaa !5
%7 = or i32 %6, 1
%8 = tail call i32 @OUTB(ptr noundef %0, i32 noundef %5, i32 noundef %7) #2
%9 = tail call i32 @S24C16_do_bit(ptr noundef %0, ptr noundef %1, i32 noundef 1, ptr noundef %2) #2
%10 = load i32, ptr @nc_gpcntl, align 4, !tbaa !5
%11 = load i32, ptr %3, align 4, !tbaa !5
%12 = tail call i32 @OUTB(ptr noundef %0, i32 noundef %10, i32 noundef %11) #2
ret void
}
declare i32 @OUTB(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @S24C16_do_bit(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/sym53c8xx_2/extr_sym_nvram.c_S24C16_read_ack.c'
source_filename = "AnghaBench/linux/drivers/scsi/sym53c8xx_2/extr_sym_nvram.c_S24C16_read_ack.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@nc_gpcntl = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @S24C16_read_ack], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @S24C16_read_ack(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr nocapture noundef readonly %3) #0 {
%5 = load i32, ptr @nc_gpcntl, align 4, !tbaa !6
%6 = load i32, ptr %3, align 4, !tbaa !6
%7 = or i32 %6, 1
%8 = tail call i32 @OUTB(ptr noundef %0, i32 noundef %5, i32 noundef %7) #2
%9 = tail call i32 @S24C16_do_bit(ptr noundef %0, ptr noundef %1, i32 noundef 1, ptr noundef %2) #2
%10 = load i32, ptr @nc_gpcntl, align 4, !tbaa !6
%11 = load i32, ptr %3, align 4, !tbaa !6
%12 = tail call i32 @OUTB(ptr noundef %0, i32 noundef %10, i32 noundef %11) #2
ret void
}
declare i32 @OUTB(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @S24C16_do_bit(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_scsi_sym53c8xx_2_extr_sym_nvram.c_S24C16_read_ack |
; ModuleID = 'AnghaBench/vlc/modules/spu/extr_subsdelay.c_SubsdelayEnforceDelayRules.c'
source_filename = "AnghaBench/vlc/modules/spu/extr_subsdelay.c_SubsdelayEnforceDelayRules.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_12__ = type { i32, i64, i64, i64, %struct.TYPE_8__ }
%struct.TYPE_8__ = type { i32, ptr }
%struct.TYPE_10__ = type { i64, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @SubsdelayEnforceDelayRules], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @SubsdelayEnforceDelayRules(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = getelementptr inbounds %struct.TYPE_12__, ptr %2, i64 0, i32 4
%4 = getelementptr inbounds %struct.TYPE_12__, ptr %2, i64 0, i32 4, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !10
%6 = load i32, ptr %3, align 8, !tbaa !15
%7 = load i32, ptr %2, align 8, !tbaa !16
%8 = getelementptr inbounds %struct.TYPE_12__, ptr %2, i64 0, i32 1
%9 = load i64, ptr %8, align 8, !tbaa !17
%10 = getelementptr inbounds %struct.TYPE_12__, ptr %2, i64 0, i32 2
%11 = load i64, ptr %10, align 8, !tbaa !18
%12 = getelementptr inbounds %struct.TYPE_12__, ptr %2, i64 0, i32 3
%13 = load i64, ptr %12, align 8, !tbaa !19
%14 = icmp sgt i32 %6, 1
br i1 %14, label %15, label %20
15: ; preds = %1
%16 = add nsw i32 %6, -1
%17 = zext nneg i32 %16 to i64
%18 = load ptr, ptr %5, align 8, !tbaa !20
%19 = load i64, ptr %18, align 8, !tbaa !21
br label %24
20: ; preds = %24, %1
%21 = icmp sgt i32 %6, 0
br i1 %21, label %22, label %71
22: ; preds = %20
%23 = zext nneg i32 %6 to i64
br label %38
24: ; preds = %15, %24
%25 = phi i64 [ %19, %15 ], [ %32, %24 ]
%26 = phi i64 [ 0, %15 ], [ %27, %24 ]
%27 = add nuw nsw i64 %26, 1
%28 = getelementptr inbounds ptr, ptr %5, i64 %27
%29 = load ptr, ptr %28, align 8, !tbaa !20
%30 = load i64, ptr %29, align 8, !tbaa !21
%31 = add nsw i64 %25, %9
%32 = tail call i64 @__MAX(i64 noundef %30, i64 noundef %31) #2
%33 = load ptr, ptr %28, align 8, !tbaa !20
store i64 %32, ptr %33, align 8, !tbaa !21
%34 = icmp eq i64 %27, %17
br i1 %34, label %20, label %24, !llvm.loop !23
35: ; preds = %68
br i1 %21, label %36, label %71
36: ; preds = %35
%37 = zext nneg i32 %6 to i64
br label %78
38: ; preds = %22, %68
%39 = phi i64 [ 0, %22 ], [ %41, %68 ]
%40 = phi i64 [ 1, %22 ], [ %69, %68 ]
%41 = add nuw nsw i64 %39, 1
%42 = trunc i64 %41 to i32
%43 = add i32 %7, %42
%44 = tail call i32 @__MIN(i32 noundef %6, i32 noundef %43) #2
%45 = sext i32 %44 to i64
%46 = icmp slt i64 %41, %45
br i1 %46, label %47, label %68
47: ; preds = %38
%48 = getelementptr inbounds ptr, ptr %5, i64 %39
br label %54
49: ; preds = %54
%50 = add nuw nsw i64 %55, 1
%51 = tail call i32 @__MIN(i32 noundef %6, i32 noundef %43) #2
%52 = trunc i64 %50 to i32
%53 = icmp sgt i32 %51, %52
br i1 %53, label %54, label %68, !llvm.loop !25
54: ; preds = %47, %49
%55 = phi i64 [ %40, %47 ], [ %50, %49 ]
%56 = getelementptr inbounds ptr, ptr %5, i64 %55
%57 = load ptr, ptr %56, align 8, !tbaa !20
%58 = getelementptr inbounds %struct.TYPE_10__, ptr %57, i64 0, i32 1
%59 = load ptr, ptr %58, align 8, !tbaa !26
%60 = load i64, ptr %59, align 8, !tbaa !27
%61 = load ptr, ptr %48, align 8, !tbaa !20
%62 = load i64, ptr %61, align 8, !tbaa !21
%63 = sub nsw i64 %60, %62
%64 = icmp slt i64 %63, 1
br i1 %64, label %49, label %65
65: ; preds = %54
%66 = icmp slt i64 %63, %11
br i1 %66, label %67, label %68
67: ; preds = %65
store i64 %60, ptr %61, align 8, !tbaa !21
br label %68
68: ; preds = %49, %38, %65, %67
%69 = add nuw nsw i64 %40, 1
%70 = icmp eq i64 %41, %23
br i1 %70, label %35, label %38, !llvm.loop !29
71: ; preds = %108, %20, %35
%72 = sub nsw i32 %6, %7
%73 = icmp sgt i32 %72, 0
br i1 %73, label %74, label %111
74: ; preds = %71
%75 = sext i32 %7 to i64
%76 = zext nneg i32 %72 to i64
%77 = getelementptr ptr, ptr %5, i64 %75
br label %114
78: ; preds = %36, %108
%79 = phi i64 [ 0, %36 ], [ %81, %108 ]
%80 = phi i64 [ 1, %36 ], [ %109, %108 ]
%81 = add nuw nsw i64 %79, 1
%82 = trunc i64 %81 to i32
%83 = add i32 %7, %82
%84 = tail call i32 @__MIN(i32 noundef %6, i32 noundef %83) #2
%85 = sext i32 %84 to i64
%86 = icmp slt i64 %81, %85
br i1 %86, label %87, label %108
87: ; preds = %78
%88 = getelementptr inbounds ptr, ptr %5, i64 %79
br label %94
89: ; preds = %105
%90 = add nuw nsw i64 %95, 1
%91 = tail call i32 @__MIN(i32 noundef %6, i32 noundef %83) #2
%92 = trunc i64 %90 to i32
%93 = icmp sgt i32 %91, %92
br i1 %93, label %94, label %108, !llvm.loop !30
94: ; preds = %87, %89
%95 = phi i64 [ %80, %87 ], [ %90, %89 ]
%96 = load ptr, ptr %88, align 8, !tbaa !20
%97 = load i64, ptr %96, align 8, !tbaa !21
%98 = getelementptr inbounds ptr, ptr %5, i64 %95
%99 = load ptr, ptr %98, align 8, !tbaa !20
%100 = getelementptr inbounds %struct.TYPE_10__, ptr %99, i64 0, i32 1
%101 = load ptr, ptr %100, align 8, !tbaa !26
%102 = load i64, ptr %101, align 8, !tbaa !27
%103 = sub nsw i64 %97, %102
%104 = icmp slt i64 %103, 1
br i1 %104, label %108, label %105
105: ; preds = %94
%106 = icmp slt i64 %103, %13
br i1 %106, label %107, label %89
107: ; preds = %105
store i64 %102, ptr %96, align 8, !tbaa !21
br label %108
108: ; preds = %89, %94, %78, %107
%109 = add nuw nsw i64 %80, 1
%110 = icmp eq i64 %81, %37
br i1 %110, label %71, label %78, !llvm.loop !31
111: ; preds = %114, %71
br i1 %21, label %112, label %131
112: ; preds = %111
%113 = zext nneg i32 %6 to i64
br label %132
114: ; preds = %74, %114
%115 = phi i64 [ 0, %74 ], [ %129, %114 ]
%116 = getelementptr inbounds ptr, ptr %5, i64 %115
%117 = load ptr, ptr %116, align 8, !tbaa !20
%118 = load i64, ptr %117, align 8, !tbaa !21
%119 = trunc i64 %118 to i32
%120 = getelementptr ptr, ptr %77, i64 %115
%121 = load ptr, ptr %120, align 8, !tbaa !20
%122 = getelementptr inbounds %struct.TYPE_10__, ptr %121, i64 0, i32 1
%123 = load ptr, ptr %122, align 8, !tbaa !26
%124 = load i64, ptr %123, align 8, !tbaa !27
%125 = trunc i64 %124 to i32
%126 = tail call i32 @__MIN(i32 noundef %119, i32 noundef %125) #2
%127 = sext i32 %126 to i64
%128 = load ptr, ptr %116, align 8, !tbaa !20
store i64 %127, ptr %128, align 8, !tbaa !21
%129 = add nuw nsw i64 %115, 1
%130 = icmp eq i64 %129, %76
br i1 %130, label %111, label %114, !llvm.loop !32
131: ; preds = %132, %111
ret void
132: ; preds = %112, %132
%133 = phi i64 [ 0, %112 ], [ %137, %132 ]
%134 = getelementptr inbounds ptr, ptr %5, i64 %133
%135 = load ptr, ptr %134, align 8, !tbaa !20
%136 = tail call i32 @SubsdelayEntryNewStopValueUpdated(ptr noundef %135) #2
%137 = add nuw nsw i64 %133, 1
%138 = icmp eq i64 %137, %113
br i1 %138, label %131, label %132, !llvm.loop !33
}
declare i64 @__MAX(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @__MIN(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SubsdelayEntryNewStopValueUpdated(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_11__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 40}
!11 = !{!"TYPE_12__", !12, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !14, i64 32}
!12 = !{!"int", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!"TYPE_8__", !12, i64 0, !7, i64 8}
!15 = !{!11, !12, i64 32}
!16 = !{!11, !12, i64 0}
!17 = !{!11, !13, i64 8}
!18 = !{!11, !13, i64 16}
!19 = !{!11, !13, i64 24}
!20 = !{!7, !7, i64 0}
!21 = !{!22, !13, i64 0}
!22 = !{!"TYPE_10__", !13, i64 0, !7, i64 8}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
!25 = distinct !{!25, !24}
!26 = !{!22, !7, i64 8}
!27 = !{!28, !13, i64 0}
!28 = !{!"TYPE_9__", !13, i64 0}
!29 = distinct !{!29, !24}
!30 = distinct !{!30, !24}
!31 = distinct !{!31, !24}
!32 = distinct !{!32, !24}
!33 = distinct !{!33, !24}
| ; ModuleID = 'AnghaBench/vlc/modules/spu/extr_subsdelay.c_SubsdelayEnforceDelayRules.c'
source_filename = "AnghaBench/vlc/modules/spu/extr_subsdelay.c_SubsdelayEnforceDelayRules.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @SubsdelayEnforceDelayRules], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @SubsdelayEnforceDelayRules(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = getelementptr inbounds i8, ptr %2, i64 32
%4 = getelementptr inbounds i8, ptr %2, i64 40
%5 = load ptr, ptr %4, align 8, !tbaa !11
%6 = load i32, ptr %3, align 8, !tbaa !16
%7 = load i32, ptr %2, align 8, !tbaa !17
%8 = getelementptr inbounds i8, ptr %2, i64 8
%9 = load i64, ptr %8, align 8, !tbaa !18
%10 = getelementptr inbounds i8, ptr %2, i64 16
%11 = load i64, ptr %10, align 8, !tbaa !19
%12 = getelementptr inbounds i8, ptr %2, i64 24
%13 = load i64, ptr %12, align 8, !tbaa !20
%14 = icmp sgt i32 %6, 1
br i1 %14, label %15, label %20
15: ; preds = %1
%16 = add nsw i32 %6, -1
%17 = zext nneg i32 %16 to i64
%18 = load ptr, ptr %5, align 8, !tbaa !21
%19 = load i64, ptr %18, align 8, !tbaa !22
br label %24
20: ; preds = %24, %1
%21 = icmp sgt i32 %6, 0
br i1 %21, label %22, label %68
22: ; preds = %20
%23 = zext nneg i32 %6 to i64
br label %35
24: ; preds = %15, %24
%25 = phi i64 [ %19, %15 ], [ %32, %24 ]
%26 = phi i64 [ 0, %15 ], [ %27, %24 ]
%27 = add nuw nsw i64 %26, 1
%28 = getelementptr inbounds ptr, ptr %5, i64 %27
%29 = load ptr, ptr %28, align 8, !tbaa !21
%30 = load i64, ptr %29, align 8, !tbaa !22
%31 = add nsw i64 %25, %9
%32 = tail call i64 @__MAX(i64 noundef %30, i64 noundef %31) #2
%33 = load ptr, ptr %28, align 8, !tbaa !21
store i64 %32, ptr %33, align 8, !tbaa !22
%34 = icmp eq i64 %27, %17
br i1 %34, label %20, label %24, !llvm.loop !24
35: ; preds = %22, %65
%36 = phi i64 [ 0, %22 ], [ %38, %65 ]
%37 = phi i64 [ 1, %22 ], [ %66, %65 ]
%38 = add nuw nsw i64 %36, 1
%39 = trunc i64 %38 to i32
%40 = add i32 %7, %39
%41 = tail call i32 @__MIN(i32 noundef %6, i32 noundef %40) #2
%42 = sext i32 %41 to i64
%43 = icmp slt i64 %38, %42
br i1 %43, label %44, label %65
44: ; preds = %35
%45 = getelementptr inbounds ptr, ptr %5, i64 %36
br label %51
46: ; preds = %51
%47 = add nuw nsw i64 %52, 1
%48 = tail call i32 @__MIN(i32 noundef %6, i32 noundef %40) #2
%49 = trunc nuw i64 %47 to i32
%50 = icmp sgt i32 %48, %49
br i1 %50, label %51, label %65, !llvm.loop !26
51: ; preds = %44, %46
%52 = phi i64 [ %37, %44 ], [ %47, %46 ]
%53 = getelementptr inbounds ptr, ptr %5, i64 %52
%54 = load ptr, ptr %53, align 8, !tbaa !21
%55 = getelementptr inbounds i8, ptr %54, i64 8
%56 = load ptr, ptr %55, align 8, !tbaa !27
%57 = load i64, ptr %56, align 8, !tbaa !28
%58 = load ptr, ptr %45, align 8, !tbaa !21
%59 = load i64, ptr %58, align 8, !tbaa !22
%60 = sub nsw i64 %57, %59
%61 = icmp slt i64 %60, 1
br i1 %61, label %46, label %62
62: ; preds = %51
%63 = icmp slt i64 %60, %11
br i1 %63, label %64, label %65
64: ; preds = %62
store i64 %57, ptr %58, align 8, !tbaa !22
br label %65
65: ; preds = %46, %35, %62, %64
%66 = add nuw nsw i64 %37, 1
%67 = icmp eq i64 %38, %23
br i1 %67, label %75, label %35, !llvm.loop !30
68: ; preds = %105, %20
%69 = sub nsw i32 %6, %7
%70 = icmp sgt i32 %69, 0
br i1 %70, label %71, label %108
71: ; preds = %68
%72 = sext i32 %7 to i64
%73 = zext nneg i32 %69 to i64
%74 = getelementptr ptr, ptr %5, i64 %72
br label %111
75: ; preds = %65, %105
%76 = phi i64 [ %78, %105 ], [ 0, %65 ]
%77 = phi i64 [ %106, %105 ], [ 1, %65 ]
%78 = add nuw nsw i64 %76, 1
%79 = trunc i64 %78 to i32
%80 = add i32 %7, %79
%81 = tail call i32 @__MIN(i32 noundef %6, i32 noundef %80) #2
%82 = sext i32 %81 to i64
%83 = icmp slt i64 %78, %82
br i1 %83, label %84, label %105
84: ; preds = %75
%85 = getelementptr inbounds ptr, ptr %5, i64 %76
br label %91
86: ; preds = %102
%87 = add nuw nsw i64 %92, 1
%88 = tail call i32 @__MIN(i32 noundef %6, i32 noundef %80) #2
%89 = trunc nuw i64 %87 to i32
%90 = icmp sgt i32 %88, %89
br i1 %90, label %91, label %105, !llvm.loop !31
91: ; preds = %84, %86
%92 = phi i64 [ %77, %84 ], [ %87, %86 ]
%93 = load ptr, ptr %85, align 8, !tbaa !21
%94 = load i64, ptr %93, align 8, !tbaa !22
%95 = getelementptr inbounds ptr, ptr %5, i64 %92
%96 = load ptr, ptr %95, align 8, !tbaa !21
%97 = getelementptr inbounds i8, ptr %96, i64 8
%98 = load ptr, ptr %97, align 8, !tbaa !27
%99 = load i64, ptr %98, align 8, !tbaa !28
%100 = sub nsw i64 %94, %99
%101 = icmp slt i64 %100, 1
br i1 %101, label %105, label %102
102: ; preds = %91
%103 = icmp slt i64 %100, %13
br i1 %103, label %104, label %86
104: ; preds = %102
store i64 %99, ptr %93, align 8, !tbaa !22
br label %105
105: ; preds = %86, %91, %75, %104
%106 = add nuw nsw i64 %77, 1
%107 = icmp eq i64 %78, %23
br i1 %107, label %68, label %75, !llvm.loop !32
108: ; preds = %111, %68
br i1 %21, label %109, label %128
109: ; preds = %108
%110 = zext nneg i32 %6 to i64
br label %129
111: ; preds = %71, %111
%112 = phi i64 [ 0, %71 ], [ %126, %111 ]
%113 = getelementptr inbounds ptr, ptr %5, i64 %112
%114 = load ptr, ptr %113, align 8, !tbaa !21
%115 = load i64, ptr %114, align 8, !tbaa !22
%116 = trunc i64 %115 to i32
%117 = getelementptr ptr, ptr %74, i64 %112
%118 = load ptr, ptr %117, align 8, !tbaa !21
%119 = getelementptr inbounds i8, ptr %118, i64 8
%120 = load ptr, ptr %119, align 8, !tbaa !27
%121 = load i64, ptr %120, align 8, !tbaa !28
%122 = trunc i64 %121 to i32
%123 = tail call i32 @__MIN(i32 noundef %116, i32 noundef %122) #2
%124 = sext i32 %123 to i64
%125 = load ptr, ptr %113, align 8, !tbaa !21
store i64 %124, ptr %125, align 8, !tbaa !22
%126 = add nuw nsw i64 %112, 1
%127 = icmp eq i64 %126, %73
br i1 %127, label %108, label %111, !llvm.loop !33
128: ; preds = %129, %108
ret void
129: ; preds = %109, %129
%130 = phi i64 [ 0, %109 ], [ %134, %129 ]
%131 = getelementptr inbounds ptr, ptr %5, i64 %130
%132 = load ptr, ptr %131, align 8, !tbaa !21
%133 = tail call i32 @SubsdelayEntryNewStopValueUpdated(ptr noundef %132) #2
%134 = add nuw nsw i64 %130, 1
%135 = icmp eq i64 %134, %110
br i1 %135, label %128, label %129, !llvm.loop !34
}
declare i64 @__MAX(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @__MIN(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SubsdelayEntryNewStopValueUpdated(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_11__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 40}
!12 = !{!"TYPE_12__", !13, i64 0, !14, i64 8, !14, i64 16, !14, i64 24, !15, i64 32}
!13 = !{!"int", !9, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!"TYPE_8__", !13, i64 0, !8, i64 8}
!16 = !{!12, !13, i64 32}
!17 = !{!12, !13, i64 0}
!18 = !{!12, !14, i64 8}
!19 = !{!12, !14, i64 16}
!20 = !{!12, !14, i64 24}
!21 = !{!8, !8, i64 0}
!22 = !{!23, !14, i64 0}
!23 = !{!"TYPE_10__", !14, i64 0, !8, i64 8}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}
!26 = distinct !{!26, !25}
!27 = !{!23, !8, i64 8}
!28 = !{!29, !14, i64 0}
!29 = !{!"TYPE_9__", !14, i64 0}
!30 = distinct !{!30, !25}
!31 = distinct !{!31, !25}
!32 = distinct !{!32, !25}
!33 = distinct !{!33, !25}
!34 = distinct !{!34, !25}
| vlc_modules_spu_extr_subsdelay.c_SubsdelayEnforceDelayRules |
; ModuleID = 'AnghaBench/freebsd/contrib/processor-trace/libipt/test/src/extr_ptunit-retstack.c_query_null.c'
source_filename = "AnghaBench/freebsd/contrib/processor-trace/libipt/test/src/extr_ptunit-retstack.c_query_null.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@pte_invalid = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @query_null], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @query_null() #0 {
%1 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
store i32 66, ptr %1, align 4, !tbaa !5
%2 = call i32 @pt_retstack_pop(ptr noundef null, ptr noundef nonnull %1) #3
%3 = load i32, ptr @pte_invalid, align 4, !tbaa !5
%4 = sub nsw i32 0, %3
%5 = call i32 @ptu_int_eq(i32 noundef %2, i32 noundef %4) #3
%6 = load i32, ptr %1, align 4, !tbaa !5
%7 = call i32 @ptu_uint_eq(i32 noundef %6, i32 noundef 66) #3
%8 = call i32 (...) @ptu_passed() #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret i32 %8
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @pt_retstack_pop(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ptu_int_eq(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ptu_uint_eq(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ptu_passed(...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/processor-trace/libipt/test/src/extr_ptunit-retstack.c_query_null.c'
source_filename = "AnghaBench/freebsd/contrib/processor-trace/libipt/test/src/extr_ptunit-retstack.c_query_null.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@pte_invalid = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @query_null], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @query_null() #0 {
%1 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
store i32 66, ptr %1, align 4, !tbaa !6
%2 = call i32 @pt_retstack_pop(ptr noundef null, ptr noundef nonnull %1) #3
%3 = load i32, ptr @pte_invalid, align 4, !tbaa !6
%4 = sub nsw i32 0, %3
%5 = call i32 @ptu_int_eq(i32 noundef %2, i32 noundef %4) #3
%6 = load i32, ptr %1, align 4, !tbaa !6
%7 = call i32 @ptu_uint_eq(i32 noundef %6, i32 noundef 66) #3
%8 = call i32 @ptu_passed() #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret i32 %8
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @pt_retstack_pop(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ptu_int_eq(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ptu_uint_eq(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ptu_passed(...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_processor-trace_libipt_test_src_extr_ptunit-retstack.c_query_null |
; ModuleID = 'AnghaBench/linux/drivers/media/platform/qcom/camss/extr_camss-vfe.c_vfe_set_stream.c'
source_filename = "AnghaBench/linux/drivers/media/platform/qcom/camss/extr_camss-vfe.c_vfe_set_stream.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [30 x i8] c"Failed to enable vfe outputs\0A\00", align 1
@.str.1 = private unnamed_addr constant [31 x i8] c"Failed to disable vfe outputs\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @vfe_set_stream], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @vfe_set_stream(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @v4l2_get_subdevdata(ptr noundef %0) #2
%4 = tail call ptr @to_vfe(ptr noundef %3) #2
%5 = icmp eq i32 %1, 0
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = tail call i32 @vfe_enable(ptr noundef %3) #2
%8 = icmp slt i32 %7, 0
br i1 %8, label %12, label %18
9: ; preds = %2
%10 = tail call i32 @vfe_disable(ptr noundef %3) #2
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %18
12: ; preds = %9, %6
%13 = phi ptr [ @.str, %6 ], [ @.str.1, %9 ]
%14 = phi i32 [ %7, %6 ], [ %10, %9 ]
%15 = load ptr, ptr %4, align 8, !tbaa !5
%16 = load i32, ptr %15, align 4, !tbaa !10
%17 = tail call i32 @dev_err(i32 noundef %16, ptr noundef nonnull %13) #2
br label %18
18: ; preds = %12, %9, %6
%19 = phi i32 [ %7, %6 ], [ %10, %9 ], [ %14, %12 ]
ret i32 %19
}
declare ptr @v4l2_get_subdevdata(ptr noundef) local_unnamed_addr #1
declare ptr @to_vfe(ptr noundef) local_unnamed_addr #1
declare i32 @vfe_enable(ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @vfe_disable(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"vfe_device", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/media/platform/qcom/camss/extr_camss-vfe.c_vfe_set_stream.c'
source_filename = "AnghaBench/linux/drivers/media/platform/qcom/camss/extr_camss-vfe.c_vfe_set_stream.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [30 x i8] c"Failed to enable vfe outputs\0A\00", align 1
@.str.1 = private unnamed_addr constant [31 x i8] c"Failed to disable vfe outputs\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @vfe_set_stream], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @vfe_set_stream(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @v4l2_get_subdevdata(ptr noundef %0) #2
%4 = tail call ptr @to_vfe(ptr noundef %3) #2
%5 = icmp eq i32 %1, 0
br i1 %5, label %9, label %6
6: ; preds = %2
%7 = tail call i32 @vfe_enable(ptr noundef %3) #2
%8 = icmp slt i32 %7, 0
br i1 %8, label %12, label %18
9: ; preds = %2
%10 = tail call i32 @vfe_disable(ptr noundef %3) #2
%11 = icmp slt i32 %10, 0
br i1 %11, label %12, label %18
12: ; preds = %9, %6
%13 = phi ptr [ @.str, %6 ], [ @.str.1, %9 ]
%14 = phi i32 [ %7, %6 ], [ %10, %9 ]
%15 = load ptr, ptr %4, align 8, !tbaa !6
%16 = load i32, ptr %15, align 4, !tbaa !11
%17 = tail call i32 @dev_err(i32 noundef %16, ptr noundef nonnull %13) #2
br label %18
18: ; preds = %12, %9, %6
%19 = phi i32 [ %7, %6 ], [ %10, %9 ], [ %14, %12 ]
ret i32 %19
}
declare ptr @v4l2_get_subdevdata(ptr noundef) local_unnamed_addr #1
declare ptr @to_vfe(ptr noundef) local_unnamed_addr #1
declare i32 @vfe_enable(ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @vfe_disable(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"vfe_device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"int", !9, i64 0}
| linux_drivers_media_platform_qcom_camss_extr_camss-vfe.c_vfe_set_stream |
; ModuleID = 'AnghaBench/freebsd/usr.sbin/bluetooth/l2control/extr_l2cap.c_l2cap_read_debug_level.c'
source_filename = "AnghaBench/freebsd/usr.sbin/bluetooth/l2control/extr_l2cap.c_l2cap_read_debug_level.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ng_btsocket_l2cap_raw_node_debug = type { i32 }
@SIOC_L2CAP_NODE_GET_DEBUG = dso_local local_unnamed_addr global i32 0, align 4
@ERROR = dso_local local_unnamed_addr global i32 0, align 4
@stdout = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [17 x i8] c"Debug level: %d\0A\00", align 1
@OK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @l2cap_read_debug_level], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @l2cap_read_debug_level(i32 noundef %0, i32 %1, ptr nocapture readnone %2) #0 {
%4 = alloca %struct.ng_btsocket_l2cap_raw_node_debug, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = call i32 @memset(ptr noundef nonnull %4, i32 noundef 0, i32 noundef 4) #3
%6 = load i32, ptr @SIOC_L2CAP_NODE_GET_DEBUG, align 4, !tbaa !5
%7 = call i64 @ioctl(i32 noundef %0, i32 noundef %6, ptr noundef nonnull %4, i32 noundef 4) #3
%8 = icmp slt i64 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %3
%10 = load i32, ptr @stdout, align 4, !tbaa !5
%11 = load i32, ptr %4, align 4, !tbaa !9
%12 = call i32 @fprintf(i32 noundef %10, ptr noundef nonnull @.str, i32 noundef %11) #3
br label %13
13: ; preds = %3, %9
%14 = phi ptr [ @OK, %9 ], [ @ERROR, %3 ]
%15 = load i32, ptr %14, align 4, !tbaa !5
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %15
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @ioctl(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @fprintf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"ng_btsocket_l2cap_raw_node_debug", !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/usr.sbin/bluetooth/l2control/extr_l2cap.c_l2cap_read_debug_level.c'
source_filename = "AnghaBench/freebsd/usr.sbin/bluetooth/l2control/extr_l2cap.c_l2cap_read_debug_level.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.ng_btsocket_l2cap_raw_node_debug = type { i32 }
@SIOC_L2CAP_NODE_GET_DEBUG = common local_unnamed_addr global i32 0, align 4
@ERROR = common local_unnamed_addr global i32 0, align 4
@stdout = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [17 x i8] c"Debug level: %d\0A\00", align 1
@OK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @l2cap_read_debug_level], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @l2cap_read_debug_level(i32 noundef %0, i32 %1, ptr nocapture readnone %2) #0 {
%4 = alloca %struct.ng_btsocket_l2cap_raw_node_debug, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = call i32 @memset(ptr noundef nonnull %4, i32 noundef 0, i32 noundef 4) #3
%6 = load i32, ptr @SIOC_L2CAP_NODE_GET_DEBUG, align 4, !tbaa !6
%7 = call i64 @ioctl(i32 noundef %0, i32 noundef %6, ptr noundef nonnull %4, i32 noundef 4) #3
%8 = icmp slt i64 %7, 0
br i1 %8, label %13, label %9
9: ; preds = %3
%10 = load i32, ptr @stdout, align 4, !tbaa !6
%11 = load i32, ptr %4, align 4, !tbaa !10
%12 = call i32 @fprintf(i32 noundef %10, ptr noundef nonnull @.str, i32 noundef %11) #3
br label %13
13: ; preds = %3, %9
%14 = phi ptr [ @OK, %9 ], [ @ERROR, %3 ]
%15 = load i32, ptr %14, align 4, !tbaa !6
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %15
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @ioctl(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @fprintf(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"ng_btsocket_l2cap_raw_node_debug", !7, i64 0}
| freebsd_usr.sbin_bluetooth_l2control_extr_l2cap.c_l2cap_read_debug_level |
; ModuleID = 'AnghaBench/fastsocket/kernel/net/sunrpc/extr_clnt.c_rpc_task_set_rpc_message.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sunrpc/extr_clnt.c_rpc_task_set_rpc_message.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.rpc_message = type { ptr, i32, i32, i32 }
%struct.TYPE_2__ = type { i32, i32, i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @rpc_task_set_rpc_message], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @rpc_task_set_rpc_message(ptr nocapture noundef writeonly %0, ptr noundef readonly %1) #0 {
%3 = icmp eq ptr %1, null
br i1 %3, label %15, label %4
4: ; preds = %2
%5 = getelementptr inbounds %struct.rpc_message, ptr %1, i64 0, i32 3
%6 = load i32, ptr %5, align 8, !tbaa !5
%7 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 3
store i32 %6, ptr %7, align 4, !tbaa !11
%8 = getelementptr inbounds %struct.rpc_message, ptr %1, i64 0, i32 1
%9 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 1
%10 = load <2 x i32>, ptr %8, align 8, !tbaa !14
store <2 x i32> %10, ptr %9, align 4, !tbaa !14
%11 = load ptr, ptr %1, align 8, !tbaa !15
%12 = icmp eq ptr %11, null
br i1 %12, label %15, label %13
13: ; preds = %4
%14 = tail call i32 @get_rpccred(ptr noundef nonnull %11) #2
store i32 %14, ptr %0, align 4, !tbaa !16
br label %15
15: ; preds = %4, %13, %2
ret void
}
declare i32 @get_rpccred(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"rpc_message", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!12, !10, i64 12}
!12 = !{!"rpc_task", !13, i64 0}
!13 = !{!"TYPE_2__", !10, i64 0, !10, i64 4, !10, i64 8, !10, i64 12}
!14 = !{!10, !10, i64 0}
!15 = !{!6, !7, i64 0}
!16 = !{!12, !10, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/sunrpc/extr_clnt.c_rpc_task_set_rpc_message.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sunrpc/extr_clnt.c_rpc_task_set_rpc_message.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @rpc_task_set_rpc_message], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @rpc_task_set_rpc_message(ptr nocapture noundef writeonly %0, ptr noundef readonly %1) #0 {
%3 = icmp eq ptr %1, null
br i1 %3, label %15, label %4
4: ; preds = %2
%5 = getelementptr inbounds i8, ptr %1, i64 16
%6 = load i32, ptr %5, align 8, !tbaa !6
%7 = getelementptr inbounds i8, ptr %0, i64 12
store i32 %6, ptr %7, align 4, !tbaa !12
%8 = getelementptr inbounds i8, ptr %1, i64 8
%9 = getelementptr inbounds i8, ptr %0, i64 4
%10 = load <2 x i32>, ptr %8, align 8, !tbaa !15
store <2 x i32> %10, ptr %9, align 4, !tbaa !15
%11 = load ptr, ptr %1, align 8, !tbaa !16
%12 = icmp eq ptr %11, null
br i1 %12, label %15, label %13
13: ; preds = %4
%14 = tail call i32 @get_rpccred(ptr noundef nonnull %11) #2
store i32 %14, ptr %0, align 4, !tbaa !17
br label %15
15: ; preds = %4, %13, %2
ret void
}
declare i32 @get_rpccred(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"rpc_message", !8, i64 0, !11, i64 8, !11, i64 12, !11, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!13, !11, i64 12}
!13 = !{!"rpc_task", !14, i64 0}
!14 = !{!"TYPE_2__", !11, i64 0, !11, i64 4, !11, i64 8, !11, i64 12}
!15 = !{!11, !11, i64 0}
!16 = !{!7, !8, i64 0}
!17 = !{!13, !11, i64 0}
| fastsocket_kernel_net_sunrpc_extr_clnt.c_rpc_task_set_rpc_message |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/selftests/extr_test-drm_cmdline_parser.c_drm_cmdline_test_rotate_180.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/selftests/extr_test-drm_cmdline_parser.c_drm_cmdline_test_rotate_180.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.drm_cmdline_mode = type { i32, i32, i64, i32, i32, i32, i32, i32, i32, i64, i32 }
@.str = private unnamed_addr constant [19 x i8] c"720x480,rotate=180\00", align 1
@no_connector = dso_local global i32 0, align 4
@DRM_MODE_ROTATE_180 = dso_local local_unnamed_addr global i64 0, align 8
@DRM_FORCE_UNSPECIFIED = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @drm_cmdline_test_rotate_180], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @drm_cmdline_test_rotate_180(ptr nocapture readnone %0) #0 {
%2 = alloca %struct.drm_cmdline_mode, align 8
call void @llvm.lifetime.start.p0(i64 56, ptr nonnull %2) #4
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(56) %2, i8 0, i64 56, i1 false)
%3 = call i32 @drm_mode_parse_command_line_for_connector(ptr noundef nonnull @.str, ptr noundef nonnull @no_connector, ptr noundef nonnull %2) #4
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
%6 = call i32 @FAIL_ON(i32 noundef %5) #4
%7 = getelementptr inbounds %struct.drm_cmdline_mode, ptr %2, i64 0, i32 10
%8 = load i32, ptr %7, align 8, !tbaa !5
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
%11 = call i32 @FAIL_ON(i32 noundef %10) #4
%12 = load i32, ptr %2, align 8, !tbaa !11
%13 = icmp ne i32 %12, 720
%14 = zext i1 %13 to i32
%15 = call i32 @FAIL_ON(i32 noundef %14) #4
%16 = getelementptr inbounds %struct.drm_cmdline_mode, ptr %2, i64 0, i32 1
%17 = load i32, ptr %16, align 4, !tbaa !12
%18 = icmp ne i32 %17, 480
%19 = zext i1 %18 to i32
%20 = call i32 @FAIL_ON(i32 noundef %19) #4
%21 = getelementptr inbounds %struct.drm_cmdline_mode, ptr %2, i64 0, i32 2
%22 = load i64, ptr %21, align 8, !tbaa !13
%23 = load i64, ptr @DRM_MODE_ROTATE_180, align 8, !tbaa !14
%24 = icmp ne i64 %22, %23
%25 = zext i1 %24 to i32
%26 = call i32 @FAIL_ON(i32 noundef %25) #4
%27 = getelementptr inbounds %struct.drm_cmdline_mode, ptr %2, i64 0, i32 3
%28 = load i32, ptr %27, align 8, !tbaa !15
%29 = call i32 @FAIL_ON(i32 noundef %28) #4
%30 = getelementptr inbounds %struct.drm_cmdline_mode, ptr %2, i64 0, i32 4
%31 = load i32, ptr %30, align 4, !tbaa !16
%32 = call i32 @FAIL_ON(i32 noundef %31) #4
%33 = getelementptr inbounds %struct.drm_cmdline_mode, ptr %2, i64 0, i32 5
%34 = load i32, ptr %33, align 8, !tbaa !17
%35 = call i32 @FAIL_ON(i32 noundef %34) #4
%36 = getelementptr inbounds %struct.drm_cmdline_mode, ptr %2, i64 0, i32 6
%37 = load i32, ptr %36, align 4, !tbaa !18
%38 = call i32 @FAIL_ON(i32 noundef %37) #4
%39 = getelementptr inbounds %struct.drm_cmdline_mode, ptr %2, i64 0, i32 7
%40 = load i32, ptr %39, align 8, !tbaa !19
%41 = call i32 @FAIL_ON(i32 noundef %40) #4
%42 = getelementptr inbounds %struct.drm_cmdline_mode, ptr %2, i64 0, i32 8
%43 = load i32, ptr %42, align 4, !tbaa !20
%44 = call i32 @FAIL_ON(i32 noundef %43) #4
%45 = getelementptr inbounds %struct.drm_cmdline_mode, ptr %2, i64 0, i32 9
%46 = load i64, ptr %45, align 8, !tbaa !21
%47 = load i64, ptr @DRM_FORCE_UNSPECIFIED, align 8, !tbaa !14
%48 = icmp ne i64 %46, %47
%49 = zext i1 %48 to i32
%50 = call i32 @FAIL_ON(i32 noundef %49) #4
call void @llvm.lifetime.end.p0(i64 56, ptr nonnull %2) #4
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
declare i32 @FAIL_ON(i32 noundef) local_unnamed_addr #3
declare i32 @drm_mode_parse_command_line_for_connector(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 48}
!6 = !{!"drm_cmdline_mode", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !10, i64 40, !7, i64 48}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !7, i64 0}
!12 = !{!6, !7, i64 4}
!13 = !{!6, !10, i64 8}
!14 = !{!10, !10, i64 0}
!15 = !{!6, !7, i64 16}
!16 = !{!6, !7, i64 20}
!17 = !{!6, !7, i64 24}
!18 = !{!6, !7, i64 28}
!19 = !{!6, !7, i64 32}
!20 = !{!6, !7, i64 36}
!21 = !{!6, !10, i64 40}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/selftests/extr_test-drm_cmdline_parser.c_drm_cmdline_test_rotate_180.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/selftests/extr_test-drm_cmdline_parser.c_drm_cmdline_test_rotate_180.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.drm_cmdline_mode = type { i32, i32, i64, i32, i32, i32, i32, i32, i32, i64, i32 }
@.str = private unnamed_addr constant [19 x i8] c"720x480,rotate=180\00", align 1
@no_connector = common global i32 0, align 4
@DRM_MODE_ROTATE_180 = common local_unnamed_addr global i64 0, align 8
@DRM_FORCE_UNSPECIFIED = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @drm_cmdline_test_rotate_180], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @drm_cmdline_test_rotate_180(ptr nocapture readnone %0) #0 {
%2 = alloca %struct.drm_cmdline_mode, align 8
call void @llvm.lifetime.start.p0(i64 56, ptr nonnull %2) #4
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(56) %2, i8 0, i64 56, i1 false)
%3 = call i32 @drm_mode_parse_command_line_for_connector(ptr noundef nonnull @.str, ptr noundef nonnull @no_connector, ptr noundef nonnull %2) #4
%4 = icmp eq i32 %3, 0
%5 = zext i1 %4 to i32
%6 = call i32 @FAIL_ON(i32 noundef %5) #4
%7 = getelementptr inbounds i8, ptr %2, i64 48
%8 = load i32, ptr %7, align 8, !tbaa !6
%9 = icmp eq i32 %8, 0
%10 = zext i1 %9 to i32
%11 = call i32 @FAIL_ON(i32 noundef %10) #4
%12 = load i32, ptr %2, align 8, !tbaa !12
%13 = icmp ne i32 %12, 720
%14 = zext i1 %13 to i32
%15 = call i32 @FAIL_ON(i32 noundef %14) #4
%16 = getelementptr inbounds i8, ptr %2, i64 4
%17 = load i32, ptr %16, align 4, !tbaa !13
%18 = icmp ne i32 %17, 480
%19 = zext i1 %18 to i32
%20 = call i32 @FAIL_ON(i32 noundef %19) #4
%21 = getelementptr inbounds i8, ptr %2, i64 8
%22 = load i64, ptr %21, align 8, !tbaa !14
%23 = load i64, ptr @DRM_MODE_ROTATE_180, align 8, !tbaa !15
%24 = icmp ne i64 %22, %23
%25 = zext i1 %24 to i32
%26 = call i32 @FAIL_ON(i32 noundef %25) #4
%27 = getelementptr inbounds i8, ptr %2, i64 16
%28 = load i32, ptr %27, align 8, !tbaa !16
%29 = call i32 @FAIL_ON(i32 noundef %28) #4
%30 = getelementptr inbounds i8, ptr %2, i64 20
%31 = load i32, ptr %30, align 4, !tbaa !17
%32 = call i32 @FAIL_ON(i32 noundef %31) #4
%33 = getelementptr inbounds i8, ptr %2, i64 24
%34 = load i32, ptr %33, align 8, !tbaa !18
%35 = call i32 @FAIL_ON(i32 noundef %34) #4
%36 = getelementptr inbounds i8, ptr %2, i64 28
%37 = load i32, ptr %36, align 4, !tbaa !19
%38 = call i32 @FAIL_ON(i32 noundef %37) #4
%39 = getelementptr inbounds i8, ptr %2, i64 32
%40 = load i32, ptr %39, align 8, !tbaa !20
%41 = call i32 @FAIL_ON(i32 noundef %40) #4
%42 = getelementptr inbounds i8, ptr %2, i64 36
%43 = load i32, ptr %42, align 4, !tbaa !21
%44 = call i32 @FAIL_ON(i32 noundef %43) #4
%45 = getelementptr inbounds i8, ptr %2, i64 40
%46 = load i64, ptr %45, align 8, !tbaa !22
%47 = load i64, ptr @DRM_FORCE_UNSPECIFIED, align 8, !tbaa !15
%48 = icmp ne i64 %46, %47
%49 = zext i1 %48 to i32
%50 = call i32 @FAIL_ON(i32 noundef %49) #4
call void @llvm.lifetime.end.p0(i64 56, ptr nonnull %2) #4
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
declare i32 @FAIL_ON(i32 noundef) local_unnamed_addr #3
declare i32 @drm_mode_parse_command_line_for_connector(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 48}
!7 = !{!"drm_cmdline_mode", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16, !8, i64 20, !8, i64 24, !8, i64 28, !8, i64 32, !8, i64 36, !11, i64 40, !8, i64 48}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !8, i64 0}
!13 = !{!7, !8, i64 4}
!14 = !{!7, !11, i64 8}
!15 = !{!11, !11, i64 0}
!16 = !{!7, !8, i64 16}
!17 = !{!7, !8, i64 20}
!18 = !{!7, !8, i64 24}
!19 = !{!7, !8, i64 28}
!20 = !{!7, !8, i64 32}
!21 = !{!7, !8, i64 36}
!22 = !{!7, !11, i64 40}
| linux_drivers_gpu_drm_selftests_extr_test-drm_cmdline_parser.c_drm_cmdline_test_rotate_180 |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/kvm/extr_x86.c_kvm_arch_vcpu_ioctl_set_sregs.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/kvm/extr_x86.c_kvm_arch_vcpu_ioctl_set_sregs.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.descriptor_table = type { i32, i32 }
%struct.kvm_sregs = type { i32, i64, i64, i64, %struct.TYPE_10__, %struct.TYPE_10__, %struct.TYPE_10__, %struct.TYPE_10__, %struct.TYPE_10__, %struct.TYPE_10__, %struct.TYPE_10__, %struct.TYPE_10__, i64, i32, i32, i32, %struct.TYPE_7__, %struct.TYPE_6__ }
%struct.TYPE_10__ = type { i32, i32 }
%struct.TYPE_7__ = type { i32, i32 }
%struct.TYPE_6__ = type { i32, i32 }
%struct.TYPE_9__ = type { ptr, ptr, ptr, ptr, ptr }
%struct.TYPE_8__ = type { i64, i64, i64, i32, i32 }
%struct.kvm_vcpu = type { %struct.TYPE_8__, i32 }
@X86_CR4_OSXSAVE = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@kvm_x86_ops = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [25 x i8] c"Set back pending irq %d\0A\00", align 1
@VCPU_SREG_CS = dso_local local_unnamed_addr global i32 0, align 4
@VCPU_SREG_DS = dso_local local_unnamed_addr global i32 0, align 4
@VCPU_SREG_ES = dso_local local_unnamed_addr global i32 0, align 4
@VCPU_SREG_FS = dso_local local_unnamed_addr global i32 0, align 4
@VCPU_SREG_GS = dso_local local_unnamed_addr global i32 0, align 4
@VCPU_SREG_SS = dso_local local_unnamed_addr global i32 0, align 4
@VCPU_SREG_TR = dso_local local_unnamed_addr global i32 0, align 4
@VCPU_SREG_LDTR = dso_local local_unnamed_addr global i32 0, align 4
@X86_CR0_PE = dso_local local_unnamed_addr global i32 0, align 4
@KVM_MP_STATE_RUNNABLE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @kvm_arch_vcpu_ioctl_set_sregs(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca %struct.descriptor_table, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%4 = tail call i32 @vcpu_load(ptr noundef %0) #3
%5 = tail call i32 @guest_cpuid_has_xsave(ptr noundef %0) #3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %2
%8 = load i32, ptr %1, align 8, !tbaa !5
%9 = load i32, ptr @X86_CR4_OSXSAVE, align 4, !tbaa !14
%10 = and i32 %9, %8
%11 = icmp eq i32 %10, 0
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = load i32, ptr @EINVAL, align 4, !tbaa !14
%14 = sub nsw i32 0, %13
br label %148
15: ; preds = %7, %2
%16 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 17
%17 = load <2 x i32>, ptr %16, align 4, !tbaa !14
store <2 x i32> %17, ptr %3, align 8, !tbaa !14
%18 = load ptr, ptr @kvm_x86_ops, align 8, !tbaa !15
%19 = getelementptr inbounds %struct.TYPE_9__, ptr %18, i64 0, i32 4
%20 = load ptr, ptr %19, align 8, !tbaa !17
%21 = call i32 %20(ptr noundef %0, ptr noundef nonnull %3) #3
%22 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 16
%23 = load <2 x i32>, ptr %22, align 4, !tbaa !14
store <2 x i32> %23, ptr %3, align 8, !tbaa !14
%24 = load ptr, ptr @kvm_x86_ops, align 8, !tbaa !15
%25 = getelementptr inbounds %struct.TYPE_9__, ptr %24, i64 0, i32 3
%26 = load ptr, ptr %25, align 8, !tbaa !19
%27 = call i32 %26(ptr noundef %0, ptr noundef nonnull %3) #3
%28 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 15
%29 = load i32, ptr %28, align 8, !tbaa !20
%30 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 4
store i32 %29, ptr %30, align 4, !tbaa !21
%31 = load i64, ptr %0, align 8, !tbaa !24
%32 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 1
%33 = load i64, ptr %32, align 8, !tbaa !25
%34 = icmp ne i64 %31, %33
store i64 %33, ptr %0, align 8, !tbaa !24
%35 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 14
%36 = load i32, ptr %35, align 4, !tbaa !26
%37 = call i32 @kvm_set_cr8(ptr noundef nonnull %0, i32 noundef %36) #3
%38 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1
%39 = load i64, ptr %38, align 8, !tbaa !27
%40 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 2
%41 = load i64, ptr %40, align 8, !tbaa !28
%42 = icmp ne i64 %39, %41
%43 = or i1 %34, %42
%44 = load ptr, ptr @kvm_x86_ops, align 8, !tbaa !15
%45 = getelementptr inbounds %struct.TYPE_9__, ptr %44, i64 0, i32 2
%46 = load ptr, ptr %45, align 8, !tbaa !29
%47 = call i32 %46(ptr noundef nonnull %0, i64 noundef %41) #3
%48 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 13
%49 = load i32, ptr %48, align 8, !tbaa !30
%50 = call i32 @kvm_set_apic_base(ptr noundef nonnull %0, i32 noundef %49) #3
%51 = call i64 @kvm_read_cr0(ptr noundef nonnull %0) #3
%52 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 3
%53 = load i64, ptr %52, align 8, !tbaa !31
%54 = icmp ne i64 %51, %53
%55 = or i1 %43, %54
%56 = load ptr, ptr @kvm_x86_ops, align 8, !tbaa !15
%57 = getelementptr inbounds %struct.TYPE_9__, ptr %56, i64 0, i32 1
%58 = load ptr, ptr %57, align 8, !tbaa !32
%59 = call i32 %58(ptr noundef nonnull %0, i64 noundef %53) #3
%60 = load i64, ptr %52, align 8, !tbaa !31
%61 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 2
store i64 %60, ptr %61, align 8, !tbaa !33
%62 = call i32 @kvm_read_cr4(ptr noundef nonnull %0) #3
%63 = load i32, ptr %1, align 8, !tbaa !5
%64 = icmp ne i32 %62, %63
%65 = or i1 %55, %64
%66 = load ptr, ptr @kvm_x86_ops, align 8, !tbaa !15
%67 = load ptr, ptr %66, align 8, !tbaa !34
%68 = call i32 %67(ptr noundef nonnull %0, i32 noundef %63) #3
%69 = load i32, ptr %1, align 8, !tbaa !5
%70 = load i32, ptr @X86_CR4_OSXSAVE, align 4, !tbaa !14
%71 = and i32 %70, %69
%72 = icmp eq i32 %71, 0
br i1 %72, label %75, label %73
73: ; preds = %15
%74 = call i32 @update_cpuid(ptr noundef nonnull %0) #3
br label %75
75: ; preds = %73, %15
%76 = call i32 @is_long_mode(ptr noundef nonnull %0) #3
%77 = icmp eq i32 %76, 0
br i1 %77, label %78, label %84
78: ; preds = %75
%79 = call i64 @is_pae(ptr noundef nonnull %0) #3
%80 = icmp eq i64 %79, 0
br i1 %80, label %84, label %81
81: ; preds = %78
%82 = load i64, ptr %0, align 8, !tbaa !24
%83 = call i32 @load_pdptrs(ptr noundef nonnull %0, i64 noundef %82) #3
br label %84
84: ; preds = %81, %78, %75
br i1 %65, label %85, label %87
85: ; preds = %84
%86 = call i32 @kvm_mmu_reset_context(ptr noundef nonnull %0) #3
br label %87
87: ; preds = %85, %84
%88 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 12
%89 = load i64, ptr %88, align 8, !tbaa !35
%90 = inttoptr i64 %89 to ptr
%91 = call i32 @find_first_bit(ptr noundef %90, i32 noundef 64) #3
%92 = icmp slt i32 %91, 64
br i1 %92, label %93, label %103
93: ; preds = %87
%94 = call i32 @kvm_queue_interrupt(ptr noundef nonnull %0, i32 noundef %91, i32 noundef 0) #3
%95 = call i32 @pr_debug(ptr noundef nonnull @.str, i32 noundef %91) #3
%96 = getelementptr inbounds %struct.kvm_vcpu, ptr %0, i64 0, i32 1
%97 = load i32, ptr %96, align 8, !tbaa !36
%98 = call i64 @irqchip_in_kernel(i32 noundef %97) #3
%99 = icmp eq i64 %98, 0
br i1 %99, label %103, label %100
100: ; preds = %93
%101 = load i32, ptr %96, align 8, !tbaa !36
%102 = call i32 @kvm_pic_clear_isr_ack(i32 noundef %101) #3
br label %103
103: ; preds = %93, %100, %87
%104 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 4
%105 = load i32, ptr @VCPU_SREG_CS, align 4, !tbaa !14
%106 = call i32 @kvm_set_segment(ptr noundef nonnull %0, ptr noundef nonnull %104, i32 noundef %105) #3
%107 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 11
%108 = load i32, ptr @VCPU_SREG_DS, align 4, !tbaa !14
%109 = call i32 @kvm_set_segment(ptr noundef nonnull %0, ptr noundef nonnull %107, i32 noundef %108) #3
%110 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 10
%111 = load i32, ptr @VCPU_SREG_ES, align 4, !tbaa !14
%112 = call i32 @kvm_set_segment(ptr noundef nonnull %0, ptr noundef nonnull %110, i32 noundef %111) #3
%113 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 9
%114 = load i32, ptr @VCPU_SREG_FS, align 4, !tbaa !14
%115 = call i32 @kvm_set_segment(ptr noundef nonnull %0, ptr noundef nonnull %113, i32 noundef %114) #3
%116 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 8
%117 = load i32, ptr @VCPU_SREG_GS, align 4, !tbaa !14
%118 = call i32 @kvm_set_segment(ptr noundef nonnull %0, ptr noundef nonnull %116, i32 noundef %117) #3
%119 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 7
%120 = load i32, ptr @VCPU_SREG_SS, align 4, !tbaa !14
%121 = call i32 @kvm_set_segment(ptr noundef nonnull %0, ptr noundef nonnull %119, i32 noundef %120) #3
%122 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 6
%123 = load i32, ptr @VCPU_SREG_TR, align 4, !tbaa !14
%124 = call i32 @kvm_set_segment(ptr noundef nonnull %0, ptr noundef nonnull %122, i32 noundef %123) #3
%125 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 5
%126 = load i32, ptr @VCPU_SREG_LDTR, align 4, !tbaa !14
%127 = call i32 @kvm_set_segment(ptr noundef nonnull %0, ptr noundef nonnull %125, i32 noundef %126) #3
%128 = call i32 @update_cr8_intercept(ptr noundef nonnull %0) #3
%129 = call i64 @kvm_vcpu_is_bsp(ptr noundef nonnull %0) #3
%130 = icmp eq i64 %129, 0
br i1 %130, label %148, label %131
131: ; preds = %103
%132 = call i32 @kvm_rip_read(ptr noundef nonnull %0) #3
%133 = icmp eq i32 %132, 65520
br i1 %133, label %134, label %148
134: ; preds = %131
%135 = load i32, ptr %104, align 8, !tbaa !37
%136 = icmp eq i32 %135, 61440
br i1 %136, label %137, label %148
137: ; preds = %134
%138 = getelementptr inbounds %struct.kvm_sregs, ptr %1, i64 0, i32 4, i32 1
%139 = load i32, ptr %138, align 4, !tbaa !38
%140 = icmp eq i32 %139, -65536
br i1 %140, label %141, label %148
141: ; preds = %137
%142 = load i32, ptr @X86_CR0_PE, align 4, !tbaa !14
%143 = call i32 @kvm_read_cr0_bits(ptr noundef nonnull %0, i32 noundef %142) #3
%144 = icmp eq i32 %143, 0
br i1 %144, label %145, label %148
145: ; preds = %141
%146 = load i32, ptr @KVM_MP_STATE_RUNNABLE, align 4, !tbaa !14
%147 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 3
store i32 %146, ptr %147, align 8, !tbaa !39
br label %148
148: ; preds = %103, %131, %134, %137, %141, %145, %12
%149 = phi i32 [ 0, %141 ], [ 0, %145 ], [ 0, %137 ], [ 0, %134 ], [ 0, %131 ], [ 0, %103 ], [ %14, %12 ]
%150 = call i32 @vcpu_put(ptr noundef %0) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %149
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @vcpu_load(ptr noundef) local_unnamed_addr #2
declare i32 @guest_cpuid_has_xsave(ptr noundef) local_unnamed_addr #2
declare i32 @kvm_set_cr8(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @kvm_set_apic_base(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @kvm_read_cr0(ptr noundef) local_unnamed_addr #2
declare i32 @kvm_read_cr4(ptr noundef) local_unnamed_addr #2
declare i32 @update_cpuid(ptr noundef) local_unnamed_addr #2
declare i32 @is_long_mode(ptr noundef) local_unnamed_addr #2
declare i64 @is_pae(ptr noundef) local_unnamed_addr #2
declare i32 @load_pdptrs(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @kvm_mmu_reset_context(ptr noundef) local_unnamed_addr #2
declare i32 @find_first_bit(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @kvm_queue_interrupt(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @pr_debug(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @irqchip_in_kernel(i32 noundef) local_unnamed_addr #2
declare i32 @kvm_pic_clear_isr_ack(i32 noundef) local_unnamed_addr #2
declare i32 @kvm_set_segment(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @update_cr8_intercept(ptr noundef) local_unnamed_addr #2
declare i64 @kvm_vcpu_is_bsp(ptr noundef) local_unnamed_addr #2
declare i32 @kvm_rip_read(ptr noundef) local_unnamed_addr #2
declare i32 @kvm_read_cr0_bits(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @vcpu_put(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"kvm_sregs", !7, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56, !11, i64 64, !11, i64 72, !11, i64 80, !11, i64 88, !10, i64 96, !7, i64 104, !7, i64 108, !7, i64 112, !12, i64 116, !13, i64 124}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"TYPE_10__", !7, i64 0, !7, i64 4}
!12 = !{!"TYPE_7__", !7, i64 0, !7, i64 4}
!13 = !{!"TYPE_6__", !7, i64 0, !7, i64 4}
!14 = !{!7, !7, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"any pointer", !8, i64 0}
!17 = !{!18, !16, i64 32}
!18 = !{!"TYPE_9__", !16, i64 0, !16, i64 8, !16, i64 16, !16, i64 24, !16, i64 32}
!19 = !{!18, !16, i64 24}
!20 = !{!6, !7, i64 112}
!21 = !{!22, !7, i64 28}
!22 = !{!"kvm_vcpu", !23, i64 0, !7, i64 32}
!23 = !{!"TYPE_8__", !10, i64 0, !10, i64 8, !10, i64 16, !7, i64 24, !7, i64 28}
!24 = !{!22, !10, i64 0}
!25 = !{!6, !10, i64 8}
!26 = !{!6, !7, i64 108}
!27 = !{!22, !10, i64 8}
!28 = !{!6, !10, i64 16}
!29 = !{!18, !16, i64 16}
!30 = !{!6, !7, i64 104}
!31 = !{!6, !10, i64 24}
!32 = !{!18, !16, i64 8}
!33 = !{!22, !10, i64 16}
!34 = !{!18, !16, i64 0}
!35 = !{!6, !10, i64 96}
!36 = !{!22, !7, i64 32}
!37 = !{!6, !7, i64 32}
!38 = !{!6, !7, i64 36}
!39 = !{!22, !7, i64 24}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/kvm/extr_x86.c_kvm_arch_vcpu_ioctl_set_sregs.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/kvm/extr_x86.c_kvm_arch_vcpu_ioctl_set_sregs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.descriptor_table = type { i32, i32 }
@X86_CR4_OSXSAVE = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@kvm_x86_ops = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [25 x i8] c"Set back pending irq %d\0A\00", align 1
@VCPU_SREG_CS = common local_unnamed_addr global i32 0, align 4
@VCPU_SREG_DS = common local_unnamed_addr global i32 0, align 4
@VCPU_SREG_ES = common local_unnamed_addr global i32 0, align 4
@VCPU_SREG_FS = common local_unnamed_addr global i32 0, align 4
@VCPU_SREG_GS = common local_unnamed_addr global i32 0, align 4
@VCPU_SREG_SS = common local_unnamed_addr global i32 0, align 4
@VCPU_SREG_TR = common local_unnamed_addr global i32 0, align 4
@VCPU_SREG_LDTR = common local_unnamed_addr global i32 0, align 4
@X86_CR0_PE = common local_unnamed_addr global i32 0, align 4
@KVM_MP_STATE_RUNNABLE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @kvm_arch_vcpu_ioctl_set_sregs(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca %struct.descriptor_table, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #3
%4 = tail call i32 @vcpu_load(ptr noundef %0) #3
%5 = tail call i32 @guest_cpuid_has_xsave(ptr noundef %0) #3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %15
7: ; preds = %2
%8 = load i32, ptr %1, align 8, !tbaa !6
%9 = load i32, ptr @X86_CR4_OSXSAVE, align 4, !tbaa !15
%10 = and i32 %9, %8
%11 = icmp eq i32 %10, 0
br i1 %11, label %15, label %12
12: ; preds = %7
%13 = load i32, ptr @EINVAL, align 4, !tbaa !15
%14 = sub nsw i32 0, %13
br label %148
15: ; preds = %7, %2
%16 = getelementptr inbounds i8, ptr %1, i64 124
%17 = load <2 x i32>, ptr %16, align 4, !tbaa !15
store <2 x i32> %17, ptr %3, align 8, !tbaa !15
%18 = load ptr, ptr @kvm_x86_ops, align 8, !tbaa !16
%19 = getelementptr inbounds i8, ptr %18, i64 32
%20 = load ptr, ptr %19, align 8, !tbaa !18
%21 = call i32 %20(ptr noundef %0, ptr noundef nonnull %3) #3
%22 = getelementptr inbounds i8, ptr %1, i64 116
%23 = load <2 x i32>, ptr %22, align 4, !tbaa !15
store <2 x i32> %23, ptr %3, align 8, !tbaa !15
%24 = load ptr, ptr @kvm_x86_ops, align 8, !tbaa !16
%25 = getelementptr inbounds i8, ptr %24, i64 24
%26 = load ptr, ptr %25, align 8, !tbaa !20
%27 = call i32 %26(ptr noundef %0, ptr noundef nonnull %3) #3
%28 = getelementptr inbounds i8, ptr %1, i64 112
%29 = load i32, ptr %28, align 8, !tbaa !21
%30 = getelementptr inbounds i8, ptr %0, i64 28
store i32 %29, ptr %30, align 4, !tbaa !22
%31 = load i64, ptr %0, align 8, !tbaa !25
%32 = getelementptr inbounds i8, ptr %1, i64 8
%33 = load i64, ptr %32, align 8, !tbaa !26
%34 = icmp ne i64 %31, %33
store i64 %33, ptr %0, align 8, !tbaa !25
%35 = getelementptr inbounds i8, ptr %1, i64 108
%36 = load i32, ptr %35, align 4, !tbaa !27
%37 = call i32 @kvm_set_cr8(ptr noundef nonnull %0, i32 noundef %36) #3
%38 = getelementptr inbounds i8, ptr %0, i64 8
%39 = load i64, ptr %38, align 8, !tbaa !28
%40 = getelementptr inbounds i8, ptr %1, i64 16
%41 = load i64, ptr %40, align 8, !tbaa !29
%42 = icmp ne i64 %39, %41
%43 = or i1 %34, %42
%44 = load ptr, ptr @kvm_x86_ops, align 8, !tbaa !16
%45 = getelementptr inbounds i8, ptr %44, i64 16
%46 = load ptr, ptr %45, align 8, !tbaa !30
%47 = call i32 %46(ptr noundef nonnull %0, i64 noundef %41) #3
%48 = getelementptr inbounds i8, ptr %1, i64 104
%49 = load i32, ptr %48, align 8, !tbaa !31
%50 = call i32 @kvm_set_apic_base(ptr noundef nonnull %0, i32 noundef %49) #3
%51 = call i64 @kvm_read_cr0(ptr noundef nonnull %0) #3
%52 = getelementptr inbounds i8, ptr %1, i64 24
%53 = load i64, ptr %52, align 8, !tbaa !32
%54 = icmp ne i64 %51, %53
%55 = or i1 %43, %54
%56 = load ptr, ptr @kvm_x86_ops, align 8, !tbaa !16
%57 = getelementptr inbounds i8, ptr %56, i64 8
%58 = load ptr, ptr %57, align 8, !tbaa !33
%59 = call i32 %58(ptr noundef nonnull %0, i64 noundef %53) #3
%60 = load i64, ptr %52, align 8, !tbaa !32
%61 = getelementptr inbounds i8, ptr %0, i64 16
store i64 %60, ptr %61, align 8, !tbaa !34
%62 = call i32 @kvm_read_cr4(ptr noundef nonnull %0) #3
%63 = load i32, ptr %1, align 8, !tbaa !6
%64 = icmp ne i32 %62, %63
%65 = or i1 %55, %64
%66 = load ptr, ptr @kvm_x86_ops, align 8, !tbaa !16
%67 = load ptr, ptr %66, align 8, !tbaa !35
%68 = call i32 %67(ptr noundef nonnull %0, i32 noundef %63) #3
%69 = load i32, ptr %1, align 8, !tbaa !6
%70 = load i32, ptr @X86_CR4_OSXSAVE, align 4, !tbaa !15
%71 = and i32 %70, %69
%72 = icmp eq i32 %71, 0
br i1 %72, label %75, label %73
73: ; preds = %15
%74 = call i32 @update_cpuid(ptr noundef nonnull %0) #3
br label %75
75: ; preds = %73, %15
%76 = call i32 @is_long_mode(ptr noundef nonnull %0) #3
%77 = icmp eq i32 %76, 0
br i1 %77, label %78, label %84
78: ; preds = %75
%79 = call i64 @is_pae(ptr noundef nonnull %0) #3
%80 = icmp eq i64 %79, 0
br i1 %80, label %84, label %81
81: ; preds = %78
%82 = load i64, ptr %0, align 8, !tbaa !25
%83 = call i32 @load_pdptrs(ptr noundef nonnull %0, i64 noundef %82) #3
br label %84
84: ; preds = %81, %78, %75
br i1 %65, label %85, label %87
85: ; preds = %84
%86 = call i32 @kvm_mmu_reset_context(ptr noundef nonnull %0) #3
br label %87
87: ; preds = %85, %84
%88 = getelementptr inbounds i8, ptr %1, i64 96
%89 = load i64, ptr %88, align 8, !tbaa !36
%90 = inttoptr i64 %89 to ptr
%91 = call i32 @find_first_bit(ptr noundef %90, i32 noundef 64) #3
%92 = icmp slt i32 %91, 64
br i1 %92, label %93, label %103
93: ; preds = %87
%94 = call i32 @kvm_queue_interrupt(ptr noundef nonnull %0, i32 noundef %91, i32 noundef 0) #3
%95 = call i32 @pr_debug(ptr noundef nonnull @.str, i32 noundef %91) #3
%96 = getelementptr inbounds i8, ptr %0, i64 32
%97 = load i32, ptr %96, align 8, !tbaa !37
%98 = call i64 @irqchip_in_kernel(i32 noundef %97) #3
%99 = icmp eq i64 %98, 0
br i1 %99, label %103, label %100
100: ; preds = %93
%101 = load i32, ptr %96, align 8, !tbaa !37
%102 = call i32 @kvm_pic_clear_isr_ack(i32 noundef %101) #3
br label %103
103: ; preds = %93, %100, %87
%104 = getelementptr inbounds i8, ptr %1, i64 32
%105 = load i32, ptr @VCPU_SREG_CS, align 4, !tbaa !15
%106 = call i32 @kvm_set_segment(ptr noundef nonnull %0, ptr noundef nonnull %104, i32 noundef %105) #3
%107 = getelementptr inbounds i8, ptr %1, i64 88
%108 = load i32, ptr @VCPU_SREG_DS, align 4, !tbaa !15
%109 = call i32 @kvm_set_segment(ptr noundef nonnull %0, ptr noundef nonnull %107, i32 noundef %108) #3
%110 = getelementptr inbounds i8, ptr %1, i64 80
%111 = load i32, ptr @VCPU_SREG_ES, align 4, !tbaa !15
%112 = call i32 @kvm_set_segment(ptr noundef nonnull %0, ptr noundef nonnull %110, i32 noundef %111) #3
%113 = getelementptr inbounds i8, ptr %1, i64 72
%114 = load i32, ptr @VCPU_SREG_FS, align 4, !tbaa !15
%115 = call i32 @kvm_set_segment(ptr noundef nonnull %0, ptr noundef nonnull %113, i32 noundef %114) #3
%116 = getelementptr inbounds i8, ptr %1, i64 64
%117 = load i32, ptr @VCPU_SREG_GS, align 4, !tbaa !15
%118 = call i32 @kvm_set_segment(ptr noundef nonnull %0, ptr noundef nonnull %116, i32 noundef %117) #3
%119 = getelementptr inbounds i8, ptr %1, i64 56
%120 = load i32, ptr @VCPU_SREG_SS, align 4, !tbaa !15
%121 = call i32 @kvm_set_segment(ptr noundef nonnull %0, ptr noundef nonnull %119, i32 noundef %120) #3
%122 = getelementptr inbounds i8, ptr %1, i64 48
%123 = load i32, ptr @VCPU_SREG_TR, align 4, !tbaa !15
%124 = call i32 @kvm_set_segment(ptr noundef nonnull %0, ptr noundef nonnull %122, i32 noundef %123) #3
%125 = getelementptr inbounds i8, ptr %1, i64 40
%126 = load i32, ptr @VCPU_SREG_LDTR, align 4, !tbaa !15
%127 = call i32 @kvm_set_segment(ptr noundef nonnull %0, ptr noundef nonnull %125, i32 noundef %126) #3
%128 = call i32 @update_cr8_intercept(ptr noundef nonnull %0) #3
%129 = call i64 @kvm_vcpu_is_bsp(ptr noundef nonnull %0) #3
%130 = icmp eq i64 %129, 0
br i1 %130, label %148, label %131
131: ; preds = %103
%132 = call i32 @kvm_rip_read(ptr noundef nonnull %0) #3
%133 = icmp eq i32 %132, 65520
br i1 %133, label %134, label %148
134: ; preds = %131
%135 = load i32, ptr %104, align 8, !tbaa !38
%136 = icmp eq i32 %135, 61440
br i1 %136, label %137, label %148
137: ; preds = %134
%138 = getelementptr inbounds i8, ptr %1, i64 36
%139 = load i32, ptr %138, align 4, !tbaa !39
%140 = icmp eq i32 %139, -65536
br i1 %140, label %141, label %148
141: ; preds = %137
%142 = load i32, ptr @X86_CR0_PE, align 4, !tbaa !15
%143 = call i32 @kvm_read_cr0_bits(ptr noundef nonnull %0, i32 noundef %142) #3
%144 = icmp eq i32 %143, 0
br i1 %144, label %145, label %148
145: ; preds = %141
%146 = load i32, ptr @KVM_MP_STATE_RUNNABLE, align 4, !tbaa !15
%147 = getelementptr inbounds i8, ptr %0, i64 24
store i32 %146, ptr %147, align 8, !tbaa !40
br label %148
148: ; preds = %103, %131, %134, %137, %141, %145, %12
%149 = phi i32 [ 0, %141 ], [ 0, %145 ], [ 0, %137 ], [ 0, %134 ], [ 0, %131 ], [ 0, %103 ], [ %14, %12 ]
%150 = call i32 @vcpu_put(ptr noundef %0) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #3
ret i32 %149
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @vcpu_load(ptr noundef) local_unnamed_addr #2
declare i32 @guest_cpuid_has_xsave(ptr noundef) local_unnamed_addr #2
declare i32 @kvm_set_cr8(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @kvm_set_apic_base(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @kvm_read_cr0(ptr noundef) local_unnamed_addr #2
declare i32 @kvm_read_cr4(ptr noundef) local_unnamed_addr #2
declare i32 @update_cpuid(ptr noundef) local_unnamed_addr #2
declare i32 @is_long_mode(ptr noundef) local_unnamed_addr #2
declare i64 @is_pae(ptr noundef) local_unnamed_addr #2
declare i32 @load_pdptrs(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @kvm_mmu_reset_context(ptr noundef) local_unnamed_addr #2
declare i32 @find_first_bit(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @kvm_queue_interrupt(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @pr_debug(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @irqchip_in_kernel(i32 noundef) local_unnamed_addr #2
declare i32 @kvm_pic_clear_isr_ack(i32 noundef) local_unnamed_addr #2
declare i32 @kvm_set_segment(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @update_cr8_intercept(ptr noundef) local_unnamed_addr #2
declare i64 @kvm_vcpu_is_bsp(ptr noundef) local_unnamed_addr #2
declare i32 @kvm_rip_read(ptr noundef) local_unnamed_addr #2
declare i32 @kvm_read_cr0_bits(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @vcpu_put(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"kvm_sregs", !8, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !12, i64 32, !12, i64 40, !12, i64 48, !12, i64 56, !12, i64 64, !12, i64 72, !12, i64 80, !12, i64 88, !11, i64 96, !8, i64 104, !8, i64 108, !8, i64 112, !13, i64 116, !14, i64 124}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"TYPE_10__", !8, i64 0, !8, i64 4}
!13 = !{!"TYPE_7__", !8, i64 0, !8, i64 4}
!14 = !{!"TYPE_6__", !8, i64 0, !8, i64 4}
!15 = !{!8, !8, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"any pointer", !9, i64 0}
!18 = !{!19, !17, i64 32}
!19 = !{!"TYPE_9__", !17, i64 0, !17, i64 8, !17, i64 16, !17, i64 24, !17, i64 32}
!20 = !{!19, !17, i64 24}
!21 = !{!7, !8, i64 112}
!22 = !{!23, !8, i64 28}
!23 = !{!"kvm_vcpu", !24, i64 0, !8, i64 32}
!24 = !{!"TYPE_8__", !11, i64 0, !11, i64 8, !11, i64 16, !8, i64 24, !8, i64 28}
!25 = !{!23, !11, i64 0}
!26 = !{!7, !11, i64 8}
!27 = !{!7, !8, i64 108}
!28 = !{!23, !11, i64 8}
!29 = !{!7, !11, i64 16}
!30 = !{!19, !17, i64 16}
!31 = !{!7, !8, i64 104}
!32 = !{!7, !11, i64 24}
!33 = !{!19, !17, i64 8}
!34 = !{!23, !11, i64 16}
!35 = !{!19, !17, i64 0}
!36 = !{!7, !11, i64 96}
!37 = !{!23, !8, i64 32}
!38 = !{!7, !8, i64 32}
!39 = !{!7, !8, i64 36}
!40 = !{!23, !8, i64 24}
| fastsocket_kernel_arch_x86_kvm_extr_x86.c_kvm_arch_vcpu_ioctl_set_sregs |
; ModuleID = 'AnghaBench/esp-idf/components/bt/host/bluedroid/device/extr_controller.c_get_sco_buffer_count.c'
source_filename = "AnghaBench/esp-idf/components/bt/host/bluedroid/device/extr_controller.c_get_sco_buffer_count.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, i32 }
@controller_param = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @get_sco_buffer_count], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @get_sco_buffer_count() #0 {
%1 = load i32, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @controller_param, i64 0, i32 1), align 4, !tbaa !5
%2 = tail call i32 @assert(i32 noundef %1) #2
%3 = load i32, ptr @controller_param, align 4, !tbaa !10
ret i32 %3
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"TYPE_2__", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/esp-idf/components/bt/host/bluedroid/device/extr_controller.c_get_sco_buffer_count.c'
source_filename = "AnghaBench/esp-idf/components/bt/host/bluedroid/device/extr_controller.c_get_sco_buffer_count.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32, i32 }
@controller_param = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
@llvm.used = appending global [1 x ptr] [ptr @get_sco_buffer_count], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @get_sco_buffer_count() #0 {
%1 = load i32, ptr getelementptr inbounds (i8, ptr @controller_param, i64 4), align 4, !tbaa !6
%2 = tail call i32 @assert(i32 noundef %1) #2
%3 = load i32, ptr @controller_param, align 4, !tbaa !11
ret i32 %3
}
declare i32 @assert(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"TYPE_2__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
| esp-idf_components_bt_host_bluedroid_device_extr_controller.c_get_sco_buffer_count |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/ieee1394/extr_ohci1394.c_ohci_iso_recv_bufferfill_task.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/ieee1394/extr_ohci1394.c_ohci_iso_recv_bufferfill_task.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ohci_iso_recv = type { i32, i64, i32, i32, ptr, ptr }
%struct.hpsb_iso = type { i32, i32 }
%struct.dma_cmd = type { i32 }
@KERN_ERR = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [39 x i8] c"IR DMA error - OHCI error code 0x%02x\0A\00", align 1
@.str.1 = private unnamed_addr constant [47 x i8] c"ISO reception overflow - ran out of DMA blocks\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @ohci_iso_recv_bufferfill_task], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ohci_iso_recv_bufferfill_task(ptr noundef %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds %struct.ohci_iso_recv, ptr %1, i64 0, i32 4
%4 = load i32, ptr %1, align 8, !tbaa !5
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %61
6: ; preds = %2
%7 = getelementptr inbounds %struct.ohci_iso_recv, ptr %1, i64 0, i32 1
%8 = getelementptr inbounds %struct.hpsb_iso, ptr %0, i64 0, i32 1
%9 = getelementptr inbounds %struct.ohci_iso_recv, ptr %1, i64 0, i32 2
%10 = getelementptr inbounds %struct.ohci_iso_recv, ptr %1, i64 0, i32 3
br label %11
11: ; preds = %6, %57
%12 = phi i32 [ 0, %6 ], [ %59, %57 ]
%13 = load ptr, ptr %3, align 8, !tbaa !12
%14 = load i64, ptr %7, align 8, !tbaa !13
%15 = getelementptr inbounds %struct.dma_cmd, ptr %13, i64 %14
%16 = load i32, ptr %15, align 4, !tbaa !14
%17 = tail call i32 @le32_to_cpu(i32 noundef %16) #2
%18 = lshr i32 %17, 16
%19 = load i32, ptr %15, align 4, !tbaa !14
%20 = tail call i32 @le32_to_cpu(i32 noundef %19) #2
%21 = and i32 %20, 65535
%22 = trunc i32 %18 to i8
%23 = and i8 %22, 31
%24 = icmp eq i8 %23, 0
br i1 %24, label %61, label %25
25: ; preds = %11
%26 = and i32 %17, 2031616
%27 = icmp eq i32 %26, 1114112
br i1 %27, label %32, label %28
28: ; preds = %25
%29 = tail call i32 @atomic_inc(ptr noundef %0) #2
%30 = load i32, ptr @KERN_ERR, align 4, !tbaa !16
%31 = tail call i32 @PRINT(i32 noundef %30, ptr noundef nonnull @.str, i8 noundef zeroext %23) #2
br label %32
32: ; preds = %28, %25
%33 = icmp eq i32 %21, 0
br i1 %33, label %34, label %61
34: ; preds = %32
%35 = load i64, ptr %7, align 8, !tbaa !13
%36 = load i32, ptr %9, align 8, !tbaa !17
%37 = trunc i64 %35 to i32
%38 = mul i32 %36, %37
%39 = tail call i32 @dma_region_sync_for_cpu(ptr noundef nonnull %8, i32 noundef %38, i32 noundef %36) #2
%40 = load i32, ptr %9, align 8, !tbaa !17
store i32 %40, ptr %15, align 4, !tbaa !14
%41 = load i64, ptr %7, align 8, !tbaa !13
%42 = add i64 %41, 1
%43 = load i32, ptr %1, align 8, !tbaa !5
%44 = sext i32 %43 to i64
%45 = urem i64 %42, %44
%46 = freeze i64 %45
store i64 %46, ptr %7, align 8, !tbaa !13
%47 = add i64 %46, 1
%48 = icmp eq i64 %47, %44
%49 = select i1 %48, i64 0, i64 %47
%50 = load i32, ptr %10, align 4, !tbaa !18
%51 = sext i32 %50 to i64
%52 = icmp eq i64 %49, %51
br i1 %52, label %53, label %57
53: ; preds = %34
%54 = tail call i32 @atomic_inc(ptr noundef %0) #2
%55 = tail call i32 @DBGMSG(ptr noundef nonnull @.str.1) #2
%56 = load i32, ptr %1, align 8, !tbaa !5
br label %57
57: ; preds = %53, %34
%58 = phi i32 [ %56, %53 ], [ %43, %34 ]
%59 = add nuw nsw i32 %12, 1
%60 = icmp slt i32 %59, %58
br i1 %60, label %11, label %61, !llvm.loop !19
61: ; preds = %57, %32, %11, %2
%62 = tail call i32 @ohci_iso_recv_bufferfill_parse(ptr noundef %0, ptr noundef nonnull %1) #2
ret void
}
declare i32 @le32_to_cpu(i32 noundef) local_unnamed_addr #1
declare i32 @atomic_inc(ptr noundef) local_unnamed_addr #1
declare i32 @PRINT(i32 noundef, ptr noundef, i8 noundef zeroext) local_unnamed_addr #1
declare i32 @dma_region_sync_for_cpu(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DBGMSG(ptr noundef) local_unnamed_addr #1
declare i32 @ohci_iso_recv_bufferfill_parse(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ohci_iso_recv", !7, i64 0, !10, i64 8, !7, i64 16, !7, i64 20, !11, i64 24, !11, i64 32}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !11, i64 24}
!13 = !{!6, !10, i64 8}
!14 = !{!15, !7, i64 0}
!15 = !{!"dma_cmd", !7, i64 0}
!16 = !{!7, !7, i64 0}
!17 = !{!6, !7, i64 16}
!18 = !{!6, !7, i64 20}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/ieee1394/extr_ohci1394.c_ohci_iso_recv_bufferfill_task.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/ieee1394/extr_ohci1394.c_ohci_iso_recv_bufferfill_task.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.dma_cmd = type { i32 }
@KERN_ERR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [39 x i8] c"IR DMA error - OHCI error code 0x%02x\0A\00", align 1
@.str.1 = private unnamed_addr constant [47 x i8] c"ISO reception overflow - ran out of DMA blocks\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ohci_iso_recv_bufferfill_task], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ohci_iso_recv_bufferfill_task(ptr noundef %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 24
%4 = load i32, ptr %1, align 8, !tbaa !6
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %61
6: ; preds = %2
%7 = getelementptr inbounds i8, ptr %1, i64 8
%8 = getelementptr inbounds i8, ptr %0, i64 4
%9 = getelementptr inbounds i8, ptr %1, i64 16
%10 = getelementptr inbounds i8, ptr %1, i64 20
br label %11
11: ; preds = %6, %57
%12 = phi i32 [ 0, %6 ], [ %59, %57 ]
%13 = load ptr, ptr %3, align 8, !tbaa !13
%14 = load i64, ptr %7, align 8, !tbaa !14
%15 = getelementptr inbounds %struct.dma_cmd, ptr %13, i64 %14
%16 = load i32, ptr %15, align 4, !tbaa !15
%17 = tail call i32 @le32_to_cpu(i32 noundef %16) #2
%18 = lshr i32 %17, 16
%19 = load i32, ptr %15, align 4, !tbaa !15
%20 = tail call i32 @le32_to_cpu(i32 noundef %19) #2
%21 = and i32 %20, 65535
%22 = trunc i32 %18 to i8
%23 = and i8 %22, 31
%24 = icmp eq i8 %23, 0
br i1 %24, label %61, label %25
25: ; preds = %11
%26 = and i32 %17, 2031616
%27 = icmp eq i32 %26, 1114112
br i1 %27, label %32, label %28
28: ; preds = %25
%29 = tail call i32 @atomic_inc(ptr noundef %0) #2
%30 = load i32, ptr @KERN_ERR, align 4, !tbaa !17
%31 = tail call i32 @PRINT(i32 noundef %30, ptr noundef nonnull @.str, i8 noundef zeroext %23) #2
br label %32
32: ; preds = %28, %25
%33 = icmp eq i32 %21, 0
br i1 %33, label %34, label %61
34: ; preds = %32
%35 = load i64, ptr %7, align 8, !tbaa !14
%36 = load i32, ptr %9, align 8, !tbaa !18
%37 = trunc i64 %35 to i32
%38 = mul i32 %36, %37
%39 = tail call i32 @dma_region_sync_for_cpu(ptr noundef nonnull %8, i32 noundef %38, i32 noundef %36) #2
%40 = load i32, ptr %9, align 8, !tbaa !18
store i32 %40, ptr %15, align 4, !tbaa !15
%41 = load i64, ptr %7, align 8, !tbaa !14
%42 = add i64 %41, 1
%43 = load i32, ptr %1, align 8, !tbaa !6
%44 = sext i32 %43 to i64
%45 = urem i64 %42, %44
%46 = freeze i64 %45
store i64 %46, ptr %7, align 8, !tbaa !14
%47 = add i64 %46, 1
%48 = icmp eq i64 %47, %44
%49 = select i1 %48, i64 0, i64 %47
%50 = load i32, ptr %10, align 4, !tbaa !19
%51 = sext i32 %50 to i64
%52 = icmp eq i64 %49, %51
br i1 %52, label %53, label %57
53: ; preds = %34
%54 = tail call i32 @atomic_inc(ptr noundef %0) #2
%55 = tail call i32 @DBGMSG(ptr noundef nonnull @.str.1) #2
%56 = load i32, ptr %1, align 8, !tbaa !6
br label %57
57: ; preds = %53, %34
%58 = phi i32 [ %56, %53 ], [ %43, %34 ]
%59 = add nuw nsw i32 %12, 1
%60 = icmp slt i32 %59, %58
br i1 %60, label %11, label %61, !llvm.loop !20
61: ; preds = %57, %32, %11, %2
%62 = tail call i32 @ohci_iso_recv_bufferfill_parse(ptr noundef %0, ptr noundef nonnull %1) #2
ret void
}
declare i32 @le32_to_cpu(i32 noundef) local_unnamed_addr #1
declare i32 @atomic_inc(ptr noundef) local_unnamed_addr #1
declare i32 @PRINT(i32 noundef, ptr noundef, i8 noundef zeroext) local_unnamed_addr #1
declare i32 @dma_region_sync_for_cpu(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DBGMSG(ptr noundef) local_unnamed_addr #1
declare i32 @ohci_iso_recv_bufferfill_parse(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ohci_iso_recv", !8, i64 0, !11, i64 8, !8, i64 16, !8, i64 20, !12, i64 24, !12, i64 32}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!7, !12, i64 24}
!14 = !{!7, !11, i64 8}
!15 = !{!16, !8, i64 0}
!16 = !{!"dma_cmd", !8, i64 0}
!17 = !{!8, !8, i64 0}
!18 = !{!7, !8, i64 16}
!19 = !{!7, !8, i64 20}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
| fastsocket_kernel_drivers_ieee1394_extr_ohci1394.c_ohci_iso_recv_bufferfill_task |
; ModuleID = 'AnghaBench/freebsd/sys/dev/ubsec/extr_ubsec.c_ubsec_dmamap_cb.c'
source_filename = "AnghaBench/freebsd/sys/dev/ubsec/extr_ubsec.c_ubsec_dmamap_cb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ubsec_dmamap_cb], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable
define internal void @ubsec_dmamap_cb(ptr nocapture noundef writeonly %0, ptr nocapture noundef readonly %1, i32 %2, i32 %3) #0 {
%5 = load i32, ptr %1, align 4, !tbaa !5
store i32 %5, ptr %0, align 4, !tbaa !10
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/ubsec/extr_ubsec.c_ubsec_dmamap_cb.c'
source_filename = "AnghaBench/freebsd/sys/dev/ubsec/extr_ubsec.c_ubsec_dmamap_cb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ubsec_dmamap_cb], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync)
define internal void @ubsec_dmamap_cb(ptr nocapture noundef writeonly %0, ptr nocapture noundef readonly %1, i32 %2, i32 %3) #0 {
%5 = load i32, ptr %1, align 4, !tbaa !6
store i32 %5, ptr %0, align 4, !tbaa !11
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| freebsd_sys_dev_ubsec_extr_ubsec.c_ubsec_dmamap_cb |
; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_zap_micro.c_zap_create_flags_dnsize.c'
source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_zap_micro.c_zap_create_flags_dnsize.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SPA_MINBLOCKSHIFT = dso_local local_unnamed_addr global i32 0, align 4
@SPA_OLD_MAXBLOCKSHIFT = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @zap_create_flags_dnsize(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, ptr noundef %9) local_unnamed_addr #0 {
%11 = tail call i32 @dmu_object_alloc_dnsize(ptr noundef %0, i32 noundef %3, i32 noundef 0, i32 noundef %6, i32 noundef %7, i32 noundef %8, ptr noundef %9) #2
%12 = load i32, ptr @SPA_MINBLOCKSHIFT, align 4, !tbaa !5
%13 = icmp sgt i32 %12, %4
br i1 %13, label %22, label %14
14: ; preds = %10
%15 = load i32, ptr @SPA_OLD_MAXBLOCKSHIFT, align 4, !tbaa !5
%16 = icmp slt i32 %15, %4
%17 = icmp sgt i32 %12, %5
%18 = or i1 %17, %16
br i1 %18, label %22, label %19
19: ; preds = %14
%20 = icmp sge i32 %15, %5
%21 = zext i1 %20 to i32
br label %22
22: ; preds = %19, %14, %10
%23 = phi i32 [ 0, %14 ], [ 0, %10 ], [ %21, %19 ]
%24 = tail call i32 @ASSERT(i32 noundef %23) #2
%25 = zext nneg i32 %4 to i64
%26 = shl nuw i64 1, %25
%27 = tail call i64 @dmu_object_set_blocksize(ptr noundef %0, i32 noundef %11, i64 noundef %26, i32 noundef %5, ptr noundef %9) #2
%28 = icmp eq i64 %27, 0
%29 = zext i1 %28 to i32
%30 = tail call i32 @VERIFY(i32 noundef %29) #2
%31 = tail call i32 @mzap_create_impl(ptr noundef %0, i32 noundef %11, i32 noundef %1, i32 noundef %2, ptr noundef %9) #2
ret i32 %11
}
declare i32 @dmu_object_alloc_dnsize(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ASSERT(i32 noundef) local_unnamed_addr #1
declare i32 @VERIFY(i32 noundef) local_unnamed_addr #1
declare i64 @dmu_object_set_blocksize(ptr noundef, i32 noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mzap_create_impl(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_zap_micro.c_zap_create_flags_dnsize.c'
source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_zap_micro.c_zap_create_flags_dnsize.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SPA_MINBLOCKSHIFT = common local_unnamed_addr global i32 0, align 4
@SPA_OLD_MAXBLOCKSHIFT = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @zap_create_flags_dnsize(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %7, i32 noundef %8, ptr noundef %9) local_unnamed_addr #0 {
%11 = tail call i32 @dmu_object_alloc_dnsize(ptr noundef %0, i32 noundef %3, i32 noundef 0, i32 noundef %6, i32 noundef %7, i32 noundef %8, ptr noundef %9) #2
%12 = load i32, ptr @SPA_MINBLOCKSHIFT, align 4, !tbaa !6
%13 = icmp sgt i32 %12, %4
br i1 %13, label %22, label %14
14: ; preds = %10
%15 = load i32, ptr @SPA_OLD_MAXBLOCKSHIFT, align 4, !tbaa !6
%16 = icmp slt i32 %15, %4
%17 = icmp sgt i32 %12, %5
%18 = or i1 %17, %16
br i1 %18, label %22, label %19
19: ; preds = %14
%20 = icmp sge i32 %15, %5
%21 = zext i1 %20 to i32
br label %22
22: ; preds = %19, %14, %10
%23 = phi i32 [ 0, %14 ], [ 0, %10 ], [ %21, %19 ]
%24 = tail call i32 @ASSERT(i32 noundef %23) #2
%25 = zext nneg i32 %4 to i64
%26 = shl nuw i64 1, %25
%27 = tail call i64 @dmu_object_set_blocksize(ptr noundef %0, i32 noundef %11, i64 noundef %26, i32 noundef %5, ptr noundef %9) #2
%28 = icmp eq i64 %27, 0
%29 = zext i1 %28 to i32
%30 = tail call i32 @VERIFY(i32 noundef %29) #2
%31 = tail call i32 @mzap_create_impl(ptr noundef %0, i32 noundef %11, i32 noundef %1, i32 noundef %2, ptr noundef %9) #2
ret i32 %11
}
declare i32 @dmu_object_alloc_dnsize(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ASSERT(i32 noundef) local_unnamed_addr #1
declare i32 @VERIFY(i32 noundef) local_unnamed_addr #1
declare i64 @dmu_object_set_blocksize(ptr noundef, i32 noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mzap_create_impl(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_cddl_contrib_opensolaris_uts_common_fs_zfs_extr_zap_micro.c_zap_create_flags_dnsize |
; ModuleID = 'AnghaBench/linux/drivers/message/fusion/extr_mptscsih.c_mptscsih_device_delay_show.c'
source_filename = "AnghaBench/linux/drivers/message/fusion/extr_mptscsih.c_mptscsih_device_delay_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PAGE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [6 x i8] c"%02d\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @mptscsih_device_delay_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mptscsih_device_delay_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @class_to_shost(ptr noundef %0) #2
%5 = tail call ptr @shost_priv(ptr noundef %4) #2
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !10
%8 = load i32, ptr %6, align 4, !tbaa !12
%9 = tail call i32 @snprintf(ptr noundef %2, i32 noundef %7, ptr noundef nonnull @.str, i32 noundef %8) #2
ret i32 %9
}
declare ptr @class_to_shost(ptr noundef) local_unnamed_addr #1
declare ptr @shost_priv(ptr noundef) local_unnamed_addr #1
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_5__", !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/message/fusion/extr_mptscsih.c_mptscsih_device_delay_show.c'
source_filename = "AnghaBench/linux/drivers/message/fusion/extr_mptscsih.c_mptscsih_device_delay_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PAGE_SIZE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [6 x i8] c"%02d\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @mptscsih_device_delay_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mptscsih_device_delay_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @class_to_shost(ptr noundef %0) #2
%5 = tail call ptr @shost_priv(ptr noundef %4) #2
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !11
%8 = load i32, ptr %6, align 4, !tbaa !13
%9 = tail call i32 @snprintf(ptr noundef %2, i32 noundef %7, ptr noundef nonnull @.str, i32 noundef %8) #2
ret i32 %9
}
declare ptr @class_to_shost(ptr noundef) local_unnamed_addr #1
declare ptr @shost_priv(ptr noundef) local_unnamed_addr #1
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"TYPE_5__", !12, i64 0}
| linux_drivers_message_fusion_extr_mptscsih.c_mptscsih_device_delay_show |
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/bio/extr_bss_acpt.c_BIO_s_accept.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/bio/extr_bss_acpt.c_BIO_s_accept.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@methods_acceptp = dso_local constant i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef nonnull ptr @BIO_s_accept() local_unnamed_addr #0 {
ret ptr @methods_acceptp
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/bio/extr_bss_acpt.c_BIO_s_accept.c'
source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/bio/extr_bss_acpt.c_BIO_s_accept.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@methods_acceptp = common global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef nonnull ptr @BIO_s_accept() local_unnamed_addr #0 {
ret ptr @methods_acceptp
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_crypto_openssl_crypto_bio_extr_bss_acpt.c_BIO_s_accept |
; ModuleID = 'AnghaBench/reactos/dll/directx/wine/ddraw/extr_light.c_light_deactivate.c'
source_filename = "AnghaBench/reactos/dll/directx/wine/ddraw/extr_light.c_light_deactivate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.d3d_light = type { %struct.TYPE_4__, i32, ptr }
%struct.TYPE_4__ = type { i32 }
@.str = private unnamed_addr constant [11 x i8] c"light %p.\0A\00", align 1
@D3DLIGHT_ACTIVE = dso_local local_unnamed_addr global i32 0, align 4
@FALSE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @light_deactivate(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @TRACE(ptr noundef nonnull @.str, ptr noundef %0) #2
%3 = getelementptr inbounds %struct.d3d_light, ptr %0, i64 0, i32 2
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = icmp eq ptr %4, null
br i1 %5, label %23, label %6
6: ; preds = %1
%7 = load ptr, ptr %4, align 8, !tbaa !12
%8 = icmp eq ptr %7, null
br i1 %8, label %23, label %9
9: ; preds = %6
%10 = load i32, ptr %0, align 8, !tbaa !14
%11 = load i32, ptr @D3DLIGHT_ACTIVE, align 4, !tbaa !15
%12 = and i32 %11, %10
%13 = icmp eq i32 %12, 0
br i1 %13, label %23, label %14
14: ; preds = %9
%15 = getelementptr inbounds %struct.d3d_light, ptr %0, i64 0, i32 1
%16 = load i32, ptr %15, align 4, !tbaa !16
%17 = load i32, ptr @FALSE, align 4, !tbaa !15
%18 = tail call i32 @IDirect3DDevice7_LightEnable(ptr noundef nonnull %7, i32 noundef %16, i32 noundef %17) #2
%19 = load i32, ptr @D3DLIGHT_ACTIVE, align 4, !tbaa !15
%20 = xor i32 %19, -1
%21 = load i32, ptr %0, align 8, !tbaa !14
%22 = and i32 %21, %20
store i32 %22, ptr %0, align 8, !tbaa !14
br label %23
23: ; preds = %9, %14, %1, %6
ret void
}
declare i32 @TRACE(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @IDirect3DDevice7_LightEnable(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 8}
!6 = !{!"d3d_light", !7, i64 0, !8, i64 4, !11, i64 8}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_3__", !11, i64 0}
!14 = !{!6, !8, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!6, !8, i64 4}
| ; ModuleID = 'AnghaBench/reactos/dll/directx/wine/ddraw/extr_light.c_light_deactivate.c'
source_filename = "AnghaBench/reactos/dll/directx/wine/ddraw/extr_light.c_light_deactivate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [11 x i8] c"light %p.\0A\00", align 1
@D3DLIGHT_ACTIVE = common local_unnamed_addr global i32 0, align 4
@FALSE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @light_deactivate(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @TRACE(ptr noundef nonnull @.str, ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %23, label %6
6: ; preds = %1
%7 = load ptr, ptr %4, align 8, !tbaa !13
%8 = icmp eq ptr %7, null
br i1 %8, label %23, label %9
9: ; preds = %6
%10 = load i32, ptr %0, align 8, !tbaa !15
%11 = load i32, ptr @D3DLIGHT_ACTIVE, align 4, !tbaa !16
%12 = and i32 %11, %10
%13 = icmp eq i32 %12, 0
br i1 %13, label %23, label %14
14: ; preds = %9
%15 = getelementptr inbounds i8, ptr %0, i64 4
%16 = load i32, ptr %15, align 4, !tbaa !17
%17 = load i32, ptr @FALSE, align 4, !tbaa !16
%18 = tail call i32 @IDirect3DDevice7_LightEnable(ptr noundef nonnull %7, i32 noundef %16, i32 noundef %17) #2
%19 = load i32, ptr @D3DLIGHT_ACTIVE, align 4, !tbaa !16
%20 = xor i32 %19, -1
%21 = load i32, ptr %0, align 8, !tbaa !15
%22 = and i32 %21, %20
store i32 %22, ptr %0, align 8, !tbaa !15
br label %23
23: ; preds = %9, %14, %1, %6
ret void
}
declare i32 @TRACE(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @IDirect3DDevice7_LightEnable(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 8}
!7 = !{!"d3d_light", !8, i64 0, !9, i64 4, !12, i64 8}
!8 = !{!"TYPE_4__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"TYPE_3__", !12, i64 0}
!15 = !{!7, !9, i64 0}
!16 = !{!9, !9, i64 0}
!17 = !{!7, !9, i64 4}
| reactos_dll_directx_wine_ddraw_extr_light.c_light_deactivate |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intersil/p54/extr_main.c_p54_reset_stats.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/intersil/p54/extr_main.c_p54_reset_stats.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.p54_common = type { i32, %struct.TYPE_2__, ptr, ptr }
%struct.TYPE_2__ = type { i64, i64, i64 }
%struct.survey_info = type { i64, i64, i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @p54_reset_stats], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable
define internal void @p54_reset_stats(ptr nocapture noundef %0) #0 {
%2 = getelementptr inbounds %struct.p54_common, ptr %0, i64 0, i32 3
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = icmp eq ptr %3, null
br i1 %4, label %10, label %5
5: ; preds = %1
%6 = getelementptr inbounds %struct.p54_common, ptr %0, i64 0, i32 2
%7 = load ptr, ptr %6, align 8, !tbaa !13
%8 = load i64, ptr %3, align 8, !tbaa !14
%9 = getelementptr inbounds %struct.survey_info, ptr %7, i64 %8
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %9, i8 0, i64 24, i1 false)
br label %10
10: ; preds = %5, %1
store i32 1, ptr %0, align 8, !tbaa !16
%11 = getelementptr inbounds %struct.p54_common, ptr %0, i64 0, i32 1
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %11, i8 0, i64 24, i1 false)
ret void
}
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !12, i64 40}
!6 = !{!"p54_common", !7, i64 0, !10, i64 8, !12, i64 32, !12, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"long", !8, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!6, !12, i64 32}
!14 = !{!15, !11, i64 0}
!15 = !{!"ieee80211_channel", !11, i64 0}
!16 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intersil/p54/extr_main.c_p54_reset_stats.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/intersil/p54/extr_main.c_p54_reset_stats.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.survey_info = type { i64, i64, i64 }
@llvm.used = appending global [1 x ptr] [ptr @p54_reset_stats], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @p54_reset_stats(ptr nocapture noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 40
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = icmp eq ptr %3, null
br i1 %4, label %10, label %5
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %0, i64 32
%7 = load ptr, ptr %6, align 8, !tbaa !14
%8 = load i64, ptr %3, align 8, !tbaa !15
%9 = getelementptr inbounds %struct.survey_info, ptr %7, i64 %8
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %9, i8 0, i64 24, i1 false)
br label %10
10: ; preds = %5, %1
store i32 1, ptr %0, align 8, !tbaa !17
%11 = getelementptr inbounds i8, ptr %0, i64 8
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %11, i8 0, i64 24, i1 false)
ret void
}
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #1
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nocallback nofree nounwind willreturn memory(argmem: write) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !13, i64 40}
!7 = !{!"p54_common", !8, i64 0, !11, i64 8, !13, i64 32, !13, i64 40}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !12, i64 0, !12, i64 8, !12, i64 16}
!12 = !{!"long", !9, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!7, !13, i64 32}
!15 = !{!16, !12, i64 0}
!16 = !{!"ieee80211_channel", !12, i64 0}
!17 = !{!7, !8, i64 0}
| linux_drivers_net_wireless_intersil_p54_extr_main.c_p54_reset_stats |
; ModuleID = 'AnghaBench/h2o/deps/picotls/lib/extr_openssl.c_aes128ctr_setup_crypto.c'
source_filename = "AnghaBench/h2o/deps/picotls/lib/extr_openssl.c_aes128ctr_setup_crypto.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@cipher_encrypt = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @aes128ctr_setup_crypto], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @aes128ctr_setup_crypto(ptr noundef %0, i32 %1, ptr noundef %2) #0 {
%4 = tail call i32 (...) @EVP_aes_128_ctr() #2
%5 = load i32, ptr @cipher_encrypt, align 4, !tbaa !5
%6 = tail call i32 @cipher_setup_crypto(ptr noundef %0, i32 noundef 1, ptr noundef %2, i32 noundef %4, i32 noundef %5) #2
ret i32 %6
}
declare i32 @cipher_setup_crypto(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @EVP_aes_128_ctr(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/h2o/deps/picotls/lib/extr_openssl.c_aes128ctr_setup_crypto.c'
source_filename = "AnghaBench/h2o/deps/picotls/lib/extr_openssl.c_aes128ctr_setup_crypto.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cipher_encrypt = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @aes128ctr_setup_crypto], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @aes128ctr_setup_crypto(ptr noundef %0, i32 %1, ptr noundef %2) #0 {
%4 = tail call i32 @EVP_aes_128_ctr() #2
%5 = load i32, ptr @cipher_encrypt, align 4, !tbaa !6
%6 = tail call i32 @cipher_setup_crypto(ptr noundef %0, i32 noundef 1, ptr noundef %2, i32 noundef %4, i32 noundef %5) #2
ret i32 %6
}
declare i32 @cipher_setup_crypto(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @EVP_aes_128_ctr(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| h2o_deps_picotls_lib_extr_openssl.c_aes128ctr_setup_crypto |
; ModuleID = 'AnghaBench/fastsocket/kernel/net/core/extr_netpoll.c_refill_skbs.c'
source_filename = "AnghaBench/fastsocket/kernel/net/core/extr_netpoll.c_refill_skbs.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i64, i32 }
@skb_pool = dso_local global %struct.TYPE_3__ zeroinitializer, align 8
@MAX_SKBS = dso_local local_unnamed_addr global i64 0, align 8
@MAX_SKB_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@GFP_ATOMIC = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @refill_skbs], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @refill_skbs() #0 {
%1 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull getelementptr inbounds (%struct.TYPE_3__, ptr @skb_pool, i64 0, i32 1), i64 noundef undef) #2
%2 = load i64, ptr @skb_pool, align 8, !tbaa !5
%3 = load i64, ptr @MAX_SKBS, align 8, !tbaa !11
%4 = icmp slt i64 %2, %3
br i1 %4, label %5, label %15
5: ; preds = %0, %10
%6 = load i32, ptr @MAX_SKB_SIZE, align 4, !tbaa !12
%7 = load i32, ptr @GFP_ATOMIC, align 4, !tbaa !12
%8 = tail call ptr @alloc_skb(i32 noundef %6, i32 noundef %7) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %15, label %10
10: ; preds = %5
%11 = tail call i32 @__skb_queue_tail(ptr noundef nonnull @skb_pool, ptr noundef nonnull %8) #2
%12 = load i64, ptr @skb_pool, align 8, !tbaa !5
%13 = load i64, ptr @MAX_SKBS, align 8, !tbaa !11
%14 = icmp slt i64 %12, %13
br i1 %14, label %5, label %15, !llvm.loop !13
15: ; preds = %10, %5, %0
%16 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull getelementptr inbounds (%struct.TYPE_3__, ptr @skb_pool, i64 0, i32 1), i64 noundef undef) #2
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @alloc_skb(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__skb_queue_tail(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!10, !10, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/core/extr_netpoll.c_refill_skbs.c'
source_filename = "AnghaBench/fastsocket/kernel/net/core/extr_netpoll.c_refill_skbs.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_3__ = type { i64, i32 }
@skb_pool = common global %struct.TYPE_3__ zeroinitializer, align 8
@MAX_SKBS = common local_unnamed_addr global i64 0, align 8
@MAX_SKB_SIZE = common local_unnamed_addr global i32 0, align 4
@GFP_ATOMIC = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @refill_skbs], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @refill_skbs() #0 {
%1 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull getelementptr inbounds (i8, ptr @skb_pool, i64 8), i64 noundef undef) #2
%2 = load i64, ptr @skb_pool, align 8, !tbaa !6
%3 = load i64, ptr @MAX_SKBS, align 8, !tbaa !12
%4 = icmp slt i64 %2, %3
br i1 %4, label %5, label %15
5: ; preds = %0, %10
%6 = load i32, ptr @MAX_SKB_SIZE, align 4, !tbaa !13
%7 = load i32, ptr @GFP_ATOMIC, align 4, !tbaa !13
%8 = tail call ptr @alloc_skb(i32 noundef %6, i32 noundef %7) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %15, label %10
10: ; preds = %5
%11 = tail call i32 @__skb_queue_tail(ptr noundef nonnull @skb_pool, ptr noundef nonnull %8) #2
%12 = load i64, ptr @skb_pool, align 8, !tbaa !6
%13 = load i64, ptr @MAX_SKBS, align 8, !tbaa !12
%14 = icmp slt i64 %12, %13
br i1 %14, label %5, label %15, !llvm.loop !14
15: ; preds = %10, %5, %0
%16 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull getelementptr inbounds (i8, ptr @skb_pool, i64 8), i64 noundef undef) #2
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @alloc_skb(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__skb_queue_tail(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!11, !11, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| fastsocket_kernel_net_core_extr_netpoll.c_refill_skbs |
; ModuleID = 'AnghaBench/linux/drivers/tty/vt/extr_consolemap.c_update_user_maps.c'
source_filename = "AnghaBench/linux/drivers/tty/vt/extr_consolemap.c_update_user_maps.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { ptr }
@MAX_NR_CONSOLES = dso_local local_unnamed_addr global i32 0, align 4
@vc_cons = dso_local local_unnamed_addr global ptr null, align 8
@USER_MAP = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @update_user_maps], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @update_user_maps() #0 {
%1 = load i32, ptr @MAX_NR_CONSOLES, align 4, !tbaa !5
%2 = icmp sgt i32 %1, 0
br i1 %2, label %3, label %31
3: ; preds = %0, %25
%4 = phi i64 [ %27, %25 ], [ 0, %0 ]
%5 = phi ptr [ %26, %25 ], [ null, %0 ]
%6 = trunc i64 %4 to i32
%7 = tail call i32 @vc_cons_allocated(i32 noundef %6) #2
%8 = icmp eq i32 %7, 0
br i1 %8, label %25, label %9
9: ; preds = %3
%10 = load ptr, ptr @vc_cons, align 8, !tbaa !9
%11 = getelementptr inbounds %struct.TYPE_4__, ptr %10, i64 %4
%12 = load ptr, ptr %11, align 8, !tbaa !11
%13 = load ptr, ptr %12, align 8, !tbaa !13
%14 = load ptr, ptr %13, align 8, !tbaa !9
%15 = icmp eq ptr %14, null
%16 = icmp eq ptr %14, %5
%17 = select i1 %15, i1 true, i1 %16
br i1 %17, label %25, label %18
18: ; preds = %9
%19 = load i32, ptr @USER_MAP, align 4, !tbaa !5
%20 = tail call i32 @set_inverse_transl(ptr noundef nonnull %12, ptr noundef nonnull %14, i32 noundef %19) #2
%21 = load ptr, ptr @vc_cons, align 8, !tbaa !9
%22 = getelementptr inbounds %struct.TYPE_4__, ptr %21, i64 %4
%23 = load ptr, ptr %22, align 8, !tbaa !11
%24 = tail call i32 @set_inverse_trans_unicode(ptr noundef %23, ptr noundef nonnull %14) #2
br label %25
25: ; preds = %9, %18, %3
%26 = phi ptr [ %14, %18 ], [ %5, %9 ], [ %5, %3 ]
%27 = add nuw nsw i64 %4, 1
%28 = load i32, ptr @MAX_NR_CONSOLES, align 4, !tbaa !5
%29 = sext i32 %28 to i64
%30 = icmp slt i64 %27, %29
br i1 %30, label %3, label %31, !llvm.loop !15
31: ; preds = %25, %0
ret void
}
declare i32 @vc_cons_allocated(i32 noundef) local_unnamed_addr #1
declare i32 @set_inverse_transl(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_inverse_trans_unicode(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_4__", !10, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"TYPE_5__", !10, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/tty/vt/extr_consolemap.c_update_user_maps.c'
source_filename = "AnghaBench/linux/drivers/tty/vt/extr_consolemap.c_update_user_maps.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { ptr }
@MAX_NR_CONSOLES = common local_unnamed_addr global i32 0, align 4
@vc_cons = common local_unnamed_addr global ptr null, align 8
@USER_MAP = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @update_user_maps], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @update_user_maps() #0 {
%1 = load i32, ptr @MAX_NR_CONSOLES, align 4, !tbaa !6
%2 = icmp sgt i32 %1, 0
br i1 %2, label %3, label %31
3: ; preds = %0, %25
%4 = phi i64 [ %27, %25 ], [ 0, %0 ]
%5 = phi ptr [ %26, %25 ], [ null, %0 ]
%6 = trunc nuw nsw i64 %4 to i32
%7 = tail call i32 @vc_cons_allocated(i32 noundef %6) #2
%8 = icmp eq i32 %7, 0
br i1 %8, label %25, label %9
9: ; preds = %3
%10 = load ptr, ptr @vc_cons, align 8, !tbaa !10
%11 = getelementptr inbounds %struct.TYPE_4__, ptr %10, i64 %4
%12 = load ptr, ptr %11, align 8, !tbaa !12
%13 = load ptr, ptr %12, align 8, !tbaa !14
%14 = load ptr, ptr %13, align 8, !tbaa !10
%15 = icmp eq ptr %14, null
%16 = icmp eq ptr %14, %5
%17 = select i1 %15, i1 true, i1 %16
br i1 %17, label %25, label %18
18: ; preds = %9
%19 = load i32, ptr @USER_MAP, align 4, !tbaa !6
%20 = tail call i32 @set_inverse_transl(ptr noundef nonnull %12, ptr noundef nonnull %14, i32 noundef %19) #2
%21 = load ptr, ptr @vc_cons, align 8, !tbaa !10
%22 = getelementptr inbounds %struct.TYPE_4__, ptr %21, i64 %4
%23 = load ptr, ptr %22, align 8, !tbaa !12
%24 = tail call i32 @set_inverse_trans_unicode(ptr noundef %23, ptr noundef nonnull %14) #2
br label %25
25: ; preds = %9, %18, %3
%26 = phi ptr [ %14, %18 ], [ %5, %9 ], [ %5, %3 ]
%27 = add nuw nsw i64 %4, 1
%28 = load i32, ptr @MAX_NR_CONSOLES, align 4, !tbaa !6
%29 = sext i32 %28 to i64
%30 = icmp slt i64 %27, %29
br i1 %30, label %3, label %31, !llvm.loop !16
31: ; preds = %25, %0
ret void
}
declare i32 @vc_cons_allocated(i32 noundef) local_unnamed_addr #1
declare i32 @set_inverse_transl(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_inverse_trans_unicode(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_4__", !11, i64 0}
!14 = !{!15, !11, i64 0}
!15 = !{!"TYPE_5__", !11, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| linux_drivers_tty_vt_extr_consolemap.c_update_user_maps |
; ModuleID = 'AnghaBench/freebsd/sys/security/audit/extr_audit_pipe.c_audit_pipe_append.c'
source_filename = "AnghaBench/freebsd/sys/security/audit/extr_audit_pipe.c_audit_pipe_append.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.audit_pipe = type { i64, i64, i32, i32, i32, i32, %struct.TYPE_2__, i32, i32, i32 }
%struct.TYPE_2__ = type { i32 }
%struct.audit_pipe_entry = type { i32, ptr }
@audit_pipe_drops = dso_local local_unnamed_addr global i32 0, align 4
@M_AUDIT_PIPE_ENTRY = dso_local local_unnamed_addr global i32 0, align 4
@M_NOWAIT = dso_local local_unnamed_addr global i32 0, align 4
@M_ZERO = dso_local local_unnamed_addr global i32 0, align 4
@ape_queue = dso_local local_unnamed_addr global i32 0, align 4
@PSOCK = dso_local local_unnamed_addr global i32 0, align 4
@AUDIT_PIPE_ASYNC = dso_local local_unnamed_addr global i32 0, align 4
@SIGIO = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @audit_pipe_append], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @audit_pipe_append(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = tail call i32 @AUDIT_PIPE_LOCK_ASSERT(ptr noundef %0) #2
%5 = load i64, ptr %0, align 8, !tbaa !5
%6 = getelementptr inbounds %struct.audit_pipe, ptr %0, i64 0, i32 1
%7 = load i64, ptr %6, align 8, !tbaa !12
%8 = icmp slt i64 %5, %7
br i1 %8, label %15, label %9
9: ; preds = %3
%10 = getelementptr inbounds %struct.audit_pipe, ptr %0, i64 0, i32 9
%11 = load i32, ptr %10, align 4, !tbaa !13
%12 = add nsw i32 %11, 1
store i32 %12, ptr %10, align 4, !tbaa !13
%13 = load i32, ptr @audit_pipe_drops, align 4, !tbaa !14
%14 = add nsw i32 %13, 1
store i32 %14, ptr @audit_pipe_drops, align 4, !tbaa !14
br label %72
15: ; preds = %3
%16 = load i32, ptr @M_AUDIT_PIPE_ENTRY, align 4, !tbaa !14
%17 = load i32, ptr @M_NOWAIT, align 4, !tbaa !14
%18 = load i32, ptr @M_ZERO, align 4, !tbaa !14
%19 = or i32 %18, %17
%20 = tail call ptr @malloc(i32 noundef 16, i32 noundef %16, i32 noundef %19) #2
%21 = icmp eq ptr %20, null
br i1 %21, label %22, label %28
22: ; preds = %15
%23 = getelementptr inbounds %struct.audit_pipe, ptr %0, i64 0, i32 9
%24 = load i32, ptr %23, align 4, !tbaa !13
%25 = add nsw i32 %24, 1
store i32 %25, ptr %23, align 4, !tbaa !13
%26 = load i32, ptr @audit_pipe_drops, align 4, !tbaa !14
%27 = add nsw i32 %26, 1
store i32 %27, ptr @audit_pipe_drops, align 4, !tbaa !14
br label %72
28: ; preds = %15
%29 = load i32, ptr @M_AUDIT_PIPE_ENTRY, align 4, !tbaa !14
%30 = load i32, ptr @M_NOWAIT, align 4, !tbaa !14
%31 = tail call ptr @malloc(i32 noundef %2, i32 noundef %29, i32 noundef %30) #2
%32 = getelementptr inbounds %struct.audit_pipe_entry, ptr %20, i64 0, i32 1
store ptr %31, ptr %32, align 8, !tbaa !15
%33 = icmp eq ptr %31, null
br i1 %33, label %34, label %42
34: ; preds = %28
%35 = load i32, ptr @M_AUDIT_PIPE_ENTRY, align 4, !tbaa !14
%36 = tail call i32 @free(ptr noundef nonnull %20, i32 noundef %35) #2
%37 = getelementptr inbounds %struct.audit_pipe, ptr %0, i64 0, i32 9
%38 = load i32, ptr %37, align 4, !tbaa !13
%39 = add nsw i32 %38, 1
store i32 %39, ptr %37, align 4, !tbaa !13
%40 = load i32, ptr @audit_pipe_drops, align 4, !tbaa !14
%41 = add nsw i32 %40, 1
store i32 %41, ptr @audit_pipe_drops, align 4, !tbaa !14
br label %72
42: ; preds = %28
%43 = tail call i32 @bcopy(ptr noundef %1, ptr noundef nonnull %31, i32 noundef %2) #2
store i32 %2, ptr %20, align 8, !tbaa !18
%44 = getelementptr inbounds %struct.audit_pipe, ptr %0, i64 0, i32 8
%45 = load i32, ptr @ape_queue, align 4, !tbaa !14
%46 = tail call i32 @TAILQ_INSERT_TAIL(ptr noundef nonnull %44, ptr noundef nonnull %20, i32 noundef %45) #2
%47 = getelementptr inbounds %struct.audit_pipe, ptr %0, i64 0, i32 7
%48 = load i32, ptr %47, align 4, !tbaa !19
%49 = add nsw i32 %48, 1
store i32 %49, ptr %47, align 4, !tbaa !19
%50 = load i64, ptr %0, align 8, !tbaa !5
%51 = add nsw i64 %50, 1
store i64 %51, ptr %0, align 8, !tbaa !5
%52 = load i32, ptr %20, align 8, !tbaa !18
%53 = getelementptr inbounds %struct.audit_pipe, ptr %0, i64 0, i32 2
%54 = load i32, ptr %53, align 8, !tbaa !20
%55 = add nsw i32 %54, %52
store i32 %55, ptr %53, align 8, !tbaa !20
%56 = getelementptr inbounds %struct.audit_pipe, ptr %0, i64 0, i32 6
%57 = load i32, ptr @PSOCK, align 4, !tbaa !14
%58 = tail call i32 @selwakeuppri(ptr noundef nonnull %56, i32 noundef %57) #2
%59 = tail call i32 @KNOTE_LOCKED(ptr noundef nonnull %56, i32 noundef 0) #2
%60 = getelementptr inbounds %struct.audit_pipe, ptr %0, i64 0, i32 3
%61 = load i32, ptr %60, align 4, !tbaa !21
%62 = load i32, ptr @AUDIT_PIPE_ASYNC, align 4, !tbaa !14
%63 = and i32 %62, %61
%64 = icmp eq i32 %63, 0
br i1 %64, label %69, label %65
65: ; preds = %42
%66 = getelementptr inbounds %struct.audit_pipe, ptr %0, i64 0, i32 5
%67 = load i32, ptr @SIGIO, align 4, !tbaa !14
%68 = tail call i32 @pgsigio(ptr noundef nonnull %66, i32 noundef %67, i32 noundef 0) #2
br label %69
69: ; preds = %65, %42
%70 = getelementptr inbounds %struct.audit_pipe, ptr %0, i64 0, i32 4
%71 = tail call i32 @cv_broadcast(ptr noundef nonnull %70) #2
br label %72
72: ; preds = %69, %34, %22, %9
ret void
}
declare i32 @AUDIT_PIPE_LOCK_ASSERT(ptr noundef) local_unnamed_addr #1
declare ptr @malloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bcopy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @TAILQ_INSERT_TAIL(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @selwakeuppri(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @KNOTE_LOCKED(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pgsigio(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cv_broadcast(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"audit_pipe", !7, i64 0, !7, i64 8, !10, i64 16, !10, i64 20, !10, i64 24, !10, i64 28, !11, i64 32, !10, i64 36, !10, i64 40, !10, i64 44}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"TYPE_2__", !10, i64 0}
!12 = !{!6, !7, i64 8}
!13 = !{!6, !10, i64 44}
!14 = !{!10, !10, i64 0}
!15 = !{!16, !17, i64 8}
!16 = !{!"audit_pipe_entry", !10, i64 0, !17, i64 8}
!17 = !{!"any pointer", !8, i64 0}
!18 = !{!16, !10, i64 0}
!19 = !{!6, !10, i64 36}
!20 = !{!6, !10, i64 16}
!21 = !{!6, !10, i64 20}
| ; ModuleID = 'AnghaBench/freebsd/sys/security/audit/extr_audit_pipe.c_audit_pipe_append.c'
source_filename = "AnghaBench/freebsd/sys/security/audit/extr_audit_pipe.c_audit_pipe_append.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@audit_pipe_drops = common local_unnamed_addr global i32 0, align 4
@M_AUDIT_PIPE_ENTRY = common local_unnamed_addr global i32 0, align 4
@M_NOWAIT = common local_unnamed_addr global i32 0, align 4
@M_ZERO = common local_unnamed_addr global i32 0, align 4
@ape_queue = common local_unnamed_addr global i32 0, align 4
@PSOCK = common local_unnamed_addr global i32 0, align 4
@AUDIT_PIPE_ASYNC = common local_unnamed_addr global i32 0, align 4
@SIGIO = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @audit_pipe_append], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @audit_pipe_append(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = tail call i32 @AUDIT_PIPE_LOCK_ASSERT(ptr noundef %0) #2
%5 = load i64, ptr %0, align 8, !tbaa !6
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load i64, ptr %6, align 8, !tbaa !13
%8 = icmp slt i64 %5, %7
br i1 %8, label %15, label %9
9: ; preds = %3
%10 = getelementptr inbounds i8, ptr %0, i64 44
%11 = load i32, ptr %10, align 4, !tbaa !14
%12 = add nsw i32 %11, 1
store i32 %12, ptr %10, align 4, !tbaa !14
%13 = load i32, ptr @audit_pipe_drops, align 4, !tbaa !15
%14 = add nsw i32 %13, 1
store i32 %14, ptr @audit_pipe_drops, align 4, !tbaa !15
br label %72
15: ; preds = %3
%16 = load i32, ptr @M_AUDIT_PIPE_ENTRY, align 4, !tbaa !15
%17 = load i32, ptr @M_NOWAIT, align 4, !tbaa !15
%18 = load i32, ptr @M_ZERO, align 4, !tbaa !15
%19 = or i32 %18, %17
%20 = tail call ptr @malloc(i32 noundef 16, i32 noundef %16, i32 noundef %19) #2
%21 = icmp eq ptr %20, null
br i1 %21, label %22, label %28
22: ; preds = %15
%23 = getelementptr inbounds i8, ptr %0, i64 44
%24 = load i32, ptr %23, align 4, !tbaa !14
%25 = add nsw i32 %24, 1
store i32 %25, ptr %23, align 4, !tbaa !14
%26 = load i32, ptr @audit_pipe_drops, align 4, !tbaa !15
%27 = add nsw i32 %26, 1
store i32 %27, ptr @audit_pipe_drops, align 4, !tbaa !15
br label %72
28: ; preds = %15
%29 = load i32, ptr @M_AUDIT_PIPE_ENTRY, align 4, !tbaa !15
%30 = load i32, ptr @M_NOWAIT, align 4, !tbaa !15
%31 = tail call ptr @malloc(i32 noundef %2, i32 noundef %29, i32 noundef %30) #2
%32 = getelementptr inbounds i8, ptr %20, i64 8
store ptr %31, ptr %32, align 8, !tbaa !16
%33 = icmp eq ptr %31, null
br i1 %33, label %34, label %42
34: ; preds = %28
%35 = load i32, ptr @M_AUDIT_PIPE_ENTRY, align 4, !tbaa !15
%36 = tail call i32 @free(ptr noundef nonnull %20, i32 noundef %35) #2
%37 = getelementptr inbounds i8, ptr %0, i64 44
%38 = load i32, ptr %37, align 4, !tbaa !14
%39 = add nsw i32 %38, 1
store i32 %39, ptr %37, align 4, !tbaa !14
%40 = load i32, ptr @audit_pipe_drops, align 4, !tbaa !15
%41 = add nsw i32 %40, 1
store i32 %41, ptr @audit_pipe_drops, align 4, !tbaa !15
br label %72
42: ; preds = %28
%43 = tail call i32 @bcopy(ptr noundef %1, ptr noundef nonnull %31, i32 noundef %2) #2
store i32 %2, ptr %20, align 8, !tbaa !19
%44 = getelementptr inbounds i8, ptr %0, i64 40
%45 = load i32, ptr @ape_queue, align 4, !tbaa !15
%46 = tail call i32 @TAILQ_INSERT_TAIL(ptr noundef nonnull %44, ptr noundef nonnull %20, i32 noundef %45) #2
%47 = getelementptr inbounds i8, ptr %0, i64 36
%48 = load i32, ptr %47, align 4, !tbaa !20
%49 = add nsw i32 %48, 1
store i32 %49, ptr %47, align 4, !tbaa !20
%50 = load i64, ptr %0, align 8, !tbaa !6
%51 = add nsw i64 %50, 1
store i64 %51, ptr %0, align 8, !tbaa !6
%52 = load i32, ptr %20, align 8, !tbaa !19
%53 = getelementptr inbounds i8, ptr %0, i64 16
%54 = load i32, ptr %53, align 8, !tbaa !21
%55 = add nsw i32 %54, %52
store i32 %55, ptr %53, align 8, !tbaa !21
%56 = getelementptr inbounds i8, ptr %0, i64 32
%57 = load i32, ptr @PSOCK, align 4, !tbaa !15
%58 = tail call i32 @selwakeuppri(ptr noundef nonnull %56, i32 noundef %57) #2
%59 = tail call i32 @KNOTE_LOCKED(ptr noundef nonnull %56, i32 noundef 0) #2
%60 = getelementptr inbounds i8, ptr %0, i64 20
%61 = load i32, ptr %60, align 4, !tbaa !22
%62 = load i32, ptr @AUDIT_PIPE_ASYNC, align 4, !tbaa !15
%63 = and i32 %62, %61
%64 = icmp eq i32 %63, 0
br i1 %64, label %69, label %65
65: ; preds = %42
%66 = getelementptr inbounds i8, ptr %0, i64 28
%67 = load i32, ptr @SIGIO, align 4, !tbaa !15
%68 = tail call i32 @pgsigio(ptr noundef nonnull %66, i32 noundef %67, i32 noundef 0) #2
br label %69
69: ; preds = %65, %42
%70 = getelementptr inbounds i8, ptr %0, i64 24
%71 = tail call i32 @cv_broadcast(ptr noundef nonnull %70) #2
br label %72
72: ; preds = %69, %34, %22, %9
ret void
}
declare i32 @AUDIT_PIPE_LOCK_ASSERT(ptr noundef) local_unnamed_addr #1
declare ptr @malloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bcopy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @TAILQ_INSERT_TAIL(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @selwakeuppri(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @KNOTE_LOCKED(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pgsigio(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cv_broadcast(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"audit_pipe", !8, i64 0, !8, i64 8, !11, i64 16, !11, i64 20, !11, i64 24, !11, i64 28, !12, i64 32, !11, i64 36, !11, i64 40, !11, i64 44}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"TYPE_2__", !11, i64 0}
!13 = !{!7, !8, i64 8}
!14 = !{!7, !11, i64 44}
!15 = !{!11, !11, i64 0}
!16 = !{!17, !18, i64 8}
!17 = !{!"audit_pipe_entry", !11, i64 0, !18, i64 8}
!18 = !{!"any pointer", !9, i64 0}
!19 = !{!17, !11, i64 0}
!20 = !{!7, !11, i64 36}
!21 = !{!7, !11, i64 16}
!22 = !{!7, !11, i64 20}
| freebsd_sys_security_audit_extr_audit_pipe.c_audit_pipe_append |
; ModuleID = 'AnghaBench/linux/drivers/staging/comedi/drivers/extr_das800.c_das800_di_insn_bits.c'
source_filename = "AnghaBench/linux/drivers/staging/comedi/drivers/extr_das800.c_das800_di_insn_bits.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DAS800_STATUS = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @das800_di_insn_bits], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @das800_di_insn_bits(ptr nocapture noundef readonly %0, ptr nocapture readnone %1, ptr nocapture noundef readonly %2, ptr nocapture noundef writeonly %3) #0 {
%5 = load i64, ptr %0, align 8, !tbaa !5
%6 = load i64, ptr @DAS800_STATUS, align 8, !tbaa !10
%7 = add nsw i64 %6, %5
%8 = tail call i32 @inb(i64 noundef %7) #2
%9 = lshr i32 %8, 4
%10 = and i32 %9, 7
%11 = getelementptr inbounds i32, ptr %3, i64 1
store i32 %10, ptr %11, align 4, !tbaa !11
%12 = load i32, ptr %2, align 4, !tbaa !13
ret i32 %12
}
declare i32 @inb(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"comedi_device", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"comedi_insn", !12, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/staging/comedi/drivers/extr_das800.c_das800_di_insn_bits.c'
source_filename = "AnghaBench/linux/drivers/staging/comedi/drivers/extr_das800.c_das800_di_insn_bits.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DAS800_STATUS = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @das800_di_insn_bits], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @das800_di_insn_bits(ptr nocapture noundef readonly %0, ptr nocapture readnone %1, ptr nocapture noundef readonly %2, ptr nocapture noundef writeonly %3) #0 {
%5 = load i64, ptr %0, align 8, !tbaa !6
%6 = load i64, ptr @DAS800_STATUS, align 8, !tbaa !11
%7 = add nsw i64 %6, %5
%8 = tail call i32 @inb(i64 noundef %7) #2
%9 = lshr i32 %8, 4
%10 = and i32 %9, 7
%11 = getelementptr inbounds i8, ptr %3, i64 4
store i32 %10, ptr %11, align 4, !tbaa !12
%12 = load i32, ptr %2, align 4, !tbaa !14
ret i32 %12
}
declare i32 @inb(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"comedi_device", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"comedi_insn", !13, i64 0}
| linux_drivers_staging_comedi_drivers_extr_das800.c_das800_di_insn_bits |
; ModuleID = 'AnghaBench/linux/drivers/media/platform/vivid/extr_vivid-vid-cap.c_vidioc_enum_input.c'
source_filename = "AnghaBench/linux/drivers/media/platform/vivid/extr_vivid-vid-cap.c_vidioc_enum_input.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.v4l2_input = type { i64, i32, i32, ptr, i32, ptr, i32 }
%struct.vivid_dev = type { i64, ptr, ptr, ptr, i64, ptr, i32, i64, i64, i32, i32 }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@V4L2_INPUT_TYPE_CAMERA = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [10 x i8] c"Webcam %u\00", align 1
@.str.1 = private unnamed_addr constant [6 x i8] c"TV %u\00", align 1
@V4L2_INPUT_TYPE_TUNER = dso_local local_unnamed_addr global i32 0, align 4
@V4L2_STD_ALL = dso_local local_unnamed_addr global ptr null, align 8
@vivid_audio_inputs = dso_local local_unnamed_addr global i32 0, align 4
@V4L2_IN_CAP_STD = dso_local local_unnamed_addr global ptr null, align 8
@.str.2 = private unnamed_addr constant [11 x i8] c"S-Video %u\00", align 1
@.str.3 = private unnamed_addr constant [8 x i8] c"HDMI %u\00", align 1
@V4L2_IN_CAP_DV_TIMINGS = dso_local local_unnamed_addr global ptr null, align 8
@NO_SIGNAL = dso_local local_unnamed_addr global i64 0, align 8
@V4L2_IN_ST_NO_SIGNAL = dso_local local_unnamed_addr global i32 0, align 4
@NO_LOCK = dso_local local_unnamed_addr global i64 0, align 8
@OUT_OF_RANGE = dso_local local_unnamed_addr global i64 0, align 8
@V4L2_IN_ST_NO_H_LOCK = dso_local local_unnamed_addr global i32 0, align 4
@V4L2_IN_ST_HFLIP = dso_local local_unnamed_addr global i32 0, align 4
@V4L2_IN_ST_VFLIP = dso_local local_unnamed_addr global i32 0, align 4
@V4L2_IN_ST_COLOR_KILL = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @vidioc_enum_input(ptr noundef %0, ptr nocapture noundef readnone %1, ptr nocapture noundef %2) local_unnamed_addr #0 {
%4 = tail call ptr @video_drvdata(ptr noundef %0) #2
%5 = load i64, ptr %2, align 8, !tbaa !5
%6 = load i64, ptr %4, align 8, !tbaa !12
%7 = icmp ult i64 %5, %6
br i1 %7, label %11, label %8
8: ; preds = %3
%9 = load i32, ptr @EINVAL, align 4, !tbaa !14
%10 = sub nsw i32 0, %9
br label %173
11: ; preds = %3
%12 = load i32, ptr @V4L2_INPUT_TYPE_CAMERA, align 4, !tbaa !14
%13 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 6
store i32 %12, ptr %13, align 8, !tbaa !15
%14 = getelementptr inbounds %struct.vivid_dev, ptr %4, i64 0, i32 1
%15 = load ptr, ptr %14, align 8, !tbaa !16
%16 = getelementptr inbounds i32, ptr %15, i64 %5
%17 = load i32, ptr %16, align 4, !tbaa !14
switch i32 %17, label %110 [
i32 128, label %18
i32 129, label %27
i32 132, label %50
i32 133, label %72
]
18: ; preds = %11
%19 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 4
%20 = load i32, ptr %19, align 8, !tbaa !17
%21 = getelementptr inbounds %struct.vivid_dev, ptr %4, i64 0, i32 2
%22 = load ptr, ptr %21, align 8, !tbaa !18
%23 = getelementptr inbounds i32, ptr %22, i64 %5
%24 = load i32, ptr %23, align 4, !tbaa !14
%25 = tail call i32 @snprintf(i32 noundef %20, i32 noundef 4, ptr noundef nonnull @.str, i32 noundef %24) #2
%26 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 3
store ptr null, ptr %26, align 8, !tbaa !19
br label %110
27: ; preds = %11
%28 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 4
%29 = load i32, ptr %28, align 8, !tbaa !17
%30 = getelementptr inbounds %struct.vivid_dev, ptr %4, i64 0, i32 2
%31 = load ptr, ptr %30, align 8, !tbaa !18
%32 = getelementptr inbounds i32, ptr %31, i64 %5
%33 = load i32, ptr %32, align 4, !tbaa !14
%34 = tail call i32 @snprintf(i32 noundef %29, i32 noundef 4, ptr noundef nonnull @.str.1, i32 noundef %33) #2
%35 = load i32, ptr @V4L2_INPUT_TYPE_TUNER, align 4, !tbaa !14
store i32 %35, ptr %13, align 8, !tbaa !15
%36 = load ptr, ptr @V4L2_STD_ALL, align 8, !tbaa !20
%37 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 5
store ptr %36, ptr %37, align 8, !tbaa !21
%38 = getelementptr inbounds %struct.vivid_dev, ptr %4, i64 0, i32 10
%39 = load i32, ptr %38, align 4, !tbaa !22
%40 = icmp eq i32 %39, 0
br i1 %40, label %47, label %41
41: ; preds = %27
%42 = load i32, ptr @vivid_audio_inputs, align 4, !tbaa !14
%43 = tail call i32 @ARRAY_SIZE(i32 noundef %42) #2
%44 = shl nsw i32 -1, %43
%45 = xor i32 %44, -1
%46 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 1
store i32 %45, ptr %46, align 8, !tbaa !23
br label %47
47: ; preds = %41, %27
%48 = load ptr, ptr @V4L2_IN_CAP_STD, align 8, !tbaa !20
%49 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 3
store ptr %48, ptr %49, align 8, !tbaa !19
br label %110
50: ; preds = %11
%51 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 4
%52 = load i32, ptr %51, align 8, !tbaa !17
%53 = getelementptr inbounds %struct.vivid_dev, ptr %4, i64 0, i32 2
%54 = load ptr, ptr %53, align 8, !tbaa !18
%55 = getelementptr inbounds i32, ptr %54, i64 %5
%56 = load i32, ptr %55, align 4, !tbaa !14
%57 = tail call i32 @snprintf(i32 noundef %52, i32 noundef 4, ptr noundef nonnull @.str.2, i32 noundef %56) #2
%58 = load ptr, ptr @V4L2_STD_ALL, align 8, !tbaa !20
%59 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 5
store ptr %58, ptr %59, align 8, !tbaa !21
%60 = getelementptr inbounds %struct.vivid_dev, ptr %4, i64 0, i32 10
%61 = load i32, ptr %60, align 4, !tbaa !22
%62 = icmp eq i32 %61, 0
br i1 %62, label %69, label %63
63: ; preds = %50
%64 = load i32, ptr @vivid_audio_inputs, align 4, !tbaa !14
%65 = tail call i32 @ARRAY_SIZE(i32 noundef %64) #2
%66 = shl nsw i32 -1, %65
%67 = xor i32 %66, -1
%68 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 1
store i32 %67, ptr %68, align 8, !tbaa !23
br label %69
69: ; preds = %63, %50
%70 = load ptr, ptr @V4L2_IN_CAP_STD, align 8, !tbaa !20
%71 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 3
store ptr %70, ptr %71, align 8, !tbaa !19
br label %110
72: ; preds = %11
%73 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 4
%74 = load i32, ptr %73, align 8, !tbaa !17
%75 = getelementptr inbounds %struct.vivid_dev, ptr %4, i64 0, i32 2
%76 = load ptr, ptr %75, align 8, !tbaa !18
%77 = getelementptr inbounds i32, ptr %76, i64 %5
%78 = load i32, ptr %77, align 4, !tbaa !14
%79 = tail call i32 @snprintf(i32 noundef %74, i32 noundef 4, ptr noundef nonnull @.str.3, i32 noundef %78) #2
%80 = load ptr, ptr @V4L2_IN_CAP_DV_TIMINGS, align 8, !tbaa !20
%81 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 3
store ptr %80, ptr %81, align 8, !tbaa !19
%82 = getelementptr inbounds %struct.vivid_dev, ptr %4, i64 0, i32 9
%83 = load i32, ptr %82, align 8, !tbaa !24
%84 = icmp eq i32 %83, 0
br i1 %84, label %94, label %85
85: ; preds = %72
%86 = getelementptr inbounds %struct.vivid_dev, ptr %4, i64 0, i32 3
%87 = load ptr, ptr %86, align 8, !tbaa !25
%88 = getelementptr inbounds %struct.vivid_dev, ptr %4, i64 0, i32 4
%89 = load i64, ptr %88, align 8, !tbaa !26
%90 = getelementptr inbounds i64, ptr %87, i64 %89
%91 = load i64, ptr %90, align 8, !tbaa !27
%92 = load i64, ptr @NO_SIGNAL, align 8, !tbaa !27
%93 = icmp eq i64 %91, %92
br i1 %93, label %94, label %99
94: ; preds = %85, %72
%95 = load i32, ptr @V4L2_IN_ST_NO_SIGNAL, align 4, !tbaa !14
%96 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 2
%97 = load i32, ptr %96, align 4, !tbaa !28
%98 = or i32 %97, %95
store i32 %98, ptr %96, align 4, !tbaa !28
br label %110
99: ; preds = %85
%100 = load i64, ptr @NO_LOCK, align 8, !tbaa !27
%101 = icmp eq i64 %91, %100
%102 = load i64, ptr @OUT_OF_RANGE, align 8
%103 = icmp eq i64 %91, %102
%104 = select i1 %101, i1 true, i1 %103
br i1 %104, label %105, label %110
105: ; preds = %99
%106 = load i32, ptr @V4L2_IN_ST_NO_H_LOCK, align 4, !tbaa !14
%107 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 2
%108 = load i32, ptr %107, align 4, !tbaa !28
%109 = or i32 %108, %106
store i32 %109, ptr %107, align 4, !tbaa !28
br label %110
110: ; preds = %99, %94, %105, %11, %69, %47, %18
%111 = getelementptr inbounds %struct.vivid_dev, ptr %4, i64 0, i32 8
%112 = load i64, ptr %111, align 8, !tbaa !29
%113 = icmp eq i64 %112, 0
br i1 %113, label %119, label %114
114: ; preds = %110
%115 = load i32, ptr @V4L2_IN_ST_HFLIP, align 4, !tbaa !14
%116 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 2
%117 = load i32, ptr %116, align 4, !tbaa !28
%118 = or i32 %117, %115
store i32 %118, ptr %116, align 4, !tbaa !28
br label %119
119: ; preds = %114, %110
%120 = getelementptr inbounds %struct.vivid_dev, ptr %4, i64 0, i32 7
%121 = load i64, ptr %120, align 8, !tbaa !30
%122 = icmp eq i64 %121, 0
br i1 %122, label %128, label %123
123: ; preds = %119
%124 = load i32, ptr @V4L2_IN_ST_VFLIP, align 4, !tbaa !14
%125 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 2
%126 = load i32, ptr %125, align 4, !tbaa !28
%127 = or i32 %126, %124
store i32 %127, ptr %125, align 4, !tbaa !28
br label %128
128: ; preds = %123, %119
%129 = getelementptr inbounds %struct.vivid_dev, ptr %4, i64 0, i32 4
%130 = load i64, ptr %129, align 8, !tbaa !26
%131 = load i64, ptr %2, align 8, !tbaa !5
%132 = icmp eq i64 %130, %131
br i1 %132, label %133, label %173
133: ; preds = %128
%134 = tail call i64 @vivid_is_sdtv_cap(ptr noundef nonnull %4) #2
%135 = icmp eq i64 %134, 0
br i1 %135, label %173, label %136
136: ; preds = %133
%137 = getelementptr inbounds %struct.vivid_dev, ptr %4, i64 0, i32 5
%138 = load ptr, ptr %137, align 8, !tbaa !31
%139 = load i64, ptr %129, align 8, !tbaa !26
%140 = getelementptr inbounds i64, ptr %138, i64 %139
%141 = load i64, ptr %140, align 8, !tbaa !27
%142 = load i64, ptr @NO_SIGNAL, align 8, !tbaa !27
%143 = icmp eq i64 %141, %142
br i1 %143, label %144, label %149
144: ; preds = %136
%145 = load i32, ptr @V4L2_IN_ST_NO_SIGNAL, align 4, !tbaa !14
%146 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 2
%147 = load i32, ptr %146, align 4, !tbaa !28
%148 = or i32 %147, %145
store i32 %148, ptr %146, align 4, !tbaa !28
br label %173
149: ; preds = %136
%150 = load i64, ptr @NO_LOCK, align 8, !tbaa !27
%151 = icmp eq i64 %141, %150
br i1 %151, label %152, label %157
152: ; preds = %149
%153 = load i32, ptr @V4L2_IN_ST_NO_H_LOCK, align 4, !tbaa !14
%154 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 2
%155 = load i32, ptr %154, align 4, !tbaa !28
%156 = or i32 %155, %153
store i32 %156, ptr %154, align 4, !tbaa !28
br label %173
157: ; preds = %149
%158 = tail call i64 @vivid_is_tv_cap(ptr noundef nonnull %4) #2
%159 = icmp eq i64 %158, 0
br i1 %159, label %173, label %160
160: ; preds = %157
%161 = getelementptr inbounds %struct.vivid_dev, ptr %4, i64 0, i32 6
%162 = tail call i32 @tpg_g_quality(ptr noundef nonnull %161) #2
switch i32 %162, label %173 [
i32 131, label %163
i32 130, label %168
]
163: ; preds = %160
%164 = load i32, ptr @V4L2_IN_ST_COLOR_KILL, align 4, !tbaa !14
%165 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 2
%166 = load i32, ptr %165, align 4, !tbaa !28
%167 = or i32 %166, %164
store i32 %167, ptr %165, align 4, !tbaa !28
br label %173
168: ; preds = %160
%169 = load i32, ptr @V4L2_IN_ST_NO_H_LOCK, align 4, !tbaa !14
%170 = getelementptr inbounds %struct.v4l2_input, ptr %2, i64 0, i32 2
%171 = load i32, ptr %170, align 4, !tbaa !28
%172 = or i32 %171, %169
store i32 %172, ptr %170, align 4, !tbaa !28
br label %173
173: ; preds = %128, %133, %152, %163, %168, %160, %157, %144, %8
%174 = phi i32 [ %10, %8 ], [ 0, %144 ], [ 0, %157 ], [ 0, %160 ], [ 0, %168 ], [ 0, %163 ], [ 0, %152 ], [ 0, %133 ], [ 0, %128 ]
ret i32 %174
}
declare ptr @video_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @snprintf(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(i32 noundef) local_unnamed_addr #1
declare i64 @vivid_is_sdtv_cap(ptr noundef) local_unnamed_addr #1
declare i64 @vivid_is_tv_cap(ptr noundef) local_unnamed_addr #1
declare i32 @tpg_g_quality(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"v4l2_input", !7, i64 0, !10, i64 8, !10, i64 12, !11, i64 16, !10, i64 24, !11, i64 32, !10, i64 40}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"vivid_dev", !7, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !7, i64 32, !11, i64 40, !10, i64 48, !7, i64 56, !7, i64 64, !10, i64 72, !10, i64 76}
!14 = !{!10, !10, i64 0}
!15 = !{!6, !10, i64 40}
!16 = !{!13, !11, i64 8}
!17 = !{!6, !10, i64 24}
!18 = !{!13, !11, i64 16}
!19 = !{!6, !11, i64 16}
!20 = !{!11, !11, i64 0}
!21 = !{!6, !11, i64 32}
!22 = !{!13, !10, i64 76}
!23 = !{!6, !10, i64 8}
!24 = !{!13, !10, i64 72}
!25 = !{!13, !11, i64 24}
!26 = !{!13, !7, i64 32}
!27 = !{!7, !7, i64 0}
!28 = !{!6, !10, i64 12}
!29 = !{!13, !7, i64 64}
!30 = !{!13, !7, i64 56}
!31 = !{!13, !11, i64 40}
| ; ModuleID = 'AnghaBench/linux/drivers/media/platform/vivid/extr_vivid-vid-cap.c_vidioc_enum_input.c'
source_filename = "AnghaBench/linux/drivers/media/platform/vivid/extr_vivid-vid-cap.c_vidioc_enum_input.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@V4L2_INPUT_TYPE_CAMERA = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [10 x i8] c"Webcam %u\00", align 1
@.str.1 = private unnamed_addr constant [6 x i8] c"TV %u\00", align 1
@V4L2_INPUT_TYPE_TUNER = common local_unnamed_addr global i32 0, align 4
@V4L2_STD_ALL = common local_unnamed_addr global ptr null, align 8
@vivid_audio_inputs = common local_unnamed_addr global i32 0, align 4
@V4L2_IN_CAP_STD = common local_unnamed_addr global ptr null, align 8
@.str.2 = private unnamed_addr constant [11 x i8] c"S-Video %u\00", align 1
@.str.3 = private unnamed_addr constant [8 x i8] c"HDMI %u\00", align 1
@V4L2_IN_CAP_DV_TIMINGS = common local_unnamed_addr global ptr null, align 8
@NO_SIGNAL = common local_unnamed_addr global i64 0, align 8
@V4L2_IN_ST_NO_SIGNAL = common local_unnamed_addr global i32 0, align 4
@NO_LOCK = common local_unnamed_addr global i64 0, align 8
@OUT_OF_RANGE = common local_unnamed_addr global i64 0, align 8
@V4L2_IN_ST_NO_H_LOCK = common local_unnamed_addr global i32 0, align 4
@V4L2_IN_ST_HFLIP = common local_unnamed_addr global i32 0, align 4
@V4L2_IN_ST_VFLIP = common local_unnamed_addr global i32 0, align 4
@V4L2_IN_ST_COLOR_KILL = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @vidioc_enum_input(ptr noundef %0, ptr nocapture noundef readnone %1, ptr nocapture noundef %2) local_unnamed_addr #0 {
%4 = tail call ptr @video_drvdata(ptr noundef %0) #2
%5 = load i64, ptr %2, align 8, !tbaa !6
%6 = load i64, ptr %4, align 8, !tbaa !13
%7 = icmp ult i64 %5, %6
br i1 %7, label %11, label %8
8: ; preds = %3
%9 = load i32, ptr @EINVAL, align 4, !tbaa !15
%10 = sub nsw i32 0, %9
br label %173
11: ; preds = %3
%12 = load i32, ptr @V4L2_INPUT_TYPE_CAMERA, align 4, !tbaa !15
%13 = getelementptr inbounds i8, ptr %2, i64 40
store i32 %12, ptr %13, align 8, !tbaa !16
%14 = getelementptr inbounds i8, ptr %4, i64 8
%15 = load ptr, ptr %14, align 8, !tbaa !17
%16 = getelementptr inbounds i32, ptr %15, i64 %5
%17 = load i32, ptr %16, align 4, !tbaa !15
switch i32 %17, label %110 [
i32 128, label %18
i32 129, label %27
i32 132, label %50
i32 133, label %72
]
18: ; preds = %11
%19 = getelementptr inbounds i8, ptr %2, i64 24
%20 = load i32, ptr %19, align 8, !tbaa !18
%21 = getelementptr inbounds i8, ptr %4, i64 16
%22 = load ptr, ptr %21, align 8, !tbaa !19
%23 = getelementptr inbounds i32, ptr %22, i64 %5
%24 = load i32, ptr %23, align 4, !tbaa !15
%25 = tail call i32 @snprintf(i32 noundef %20, i32 noundef 4, ptr noundef nonnull @.str, i32 noundef %24) #2
%26 = getelementptr inbounds i8, ptr %2, i64 16
store ptr null, ptr %26, align 8, !tbaa !20
br label %110
27: ; preds = %11
%28 = getelementptr inbounds i8, ptr %2, i64 24
%29 = load i32, ptr %28, align 8, !tbaa !18
%30 = getelementptr inbounds i8, ptr %4, i64 16
%31 = load ptr, ptr %30, align 8, !tbaa !19
%32 = getelementptr inbounds i32, ptr %31, i64 %5
%33 = load i32, ptr %32, align 4, !tbaa !15
%34 = tail call i32 @snprintf(i32 noundef %29, i32 noundef 4, ptr noundef nonnull @.str.1, i32 noundef %33) #2
%35 = load i32, ptr @V4L2_INPUT_TYPE_TUNER, align 4, !tbaa !15
store i32 %35, ptr %13, align 8, !tbaa !16
%36 = load ptr, ptr @V4L2_STD_ALL, align 8, !tbaa !21
%37 = getelementptr inbounds i8, ptr %2, i64 32
store ptr %36, ptr %37, align 8, !tbaa !22
%38 = getelementptr inbounds i8, ptr %4, i64 76
%39 = load i32, ptr %38, align 4, !tbaa !23
%40 = icmp eq i32 %39, 0
br i1 %40, label %47, label %41
41: ; preds = %27
%42 = load i32, ptr @vivid_audio_inputs, align 4, !tbaa !15
%43 = tail call i32 @ARRAY_SIZE(i32 noundef %42) #2
%44 = shl nsw i32 -1, %43
%45 = xor i32 %44, -1
%46 = getelementptr inbounds i8, ptr %2, i64 8
store i32 %45, ptr %46, align 8, !tbaa !24
br label %47
47: ; preds = %41, %27
%48 = load ptr, ptr @V4L2_IN_CAP_STD, align 8, !tbaa !21
%49 = getelementptr inbounds i8, ptr %2, i64 16
store ptr %48, ptr %49, align 8, !tbaa !20
br label %110
50: ; preds = %11
%51 = getelementptr inbounds i8, ptr %2, i64 24
%52 = load i32, ptr %51, align 8, !tbaa !18
%53 = getelementptr inbounds i8, ptr %4, i64 16
%54 = load ptr, ptr %53, align 8, !tbaa !19
%55 = getelementptr inbounds i32, ptr %54, i64 %5
%56 = load i32, ptr %55, align 4, !tbaa !15
%57 = tail call i32 @snprintf(i32 noundef %52, i32 noundef 4, ptr noundef nonnull @.str.2, i32 noundef %56) #2
%58 = load ptr, ptr @V4L2_STD_ALL, align 8, !tbaa !21
%59 = getelementptr inbounds i8, ptr %2, i64 32
store ptr %58, ptr %59, align 8, !tbaa !22
%60 = getelementptr inbounds i8, ptr %4, i64 76
%61 = load i32, ptr %60, align 4, !tbaa !23
%62 = icmp eq i32 %61, 0
br i1 %62, label %69, label %63
63: ; preds = %50
%64 = load i32, ptr @vivid_audio_inputs, align 4, !tbaa !15
%65 = tail call i32 @ARRAY_SIZE(i32 noundef %64) #2
%66 = shl nsw i32 -1, %65
%67 = xor i32 %66, -1
%68 = getelementptr inbounds i8, ptr %2, i64 8
store i32 %67, ptr %68, align 8, !tbaa !24
br label %69
69: ; preds = %63, %50
%70 = load ptr, ptr @V4L2_IN_CAP_STD, align 8, !tbaa !21
%71 = getelementptr inbounds i8, ptr %2, i64 16
store ptr %70, ptr %71, align 8, !tbaa !20
br label %110
72: ; preds = %11
%73 = getelementptr inbounds i8, ptr %2, i64 24
%74 = load i32, ptr %73, align 8, !tbaa !18
%75 = getelementptr inbounds i8, ptr %4, i64 16
%76 = load ptr, ptr %75, align 8, !tbaa !19
%77 = getelementptr inbounds i32, ptr %76, i64 %5
%78 = load i32, ptr %77, align 4, !tbaa !15
%79 = tail call i32 @snprintf(i32 noundef %74, i32 noundef 4, ptr noundef nonnull @.str.3, i32 noundef %78) #2
%80 = load ptr, ptr @V4L2_IN_CAP_DV_TIMINGS, align 8, !tbaa !21
%81 = getelementptr inbounds i8, ptr %2, i64 16
store ptr %80, ptr %81, align 8, !tbaa !20
%82 = getelementptr inbounds i8, ptr %4, i64 72
%83 = load i32, ptr %82, align 8, !tbaa !25
%84 = icmp eq i32 %83, 0
br i1 %84, label %94, label %85
85: ; preds = %72
%86 = getelementptr inbounds i8, ptr %4, i64 24
%87 = load ptr, ptr %86, align 8, !tbaa !26
%88 = getelementptr inbounds i8, ptr %4, i64 32
%89 = load i64, ptr %88, align 8, !tbaa !27
%90 = getelementptr inbounds i64, ptr %87, i64 %89
%91 = load i64, ptr %90, align 8, !tbaa !28
%92 = load i64, ptr @NO_SIGNAL, align 8, !tbaa !28
%93 = icmp eq i64 %91, %92
br i1 %93, label %94, label %99
94: ; preds = %85, %72
%95 = load i32, ptr @V4L2_IN_ST_NO_SIGNAL, align 4, !tbaa !15
%96 = getelementptr inbounds i8, ptr %2, i64 12
%97 = load i32, ptr %96, align 4, !tbaa !29
%98 = or i32 %97, %95
store i32 %98, ptr %96, align 4, !tbaa !29
br label %110
99: ; preds = %85
%100 = load i64, ptr @NO_LOCK, align 8, !tbaa !28
%101 = icmp eq i64 %91, %100
%102 = load i64, ptr @OUT_OF_RANGE, align 8
%103 = icmp eq i64 %91, %102
%104 = select i1 %101, i1 true, i1 %103
br i1 %104, label %105, label %110
105: ; preds = %99
%106 = load i32, ptr @V4L2_IN_ST_NO_H_LOCK, align 4, !tbaa !15
%107 = getelementptr inbounds i8, ptr %2, i64 12
%108 = load i32, ptr %107, align 4, !tbaa !29
%109 = or i32 %108, %106
store i32 %109, ptr %107, align 4, !tbaa !29
br label %110
110: ; preds = %99, %94, %105, %11, %69, %47, %18
%111 = getelementptr inbounds i8, ptr %4, i64 64
%112 = load i64, ptr %111, align 8, !tbaa !30
%113 = icmp eq i64 %112, 0
br i1 %113, label %119, label %114
114: ; preds = %110
%115 = load i32, ptr @V4L2_IN_ST_HFLIP, align 4, !tbaa !15
%116 = getelementptr inbounds i8, ptr %2, i64 12
%117 = load i32, ptr %116, align 4, !tbaa !29
%118 = or i32 %117, %115
store i32 %118, ptr %116, align 4, !tbaa !29
br label %119
119: ; preds = %114, %110
%120 = getelementptr inbounds i8, ptr %4, i64 56
%121 = load i64, ptr %120, align 8, !tbaa !31
%122 = icmp eq i64 %121, 0
br i1 %122, label %128, label %123
123: ; preds = %119
%124 = load i32, ptr @V4L2_IN_ST_VFLIP, align 4, !tbaa !15
%125 = getelementptr inbounds i8, ptr %2, i64 12
%126 = load i32, ptr %125, align 4, !tbaa !29
%127 = or i32 %126, %124
store i32 %127, ptr %125, align 4, !tbaa !29
br label %128
128: ; preds = %123, %119
%129 = getelementptr inbounds i8, ptr %4, i64 32
%130 = load i64, ptr %129, align 8, !tbaa !27
%131 = load i64, ptr %2, align 8, !tbaa !6
%132 = icmp eq i64 %130, %131
br i1 %132, label %133, label %173
133: ; preds = %128
%134 = tail call i64 @vivid_is_sdtv_cap(ptr noundef nonnull %4) #2
%135 = icmp eq i64 %134, 0
br i1 %135, label %173, label %136
136: ; preds = %133
%137 = getelementptr inbounds i8, ptr %4, i64 40
%138 = load ptr, ptr %137, align 8, !tbaa !32
%139 = load i64, ptr %129, align 8, !tbaa !27
%140 = getelementptr inbounds i64, ptr %138, i64 %139
%141 = load i64, ptr %140, align 8, !tbaa !28
%142 = load i64, ptr @NO_SIGNAL, align 8, !tbaa !28
%143 = icmp eq i64 %141, %142
br i1 %143, label %144, label %149
144: ; preds = %136
%145 = load i32, ptr @V4L2_IN_ST_NO_SIGNAL, align 4, !tbaa !15
%146 = getelementptr inbounds i8, ptr %2, i64 12
%147 = load i32, ptr %146, align 4, !tbaa !29
%148 = or i32 %147, %145
store i32 %148, ptr %146, align 4, !tbaa !29
br label %173
149: ; preds = %136
%150 = load i64, ptr @NO_LOCK, align 8, !tbaa !28
%151 = icmp eq i64 %141, %150
br i1 %151, label %152, label %157
152: ; preds = %149
%153 = load i32, ptr @V4L2_IN_ST_NO_H_LOCK, align 4, !tbaa !15
%154 = getelementptr inbounds i8, ptr %2, i64 12
%155 = load i32, ptr %154, align 4, !tbaa !29
%156 = or i32 %155, %153
store i32 %156, ptr %154, align 4, !tbaa !29
br label %173
157: ; preds = %149
%158 = tail call i64 @vivid_is_tv_cap(ptr noundef nonnull %4) #2
%159 = icmp eq i64 %158, 0
br i1 %159, label %173, label %160
160: ; preds = %157
%161 = getelementptr inbounds i8, ptr %4, i64 48
%162 = tail call i32 @tpg_g_quality(ptr noundef nonnull %161) #2
switch i32 %162, label %173 [
i32 131, label %163
i32 130, label %168
]
163: ; preds = %160
%164 = load i32, ptr @V4L2_IN_ST_COLOR_KILL, align 4, !tbaa !15
%165 = getelementptr inbounds i8, ptr %2, i64 12
%166 = load i32, ptr %165, align 4, !tbaa !29
%167 = or i32 %166, %164
store i32 %167, ptr %165, align 4, !tbaa !29
br label %173
168: ; preds = %160
%169 = load i32, ptr @V4L2_IN_ST_NO_H_LOCK, align 4, !tbaa !15
%170 = getelementptr inbounds i8, ptr %2, i64 12
%171 = load i32, ptr %170, align 4, !tbaa !29
%172 = or i32 %171, %169
store i32 %172, ptr %170, align 4, !tbaa !29
br label %173
173: ; preds = %128, %133, %152, %163, %168, %160, %157, %144, %8
%174 = phi i32 [ %10, %8 ], [ 0, %144 ], [ 0, %157 ], [ 0, %160 ], [ 0, %168 ], [ 0, %163 ], [ 0, %152 ], [ 0, %133 ], [ 0, %128 ]
ret i32 %174
}
declare ptr @video_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @snprintf(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(i32 noundef) local_unnamed_addr #1
declare i64 @vivid_is_sdtv_cap(ptr noundef) local_unnamed_addr #1
declare i64 @vivid_is_tv_cap(ptr noundef) local_unnamed_addr #1
declare i32 @tpg_g_quality(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"v4l2_input", !8, i64 0, !11, i64 8, !11, i64 12, !12, i64 16, !11, i64 24, !12, i64 32, !11, i64 40}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"vivid_dev", !8, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !8, i64 32, !12, i64 40, !11, i64 48, !8, i64 56, !8, i64 64, !11, i64 72, !11, i64 76}
!15 = !{!11, !11, i64 0}
!16 = !{!7, !11, i64 40}
!17 = !{!14, !12, i64 8}
!18 = !{!7, !11, i64 24}
!19 = !{!14, !12, i64 16}
!20 = !{!7, !12, i64 16}
!21 = !{!12, !12, i64 0}
!22 = !{!7, !12, i64 32}
!23 = !{!14, !11, i64 76}
!24 = !{!7, !11, i64 8}
!25 = !{!14, !11, i64 72}
!26 = !{!14, !12, i64 24}
!27 = !{!14, !8, i64 32}
!28 = !{!8, !8, i64 0}
!29 = !{!7, !11, i64 12}
!30 = !{!14, !8, i64 64}
!31 = !{!14, !8, i64 56}
!32 = !{!14, !12, i64 40}
| linux_drivers_media_platform_vivid_extr_vivid-vid-cap.c_vidioc_enum_input |
; ModuleID = 'AnghaBench/systemd/src/shared/extr_bootspec.h_boot_entry_title.c'
source_filename = "AnghaBench/systemd/src/shared/extr_bootspec.h_boot_entry_title.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { ptr, i64, i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @boot_entry_title], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define internal ptr @boot_entry_title(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
%3 = load i64, ptr %2, align 8, !tbaa !5
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = inttoptr i64 %3 to ptr
br label %15
7: ; preds = %1
%8 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%9 = load i64, ptr %8, align 8, !tbaa !11
%10 = icmp eq i64 %9, 0
br i1 %10, label %13, label %11
11: ; preds = %7
%12 = inttoptr i64 %9 to ptr
br label %15
13: ; preds = %7
%14 = load ptr, ptr %0, align 8, !tbaa !12
br label %15
15: ; preds = %11, %13, %5
%16 = phi ptr [ %6, %5 ], [ %12, %11 ], [ %14, %13 ]
ret ptr %16
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8, !10, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/systemd/src/shared/extr_bootspec.h_boot_entry_title.c'
source_filename = "AnghaBench/systemd/src/shared/extr_bootspec.h_boot_entry_title.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @boot_entry_title], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal ptr @boot_entry_title(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = inttoptr i64 %3 to ptr
br label %15
7: ; preds = %1
%8 = getelementptr inbounds i8, ptr %0, i64 8
%9 = load i64, ptr %8, align 8, !tbaa !12
%10 = icmp eq i64 %9, 0
br i1 %10, label %13, label %11
11: ; preds = %7
%12 = inttoptr i64 %9 to ptr
br label %15
13: ; preds = %7
%14 = load ptr, ptr %0, align 8, !tbaa !13
br label %15
15: ; preds = %11, %13, %5
%16 = phi ptr [ %6, %5 ], [ %12, %11 ], [ %14, %13 ]
ret ptr %16
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8, !11, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!7, !8, i64 0}
| systemd_src_shared_extr_bootspec.h_boot_entry_title |
; ModuleID = 'AnghaBench/libevent/extr_http.c_evhttp_set_read_timeout_tv.c'
source_filename = "AnghaBench/libevent/extr_http.c_evhttp_set_read_timeout_tv.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @evhttp_set_read_timeout_tv(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @evhttp_set_timeout_tv_(ptr noundef %0, ptr noundef %1, i32 noundef -1) #2
ret void
}
declare i32 @evhttp_set_timeout_tv_(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/libevent/extr_http.c_evhttp_set_read_timeout_tv.c'
source_filename = "AnghaBench/libevent/extr_http.c_evhttp_set_read_timeout_tv.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @evhttp_set_read_timeout_tv(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @evhttp_set_timeout_tv_(ptr noundef %0, ptr noundef %1, i32 noundef -1) #2
ret void
}
declare i32 @evhttp_set_timeout_tv_(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| libevent_extr_http.c_evhttp_set_read_timeout_tv |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/cxgb4/extr_cxgb4_main.c_cxgb_set_rxmode.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/cxgb4/extr_cxgb4_main.c_cxgb_set_rxmode.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @cxgb_set_rxmode], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @cxgb_set_rxmode(ptr noundef %0) #0 {
%2 = tail call i32 @set_rxmode(ptr noundef %0, i32 noundef -1, i32 noundef 0) #2
ret void
}
declare i32 @set_rxmode(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/cxgb4/extr_cxgb4_main.c_cxgb_set_rxmode.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/cxgb4/extr_cxgb4_main.c_cxgb_set_rxmode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cxgb_set_rxmode], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @cxgb_set_rxmode(ptr noundef %0) #0 {
%2 = tail call i32 @set_rxmode(ptr noundef %0, i32 noundef -1, i32 noundef 0) #2
ret void
}
declare i32 @set_rxmode(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_net_cxgb4_extr_cxgb4_main.c_cxgb_set_rxmode |
; ModuleID = 'AnghaBench/freebsd/sys/i386/i386/extr_copyout.c_cp_slow0.c'
source_filename = "AnghaBench/freebsd/sys/i386/i386/extr_copyout.c_cp_slow0.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i64, i32 }
%struct.pcpu = type { i32, i32, i64, i64 }
@PAGE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@curproc = dso_local local_unnamed_addr global ptr null, align 8
@VM_PROT_WRITE = dso_local local_unnamed_addr global i32 0, align 4
@VM_PROT_READ = dso_local local_unnamed_addr global i32 0, align 4
@VM_PROT_QUICK_NOFAULT = dso_local local_unnamed_addr global i32 0, align 4
@EFAULT = dso_local local_unnamed_addr global i32 0, align 4
@curthread = dso_local local_unnamed_addr global ptr null, align 8
@TDP_NOFAULTING = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @cp_slow0(i64 noundef %0, i64 noundef %1, i32 noundef %2, ptr nocapture noundef readonly %3, ptr noundef %4) local_unnamed_addr #0 {
%6 = alloca [2 x i32], align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
%7 = tail call i64 @trunc_page(i64 noundef %0) #3
%8 = add i64 %1, %0
%9 = sub i64 %8, %7
%10 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !5
%11 = tail call i32 @howmany(i64 noundef %9, i32 noundef %10) #3
%12 = call i32 @nitems(ptr noundef nonnull %6) #3
%13 = icmp sle i32 %11, %12
%14 = zext i1 %13 to i32
%15 = call i32 @MPASS(i32 noundef %14) #3
%16 = load ptr, ptr @curproc, align 8, !tbaa !9
%17 = load ptr, ptr %16, align 8, !tbaa !11
%18 = icmp eq i32 %2, 0
%19 = load i32, ptr @VM_PROT_WRITE, align 4
%20 = load i32, ptr @VM_PROT_READ, align 4
%21 = select i1 %18, i32 %20, i32 %19
%22 = load i32, ptr @VM_PROT_QUICK_NOFAULT, align 4, !tbaa !5
%23 = or i32 %21, %22
%24 = call i32 @nitems(ptr noundef nonnull %6) #3
%25 = call i32 @vm_fault_quick_hold_pages(ptr noundef %17, i64 noundef %0, i64 noundef %1, i32 noundef %23, ptr noundef nonnull %6, i32 noundef %24) #3
%26 = icmp eq i32 %25, %11
br i1 %26, label %29, label %27
27: ; preds = %5
%28 = load i32, ptr @EFAULT, align 4, !tbaa !5
br label %67
29: ; preds = %5
%30 = call i32 (...) @sched_pin() #3
%31 = call ptr (...) @get_pcpu() #3
%32 = call i32 (...) @THREAD_CAN_SLEEP() #3
%33 = icmp eq i32 %32, 0
br i1 %33, label %44, label %34
34: ; preds = %29
%35 = load ptr, ptr @curthread, align 8, !tbaa !9
%36 = load i64, ptr %35, align 8, !tbaa !13
%37 = icmp sgt i64 %36, 0
br i1 %37, label %44, label %38
38: ; preds = %34
%39 = getelementptr inbounds %struct.TYPE_5__, ptr %35, i64 0, i32 1
%40 = load i32, ptr %39, align 8, !tbaa !16
%41 = load i32, ptr @TDP_NOFAULTING, align 4, !tbaa !5
%42 = and i32 %41, %40
%43 = icmp eq i32 %42, 0
br i1 %43, label %54, label %44
44: ; preds = %38, %34, %29
%45 = call i32 @mtx_lock(ptr noundef %31) #3
%46 = getelementptr inbounds %struct.pcpu, ptr %31, i64 0, i32 3
%47 = load i64, ptr %46, align 8, !tbaa !17
%48 = call i32 @pmap_cp_slow0_map(i64 noundef %47, i32 noundef %11, ptr noundef nonnull %6) #3
%49 = call i64 @trunc_page(i64 noundef %0) #3
%50 = add i64 %47, %0
%51 = sub i64 %50, %49
call void %3(i64 noundef %51, ptr noundef %4) #3
%52 = call i32 (...) @sched_unpin() #3
%53 = call i32 @mtx_unlock(ptr noundef %31) #3
br label %65
54: ; preds = %38
%55 = getelementptr inbounds %struct.pcpu, ptr %31, i64 0, i32 1
%56 = call i32 @sx_xlock(ptr noundef nonnull %55) #3
%57 = getelementptr inbounds %struct.pcpu, ptr %31, i64 0, i32 2
%58 = load i64, ptr %57, align 8, !tbaa !17
%59 = call i32 @pmap_cp_slow0_map(i64 noundef %58, i32 noundef %11, ptr noundef nonnull %6) #3
%60 = call i64 @trunc_page(i64 noundef %0) #3
%61 = add i64 %58, %0
%62 = sub i64 %61, %60
call void %3(i64 noundef %62, ptr noundef %4) #3
%63 = call i32 (...) @sched_unpin() #3
%64 = call i32 @sx_xunlock(ptr noundef nonnull %55) #3
br label %65
65: ; preds = %44, %54
%66 = call i32 @vm_page_unhold_pages(ptr noundef nonnull %6, i32 noundef %11) #3
br label %67
67: ; preds = %65, %27
%68 = phi i32 [ %28, %27 ], [ 0, %65 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
ret i32 %68
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @howmany(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @trunc_page(i64 noundef) local_unnamed_addr #2
declare i32 @MPASS(i32 noundef) local_unnamed_addr #2
declare i32 @nitems(ptr noundef) local_unnamed_addr #2
declare i32 @vm_fault_quick_hold_pages(ptr noundef, i64 noundef, i64 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @sched_pin(...) local_unnamed_addr #2
declare ptr @get_pcpu(...) local_unnamed_addr #2
declare i32 @THREAD_CAN_SLEEP(...) local_unnamed_addr #2
declare i32 @mtx_lock(ptr noundef) local_unnamed_addr #2
declare i32 @sx_xlock(ptr noundef) local_unnamed_addr #2
declare i32 @pmap_cp_slow0_map(i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sched_unpin(...) local_unnamed_addr #2
declare i32 @sx_xunlock(ptr noundef) local_unnamed_addr #2
declare i32 @mtx_unlock(ptr noundef) local_unnamed_addr #2
declare i32 @vm_page_unhold_pages(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_6__", !10, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"TYPE_5__", !15, i64 0, !6, i64 8}
!15 = !{!"long", !7, i64 0}
!16 = !{!14, !6, i64 8}
!17 = !{!15, !15, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/i386/i386/extr_copyout.c_cp_slow0.c'
source_filename = "AnghaBench/freebsd/sys/i386/i386/extr_copyout.c_cp_slow0.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PAGE_SIZE = common local_unnamed_addr global i32 0, align 4
@curproc = common local_unnamed_addr global ptr null, align 8
@VM_PROT_WRITE = common local_unnamed_addr global i32 0, align 4
@VM_PROT_READ = common local_unnamed_addr global i32 0, align 4
@VM_PROT_QUICK_NOFAULT = common local_unnamed_addr global i32 0, align 4
@EFAULT = common local_unnamed_addr global i32 0, align 4
@curthread = common local_unnamed_addr global ptr null, align 8
@TDP_NOFAULTING = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @cp_slow0(i64 noundef %0, i64 noundef %1, i32 noundef %2, ptr nocapture noundef readonly %3, ptr noundef %4) local_unnamed_addr #0 {
%6 = alloca [2 x i32], align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
%7 = tail call i64 @trunc_page(i64 noundef %0) #3
%8 = add i64 %1, %0
%9 = sub i64 %8, %7
%10 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !6
%11 = tail call i32 @howmany(i64 noundef %9, i32 noundef %10) #3
%12 = call i32 @nitems(ptr noundef nonnull %6) #3
%13 = icmp sle i32 %11, %12
%14 = zext i1 %13 to i32
%15 = call i32 @MPASS(i32 noundef %14) #3
%16 = load ptr, ptr @curproc, align 8, !tbaa !10
%17 = load ptr, ptr %16, align 8, !tbaa !12
%18 = icmp eq i32 %2, 0
%19 = load i32, ptr @VM_PROT_WRITE, align 4
%20 = load i32, ptr @VM_PROT_READ, align 4
%21 = select i1 %18, i32 %20, i32 %19
%22 = load i32, ptr @VM_PROT_QUICK_NOFAULT, align 4, !tbaa !6
%23 = or i32 %21, %22
%24 = call i32 @nitems(ptr noundef nonnull %6) #3
%25 = call i32 @vm_fault_quick_hold_pages(ptr noundef %17, i64 noundef %0, i64 noundef %1, i32 noundef %23, ptr noundef nonnull %6, i32 noundef %24) #3
%26 = icmp eq i32 %25, %11
br i1 %26, label %29, label %27
27: ; preds = %5
%28 = load i32, ptr @EFAULT, align 4, !tbaa !6
br label %67
29: ; preds = %5
%30 = call i32 @sched_pin() #3
%31 = call ptr @get_pcpu() #3
%32 = call i32 @THREAD_CAN_SLEEP() #3
%33 = icmp eq i32 %32, 0
br i1 %33, label %44, label %34
34: ; preds = %29
%35 = load ptr, ptr @curthread, align 8, !tbaa !10
%36 = load i64, ptr %35, align 8, !tbaa !14
%37 = icmp sgt i64 %36, 0
br i1 %37, label %44, label %38
38: ; preds = %34
%39 = getelementptr inbounds i8, ptr %35, i64 8
%40 = load i32, ptr %39, align 8, !tbaa !17
%41 = load i32, ptr @TDP_NOFAULTING, align 4, !tbaa !6
%42 = and i32 %41, %40
%43 = icmp eq i32 %42, 0
br i1 %43, label %54, label %44
44: ; preds = %38, %34, %29
%45 = call i32 @mtx_lock(ptr noundef %31) #3
%46 = getelementptr inbounds i8, ptr %31, i64 16
%47 = load i64, ptr %46, align 8, !tbaa !18
%48 = call i32 @pmap_cp_slow0_map(i64 noundef %47, i32 noundef %11, ptr noundef nonnull %6) #3
%49 = call i64 @trunc_page(i64 noundef %0) #3
%50 = add i64 %47, %0
%51 = sub i64 %50, %49
call void %3(i64 noundef %51, ptr noundef %4) #3
%52 = call i32 @sched_unpin() #3
%53 = call i32 @mtx_unlock(ptr noundef %31) #3
br label %65
54: ; preds = %38
%55 = getelementptr inbounds i8, ptr %31, i64 4
%56 = call i32 @sx_xlock(ptr noundef nonnull %55) #3
%57 = getelementptr inbounds i8, ptr %31, i64 8
%58 = load i64, ptr %57, align 8, !tbaa !18
%59 = call i32 @pmap_cp_slow0_map(i64 noundef %58, i32 noundef %11, ptr noundef nonnull %6) #3
%60 = call i64 @trunc_page(i64 noundef %0) #3
%61 = add i64 %58, %0
%62 = sub i64 %61, %60
call void %3(i64 noundef %62, ptr noundef %4) #3
%63 = call i32 @sched_unpin() #3
%64 = call i32 @sx_xunlock(ptr noundef nonnull %55) #3
br label %65
65: ; preds = %44, %54
%66 = call i32 @vm_page_unhold_pages(ptr noundef nonnull %6, i32 noundef %11) #3
br label %67
67: ; preds = %65, %27
%68 = phi i32 [ %28, %27 ], [ 0, %65 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
ret i32 %68
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @howmany(i64 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @trunc_page(i64 noundef) local_unnamed_addr #2
declare i32 @MPASS(i32 noundef) local_unnamed_addr #2
declare i32 @nitems(ptr noundef) local_unnamed_addr #2
declare i32 @vm_fault_quick_hold_pages(ptr noundef, i64 noundef, i64 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @sched_pin(...) local_unnamed_addr #2
declare ptr @get_pcpu(...) local_unnamed_addr #2
declare i32 @THREAD_CAN_SLEEP(...) local_unnamed_addr #2
declare i32 @mtx_lock(ptr noundef) local_unnamed_addr #2
declare i32 @sx_xlock(ptr noundef) local_unnamed_addr #2
declare i32 @pmap_cp_slow0_map(i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sched_unpin(...) local_unnamed_addr #2
declare i32 @sx_xunlock(ptr noundef) local_unnamed_addr #2
declare i32 @mtx_unlock(ptr noundef) local_unnamed_addr #2
declare i32 @vm_page_unhold_pages(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_6__", !11, i64 0}
!14 = !{!15, !16, i64 0}
!15 = !{!"TYPE_5__", !16, i64 0, !7, i64 8}
!16 = !{!"long", !8, i64 0}
!17 = !{!15, !7, i64 8}
!18 = !{!16, !16, i64 0}
| freebsd_sys_i386_i386_extr_copyout.c_cp_slow0 |
; ModuleID = 'AnghaBench/linux/drivers/regulator/extr_max77686-regulator.c_max77686_set_suspend_mode.c'
source_filename = "AnghaBench/linux/drivers/regulator/extr_max77686-regulator.c_max77686_set_suspend_mode.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, i32, i32 }
%struct.regulator_dev = type { ptr, i32 }
@MAX77686_BUCK5 = dso_local local_unnamed_addr global i32 0, align 4
@MAX77686_LDO_LOWPOWER_PWRREQ = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [49 x i8] c"%s: regulator_suspend_mode : 0x%x not supported\0A\00", align 1
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@MAX77686_OPMODE_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @max77686_set_suspend_mode], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @max77686_set_suspend_mode(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @rdev_get_drvdata(ptr noundef %0) #2
%4 = tail call i32 @rdev_get_id(ptr noundef %0) #2
%5 = load i32, ptr @MAX77686_BUCK5, align 4, !tbaa !5
%6 = icmp slt i32 %4, %5
br i1 %6, label %7, label %35
7: ; preds = %2
switch i32 %1, label %12 [
i32 129, label %8
i32 128, label %10
]
8: ; preds = %7
%9 = load i32, ptr @MAX77686_LDO_LOWPOWER_PWRREQ, align 4, !tbaa !5
br label %19
10: ; preds = %7
%11 = tail call i32 @max77686_map_normal_mode(ptr noundef %3, i32 noundef %4) #2
br label %19
12: ; preds = %7
%13 = load ptr, ptr %0, align 8, !tbaa !9
%14 = getelementptr inbounds %struct.TYPE_2__, ptr %13, i64 0, i32 2
%15 = load i32, ptr %14, align 4, !tbaa !12
%16 = tail call i32 @pr_warn(ptr noundef nonnull @.str, i32 noundef %15, i32 noundef %1) #2
%17 = load i32, ptr @EINVAL, align 4, !tbaa !5
%18 = sub nsw i32 0, %17
br label %35
19: ; preds = %10, %8
%20 = phi i32 [ %11, %10 ], [ %9, %8 ]
%21 = getelementptr inbounds %struct.regulator_dev, ptr %0, i64 0, i32 1
%22 = load i32, ptr %21, align 8, !tbaa !14
%23 = load ptr, ptr %0, align 8, !tbaa !9
%24 = getelementptr inbounds %struct.TYPE_2__, ptr %23, i64 0, i32 1
%25 = load i32, ptr %24, align 4, !tbaa !15
%26 = load i32, ptr %23, align 4, !tbaa !16
%27 = load i32, ptr @MAX77686_OPMODE_SHIFT, align 4, !tbaa !5
%28 = shl i32 %20, %27
%29 = tail call i32 @regmap_update_bits(i32 noundef %22, i32 noundef %25, i32 noundef %26, i32 noundef %28) #2
%30 = icmp eq i32 %29, 0
br i1 %30, label %31, label %35
31: ; preds = %19
%32 = load ptr, ptr %3, align 8, !tbaa !17
%33 = sext i32 %4 to i64
%34 = getelementptr inbounds i32, ptr %32, i64 %33
store i32 %20, ptr %34, align 4, !tbaa !5
br label %35
35: ; preds = %19, %2, %31, %12
%36 = phi i32 [ %18, %12 ], [ 0, %31 ], [ 0, %2 ], [ %29, %19 ]
ret i32 %36
}
declare ptr @rdev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @rdev_get_id(ptr noundef) local_unnamed_addr #1
declare i32 @max77686_map_normal_mode(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pr_warn(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @regmap_update_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"regulator_dev", !11, i64 0, !6, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !6, i64 8}
!13 = !{!"TYPE_2__", !6, i64 0, !6, i64 4, !6, i64 8}
!14 = !{!10, !6, i64 8}
!15 = !{!13, !6, i64 4}
!16 = !{!13, !6, i64 0}
!17 = !{!18, !11, i64 0}
!18 = !{!"max77686_data", !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/regulator/extr_max77686-regulator.c_max77686_set_suspend_mode.c'
source_filename = "AnghaBench/linux/drivers/regulator/extr_max77686-regulator.c_max77686_set_suspend_mode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MAX77686_BUCK5 = common local_unnamed_addr global i32 0, align 4
@MAX77686_LDO_LOWPOWER_PWRREQ = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [49 x i8] c"%s: regulator_suspend_mode : 0x%x not supported\0A\00", align 1
@EINVAL = common local_unnamed_addr global i32 0, align 4
@MAX77686_OPMODE_SHIFT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @max77686_set_suspend_mode], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @max77686_set_suspend_mode(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @rdev_get_drvdata(ptr noundef %0) #2
%4 = tail call i32 @rdev_get_id(ptr noundef %0) #2
%5 = load i32, ptr @MAX77686_BUCK5, align 4, !tbaa !6
%6 = icmp slt i32 %4, %5
br i1 %6, label %7, label %35
7: ; preds = %2
switch i32 %1, label %12 [
i32 129, label %8
i32 128, label %10
]
8: ; preds = %7
%9 = load i32, ptr @MAX77686_LDO_LOWPOWER_PWRREQ, align 4, !tbaa !6
br label %19
10: ; preds = %7
%11 = tail call i32 @max77686_map_normal_mode(ptr noundef %3, i32 noundef %4) #2
br label %19
12: ; preds = %7
%13 = load ptr, ptr %0, align 8, !tbaa !10
%14 = getelementptr inbounds i8, ptr %13, i64 8
%15 = load i32, ptr %14, align 4, !tbaa !13
%16 = tail call i32 @pr_warn(ptr noundef nonnull @.str, i32 noundef %15, i32 noundef %1) #2
%17 = load i32, ptr @EINVAL, align 4, !tbaa !6
%18 = sub nsw i32 0, %17
br label %35
19: ; preds = %10, %8
%20 = phi i32 [ %11, %10 ], [ %9, %8 ]
%21 = getelementptr inbounds i8, ptr %0, i64 8
%22 = load i32, ptr %21, align 8, !tbaa !15
%23 = load ptr, ptr %0, align 8, !tbaa !10
%24 = getelementptr inbounds i8, ptr %23, i64 4
%25 = load i32, ptr %24, align 4, !tbaa !16
%26 = load i32, ptr %23, align 4, !tbaa !17
%27 = load i32, ptr @MAX77686_OPMODE_SHIFT, align 4, !tbaa !6
%28 = shl i32 %20, %27
%29 = tail call i32 @regmap_update_bits(i32 noundef %22, i32 noundef %25, i32 noundef %26, i32 noundef %28) #2
%30 = icmp eq i32 %29, 0
br i1 %30, label %31, label %35
31: ; preds = %19
%32 = load ptr, ptr %3, align 8, !tbaa !18
%33 = sext i32 %4 to i64
%34 = getelementptr inbounds i32, ptr %32, i64 %33
store i32 %20, ptr %34, align 4, !tbaa !6
br label %35
35: ; preds = %19, %2, %31, %12
%36 = phi i32 [ %18, %12 ], [ 0, %31 ], [ 0, %2 ], [ %29, %19 ]
ret i32 %36
}
declare ptr @rdev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @rdev_get_id(ptr noundef) local_unnamed_addr #1
declare i32 @max77686_map_normal_mode(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pr_warn(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @regmap_update_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"regulator_dev", !12, i64 0, !7, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 8}
!14 = !{!"TYPE_2__", !7, i64 0, !7, i64 4, !7, i64 8}
!15 = !{!11, !7, i64 8}
!16 = !{!14, !7, i64 4}
!17 = !{!14, !7, i64 0}
!18 = !{!19, !12, i64 0}
!19 = !{!"max77686_data", !12, i64 0}
| linux_drivers_regulator_extr_max77686-regulator.c_max77686_set_suspend_mode |
; ModuleID = 'AnghaBench/freebsd/cddl/contrib/opensolaris/lib/libctf/common/extr_ctf_lib.c_z_uncompress.c'
source_filename = "AnghaBench/freebsd/cddl/contrib/opensolaris/lib/libctf/common/extr_ctf_lib.c_z_uncompress.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { ptr }
@zlib = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @z_uncompress(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = load ptr, ptr @zlib, align 8, !tbaa !5
%6 = tail call i32 %5(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3) #1
ret i32 %6
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/cddl/contrib/opensolaris/lib/libctf/common/extr_ctf_lib.c_z_uncompress.c'
source_filename = "AnghaBench/freebsd/cddl/contrib/opensolaris/lib/libctf/common/extr_ctf_lib.c_z_uncompress.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { ptr }
@zlib = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @z_uncompress(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = load ptr, ptr @zlib, align 8, !tbaa !6
%6 = tail call i32 %5(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3) #1
ret i32 %6
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_cddl_contrib_opensolaris_lib_libctf_common_extr_ctf_lib.c_z_uncompress |
; ModuleID = 'AnghaBench/linux/tools/spi/extr_spidev_test.c_transfer_buf.c'
source_filename = "AnghaBench/linux/tools/spi/extr_spidev_test.c_transfer_buf.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [25 x i8] c"can't allocate tx buffer\00", align 1
@.str.1 = private unnamed_addr constant [25 x i8] c"can't allocate rx buffer\00", align 1
@_write_count = dso_local local_unnamed_addr global i32 0, align 4
@_read_count = dso_local local_unnamed_addr global i32 0, align 4
@mode = dso_local local_unnamed_addr global i32 0, align 4
@SPI_LOOP = dso_local local_unnamed_addr global i32 0, align 4
@stderr = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [18 x i8] c"transfer error !\0A\00", align 1
@.str.3 = private unnamed_addr constant [3 x i8] c"TX\00", align 1
@.str.4 = private unnamed_addr constant [3 x i8] c"RX\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @transfer_buf], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @transfer_buf(i32 noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @malloc(i32 noundef %1) #3
%4 = icmp eq ptr %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @pabort(ptr noundef nonnull @.str) #3
br label %7
7: ; preds = %5, %2
%8 = icmp sgt i32 %1, 0
br i1 %8, label %9, label %17
9: ; preds = %7
%10 = zext nneg i32 %1 to i64
br label %11
11: ; preds = %9, %11
%12 = phi i64 [ 0, %9 ], [ %15, %11 ]
%13 = tail call i32 (...) @random() #3
%14 = getelementptr inbounds i32, ptr %3, i64 %12
store i32 %13, ptr %14, align 4, !tbaa !5
%15 = add nuw nsw i64 %12, 1
%16 = icmp eq i64 %15, %10
br i1 %16, label %17, label %11, !llvm.loop !9
17: ; preds = %11, %7
%18 = tail call ptr @malloc(i32 noundef %1) #3
%19 = icmp eq ptr %18, null
br i1 %19, label %20, label %22
20: ; preds = %17
%21 = tail call i32 @pabort(ptr noundef nonnull @.str.1) #3
br label %22
22: ; preds = %20, %17
%23 = tail call i32 @transfer(i32 noundef %0, ptr noundef %3, ptr noundef %18, i32 noundef %1) #3
%24 = load i32, ptr @_write_count, align 4, !tbaa !5
%25 = add nsw i32 %24, %1
store i32 %25, ptr @_write_count, align 4, !tbaa !5
%26 = load i32, ptr @_read_count, align 4, !tbaa !5
%27 = add nsw i32 %26, %1
store i32 %27, ptr @_read_count, align 4, !tbaa !5
%28 = load i32, ptr @mode, align 4, !tbaa !5
%29 = load i32, ptr @SPI_LOOP, align 4, !tbaa !5
%30 = and i32 %29, %28
%31 = icmp eq i32 %30, 0
br i1 %31, label %41, label %32
32: ; preds = %22
%33 = tail call i64 @memcmp(ptr noundef %3, ptr noundef %18, i32 noundef %1) #3
%34 = icmp eq i64 %33, 0
br i1 %34, label %41, label %35
35: ; preds = %32
%36 = load i32, ptr @stderr, align 4, !tbaa !5
%37 = tail call i32 @fprintf(i32 noundef %36, ptr noundef nonnull @.str.2) #3
%38 = tail call i32 @hex_dump(ptr noundef %3, i32 noundef %1, i32 noundef 32, ptr noundef nonnull @.str.3) #3
%39 = tail call i32 @hex_dump(ptr noundef %18, i32 noundef %1, i32 noundef 32, ptr noundef nonnull @.str.4) #3
%40 = tail call i32 @exit(i32 noundef 1) #4
unreachable
41: ; preds = %32, %22
%42 = tail call i32 @free(ptr noundef %18) #3
%43 = tail call i32 @free(ptr noundef %3) #3
ret void
}
declare ptr @malloc(i32 noundef) local_unnamed_addr #1
declare i32 @pabort(ptr noundef) local_unnamed_addr #1
declare i32 @random(...) local_unnamed_addr #1
declare i32 @transfer(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @memcmp(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fprintf(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @hex_dump(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/tools/spi/extr_spidev_test.c_transfer_buf.c'
source_filename = "AnghaBench/linux/tools/spi/extr_spidev_test.c_transfer_buf.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [25 x i8] c"can't allocate tx buffer\00", align 1
@.str.1 = private unnamed_addr constant [25 x i8] c"can't allocate rx buffer\00", align 1
@_write_count = common local_unnamed_addr global i32 0, align 4
@_read_count = common local_unnamed_addr global i32 0, align 4
@mode = common local_unnamed_addr global i32 0, align 4
@SPI_LOOP = common local_unnamed_addr global i32 0, align 4
@stderr = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [18 x i8] c"transfer error !\0A\00", align 1
@.str.3 = private unnamed_addr constant [3 x i8] c"TX\00", align 1
@.str.4 = private unnamed_addr constant [3 x i8] c"RX\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @transfer_buf], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @transfer_buf(i32 noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @malloc(i32 noundef %1) #3
%4 = icmp eq ptr %3, null
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @pabort(ptr noundef nonnull @.str) #3
br label %7
7: ; preds = %5, %2
%8 = icmp sgt i32 %1, 0
br i1 %8, label %9, label %17
9: ; preds = %7
%10 = zext nneg i32 %1 to i64
br label %11
11: ; preds = %9, %11
%12 = phi i64 [ 0, %9 ], [ %15, %11 ]
%13 = tail call i32 @random() #3
%14 = getelementptr inbounds i32, ptr %3, i64 %12
store i32 %13, ptr %14, align 4, !tbaa !6
%15 = add nuw nsw i64 %12, 1
%16 = icmp eq i64 %15, %10
br i1 %16, label %17, label %11, !llvm.loop !10
17: ; preds = %11, %7
%18 = tail call ptr @malloc(i32 noundef %1) #3
%19 = icmp eq ptr %18, null
br i1 %19, label %20, label %22
20: ; preds = %17
%21 = tail call i32 @pabort(ptr noundef nonnull @.str.1) #3
br label %22
22: ; preds = %20, %17
%23 = tail call i32 @transfer(i32 noundef %0, ptr noundef %3, ptr noundef %18, i32 noundef %1) #3
%24 = load i32, ptr @_write_count, align 4, !tbaa !6
%25 = add nsw i32 %24, %1
store i32 %25, ptr @_write_count, align 4, !tbaa !6
%26 = load i32, ptr @_read_count, align 4, !tbaa !6
%27 = add nsw i32 %26, %1
store i32 %27, ptr @_read_count, align 4, !tbaa !6
%28 = load i32, ptr @mode, align 4, !tbaa !6
%29 = load i32, ptr @SPI_LOOP, align 4, !tbaa !6
%30 = and i32 %29, %28
%31 = icmp eq i32 %30, 0
br i1 %31, label %41, label %32
32: ; preds = %22
%33 = tail call i64 @memcmp(ptr noundef %3, ptr noundef %18, i32 noundef %1) #3
%34 = icmp eq i64 %33, 0
br i1 %34, label %41, label %35
35: ; preds = %32
%36 = load i32, ptr @stderr, align 4, !tbaa !6
%37 = tail call i32 @fprintf(i32 noundef %36, ptr noundef nonnull @.str.2) #3
%38 = tail call i32 @hex_dump(ptr noundef %3, i32 noundef %1, i32 noundef 32, ptr noundef nonnull @.str.3) #3
%39 = tail call i32 @hex_dump(ptr noundef %18, i32 noundef %1, i32 noundef 32, ptr noundef nonnull @.str.4) #3
%40 = tail call i32 @exit(i32 noundef 1) #4
unreachable
41: ; preds = %32, %22
%42 = tail call i32 @free(ptr noundef %18) #3
%43 = tail call i32 @free(ptr noundef %3) #3
ret void
}
declare ptr @malloc(i32 noundef) local_unnamed_addr #1
declare i32 @pabort(ptr noundef) local_unnamed_addr #1
declare i32 @random(...) local_unnamed_addr #1
declare i32 @transfer(i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @memcmp(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fprintf(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @hex_dump(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| linux_tools_spi_extr_spidev_test.c_transfer_buf |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/intel/i40e/extr_i40e_ethtool.c_i40e_set_rxfh.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/intel/i40e/extr_i40e_ethtool.c_i40e_set_rxfh.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.i40e_vsi = type { ptr, i32, ptr, ptr }
@ETH_RSS_HASH_NO_CHANGE = dso_local local_unnamed_addr constant i64 0, align 8
@ETH_RSS_HASH_TOP = dso_local local_unnamed_addr constant i64 0, align 8
@EOPNOTSUPP = dso_local local_unnamed_addr global i32 0, align 4
@I40E_HKEY_ARRAY_SIZE = dso_local local_unnamed_addr global i64 0, align 8
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@I40E_HLUT_ARRAY_SIZE = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @i40e_set_rxfh], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @i40e_set_rxfh(ptr noundef %0, ptr noundef readonly %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = tail call ptr @netdev_priv(ptr noundef %0) #2
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = getelementptr inbounds %struct.i40e_vsi, ptr %6, i64 0, i32 3
%8 = load ptr, ptr %7, align 8, !tbaa !10
%9 = icmp eq i64 %3, 0
br i1 %9, label %13, label %10
10: ; preds = %4
%11 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !13
%12 = sub nsw i32 0, %11
br label %68
13: ; preds = %4
%14 = icmp eq ptr %2, null
br i1 %14, label %32, label %15
15: ; preds = %13
%16 = getelementptr inbounds %struct.i40e_vsi, ptr %6, i64 0, i32 2
%17 = load ptr, ptr %16, align 8, !tbaa !14
%18 = icmp eq ptr %17, null
br i1 %18, label %19, label %27
19: ; preds = %15
%20 = load i64, ptr @I40E_HKEY_ARRAY_SIZE, align 8, !tbaa !15
%21 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !13
%22 = tail call ptr @kzalloc(i64 noundef %20, i32 noundef %21) #2
store ptr %22, ptr %16, align 8, !tbaa !14
%23 = icmp eq ptr %22, null
br i1 %23, label %24, label %27
24: ; preds = %19
%25 = load i32, ptr @ENOMEM, align 4, !tbaa !13
%26 = sub nsw i32 0, %25
br label %68
27: ; preds = %19, %15
%28 = phi ptr [ %22, %19 ], [ %17, %15 ]
%29 = load i64, ptr @I40E_HKEY_ARRAY_SIZE, align 8, !tbaa !15
%30 = tail call i32 @memcpy(ptr noundef nonnull %28, ptr noundef nonnull %2, i64 noundef %29) #2
%31 = load ptr, ptr %16, align 8, !tbaa !14
br label %32
32: ; preds = %27, %13
%33 = phi ptr [ %31, %27 ], [ null, %13 ]
%34 = load ptr, ptr %6, align 8, !tbaa !17
%35 = icmp eq ptr %34, null
br i1 %35, label %36, label %44
36: ; preds = %32
%37 = load i64, ptr @I40E_HLUT_ARRAY_SIZE, align 8, !tbaa !15
%38 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !13
%39 = tail call ptr @kzalloc(i64 noundef %37, i32 noundef %38) #2
store ptr %39, ptr %6, align 8, !tbaa !17
%40 = icmp eq ptr %39, null
br i1 %40, label %41, label %44
41: ; preds = %36
%42 = load i32, ptr @ENOMEM, align 4, !tbaa !13
%43 = sub nsw i32 0, %42
br label %68
44: ; preds = %36, %32
%45 = phi ptr [ %39, %36 ], [ %34, %32 ]
%46 = icmp eq ptr %1, null
%47 = load i64, ptr @I40E_HLUT_ARRAY_SIZE, align 8, !tbaa !15
br i1 %46, label %58, label %48
48: ; preds = %44
%49 = icmp eq i64 %47, 0
br i1 %49, label %64, label %50
50: ; preds = %48, %50
%51 = phi i64 [ %55, %50 ], [ 0, %48 ]
%52 = getelementptr inbounds i64, ptr %1, i64 %51
%53 = load i64, ptr %52, align 8, !tbaa !15
%54 = getelementptr inbounds i64, ptr %45, i64 %51
store i64 %53, ptr %54, align 8, !tbaa !15
%55 = add nuw i64 %51, 1
%56 = load i64, ptr @I40E_HLUT_ARRAY_SIZE, align 8, !tbaa !15
%57 = icmp ult i64 %55, %56
br i1 %57, label %50, label %64, !llvm.loop !18
58: ; preds = %44
%59 = getelementptr inbounds %struct.i40e_vsi, ptr %6, i64 0, i32 1
%60 = load i32, ptr %59, align 8, !tbaa !20
%61 = tail call i32 @i40e_fill_rss_lut(ptr noundef %8, ptr noundef nonnull %45, i64 noundef %47, i32 noundef %60) #2
%62 = load ptr, ptr %6, align 8, !tbaa !17
%63 = load i64, ptr @I40E_HLUT_ARRAY_SIZE, align 8, !tbaa !15
br label %64
64: ; preds = %50, %48, %58
%65 = phi i64 [ 0, %48 ], [ %63, %58 ], [ %56, %50 ]
%66 = phi ptr [ %45, %48 ], [ %62, %58 ], [ %45, %50 ]
%67 = tail call i32 @i40e_config_rss(ptr noundef nonnull %6, ptr noundef %33, ptr noundef %66, i64 noundef %65) #2
br label %68
68: ; preds = %64, %41, %24, %10
%69 = phi i32 [ %12, %10 ], [ %67, %64 ], [ %43, %41 ], [ %26, %24 ]
ret i32 %69
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare ptr @kzalloc(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @i40e_fill_rss_lut(ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @i40e_config_rss(ptr noundef, ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"i40e_netdev_priv", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 24}
!11 = !{!"i40e_vsi", !7, i64 0, !12, i64 8, !7, i64 16, !7, i64 24}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!11, !7, i64 16}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !8, i64 0}
!17 = !{!11, !7, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!11, !12, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/intel/i40e/extr_i40e_ethtool.c_i40e_set_rxfh.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/intel/i40e/extr_i40e_ethtool.c_i40e_set_rxfh.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ETH_RSS_HASH_NO_CHANGE = common local_unnamed_addr global i64 0, align 8
@ETH_RSS_HASH_TOP = common local_unnamed_addr global i64 0, align 8
@EOPNOTSUPP = common local_unnamed_addr global i32 0, align 4
@I40E_HKEY_ARRAY_SIZE = common local_unnamed_addr global i64 0, align 8
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@I40E_HLUT_ARRAY_SIZE = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @i40e_set_rxfh], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @i40e_set_rxfh(ptr noundef %0, ptr noundef readonly %1, ptr noundef %2, i64 noundef %3) #0 {
%5 = tail call ptr @netdev_priv(ptr noundef %0) #2
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = getelementptr inbounds i8, ptr %6, i64 24
%8 = load ptr, ptr %7, align 8, !tbaa !11
%9 = load i64, ptr @ETH_RSS_HASH_NO_CHANGE, align 8, !tbaa !14
%10 = icmp eq i64 %9, %3
%11 = load i64, ptr @ETH_RSS_HASH_TOP, align 8
%12 = icmp eq i64 %11, %3
%13 = select i1 %10, i1 true, i1 %12
br i1 %13, label %17, label %14
14: ; preds = %4
%15 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !16
%16 = sub nsw i32 0, %15
br label %72
17: ; preds = %4
%18 = icmp eq ptr %2, null
br i1 %18, label %36, label %19
19: ; preds = %17
%20 = getelementptr inbounds i8, ptr %6, i64 16
%21 = load ptr, ptr %20, align 8, !tbaa !17
%22 = icmp eq ptr %21, null
br i1 %22, label %23, label %31
23: ; preds = %19
%24 = load i64, ptr @I40E_HKEY_ARRAY_SIZE, align 8, !tbaa !14
%25 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !16
%26 = tail call ptr @kzalloc(i64 noundef %24, i32 noundef %25) #2
store ptr %26, ptr %20, align 8, !tbaa !17
%27 = icmp eq ptr %26, null
br i1 %27, label %28, label %31
28: ; preds = %23
%29 = load i32, ptr @ENOMEM, align 4, !tbaa !16
%30 = sub nsw i32 0, %29
br label %72
31: ; preds = %23, %19
%32 = phi ptr [ %26, %23 ], [ %21, %19 ]
%33 = load i64, ptr @I40E_HKEY_ARRAY_SIZE, align 8, !tbaa !14
%34 = tail call i32 @memcpy(ptr noundef nonnull %32, ptr noundef nonnull %2, i64 noundef %33) #2
%35 = load ptr, ptr %20, align 8, !tbaa !17
br label %36
36: ; preds = %31, %17
%37 = phi ptr [ %35, %31 ], [ null, %17 ]
%38 = load ptr, ptr %6, align 8, !tbaa !18
%39 = icmp eq ptr %38, null
br i1 %39, label %40, label %48
40: ; preds = %36
%41 = load i64, ptr @I40E_HLUT_ARRAY_SIZE, align 8, !tbaa !14
%42 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !16
%43 = tail call ptr @kzalloc(i64 noundef %41, i32 noundef %42) #2
store ptr %43, ptr %6, align 8, !tbaa !18
%44 = icmp eq ptr %43, null
br i1 %44, label %45, label %48
45: ; preds = %40
%46 = load i32, ptr @ENOMEM, align 4, !tbaa !16
%47 = sub nsw i32 0, %46
br label %72
48: ; preds = %40, %36
%49 = phi ptr [ %43, %40 ], [ %38, %36 ]
%50 = icmp eq ptr %1, null
%51 = load i64, ptr @I40E_HLUT_ARRAY_SIZE, align 8, !tbaa !14
br i1 %50, label %62, label %52
52: ; preds = %48
%53 = icmp eq i64 %51, 0
br i1 %53, label %68, label %54
54: ; preds = %52, %54
%55 = phi i64 [ %59, %54 ], [ 0, %52 ]
%56 = getelementptr inbounds i64, ptr %1, i64 %55
%57 = load i64, ptr %56, align 8, !tbaa !14
%58 = getelementptr inbounds i64, ptr %49, i64 %55
store i64 %57, ptr %58, align 8, !tbaa !14
%59 = add nuw i64 %55, 1
%60 = load i64, ptr @I40E_HLUT_ARRAY_SIZE, align 8, !tbaa !14
%61 = icmp ult i64 %59, %60
br i1 %61, label %54, label %68, !llvm.loop !19
62: ; preds = %48
%63 = getelementptr inbounds i8, ptr %6, i64 8
%64 = load i32, ptr %63, align 8, !tbaa !21
%65 = tail call i32 @i40e_fill_rss_lut(ptr noundef %8, ptr noundef nonnull %49, i64 noundef %51, i32 noundef %64) #2
%66 = load ptr, ptr %6, align 8, !tbaa !18
%67 = load i64, ptr @I40E_HLUT_ARRAY_SIZE, align 8, !tbaa !14
br label %68
68: ; preds = %54, %52, %62
%69 = phi i64 [ 0, %52 ], [ %67, %62 ], [ %60, %54 ]
%70 = phi ptr [ %49, %52 ], [ %66, %62 ], [ %49, %54 ]
%71 = tail call i32 @i40e_config_rss(ptr noundef nonnull %6, ptr noundef %37, ptr noundef %70, i64 noundef %69) #2
br label %72
72: ; preds = %68, %45, %28, %14
%73 = phi i32 [ %16, %14 ], [ %71, %68 ], [ %47, %45 ], [ %30, %28 ]
ret i32 %73
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare ptr @kzalloc(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @i40e_fill_rss_lut(ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @i40e_config_rss(ptr noundef, ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"i40e_netdev_priv", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 24}
!12 = !{!"i40e_vsi", !8, i64 0, !13, i64 8, !8, i64 16, !8, i64 24}
!13 = !{!"int", !9, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !9, i64 0}
!16 = !{!13, !13, i64 0}
!17 = !{!12, !8, i64 16}
!18 = !{!12, !8, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!12, !13, i64 8}
| linux_drivers_net_ethernet_intel_i40e_extr_i40e_ethtool.c_i40e_set_rxfh |
; ModuleID = 'AnghaBench/linux/arch/arm/mach-omap2/extr_sdrc2xxx.c_omap2xxx_sdrc_get_slow_dll_ctrl.c'
source_filename = "AnghaBench/linux/arch/arm/mach-omap2/extr_sdrc2xxx.c_omap2xxx_sdrc_get_slow_dll_ctrl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32 }
@mem_timings = dso_local local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @omap2xxx_sdrc_get_slow_dll_ctrl], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i32 @omap2xxx_sdrc_get_slow_dll_ctrl() #0 {
%1 = load i32, ptr @mem_timings, align 4, !tbaa !5
ret i32 %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/arch/arm/mach-omap2/extr_sdrc2xxx.c_omap2xxx_sdrc_get_slow_dll_ctrl.c'
source_filename = "AnghaBench/linux/arch/arm/mach-omap2/extr_sdrc2xxx.c_omap2xxx_sdrc_get_slow_dll_ctrl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32 }
@mem_timings = common local_unnamed_addr global %struct.TYPE_2__ zeroinitializer, align 4
@llvm.used = appending global [1 x ptr] [ptr @omap2xxx_sdrc_get_slow_dll_ctrl], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i32 @omap2xxx_sdrc_get_slow_dll_ctrl() #0 {
%1 = load i32, ptr @mem_timings, align 4, !tbaa !6
ret i32 %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_arch_arm_mach-omap2_extr_sdrc2xxx.c_omap2xxx_sdrc_get_slow_dll_ctrl |
; ModuleID = 'AnghaBench/linux/arch/arm/mach-omap1/extr_irq.c_omap_mask_ack_irq.c'
source_filename = "AnghaBench/linux/arch/arm/mach-omap1/extr_irq.c_omap_mask_ack_irq.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @omap_mask_ack_irq], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @omap_mask_ack_irq(ptr noundef %0) #0 {
%2 = tail call ptr @irq_data_get_chip_type(ptr noundef %0) #2
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = tail call i32 %3(ptr noundef %0) #2
%5 = load i32, ptr %0, align 4, !tbaa !11
%6 = tail call i32 @omap_ack_irq(i32 noundef %5) #2
ret void
}
declare ptr @irq_data_get_chip_type(ptr noundef) local_unnamed_addr #1
declare i32 @omap_ack_irq(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"irq_chip_type", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"irq_data", !13, i64 0}
!13 = !{!"int", !9, i64 0}
| ; ModuleID = 'AnghaBench/linux/arch/arm/mach-omap1/extr_irq.c_omap_mask_ack_irq.c'
source_filename = "AnghaBench/linux/arch/arm/mach-omap1/extr_irq.c_omap_mask_ack_irq.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @omap_mask_ack_irq], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @omap_mask_ack_irq(ptr noundef %0) #0 {
%2 = tail call ptr @irq_data_get_chip_type(ptr noundef %0) #2
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = tail call i32 %3(ptr noundef %0) #2
%5 = load i32, ptr %0, align 4, !tbaa !12
%6 = tail call i32 @omap_ack_irq(i32 noundef %5) #2
ret void
}
declare ptr @irq_data_get_chip_type(ptr noundef) local_unnamed_addr #1
declare i32 @omap_ack_irq(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"irq_chip_type", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!13, !14, i64 0}
!13 = !{!"irq_data", !14, i64 0}
!14 = !{!"int", !10, i64 0}
| linux_arch_arm_mach-omap1_extr_irq.c_omap_mask_ack_irq |
; ModuleID = 'AnghaBench/TDengine/src/util/src/extr_tcompression.c_tsDecompressBigint.c'
source_filename = "AnghaBench/TDengine/src/util/src/extr_tcompression.c_tsDecompressBigint.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ONE_STAGE_COMP = dso_local local_unnamed_addr global i8 0, align 1
@TSDB_DATA_TYPE_BIGINT = dso_local local_unnamed_addr global i32 0, align 4
@TWO_STAGE_COMP = dso_local local_unnamed_addr global i8 0, align 1
; Function Attrs: nounwind uwtable
define dso_local i32 @tsDecompressBigint(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, i8 noundef signext %5, ptr noundef %6, i32 noundef %7) local_unnamed_addr #0 {
%9 = load i8, ptr @ONE_STAGE_COMP, align 1, !tbaa !5
%10 = icmp eq i8 %9, %5
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, ptr @TSDB_DATA_TYPE_BIGINT, align 4, !tbaa !8
%13 = tail call i32 @tsDecompressINTImp(ptr noundef %0, i32 noundef %2, ptr noundef %3, i32 noundef %12) #2
br label %23
14: ; preds = %8
%15 = load i8, ptr @TWO_STAGE_COMP, align 1, !tbaa !5
%16 = icmp eq i8 %15, %5
br i1 %16, label %17, label %21
17: ; preds = %14
%18 = tail call i32 @tsDecompressStringImp(ptr noundef %0, i32 noundef %1, ptr noundef %6, i32 noundef %7) #2
%19 = load i32, ptr @TSDB_DATA_TYPE_BIGINT, align 4, !tbaa !8
%20 = tail call i32 @tsDecompressINTImp(ptr noundef %6, i32 noundef %2, ptr noundef %3, i32 noundef %19) #2
br label %23
21: ; preds = %14
%22 = tail call i32 @assert(i32 noundef 0) #2
br label %23
23: ; preds = %11, %17, %21
%24 = phi i32 [ %13, %11 ], [ %20, %17 ], [ undef, %21 ]
ret i32 %24
}
declare i32 @tsDecompressINTImp(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tsDecompressStringImp(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @assert(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
| ; ModuleID = 'AnghaBench/TDengine/src/util/src/extr_tcompression.c_tsDecompressBigint.c'
source_filename = "AnghaBench/TDengine/src/util/src/extr_tcompression.c_tsDecompressBigint.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ONE_STAGE_COMP = common local_unnamed_addr global i8 0, align 1
@TSDB_DATA_TYPE_BIGINT = common local_unnamed_addr global i32 0, align 4
@TWO_STAGE_COMP = common local_unnamed_addr global i8 0, align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @tsDecompressBigint(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, i8 noundef signext %5, ptr noundef %6, i32 noundef %7) local_unnamed_addr #0 {
%9 = load i8, ptr @ONE_STAGE_COMP, align 1, !tbaa !6
%10 = icmp eq i8 %9, %5
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, ptr @TSDB_DATA_TYPE_BIGINT, align 4, !tbaa !9
%13 = tail call i32 @tsDecompressINTImp(ptr noundef %0, i32 noundef %2, ptr noundef %3, i32 noundef %12) #2
br label %23
14: ; preds = %8
%15 = load i8, ptr @TWO_STAGE_COMP, align 1, !tbaa !6
%16 = icmp eq i8 %15, %5
br i1 %16, label %17, label %21
17: ; preds = %14
%18 = tail call i32 @tsDecompressStringImp(ptr noundef %0, i32 noundef %1, ptr noundef %6, i32 noundef %7) #2
%19 = load i32, ptr @TSDB_DATA_TYPE_BIGINT, align 4, !tbaa !9
%20 = tail call i32 @tsDecompressINTImp(ptr noundef %6, i32 noundef %2, ptr noundef %3, i32 noundef %19) #2
br label %23
21: ; preds = %14
%22 = tail call i32 @assert(i32 noundef 0) #2
br label %23
23: ; preds = %11, %17, %21
%24 = phi i32 [ %13, %11 ], [ %20, %17 ], [ undef, %21 ]
ret i32 %24
}
declare i32 @tsDecompressINTImp(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tsDecompressStringImp(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @assert(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| TDengine_src_util_src_extr_tcompression.c_tsDecompressBigint |
; ModuleID = 'AnghaBench/linux/drivers/leds/extr_leds-ns2.c_create_ns2_led.c'
source_filename = "AnghaBench/linux/drivers/leds/extr_leds-ns2.c_create_ns2_led.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ns2_led = type { i32, i32, i32, i32, i32, i32 }
%struct.ns2_led_data = type { i32, i32, %struct.TYPE_2__, i32, i32, i32, i32, i32 }
%struct.TYPE_2__ = type { i32, i32, i32, i32, i32, ptr, i32, i32 }
@GPIOF_OUT_INIT_HIGH = dso_local local_unnamed_addr global i32 0, align 4
@GPIOF_OUT_INIT_LOW = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [34 x i8] c"%s: failed to setup command GPIO\0A\00", align 1
@.str.1 = private unnamed_addr constant [31 x i8] c"%s: failed to setup slow GPIO\0A\00", align 1
@LED_CORE_SUSPENDRESUME = dso_local local_unnamed_addr global i32 0, align 4
@ns2_led_groups = dso_local local_unnamed_addr global i32 0, align 4
@ns2_led_set_blocking = dso_local local_unnamed_addr global i32 0, align 4
@ns2_led_set = dso_local local_unnamed_addr global i32 0, align 4
@NS_V2_LED_SATA = dso_local local_unnamed_addr global i32 0, align 4
@NS_V2_LED_OFF = dso_local local_unnamed_addr global i32 0, align 4
@LED_OFF = dso_local local_unnamed_addr global i32 0, align 4
@LED_FULL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @create_ns2_led], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @create_ns2_led(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2) #0 {
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
%5 = getelementptr inbounds %struct.ns2_led, ptr %2, i64 0, i32 3
%6 = load i32, ptr %5, align 4, !tbaa !5
%7 = tail call i64 @gpio_get_value_cansleep(i32 noundef %6) #4
%8 = icmp eq i64 %7, 0
%9 = load i32, ptr @GPIOF_OUT_INIT_HIGH, align 4
%10 = load i32, ptr @GPIOF_OUT_INIT_LOW, align 4
%11 = select i1 %8, i32 %10, i32 %9
%12 = getelementptr inbounds %struct.ns2_led, ptr %2, i64 0, i32 5
%13 = load i32, ptr %12, align 4, !tbaa !10
%14 = tail call i32 @devm_gpio_request_one(ptr noundef %0, i32 noundef %6, i32 noundef %11, i32 noundef %13) #4
%15 = icmp eq i32 %14, 0
br i1 %15, label %19, label %16
16: ; preds = %3
%17 = load i32, ptr %12, align 4, !tbaa !10
%18 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %17) #4
br label %80
19: ; preds = %3
%20 = getelementptr inbounds %struct.ns2_led, ptr %2, i64 0, i32 2
%21 = load i32, ptr %20, align 4, !tbaa !11
%22 = tail call i64 @gpio_get_value_cansleep(i32 noundef %21) #4
%23 = icmp eq i64 %22, 0
%24 = load i32, ptr @GPIOF_OUT_INIT_HIGH, align 4
%25 = load i32, ptr @GPIOF_OUT_INIT_LOW, align 4
%26 = select i1 %23, i32 %25, i32 %24
%27 = load i32, ptr %12, align 4, !tbaa !10
%28 = tail call i32 @devm_gpio_request_one(ptr noundef %0, i32 noundef %21, i32 noundef %26, i32 noundef %27) #4
%29 = icmp eq i32 %28, 0
br i1 %29, label %33, label %30
30: ; preds = %19
%31 = load i32, ptr %12, align 4, !tbaa !10
%32 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str.1, i32 noundef %31) #4
br label %80
33: ; preds = %19
%34 = getelementptr inbounds %struct.ns2_led_data, ptr %1, i64 0, i32 7
%35 = tail call i32 @rwlock_init(ptr noundef nonnull %34) #4
%36 = getelementptr inbounds %struct.ns2_led_data, ptr %1, i64 0, i32 2
%37 = getelementptr inbounds %struct.ns2_led, ptr %2, i64 0, i32 4
%38 = getelementptr inbounds %struct.ns2_led_data, ptr %1, i64 0, i32 2, i32 6
%39 = load <2 x i32>, ptr %37, align 4, !tbaa !12
store <2 x i32> %39, ptr %38, align 8, !tbaa !12
%40 = getelementptr inbounds %struct.ns2_led_data, ptr %1, i64 0, i32 2, i32 5
store ptr null, ptr %40, align 8, !tbaa !13
%41 = load i32, ptr @LED_CORE_SUSPENDRESUME, align 4, !tbaa !12
%42 = getelementptr inbounds %struct.ns2_led_data, ptr %1, i64 0, i32 2, i32 4
%43 = load i32, ptr %42, align 8, !tbaa !17
%44 = or i32 %43, %41
store i32 %44, ptr %42, align 8, !tbaa !17
%45 = load i32, ptr @ns2_led_groups, align 4, !tbaa !12
%46 = getelementptr inbounds %struct.ns2_led_data, ptr %1, i64 0, i32 2, i32 3
store i32 %45, ptr %46, align 4, !tbaa !18
%47 = load i32, ptr %5, align 4, !tbaa !5
%48 = getelementptr inbounds %struct.ns2_led_data, ptr %1, i64 0, i32 6
store i32 %47, ptr %48, align 4, !tbaa !19
%49 = load i32, ptr %20, align 4, !tbaa !11
%50 = getelementptr inbounds %struct.ns2_led_data, ptr %1, i64 0, i32 5
store i32 %49, ptr %50, align 8, !tbaa !20
%51 = tail call i32 @gpio_cansleep(i32 noundef %47) #4
%52 = load i32, ptr %50, align 8, !tbaa !20
%53 = tail call i32 @gpio_cansleep(i32 noundef %52) #4
%54 = or i32 %53, %51
store i32 %54, ptr %1, align 8, !tbaa !21
%55 = icmp eq i32 %54, 0
br i1 %55, label %59, label %56
56: ; preds = %33
%57 = load i32, ptr @ns2_led_set_blocking, align 4, !tbaa !12
%58 = getelementptr inbounds %struct.ns2_led_data, ptr %1, i64 0, i32 2, i32 2
store i32 %57, ptr %58, align 8, !tbaa !22
br label %62
59: ; preds = %33
%60 = load i32, ptr @ns2_led_set, align 4, !tbaa !12
%61 = getelementptr inbounds %struct.ns2_led_data, ptr %1, i64 0, i32 2, i32 1
store i32 %60, ptr %61, align 4, !tbaa !23
br label %62
62: ; preds = %59, %56
%63 = getelementptr inbounds %struct.ns2_led_data, ptr %1, i64 0, i32 3
%64 = load <2 x i32>, ptr %2, align 4, !tbaa !12
store <2 x i32> %64, ptr %63, align 8, !tbaa !12
%65 = call i32 @ns2_led_get_mode(ptr noundef nonnull %1, ptr noundef nonnull %4) #4
%66 = icmp slt i32 %65, 0
br i1 %66, label %80, label %67
67: ; preds = %62
%68 = load i32, ptr %4, align 4, !tbaa !12
%69 = load i32, ptr @NS_V2_LED_SATA, align 4, !tbaa !12
%70 = icmp eq i32 %68, %69
%71 = zext i1 %70 to i32
%72 = getelementptr inbounds %struct.ns2_led_data, ptr %1, i64 0, i32 1
store i32 %71, ptr %72, align 4, !tbaa !24
%73 = load i32, ptr @NS_V2_LED_OFF, align 4, !tbaa !12
%74 = icmp eq i32 %68, %73
%75 = load i32, ptr @LED_OFF, align 4
%76 = load i32, ptr @LED_FULL, align 4
%77 = select i1 %74, i32 %75, i32 %76
store i32 %77, ptr %36, align 8, !tbaa !25
%78 = call i32 @led_classdev_register(ptr noundef %0, ptr noundef nonnull %36) #4
%79 = call i32 @llvm.smin.i32(i32 %78, i32 0)
br label %80
80: ; preds = %67, %62, %30, %16
%81 = phi i32 [ %14, %16 ], [ %28, %30 ], [ %65, %62 ], [ %79, %67 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
ret i32 %81
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @devm_gpio_request_one(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @gpio_get_value_cansleep(i32 noundef) local_unnamed_addr #2
declare i32 @dev_err(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @rwlock_init(ptr noundef) local_unnamed_addr #2
declare i32 @gpio_cansleep(i32 noundef) local_unnamed_addr #2
declare i32 @ns2_led_get_mode(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @led_classdev_register(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 12}
!6 = !{!"ns2_led", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 20}
!11 = !{!6, !7, i64 8}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !16, i64 32}
!14 = !{!"ns2_led_data", !7, i64 0, !7, i64 4, !15, i64 8, !7, i64 48, !7, i64 52, !7, i64 56, !7, i64 60, !7, i64 64}
!15 = !{!"TYPE_2__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !16, i64 24, !7, i64 32, !7, i64 36}
!16 = !{!"any pointer", !8, i64 0}
!17 = !{!14, !7, i64 24}
!18 = !{!14, !7, i64 20}
!19 = !{!14, !7, i64 60}
!20 = !{!14, !7, i64 56}
!21 = !{!14, !7, i64 0}
!22 = !{!14, !7, i64 16}
!23 = !{!14, !7, i64 12}
!24 = !{!14, !7, i64 4}
!25 = !{!14, !7, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/leds/extr_leds-ns2.c_create_ns2_led.c'
source_filename = "AnghaBench/linux/drivers/leds/extr_leds-ns2.c_create_ns2_led.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GPIOF_OUT_INIT_HIGH = common local_unnamed_addr global i32 0, align 4
@GPIOF_OUT_INIT_LOW = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [34 x i8] c"%s: failed to setup command GPIO\0A\00", align 1
@.str.1 = private unnamed_addr constant [31 x i8] c"%s: failed to setup slow GPIO\0A\00", align 1
@LED_CORE_SUSPENDRESUME = common local_unnamed_addr global i32 0, align 4
@ns2_led_groups = common local_unnamed_addr global i32 0, align 4
@ns2_led_set_blocking = common local_unnamed_addr global i32 0, align 4
@ns2_led_set = common local_unnamed_addr global i32 0, align 4
@NS_V2_LED_SATA = common local_unnamed_addr global i32 0, align 4
@NS_V2_LED_OFF = common local_unnamed_addr global i32 0, align 4
@LED_OFF = common local_unnamed_addr global i32 0, align 4
@LED_FULL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @create_ns2_led], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @create_ns2_led(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2) #0 {
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
%5 = getelementptr inbounds i8, ptr %2, i64 12
%6 = load i32, ptr %5, align 4, !tbaa !6
%7 = tail call i64 @gpio_get_value_cansleep(i32 noundef %6) #4
%8 = icmp eq i64 %7, 0
%9 = load i32, ptr @GPIOF_OUT_INIT_HIGH, align 4
%10 = load i32, ptr @GPIOF_OUT_INIT_LOW, align 4
%11 = select i1 %8, i32 %10, i32 %9
%12 = getelementptr inbounds i8, ptr %2, i64 20
%13 = load i32, ptr %12, align 4, !tbaa !11
%14 = tail call i32 @devm_gpio_request_one(ptr noundef %0, i32 noundef %6, i32 noundef %11, i32 noundef %13) #4
%15 = icmp eq i32 %14, 0
br i1 %15, label %19, label %16
16: ; preds = %3
%17 = load i32, ptr %12, align 4, !tbaa !11
%18 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %17) #4
br label %80
19: ; preds = %3
%20 = getelementptr inbounds i8, ptr %2, i64 8
%21 = load i32, ptr %20, align 4, !tbaa !12
%22 = tail call i64 @gpio_get_value_cansleep(i32 noundef %21) #4
%23 = icmp eq i64 %22, 0
%24 = load i32, ptr @GPIOF_OUT_INIT_HIGH, align 4
%25 = load i32, ptr @GPIOF_OUT_INIT_LOW, align 4
%26 = select i1 %23, i32 %25, i32 %24
%27 = load i32, ptr %12, align 4, !tbaa !11
%28 = tail call i32 @devm_gpio_request_one(ptr noundef %0, i32 noundef %21, i32 noundef %26, i32 noundef %27) #4
%29 = icmp eq i32 %28, 0
br i1 %29, label %33, label %30
30: ; preds = %19
%31 = load i32, ptr %12, align 4, !tbaa !11
%32 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str.1, i32 noundef %31) #4
br label %80
33: ; preds = %19
%34 = getelementptr inbounds i8, ptr %1, i64 64
%35 = tail call i32 @rwlock_init(ptr noundef nonnull %34) #4
%36 = getelementptr inbounds i8, ptr %1, i64 8
%37 = getelementptr inbounds i8, ptr %2, i64 16
%38 = getelementptr inbounds i8, ptr %1, i64 40
%39 = load <2 x i32>, ptr %37, align 4, !tbaa !13
store <2 x i32> %39, ptr %38, align 8, !tbaa !13
%40 = getelementptr inbounds i8, ptr %1, i64 32
store ptr null, ptr %40, align 8, !tbaa !14
%41 = load i32, ptr @LED_CORE_SUSPENDRESUME, align 4, !tbaa !13
%42 = getelementptr inbounds i8, ptr %1, i64 24
%43 = load i32, ptr %42, align 8, !tbaa !18
%44 = or i32 %43, %41
store i32 %44, ptr %42, align 8, !tbaa !18
%45 = load i32, ptr @ns2_led_groups, align 4, !tbaa !13
%46 = getelementptr inbounds i8, ptr %1, i64 20
store i32 %45, ptr %46, align 4, !tbaa !19
%47 = load i32, ptr %5, align 4, !tbaa !6
%48 = getelementptr inbounds i8, ptr %1, i64 60
store i32 %47, ptr %48, align 4, !tbaa !20
%49 = load i32, ptr %20, align 4, !tbaa !12
%50 = getelementptr inbounds i8, ptr %1, i64 56
store i32 %49, ptr %50, align 8, !tbaa !21
%51 = tail call i32 @gpio_cansleep(i32 noundef %47) #4
%52 = load i32, ptr %50, align 8, !tbaa !21
%53 = tail call i32 @gpio_cansleep(i32 noundef %52) #4
%54 = or i32 %53, %51
store i32 %54, ptr %1, align 8, !tbaa !22
%55 = icmp eq i32 %54, 0
br i1 %55, label %59, label %56
56: ; preds = %33
%57 = load i32, ptr @ns2_led_set_blocking, align 4, !tbaa !13
%58 = getelementptr inbounds i8, ptr %1, i64 16
store i32 %57, ptr %58, align 8, !tbaa !23
br label %62
59: ; preds = %33
%60 = load i32, ptr @ns2_led_set, align 4, !tbaa !13
%61 = getelementptr inbounds i8, ptr %1, i64 12
store i32 %60, ptr %61, align 4, !tbaa !24
br label %62
62: ; preds = %59, %56
%63 = getelementptr inbounds i8, ptr %1, i64 48
%64 = load <2 x i32>, ptr %2, align 4, !tbaa !13
store <2 x i32> %64, ptr %63, align 8, !tbaa !13
%65 = call i32 @ns2_led_get_mode(ptr noundef nonnull %1, ptr noundef nonnull %4) #4
%66 = icmp slt i32 %65, 0
br i1 %66, label %80, label %67
67: ; preds = %62
%68 = load i32, ptr %4, align 4, !tbaa !13
%69 = load i32, ptr @NS_V2_LED_SATA, align 4, !tbaa !13
%70 = icmp eq i32 %68, %69
%71 = zext i1 %70 to i32
%72 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %71, ptr %72, align 4, !tbaa !25
%73 = load i32, ptr @NS_V2_LED_OFF, align 4, !tbaa !13
%74 = icmp eq i32 %68, %73
%75 = load i32, ptr @LED_OFF, align 4
%76 = load i32, ptr @LED_FULL, align 4
%77 = select i1 %74, i32 %75, i32 %76
store i32 %77, ptr %36, align 8, !tbaa !26
%78 = call i32 @led_classdev_register(ptr noundef %0, ptr noundef nonnull %36) #4
%79 = call i32 @llvm.smin.i32(i32 %78, i32 0)
br label %80
80: ; preds = %67, %62, %30, %16
%81 = phi i32 [ %14, %16 ], [ %28, %30 ], [ %65, %62 ], [ %79, %67 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
ret i32 %81
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @devm_gpio_request_one(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @gpio_get_value_cansleep(i32 noundef) local_unnamed_addr #2
declare i32 @dev_err(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @rwlock_init(ptr noundef) local_unnamed_addr #2
declare i32 @gpio_cansleep(i32 noundef) local_unnamed_addr #2
declare i32 @ns2_led_get_mode(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @led_classdev_register(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 12}
!7 = !{!"ns2_led", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 20}
!12 = !{!7, !8, i64 8}
!13 = !{!8, !8, i64 0}
!14 = !{!15, !17, i64 32}
!15 = !{!"ns2_led_data", !8, i64 0, !8, i64 4, !16, i64 8, !8, i64 48, !8, i64 52, !8, i64 56, !8, i64 60, !8, i64 64}
!16 = !{!"TYPE_2__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !17, i64 24, !8, i64 32, !8, i64 36}
!17 = !{!"any pointer", !9, i64 0}
!18 = !{!15, !8, i64 24}
!19 = !{!15, !8, i64 20}
!20 = !{!15, !8, i64 60}
!21 = !{!15, !8, i64 56}
!22 = !{!15, !8, i64 0}
!23 = !{!15, !8, i64 16}
!24 = !{!15, !8, i64 12}
!25 = !{!15, !8, i64 4}
!26 = !{!15, !8, i64 8}
| linux_drivers_leds_extr_leds-ns2.c_create_ns2_led |
; ModuleID = 'AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_entry.c_archive_entry_nlink.c'
source_filename = "AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_entry.c_archive_entry_nlink.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local i32 @archive_entry_nlink(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
ret i32 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"archive_entry", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_entry.c_archive_entry_nlink.c'
source_filename = "AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_entry.c_archive_entry_nlink.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define i32 @archive_entry_nlink(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
ret i32 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"archive_entry", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_libarchive_libarchive_extr_archive_entry.c_archive_entry_nlink |
; ModuleID = 'AnghaBench/freebsd/tools/tools/switch_tls/extr_switch_tls.c_getxpcblist.c'
source_filename = "AnghaBench/freebsd/tools/tools/switch_tls/extr_switch_tls.c_getxpcblist.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [16 x i8] c"sysctlbyname %s\00", align 1
@.str.1 = private unnamed_addr constant [12 x i8] c"%s is empty\00", align 1
@.str.2 = private unnamed_addr constant [14 x i8] c"malloc failed\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @getxpcblist], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef ptr @getxpcblist(ptr noundef %0) #0 {
%2 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
store i64 0, ptr %2, align 8, !tbaa !5
%3 = call i32 @sysctlbyname(ptr noundef %0, ptr noundef null, ptr noundef nonnull %2, ptr noundef null, i32 noundef 0) #4
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @err(i32 noundef 1, ptr noundef nonnull @.str, ptr noundef %0) #4
br label %7
7: ; preds = %5, %1
%8 = load i64, ptr %2, align 8, !tbaa !5
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = call i32 (i32, ptr, ...) @errx(i32 noundef 1, ptr noundef nonnull @.str.1, ptr noundef %0) #4
%12 = load i64, ptr %2, align 8, !tbaa !5
br label %13
13: ; preds = %10, %7
%14 = phi i64 [ %12, %10 ], [ %8, %7 ]
%15 = call ptr @malloc(i64 noundef %14)
%16 = icmp eq ptr %15, null
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = call i32 (i32, ptr, ...) @errx(i32 noundef 1, ptr noundef nonnull @.str.2) #4
br label %19
19: ; preds = %17, %13
%20 = call i32 @sysctlbyname(ptr noundef %0, ptr noundef %15, ptr noundef nonnull %2, ptr noundef null, i32 noundef 0) #4
%21 = icmp eq i32 %20, -1
br i1 %21, label %22, label %24
22: ; preds = %19
%23 = call i32 @err(i32 noundef 1, ptr noundef nonnull @.str, ptr noundef %0) #4
br label %24
24: ; preds = %22, %19
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #4
ret ptr %15
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @sysctlbyname(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @err(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @errx(i32 noundef, ptr noundef, ...) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @malloc(i64 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/tools/tools/switch_tls/extr_switch_tls.c_getxpcblist.c'
source_filename = "AnghaBench/freebsd/tools/tools/switch_tls/extr_switch_tls.c_getxpcblist.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [16 x i8] c"sysctlbyname %s\00", align 1
@.str.1 = private unnamed_addr constant [12 x i8] c"%s is empty\00", align 1
@.str.2 = private unnamed_addr constant [14 x i8] c"malloc failed\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @getxpcblist], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef ptr @getxpcblist(ptr noundef %0) #0 {
%2 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #4
store i64 0, ptr %2, align 8, !tbaa !6
%3 = call i32 @sysctlbyname(ptr noundef %0, ptr noundef null, ptr noundef nonnull %2, ptr noundef null, i32 noundef 0) #4
%4 = icmp eq i32 %3, -1
br i1 %4, label %5, label %7
5: ; preds = %1
%6 = call i32 @err(i32 noundef 1, ptr noundef nonnull @.str, ptr noundef %0) #4
br label %7
7: ; preds = %5, %1
%8 = load i64, ptr %2, align 8, !tbaa !6
%9 = icmp eq i64 %8, 0
br i1 %9, label %10, label %13
10: ; preds = %7
%11 = call i32 (i32, ptr, ...) @errx(i32 noundef 1, ptr noundef nonnull @.str.1, ptr noundef %0) #4
%12 = load i64, ptr %2, align 8, !tbaa !6
br label %13
13: ; preds = %10, %7
%14 = phi i64 [ %12, %10 ], [ %8, %7 ]
%15 = call ptr @malloc(i64 noundef %14)
%16 = icmp eq ptr %15, null
br i1 %16, label %17, label %19
17: ; preds = %13
%18 = call i32 (i32, ptr, ...) @errx(i32 noundef 1, ptr noundef nonnull @.str.2) #4
br label %19
19: ; preds = %17, %13
%20 = call i32 @sysctlbyname(ptr noundef %0, ptr noundef %15, ptr noundef nonnull %2, ptr noundef null, i32 noundef 0) #4
%21 = icmp eq i32 %20, -1
br i1 %21, label %22, label %24
22: ; preds = %19
%23 = call i32 @err(i32 noundef 1, ptr noundef nonnull @.str, ptr noundef %0) #4
br label %24
24: ; preds = %22, %19
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #4
ret ptr %15
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @sysctlbyname(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @err(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @errx(i32 noundef, ptr noundef, ...) local_unnamed_addr #2
; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @malloc(i64 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_tools_tools_switch_tls_extr_switch_tls.c_getxpcblist |
; ModuleID = 'AnghaBench/linux/drivers/staging/wilc1000/extr_wilc_hif.c_wilc_set_pmkid_info.c'
source_filename = "AnghaBench/linux/drivers/staging/wilc1000/extr_wilc_hif.c_wilc_set_pmkid_info.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.wid = type { i32, ptr, i32, i32 }
@WID_PMKID_INFO = dso_local local_unnamed_addr global i32 0, align 4
@WID_STR = dso_local local_unnamed_addr global i32 0, align 4
@WILC_SET_CFG = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @wilc_set_pmkid_info(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca %struct.wid, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #3
%4 = load i32, ptr @WID_PMKID_INFO, align 4, !tbaa !5
%5 = getelementptr inbounds %struct.wid, ptr %3, i64 0, i32 3
store i32 %4, ptr %5, align 4, !tbaa !9
%6 = load i32, ptr @WID_STR, align 4, !tbaa !5
%7 = getelementptr inbounds %struct.wid, ptr %3, i64 0, i32 2
store i32 %6, ptr %7, align 8, !tbaa !12
%8 = load i32, ptr %1, align 4, !tbaa !13
%9 = shl i32 %8, 2
%10 = or disjoint i32 %9, 1
store i32 %10, ptr %3, align 8, !tbaa !15
%11 = getelementptr inbounds %struct.wid, ptr %3, i64 0, i32 1
store ptr %1, ptr %11, align 8, !tbaa !16
%12 = load i32, ptr @WILC_SET_CFG, align 4, !tbaa !5
%13 = call i32 @wilc_send_config_pkt(ptr noundef %0, i32 noundef %12, ptr noundef nonnull %3, i32 noundef 1) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #3
ret i32 %13
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @wilc_send_config_pkt(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 20}
!10 = !{!"wid", !6, i64 0, !11, i64 8, !6, i64 16, !6, i64 20}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !6, i64 16}
!13 = !{!14, !6, i64 0}
!14 = !{!"wilc_pmkid_attr", !6, i64 0}
!15 = !{!10, !6, i64 0}
!16 = !{!10, !11, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/staging/wilc1000/extr_wilc_hif.c_wilc_set_pmkid_info.c'
source_filename = "AnghaBench/linux/drivers/staging/wilc1000/extr_wilc_hif.c_wilc_set_pmkid_info.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.wid = type { i32, ptr, i32, i32 }
@WID_PMKID_INFO = common local_unnamed_addr global i32 0, align 4
@WID_STR = common local_unnamed_addr global i32 0, align 4
@WILC_SET_CFG = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @wilc_set_pmkid_info(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca %struct.wid, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %3) #3
%4 = load i32, ptr @WID_PMKID_INFO, align 4, !tbaa !6
%5 = getelementptr inbounds i8, ptr %3, i64 20
store i32 %4, ptr %5, align 4, !tbaa !10
%6 = load i32, ptr @WID_STR, align 4, !tbaa !6
%7 = getelementptr inbounds i8, ptr %3, i64 16
store i32 %6, ptr %7, align 8, !tbaa !13
%8 = load i32, ptr %1, align 4, !tbaa !14
%9 = shl i32 %8, 2
%10 = or disjoint i32 %9, 1
store i32 %10, ptr %3, align 8, !tbaa !16
%11 = getelementptr inbounds i8, ptr %3, i64 8
store ptr %1, ptr %11, align 8, !tbaa !17
%12 = load i32, ptr @WILC_SET_CFG, align 4, !tbaa !6
%13 = call i32 @wilc_send_config_pkt(ptr noundef %0, i32 noundef %12, ptr noundef nonnull %3, i32 noundef 1) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %3) #3
ret i32 %13
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @wilc_send_config_pkt(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 20}
!11 = !{!"wid", !7, i64 0, !12, i64 8, !7, i64 16, !7, i64 20}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !7, i64 16}
!14 = !{!15, !7, i64 0}
!15 = !{!"wilc_pmkid_attr", !7, i64 0}
!16 = !{!11, !7, i64 0}
!17 = !{!11, !12, i64 8}
| linux_drivers_staging_wilc1000_extr_wilc_hif.c_wilc_set_pmkid_info |
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_ra/extr_ra_loader.c_svn_ra_get_path_relative_to_session.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_ra/extr_ra_loader.c_svn_ra_get_path_relative_to_session.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@SVN_ERR_RA_ILLEGAL_URL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [39 x i8] c"'%s' isn't a child of session URL '%s'\00", align 1
@SVN_NO_ERROR = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local ptr @svn_ra_get_path_relative_to_session(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%6 = load ptr, ptr %0, align 8, !tbaa !5
%7 = load ptr, ptr %6, align 8, !tbaa !10
%8 = call i32 %7(ptr noundef nonnull %0, ptr noundef nonnull %5, ptr noundef %3) #3
%9 = call i32 @SVN_ERR(i32 noundef %8) #3
%10 = load ptr, ptr %5, align 8, !tbaa !12
%11 = call ptr @svn_uri_skip_ancestor(ptr noundef %10, ptr noundef %2, ptr noundef %3) #3
store ptr %11, ptr %1, align 8, !tbaa !12
%12 = icmp eq ptr %11, null
br i1 %12, label %13, label %18
13: ; preds = %4
%14 = load i32, ptr @SVN_ERR_RA_ILLEGAL_URL, align 4, !tbaa !13
%15 = call i32 @_(ptr noundef nonnull @.str) #3
%16 = load ptr, ptr %5, align 8, !tbaa !12
%17 = call ptr @svn_error_createf(i32 noundef %14, ptr noundef null, i32 noundef %15, ptr noundef %2, ptr noundef %16) #3
br label %20
18: ; preds = %4
%19 = load ptr, ptr @SVN_NO_ERROR, align 8, !tbaa !12
br label %20
20: ; preds = %18, %13
%21 = phi ptr [ %19, %18 ], [ %17, %13 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret ptr %21
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @SVN_ERR(i32 noundef) local_unnamed_addr #2
declare ptr @svn_uri_skip_ancestor(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @svn_error_createf(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @_(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_6__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_5__", !7, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_ra/extr_ra_loader.c_svn_ra_get_path_relative_to_session.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_ra/extr_ra_loader.c_svn_ra_get_path_relative_to_session.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SVN_ERR_RA_ILLEGAL_URL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [39 x i8] c"'%s' isn't a child of session URL '%s'\00", align 1
@SVN_NO_ERROR = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @svn_ra_get_path_relative_to_session(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%6 = load ptr, ptr %0, align 8, !tbaa !6
%7 = load ptr, ptr %6, align 8, !tbaa !11
%8 = call i32 %7(ptr noundef nonnull %0, ptr noundef nonnull %5, ptr noundef %3) #3
%9 = call i32 @SVN_ERR(i32 noundef %8) #3
%10 = load ptr, ptr %5, align 8, !tbaa !13
%11 = call ptr @svn_uri_skip_ancestor(ptr noundef %10, ptr noundef %2, ptr noundef %3) #3
store ptr %11, ptr %1, align 8, !tbaa !13
%12 = icmp eq ptr %11, null
br i1 %12, label %13, label %18
13: ; preds = %4
%14 = load i32, ptr @SVN_ERR_RA_ILLEGAL_URL, align 4, !tbaa !14
%15 = call i32 @_(ptr noundef nonnull @.str) #3
%16 = load ptr, ptr %5, align 8, !tbaa !13
%17 = call ptr @svn_error_createf(i32 noundef %14, ptr noundef null, i32 noundef %15, ptr noundef %2, ptr noundef %16) #3
br label %20
18: ; preds = %4
%19 = load ptr, ptr @SVN_NO_ERROR, align 8, !tbaa !13
br label %20
20: ; preds = %18, %13
%21 = phi ptr [ %19, %18 ], [ %17, %13 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret ptr %21
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @SVN_ERR(i32 noundef) local_unnamed_addr #2
declare ptr @svn_uri_skip_ancestor(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @svn_error_createf(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @_(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_5__", !8, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !9, i64 0}
| freebsd_contrib_subversion_subversion_libsvn_ra_extr_ra_loader.c_svn_ra_get_path_relative_to_session |
; ModuleID = 'AnghaBench/Quake-III-Arena/code/q3_ui/extr_ui_atoms.c_UI_Cache_f.c'
source_filename = "AnghaBench/Quake-III-Arena/code/q3_ui/extr_ui_atoms.c_UI_Cache_f.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @UI_Cache_f() local_unnamed_addr #0 {
%1 = tail call i32 (...) @MainMenu_Cache() #2
%2 = tail call i32 (...) @InGame_Cache() #2
%3 = tail call i32 (...) @ConfirmMenu_Cache() #2
%4 = tail call i32 (...) @PlayerModel_Cache() #2
%5 = tail call i32 (...) @PlayerSettings_Cache() #2
%6 = tail call i32 (...) @Controls_Cache() #2
%7 = tail call i32 (...) @Demos_Cache() #2
%8 = tail call i32 (...) @UI_CinematicsMenu_Cache() #2
%9 = tail call i32 (...) @Preferences_Cache() #2
%10 = tail call i32 (...) @ServerInfo_Cache() #2
%11 = tail call i32 (...) @SpecifyServer_Cache() #2
%12 = tail call i32 (...) @ArenaServers_Cache() #2
%13 = tail call i32 (...) @StartServer_Cache() #2
%14 = tail call i32 (...) @ServerOptions_Cache() #2
%15 = tail call i32 (...) @DriverInfo_Cache() #2
%16 = tail call i32 (...) @GraphicsOptions_Cache() #2
%17 = tail call i32 (...) @UI_DisplayOptionsMenu_Cache() #2
%18 = tail call i32 (...) @UI_SoundOptionsMenu_Cache() #2
%19 = tail call i32 (...) @UI_NetworkOptionsMenu_Cache() #2
%20 = tail call i32 (...) @UI_SPLevelMenu_Cache() #2
%21 = tail call i32 (...) @UI_SPSkillMenu_Cache() #2
%22 = tail call i32 (...) @UI_SPPostgameMenu_Cache() #2
%23 = tail call i32 (...) @TeamMain_Cache() #2
%24 = tail call i32 (...) @UI_AddBots_Cache() #2
%25 = tail call i32 (...) @UI_RemoveBots_Cache() #2
%26 = tail call i32 (...) @UI_SetupMenu_Cache() #2
%27 = tail call i32 (...) @UI_BotSelectMenu_Cache() #2
%28 = tail call i32 (...) @UI_CDKeyMenu_Cache() #2
%29 = tail call i32 (...) @UI_ModsMenu_Cache() #2
ret void
}
declare i32 @MainMenu_Cache(...) local_unnamed_addr #1
declare i32 @InGame_Cache(...) local_unnamed_addr #1
declare i32 @ConfirmMenu_Cache(...) local_unnamed_addr #1
declare i32 @PlayerModel_Cache(...) local_unnamed_addr #1
declare i32 @PlayerSettings_Cache(...) local_unnamed_addr #1
declare i32 @Controls_Cache(...) local_unnamed_addr #1
declare i32 @Demos_Cache(...) local_unnamed_addr #1
declare i32 @UI_CinematicsMenu_Cache(...) local_unnamed_addr #1
declare i32 @Preferences_Cache(...) local_unnamed_addr #1
declare i32 @ServerInfo_Cache(...) local_unnamed_addr #1
declare i32 @SpecifyServer_Cache(...) local_unnamed_addr #1
declare i32 @ArenaServers_Cache(...) local_unnamed_addr #1
declare i32 @StartServer_Cache(...) local_unnamed_addr #1
declare i32 @ServerOptions_Cache(...) local_unnamed_addr #1
declare i32 @DriverInfo_Cache(...) local_unnamed_addr #1
declare i32 @GraphicsOptions_Cache(...) local_unnamed_addr #1
declare i32 @UI_DisplayOptionsMenu_Cache(...) local_unnamed_addr #1
declare i32 @UI_SoundOptionsMenu_Cache(...) local_unnamed_addr #1
declare i32 @UI_NetworkOptionsMenu_Cache(...) local_unnamed_addr #1
declare i32 @UI_SPLevelMenu_Cache(...) local_unnamed_addr #1
declare i32 @UI_SPSkillMenu_Cache(...) local_unnamed_addr #1
declare i32 @UI_SPPostgameMenu_Cache(...) local_unnamed_addr #1
declare i32 @TeamMain_Cache(...) local_unnamed_addr #1
declare i32 @UI_AddBots_Cache(...) local_unnamed_addr #1
declare i32 @UI_RemoveBots_Cache(...) local_unnamed_addr #1
declare i32 @UI_SetupMenu_Cache(...) local_unnamed_addr #1
declare i32 @UI_BotSelectMenu_Cache(...) local_unnamed_addr #1
declare i32 @UI_CDKeyMenu_Cache(...) local_unnamed_addr #1
declare i32 @UI_ModsMenu_Cache(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/Quake-III-Arena/code/q3_ui/extr_ui_atoms.c_UI_Cache_f.c'
source_filename = "AnghaBench/Quake-III-Arena/code/q3_ui/extr_ui_atoms.c_UI_Cache_f.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @UI_Cache_f() local_unnamed_addr #0 {
%1 = tail call i32 @MainMenu_Cache() #2
%2 = tail call i32 @InGame_Cache() #2
%3 = tail call i32 @ConfirmMenu_Cache() #2
%4 = tail call i32 @PlayerModel_Cache() #2
%5 = tail call i32 @PlayerSettings_Cache() #2
%6 = tail call i32 @Controls_Cache() #2
%7 = tail call i32 @Demos_Cache() #2
%8 = tail call i32 @UI_CinematicsMenu_Cache() #2
%9 = tail call i32 @Preferences_Cache() #2
%10 = tail call i32 @ServerInfo_Cache() #2
%11 = tail call i32 @SpecifyServer_Cache() #2
%12 = tail call i32 @ArenaServers_Cache() #2
%13 = tail call i32 @StartServer_Cache() #2
%14 = tail call i32 @ServerOptions_Cache() #2
%15 = tail call i32 @DriverInfo_Cache() #2
%16 = tail call i32 @GraphicsOptions_Cache() #2
%17 = tail call i32 @UI_DisplayOptionsMenu_Cache() #2
%18 = tail call i32 @UI_SoundOptionsMenu_Cache() #2
%19 = tail call i32 @UI_NetworkOptionsMenu_Cache() #2
%20 = tail call i32 @UI_SPLevelMenu_Cache() #2
%21 = tail call i32 @UI_SPSkillMenu_Cache() #2
%22 = tail call i32 @UI_SPPostgameMenu_Cache() #2
%23 = tail call i32 @TeamMain_Cache() #2
%24 = tail call i32 @UI_AddBots_Cache() #2
%25 = tail call i32 @UI_RemoveBots_Cache() #2
%26 = tail call i32 @UI_SetupMenu_Cache() #2
%27 = tail call i32 @UI_BotSelectMenu_Cache() #2
%28 = tail call i32 @UI_CDKeyMenu_Cache() #2
%29 = tail call i32 @UI_ModsMenu_Cache() #2
ret void
}
declare i32 @MainMenu_Cache(...) local_unnamed_addr #1
declare i32 @InGame_Cache(...) local_unnamed_addr #1
declare i32 @ConfirmMenu_Cache(...) local_unnamed_addr #1
declare i32 @PlayerModel_Cache(...) local_unnamed_addr #1
declare i32 @PlayerSettings_Cache(...) local_unnamed_addr #1
declare i32 @Controls_Cache(...) local_unnamed_addr #1
declare i32 @Demos_Cache(...) local_unnamed_addr #1
declare i32 @UI_CinematicsMenu_Cache(...) local_unnamed_addr #1
declare i32 @Preferences_Cache(...) local_unnamed_addr #1
declare i32 @ServerInfo_Cache(...) local_unnamed_addr #1
declare i32 @SpecifyServer_Cache(...) local_unnamed_addr #1
declare i32 @ArenaServers_Cache(...) local_unnamed_addr #1
declare i32 @StartServer_Cache(...) local_unnamed_addr #1
declare i32 @ServerOptions_Cache(...) local_unnamed_addr #1
declare i32 @DriverInfo_Cache(...) local_unnamed_addr #1
declare i32 @GraphicsOptions_Cache(...) local_unnamed_addr #1
declare i32 @UI_DisplayOptionsMenu_Cache(...) local_unnamed_addr #1
declare i32 @UI_SoundOptionsMenu_Cache(...) local_unnamed_addr #1
declare i32 @UI_NetworkOptionsMenu_Cache(...) local_unnamed_addr #1
declare i32 @UI_SPLevelMenu_Cache(...) local_unnamed_addr #1
declare i32 @UI_SPSkillMenu_Cache(...) local_unnamed_addr #1
declare i32 @UI_SPPostgameMenu_Cache(...) local_unnamed_addr #1
declare i32 @TeamMain_Cache(...) local_unnamed_addr #1
declare i32 @UI_AddBots_Cache(...) local_unnamed_addr #1
declare i32 @UI_RemoveBots_Cache(...) local_unnamed_addr #1
declare i32 @UI_SetupMenu_Cache(...) local_unnamed_addr #1
declare i32 @UI_BotSelectMenu_Cache(...) local_unnamed_addr #1
declare i32 @UI_CDKeyMenu_Cache(...) local_unnamed_addr #1
declare i32 @UI_ModsMenu_Cache(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| Quake-III-Arena_code_q3_ui_extr_ui_atoms.c_UI_Cache_f |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/display/extr_vlv_dsi.c_pixel_format_from_register_bits.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/display/extr_vlv_dsi.c_pixel_format_from_register_bits.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MIPI_DSI_FMT_RGB888 = dso_local local_unnamed_addr global i32 0, align 4
@MIPI_DSI_FMT_RGB666 = dso_local local_unnamed_addr global i32 0, align 4
@MIPI_DSI_FMT_RGB666_PACKED = dso_local local_unnamed_addr global i32 0, align 4
@MIPI_DSI_FMT_RGB565 = dso_local local_unnamed_addr global i32 0, align 4
@switch.table.pixel_format_from_register_bits = private unnamed_addr constant [4 x ptr] [ptr @MIPI_DSI_FMT_RGB888, ptr @MIPI_DSI_FMT_RGB666_PACKED, ptr @MIPI_DSI_FMT_RGB666, ptr @MIPI_DSI_FMT_RGB565], align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @pixel_format_from_register_bits(i32 noundef %0) local_unnamed_addr #0 {
%2 = add i32 %0, -128
%3 = icmp ult i32 %2, 4
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @MISSING_CASE(i32 noundef %0) #2
br label %10
6: ; preds = %1
%7 = zext nneg i32 %2 to i64
%8 = getelementptr inbounds [4 x ptr], ptr @switch.table.pixel_format_from_register_bits, i64 0, i64 %7
%9 = load ptr, ptr %8, align 8
br label %10
10: ; preds = %6, %4
%11 = phi ptr [ @MIPI_DSI_FMT_RGB666, %4 ], [ %9, %6 ]
%12 = load i32, ptr %11, align 4, !tbaa !5
ret i32 %12
}
declare i32 @MISSING_CASE(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/display/extr_vlv_dsi.c_pixel_format_from_register_bits.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/display/extr_vlv_dsi.c_pixel_format_from_register_bits.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MIPI_DSI_FMT_RGB888 = common local_unnamed_addr global i32 0, align 4
@MIPI_DSI_FMT_RGB666 = common local_unnamed_addr global i32 0, align 4
@MIPI_DSI_FMT_RGB666_PACKED = common local_unnamed_addr global i32 0, align 4
@MIPI_DSI_FMT_RGB565 = common local_unnamed_addr global i32 0, align 4
@switch.table.pixel_format_from_register_bits = private unnamed_addr constant [4 x ptr] [ptr @MIPI_DSI_FMT_RGB888, ptr @MIPI_DSI_FMT_RGB666_PACKED, ptr @MIPI_DSI_FMT_RGB666, ptr @MIPI_DSI_FMT_RGB565], align 8
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @pixel_format_from_register_bits(i32 noundef %0) local_unnamed_addr #0 {
%2 = add i32 %0, -128
%3 = icmp ult i32 %2, 4
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call i32 @MISSING_CASE(i32 noundef %0) #2
br label %10
6: ; preds = %1
%7 = zext nneg i32 %2 to i64
%8 = getelementptr inbounds [4 x ptr], ptr @switch.table.pixel_format_from_register_bits, i64 0, i64 %7
%9 = load ptr, ptr %8, align 8
br label %10
10: ; preds = %6, %4
%11 = phi ptr [ @MIPI_DSI_FMT_RGB666, %4 ], [ %9, %6 ]
%12 = load i32, ptr %11, align 4, !tbaa !6
ret i32 %12
}
declare i32 @MISSING_CASE(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_drm_i915_display_extr_vlv_dsi.c_pixel_format_from_register_bits |
; ModuleID = 'AnghaBench/fastsocket/kernel/net/sched/extr_cls_api.c_tcf_auto_prio.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sched/extr_cls_api.c_tcf_auto_prio.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @tcf_auto_prio], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i64 @tcf_auto_prio(ptr noundef readonly %0) #0 {
%2 = tail call i64 @TC_H_MAKE(i32 noundef -1073741824, i32 noundef 0) #2
%3 = icmp eq ptr %0, null
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = load i64, ptr %0, align 8, !tbaa !5
%6 = add nsw i64 %5, -1
br label %7
7: ; preds = %4, %1
%8 = phi i64 [ %6, %4 ], [ %2, %1 ]
ret i64 %8
}
declare i64 @TC_H_MAKE(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"tcf_proto", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/sched/extr_cls_api.c_tcf_auto_prio.c'
source_filename = "AnghaBench/fastsocket/kernel/net/sched/extr_cls_api.c_tcf_auto_prio.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @tcf_auto_prio], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i64 @tcf_auto_prio(ptr noundef readonly %0) #0 {
%2 = tail call i64 @TC_H_MAKE(i32 noundef -1073741824, i32 noundef 0) #2
%3 = icmp eq ptr %0, null
br i1 %3, label %7, label %4
4: ; preds = %1
%5 = load i64, ptr %0, align 8, !tbaa !6
%6 = add nsw i64 %5, -1
br label %7
7: ; preds = %4, %1
%8 = phi i64 [ %6, %4 ], [ %2, %1 ]
ret i64 %8
}
declare i64 @TC_H_MAKE(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"tcf_proto", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_net_sched_extr_cls_api.c_tcf_auto_prio |
; ModuleID = 'AnghaBench/linux/tools/testing/selftests/powerpc/tm/extr_tm-resched-dscr.c_tm_resched_dscr.c'
source_filename = "AnghaBench/linux/tools/testing/selftests/powerpc/tm/extr_tm-resched-dscr.c_tm_resched_dscr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@test_body = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @tm_resched_dscr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @tm_resched_dscr() #0 {
%1 = load i32, ptr @test_body, align 4, !tbaa !5
%2 = tail call i32 @eat_cpu(i32 noundef %1) #2
ret i32 %2
}
declare i32 @eat_cpu(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/tools/testing/selftests/powerpc/tm/extr_tm-resched-dscr.c_tm_resched_dscr.c'
source_filename = "AnghaBench/linux/tools/testing/selftests/powerpc/tm/extr_tm-resched-dscr.c_tm_resched_dscr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@test_body = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @tm_resched_dscr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @tm_resched_dscr() #0 {
%1 = load i32, ptr @test_body, align 4, !tbaa !6
%2 = tail call i32 @eat_cpu(i32 noundef %1) #2
ret i32 %2
}
declare i32 @eat_cpu(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_tools_testing_selftests_powerpc_tm_extr_tm-resched-dscr.c_tm_resched_dscr |
; ModuleID = 'AnghaBench/linux/net/bluetooth/extr_mgmt.c_mgmt_set_powered_failed.c'
source_filename = "AnghaBench/linux/net/bluetooth/extr_mgmt.c_mgmt_set_powered_failed.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MGMT_OP_SET_POWERED = dso_local local_unnamed_addr global i32 0, align 4
@ERFKILL = dso_local local_unnamed_addr global i32 0, align 4
@MGMT_STATUS_RFKILLED = dso_local local_unnamed_addr global i32 0, align 4
@MGMT_STATUS_FAILED = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @mgmt_set_powered_failed(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @MGMT_OP_SET_POWERED, align 4, !tbaa !5
%4 = tail call ptr @pending_find(i32 noundef %3, ptr noundef %0) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %18, label %6
6: ; preds = %2
%7 = load i32, ptr @ERFKILL, align 4, !tbaa !5
%8 = sub nsw i32 0, %7
%9 = icmp eq i32 %8, %1
%10 = load i32, ptr @MGMT_STATUS_RFKILLED, align 4
%11 = load i32, ptr @MGMT_STATUS_FAILED, align 4
%12 = select i1 %9, i32 %10, i32 %11
%13 = load i32, ptr %4, align 4, !tbaa !9
%14 = load i32, ptr %0, align 4, !tbaa !11
%15 = load i32, ptr @MGMT_OP_SET_POWERED, align 4, !tbaa !5
%16 = tail call i32 @mgmt_cmd_status(i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef %12) #2
%17 = tail call i32 @mgmt_pending_remove(ptr noundef nonnull %4) #2
br label %18
18: ; preds = %2, %6
ret void
}
declare ptr @pending_find(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mgmt_cmd_status(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mgmt_pending_remove(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"mgmt_pending_cmd", !6, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"hci_dev", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/net/bluetooth/extr_mgmt.c_mgmt_set_powered_failed.c'
source_filename = "AnghaBench/linux/net/bluetooth/extr_mgmt.c_mgmt_set_powered_failed.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MGMT_OP_SET_POWERED = common local_unnamed_addr global i32 0, align 4
@ERFKILL = common local_unnamed_addr global i32 0, align 4
@MGMT_STATUS_RFKILLED = common local_unnamed_addr global i32 0, align 4
@MGMT_STATUS_FAILED = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @mgmt_set_powered_failed(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @MGMT_OP_SET_POWERED, align 4, !tbaa !6
%4 = tail call ptr @pending_find(i32 noundef %3, ptr noundef %0) #2
%5 = icmp eq ptr %4, null
br i1 %5, label %18, label %6
6: ; preds = %2
%7 = load i32, ptr @ERFKILL, align 4, !tbaa !6
%8 = sub nsw i32 0, %7
%9 = icmp eq i32 %8, %1
%10 = load i32, ptr @MGMT_STATUS_RFKILLED, align 4
%11 = load i32, ptr @MGMT_STATUS_FAILED, align 4
%12 = select i1 %9, i32 %10, i32 %11
%13 = load i32, ptr %4, align 4, !tbaa !10
%14 = load i32, ptr %0, align 4, !tbaa !12
%15 = load i32, ptr @MGMT_OP_SET_POWERED, align 4, !tbaa !6
%16 = tail call i32 @mgmt_cmd_status(i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef %12) #2
%17 = tail call i32 @mgmt_pending_remove(ptr noundef nonnull %4) #2
br label %18
18: ; preds = %2, %6
ret void
}
declare ptr @pending_find(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mgmt_cmd_status(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mgmt_pending_remove(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"mgmt_pending_cmd", !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"hci_dev", !7, i64 0}
| linux_net_bluetooth_extr_mgmt.c_mgmt_set_powered_failed |
; ModuleID = 'AnghaBench/darwin-xnu/libkdd/extr_kcdata.h_kcdata_iter_array_valid.c'
source_filename = "AnghaBench/darwin-xnu/libkdd/extr_kcdata.h_kcdata_iter_array_valid.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, i64 }
@KCDATA_TYPE_ARRAY = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @kcdata_iter_array_valid], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @kcdata_iter_array_valid(ptr %0) #0 {
%2 = tail call i32 @kcdata_iter_valid(ptr %0) #2
%3 = icmp eq i32 %2, 0
br i1 %3, label %50, label %4
4: ; preds = %1
%5 = tail call i64 @kcdata_iter_type(ptr %0) #2
%6 = load i64, ptr @KCDATA_TYPE_ARRAY, align 8, !tbaa !5
%7 = icmp eq i64 %5, %6
br i1 %7, label %8, label %50
8: ; preds = %4
%9 = tail call i32 @kcdata_iter_array_elem_count(ptr %0) #2
%10 = icmp eq i32 %9, 0
br i1 %10, label %11, label %14
11: ; preds = %8
%12 = load i32, ptr %0, align 8, !tbaa !9
%13 = icmp eq i32 %12, 0
br label %50
14: ; preds = %8
%15 = getelementptr inbounds %struct.TYPE_8__, ptr %0, i64 0, i32 1
%16 = load i64, ptr %15, align 8, !tbaa !12
%17 = load i64, ptr @KCDATA_TYPE_ARRAY, align 8, !tbaa !5
%18 = icmp eq i64 %16, %17
br i1 %18, label %19, label %31
19: ; preds = %14
%20 = tail call i32 @kcdata_iter_array_size_switch(ptr nonnull %0) #2
%21 = icmp eq i32 %20, 0
br i1 %21, label %50, label %22
22: ; preds = %19
%23 = tail call i32 @kcdata_iter_array_elem_count(ptr nonnull %0) #2
%24 = load i32, ptr %0, align 8, !tbaa !9
%25 = sdiv i32 %24, %20
%26 = icmp sgt i32 %23, %25
br i1 %26, label %50, label %27
27: ; preds = %22
%28 = tail call i32 @kcdata_iter_array_elem_count(ptr nonnull %0) #2
%29 = srem i32 %24, %28
%30 = icmp slt i32 %29, 16
br label %50
31: ; preds = %14
%32 = and i64 %16, 15
%33 = load i32, ptr %0, align 8, !tbaa !9
%34 = sext i32 %33 to i64
%35 = icmp sgt i64 %32, %34
br i1 %35, label %50, label %36
36: ; preds = %31
%37 = tail call i32 @kcdata_iter_array_elem_count(ptr nonnull %0) #2
%38 = sext i32 %37 to i64
%39 = load i32, ptr %0, align 8, !tbaa !9
%40 = sext i32 %39 to i64
%41 = load i64, ptr %15, align 8, !tbaa !12
%42 = and i64 %41, 15
%43 = sub nsw i64 %40, %42
%44 = icmp slt i64 %43, %38
br i1 %44, label %50, label %45
45: ; preds = %36
%46 = tail call i32 @kcdata_iter_array_elem_count(ptr nonnull %0) #2
%47 = sext i32 %46 to i64
%48 = srem i64 %43, %47
%49 = icmp eq i64 %48, 0
br label %50
50: ; preds = %31, %36, %45, %19, %27, %22, %4, %1, %11
%51 = phi i1 [ %13, %11 ], [ false, %1 ], [ false, %4 ], [ false, %19 ], [ false, %22 ], [ %30, %27 ], [ false, %36 ], [ false, %31 ], [ %49, %45 ]
%52 = zext i1 %51 to i32
ret i32 %52
}
declare i32 @kcdata_iter_valid(ptr) local_unnamed_addr #1
declare i64 @kcdata_iter_type(ptr) local_unnamed_addr #1
declare i32 @kcdata_iter_array_elem_count(ptr) local_unnamed_addr #1
declare i32 @kcdata_iter_array_size_switch(ptr) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_8__", !11, i64 0, !6, i64 8}
!11 = !{!"int", !7, i64 0}
!12 = !{!10, !6, i64 8}
| ; ModuleID = 'AnghaBench/darwin-xnu/libkdd/extr_kcdata.h_kcdata_iter_array_valid.c'
source_filename = "AnghaBench/darwin-xnu/libkdd/extr_kcdata.h_kcdata_iter_array_valid.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@KCDATA_TYPE_ARRAY = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @kcdata_iter_array_valid], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @kcdata_iter_array_valid(i64 %0) #0 {
%2 = inttoptr i64 %0 to ptr
%3 = tail call i32 @kcdata_iter_valid(i64 %0) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %51, label %5
5: ; preds = %1
%6 = tail call i64 @kcdata_iter_type(i64 %0) #2
%7 = load i64, ptr @KCDATA_TYPE_ARRAY, align 8, !tbaa !6
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %51
9: ; preds = %5
%10 = tail call i32 @kcdata_iter_array_elem_count(i64 %0) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %15
12: ; preds = %9
%13 = load i32, ptr %2, align 8, !tbaa !10
%14 = icmp eq i32 %13, 0
br label %51
15: ; preds = %9
%16 = getelementptr inbounds i8, ptr %2, i64 8
%17 = load i64, ptr %16, align 8, !tbaa !13
%18 = load i64, ptr @KCDATA_TYPE_ARRAY, align 8, !tbaa !6
%19 = icmp eq i64 %17, %18
br i1 %19, label %20, label %32
20: ; preds = %15
%21 = tail call i32 @kcdata_iter_array_size_switch(i64 %0) #2
%22 = icmp eq i32 %21, 0
br i1 %22, label %51, label %23
23: ; preds = %20
%24 = tail call i32 @kcdata_iter_array_elem_count(i64 %0) #2
%25 = load i32, ptr %2, align 8, !tbaa !10
%26 = sdiv i32 %25, %21
%27 = icmp sgt i32 %24, %26
br i1 %27, label %51, label %28
28: ; preds = %23
%29 = tail call i32 @kcdata_iter_array_elem_count(i64 %0) #2
%30 = srem i32 %25, %29
%31 = icmp slt i32 %30, 16
br label %51
32: ; preds = %15
%33 = and i64 %17, 15
%34 = load i32, ptr %2, align 8, !tbaa !10
%35 = sext i32 %34 to i64
%36 = icmp sgt i64 %33, %35
br i1 %36, label %51, label %37
37: ; preds = %32
%38 = tail call i32 @kcdata_iter_array_elem_count(i64 %0) #2
%39 = sext i32 %38 to i64
%40 = load i32, ptr %2, align 8, !tbaa !10
%41 = sext i32 %40 to i64
%42 = load i64, ptr %16, align 8, !tbaa !13
%43 = and i64 %42, 15
%44 = sub nsw i64 %41, %43
%45 = icmp slt i64 %44, %39
br i1 %45, label %51, label %46
46: ; preds = %37
%47 = tail call i32 @kcdata_iter_array_elem_count(i64 %0) #2
%48 = sext i32 %47 to i64
%49 = srem i64 %44, %48
%50 = icmp eq i64 %49, 0
br label %51
51: ; preds = %32, %37, %46, %20, %28, %23, %5, %1, %12
%52 = phi i1 [ %14, %12 ], [ false, %1 ], [ false, %5 ], [ false, %20 ], [ false, %23 ], [ %31, %28 ], [ false, %37 ], [ false, %32 ], [ %50, %46 ]
%53 = zext i1 %52 to i32
ret i32 %53
}
declare i32 @kcdata_iter_valid(i64) local_unnamed_addr #1
declare i64 @kcdata_iter_type(i64) local_unnamed_addr #1
declare i32 @kcdata_iter_array_elem_count(i64) local_unnamed_addr #1
declare i32 @kcdata_iter_array_size_switch(i64) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_8__", !12, i64 0, !7, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !7, i64 8}
| darwin-xnu_libkdd_extr_kcdata.h_kcdata_iter_array_valid |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/infiniband/hw/cxgb3/extr_cxio_wr.h_cxio_next_hw_cqe.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/infiniband/hw/cxgb3/extr_cxio_wr.h_cxio_next_hw_cqe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.t3_cq = type { i32, i32, ptr }
%struct.t3_cqe = type { i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @cxio_next_hw_cqe], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal ptr @cxio_next_hw_cqe(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds %struct.t3_cq, ptr %0, i64 0, i32 2
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = getelementptr inbounds %struct.t3_cq, ptr %0, i64 0, i32 1
%5 = load i32, ptr %4, align 4, !tbaa !11
%6 = load i32, ptr %0, align 8, !tbaa !12
%7 = tail call i32 @Q_PTR2IDX(i32 noundef %5, i32 noundef %6) #2
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds %struct.t3_cqe, ptr %3, i64 %8
%10 = load i32, ptr %4, align 4, !tbaa !11
%11 = load i32, ptr %0, align 8, !tbaa !12
%12 = tail call i64 @CQ_VLD_ENTRY(i32 noundef %10, i32 noundef %11, ptr noundef %9) #2
%13 = icmp eq i64 %12, 0
%14 = select i1 %13, ptr null, ptr %9
ret ptr %14
}
declare i32 @Q_PTR2IDX(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @CQ_VLD_ENTRY(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"t3_cq", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/infiniband/hw/cxgb3/extr_cxio_wr.h_cxio_next_hw_cqe.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/infiniband/hw/cxgb3/extr_cxio_wr.h_cxio_next_hw_cqe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.t3_cqe = type { i32 }
@llvm.used = appending global [1 x ptr] [ptr @cxio_next_hw_cqe], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal ptr @cxio_next_hw_cqe(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %0, i64 4
%5 = load i32, ptr %4, align 4, !tbaa !12
%6 = load i32, ptr %0, align 8, !tbaa !13
%7 = tail call i32 @Q_PTR2IDX(i32 noundef %5, i32 noundef %6) #2
%8 = sext i32 %7 to i64
%9 = getelementptr inbounds %struct.t3_cqe, ptr %3, i64 %8
%10 = load i32, ptr %4, align 4, !tbaa !12
%11 = load i32, ptr %0, align 8, !tbaa !13
%12 = tail call i64 @CQ_VLD_ENTRY(i32 noundef %10, i32 noundef %11, ptr noundef %9) #2
%13 = icmp eq i64 %12, 0
%14 = select i1 %13, ptr null, ptr %9
ret ptr %14
}
declare i32 @Q_PTR2IDX(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @CQ_VLD_ENTRY(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"t3_cq", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !8, i64 4}
!13 = !{!7, !8, i64 0}
| fastsocket_kernel_drivers_infiniband_hw_cxgb3_extr_cxio_wr.h_cxio_next_hw_cqe |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx4/extr_mcg.c_mlx4_cleanup_mcg_table.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx4/extr_mcg.c_mlx4_cleanup_mcg_table.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MLX4_STEERING_MODE_DEVICE_MANAGED = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local void @mlx4_cleanup_mcg_table(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = load i64, ptr @MLX4_STEERING_MODE_DEVICE_MANAGED, align 8, !tbaa !11
%4 = icmp eq i64 %2, %3
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = tail call ptr @mlx4_priv(ptr noundef nonnull %0) #2
%7 = tail call i32 @mlx4_bitmap_cleanup(ptr noundef %6) #2
br label %8
8: ; preds = %5, %1
ret void
}
declare i32 @mlx4_bitmap_cleanup(ptr noundef) local_unnamed_addr #1
declare ptr @mlx4_priv(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"mlx4_dev", !7, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx4/extr_mcg.c_mlx4_cleanup_mcg_table.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx4/extr_mcg.c_mlx4_cleanup_mcg_table.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MLX4_STEERING_MODE_DEVICE_MANAGED = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @mlx4_cleanup_mcg_table(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = load i64, ptr @MLX4_STEERING_MODE_DEVICE_MANAGED, align 8, !tbaa !12
%4 = icmp eq i64 %2, %3
br i1 %4, label %8, label %5
5: ; preds = %1
%6 = tail call ptr @mlx4_priv(ptr noundef nonnull %0) #2
%7 = tail call i32 @mlx4_bitmap_cleanup(ptr noundef %6) #2
br label %8
8: ; preds = %5, %1
ret void
}
declare i32 @mlx4_bitmap_cleanup(ptr noundef) local_unnamed_addr #1
declare ptr @mlx4_priv(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"mlx4_dev", !8, i64 0}
!8 = !{!"TYPE_4__", !9, i64 0}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!9, !9, i64 0}
| linux_drivers_net_ethernet_mellanox_mlx4_extr_mcg.c_mlx4_cleanup_mcg_table |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_dcb.c_bnx2x_pfc_set.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_dcb.c_bnx2x_pfc_set.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bnx2x_nig_brb_pfc_port_params = type { i32, ptr, i32, i32, i64, i32 }
%struct.bnx2x = type { i32, %struct.TYPE_8__, %struct.TYPE_7__ }
%struct.TYPE_8__ = type { i32 }
%struct.TYPE_7__ = type { %struct.TYPE_6__ }
%struct.TYPE_6__ = type { i32, ptr }
@MAX_PFC_PRIORITIES = dso_local local_unnamed_addr global i32 0, align 4
@FEATURE_CONFIG_PFC_ENABLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @bnx2x_pfc_set], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @bnx2x_pfc_set(ptr noundef %0) #0 {
%2 = alloca %struct.bnx2x_nig_brb_pfc_port_params, align 8
call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %2) #4
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(40) %2, i8 0, i64 40, i1 false)
%3 = getelementptr inbounds %struct.bnx2x, ptr %0, i64 0, i32 2
%4 = load i32, ptr %3, align 8, !tbaa !5
store i32 %4, ptr %2, align 8, !tbaa !14
%5 = icmp sgt i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %9, %1
%7 = load i32, ptr @MAX_PFC_PRIORITIES, align 4, !tbaa !17
%8 = icmp sgt i32 %7, 0
br i1 %8, label %17, label %31
9: ; preds = %1, %9
%10 = phi i64 [ %13, %9 ], [ 0, %1 ]
%11 = tail call i32 @DCBX_PFC_PRI_PAUSE_MASK(ptr noundef nonnull %0) #4
%12 = getelementptr inbounds i32, ptr null, i64 %10
store i32 poison, ptr %12, align 4, !tbaa !17
%13 = add nuw nsw i64 %10, 1
%14 = load i32, ptr %3, align 8, !tbaa !5
%15 = sext i32 %14 to i64
%16 = icmp slt i64 %13, %15
br i1 %16, label %9, label %6, !llvm.loop !18
17: ; preds = %6, %17
%18 = phi i32 [ %28, %17 ], [ 0, %6 ]
%19 = phi i32 [ %27, %17 ], [ 0, %6 ]
%20 = shl nuw i32 1, %18
%21 = tail call i32 @DCBX_PFC_PRI_PAUSE_MASK(ptr noundef %0) #4
%22 = and i32 %21, %20
%23 = icmp eq i32 %22, 0
%24 = shl nsw i32 %18, 2
%25 = shl nuw i32 1, %24
%26 = select i1 %23, i32 %25, i32 0
%27 = or i32 %26, %19
%28 = add nuw nsw i32 %18, 1
%29 = load i32, ptr @MAX_PFC_PRIORITIES, align 4, !tbaa !17
%30 = icmp slt i32 %28, %29
br i1 %30, label %17, label %31, !llvm.loop !20
31: ; preds = %17, %6
%32 = phi i32 [ 0, %6 ], [ %27, %17 ]
%33 = getelementptr inbounds %struct.bnx2x_nig_brb_pfc_port_params, ptr %2, i64 0, i32 2
store i32 %32, ptr %33, align 8, !tbaa !21
%34 = tail call i32 @DCBX_PFC_PRI_PAUSE_MASK(ptr noundef %0) #4
%35 = getelementptr inbounds %struct.bnx2x_nig_brb_pfc_port_params, ptr %2, i64 0, i32 3
store i32 %34, ptr %35, align 4, !tbaa !22
%36 = getelementptr inbounds %struct.bnx2x_nig_brb_pfc_port_params, ptr %2, i64 0, i32 4
store i64 0, ptr %36, align 8, !tbaa !23
%37 = tail call i32 @bnx2x_acquire_phy_lock(ptr noundef %0) #4
%38 = load i32, ptr @FEATURE_CONFIG_PFC_ENABLED, align 4, !tbaa !17
%39 = getelementptr inbounds %struct.bnx2x, ptr %0, i64 0, i32 1
%40 = load i32, ptr %39, align 4, !tbaa !24
%41 = or i32 %40, %38
store i32 %41, ptr %39, align 4, !tbaa !24
%42 = call i32 @bnx2x_update_pfc(ptr noundef nonnull %39, ptr noundef %0, ptr noundef nonnull %2) #4
%43 = call i32 @bnx2x_release_phy_lock(ptr noundef %0) #4
call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %2) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
declare i32 @DCBX_PFC_PRI_PAUSE_MASK(ptr noundef) local_unnamed_addr #3
declare i32 @bnx2x_acquire_phy_lock(ptr noundef) local_unnamed_addr #3
declare i32 @bnx2x_update_pfc(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3
declare i32 @bnx2x_release_phy_lock(ptr noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"bnx2x", !7, i64 0, !10, i64 4, !11, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_8__", !7, i64 0}
!11 = !{!"TYPE_7__", !12, i64 0}
!12 = !{!"TYPE_6__", !7, i64 0, !13, i64 8}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !7, i64 0}
!15 = !{!"bnx2x_nig_brb_pfc_port_params", !7, i64 0, !13, i64 8, !7, i64 16, !7, i64 20, !16, i64 24, !7, i64 32}
!16 = !{!"long", !8, i64 0}
!17 = !{!7, !7, i64 0}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = distinct !{!20, !19}
!21 = !{!15, !7, i64 16}
!22 = !{!15, !7, i64 20}
!23 = !{!15, !16, i64 24}
!24 = !{!6, !7, i64 4}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_dcb.c_bnx2x_pfc_set.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/broadcom/bnx2x/extr_bnx2x_dcb.c_bnx2x_pfc_set.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.bnx2x_nig_brb_pfc_port_params = type { i32, ptr, i32, i32, i64, i32 }
@MAX_PFC_PRIORITIES = common local_unnamed_addr global i32 0, align 4
@FEATURE_CONFIG_PFC_ENABLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @bnx2x_pfc_set], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @bnx2x_pfc_set(ptr noundef %0) #0 {
%2 = alloca %struct.bnx2x_nig_brb_pfc_port_params, align 8
call void @llvm.lifetime.start.p0(i64 40, ptr nonnull %2) #4
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(40) %2, i8 0, i64 40, i1 false)
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load i32, ptr %3, align 8, !tbaa !6
store i32 %4, ptr %2, align 8, !tbaa !15
%5 = icmp sgt i32 %4, 0
br i1 %5, label %9, label %6
6: ; preds = %9, %1
%7 = load i32, ptr @MAX_PFC_PRIORITIES, align 4, !tbaa !18
%8 = icmp sgt i32 %7, 0
br i1 %8, label %17, label %31
9: ; preds = %1, %9
%10 = phi i64 [ %13, %9 ], [ 0, %1 ]
%11 = tail call i32 @DCBX_PFC_PRI_PAUSE_MASK(ptr noundef nonnull %0) #4
%12 = getelementptr inbounds i32, ptr null, i64 %10
store i32 poison, ptr %12, align 4, !tbaa !18
%13 = add nuw nsw i64 %10, 1
%14 = load i32, ptr %3, align 8, !tbaa !6
%15 = sext i32 %14 to i64
%16 = icmp slt i64 %13, %15
br i1 %16, label %9, label %6, !llvm.loop !19
17: ; preds = %6, %17
%18 = phi i32 [ %28, %17 ], [ 0, %6 ]
%19 = phi i32 [ %27, %17 ], [ 0, %6 ]
%20 = shl nuw i32 1, %18
%21 = tail call i32 @DCBX_PFC_PRI_PAUSE_MASK(ptr noundef %0) #4
%22 = and i32 %21, %20
%23 = icmp eq i32 %22, 0
%24 = shl nsw i32 %18, 2
%25 = shl nuw i32 1, %24
%26 = select i1 %23, i32 %25, i32 0
%27 = or i32 %26, %19
%28 = add nuw nsw i32 %18, 1
%29 = load i32, ptr @MAX_PFC_PRIORITIES, align 4, !tbaa !18
%30 = icmp slt i32 %28, %29
br i1 %30, label %17, label %31, !llvm.loop !21
31: ; preds = %17, %6
%32 = phi i32 [ 0, %6 ], [ %27, %17 ]
%33 = getelementptr inbounds i8, ptr %2, i64 16
store i32 %32, ptr %33, align 8, !tbaa !22
%34 = tail call i32 @DCBX_PFC_PRI_PAUSE_MASK(ptr noundef %0) #4
%35 = getelementptr inbounds i8, ptr %2, i64 20
store i32 %34, ptr %35, align 4, !tbaa !23
%36 = getelementptr inbounds i8, ptr %2, i64 24
store i64 0, ptr %36, align 8, !tbaa !24
%37 = tail call i32 @bnx2x_acquire_phy_lock(ptr noundef %0) #4
%38 = load i32, ptr @FEATURE_CONFIG_PFC_ENABLED, align 4, !tbaa !18
%39 = getelementptr inbounds i8, ptr %0, i64 4
%40 = load i32, ptr %39, align 4, !tbaa !25
%41 = or i32 %40, %38
store i32 %41, ptr %39, align 4, !tbaa !25
%42 = call i32 @bnx2x_update_pfc(ptr noundef nonnull %39, ptr noundef %0, ptr noundef nonnull %2) #4
%43 = call i32 @bnx2x_release_phy_lock(ptr noundef %0) #4
call void @llvm.lifetime.end.p0(i64 40, ptr nonnull %2) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
declare i32 @DCBX_PFC_PRI_PAUSE_MASK(ptr noundef) local_unnamed_addr #3
declare i32 @bnx2x_acquire_phy_lock(ptr noundef) local_unnamed_addr #3
declare i32 @bnx2x_update_pfc(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #3
declare i32 @bnx2x_release_phy_lock(ptr noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"bnx2x", !8, i64 0, !11, i64 4, !12, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_8__", !8, i64 0}
!12 = !{!"TYPE_7__", !13, i64 0}
!13 = !{!"TYPE_6__", !8, i64 0, !14, i64 8}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!16, !8, i64 0}
!16 = !{!"bnx2x_nig_brb_pfc_port_params", !8, i64 0, !14, i64 8, !8, i64 16, !8, i64 20, !17, i64 24, !8, i64 32}
!17 = !{!"long", !9, i64 0}
!18 = !{!8, !8, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = distinct !{!21, !20}
!22 = !{!16, !8, i64 16}
!23 = !{!16, !8, i64 20}
!24 = !{!16, !17, i64 24}
!25 = !{!7, !8, i64 4}
| linux_drivers_net_ethernet_broadcom_bnx2x_extr_bnx2x_dcb.c_bnx2x_pfc_set |
; ModuleID = 'AnghaBench/RetroArch/griffin/extr_..retroarch.c_command_event_load_auto_state.c'
source_filename = "AnghaBench/RetroArch/griffin/extr_..retroarch.c_command_event_load_auto_state.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_10__ = type { %struct.TYPE_8__ }
%struct.TYPE_8__ = type { i32 }
@PATH_MAX_LENGTH = dso_local local_unnamed_addr global i32 0, align 4
@configuration_settings = dso_local local_unnamed_addr global ptr null, align 8
@g_extern = dso_local local_unnamed_addr global %struct.TYPE_10__ zeroinitializer, align 4
@.str = private unnamed_addr constant [6 x i8] c".auto\00", align 1
@.str.1 = private unnamed_addr constant [20 x i8] c"%s: %s\0A%s \22%s\22 %s.\0A\00", align 1
@MSG_FOUND_AUTO_SAVESTATE_IN = dso_local local_unnamed_addr global i32 0, align 4
@MSG_AUTOLOADING_SAVESTATE_FROM = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [10 x i8] c"succeeded\00", align 1
@.str.3 = private unnamed_addr constant [7 x i8] c"failed\00", align 1
@RARCH_NETPLAY_CTL_IS_ENABLED = dso_local local_unnamed_addr global i32 0, align 4
@rcheevos_hardcore_active = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @command_event_load_auto_state], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @command_event_load_auto_state() #0 {
%1 = load ptr, ptr @configuration_settings, align 8, !tbaa !5
%2 = load i32, ptr %1, align 4, !tbaa !9
%3 = icmp eq i32 %2, 0
br i1 %3, label %24, label %4
4: ; preds = %0
%5 = load i32, ptr @PATH_MAX_LENGTH, align 4, !tbaa !13
%6 = sext i32 %5 to i64
%7 = tail call i64 @calloc(i32 noundef %5, i32 noundef 1) #2
%8 = inttoptr i64 %7 to ptr
%9 = load i32, ptr @g_extern, align 4, !tbaa !14
%10 = tail call i32 @fill_pathname_noext(ptr noundef %8, i32 noundef %9, ptr noundef nonnull @.str, i64 noundef %6) #2
%11 = tail call i32 @path_is_valid(ptr noundef %8) #2
%12 = icmp eq i32 %11, 0
br i1 %12, label %22, label %13
13: ; preds = %4
%14 = tail call i32 @content_load_state(ptr noundef %8, i32 noundef 0, i32 noundef 1) #2
%15 = load i32, ptr @MSG_FOUND_AUTO_SAVESTATE_IN, align 4, !tbaa !13
%16 = tail call i32 @msg_hash_to_str(i32 noundef %15) #2
%17 = load i32, ptr @MSG_AUTOLOADING_SAVESTATE_FROM, align 4, !tbaa !13
%18 = tail call i32 @msg_hash_to_str(i32 noundef %17) #2
%19 = icmp eq i32 %14, 0
%20 = select i1 %19, ptr @.str.3, ptr @.str.2
%21 = tail call i32 @RARCH_LOG(ptr noundef nonnull @.str.1, i32 noundef %16, ptr noundef %8, i32 noundef %18, ptr noundef %8, ptr noundef nonnull %20) #2
br label %22
22: ; preds = %4, %13
%23 = tail call i32 @free(ptr noundef %8) #2
br label %24
24: ; preds = %22, %0
ret void
}
declare i64 @calloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fill_pathname_noext(ptr noundef, i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @path_is_valid(ptr noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
declare i32 @content_load_state(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @RARCH_LOG(ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @msg_hash_to_str(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 0}
!10 = !{!"TYPE_9__", !11, i64 0}
!11 = !{!"TYPE_7__", !12, i64 0}
!12 = !{!"int", !7, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!15, !12, i64 0}
!15 = !{!"TYPE_10__", !16, i64 0}
!16 = !{!"TYPE_8__", !12, i64 0}
| ; ModuleID = 'AnghaBench/RetroArch/griffin/extr_..retroarch.c_command_event_load_auto_state.c'
source_filename = "AnghaBench/RetroArch/griffin/extr_..retroarch.c_command_event_load_auto_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_10__ = type { %struct.TYPE_8__ }
%struct.TYPE_8__ = type { i32 }
@PATH_MAX_LENGTH = common local_unnamed_addr global i32 0, align 4
@configuration_settings = common local_unnamed_addr global ptr null, align 8
@g_extern = common local_unnamed_addr global %struct.TYPE_10__ zeroinitializer, align 4
@.str = private unnamed_addr constant [6 x i8] c".auto\00", align 1
@.str.1 = private unnamed_addr constant [20 x i8] c"%s: %s\0A%s \22%s\22 %s.\0A\00", align 1
@MSG_FOUND_AUTO_SAVESTATE_IN = common local_unnamed_addr global i32 0, align 4
@MSG_AUTOLOADING_SAVESTATE_FROM = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [10 x i8] c"succeeded\00", align 1
@.str.3 = private unnamed_addr constant [7 x i8] c"failed\00", align 1
@RARCH_NETPLAY_CTL_IS_ENABLED = common local_unnamed_addr global i32 0, align 4
@rcheevos_hardcore_active = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @command_event_load_auto_state], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @command_event_load_auto_state() #0 {
%1 = load ptr, ptr @configuration_settings, align 8, !tbaa !6
%2 = load i32, ptr %1, align 4, !tbaa !10
%3 = icmp eq i32 %2, 0
br i1 %3, label %24, label %4
4: ; preds = %0
%5 = load i32, ptr @PATH_MAX_LENGTH, align 4, !tbaa !14
%6 = sext i32 %5 to i64
%7 = tail call i64 @calloc(i32 noundef %5, i32 noundef 1) #2
%8 = inttoptr i64 %7 to ptr
%9 = load i32, ptr @g_extern, align 4, !tbaa !15
%10 = tail call i32 @fill_pathname_noext(ptr noundef %8, i32 noundef %9, ptr noundef nonnull @.str, i64 noundef %6) #2
%11 = tail call i32 @path_is_valid(ptr noundef %8) #2
%12 = icmp eq i32 %11, 0
br i1 %12, label %22, label %13
13: ; preds = %4
%14 = tail call i32 @content_load_state(ptr noundef %8, i32 noundef 0, i32 noundef 1) #2
%15 = load i32, ptr @MSG_FOUND_AUTO_SAVESTATE_IN, align 4, !tbaa !14
%16 = tail call i32 @msg_hash_to_str(i32 noundef %15) #2
%17 = load i32, ptr @MSG_AUTOLOADING_SAVESTATE_FROM, align 4, !tbaa !14
%18 = tail call i32 @msg_hash_to_str(i32 noundef %17) #2
%19 = icmp eq i32 %14, 0
%20 = select i1 %19, ptr @.str.3, ptr @.str.2
%21 = tail call i32 @RARCH_LOG(ptr noundef nonnull @.str.1, i32 noundef %16, ptr noundef %8, i32 noundef %18, ptr noundef %8, ptr noundef nonnull %20) #2
br label %22
22: ; preds = %4, %13
%23 = tail call i32 @free(ptr noundef %8) #2
br label %24
24: ; preds = %22, %0
ret void
}
declare i64 @calloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fill_pathname_noext(ptr noundef, i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @path_is_valid(ptr noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
declare i32 @content_load_state(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @RARCH_LOG(ptr noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @msg_hash_to_str(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 0}
!11 = !{!"TYPE_9__", !12, i64 0}
!12 = !{!"TYPE_7__", !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!16, !13, i64 0}
!16 = !{!"TYPE_10__", !17, i64 0}
!17 = !{!"TYPE_8__", !13, i64 0}
| RetroArch_griffin_extr_..retroarch.c_command_event_load_auto_state |
; ModuleID = 'AnghaBench/freebsd/sys/rpc/extr_clnt_bck.c_clnt_bck_close.c'
source_filename = "AnghaBench/freebsd/sys/rpc/extr_clnt_bck.c_clnt_bck_close.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ct_data = type { i32, i64, i64 }
@.str = private unnamed_addr constant [9 x i8] c"rpcclose\00", align 1
@.str.1 = private unnamed_addr constant [24 x i8] c"client should be closed\00", align 1
@FALSE = dso_local local_unnamed_addr global i64 0, align 8
@TRUE = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @clnt_bck_close], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @clnt_bck_close(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = inttoptr i64 %2 to ptr
%4 = tail call i32 @mtx_lock(ptr noundef %3) #2
%5 = getelementptr inbounds %struct.ct_data, ptr %3, i64 0, i32 1
%6 = load i64, ptr %5, align 8, !tbaa !10
%7 = icmp eq i64 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = tail call i32 @mtx_unlock(ptr noundef nonnull %3) #2
br label %27
10: ; preds = %1
%11 = getelementptr inbounds %struct.ct_data, ptr %3, i64 0, i32 2
%12 = load i64, ptr %11, align 8, !tbaa !13
%13 = icmp eq i64 %12, 0
br i1 %13, label %22, label %14
14: ; preds = %10, %14
%15 = tail call i32 @msleep(ptr noundef nonnull %3, ptr noundef nonnull %3, i32 noundef 0, ptr noundef nonnull @.str, i32 noundef 0) #2
%16 = load i64, ptr %11, align 8, !tbaa !13
%17 = icmp eq i64 %16, 0
br i1 %17, label %18, label %14, !llvm.loop !14
18: ; preds = %14
%19 = load i64, ptr %5, align 8, !tbaa !10
%20 = tail call i32 @KASSERT(i64 noundef %19, ptr noundef nonnull @.str.1) #2
%21 = tail call i32 @mtx_unlock(ptr noundef nonnull %3) #2
br label %27
22: ; preds = %10
%23 = load i64, ptr @FALSE, align 8, !tbaa !16
store i64 %23, ptr %11, align 8, !tbaa !13
%24 = load i64, ptr @TRUE, align 8, !tbaa !16
store i64 %24, ptr %5, align 8, !tbaa !10
%25 = tail call i32 @mtx_unlock(ptr noundef nonnull %3) #2
%26 = tail call i32 @wakeup(ptr noundef nonnull %3) #2
br label %27
27: ; preds = %22, %18, %8
ret void
}
declare i32 @mtx_lock(ptr noundef) local_unnamed_addr #1
declare i32 @mtx_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @msleep(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @KASSERT(i64 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @wakeup(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"ct_data", !12, i64 0, !7, i64 8, !7, i64 16}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !7, i64 16}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/rpc/extr_clnt_bck.c_clnt_bck_close.c'
source_filename = "AnghaBench/freebsd/sys/rpc/extr_clnt_bck.c_clnt_bck_close.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [9 x i8] c"rpcclose\00", align 1
@.str.1 = private unnamed_addr constant [24 x i8] c"client should be closed\00", align 1
@FALSE = common local_unnamed_addr global i64 0, align 8
@TRUE = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @clnt_bck_close], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @clnt_bck_close(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = inttoptr i64 %2 to ptr
%4 = tail call i32 @mtx_lock(ptr noundef %3) #2
%5 = getelementptr inbounds i8, ptr %3, i64 8
%6 = load i64, ptr %5, align 8, !tbaa !11
%7 = icmp eq i64 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %1
%9 = tail call i32 @mtx_unlock(ptr noundef nonnull %3) #2
br label %27
10: ; preds = %1
%11 = getelementptr inbounds i8, ptr %3, i64 16
%12 = load i64, ptr %11, align 8, !tbaa !14
%13 = icmp eq i64 %12, 0
br i1 %13, label %22, label %14
14: ; preds = %10, %14
%15 = tail call i32 @msleep(ptr noundef nonnull %3, ptr noundef nonnull %3, i32 noundef 0, ptr noundef nonnull @.str, i32 noundef 0) #2
%16 = load i64, ptr %11, align 8, !tbaa !14
%17 = icmp eq i64 %16, 0
br i1 %17, label %18, label %14, !llvm.loop !15
18: ; preds = %14
%19 = load i64, ptr %5, align 8, !tbaa !11
%20 = tail call i32 @KASSERT(i64 noundef %19, ptr noundef nonnull @.str.1) #2
%21 = tail call i32 @mtx_unlock(ptr noundef nonnull %3) #2
br label %27
22: ; preds = %10
%23 = load i64, ptr @FALSE, align 8, !tbaa !17
store i64 %23, ptr %11, align 8, !tbaa !14
%24 = load i64, ptr @TRUE, align 8, !tbaa !17
store i64 %24, ptr %5, align 8, !tbaa !11
%25 = tail call i32 @mtx_unlock(ptr noundef nonnull %3) #2
%26 = tail call i32 @wakeup(ptr noundef nonnull %3) #2
br label %27
27: ; preds = %22, %18, %8
ret void
}
declare i32 @mtx_lock(ptr noundef) local_unnamed_addr #1
declare i32 @mtx_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @msleep(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @KASSERT(i64 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @wakeup(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 8}
!12 = !{!"ct_data", !13, i64 0, !8, i64 8, !8, i64 16}
!13 = !{!"int", !9, i64 0}
!14 = !{!12, !8, i64 16}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!8, !8, i64 0}
| freebsd_sys_rpc_extr_clnt_bck.c_clnt_bck_close |
; ModuleID = 'AnghaBench/radare2/libr/asm/p/extr_..archz80z80asm.c_rd_hl.c'
source_filename = "AnghaBench/radare2/libr/asm/p/extr_..archz80z80asm.c_rd_hl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [3 x i8] c"hl\00", align 1
@__const.rd_hl.list = private unnamed_addr constant [2 x ptr] [ptr @.str, ptr null], align 16
@llvm.compiler.used = appending global [1 x ptr] [ptr @rd_hl], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @rd_hl(ptr noundef %0) #0 {
%2 = alloca [2 x ptr], align 16
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #4
call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 16 dereferenceable(16) %2, ptr noundef nonnull align 16 dereferenceable(16) @__const.rd_hl.list, i64 16, i1 false)
%3 = call i32 @indx(ptr noundef %0, ptr noundef nonnull %2, i32 noundef 1, ptr noundef null) #4
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #4
ret i32 %3
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2
declare i32 @indx(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/radare2/libr/asm/p/extr_..archz80z80asm.c_rd_hl.c'
source_filename = "AnghaBench/radare2/libr/asm/p/extr_..archz80z80asm.c_rd_hl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [3 x i8] c"hl\00", align 1
@__const.rd_hl.list = private unnamed_addr constant [2 x ptr] [ptr @.str, ptr null], align 8
@llvm.used = appending global [1 x ptr] [ptr @rd_hl], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @rd_hl(ptr noundef %0) #0 {
%2 = alloca [2 x ptr], align 8
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #4
call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %2, ptr noundef nonnull align 8 dereferenceable(16) @__const.rd_hl.list, i64 16, i1 false)
%3 = call i32 @indx(ptr noundef %0, ptr noundef nonnull %2, i32 noundef 1, ptr noundef null) #4
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #4
ret i32 %3
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite)
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #2
declare i32 @indx(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| radare2_libr_asm_p_extr_..archz80z80asm.c_rd_hl |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_debugfs.h_b43_debugfs_log_txstat.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_debugfs.h_b43_debugfs_log_txstat.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @b43_debugfs_log_txstat], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @b43_debugfs_log_txstat(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_debugfs.h_b43_debugfs_log_txstat.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/b43/extr_debugfs.h_b43_debugfs_log_txstat.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @b43_debugfs_log_txstat], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @b43_debugfs_log_txstat(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_net_wireless_broadcom_b43_extr_debugfs.h_b43_debugfs_log_txstat |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/extr_drm_edid.c_drm_monitor_supports_rb.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/extr_drm_edid.c_drm_monitor_supports_rb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.edid = type { i32, i32 }
@is_rb = dso_local local_unnamed_addr global i32 0, align 4
@DRM_EDID_INPUT_DIGITAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @drm_monitor_supports_rb], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @drm_monitor_supports_rb(ptr noundef %0) #0 {
%2 = alloca i32, align 4
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = icmp sgt i32 %3, 3
br i1 %4, label %5, label %9
5: ; preds = %1
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 0, ptr %2, align 4, !tbaa !10
%6 = load i32, ptr @is_rb, align 4, !tbaa !10
%7 = call i32 @drm_for_each_detailed_block(ptr noundef nonnull %0, i32 noundef %6, ptr noundef nonnull %2) #3
%8 = load i32, ptr %2, align 4, !tbaa !10
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br label %16
9: ; preds = %1
%10 = getelementptr inbounds %struct.edid, ptr %0, i64 0, i32 1
%11 = load i32, ptr %10, align 4, !tbaa !11
%12 = load i32, ptr @DRM_EDID_INPUT_DIGITAL, align 4, !tbaa !10
%13 = and i32 %12, %11
%14 = icmp ne i32 %13, 0
%15 = zext i1 %14 to i32
br label %16
16: ; preds = %9, %5
%17 = phi i32 [ %8, %5 ], [ %15, %9 ]
ret i32 %17
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @drm_for_each_detailed_block(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"edid", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 4}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/extr_drm_edid.c_drm_monitor_supports_rb.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/extr_drm_edid.c_drm_monitor_supports_rb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@is_rb = common local_unnamed_addr global i32 0, align 4
@DRM_EDID_INPUT_DIGITAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @drm_monitor_supports_rb], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @drm_monitor_supports_rb(ptr noundef %0) #0 {
%2 = alloca i32, align 4
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = icmp sgt i32 %3, 3
br i1 %4, label %5, label %9
5: ; preds = %1
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 0, ptr %2, align 4, !tbaa !11
%6 = load i32, ptr @is_rb, align 4, !tbaa !11
%7 = call i32 @drm_for_each_detailed_block(ptr noundef nonnull %0, i32 noundef %6, ptr noundef nonnull %2) #3
%8 = load i32, ptr %2, align 4, !tbaa !11
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
br label %16
9: ; preds = %1
%10 = getelementptr inbounds i8, ptr %0, i64 4
%11 = load i32, ptr %10, align 4, !tbaa !12
%12 = load i32, ptr @DRM_EDID_INPUT_DIGITAL, align 4, !tbaa !11
%13 = and i32 %12, %11
%14 = icmp ne i32 %13, 0
%15 = zext i1 %14 to i32
br label %16
16: ; preds = %9, %5
%17 = phi i32 [ %8, %5 ], [ %15, %9 ]
ret i32 %17
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @drm_for_each_detailed_block(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"edid", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!7, !8, i64 4}
| fastsocket_kernel_drivers_gpu_drm_extr_drm_edid.c_drm_monitor_supports_rb |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_df_v3_6.c_df_v3_6_perfmon_wreg.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_df_v3_6.c_df_v3_6_perfmon_wreg.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.amdgpu_device = type { i32, ptr }
%struct.TYPE_2__ = type { ptr, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @df_v3_6_perfmon_wreg], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @df_v3_6_perfmon_wreg(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
%6 = getelementptr inbounds %struct.amdgpu_device, ptr %0, i64 0, i32 1
%7 = load ptr, ptr %6, align 8, !tbaa !5
%8 = load ptr, ptr %7, align 8, !tbaa !11
%9 = tail call i64 %8(ptr noundef %0) #2
%10 = load ptr, ptr %6, align 8, !tbaa !5
%11 = getelementptr inbounds %struct.TYPE_2__, ptr %10, i64 0, i32 1
%12 = load ptr, ptr %11, align 8, !tbaa !13
%13 = tail call i64 %12(ptr noundef %0) #2
%14 = tail call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #2
%15 = tail call i32 @WREG32(i64 noundef %9, i32 noundef %1) #2
%16 = tail call i32 @WREG32(i64 noundef %13, i32 noundef %2) #2
%17 = tail call i32 @WREG32(i64 noundef %9, i32 noundef %3) #2
%18 = tail call i32 @WREG32(i64 noundef %13, i32 noundef %4) #2
%19 = tail call i32 @spin_unlock_irqrestore(ptr noundef %0, i64 noundef undef) #2
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @WREG32(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"amdgpu_device", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_2__", !10, i64 0, !10, i64 8}
!13 = !{!12, !10, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_df_v3_6.c_df_v3_6_perfmon_wreg.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_df_v3_6.c_df_v3_6_perfmon_wreg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @df_v3_6_perfmon_wreg], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @df_v3_6_perfmon_wreg(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !6
%8 = load ptr, ptr %7, align 8, !tbaa !12
%9 = tail call i64 %8(ptr noundef %0) #2
%10 = load ptr, ptr %6, align 8, !tbaa !6
%11 = getelementptr inbounds i8, ptr %10, i64 8
%12 = load ptr, ptr %11, align 8, !tbaa !14
%13 = tail call i64 %12(ptr noundef %0) #2
%14 = tail call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #2
%15 = tail call i32 @WREG32(i64 noundef %9, i32 noundef %1) #2
%16 = tail call i32 @WREG32(i64 noundef %13, i32 noundef %2) #2
%17 = tail call i32 @WREG32(i64 noundef %9, i32 noundef %3) #2
%18 = tail call i32 @WREG32(i64 noundef %13, i32 noundef %4) #2
%19 = tail call i32 @spin_unlock_irqrestore(ptr noundef %0, i64 noundef undef) #2
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @WREG32(i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"amdgpu_device", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_2__", !11, i64 0, !11, i64 8}
!14 = !{!13, !11, i64 8}
| linux_drivers_gpu_drm_amd_amdgpu_extr_df_v3_6.c_df_v3_6_perfmon_wreg |
; ModuleID = 'AnghaBench/fastsocket/kernel/mm/extr_page-writeback.c_test_clear_page_writeback.c'
source_filename = "AnghaBench/fastsocket/kernel/mm/extr_page-writeback.c_test_clear_page_writeback.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.address_space = type { i32, i32, ptr }
@PAGECACHE_TAG_WRITEBACK = dso_local local_unnamed_addr global i32 0, align 4
@BDI_WRITEBACK = dso_local local_unnamed_addr global i32 0, align 4
@NR_WRITEBACK = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @test_clear_page_writeback(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @page_mapping(ptr noundef %0) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %23, label %4
4: ; preds = %1
%5 = getelementptr inbounds %struct.address_space, ptr %2, i64 0, i32 2
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %2, i64 noundef undef) #2
%8 = tail call i32 @TestClearPageWriteback(ptr noundef %0) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %21, label %10
10: ; preds = %4
%11 = getelementptr inbounds %struct.address_space, ptr %2, i64 0, i32 1
%12 = tail call i32 @page_index(ptr noundef %0) #2
%13 = load i32, ptr @PAGECACHE_TAG_WRITEBACK, align 4, !tbaa !11
%14 = tail call i32 @radix_tree_tag_clear(ptr noundef nonnull %11, i32 noundef %12, i32 noundef %13) #2
%15 = tail call i64 @bdi_cap_account_writeback(ptr noundef %6) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %21, label %17
17: ; preds = %10
%18 = load i32, ptr @BDI_WRITEBACK, align 4, !tbaa !11
%19 = tail call i32 @__dec_bdi_stat(ptr noundef %6, i32 noundef %18) #2
%20 = tail call i32 @__bdi_writeout_inc(ptr noundef %6) #2
br label %21
21: ; preds = %10, %17, %4
%22 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %2, i64 noundef undef) #2
br label %25
23: ; preds = %1
%24 = tail call i32 @TestClearPageWriteback(ptr noundef %0) #2
br label %25
25: ; preds = %23, %21
%26 = phi i32 [ %8, %21 ], [ %24, %23 ]
%27 = icmp eq i32 %26, 0
br i1 %27, label %31, label %28
28: ; preds = %25
%29 = load i32, ptr @NR_WRITEBACK, align 4, !tbaa !11
%30 = tail call i32 @dec_zone_page_state(ptr noundef %0, i32 noundef %29) #2
br label %31
31: ; preds = %28, %25
ret i32 %26
}
declare ptr @page_mapping(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @TestClearPageWriteback(ptr noundef) local_unnamed_addr #1
declare i32 @radix_tree_tag_clear(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @page_index(ptr noundef) local_unnamed_addr #1
declare i64 @bdi_cap_account_writeback(ptr noundef) local_unnamed_addr #1
declare i32 @__dec_bdi_stat(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__bdi_writeout_inc(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @dec_zone_page_state(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"address_space", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/mm/extr_page-writeback.c_test_clear_page_writeback.c'
source_filename = "AnghaBench/fastsocket/kernel/mm/extr_page-writeback.c_test_clear_page_writeback.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PAGECACHE_TAG_WRITEBACK = common local_unnamed_addr global i32 0, align 4
@BDI_WRITEBACK = common local_unnamed_addr global i32 0, align 4
@NR_WRITEBACK = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @test_clear_page_writeback(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @page_mapping(ptr noundef %0) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %23, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %2, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %2, i64 noundef undef) #2
%8 = tail call i32 @TestClearPageWriteback(ptr noundef %0) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %21, label %10
10: ; preds = %4
%11 = getelementptr inbounds i8, ptr %2, i64 4
%12 = tail call i32 @page_index(ptr noundef %0) #2
%13 = load i32, ptr @PAGECACHE_TAG_WRITEBACK, align 4, !tbaa !12
%14 = tail call i32 @radix_tree_tag_clear(ptr noundef nonnull %11, i32 noundef %12, i32 noundef %13) #2
%15 = tail call i64 @bdi_cap_account_writeback(ptr noundef %6) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %21, label %17
17: ; preds = %10
%18 = load i32, ptr @BDI_WRITEBACK, align 4, !tbaa !12
%19 = tail call i32 @__dec_bdi_stat(ptr noundef %6, i32 noundef %18) #2
%20 = tail call i32 @__bdi_writeout_inc(ptr noundef %6) #2
br label %21
21: ; preds = %10, %17, %4
%22 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %2, i64 noundef undef) #2
br label %25
23: ; preds = %1
%24 = tail call i32 @TestClearPageWriteback(ptr noundef %0) #2
br label %25
25: ; preds = %23, %21
%26 = phi i32 [ %8, %21 ], [ %24, %23 ]
%27 = icmp eq i32 %26, 0
br i1 %27, label %31, label %28
28: ; preds = %25
%29 = load i32, ptr @NR_WRITEBACK, align 4, !tbaa !12
%30 = tail call i32 @dec_zone_page_state(ptr noundef %0, i32 noundef %29) #2
br label %31
31: ; preds = %28, %25
ret i32 %26
}
declare ptr @page_mapping(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @TestClearPageWriteback(ptr noundef) local_unnamed_addr #1
declare i32 @radix_tree_tag_clear(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @page_index(ptr noundef) local_unnamed_addr #1
declare i64 @bdi_cap_account_writeback(ptr noundef) local_unnamed_addr #1
declare i32 @__dec_bdi_stat(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__bdi_writeout_inc(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @dec_zone_page_state(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"address_space", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
| fastsocket_kernel_mm_extr_page-writeback.c_test_clear_page_writeback |
; ModuleID = 'AnghaBench/TDengine/src/util/src/extr_textbuffer.c_tBucketDoubleHash.c'
source_filename = "AnghaBench/TDengine/src/util/src/extr_textbuffer.c_tBucketDoubleHash.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, i32, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32, double }
@DBL_MAX = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [55 x i8] c"error in hash process. segment is: %d, slot id is: %d\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @tBucketDoubleHash(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, ptr nocapture noundef %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #0 {
%5 = load double, ptr %1, align 8, !tbaa !5
%6 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 2
%7 = load i32, ptr %6, align 8, !tbaa !9
%8 = load i32, ptr @DBL_MAX, align 4, !tbaa !13
%9 = icmp eq i32 %7, %8
br i1 %9, label %10, label %24
10: ; preds = %4
%11 = load i32, ptr %0, align 8, !tbaa !14
%12 = ashr i32 %11, 1
%13 = sdiv i32 %7, %12
%14 = sitofp i32 %13 to double
%15 = sitofp i32 %7 to double
%16 = fadd double %5, %15
%17 = fdiv double %16, %14
%18 = fptosi double %17 to i32
%19 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
%20 = load i32, ptr %19, align 4, !tbaa !15
%21 = sdiv i32 %18, %20
store i32 %21, ptr %2, align 4, !tbaa !13
%22 = load i32, ptr %19, align 4, !tbaa !15
%23 = srem i32 %18, %22
store i32 %23, ptr %3, align 4, !tbaa !13
br label %55
24: ; preds = %4
%25 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 2, i32 1
%26 = load double, ptr %25, align 8, !tbaa !16
%27 = sitofp i32 %7 to double
%28 = fsub double %26, %27
%29 = load i32, ptr %0, align 8, !tbaa !14
%30 = sitofp i32 %29 to double
%31 = fcmp olt double %28, %30
br i1 %31, label %32, label %34
32: ; preds = %24
%33 = fsub double %5, %27
br label %41
34: ; preds = %24
%35 = fdiv double %28, %30
%36 = fsub double %5, %27
%37 = fdiv double %36, %35
%38 = fcmp oeq double %5, %26
%39 = fadd double %37, -1.000000e+00
%40 = select i1 %38, double %39, double %37
br label %41
41: ; preds = %34, %32
%42 = phi double [ %40, %34 ], [ %33, %32 ]
%43 = fptosi double %42 to i32
%44 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
%45 = load i32, ptr %44, align 4, !tbaa !15
%46 = sdiv i32 %43, %45
store i32 %46, ptr %2, align 4, !tbaa !13
%47 = load i32, ptr %44, align 4, !tbaa !15
%48 = srem i32 %43, %47
store i32 %48, ptr %3, align 4, !tbaa !13
%49 = load i32, ptr %2, align 4, !tbaa !13
%50 = icmp ugt i32 %49, 16
%51 = icmp ugt i32 %48, 64
%52 = select i1 %50, i1 true, i1 %51
br i1 %52, label %53, label %55
53: ; preds = %41
%54 = tail call i32 @pError(ptr noundef nonnull @.str, i32 noundef %49, i32 noundef %48) #2
br label %55
55: ; preds = %41, %53, %10
ret void
}
declare i32 @pError(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"double", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"TYPE_5__", !11, i64 0, !11, i64 4, !12, i64 8}
!11 = !{!"int", !7, i64 0}
!12 = !{!"TYPE_4__", !11, i64 0, !6, i64 8}
!13 = !{!11, !11, i64 0}
!14 = !{!10, !11, i64 0}
!15 = !{!10, !11, i64 4}
!16 = !{!10, !6, i64 16}
| ; ModuleID = 'AnghaBench/TDengine/src/util/src/extr_textbuffer.c_tBucketDoubleHash.c'
source_filename = "AnghaBench/TDengine/src/util/src/extr_textbuffer.c_tBucketDoubleHash.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DBL_MAX = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [55 x i8] c"error in hash process. segment is: %d, slot id is: %d\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @tBucketDoubleHash(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, ptr nocapture noundef %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #0 {
%5 = load double, ptr %1, align 8, !tbaa !6
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load i32, ptr %6, align 8, !tbaa !10
%8 = load i32, ptr @DBL_MAX, align 4, !tbaa !14
%9 = icmp eq i32 %7, %8
br i1 %9, label %10, label %24
10: ; preds = %4
%11 = load i32, ptr %0, align 8, !tbaa !15
%12 = ashr i32 %11, 1
%13 = sdiv i32 %7, %12
%14 = sitofp i32 %13 to double
%15 = sitofp i32 %7 to double
%16 = fadd double %5, %15
%17 = fdiv double %16, %14
%18 = fptosi double %17 to i32
%19 = getelementptr inbounds i8, ptr %0, i64 4
%20 = load i32, ptr %19, align 4, !tbaa !16
%21 = sdiv i32 %18, %20
store i32 %21, ptr %2, align 4, !tbaa !14
%22 = load i32, ptr %19, align 4, !tbaa !16
%23 = srem i32 %18, %22
store i32 %23, ptr %3, align 4, !tbaa !14
br label %55
24: ; preds = %4
%25 = getelementptr inbounds i8, ptr %0, i64 16
%26 = load double, ptr %25, align 8, !tbaa !17
%27 = sitofp i32 %7 to double
%28 = fsub double %26, %27
%29 = load i32, ptr %0, align 8, !tbaa !15
%30 = sitofp i32 %29 to double
%31 = fcmp olt double %28, %30
br i1 %31, label %32, label %34
32: ; preds = %24
%33 = fsub double %5, %27
br label %41
34: ; preds = %24
%35 = fdiv double %28, %30
%36 = fsub double %5, %27
%37 = fdiv double %36, %35
%38 = fcmp oeq double %5, %26
%39 = fadd double %37, -1.000000e+00
%40 = select i1 %38, double %39, double %37
br label %41
41: ; preds = %34, %32
%42 = phi double [ %40, %34 ], [ %33, %32 ]
%43 = fptosi double %42 to i32
%44 = getelementptr inbounds i8, ptr %0, i64 4
%45 = load i32, ptr %44, align 4, !tbaa !16
%46 = sdiv i32 %43, %45
store i32 %46, ptr %2, align 4, !tbaa !14
%47 = load i32, ptr %44, align 4, !tbaa !16
%48 = srem i32 %43, %47
store i32 %48, ptr %3, align 4, !tbaa !14
%49 = load i32, ptr %2, align 4, !tbaa !14
%50 = icmp ugt i32 %49, 16
%51 = icmp ugt i32 %48, 64
%52 = select i1 %50, i1 true, i1 %51
br i1 %52, label %53, label %55
53: ; preds = %41
%54 = tail call i32 @pError(ptr noundef nonnull @.str, i32 noundef %49, i32 noundef %48) #2
br label %55
55: ; preds = %41, %53, %10
ret void
}
declare i32 @pError(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"double", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"TYPE_5__", !12, i64 0, !12, i64 4, !13, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!"TYPE_4__", !12, i64 0, !7, i64 8}
!14 = !{!12, !12, i64 0}
!15 = !{!11, !12, i64 0}
!16 = !{!11, !12, i64 4}
!17 = !{!11, !7, i64 16}
| TDengine_src_util_src_extr_textbuffer.c_tBucketDoubleHash |
; ModuleID = 'AnghaBench/freebsd/contrib/binutils/bfd/extr_archures.c_bfd_printable_arch_mach.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/bfd/extr_archures.c_bfd_printable_arch_mach.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [9 x i8] c"UNKNOWN!\00", align 1
; Function Attrs: nounwind uwtable
define dso_local ptr @bfd_printable_arch_mach(i32 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @bfd_lookup_arch(i32 noundef %0, i64 noundef %1) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = load ptr, ptr %3, align 8, !tbaa !5
br label %7
7: ; preds = %2, %5
%8 = phi ptr [ %6, %5 ], [ @.str, %2 ]
ret ptr %8
}
declare ptr @bfd_lookup_arch(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/binutils/bfd/extr_archures.c_bfd_printable_arch_mach.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/bfd/extr_archures.c_bfd_printable_arch_mach.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [9 x i8] c"UNKNOWN!\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @bfd_printable_arch_mach(i32 noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @bfd_lookup_arch(i32 noundef %0, i64 noundef %1) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = load ptr, ptr %3, align 8, !tbaa !6
br label %7
7: ; preds = %2, %5
%8 = phi ptr [ %6, %5 ], [ @.str, %2 ]
ret ptr %8
}
declare ptr @bfd_lookup_arch(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_binutils_bfd_extr_archures.c_bfd_printable_arch_mach |
; ModuleID = 'AnghaBench/libgit2/src/extr_pack-objects.c_check_delta_limit.c'
source_filename = "AnghaBench/libgit2/src/extr_pack-objects.c_check_delta_limit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { ptr, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @check_delta_limit], section "llvm.metadata"
; Function Attrs: nofree nosync nounwind memory(read, inaccessiblemem: none) uwtable
define internal i64 @check_delta_limit(ptr nocapture noundef readonly %0, i64 noundef %1) #0 {
%3 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = icmp eq ptr %4, null
br i1 %5, label %15, label %6
6: ; preds = %2
%7 = add i64 %1, 1
br label %8
8: ; preds = %6, %8
%9 = phi ptr [ %4, %6 ], [ %13, %8 ]
%10 = phi i64 [ %1, %6 ], [ %12, %8 ]
%11 = tail call i64 @check_delta_limit(ptr noundef nonnull %9, i64 noundef %7)
%12 = tail call i64 @llvm.umax.i64(i64 %10, i64 %11)
%13 = load ptr, ptr %9, align 8, !tbaa !5
%14 = icmp eq ptr %13, null
br i1 %14, label %15, label %8, !llvm.loop !9
15: ; preds = %8, %2
%16 = phi i64 [ %1, %2 ], [ %12, %8 ]
ret i64 %16
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #1
attributes #0 = { nofree nosync nounwind memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/libgit2/src/extr_pack-objects.c_check_delta_limit.c'
source_filename = "AnghaBench/libgit2/src/extr_pack-objects.c_check_delta_limit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @check_delta_limit], section "llvm.metadata"
; Function Attrs: nofree nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal i64 @check_delta_limit(ptr nocapture noundef readonly %0, i64 noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %15, label %6
6: ; preds = %2
%7 = add i64 %1, 1
br label %8
8: ; preds = %6, %8
%9 = phi ptr [ %4, %6 ], [ %13, %8 ]
%10 = phi i64 [ %1, %6 ], [ %12, %8 ]
%11 = tail call i64 @check_delta_limit(ptr noundef nonnull %9, i64 noundef %7)
%12 = tail call i64 @llvm.umax.i64(i64 %10, i64 %11)
%13 = load ptr, ptr %9, align 8, !tbaa !6
%14 = icmp eq ptr %13, null
br i1 %14, label %15, label %8, !llvm.loop !10
15: ; preds = %8, %2
%16 = phi i64 [ %1, %2 ], [ %12, %8 ]
ret i64 %16
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #1
attributes #0 = { nofree nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| libgit2_src_extr_pack-objects.c_check_delta_limit |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/sti/extr_sti_gdp.c_gdp_node_dbg_show.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/sti/extr_sti_gdp.c_gdp_node_dbg_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sti_gdp = type { ptr, i32 }
%struct.TYPE_3__ = type { i32, i32 }
@GDP_NODE_NB_BANK = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [12 x i8] c"\0A%s[%d].top\00", align 1
@.str.1 = private unnamed_addr constant [12 x i8] c"\0A%s[%d].btm\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @gdp_node_dbg_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @gdp_node_dbg_show(ptr noundef %0, ptr nocapture readnone %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load ptr, ptr %3, align 8, !tbaa !10
%5 = load i64, ptr %4, align 8, !tbaa !12
%6 = inttoptr i64 %5 to ptr
%7 = load i32, ptr @GDP_NODE_NB_BANK, align 4, !tbaa !15
%8 = icmp eq i32 %7, 0
br i1 %8, label %30, label %9
9: ; preds = %2
%10 = getelementptr inbounds %struct.sti_gdp, ptr %6, i64 0, i32 1
br label %11
11: ; preds = %9, %11
%12 = phi i64 [ 0, %9 ], [ %26, %11 ]
%13 = tail call i32 @sti_plane_to_str(ptr noundef nonnull %10) #2
%14 = trunc i64 %12 to i32
%15 = tail call i32 @seq_printf(ptr noundef nonnull %0, ptr noundef nonnull @.str, i32 noundef %13, i32 noundef %14) #2
%16 = load ptr, ptr %6, align 8, !tbaa !17
%17 = getelementptr inbounds %struct.TYPE_3__, ptr %16, i64 %12, i32 1
%18 = load i32, ptr %17, align 4, !tbaa !19
%19 = tail call i32 @gdp_node_dump_node(ptr noundef nonnull %0, i32 noundef %18) #2
%20 = tail call i32 @sti_plane_to_str(ptr noundef nonnull %10) #2
%21 = tail call i32 @seq_printf(ptr noundef nonnull %0, ptr noundef nonnull @.str.1, i32 noundef %20, i32 noundef %14) #2
%22 = load ptr, ptr %6, align 8, !tbaa !17
%23 = getelementptr inbounds %struct.TYPE_3__, ptr %22, i64 %12
%24 = load i32, ptr %23, align 4, !tbaa !21
%25 = tail call i32 @gdp_node_dump_node(ptr noundef nonnull %0, i32 noundef %24) #2
%26 = add nuw nsw i64 %12, 1
%27 = load i32, ptr @GDP_NODE_NB_BANK, align 4, !tbaa !15
%28 = zext i32 %27 to i64
%29 = icmp ult i64 %26, %28
br i1 %29, label %11, label %30, !llvm.loop !22
30: ; preds = %11, %2
ret i32 0
}
declare i32 @seq_printf(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sti_plane_to_str(ptr noundef) local_unnamed_addr #1
declare i32 @gdp_node_dump_node(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"seq_file", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"drm_info_node", !7, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_4__", !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !8, i64 0}
!17 = !{!18, !7, i64 0}
!18 = !{!"sti_gdp", !7, i64 0, !16, i64 8}
!19 = !{!20, !16, i64 4}
!20 = !{!"TYPE_3__", !16, i64 0, !16, i64 4}
!21 = !{!20, !16, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/sti/extr_sti_gdp.c_gdp_node_dbg_show.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/sti/extr_sti_gdp.c_gdp_node_dbg_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_3__ = type { i32, i32 }
@GDP_NODE_NB_BANK = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [12 x i8] c"\0A%s[%d].top\00", align 1
@.str.1 = private unnamed_addr constant [12 x i8] c"\0A%s[%d].btm\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @gdp_node_dbg_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @gdp_node_dbg_show(ptr noundef %0, ptr nocapture readnone %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load ptr, ptr %3, align 8, !tbaa !11
%5 = load i64, ptr %4, align 8, !tbaa !13
%6 = inttoptr i64 %5 to ptr
%7 = load i32, ptr @GDP_NODE_NB_BANK, align 4, !tbaa !16
%8 = icmp eq i32 %7, 0
br i1 %8, label %30, label %9
9: ; preds = %2
%10 = getelementptr inbounds i8, ptr %6, i64 8
br label %11
11: ; preds = %9, %11
%12 = phi i64 [ 0, %9 ], [ %26, %11 ]
%13 = tail call i32 @sti_plane_to_str(ptr noundef nonnull %10) #2
%14 = trunc nuw i64 %12 to i32
%15 = tail call i32 @seq_printf(ptr noundef nonnull %0, ptr noundef nonnull @.str, i32 noundef %13, i32 noundef %14) #2
%16 = load ptr, ptr %6, align 8, !tbaa !18
%17 = getelementptr inbounds %struct.TYPE_3__, ptr %16, i64 %12, i32 1
%18 = load i32, ptr %17, align 4, !tbaa !20
%19 = tail call i32 @gdp_node_dump_node(ptr noundef nonnull %0, i32 noundef %18) #2
%20 = tail call i32 @sti_plane_to_str(ptr noundef nonnull %10) #2
%21 = tail call i32 @seq_printf(ptr noundef nonnull %0, ptr noundef nonnull @.str.1, i32 noundef %20, i32 noundef %14) #2
%22 = load ptr, ptr %6, align 8, !tbaa !18
%23 = getelementptr inbounds %struct.TYPE_3__, ptr %22, i64 %12
%24 = load i32, ptr %23, align 4, !tbaa !22
%25 = tail call i32 @gdp_node_dump_node(ptr noundef nonnull %0, i32 noundef %24) #2
%26 = add nuw nsw i64 %12, 1
%27 = load i32, ptr @GDP_NODE_NB_BANK, align 4, !tbaa !16
%28 = zext i32 %27 to i64
%29 = icmp ult i64 %26, %28
br i1 %29, label %11, label %30, !llvm.loop !23
30: ; preds = %11, %2
ret i32 0
}
declare i32 @seq_printf(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sti_plane_to_str(ptr noundef) local_unnamed_addr #1
declare i32 @gdp_node_dump_node(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"seq_file", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"drm_info_node", !8, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"TYPE_4__", !15, i64 0}
!15 = !{!"long", !9, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"int", !9, i64 0}
!18 = !{!19, !8, i64 0}
!19 = !{!"sti_gdp", !8, i64 0, !17, i64 8}
!20 = !{!21, !17, i64 4}
!21 = !{!"TYPE_3__", !17, i64 0, !17, i64 4}
!22 = !{!21, !17, i64 0}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
| linux_drivers_gpu_drm_sti_extr_sti_gdp.c_gdp_node_dbg_show |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/i2c/busses/extr_i2c-amd8111.c_amd_ec_write.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/i2c/busses/extr_i2c-amd8111.c_amd_ec_write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@AMD_EC_CMD_WR = dso_local local_unnamed_addr global i8 0, align 1
@AMD_EC_CMD = dso_local local_unnamed_addr global i64 0, align 8
@AMD_EC_DATA = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @amd_ec_write], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @amd_ec_write(ptr noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2) #0 {
%4 = tail call i32 @amd_ec_wait_write(ptr noundef %0) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %26
6: ; preds = %3
%7 = load i8, ptr @AMD_EC_CMD_WR, align 1, !tbaa !5
%8 = load i64, ptr %0, align 8, !tbaa !8
%9 = load i64, ptr @AMD_EC_CMD, align 8, !tbaa !11
%10 = add nsw i64 %9, %8
%11 = tail call i32 @outb(i8 noundef zeroext %7, i64 noundef %10) #2
%12 = tail call i32 @amd_ec_wait_write(ptr noundef nonnull %0) #2
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %26
14: ; preds = %6
%15 = load i64, ptr %0, align 8, !tbaa !8
%16 = load i64, ptr @AMD_EC_DATA, align 8, !tbaa !11
%17 = add nsw i64 %16, %15
%18 = tail call i32 @outb(i8 noundef zeroext %1, i64 noundef %17) #2
%19 = tail call i32 @amd_ec_wait_write(ptr noundef nonnull %0) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %26
21: ; preds = %14
%22 = load i64, ptr %0, align 8, !tbaa !8
%23 = load i64, ptr @AMD_EC_DATA, align 8, !tbaa !11
%24 = add nsw i64 %23, %22
%25 = tail call i32 @outb(i8 noundef zeroext %2, i64 noundef %24) #2
br label %26
26: ; preds = %14, %6, %3, %21
%27 = phi i32 [ 0, %21 ], [ %4, %3 ], [ %12, %6 ], [ %19, %14 ]
ret i32 %27
}
declare i32 @amd_ec_wait_write(ptr noundef) local_unnamed_addr #1
declare i32 @outb(i8 noundef zeroext, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !10, i64 0}
!9 = !{!"amd_smbus", !10, i64 0}
!10 = !{!"long", !6, i64 0}
!11 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/i2c/busses/extr_i2c-amd8111.c_amd_ec_write.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/i2c/busses/extr_i2c-amd8111.c_amd_ec_write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AMD_EC_CMD_WR = common local_unnamed_addr global i8 0, align 1
@AMD_EC_CMD = common local_unnamed_addr global i64 0, align 8
@AMD_EC_DATA = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @amd_ec_write], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @amd_ec_write(ptr noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2) #0 {
%4 = tail call i32 @amd_ec_wait_write(ptr noundef %0) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %26
6: ; preds = %3
%7 = load i8, ptr @AMD_EC_CMD_WR, align 1, !tbaa !6
%8 = load i64, ptr %0, align 8, !tbaa !9
%9 = load i64, ptr @AMD_EC_CMD, align 8, !tbaa !12
%10 = add nsw i64 %9, %8
%11 = tail call i32 @outb(i8 noundef zeroext %7, i64 noundef %10) #2
%12 = tail call i32 @amd_ec_wait_write(ptr noundef nonnull %0) #2
%13 = icmp eq i32 %12, 0
br i1 %13, label %14, label %26
14: ; preds = %6
%15 = load i64, ptr %0, align 8, !tbaa !9
%16 = load i64, ptr @AMD_EC_DATA, align 8, !tbaa !12
%17 = add nsw i64 %16, %15
%18 = tail call i32 @outb(i8 noundef zeroext %1, i64 noundef %17) #2
%19 = tail call i32 @amd_ec_wait_write(ptr noundef nonnull %0) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %26
21: ; preds = %14
%22 = load i64, ptr %0, align 8, !tbaa !9
%23 = load i64, ptr @AMD_EC_DATA, align 8, !tbaa !12
%24 = add nsw i64 %23, %22
%25 = tail call i32 @outb(i8 noundef zeroext %2, i64 noundef %24) #2
br label %26
26: ; preds = %14, %6, %3, %21
%27 = phi i32 [ 0, %21 ], [ %4, %3 ], [ %12, %6 ], [ %19, %14 ]
ret i32 %27
}
declare i32 @amd_ec_wait_write(ptr noundef) local_unnamed_addr #1
declare i32 @outb(i8 noundef zeroext, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"amd_smbus", !11, i64 0}
!11 = !{!"long", !7, i64 0}
!12 = !{!11, !11, i64 0}
| fastsocket_kernel_drivers_i2c_busses_extr_i2c-amd8111.c_amd_ec_write |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/ia64/kernel/extr_ptrace.c_ia64_get_user_rbs_end.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/ia64/kernel/extr_ptrace.c_ia64_get_user_rbs_end.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pt_regs = type { i64, i32, i64 }
@IA64_RBS_OFFSET = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i64 @ia64_get_user_rbs_end(ptr noundef %0, ptr noundef %1, ptr noundef writeonly %2) local_unnamed_addr #0 {
%4 = load i64, ptr %1, align 8, !tbaa !5
%5 = load i32, ptr @IA64_RBS_OFFSET, align 4, !tbaa !11
%6 = sdiv i32 %5, 8
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i64, ptr %0, i64 %7
%9 = getelementptr inbounds %struct.pt_regs, ptr %1, i64 0, i32 2
%10 = load i64, ptr %9, align 8, !tbaa !12
%11 = getelementptr inbounds %struct.pt_regs, ptr %1, i64 0, i32 1
%12 = load i32, ptr %11, align 8, !tbaa !13
%13 = ashr i32 %12, 19
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i64, ptr %8, i64 %14
%16 = tail call i64 @ia64_rse_num_regs(ptr noundef %8, ptr noundef %15) #2
%17 = tail call i64 @in_syscall(ptr noundef nonnull %1) #2
%18 = icmp eq i64 %17, 0
%19 = icmp eq ptr %2, null
br i1 %19, label %23, label %20
20: ; preds = %3
%21 = and i64 %4, 9223372036854775807
%22 = select i1 %18, i64 %21, i64 %4
store i64 %22, ptr %2, align 8, !tbaa !14
br label %23
23: ; preds = %20, %3
%24 = and i64 %4, 127
%25 = select i1 %18, i64 0, i64 %24
%26 = add i64 %25, %16
%27 = inttoptr i64 %10 to ptr
%28 = tail call i64 @ia64_rse_skip_regs(ptr noundef %27, i64 noundef %26) #2
ret i64 %28
}
declare i64 @ia64_rse_num_regs(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @in_syscall(ptr noundef) local_unnamed_addr #1
declare i64 @ia64_rse_skip_regs(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"pt_regs", !7, i64 0, !10, i64 8, !7, i64 16}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!6, !7, i64 16}
!13 = !{!6, !10, i64 8}
!14 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/ia64/kernel/extr_ptrace.c_ia64_get_user_rbs_end.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/ia64/kernel/extr_ptrace.c_ia64_get_user_rbs_end.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IA64_RBS_OFFSET = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @ia64_get_user_rbs_end(ptr noundef %0, ptr noundef %1, ptr noundef writeonly %2) local_unnamed_addr #0 {
%4 = load i64, ptr %1, align 8, !tbaa !6
%5 = load i32, ptr @IA64_RBS_OFFSET, align 4, !tbaa !12
%6 = sdiv i32 %5, 8
%7 = sext i32 %6 to i64
%8 = getelementptr inbounds i64, ptr %0, i64 %7
%9 = getelementptr inbounds i8, ptr %1, i64 16
%10 = load i64, ptr %9, align 8, !tbaa !13
%11 = getelementptr inbounds i8, ptr %1, i64 8
%12 = load i32, ptr %11, align 8, !tbaa !14
%13 = ashr i32 %12, 19
%14 = sext i32 %13 to i64
%15 = getelementptr inbounds i64, ptr %8, i64 %14
%16 = tail call i64 @ia64_rse_num_regs(ptr noundef %8, ptr noundef %15) #2
%17 = tail call i64 @in_syscall(ptr noundef nonnull %1) #2
%18 = icmp eq i64 %17, 0
%19 = icmp eq ptr %2, null
br i1 %19, label %23, label %20
20: ; preds = %3
%21 = and i64 %4, 9223372036854775807
%22 = select i1 %18, i64 %21, i64 %4
store i64 %22, ptr %2, align 8, !tbaa !15
br label %23
23: ; preds = %20, %3
%24 = and i64 %4, 127
%25 = select i1 %18, i64 0, i64 %24
%26 = add i64 %25, %16
%27 = inttoptr i64 %10 to ptr
%28 = tail call i64 @ia64_rse_skip_regs(ptr noundef %27, i64 noundef %26) #2
ret i64 %28
}
declare i64 @ia64_rse_num_regs(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @in_syscall(ptr noundef) local_unnamed_addr #1
declare i64 @ia64_rse_skip_regs(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"pt_regs", !8, i64 0, !11, i64 8, !8, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!7, !8, i64 16}
!14 = !{!7, !11, i64 8}
!15 = !{!8, !8, i64 0}
| fastsocket_kernel_arch_ia64_kernel_extr_ptrace.c_ia64_get_user_rbs_end |
; ModuleID = 'AnghaBench/kphp-kdb/hints/extr_maccub.c_golomb_decode_list.c'
source_filename = "AnghaBench/kphp-kdb/hints/extr_maccub.c_golomb_decode_list.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@cur_bit = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local i32 @golomb_decode_list(ptr nocapture noundef readnone %0, i32 noundef %1, i32 noundef %2, ptr nocapture noundef readonly %3) local_unnamed_addr #0 {
%5 = icmp sgt i32 %1, 1
br i1 %5, label %8, label %25
6: ; preds = %8
%7 = icmp sgt i32 %10, -2
br i1 %7, label %14, label %25
8: ; preds = %4, %8
%9 = phi i32 [ %11, %8 ], [ 1, %4 ]
%10 = phi i32 [ %12, %8 ], [ -1, %4 ]
%11 = shl nsw i32 %9, 1
%12 = add nsw i32 %10, 1
%13 = icmp slt i32 %11, %1
br i1 %13, label %8, label %6, !llvm.loop !5
14: ; preds = %6, %14
%15 = phi i32 [ %21, %14 ], [ 0, %6 ]
%16 = phi i32 [ %23, %14 ], [ %12, %6 ]
%17 = load i64, ptr @cur_bit, align 8, !tbaa !7
%18 = icmp eq i64 %17, 0
%19 = shl nuw i32 1, %16
%20 = select i1 %18, i32 0, i32 %19
%21 = add nsw i32 %20, %15
%22 = tail call i32 (...) @load_bit() #2
%23 = add nsw i32 %16, -1
%24 = icmp eq i32 %16, 0
br i1 %24, label %25, label %14, !llvm.loop !11
25: ; preds = %14, %4, %6
%26 = phi i32 [ 0, %6 ], [ 0, %4 ], [ %21, %14 ]
%27 = add nsw i32 %26, 1
%28 = icmp sgt i32 %26, -1
%29 = icmp sgt i32 %2, 0
%30 = and i1 %29, %28
%31 = zext i1 %30 to i32
%32 = tail call i32 @assert(i32 noundef %31) #2
%33 = add nsw i32 %1, 1
%34 = tail call i32 @compute_golomb_parameter(i32 noundef %1, i32 noundef %27) #2
%35 = icmp slt i32 %34, 1
br i1 %35, label %42, label %36
36: ; preds = %25, %36
%37 = phi i32 [ %39, %36 ], [ 1, %25 ]
%38 = phi i32 [ %40, %36 ], [ 0, %25 ]
%39 = shl i32 %37, 1
%40 = add nuw nsw i32 %38, 1
%41 = icmp slt i32 %34, %39
br i1 %41, label %42, label %36, !llvm.loop !12
42: ; preds = %36, %25
%43 = phi i32 [ 0, %25 ], [ %40, %36 ]
%44 = phi i32 [ 1, %25 ], [ %39, %36 ]
%45 = sub nsw i32 %44, %34
%46 = icmp eq i32 %27, 0
br i1 %46, label %97, label %47
47: ; preds = %42
%48 = icmp sgt i32 %43, 1
br label %49
49: ; preds = %47, %86
%50 = phi i32 [ %26, %47 ], [ %95, %86 ]
%51 = phi i32 [ %33, %47 ], [ %89, %86 ]
%52 = phi ptr [ %3, %47 ], [ %94, %86 ]
%53 = load i64, ptr @cur_bit, align 8, !tbaa !7
%54 = icmp eq i64 %53, 0
br i1 %54, label %61, label %55
55: ; preds = %49, %55
%56 = phi i32 [ %57, %55 ], [ %51, %49 ]
%57 = sub nsw i32 %56, %34
%58 = tail call i32 (...) @load_bit() #2
%59 = load i64, ptr @cur_bit, align 8, !tbaa !7
%60 = icmp eq i64 %59, 0
br i1 %60, label %61, label %55, !llvm.loop !13
61: ; preds = %55, %49
%62 = phi i32 [ %51, %49 ], [ %57, %55 ]
%63 = tail call i32 (...) @load_bit() #2
br i1 %48, label %64, label %75
64: ; preds = %61, %64
%65 = phi i32 [ %73, %64 ], [ %43, %61 ]
%66 = phi i32 [ %71, %64 ], [ 0, %61 ]
%67 = shl i32 %66, 1
%68 = load i64, ptr @cur_bit, align 8, !tbaa !7
%69 = icmp ne i64 %68, 0
%70 = zext i1 %69 to i32
%71 = or disjoint i32 %67, %70
%72 = tail call i32 (...) @load_bit() #2
%73 = add nsw i32 %65, -1
%74 = icmp ugt i32 %65, 2
br i1 %74, label %64, label %75, !llvm.loop !14
75: ; preds = %64, %61
%76 = phi i32 [ 0, %61 ], [ %71, %64 ]
%77 = icmp slt i32 %76, %45
br i1 %77, label %86, label %78
78: ; preds = %75
%79 = shl i32 %76, 1
%80 = load i64, ptr @cur_bit, align 8, !tbaa !7
%81 = icmp ne i64 %80, 0
%82 = zext i1 %81 to i32
%83 = tail call i32 (...) @load_bit() #2
%84 = sub i32 %79, %45
%85 = add i32 %84, %82
br label %86
86: ; preds = %78, %75
%87 = phi i32 [ %85, %78 ], [ %76, %75 ]
%88 = xor i32 %87, -1
%89 = add i32 %62, %88
%90 = load i32, ptr %52, align 4, !tbaa !15
%91 = icmp eq i32 %89, %90
%92 = zext i1 %91 to i32
%93 = tail call i32 @assert(i32 noundef %92) #2
%94 = getelementptr inbounds i32, ptr %52, i64 1
%95 = add nsw i32 %50, -1
%96 = icmp eq i32 %50, 0
br i1 %96, label %97, label %49, !llvm.loop !17
97: ; preds = %86, %42
%98 = icmp eq i32 %2, 0
%99 = zext i1 %98 to i32
%100 = tail call i32 @assert(i32 noundef %99) #2
ret i32 %27
}
declare i32 @load_bit(...) local_unnamed_addr #1
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i32 @compute_golomb_parameter(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = distinct !{!11, !6}
!12 = distinct !{!12, !6}
!13 = distinct !{!13, !6}
!14 = distinct !{!14, !6}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !9, i64 0}
!17 = distinct !{!17, !6}
| ; ModuleID = 'AnghaBench/kphp-kdb/hints/extr_maccub.c_golomb_decode_list.c'
source_filename = "AnghaBench/kphp-kdb/hints/extr_maccub.c_golomb_decode_list.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cur_bit = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @golomb_decode_list(ptr nocapture noundef readnone %0, i32 noundef %1, i32 noundef %2, ptr nocapture noundef readonly %3) local_unnamed_addr #0 {
%5 = icmp sgt i32 %1, 1
br i1 %5, label %8, label %25
6: ; preds = %8
%7 = icmp sgt i32 %10, -2
br i1 %7, label %14, label %25
8: ; preds = %4, %8
%9 = phi i32 [ %11, %8 ], [ 1, %4 ]
%10 = phi i32 [ %12, %8 ], [ -1, %4 ]
%11 = shl nsw i32 %9, 1
%12 = add nsw i32 %10, 1
%13 = icmp slt i32 %11, %1
br i1 %13, label %8, label %6, !llvm.loop !6
14: ; preds = %6, %14
%15 = phi i32 [ %21, %14 ], [ 0, %6 ]
%16 = phi i32 [ %23, %14 ], [ %12, %6 ]
%17 = load i64, ptr @cur_bit, align 8, !tbaa !8
%18 = icmp eq i64 %17, 0
%19 = shl nuw i32 1, %16
%20 = select i1 %18, i32 0, i32 %19
%21 = add nsw i32 %20, %15
%22 = tail call i32 @load_bit() #2
%23 = add nsw i32 %16, -1
%24 = icmp eq i32 %16, 0
br i1 %24, label %25, label %14, !llvm.loop !12
25: ; preds = %14, %4, %6
%26 = phi i32 [ 0, %6 ], [ 0, %4 ], [ %21, %14 ]
%27 = add nsw i32 %26, 1
%28 = icmp sgt i32 %26, -1
%29 = icmp sgt i32 %2, 0
%30 = and i1 %29, %28
%31 = zext i1 %30 to i32
%32 = tail call i32 @assert(i32 noundef %31) #2
%33 = add nsw i32 %1, 1
%34 = tail call i32 @compute_golomb_parameter(i32 noundef %1, i32 noundef %27) #2
%35 = icmp slt i32 %34, 1
br i1 %35, label %42, label %36
36: ; preds = %25, %36
%37 = phi i32 [ %39, %36 ], [ 1, %25 ]
%38 = phi i32 [ %40, %36 ], [ 0, %25 ]
%39 = shl i32 %37, 1
%40 = add nuw nsw i32 %38, 1
%41 = icmp slt i32 %34, %39
br i1 %41, label %42, label %36, !llvm.loop !13
42: ; preds = %36, %25
%43 = phi i32 [ 0, %25 ], [ %40, %36 ]
%44 = phi i32 [ 1, %25 ], [ %39, %36 ]
%45 = sub nsw i32 %44, %34
%46 = icmp eq i32 %27, 0
br i1 %46, label %97, label %47
47: ; preds = %42
%48 = icmp sgt i32 %43, 1
br label %49
49: ; preds = %47, %86
%50 = phi i32 [ %26, %47 ], [ %95, %86 ]
%51 = phi i32 [ %33, %47 ], [ %89, %86 ]
%52 = phi ptr [ %3, %47 ], [ %94, %86 ]
%53 = load i64, ptr @cur_bit, align 8, !tbaa !8
%54 = icmp eq i64 %53, 0
br i1 %54, label %61, label %55
55: ; preds = %49, %55
%56 = phi i32 [ %57, %55 ], [ %51, %49 ]
%57 = sub nsw i32 %56, %34
%58 = tail call i32 @load_bit() #2
%59 = load i64, ptr @cur_bit, align 8, !tbaa !8
%60 = icmp eq i64 %59, 0
br i1 %60, label %61, label %55, !llvm.loop !14
61: ; preds = %55, %49
%62 = phi i32 [ %51, %49 ], [ %57, %55 ]
%63 = tail call i32 @load_bit() #2
br i1 %48, label %64, label %75
64: ; preds = %61, %64
%65 = phi i32 [ %73, %64 ], [ %43, %61 ]
%66 = phi i32 [ %71, %64 ], [ 0, %61 ]
%67 = shl i32 %66, 1
%68 = load i64, ptr @cur_bit, align 8, !tbaa !8
%69 = icmp ne i64 %68, 0
%70 = zext i1 %69 to i32
%71 = or disjoint i32 %67, %70
%72 = tail call i32 @load_bit() #2
%73 = add nsw i32 %65, -1
%74 = icmp ugt i32 %65, 2
br i1 %74, label %64, label %75, !llvm.loop !15
75: ; preds = %64, %61
%76 = phi i32 [ 0, %61 ], [ %71, %64 ]
%77 = icmp slt i32 %76, %45
br i1 %77, label %86, label %78
78: ; preds = %75
%79 = shl i32 %76, 1
%80 = load i64, ptr @cur_bit, align 8, !tbaa !8
%81 = icmp ne i64 %80, 0
%82 = zext i1 %81 to i32
%83 = tail call i32 @load_bit() #2
%84 = sub i32 %79, %45
%85 = add i32 %84, %82
br label %86
86: ; preds = %78, %75
%87 = phi i32 [ %85, %78 ], [ %76, %75 ]
%88 = xor i32 %87, -1
%89 = add i32 %62, %88
%90 = load i32, ptr %52, align 4, !tbaa !16
%91 = icmp eq i32 %89, %90
%92 = zext i1 %91 to i32
%93 = tail call i32 @assert(i32 noundef %92) #2
%94 = getelementptr inbounds i8, ptr %52, i64 4
%95 = add nsw i32 %50, -1
%96 = icmp eq i32 %50, 0
br i1 %96, label %97, label %49, !llvm.loop !18
97: ; preds = %86, %42
%98 = icmp eq i32 %2, 0
%99 = zext i1 %98 to i32
%100 = tail call i32 @assert(i32 noundef %99) #2
ret i32 %27
}
declare i32 @load_bit(...) local_unnamed_addr #1
declare i32 @assert(i32 noundef) local_unnamed_addr #1
declare i32 @compute_golomb_parameter(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = distinct !{!6, !7}
!7 = !{!"llvm.loop.mustprogress"}
!8 = !{!9, !9, i64 0}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = distinct !{!12, !7}
!13 = distinct !{!13, !7}
!14 = distinct !{!14, !7}
!15 = distinct !{!15, !7}
!16 = !{!17, !17, i64 0}
!17 = !{!"int", !10, i64 0}
!18 = distinct !{!18, !7}
| kphp-kdb_hints_extr_maccub.c_golomb_decode_list |
; ModuleID = 'AnghaBench/postgres/src/pl/plperl/extr_plperl.c_plperl_hash_from_tuple.c'
source_filename = "AnghaBench/postgres/src/pl/plperl/extr_plperl.c_plperl_hash_from_tuple.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_11__ = type { i32, i32, i64, i64 }
%struct.TYPE_9__ = type { i32, i32 }
@dTHX = dso_local local_unnamed_addr global i32 0, align 4
@current_call_data = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @plperl_hash_from_tuple], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @plperl_hash_from_tuple(i32 noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = alloca i32, align 4
%5 = alloca i32, align 4
%6 = alloca i32, align 4
%7 = tail call i32 (...) @check_stack_depth() #3
%8 = tail call ptr (...) @newHV() #3
%9 = load i32, ptr %1, align 4, !tbaa !5
%10 = tail call i32 @hv_ksplit(ptr noundef %8, i32 noundef %9) #3
%11 = load i32, ptr %1, align 4, !tbaa !5
%12 = icmp sgt i32 %11, 0
br i1 %12, label %13, label %76
13: ; preds = %3
%14 = icmp ne i32 %2, 0
br label %15
15: ; preds = %13, %72
%16 = phi i32 [ 0, %13 ], [ %73, %72 ]
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
%17 = call ptr @TupleDescAttr(ptr noundef nonnull %1, i32 noundef %16) #3
%18 = getelementptr inbounds %struct.TYPE_11__, ptr %17, i64 0, i32 3
%19 = load i64, ptr %18, align 8, !tbaa !10
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %72
21: ; preds = %15
%22 = getelementptr inbounds %struct.TYPE_11__, ptr %17, i64 0, i32 2
%23 = load i64, ptr %22, align 8, !tbaa !13
%24 = icmp eq i64 %23, 0
%25 = or i1 %14, %24
br i1 %25, label %26, label %72
26: ; preds = %21
%27 = getelementptr inbounds %struct.TYPE_11__, ptr %17, i64 0, i32 1
%28 = load i32, ptr %27, align 4, !tbaa !14
%29 = call ptr @NameStr(i32 noundef %28) #3
%30 = add nuw nsw i32 %16, 1
%31 = call i32 @heap_getattr(i32 noundef %0, i32 noundef %30, ptr noundef nonnull %1, ptr noundef nonnull %4) #3
%32 = load i32, ptr %4, align 4, !tbaa !15
%33 = icmp eq i32 %32, 0
br i1 %33, label %36, label %34
34: ; preds = %26
%35 = call ptr @newSV(i32 noundef 0) #3
br label %69
36: ; preds = %26
%37 = load i32, ptr %17, align 8, !tbaa !16
%38 = call i64 @type_is_rowtype(i32 noundef %37) #3
%39 = icmp eq i64 %38, 0
br i1 %39, label %42, label %40
40: ; preds = %36
%41 = call ptr @plperl_hash_from_datum(i32 noundef %31) #3
br label %69
42: ; preds = %36
%43 = load i32, ptr %17, align 8, !tbaa !16
%44 = call i32 @get_base_element_type(i32 noundef %43) #3
%45 = call i64 @OidIsValid(i32 noundef %44) #3
%46 = icmp eq i64 %45, 0
%47 = load i32, ptr %17, align 8, !tbaa !16
br i1 %46, label %50, label %48
48: ; preds = %42
%49 = call ptr @plperl_ref_from_pg_array(i32 noundef %31, i32 noundef %47) #3
br label %69
50: ; preds = %42
%51 = load ptr, ptr @current_call_data, align 8, !tbaa !17
%52 = load ptr, ptr %51, align 8, !tbaa !19
%53 = getelementptr inbounds %struct.TYPE_9__, ptr %52, i64 0, i32 1
%54 = load i32, ptr %53, align 4, !tbaa !21
%55 = load i32, ptr %52, align 4, !tbaa !23
%56 = call i32 @get_transform_fromsql(i32 noundef %47, i32 noundef %54, i32 noundef %55) #3
%57 = icmp eq i32 %56, 0
br i1 %57, label %62, label %58
58: ; preds = %50
%59 = call i32 @OidFunctionCall1(i32 noundef %56, i32 noundef %31) #3
%60 = call i64 @DatumGetPointer(i32 noundef %59) #3
%61 = inttoptr i64 %60 to ptr
br label %69
62: ; preds = %50
%63 = load i32, ptr %17, align 8, !tbaa !16
%64 = call i32 @getTypeOutputInfo(i32 noundef %63, ptr noundef nonnull %6, ptr noundef nonnull %5) #3
%65 = load i32, ptr %6, align 4, !tbaa !15
%66 = call ptr @OidOutputFunctionCall(i32 noundef %65, i32 noundef %31) #3
%67 = call ptr @cstr2sv(ptr noundef %66) #3
%68 = call i32 @pfree(ptr noundef %66) #3
br label %69
69: ; preds = %48, %62, %58, %34, %40
%70 = phi ptr [ %41, %40 ], [ %35, %34 ], [ %49, %48 ], [ %61, %58 ], [ %67, %62 ]
%71 = call i32 @hv_store_string(ptr noundef %8, ptr noundef %29, ptr noundef %70) #3
br label %72
72: ; preds = %69, %21, %15
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
%73 = add nuw nsw i32 %16, 1
%74 = load i32, ptr %1, align 4, !tbaa !5
%75 = icmp slt i32 %73, %74
br i1 %75, label %15, label %76, !llvm.loop !24
76: ; preds = %72, %3
%77 = call ptr @newRV_noinc(ptr noundef %8) #3
ret ptr %77
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @check_stack_depth(...) local_unnamed_addr #2
declare ptr @newHV(...) local_unnamed_addr #2
declare i32 @hv_ksplit(ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @TupleDescAttr(ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @NameStr(i32 noundef) local_unnamed_addr #2
declare i32 @heap_getattr(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @hv_store_string(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @newSV(i32 noundef) local_unnamed_addr #2
declare i64 @type_is_rowtype(i32 noundef) local_unnamed_addr #2
declare ptr @plperl_hash_from_datum(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i64 @OidIsValid(i32 noundef) local_unnamed_addr #2
declare i32 @get_base_element_type(i32 noundef) local_unnamed_addr #2
declare ptr @plperl_ref_from_pg_array(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @get_transform_fromsql(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @DatumGetPointer(i32 noundef) local_unnamed_addr #2
declare i32 @OidFunctionCall1(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @getTypeOutputInfo(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @OidOutputFunctionCall(i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @cstr2sv(ptr noundef) local_unnamed_addr #2
declare i32 @pfree(ptr noundef) local_unnamed_addr #2
declare ptr @newRV_noinc(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_10__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 16}
!11 = !{!"TYPE_11__", !7, i64 0, !7, i64 4, !12, i64 8, !12, i64 16}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!11, !7, i64 4}
!15 = !{!7, !7, i64 0}
!16 = !{!11, !7, i64 0}
!17 = !{!18, !18, i64 0}
!18 = !{!"any pointer", !8, i64 0}
!19 = !{!20, !18, i64 0}
!20 = !{!"TYPE_12__", !18, i64 0}
!21 = !{!22, !7, i64 4}
!22 = !{!"TYPE_9__", !7, i64 0, !7, i64 4}
!23 = !{!22, !7, i64 0}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/postgres/src/pl/plperl/extr_plperl.c_plperl_hash_from_tuple.c'
source_filename = "AnghaBench/postgres/src/pl/plperl/extr_plperl.c_plperl_hash_from_tuple.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@dTHX = common local_unnamed_addr global i32 0, align 4
@current_call_data = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @plperl_hash_from_tuple], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @plperl_hash_from_tuple(i32 noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = alloca i32, align 4
%5 = alloca i32, align 4
%6 = alloca i32, align 4
%7 = tail call i32 @check_stack_depth() #3
%8 = tail call ptr @newHV() #3
%9 = load i32, ptr %1, align 4, !tbaa !6
%10 = tail call i32 @hv_ksplit(ptr noundef %8, i32 noundef %9) #3
%11 = load i32, ptr %1, align 4, !tbaa !6
%12 = icmp sgt i32 %11, 0
br i1 %12, label %13, label %76
13: ; preds = %3
%14 = icmp ne i32 %2, 0
br label %15
15: ; preds = %13, %72
%16 = phi i32 [ 0, %13 ], [ %73, %72 ]
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
%17 = call ptr @TupleDescAttr(ptr noundef nonnull %1, i32 noundef %16) #3
%18 = getelementptr inbounds i8, ptr %17, i64 16
%19 = load i64, ptr %18, align 8, !tbaa !11
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %72
21: ; preds = %15
%22 = getelementptr inbounds i8, ptr %17, i64 8
%23 = load i64, ptr %22, align 8, !tbaa !14
%24 = icmp eq i64 %23, 0
%25 = or i1 %14, %24
br i1 %25, label %26, label %72
26: ; preds = %21
%27 = getelementptr inbounds i8, ptr %17, i64 4
%28 = load i32, ptr %27, align 4, !tbaa !15
%29 = call ptr @NameStr(i32 noundef %28) #3
%30 = add nuw nsw i32 %16, 1
%31 = call i32 @heap_getattr(i32 noundef %0, i32 noundef %30, ptr noundef nonnull %1, ptr noundef nonnull %4) #3
%32 = load i32, ptr %4, align 4, !tbaa !16
%33 = icmp eq i32 %32, 0
br i1 %33, label %36, label %34
34: ; preds = %26
%35 = call ptr @newSV(i32 noundef 0) #3
br label %69
36: ; preds = %26
%37 = load i32, ptr %17, align 8, !tbaa !17
%38 = call i64 @type_is_rowtype(i32 noundef %37) #3
%39 = icmp eq i64 %38, 0
br i1 %39, label %42, label %40
40: ; preds = %36
%41 = call ptr @plperl_hash_from_datum(i32 noundef %31) #3
br label %69
42: ; preds = %36
%43 = load i32, ptr %17, align 8, !tbaa !17
%44 = call i32 @get_base_element_type(i32 noundef %43) #3
%45 = call i64 @OidIsValid(i32 noundef %44) #3
%46 = icmp eq i64 %45, 0
%47 = load i32, ptr %17, align 8, !tbaa !17
br i1 %46, label %50, label %48
48: ; preds = %42
%49 = call ptr @plperl_ref_from_pg_array(i32 noundef %31, i32 noundef %47) #3
br label %69
50: ; preds = %42
%51 = load ptr, ptr @current_call_data, align 8, !tbaa !18
%52 = load ptr, ptr %51, align 8, !tbaa !20
%53 = getelementptr inbounds i8, ptr %52, i64 4
%54 = load i32, ptr %53, align 4, !tbaa !22
%55 = load i32, ptr %52, align 4, !tbaa !24
%56 = call i32 @get_transform_fromsql(i32 noundef %47, i32 noundef %54, i32 noundef %55) #3
%57 = icmp eq i32 %56, 0
br i1 %57, label %62, label %58
58: ; preds = %50
%59 = call i32 @OidFunctionCall1(i32 noundef %56, i32 noundef %31) #3
%60 = call i64 @DatumGetPointer(i32 noundef %59) #3
%61 = inttoptr i64 %60 to ptr
br label %69
62: ; preds = %50
%63 = load i32, ptr %17, align 8, !tbaa !17
%64 = call i32 @getTypeOutputInfo(i32 noundef %63, ptr noundef nonnull %6, ptr noundef nonnull %5) #3
%65 = load i32, ptr %6, align 4, !tbaa !16
%66 = call ptr @OidOutputFunctionCall(i32 noundef %65, i32 noundef %31) #3
%67 = call ptr @cstr2sv(ptr noundef %66) #3
%68 = call i32 @pfree(ptr noundef %66) #3
br label %69
69: ; preds = %48, %62, %58, %34, %40
%70 = phi ptr [ %41, %40 ], [ %35, %34 ], [ %49, %48 ], [ %61, %58 ], [ %67, %62 ]
%71 = call i32 @hv_store_string(ptr noundef %8, ptr noundef %29, ptr noundef %70) #3
br label %72
72: ; preds = %69, %21, %15
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
%73 = add nuw nsw i32 %16, 1
%74 = load i32, ptr %1, align 4, !tbaa !6
%75 = icmp slt i32 %73, %74
br i1 %75, label %15, label %76, !llvm.loop !25
76: ; preds = %72, %3
%77 = call ptr @newRV_noinc(ptr noundef %8) #3
ret ptr %77
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @check_stack_depth(...) local_unnamed_addr #2
declare ptr @newHV(...) local_unnamed_addr #2
declare i32 @hv_ksplit(ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @TupleDescAttr(ptr noundef, i32 noundef) local_unnamed_addr #2
declare ptr @NameStr(i32 noundef) local_unnamed_addr #2
declare i32 @heap_getattr(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @hv_store_string(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @newSV(i32 noundef) local_unnamed_addr #2
declare i64 @type_is_rowtype(i32 noundef) local_unnamed_addr #2
declare ptr @plperl_hash_from_datum(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i64 @OidIsValid(i32 noundef) local_unnamed_addr #2
declare i32 @get_base_element_type(i32 noundef) local_unnamed_addr #2
declare ptr @plperl_ref_from_pg_array(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @get_transform_fromsql(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @DatumGetPointer(i32 noundef) local_unnamed_addr #2
declare i32 @OidFunctionCall1(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @getTypeOutputInfo(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @OidOutputFunctionCall(i32 noundef, i32 noundef) local_unnamed_addr #2
declare ptr @cstr2sv(ptr noundef) local_unnamed_addr #2
declare i32 @pfree(ptr noundef) local_unnamed_addr #2
declare ptr @newRV_noinc(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_10__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 16}
!12 = !{!"TYPE_11__", !8, i64 0, !8, i64 4, !13, i64 8, !13, i64 16}
!13 = !{!"long", !9, i64 0}
!14 = !{!12, !13, i64 8}
!15 = !{!12, !8, i64 4}
!16 = !{!8, !8, i64 0}
!17 = !{!12, !8, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"any pointer", !9, i64 0}
!20 = !{!21, !19, i64 0}
!21 = !{!"TYPE_12__", !19, i64 0}
!22 = !{!23, !8, i64 4}
!23 = !{!"TYPE_9__", !8, i64 0, !8, i64 4}
!24 = !{!23, !8, i64 0}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
| postgres_src_pl_plperl_extr_plperl.c_plperl_hash_from_tuple |
; ModuleID = 'AnghaBench/libevent/extr_signal.c_evsig_set_base_.c'
source_filename = "AnghaBench/libevent/extr_signal.c_evsig_set_base_.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { ptr, i32 }
@evsig_base = dso_local local_unnamed_addr global ptr null, align 8
@evsig_base_n_signals_added = dso_local local_unnamed_addr global i32 0, align 4
@evsig_base_fd = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @evsig_set_base_(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 (...) @EVSIGBASE_LOCK() #2
store ptr %0, ptr @evsig_base, align 8, !tbaa !5
%3 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 1
%4 = load i32, ptr %3, align 8, !tbaa !9
store i32 %4, ptr @evsig_base_n_signals_added, align 4, !tbaa !13
%5 = load ptr, ptr %0, align 8, !tbaa !14
%6 = getelementptr inbounds i32, ptr %5, i64 1
%7 = load i32, ptr %6, align 4, !tbaa !13
store i32 %7, ptr @evsig_base_fd, align 4, !tbaa !13
%8 = tail call i32 (...) @EVSIGBASE_UNLOCK() #2
ret void
}
declare i32 @EVSIGBASE_LOCK(...) local_unnamed_addr #1
declare i32 @EVSIGBASE_UNLOCK(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"event_base", !11, i64 0}
!11 = !{!"TYPE_2__", !6, i64 0, !12, i64 8}
!12 = !{!"int", !7, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!10, !6, i64 0}
| ; ModuleID = 'AnghaBench/libevent/extr_signal.c_evsig_set_base_.c'
source_filename = "AnghaBench/libevent/extr_signal.c_evsig_set_base_.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@evsig_base = common local_unnamed_addr global ptr null, align 8
@evsig_base_n_signals_added = common local_unnamed_addr global i32 0, align 4
@evsig_base_fd = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @evsig_set_base_(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @EVSIGBASE_LOCK() #2
store ptr %0, ptr @evsig_base, align 8, !tbaa !6
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load i32, ptr %3, align 8, !tbaa !10
store i32 %4, ptr @evsig_base_n_signals_added, align 4, !tbaa !14
%5 = load ptr, ptr %0, align 8, !tbaa !15
%6 = getelementptr inbounds i8, ptr %5, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !14
store i32 %7, ptr @evsig_base_fd, align 4, !tbaa !14
%8 = tail call i32 @EVSIGBASE_UNLOCK() #2
ret void
}
declare i32 @EVSIGBASE_LOCK(...) local_unnamed_addr #1
declare i32 @EVSIGBASE_UNLOCK(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 8}
!11 = !{!"event_base", !12, i64 0}
!12 = !{!"TYPE_2__", !7, i64 0, !13, i64 8}
!13 = !{!"int", !8, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!11, !7, i64 0}
| libevent_extr_signal.c_evsig_set_base_ |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/extr_fwil.c_brcmf_fil_cmd_int_set.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/extr_fwil.c_brcmf_fil_cmd_int_set.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.brcmf_if = type { ptr, i32 }
@FIL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [28 x i8] c"ifidx=%d, cmd=%d, value=%d\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i32 @brcmf_fil_cmd_int_set(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = tail call i32 @cpu_to_le32(i32 noundef %2) #3
store i32 %5, ptr %4, align 4, !tbaa !5
%6 = load ptr, ptr %0, align 8, !tbaa !9
%7 = tail call i32 @mutex_lock(ptr noundef %6) #3
%8 = load i32, ptr @FIL, align 4, !tbaa !5
%9 = getelementptr inbounds %struct.brcmf_if, ptr %0, i64 0, i32 1
%10 = load i32, ptr %9, align 8, !tbaa !12
%11 = tail call i32 @brcmf_dbg(i32 noundef %8, ptr noundef nonnull @.str, i32 noundef %10, i32 noundef %1, i32 noundef %2) #3
%12 = call i32 @brcmf_fil_cmd_data(ptr noundef nonnull %0, i32 noundef %1, ptr noundef nonnull %4, i32 noundef 4, i32 noundef 1) #3
%13 = load ptr, ptr %0, align 8, !tbaa !9
%14 = call i32 @mutex_unlock(ptr noundef %13) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %12
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cpu_to_le32(i32 noundef) local_unnamed_addr #2
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #2
declare i32 @brcmf_dbg(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @brcmf_fil_cmd_data(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"brcmf_if", !11, i64 0, !6, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !6, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/extr_fwil.c_brcmf_fil_cmd_int_set.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/extr_fwil.c_brcmf_fil_cmd_int_set.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FIL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [28 x i8] c"ifidx=%d, cmd=%d, value=%d\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @brcmf_fil_cmd_int_set(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = tail call i32 @cpu_to_le32(i32 noundef %2) #3
store i32 %5, ptr %4, align 4, !tbaa !6
%6 = load ptr, ptr %0, align 8, !tbaa !10
%7 = tail call i32 @mutex_lock(ptr noundef %6) #3
%8 = load i32, ptr @FIL, align 4, !tbaa !6
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = load i32, ptr %9, align 8, !tbaa !13
%11 = tail call i32 @brcmf_dbg(i32 noundef %8, ptr noundef nonnull @.str, i32 noundef %10, i32 noundef %1, i32 noundef %2) #3
%12 = call i32 @brcmf_fil_cmd_data(ptr noundef nonnull %0, i32 noundef %1, ptr noundef nonnull %4, i32 noundef 4, i32 noundef 1) #3
%13 = load ptr, ptr %0, align 8, !tbaa !10
%14 = call i32 @mutex_unlock(ptr noundef %13) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %12
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cpu_to_le32(i32 noundef) local_unnamed_addr #2
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #2
declare i32 @brcmf_dbg(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @brcmf_fil_cmd_data(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"brcmf_if", !12, i64 0, !7, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !7, i64 8}
| linux_drivers_net_wireless_broadcom_brcm80211_brcmfmac_extr_fwil.c_brcmf_fil_cmd_int_set |
; ModuleID = 'AnghaBench/linux/drivers/tty/serial/8250/extr_serial_cs.c_serial_detach.c'
source_filename = "AnghaBench/linux/drivers/tty/serial/8250/extr_serial_cs.c_serial_detach.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pcmcia_device = type { i32, ptr }
@.str = private unnamed_addr constant [15 x i8] c"serial_detach\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @serial_detach], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @serial_detach(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.pcmcia_device, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = tail call i32 @dev_dbg(ptr noundef %0, ptr noundef nonnull @.str) #2
%5 = tail call i32 @serial_remove(ptr noundef %0) #2
%6 = tail call i32 @kfree(ptr noundef %3) #2
ret void
}
declare i32 @dev_dbg(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @serial_remove(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"pcmcia_device", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/tty/serial/8250/extr_serial_cs.c_serial_detach.c'
source_filename = "AnghaBench/linux/drivers/tty/serial/8250/extr_serial_cs.c_serial_detach.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [15 x i8] c"serial_detach\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @serial_detach], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @serial_detach(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = tail call i32 @dev_dbg(ptr noundef %0, ptr noundef nonnull @.str) #2
%5 = tail call i32 @serial_remove(ptr noundef %0) #2
%6 = tail call i32 @kfree(ptr noundef %3) #2
ret void
}
declare i32 @dev_dbg(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @serial_remove(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"pcmcia_device", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
| linux_drivers_tty_serial_8250_extr_serial_cs.c_serial_detach |
; ModuleID = 'AnghaBench/freebsd/contrib/processor-trace/libipt/test/src/extr_ptunit-insn_decoder.c_decoder_init_null.c'
source_filename = "AnghaBench/freebsd/contrib/processor-trace/libipt/test/src/extr_ptunit-insn_decoder.c_decoder_init_null.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.pt_insn_decoder = type { i32 }
%struct.pt_config = type { i32 }
@pte_internal = dso_local local_unnamed_addr global i32 0, align 4
@pte_invalid = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @decoder_init_null], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @decoder_init_null() #0 {
%1 = alloca %struct.pt_insn_decoder, align 4
%2 = alloca %struct.pt_config, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = call i32 @pt_insn_decoder_init(ptr noundef null, ptr noundef nonnull %2) #3
%4 = load i32, ptr @pte_internal, align 4, !tbaa !5
%5 = sub nsw i32 0, %4
%6 = call i32 @ptu_int_eq(i32 noundef %3, i32 noundef %5) #3
%7 = call i32 @pt_insn_decoder_init(ptr noundef nonnull %1, ptr noundef null) #3
%8 = load i32, ptr @pte_invalid, align 4, !tbaa !5
%9 = sub nsw i32 0, %8
%10 = call i32 @ptu_int_eq(i32 noundef %7, i32 noundef %9) #3
%11 = call i32 (...) @ptu_passed() #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret i32 %11
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @pt_insn_decoder_init(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ptu_int_eq(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ptu_passed(...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/processor-trace/libipt/test/src/extr_ptunit-insn_decoder.c_decoder_init_null.c'
source_filename = "AnghaBench/freebsd/contrib/processor-trace/libipt/test/src/extr_ptunit-insn_decoder.c_decoder_init_null.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.pt_insn_decoder = type { i32 }
%struct.pt_config = type { i32 }
@pte_internal = common local_unnamed_addr global i32 0, align 4
@pte_invalid = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @decoder_init_null], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @decoder_init_null() #0 {
%1 = alloca %struct.pt_insn_decoder, align 4
%2 = alloca %struct.pt_config, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = call i32 @pt_insn_decoder_init(ptr noundef null, ptr noundef nonnull %2) #3
%4 = load i32, ptr @pte_internal, align 4, !tbaa !6
%5 = sub nsw i32 0, %4
%6 = call i32 @ptu_int_eq(i32 noundef %3, i32 noundef %5) #3
%7 = call i32 @pt_insn_decoder_init(ptr noundef nonnull %1, ptr noundef null) #3
%8 = load i32, ptr @pte_invalid, align 4, !tbaa !6
%9 = sub nsw i32 0, %8
%10 = call i32 @ptu_int_eq(i32 noundef %7, i32 noundef %9) #3
%11 = call i32 @ptu_passed() #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3
ret i32 %11
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @pt_insn_decoder_init(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ptu_int_eq(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ptu_passed(...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_processor-trace_libipt_test_src_extr_ptunit-insn_decoder.c_decoder_init_null |
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/mthca/extr_mthca_eq.c_mthca_tavor_interrupt.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/mthca/extr_mthca_eq.c_mthca_tavor_interrupt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, ptr, i64 }
%struct.mthca_dev = type { %struct.TYPE_8__, %struct.TYPE_7__ }
%struct.TYPE_7__ = type { %struct.TYPE_6__ }
%struct.TYPE_6__ = type { i64 }
%struct.TYPE_9__ = type { i32, i32, i32 }
@IRQ_NONE = dso_local local_unnamed_addr global i32 0, align 4
@MTHCA_ECR_CLR_BASE = dso_local local_unnamed_addr global i64 0, align 8
@MTHCA_ECR_BASE = dso_local local_unnamed_addr global i64 0, align 8
@MTHCA_NUM_EQ = dso_local local_unnamed_addr global i32 0, align 4
@IRQ_HANDLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @mthca_tavor_interrupt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mthca_tavor_interrupt(i32 %0, ptr noundef %1) #0 {
%3 = load i32, ptr %1, align 8, !tbaa !5
%4 = icmp eq i32 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 2
%7 = load i64, ptr %6, align 8, !tbaa !15
%8 = tail call i32 @writel(i32 noundef %3, i64 noundef %7) #2
br label %9
9: ; preds = %5, %2
%10 = getelementptr inbounds %struct.mthca_dev, ptr %1, i64 0, i32 1
%11 = load i64, ptr %10, align 8, !tbaa !16
%12 = add nsw i64 %11, 4
%13 = tail call i32 @readl(i64 noundef %12) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %55, label %15
15: ; preds = %9
%16 = load i64, ptr %10, align 8, !tbaa !16
%17 = load i64, ptr @MTHCA_ECR_CLR_BASE, align 8, !tbaa !17
%18 = load i64, ptr @MTHCA_ECR_BASE, align 8, !tbaa !17
%19 = add i64 %16, 4
%20 = add i64 %19, %17
%21 = sub i64 %20, %18
%22 = tail call i32 @writel(i32 noundef %13, i64 noundef %21) #2
%23 = load i32, ptr @MTHCA_NUM_EQ, align 4, !tbaa !18
%24 = icmp sgt i32 %23, 0
br i1 %24, label %25, label %55
25: ; preds = %15
%26 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 1
br label %27
27: ; preds = %25, %50
%28 = phi i32 [ %23, %25 ], [ %51, %50 ]
%29 = phi i64 [ 0, %25 ], [ %52, %50 ]
%30 = load ptr, ptr %26, align 8, !tbaa !19
%31 = getelementptr inbounds %struct.TYPE_9__, ptr %30, i64 %29
%32 = load i32, ptr %31, align 4, !tbaa !20
%33 = and i32 %32, %13
%34 = icmp eq i32 %33, 0
br i1 %34, label %50, label %35
35: ; preds = %27
%36 = tail call i64 @mthca_eq_int(ptr noundef nonnull %1, ptr noundef nonnull %31) #2
%37 = icmp eq i64 %36, 0
br i1 %37, label %44, label %38
38: ; preds = %35
%39 = load ptr, ptr %26, align 8, !tbaa !19
%40 = getelementptr inbounds %struct.TYPE_9__, ptr %39, i64 %29
%41 = getelementptr inbounds %struct.TYPE_9__, ptr %39, i64 %29, i32 2
%42 = load i32, ptr %41, align 4, !tbaa !22
%43 = tail call i32 @tavor_set_eq_ci(ptr noundef nonnull %1, ptr noundef %40, i32 noundef %42) #2
br label %44
44: ; preds = %38, %35
%45 = load ptr, ptr %26, align 8, !tbaa !19
%46 = getelementptr inbounds %struct.TYPE_9__, ptr %45, i64 %29, i32 1
%47 = load i32, ptr %46, align 4, !tbaa !23
%48 = tail call i32 @tavor_eq_req_not(ptr noundef nonnull %1, i32 noundef %47) #2
%49 = load i32, ptr @MTHCA_NUM_EQ, align 4, !tbaa !18
br label %50
50: ; preds = %27, %44
%51 = phi i32 [ %28, %27 ], [ %49, %44 ]
%52 = add nuw nsw i64 %29, 1
%53 = sext i32 %51 to i64
%54 = icmp slt i64 %52, %53
br i1 %54, label %27, label %55, !llvm.loop !24
55: ; preds = %50, %15, %9
%56 = phi ptr [ @IRQ_NONE, %9 ], [ @IRQ_HANDLED, %15 ], [ @IRQ_HANDLED, %50 ]
%57 = load i32, ptr %56, align 4, !tbaa !18
ret i32 %57
}
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @readl(i64 noundef) local_unnamed_addr #1
declare i64 @mthca_eq_int(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @tavor_set_eq_ci(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tavor_eq_req_not(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"mthca_dev", !7, i64 0, !13, i64 24}
!7 = !{!"TYPE_8__", !8, i64 0, !11, i64 8, !12, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!"TYPE_7__", !14, i64 0}
!14 = !{!"TYPE_6__", !12, i64 0}
!15 = !{!6, !12, i64 16}
!16 = !{!6, !12, i64 24}
!17 = !{!12, !12, i64 0}
!18 = !{!8, !8, i64 0}
!19 = !{!6, !11, i64 8}
!20 = !{!21, !8, i64 0}
!21 = !{!"TYPE_9__", !8, i64 0, !8, i64 4, !8, i64 8}
!22 = !{!21, !8, i64 8}
!23 = !{!21, !8, i64 4}
!24 = distinct !{!24, !25}
!25 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/mthca/extr_mthca_eq.c_mthca_tavor_interrupt.c'
source_filename = "AnghaBench/linux/drivers/infiniband/hw/mthca/extr_mthca_eq.c_mthca_tavor_interrupt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_9__ = type { i32, i32, i32 }
@IRQ_NONE = common local_unnamed_addr global i32 0, align 4
@MTHCA_ECR_CLR_BASE = common local_unnamed_addr global i64 0, align 8
@MTHCA_ECR_BASE = common local_unnamed_addr global i64 0, align 8
@MTHCA_NUM_EQ = common local_unnamed_addr global i32 0, align 4
@IRQ_HANDLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mthca_tavor_interrupt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mthca_tavor_interrupt(i32 %0, ptr noundef %1) #0 {
%3 = load i32, ptr %1, align 8, !tbaa !6
%4 = icmp eq i32 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %2
%6 = getelementptr inbounds i8, ptr %1, i64 16
%7 = load i64, ptr %6, align 8, !tbaa !16
%8 = tail call i32 @writel(i32 noundef %3, i64 noundef %7) #2
br label %9
9: ; preds = %5, %2
%10 = getelementptr inbounds i8, ptr %1, i64 24
%11 = load i64, ptr %10, align 8, !tbaa !17
%12 = add nsw i64 %11, 4
%13 = tail call i32 @readl(i64 noundef %12) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %55, label %15
15: ; preds = %9
%16 = load i64, ptr %10, align 8, !tbaa !17
%17 = load i64, ptr @MTHCA_ECR_CLR_BASE, align 8, !tbaa !18
%18 = load i64, ptr @MTHCA_ECR_BASE, align 8, !tbaa !18
%19 = add i64 %16, 4
%20 = add i64 %19, %17
%21 = sub i64 %20, %18
%22 = tail call i32 @writel(i32 noundef %13, i64 noundef %21) #2
%23 = load i32, ptr @MTHCA_NUM_EQ, align 4, !tbaa !19
%24 = icmp sgt i32 %23, 0
br i1 %24, label %25, label %55
25: ; preds = %15
%26 = getelementptr inbounds i8, ptr %1, i64 8
br label %27
27: ; preds = %25, %50
%28 = phi i32 [ %23, %25 ], [ %51, %50 ]
%29 = phi i64 [ 0, %25 ], [ %52, %50 ]
%30 = load ptr, ptr %26, align 8, !tbaa !20
%31 = getelementptr inbounds %struct.TYPE_9__, ptr %30, i64 %29
%32 = load i32, ptr %31, align 4, !tbaa !21
%33 = and i32 %32, %13
%34 = icmp eq i32 %33, 0
br i1 %34, label %50, label %35
35: ; preds = %27
%36 = tail call i64 @mthca_eq_int(ptr noundef nonnull %1, ptr noundef nonnull %31) #2
%37 = icmp eq i64 %36, 0
br i1 %37, label %44, label %38
38: ; preds = %35
%39 = load ptr, ptr %26, align 8, !tbaa !20
%40 = getelementptr inbounds %struct.TYPE_9__, ptr %39, i64 %29
%41 = getelementptr inbounds i8, ptr %40, i64 8
%42 = load i32, ptr %41, align 4, !tbaa !23
%43 = tail call i32 @tavor_set_eq_ci(ptr noundef nonnull %1, ptr noundef %40, i32 noundef %42) #2
br label %44
44: ; preds = %38, %35
%45 = load ptr, ptr %26, align 8, !tbaa !20
%46 = getelementptr inbounds %struct.TYPE_9__, ptr %45, i64 %29, i32 1
%47 = load i32, ptr %46, align 4, !tbaa !24
%48 = tail call i32 @tavor_eq_req_not(ptr noundef nonnull %1, i32 noundef %47) #2
%49 = load i32, ptr @MTHCA_NUM_EQ, align 4, !tbaa !19
br label %50
50: ; preds = %27, %44
%51 = phi i32 [ %28, %27 ], [ %49, %44 ]
%52 = add nuw nsw i64 %29, 1
%53 = sext i32 %51 to i64
%54 = icmp slt i64 %52, %53
br i1 %54, label %27, label %55, !llvm.loop !25
55: ; preds = %50, %15, %9
%56 = phi ptr [ @IRQ_NONE, %9 ], [ @IRQ_HANDLED, %15 ], [ @IRQ_HANDLED, %50 ]
%57 = load i32, ptr %56, align 4, !tbaa !19
ret i32 %57
}
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @readl(i64 noundef) local_unnamed_addr #1
declare i64 @mthca_eq_int(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @tavor_set_eq_ci(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tavor_eq_req_not(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"mthca_dev", !8, i64 0, !14, i64 24}
!8 = !{!"TYPE_8__", !9, i64 0, !12, i64 8, !13, i64 16}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!"long", !10, i64 0}
!14 = !{!"TYPE_7__", !15, i64 0}
!15 = !{!"TYPE_6__", !13, i64 0}
!16 = !{!7, !13, i64 16}
!17 = !{!7, !13, i64 24}
!18 = !{!13, !13, i64 0}
!19 = !{!9, !9, i64 0}
!20 = !{!7, !12, i64 8}
!21 = !{!22, !9, i64 0}
!22 = !{!"TYPE_9__", !9, i64 0, !9, i64 4, !9, i64 8}
!23 = !{!22, !9, i64 8}
!24 = !{!22, !9, i64 4}
!25 = distinct !{!25, !26}
!26 = !{!"llvm.loop.mustprogress"}
| linux_drivers_infiniband_hw_mthca_extr_mthca_eq.c_mthca_tavor_interrupt |
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/omfs/extr_inode.c_omfs_put_super.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/omfs/extr_inode.c_omfs_put_super.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @omfs_put_super], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @omfs_put_super(ptr noundef %0) #0 {
%2 = tail call ptr @OMFS_SB(ptr noundef %0) #2
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = tail call i32 @kfree(ptr noundef %3) #2
%5 = tail call i32 @kfree(ptr noundef nonnull %2) #2
store ptr null, ptr %0, align 8, !tbaa !10
ret void
}
declare ptr @OMFS_SB(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"omfs_sb_info", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"super_block", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/fs/omfs/extr_inode.c_omfs_put_super.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/omfs/extr_inode.c_omfs_put_super.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @omfs_put_super], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @omfs_put_super(ptr noundef %0) #0 {
%2 = tail call ptr @OMFS_SB(ptr noundef %0) #2
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = tail call i32 @kfree(ptr noundef %3) #2
%5 = tail call i32 @kfree(ptr noundef nonnull %2) #2
store ptr null, ptr %0, align 8, !tbaa !11
ret void
}
declare ptr @OMFS_SB(ptr noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"omfs_sb_info", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"super_block", !8, i64 0}
| fastsocket_kernel_fs_omfs_extr_inode.c_omfs_put_super |
; ModuleID = 'AnghaBench/linux/fs/ext4/extr_namei.c_ext4_find_delete_entry.c'
source_filename = "AnghaBench/linux/fs/ext4/extr_namei.c_ext4_find_delete_entry.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ENOENT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ext4_find_delete_entry], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ext4_find_delete_entry(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = alloca ptr, align 8
%5 = load i32, ptr @ENOENT, align 4, !tbaa !5
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%6 = call ptr @ext4_find_entry(ptr noundef %1, ptr noundef %2, ptr noundef nonnull %4, ptr noundef null) #3
%7 = call i64 @IS_ERR(ptr noundef %6) #3
%8 = icmp eq i64 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %3
%10 = call i32 @PTR_ERR(ptr noundef %6) #3
br label %18
11: ; preds = %3
%12 = sub nsw i32 0, %5
%13 = icmp eq ptr %6, null
br i1 %13, label %18, label %14
14: ; preds = %11
%15 = load ptr, ptr %4, align 8, !tbaa !9
%16 = call i32 @ext4_delete_entry(ptr noundef %0, ptr noundef %1, ptr noundef %15, ptr noundef nonnull %6) #3
%17 = call i32 @brelse(ptr noundef nonnull %6) #3
br label %18
18: ; preds = %11, %14, %9
%19 = phi i32 [ %10, %9 ], [ %16, %14 ], [ %12, %11 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret i32 %19
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @ext4_find_entry(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #2
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #2
declare i32 @ext4_delete_entry(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @brelse(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/fs/ext4/extr_namei.c_ext4_find_delete_entry.c'
source_filename = "AnghaBench/linux/fs/ext4/extr_namei.c_ext4_find_delete_entry.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENOENT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ext4_find_delete_entry], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ext4_find_delete_entry(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = alloca ptr, align 8
%5 = load i32, ptr @ENOENT, align 4, !tbaa !6
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
%6 = call ptr @ext4_find_entry(ptr noundef %1, ptr noundef %2, ptr noundef nonnull %4, ptr noundef null) #3
%7 = call i64 @IS_ERR(ptr noundef %6) #3
%8 = icmp eq i64 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %3
%10 = call i32 @PTR_ERR(ptr noundef %6) #3
br label %18
11: ; preds = %3
%12 = sub nsw i32 0, %5
%13 = icmp eq ptr %6, null
br i1 %13, label %18, label %14
14: ; preds = %11
%15 = load ptr, ptr %4, align 8, !tbaa !10
%16 = call i32 @ext4_delete_entry(ptr noundef %0, ptr noundef %1, ptr noundef %15, ptr noundef nonnull %6) #3
%17 = call i32 @brelse(ptr noundef nonnull %6) #3
br label %18
18: ; preds = %11, %14, %9
%19 = phi i32 [ %10, %9 ], [ %16, %14 ], [ %12, %11 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret i32 %19
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @ext4_find_entry(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #2
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #2
declare i32 @ext4_delete_entry(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @brelse(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
| linux_fs_ext4_extr_namei.c_ext4_find_delete_entry |
; ModuleID = 'AnghaBench/linux/drivers/macintosh/extr_adbhid.c_adbhid_keyboard_input.c'
source_filename = "AnghaBench/linux/drivers/macintosh/extr_adbhid.c_adbhid_keyboard_input.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@adbhid = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [72 x i8] c"ADB HID on ID %d not yet registered, packet %#02x, %#02x, %#02x, %#02x\0A\00", align 1
@KEYB_KEYREG = dso_local local_unnamed_addr global i8 0, align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @adbhid_keyboard_input], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @adbhid_keyboard_input(ptr nocapture noundef readonly %0, i32 noundef %1, i32 %2) #0 {
%4 = load i8, ptr %0, align 1, !tbaa !5
%5 = zext i8 %4 to i32
%6 = lshr i32 %5, 4
%7 = load ptr, ptr @adbhid, align 8, !tbaa !8
%8 = zext nneg i32 %6 to i64
%9 = getelementptr inbounds i32, ptr %7, i64 %8
%10 = load i32, ptr %9, align 4, !tbaa !10
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %20
12: ; preds = %3
%13 = getelementptr inbounds i8, ptr %0, i64 1
%14 = load i8, ptr %13, align 1, !tbaa !5
%15 = getelementptr inbounds i8, ptr %0, i64 2
%16 = load i8, ptr %15, align 1, !tbaa !5
%17 = getelementptr inbounds i8, ptr %0, i64 3
%18 = load i8, ptr %17, align 1, !tbaa !5
%19 = tail call i32 @pr_err(ptr noundef nonnull @.str, i32 noundef %6, i8 noundef zeroext %4, i8 noundef zeroext %14, i8 noundef zeroext %16, i8 noundef zeroext %18) #2
br label %38
20: ; preds = %3
%21 = icmp eq i32 %1, 3
br i1 %21, label %22, label %38
22: ; preds = %20
%23 = and i32 %5, 3
%24 = load i8, ptr @KEYB_KEYREG, align 1, !tbaa !5
%25 = zext i8 %24 to i32
%26 = icmp eq i32 %23, %25
br i1 %26, label %27, label %38
27: ; preds = %22
%28 = getelementptr inbounds i8, ptr %0, i64 1
%29 = load i8, ptr %28, align 1, !tbaa !5
%30 = tail call i32 @adbhid_input_keycode(i32 noundef %6, i8 noundef zeroext %29, i32 noundef 0) #2
%31 = getelementptr inbounds i8, ptr %0, i64 2
%32 = load i8, ptr %31, align 1, !tbaa !5
switch i8 %32, label %36 [
i8 -1, label %38
i8 127, label %33
]
33: ; preds = %27
%34 = load i8, ptr %28, align 1, !tbaa !5
%35 = icmp eq i8 %34, 127
br i1 %35, label %38, label %36
36: ; preds = %27, %33
%37 = tail call i32 @adbhid_input_keycode(i32 noundef %6, i8 noundef zeroext %32, i32 noundef 0) #2
br label %38
38: ; preds = %33, %36, %27, %20, %22, %12
ret void
}
declare i32 @pr_err(ptr noundef, i32 noundef, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1
declare i32 @adbhid_input_keycode(i32 noundef, i8 noundef zeroext, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/macintosh/extr_adbhid.c_adbhid_keyboard_input.c'
source_filename = "AnghaBench/linux/drivers/macintosh/extr_adbhid.c_adbhid_keyboard_input.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@adbhid = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [72 x i8] c"ADB HID on ID %d not yet registered, packet %#02x, %#02x, %#02x, %#02x\0A\00", align 1
@KEYB_KEYREG = common local_unnamed_addr global i8 0, align 1
@llvm.used = appending global [1 x ptr] [ptr @adbhid_keyboard_input], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @adbhid_keyboard_input(ptr nocapture noundef readonly %0, i32 noundef %1, i32 %2) #0 {
%4 = load i8, ptr %0, align 1, !tbaa !6
%5 = zext i8 %4 to i32
%6 = lshr i32 %5, 4
%7 = load ptr, ptr @adbhid, align 8, !tbaa !9
%8 = zext nneg i32 %6 to i64
%9 = getelementptr inbounds i32, ptr %7, i64 %8
%10 = load i32, ptr %9, align 4, !tbaa !11
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %20
12: ; preds = %3
%13 = getelementptr inbounds i8, ptr %0, i64 1
%14 = load i8, ptr %13, align 1, !tbaa !6
%15 = getelementptr inbounds i8, ptr %0, i64 2
%16 = load i8, ptr %15, align 1, !tbaa !6
%17 = getelementptr inbounds i8, ptr %0, i64 3
%18 = load i8, ptr %17, align 1, !tbaa !6
%19 = tail call i32 @pr_err(ptr noundef nonnull @.str, i32 noundef %6, i8 noundef zeroext %4, i8 noundef zeroext %14, i8 noundef zeroext %16, i8 noundef zeroext %18) #2
br label %38
20: ; preds = %3
%21 = icmp eq i32 %1, 3
br i1 %21, label %22, label %38
22: ; preds = %20
%23 = and i32 %5, 3
%24 = load i8, ptr @KEYB_KEYREG, align 1, !tbaa !6
%25 = zext i8 %24 to i32
%26 = icmp eq i32 %23, %25
br i1 %26, label %27, label %38
27: ; preds = %22
%28 = getelementptr inbounds i8, ptr %0, i64 1
%29 = load i8, ptr %28, align 1, !tbaa !6
%30 = tail call i32 @adbhid_input_keycode(i32 noundef %6, i8 noundef zeroext %29, i32 noundef 0) #2
%31 = getelementptr inbounds i8, ptr %0, i64 2
%32 = load i8, ptr %31, align 1, !tbaa !6
switch i8 %32, label %36 [
i8 -1, label %38
i8 127, label %33
]
33: ; preds = %27
%34 = load i8, ptr %28, align 1, !tbaa !6
%35 = icmp eq i8 %34, 127
br i1 %35, label %38, label %36
36: ; preds = %27, %33
%37 = tail call i32 @adbhid_input_keycode(i32 noundef %6, i8 noundef zeroext %32, i32 noundef 0) #2
br label %38
38: ; preds = %33, %36, %27, %20, %22, %12
ret void
}
declare i32 @pr_err(ptr noundef, i32 noundef, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1
declare i32 @adbhid_input_keycode(i32 noundef, i8 noundef zeroext, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
| linux_drivers_macintosh_extr_adbhid.c_adbhid_keyboard_input |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/hostap/extr_hostap_ap.c_prism2_ap_get_sta_qual.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/hostap/extr_hostap_ap.c_prism2_ap_get_sta_qual.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ap_data = type { i32, %struct.list_head }
%struct.list_head = type { ptr }
%struct.sta_info = type { i32, i32, i32, i32, i32 }
%struct.sockaddr = type { i32, i32 }
%struct.iw_quality = type { i32, i32, ptr, ptr }
@ARPHRD_ETHER = dso_local local_unnamed_addr global i32 0, align 4
@ETH_ALEN = dso_local local_unnamed_addr global i32 0, align 4
@IW_QUAL_DBM = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @prism2_ap_get_sta_qual(ptr nocapture noundef readonly %0, ptr nocapture noundef %1, ptr nocapture noundef writeonly %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
%6 = load ptr, ptr %0, align 8, !tbaa !5
%7 = tail call i32 @spin_lock_bh(ptr noundef %6) #2
%8 = getelementptr inbounds %struct.ap_data, ptr %6, i64 0, i32 1
%9 = icmp eq i32 %4, 0
%10 = load ptr, ptr %8, align 8, !tbaa !10
%11 = icmp ne ptr %10, null
%12 = icmp ne ptr %10, %8
%13 = and i1 %11, %12
br i1 %13, label %14, label %64
14: ; preds = %5, %58
%15 = phi ptr [ %60, %58 ], [ %10, %5 ]
%16 = phi i32 [ %59, %58 ], [ 0, %5 ]
br i1 %9, label %21, label %17
17: ; preds = %14
%18 = getelementptr inbounds %struct.sta_info, ptr %15, i64 0, i32 4
%19 = load i32, ptr %18, align 4, !tbaa !12
%20 = icmp eq i32 %19, 0
br i1 %20, label %58, label %21
21: ; preds = %17, %14
%22 = load i32, ptr @ARPHRD_ETHER, align 4, !tbaa !15
%23 = sext i32 %16 to i64
%24 = getelementptr inbounds %struct.sockaddr, ptr %1, i64 %23
%25 = getelementptr inbounds %struct.sockaddr, ptr %1, i64 %23, i32 1
store i32 %22, ptr %25, align 4, !tbaa !16
%26 = load i32, ptr %24, align 4, !tbaa !18
%27 = getelementptr inbounds %struct.sta_info, ptr %15, i64 0, i32 3
%28 = load i32, ptr %27, align 4, !tbaa !19
%29 = load i32, ptr @ETH_ALEN, align 4, !tbaa !15
%30 = tail call i32 @memcpy(i32 noundef %26, i32 noundef %28, i32 noundef %29) #2
%31 = load i32, ptr %15, align 4, !tbaa !20
%32 = icmp eq i32 %31, 0
%33 = getelementptr inbounds %struct.sta_info, ptr %15, i64 0, i32 1
%34 = load i32, ptr %33, align 4, !tbaa !21
br i1 %32, label %35, label %41
35: ; preds = %21
%36 = icmp slt i32 %34, 27
br i1 %36, label %44, label %37
37: ; preds = %35
%38 = mul i32 %34, 92
%39 = add i32 %38, -2484
%40 = sdiv i32 %39, 127
br label %44
41: ; preds = %21
%42 = sub i32 %34, %31
%43 = add i32 %42, -35
br label %44
44: ; preds = %37, %35, %41
%45 = phi i32 [ %43, %41 ], [ %40, %37 ], [ 0, %35 ]
%46 = getelementptr inbounds %struct.iw_quality, ptr %2, i64 %23
store i32 %45, ptr %46, align 8, !tbaa !22
%47 = tail call ptr @HFA384X_LEVEL_TO_dBm(i32 noundef %34) #2
%48 = getelementptr inbounds %struct.iw_quality, ptr %2, i64 %23, i32 3
store ptr %47, ptr %48, align 8, !tbaa !24
%49 = load i32, ptr %15, align 4, !tbaa !20
%50 = tail call ptr @HFA384X_LEVEL_TO_dBm(i32 noundef %49) #2
%51 = getelementptr inbounds %struct.iw_quality, ptr %2, i64 %23, i32 2
store ptr %50, ptr %51, align 8, !tbaa !25
%52 = getelementptr inbounds %struct.sta_info, ptr %15, i64 0, i32 2
%53 = load i32, ptr %52, align 4, !tbaa !26
%54 = getelementptr inbounds %struct.iw_quality, ptr %2, i64 %23, i32 1
store i32 %53, ptr %54, align 4, !tbaa !27
%55 = load i32, ptr @IW_QUAL_DBM, align 4, !tbaa !15
store i32 %55, ptr %52, align 4, !tbaa !26
%56 = add nsw i32 %16, 1
%57 = icmp slt i32 %56, %3
br i1 %57, label %58, label %64
58: ; preds = %44, %17
%59 = phi i32 [ %16, %17 ], [ %56, %44 ]
%60 = load ptr, ptr %15, align 8, !tbaa !10
%61 = icmp ne ptr %60, null
%62 = icmp ne ptr %60, %8
%63 = and i1 %61, %62
br i1 %63, label %14, label %64, !llvm.loop !28
64: ; preds = %58, %44, %5
%65 = phi i32 [ 0, %5 ], [ %59, %58 ], [ %56, %44 ]
%66 = tail call i32 @spin_unlock_bh(ptr noundef %6) #2
ret i32 %65
}
declare i32 @spin_lock_bh(ptr noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @HFA384X_LEVEL_TO_dBm(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_bh(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"list_head", !7, i64 0}
!12 = !{!13, !14, i64 16}
!13 = !{!"sta_info", !14, i64 0, !14, i64 4, !14, i64 8, !14, i64 12, !14, i64 16}
!14 = !{!"int", !8, i64 0}
!15 = !{!14, !14, i64 0}
!16 = !{!17, !14, i64 4}
!17 = !{!"sockaddr", !14, i64 0, !14, i64 4}
!18 = !{!17, !14, i64 0}
!19 = !{!13, !14, i64 12}
!20 = !{!13, !14, i64 0}
!21 = !{!13, !14, i64 4}
!22 = !{!23, !14, i64 0}
!23 = !{!"iw_quality", !14, i64 0, !14, i64 4, !7, i64 8, !7, i64 16}
!24 = !{!23, !7, i64 16}
!25 = !{!23, !7, i64 8}
!26 = !{!13, !14, i64 8}
!27 = !{!23, !14, i64 4}
!28 = distinct !{!28, !29}
!29 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/hostap/extr_hostap_ap.c_prism2_ap_get_sta_qual.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/hostap/extr_hostap_ap.c_prism2_ap_get_sta_qual.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.sockaddr = type { i32, i32 }
%struct.iw_quality = type { i32, i32, ptr, ptr }
@ARPHRD_ETHER = common local_unnamed_addr global i32 0, align 4
@ETH_ALEN = common local_unnamed_addr global i32 0, align 4
@IW_QUAL_DBM = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @prism2_ap_get_sta_qual(ptr nocapture noundef readonly %0, ptr nocapture noundef %1, ptr nocapture noundef writeonly %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 {
%6 = load ptr, ptr %0, align 8, !tbaa !6
%7 = tail call i32 @spin_lock_bh(ptr noundef %6) #2
%8 = getelementptr inbounds i8, ptr %6, i64 8
%9 = icmp eq i32 %4, 0
%10 = load ptr, ptr %8, align 8, !tbaa !11
%11 = icmp ne ptr %10, null
%12 = icmp ne ptr %10, %8
%13 = and i1 %11, %12
br i1 %13, label %14, label %64
14: ; preds = %5, %58
%15 = phi ptr [ %60, %58 ], [ %10, %5 ]
%16 = phi i32 [ %59, %58 ], [ 0, %5 ]
br i1 %9, label %21, label %17
17: ; preds = %14
%18 = getelementptr inbounds i8, ptr %15, i64 16
%19 = load i32, ptr %18, align 4, !tbaa !13
%20 = icmp eq i32 %19, 0
br i1 %20, label %58, label %21
21: ; preds = %17, %14
%22 = load i32, ptr @ARPHRD_ETHER, align 4, !tbaa !16
%23 = sext i32 %16 to i64
%24 = getelementptr inbounds %struct.sockaddr, ptr %1, i64 %23
%25 = getelementptr inbounds i8, ptr %24, i64 4
store i32 %22, ptr %25, align 4, !tbaa !17
%26 = load i32, ptr %24, align 4, !tbaa !19
%27 = getelementptr inbounds i8, ptr %15, i64 12
%28 = load i32, ptr %27, align 4, !tbaa !20
%29 = load i32, ptr @ETH_ALEN, align 4, !tbaa !16
%30 = tail call i32 @memcpy(i32 noundef %26, i32 noundef %28, i32 noundef %29) #2
%31 = load i32, ptr %15, align 4, !tbaa !21
%32 = icmp eq i32 %31, 0
%33 = getelementptr inbounds i8, ptr %15, i64 4
%34 = load i32, ptr %33, align 4, !tbaa !22
br i1 %32, label %35, label %41
35: ; preds = %21
%36 = icmp slt i32 %34, 27
br i1 %36, label %44, label %37
37: ; preds = %35
%38 = mul i32 %34, 92
%39 = add i32 %38, -2484
%40 = udiv i32 %39, 127
br label %44
41: ; preds = %21
%42 = sub i32 %34, %31
%43 = add i32 %42, -35
br label %44
44: ; preds = %37, %35, %41
%45 = phi i32 [ %43, %41 ], [ %40, %37 ], [ 0, %35 ]
%46 = getelementptr inbounds %struct.iw_quality, ptr %2, i64 %23
store i32 %45, ptr %46, align 8, !tbaa !23
%47 = tail call ptr @HFA384X_LEVEL_TO_dBm(i32 noundef %34) #2
%48 = getelementptr inbounds i8, ptr %46, i64 16
store ptr %47, ptr %48, align 8, !tbaa !25
%49 = load i32, ptr %15, align 4, !tbaa !21
%50 = tail call ptr @HFA384X_LEVEL_TO_dBm(i32 noundef %49) #2
%51 = getelementptr inbounds i8, ptr %46, i64 8
store ptr %50, ptr %51, align 8, !tbaa !26
%52 = getelementptr inbounds i8, ptr %15, i64 8
%53 = load i32, ptr %52, align 4, !tbaa !27
%54 = getelementptr inbounds i8, ptr %46, i64 4
store i32 %53, ptr %54, align 4, !tbaa !28
%55 = load i32, ptr @IW_QUAL_DBM, align 4, !tbaa !16
store i32 %55, ptr %52, align 4, !tbaa !27
%56 = add nsw i32 %16, 1
%57 = icmp slt i32 %56, %3
br i1 %57, label %58, label %64
58: ; preds = %44, %17
%59 = phi i32 [ %16, %17 ], [ %56, %44 ]
%60 = load ptr, ptr %15, align 8, !tbaa !11
%61 = icmp ne ptr %60, null
%62 = icmp ne ptr %60, %8
%63 = and i1 %61, %62
br i1 %63, label %14, label %64, !llvm.loop !29
64: ; preds = %58, %44, %5
%65 = phi i32 [ 0, %5 ], [ %59, %58 ], [ %56, %44 ]
%66 = tail call i32 @spin_unlock_bh(ptr noundef %6) #2
ret i32 %65
}
declare i32 @spin_lock_bh(ptr noundef) local_unnamed_addr #1
declare i32 @memcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @HFA384X_LEVEL_TO_dBm(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_bh(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"list_head", !8, i64 0}
!13 = !{!14, !15, i64 16}
!14 = !{!"sta_info", !15, i64 0, !15, i64 4, !15, i64 8, !15, i64 12, !15, i64 16}
!15 = !{!"int", !9, i64 0}
!16 = !{!15, !15, i64 0}
!17 = !{!18, !15, i64 4}
!18 = !{!"sockaddr", !15, i64 0, !15, i64 4}
!19 = !{!18, !15, i64 0}
!20 = !{!14, !15, i64 12}
!21 = !{!14, !15, i64 0}
!22 = !{!14, !15, i64 4}
!23 = !{!24, !15, i64 0}
!24 = !{!"iw_quality", !15, i64 0, !15, i64 4, !8, i64 8, !8, i64 16}
!25 = !{!24, !8, i64 16}
!26 = !{!24, !8, i64 8}
!27 = !{!14, !15, i64 8}
!28 = !{!24, !15, i64 4}
!29 = distinct !{!29, !30}
!30 = !{!"llvm.loop.mustprogress"}
| fastsocket_kernel_drivers_net_wireless_hostap_extr_hostap_ap.c_prism2_ap_get_sta_qual |
; ModuleID = 'AnghaBench/openssl/crypto/x509/extr_x509_vfy.c_X509_STORE_CTX_get0_policy_tree.c'
source_filename = "AnghaBench/openssl/crypto/x509/extr_x509_vfy.c_X509_STORE_CTX_get0_policy_tree.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define dso_local ptr @X509_STORE_CTX_get0_policy_tree(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/openssl/crypto/x509/extr_x509_vfy.c_X509_STORE_CTX_get0_policy_tree.c'
source_filename = "AnghaBench/openssl/crypto/x509/extr_x509_vfy.c_X509_STORE_CTX_get0_policy_tree.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define ptr @X509_STORE_CTX_get0_policy_tree(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
ret ptr %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| openssl_crypto_x509_extr_x509_vfy.c_X509_STORE_CTX_get0_policy_tree |
; ModuleID = 'AnghaBench/linux/drivers/video/extr_hdmi.c_hdmi_avi_infoframe_check.c'
source_filename = "AnghaBench/linux/drivers/video/extr_hdmi.c_hdmi_avi_infoframe_check.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @hdmi_avi_infoframe_check(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @hdmi_avi_infoframe_check_only(ptr noundef %0) #2
ret i32 %2
}
declare i32 @hdmi_avi_infoframe_check_only(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/video/extr_hdmi.c_hdmi_avi_infoframe_check.c'
source_filename = "AnghaBench/linux/drivers/video/extr_hdmi.c_hdmi_avi_infoframe_check.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @hdmi_avi_infoframe_check(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @hdmi_avi_infoframe_check_only(ptr noundef %0) #2
ret i32 %2
}
declare i32 @hdmi_avi_infoframe_check_only(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_video_extr_hdmi.c_hdmi_avi_infoframe_check |
; ModuleID = 'AnghaBench/postgres/src/backend/access/transam/extr_clog.c_TransactionIdGetStatus.c'
source_filename = "AnghaBench/postgres/src/backend/access/transam/extr_clog.c_TransactionIdGetStatus.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { ptr, ptr }
@CLOG_BITS_PER_XACT = dso_local local_unnamed_addr global i32 0, align 4
@ClogCtl = dso_local local_unnamed_addr global ptr null, align 8
@CLOG_XACT_BITMASK = dso_local local_unnamed_addr global i8 0, align 1
@CLogControlLock = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local signext i8 @TransactionIdGetStatus(i32 noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
%3 = tail call i32 @TransactionIdToPage(i32 noundef %0) #2
%4 = tail call i32 @TransactionIdToByte(i32 noundef %0) #2
%5 = tail call i32 @TransactionIdToBIndex(i32 noundef %0) #2
%6 = load i32, ptr @CLOG_BITS_PER_XACT, align 4, !tbaa !5
%7 = mul nsw i32 %6, %5
%8 = load ptr, ptr @ClogCtl, align 8, !tbaa !9
%9 = tail call i32 @SimpleLruReadPage_ReadOnly(ptr noundef %8, i32 noundef %3, i32 noundef %0) #2
%10 = load ptr, ptr @ClogCtl, align 8, !tbaa !9
%11 = load ptr, ptr %10, align 8, !tbaa !11
%12 = load ptr, ptr %11, align 8, !tbaa !13
%13 = sext i32 %9 to i64
%14 = getelementptr inbounds ptr, ptr %12, i64 %13
%15 = load ptr, ptr %14, align 8, !tbaa !9
%16 = sext i32 %4 to i64
%17 = getelementptr inbounds i8, ptr %15, i64 %16
%18 = load i8, ptr %17, align 1, !tbaa !15
%19 = sext i8 %18 to i32
%20 = ashr i32 %19, %7
%21 = load i8, ptr @CLOG_XACT_BITMASK, align 1, !tbaa !15
%22 = trunc i32 %20 to i8
%23 = and i8 %21, %22
%24 = tail call i32 @GetLSNIndex(i32 noundef %9, i32 noundef %0) #2
%25 = load ptr, ptr @ClogCtl, align 8, !tbaa !9
%26 = load ptr, ptr %25, align 8, !tbaa !11
%27 = getelementptr inbounds %struct.TYPE_4__, ptr %26, i64 0, i32 1
%28 = load ptr, ptr %27, align 8, !tbaa !16
%29 = sext i32 %24 to i64
%30 = getelementptr inbounds i32, ptr %28, i64 %29
%31 = load i32, ptr %30, align 4, !tbaa !5
store i32 %31, ptr %1, align 4, !tbaa !5
%32 = load i32, ptr @CLogControlLock, align 4, !tbaa !5
%33 = tail call i32 @LWLockRelease(i32 noundef %32) #2
ret i8 %23
}
declare i32 @TransactionIdToPage(i32 noundef) local_unnamed_addr #1
declare i32 @TransactionIdToByte(i32 noundef) local_unnamed_addr #1
declare i32 @TransactionIdToBIndex(i32 noundef) local_unnamed_addr #1
declare i32 @SimpleLruReadPage_ReadOnly(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @GetLSNIndex(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LWLockRelease(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_5__", !10, i64 0}
!13 = !{!14, !10, i64 0}
!14 = !{!"TYPE_4__", !10, i64 0, !10, i64 8}
!15 = !{!7, !7, i64 0}
!16 = !{!14, !10, i64 8}
| ; ModuleID = 'AnghaBench/postgres/src/backend/access/transam/extr_clog.c_TransactionIdGetStatus.c'
source_filename = "AnghaBench/postgres/src/backend/access/transam/extr_clog.c_TransactionIdGetStatus.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CLOG_BITS_PER_XACT = common local_unnamed_addr global i32 0, align 4
@ClogCtl = common local_unnamed_addr global ptr null, align 8
@CLOG_XACT_BITMASK = common local_unnamed_addr global i8 0, align 1
@CLogControlLock = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define signext i8 @TransactionIdGetStatus(i32 noundef %0, ptr nocapture noundef writeonly %1) local_unnamed_addr #0 {
%3 = tail call i32 @TransactionIdToPage(i32 noundef %0) #2
%4 = tail call i32 @TransactionIdToByte(i32 noundef %0) #2
%5 = tail call i32 @TransactionIdToBIndex(i32 noundef %0) #2
%6 = load i32, ptr @CLOG_BITS_PER_XACT, align 4, !tbaa !6
%7 = mul nsw i32 %6, %5
%8 = load ptr, ptr @ClogCtl, align 8, !tbaa !10
%9 = tail call i32 @SimpleLruReadPage_ReadOnly(ptr noundef %8, i32 noundef %3, i32 noundef %0) #2
%10 = load ptr, ptr @ClogCtl, align 8, !tbaa !10
%11 = load ptr, ptr %10, align 8, !tbaa !12
%12 = load ptr, ptr %11, align 8, !tbaa !14
%13 = sext i32 %9 to i64
%14 = getelementptr inbounds ptr, ptr %12, i64 %13
%15 = load ptr, ptr %14, align 8, !tbaa !10
%16 = sext i32 %4 to i64
%17 = getelementptr inbounds i8, ptr %15, i64 %16
%18 = load i8, ptr %17, align 1, !tbaa !16
%19 = sext i8 %18 to i32
%20 = ashr i32 %19, %7
%21 = load i8, ptr @CLOG_XACT_BITMASK, align 1, !tbaa !16
%22 = trunc nsw i32 %20 to i8
%23 = and i8 %21, %22
%24 = tail call i32 @GetLSNIndex(i32 noundef %9, i32 noundef %0) #2
%25 = load ptr, ptr @ClogCtl, align 8, !tbaa !10
%26 = load ptr, ptr %25, align 8, !tbaa !12
%27 = getelementptr inbounds i8, ptr %26, i64 8
%28 = load ptr, ptr %27, align 8, !tbaa !17
%29 = sext i32 %24 to i64
%30 = getelementptr inbounds i32, ptr %28, i64 %29
%31 = load i32, ptr %30, align 4, !tbaa !6
store i32 %31, ptr %1, align 4, !tbaa !6
%32 = load i32, ptr @CLogControlLock, align 4, !tbaa !6
%33 = tail call i32 @LWLockRelease(i32 noundef %32) #2
ret i8 %23
}
declare i32 @TransactionIdToPage(i32 noundef) local_unnamed_addr #1
declare i32 @TransactionIdToByte(i32 noundef) local_unnamed_addr #1
declare i32 @TransactionIdToBIndex(i32 noundef) local_unnamed_addr #1
declare i32 @SimpleLruReadPage_ReadOnly(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @GetLSNIndex(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LWLockRelease(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_5__", !11, i64 0}
!14 = !{!15, !11, i64 0}
!15 = !{!"TYPE_4__", !11, i64 0, !11, i64 8}
!16 = !{!8, !8, i64 0}
!17 = !{!15, !11, i64 8}
| postgres_src_backend_access_transam_extr_clog.c_TransactionIdGetStatus |
; ModuleID = 'AnghaBench/linux/fs/kernfs/extr_file.c_kernfs_seq_show.c'
source_filename = "AnghaBench/linux/fs/kernfs/extr_file.c_kernfs_seq_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_7__ = type { ptr, ptr }
%struct.kernfs_open_file = type { ptr, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @kernfs_seq_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @kernfs_seq_show(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load ptr, ptr %3, align 8, !tbaa !10
%5 = getelementptr inbounds %struct.TYPE_7__, ptr %4, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !13
%7 = tail call i32 @atomic_read(ptr noundef %6) #2
%8 = getelementptr inbounds %struct.kernfs_open_file, ptr %3, i64 0, i32 1
store i32 %7, ptr %8, align 8, !tbaa !16
%9 = load ptr, ptr %3, align 8, !tbaa !10
%10 = load ptr, ptr %9, align 8, !tbaa !17
%11 = load ptr, ptr %10, align 8, !tbaa !18
%12 = tail call i32 %11(ptr noundef nonnull %0, ptr noundef %1) #2
ret i32 %12
}
declare i32 @atomic_read(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"seq_file", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"kernfs_open_file", !7, i64 0, !12, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!14, !7, i64 8}
!14 = !{!"TYPE_8__", !15, i64 0}
!15 = !{!"TYPE_7__", !7, i64 0, !7, i64 8}
!16 = !{!11, !12, i64 8}
!17 = !{!14, !7, i64 0}
!18 = !{!19, !7, i64 0}
!19 = !{!"TYPE_6__", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/fs/kernfs/extr_file.c_kernfs_seq_show.c'
source_filename = "AnghaBench/linux/fs/kernfs/extr_file.c_kernfs_seq_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @kernfs_seq_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @kernfs_seq_show(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load ptr, ptr %3, align 8, !tbaa !11
%5 = getelementptr inbounds i8, ptr %4, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !14
%7 = tail call i32 @atomic_read(ptr noundef %6) #2
%8 = getelementptr inbounds i8, ptr %3, i64 8
store i32 %7, ptr %8, align 8, !tbaa !17
%9 = load ptr, ptr %3, align 8, !tbaa !11
%10 = load ptr, ptr %9, align 8, !tbaa !18
%11 = load ptr, ptr %10, align 8, !tbaa !19
%12 = tail call i32 %11(ptr noundef nonnull %0, ptr noundef %1) #2
ret i32 %12
}
declare i32 @atomic_read(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"seq_file", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"kernfs_open_file", !8, i64 0, !13, i64 8}
!13 = !{!"int", !9, i64 0}
!14 = !{!15, !8, i64 8}
!15 = !{!"TYPE_8__", !16, i64 0}
!16 = !{!"TYPE_7__", !8, i64 0, !8, i64 8}
!17 = !{!12, !13, i64 8}
!18 = !{!15, !8, i64 0}
!19 = !{!20, !8, i64 0}
!20 = !{!"TYPE_6__", !8, i64 0}
| linux_fs_kernfs_extr_file.c_kernfs_seq_show |
; ModuleID = 'AnghaBench/freebsd/usr.bin/paste/extr_paste.c_parallel.c'
source_filename = "AnghaBench/freebsd/usr.bin/paste/extr_paste.c_parallel.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, ptr, ptr, ptr }
@stdin = dso_local local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [2 x i8] c"r\00", align 1
@.str.1 = private unnamed_addr constant [3 x i8] c"%s\00", align 1
@delim = dso_local local_unnamed_addr global ptr null, align 8
@delimcnt = dso_local local_unnamed_addr global i32 0, align 4
@WEOF = dso_local local_unnamed_addr global i8 0, align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @parallel], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @parallel(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = icmp eq ptr %2, null
br i1 %3, label %158, label %4
4: ; preds = %1, %36
%5 = phi ptr [ %40, %36 ], [ %2, %1 ]
%6 = phi ptr [ %10, %36 ], [ null, %1 ]
%7 = phi ptr [ %37, %36 ], [ null, %1 ]
%8 = phi ptr [ %38, %36 ], [ %0, %1 ]
%9 = phi i32 [ %39, %36 ], [ 0, %1 ]
%10 = tail call ptr @malloc(i32 noundef 32) #3
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %14
12: ; preds = %4
%13 = tail call i32 (i32, ptr, ...) @err(i32 noundef 1, ptr noundef null) #3
br label %14
14: ; preds = %12, %4
%15 = load i8, ptr %5, align 1, !tbaa !9
%16 = icmp eq i8 %15, 45
br i1 %16, label %17, label %24
17: ; preds = %14
%18 = getelementptr inbounds i8, ptr %5, i64 1
%19 = load i8, ptr %18, align 1, !tbaa !9
%20 = icmp eq i8 %19, 0
br i1 %20, label %21, label %24
21: ; preds = %17
%22 = load ptr, ptr @stdin, align 8, !tbaa !5
%23 = getelementptr inbounds %struct.TYPE_3__, ptr %10, i64 0, i32 2
store ptr %22, ptr %23, align 8, !tbaa !10
br label %30
24: ; preds = %17, %14
%25 = tail call ptr @fopen(ptr noundef nonnull %5, ptr noundef nonnull @.str)
%26 = getelementptr inbounds %struct.TYPE_3__, ptr %10, i64 0, i32 2
store ptr %25, ptr %26, align 8, !tbaa !10
%27 = icmp eq ptr %25, null
br i1 %27, label %28, label %30
28: ; preds = %24
%29 = tail call i32 (i32, ptr, ...) @err(i32 noundef 1, ptr noundef nonnull @.str.1, ptr noundef nonnull %5) #3
br label %30
30: ; preds = %24, %28, %21
%31 = getelementptr inbounds %struct.TYPE_3__, ptr %10, i64 0, i32 3
store ptr null, ptr %31, align 8, !tbaa !13
store i32 %9, ptr %10, align 8, !tbaa !14
%32 = getelementptr inbounds %struct.TYPE_3__, ptr %10, i64 0, i32 1
store ptr %5, ptr %32, align 8, !tbaa !15
%33 = icmp eq ptr %7, null
br i1 %33, label %36, label %34
34: ; preds = %30
%35 = getelementptr inbounds %struct.TYPE_3__, ptr %6, i64 0, i32 3
store ptr %10, ptr %35, align 8, !tbaa !13
br label %36
36: ; preds = %30, %34
%37 = phi ptr [ %7, %34 ], [ %10, %30 ]
%38 = getelementptr inbounds ptr, ptr %8, i64 1
%39 = add nuw nsw i32 %9, 1
%40 = load ptr, ptr %38, align 8, !tbaa !5
%41 = icmp eq ptr %40, null
br i1 %41, label %42, label %4, !llvm.loop !16
42: ; preds = %36, %146
%43 = phi i32 [ %147, %146 ], [ 0, %36 ]
%44 = phi i32 [ %148, %146 ], [ %39, %36 ]
%45 = phi ptr [ %149, %146 ], [ %37, %36 ]
%46 = getelementptr inbounds %struct.TYPE_3__, ptr %45, i64 0, i32 2
%47 = load ptr, ptr %46, align 8, !tbaa !10
%48 = icmp eq ptr %47, null
br i1 %48, label %49, label %63
49: ; preds = %42
%50 = icmp eq i32 %43, 0
br i1 %50, label %140, label %51
51: ; preds = %49
%52 = load i32, ptr %45, align 8, !tbaa !14
%53 = icmp eq i32 %52, 0
br i1 %53, label %140, label %54
54: ; preds = %51
%55 = load ptr, ptr @delim, align 8, !tbaa !5
%56 = add nsw i32 %52, -1
%57 = load i32, ptr @delimcnt, align 4, !tbaa !18
%58 = srem i32 %56, %57
%59 = sext i32 %58 to i64
%60 = getelementptr inbounds i8, ptr %55, i64 %59
%61 = load i8, ptr %60, align 1, !tbaa !9
%62 = icmp eq i8 %61, 0
br i1 %62, label %140, label %136
63: ; preds = %42
%64 = tail call signext i8 @getwc(ptr noundef nonnull %47) #3
%65 = load i8, ptr @WEOF, align 1, !tbaa !9
%66 = icmp eq i8 %64, %65
br i1 %66, label %67, label %84
67: ; preds = %63
%68 = add nsw i32 %44, -1
%69 = icmp eq i32 %68, 0
br i1 %69, label %150, label %70
70: ; preds = %67
store ptr null, ptr %46, align 8, !tbaa !10
%71 = icmp eq i32 %43, 0
br i1 %71, label %140, label %72
72: ; preds = %70
%73 = load i32, ptr %45, align 8, !tbaa !14
%74 = icmp eq i32 %73, 0
br i1 %74, label %140, label %75
75: ; preds = %72
%76 = load ptr, ptr @delim, align 8, !tbaa !5
%77 = add nsw i32 %73, -1
%78 = load i32, ptr @delimcnt, align 4, !tbaa !18
%79 = srem i32 %77, %78
%80 = sext i32 %79 to i64
%81 = getelementptr inbounds i8, ptr %76, i64 %80
%82 = load i8, ptr %81, align 1, !tbaa !9
%83 = icmp eq i8 %82, 0
br i1 %83, label %140, label %136
84: ; preds = %63
%85 = icmp eq i32 %43, 0
br i1 %85, label %86, label %113
86: ; preds = %84
%87 = load i32, ptr %45, align 8, !tbaa !14
%88 = icmp sgt i32 %87, 0
br i1 %88, label %89, label %125
89: ; preds = %86
%90 = load ptr, ptr @delim, align 8, !tbaa !5
%91 = load i32, ptr @delimcnt, align 4, !tbaa !18
br label %92
92: ; preds = %89, %107
%93 = phi i32 [ %108, %107 ], [ %87, %89 ]
%94 = phi i32 [ %109, %107 ], [ %91, %89 ]
%95 = phi ptr [ %110, %107 ], [ %90, %89 ]
%96 = phi i32 [ %111, %107 ], [ 0, %89 ]
%97 = srem i32 %96, %94
%98 = zext nneg i32 %97 to i64
%99 = getelementptr inbounds i8, ptr %95, i64 %98
%100 = load i8, ptr %99, align 1, !tbaa !9
%101 = icmp eq i8 %100, 0
br i1 %101, label %107, label %102
102: ; preds = %92
%103 = tail call i32 @putwchar(i8 noundef signext %100) #3
%104 = load ptr, ptr @delim, align 8, !tbaa !5
%105 = load i32, ptr @delimcnt, align 4, !tbaa !18
%106 = load i32, ptr %45, align 8, !tbaa !14
br label %107
107: ; preds = %92, %102
%108 = phi i32 [ %93, %92 ], [ %106, %102 ]
%109 = phi i32 [ %94, %92 ], [ %105, %102 ]
%110 = phi ptr [ %95, %92 ], [ %104, %102 ]
%111 = add nuw nsw i32 %96, 1
%112 = icmp slt i32 %111, %108
br i1 %112, label %92, label %125, !llvm.loop !19
113: ; preds = %84
%114 = load ptr, ptr @delim, align 8, !tbaa !5
%115 = load i32, ptr %45, align 8, !tbaa !14
%116 = add nsw i32 %115, -1
%117 = load i32, ptr @delimcnt, align 4, !tbaa !18
%118 = srem i32 %116, %117
%119 = sext i32 %118 to i64
%120 = getelementptr inbounds i8, ptr %114, i64 %119
%121 = load i8, ptr %120, align 1, !tbaa !9
%122 = icmp eq i8 %121, 0
br i1 %122, label %125, label %123
123: ; preds = %113
%124 = tail call i32 @putwchar(i8 noundef signext %121) #3
br label %125
125: ; preds = %107, %86, %113, %123
%126 = icmp eq i8 %64, 10
br i1 %126, label %140, label %127
127: ; preds = %125, %127
%128 = phi i8 [ %131, %127 ], [ %64, %125 ]
%129 = tail call i32 @putwchar(i8 noundef signext %128) #3
%130 = load ptr, ptr %46, align 8, !tbaa !10
%131 = tail call signext i8 @getwc(ptr noundef %130) #3
%132 = load i8, ptr @WEOF, align 1, !tbaa !9
%133 = icmp ne i8 %131, %132
%134 = icmp ne i8 %131, 10
%135 = and i1 %134, %133
br i1 %135, label %127, label %140, !llvm.loop !20
136: ; preds = %75, %54
%137 = phi i8 [ %61, %54 ], [ %82, %75 ]
%138 = phi i32 [ %44, %54 ], [ %68, %75 ]
%139 = tail call i32 @putwchar(i8 noundef signext %137) #3
br label %140
140: ; preds = %127, %136, %125, %70, %72, %75, %49, %51, %54
%141 = phi i32 [ %68, %75 ], [ %68, %72 ], [ %68, %70 ], [ %44, %125 ], [ %44, %54 ], [ %44, %51 ], [ %44, %49 ], [ %138, %136 ], [ %44, %127 ]
%142 = phi i32 [ 1, %75 ], [ 1, %72 ], [ 0, %70 ], [ 1, %125 ], [ 1, %54 ], [ 1, %51 ], [ 0, %49 ], [ 1, %136 ], [ 1, %127 ]
%143 = getelementptr inbounds %struct.TYPE_3__, ptr %45, i64 0, i32 3
%144 = load ptr, ptr %143, align 8, !tbaa !13
%145 = icmp eq ptr %144, null
br i1 %145, label %150, label %146
146: ; preds = %140, %156
%147 = phi i32 [ %142, %140 ], [ 0, %156 ]
%148 = phi i32 [ %141, %140 ], [ %152, %156 ]
%149 = phi ptr [ %144, %140 ], [ %37, %156 ]
br label %42, !llvm.loop !21
150: ; preds = %140, %67
%151 = phi i32 [ %142, %140 ], [ %43, %67 ]
%152 = phi i32 [ %141, %140 ], [ 0, %67 ]
%153 = icmp eq i32 %151, 0
br i1 %153, label %156, label %154
154: ; preds = %150
%155 = tail call i32 @putwchar(i8 noundef signext 10) #3
br label %156
156: ; preds = %154, %150
%157 = icmp eq i32 %152, 0
br i1 %157, label %158, label %146
158: ; preds = %156, %1
ret i32 0
}
declare ptr @malloc(i32 noundef) local_unnamed_addr #1
declare i32 @err(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noalias noundef ptr @fopen(ptr nocapture noundef readonly, ptr nocapture noundef readonly) local_unnamed_addr #2
declare i32 @putwchar(i8 noundef signext) local_unnamed_addr #1
declare signext i8 @getwc(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !6, i64 16}
!11 = !{!"TYPE_3__", !12, i64 0, !6, i64 8, !6, i64 16, !6, i64 24}
!12 = !{!"int", !7, i64 0}
!13 = !{!11, !6, i64 24}
!14 = !{!11, !12, i64 0}
!15 = !{!11, !6, i64 8}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!12, !12, i64 0}
!19 = distinct !{!19, !17}
!20 = distinct !{!20, !17}
!21 = distinct !{!21, !17}
| ; ModuleID = 'AnghaBench/freebsd/usr.bin/paste/extr_paste.c_parallel.c'
source_filename = "AnghaBench/freebsd/usr.bin/paste/extr_paste.c_parallel.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@stdin = common local_unnamed_addr global ptr null, align 8
@.str = private unnamed_addr constant [2 x i8] c"r\00", align 1
@.str.1 = private unnamed_addr constant [3 x i8] c"%s\00", align 1
@delim = common local_unnamed_addr global ptr null, align 8
@delimcnt = common local_unnamed_addr global i32 0, align 4
@WEOF = common local_unnamed_addr global i8 0, align 1
@llvm.used = appending global [1 x ptr] [ptr @parallel], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @parallel(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = icmp eq ptr %2, null
br i1 %3, label %158, label %4
4: ; preds = %1, %36
%5 = phi ptr [ %40, %36 ], [ %2, %1 ]
%6 = phi ptr [ %10, %36 ], [ null, %1 ]
%7 = phi ptr [ %37, %36 ], [ null, %1 ]
%8 = phi ptr [ %38, %36 ], [ %0, %1 ]
%9 = phi i32 [ %39, %36 ], [ 0, %1 ]
%10 = tail call ptr @malloc(i32 noundef 32) #3
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %14
12: ; preds = %4
%13 = tail call i32 (i32, ptr, ...) @err(i32 noundef 1, ptr noundef null) #3
br label %14
14: ; preds = %12, %4
%15 = load i8, ptr %5, align 1, !tbaa !10
%16 = icmp eq i8 %15, 45
br i1 %16, label %17, label %24
17: ; preds = %14
%18 = getelementptr inbounds i8, ptr %5, i64 1
%19 = load i8, ptr %18, align 1, !tbaa !10
%20 = icmp eq i8 %19, 0
br i1 %20, label %21, label %24
21: ; preds = %17
%22 = load ptr, ptr @stdin, align 8, !tbaa !6
%23 = getelementptr inbounds i8, ptr %10, i64 16
store ptr %22, ptr %23, align 8, !tbaa !11
br label %30
24: ; preds = %17, %14
%25 = tail call ptr @fopen(ptr noundef nonnull %5, ptr noundef nonnull @.str)
%26 = getelementptr inbounds i8, ptr %10, i64 16
store ptr %25, ptr %26, align 8, !tbaa !11
%27 = icmp eq ptr %25, null
br i1 %27, label %28, label %30
28: ; preds = %24
%29 = tail call i32 (i32, ptr, ...) @err(i32 noundef 1, ptr noundef nonnull @.str.1, ptr noundef nonnull %5) #3
br label %30
30: ; preds = %24, %28, %21
%31 = getelementptr inbounds i8, ptr %10, i64 24
store ptr null, ptr %31, align 8, !tbaa !14
store i32 %9, ptr %10, align 8, !tbaa !15
%32 = getelementptr inbounds i8, ptr %10, i64 8
store ptr %5, ptr %32, align 8, !tbaa !16
%33 = icmp eq ptr %7, null
br i1 %33, label %36, label %34
34: ; preds = %30
%35 = getelementptr inbounds i8, ptr %6, i64 24
store ptr %10, ptr %35, align 8, !tbaa !14
br label %36
36: ; preds = %30, %34
%37 = phi ptr [ %7, %34 ], [ %10, %30 ]
%38 = getelementptr inbounds i8, ptr %8, i64 8
%39 = add nuw nsw i32 %9, 1
%40 = load ptr, ptr %38, align 8, !tbaa !6
%41 = icmp eq ptr %40, null
br i1 %41, label %42, label %4, !llvm.loop !17
42: ; preds = %36, %146
%43 = phi i32 [ %147, %146 ], [ 0, %36 ]
%44 = phi i32 [ %148, %146 ], [ %39, %36 ]
%45 = phi ptr [ %149, %146 ], [ %37, %36 ]
%46 = getelementptr inbounds i8, ptr %45, i64 16
%47 = load ptr, ptr %46, align 8, !tbaa !11
%48 = icmp eq ptr %47, null
br i1 %48, label %49, label %63
49: ; preds = %42
%50 = icmp eq i32 %43, 0
br i1 %50, label %140, label %51
51: ; preds = %49
%52 = load i32, ptr %45, align 8, !tbaa !15
%53 = icmp eq i32 %52, 0
br i1 %53, label %140, label %54
54: ; preds = %51
%55 = load ptr, ptr @delim, align 8, !tbaa !6
%56 = add nsw i32 %52, -1
%57 = load i32, ptr @delimcnt, align 4, !tbaa !19
%58 = srem i32 %56, %57
%59 = sext i32 %58 to i64
%60 = getelementptr inbounds i8, ptr %55, i64 %59
%61 = load i8, ptr %60, align 1, !tbaa !10
%62 = icmp eq i8 %61, 0
br i1 %62, label %140, label %136
63: ; preds = %42
%64 = tail call signext i8 @getwc(ptr noundef nonnull %47) #3
%65 = load i8, ptr @WEOF, align 1, !tbaa !10
%66 = icmp eq i8 %64, %65
br i1 %66, label %67, label %84
67: ; preds = %63
%68 = add nsw i32 %44, -1
%69 = icmp eq i32 %68, 0
br i1 %69, label %150, label %70
70: ; preds = %67
store ptr null, ptr %46, align 8, !tbaa !11
%71 = icmp eq i32 %43, 0
br i1 %71, label %140, label %72
72: ; preds = %70
%73 = load i32, ptr %45, align 8, !tbaa !15
%74 = icmp eq i32 %73, 0
br i1 %74, label %140, label %75
75: ; preds = %72
%76 = load ptr, ptr @delim, align 8, !tbaa !6
%77 = add nsw i32 %73, -1
%78 = load i32, ptr @delimcnt, align 4, !tbaa !19
%79 = srem i32 %77, %78
%80 = sext i32 %79 to i64
%81 = getelementptr inbounds i8, ptr %76, i64 %80
%82 = load i8, ptr %81, align 1, !tbaa !10
%83 = icmp eq i8 %82, 0
br i1 %83, label %140, label %136
84: ; preds = %63
%85 = icmp eq i32 %43, 0
br i1 %85, label %86, label %113
86: ; preds = %84
%87 = load i32, ptr %45, align 8, !tbaa !15
%88 = icmp sgt i32 %87, 0
br i1 %88, label %89, label %125
89: ; preds = %86
%90 = load ptr, ptr @delim, align 8, !tbaa !6
%91 = load i32, ptr @delimcnt, align 4, !tbaa !19
br label %92
92: ; preds = %89, %107
%93 = phi i32 [ %108, %107 ], [ %87, %89 ]
%94 = phi i32 [ %109, %107 ], [ %91, %89 ]
%95 = phi ptr [ %110, %107 ], [ %90, %89 ]
%96 = phi i32 [ %111, %107 ], [ 0, %89 ]
%97 = srem i32 %96, %94
%98 = zext nneg i32 %97 to i64
%99 = getelementptr inbounds i8, ptr %95, i64 %98
%100 = load i8, ptr %99, align 1, !tbaa !10
%101 = icmp eq i8 %100, 0
br i1 %101, label %107, label %102
102: ; preds = %92
%103 = tail call i32 @putwchar(i8 noundef signext %100) #3
%104 = load ptr, ptr @delim, align 8, !tbaa !6
%105 = load i32, ptr @delimcnt, align 4, !tbaa !19
%106 = load i32, ptr %45, align 8, !tbaa !15
br label %107
107: ; preds = %92, %102
%108 = phi i32 [ %93, %92 ], [ %106, %102 ]
%109 = phi i32 [ %94, %92 ], [ %105, %102 ]
%110 = phi ptr [ %95, %92 ], [ %104, %102 ]
%111 = add nuw nsw i32 %96, 1
%112 = icmp slt i32 %111, %108
br i1 %112, label %92, label %125, !llvm.loop !20
113: ; preds = %84
%114 = load ptr, ptr @delim, align 8, !tbaa !6
%115 = load i32, ptr %45, align 8, !tbaa !15
%116 = add nsw i32 %115, -1
%117 = load i32, ptr @delimcnt, align 4, !tbaa !19
%118 = srem i32 %116, %117
%119 = sext i32 %118 to i64
%120 = getelementptr inbounds i8, ptr %114, i64 %119
%121 = load i8, ptr %120, align 1, !tbaa !10
%122 = icmp eq i8 %121, 0
br i1 %122, label %125, label %123
123: ; preds = %113
%124 = tail call i32 @putwchar(i8 noundef signext %121) #3
br label %125
125: ; preds = %107, %86, %113, %123
%126 = icmp eq i8 %64, 10
br i1 %126, label %140, label %127
127: ; preds = %125, %127
%128 = phi i8 [ %131, %127 ], [ %64, %125 ]
%129 = tail call i32 @putwchar(i8 noundef signext %128) #3
%130 = load ptr, ptr %46, align 8, !tbaa !11
%131 = tail call signext i8 @getwc(ptr noundef %130) #3
%132 = load i8, ptr @WEOF, align 1, !tbaa !10
%133 = icmp ne i8 %131, %132
%134 = icmp ne i8 %131, 10
%135 = and i1 %134, %133
br i1 %135, label %127, label %140, !llvm.loop !21
136: ; preds = %75, %54
%137 = phi i8 [ %61, %54 ], [ %82, %75 ]
%138 = phi i32 [ %44, %54 ], [ %68, %75 ]
%139 = tail call i32 @putwchar(i8 noundef signext %137) #3
br label %140
140: ; preds = %127, %136, %125, %70, %72, %75, %49, %51, %54
%141 = phi i32 [ %68, %75 ], [ %68, %72 ], [ %68, %70 ], [ %44, %125 ], [ %44, %54 ], [ %44, %51 ], [ %44, %49 ], [ %138, %136 ], [ %44, %127 ]
%142 = phi i32 [ 1, %75 ], [ 1, %72 ], [ 0, %70 ], [ 1, %125 ], [ 1, %54 ], [ 1, %51 ], [ 0, %49 ], [ 1, %136 ], [ 1, %127 ]
%143 = getelementptr inbounds i8, ptr %45, i64 24
%144 = load ptr, ptr %143, align 8, !tbaa !14
%145 = icmp eq ptr %144, null
br i1 %145, label %150, label %146
146: ; preds = %140, %156
%147 = phi i32 [ %142, %140 ], [ 0, %156 ]
%148 = phi i32 [ %141, %140 ], [ %152, %156 ]
%149 = phi ptr [ %144, %140 ], [ %37, %156 ]
br label %42, !llvm.loop !22
150: ; preds = %140, %67
%151 = phi i32 [ %142, %140 ], [ %43, %67 ]
%152 = phi i32 [ %141, %140 ], [ 0, %67 ]
%153 = icmp eq i32 %151, 0
br i1 %153, label %156, label %154
154: ; preds = %150
%155 = tail call i32 @putwchar(i8 noundef signext 10) #3
br label %156
156: ; preds = %154, %150
%157 = icmp eq i32 %152, 0
br i1 %157, label %158, label %146
158: ; preds = %156, %1
ret i32 0
}
declare ptr @malloc(i32 noundef) local_unnamed_addr #1
declare i32 @err(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
; Function Attrs: nofree nounwind
declare noalias noundef ptr @fopen(ptr nocapture noundef readonly, ptr nocapture noundef readonly) local_unnamed_addr #2
declare i32 @putwchar(i8 noundef signext) local_unnamed_addr #1
declare signext i8 @getwc(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = !{!12, !7, i64 16}
!12 = !{!"TYPE_3__", !13, i64 0, !7, i64 8, !7, i64 16, !7, i64 24}
!13 = !{!"int", !8, i64 0}
!14 = !{!12, !7, i64 24}
!15 = !{!12, !13, i64 0}
!16 = !{!12, !7, i64 8}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!13, !13, i64 0}
!20 = distinct !{!20, !18}
!21 = distinct !{!21, !18}
!22 = distinct !{!22, !18}
| freebsd_usr.bin_paste_extr_paste.c_parallel |
; ModuleID = 'AnghaBench/Quake-III-Arena/code/game/extr_g_mover.c_G_TryPushingEntity.c'
source_filename = "AnghaBench/Quake-III-Arena/code/game/extr_g_mover.c_G_TryPushingEntity.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_20__ = type { i32, i32, i32, %struct.TYPE_19__, %struct.TYPE_16__ }
%struct.TYPE_19__ = type { ptr }
%struct.TYPE_16__ = type { ptr }
%struct.TYPE_22__ = type { ptr, ptr, i32, ptr }
%struct.TYPE_21__ = type { %struct.TYPE_20__, ptr, %struct.TYPE_15__ }
%struct.TYPE_15__ = type { ptr }
%struct.TYPE_17__ = type { ptr, ptr }
@EF_MOVER_STOP = dso_local local_unnamed_addr global i32 0, align 4
@qfalse = dso_local local_unnamed_addr global i32 0, align 4
@pushed_p = dso_local local_unnamed_addr global ptr null, align 8
@pushed = dso_local local_unnamed_addr global ptr null, align 8
@MAX_GENTITIES = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [34 x i8] c"pushed_p > &pushed[MAX_GENTITIES]\00", align 1
@YAW = dso_local local_unnamed_addr global i64 0, align 8
@qtrue = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @G_TryPushingEntity(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = alloca [3 x ptr], align 16
%6 = alloca [3 x ptr], align 16
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #3
%7 = load i32, ptr %1, align 8, !tbaa !5
%8 = load i32, ptr @EF_MOVER_STOP, align 4, !tbaa !15
%9 = and i32 %8, %7
%10 = icmp eq i32 %9, 0
br i1 %10, label %17, label %11
11: ; preds = %4
%12 = getelementptr inbounds %struct.TYPE_20__, ptr %0, i64 0, i32 1
%13 = load i32, ptr %12, align 4, !tbaa !16
%14 = getelementptr inbounds %struct.TYPE_20__, ptr %1, i64 0, i32 2
%15 = load i32, ptr %14, align 8, !tbaa !17
%16 = icmp eq i32 %13, %15
br i1 %16, label %17, label %137
17: ; preds = %11, %4
%18 = load ptr, ptr @pushed_p, align 8, !tbaa !18
%19 = load ptr, ptr @pushed, align 8, !tbaa !18
%20 = load i64, ptr @MAX_GENTITIES, align 8, !tbaa !19
%21 = getelementptr inbounds %struct.TYPE_22__, ptr %19, i64 %20
%22 = icmp ugt ptr %18, %21
br i1 %22, label %23, label %26
23: ; preds = %17
%24 = tail call i32 @G_Error(ptr noundef nonnull @.str) #3
%25 = load ptr, ptr @pushed_p, align 8, !tbaa !18
br label %26
26: ; preds = %23, %17
%27 = phi ptr [ %25, %23 ], [ %18, %17 ]
%28 = getelementptr inbounds %struct.TYPE_22__, ptr %27, i64 0, i32 3
store ptr %0, ptr %28, align 8, !tbaa !21
%29 = getelementptr inbounds %struct.TYPE_20__, ptr %0, i64 0, i32 4
%30 = load ptr, ptr %29, align 8, !tbaa !23
%31 = getelementptr inbounds %struct.TYPE_22__, ptr %27, i64 0, i32 1
%32 = load ptr, ptr %31, align 8, !tbaa !24
%33 = tail call i32 @VectorCopy(ptr noundef %30, ptr noundef %32) #3
%34 = getelementptr inbounds %struct.TYPE_20__, ptr %0, i64 0, i32 3
%35 = load ptr, ptr %34, align 8, !tbaa !25
%36 = load ptr, ptr @pushed_p, align 8, !tbaa !18
%37 = load ptr, ptr %36, align 8, !tbaa !26
%38 = tail call i32 @VectorCopy(ptr noundef %35, ptr noundef %37) #3
%39 = getelementptr inbounds %struct.TYPE_21__, ptr %0, i64 0, i32 1
%40 = load ptr, ptr %39, align 8, !tbaa !27
%41 = icmp eq ptr %40, null
br i1 %41, label %54, label %42
42: ; preds = %26
%43 = getelementptr inbounds %struct.TYPE_17__, ptr %40, i64 0, i32 1
%44 = load ptr, ptr %43, align 8, !tbaa !28
%45 = load i64, ptr @YAW, align 8, !tbaa !19
%46 = getelementptr inbounds i32, ptr %44, i64 %45
%47 = load i32, ptr %46, align 4, !tbaa !15
%48 = load ptr, ptr @pushed_p, align 8, !tbaa !18
%49 = getelementptr inbounds %struct.TYPE_22__, ptr %48, i64 0, i32 2
store i32 %47, ptr %49, align 8, !tbaa !31
%50 = load ptr, ptr %40, align 8, !tbaa !32
%51 = getelementptr inbounds %struct.TYPE_22__, ptr %48, i64 0, i32 1
%52 = load ptr, ptr %51, align 8, !tbaa !24
%53 = tail call i32 @VectorCopy(ptr noundef %50, ptr noundef %52) #3
br label %54
54: ; preds = %42, %26
%55 = load ptr, ptr @pushed_p, align 8, !tbaa !18
%56 = getelementptr inbounds %struct.TYPE_22__, ptr %55, i64 1
store ptr %56, ptr @pushed_p, align 8, !tbaa !18
%57 = call i32 @G_CreateRotationMatrix(ptr noundef %3, ptr noundef nonnull %6) #3
%58 = call i32 @G_TransposeMatrix(ptr noundef nonnull %6, ptr noundef nonnull %5) #3
%59 = load ptr, ptr %39, align 8, !tbaa !27
%60 = icmp eq ptr %59, null
%61 = getelementptr inbounds %struct.TYPE_21__, ptr %1, i64 0, i32 2
%62 = load ptr, ptr %61, align 8, !tbaa !33
%63 = select i1 %60, ptr %29, ptr %59
%64 = load ptr, ptr %63, align 8, !tbaa !18
%65 = call i32 @VectorSubtract(ptr noundef %64, ptr noundef %62, ptr noundef undef) #3
%66 = call i32 @VectorCopy(ptr noundef undef, ptr noundef undef) #3
%67 = call i32 @G_RotatePoint(ptr noundef undef, ptr noundef nonnull %5) #3
%68 = call i32 @VectorSubtract(ptr noundef undef, ptr noundef undef, ptr noundef undef) #3
%69 = load ptr, ptr %29, align 8, !tbaa !23
%70 = call i32 @VectorAdd(ptr noundef %69, ptr noundef %2, ptr noundef %69) #3
%71 = load ptr, ptr %29, align 8, !tbaa !23
%72 = call i32 @VectorAdd(ptr noundef %71, ptr noundef undef, ptr noundef %71) #3
%73 = load ptr, ptr %39, align 8, !tbaa !27
%74 = icmp eq ptr %73, null
br i1 %74, label %93, label %75
75: ; preds = %54
%76 = load ptr, ptr %73, align 8, !tbaa !32
%77 = call i32 @VectorAdd(ptr noundef %76, ptr noundef %2, ptr noundef %76) #3
%78 = load ptr, ptr %39, align 8, !tbaa !27
%79 = load ptr, ptr %78, align 8, !tbaa !32
%80 = call i32 @VectorAdd(ptr noundef %79, ptr noundef undef, ptr noundef %79) #3
%81 = load i64, ptr @YAW, align 8, !tbaa !19
%82 = getelementptr inbounds i32, ptr %3, i64 %81
%83 = load i32, ptr %82, align 4, !tbaa !15
%84 = call i64 @ANGLE2SHORT(i32 noundef %83) #3
%85 = load ptr, ptr %39, align 8, !tbaa !27
%86 = getelementptr inbounds %struct.TYPE_17__, ptr %85, i64 0, i32 1
%87 = load ptr, ptr %86, align 8, !tbaa !28
%88 = load i64, ptr @YAW, align 8, !tbaa !19
%89 = getelementptr inbounds i32, ptr %87, i64 %88
%90 = load i32, ptr %89, align 4, !tbaa !15
%91 = trunc i64 %84 to i32
%92 = add i32 %90, %91
store i32 %92, ptr %89, align 4, !tbaa !15
br label %93
93: ; preds = %75, %54
%94 = getelementptr inbounds %struct.TYPE_20__, ptr %0, i64 0, i32 1
%95 = load i32, ptr %94, align 4, !tbaa !16
%96 = getelementptr inbounds %struct.TYPE_20__, ptr %1, i64 0, i32 2
%97 = load i32, ptr %96, align 8, !tbaa !17
%98 = icmp eq i32 %95, %97
br i1 %98, label %100, label %99
99: ; preds = %93
store i32 -1, ptr %94, align 4, !tbaa !16
br label %100
100: ; preds = %99, %93
%101 = call ptr @G_TestEntityPosition(ptr noundef nonnull %0) #3
%102 = icmp eq ptr %101, null
br i1 %102, label %103, label %112
103: ; preds = %100
%104 = load ptr, ptr %39, align 8, !tbaa !27
%105 = icmp eq ptr %104, null
%106 = getelementptr inbounds %struct.TYPE_21__, ptr %0, i64 0, i32 2
%107 = load ptr, ptr %106, align 8, !tbaa !33
%108 = select i1 %105, ptr %29, ptr %104
%109 = load ptr, ptr %108, align 8, !tbaa !18
%110 = call i32 @VectorCopy(ptr noundef %109, ptr noundef %107) #3
%111 = call i32 @trap_LinkEntity(ptr noundef nonnull %0) #3
br label %137
112: ; preds = %100
%113 = load ptr, ptr @pushed_p, align 8, !tbaa !18
%114 = getelementptr %struct.TYPE_22__, ptr %113, i64 -1, i32 1
%115 = load ptr, ptr %114, align 8, !tbaa !24
%116 = load ptr, ptr %29, align 8, !tbaa !23
%117 = call i32 @VectorCopy(ptr noundef %115, ptr noundef %116) #3
%118 = load ptr, ptr %39, align 8, !tbaa !27
%119 = icmp eq ptr %118, null
br i1 %119, label %126, label %120
120: ; preds = %112
%121 = load ptr, ptr @pushed_p, align 8, !tbaa !18
%122 = getelementptr %struct.TYPE_22__, ptr %121, i64 -1, i32 1
%123 = load ptr, ptr %122, align 8, !tbaa !24
%124 = load ptr, ptr %118, align 8, !tbaa !32
%125 = call i32 @VectorCopy(ptr noundef %123, ptr noundef %124) #3
br label %126
126: ; preds = %120, %112
%127 = load ptr, ptr @pushed_p, align 8, !tbaa !18
%128 = getelementptr inbounds %struct.TYPE_22__, ptr %127, i64 -1
%129 = load ptr, ptr %128, align 8, !tbaa !26
%130 = load ptr, ptr %34, align 8, !tbaa !25
%131 = call i32 @VectorCopy(ptr noundef %129, ptr noundef %130) #3
%132 = call ptr @G_TestEntityPosition(ptr noundef nonnull %0) #3
%133 = icmp eq ptr %132, null
br i1 %133, label %134, label %137
134: ; preds = %126
store i32 -1, ptr %94, align 4, !tbaa !16
%135 = load ptr, ptr @pushed_p, align 8, !tbaa !18
%136 = getelementptr inbounds %struct.TYPE_22__, ptr %135, i64 -1
store ptr %136, ptr @pushed_p, align 8, !tbaa !18
br label %137
137: ; preds = %126, %11, %134, %103
%138 = phi ptr [ @qtrue, %134 ], [ @qtrue, %103 ], [ @qfalse, %11 ], [ @qfalse, %126 ]
%139 = load i32, ptr %138, align 4, !tbaa !15
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3
ret i32 %139
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @G_Error(ptr noundef) local_unnamed_addr #2
declare i32 @VectorCopy(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @G_CreateRotationMatrix(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @G_TransposeMatrix(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @VectorSubtract(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @G_RotatePoint(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @VectorAdd(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @ANGLE2SHORT(i32 noundef) local_unnamed_addr #2
declare ptr @G_TestEntityPosition(ptr noundef) local_unnamed_addr #2
declare i32 @trap_LinkEntity(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"TYPE_21__", !7, i64 0, !12, i64 32, !14, i64 40}
!7 = !{!"TYPE_20__", !8, i64 0, !8, i64 4, !8, i64 8, !11, i64 16, !13, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_19__", !12, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!"TYPE_16__", !12, i64 0}
!14 = !{!"TYPE_15__", !12, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!6, !8, i64 4}
!17 = !{!6, !8, i64 8}
!18 = !{!12, !12, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"long", !9, i64 0}
!21 = !{!22, !12, i64 24}
!22 = !{!"TYPE_22__", !12, i64 0, !12, i64 8, !8, i64 16, !12, i64 24}
!23 = !{!6, !12, i64 24}
!24 = !{!22, !12, i64 8}
!25 = !{!6, !12, i64 16}
!26 = !{!22, !12, i64 0}
!27 = !{!6, !12, i64 32}
!28 = !{!29, !12, i64 8}
!29 = !{!"TYPE_18__", !30, i64 0}
!30 = !{!"TYPE_17__", !12, i64 0, !12, i64 8}
!31 = !{!22, !8, i64 16}
!32 = !{!29, !12, i64 0}
!33 = !{!6, !12, i64 40}
| ; ModuleID = 'AnghaBench/Quake-III-Arena/code/game/extr_g_mover.c_G_TryPushingEntity.c'
source_filename = "AnghaBench/Quake-III-Arena/code/game/extr_g_mover.c_G_TryPushingEntity.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_22__ = type { ptr, ptr, i32, ptr }
@EF_MOVER_STOP = common local_unnamed_addr global i32 0, align 4
@qfalse = common local_unnamed_addr global i32 0, align 4
@pushed_p = common local_unnamed_addr global ptr null, align 8
@pushed = common local_unnamed_addr global ptr null, align 8
@MAX_GENTITIES = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [34 x i8] c"pushed_p > &pushed[MAX_GENTITIES]\00", align 1
@YAW = common local_unnamed_addr global i64 0, align 8
@qtrue = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @G_TryPushingEntity(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = alloca [3 x ptr], align 8
%6 = alloca [3 x ptr], align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %6) #3
%7 = load i32, ptr %1, align 8, !tbaa !6
%8 = load i32, ptr @EF_MOVER_STOP, align 4, !tbaa !16
%9 = and i32 %8, %7
%10 = icmp eq i32 %9, 0
br i1 %10, label %17, label %11
11: ; preds = %4
%12 = getelementptr inbounds i8, ptr %0, i64 4
%13 = load i32, ptr %12, align 4, !tbaa !17
%14 = getelementptr inbounds i8, ptr %1, i64 8
%15 = load i32, ptr %14, align 8, !tbaa !18
%16 = icmp eq i32 %13, %15
br i1 %16, label %17, label %137
17: ; preds = %11, %4
%18 = load ptr, ptr @pushed_p, align 8, !tbaa !19
%19 = load ptr, ptr @pushed, align 8, !tbaa !19
%20 = load i64, ptr @MAX_GENTITIES, align 8, !tbaa !20
%21 = getelementptr inbounds %struct.TYPE_22__, ptr %19, i64 %20
%22 = icmp ugt ptr %18, %21
br i1 %22, label %23, label %26
23: ; preds = %17
%24 = tail call i32 @G_Error(ptr noundef nonnull @.str) #3
%25 = load ptr, ptr @pushed_p, align 8, !tbaa !19
br label %26
26: ; preds = %23, %17
%27 = phi ptr [ %25, %23 ], [ %18, %17 ]
%28 = getelementptr inbounds i8, ptr %27, i64 24
store ptr %0, ptr %28, align 8, !tbaa !22
%29 = getelementptr inbounds i8, ptr %0, i64 24
%30 = load ptr, ptr %29, align 8, !tbaa !24
%31 = getelementptr inbounds i8, ptr %27, i64 8
%32 = load ptr, ptr %31, align 8, !tbaa !25
%33 = tail call i32 @VectorCopy(ptr noundef %30, ptr noundef %32) #3
%34 = getelementptr inbounds i8, ptr %0, i64 16
%35 = load ptr, ptr %34, align 8, !tbaa !26
%36 = load ptr, ptr @pushed_p, align 8, !tbaa !19
%37 = load ptr, ptr %36, align 8, !tbaa !27
%38 = tail call i32 @VectorCopy(ptr noundef %35, ptr noundef %37) #3
%39 = getelementptr inbounds i8, ptr %0, i64 32
%40 = load ptr, ptr %39, align 8, !tbaa !28
%41 = icmp eq ptr %40, null
br i1 %41, label %54, label %42
42: ; preds = %26
%43 = getelementptr inbounds i8, ptr %40, i64 8
%44 = load ptr, ptr %43, align 8, !tbaa !29
%45 = load i64, ptr @YAW, align 8, !tbaa !20
%46 = getelementptr inbounds i32, ptr %44, i64 %45
%47 = load i32, ptr %46, align 4, !tbaa !16
%48 = load ptr, ptr @pushed_p, align 8, !tbaa !19
%49 = getelementptr inbounds i8, ptr %48, i64 16
store i32 %47, ptr %49, align 8, !tbaa !32
%50 = load ptr, ptr %40, align 8, !tbaa !33
%51 = getelementptr inbounds i8, ptr %48, i64 8
%52 = load ptr, ptr %51, align 8, !tbaa !25
%53 = tail call i32 @VectorCopy(ptr noundef %50, ptr noundef %52) #3
br label %54
54: ; preds = %42, %26
%55 = load ptr, ptr @pushed_p, align 8, !tbaa !19
%56 = getelementptr inbounds i8, ptr %55, i64 32
store ptr %56, ptr @pushed_p, align 8, !tbaa !19
%57 = call i32 @G_CreateRotationMatrix(ptr noundef %3, ptr noundef nonnull %6) #3
%58 = call i32 @G_TransposeMatrix(ptr noundef nonnull %6, ptr noundef nonnull %5) #3
%59 = load ptr, ptr %39, align 8, !tbaa !28
%60 = icmp eq ptr %59, null
%61 = getelementptr inbounds i8, ptr %1, i64 40
%62 = load ptr, ptr %61, align 8, !tbaa !34
%63 = select i1 %60, ptr %29, ptr %59
%64 = load ptr, ptr %63, align 8, !tbaa !19
%65 = call i32 @VectorSubtract(ptr noundef %64, ptr noundef %62, ptr noundef undef) #3
%66 = call i32 @VectorCopy(ptr noundef undef, ptr noundef undef) #3
%67 = call i32 @G_RotatePoint(ptr noundef undef, ptr noundef nonnull %5) #3
%68 = call i32 @VectorSubtract(ptr noundef undef, ptr noundef undef, ptr noundef undef) #3
%69 = load ptr, ptr %29, align 8, !tbaa !24
%70 = call i32 @VectorAdd(ptr noundef %69, ptr noundef %2, ptr noundef %69) #3
%71 = load ptr, ptr %29, align 8, !tbaa !24
%72 = call i32 @VectorAdd(ptr noundef %71, ptr noundef undef, ptr noundef %71) #3
%73 = load ptr, ptr %39, align 8, !tbaa !28
%74 = icmp eq ptr %73, null
br i1 %74, label %93, label %75
75: ; preds = %54
%76 = load ptr, ptr %73, align 8, !tbaa !33
%77 = call i32 @VectorAdd(ptr noundef %76, ptr noundef %2, ptr noundef %76) #3
%78 = load ptr, ptr %39, align 8, !tbaa !28
%79 = load ptr, ptr %78, align 8, !tbaa !33
%80 = call i32 @VectorAdd(ptr noundef %79, ptr noundef undef, ptr noundef %79) #3
%81 = load i64, ptr @YAW, align 8, !tbaa !20
%82 = getelementptr inbounds i32, ptr %3, i64 %81
%83 = load i32, ptr %82, align 4, !tbaa !16
%84 = call i64 @ANGLE2SHORT(i32 noundef %83) #3
%85 = load ptr, ptr %39, align 8, !tbaa !28
%86 = getelementptr inbounds i8, ptr %85, i64 8
%87 = load ptr, ptr %86, align 8, !tbaa !29
%88 = load i64, ptr @YAW, align 8, !tbaa !20
%89 = getelementptr inbounds i32, ptr %87, i64 %88
%90 = load i32, ptr %89, align 4, !tbaa !16
%91 = trunc i64 %84 to i32
%92 = add i32 %90, %91
store i32 %92, ptr %89, align 4, !tbaa !16
br label %93
93: ; preds = %75, %54
%94 = getelementptr inbounds i8, ptr %0, i64 4
%95 = load i32, ptr %94, align 4, !tbaa !17
%96 = getelementptr inbounds i8, ptr %1, i64 8
%97 = load i32, ptr %96, align 8, !tbaa !18
%98 = icmp eq i32 %95, %97
br i1 %98, label %100, label %99
99: ; preds = %93
store i32 -1, ptr %94, align 4, !tbaa !17
br label %100
100: ; preds = %99, %93
%101 = call ptr @G_TestEntityPosition(ptr noundef nonnull %0) #3
%102 = icmp eq ptr %101, null
br i1 %102, label %103, label %112
103: ; preds = %100
%104 = load ptr, ptr %39, align 8, !tbaa !28
%105 = icmp eq ptr %104, null
%106 = getelementptr inbounds i8, ptr %0, i64 40
%107 = load ptr, ptr %106, align 8, !tbaa !34
%108 = select i1 %105, ptr %29, ptr %104
%109 = load ptr, ptr %108, align 8, !tbaa !19
%110 = call i32 @VectorCopy(ptr noundef %109, ptr noundef %107) #3
%111 = call i32 @trap_LinkEntity(ptr noundef nonnull %0) #3
br label %137
112: ; preds = %100
%113 = load ptr, ptr @pushed_p, align 8, !tbaa !19
%114 = getelementptr inbounds i8, ptr %113, i64 -24
%115 = load ptr, ptr %114, align 8, !tbaa !25
%116 = load ptr, ptr %29, align 8, !tbaa !24
%117 = call i32 @VectorCopy(ptr noundef %115, ptr noundef %116) #3
%118 = load ptr, ptr %39, align 8, !tbaa !28
%119 = icmp eq ptr %118, null
br i1 %119, label %126, label %120
120: ; preds = %112
%121 = load ptr, ptr @pushed_p, align 8, !tbaa !19
%122 = getelementptr inbounds i8, ptr %121, i64 -24
%123 = load ptr, ptr %122, align 8, !tbaa !25
%124 = load ptr, ptr %118, align 8, !tbaa !33
%125 = call i32 @VectorCopy(ptr noundef %123, ptr noundef %124) #3
br label %126
126: ; preds = %120, %112
%127 = load ptr, ptr @pushed_p, align 8, !tbaa !19
%128 = getelementptr inbounds i8, ptr %127, i64 -32
%129 = load ptr, ptr %128, align 8, !tbaa !27
%130 = load ptr, ptr %34, align 8, !tbaa !26
%131 = call i32 @VectorCopy(ptr noundef %129, ptr noundef %130) #3
%132 = call ptr @G_TestEntityPosition(ptr noundef nonnull %0) #3
%133 = icmp eq ptr %132, null
br i1 %133, label %134, label %137
134: ; preds = %126
store i32 -1, ptr %94, align 4, !tbaa !17
%135 = load ptr, ptr @pushed_p, align 8, !tbaa !19
%136 = getelementptr inbounds i8, ptr %135, i64 -32
store ptr %136, ptr @pushed_p, align 8, !tbaa !19
br label %137
137: ; preds = %126, %11, %134, %103
%138 = phi ptr [ @qtrue, %134 ], [ @qtrue, %103 ], [ @qfalse, %11 ], [ @qfalse, %126 ]
%139 = load i32, ptr %138, align 4, !tbaa !16
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3
ret i32 %139
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @G_Error(ptr noundef) local_unnamed_addr #2
declare i32 @VectorCopy(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @G_CreateRotationMatrix(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @G_TransposeMatrix(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @VectorSubtract(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @G_RotatePoint(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @VectorAdd(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @ANGLE2SHORT(i32 noundef) local_unnamed_addr #2
declare ptr @G_TestEntityPosition(ptr noundef) local_unnamed_addr #2
declare i32 @trap_LinkEntity(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"TYPE_21__", !8, i64 0, !13, i64 32, !15, i64 40}
!8 = !{!"TYPE_20__", !9, i64 0, !9, i64 4, !9, i64 8, !12, i64 16, !14, i64 24}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"TYPE_19__", !13, i64 0}
!13 = !{!"any pointer", !10, i64 0}
!14 = !{!"TYPE_16__", !13, i64 0}
!15 = !{!"TYPE_15__", !13, i64 0}
!16 = !{!9, !9, i64 0}
!17 = !{!7, !9, i64 4}
!18 = !{!7, !9, i64 8}
!19 = !{!13, !13, i64 0}
!20 = !{!21, !21, i64 0}
!21 = !{!"long", !10, i64 0}
!22 = !{!23, !13, i64 24}
!23 = !{!"TYPE_22__", !13, i64 0, !13, i64 8, !9, i64 16, !13, i64 24}
!24 = !{!7, !13, i64 24}
!25 = !{!23, !13, i64 8}
!26 = !{!7, !13, i64 16}
!27 = !{!23, !13, i64 0}
!28 = !{!7, !13, i64 32}
!29 = !{!30, !13, i64 8}
!30 = !{!"TYPE_18__", !31, i64 0}
!31 = !{!"TYPE_17__", !13, i64 0, !13, i64 8}
!32 = !{!23, !9, i64 16}
!33 = !{!30, !13, i64 0}
!34 = !{!7, !13, i64 40}
| Quake-III-Arena_code_game_extr_g_mover.c_G_TryPushingEntity |
; ModuleID = 'AnghaBench/linux/drivers/crypto/extr_n2_core.c_n2_mau_probe.c'
source_filename = "AnghaBench/linux/drivers/crypto/extr_n2_core.c_n2_mau_probe.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.n2_mau = type { i32, i32 }
@.str = private unnamed_addr constant [19 x i8] c"Found NCP at %pOF\0A\00", align 1
@.str.1 = private unnamed_addr constant [31 x i8] c"%pOF: Unable to allocate ncp.\0A\00", align 1
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [40 x i8] c"%pOF: Unable to grab global resources.\0A\00", align 1
@.str.3 = private unnamed_addr constant [29 x i8] c"%pOF: Unable to grab MDESC.\0A\00", align 1
@ENODEV = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [4 x i8] c"ncp\00", align 1
@.str.5 = private unnamed_addr constant [33 x i8] c"%pOF: Unable to grab IRQ props.\0A\00", align 1
@.str.6 = private unnamed_addr constant [4 x i8] c"mau\00", align 1
@HV_NCS_QTYPE_MAU = dso_local local_unnamed_addr global i32 0, align 4
@mau_intr = dso_local local_unnamed_addr global i32 0, align 4
@cpu_to_mau = dso_local local_unnamed_addr global i32 0, align 4
@.str.7 = private unnamed_addr constant [30 x i8] c"%pOF: MAU MDESC scan failed.\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @n2_mau_probe], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @n2_mau_probe(ptr noundef %0) #0 {
%2 = tail call i32 (...) @n2_spu_driver_version() #2
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = tail call i32 @pr_info(ptr noundef nonnull @.str, i32 noundef %3) #2
%5 = tail call ptr (...) @alloc_ncp() #2
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i32, ptr %0, align 4, !tbaa !5
%9 = tail call i32 @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.1, i32 noundef %8) #2
%10 = load i32, ptr @ENOMEM, align 4, !tbaa !11
%11 = sub nsw i32 0, %10
br label %52
12: ; preds = %1
%13 = tail call i32 (...) @grab_global_resources() #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %18, label %15
15: ; preds = %12
%16 = load i32, ptr %0, align 4, !tbaa !5
%17 = tail call i32 @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.2, i32 noundef %16) #2
br label %49
18: ; preds = %12
%19 = tail call ptr (...) @mdesc_grab() #2
%20 = icmp eq ptr %19, null
br i1 %20, label %21, label %26
21: ; preds = %18
%22 = load i32, ptr %0, align 4, !tbaa !5
%23 = tail call i32 @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.3, i32 noundef %22) #2
%24 = load i32, ptr @ENODEV, align 4, !tbaa !11
%25 = sub nsw i32 0, %24
br label %46
26: ; preds = %18
%27 = getelementptr inbounds %struct.n2_mau, ptr %5, i64 0, i32 1
%28 = tail call i32 @grab_mdesc_irq_props(ptr noundef nonnull %19, ptr noundef nonnull %0, ptr noundef nonnull %27, ptr noundef nonnull @.str.4) #2
%29 = icmp eq i32 %28, 0
br i1 %29, label %34, label %30
30: ; preds = %26
%31 = load i32, ptr %0, align 4, !tbaa !5
%32 = tail call i32 @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.5, i32 noundef %31) #2
%33 = tail call i32 @mdesc_release(ptr noundef nonnull %19) #2
br label %46
34: ; preds = %26
%35 = load i32, ptr @HV_NCS_QTYPE_MAU, align 4, !tbaa !11
%36 = load i32, ptr @mau_intr, align 4, !tbaa !11
%37 = load i32, ptr @cpu_to_mau, align 4, !tbaa !11
%38 = tail call i32 @spu_mdesc_scan(ptr noundef nonnull %19, ptr noundef nonnull %0, ptr noundef nonnull %27, ptr noundef nonnull %5, ptr noundef nonnull @.str.6, i32 noundef %35, i32 noundef %36, i32 noundef %37) #2
%39 = tail call i32 @mdesc_release(ptr noundef nonnull %19) #2
%40 = icmp eq i32 %38, 0
br i1 %40, label %44, label %41
41: ; preds = %34
%42 = load i32, ptr %0, align 4, !tbaa !5
%43 = tail call i32 @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.7, i32 noundef %42) #2
br label %46
44: ; preds = %34
%45 = tail call i32 @dev_set_drvdata(ptr noundef nonnull %0, ptr noundef nonnull %5) #2
br label %52
46: ; preds = %41, %30, %21
%47 = phi i32 [ %28, %30 ], [ %38, %41 ], [ %25, %21 ]
%48 = tail call i32 (...) @release_global_resources() #2
br label %49
49: ; preds = %46, %15
%50 = phi i32 [ %13, %15 ], [ %47, %46 ]
%51 = tail call i32 @free_ncp(ptr noundef nonnull %5) #2
br label %52
52: ; preds = %49, %44, %7
%53 = phi i32 [ %50, %49 ], [ 0, %44 ], [ %11, %7 ]
ret i32 %53
}
declare i32 @n2_spu_driver_version(...) local_unnamed_addr #1
declare i32 @pr_info(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @alloc_ncp(...) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @grab_global_resources(...) local_unnamed_addr #1
declare ptr @mdesc_grab(...) local_unnamed_addr #1
declare i32 @grab_mdesc_irq_props(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mdesc_release(ptr noundef) local_unnamed_addr #1
declare i32 @spu_mdesc_scan(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @release_global_resources(...) local_unnamed_addr #1
declare i32 @free_ncp(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"platform_device", !7, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/crypto/extr_n2_core.c_n2_mau_probe.c'
source_filename = "AnghaBench/linux/drivers/crypto/extr_n2_core.c_n2_mau_probe.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [19 x i8] c"Found NCP at %pOF\0A\00", align 1
@.str.1 = private unnamed_addr constant [31 x i8] c"%pOF: Unable to allocate ncp.\0A\00", align 1
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [40 x i8] c"%pOF: Unable to grab global resources.\0A\00", align 1
@.str.3 = private unnamed_addr constant [29 x i8] c"%pOF: Unable to grab MDESC.\0A\00", align 1
@ENODEV = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [4 x i8] c"ncp\00", align 1
@.str.5 = private unnamed_addr constant [33 x i8] c"%pOF: Unable to grab IRQ props.\0A\00", align 1
@.str.6 = private unnamed_addr constant [4 x i8] c"mau\00", align 1
@HV_NCS_QTYPE_MAU = common local_unnamed_addr global i32 0, align 4
@mau_intr = common local_unnamed_addr global i32 0, align 4
@cpu_to_mau = common local_unnamed_addr global i32 0, align 4
@.str.7 = private unnamed_addr constant [30 x i8] c"%pOF: MAU MDESC scan failed.\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @n2_mau_probe], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @n2_mau_probe(ptr noundef %0) #0 {
%2 = tail call i32 @n2_spu_driver_version() #2
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = tail call i32 @pr_info(ptr noundef nonnull @.str, i32 noundef %3) #2
%5 = tail call ptr @alloc_ncp() #2
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %12
7: ; preds = %1
%8 = load i32, ptr %0, align 4, !tbaa !6
%9 = tail call i32 @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.1, i32 noundef %8) #2
%10 = load i32, ptr @ENOMEM, align 4, !tbaa !12
%11 = sub nsw i32 0, %10
br label %52
12: ; preds = %1
%13 = tail call i32 @grab_global_resources() #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %18, label %15
15: ; preds = %12
%16 = load i32, ptr %0, align 4, !tbaa !6
%17 = tail call i32 @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.2, i32 noundef %16) #2
br label %49
18: ; preds = %12
%19 = tail call ptr @mdesc_grab() #2
%20 = icmp eq ptr %19, null
br i1 %20, label %21, label %26
21: ; preds = %18
%22 = load i32, ptr %0, align 4, !tbaa !6
%23 = tail call i32 @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.3, i32 noundef %22) #2
%24 = load i32, ptr @ENODEV, align 4, !tbaa !12
%25 = sub nsw i32 0, %24
br label %46
26: ; preds = %18
%27 = getelementptr inbounds i8, ptr %5, i64 4
%28 = tail call i32 @grab_mdesc_irq_props(ptr noundef nonnull %19, ptr noundef nonnull %0, ptr noundef nonnull %27, ptr noundef nonnull @.str.4) #2
%29 = icmp eq i32 %28, 0
br i1 %29, label %34, label %30
30: ; preds = %26
%31 = load i32, ptr %0, align 4, !tbaa !6
%32 = tail call i32 @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.5, i32 noundef %31) #2
%33 = tail call i32 @mdesc_release(ptr noundef nonnull %19) #2
br label %46
34: ; preds = %26
%35 = load i32, ptr @HV_NCS_QTYPE_MAU, align 4, !tbaa !12
%36 = load i32, ptr @mau_intr, align 4, !tbaa !12
%37 = load i32, ptr @cpu_to_mau, align 4, !tbaa !12
%38 = tail call i32 @spu_mdesc_scan(ptr noundef nonnull %19, ptr noundef nonnull %0, ptr noundef nonnull %27, ptr noundef nonnull %5, ptr noundef nonnull @.str.6, i32 noundef %35, i32 noundef %36, i32 noundef %37) #2
%39 = tail call i32 @mdesc_release(ptr noundef nonnull %19) #2
%40 = icmp eq i32 %38, 0
br i1 %40, label %44, label %41
41: ; preds = %34
%42 = load i32, ptr %0, align 4, !tbaa !6
%43 = tail call i32 @dev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.7, i32 noundef %42) #2
br label %46
44: ; preds = %34
%45 = tail call i32 @dev_set_drvdata(ptr noundef nonnull %0, ptr noundef nonnull %5) #2
br label %52
46: ; preds = %41, %30, %21
%47 = phi i32 [ %28, %30 ], [ %38, %41 ], [ %25, %21 ]
%48 = tail call i32 @release_global_resources() #2
br label %49
49: ; preds = %46, %15
%50 = phi i32 [ %13, %15 ], [ %47, %46 ]
%51 = tail call i32 @free_ncp(ptr noundef nonnull %5) #2
br label %52
52: ; preds = %49, %44, %7
%53 = phi i32 [ %50, %49 ], [ 0, %44 ], [ %11, %7 ]
ret i32 %53
}
declare i32 @n2_spu_driver_version(...) local_unnamed_addr #1
declare i32 @pr_info(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @alloc_ncp(...) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @grab_global_resources(...) local_unnamed_addr #1
declare ptr @mdesc_grab(...) local_unnamed_addr #1
declare i32 @grab_mdesc_irq_props(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mdesc_release(ptr noundef) local_unnamed_addr #1
declare i32 @spu_mdesc_scan(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @release_global_resources(...) local_unnamed_addr #1
declare i32 @free_ncp(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"platform_device", !8, i64 0}
!8 = !{!"TYPE_3__", !9, i64 0}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!9, !9, i64 0}
| linux_drivers_crypto_extr_n2_core.c_n2_mau_probe |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_ppp_mppe.c_setup_sg.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_ppp_mppe.c_setup_sg.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @setup_sg], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @setup_sg(ptr noundef %0, ptr noundef %1, i32 noundef returned %2) #0 {
%4 = tail call i32 @sg_set_buf(ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
ret i32 %2
}
declare i32 @sg_set_buf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/extr_ppp_mppe.c_setup_sg.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/extr_ppp_mppe.c_setup_sg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @setup_sg], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @setup_sg(ptr noundef %0, ptr noundef %1, i32 noundef returned %2) #0 {
%4 = tail call i32 @sg_set_buf(ptr noundef %0, ptr noundef %1, i32 noundef %2) #2
ret i32 %2
}
declare i32 @sg_set_buf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_net_extr_ppp_mppe.c_setup_sg |
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