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; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv6/extr_ip6_tunnel.c_ip6_tnl_destroy_tunnels.c' source_filename = "AnghaBench/fastsocket/kernel/net/ipv6/extr_ip6_tunnel.c_ip6_tnl_destroy_tunnels.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.ip6_tnl_net = type { ptr, ptr } @HASH_SIZE = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ip6_tnl_destroy_tunnels], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @ip6_tnl_destroy_tunnels(ptr nocapture noundef readonly %0) #0 { %2 = load i32, ptr @HASH_SIZE, align 4, !tbaa !5 %3 = icmp sgt i32 %2, 0 br i1 %3, label %4, label %30 4: ; preds = %1 %5 = getelementptr inbounds %struct.ip6_tnl_net, ptr %0, i64 0, i32 1 %6 = load ptr, ptr %5, align 8, !tbaa !9 br label %7 7: ; preds = %4, %24 %8 = phi i32 [ %2, %4 ], [ %25, %24 ] %9 = phi ptr [ %6, %4 ], [ %26, %24 ] %10 = phi i64 [ 0, %4 ], [ %27, %24 ] %11 = getelementptr inbounds ptr, ptr %9, i64 %10 %12 = load ptr, ptr %11, align 8, !tbaa !12 %13 = icmp eq ptr %12, null br i1 %13, label %24, label %14 14: ; preds = %7, %14 %15 = phi ptr [ %20, %14 ], [ %12, %7 ] %16 = load i32, ptr %15, align 4, !tbaa !13 %17 = tail call i32 @unregister_netdevice(i32 noundef %16) #2 %18 = load ptr, ptr %5, align 8, !tbaa !9 %19 = getelementptr inbounds ptr, ptr %18, i64 %10 %20 = load ptr, ptr %19, align 8, !tbaa !12 %21 = icmp eq ptr %20, null br i1 %21, label %22, label %14, !llvm.loop !15 22: ; preds = %14 %23 = load i32, ptr @HASH_SIZE, align 4, !tbaa !5 br label %24 24: ; preds = %22, %7 %25 = phi i32 [ %23, %22 ], [ %8, %7 ] %26 = phi ptr [ %18, %22 ], [ %9, %7 ] %27 = add nuw nsw i64 %10, 1 %28 = sext i32 %25 to i64 %29 = icmp slt i64 %27, %28 br i1 %29, label %7, label %30, !llvm.loop !17 30: ; preds = %24, %1 %31 = load ptr, ptr %0, align 8, !tbaa !18 %32 = load ptr, ptr %31, align 8, !tbaa !12 %33 = load i32, ptr %32, align 4, !tbaa !13 %34 = tail call i32 @unregister_netdevice(i32 noundef %33) #2 ret void } declare i32 @unregister_netdevice(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 8} !10 = !{!"ip6_tnl_net", !11, i64 0, !11, i64 8} !11 = !{!"any pointer", !7, i64 0} !12 = !{!11, !11, i64 0} !13 = !{!14, !6, i64 0} !14 = !{!"ip6_tnl", !6, i64 0} !15 = distinct !{!15, !16} !16 = !{!"llvm.loop.mustprogress"} !17 = distinct !{!17, !16} !18 = !{!10, !11, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv6/extr_ip6_tunnel.c_ip6_tnl_destroy_tunnels.c' source_filename = "AnghaBench/fastsocket/kernel/net/ipv6/extr_ip6_tunnel.c_ip6_tnl_destroy_tunnels.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @HASH_SIZE = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ip6_tnl_destroy_tunnels], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @ip6_tnl_destroy_tunnels(ptr nocapture noundef readonly %0) #0 { %2 = load i32, ptr @HASH_SIZE, align 4, !tbaa !6 %3 = icmp sgt i32 %2, 0 br i1 %3, label %4, label %30 4: ; preds = %1 %5 = getelementptr inbounds i8, ptr %0, i64 8 %6 = load ptr, ptr %5, align 8, !tbaa !10 br label %7 7: ; preds = %4, %24 %8 = phi i32 [ %2, %4 ], [ %25, %24 ] %9 = phi ptr [ %6, %4 ], [ %26, %24 ] %10 = phi i64 [ 0, %4 ], [ %27, %24 ] %11 = getelementptr inbounds ptr, ptr %9, i64 %10 %12 = load ptr, ptr %11, align 8, !tbaa !13 %13 = icmp eq ptr %12, null br i1 %13, label %24, label %14 14: ; preds = %7, %14 %15 = phi ptr [ %20, %14 ], [ %12, %7 ] %16 = load i32, ptr %15, align 4, !tbaa !14 %17 = tail call i32 @unregister_netdevice(i32 noundef %16) #2 %18 = load ptr, ptr %5, align 8, !tbaa !10 %19 = getelementptr inbounds ptr, ptr %18, i64 %10 %20 = load ptr, ptr %19, align 8, !tbaa !13 %21 = icmp eq ptr %20, null br i1 %21, label %22, label %14, !llvm.loop !16 22: ; preds = %14 %23 = load i32, ptr @HASH_SIZE, align 4, !tbaa !6 br label %24 24: ; preds = %22, %7 %25 = phi i32 [ %23, %22 ], [ %8, %7 ] %26 = phi ptr [ %18, %22 ], [ %9, %7 ] %27 = add nuw nsw i64 %10, 1 %28 = sext i32 %25 to i64 %29 = icmp slt i64 %27, %28 br i1 %29, label %7, label %30, !llvm.loop !18 30: ; preds = %24, %1 %31 = load ptr, ptr %0, align 8, !tbaa !19 %32 = load ptr, ptr %31, align 8, !tbaa !13 %33 = load i32, ptr %32, align 4, !tbaa !14 %34 = tail call i32 @unregister_netdevice(i32 noundef %33) #2 ret void } declare i32 @unregister_netdevice(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 8} !11 = !{!"ip6_tnl_net", !12, i64 0, !12, i64 8} !12 = !{!"any pointer", !8, i64 0} !13 = !{!12, !12, i64 0} !14 = !{!15, !7, i64 0} !15 = !{!"ip6_tnl", !7, i64 0} !16 = distinct !{!16, !17} !17 = !{!"llvm.loop.mustprogress"} !18 = distinct !{!18, !17} !19 = !{!11, !12, i64 0}
fastsocket_kernel_net_ipv6_extr_ip6_tunnel.c_ip6_tnl_destroy_tunnels
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_dp.c_g4x_get_aux_send_ctl.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_dp.c_g4x_get_aux_send_ctl.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @DP_AUX_CH_CTL_TIME_OUT_600us = dso_local local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_TIME_OUT_400us = dso_local local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_SEND_BUSY = dso_local local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_DONE = dso_local local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_INTERRUPT = dso_local local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_TIME_OUT_ERROR = dso_local local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_RECEIVE_ERROR = dso_local local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT = dso_local local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT = dso_local local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @g4x_get_aux_send_ctl], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @g4x_get_aux_send_ctl(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 { %4 = tail call ptr @dp_to_dig_port(ptr noundef %0) #2 %5 = load i32, ptr %4, align 4, !tbaa !5 %6 = tail call ptr @to_i915(i32 noundef %5) #2 %7 = tail call i64 @IS_GEN(ptr noundef %6, i32 noundef 6) #2 %8 = icmp eq i64 %7, 0 %9 = select i1 %8, i32 5, i32 3 %10 = tail call i64 @IS_BROADWELL(ptr noundef %6) #2 %11 = icmp eq i64 %10, 0 %12 = load i32, ptr @DP_AUX_CH_CTL_TIME_OUT_400us, align 4 %13 = load i32, ptr @DP_AUX_CH_CTL_TIME_OUT_600us, align 4 %14 = select i1 %11, i32 %12, i32 %13 %15 = load i32, ptr @DP_AUX_CH_CTL_SEND_BUSY, align 4, !tbaa !12 %16 = load i32, ptr @DP_AUX_CH_CTL_DONE, align 4, !tbaa !12 %17 = load i32, ptr @DP_AUX_CH_CTL_INTERRUPT, align 4, !tbaa !12 %18 = load i32, ptr @DP_AUX_CH_CTL_TIME_OUT_ERROR, align 4, !tbaa !12 %19 = load i32, ptr @DP_AUX_CH_CTL_RECEIVE_ERROR, align 4, !tbaa !12 %20 = load i32, ptr @DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT, align 4, !tbaa !12 %21 = shl i32 %1, %20 %22 = load i32, ptr @DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT, align 4, !tbaa !12 %23 = shl i32 %9, %22 %24 = load i32, ptr @DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT, align 4, !tbaa !12 %25 = shl i32 %2, %24 %26 = or i32 %14, %15 %27 = or i32 %26, %16 %28 = or i32 %27, %17 %29 = or i32 %28, %18 %30 = or i32 %29, %19 %31 = or i32 %30, %21 %32 = or i32 %31, %23 %33 = or i32 %32, %25 ret i32 %33 } declare ptr @dp_to_dig_port(ptr noundef) local_unnamed_addr #1 declare ptr @to_i915(i32 noundef) local_unnamed_addr #1 declare i64 @IS_GEN(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i64 @IS_BROADWELL(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !9, i64 0} !6 = !{!"intel_digital_port", !7, i64 0} !7 = !{!"TYPE_4__", !8, i64 0} !8 = !{!"TYPE_3__", !9, i64 0} !9 = !{!"int", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"} !12 = !{!9, !9, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_dp.c_g4x_get_aux_send_ctl.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/display/extr_intel_dp.c_g4x_get_aux_send_ctl.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @DP_AUX_CH_CTL_TIME_OUT_600us = common local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_TIME_OUT_400us = common local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_SEND_BUSY = common local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_DONE = common local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_INTERRUPT = common local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_TIME_OUT_ERROR = common local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_RECEIVE_ERROR = common local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT = common local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT = common local_unnamed_addr global i32 0, align 4 @DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @g4x_get_aux_send_ctl], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @g4x_get_aux_send_ctl(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 { %4 = tail call ptr @dp_to_dig_port(ptr noundef %0) #2 %5 = load i32, ptr %4, align 4, !tbaa !6 %6 = tail call ptr @to_i915(i32 noundef %5) #2 %7 = tail call i64 @IS_GEN(ptr noundef %6, i32 noundef 6) #2 %8 = icmp eq i64 %7, 0 %9 = select i1 %8, i32 5, i32 3 %10 = tail call i64 @IS_BROADWELL(ptr noundef %6) #2 %11 = icmp eq i64 %10, 0 %12 = load i32, ptr @DP_AUX_CH_CTL_TIME_OUT_400us, align 4 %13 = load i32, ptr @DP_AUX_CH_CTL_TIME_OUT_600us, align 4 %14 = select i1 %11, i32 %12, i32 %13 %15 = load i32, ptr @DP_AUX_CH_CTL_SEND_BUSY, align 4, !tbaa !13 %16 = load i32, ptr @DP_AUX_CH_CTL_DONE, align 4, !tbaa !13 %17 = load i32, ptr @DP_AUX_CH_CTL_INTERRUPT, align 4, !tbaa !13 %18 = load i32, ptr @DP_AUX_CH_CTL_TIME_OUT_ERROR, align 4, !tbaa !13 %19 = load i32, ptr @DP_AUX_CH_CTL_RECEIVE_ERROR, align 4, !tbaa !13 %20 = load i32, ptr @DP_AUX_CH_CTL_MESSAGE_SIZE_SHIFT, align 4, !tbaa !13 %21 = shl i32 %1, %20 %22 = load i32, ptr @DP_AUX_CH_CTL_PRECHARGE_2US_SHIFT, align 4, !tbaa !13 %23 = shl i32 %9, %22 %24 = load i32, ptr @DP_AUX_CH_CTL_BIT_CLOCK_2X_SHIFT, align 4, !tbaa !13 %25 = shl i32 %2, %24 %26 = or i32 %14, %15 %27 = or i32 %26, %16 %28 = or i32 %27, %17 %29 = or i32 %28, %18 %30 = or i32 %29, %19 %31 = or i32 %30, %21 %32 = or i32 %31, %23 %33 = or i32 %32, %25 ret i32 %33 } declare ptr @dp_to_dig_port(ptr noundef) local_unnamed_addr #1 declare ptr @to_i915(i32 noundef) local_unnamed_addr #1 declare i64 @IS_GEN(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i64 @IS_BROADWELL(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !10, i64 0} !7 = !{!"intel_digital_port", !8, i64 0} !8 = !{!"TYPE_4__", !9, i64 0} !9 = !{!"TYPE_3__", !10, i64 0} !10 = !{!"int", !11, i64 0} !11 = !{!"omnipotent char", !12, i64 0} !12 = !{!"Simple C/C++ TBAA"} !13 = !{!10, !10, i64 0}
linux_drivers_gpu_drm_i915_display_extr_intel_dp.c_g4x_get_aux_send_ctl
; ModuleID = 'AnghaBench/linux/drivers/tty/serial/extr_sh-sci.c_sci_tx_empty.c' source_filename = "AnghaBench/linux/drivers/tty/serial/extr_sh-sci.c_sci_tx_empty.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @SCxSR = dso_local local_unnamed_addr global i32 0, align 4 @TIOCSER_TEMT = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @sci_tx_empty], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @sci_tx_empty(ptr noundef %0) #0 { %2 = load i32, ptr @SCxSR, align 4, !tbaa !5 %3 = tail call zeroext i16 @serial_port_in(ptr noundef %0, i32 noundef %2) #2 %4 = tail call zeroext i16 @sci_txfill(ptr noundef %0) #2 %5 = tail call zeroext i16 @SCxSR_TEND(ptr noundef %0) #2 %6 = and i16 %5, %3 %7 = icmp eq i16 %6, 0 %8 = icmp ne i16 %4, 0 %9 = select i1 %7, i1 true, i1 %8 %10 = load i32, ptr @TIOCSER_TEMT, align 4 %11 = select i1 %9, i32 0, i32 %10 ret i32 %11 } declare zeroext i16 @serial_port_in(ptr noundef, i32 noundef) local_unnamed_addr #1 declare zeroext i16 @sci_txfill(ptr noundef) local_unnamed_addr #1 declare zeroext i16 @SCxSR_TEND(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/tty/serial/extr_sh-sci.c_sci_tx_empty.c' source_filename = "AnghaBench/linux/drivers/tty/serial/extr_sh-sci.c_sci_tx_empty.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SCxSR = common local_unnamed_addr global i32 0, align 4 @TIOCSER_TEMT = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @sci_tx_empty], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @sci_tx_empty(ptr noundef %0) #0 { %2 = load i32, ptr @SCxSR, align 4, !tbaa !6 %3 = tail call zeroext i16 @serial_port_in(ptr noundef %0, i32 noundef %2) #2 %4 = tail call zeroext i16 @sci_txfill(ptr noundef %0) #2 %5 = tail call zeroext i16 @SCxSR_TEND(ptr noundef %0) #2 %6 = and i16 %5, %3 %7 = icmp eq i16 %6, 0 %8 = icmp ne i16 %4, 0 %9 = select i1 %7, i1 true, i1 %8 %10 = load i32, ptr @TIOCSER_TEMT, align 4 %11 = select i1 %9, i32 0, i32 %10 ret i32 %11 } declare zeroext i16 @serial_port_in(ptr noundef, i32 noundef) local_unnamed_addr #1 declare zeroext i16 @sci_txfill(ptr noundef) local_unnamed_addr #1 declare zeroext i16 @SCxSR_TEND(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_drivers_tty_serial_extr_sh-sci.c_sci_tx_empty
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/engine/extr_eng_list.c_ENGINE_add.c' source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/engine/extr_eng_list.c_ENGINE_add.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_4__ = type { ptr, ptr } @ENGINE_F_ENGINE_ADD = dso_local local_unnamed_addr global i32 0, align 4 @ERR_R_PASSED_NULL_PARAMETER = dso_local local_unnamed_addr global i32 0, align 4 @ENGINE_R_ID_OR_NAME_MISSING = dso_local local_unnamed_addr global i32 0, align 4 @global_engine_lock = dso_local local_unnamed_addr global i32 0, align 4 @ENGINE_R_INTERNAL_LIST_ERROR = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local noundef i32 @ENGINE_add(ptr noundef %0) local_unnamed_addr #0 { %2 = icmp eq ptr %0, null br i1 %2, label %3, label %7 3: ; preds = %1 %4 = load i32, ptr @ENGINE_F_ENGINE_ADD, align 4, !tbaa !5 %5 = load i32, ptr @ERR_R_PASSED_NULL_PARAMETER, align 4, !tbaa !5 %6 = tail call i32 @ENGINEerr(i32 noundef %4, i32 noundef %5) #2 br label %31 7: ; preds = %1 %8 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1 %9 = load ptr, ptr %8, align 8, !tbaa !9 %10 = icmp eq ptr %9, null br i1 %10, label %14, label %11 11: ; preds = %7 %12 = load ptr, ptr %0, align 8, !tbaa !12 %13 = icmp eq ptr %12, null br i1 %13, label %14, label %18 14: ; preds = %11, %7 %15 = load i32, ptr @ENGINE_F_ENGINE_ADD, align 4, !tbaa !5 %16 = load i32, ptr @ENGINE_R_ID_OR_NAME_MISSING, align 4, !tbaa !5 %17 = tail call i32 @ENGINEerr(i32 noundef %15, i32 noundef %16) #2 br label %31 18: ; preds = %11 %19 = load i32, ptr @global_engine_lock, align 4, !tbaa !5 %20 = tail call i32 @CRYPTO_THREAD_write_lock(i32 noundef %19) #2 %21 = tail call i32 @engine_list_add(ptr noundef nonnull %0) #2 %22 = icmp eq i32 %21, 0 br i1 %22, label %23, label %27 23: ; preds = %18 %24 = load i32, ptr @ENGINE_F_ENGINE_ADD, align 4, !tbaa !5 %25 = load i32, ptr @ENGINE_R_INTERNAL_LIST_ERROR, align 4, !tbaa !5 %26 = tail call i32 @ENGINEerr(i32 noundef %24, i32 noundef %25) #2 br label %27 27: ; preds = %23, %18 %28 = phi i32 [ 1, %18 ], [ 0, %23 ] %29 = load i32, ptr @global_engine_lock, align 4, !tbaa !5 %30 = tail call i32 @CRYPTO_THREAD_unlock(i32 noundef %29) #2 br label %31 31: ; preds = %27, %14, %3 %32 = phi i32 [ 0, %3 ], [ 0, %14 ], [ %28, %27 ] ret i32 %32 } declare i32 @ENGINEerr(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @CRYPTO_THREAD_write_lock(i32 noundef) local_unnamed_addr #1 declare i32 @engine_list_add(ptr noundef) local_unnamed_addr #1 declare i32 @CRYPTO_THREAD_unlock(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 8} !10 = !{!"TYPE_4__", !11, i64 0, !11, i64 8} !11 = !{!"any pointer", !7, i64 0} !12 = !{!10, !11, i64 0}
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/crypto/engine/extr_eng_list.c_ENGINE_add.c' source_filename = "AnghaBench/freebsd/crypto/openssl/crypto/engine/extr_eng_list.c_ENGINE_add.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @ENGINE_F_ENGINE_ADD = common local_unnamed_addr global i32 0, align 4 @ERR_R_PASSED_NULL_PARAMETER = common local_unnamed_addr global i32 0, align 4 @ENGINE_R_ID_OR_NAME_MISSING = common local_unnamed_addr global i32 0, align 4 @global_engine_lock = common local_unnamed_addr global i32 0, align 4 @ENGINE_R_INTERNAL_LIST_ERROR = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define range(i32 0, 2) i32 @ENGINE_add(ptr noundef %0) local_unnamed_addr #0 { %2 = icmp eq ptr %0, null br i1 %2, label %3, label %7 3: ; preds = %1 %4 = load i32, ptr @ENGINE_F_ENGINE_ADD, align 4, !tbaa !6 %5 = load i32, ptr @ERR_R_PASSED_NULL_PARAMETER, align 4, !tbaa !6 %6 = tail call i32 @ENGINEerr(i32 noundef %4, i32 noundef %5) #2 br label %31 7: ; preds = %1 %8 = getelementptr inbounds i8, ptr %0, i64 8 %9 = load ptr, ptr %8, align 8, !tbaa !10 %10 = icmp eq ptr %9, null br i1 %10, label %14, label %11 11: ; preds = %7 %12 = load ptr, ptr %0, align 8, !tbaa !13 %13 = icmp eq ptr %12, null br i1 %13, label %14, label %18 14: ; preds = %11, %7 %15 = load i32, ptr @ENGINE_F_ENGINE_ADD, align 4, !tbaa !6 %16 = load i32, ptr @ENGINE_R_ID_OR_NAME_MISSING, align 4, !tbaa !6 %17 = tail call i32 @ENGINEerr(i32 noundef %15, i32 noundef %16) #2 br label %31 18: ; preds = %11 %19 = load i32, ptr @global_engine_lock, align 4, !tbaa !6 %20 = tail call i32 @CRYPTO_THREAD_write_lock(i32 noundef %19) #2 %21 = tail call i32 @engine_list_add(ptr noundef nonnull %0) #2 %22 = icmp eq i32 %21, 0 br i1 %22, label %23, label %27 23: ; preds = %18 %24 = load i32, ptr @ENGINE_F_ENGINE_ADD, align 4, !tbaa !6 %25 = load i32, ptr @ENGINE_R_INTERNAL_LIST_ERROR, align 4, !tbaa !6 %26 = tail call i32 @ENGINEerr(i32 noundef %24, i32 noundef %25) #2 br label %27 27: ; preds = %23, %18 %28 = phi i32 [ 1, %18 ], [ 0, %23 ] %29 = load i32, ptr @global_engine_lock, align 4, !tbaa !6 %30 = tail call i32 @CRYPTO_THREAD_unlock(i32 noundef %29) #2 br label %31 31: ; preds = %27, %14, %3 %32 = phi i32 [ 0, %3 ], [ 0, %14 ], [ %28, %27 ] ret i32 %32 } declare i32 @ENGINEerr(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @CRYPTO_THREAD_write_lock(i32 noundef) local_unnamed_addr #1 declare i32 @engine_list_add(ptr noundef) local_unnamed_addr #1 declare i32 @CRYPTO_THREAD_unlock(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 8} !11 = !{!"TYPE_4__", !12, i64 0, !12, i64 8} !12 = !{!"any pointer", !8, i64 0} !13 = !{!11, !12, i64 0}
freebsd_crypto_openssl_crypto_engine_extr_eng_list.c_ENGINE_add
; ModuleID = 'AnghaBench/linux/drivers/rtc/extr_rtc-brcmstb-waketimer.c_brcmstb_waketmr_probe.c' source_filename = "AnghaBench/linux/drivers/rtc/extr_rtc-brcmstb-waketimer.c_brcmstb_waketmr_probe.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.brcmstb_waketmr = type { i64, ptr, %struct.TYPE_12__, ptr, ptr, ptr, ptr } %struct.TYPE_12__ = type { i32 } %struct.TYPE_13__ = type { i32, ptr } @GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4 @ENOMEM = dso_local local_unnamed_addr global i32 0, align 4 @IORESOURCE_MEM = dso_local local_unnamed_addr global i32 0, align 4 @ENODEV = dso_local local_unnamed_addr global i32 0, align 4 @BRCMSTB_WKTMR_DEFAULT_FREQ = dso_local local_unnamed_addr global ptr null, align 8 @brcmstb_waketmr_irq = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [18 x i8] c"brcmstb-waketimer\00", align 1 @brcmstb_waketmr_reboot = dso_local local_unnamed_addr global i32 0, align 4 @brcmstb_waketmr_ops = dso_local global i32 0, align 4 @U32_MAX = dso_local local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [25 x i8] c"registered, with irq %d\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @brcmstb_waketmr_probe], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @brcmstb_waketmr_probe(ptr noundef %0) #0 { %2 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5 %3 = tail call ptr @devm_kzalloc(ptr noundef %0, i32 noundef 56, i32 noundef %2) #2 %4 = icmp eq ptr %3, null br i1 %4, label %5, label %8 5: ; preds = %1 %6 = load i32, ptr @ENOMEM, align 4, !tbaa !5 %7 = sub nsw i32 0, %6 br label %80 8: ; preds = %1 %9 = tail call i32 @platform_set_drvdata(ptr noundef %0, ptr noundef nonnull %3) #2 %10 = getelementptr inbounds %struct.brcmstb_waketmr, ptr %3, i64 0, i32 6 store ptr %0, ptr %10, align 8, !tbaa !9 %11 = load i32, ptr @IORESOURCE_MEM, align 4, !tbaa !5 %12 = tail call ptr @platform_get_resource(ptr noundef %0, i32 noundef %11, i32 noundef 0) #2 %13 = tail call ptr @devm_ioremap_resource(ptr noundef %0, ptr noundef %12) #2 %14 = getelementptr inbounds %struct.brcmstb_waketmr, ptr %3, i64 0, i32 5 store ptr %13, ptr %14, align 8, !tbaa !14 %15 = tail call i64 @IS_ERR(ptr noundef %13) #2 %16 = icmp eq i64 %15, 0 br i1 %16, label %20, label %17 17: ; preds = %8 %18 = load ptr, ptr %14, align 8, !tbaa !14 %19 = tail call i32 @PTR_ERR(ptr noundef %18) #2 br label %80 20: ; preds = %8 %21 = tail call ptr @devm_rtc_allocate_device(ptr noundef %0) #2 %22 = getelementptr inbounds %struct.brcmstb_waketmr, ptr %3, i64 0, i32 3 store ptr %21, ptr %22, align 8, !tbaa !15 %23 = tail call i64 @IS_ERR(ptr noundef %21) #2 %24 = icmp eq i64 %23, 0 br i1 %24, label %28, label %25 25: ; preds = %20 %26 = load ptr, ptr %22, align 8, !tbaa !15 %27 = tail call i32 @PTR_ERR(ptr noundef %26) #2 br label %80 28: ; preds = %20 %29 = tail call i32 @device_set_wakeup_capable(ptr noundef %0, i32 noundef 1) #2 %30 = tail call i32 @device_wakeup_enable(ptr noundef %0) #2 %31 = tail call i64 @platform_get_irq(ptr noundef %0, i32 noundef 0) #2 store i64 %31, ptr %3, align 8, !tbaa !16 %32 = icmp slt i64 %31, 0 br i1 %32, label %33, label %36 33: ; preds = %28 %34 = load i32, ptr @ENODEV, align 4, !tbaa !5 %35 = sub nsw i32 0, %34 br label %80 36: ; preds = %28 %37 = tail call ptr @devm_clk_get(ptr noundef %0, ptr noundef null) #2 %38 = getelementptr inbounds %struct.brcmstb_waketmr, ptr %3, i64 0, i32 1 store ptr %37, ptr %38, align 8, !tbaa !17 %39 = tail call i64 @IS_ERR(ptr noundef %37) #2 %40 = icmp eq i64 %39, 0 br i1 %40, label %41, label %52 41: ; preds = %36 %42 = load ptr, ptr %38, align 8, !tbaa !17 %43 = tail call i32 @clk_prepare_enable(ptr noundef %42) #2 %44 = icmp eq i32 %43, 0 br i1 %44, label %45, label %80 45: ; preds = %41 %46 = load ptr, ptr %38, align 8, !tbaa !17 %47 = tail call ptr @clk_get_rate(ptr noundef %46) #2 %48 = getelementptr inbounds %struct.brcmstb_waketmr, ptr %3, i64 0, i32 4 store ptr %47, ptr %48, align 8, !tbaa !18 %49 = icmp eq ptr %47, null br i1 %49, label %50, label %55 50: ; preds = %45 %51 = load ptr, ptr @BRCMSTB_WKTMR_DEFAULT_FREQ, align 8, !tbaa !19 store ptr %51, ptr %48, align 8, !tbaa !18 br label %55 52: ; preds = %36 %53 = load ptr, ptr @BRCMSTB_WKTMR_DEFAULT_FREQ, align 8, !tbaa !19 %54 = getelementptr inbounds %struct.brcmstb_waketmr, ptr %3, i64 0, i32 4 store ptr %53, ptr %54, align 8, !tbaa !18 store ptr null, ptr %38, align 8, !tbaa !17 br label %55 55: ; preds = %45, %50, %52 %56 = load i64, ptr %3, align 8, !tbaa !16 %57 = load i32, ptr @brcmstb_waketmr_irq, align 4, !tbaa !5 %58 = tail call i32 @devm_request_irq(ptr noundef %0, i64 noundef %56, i32 noundef %57, i32 noundef 0, ptr noundef nonnull @.str, ptr noundef nonnull %3) #2 %59 = icmp slt i32 %58, 0 br i1 %59, label %74, label %60 60: ; preds = %55 %61 = load i32, ptr @brcmstb_waketmr_reboot, align 4, !tbaa !5 %62 = getelementptr inbounds %struct.brcmstb_waketmr, ptr %3, i64 0, i32 2 store i32 %61, ptr %62, align 8, !tbaa !20 %63 = tail call i32 @register_reboot_notifier(ptr noundef nonnull %62) #2 %64 = load ptr, ptr %22, align 8, !tbaa !15 %65 = getelementptr inbounds %struct.TYPE_13__, ptr %64, i64 0, i32 1 store ptr @brcmstb_waketmr_ops, ptr %65, align 8, !tbaa !21 %66 = load i32, ptr @U32_MAX, align 4, !tbaa !5 store i32 %66, ptr %64, align 8, !tbaa !23 %67 = tail call i32 @rtc_register_device(ptr noundef nonnull %64) #2 %68 = icmp eq i32 %67, 0 br i1 %68, label %69, label %72 69: ; preds = %60 %70 = load i64, ptr %3, align 8, !tbaa !16 %71 = tail call i32 @dev_info(ptr noundef %0, ptr noundef nonnull @.str.1, i64 noundef %70) #2 br label %80 72: ; preds = %60 %73 = tail call i32 @unregister_reboot_notifier(ptr noundef nonnull %62) #2 br label %74 74: ; preds = %55, %72 %75 = phi i32 [ %58, %55 ], [ %67, %72 ] %76 = load ptr, ptr %38, align 8, !tbaa !17 %77 = icmp eq ptr %76, null br i1 %77, label %80, label %78 78: ; preds = %74 %79 = tail call i32 @clk_disable_unprepare(ptr noundef nonnull %76) #2 br label %80 80: ; preds = %74, %78, %41, %69, %33, %25, %17, %5 %81 = phi i32 [ %19, %17 ], [ %27, %25 ], [ %35, %33 ], [ 0, %69 ], [ %7, %5 ], [ %43, %41 ], [ %75, %78 ], [ %75, %74 ] ret i32 %81 } declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @platform_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @platform_get_resource(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare ptr @devm_ioremap_resource(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1 declare ptr @devm_rtc_allocate_device(ptr noundef) local_unnamed_addr #1 declare i32 @device_set_wakeup_capable(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @device_wakeup_enable(ptr noundef) local_unnamed_addr #1 declare i64 @platform_get_irq(ptr noundef, i32 noundef) local_unnamed_addr #1 declare ptr @devm_clk_get(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @clk_prepare_enable(ptr noundef) local_unnamed_addr #1 declare ptr @clk_get_rate(ptr noundef) local_unnamed_addr #1 declare i32 @devm_request_irq(ptr noundef, i64 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @register_reboot_notifier(ptr noundef) local_unnamed_addr #1 declare i32 @rtc_register_device(ptr noundef) local_unnamed_addr #1 declare i32 @dev_info(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @unregister_reboot_notifier(ptr noundef) local_unnamed_addr #1 declare i32 @clk_disable_unprepare(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !12, i64 48} !10 = !{!"brcmstb_waketmr", !11, i64 0, !12, i64 8, !13, i64 16, !12, i64 24, !12, i64 32, !12, i64 40, !12, i64 48} !11 = !{!"long", !7, i64 0} !12 = !{!"any pointer", !7, i64 0} !13 = !{!"TYPE_12__", !6, i64 0} !14 = !{!10, !12, i64 40} !15 = !{!10, !12, i64 24} !16 = !{!10, !11, i64 0} !17 = !{!10, !12, i64 8} !18 = !{!10, !12, i64 32} !19 = !{!12, !12, i64 0} !20 = !{!10, !6, i64 16} !21 = !{!22, !12, i64 8} !22 = !{!"TYPE_13__", !6, i64 0, !12, i64 8} !23 = !{!22, !6, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/rtc/extr_rtc-brcmstb-waketimer.c_brcmstb_waketmr_probe.c' source_filename = "AnghaBench/linux/drivers/rtc/extr_rtc-brcmstb-waketimer.c_brcmstb_waketmr_probe.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @GFP_KERNEL = common local_unnamed_addr global i32 0, align 4 @ENOMEM = common local_unnamed_addr global i32 0, align 4 @IORESOURCE_MEM = common local_unnamed_addr global i32 0, align 4 @ENODEV = common local_unnamed_addr global i32 0, align 4 @BRCMSTB_WKTMR_DEFAULT_FREQ = common local_unnamed_addr global ptr null, align 8 @brcmstb_waketmr_irq = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [18 x i8] c"brcmstb-waketimer\00", align 1 @brcmstb_waketmr_reboot = common local_unnamed_addr global i32 0, align 4 @brcmstb_waketmr_ops = common global i32 0, align 4 @U32_MAX = common local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [25 x i8] c"registered, with irq %d\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @brcmstb_waketmr_probe], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @brcmstb_waketmr_probe(ptr noundef %0) #0 { %2 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6 %3 = tail call ptr @devm_kzalloc(ptr noundef %0, i32 noundef 56, i32 noundef %2) #2 %4 = icmp eq ptr %3, null br i1 %4, label %5, label %8 5: ; preds = %1 %6 = load i32, ptr @ENOMEM, align 4, !tbaa !6 %7 = sub nsw i32 0, %6 br label %80 8: ; preds = %1 %9 = tail call i32 @platform_set_drvdata(ptr noundef %0, ptr noundef nonnull %3) #2 %10 = getelementptr inbounds i8, ptr %3, i64 48 store ptr %0, ptr %10, align 8, !tbaa !10 %11 = load i32, ptr @IORESOURCE_MEM, align 4, !tbaa !6 %12 = tail call ptr @platform_get_resource(ptr noundef %0, i32 noundef %11, i32 noundef 0) #2 %13 = tail call ptr @devm_ioremap_resource(ptr noundef %0, ptr noundef %12) #2 %14 = getelementptr inbounds i8, ptr %3, i64 40 store ptr %13, ptr %14, align 8, !tbaa !15 %15 = tail call i64 @IS_ERR(ptr noundef %13) #2 %16 = icmp eq i64 %15, 0 br i1 %16, label %20, label %17 17: ; preds = %8 %18 = load ptr, ptr %14, align 8, !tbaa !15 %19 = tail call i32 @PTR_ERR(ptr noundef %18) #2 br label %80 20: ; preds = %8 %21 = tail call ptr @devm_rtc_allocate_device(ptr noundef %0) #2 %22 = getelementptr inbounds i8, ptr %3, i64 24 store ptr %21, ptr %22, align 8, !tbaa !16 %23 = tail call i64 @IS_ERR(ptr noundef %21) #2 %24 = icmp eq i64 %23, 0 br i1 %24, label %28, label %25 25: ; preds = %20 %26 = load ptr, ptr %22, align 8, !tbaa !16 %27 = tail call i32 @PTR_ERR(ptr noundef %26) #2 br label %80 28: ; preds = %20 %29 = tail call i32 @device_set_wakeup_capable(ptr noundef %0, i32 noundef 1) #2 %30 = tail call i32 @device_wakeup_enable(ptr noundef %0) #2 %31 = tail call i64 @platform_get_irq(ptr noundef %0, i32 noundef 0) #2 store i64 %31, ptr %3, align 8, !tbaa !17 %32 = icmp slt i64 %31, 0 br i1 %32, label %33, label %36 33: ; preds = %28 %34 = load i32, ptr @ENODEV, align 4, !tbaa !6 %35 = sub nsw i32 0, %34 br label %80 36: ; preds = %28 %37 = tail call ptr @devm_clk_get(ptr noundef %0, ptr noundef null) #2 %38 = getelementptr inbounds i8, ptr %3, i64 8 store ptr %37, ptr %38, align 8, !tbaa !18 %39 = tail call i64 @IS_ERR(ptr noundef %37) #2 %40 = icmp eq i64 %39, 0 br i1 %40, label %41, label %52 41: ; preds = %36 %42 = load ptr, ptr %38, align 8, !tbaa !18 %43 = tail call i32 @clk_prepare_enable(ptr noundef %42) #2 %44 = icmp eq i32 %43, 0 br i1 %44, label %45, label %80 45: ; preds = %41 %46 = load ptr, ptr %38, align 8, !tbaa !18 %47 = tail call ptr @clk_get_rate(ptr noundef %46) #2 %48 = getelementptr inbounds i8, ptr %3, i64 32 store ptr %47, ptr %48, align 8, !tbaa !19 %49 = icmp eq ptr %47, null br i1 %49, label %50, label %55 50: ; preds = %45 %51 = load ptr, ptr @BRCMSTB_WKTMR_DEFAULT_FREQ, align 8, !tbaa !20 store ptr %51, ptr %48, align 8, !tbaa !19 br label %55 52: ; preds = %36 %53 = load ptr, ptr @BRCMSTB_WKTMR_DEFAULT_FREQ, align 8, !tbaa !20 %54 = getelementptr inbounds i8, ptr %3, i64 32 store ptr %53, ptr %54, align 8, !tbaa !19 store ptr null, ptr %38, align 8, !tbaa !18 br label %55 55: ; preds = %45, %50, %52 %56 = load i64, ptr %3, align 8, !tbaa !17 %57 = load i32, ptr @brcmstb_waketmr_irq, align 4, !tbaa !6 %58 = tail call i32 @devm_request_irq(ptr noundef %0, i64 noundef %56, i32 noundef %57, i32 noundef 0, ptr noundef nonnull @.str, ptr noundef nonnull %3) #2 %59 = icmp slt i32 %58, 0 br i1 %59, label %74, label %60 60: ; preds = %55 %61 = load i32, ptr @brcmstb_waketmr_reboot, align 4, !tbaa !6 %62 = getelementptr inbounds i8, ptr %3, i64 16 store i32 %61, ptr %62, align 8, !tbaa !21 %63 = tail call i32 @register_reboot_notifier(ptr noundef nonnull %62) #2 %64 = load ptr, ptr %22, align 8, !tbaa !16 %65 = getelementptr inbounds i8, ptr %64, i64 8 store ptr @brcmstb_waketmr_ops, ptr %65, align 8, !tbaa !22 %66 = load i32, ptr @U32_MAX, align 4, !tbaa !6 store i32 %66, ptr %64, align 8, !tbaa !24 %67 = tail call i32 @rtc_register_device(ptr noundef nonnull %64) #2 %68 = icmp eq i32 %67, 0 br i1 %68, label %69, label %72 69: ; preds = %60 %70 = load i64, ptr %3, align 8, !tbaa !17 %71 = tail call i32 @dev_info(ptr noundef %0, ptr noundef nonnull @.str.1, i64 noundef %70) #2 br label %80 72: ; preds = %60 %73 = tail call i32 @unregister_reboot_notifier(ptr noundef nonnull %62) #2 br label %74 74: ; preds = %55, %72 %75 = phi i32 [ %58, %55 ], [ %67, %72 ] %76 = load ptr, ptr %38, align 8, !tbaa !18 %77 = icmp eq ptr %76, null br i1 %77, label %80, label %78 78: ; preds = %74 %79 = tail call i32 @clk_disable_unprepare(ptr noundef nonnull %76) #2 br label %80 80: ; preds = %74, %78, %41, %69, %33, %25, %17, %5 %81 = phi i32 [ %19, %17 ], [ %27, %25 ], [ %35, %33 ], [ 0, %69 ], [ %7, %5 ], [ %43, %41 ], [ %75, %78 ], [ %75, %74 ] ret i32 %81 } declare ptr @devm_kzalloc(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @platform_set_drvdata(ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @platform_get_resource(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare ptr @devm_ioremap_resource(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1 declare ptr @devm_rtc_allocate_device(ptr noundef) local_unnamed_addr #1 declare i32 @device_set_wakeup_capable(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @device_wakeup_enable(ptr noundef) local_unnamed_addr #1 declare i64 @platform_get_irq(ptr noundef, i32 noundef) local_unnamed_addr #1 declare ptr @devm_clk_get(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @clk_prepare_enable(ptr noundef) local_unnamed_addr #1 declare ptr @clk_get_rate(ptr noundef) local_unnamed_addr #1 declare i32 @devm_request_irq(ptr noundef, i64 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @register_reboot_notifier(ptr noundef) local_unnamed_addr #1 declare i32 @rtc_register_device(ptr noundef) local_unnamed_addr #1 declare i32 @dev_info(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @unregister_reboot_notifier(ptr noundef) local_unnamed_addr #1 declare i32 @clk_disable_unprepare(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !13, i64 48} !11 = !{!"brcmstb_waketmr", !12, i64 0, !13, i64 8, !14, i64 16, !13, i64 24, !13, i64 32, !13, i64 40, !13, i64 48} !12 = !{!"long", !8, i64 0} !13 = !{!"any pointer", !8, i64 0} !14 = !{!"TYPE_12__", !7, i64 0} !15 = !{!11, !13, i64 40} !16 = !{!11, !13, i64 24} !17 = !{!11, !12, i64 0} !18 = !{!11, !13, i64 8} !19 = !{!11, !13, i64 32} !20 = !{!13, !13, i64 0} !21 = !{!11, !7, i64 16} !22 = !{!23, !13, i64 8} !23 = !{!"TYPE_13__", !7, i64 0, !13, i64 8} !24 = !{!23, !7, i64 0}
linux_drivers_rtc_extr_rtc-brcmstb-waketimer.c_brcmstb_waketmr_probe
; ModuleID = 'AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_socket_tcp.c_ngx_http_lua_socket_tcp_write_resume.c' source_filename = "AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_socket_tcp.c_ngx_http_lua_socket_tcp_write_resume.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @SOCKET_OP_WRITE = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ngx_http_lua_socket_tcp_write_resume], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @ngx_http_lua_socket_tcp_write_resume(ptr noundef %0) #0 { %2 = load i32, ptr @SOCKET_OP_WRITE, align 4, !tbaa !5 %3 = tail call i32 @ngx_http_lua_socket_tcp_resume_helper(ptr noundef %0, i32 noundef %2) #2 ret i32 %3 } declare i32 @ngx_http_lua_socket_tcp_resume_helper(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_socket_tcp.c_ngx_http_lua_socket_tcp_write_resume.c' source_filename = "AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_socket_tcp.c_ngx_http_lua_socket_tcp_write_resume.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SOCKET_OP_WRITE = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ngx_http_lua_socket_tcp_write_resume], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @ngx_http_lua_socket_tcp_write_resume(ptr noundef %0) #0 { %2 = load i32, ptr @SOCKET_OP_WRITE, align 4, !tbaa !6 %3 = tail call i32 @ngx_http_lua_socket_tcp_resume_helper(ptr noundef %0, i32 noundef %2) #2 ret i32 %3 } declare i32 @ngx_http_lua_socket_tcp_resume_helper(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
tengine_modules_ngx_http_lua_module_src_extr_ngx_http_lua_socket_tcp.c_ngx_http_lua_socket_tcp_write_resume
; ModuleID = 'AnghaBench/linux/drivers/staging/kpc2000/extr_kpc2000_i2c.c_i801_block_transaction_byte_by_byte.c' source_filename = "AnghaBench/linux/drivers/staging/kpc2000/extr_kpc2000_i2c.c_i801_block_transaction_byte_by_byte.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @I2C_SMBUS_WRITE = dso_local local_unnamed_addr global i8 0, align 1 @I2C_SMBUS_READ = dso_local local_unnamed_addr global i8 0, align 1 @I2C_SMBUS_I2C_BLOCK_DATA = dso_local local_unnamed_addr global i32 0, align 4 @I801_I2C_BLOCK_LAST = dso_local local_unnamed_addr global i32 0, align 4 @I801_BLOCK_LAST = dso_local local_unnamed_addr global i32 0, align 4 @I801_I2C_BLOCK_DATA = dso_local local_unnamed_addr global i32 0, align 4 @I801_BLOCK_DATA = dso_local local_unnamed_addr global i32 0, align 4 @ENABLE_INT9 = dso_local local_unnamed_addr global i32 0, align 4 @I801_START = dso_local local_unnamed_addr global i32 0, align 4 @SMBHSTSTS_BYTE_DONE = dso_local local_unnamed_addr global i32 0, align 4 @MAX_RETRIES = dso_local local_unnamed_addr global i32 0, align 4 @I2C_SMBUS_BLOCK_MAX = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [34 x i8] c"Illegal SMBus block read size %d\0A\00", align 1 @SMBHSTSTS_HOST_BUSY = dso_local local_unnamed_addr global i32 0, align 4 @SMBHSTSTS_INTR = dso_local local_unnamed_addr global i32 0, align 4 @EPROTO = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @i801_block_transaction_byte_by_byte], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @i801_block_transaction_byte_by_byte(ptr noundef %0, ptr nocapture noundef readonly %1, i8 noundef signext %2, i32 noundef %3, i32 %4) #0 { %6 = tail call i32 @i801_check_pre(ptr noundef %0) #2 %7 = icmp slt i32 %6, 0 br i1 %7, label %140, label %8 8: ; preds = %5 %9 = load ptr, ptr %1, align 8, !tbaa !5 %10 = load i32, ptr %9, align 4, !tbaa !8 %11 = load i8, ptr @I2C_SMBUS_WRITE, align 1, !tbaa !5 %12 = icmp eq i8 %11, %2 br i1 %12, label %13, label %21 13: ; preds = %8 %14 = tail call i32 @SMBHSTDAT0(ptr noundef %0) #2 %15 = tail call i32 @outb_p(i32 noundef %10, i32 noundef %14) #2 %16 = load ptr, ptr %1, align 8, !tbaa !5 %17 = getelementptr inbounds i32, ptr %16, i64 1 %18 = load i32, ptr %17, align 4, !tbaa !8 %19 = tail call i32 @SMBBLKDAT(ptr noundef %0) #2 %20 = tail call i32 @outb_p(i32 noundef %18, i32 noundef %19) #2 br label %21 21: ; preds = %13, %8 %22 = icmp slt i32 %10, 1 br i1 %22, label %140, label %23 23: ; preds = %21, %133 %24 = phi i64 [ %139, %133 ], [ 1, %21 ] %25 = phi i32 [ %113, %133 ], [ %10, %21 ] %26 = zext i32 %25 to i64 %27 = icmp eq i64 %24, %26 %28 = load i8, ptr @I2C_SMBUS_READ, align 1 %29 = icmp eq i8 %28, %2 %30 = select i1 %27, i1 %29, i1 false %31 = load i32, ptr @I2C_SMBUS_I2C_BLOCK_DATA, align 4, !tbaa !8 %32 = icmp eq i32 %31, %3 %33 = select i1 %32, i1 %29, i1 false %34 = load i32, ptr @I801_I2C_BLOCK_LAST, align 4 %35 = load i32, ptr @I801_BLOCK_LAST, align 4 %36 = select i1 %32, i32 %34, i32 %35 %37 = load i32, ptr @I801_I2C_BLOCK_DATA, align 4 %38 = load i32, ptr @I801_BLOCK_DATA, align 4 %39 = select i1 %33, i32 %37, i32 %38 %40 = select i1 %30, i32 %36, i32 %39 %41 = load i32, ptr @ENABLE_INT9, align 4, !tbaa !8 %42 = or i32 %41, %40 %43 = tail call i32 @SMBHSTCNT(ptr noundef %0) #2 %44 = tail call i32 @outb_p(i32 noundef %42, i32 noundef %43) #2 %45 = icmp ne i64 %24, 1 br i1 %45, label %53, label %46 46: ; preds = %23 %47 = tail call i32 @SMBHSTCNT(ptr noundef %0) #2 %48 = tail call i32 @inb(i32 noundef %47) #2 %49 = load i32, ptr @I801_START, align 4, !tbaa !8 %50 = or i32 %49, %48 %51 = tail call i32 @SMBHSTCNT(ptr noundef %0) #2 %52 = tail call i32 @outb_p(i32 noundef %50, i32 noundef %51) #2 br label %53 53: ; preds = %46, %23 br label %54 54: ; preds = %53, %63 %55 = phi i32 [ %64, %63 ], [ 0, %53 ] %56 = tail call i32 @usleep_range(i32 noundef 250, i32 noundef 500) #2 %57 = tail call i32 @SMBHSTSTS(ptr noundef %0) #2 %58 = tail call i32 @inb_p(i32 noundef %57) #2 %59 = load i32, ptr @SMBHSTSTS_BYTE_DONE, align 4, !tbaa !8 %60 = and i32 %59, %58 %61 = icmp eq i32 %60, 0 %62 = load i32, ptr @MAX_RETRIES, align 4, !tbaa !8 br i1 %61, label %63, label %66 63: ; preds = %54 %64 = add nuw nsw i32 %55, 1 %65 = icmp slt i32 %55, %62 br i1 %65, label %54, label %66, !llvm.loop !10 66: ; preds = %54, %63 %67 = phi i32 [ %55, %54 ], [ %64, %63 ] %68 = icmp sgt i32 %67, %62 %69 = zext i1 %68 to i32 %70 = tail call i32 @i801_check_post(ptr noundef %0, i32 noundef %58, i32 noundef %69) #2 %71 = icmp slt i32 %70, 0 br i1 %71, label %140, label %72 72: ; preds = %66 %73 = load i8, ptr @I2C_SMBUS_READ, align 1 %74 = icmp ne i8 %73, %2 %75 = select i1 %45, i1 true, i1 %74 %76 = load i32, ptr @I2C_SMBUS_I2C_BLOCK_DATA, align 4 %77 = icmp eq i32 %76, %3 %78 = select i1 %75, i1 true, i1 %77 br i1 %78, label %111, label %79 79: ; preds = %72 %80 = tail call i32 @SMBHSTDAT0(ptr noundef %0) #2 %81 = tail call i32 @inb_p(i32 noundef %80) #2 %82 = icmp slt i32 %81, 1 %83 = load i32, ptr @I2C_SMBUS_BLOCK_MAX, align 4 %84 = icmp sgt i32 %81, %83 %85 = select i1 %82, i1 true, i1 %84 br i1 %85, label %86, label %108 86: ; preds = %79 %87 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %81) #2 %88 = tail call i32 @SMBHSTSTS(ptr noundef %0) #2 %89 = tail call i32 @inb_p(i32 noundef %88) #2 %90 = load i32, ptr @SMBHSTSTS_HOST_BUSY, align 4, !tbaa !8 %91 = and i32 %90, %89 %92 = icmp eq i32 %91, 0 br i1 %92, label %102, label %93 93: ; preds = %86, %93 %94 = load i32, ptr @SMBHSTSTS_BYTE_DONE, align 4, !tbaa !8 %95 = tail call i32 @SMBHSTSTS(ptr noundef %0) #2 %96 = tail call i32 @outb_p(i32 noundef %94, i32 noundef %95) #2 %97 = tail call i32 @SMBHSTSTS(ptr noundef %0) #2 %98 = tail call i32 @inb_p(i32 noundef %97) #2 %99 = load i32, ptr @SMBHSTSTS_HOST_BUSY, align 4, !tbaa !8 %100 = and i32 %99, %98 %101 = icmp eq i32 %100, 0 br i1 %101, label %102, label %93, !llvm.loop !12 102: ; preds = %93, %86 %103 = load i32, ptr @SMBHSTSTS_INTR, align 4, !tbaa !8 %104 = tail call i32 @SMBHSTSTS(ptr noundef %0) #2 %105 = tail call i32 @outb_p(i32 noundef %103, i32 noundef %104) #2 %106 = load i32, ptr @EPROTO, align 4, !tbaa !8 %107 = sub nsw i32 0, %106 br label %140 108: ; preds = %79 %109 = load ptr, ptr %1, align 8, !tbaa !5 store i32 %81, ptr %109, align 4, !tbaa !8 %110 = load i8, ptr @I2C_SMBUS_READ, align 1, !tbaa !5 br label %111 111: ; preds = %108, %72 %112 = phi i8 [ %110, %108 ], [ %73, %72 ] %113 = phi i32 [ %81, %108 ], [ %25, %72 ] %114 = icmp eq i8 %112, %2 br i1 %114, label %115, label %120 115: ; preds = %111 %116 = tail call i32 @SMBBLKDAT(ptr noundef %0) #2 %117 = tail call i32 @inb_p(i32 noundef %116) #2 %118 = load ptr, ptr %1, align 8, !tbaa !5 %119 = getelementptr inbounds i32, ptr %118, i64 %24 store i32 %117, ptr %119, align 4, !tbaa !8 br label %120 120: ; preds = %115, %111 %121 = load i8, ptr @I2C_SMBUS_WRITE, align 1, !tbaa !5 %122 = icmp eq i8 %121, %2 %123 = sext i32 %113 to i64 %124 = icmp slt i64 %24, %123 %125 = and i1 %124, %122 br i1 %125, label %126, label %133 126: ; preds = %120 %127 = load ptr, ptr %1, align 8, !tbaa !5 %128 = getelementptr i32, ptr %127, i64 %24 %129 = getelementptr i32, ptr %128, i64 1 %130 = load i32, ptr %129, align 4, !tbaa !8 %131 = tail call i32 @SMBBLKDAT(ptr noundef %0) #2 %132 = tail call i32 @outb_p(i32 noundef %130, i32 noundef %131) #2 br label %133 133: ; preds = %126, %120 %134 = load i32, ptr @SMBHSTSTS_BYTE_DONE, align 4, !tbaa !8 %135 = load i32, ptr @SMBHSTSTS_INTR, align 4, !tbaa !8 %136 = or i32 %135, %134 %137 = tail call i32 @SMBHSTSTS(ptr noundef %0) #2 %138 = tail call i32 @outb_p(i32 noundef %136, i32 noundef %137) #2 %139 = add nuw nsw i64 %24, 1 br i1 %124, label %23, label %140, !llvm.loop !13 140: ; preds = %66, %133, %21, %5, %102 %141 = phi i32 [ %107, %102 ], [ %6, %5 ], [ 0, %21 ], [ %70, %66 ], [ 0, %133 ] ret i32 %141 } declare i32 @i801_check_pre(ptr noundef) local_unnamed_addr #1 declare i32 @outb_p(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @SMBHSTDAT0(ptr noundef) local_unnamed_addr #1 declare i32 @SMBBLKDAT(ptr noundef) local_unnamed_addr #1 declare i32 @SMBHSTCNT(ptr noundef) local_unnamed_addr #1 declare i32 @inb(i32 noundef) local_unnamed_addr #1 declare i32 @usleep_range(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @inb_p(i32 noundef) local_unnamed_addr #1 declare i32 @SMBHSTSTS(ptr noundef) local_unnamed_addr #1 declare i32 @i801_check_post(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dev_err(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"omnipotent char", !7, i64 0} !7 = !{!"Simple C/C++ TBAA"} !8 = !{!9, !9, i64 0} !9 = !{!"int", !6, i64 0} !10 = distinct !{!10, !11} !11 = !{!"llvm.loop.mustprogress"} !12 = distinct !{!12, !11} !13 = distinct !{!13, !11}
; ModuleID = 'AnghaBench/linux/drivers/staging/kpc2000/extr_kpc2000_i2c.c_i801_block_transaction_byte_by_byte.c' source_filename = "AnghaBench/linux/drivers/staging/kpc2000/extr_kpc2000_i2c.c_i801_block_transaction_byte_by_byte.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @I2C_SMBUS_WRITE = common local_unnamed_addr global i8 0, align 1 @I2C_SMBUS_READ = common local_unnamed_addr global i8 0, align 1 @I2C_SMBUS_I2C_BLOCK_DATA = common local_unnamed_addr global i32 0, align 4 @I801_I2C_BLOCK_LAST = common local_unnamed_addr global i32 0, align 4 @I801_BLOCK_LAST = common local_unnamed_addr global i32 0, align 4 @I801_I2C_BLOCK_DATA = common local_unnamed_addr global i32 0, align 4 @I801_BLOCK_DATA = common local_unnamed_addr global i32 0, align 4 @ENABLE_INT9 = common local_unnamed_addr global i32 0, align 4 @I801_START = common local_unnamed_addr global i32 0, align 4 @SMBHSTSTS_BYTE_DONE = common local_unnamed_addr global i32 0, align 4 @MAX_RETRIES = common local_unnamed_addr global i32 0, align 4 @I2C_SMBUS_BLOCK_MAX = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [34 x i8] c"Illegal SMBus block read size %d\0A\00", align 1 @SMBHSTSTS_HOST_BUSY = common local_unnamed_addr global i32 0, align 4 @SMBHSTSTS_INTR = common local_unnamed_addr global i32 0, align 4 @EPROTO = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @i801_block_transaction_byte_by_byte], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @i801_block_transaction_byte_by_byte(ptr noundef %0, ptr nocapture noundef readonly %1, i8 noundef signext %2, i32 noundef %3, i32 %4) #0 { %6 = tail call i32 @i801_check_pre(ptr noundef %0) #2 %7 = icmp slt i32 %6, 0 br i1 %7, label %140, label %8 8: ; preds = %5 %9 = load ptr, ptr %1, align 8, !tbaa !6 %10 = load i32, ptr %9, align 4, !tbaa !9 %11 = load i8, ptr @I2C_SMBUS_WRITE, align 1, !tbaa !6 %12 = icmp eq i8 %11, %2 br i1 %12, label %13, label %21 13: ; preds = %8 %14 = tail call i32 @SMBHSTDAT0(ptr noundef %0) #2 %15 = tail call i32 @outb_p(i32 noundef %10, i32 noundef %14) #2 %16 = load ptr, ptr %1, align 8, !tbaa !6 %17 = getelementptr inbounds i8, ptr %16, i64 4 %18 = load i32, ptr %17, align 4, !tbaa !9 %19 = tail call i32 @SMBBLKDAT(ptr noundef %0) #2 %20 = tail call i32 @outb_p(i32 noundef %18, i32 noundef %19) #2 br label %21 21: ; preds = %13, %8 %22 = icmp slt i32 %10, 1 br i1 %22, label %140, label %23 23: ; preds = %21, %133 %24 = phi i64 [ %139, %133 ], [ 1, %21 ] %25 = phi i32 [ %113, %133 ], [ %10, %21 ] %26 = zext i32 %25 to i64 %27 = icmp eq i64 %24, %26 %28 = load i8, ptr @I2C_SMBUS_READ, align 1 %29 = icmp eq i8 %28, %2 %30 = select i1 %27, i1 %29, i1 false %31 = load i32, ptr @I2C_SMBUS_I2C_BLOCK_DATA, align 4, !tbaa !9 %32 = icmp eq i32 %31, %3 %33 = select i1 %32, i1 %29, i1 false %34 = load i32, ptr @I801_I2C_BLOCK_LAST, align 4 %35 = load i32, ptr @I801_BLOCK_LAST, align 4 %36 = select i1 %32, i32 %34, i32 %35 %37 = load i32, ptr @I801_I2C_BLOCK_DATA, align 4 %38 = load i32, ptr @I801_BLOCK_DATA, align 4 %39 = select i1 %33, i32 %37, i32 %38 %40 = select i1 %30, i32 %36, i32 %39 %41 = load i32, ptr @ENABLE_INT9, align 4, !tbaa !9 %42 = or i32 %41, %40 %43 = tail call i32 @SMBHSTCNT(ptr noundef %0) #2 %44 = tail call i32 @outb_p(i32 noundef %42, i32 noundef %43) #2 %45 = icmp ne i64 %24, 1 br i1 %45, label %53, label %46 46: ; preds = %23 %47 = tail call i32 @SMBHSTCNT(ptr noundef %0) #2 %48 = tail call i32 @inb(i32 noundef %47) #2 %49 = load i32, ptr @I801_START, align 4, !tbaa !9 %50 = or i32 %49, %48 %51 = tail call i32 @SMBHSTCNT(ptr noundef %0) #2 %52 = tail call i32 @outb_p(i32 noundef %50, i32 noundef %51) #2 br label %53 53: ; preds = %46, %23 br label %54 54: ; preds = %53, %63 %55 = phi i32 [ %64, %63 ], [ 0, %53 ] %56 = tail call i32 @usleep_range(i32 noundef 250, i32 noundef 500) #2 %57 = tail call i32 @SMBHSTSTS(ptr noundef %0) #2 %58 = tail call i32 @inb_p(i32 noundef %57) #2 %59 = load i32, ptr @SMBHSTSTS_BYTE_DONE, align 4, !tbaa !9 %60 = and i32 %59, %58 %61 = icmp eq i32 %60, 0 %62 = load i32, ptr @MAX_RETRIES, align 4, !tbaa !9 br i1 %61, label %63, label %66 63: ; preds = %54 %64 = add nuw nsw i32 %55, 1 %65 = icmp slt i32 %55, %62 br i1 %65, label %54, label %66, !llvm.loop !11 66: ; preds = %54, %63 %67 = phi i32 [ %55, %54 ], [ %64, %63 ] %68 = icmp sgt i32 %67, %62 %69 = zext i1 %68 to i32 %70 = tail call i32 @i801_check_post(ptr noundef %0, i32 noundef %58, i32 noundef %69) #2 %71 = icmp slt i32 %70, 0 br i1 %71, label %140, label %72 72: ; preds = %66 %73 = load i8, ptr @I2C_SMBUS_READ, align 1 %74 = icmp ne i8 %73, %2 %75 = select i1 %45, i1 true, i1 %74 %76 = load i32, ptr @I2C_SMBUS_I2C_BLOCK_DATA, align 4 %77 = icmp eq i32 %76, %3 %78 = select i1 %75, i1 true, i1 %77 br i1 %78, label %111, label %79 79: ; preds = %72 %80 = tail call i32 @SMBHSTDAT0(ptr noundef %0) #2 %81 = tail call i32 @inb_p(i32 noundef %80) #2 %82 = icmp slt i32 %81, 1 %83 = load i32, ptr @I2C_SMBUS_BLOCK_MAX, align 4 %84 = icmp sgt i32 %81, %83 %85 = select i1 %82, i1 true, i1 %84 br i1 %85, label %86, label %108 86: ; preds = %79 %87 = tail call i32 @dev_err(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %81) #2 %88 = tail call i32 @SMBHSTSTS(ptr noundef %0) #2 %89 = tail call i32 @inb_p(i32 noundef %88) #2 %90 = load i32, ptr @SMBHSTSTS_HOST_BUSY, align 4, !tbaa !9 %91 = and i32 %90, %89 %92 = icmp eq i32 %91, 0 br i1 %92, label %102, label %93 93: ; preds = %86, %93 %94 = load i32, ptr @SMBHSTSTS_BYTE_DONE, align 4, !tbaa !9 %95 = tail call i32 @SMBHSTSTS(ptr noundef %0) #2 %96 = tail call i32 @outb_p(i32 noundef %94, i32 noundef %95) #2 %97 = tail call i32 @SMBHSTSTS(ptr noundef %0) #2 %98 = tail call i32 @inb_p(i32 noundef %97) #2 %99 = load i32, ptr @SMBHSTSTS_HOST_BUSY, align 4, !tbaa !9 %100 = and i32 %99, %98 %101 = icmp eq i32 %100, 0 br i1 %101, label %102, label %93, !llvm.loop !13 102: ; preds = %93, %86 %103 = load i32, ptr @SMBHSTSTS_INTR, align 4, !tbaa !9 %104 = tail call i32 @SMBHSTSTS(ptr noundef %0) #2 %105 = tail call i32 @outb_p(i32 noundef %103, i32 noundef %104) #2 %106 = load i32, ptr @EPROTO, align 4, !tbaa !9 %107 = sub nsw i32 0, %106 br label %140 108: ; preds = %79 %109 = load ptr, ptr %1, align 8, !tbaa !6 store i32 %81, ptr %109, align 4, !tbaa !9 %110 = load i8, ptr @I2C_SMBUS_READ, align 1, !tbaa !6 br label %111 111: ; preds = %108, %72 %112 = phi i8 [ %110, %108 ], [ %73, %72 ] %113 = phi i32 [ %81, %108 ], [ %25, %72 ] %114 = icmp eq i8 %112, %2 br i1 %114, label %115, label %120 115: ; preds = %111 %116 = tail call i32 @SMBBLKDAT(ptr noundef %0) #2 %117 = tail call i32 @inb_p(i32 noundef %116) #2 %118 = load ptr, ptr %1, align 8, !tbaa !6 %119 = getelementptr inbounds i32, ptr %118, i64 %24 store i32 %117, ptr %119, align 4, !tbaa !9 br label %120 120: ; preds = %115, %111 %121 = load i8, ptr @I2C_SMBUS_WRITE, align 1, !tbaa !6 %122 = icmp eq i8 %121, %2 %123 = sext i32 %113 to i64 %124 = icmp slt i64 %24, %123 %125 = and i1 %124, %122 br i1 %125, label %126, label %133 126: ; preds = %120 %127 = load ptr, ptr %1, align 8, !tbaa !6 %128 = getelementptr inbounds i32, ptr %127, i64 %24 %129 = getelementptr inbounds i8, ptr %128, i64 4 %130 = load i32, ptr %129, align 4, !tbaa !9 %131 = tail call i32 @SMBBLKDAT(ptr noundef %0) #2 %132 = tail call i32 @outb_p(i32 noundef %130, i32 noundef %131) #2 br label %133 133: ; preds = %126, %120 %134 = load i32, ptr @SMBHSTSTS_BYTE_DONE, align 4, !tbaa !9 %135 = load i32, ptr @SMBHSTSTS_INTR, align 4, !tbaa !9 %136 = or i32 %135, %134 %137 = tail call i32 @SMBHSTSTS(ptr noundef %0) #2 %138 = tail call i32 @outb_p(i32 noundef %136, i32 noundef %137) #2 %139 = add nuw nsw i64 %24, 1 br i1 %124, label %23, label %140, !llvm.loop !14 140: ; preds = %66, %133, %21, %5, %102 %141 = phi i32 [ %107, %102 ], [ %6, %5 ], [ 0, %21 ], [ %70, %66 ], [ 0, %133 ] ret i32 %141 } declare i32 @i801_check_pre(ptr noundef) local_unnamed_addr #1 declare i32 @outb_p(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @SMBHSTDAT0(ptr noundef) local_unnamed_addr #1 declare i32 @SMBBLKDAT(ptr noundef) local_unnamed_addr #1 declare i32 @SMBHSTCNT(ptr noundef) local_unnamed_addr #1 declare i32 @inb(i32 noundef) local_unnamed_addr #1 declare i32 @usleep_range(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @inb_p(i32 noundef) local_unnamed_addr #1 declare i32 @SMBHSTSTS(ptr noundef) local_unnamed_addr #1 declare i32 @i801_check_post(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dev_err(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"int", !7, i64 0} !11 = distinct !{!11, !12} !12 = !{!"llvm.loop.mustprogress"} !13 = distinct !{!13, !12} !14 = distinct !{!14, !12}
linux_drivers_staging_kpc2000_extr_kpc2000_i2c.c_i801_block_transaction_byte_by_byte
; ModuleID = 'AnghaBench/linux/drivers/parisc/extr_lba_pci.c_lba_device_present.c' source_filename = "AnghaBench/linux/drivers/parisc/extr_lba_pci.c_lba_device_present.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_4__ = type { i64, i64 } @LBA_MAX_NUM_BUSES = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @lba_device_present], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable define internal i32 @lba_device_present(i64 noundef %0, i64 %1, ptr nocapture noundef readonly %2) #0 { %4 = load ptr, ptr %2, align 8, !tbaa !5 %5 = load i64, ptr %4, align 8, !tbaa !11 %6 = icmp sgt i64 %5, %0 br i1 %6, label %16, label %7 7: ; preds = %3 %8 = getelementptr inbounds %struct.TYPE_4__, ptr %4, i64 0, i32 1 %9 = load i64, ptr %8, align 8, !tbaa !15 %10 = icmp slt i64 %9, %0 br i1 %10, label %16, label %11 11: ; preds = %7 %12 = sub nsw i64 %0, %5 %13 = load i64, ptr @LBA_MAX_NUM_BUSES, align 8, !tbaa !16 %14 = icmp slt i64 %12, %13 %15 = zext i1 %14 to i32 br label %16 16: ; preds = %11, %3, %7 %17 = phi i32 [ 0, %7 ], [ 0, %3 ], [ %15, %11 ] ret i32 %17 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !8, i64 0} !6 = !{!"lba_device", !7, i64 0} !7 = !{!"TYPE_6__", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !14, i64 0} !12 = !{!"TYPE_5__", !13, i64 0} !13 = !{!"TYPE_4__", !14, i64 0, !14, i64 8} !14 = !{!"long", !9, i64 0} !15 = !{!12, !14, i64 8} !16 = !{!14, !14, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/parisc/extr_lba_pci.c_lba_device_present.c' source_filename = "AnghaBench/linux/drivers/parisc/extr_lba_pci.c_lba_device_present.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @LBA_MAX_NUM_BUSES = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @lba_device_present], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) define internal range(i32 0, 2) i32 @lba_device_present(i64 noundef %0, i64 %1, ptr nocapture noundef readonly %2) #0 { %4 = load ptr, ptr %2, align 8, !tbaa !6 %5 = load i64, ptr %4, align 8, !tbaa !12 %6 = icmp sgt i64 %5, %0 br i1 %6, label %16, label %7 7: ; preds = %3 %8 = getelementptr inbounds i8, ptr %4, i64 8 %9 = load i64, ptr %8, align 8, !tbaa !16 %10 = icmp slt i64 %9, %0 br i1 %10, label %16, label %11 11: ; preds = %7 %12 = sub nsw i64 %0, %5 %13 = load i64, ptr @LBA_MAX_NUM_BUSES, align 8, !tbaa !17 %14 = icmp slt i64 %12, %13 %15 = zext i1 %14 to i32 br label %16 16: ; preds = %11, %3, %7 %17 = phi i32 [ 0, %7 ], [ 0, %3 ], [ %15, %11 ] ret i32 %17 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !9, i64 0} !7 = !{!"lba_device", !8, i64 0} !8 = !{!"TYPE_6__", !9, i64 0} !9 = !{!"any pointer", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"} !12 = !{!13, !15, i64 0} !13 = !{!"TYPE_5__", !14, i64 0} !14 = !{!"TYPE_4__", !15, i64 0, !15, i64 8} !15 = !{!"long", !10, i64 0} !16 = !{!13, !15, i64 8} !17 = !{!15, !15, i64 0}
linux_drivers_parisc_extr_lba_pci.c_lba_device_present
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/mmc/host/extr_sdhci.c_sdhci_set_ios.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/mmc/host/extr_sdhci.c_sdhci_set_ios.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.sdhci_host = type { i32, i64, i32, i32, i32 } %struct.mmc_ios = type { i64, i32, i32, i64, i64, i64 } @SDHCI_DEVICE_DEAD = dso_local local_unnamed_addr global i32 0, align 4 @MMC_POWER_OFF = dso_local local_unnamed_addr global i64 0, align 8 @SDHCI_SIGNAL_ENABLE = dso_local local_unnamed_addr global i32 0, align 4 @SDHCI_HOST_CONTROL = dso_local local_unnamed_addr global i32 0, align 4 @MMC_BUS_WIDTH_8 = dso_local local_unnamed_addr global i64 0, align 8 @SDHCI_CTRL_8BITBUS = dso_local local_unnamed_addr global i32 0, align 4 @MMC_BUS_WIDTH_4 = dso_local local_unnamed_addr global i64 0, align 8 @SDHCI_CTRL_4BITBUS = dso_local local_unnamed_addr global i32 0, align 4 @MMC_TIMING_SD_HS = dso_local local_unnamed_addr global i64 0, align 8 @SDHCI_CTRL_HISPD = dso_local local_unnamed_addr global i32 0, align 4 @SDHCI_SPEC_300 = dso_local local_unnamed_addr global i64 0, align 8 @MMC_TIMING_UHS_SDR50 = dso_local local_unnamed_addr global i64 0, align 8 @MMC_TIMING_UHS_SDR104 = dso_local local_unnamed_addr global i64 0, align 8 @MMC_TIMING_UHS_DDR50 = dso_local local_unnamed_addr global i64 0, align 8 @MMC_TIMING_UHS_SDR25 = dso_local local_unnamed_addr global i64 0, align 8 @SDHCI_HOST_CONTROL2 = dso_local local_unnamed_addr global i32 0, align 4 @SDHCI_CTRL_PRESET_VAL_ENABLE = dso_local local_unnamed_addr global i32 0, align 4 @SDHCI_CTRL_DRV_TYPE_MASK = dso_local local_unnamed_addr global i32 0, align 4 @MMC_SET_DRIVER_TYPE_A = dso_local local_unnamed_addr global i64 0, align 8 @SDHCI_CTRL_DRV_TYPE_A = dso_local local_unnamed_addr global i32 0, align 4 @MMC_SET_DRIVER_TYPE_C = dso_local local_unnamed_addr global i64 0, align 8 @SDHCI_CTRL_DRV_TYPE_C = dso_local local_unnamed_addr global i32 0, align 4 @SDHCI_CLOCK_CONTROL = dso_local local_unnamed_addr global i32 0, align 4 @SDHCI_CLOCK_CARD_EN = dso_local local_unnamed_addr global i32 0, align 4 @SDHCI_CTRL_UHS_MASK = dso_local local_unnamed_addr global i32 0, align 4 @MMC_TIMING_UHS_SDR12 = dso_local local_unnamed_addr global i64 0, align 8 @SDHCI_CTRL_UHS_SDR12 = dso_local local_unnamed_addr global i32 0, align 4 @SDHCI_CTRL_UHS_SDR25 = dso_local local_unnamed_addr global i32 0, align 4 @SDHCI_CTRL_UHS_SDR50 = dso_local local_unnamed_addr global i32 0, align 4 @SDHCI_CTRL_UHS_SDR104 = dso_local local_unnamed_addr global i32 0, align 4 @SDHCI_CTRL_UHS_DDR50 = dso_local local_unnamed_addr global i32 0, align 4 @SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS = dso_local local_unnamed_addr global i32 0, align 4 @SDHCI_RESET_CMD = dso_local local_unnamed_addr global i32 0, align 4 @SDHCI_RESET_DATA = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @sdhci_set_ios], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @sdhci_set_ios(ptr noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = tail call ptr @mmc_priv(ptr noundef %0) #2 %4 = getelementptr inbounds %struct.sdhci_host, ptr %3, i64 0, i32 4 %5 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %4, i64 noundef undef) #2 %6 = load i32, ptr %3, align 8, !tbaa !5 %7 = load i32, ptr @SDHCI_DEVICE_DEAD, align 4, !tbaa !11 %8 = and i32 %7, %6 %9 = icmp eq i32 %8, 0 br i1 %9, label %10, label %181 10: ; preds = %2 %11 = load i64, ptr %1, align 8, !tbaa !12 %12 = load i64, ptr @MMC_POWER_OFF, align 8, !tbaa !14 %13 = icmp eq i64 %11, %12 br i1 %13, label %14, label %18 14: ; preds = %10 %15 = load i32, ptr @SDHCI_SIGNAL_ENABLE, align 4, !tbaa !11 %16 = tail call i32 @sdhci_writel(ptr noundef nonnull %3, i32 noundef 0, i32 noundef %15) #2 %17 = tail call i32 @sdhci_reinit(ptr noundef nonnull %3) #2 br label %18 18: ; preds = %14, %10 %19 = getelementptr inbounds %struct.mmc_ios, ptr %1, i64 0, i32 1 %20 = load i32, ptr %19, align 8, !tbaa !15 %21 = tail call i32 @sdhci_set_clock(ptr noundef nonnull %3, i32 noundef %20) #2 %22 = load i64, ptr %1, align 8, !tbaa !12 %23 = load i64, ptr @MMC_POWER_OFF, align 8, !tbaa !14 %24 = icmp eq i64 %22, %23 br i1 %24, label %28, label %25 25: ; preds = %18 %26 = getelementptr inbounds %struct.mmc_ios, ptr %1, i64 0, i32 2 %27 = load i32, ptr %26, align 4, !tbaa !16 br label %28 28: ; preds = %18, %25 %29 = phi i32 [ %27, %25 ], [ -1, %18 ] %30 = tail call i32 @sdhci_set_power(ptr noundef nonnull %3, i32 noundef %29) #2 %31 = load i32, ptr @SDHCI_HOST_CONTROL, align 4, !tbaa !11 %32 = tail call i32 @sdhci_readb(ptr noundef nonnull %3, i32 noundef %31) #2 %33 = getelementptr inbounds %struct.mmc_ios, ptr %1, i64 0, i32 3 %34 = load i64, ptr %33, align 8, !tbaa !17 %35 = load i64, ptr @MMC_BUS_WIDTH_8, align 8, !tbaa !14 %36 = icmp eq i64 %34, %35 %37 = load i32, ptr @SDHCI_CTRL_8BITBUS, align 4, !tbaa !11 %38 = or i32 %37, %32 %39 = xor i32 %37, -1 %40 = and i32 %32, %39 %41 = select i1 %36, i32 %38, i32 %40 %42 = load i64, ptr @MMC_BUS_WIDTH_4, align 8, !tbaa !14 %43 = icmp eq i64 %34, %42 %44 = load i32, ptr @SDHCI_CTRL_4BITBUS, align 4, !tbaa !11 %45 = or i32 %44, %41 %46 = xor i32 %44, -1 %47 = and i32 %41, %46 %48 = select i1 %43, i32 %45, i32 %47 %49 = getelementptr inbounds %struct.mmc_ios, ptr %1, i64 0, i32 4 %50 = load i64, ptr %49, align 8, !tbaa !18 %51 = load i64, ptr @MMC_TIMING_SD_HS, align 8, !tbaa !14 %52 = icmp eq i64 %50, %51 %53 = load i32, ptr @SDHCI_CTRL_HISPD, align 4 %54 = or i32 %53, %48 %55 = xor i32 %53, -1 %56 = and i32 %48, %55 %57 = select i1 %52, i32 %54, i32 %56 %58 = getelementptr inbounds %struct.sdhci_host, ptr %3, i64 0, i32 1 %59 = load i64, ptr %58, align 8, !tbaa !19 %60 = load i64, ptr @SDHCI_SPEC_300, align 8, !tbaa !14 %61 = icmp slt i64 %59, %60 br i1 %61, label %167, label %62 62: ; preds = %28 %63 = load i64, ptr @MMC_TIMING_UHS_SDR50, align 8, !tbaa !14 %64 = icmp eq i64 %50, %63 %65 = load i64, ptr @MMC_TIMING_UHS_SDR104, align 8 %66 = icmp eq i64 %50, %65 %67 = select i1 %64, i1 true, i1 %66 %68 = load i64, ptr @MMC_TIMING_UHS_DDR50, align 8 %69 = icmp eq i64 %50, %68 %70 = select i1 %67, i1 true, i1 %69 %71 = load i64, ptr @MMC_TIMING_UHS_SDR25, align 8 %72 = icmp eq i64 %50, %71 %73 = select i1 %70, i1 true, i1 %72 %74 = select i1 %73, i32 %53, i32 0 %75 = or i32 %74, %57 %76 = load i32, ptr @SDHCI_HOST_CONTROL2, align 4, !tbaa !11 %77 = tail call i32 @sdhci_readw(ptr noundef nonnull %3, i32 noundef %76) #2 %78 = load i32, ptr @SDHCI_CTRL_PRESET_VAL_ENABLE, align 4, !tbaa !11 %79 = and i32 %78, %77 %80 = icmp eq i32 %79, 0 br i1 %80, label %81, label %104 81: ; preds = %62 %82 = load i32, ptr @SDHCI_HOST_CONTROL, align 4, !tbaa !11 %83 = tail call i32 @sdhci_writeb(ptr noundef nonnull %3, i32 noundef %75, i32 noundef %82) #2 %84 = load i32, ptr @SDHCI_CTRL_DRV_TYPE_MASK, align 4, !tbaa !11 %85 = xor i32 %84, -1 %86 = and i32 %77, %85 %87 = getelementptr inbounds %struct.mmc_ios, ptr %1, i64 0, i32 5 %88 = load i64, ptr %87, align 8, !tbaa !20 %89 = load i64, ptr @MMC_SET_DRIVER_TYPE_A, align 8, !tbaa !14 %90 = icmp eq i64 %88, %89 br i1 %90, label %91, label %94 91: ; preds = %81 %92 = load i32, ptr @SDHCI_CTRL_DRV_TYPE_A, align 4, !tbaa !11 %93 = or i32 %92, %86 br label %100 94: ; preds = %81 %95 = load i64, ptr @MMC_SET_DRIVER_TYPE_C, align 8, !tbaa !14 %96 = icmp eq i64 %88, %95 br i1 %96, label %97, label %100 97: ; preds = %94 %98 = load i32, ptr @SDHCI_CTRL_DRV_TYPE_C, align 4, !tbaa !11 %99 = or i32 %98, %86 br label %100 100: ; preds = %94, %97, %91 %101 = phi i32 [ %93, %91 ], [ %99, %97 ], [ %86, %94 ] %102 = load i32, ptr @SDHCI_HOST_CONTROL2, align 4, !tbaa !11 %103 = tail call i32 @sdhci_writew(ptr noundef nonnull %3, i32 noundef %101, i32 noundef %102) #2 br label %117 104: ; preds = %62 %105 = load i32, ptr @SDHCI_CLOCK_CONTROL, align 4, !tbaa !11 %106 = tail call i32 @sdhci_readw(ptr noundef nonnull %3, i32 noundef %105) #2 %107 = load i32, ptr @SDHCI_CLOCK_CARD_EN, align 4, !tbaa !11 %108 = xor i32 %107, -1 %109 = and i32 %106, %108 %110 = load i32, ptr @SDHCI_CLOCK_CONTROL, align 4, !tbaa !11 %111 = tail call i32 @sdhci_writew(ptr noundef nonnull %3, i32 noundef %109, i32 noundef %110) #2 %112 = load i32, ptr @SDHCI_HOST_CONTROL, align 4, !tbaa !11 %113 = tail call i32 @sdhci_writeb(ptr noundef nonnull %3, i32 noundef %75, i32 noundef %112) #2 %114 = getelementptr inbounds %struct.sdhci_host, ptr %3, i64 0, i32 2 %115 = load i32, ptr %114, align 8, !tbaa !21 store i32 0, ptr %114, align 8, !tbaa !21 %116 = tail call i32 @sdhci_set_clock(ptr noundef nonnull %3, i32 noundef %115) #2 br label %117 117: ; preds = %104, %100 %118 = load i32, ptr @SDHCI_HOST_CONTROL2, align 4, !tbaa !11 %119 = tail call i32 @sdhci_readw(ptr noundef nonnull %3, i32 noundef %118) #2 %120 = load i32, ptr @SDHCI_CTRL_UHS_MASK, align 4, !tbaa !11 %121 = xor i32 %120, -1 %122 = and i32 %119, %121 %123 = load i64, ptr %49, align 8, !tbaa !18 %124 = load i64, ptr @MMC_TIMING_UHS_SDR12, align 8, !tbaa !14 %125 = icmp eq i64 %123, %124 br i1 %125, label %126, label %129 126: ; preds = %117 %127 = load i32, ptr @SDHCI_CTRL_UHS_SDR12, align 4, !tbaa !11 %128 = or i32 %127, %122 br label %153 129: ; preds = %117 %130 = load i64, ptr @MMC_TIMING_UHS_SDR25, align 8, !tbaa !14 %131 = icmp eq i64 %123, %130 br i1 %131, label %132, label %135 132: ; preds = %129 %133 = load i32, ptr @SDHCI_CTRL_UHS_SDR25, align 4, !tbaa !11 %134 = or i32 %133, %122 br label %153 135: ; preds = %129 %136 = load i64, ptr @MMC_TIMING_UHS_SDR50, align 8, !tbaa !14 %137 = icmp eq i64 %123, %136 br i1 %137, label %138, label %141 138: ; preds = %135 %139 = load i32, ptr @SDHCI_CTRL_UHS_SDR50, align 4, !tbaa !11 %140 = or i32 %139, %122 br label %153 141: ; preds = %135 %142 = load i64, ptr @MMC_TIMING_UHS_SDR104, align 8, !tbaa !14 %143 = icmp eq i64 %123, %142 br i1 %143, label %144, label %147 144: ; preds = %141 %145 = load i32, ptr @SDHCI_CTRL_UHS_SDR104, align 4, !tbaa !11 %146 = or i32 %145, %122 br label %153 147: ; preds = %141 %148 = load i64, ptr @MMC_TIMING_UHS_DDR50, align 8, !tbaa !14 %149 = icmp eq i64 %123, %148 br i1 %149, label %150, label %153 150: ; preds = %147 %151 = load i32, ptr @SDHCI_CTRL_UHS_DDR50, align 4, !tbaa !11 %152 = or i32 %151, %122 br label %153 153: ; preds = %132, %144, %150, %147, %138, %126 %154 = phi i32 [ %128, %126 ], [ %134, %132 ], [ %140, %138 ], [ %146, %144 ], [ %152, %150 ], [ %122, %147 ] %155 = load i32, ptr @SDHCI_CLOCK_CONTROL, align 4, !tbaa !11 %156 = tail call i32 @sdhci_readw(ptr noundef nonnull %3, i32 noundef %155) #2 %157 = load i32, ptr @SDHCI_CLOCK_CARD_EN, align 4, !tbaa !11 %158 = xor i32 %157, -1 %159 = and i32 %156, %158 %160 = load i32, ptr @SDHCI_CLOCK_CONTROL, align 4, !tbaa !11 %161 = tail call i32 @sdhci_writew(ptr noundef nonnull %3, i32 noundef %159, i32 noundef %160) #2 %162 = load i32, ptr @SDHCI_HOST_CONTROL2, align 4, !tbaa !11 %163 = tail call i32 @sdhci_writew(ptr noundef nonnull %3, i32 noundef %154, i32 noundef %162) #2 %164 = getelementptr inbounds %struct.sdhci_host, ptr %3, i64 0, i32 2 %165 = load i32, ptr %164, align 8, !tbaa !21 store i32 0, ptr %164, align 8, !tbaa !21 %166 = tail call i32 @sdhci_set_clock(ptr noundef nonnull %3, i32 noundef %165) #2 br label %170 167: ; preds = %28 %168 = load i32, ptr @SDHCI_HOST_CONTROL, align 4, !tbaa !11 %169 = tail call i32 @sdhci_writeb(ptr noundef nonnull %3, i32 noundef %57, i32 noundef %168) #2 br label %170 170: ; preds = %167, %153 %171 = getelementptr inbounds %struct.sdhci_host, ptr %3, i64 0, i32 3 %172 = load i32, ptr %171, align 4, !tbaa !22 %173 = load i32, ptr @SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS, align 4, !tbaa !11 %174 = and i32 %173, %172 %175 = icmp eq i32 %174, 0 br i1 %175, label %181, label %176 176: ; preds = %170 %177 = load i32, ptr @SDHCI_RESET_CMD, align 4, !tbaa !11 %178 = load i32, ptr @SDHCI_RESET_DATA, align 4, !tbaa !11 %179 = or i32 %178, %177 %180 = tail call i32 @sdhci_reset(ptr noundef nonnull %3, i32 noundef %179) #2 br label %181 181: ; preds = %170, %176, %2 %182 = tail call i32 (...) @mmiowb() #2 %183 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %4, i64 noundef undef) #2 ret void } declare ptr @mmc_priv(ptr noundef) local_unnamed_addr #1 declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @sdhci_writel(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdhci_reinit(ptr noundef) local_unnamed_addr #1 declare i32 @sdhci_set_clock(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdhci_set_power(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdhci_readb(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdhci_readw(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdhci_writeb(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdhci_writew(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdhci_reset(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @mmiowb(...) local_unnamed_addr #1 declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"sdhci_host", !7, i64 0, !10, i64 8, !7, i64 16, !7, i64 20, !7, i64 24} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"long", !8, i64 0} !11 = !{!7, !7, i64 0} !12 = !{!13, !10, i64 0} !13 = !{!"mmc_ios", !10, i64 0, !7, i64 8, !7, i64 12, !10, i64 16, !10, i64 24, !10, i64 32} !14 = !{!10, !10, i64 0} !15 = !{!13, !7, i64 8} !16 = !{!13, !7, i64 12} !17 = !{!13, !10, i64 16} !18 = !{!13, !10, i64 24} !19 = !{!6, !10, i64 8} !20 = !{!13, !10, i64 32} !21 = !{!6, !7, i64 16} !22 = !{!6, !7, i64 20}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/mmc/host/extr_sdhci.c_sdhci_set_ios.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/mmc/host/extr_sdhci.c_sdhci_set_ios.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SDHCI_DEVICE_DEAD = common local_unnamed_addr global i32 0, align 4 @MMC_POWER_OFF = common local_unnamed_addr global i64 0, align 8 @SDHCI_SIGNAL_ENABLE = common local_unnamed_addr global i32 0, align 4 @SDHCI_HOST_CONTROL = common local_unnamed_addr global i32 0, align 4 @MMC_BUS_WIDTH_8 = common local_unnamed_addr global i64 0, align 8 @SDHCI_CTRL_8BITBUS = common local_unnamed_addr global i32 0, align 4 @MMC_BUS_WIDTH_4 = common local_unnamed_addr global i64 0, align 8 @SDHCI_CTRL_4BITBUS = common local_unnamed_addr global i32 0, align 4 @MMC_TIMING_SD_HS = common local_unnamed_addr global i64 0, align 8 @SDHCI_CTRL_HISPD = common local_unnamed_addr global i32 0, align 4 @SDHCI_SPEC_300 = common local_unnamed_addr global i64 0, align 8 @MMC_TIMING_UHS_SDR50 = common local_unnamed_addr global i64 0, align 8 @MMC_TIMING_UHS_SDR104 = common local_unnamed_addr global i64 0, align 8 @MMC_TIMING_UHS_DDR50 = common local_unnamed_addr global i64 0, align 8 @MMC_TIMING_UHS_SDR25 = common local_unnamed_addr global i64 0, align 8 @SDHCI_HOST_CONTROL2 = common local_unnamed_addr global i32 0, align 4 @SDHCI_CTRL_PRESET_VAL_ENABLE = common local_unnamed_addr global i32 0, align 4 @SDHCI_CTRL_DRV_TYPE_MASK = common local_unnamed_addr global i32 0, align 4 @MMC_SET_DRIVER_TYPE_A = common local_unnamed_addr global i64 0, align 8 @SDHCI_CTRL_DRV_TYPE_A = common local_unnamed_addr global i32 0, align 4 @MMC_SET_DRIVER_TYPE_C = common local_unnamed_addr global i64 0, align 8 @SDHCI_CTRL_DRV_TYPE_C = common local_unnamed_addr global i32 0, align 4 @SDHCI_CLOCK_CONTROL = common local_unnamed_addr global i32 0, align 4 @SDHCI_CLOCK_CARD_EN = common local_unnamed_addr global i32 0, align 4 @SDHCI_CTRL_UHS_MASK = common local_unnamed_addr global i32 0, align 4 @MMC_TIMING_UHS_SDR12 = common local_unnamed_addr global i64 0, align 8 @SDHCI_CTRL_UHS_SDR12 = common local_unnamed_addr global i32 0, align 4 @SDHCI_CTRL_UHS_SDR25 = common local_unnamed_addr global i32 0, align 4 @SDHCI_CTRL_UHS_SDR50 = common local_unnamed_addr global i32 0, align 4 @SDHCI_CTRL_UHS_SDR104 = common local_unnamed_addr global i32 0, align 4 @SDHCI_CTRL_UHS_DDR50 = common local_unnamed_addr global i32 0, align 4 @SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS = common local_unnamed_addr global i32 0, align 4 @SDHCI_RESET_CMD = common local_unnamed_addr global i32 0, align 4 @SDHCI_RESET_DATA = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @sdhci_set_ios], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @sdhci_set_ios(ptr noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = tail call ptr @mmc_priv(ptr noundef %0) #2 %4 = getelementptr inbounds i8, ptr %3, i64 24 %5 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %4, i64 noundef undef) #2 %6 = load i32, ptr %3, align 8, !tbaa !6 %7 = load i32, ptr @SDHCI_DEVICE_DEAD, align 4, !tbaa !12 %8 = and i32 %7, %6 %9 = icmp eq i32 %8, 0 br i1 %9, label %10, label %181 10: ; preds = %2 %11 = load i64, ptr %1, align 8, !tbaa !13 %12 = load i64, ptr @MMC_POWER_OFF, align 8, !tbaa !15 %13 = icmp eq i64 %11, %12 br i1 %13, label %14, label %18 14: ; preds = %10 %15 = load i32, ptr @SDHCI_SIGNAL_ENABLE, align 4, !tbaa !12 %16 = tail call i32 @sdhci_writel(ptr noundef nonnull %3, i32 noundef 0, i32 noundef %15) #2 %17 = tail call i32 @sdhci_reinit(ptr noundef nonnull %3) #2 br label %18 18: ; preds = %14, %10 %19 = getelementptr inbounds i8, ptr %1, i64 8 %20 = load i32, ptr %19, align 8, !tbaa !16 %21 = tail call i32 @sdhci_set_clock(ptr noundef nonnull %3, i32 noundef %20) #2 %22 = load i64, ptr %1, align 8, !tbaa !13 %23 = load i64, ptr @MMC_POWER_OFF, align 8, !tbaa !15 %24 = icmp eq i64 %22, %23 br i1 %24, label %28, label %25 25: ; preds = %18 %26 = getelementptr inbounds i8, ptr %1, i64 12 %27 = load i32, ptr %26, align 4, !tbaa !17 br label %28 28: ; preds = %18, %25 %29 = phi i32 [ %27, %25 ], [ -1, %18 ] %30 = tail call i32 @sdhci_set_power(ptr noundef nonnull %3, i32 noundef %29) #2 %31 = load i32, ptr @SDHCI_HOST_CONTROL, align 4, !tbaa !12 %32 = tail call i32 @sdhci_readb(ptr noundef nonnull %3, i32 noundef %31) #2 %33 = getelementptr inbounds i8, ptr %1, i64 16 %34 = load i64, ptr %33, align 8, !tbaa !18 %35 = load i64, ptr @MMC_BUS_WIDTH_8, align 8, !tbaa !15 %36 = icmp eq i64 %34, %35 %37 = load i32, ptr @SDHCI_CTRL_8BITBUS, align 4, !tbaa !12 %38 = or i32 %37, %32 %39 = xor i32 %37, -1 %40 = and i32 %32, %39 %41 = select i1 %36, i32 %38, i32 %40 %42 = load i64, ptr @MMC_BUS_WIDTH_4, align 8, !tbaa !15 %43 = icmp eq i64 %34, %42 %44 = load i32, ptr @SDHCI_CTRL_4BITBUS, align 4, !tbaa !12 %45 = or i32 %44, %41 %46 = xor i32 %44, -1 %47 = and i32 %41, %46 %48 = select i1 %43, i32 %45, i32 %47 %49 = getelementptr inbounds i8, ptr %1, i64 24 %50 = load i64, ptr %49, align 8, !tbaa !19 %51 = load i64, ptr @MMC_TIMING_SD_HS, align 8, !tbaa !15 %52 = icmp eq i64 %50, %51 %53 = load i32, ptr @SDHCI_CTRL_HISPD, align 4 %54 = or i32 %53, %48 %55 = xor i32 %53, -1 %56 = and i32 %48, %55 %57 = select i1 %52, i32 %54, i32 %56 %58 = getelementptr inbounds i8, ptr %3, i64 8 %59 = load i64, ptr %58, align 8, !tbaa !20 %60 = load i64, ptr @SDHCI_SPEC_300, align 8, !tbaa !15 %61 = icmp slt i64 %59, %60 br i1 %61, label %167, label %62 62: ; preds = %28 %63 = load i64, ptr @MMC_TIMING_UHS_SDR50, align 8, !tbaa !15 %64 = icmp eq i64 %50, %63 %65 = load i64, ptr @MMC_TIMING_UHS_SDR104, align 8 %66 = icmp eq i64 %50, %65 %67 = select i1 %64, i1 true, i1 %66 %68 = load i64, ptr @MMC_TIMING_UHS_DDR50, align 8 %69 = icmp eq i64 %50, %68 %70 = select i1 %67, i1 true, i1 %69 %71 = load i64, ptr @MMC_TIMING_UHS_SDR25, align 8 %72 = icmp eq i64 %50, %71 %73 = select i1 %70, i1 true, i1 %72 %74 = select i1 %73, i32 %53, i32 0 %75 = or i32 %74, %57 %76 = load i32, ptr @SDHCI_HOST_CONTROL2, align 4, !tbaa !12 %77 = tail call i32 @sdhci_readw(ptr noundef nonnull %3, i32 noundef %76) #2 %78 = load i32, ptr @SDHCI_CTRL_PRESET_VAL_ENABLE, align 4, !tbaa !12 %79 = and i32 %78, %77 %80 = icmp eq i32 %79, 0 br i1 %80, label %81, label %104 81: ; preds = %62 %82 = load i32, ptr @SDHCI_HOST_CONTROL, align 4, !tbaa !12 %83 = tail call i32 @sdhci_writeb(ptr noundef nonnull %3, i32 noundef %75, i32 noundef %82) #2 %84 = load i32, ptr @SDHCI_CTRL_DRV_TYPE_MASK, align 4, !tbaa !12 %85 = xor i32 %84, -1 %86 = and i32 %77, %85 %87 = getelementptr inbounds i8, ptr %1, i64 32 %88 = load i64, ptr %87, align 8, !tbaa !21 %89 = load i64, ptr @MMC_SET_DRIVER_TYPE_A, align 8, !tbaa !15 %90 = icmp eq i64 %88, %89 br i1 %90, label %91, label %94 91: ; preds = %81 %92 = load i32, ptr @SDHCI_CTRL_DRV_TYPE_A, align 4, !tbaa !12 %93 = or i32 %92, %86 br label %100 94: ; preds = %81 %95 = load i64, ptr @MMC_SET_DRIVER_TYPE_C, align 8, !tbaa !15 %96 = icmp eq i64 %88, %95 br i1 %96, label %97, label %100 97: ; preds = %94 %98 = load i32, ptr @SDHCI_CTRL_DRV_TYPE_C, align 4, !tbaa !12 %99 = or i32 %98, %86 br label %100 100: ; preds = %94, %97, %91 %101 = phi i32 [ %93, %91 ], [ %99, %97 ], [ %86, %94 ] %102 = load i32, ptr @SDHCI_HOST_CONTROL2, align 4, !tbaa !12 %103 = tail call i32 @sdhci_writew(ptr noundef nonnull %3, i32 noundef %101, i32 noundef %102) #2 br label %117 104: ; preds = %62 %105 = load i32, ptr @SDHCI_CLOCK_CONTROL, align 4, !tbaa !12 %106 = tail call i32 @sdhci_readw(ptr noundef nonnull %3, i32 noundef %105) #2 %107 = load i32, ptr @SDHCI_CLOCK_CARD_EN, align 4, !tbaa !12 %108 = xor i32 %107, -1 %109 = and i32 %106, %108 %110 = load i32, ptr @SDHCI_CLOCK_CONTROL, align 4, !tbaa !12 %111 = tail call i32 @sdhci_writew(ptr noundef nonnull %3, i32 noundef %109, i32 noundef %110) #2 %112 = load i32, ptr @SDHCI_HOST_CONTROL, align 4, !tbaa !12 %113 = tail call i32 @sdhci_writeb(ptr noundef nonnull %3, i32 noundef %75, i32 noundef %112) #2 %114 = getelementptr inbounds i8, ptr %3, i64 16 %115 = load i32, ptr %114, align 8, !tbaa !22 store i32 0, ptr %114, align 8, !tbaa !22 %116 = tail call i32 @sdhci_set_clock(ptr noundef nonnull %3, i32 noundef %115) #2 br label %117 117: ; preds = %104, %100 %118 = load i32, ptr @SDHCI_HOST_CONTROL2, align 4, !tbaa !12 %119 = tail call i32 @sdhci_readw(ptr noundef nonnull %3, i32 noundef %118) #2 %120 = load i32, ptr @SDHCI_CTRL_UHS_MASK, align 4, !tbaa !12 %121 = xor i32 %120, -1 %122 = and i32 %119, %121 %123 = load i64, ptr %49, align 8, !tbaa !19 %124 = load i64, ptr @MMC_TIMING_UHS_SDR12, align 8, !tbaa !15 %125 = icmp eq i64 %123, %124 br i1 %125, label %126, label %129 126: ; preds = %117 %127 = load i32, ptr @SDHCI_CTRL_UHS_SDR12, align 4, !tbaa !12 %128 = or i32 %127, %122 br label %153 129: ; preds = %117 %130 = load i64, ptr @MMC_TIMING_UHS_SDR25, align 8, !tbaa !15 %131 = icmp eq i64 %123, %130 br i1 %131, label %132, label %135 132: ; preds = %129 %133 = load i32, ptr @SDHCI_CTRL_UHS_SDR25, align 4, !tbaa !12 %134 = or i32 %133, %122 br label %153 135: ; preds = %129 %136 = load i64, ptr @MMC_TIMING_UHS_SDR50, align 8, !tbaa !15 %137 = icmp eq i64 %123, %136 br i1 %137, label %138, label %141 138: ; preds = %135 %139 = load i32, ptr @SDHCI_CTRL_UHS_SDR50, align 4, !tbaa !12 %140 = or i32 %139, %122 br label %153 141: ; preds = %135 %142 = load i64, ptr @MMC_TIMING_UHS_SDR104, align 8, !tbaa !15 %143 = icmp eq i64 %123, %142 br i1 %143, label %144, label %147 144: ; preds = %141 %145 = load i32, ptr @SDHCI_CTRL_UHS_SDR104, align 4, !tbaa !12 %146 = or i32 %145, %122 br label %153 147: ; preds = %141 %148 = load i64, ptr @MMC_TIMING_UHS_DDR50, align 8, !tbaa !15 %149 = icmp eq i64 %123, %148 br i1 %149, label %150, label %153 150: ; preds = %147 %151 = load i32, ptr @SDHCI_CTRL_UHS_DDR50, align 4, !tbaa !12 %152 = or i32 %151, %122 br label %153 153: ; preds = %132, %144, %150, %147, %138, %126 %154 = phi i32 [ %128, %126 ], [ %134, %132 ], [ %140, %138 ], [ %146, %144 ], [ %152, %150 ], [ %122, %147 ] %155 = load i32, ptr @SDHCI_CLOCK_CONTROL, align 4, !tbaa !12 %156 = tail call i32 @sdhci_readw(ptr noundef nonnull %3, i32 noundef %155) #2 %157 = load i32, ptr @SDHCI_CLOCK_CARD_EN, align 4, !tbaa !12 %158 = xor i32 %157, -1 %159 = and i32 %156, %158 %160 = load i32, ptr @SDHCI_CLOCK_CONTROL, align 4, !tbaa !12 %161 = tail call i32 @sdhci_writew(ptr noundef nonnull %3, i32 noundef %159, i32 noundef %160) #2 %162 = load i32, ptr @SDHCI_HOST_CONTROL2, align 4, !tbaa !12 %163 = tail call i32 @sdhci_writew(ptr noundef nonnull %3, i32 noundef %154, i32 noundef %162) #2 %164 = getelementptr inbounds i8, ptr %3, i64 16 %165 = load i32, ptr %164, align 8, !tbaa !22 store i32 0, ptr %164, align 8, !tbaa !22 %166 = tail call i32 @sdhci_set_clock(ptr noundef nonnull %3, i32 noundef %165) #2 br label %170 167: ; preds = %28 %168 = load i32, ptr @SDHCI_HOST_CONTROL, align 4, !tbaa !12 %169 = tail call i32 @sdhci_writeb(ptr noundef nonnull %3, i32 noundef %57, i32 noundef %168) #2 br label %170 170: ; preds = %167, %153 %171 = getelementptr inbounds i8, ptr %3, i64 20 %172 = load i32, ptr %171, align 4, !tbaa !23 %173 = load i32, ptr @SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS, align 4, !tbaa !12 %174 = and i32 %173, %172 %175 = icmp eq i32 %174, 0 br i1 %175, label %181, label %176 176: ; preds = %170 %177 = load i32, ptr @SDHCI_RESET_CMD, align 4, !tbaa !12 %178 = load i32, ptr @SDHCI_RESET_DATA, align 4, !tbaa !12 %179 = or i32 %178, %177 %180 = tail call i32 @sdhci_reset(ptr noundef nonnull %3, i32 noundef %179) #2 br label %181 181: ; preds = %170, %176, %2 %182 = tail call i32 @mmiowb() #2 %183 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %4, i64 noundef undef) #2 ret void } declare ptr @mmc_priv(ptr noundef) local_unnamed_addr #1 declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @sdhci_writel(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdhci_reinit(ptr noundef) local_unnamed_addr #1 declare i32 @sdhci_set_clock(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdhci_set_power(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdhci_readb(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdhci_readw(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdhci_writeb(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdhci_writew(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sdhci_reset(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @mmiowb(...) local_unnamed_addr #1 declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"sdhci_host", !8, i64 0, !11, i64 8, !8, i64 16, !8, i64 20, !8, i64 24} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"long", !9, i64 0} !12 = !{!8, !8, i64 0} !13 = !{!14, !11, i64 0} !14 = !{!"mmc_ios", !11, i64 0, !8, i64 8, !8, i64 12, !11, i64 16, !11, i64 24, !11, i64 32} !15 = !{!11, !11, i64 0} !16 = !{!14, !8, i64 8} !17 = !{!14, !8, i64 12} !18 = !{!14, !11, i64 16} !19 = !{!14, !11, i64 24} !20 = !{!7, !11, i64 8} !21 = !{!14, !11, i64 32} !22 = !{!7, !8, i64 16} !23 = !{!7, !8, i64 20}
fastsocket_kernel_drivers_mmc_host_extr_sdhci.c_sdhci_set_ios
; ModuleID = 'AnghaBench/vim.js/src/extr_getchar.c_get_inserted.c' source_filename = "AnghaBench/vim.js/src/extr_getchar.c_get_inserted.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @redobuff = dso_local global i32 0, align 4 @FALSE = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local ptr @get_inserted() local_unnamed_addr #0 { %1 = load i32, ptr @FALSE, align 4, !tbaa !5 %2 = tail call ptr @get_buffcont(ptr noundef nonnull @redobuff, i32 noundef %1) #2 ret ptr %2 } declare ptr @get_buffcont(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/vim.js/src/extr_getchar.c_get_inserted.c' source_filename = "AnghaBench/vim.js/src/extr_getchar.c_get_inserted.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @redobuff = common global i32 0, align 4 @FALSE = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define ptr @get_inserted() local_unnamed_addr #0 { %1 = load i32, ptr @FALSE, align 4, !tbaa !6 %2 = tail call ptr @get_buffcont(ptr noundef nonnull @redobuff, i32 noundef %1) #2 ret ptr %2 } declare ptr @get_buffcont(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
vim.js_src_extr_getchar.c_get_inserted
; ModuleID = 'AnghaBench/bitwise/ion/extr_resolve.c_get_resolved_type.c' source_filename = "AnghaBench/bitwise/ion/extr_resolve.c_get_resolved_type.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @resolved_type_map = dso_local global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local ptr @get_resolved_type(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call ptr @map_get(ptr noundef nonnull @resolved_type_map, ptr noundef %0) #2 ret ptr %2 } declare ptr @map_get(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/bitwise/ion/extr_resolve.c_get_resolved_type.c' source_filename = "AnghaBench/bitwise/ion/extr_resolve.c_get_resolved_type.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @resolved_type_map = common global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define ptr @get_resolved_type(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call ptr @map_get(ptr noundef nonnull @resolved_type_map, ptr noundef %0) #2 ret ptr %2 } declare ptr @map_get(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
bitwise_ion_extr_resolve.c_get_resolved_type
; ModuleID = 'AnghaBench/linux/drivers/gpu/host1x/hw/extr_hw_host1x01_sync.h_host1x_sync_syncpt_thresh_int_disable_r.c' source_filename = "AnghaBench/linux/drivers/gpu/host1x/hw/extr_hw_host1x01_sync.h_host1x_sync_syncpt_thresh_int_disable_r.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @REGISTER_STRIDE = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @host1x_sync_syncpt_thresh_int_disable_r], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable define internal i32 @host1x_sync_syncpt_thresh_int_disable_r(i32 noundef %0) #0 { %2 = load i32, ptr @REGISTER_STRIDE, align 4, !tbaa !5 %3 = mul i32 %2, %0 %4 = add i32 %3, 96 ret i32 %4 } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/gpu/host1x/hw/extr_hw_host1x01_sync.h_host1x_sync_syncpt_thresh_int_disable_r.c' source_filename = "AnghaBench/linux/drivers/gpu/host1x/hw/extr_hw_host1x01_sync.h_host1x_sync_syncpt_thresh_int_disable_r.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @REGISTER_STRIDE = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @host1x_sync_syncpt_thresh_int_disable_r], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) define internal i32 @host1x_sync_syncpt_thresh_int_disable_r(i32 noundef %0) #0 { %2 = load i32, ptr @REGISTER_STRIDE, align 4, !tbaa !6 %3 = mul i32 %2, %0 %4 = add i32 %3, 96 ret i32 %4 } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_drivers_gpu_host1x_hw_extr_hw_host1x01_sync.h_host1x_sync_syncpt_thresh_int_disable_r
; ModuleID = 'AnghaBench/radare2/libr/io/p/extr_io_bfdbg.c___read.c' source_filename = "AnghaBench/radare2/libr/io/p/extr_io_bfdbg.c___read.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_14__ = type { i32, i32, i32, i32, i32, i64, i64, i64 } @llvm.compiler.used = appending global [1 x ptr] [ptr @__read], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef i32 @__read(ptr nocapture noundef readonly %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 { %5 = icmp eq ptr %1, null br i1 %5, label %76, label %6 6: ; preds = %4 %7 = load ptr, ptr %1, align 8, !tbaa !5 %8 = icmp eq ptr %7, null br i1 %8, label %76, label %9 9: ; preds = %6 %10 = load i32, ptr %0, align 4, !tbaa !10 %11 = load ptr, ptr %7, align 8, !tbaa !13 %12 = tail call i64 @is_in_base(i32 noundef %10, ptr noundef %11) #3 %13 = icmp eq i64 %12, 0 %14 = load i32, ptr %0, align 4, !tbaa !10 %15 = load ptr, ptr %7, align 8, !tbaa !13 br i1 %13, label %22, label %16 16: ; preds = %9 %17 = load i32, ptr %15, align 8, !tbaa !15 %18 = sub nsw i32 %14, %17 %19 = tail call i32 @llvm.smax.i32(i32 %18, i32 %3) %20 = getelementptr inbounds %struct.TYPE_14__, ptr %15, i64 0, i32 7 %21 = load i64, ptr %20, align 8, !tbaa !18 br label %69 22: ; preds = %9 %23 = tail call i64 @is_in_screen(i32 noundef %14, ptr noundef %15) #3 %24 = icmp eq i64 %23, 0 %25 = load i32, ptr %0, align 4, !tbaa !10 %26 = load ptr, ptr %7, align 8, !tbaa !13 br i1 %24, label %40, label %27 27: ; preds = %22 %28 = getelementptr inbounds %struct.TYPE_14__, ptr %26, i64 0, i32 1 %29 = load i32, ptr %28, align 4, !tbaa !19 %30 = sub nsw i32 %25, %29 %31 = icmp sgt i32 %30, %3 br i1 %31, label %32, label %36 32: ; preds = %27 %33 = getelementptr inbounds %struct.TYPE_14__, ptr %26, i64 0, i32 2 %34 = load i32, ptr %33, align 8, !tbaa !20 %35 = sub nsw i32 %34, %30 br label %36 36: ; preds = %32, %27 %37 = phi i32 [ %35, %32 ], [ %3, %27 ] %38 = getelementptr inbounds %struct.TYPE_14__, ptr %26, i64 0, i32 6 %39 = load i64, ptr %38, align 8, !tbaa !21 br label %69 40: ; preds = %22 %41 = tail call i64 @is_in_input(i32 noundef %25, ptr noundef %26) #3 %42 = icmp eq i64 %41, 0 br i1 %42, label %58, label %43 43: ; preds = %40 %44 = load i32, ptr %0, align 4, !tbaa !10 %45 = load ptr, ptr %7, align 8, !tbaa !13 %46 = getelementptr inbounds %struct.TYPE_14__, ptr %45, i64 0, i32 3 %47 = load i32, ptr %46, align 4, !tbaa !22 %48 = sub nsw i32 %44, %47 %49 = icmp sgt i32 %48, %3 br i1 %49, label %50, label %54 50: ; preds = %43 %51 = getelementptr inbounds %struct.TYPE_14__, ptr %45, i64 0, i32 4 %52 = load i32, ptr %51, align 8, !tbaa !23 %53 = sub nsw i32 %52, %48 br label %54 54: ; preds = %50, %43 %55 = phi i32 [ %53, %50 ], [ %3, %43 ] %56 = getelementptr inbounds %struct.TYPE_14__, ptr %45, i64 0, i32 5 %57 = load i64, ptr %56, align 8, !tbaa !24 br label %69 58: ; preds = %40 %59 = tail call i32 @RIOBFDBG_SZ(ptr noundef nonnull %1) #3 %60 = load i32, ptr %0, align 4, !tbaa !10 %61 = icmp slt i32 %60, %59 br i1 %61, label %62, label %76 62: ; preds = %58 %63 = add nsw i32 %60, %3 %64 = icmp slt i32 %63, %59 %65 = sub nsw i32 %59, %60 %66 = select i1 %64, i32 %3, i32 %65 %67 = tail call i64 @RIOBFDBG_BUF(ptr noundef nonnull %1) #3 %68 = load i32, ptr %0, align 4, !tbaa !10 br label %69 69: ; preds = %16, %36, %54, %62 %70 = phi i32 [ %68, %62 ], [ %48, %54 ], [ %30, %36 ], [ %18, %16 ] %71 = phi i64 [ %67, %62 ], [ %57, %54 ], [ %39, %36 ], [ %21, %16 ] %72 = phi i32 [ %66, %62 ], [ %55, %54 ], [ %37, %36 ], [ %19, %16 ] %73 = sext i32 %70 to i64 %74 = add nsw i64 %71, %73 %75 = tail call i32 @memcpy(ptr noundef %2, i64 noundef %74, i32 noundef %72) #3 br label %76 76: ; preds = %69, %58, %4, %6 %77 = phi i32 [ -1, %6 ], [ -1, %4 ], [ -1, %58 ], [ %72, %69 ] ret i32 %77 } declare i64 @is_in_base(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @memcpy(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i64 @is_in_screen(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i64 @is_in_input(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @RIOBFDBG_SZ(ptr noundef) local_unnamed_addr #1 declare i64 @RIOBFDBG_BUF(ptr noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.smax.i32(i32, i32) #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_11__", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"TYPE_13__", !12, i64 0} !12 = !{!"int", !8, i64 0} !13 = !{!14, !7, i64 0} !14 = !{!"TYPE_12__", !7, i64 0} !15 = !{!16, !12, i64 0} !16 = !{!"TYPE_14__", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12, !12, i64 16, !17, i64 24, !17, i64 32, !17, i64 40} !17 = !{!"long", !8, i64 0} !18 = !{!16, !17, i64 40} !19 = !{!16, !12, i64 4} !20 = !{!16, !12, i64 8} !21 = !{!16, !17, i64 32} !22 = !{!16, !12, i64 12} !23 = !{!16, !12, i64 16} !24 = !{!16, !17, i64 24}
; ModuleID = 'AnghaBench/radare2/libr/io/p/extr_io_bfdbg.c___read.c' source_filename = "AnghaBench/radare2/libr/io/p/extr_io_bfdbg.c___read.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @__read], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal noundef i32 @__read(ptr nocapture noundef readonly %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 { %5 = icmp eq ptr %1, null br i1 %5, label %76, label %6 6: ; preds = %4 %7 = load ptr, ptr %1, align 8, !tbaa !6 %8 = icmp eq ptr %7, null br i1 %8, label %76, label %9 9: ; preds = %6 %10 = load i32, ptr %0, align 4, !tbaa !11 %11 = load ptr, ptr %7, align 8, !tbaa !14 %12 = tail call i64 @is_in_base(i32 noundef %10, ptr noundef %11) #3 %13 = icmp eq i64 %12, 0 %14 = load i32, ptr %0, align 4, !tbaa !11 %15 = load ptr, ptr %7, align 8, !tbaa !14 br i1 %13, label %22, label %16 16: ; preds = %9 %17 = load i32, ptr %15, align 8, !tbaa !16 %18 = sub nsw i32 %14, %17 %19 = tail call i32 @llvm.smax.i32(i32 %18, i32 %3) %20 = getelementptr inbounds i8, ptr %15, i64 40 %21 = load i64, ptr %20, align 8, !tbaa !19 br label %69 22: ; preds = %9 %23 = tail call i64 @is_in_screen(i32 noundef %14, ptr noundef %15) #3 %24 = icmp eq i64 %23, 0 %25 = load i32, ptr %0, align 4, !tbaa !11 %26 = load ptr, ptr %7, align 8, !tbaa !14 br i1 %24, label %40, label %27 27: ; preds = %22 %28 = getelementptr inbounds i8, ptr %26, i64 4 %29 = load i32, ptr %28, align 4, !tbaa !20 %30 = sub nsw i32 %25, %29 %31 = icmp sgt i32 %30, %3 br i1 %31, label %32, label %36 32: ; preds = %27 %33 = getelementptr inbounds i8, ptr %26, i64 8 %34 = load i32, ptr %33, align 8, !tbaa !21 %35 = sub nsw i32 %34, %30 br label %36 36: ; preds = %32, %27 %37 = phi i32 [ %35, %32 ], [ %3, %27 ] %38 = getelementptr inbounds i8, ptr %26, i64 32 %39 = load i64, ptr %38, align 8, !tbaa !22 br label %69 40: ; preds = %22 %41 = tail call i64 @is_in_input(i32 noundef %25, ptr noundef %26) #3 %42 = icmp eq i64 %41, 0 br i1 %42, label %58, label %43 43: ; preds = %40 %44 = load i32, ptr %0, align 4, !tbaa !11 %45 = load ptr, ptr %7, align 8, !tbaa !14 %46 = getelementptr inbounds i8, ptr %45, i64 12 %47 = load i32, ptr %46, align 4, !tbaa !23 %48 = sub nsw i32 %44, %47 %49 = icmp sgt i32 %48, %3 br i1 %49, label %50, label %54 50: ; preds = %43 %51 = getelementptr inbounds i8, ptr %45, i64 16 %52 = load i32, ptr %51, align 8, !tbaa !24 %53 = sub nsw i32 %52, %48 br label %54 54: ; preds = %50, %43 %55 = phi i32 [ %53, %50 ], [ %3, %43 ] %56 = getelementptr inbounds i8, ptr %45, i64 24 %57 = load i64, ptr %56, align 8, !tbaa !25 br label %69 58: ; preds = %40 %59 = tail call i32 @RIOBFDBG_SZ(ptr noundef nonnull %1) #3 %60 = load i32, ptr %0, align 4, !tbaa !11 %61 = icmp slt i32 %60, %59 br i1 %61, label %62, label %76 62: ; preds = %58 %63 = add nsw i32 %60, %3 %64 = icmp slt i32 %63, %59 %65 = sub nsw i32 %59, %60 %66 = select i1 %64, i32 %3, i32 %65 %67 = tail call i64 @RIOBFDBG_BUF(ptr noundef nonnull %1) #3 %68 = load i32, ptr %0, align 4, !tbaa !11 br label %69 69: ; preds = %16, %36, %54, %62 %70 = phi i32 [ %68, %62 ], [ %48, %54 ], [ %30, %36 ], [ %18, %16 ] %71 = phi i64 [ %67, %62 ], [ %57, %54 ], [ %39, %36 ], [ %21, %16 ] %72 = phi i32 [ %66, %62 ], [ %55, %54 ], [ %37, %36 ], [ %19, %16 ] %73 = sext i32 %70 to i64 %74 = add nsw i64 %71, %73 %75 = tail call i32 @memcpy(ptr noundef %2, i64 noundef %74, i32 noundef %72) #3 br label %76 76: ; preds = %69, %58, %4, %6 %77 = phi i32 [ -1, %6 ], [ -1, %4 ], [ -1, %58 ], [ %72, %69 ] ret i32 %77 } declare i64 @is_in_base(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @memcpy(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i64 @is_in_screen(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i64 @is_in_input(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @RIOBFDBG_SZ(ptr noundef) local_unnamed_addr #1 declare i64 @RIOBFDBG_BUF(ptr noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.smax.i32(i32, i32) #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_11__", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !13, i64 0} !12 = !{!"TYPE_13__", !13, i64 0} !13 = !{!"int", !9, i64 0} !14 = !{!15, !8, i64 0} !15 = !{!"TYPE_12__", !8, i64 0} !16 = !{!17, !13, i64 0} !17 = !{!"TYPE_14__", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12, !13, i64 16, !18, i64 24, !18, i64 32, !18, i64 40} !18 = !{!"long", !9, i64 0} !19 = !{!17, !18, i64 40} !20 = !{!17, !13, i64 4} !21 = !{!17, !13, i64 8} !22 = !{!17, !18, i64 32} !23 = !{!17, !13, i64 12} !24 = !{!17, !13, i64 16} !25 = !{!17, !18, i64 24}
radare2_libr_io_p_extr_io_bfdbg.c___read
; ModuleID = 'AnghaBench/linux/mm/extr_migrate.c___copy_gigantic_page.c' source_filename = "AnghaBench/linux/mm/extr_migrate.c___copy_gigantic_page.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @__copy_gigantic_page], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @__copy_gigantic_page(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 { %4 = icmp sgt i32 %2, 0 br i1 %4, label %5, label %15 5: ; preds = %3, %5 %6 = phi ptr [ %12, %5 ], [ %0, %3 ] %7 = phi ptr [ %13, %5 ], [ %1, %3 ] %8 = phi i32 [ %11, %5 ], [ 0, %3 ] %9 = tail call i32 (...) @cond_resched() #2 %10 = tail call i32 @copy_highpage(ptr noundef %6, ptr noundef %7) #2 %11 = add nuw nsw i32 %8, 1 %12 = tail call ptr @mem_map_next(ptr noundef %6, ptr noundef %0, i32 noundef %11) #2 %13 = tail call ptr @mem_map_next(ptr noundef %7, ptr noundef %1, i32 noundef %11) #2 %14 = icmp eq i32 %11, %2 br i1 %14, label %15, label %5, !llvm.loop !5 15: ; preds = %5, %3 ret void } declare i32 @cond_resched(...) local_unnamed_addr #1 declare i32 @copy_highpage(ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @mem_map_next(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = distinct !{!5, !6} !6 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/linux/mm/extr_migrate.c___copy_gigantic_page.c' source_filename = "AnghaBench/linux/mm/extr_migrate.c___copy_gigantic_page.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @__copy_gigantic_page], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @__copy_gigantic_page(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 { %4 = icmp sgt i32 %2, 0 br i1 %4, label %5, label %15 5: ; preds = %3, %5 %6 = phi ptr [ %12, %5 ], [ %0, %3 ] %7 = phi ptr [ %13, %5 ], [ %1, %3 ] %8 = phi i32 [ %11, %5 ], [ 0, %3 ] %9 = tail call i32 @cond_resched() #2 %10 = tail call i32 @copy_highpage(ptr noundef %6, ptr noundef %7) #2 %11 = add nuw nsw i32 %8, 1 %12 = tail call ptr @mem_map_next(ptr noundef %6, ptr noundef %0, i32 noundef %11) #2 %13 = tail call ptr @mem_map_next(ptr noundef %7, ptr noundef %1, i32 noundef %11) #2 %14 = icmp eq i32 %11, %2 br i1 %14, label %15, label %5, !llvm.loop !6 15: ; preds = %5, %3 ret void } declare i32 @cond_resched(...) local_unnamed_addr #1 declare i32 @copy_highpage(ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @mem_map_next(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = distinct !{!6, !7} !7 = !{!"llvm.loop.mustprogress"}
linux_mm_extr_migrate.c___copy_gigantic_page
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_common.c_il_get_passive_dwell_time.c' source_filename = "AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_common.c_il_get_passive_dwell_time.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @NL80211_BAND_2GHZ = dso_local local_unnamed_addr global i32 0, align 4 @IL_PASSIVE_DWELL_BASE = dso_local local_unnamed_addr global i32 0, align 4 @IL_PASSIVE_DWELL_TIME_24 = dso_local local_unnamed_addr global i32 0, align 4 @IL_PASSIVE_DWELL_TIME_52 = dso_local local_unnamed_addr global i32 0, align 4 @IL_CHANNEL_TUNE_TIME = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local i32 @il_get_passive_dwell_time(ptr noundef %0, i32 noundef %1, ptr nocapture noundef readnone %2) local_unnamed_addr #0 { %4 = load i32, ptr @NL80211_BAND_2GHZ, align 4, !tbaa !5 %5 = icmp eq i32 %4, %1 %6 = load i32, ptr @IL_PASSIVE_DWELL_BASE, align 4, !tbaa !5 %7 = load i32, ptr @IL_PASSIVE_DWELL_TIME_24, align 4 %8 = load i32, ptr @IL_PASSIVE_DWELL_TIME_52, align 4 %9 = select i1 %5, i32 %7, i32 %8 %10 = add nsw i32 %9, %6 %11 = tail call i64 @il_is_any_associated(ptr noundef %0) #3 %12 = icmp eq i64 %11, 0 br i1 %12, label %33, label %13 13: ; preds = %3 %14 = load ptr, ptr %0, align 8, !tbaa !9 %15 = icmp eq ptr %14, null br i1 %15, label %16, label %18 16: ; preds = %13 %17 = load i32, ptr @IL_PASSIVE_DWELL_BASE, align 4, !tbaa !5 br label %25 18: ; preds = %13 %19 = load i32, ptr %14, align 4, !tbaa !12 %20 = freeze i32 %19 %21 = load i32, ptr @IL_PASSIVE_DWELL_BASE, align 4, !tbaa !5 %22 = icmp eq i32 %20, 0 %23 = tail call i32 @llvm.smin.i32(i32 %20, i32 %21) %24 = select i1 %22, i32 %21, i32 %23 br label %25 25: ; preds = %18, %16 %26 = phi i32 [ %17, %16 ], [ %24, %18 ] %27 = mul nsw i32 %26, 98 %28 = sdiv i32 %27, 100 %29 = load i32, ptr @IL_CHANNEL_TUNE_TIME, align 4, !tbaa !5 %30 = shl nsw i32 %29, 1 %31 = sub nsw i32 %28, %30 %32 = tail call i32 @min(i32 noundef %31, i32 noundef %10) #3 br label %33 33: ; preds = %25, %3 %34 = phi i32 [ %32, %25 ], [ %10, %3 ] ret i32 %34 } declare i64 @il_is_any_associated(ptr noundef) local_unnamed_addr #1 declare i32 @min(i32 noundef, i32 noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.smin.i32(i32, i32) #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"il_priv", !11, i64 0} !11 = !{!"any pointer", !7, i64 0} !12 = !{!13, !6, i64 0} !13 = !{!"TYPE_4__", !14, i64 0} !14 = !{!"TYPE_3__", !6, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_common.c_il_get_passive_dwell_time.c' source_filename = "AnghaBench/linux/drivers/net/wireless/intel/iwlegacy/extr_common.c_il_get_passive_dwell_time.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @NL80211_BAND_2GHZ = common local_unnamed_addr global i32 0, align 4 @IL_PASSIVE_DWELL_BASE = common local_unnamed_addr global i32 0, align 4 @IL_PASSIVE_DWELL_TIME_24 = common local_unnamed_addr global i32 0, align 4 @IL_PASSIVE_DWELL_TIME_52 = common local_unnamed_addr global i32 0, align 4 @IL_CHANNEL_TUNE_TIME = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @il_get_passive_dwell_time(ptr noundef %0, i32 noundef %1, ptr nocapture noundef readnone %2) local_unnamed_addr #0 { %4 = load i32, ptr @NL80211_BAND_2GHZ, align 4, !tbaa !6 %5 = icmp eq i32 %4, %1 %6 = load i32, ptr @IL_PASSIVE_DWELL_BASE, align 4, !tbaa !6 %7 = load i32, ptr @IL_PASSIVE_DWELL_TIME_24, align 4 %8 = load i32, ptr @IL_PASSIVE_DWELL_TIME_52, align 4 %9 = select i1 %5, i32 %7, i32 %8 %10 = add nsw i32 %9, %6 %11 = tail call i64 @il_is_any_associated(ptr noundef %0) #3 %12 = icmp eq i64 %11, 0 br i1 %12, label %34, label %13 13: ; preds = %3 %14 = load ptr, ptr %0, align 8, !tbaa !10 %15 = icmp eq ptr %14, null br i1 %15, label %16, label %18 16: ; preds = %13 %17 = load i32, ptr @IL_PASSIVE_DWELL_BASE, align 4, !tbaa !6 br label %24 18: ; preds = %13 %19 = load i32, ptr %14, align 4, !tbaa !13 %20 = freeze i32 %19 %21 = load i32, ptr @IL_PASSIVE_DWELL_BASE, align 4, !tbaa !6 %22 = icmp eq i32 %20, 0 %23 = tail call i32 @llvm.smin.i32(i32 %20, i32 %21) br i1 %22, label %24, label %26 24: ; preds = %16, %18 %25 = phi i32 [ %17, %16 ], [ %21, %18 ] br label %26 26: ; preds = %18, %24 %27 = phi i32 [ %25, %24 ], [ %23, %18 ] %28 = mul nsw i32 %27, 98 %29 = sdiv i32 %28, 100 %30 = load i32, ptr @IL_CHANNEL_TUNE_TIME, align 4, !tbaa !6 %31 = shl nsw i32 %30, 1 %32 = sub nsw i32 %29, %31 %33 = tail call i32 @min(i32 noundef %32, i32 noundef %10) #3 br label %34 34: ; preds = %26, %3 %35 = phi i32 [ %33, %26 ], [ %10, %3 ] ret i32 %35 } declare i64 @il_is_any_associated(ptr noundef) local_unnamed_addr #1 declare i32 @min(i32 noundef, i32 noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.smin.i32(i32, i32) #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"il_priv", !12, i64 0} !12 = !{!"any pointer", !8, i64 0} !13 = !{!14, !7, i64 0} !14 = !{!"TYPE_4__", !15, i64 0} !15 = !{!"TYPE_3__", !7, i64 0}
linux_drivers_net_wireless_intel_iwlegacy_extr_common.c_il_get_passive_dwell_time
; ModuleID = 'AnghaBench/http-parser/extr_test.c_connect_message_complete_cb.c' source_filename = "AnghaBench/http-parser/extr_test.c_connect_message_complete_cb.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_2__ = type { i32 } @parser = dso_local global i32 0, align 4 @messages = dso_local local_unnamed_addr global ptr null, align 8 @num_messages = dso_local local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind uwtable define dso_local i32 @connect_message_complete_cb(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call i32 @http_should_keep_alive(ptr noundef nonnull @parser) #2 %3 = load ptr, ptr @messages, align 8, !tbaa !5 %4 = load i64, ptr @num_messages, align 8, !tbaa !9 %5 = getelementptr inbounds %struct.TYPE_2__, ptr %3, i64 %4 store i32 %2, ptr %5, align 4, !tbaa !11 %6 = tail call i32 @message_complete_cb(ptr noundef %0) #2 ret i32 %6 } declare i32 @http_should_keep_alive(ptr noundef) local_unnamed_addr #1 declare i32 @message_complete_cb(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"long", !7, i64 0} !11 = !{!12, !13, i64 0} !12 = !{!"TYPE_2__", !13, i64 0} !13 = !{!"int", !7, i64 0}
; ModuleID = 'AnghaBench/http-parser/extr_test.c_connect_message_complete_cb.c' source_filename = "AnghaBench/http-parser/extr_test.c_connect_message_complete_cb.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_2__ = type { i32 } @parser = common global i32 0, align 4 @messages = common local_unnamed_addr global ptr null, align 8 @num_messages = common local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @connect_message_complete_cb(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call i32 @http_should_keep_alive(ptr noundef nonnull @parser) #2 %3 = load ptr, ptr @messages, align 8, !tbaa !6 %4 = load i64, ptr @num_messages, align 8, !tbaa !10 %5 = getelementptr inbounds %struct.TYPE_2__, ptr %3, i64 %4 store i32 %2, ptr %5, align 4, !tbaa !12 %6 = tail call i32 @message_complete_cb(ptr noundef %0) #2 ret i32 %6 } declare i32 @http_should_keep_alive(ptr noundef) local_unnamed_addr #1 declare i32 @message_complete_cb(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"long", !8, i64 0} !12 = !{!13, !14, i64 0} !13 = !{!"TYPE_2__", !14, i64 0} !14 = !{!"int", !8, i64 0}
http-parser_extr_test.c_connect_message_complete_cb
; ModuleID = 'AnghaBench/postgres/src/backend/utils/cache/extr_plancache.c_CreateOneShotCachedPlan.c' source_filename = "AnghaBench/postgres/src/backend/utils/cache/extr_plancache.c_CreateOneShotCachedPlan.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_3__ = type { ptr, ptr, i32, i32, i32, i32, i32, i32, i32, i32, i64, i64, i64, ptr, i32, ptr, ptr, ptr, ptr, ptr, i32, ptr, i64, ptr, ptr, i64, ptr, ptr, i32 } @CACHEDPLANSOURCE_MAGIC = dso_local local_unnamed_addr global i32 0, align 4 @CurrentMemoryContext = dso_local local_unnamed_addr global i32 0, align 4 @NIL = dso_local local_unnamed_addr global ptr null, align 8 @InvalidOid = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local noundef ptr @CreateOneShotCachedPlan(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 { %4 = icmp ne ptr %1, null %5 = zext i1 %4 to i32 %6 = tail call i32 @Assert(i32 noundef %5) #3 %7 = tail call i64 @palloc0(i32 noundef 200) #3 %8 = inttoptr i64 %7 to ptr %9 = load i32, ptr @CACHEDPLANSOURCE_MAGIC, align 4, !tbaa !5 %10 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 28 store i32 %9, ptr %10, align 8, !tbaa !9 %11 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 27 store ptr %0, ptr %11, align 8, !tbaa !13 store ptr %1, ptr %8, align 8, !tbaa !14 %12 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 1 store ptr %2, ptr %12, align 8, !tbaa !15 %13 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 2 %14 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 21 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(48) %14, i8 0, i64 48, i1 false) %15 = load i32, ptr @CurrentMemoryContext, align 4, !tbaa !5 %16 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 20 store i32 %15, ptr %16, align 8, !tbaa !16 %17 = load ptr, ptr @NIL, align 8, !tbaa !17 %18 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 19 store ptr %17, ptr %18, align 8, !tbaa !18 %19 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 18 store ptr %17, ptr %19, align 8, !tbaa !19 %20 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 17 store ptr %17, ptr %20, align 8, !tbaa !20 %21 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 15 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %21, i8 0, i64 16, i1 false) %22 = load i32, ptr @InvalidOid, align 4, !tbaa !5 %23 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 14 store i32 %22, ptr %23, align 8, !tbaa !21 %24 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 13 store ptr null, ptr %24, align 8, !tbaa !22 store <4 x i32> <i32 0, i32 0, i32 0, i32 1>, ptr %13, align 8, !tbaa !5 %25 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 6 store i32 0, ptr %25, align 8, !tbaa !23 %26 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 7 store i32 0, ptr %26, align 4, !tbaa !24 %27 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 8 store i32 0, ptr %27, align 8, !tbaa !25 %28 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 12 store i64 0, ptr %28, align 8, !tbaa !26 %29 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 9 store i32 -1, ptr %29, align 4, !tbaa !27 %30 = getelementptr inbounds %struct.TYPE_3__, ptr %8, i64 0, i32 10 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %30, i8 0, i64 16, i1 false) ret ptr %8 } declare i32 @Assert(i32 noundef) local_unnamed_addr #1 declare i64 @palloc0(i32 noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 192} !10 = !{!"TYPE_3__", !11, i64 0, !11, i64 8, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28, !6, i64 32, !6, i64 36, !6, i64 40, !6, i64 44, !12, i64 48, !12, i64 56, !12, i64 64, !11, i64 72, !6, i64 80, !11, i64 88, !11, i64 96, !11, i64 104, !11, i64 112, !11, i64 120, !6, i64 128, !11, i64 136, !12, i64 144, !11, i64 152, !11, i64 160, !12, i64 168, !11, i64 176, !11, i64 184, !6, i64 192} !11 = !{!"any pointer", !7, i64 0} !12 = !{!"long", !7, i64 0} !13 = !{!10, !11, i64 184} !14 = !{!10, !11, i64 0} !15 = !{!10, !11, i64 8} !16 = !{!10, !6, i64 128} !17 = !{!11, !11, i64 0} !18 = !{!10, !11, i64 120} !19 = !{!10, !11, i64 112} !20 = !{!10, !11, i64 104} !21 = !{!10, !6, i64 80} !22 = !{!10, !11, i64 72} !23 = !{!10, !6, i64 32} !24 = !{!10, !6, i64 36} !25 = !{!10, !6, i64 40} !26 = !{!10, !12, i64 64} !27 = !{!10, !6, i64 44}
; ModuleID = 'AnghaBench/postgres/src/backend/utils/cache/extr_plancache.c_CreateOneShotCachedPlan.c' source_filename = "AnghaBench/postgres/src/backend/utils/cache/extr_plancache.c_CreateOneShotCachedPlan.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @CACHEDPLANSOURCE_MAGIC = common local_unnamed_addr global i32 0, align 4 @CurrentMemoryContext = common local_unnamed_addr global i32 0, align 4 @NIL = common local_unnamed_addr global ptr null, align 8 @InvalidOid = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define noundef ptr @CreateOneShotCachedPlan(ptr noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 { %4 = icmp ne ptr %1, null %5 = zext i1 %4 to i32 %6 = tail call i32 @Assert(i32 noundef %5) #3 %7 = tail call i64 @palloc0(i32 noundef 200) #3 %8 = inttoptr i64 %7 to ptr %9 = load i32, ptr @CACHEDPLANSOURCE_MAGIC, align 4, !tbaa !6 %10 = getelementptr inbounds i8, ptr %8, i64 192 store i32 %9, ptr %10, align 8, !tbaa !10 %11 = getelementptr inbounds i8, ptr %8, i64 184 store ptr %0, ptr %11, align 8, !tbaa !14 store ptr %1, ptr %8, align 8, !tbaa !15 %12 = getelementptr inbounds i8, ptr %8, i64 8 store ptr %2, ptr %12, align 8, !tbaa !16 %13 = getelementptr inbounds i8, ptr %8, i64 16 %14 = getelementptr inbounds i8, ptr %8, i64 136 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(48) %14, i8 0, i64 48, i1 false) %15 = load i32, ptr @CurrentMemoryContext, align 4, !tbaa !6 %16 = getelementptr inbounds i8, ptr %8, i64 128 store i32 %15, ptr %16, align 8, !tbaa !17 %17 = load ptr, ptr @NIL, align 8, !tbaa !18 %18 = getelementptr inbounds i8, ptr %8, i64 120 store ptr %17, ptr %18, align 8, !tbaa !19 %19 = getelementptr inbounds i8, ptr %8, i64 112 store ptr %17, ptr %19, align 8, !tbaa !20 %20 = getelementptr inbounds i8, ptr %8, i64 104 store ptr %17, ptr %20, align 8, !tbaa !21 %21 = getelementptr inbounds i8, ptr %8, i64 88 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %21, i8 0, i64 16, i1 false) %22 = load i32, ptr @InvalidOid, align 4, !tbaa !6 %23 = getelementptr inbounds i8, ptr %8, i64 80 store i32 %22, ptr %23, align 8, !tbaa !22 %24 = getelementptr inbounds i8, ptr %8, i64 72 store ptr null, ptr %24, align 8, !tbaa !23 store <4 x i32> <i32 0, i32 0, i32 0, i32 1>, ptr %13, align 8, !tbaa !6 %25 = getelementptr inbounds i8, ptr %8, i64 32 store <2 x i32> zeroinitializer, ptr %25, align 8, !tbaa !6 %26 = getelementptr inbounds i8, ptr %8, i64 40 store i32 0, ptr %26, align 8, !tbaa !24 %27 = getelementptr inbounds i8, ptr %8, i64 64 store i64 0, ptr %27, align 8, !tbaa !25 %28 = getelementptr inbounds i8, ptr %8, i64 44 store i32 -1, ptr %28, align 4, !tbaa !26 %29 = getelementptr inbounds i8, ptr %8, i64 48 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %29, i8 0, i64 16, i1 false) ret ptr %8 } declare i32 @Assert(i32 noundef) local_unnamed_addr #1 declare i64 @palloc0(i32 noundef) local_unnamed_addr #1 ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 192} !11 = !{!"TYPE_3__", !12, i64 0, !12, i64 8, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28, !7, i64 32, !7, i64 36, !7, i64 40, !7, i64 44, !13, i64 48, !13, i64 56, !13, i64 64, !12, i64 72, !7, i64 80, !12, i64 88, !12, i64 96, !12, i64 104, !12, i64 112, !12, i64 120, !7, i64 128, !12, i64 136, !13, i64 144, !12, i64 152, !12, i64 160, !13, i64 168, !12, i64 176, !12, i64 184, !7, i64 192} !12 = !{!"any pointer", !8, i64 0} !13 = !{!"long", !8, i64 0} !14 = !{!11, !12, i64 184} !15 = !{!11, !12, i64 0} !16 = !{!11, !12, i64 8} !17 = !{!11, !7, i64 128} !18 = !{!12, !12, i64 0} !19 = !{!11, !12, i64 120} !20 = !{!11, !12, i64 112} !21 = !{!11, !12, i64 104} !22 = !{!11, !7, i64 80} !23 = !{!11, !12, i64 72} !24 = !{!11, !7, i64 40} !25 = !{!11, !13, i64 64} !26 = !{!11, !7, i64 44}
postgres_src_backend_utils_cache_extr_plancache.c_CreateOneShotCachedPlan
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/i2c/busses/extr_i2c-au1550.c_au1550_func.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/i2c/busses/extr_i2c-au1550.c_au1550_func.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @I2C_FUNC_I2C = dso_local local_unnamed_addr global i32 0, align 4 @I2C_FUNC_SMBUS_EMUL = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @au1550_func], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable define internal i32 @au1550_func(ptr nocapture readnone %0) #0 { %2 = load i32, ptr @I2C_FUNC_I2C, align 4, !tbaa !5 %3 = load i32, ptr @I2C_FUNC_SMBUS_EMUL, align 4, !tbaa !5 %4 = or i32 %3, %2 ret i32 %4 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/i2c/busses/extr_i2c-au1550.c_au1550_func.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/i2c/busses/extr_i2c-au1550.c_au1550_func.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @I2C_FUNC_I2C = common local_unnamed_addr global i32 0, align 4 @I2C_FUNC_SMBUS_EMUL = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @au1550_func], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) define internal i32 @au1550_func(ptr nocapture readnone %0) #0 { %2 = load i32, ptr @I2C_FUNC_I2C, align 4, !tbaa !6 %3 = load i32, ptr @I2C_FUNC_SMBUS_EMUL, align 4, !tbaa !6 %4 = or i32 %3, %2 ret i32 %4 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
fastsocket_kernel_drivers_i2c_busses_extr_i2c-au1550.c_au1550_func
; ModuleID = 'AnghaBench/postgres/src/backend/access/spgist/extr_spgproc.c_point_box_distance.c' source_filename = "AnghaBench/postgres/src/backend/access/spgist/extr_spgproc.c_point_box_distance.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_10__ = type { %struct.TYPE_8__, %struct.TYPE_7__ } %struct.TYPE_8__ = type { i64, i64 } %struct.TYPE_7__ = type { i64, i64 } %struct.TYPE_9__ = type { i64, i64 } @llvm.compiler.used = appending global [1 x ptr] [ptr @point_box_distance], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal double @point_box_distance(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 { %3 = load i64, ptr %0, align 8, !tbaa !5 %4 = tail call i64 @isnan(i64 noundef %3) #2 %5 = icmp eq i64 %4, 0 br i1 %5, label %6, label %21 6: ; preds = %2 %7 = getelementptr inbounds %struct.TYPE_10__, ptr %1, i64 0, i32 1 %8 = load i64, ptr %7, align 8, !tbaa !10 %9 = tail call i64 @isnan(i64 noundef %8) #2 %10 = icmp eq i64 %9, 0 br i1 %10, label %11, label %21 11: ; preds = %6 %12 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 1 %13 = load i64, ptr %12, align 8, !tbaa !14 %14 = tail call i64 @isnan(i64 noundef %13) #2 %15 = icmp eq i64 %14, 0 br i1 %15, label %16, label %21 16: ; preds = %11 %17 = getelementptr inbounds %struct.TYPE_10__, ptr %1, i64 0, i32 1, i32 1 %18 = load i64, ptr %17, align 8, !tbaa !15 %19 = tail call i64 @isnan(i64 noundef %18) #2 %20 = icmp eq i64 %19, 0 br i1 %20, label %23, label %21 21: ; preds = %16, %11, %6, %2 %22 = tail call double (...) @get_float8_nan() #2 br label %54 23: ; preds = %16 %24 = load i64, ptr %0, align 8, !tbaa !5 %25 = load i64, ptr %7, align 8, !tbaa !10 %26 = icmp slt i64 %24, %25 br i1 %26, label %27, label %30 27: ; preds = %23 %28 = sub nsw i64 %25, %24 %29 = sitofp i64 %28 to double br label %36 30: ; preds = %23 %31 = load i64, ptr %1, align 8, !tbaa !16 %32 = icmp sgt i64 %24, %31 br i1 %32, label %33, label %36 33: ; preds = %30 %34 = sub nsw i64 %24, %31 %35 = sitofp i64 %34 to double br label %36 36: ; preds = %30, %33, %27 %37 = phi double [ %29, %27 ], [ %35, %33 ], [ 0.000000e+00, %30 ] %38 = load i64, ptr %12, align 8, !tbaa !14 %39 = load i64, ptr %17, align 8, !tbaa !15 %40 = icmp slt i64 %38, %39 br i1 %40, label %41, label %44 41: ; preds = %36 %42 = sub nsw i64 %39, %38 %43 = sitofp i64 %42 to double br label %51 44: ; preds = %36 %45 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 1 %46 = load i64, ptr %45, align 8, !tbaa !17 %47 = icmp sgt i64 %38, %46 br i1 %47, label %48, label %51 48: ; preds = %44 %49 = sub nsw i64 %38, %46 %50 = sitofp i64 %49 to double br label %51 51: ; preds = %44, %48, %41 %52 = phi double [ %43, %41 ], [ %50, %48 ], [ 0.000000e+00, %44 ] %53 = tail call double @HYPOT(double noundef %37, double noundef %52) #2 br label %54 54: ; preds = %51, %21 %55 = phi double [ %22, %21 ], [ %53, %51 ] ret double %55 } declare i64 @isnan(i64 noundef) local_unnamed_addr #1 declare double @get_float8_nan(...) local_unnamed_addr #1 declare double @HYPOT(double noundef, double noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_9__", !7, i64 0, !7, i64 8} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 16} !11 = !{!"TYPE_10__", !12, i64 0, !13, i64 16} !12 = !{!"TYPE_8__", !7, i64 0, !7, i64 8} !13 = !{!"TYPE_7__", !7, i64 0, !7, i64 8} !14 = !{!6, !7, i64 8} !15 = !{!11, !7, i64 24} !16 = !{!11, !7, i64 0} !17 = !{!11, !7, i64 8}
; ModuleID = 'AnghaBench/postgres/src/backend/access/spgist/extr_spgproc.c_point_box_distance.c' source_filename = "AnghaBench/postgres/src/backend/access/spgist/extr_spgproc.c_point_box_distance.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @point_box_distance], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal double @point_box_distance(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 { %3 = load i64, ptr %0, align 8, !tbaa !6 %4 = tail call i64 @isnan(i64 noundef %3) #2 %5 = icmp eq i64 %4, 0 br i1 %5, label %6, label %21 6: ; preds = %2 %7 = getelementptr inbounds i8, ptr %1, i64 16 %8 = load i64, ptr %7, align 8, !tbaa !11 %9 = tail call i64 @isnan(i64 noundef %8) #2 %10 = icmp eq i64 %9, 0 br i1 %10, label %11, label %21 11: ; preds = %6 %12 = getelementptr inbounds i8, ptr %0, i64 8 %13 = load i64, ptr %12, align 8, !tbaa !15 %14 = tail call i64 @isnan(i64 noundef %13) #2 %15 = icmp eq i64 %14, 0 br i1 %15, label %16, label %21 16: ; preds = %11 %17 = getelementptr inbounds i8, ptr %1, i64 24 %18 = load i64, ptr %17, align 8, !tbaa !16 %19 = tail call i64 @isnan(i64 noundef %18) #2 %20 = icmp eq i64 %19, 0 br i1 %20, label %23, label %21 21: ; preds = %16, %11, %6, %2 %22 = tail call double @get_float8_nan() #2 br label %54 23: ; preds = %16 %24 = load i64, ptr %0, align 8, !tbaa !6 %25 = load i64, ptr %7, align 8, !tbaa !11 %26 = icmp slt i64 %24, %25 br i1 %26, label %27, label %30 27: ; preds = %23 %28 = sub nsw i64 %25, %24 %29 = sitofp i64 %28 to double br label %36 30: ; preds = %23 %31 = load i64, ptr %1, align 8, !tbaa !17 %32 = icmp sgt i64 %24, %31 br i1 %32, label %33, label %36 33: ; preds = %30 %34 = sub nsw i64 %24, %31 %35 = sitofp i64 %34 to double br label %36 36: ; preds = %30, %33, %27 %37 = phi double [ %29, %27 ], [ %35, %33 ], [ 0.000000e+00, %30 ] %38 = load i64, ptr %12, align 8, !tbaa !15 %39 = load i64, ptr %17, align 8, !tbaa !16 %40 = icmp slt i64 %38, %39 br i1 %40, label %41, label %44 41: ; preds = %36 %42 = sub nsw i64 %39, %38 %43 = sitofp i64 %42 to double br label %51 44: ; preds = %36 %45 = getelementptr inbounds i8, ptr %1, i64 8 %46 = load i64, ptr %45, align 8, !tbaa !18 %47 = icmp sgt i64 %38, %46 br i1 %47, label %48, label %51 48: ; preds = %44 %49 = sub nsw i64 %38, %46 %50 = sitofp i64 %49 to double br label %51 51: ; preds = %44, %48, %41 %52 = phi double [ %43, %41 ], [ %50, %48 ], [ 0.000000e+00, %44 ] %53 = tail call double @HYPOT(double noundef %37, double noundef %52) #2 br label %54 54: ; preds = %51, %21 %55 = phi double [ %22, %21 ], [ %53, %51 ] ret double %55 } declare i64 @isnan(i64 noundef) local_unnamed_addr #1 declare double @get_float8_nan(...) local_unnamed_addr #1 declare double @HYPOT(double noundef, double noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_9__", !8, i64 0, !8, i64 8} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 16} !12 = !{!"TYPE_10__", !13, i64 0, !14, i64 16} !13 = !{!"TYPE_8__", !8, i64 0, !8, i64 8} !14 = !{!"TYPE_7__", !8, i64 0, !8, i64 8} !15 = !{!7, !8, i64 8} !16 = !{!12, !8, i64 24} !17 = !{!12, !8, i64 0} !18 = !{!12, !8, i64 8}
postgres_src_backend_access_spgist_extr_spgproc.c_point_box_distance
; ModuleID = 'AnghaBench/postgres/src/backend/access/rmgrdesc/extr_gindesc.c_desc_recompress_leaf.c' source_filename = "AnghaBench/postgres/src/backend/access/rmgrdesc/extr_gindesc.c_desc_recompress_leaf.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [14 x i8] c" %d segments:\00", align 1 @.str.1 = private unnamed_addr constant [19 x i8] c" %d (add %d items)\00", align 1 @.str.2 = private unnamed_addr constant [13 x i8] c" %d (delete)\00", align 1 @.str.3 = private unnamed_addr constant [13 x i8] c" %d (insert)\00", align 1 @.str.4 = private unnamed_addr constant [14 x i8] c" %d (replace)\00", align 1 @.str.5 = private unnamed_addr constant [26 x i8] c" %d unknown action %d ???\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @desc_recompress_leaf], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @desc_recompress_leaf(i32 noundef %0, ptr noundef %1) #0 { %3 = alloca i32, align 4 %4 = load i32, ptr %1, align 4, !tbaa !5 %5 = tail call i32 (i32, ptr, i32, ...) @appendStringInfo(i32 noundef %0, ptr noundef nonnull @.str, i32 noundef %4) #3 %6 = load i32, ptr %1, align 4, !tbaa !5 %7 = icmp sgt i32 %6, 0 br i1 %7, label %8, label %49 8: ; preds = %2 %9 = getelementptr inbounds i8, ptr %1, i64 4 br label %10 10: ; preds = %8, %44 %11 = phi i32 [ %46, %44 ], [ 0, %8 ] %12 = phi ptr [ %45, %44 ], [ %9, %8 ] %13 = getelementptr inbounds i8, ptr %12, i64 1 %14 = load i32, ptr %12, align 4, !tbaa !10 %15 = getelementptr inbounds i8, ptr %12, i64 2 %16 = load i32, ptr %13, align 4, !tbaa !10 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 store i32 0, ptr %3, align 4, !tbaa !10 %17 = and i32 %16, -2 %18 = icmp eq i32 %17, 128 br i1 %18, label %19, label %24 19: ; preds = %10 %20 = call i32 @SizeOfGinPostingList(ptr noundef nonnull %15) #3 %21 = call i32 @SHORTALIGN(i32 noundef %20) #3 %22 = sext i32 %21 to i64 %23 = getelementptr inbounds i8, ptr %15, i64 %22 br label %34 24: ; preds = %10 %25 = icmp eq i32 %16, 131 br i1 %25, label %26, label %34 26: ; preds = %24 %27 = call i32 @memcpy(ptr noundef nonnull %3, ptr noundef nonnull %15, i32 noundef 4) #3 %28 = getelementptr inbounds i8, ptr %12, i64 6 %29 = load i32, ptr %3, align 4, !tbaa !10 %30 = sext i32 %29 to i64 %31 = shl nsw i64 %30, 2 %32 = getelementptr inbounds i8, ptr %28, i64 %31 %33 = call i32 (i32, ptr, i32, ...) @appendStringInfo(i32 noundef %0, ptr noundef nonnull @.str.1, i32 noundef %14, i32 noundef %29) #3 br label %44 34: ; preds = %19, %24 %35 = phi ptr [ %15, %24 ], [ %23, %19 ] switch i32 %16, label %42 [ i32 128, label %40 i32 130, label %36 i32 129, label %38 ] 36: ; preds = %34 %37 = call i32 (i32, ptr, i32, ...) @appendStringInfo(i32 noundef %0, ptr noundef nonnull @.str.2, i32 noundef %14) #3 br label %44 38: ; preds = %34 %39 = call i32 (i32, ptr, i32, ...) @appendStringInfo(i32 noundef %0, ptr noundef nonnull @.str.3, i32 noundef %14) #3 br label %44 40: ; preds = %34 %41 = call i32 (i32, ptr, i32, ...) @appendStringInfo(i32 noundef %0, ptr noundef nonnull @.str.4, i32 noundef %14) #3 br label %44 42: ; preds = %34 %43 = call i32 (i32, ptr, i32, ...) @appendStringInfo(i32 noundef %0, ptr noundef nonnull @.str.5, i32 noundef %14, i32 noundef %16) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 br label %49 44: ; preds = %26, %36, %38, %40 %45 = phi ptr [ %32, %26 ], [ %35, %36 ], [ %35, %38 ], [ %35, %40 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 %46 = add nuw nsw i32 %11, 1 %47 = load i32, ptr %1, align 4, !tbaa !5 %48 = icmp slt i32 %46, %47 br i1 %48, label %10, label %49, !llvm.loop !11 49: ; preds = %44, %2, %42 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @appendStringInfo(i32 noundef, ptr noundef, i32 noundef, ...) local_unnamed_addr #2 declare i32 @SizeOfGinPostingList(ptr noundef) local_unnamed_addr #2 declare i32 @SHORTALIGN(i32 noundef) local_unnamed_addr #2 declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_3__", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!7, !7, i64 0} !11 = distinct !{!11, !12} !12 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/postgres/src/backend/access/rmgrdesc/extr_gindesc.c_desc_recompress_leaf.c' source_filename = "AnghaBench/postgres/src/backend/access/rmgrdesc/extr_gindesc.c_desc_recompress_leaf.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [14 x i8] c" %d segments:\00", align 1 @.str.1 = private unnamed_addr constant [19 x i8] c" %d (add %d items)\00", align 1 @.str.2 = private unnamed_addr constant [13 x i8] c" %d (delete)\00", align 1 @.str.3 = private unnamed_addr constant [13 x i8] c" %d (insert)\00", align 1 @.str.4 = private unnamed_addr constant [14 x i8] c" %d (replace)\00", align 1 @.str.5 = private unnamed_addr constant [26 x i8] c" %d unknown action %d ???\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @desc_recompress_leaf], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @desc_recompress_leaf(i32 noundef %0, ptr noundef %1) #0 { %3 = alloca i32, align 4 %4 = load i32, ptr %1, align 4, !tbaa !6 %5 = tail call i32 (i32, ptr, i32, ...) @appendStringInfo(i32 noundef %0, ptr noundef nonnull @.str, i32 noundef %4) #3 %6 = load i32, ptr %1, align 4, !tbaa !6 %7 = icmp sgt i32 %6, 0 br i1 %7, label %8, label %54 8: ; preds = %2 %9 = getelementptr inbounds i8, ptr %1, i64 4 br label %10 10: ; preds = %8, %49 %11 = phi i32 [ %51, %49 ], [ 0, %8 ] %12 = phi ptr [ %50, %49 ], [ %9, %8 ] %13 = getelementptr inbounds i8, ptr %12, i64 1 %14 = load i32, ptr %12, align 4, !tbaa !11 %15 = getelementptr inbounds i8, ptr %12, i64 2 %16 = load i32, ptr %13, align 4, !tbaa !11 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 store i32 0, ptr %3, align 4, !tbaa !11 %17 = and i32 %16, -2 %18 = icmp eq i32 %17, 128 br i1 %18, label %19, label %24 19: ; preds = %10 %20 = call i32 @SizeOfGinPostingList(ptr noundef nonnull %15) #3 %21 = call i32 @SHORTALIGN(i32 noundef %20) #3 %22 = sext i32 %21 to i64 %23 = getelementptr inbounds i8, ptr %15, i64 %22 br label %33 24: ; preds = %10 %25 = icmp eq i32 %16, 131 br i1 %25, label %26, label %33 26: ; preds = %24 %27 = call i32 @memcpy(ptr noundef nonnull %3, ptr noundef nonnull %15, i32 noundef 4) #3 %28 = getelementptr inbounds i8, ptr %12, i64 6 %29 = load i32, ptr %3, align 4, !tbaa !11 %30 = sext i32 %29 to i64 %31 = shl nsw i64 %30, 2 %32 = getelementptr inbounds i8, ptr %28, i64 %31 br label %37 33: ; preds = %19, %24 %34 = phi ptr [ %15, %24 ], [ %23, %19 ] switch i32 %16, label %47 [ i32 131, label %35 i32 130, label %41 i32 129, label %43 i32 128, label %45 ] 35: ; preds = %33 %36 = load i32, ptr %3, align 4, !tbaa !11 br label %37 37: ; preds = %35, %26 %38 = phi i32 [ %29, %26 ], [ %36, %35 ] %39 = phi ptr [ %32, %26 ], [ %34, %35 ] %40 = call i32 (i32, ptr, i32, ...) @appendStringInfo(i32 noundef %0, ptr noundef nonnull @.str.1, i32 noundef %14, i32 noundef %38) #3 br label %49 41: ; preds = %33 %42 = call i32 (i32, ptr, i32, ...) @appendStringInfo(i32 noundef %0, ptr noundef nonnull @.str.2, i32 noundef %14) #3 br label %49 43: ; preds = %33 %44 = call i32 (i32, ptr, i32, ...) @appendStringInfo(i32 noundef %0, ptr noundef nonnull @.str.3, i32 noundef %14) #3 br label %49 45: ; preds = %33 %46 = call i32 (i32, ptr, i32, ...) @appendStringInfo(i32 noundef %0, ptr noundef nonnull @.str.4, i32 noundef %14) #3 br label %49 47: ; preds = %33 %48 = call i32 (i32, ptr, i32, ...) @appendStringInfo(i32 noundef %0, ptr noundef nonnull @.str.5, i32 noundef %14, i32 noundef %16) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 br label %54 49: ; preds = %37, %41, %43, %45 %50 = phi ptr [ %39, %37 ], [ %34, %41 ], [ %34, %43 ], [ %34, %45 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 %51 = add nuw nsw i32 %11, 1 %52 = load i32, ptr %1, align 4, !tbaa !6 %53 = icmp slt i32 %51, %52 br i1 %53, label %10, label %54, !llvm.loop !12 54: ; preds = %49, %2, %47 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @appendStringInfo(i32 noundef, ptr noundef, i32 noundef, ...) local_unnamed_addr #2 declare i32 @SizeOfGinPostingList(ptr noundef) local_unnamed_addr #2 declare i32 @SHORTALIGN(i32 noundef) local_unnamed_addr #2 declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_3__", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0} !12 = distinct !{!12, !13} !13 = !{!"llvm.loop.mustprogress"}
postgres_src_backend_access_rmgrdesc_extr_gindesc.c_desc_recompress_leaf
; ModuleID = 'AnghaBench/nodemcu-firmware/app/modules/extr_wifi_common.c_wifi_add_int_field.c' source_filename = "AnghaBench/nodemcu-firmware/app/modules/extr_wifi_common.c_wifi_add_int_field.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local void @wifi_add_int_field(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 { %4 = tail call i32 @lua_pushinteger(ptr noundef %0, i32 noundef %2) #2 %5 = tail call i32 @lua_setfield(ptr noundef %0, i32 noundef -2, ptr noundef %1) #2 ret void } declare i32 @lua_pushinteger(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @lua_setfield(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/nodemcu-firmware/app/modules/extr_wifi_common.c_wifi_add_int_field.c' source_filename = "AnghaBench/nodemcu-firmware/app/modules/extr_wifi_common.c_wifi_add_int_field.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define void @wifi_add_int_field(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 { %4 = tail call i32 @lua_pushinteger(ptr noundef %0, i32 noundef %2) #2 %5 = tail call i32 @lua_setfield(ptr noundef %0, i32 noundef -2, ptr noundef %1) #2 ret void } declare i32 @lua_pushinteger(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @lua_setfield(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
nodemcu-firmware_app_modules_extr_wifi_common.c_wifi_add_int_field
; ModuleID = 'AnghaBench/vlc/modules/spu/extr_subsdelay.c_SubsdelayEntryDestroy.c' source_filename = "AnghaBench/vlc/modules/spu/extr_subsdelay.c_SubsdelayEntryDestroy.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @SubsdelayEntryDestroy], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @SubsdelayEntryDestroy(ptr noundef %0) #0 { %2 = load i32, ptr %0, align 4, !tbaa !5 %3 = tail call i32 @SubpicDestroyClone(i32 noundef %2) #2 %4 = tail call i32 @free(ptr noundef nonnull %0) #2 ret void } declare i32 @SubpicDestroyClone(i32 noundef) local_unnamed_addr #1 declare i32 @free(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_4__", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/vlc/modules/spu/extr_subsdelay.c_SubsdelayEntryDestroy.c' source_filename = "AnghaBench/vlc/modules/spu/extr_subsdelay.c_SubsdelayEntryDestroy.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @SubsdelayEntryDestroy], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @SubsdelayEntryDestroy(ptr noundef %0) #0 { %2 = load i32, ptr %0, align 4, !tbaa !6 %3 = tail call i32 @SubpicDestroyClone(i32 noundef %2) #2 %4 = tail call i32 @free(ptr noundef nonnull %0) #2 ret void } declare i32 @SubpicDestroyClone(i32 noundef) local_unnamed_addr #1 declare i32 @free(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_4__", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
vlc_modules_spu_extr_subsdelay.c_SubsdelayEntryDestroy
; ModuleID = 'AnghaBench/linux/security/keys/extr_request_key_auth.c_request_key_auth_new.c' source_filename = "AnghaBench/linux/security/keys/extr_request_key_auth.c_request_key_auth_new.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.request_key_auth = type { i64, ptr, ptr, i32, ptr, i32, i32 } %struct.cred = type { i32, i32, ptr } %struct.TYPE_5__ = type { i32, %struct.TYPE_4__, i32 } %struct.TYPE_4__ = type { ptr } %struct.key = type { i32, i32 } @ENOMEM = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [4 x i8] c"%d,\00", align 1 @GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4 @KEY_FLAG_REVOKED = dso_local local_unnamed_addr global i32 0, align 4 @EKEYREVOKED = dso_local local_unnamed_addr global i32 0, align 4 @current = dso_local local_unnamed_addr global ptr null, align 8 @.str.1 = private unnamed_addr constant [3 x i8] c"%x\00", align 1 @key_type_request_key_auth = dso_local global i32 0, align 4 @KEY_POS_VIEW = dso_local local_unnamed_addr global i32 0, align 4 @KEY_POS_READ = dso_local local_unnamed_addr global i32 0, align 4 @KEY_POS_SEARCH = dso_local local_unnamed_addr global i32 0, align 4 @KEY_POS_LINK = dso_local local_unnamed_addr global i32 0, align 4 @KEY_USR_VIEW = dso_local local_unnamed_addr global i32 0, align 4 @KEY_ALLOC_NOT_IN_QUOTA = dso_local local_unnamed_addr global i32 0, align 4 @.str.2 = private unnamed_addr constant [11 x i8] c" = {%d,%d}\00", align 1 @.str.3 = private unnamed_addr constant [5 x i8] c"= %d\00", align 1 ; Function Attrs: nounwind uwtable define dso_local ptr @request_key_auth_new(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3, ptr noundef %4) local_unnamed_addr #0 { %6 = alloca [20 x i8], align 16 %7 = tail call ptr (...) @current_cred() #3 call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %6) #3 %8 = load i32, ptr @ENOMEM, align 4, !tbaa !5 %9 = sub nsw i32 0, %8 %10 = load i32, ptr %0, align 4, !tbaa !9 %11 = tail call i32 @kenter(ptr noundef nonnull @.str, i32 noundef %10) #3 %12 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5 %13 = tail call ptr @kzalloc(i32 noundef 48, i32 noundef %12) #3 %14 = icmp eq ptr %13, null br i1 %14, label %96, label %15 15: ; preds = %5 %16 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5 %17 = tail call i32 @kmemdup(ptr noundef %2, i64 noundef %3, i32 noundef %16) #3 %18 = getelementptr inbounds %struct.request_key_auth, ptr %13, i64 0, i32 6 store i32 %17, ptr %18, align 4, !tbaa !11 %19 = icmp eq i32 %17, 0 br i1 %19, label %93, label %20 20: ; preds = %15 store i64 %3, ptr %13, align 8, !tbaa !15 %21 = getelementptr inbounds %struct.request_key_auth, ptr %13, i64 0, i32 5 %22 = load i32, ptr %21, align 8, !tbaa !16 %23 = tail call i32 @strlcpy(i32 noundef %22, ptr noundef %1, i32 noundef 4) #3 %24 = getelementptr inbounds %struct.cred, ptr %7, i64 0, i32 2 %25 = load ptr, ptr %24, align 8, !tbaa !17 %26 = icmp eq ptr %25, null br i1 %26, label %52, label %27 27: ; preds = %20 %28 = tail call i32 @down_read(ptr noundef nonnull %25) #3 %29 = load i32, ptr @KEY_FLAG_REVOKED, align 4, !tbaa !5 %30 = load ptr, ptr %24, align 8, !tbaa !17 %31 = getelementptr inbounds %struct.TYPE_5__, ptr %30, i64 0, i32 2 %32 = tail call i64 @test_bit(i32 noundef %29, ptr noundef nonnull %31) #3 %33 = icmp eq i64 %32, 0 %34 = load ptr, ptr %24, align 8, !tbaa !17 br i1 %33, label %39, label %35 35: ; preds = %27 %36 = tail call i32 @up_read(ptr noundef %34) #3 %37 = load i32, ptr @EKEYREVOKED, align 4, !tbaa !5 %38 = sub nsw i32 0, %37 br label %93 39: ; preds = %27 %40 = getelementptr inbounds %struct.TYPE_5__, ptr %34, i64 0, i32 1 %41 = load ptr, ptr %40, align 8, !tbaa !19 %42 = load ptr, ptr %41, align 8, !tbaa !22 %43 = getelementptr inbounds %struct.request_key_auth, ptr %42, i64 0, i32 4 %44 = load ptr, ptr %43, align 8, !tbaa !23 %45 = tail call ptr @get_cred(ptr noundef %44) #3 %46 = getelementptr inbounds %struct.request_key_auth, ptr %13, i64 0, i32 4 store ptr %45, ptr %46, align 8, !tbaa !23 %47 = getelementptr inbounds %struct.request_key_auth, ptr %42, i64 0, i32 3 %48 = load i32, ptr %47, align 8, !tbaa !24 %49 = getelementptr inbounds %struct.request_key_auth, ptr %13, i64 0, i32 3 store i32 %48, ptr %49, align 8, !tbaa !24 %50 = load ptr, ptr %24, align 8, !tbaa !17 %51 = tail call i32 @up_read(ptr noundef %50) #3 br label %58 52: ; preds = %20 %53 = tail call ptr @get_cred(ptr noundef nonnull %7) #3 %54 = getelementptr inbounds %struct.request_key_auth, ptr %13, i64 0, i32 4 store ptr %53, ptr %54, align 8, !tbaa !23 %55 = load ptr, ptr @current, align 8, !tbaa !22 %56 = load i32, ptr %55, align 4, !tbaa !25 %57 = getelementptr inbounds %struct.request_key_auth, ptr %13, i64 0, i32 3 store i32 %56, ptr %57, align 8, !tbaa !24 br label %58 58: ; preds = %52, %39 %59 = tail call ptr @key_get(ptr noundef nonnull %0) #3 %60 = getelementptr inbounds %struct.request_key_auth, ptr %13, i64 0, i32 2 store ptr %59, ptr %60, align 8, !tbaa !27 %61 = tail call ptr @key_get(ptr noundef %4) #3 %62 = getelementptr inbounds %struct.request_key_auth, ptr %13, i64 0, i32 1 store ptr %61, ptr %62, align 8, !tbaa !28 %63 = load i32, ptr %0, align 4, !tbaa !9 %64 = call i32 @sprintf(ptr noundef nonnull %6, ptr noundef nonnull @.str.1, i32 noundef %63) #3 %65 = getelementptr inbounds %struct.cred, ptr %7, i64 0, i32 1 %66 = load i32, ptr %65, align 4, !tbaa !29 %67 = load i32, ptr %7, align 8, !tbaa !30 %68 = load i32, ptr @KEY_POS_VIEW, align 4, !tbaa !5 %69 = load i32, ptr @KEY_POS_READ, align 4, !tbaa !5 %70 = or i32 %69, %68 %71 = load i32, ptr @KEY_POS_SEARCH, align 4, !tbaa !5 %72 = or i32 %70, %71 %73 = load i32, ptr @KEY_POS_LINK, align 4, !tbaa !5 %74 = or i32 %72, %73 %75 = load i32, ptr @KEY_USR_VIEW, align 4, !tbaa !5 %76 = or i32 %74, %75 %77 = load i32, ptr @KEY_ALLOC_NOT_IN_QUOTA, align 4, !tbaa !5 %78 = call ptr @key_alloc(ptr noundef nonnull @key_type_request_key_auth, ptr noundef nonnull %6, i32 noundef %66, i32 noundef %67, ptr noundef nonnull %7, i32 noundef %76, i32 noundef %77, ptr noundef null) #3 %79 = call i64 @IS_ERR(ptr noundef %78) #3 %80 = icmp eq i64 %79, 0 br i1 %80, label %83, label %81 81: ; preds = %58 %82 = call i32 @PTR_ERR(ptr noundef %78) #3 br label %93 83: ; preds = %58 %84 = call i32 @key_instantiate_and_link(ptr noundef %78, ptr noundef nonnull %13, i32 noundef 0, ptr noundef null, ptr noundef null) #3 %85 = icmp slt i32 %84, 0 br i1 %85, label %91, label %86 86: ; preds = %83 %87 = load i32, ptr %78, align 4, !tbaa !9 %88 = getelementptr inbounds %struct.key, ptr %78, i64 0, i32 1 %89 = call i32 @refcount_read(ptr noundef nonnull %88) #3 %90 = call i32 (ptr, i32, ...) @kleave(ptr noundef nonnull @.str.2, i32 noundef %87, i32 noundef %89) #3 br label %100 91: ; preds = %83 %92 = call i32 @key_put(ptr noundef %78) #3 br label %93 93: ; preds = %15, %91, %81, %35 %94 = phi i32 [ %38, %35 ], [ %82, %81 ], [ %84, %91 ], [ %9, %15 ] %95 = call i32 @free_request_key_auth(ptr noundef nonnull %13) #3 br label %96 96: ; preds = %5, %93 %97 = phi i32 [ %94, %93 ], [ %9, %5 ] %98 = call i32 (ptr, i32, ...) @kleave(ptr noundef nonnull @.str.3, i32 noundef %97) #3 %99 = call ptr @ERR_PTR(i32 noundef %97) #3 br label %100 100: ; preds = %96, %86 %101 = phi ptr [ %99, %96 ], [ %78, %86 ] call void @llvm.lifetime.end.p0(i64 20, ptr nonnull %6) #3 ret ptr %101 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @current_cred(...) local_unnamed_addr #2 declare i32 @kenter(ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @kmemdup(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @strlcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @down_read(ptr noundef) local_unnamed_addr #2 declare i64 @test_bit(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @up_read(ptr noundef) local_unnamed_addr #2 declare ptr @get_cred(ptr noundef) local_unnamed_addr #2 declare ptr @key_get(ptr noundef) local_unnamed_addr #2 declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @key_alloc(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #2 declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #2 declare i32 @key_instantiate_and_link(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @kleave(ptr noundef, i32 noundef, ...) local_unnamed_addr #2 declare i32 @refcount_read(ptr noundef) local_unnamed_addr #2 declare i32 @key_put(ptr noundef) local_unnamed_addr #2 declare i32 @free_request_key_auth(ptr noundef) local_unnamed_addr #2 declare ptr @ERR_PTR(i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"key", !6, i64 0, !6, i64 4} !11 = !{!12, !6, i64 44} !12 = !{!"request_key_auth", !13, i64 0, !14, i64 8, !14, i64 16, !6, i64 24, !14, i64 32, !6, i64 40, !6, i64 44} !13 = !{!"long", !7, i64 0} !14 = !{!"any pointer", !7, i64 0} !15 = !{!12, !13, i64 0} !16 = !{!12, !6, i64 40} !17 = !{!18, !14, i64 8} !18 = !{!"cred", !6, i64 0, !6, i64 4, !14, i64 8} !19 = !{!20, !14, i64 8} !20 = !{!"TYPE_5__", !6, i64 0, !21, i64 8, !6, i64 16} !21 = !{!"TYPE_4__", !14, i64 0} !22 = !{!14, !14, i64 0} !23 = !{!12, !14, i64 32} !24 = !{!12, !6, i64 24} !25 = !{!26, !6, i64 0} !26 = !{!"TYPE_6__", !6, i64 0} !27 = !{!12, !14, i64 16} !28 = !{!12, !14, i64 8} !29 = !{!18, !6, i64 4} !30 = !{!18, !6, i64 0}
; ModuleID = 'AnghaBench/linux/security/keys/extr_request_key_auth.c_request_key_auth_new.c' source_filename = "AnghaBench/linux/security/keys/extr_request_key_auth.c_request_key_auth_new.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @ENOMEM = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [4 x i8] c"%d,\00", align 1 @GFP_KERNEL = common local_unnamed_addr global i32 0, align 4 @KEY_FLAG_REVOKED = common local_unnamed_addr global i32 0, align 4 @EKEYREVOKED = common local_unnamed_addr global i32 0, align 4 @current = common local_unnamed_addr global ptr null, align 8 @.str.1 = private unnamed_addr constant [3 x i8] c"%x\00", align 1 @key_type_request_key_auth = common global i32 0, align 4 @KEY_POS_VIEW = common local_unnamed_addr global i32 0, align 4 @KEY_POS_READ = common local_unnamed_addr global i32 0, align 4 @KEY_POS_SEARCH = common local_unnamed_addr global i32 0, align 4 @KEY_POS_LINK = common local_unnamed_addr global i32 0, align 4 @KEY_USR_VIEW = common local_unnamed_addr global i32 0, align 4 @KEY_ALLOC_NOT_IN_QUOTA = common local_unnamed_addr global i32 0, align 4 @.str.2 = private unnamed_addr constant [11 x i8] c" = {%d,%d}\00", align 1 @.str.3 = private unnamed_addr constant [5 x i8] c"= %d\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define ptr @request_key_auth_new(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3, ptr noundef %4) local_unnamed_addr #0 { %6 = alloca [20 x i8], align 1 %7 = tail call ptr @current_cred() #3 call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %6) #3 %8 = load i32, ptr @ENOMEM, align 4, !tbaa !6 %9 = sub nsw i32 0, %8 %10 = load i32, ptr %0, align 4, !tbaa !10 %11 = tail call i32 @kenter(ptr noundef nonnull @.str, i32 noundef %10) #3 %12 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6 %13 = tail call ptr @kzalloc(i32 noundef 48, i32 noundef %12) #3 %14 = icmp eq ptr %13, null br i1 %14, label %96, label %15 15: ; preds = %5 %16 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6 %17 = tail call i32 @kmemdup(ptr noundef %2, i64 noundef %3, i32 noundef %16) #3 %18 = getelementptr inbounds i8, ptr %13, i64 44 store i32 %17, ptr %18, align 4, !tbaa !12 %19 = icmp eq i32 %17, 0 br i1 %19, label %93, label %20 20: ; preds = %15 store i64 %3, ptr %13, align 8, !tbaa !16 %21 = getelementptr inbounds i8, ptr %13, i64 40 %22 = load i32, ptr %21, align 8, !tbaa !17 %23 = tail call i32 @strlcpy(i32 noundef %22, ptr noundef %1, i32 noundef 4) #3 %24 = getelementptr inbounds i8, ptr %7, i64 8 %25 = load ptr, ptr %24, align 8, !tbaa !18 %26 = icmp eq ptr %25, null br i1 %26, label %52, label %27 27: ; preds = %20 %28 = tail call i32 @down_read(ptr noundef nonnull %25) #3 %29 = load i32, ptr @KEY_FLAG_REVOKED, align 4, !tbaa !6 %30 = load ptr, ptr %24, align 8, !tbaa !18 %31 = getelementptr inbounds i8, ptr %30, i64 16 %32 = tail call i64 @test_bit(i32 noundef %29, ptr noundef nonnull %31) #3 %33 = icmp eq i64 %32, 0 %34 = load ptr, ptr %24, align 8, !tbaa !18 br i1 %33, label %39, label %35 35: ; preds = %27 %36 = tail call i32 @up_read(ptr noundef %34) #3 %37 = load i32, ptr @EKEYREVOKED, align 4, !tbaa !6 %38 = sub nsw i32 0, %37 br label %93 39: ; preds = %27 %40 = getelementptr inbounds i8, ptr %34, i64 8 %41 = load ptr, ptr %40, align 8, !tbaa !20 %42 = load ptr, ptr %41, align 8, !tbaa !23 %43 = getelementptr inbounds i8, ptr %42, i64 32 %44 = load ptr, ptr %43, align 8, !tbaa !24 %45 = tail call ptr @get_cred(ptr noundef %44) #3 %46 = getelementptr inbounds i8, ptr %13, i64 32 store ptr %45, ptr %46, align 8, !tbaa !24 %47 = getelementptr inbounds i8, ptr %42, i64 24 %48 = load i32, ptr %47, align 8, !tbaa !25 %49 = getelementptr inbounds i8, ptr %13, i64 24 store i32 %48, ptr %49, align 8, !tbaa !25 %50 = load ptr, ptr %24, align 8, !tbaa !18 %51 = tail call i32 @up_read(ptr noundef %50) #3 br label %58 52: ; preds = %20 %53 = tail call ptr @get_cred(ptr noundef nonnull %7) #3 %54 = getelementptr inbounds i8, ptr %13, i64 32 store ptr %53, ptr %54, align 8, !tbaa !24 %55 = load ptr, ptr @current, align 8, !tbaa !23 %56 = load i32, ptr %55, align 4, !tbaa !26 %57 = getelementptr inbounds i8, ptr %13, i64 24 store i32 %56, ptr %57, align 8, !tbaa !25 br label %58 58: ; preds = %52, %39 %59 = tail call ptr @key_get(ptr noundef nonnull %0) #3 %60 = getelementptr inbounds i8, ptr %13, i64 16 store ptr %59, ptr %60, align 8, !tbaa !28 %61 = tail call ptr @key_get(ptr noundef %4) #3 %62 = getelementptr inbounds i8, ptr %13, i64 8 store ptr %61, ptr %62, align 8, !tbaa !29 %63 = load i32, ptr %0, align 4, !tbaa !10 %64 = call i32 @sprintf(ptr noundef nonnull %6, ptr noundef nonnull @.str.1, i32 noundef %63) #3 %65 = getelementptr inbounds i8, ptr %7, i64 4 %66 = load i32, ptr %65, align 4, !tbaa !30 %67 = load i32, ptr %7, align 8, !tbaa !31 %68 = load i32, ptr @KEY_POS_VIEW, align 4, !tbaa !6 %69 = load i32, ptr @KEY_POS_READ, align 4, !tbaa !6 %70 = or i32 %69, %68 %71 = load i32, ptr @KEY_POS_SEARCH, align 4, !tbaa !6 %72 = or i32 %70, %71 %73 = load i32, ptr @KEY_POS_LINK, align 4, !tbaa !6 %74 = or i32 %72, %73 %75 = load i32, ptr @KEY_USR_VIEW, align 4, !tbaa !6 %76 = or i32 %74, %75 %77 = load i32, ptr @KEY_ALLOC_NOT_IN_QUOTA, align 4, !tbaa !6 %78 = call ptr @key_alloc(ptr noundef nonnull @key_type_request_key_auth, ptr noundef nonnull %6, i32 noundef %66, i32 noundef %67, ptr noundef nonnull %7, i32 noundef %76, i32 noundef %77, ptr noundef null) #3 %79 = call i64 @IS_ERR(ptr noundef %78) #3 %80 = icmp eq i64 %79, 0 br i1 %80, label %83, label %81 81: ; preds = %58 %82 = call i32 @PTR_ERR(ptr noundef %78) #3 br label %93 83: ; preds = %58 %84 = call i32 @key_instantiate_and_link(ptr noundef %78, ptr noundef nonnull %13, i32 noundef 0, ptr noundef null, ptr noundef null) #3 %85 = icmp slt i32 %84, 0 br i1 %85, label %91, label %86 86: ; preds = %83 %87 = load i32, ptr %78, align 4, !tbaa !10 %88 = getelementptr inbounds i8, ptr %78, i64 4 %89 = call i32 @refcount_read(ptr noundef nonnull %88) #3 %90 = call i32 (ptr, i32, ...) @kleave(ptr noundef nonnull @.str.2, i32 noundef %87, i32 noundef %89) #3 br label %100 91: ; preds = %83 %92 = call i32 @key_put(ptr noundef %78) #3 br label %93 93: ; preds = %15, %91, %81, %35 %94 = phi i32 [ %38, %35 ], [ %82, %81 ], [ %84, %91 ], [ %9, %15 ] %95 = call i32 @free_request_key_auth(ptr noundef nonnull %13) #3 br label %96 96: ; preds = %5, %93 %97 = phi i32 [ %94, %93 ], [ %9, %5 ] %98 = call i32 (ptr, i32, ...) @kleave(ptr noundef nonnull @.str.3, i32 noundef %97) #3 %99 = call ptr @ERR_PTR(i32 noundef %97) #3 br label %100 100: ; preds = %96, %86 %101 = phi ptr [ %99, %96 ], [ %78, %86 ] call void @llvm.lifetime.end.p0(i64 20, ptr nonnull %6) #3 ret ptr %101 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare ptr @current_cred(...) local_unnamed_addr #2 declare i32 @kenter(ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @kmemdup(ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @strlcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @down_read(ptr noundef) local_unnamed_addr #2 declare i64 @test_bit(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @up_read(ptr noundef) local_unnamed_addr #2 declare ptr @get_cred(ptr noundef) local_unnamed_addr #2 declare ptr @key_get(ptr noundef) local_unnamed_addr #2 declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare ptr @key_alloc(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #2 declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #2 declare i32 @key_instantiate_and_link(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @kleave(ptr noundef, i32 noundef, ...) local_unnamed_addr #2 declare i32 @refcount_read(ptr noundef) local_unnamed_addr #2 declare i32 @key_put(ptr noundef) local_unnamed_addr #2 declare i32 @free_request_key_auth(ptr noundef) local_unnamed_addr #2 declare ptr @ERR_PTR(i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"key", !7, i64 0, !7, i64 4} !12 = !{!13, !7, i64 44} !13 = !{!"request_key_auth", !14, i64 0, !15, i64 8, !15, i64 16, !7, i64 24, !15, i64 32, !7, i64 40, !7, i64 44} !14 = !{!"long", !8, i64 0} !15 = !{!"any pointer", !8, i64 0} !16 = !{!13, !14, i64 0} !17 = !{!13, !7, i64 40} !18 = !{!19, !15, i64 8} !19 = !{!"cred", !7, i64 0, !7, i64 4, !15, i64 8} !20 = !{!21, !15, i64 8} !21 = !{!"TYPE_5__", !7, i64 0, !22, i64 8, !7, i64 16} !22 = !{!"TYPE_4__", !15, i64 0} !23 = !{!15, !15, i64 0} !24 = !{!13, !15, i64 32} !25 = !{!13, !7, i64 24} !26 = !{!27, !7, i64 0} !27 = !{!"TYPE_6__", !7, i64 0} !28 = !{!13, !15, i64 16} !29 = !{!13, !15, i64 8} !30 = !{!19, !7, i64 4} !31 = !{!19, !7, i64 0}
linux_security_keys_extr_request_key_auth.c_request_key_auth_new
; ModuleID = 'AnghaBench/FFmpeg/libavformat/extr_img2enc.c_query_codec.c' source_filename = "AnghaBench/FFmpeg/libavformat/extr_img2enc.c_query_codec.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_2__ = type { i64 } @ff_img_tags = dso_local local_unnamed_addr global ptr null, align 8 @AV_CODEC_ID_NONE = dso_local local_unnamed_addr global i64 0, align 8 @FF_COMPLIANCE_NORMAL = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @query_codec], section "llvm.metadata" ; Function Attrs: nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable define internal i32 @query_codec(i32 noundef %0, i32 noundef %1) #0 { %3 = load ptr, ptr @ff_img_tags, align 8, !tbaa !5 %4 = load i64, ptr @AV_CODEC_ID_NONE, align 8, !tbaa !9 %5 = load i64, ptr %3, align 8, !tbaa !11 %6 = icmp eq i64 %5, %4 br i1 %6, label %18, label %7 7: ; preds = %2 %8 = zext i32 %0 to i64 br label %14 9: ; preds = %14 %10 = add nuw i64 %15, 1 %11 = getelementptr inbounds %struct.TYPE_2__, ptr %3, i64 %10 %12 = load i64, ptr %11, align 8, !tbaa !11 %13 = icmp eq i64 %12, %4 br i1 %13, label %18, label %14, !llvm.loop !13 14: ; preds = %7, %9 %15 = phi i64 [ 0, %7 ], [ %10, %9 ] %16 = phi i64 [ %5, %7 ], [ %12, %9 ] %17 = icmp eq i64 %16, %8 br i1 %17, label %22, label %9 18: ; preds = %9, %2 %19 = load i32, ptr @FF_COMPLIANCE_NORMAL, align 4, !tbaa !15 %20 = icmp sgt i32 %19, %1 %21 = zext i1 %20 to i32 br label %22 22: ; preds = %14, %18 %23 = phi i32 [ %21, %18 ], [ 1, %14 ] ret i32 %23 } attributes #0 = { nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"long", !7, i64 0} !11 = !{!12, !10, i64 0} !12 = !{!"TYPE_2__", !10, i64 0} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"} !15 = !{!16, !16, i64 0} !16 = !{!"int", !7, i64 0}
; ModuleID = 'AnghaBench/FFmpeg/libavformat/extr_img2enc.c_query_codec.c' source_filename = "AnghaBench/FFmpeg/libavformat/extr_img2enc.c_query_codec.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_2__ = type { i64 } @ff_img_tags = common local_unnamed_addr global ptr null, align 8 @AV_CODEC_ID_NONE = common local_unnamed_addr global i64 0, align 8 @FF_COMPLIANCE_NORMAL = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @query_codec], section "llvm.metadata" ; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) define internal range(i32 0, 2) i32 @query_codec(i32 noundef %0, i32 noundef %1) #0 { %3 = load ptr, ptr @ff_img_tags, align 8, !tbaa !6 %4 = load i64, ptr @AV_CODEC_ID_NONE, align 8, !tbaa !10 %5 = load i64, ptr %3, align 8, !tbaa !12 %6 = icmp eq i64 %5, %4 br i1 %6, label %18, label %7 7: ; preds = %2 %8 = zext i32 %0 to i64 br label %14 9: ; preds = %14 %10 = add nuw nsw i64 %15, 1 %11 = getelementptr inbounds %struct.TYPE_2__, ptr %3, i64 %10 %12 = load i64, ptr %11, align 8, !tbaa !12 %13 = icmp eq i64 %12, %4 br i1 %13, label %18, label %14, !llvm.loop !14 14: ; preds = %7, %9 %15 = phi i64 [ 0, %7 ], [ %10, %9 ] %16 = phi i64 [ %5, %7 ], [ %12, %9 ] %17 = icmp eq i64 %16, %8 br i1 %17, label %22, label %9 18: ; preds = %9, %2 %19 = load i32, ptr @FF_COMPLIANCE_NORMAL, align 4, !tbaa !16 %20 = icmp sgt i32 %19, %1 %21 = zext i1 %20 to i32 br label %22 22: ; preds = %14, %18 %23 = phi i32 [ %21, %18 ], [ 1, %14 ] ret i32 %23 } attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"long", !8, i64 0} !12 = !{!13, !11, i64 0} !13 = !{!"TYPE_2__", !11, i64 0} !14 = distinct !{!14, !15} !15 = !{!"llvm.loop.mustprogress"} !16 = !{!17, !17, i64 0} !17 = !{!"int", !8, i64 0}
FFmpeg_libavformat_extr_img2enc.c_query_codec
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/ssl/extr_tls_srp.c_SSL_CTX_SRP_CTX_init.c' source_filename = "AnghaBench/freebsd/crypto/openssl/ssl/extr_tls_srp.c_SSL_CTX_SRP_CTX_init.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @SRP_MINIMAL_N = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local noundef i32 @SSL_CTX_SRP_CTX_init(ptr noundef %0) local_unnamed_addr #0 { %2 = icmp eq ptr %0, null br i1 %2, label %6, label %3 3: ; preds = %1 %4 = tail call i32 @memset(ptr noundef nonnull %0, i32 noundef 0, i32 noundef 4) #2 %5 = load i32, ptr @SRP_MINIMAL_N, align 4, !tbaa !5 store i32 %5, ptr %0, align 4, !tbaa !9 br label %6 6: ; preds = %1, %3 %7 = phi i32 [ 1, %3 ], [ 0, %1 ] ret i32 %7 } declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"ssl_ctx_st", !11, i64 0} !11 = !{!"TYPE_2__", !6, i64 0}
; ModuleID = 'AnghaBench/freebsd/crypto/openssl/ssl/extr_tls_srp.c_SSL_CTX_SRP_CTX_init.c' source_filename = "AnghaBench/freebsd/crypto/openssl/ssl/extr_tls_srp.c_SSL_CTX_SRP_CTX_init.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SRP_MINIMAL_N = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define range(i32 0, 2) i32 @SSL_CTX_SRP_CTX_init(ptr noundef %0) local_unnamed_addr #0 { %2 = icmp eq ptr %0, null br i1 %2, label %6, label %3 3: ; preds = %1 %4 = tail call i32 @memset(ptr noundef nonnull %0, i32 noundef 0, i32 noundef 4) #2 %5 = load i32, ptr @SRP_MINIMAL_N, align 4, !tbaa !6 store i32 %5, ptr %0, align 4, !tbaa !10 br label %6 6: ; preds = %1, %3 %7 = phi i32 [ 1, %3 ], [ 0, %1 ] ret i32 %7 } declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"ssl_ctx_st", !12, i64 0} !12 = !{!"TYPE_2__", !7, i64 0}
freebsd_crypto_openssl_ssl_extr_tls_srp.c_SSL_CTX_SRP_CTX_init
; ModuleID = 'AnghaBench/goaccess/src/extr_util.c_int2str.c' source_filename = "AnghaBench/goaccess/src/extr_util.c_int2str.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [4 x i8] c"%*d\00", align 1 ; Function Attrs: nounwind uwtable define dso_local noundef ptr @int2str(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 { %3 = tail call i64 @snprintf(ptr noundef null, i32 noundef 0, ptr noundef nonnull @.str, i32 noundef %1, i32 noundef %0) #2 %4 = add nsw i64 %3, 1 %5 = tail call ptr @xmalloc(i64 noundef %4) #2 %6 = tail call i32 @sprintf(ptr noundef %5, ptr noundef nonnull @.str, i32 noundef %1, i32 noundef %0) #2 ret ptr %5 } declare ptr @xmalloc(i64 noundef) local_unnamed_addr #1 declare i64 @snprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/goaccess/src/extr_util.c_int2str.c' source_filename = "AnghaBench/goaccess/src/extr_util.c_int2str.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [4 x i8] c"%*d\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define noundef ptr @int2str(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 { %3 = tail call i64 @snprintf(ptr noundef null, i32 noundef 0, ptr noundef nonnull @.str, i32 noundef %1, i32 noundef %0) #2 %4 = add nsw i64 %3, 1 %5 = tail call ptr @xmalloc(i64 noundef %4) #2 %6 = tail call i32 @sprintf(ptr noundef %5, ptr noundef nonnull @.str, i32 noundef %1, i32 noundef %0) #2 ret ptr %5 } declare ptr @xmalloc(i64 noundef) local_unnamed_addr #1 declare i64 @snprintf(ptr noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
goaccess_src_extr_util.c_int2str
; ModuleID = 'AnghaBench/linux/drivers/usb/gadget/udc/extr_dummy_hcd.c_dummy_alloc_streams.c' source_filename = "AnghaBench/linux/drivers/usb/gadget/udc/extr_dummy_hcd.c_dummy_alloc_streams.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.dummy_hcd = type { i32, ptr } %struct.usb_host_endpoint = type { %struct.TYPE_5__, i32 } %struct.TYPE_5__ = type { i32 } @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [38 x i8] c"Ep 0x%x only supports %u stream IDs.\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @dummy_alloc_streams], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @dummy_alloc_streams(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef readonly %2, i32 noundef %3, i32 noundef %4, i32 %5) #0 { %7 = tail call ptr @hcd_to_dummy_hcd(ptr noundef %0) #2 %8 = icmp eq i32 %3, 0 br i1 %8, label %9, label %12 9: ; preds = %6 %10 = load i32, ptr @EINVAL, align 4, !tbaa !5 %11 = sub nsw i32 0, %10 br label %66 12: ; preds = %6 %13 = getelementptr inbounds %struct.dummy_hcd, ptr %7, i64 0, i32 1 %14 = load ptr, ptr %13, align 8, !tbaa !9 %15 = tail call i32 @spin_lock_irqsave(ptr noundef %14, i64 noundef undef) #2 %16 = zext i32 %3 to i64 br label %17 17: ; preds = %12, %45 %18 = phi i64 [ 0, %12 ], [ %47, %45 ] %19 = phi i32 [ %4, %12 ], [ %46, %45 ] %20 = getelementptr inbounds ptr, ptr %2, i64 %18 %21 = load ptr, ptr %20, align 8, !tbaa !12 %22 = tail call i32 @dummy_get_ep_idx(ptr noundef %21) #2 %23 = shl nuw i32 1, %22 %24 = load i32, ptr %7, align 8, !tbaa !13 %25 = and i32 %23, %24 %26 = icmp eq i32 %25, 0 br i1 %26, label %30, label %27 27: ; preds = %17 %28 = load i32, ptr @EINVAL, align 4, !tbaa !5 %29 = sub nsw i32 0, %28 br label %62 30: ; preds = %17 %31 = load ptr, ptr %20, align 8, !tbaa !12 %32 = getelementptr inbounds %struct.usb_host_endpoint, ptr %31, i64 0, i32 1 %33 = tail call i32 @usb_ss_max_streams(ptr noundef nonnull %32) #2 %34 = icmp eq i32 %33, 0 br i1 %34, label %35, label %38 35: ; preds = %30 %36 = load i32, ptr @EINVAL, align 4, !tbaa !5 %37 = sub nsw i32 0, %36 br label %62 38: ; preds = %30 %39 = icmp slt i32 %33, %19 br i1 %39, label %40, label %45 40: ; preds = %38 %41 = tail call i32 @dummy_dev(ptr noundef nonnull %7) #2 %42 = load ptr, ptr %20, align 8, !tbaa !12 %43 = load i32, ptr %42, align 4, !tbaa !14 %44 = tail call i32 @dev_dbg(i32 noundef %41, ptr noundef nonnull @.str, i32 noundef %43, i32 noundef %33) #2 br label %45 45: ; preds = %38, %40 %46 = phi i32 [ %33, %40 ], [ %19, %38 ] %47 = add nuw nsw i64 %18, 1 %48 = icmp eq i64 %47, %16 br i1 %48, label %49, label %17, !llvm.loop !17 49: ; preds = %45, %49 %50 = phi i64 [ %60, %49 ], [ 0, %45 ] %51 = getelementptr inbounds ptr, ptr %2, i64 %50 %52 = load ptr, ptr %51, align 8, !tbaa !12 %53 = tail call i32 @dummy_get_ep_idx(ptr noundef %52) #2 %54 = shl nuw i32 1, %53 %55 = load i32, ptr %7, align 8, !tbaa !13 %56 = or i32 %55, %54 store i32 %56, ptr %7, align 8, !tbaa !13 %57 = load ptr, ptr %51, align 8, !tbaa !12 %58 = tail call i32 @usb_endpoint_num(ptr noundef %57) #2 %59 = tail call i32 @set_max_streams_for_pipe(ptr noundef nonnull %7, i32 noundef %58, i32 noundef %46) #2 %60 = add nuw nsw i64 %50, 1 %61 = icmp eq i64 %60, %16 br i1 %61, label %62, label %49, !llvm.loop !19 62: ; preds = %49, %35, %27 %63 = phi i32 [ %29, %27 ], [ %37, %35 ], [ %46, %49 ] %64 = load ptr, ptr %13, align 8, !tbaa !9 %65 = tail call i32 @spin_unlock_irqrestore(ptr noundef %64, i64 noundef undef) #2 br label %66 66: ; preds = %62, %9 %67 = phi i32 [ %63, %62 ], [ %11, %9 ] ret i32 %67 } declare ptr @hcd_to_dummy_hcd(ptr noundef) local_unnamed_addr #1 declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @dummy_get_ep_idx(ptr noundef) local_unnamed_addr #1 declare i32 @usb_ss_max_streams(ptr noundef) local_unnamed_addr #1 declare i32 @dev_dbg(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dummy_dev(ptr noundef) local_unnamed_addr #1 declare i32 @set_max_streams_for_pipe(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @usb_endpoint_num(ptr noundef) local_unnamed_addr #1 declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 8} !10 = !{!"dummy_hcd", !6, i64 0, !11, i64 8} !11 = !{!"any pointer", !7, i64 0} !12 = !{!11, !11, i64 0} !13 = !{!10, !6, i64 0} !14 = !{!15, !6, i64 0} !15 = !{!"usb_host_endpoint", !16, i64 0, !6, i64 4} !16 = !{!"TYPE_5__", !6, i64 0} !17 = distinct !{!17, !18} !18 = !{!"llvm.loop.mustprogress"} !19 = distinct !{!19, !18}
; ModuleID = 'AnghaBench/linux/drivers/usb/gadget/udc/extr_dummy_hcd.c_dummy_alloc_streams.c' source_filename = "AnghaBench/linux/drivers/usb/gadget/udc/extr_dummy_hcd.c_dummy_alloc_streams.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EINVAL = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [38 x i8] c"Ep 0x%x only supports %u stream IDs.\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @dummy_alloc_streams], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @dummy_alloc_streams(ptr noundef %0, ptr nocapture readnone %1, ptr nocapture noundef readonly %2, i32 noundef %3, i32 noundef %4, i32 %5) #0 { %7 = tail call ptr @hcd_to_dummy_hcd(ptr noundef %0) #2 %8 = icmp eq i32 %3, 0 br i1 %8, label %9, label %12 9: ; preds = %6 %10 = load i32, ptr @EINVAL, align 4, !tbaa !6 %11 = sub nsw i32 0, %10 br label %66 12: ; preds = %6 %13 = getelementptr inbounds i8, ptr %7, i64 8 %14 = load ptr, ptr %13, align 8, !tbaa !10 %15 = tail call i32 @spin_lock_irqsave(ptr noundef %14, i64 noundef undef) #2 %16 = zext i32 %3 to i64 br label %17 17: ; preds = %12, %45 %18 = phi i64 [ 0, %12 ], [ %47, %45 ] %19 = phi i32 [ %4, %12 ], [ %46, %45 ] %20 = getelementptr inbounds ptr, ptr %2, i64 %18 %21 = load ptr, ptr %20, align 8, !tbaa !13 %22 = tail call i32 @dummy_get_ep_idx(ptr noundef %21) #2 %23 = shl nuw i32 1, %22 %24 = load i32, ptr %7, align 8, !tbaa !14 %25 = and i32 %23, %24 %26 = icmp eq i32 %25, 0 br i1 %26, label %30, label %27 27: ; preds = %17 %28 = load i32, ptr @EINVAL, align 4, !tbaa !6 %29 = sub nsw i32 0, %28 br label %62 30: ; preds = %17 %31 = load ptr, ptr %20, align 8, !tbaa !13 %32 = getelementptr inbounds i8, ptr %31, i64 4 %33 = tail call i32 @usb_ss_max_streams(ptr noundef nonnull %32) #2 %34 = icmp eq i32 %33, 0 br i1 %34, label %35, label %38 35: ; preds = %30 %36 = load i32, ptr @EINVAL, align 4, !tbaa !6 %37 = sub nsw i32 0, %36 br label %62 38: ; preds = %30 %39 = icmp slt i32 %33, %19 br i1 %39, label %40, label %45 40: ; preds = %38 %41 = tail call i32 @dummy_dev(ptr noundef nonnull %7) #2 %42 = load ptr, ptr %20, align 8, !tbaa !13 %43 = load i32, ptr %42, align 4, !tbaa !15 %44 = tail call i32 @dev_dbg(i32 noundef %41, ptr noundef nonnull @.str, i32 noundef %43, i32 noundef %33) #2 br label %45 45: ; preds = %38, %40 %46 = phi i32 [ %33, %40 ], [ %19, %38 ] %47 = add nuw nsw i64 %18, 1 %48 = icmp eq i64 %47, %16 br i1 %48, label %49, label %17, !llvm.loop !18 49: ; preds = %45, %49 %50 = phi i64 [ %60, %49 ], [ 0, %45 ] %51 = getelementptr inbounds ptr, ptr %2, i64 %50 %52 = load ptr, ptr %51, align 8, !tbaa !13 %53 = tail call i32 @dummy_get_ep_idx(ptr noundef %52) #2 %54 = shl nuw i32 1, %53 %55 = load i32, ptr %7, align 8, !tbaa !14 %56 = or i32 %55, %54 store i32 %56, ptr %7, align 8, !tbaa !14 %57 = load ptr, ptr %51, align 8, !tbaa !13 %58 = tail call i32 @usb_endpoint_num(ptr noundef %57) #2 %59 = tail call i32 @set_max_streams_for_pipe(ptr noundef nonnull %7, i32 noundef %58, i32 noundef %46) #2 %60 = add nuw nsw i64 %50, 1 %61 = icmp eq i64 %60, %16 br i1 %61, label %62, label %49, !llvm.loop !20 62: ; preds = %49, %35, %27 %63 = phi i32 [ %29, %27 ], [ %37, %35 ], [ %46, %49 ] %64 = load ptr, ptr %13, align 8, !tbaa !10 %65 = tail call i32 @spin_unlock_irqrestore(ptr noundef %64, i64 noundef undef) #2 br label %66 66: ; preds = %62, %9 %67 = phi i32 [ %63, %62 ], [ %11, %9 ] ret i32 %67 } declare ptr @hcd_to_dummy_hcd(ptr noundef) local_unnamed_addr #1 declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @dummy_get_ep_idx(ptr noundef) local_unnamed_addr #1 declare i32 @usb_ss_max_streams(ptr noundef) local_unnamed_addr #1 declare i32 @dev_dbg(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dummy_dev(ptr noundef) local_unnamed_addr #1 declare i32 @set_max_streams_for_pipe(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @usb_endpoint_num(ptr noundef) local_unnamed_addr #1 declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 8} !11 = !{!"dummy_hcd", !7, i64 0, !12, i64 8} !12 = !{!"any pointer", !8, i64 0} !13 = !{!12, !12, i64 0} !14 = !{!11, !7, i64 0} !15 = !{!16, !7, i64 0} !16 = !{!"usb_host_endpoint", !17, i64 0, !7, i64 4} !17 = !{!"TYPE_5__", !7, i64 0} !18 = distinct !{!18, !19} !19 = !{!"llvm.loop.mustprogress"} !20 = distinct !{!20, !19}
linux_drivers_usb_gadget_udc_extr_dummy_hcd.c_dummy_alloc_streams
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/char/extr_stallion.c_stl_cd1400ccrwait.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/char/extr_stallion.c_stl_cd1400ccrwait.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.stlport = type { i32, i32, i32 } @CCR_MAXWAIT = dso_local local_unnamed_addr global i32 0, align 4 @CCR = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [58 x i8] c"STALLION: cd1400 not responding, port=%d panel=%d brd=%d\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @stl_cd1400ccrwait], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @stl_cd1400ccrwait(ptr noundef %0) #0 { %2 = load i32, ptr @CCR_MAXWAIT, align 4, !tbaa !5 %3 = icmp sgt i32 %2, 0 br i1 %3, label %8, label %13 4: ; preds = %8 %5 = add nuw nsw i32 %9, 1 %6 = load i32, ptr @CCR_MAXWAIT, align 4, !tbaa !5 %7 = icmp slt i32 %5, %6 br i1 %7, label %8, label %13, !llvm.loop !9 8: ; preds = %1, %4 %9 = phi i32 [ %5, %4 ], [ 0, %1 ] %10 = load i32, ptr @CCR, align 4, !tbaa !5 %11 = tail call i64 @stl_cd1400getreg(ptr noundef %0, i32 noundef %10) #2 %12 = icmp eq i64 %11, 0 br i1 %12, label %20, label %4 13: ; preds = %4, %1 %14 = getelementptr inbounds %struct.stlport, ptr %0, i64 0, i32 2 %15 = load i32, ptr %14, align 4, !tbaa !11 %16 = getelementptr inbounds %struct.stlport, ptr %0, i64 0, i32 1 %17 = load i32, ptr %16, align 4, !tbaa !13 %18 = load i32, ptr %0, align 4, !tbaa !14 %19 = tail call i32 @printk(ptr noundef nonnull @.str, i32 noundef %15, i32 noundef %17, i32 noundef %18) #2 br label %20 20: ; preds = %8, %13 ret void } declare i64 @stl_cd1400getreg(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @printk(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = distinct !{!9, !10} !10 = !{!"llvm.loop.mustprogress"} !11 = !{!12, !6, i64 8} !12 = !{!"stlport", !6, i64 0, !6, i64 4, !6, i64 8} !13 = !{!12, !6, i64 4} !14 = !{!12, !6, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/char/extr_stallion.c_stl_cd1400ccrwait.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/char/extr_stallion.c_stl_cd1400ccrwait.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @CCR_MAXWAIT = common local_unnamed_addr global i32 0, align 4 @CCR = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [58 x i8] c"STALLION: cd1400 not responding, port=%d panel=%d brd=%d\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @stl_cd1400ccrwait], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @stl_cd1400ccrwait(ptr noundef %0) #0 { %2 = load i32, ptr @CCR_MAXWAIT, align 4, !tbaa !6 %3 = icmp sgt i32 %2, 0 br i1 %3, label %8, label %13 4: ; preds = %8 %5 = add nuw nsw i32 %9, 1 %6 = load i32, ptr @CCR_MAXWAIT, align 4, !tbaa !6 %7 = icmp slt i32 %5, %6 br i1 %7, label %8, label %13, !llvm.loop !10 8: ; preds = %1, %4 %9 = phi i32 [ %5, %4 ], [ 0, %1 ] %10 = load i32, ptr @CCR, align 4, !tbaa !6 %11 = tail call i64 @stl_cd1400getreg(ptr noundef %0, i32 noundef %10) #2 %12 = icmp eq i64 %11, 0 br i1 %12, label %20, label %4 13: ; preds = %4, %1 %14 = getelementptr inbounds i8, ptr %0, i64 8 %15 = load i32, ptr %14, align 4, !tbaa !12 %16 = getelementptr inbounds i8, ptr %0, i64 4 %17 = load i32, ptr %16, align 4, !tbaa !14 %18 = load i32, ptr %0, align 4, !tbaa !15 %19 = tail call i32 @printk(ptr noundef nonnull @.str, i32 noundef %15, i32 noundef %17, i32 noundef %18) #2 br label %20 20: ; preds = %8, %13 ret void } declare i64 @stl_cd1400getreg(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @printk(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = distinct !{!10, !11} !11 = !{!"llvm.loop.mustprogress"} !12 = !{!13, !7, i64 8} !13 = !{!"stlport", !7, i64 0, !7, i64 4, !7, i64 8} !14 = !{!13, !7, i64 4} !15 = !{!13, !7, i64 0}
fastsocket_kernel_drivers_char_extr_stallion.c_stl_cd1400ccrwait
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Pack.c_JsonStrToPack.c' source_filename = "AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Pack.c_JsonStrToPack.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local ptr @JsonStrToPack(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call ptr @StrToJson(ptr noundef %0) #2 %3 = icmp eq ptr %2, null br i1 %3, label %7, label %4 4: ; preds = %1 %5 = tail call ptr @JsonToPack(ptr noundef nonnull %2) #2 %6 = tail call i32 @JsonFree(ptr noundef nonnull %2) #2 br label %7 7: ; preds = %1, %4 %8 = phi ptr [ %5, %4 ], [ null, %1 ] ret ptr %8 } declare ptr @StrToJson(ptr noundef) local_unnamed_addr #1 declare ptr @JsonToPack(ptr noundef) local_unnamed_addr #1 declare i32 @JsonFree(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Pack.c_JsonStrToPack.c' source_filename = "AnghaBench/SoftEtherVPN/src/Mayaqua/extr_Pack.c_JsonStrToPack.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define ptr @JsonStrToPack(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call ptr @StrToJson(ptr noundef %0) #2 %3 = icmp eq ptr %2, null br i1 %3, label %7, label %4 4: ; preds = %1 %5 = tail call ptr @JsonToPack(ptr noundef nonnull %2) #2 %6 = tail call i32 @JsonFree(ptr noundef nonnull %2) #2 br label %7 7: ; preds = %1, %4 %8 = phi ptr [ %5, %4 ], [ null, %1 ] ret ptr %8 } declare ptr @StrToJson(ptr noundef) local_unnamed_addr #1 declare ptr @JsonToPack(ptr noundef) local_unnamed_addr #1 declare i32 @JsonFree(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
SoftEtherVPN_src_Mayaqua_extr_Pack.c_JsonStrToPack
; ModuleID = 'AnghaBench/reactos/dll/3rdparty/libtiff/extr_tif_unix.c__TIFFmemcpy.c' source_filename = "AnghaBench/reactos/dll/3rdparty/libtiff/extr_tif_unix.c__TIFFmemcpy.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local void @_TIFFmemcpy(ptr noundef %0, ptr noundef %1, i64 noundef %2) local_unnamed_addr #0 { %4 = tail call i32 @memcpy(ptr noundef %0, ptr noundef %1, i64 noundef %2) #2 ret void } declare i32 @memcpy(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/reactos/dll/3rdparty/libtiff/extr_tif_unix.c__TIFFmemcpy.c' source_filename = "AnghaBench/reactos/dll/3rdparty/libtiff/extr_tif_unix.c__TIFFmemcpy.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define void @_TIFFmemcpy(ptr noundef %0, ptr noundef %1, i64 noundef %2) local_unnamed_addr #0 { %4 = tail call i32 @memcpy(ptr noundef %0, ptr noundef %1, i64 noundef %2) #2 ret void } declare i32 @memcpy(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
reactos_dll_3rdparty_libtiff_extr_tif_unix.c__TIFFmemcpy
; ModuleID = 'AnghaBench/freebsd/sys/contrib/zstd/programs/extr_zstdcli.c_readU32FromChar.c' source_filename = "AnghaBench/freebsd/sys/contrib/zstd/programs/extr_zstdcli.c_readU32FromChar.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @readU32FromChar.errorMsg = internal constant [31 x i8] c"error: numeric value too large\00", align 16 @llvm.compiler.used = appending global [1 x ptr] [ptr @readU32FromChar], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @readU32FromChar(ptr noundef %0) #0 { %2 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 %3 = call i64 @readU32FromCharChecked(ptr noundef %0, ptr noundef nonnull %2) #3 %4 = icmp eq i64 %3, 0 br i1 %4, label %7, label %5 5: ; preds = %1 %6 = call i32 @errorOut(ptr noundef nonnull @readU32FromChar.errorMsg) #3 br label %7 7: ; preds = %5, %1 %8 = load i32, ptr %2, align 4, !tbaa !5 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 ret i32 %8 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i64 @readU32FromCharChecked(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @errorOut(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/freebsd/sys/contrib/zstd/programs/extr_zstdcli.c_readU32FromChar.c' source_filename = "AnghaBench/freebsd/sys/contrib/zstd/programs/extr_zstdcli.c_readU32FromChar.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @readU32FromChar.errorMsg = internal constant [31 x i8] c"error: numeric value too large\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @readU32FromChar], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @readU32FromChar(ptr noundef %0) #0 { %2 = alloca i32, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 %3 = call i64 @readU32FromCharChecked(ptr noundef %0, ptr noundef nonnull %2) #3 %4 = icmp eq i64 %3, 0 br i1 %4, label %7, label %5 5: ; preds = %1 %6 = call i32 @errorOut(ptr noundef nonnull @readU32FromChar.errorMsg) #3 br label %7 7: ; preds = %5, %1 %8 = load i32, ptr %2, align 4, !tbaa !6 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 ret i32 %8 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i64 @readU32FromCharChecked(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @errorOut(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
freebsd_sys_contrib_zstd_programs_extr_zstdcli.c_readU32FromChar
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_gdbarch.c_gdbarch_sigtramp_end.c' source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_gdbarch.c_gdbarch_sigtramp_end.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @gdbarch_debug = dso_local local_unnamed_addr global i32 0, align 4 @gdb_stdlog = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [29 x i8] c"gdbarch_sigtramp_end called\0A\00", align 1 ; Function Attrs: nounwind uwtable define dso_local i32 @gdbarch_sigtramp_end(ptr noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 { %3 = icmp ne ptr %0, null %4 = zext i1 %3 to i32 %5 = tail call i32 @gdb_assert(i32 noundef %4) #2 %6 = load ptr, ptr %0, align 8, !tbaa !5 %7 = icmp ne ptr %6, null %8 = zext i1 %7 to i32 %9 = tail call i32 @gdb_assert(i32 noundef %8) #2 %10 = load i32, ptr @gdbarch_debug, align 4, !tbaa !10 %11 = icmp sgt i32 %10, 1 br i1 %11, label %12, label %15 12: ; preds = %2 %13 = load i32, ptr @gdb_stdlog, align 4, !tbaa !10 %14 = tail call i32 @fprintf_unfiltered(i32 noundef %13, ptr noundef nonnull @.str) #2 br label %15 15: ; preds = %12, %2 %16 = load ptr, ptr %0, align 8, !tbaa !5 %17 = tail call i32 %16(i32 noundef %1) #2 ret i32 %17 } declare i32 @gdb_assert(i32 noundef) local_unnamed_addr #1 declare i32 @fprintf_unfiltered(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"gdbarch", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0}
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_gdbarch.c_gdbarch_sigtramp_end.c' source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_gdbarch.c_gdbarch_sigtramp_end.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @gdbarch_debug = common local_unnamed_addr global i32 0, align 4 @gdb_stdlog = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [29 x i8] c"gdbarch_sigtramp_end called\0A\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @gdbarch_sigtramp_end(ptr noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 { %3 = icmp ne ptr %0, null %4 = zext i1 %3 to i32 %5 = tail call i32 @gdb_assert(i32 noundef %4) #2 %6 = load ptr, ptr %0, align 8, !tbaa !6 %7 = icmp ne ptr %6, null %8 = zext i1 %7 to i32 %9 = tail call i32 @gdb_assert(i32 noundef %8) #2 %10 = load i32, ptr @gdbarch_debug, align 4, !tbaa !11 %11 = icmp sgt i32 %10, 1 br i1 %11, label %12, label %15 12: ; preds = %2 %13 = load i32, ptr @gdb_stdlog, align 4, !tbaa !11 %14 = tail call i32 @fprintf_unfiltered(i32 noundef %13, ptr noundef nonnull @.str) #2 br label %15 15: ; preds = %12, %2 %16 = load ptr, ptr %0, align 8, !tbaa !6 %17 = tail call i32 %16(i32 noundef %1) #2 ret i32 %17 } declare i32 @gdb_assert(i32 noundef) local_unnamed_addr #1 declare i32 @fprintf_unfiltered(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"gdbarch", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !12, i64 0} !12 = !{!"int", !9, i64 0}
freebsd_contrib_gdb_gdb_extr_gdbarch.c_gdbarch_sigtramp_end
; ModuleID = 'AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_initby.c_ngx_http_lua_init_by_file.c' source_filename = "AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_initby.c_ngx_http_lua_init_by_file.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [17 x i8] c"init_by_lua_file\00", align 1 ; Function Attrs: nounwind uwtable define dso_local i32 @ngx_http_lua_init_by_file(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2) local_unnamed_addr #0 { %4 = load i64, ptr %1, align 8, !tbaa !5 %5 = inttoptr i64 %4 to ptr %6 = tail call i64 @luaL_loadfile(ptr noundef %2, ptr noundef %5) #2 %7 = icmp eq i64 %6, 0 br i1 %7, label %8, label %12 8: ; preds = %3 %9 = tail call i64 @ngx_http_lua_do_call(ptr noundef %0, ptr noundef %2) #2 %10 = icmp ne i64 %9, 0 %11 = zext i1 %10 to i32 br label %12 12: ; preds = %8, %3 %13 = phi i32 [ 1, %3 ], [ %11, %8 ] %14 = tail call i32 @ngx_http_lua_report(ptr noundef %0, ptr noundef %2, i32 noundef %13, ptr noundef nonnull @.str) #2 ret i32 %14 } declare i64 @luaL_loadfile(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i64 @ngx_http_lua_do_call(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @ngx_http_lua_report(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !8, i64 0} !6 = !{!"TYPE_5__", !7, i64 0} !7 = !{!"TYPE_4__", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_initby.c_ngx_http_lua_init_by_file.c' source_filename = "AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_initby.c_ngx_http_lua_init_by_file.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [17 x i8] c"init_by_lua_file\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @ngx_http_lua_init_by_file(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2) local_unnamed_addr #0 { %4 = load i64, ptr %1, align 8, !tbaa !6 %5 = inttoptr i64 %4 to ptr %6 = tail call i64 @luaL_loadfile(ptr noundef %2, ptr noundef %5) #2 %7 = icmp eq i64 %6, 0 br i1 %7, label %8, label %12 8: ; preds = %3 %9 = tail call i64 @ngx_http_lua_do_call(ptr noundef %0, ptr noundef %2) #2 %10 = icmp ne i64 %9, 0 %11 = zext i1 %10 to i32 br label %12 12: ; preds = %8, %3 %13 = phi i32 [ 1, %3 ], [ %11, %8 ] %14 = tail call i32 @ngx_http_lua_report(ptr noundef %0, ptr noundef %2, i32 noundef %13, ptr noundef nonnull @.str) #2 ret i32 %14 } declare i64 @luaL_loadfile(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i64 @ngx_http_lua_do_call(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @ngx_http_lua_report(ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !9, i64 0} !7 = !{!"TYPE_5__", !8, i64 0} !8 = !{!"TYPE_4__", !9, i64 0} !9 = !{!"long", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"}
tengine_modules_ngx_http_lua_module_src_extr_ngx_http_lua_initby.c_ngx_http_lua_init_by_file
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb4/extr_cxgb4_ethtool.c_restart_autoneg.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb4/extr_cxgb4_ethtool.c_restart_autoneg.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.port_info = type { i32, ptr, %struct.TYPE_3__ } %struct.TYPE_3__ = type { i64 } @EAGAIN = dso_local local_unnamed_addr global i32 0, align 4 @AUTONEG_ENABLE = dso_local local_unnamed_addr global i64 0, align 8 @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @restart_autoneg], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @restart_autoneg(ptr noundef %0) #0 { %2 = tail call ptr @netdev_priv(ptr noundef %0) #2 %3 = tail call i32 @netif_running(ptr noundef %0) #2 %4 = icmp eq i32 %3, 0 br i1 %4, label %5, label %8 5: ; preds = %1 %6 = load i32, ptr @EAGAIN, align 4, !tbaa !5 %7 = sub nsw i32 0, %6 br label %22 8: ; preds = %1 %9 = getelementptr inbounds %struct.port_info, ptr %2, i64 0, i32 2 %10 = load i64, ptr %9, align 8, !tbaa !9 %11 = load i64, ptr @AUTONEG_ENABLE, align 8, !tbaa !14 %12 = icmp eq i64 %10, %11 br i1 %12, label %16, label %13 13: ; preds = %8 %14 = load i32, ptr @EINVAL, align 4, !tbaa !5 %15 = sub nsw i32 0, %14 br label %22 16: ; preds = %8 %17 = getelementptr inbounds %struct.port_info, ptr %2, i64 0, i32 1 %18 = load ptr, ptr %17, align 8, !tbaa !15 %19 = load i32, ptr %18, align 4, !tbaa !16 %20 = load i32, ptr %2, align 8, !tbaa !18 %21 = tail call i32 @t4_restart_aneg(ptr noundef nonnull %18, i32 noundef %19, i32 noundef %20) #2 br label %22 22: ; preds = %16, %13, %5 %23 = phi i32 [ %15, %13 ], [ 0, %16 ], [ %7, %5 ] ret i32 %23 } declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1 declare i32 @netif_running(ptr noundef) local_unnamed_addr #1 declare i32 @t4_restart_aneg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !13, i64 16} !10 = !{!"port_info", !6, i64 0, !11, i64 8, !12, i64 16} !11 = !{!"any pointer", !7, i64 0} !12 = !{!"TYPE_3__", !13, i64 0} !13 = !{!"long", !7, i64 0} !14 = !{!13, !13, i64 0} !15 = !{!10, !11, i64 8} !16 = !{!17, !6, i64 0} !17 = !{!"TYPE_4__", !6, i64 0} !18 = !{!10, !6, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb4/extr_cxgb4_ethtool.c_restart_autoneg.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/chelsio/cxgb4/extr_cxgb4_ethtool.c_restart_autoneg.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EAGAIN = common local_unnamed_addr global i32 0, align 4 @AUTONEG_ENABLE = common local_unnamed_addr global i64 0, align 8 @EINVAL = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @restart_autoneg], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 -2147483647, -2147483648) i32 @restart_autoneg(ptr noundef %0) #0 { %2 = tail call ptr @netdev_priv(ptr noundef %0) #2 %3 = tail call i32 @netif_running(ptr noundef %0) #2 %4 = icmp eq i32 %3, 0 br i1 %4, label %5, label %8 5: ; preds = %1 %6 = load i32, ptr @EAGAIN, align 4, !tbaa !6 %7 = sub nsw i32 0, %6 br label %22 8: ; preds = %1 %9 = getelementptr inbounds i8, ptr %2, i64 16 %10 = load i64, ptr %9, align 8, !tbaa !10 %11 = load i64, ptr @AUTONEG_ENABLE, align 8, !tbaa !15 %12 = icmp eq i64 %10, %11 br i1 %12, label %16, label %13 13: ; preds = %8 %14 = load i32, ptr @EINVAL, align 4, !tbaa !6 %15 = sub nsw i32 0, %14 br label %22 16: ; preds = %8 %17 = getelementptr inbounds i8, ptr %2, i64 8 %18 = load ptr, ptr %17, align 8, !tbaa !16 %19 = load i32, ptr %18, align 4, !tbaa !17 %20 = load i32, ptr %2, align 8, !tbaa !19 %21 = tail call i32 @t4_restart_aneg(ptr noundef nonnull %18, i32 noundef %19, i32 noundef %20) #2 br label %22 22: ; preds = %16, %13, %5 %23 = phi i32 [ %15, %13 ], [ 0, %16 ], [ %7, %5 ] ret i32 %23 } declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1 declare i32 @netif_running(ptr noundef) local_unnamed_addr #1 declare i32 @t4_restart_aneg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !14, i64 16} !11 = !{!"port_info", !7, i64 0, !12, i64 8, !13, i64 16} !12 = !{!"any pointer", !8, i64 0} !13 = !{!"TYPE_3__", !14, i64 0} !14 = !{!"long", !8, i64 0} !15 = !{!14, !14, i64 0} !16 = !{!11, !12, i64 8} !17 = !{!18, !7, i64 0} !18 = !{!"TYPE_4__", !7, i64 0} !19 = !{!11, !7, i64 0}
linux_drivers_net_ethernet_chelsio_cxgb4_extr_cxgb4_ethtool.c_restart_autoneg
; ModuleID = 'AnghaBench/linux/net/sched/extr_cls_flower.c___fl_lookup.c' source_filename = "AnghaBench/linux/net/sched/extr_cls_flower.c___fl_lookup.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.fl_flow_mask = type { i32, i32 } @llvm.compiler.used = appending global [1 x ptr] [ptr @__fl_lookup], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal ptr @__fl_lookup(ptr noundef %0, ptr noundef %1) #0 { %3 = getelementptr inbounds %struct.fl_flow_mask, ptr %0, i64 0, i32 1 %4 = tail call i32 @fl_key_get_start(ptr noundef %1, ptr noundef %0) #2 %5 = load i32, ptr %0, align 4, !tbaa !5 %6 = tail call ptr @rhashtable_lookup_fast(ptr noundef nonnull %3, i32 noundef %4, i32 noundef %5) #2 ret ptr %6 } declare ptr @rhashtable_lookup_fast(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @fl_key_get_start(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"fl_flow_mask", !7, i64 0, !7, i64 4} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/net/sched/extr_cls_flower.c___fl_lookup.c' source_filename = "AnghaBench/linux/net/sched/extr_cls_flower.c___fl_lookup.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @__fl_lookup], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal ptr @__fl_lookup(ptr noundef %0, ptr noundef %1) #0 { %3 = getelementptr inbounds i8, ptr %0, i64 4 %4 = tail call i32 @fl_key_get_start(ptr noundef %1, ptr noundef %0) #2 %5 = load i32, ptr %0, align 4, !tbaa !6 %6 = tail call ptr @rhashtable_lookup_fast(ptr noundef nonnull %3, i32 noundef %4, i32 noundef %5) #2 ret ptr %6 } declare ptr @rhashtable_lookup_fast(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @fl_key_get_start(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"fl_flow_mask", !8, i64 0, !8, i64 4} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
linux_net_sched_extr_cls_flower.c___fl_lookup
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/extr_i915_irq.c_gen6_sanitize_rps_pm_mask.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/extr_i915_irq.c_gen6_sanitize_rps_pm_mask.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable define dso_local i32 @gen6_sanitize_rps_pm_mask(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 { %3 = load i32, ptr %0, align 4, !tbaa !5 %4 = xor i32 %3, -1 %5 = and i32 %4, %1 ret i32 %5 } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !9, i64 0} !6 = !{!"drm_i915_private", !7, i64 0} !7 = !{!"TYPE_4__", !8, i64 0} !8 = !{!"TYPE_3__", !9, i64 0} !9 = !{!"int", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/extr_i915_irq.c_gen6_sanitize_rps_pm_mask.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/extr_i915_irq.c_gen6_sanitize_rps_pm_mask.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) define i32 @gen6_sanitize_rps_pm_mask(ptr nocapture noundef readonly %0, i32 noundef %1) local_unnamed_addr #0 { %3 = load i32, ptr %0, align 4, !tbaa !6 %4 = xor i32 %3, -1 %5 = and i32 %4, %1 ret i32 %5 } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !10, i64 0} !7 = !{!"drm_i915_private", !8, i64 0} !8 = !{!"TYPE_4__", !9, i64 0} !9 = !{!"TYPE_3__", !10, i64 0} !10 = !{!"int", !11, i64 0} !11 = !{!"omnipotent char", !12, i64 0} !12 = !{!"Simple C/C++ TBAA"}
linux_drivers_gpu_drm_i915_extr_i915_irq.c_gen6_sanitize_rps_pm_mask
; ModuleID = 'AnghaBench/openpilot/selfdrive/controls/lib/lateral_mpc/lib_mpc_export/extr_acado_solver.c_acado_setObjR1R2.c' source_filename = "AnghaBench/openpilot/selfdrive/controls/lib/lateral_mpc/lib_mpc_export/extr_acado_solver.c_acado_setObjR1R2.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable define dso_local void @acado_setObjR1R2(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #0 { %5 = load i32, ptr %0, align 4, !tbaa !5 %6 = load i32, ptr %1, align 4, !tbaa !5 %7 = mul nsw i32 %6, %5 %8 = getelementptr inbounds i32, ptr %0, i64 1 %9 = load i32, ptr %8, align 4, !tbaa !5 %10 = getelementptr inbounds i32, ptr %1, i64 5 %11 = load i32, ptr %10, align 4, !tbaa !5 %12 = mul nsw i32 %11, %9 %13 = add nsw i32 %12, %7 %14 = getelementptr inbounds i32, ptr %0, i64 2 %15 = load i32, ptr %14, align 4, !tbaa !5 %16 = getelementptr inbounds i32, ptr %1, i64 10 %17 = load i32, ptr %16, align 4, !tbaa !5 %18 = mul nsw i32 %17, %15 %19 = add nsw i32 %13, %18 %20 = getelementptr inbounds i32, ptr %0, i64 3 %21 = load i32, ptr %20, align 4, !tbaa !5 %22 = getelementptr inbounds i32, ptr %1, i64 15 %23 = load i32, ptr %22, align 4, !tbaa !5 %24 = mul nsw i32 %23, %21 %25 = add nsw i32 %19, %24 %26 = getelementptr inbounds i32, ptr %0, i64 4 %27 = load i32, ptr %26, align 4, !tbaa !5 %28 = getelementptr inbounds i32, ptr %1, i64 20 %29 = load i32, ptr %28, align 4, !tbaa !5 %30 = mul nsw i32 %29, %27 %31 = add nsw i32 %25, %30 store i32 %31, ptr %3, align 4, !tbaa !5 %32 = load i32, ptr %0, align 4, !tbaa !5 %33 = getelementptr inbounds i32, ptr %1, i64 1 %34 = load i32, ptr %33, align 4, !tbaa !5 %35 = mul nsw i32 %34, %32 %36 = load i32, ptr %8, align 4, !tbaa !5 %37 = getelementptr inbounds i32, ptr %1, i64 6 %38 = load i32, ptr %37, align 4, !tbaa !5 %39 = mul nsw i32 %38, %36 %40 = add nsw i32 %39, %35 %41 = load i32, ptr %14, align 4, !tbaa !5 %42 = getelementptr inbounds i32, ptr %1, i64 11 %43 = load i32, ptr %42, align 4, !tbaa !5 %44 = mul nsw i32 %43, %41 %45 = add nsw i32 %40, %44 %46 = load i32, ptr %20, align 4, !tbaa !5 %47 = getelementptr inbounds i32, ptr %1, i64 16 %48 = load i32, ptr %47, align 4, !tbaa !5 %49 = mul nsw i32 %48, %46 %50 = add nsw i32 %45, %49 %51 = load i32, ptr %26, align 4, !tbaa !5 %52 = getelementptr inbounds i32, ptr %1, i64 21 %53 = load i32, ptr %52, align 4, !tbaa !5 %54 = mul nsw i32 %53, %51 %55 = add nsw i32 %50, %54 %56 = getelementptr inbounds i32, ptr %3, i64 1 store i32 %55, ptr %56, align 4, !tbaa !5 %57 = load i32, ptr %0, align 4, !tbaa !5 %58 = getelementptr inbounds i32, ptr %1, i64 2 %59 = load i32, ptr %58, align 4, !tbaa !5 %60 = mul nsw i32 %59, %57 %61 = load i32, ptr %8, align 4, !tbaa !5 %62 = getelementptr inbounds i32, ptr %1, i64 7 %63 = load i32, ptr %62, align 4, !tbaa !5 %64 = mul nsw i32 %63, %61 %65 = add nsw i32 %64, %60 %66 = load i32, ptr %14, align 4, !tbaa !5 %67 = getelementptr inbounds i32, ptr %1, i64 12 %68 = load i32, ptr %67, align 4, !tbaa !5 %69 = mul nsw i32 %68, %66 %70 = add nsw i32 %65, %69 %71 = load i32, ptr %20, align 4, !tbaa !5 %72 = getelementptr inbounds i32, ptr %1, i64 17 %73 = load i32, ptr %72, align 4, !tbaa !5 %74 = mul nsw i32 %73, %71 %75 = add nsw i32 %70, %74 %76 = load i32, ptr %26, align 4, !tbaa !5 %77 = getelementptr inbounds i32, ptr %1, i64 22 %78 = load i32, ptr %77, align 4, !tbaa !5 %79 = mul nsw i32 %78, %76 %80 = add nsw i32 %75, %79 %81 = getelementptr inbounds i32, ptr %3, i64 2 store i32 %80, ptr %81, align 4, !tbaa !5 %82 = load i32, ptr %0, align 4, !tbaa !5 %83 = getelementptr inbounds i32, ptr %1, i64 3 %84 = load i32, ptr %83, align 4, !tbaa !5 %85 = mul nsw i32 %84, %82 %86 = load i32, ptr %8, align 4, !tbaa !5 %87 = getelementptr inbounds i32, ptr %1, i64 8 %88 = load i32, ptr %87, align 4, !tbaa !5 %89 = mul nsw i32 %88, %86 %90 = add nsw i32 %89, %85 %91 = load i32, ptr %14, align 4, !tbaa !5 %92 = getelementptr inbounds i32, ptr %1, i64 13 %93 = load i32, ptr %92, align 4, !tbaa !5 %94 = mul nsw i32 %93, %91 %95 = add nsw i32 %90, %94 %96 = load i32, ptr %20, align 4, !tbaa !5 %97 = getelementptr inbounds i32, ptr %1, i64 18 %98 = load i32, ptr %97, align 4, !tbaa !5 %99 = mul nsw i32 %98, %96 %100 = add nsw i32 %95, %99 %101 = load i32, ptr %26, align 4, !tbaa !5 %102 = getelementptr inbounds i32, ptr %1, i64 23 %103 = load i32, ptr %102, align 4, !tbaa !5 %104 = mul nsw i32 %103, %101 %105 = add nsw i32 %100, %104 %106 = getelementptr inbounds i32, ptr %3, i64 3 store i32 %105, ptr %106, align 4, !tbaa !5 %107 = load i32, ptr %0, align 4, !tbaa !5 %108 = getelementptr inbounds i32, ptr %1, i64 4 %109 = load i32, ptr %108, align 4, !tbaa !5 %110 = mul nsw i32 %109, %107 %111 = load i32, ptr %8, align 4, !tbaa !5 %112 = getelementptr inbounds i32, ptr %1, i64 9 %113 = load i32, ptr %112, align 4, !tbaa !5 %114 = mul nsw i32 %113, %111 %115 = add nsw i32 %114, %110 %116 = load i32, ptr %14, align 4, !tbaa !5 %117 = getelementptr inbounds i32, ptr %1, i64 14 %118 = load i32, ptr %117, align 4, !tbaa !5 %119 = mul nsw i32 %118, %116 %120 = add nsw i32 %115, %119 %121 = load i32, ptr %20, align 4, !tbaa !5 %122 = getelementptr inbounds i32, ptr %1, i64 19 %123 = load i32, ptr %122, align 4, !tbaa !5 %124 = mul nsw i32 %123, %121 %125 = add nsw i32 %120, %124 %126 = load i32, ptr %26, align 4, !tbaa !5 %127 = getelementptr inbounds i32, ptr %1, i64 24 %128 = load i32, ptr %127, align 4, !tbaa !5 %129 = mul nsw i32 %128, %126 %130 = add nsw i32 %125, %129 %131 = getelementptr inbounds i32, ptr %3, i64 4 store i32 %130, ptr %131, align 4, !tbaa !5 %132 = load i32, ptr %0, align 4, !tbaa !5 %133 = mul nsw i32 %132, %31 %134 = load i32, ptr %8, align 4, !tbaa !5 %135 = mul nsw i32 %134, %55 %136 = add nsw i32 %135, %133 %137 = load i32, ptr %14, align 4, !tbaa !5 %138 = mul nsw i32 %137, %80 %139 = add nsw i32 %136, %138 %140 = load i32, ptr %20, align 4, !tbaa !5 %141 = mul nsw i32 %140, %105 %142 = add nsw i32 %139, %141 %143 = load i32, ptr %26, align 4, !tbaa !5 %144 = mul nsw i32 %143, %130 %145 = add nsw i32 %142, %144 store i32 %145, ptr %2, align 4, !tbaa !5 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/openpilot/selfdrive/controls/lib/lateral_mpc/lib_mpc_export/extr_acado_solver.c_acado_setObjR1R2.c' source_filename = "AnghaBench/openpilot/selfdrive/controls/lib/lateral_mpc/lib_mpc_export/extr_acado_solver.c_acado_setObjR1R2.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync) define void @acado_setObjR1R2(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2, ptr nocapture noundef writeonly %3) local_unnamed_addr #0 { %5 = load i32, ptr %0, align 4, !tbaa !6 %6 = load i32, ptr %1, align 4, !tbaa !6 %7 = mul nsw i32 %6, %5 %8 = getelementptr inbounds i8, ptr %0, i64 4 %9 = load i32, ptr %8, align 4, !tbaa !6 %10 = getelementptr inbounds i8, ptr %1, i64 20 %11 = load i32, ptr %10, align 4, !tbaa !6 %12 = mul nsw i32 %11, %9 %13 = add nsw i32 %12, %7 %14 = getelementptr inbounds i8, ptr %0, i64 8 %15 = load i32, ptr %14, align 4, !tbaa !6 %16 = getelementptr inbounds i8, ptr %1, i64 40 %17 = load i32, ptr %16, align 4, !tbaa !6 %18 = mul nsw i32 %17, %15 %19 = add nsw i32 %13, %18 %20 = getelementptr inbounds i8, ptr %0, i64 12 %21 = load i32, ptr %20, align 4, !tbaa !6 %22 = getelementptr inbounds i8, ptr %1, i64 60 %23 = load i32, ptr %22, align 4, !tbaa !6 %24 = mul nsw i32 %23, %21 %25 = add nsw i32 %19, %24 %26 = getelementptr inbounds i8, ptr %0, i64 16 %27 = load i32, ptr %26, align 4, !tbaa !6 %28 = getelementptr inbounds i8, ptr %1, i64 80 %29 = load i32, ptr %28, align 4, !tbaa !6 %30 = mul nsw i32 %29, %27 %31 = add nsw i32 %25, %30 store i32 %31, ptr %3, align 4, !tbaa !6 %32 = load i32, ptr %0, align 4, !tbaa !6 %33 = getelementptr inbounds i8, ptr %1, i64 4 %34 = load i32, ptr %33, align 4, !tbaa !6 %35 = mul nsw i32 %34, %32 %36 = load i32, ptr %8, align 4, !tbaa !6 %37 = getelementptr inbounds i8, ptr %1, i64 24 %38 = load i32, ptr %37, align 4, !tbaa !6 %39 = mul nsw i32 %38, %36 %40 = add nsw i32 %39, %35 %41 = load i32, ptr %14, align 4, !tbaa !6 %42 = getelementptr inbounds i8, ptr %1, i64 44 %43 = load i32, ptr %42, align 4, !tbaa !6 %44 = mul nsw i32 %43, %41 %45 = add nsw i32 %40, %44 %46 = load i32, ptr %20, align 4, !tbaa !6 %47 = getelementptr inbounds i8, ptr %1, i64 64 %48 = load i32, ptr %47, align 4, !tbaa !6 %49 = mul nsw i32 %48, %46 %50 = add nsw i32 %45, %49 %51 = load i32, ptr %26, align 4, !tbaa !6 %52 = getelementptr inbounds i8, ptr %1, i64 84 %53 = load i32, ptr %52, align 4, !tbaa !6 %54 = mul nsw i32 %53, %51 %55 = add nsw i32 %50, %54 %56 = getelementptr inbounds i8, ptr %3, i64 4 store i32 %55, ptr %56, align 4, !tbaa !6 %57 = load i32, ptr %0, align 4, !tbaa !6 %58 = getelementptr inbounds i8, ptr %1, i64 8 %59 = load i32, ptr %58, align 4, !tbaa !6 %60 = mul nsw i32 %59, %57 %61 = load i32, ptr %8, align 4, !tbaa !6 %62 = getelementptr inbounds i8, ptr %1, i64 28 %63 = load i32, ptr %62, align 4, !tbaa !6 %64 = mul nsw i32 %63, %61 %65 = add nsw i32 %64, %60 %66 = load i32, ptr %14, align 4, !tbaa !6 %67 = getelementptr inbounds i8, ptr %1, i64 48 %68 = load i32, ptr %67, align 4, !tbaa !6 %69 = mul nsw i32 %68, %66 %70 = add nsw i32 %65, %69 %71 = load i32, ptr %20, align 4, !tbaa !6 %72 = getelementptr inbounds i8, ptr %1, i64 68 %73 = load i32, ptr %72, align 4, !tbaa !6 %74 = mul nsw i32 %73, %71 %75 = add nsw i32 %70, %74 %76 = load i32, ptr %26, align 4, !tbaa !6 %77 = getelementptr inbounds i8, ptr %1, i64 88 %78 = load i32, ptr %77, align 4, !tbaa !6 %79 = mul nsw i32 %78, %76 %80 = add nsw i32 %75, %79 %81 = getelementptr inbounds i8, ptr %3, i64 8 store i32 %80, ptr %81, align 4, !tbaa !6 %82 = load i32, ptr %0, align 4, !tbaa !6 %83 = getelementptr inbounds i8, ptr %1, i64 12 %84 = load i32, ptr %83, align 4, !tbaa !6 %85 = mul nsw i32 %84, %82 %86 = load i32, ptr %8, align 4, !tbaa !6 %87 = getelementptr inbounds i8, ptr %1, i64 32 %88 = load i32, ptr %87, align 4, !tbaa !6 %89 = mul nsw i32 %88, %86 %90 = add nsw i32 %89, %85 %91 = load i32, ptr %14, align 4, !tbaa !6 %92 = getelementptr inbounds i8, ptr %1, i64 52 %93 = load i32, ptr %92, align 4, !tbaa !6 %94 = mul nsw i32 %93, %91 %95 = add nsw i32 %90, %94 %96 = load i32, ptr %20, align 4, !tbaa !6 %97 = getelementptr inbounds i8, ptr %1, i64 72 %98 = load i32, ptr %97, align 4, !tbaa !6 %99 = mul nsw i32 %98, %96 %100 = add nsw i32 %95, %99 %101 = load i32, ptr %26, align 4, !tbaa !6 %102 = getelementptr inbounds i8, ptr %1, i64 92 %103 = load i32, ptr %102, align 4, !tbaa !6 %104 = mul nsw i32 %103, %101 %105 = add nsw i32 %100, %104 %106 = getelementptr inbounds i8, ptr %3, i64 12 store i32 %105, ptr %106, align 4, !tbaa !6 %107 = load i32, ptr %0, align 4, !tbaa !6 %108 = getelementptr inbounds i8, ptr %1, i64 16 %109 = load i32, ptr %108, align 4, !tbaa !6 %110 = mul nsw i32 %109, %107 %111 = load i32, ptr %8, align 4, !tbaa !6 %112 = getelementptr inbounds i8, ptr %1, i64 36 %113 = load i32, ptr %112, align 4, !tbaa !6 %114 = mul nsw i32 %113, %111 %115 = add nsw i32 %114, %110 %116 = load i32, ptr %14, align 4, !tbaa !6 %117 = getelementptr inbounds i8, ptr %1, i64 56 %118 = load i32, ptr %117, align 4, !tbaa !6 %119 = mul nsw i32 %118, %116 %120 = add nsw i32 %115, %119 %121 = load i32, ptr %20, align 4, !tbaa !6 %122 = getelementptr inbounds i8, ptr %1, i64 76 %123 = load i32, ptr %122, align 4, !tbaa !6 %124 = mul nsw i32 %123, %121 %125 = add nsw i32 %120, %124 %126 = load i32, ptr %26, align 4, !tbaa !6 %127 = getelementptr inbounds i8, ptr %1, i64 96 %128 = load i32, ptr %127, align 4, !tbaa !6 %129 = mul nsw i32 %128, %126 %130 = add nsw i32 %125, %129 %131 = getelementptr inbounds i8, ptr %3, i64 16 store i32 %130, ptr %131, align 4, !tbaa !6 %132 = load i32, ptr %0, align 4, !tbaa !6 %133 = mul nsw i32 %132, %31 %134 = load i32, ptr %8, align 4, !tbaa !6 %135 = mul nsw i32 %134, %55 %136 = add nsw i32 %135, %133 %137 = load i32, ptr %14, align 4, !tbaa !6 %138 = mul nsw i32 %137, %80 %139 = add nsw i32 %136, %138 %140 = load i32, ptr %20, align 4, !tbaa !6 %141 = mul nsw i32 %140, %105 %142 = add nsw i32 %139, %141 %143 = load i32, ptr %26, align 4, !tbaa !6 %144 = mul nsw i32 %143, %130 %145 = add nsw i32 %142, %144 store i32 %145, ptr %2, align 4, !tbaa !6 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
openpilot_selfdrive_controls_lib_lateral_mpc_lib_mpc_export_extr_acado_solver.c_acado_setObjR1R2
; ModuleID = 'AnghaBench/linux/drivers/phy/rockchip/extr_phy-rockchip-typec.c_tcphy_parse_dt.c' source_filename = "AnghaBench/linux/drivers/phy/rockchip/extr_phy-rockchip-typec.c_tcphy_parse_dt.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.rockchip_typec_phy = type { ptr, ptr, ptr, ptr, ptr, ptr } @.str = private unnamed_addr constant [13 x i8] c"rockchip,grf\00", align 1 @.str.1 = private unnamed_addr constant [28 x i8] c"could not find grf dt node\0A\00", align 1 @.str.2 = private unnamed_addr constant [9 x i8] c"tcpdcore\00", align 1 @.str.3 = private unnamed_addr constant [31 x i8] c"could not get uphy core clock\0A\00", align 1 @.str.4 = private unnamed_addr constant [12 x i8] c"tcpdphy-ref\00", align 1 @.str.5 = private unnamed_addr constant [30 x i8] c"could not get uphy ref clock\0A\00", align 1 @.str.6 = private unnamed_addr constant [5 x i8] c"uphy\00", align 1 @.str.7 = private unnamed_addr constant [33 x i8] c"no uphy_rst reset control found\0A\00", align 1 @.str.8 = private unnamed_addr constant [10 x i8] c"uphy-pipe\00", align 1 @.str.9 = private unnamed_addr constant [33 x i8] c"no pipe_rst reset control found\0A\00", align 1 @.str.10 = private unnamed_addr constant [11 x i8] c"uphy-tcphy\00", align 1 @.str.11 = private unnamed_addr constant [34 x i8] c"no tcphy_rst reset control found\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @tcphy_parse_dt], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @tcphy_parse_dt(ptr nocapture noundef %0, ptr noundef %1) #0 { %3 = load i32, ptr %1, align 4, !tbaa !5 %4 = tail call ptr @syscon_regmap_lookup_by_phandle(i32 noundef %3, ptr noundef nonnull @.str) #2 %5 = getelementptr inbounds %struct.rockchip_typec_phy, ptr %0, i64 0, i32 5 store ptr %4, ptr %5, align 8, !tbaa !10 %6 = tail call i64 @IS_ERR(ptr noundef %4) #2 %7 = icmp eq i64 %6, 0 br i1 %7, label %8, label %32 8: ; preds = %2 %9 = tail call ptr @devm_clk_get(ptr noundef nonnull %1, ptr noundef nonnull @.str.2) #2 %10 = getelementptr inbounds %struct.rockchip_typec_phy, ptr %0, i64 0, i32 4 store ptr %9, ptr %10, align 8, !tbaa !13 %11 = tail call i64 @IS_ERR(ptr noundef %9) #2 %12 = icmp eq i64 %11, 0 br i1 %12, label %13, label %32 13: ; preds = %8 %14 = tail call ptr @devm_clk_get(ptr noundef nonnull %1, ptr noundef nonnull @.str.4) #2 %15 = getelementptr inbounds %struct.rockchip_typec_phy, ptr %0, i64 0, i32 3 store ptr %14, ptr %15, align 8, !tbaa !14 %16 = tail call i64 @IS_ERR(ptr noundef %14) #2 %17 = icmp eq i64 %16, 0 br i1 %17, label %18, label %32 18: ; preds = %13 %19 = tail call ptr @devm_reset_control_get(ptr noundef nonnull %1, ptr noundef nonnull @.str.6) #2 %20 = getelementptr inbounds %struct.rockchip_typec_phy, ptr %0, i64 0, i32 2 store ptr %19, ptr %20, align 8, !tbaa !15 %21 = tail call i64 @IS_ERR(ptr noundef %19) #2 %22 = icmp eq i64 %21, 0 br i1 %22, label %23, label %32 23: ; preds = %18 %24 = tail call ptr @devm_reset_control_get(ptr noundef nonnull %1, ptr noundef nonnull @.str.8) #2 %25 = getelementptr inbounds %struct.rockchip_typec_phy, ptr %0, i64 0, i32 1 store ptr %24, ptr %25, align 8, !tbaa !16 %26 = tail call i64 @IS_ERR(ptr noundef %24) #2 %27 = icmp eq i64 %26, 0 br i1 %27, label %28, label %32 28: ; preds = %23 %29 = tail call ptr @devm_reset_control_get(ptr noundef nonnull %1, ptr noundef nonnull @.str.10) #2 store ptr %29, ptr %0, align 8, !tbaa !17 %30 = tail call i64 @IS_ERR(ptr noundef %29) #2 %31 = icmp eq i64 %30, 0 br i1 %31, label %38, label %32 32: ; preds = %28, %23, %18, %13, %8, %2 %33 = phi ptr [ @.str.1, %2 ], [ @.str.3, %8 ], [ @.str.5, %13 ], [ @.str.7, %18 ], [ @.str.9, %23 ], [ @.str.11, %28 ] %34 = phi ptr [ %5, %2 ], [ %10, %8 ], [ %15, %13 ], [ %20, %18 ], [ %25, %23 ], [ %0, %28 ] %35 = tail call i32 @dev_err(ptr noundef nonnull %1, ptr noundef nonnull %33) #2 %36 = load ptr, ptr %34, align 8, !tbaa !18 %37 = tail call i32 @PTR_ERR(ptr noundef %36) #2 br label %38 38: ; preds = %32, %28 %39 = phi i32 [ 0, %28 ], [ %37, %32 ] ret i32 %39 } declare ptr @syscon_regmap_lookup_by_phandle(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1 declare ptr @devm_clk_get(ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @devm_reset_control_get(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"device", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 40} !11 = !{!"rockchip_typec_phy", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40} !12 = !{!"any pointer", !8, i64 0} !13 = !{!11, !12, i64 32} !14 = !{!11, !12, i64 24} !15 = !{!11, !12, i64 16} !16 = !{!11, !12, i64 8} !17 = !{!11, !12, i64 0} !18 = !{!12, !12, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/phy/rockchip/extr_phy-rockchip-typec.c_tcphy_parse_dt.c' source_filename = "AnghaBench/linux/drivers/phy/rockchip/extr_phy-rockchip-typec.c_tcphy_parse_dt.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [13 x i8] c"rockchip,grf\00", align 1 @.str.1 = private unnamed_addr constant [28 x i8] c"could not find grf dt node\0A\00", align 1 @.str.2 = private unnamed_addr constant [9 x i8] c"tcpdcore\00", align 1 @.str.3 = private unnamed_addr constant [31 x i8] c"could not get uphy core clock\0A\00", align 1 @.str.4 = private unnamed_addr constant [12 x i8] c"tcpdphy-ref\00", align 1 @.str.5 = private unnamed_addr constant [30 x i8] c"could not get uphy ref clock\0A\00", align 1 @.str.6 = private unnamed_addr constant [5 x i8] c"uphy\00", align 1 @.str.7 = private unnamed_addr constant [33 x i8] c"no uphy_rst reset control found\0A\00", align 1 @.str.8 = private unnamed_addr constant [10 x i8] c"uphy-pipe\00", align 1 @.str.9 = private unnamed_addr constant [33 x i8] c"no pipe_rst reset control found\0A\00", align 1 @.str.10 = private unnamed_addr constant [11 x i8] c"uphy-tcphy\00", align 1 @.str.11 = private unnamed_addr constant [34 x i8] c"no tcphy_rst reset control found\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @tcphy_parse_dt], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @tcphy_parse_dt(ptr nocapture noundef %0, ptr noundef %1) #0 { %3 = load i32, ptr %1, align 4, !tbaa !6 %4 = tail call ptr @syscon_regmap_lookup_by_phandle(i32 noundef %3, ptr noundef nonnull @.str) #2 %5 = getelementptr inbounds i8, ptr %0, i64 40 store ptr %4, ptr %5, align 8, !tbaa !11 %6 = tail call i64 @IS_ERR(ptr noundef %4) #2 %7 = icmp eq i64 %6, 0 br i1 %7, label %8, label %32 8: ; preds = %2 %9 = tail call ptr @devm_clk_get(ptr noundef nonnull %1, ptr noundef nonnull @.str.2) #2 %10 = getelementptr inbounds i8, ptr %0, i64 32 store ptr %9, ptr %10, align 8, !tbaa !14 %11 = tail call i64 @IS_ERR(ptr noundef %9) #2 %12 = icmp eq i64 %11, 0 br i1 %12, label %13, label %32 13: ; preds = %8 %14 = tail call ptr @devm_clk_get(ptr noundef nonnull %1, ptr noundef nonnull @.str.4) #2 %15 = getelementptr inbounds i8, ptr %0, i64 24 store ptr %14, ptr %15, align 8, !tbaa !15 %16 = tail call i64 @IS_ERR(ptr noundef %14) #2 %17 = icmp eq i64 %16, 0 br i1 %17, label %18, label %32 18: ; preds = %13 %19 = tail call ptr @devm_reset_control_get(ptr noundef nonnull %1, ptr noundef nonnull @.str.6) #2 %20 = getelementptr inbounds i8, ptr %0, i64 16 store ptr %19, ptr %20, align 8, !tbaa !16 %21 = tail call i64 @IS_ERR(ptr noundef %19) #2 %22 = icmp eq i64 %21, 0 br i1 %22, label %23, label %32 23: ; preds = %18 %24 = tail call ptr @devm_reset_control_get(ptr noundef nonnull %1, ptr noundef nonnull @.str.8) #2 %25 = getelementptr inbounds i8, ptr %0, i64 8 store ptr %24, ptr %25, align 8, !tbaa !17 %26 = tail call i64 @IS_ERR(ptr noundef %24) #2 %27 = icmp eq i64 %26, 0 br i1 %27, label %28, label %32 28: ; preds = %23 %29 = tail call ptr @devm_reset_control_get(ptr noundef nonnull %1, ptr noundef nonnull @.str.10) #2 store ptr %29, ptr %0, align 8, !tbaa !18 %30 = tail call i64 @IS_ERR(ptr noundef %29) #2 %31 = icmp eq i64 %30, 0 br i1 %31, label %38, label %32 32: ; preds = %28, %23, %18, %13, %8, %2 %33 = phi ptr [ @.str.1, %2 ], [ @.str.3, %8 ], [ @.str.5, %13 ], [ @.str.7, %18 ], [ @.str.9, %23 ], [ @.str.11, %28 ] %34 = phi ptr [ %5, %2 ], [ %10, %8 ], [ %15, %13 ], [ %20, %18 ], [ %25, %23 ], [ %0, %28 ] %35 = tail call i32 @dev_err(ptr noundef nonnull %1, ptr noundef nonnull %33) #2 %36 = load ptr, ptr %34, align 8, !tbaa !19 %37 = tail call i32 @PTR_ERR(ptr noundef %36) #2 br label %38 38: ; preds = %32, %28 %39 = phi i32 [ 0, %28 ], [ %37, %32 ] ret i32 %39 } declare ptr @syscon_regmap_lookup_by_phandle(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1 declare ptr @devm_clk_get(ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @devm_reset_control_get(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"device", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !13, i64 40} !12 = !{!"rockchip_typec_phy", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !13, i64 40} !13 = !{!"any pointer", !9, i64 0} !14 = !{!12, !13, i64 32} !15 = !{!12, !13, i64 24} !16 = !{!12, !13, i64 16} !17 = !{!12, !13, i64 8} !18 = !{!12, !13, i64 0} !19 = !{!13, !13, i64 0}
linux_drivers_phy_rockchip_extr_phy-rockchip-typec.c_tcphy_parse_dt
; ModuleID = 'AnghaBench/RetroArch/deps/libiosuhax/extr_iosuhax.c_IOSUHAX_FSA_ChangeDir.c' source_filename = "AnghaBench/RetroArch/deps/libiosuhax/extr_iosuhax.c_IOSUHAX_FSA_ChangeDir.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @iosuhaxHandle = dso_local local_unnamed_addr global i64 0, align 8 @IOCTL_FSA_CHDIR = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local i32 @IOSUHAX_FSA_ChangeDir(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = alloca i32, align 4 %4 = load i64, ptr @iosuhaxHandle, align 8, !tbaa !5 %5 = icmp slt i64 %4, 0 br i1 %5, label %6, label %8 6: ; preds = %2 %7 = trunc i64 %4 to i32 br label %27 8: ; preds = %2 %9 = icmp eq ptr %1, null br i1 %9, label %27, label %10 10: ; preds = %8 %11 = tail call i32 @strlen(ptr noundef nonnull %1) #3 %12 = add i32 %11, 9 %13 = tail call i64 @memalign(i32 noundef 32, i32 noundef %12) #3 %14 = icmp eq i64 %13, 0 br i1 %14, label %27, label %15 15: ; preds = %10 %16 = inttoptr i64 %13 to ptr store i32 %0, ptr %16, align 4, !tbaa !9 %17 = getelementptr inbounds i32, ptr %16, i64 1 store i32 8, ptr %17, align 4, !tbaa !9 %18 = getelementptr inbounds i8, ptr %16, i64 8 %19 = tail call i32 @strcpy(ptr noundef nonnull %18, ptr noundef nonnull %1) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %20 = load i64, ptr @iosuhaxHandle, align 8, !tbaa !5 %21 = load i32, ptr @IOCTL_FSA_CHDIR, align 4, !tbaa !9 %22 = call i32 @IOS_Ioctl(i64 noundef %20, i32 noundef %21, ptr noundef nonnull %16, i32 noundef %12, ptr noundef nonnull %3, i32 noundef 4) #3 %23 = icmp slt i32 %22, 0 %24 = call i32 @free(ptr noundef nonnull %16) #3 %25 = load i32, ptr %3, align 4 %26 = select i1 %23, i32 %22, i32 %25 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 br label %27 27: ; preds = %15, %10, %8, %6 %28 = phi i32 [ %7, %6 ], [ -1, %8 ], [ %26, %15 ], [ -2, %10 ] ret i32 %28 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @strlen(ptr noundef) local_unnamed_addr #2 declare i64 @memalign(i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @strcpy(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @IOS_Ioctl(i64 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @free(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"int", !7, i64 0}
; ModuleID = 'AnghaBench/RetroArch/deps/libiosuhax/extr_iosuhax.c_IOSUHAX_FSA_ChangeDir.c' source_filename = "AnghaBench/RetroArch/deps/libiosuhax/extr_iosuhax.c_IOSUHAX_FSA_ChangeDir.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @iosuhaxHandle = common local_unnamed_addr global i64 0, align 8 @IOCTL_FSA_CHDIR = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @IOSUHAX_FSA_ChangeDir(i32 noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = alloca i32, align 4 %4 = load i64, ptr @iosuhaxHandle, align 8, !tbaa !6 %5 = icmp slt i64 %4, 0 br i1 %5, label %6, label %8 6: ; preds = %2 %7 = trunc i64 %4 to i32 br label %27 8: ; preds = %2 %9 = icmp eq ptr %1, null br i1 %9, label %27, label %10 10: ; preds = %8 %11 = tail call i32 @strlen(ptr noundef nonnull %1) #3 %12 = add i32 %11, 9 %13 = tail call i64 @memalign(i32 noundef 32, i32 noundef %12) #3 %14 = icmp eq i64 %13, 0 br i1 %14, label %27, label %15 15: ; preds = %10 %16 = inttoptr i64 %13 to ptr store i32 %0, ptr %16, align 4, !tbaa !10 %17 = getelementptr inbounds i8, ptr %16, i64 4 store i32 8, ptr %17, align 4, !tbaa !10 %18 = getelementptr inbounds i8, ptr %16, i64 8 %19 = tail call i32 @strcpy(ptr noundef nonnull %18, ptr noundef nonnull %1) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 %20 = load i64, ptr @iosuhaxHandle, align 8, !tbaa !6 %21 = load i32, ptr @IOCTL_FSA_CHDIR, align 4, !tbaa !10 %22 = call i32 @IOS_Ioctl(i64 noundef %20, i32 noundef %21, ptr noundef nonnull %16, i32 noundef %12, ptr noundef nonnull %3, i32 noundef 4) #3 %23 = icmp slt i32 %22, 0 %24 = call i32 @free(ptr noundef nonnull %16) #3 %25 = load i32, ptr %3, align 4 %26 = select i1 %23, i32 %22, i32 %25 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 br label %27 27: ; preds = %15, %10, %8, %6 %28 = phi i32 [ %7, %6 ], [ -1, %8 ], [ %26, %15 ], [ -2, %10 ] ret i32 %28 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @strlen(ptr noundef) local_unnamed_addr #2 declare i64 @memalign(i32 noundef, i32 noundef) local_unnamed_addr #2 declare i32 @strcpy(ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @IOS_Ioctl(i64 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i32 @free(ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0}
RetroArch_deps_libiosuhax_extr_iosuhax.c_IOSUHAX_FSA_ChangeDir
; ModuleID = 'AnghaBench/linux/drivers/net/ipvlan/extr_ipvlan_core.c_ipvlan_handle_mode_l2.c' source_filename = "AnghaBench/linux/drivers/net/ipvlan/extr_ipvlan_core.c_ipvlan_handle_mode_l2.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @RX_HANDLER_PASS = dso_local local_unnamed_addr global i32 0, align 4 @GFP_ATOMIC = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ipvlan_handle_mode_l2], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @ipvlan_handle_mode_l2(ptr noundef %0, ptr noundef %1) #0 { %3 = load ptr, ptr %0, align 8, !tbaa !5 %4 = tail call ptr @eth_hdr(ptr noundef %3) #2 %5 = load i32, ptr @RX_HANDLER_PASS, align 4, !tbaa !9 %6 = load i32, ptr %4, align 4, !tbaa !11 %7 = tail call i64 @is_multicast_ether_addr(i32 noundef %6) #2 %8 = icmp eq i64 %7, 0 br i1 %8, label %19, label %9 9: ; preds = %2 %10 = tail call i64 @ipvlan_external_frame(ptr noundef %3, ptr noundef %1) #2 %11 = icmp eq i64 %10, 0 br i1 %11, label %21, label %12 12: ; preds = %9 %13 = load i32, ptr @GFP_ATOMIC, align 4, !tbaa !9 %14 = tail call ptr @skb_clone(ptr noundef %3, i32 noundef %13) #2 %15 = icmp eq ptr %14, null br i1 %15, label %21, label %16 16: ; preds = %12 %17 = tail call i32 @ipvlan_skb_crossing_ns(ptr noundef nonnull %14, ptr noundef null) #2 %18 = tail call i32 @ipvlan_multicast_enqueue(ptr noundef %1, ptr noundef nonnull %14, i32 noundef 0) #2 br label %21 19: ; preds = %2 %20 = tail call i32 @ipvlan_handle_mode_l3(ptr noundef nonnull %0, ptr noundef %1) #2 br label %21 21: ; preds = %12, %16, %9, %19 %22 = phi i32 [ %5, %9 ], [ %20, %19 ], [ %5, %16 ], [ %5, %12 ] ret i32 %22 } declare ptr @eth_hdr(ptr noundef) local_unnamed_addr #1 declare i64 @is_multicast_ether_addr(i32 noundef) local_unnamed_addr #1 declare i64 @ipvlan_external_frame(ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @skb_clone(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ipvlan_skb_crossing_ns(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @ipvlan_multicast_enqueue(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ipvlan_handle_mode_l3(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"int", !7, i64 0} !11 = !{!12, !10, i64 0} !12 = !{!"ethhdr", !10, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/ipvlan/extr_ipvlan_core.c_ipvlan_handle_mode_l2.c' source_filename = "AnghaBench/linux/drivers/net/ipvlan/extr_ipvlan_core.c_ipvlan_handle_mode_l2.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @RX_HANDLER_PASS = common local_unnamed_addr global i32 0, align 4 @GFP_ATOMIC = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ipvlan_handle_mode_l2], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @ipvlan_handle_mode_l2(ptr noundef %0, ptr noundef %1) #0 { %3 = load ptr, ptr %0, align 8, !tbaa !6 %4 = tail call ptr @eth_hdr(ptr noundef %3) #2 %5 = load i32, ptr @RX_HANDLER_PASS, align 4, !tbaa !10 %6 = load i32, ptr %4, align 4, !tbaa !12 %7 = tail call i64 @is_multicast_ether_addr(i32 noundef %6) #2 %8 = icmp eq i64 %7, 0 br i1 %8, label %19, label %9 9: ; preds = %2 %10 = tail call i64 @ipvlan_external_frame(ptr noundef %3, ptr noundef %1) #2 %11 = icmp eq i64 %10, 0 br i1 %11, label %21, label %12 12: ; preds = %9 %13 = load i32, ptr @GFP_ATOMIC, align 4, !tbaa !10 %14 = tail call ptr @skb_clone(ptr noundef %3, i32 noundef %13) #2 %15 = icmp eq ptr %14, null br i1 %15, label %21, label %16 16: ; preds = %12 %17 = tail call i32 @ipvlan_skb_crossing_ns(ptr noundef nonnull %14, ptr noundef null) #2 %18 = tail call i32 @ipvlan_multicast_enqueue(ptr noundef %1, ptr noundef nonnull %14, i32 noundef 0) #2 br label %21 19: ; preds = %2 %20 = tail call i32 @ipvlan_handle_mode_l3(ptr noundef nonnull %0, ptr noundef %1) #2 br label %21 21: ; preds = %12, %16, %9, %19 %22 = phi i32 [ %5, %9 ], [ %20, %19 ], [ %5, %16 ], [ %5, %12 ] ret i32 %22 } declare ptr @eth_hdr(ptr noundef) local_unnamed_addr #1 declare i64 @is_multicast_ether_addr(i32 noundef) local_unnamed_addr #1 declare i64 @ipvlan_external_frame(ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @skb_clone(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ipvlan_skb_crossing_ns(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @ipvlan_multicast_enqueue(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ipvlan_handle_mode_l3(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0} !12 = !{!13, !11, i64 0} !13 = !{!"ethhdr", !11, i64 0}
linux_drivers_net_ipvlan_extr_ipvlan_core.c_ipvlan_handle_mode_l2
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_client/extr_delete.c_path_driver_cb_func.c' source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_client/extr_delete.c_path_driver_cb_func.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @SVN_INVALID_REVNUM = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @path_driver_cb_func], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal ptr @path_driver_cb_func(ptr nocapture noundef writeonly %0, ptr noundef %1, ptr nocapture noundef readonly %2, ptr noundef %3, ptr noundef %4) #0 { store ptr null, ptr %0, align 8, !tbaa !5 %6 = load ptr, ptr %2, align 8, !tbaa !9 %7 = load i32, ptr @SVN_INVALID_REVNUM, align 4, !tbaa !11 %8 = tail call ptr %6(ptr noundef %3, i32 noundef %7, ptr noundef %1, ptr noundef %4) #1 ret ptr %8 } attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"TYPE_2__", !6, i64 0} !11 = !{!12, !12, i64 0} !12 = !{!"int", !7, i64 0}
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_client/extr_delete.c_path_driver_cb_func.c' source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_client/extr_delete.c_path_driver_cb_func.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @SVN_INVALID_REVNUM = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @path_driver_cb_func], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal ptr @path_driver_cb_func(ptr nocapture noundef writeonly %0, ptr noundef %1, ptr nocapture noundef readonly %2, ptr noundef %3, ptr noundef %4) #0 { store ptr null, ptr %0, align 8, !tbaa !6 %6 = load ptr, ptr %2, align 8, !tbaa !10 %7 = load i32, ptr @SVN_INVALID_REVNUM, align 4, !tbaa !12 %8 = tail call ptr %6(ptr noundef %3, i32 noundef %7, ptr noundef %1, ptr noundef %4) #1 ret ptr %8 } attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"TYPE_2__", !7, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"int", !8, i64 0}
freebsd_contrib_subversion_subversion_libsvn_client_extr_delete.c_path_driver_cb_func
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/gfs2/extr_glock.c_gfs2_register_debugfs.c' source_filename = "AnghaBench/fastsocket/kernel/fs/gfs2/extr_glock.c_gfs2_register_debugfs.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [5 x i8] c"gfs2\00", align 1 @gfs2_root = dso_local local_unnamed_addr global i64 0, align 8 @ENOMEM = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local i32 @gfs2_register_debugfs() local_unnamed_addr #0 { %1 = tail call i64 @debugfs_create_dir(ptr noundef nonnull @.str, ptr noundef null) #2 store i64 %1, ptr @gfs2_root, align 8, !tbaa !5 %2 = icmp eq i64 %1, 0 %3 = load i32, ptr @ENOMEM, align 4 %4 = sub nsw i32 0, %3 %5 = select i1 %2, i32 %4, i32 0 ret i32 %5 } declare i64 @debugfs_create_dir(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/gfs2/extr_glock.c_gfs2_register_debugfs.c' source_filename = "AnghaBench/fastsocket/kernel/fs/gfs2/extr_glock.c_gfs2_register_debugfs.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [5 x i8] c"gfs2\00", align 1 @gfs2_root = common local_unnamed_addr global i64 0, align 8 @ENOMEM = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define range(i32 -2147483647, -2147483648) i32 @gfs2_register_debugfs() local_unnamed_addr #0 { %1 = tail call i64 @debugfs_create_dir(ptr noundef nonnull @.str, ptr noundef null) #2 store i64 %1, ptr @gfs2_root, align 8, !tbaa !6 %2 = icmp eq i64 %1, 0 %3 = load i32, ptr @ENOMEM, align 4 %4 = sub nsw i32 0, %3 %5 = select i1 %2, i32 %4, i32 0 ret i32 %5 } declare i64 @debugfs_create_dir(ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
fastsocket_kernel_fs_gfs2_extr_glock.c_gfs2_register_debugfs
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_x/extr_pack.c_tweak_path_for_ordering.c' source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_x/extr_pack.c_tweak_path_for_ordering.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [6 x i8] c"trunk\00", align 1 @.str.1 = private unnamed_addr constant [7 x i8] c"branch\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @tweak_path_for_ordering], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef ptr @tweak_path_for_ordering(ptr noundef %0, ptr noundef %1) #0 { %3 = tail call ptr @apr_pstrdup(ptr noundef %1, ptr noundef %0) #3 %4 = tail call ptr @strstr(ptr noundef nonnull dereferenceable(1) %3, ptr noundef nonnull dereferenceable(1) @.str) %5 = icmp eq ptr %4, null br i1 %5, label %11, label %6 6: ; preds = %2, %6 %7 = phi ptr [ %9, %6 ], [ %4, %2 ] store i8 1, ptr %7, align 1, !tbaa !5 %8 = getelementptr inbounds i8, ptr %7, i64 1 %9 = tail call ptr @strstr(ptr noundef nonnull dereferenceable(1) %8, ptr noundef nonnull dereferenceable(1) @.str) %10 = icmp eq ptr %9, null br i1 %10, label %11, label %6, !llvm.loop !8 11: ; preds = %6, %2 %12 = tail call ptr @strstr(ptr noundef nonnull dereferenceable(1) %3, ptr noundef nonnull dereferenceable(1) @.str.1) %13 = icmp eq ptr %12, null br i1 %13, label %19, label %14 14: ; preds = %11, %14 %15 = phi ptr [ %17, %14 ], [ %12, %11 ] store i8 2, ptr %15, align 1, !tbaa !5 %16 = getelementptr inbounds i8, ptr %15, i64 1 %17 = tail call ptr @strstr(ptr noundef nonnull dereferenceable(1) %16, ptr noundef nonnull dereferenceable(1) @.str.1) %18 = icmp eq ptr %17, null br i1 %18, label %19, label %14, !llvm.loop !8 19: ; preds = %14, %11 ret ptr %3 } declare ptr @apr_pstrdup(ptr noundef, ptr noundef) local_unnamed_addr #1 ; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read) declare ptr @strstr(ptr noundef, ptr nocapture noundef) local_unnamed_addr #2 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"omnipotent char", !7, i64 0} !7 = !{!"Simple C/C++ TBAA"} !8 = distinct !{!8, !9} !9 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_x/extr_pack.c_tweak_path_for_ordering.c' source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_fs_x/extr_pack.c_tweak_path_for_ordering.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [6 x i8] c"trunk\00", align 1 @.str.1 = private unnamed_addr constant [7 x i8] c"branch\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @tweak_path_for_ordering], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal noundef ptr @tweak_path_for_ordering(ptr noundef %0, ptr noundef %1) #0 { %3 = tail call ptr @apr_pstrdup(ptr noundef %1, ptr noundef %0) #3 %4 = tail call ptr @strstr(ptr noundef nonnull dereferenceable(1) %3, ptr noundef nonnull dereferenceable(1) @.str) %5 = icmp eq ptr %4, null br i1 %5, label %11, label %6 6: ; preds = %2, %6 %7 = phi ptr [ %9, %6 ], [ %4, %2 ] store i8 1, ptr %7, align 1, !tbaa !6 %8 = getelementptr inbounds i8, ptr %7, i64 1 %9 = tail call ptr @strstr(ptr noundef nonnull dereferenceable(1) %8, ptr noundef nonnull dereferenceable(1) @.str) %10 = icmp eq ptr %9, null br i1 %10, label %11, label %6, !llvm.loop !9 11: ; preds = %6, %2 %12 = tail call ptr @strstr(ptr noundef nonnull dereferenceable(1) %3, ptr noundef nonnull dereferenceable(1) @.str.1) %13 = icmp eq ptr %12, null br i1 %13, label %19, label %14 14: ; preds = %11, %14 %15 = phi ptr [ %17, %14 ], [ %12, %11 ] store i8 2, ptr %15, align 1, !tbaa !6 %16 = getelementptr inbounds i8, ptr %15, i64 1 %17 = tail call ptr @strstr(ptr noundef nonnull dereferenceable(1) %16, ptr noundef nonnull dereferenceable(1) @.str.1) %18 = icmp eq ptr %17, null br i1 %18, label %19, label %14, !llvm.loop !9 19: ; preds = %14, %11 ret ptr %3 } declare ptr @apr_pstrdup(ptr noundef, ptr noundef) local_unnamed_addr #1 ; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read) declare ptr @strstr(ptr noundef, ptr nocapture noundef) local_unnamed_addr #2 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = distinct !{!9, !10} !10 = !{!"llvm.loop.mustprogress"}
freebsd_contrib_subversion_subversion_libsvn_fs_x_extr_pack.c_tweak_path_for_ordering
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sun/extr_sungem.c_gem_do_start.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/sun/extr_sungem.c_gem_do_start.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [36 x i8] c"Failed to enable chip on PCI bus !\0A\00", align 1 @ENXIO = dso_local local_unnamed_addr global i32 0, align 4 @gem_interrupt = dso_local local_unnamed_addr global i32 0, align 4 @IRQF_SHARED = dso_local local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [25 x i8] c"failed to request irq !\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @gem_do_start], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @gem_do_start(ptr noundef %0) #0 { %2 = tail call ptr @netdev_priv(ptr noundef %0) #2 %3 = tail call i32 @gem_get_cell(ptr noundef %2) #2 %4 = load ptr, ptr %2, align 8, !tbaa !5 %5 = tail call i32 @pci_enable_device(ptr noundef %4) #2 %6 = icmp eq i32 %5, 0 br i1 %6, label %12, label %7 7: ; preds = %1 %8 = tail call i32 @netdev_err(ptr noundef %0, ptr noundef nonnull @.str) #2 %9 = tail call i32 @gem_put_cell(ptr noundef nonnull %2) #2 %10 = load i32, ptr @ENXIO, align 4, !tbaa !10 %11 = sub nsw i32 0, %10 br label %32 12: ; preds = %1 %13 = load ptr, ptr %2, align 8, !tbaa !5 %14 = tail call i32 @pci_set_master(ptr noundef %13) #2 %15 = tail call i32 @gem_reinit_chip(ptr noundef nonnull %2) #2 %16 = load ptr, ptr %2, align 8, !tbaa !5 %17 = load i32, ptr %16, align 4, !tbaa !12 %18 = load i32, ptr @gem_interrupt, align 4, !tbaa !10 %19 = load i32, ptr @IRQF_SHARED, align 4, !tbaa !10 %20 = load i32, ptr %0, align 4, !tbaa !14 %21 = tail call i32 @request_irq(i32 noundef %17, i32 noundef %18, i32 noundef %19, i32 noundef %20, ptr noundef nonnull %0) #2 %22 = icmp eq i32 %21, 0 br i1 %22, label %28, label %23 23: ; preds = %12 %24 = tail call i32 @netdev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.1) #2 %25 = tail call i32 @gem_reset(ptr noundef nonnull %2) #2 %26 = tail call i32 @gem_clean_rings(ptr noundef nonnull %2) #2 %27 = tail call i32 @gem_put_cell(ptr noundef nonnull %2) #2 br label %32 28: ; preds = %12 %29 = tail call i32 @netif_device_attach(ptr noundef nonnull %0) #2 %30 = tail call i32 @gem_netif_start(ptr noundef nonnull %2) #2 %31 = tail call i32 @gem_init_phy(ptr noundef nonnull %2) #2 br label %32 32: ; preds = %28, %23, %7 %33 = phi i32 [ %11, %7 ], [ %21, %23 ], [ 0, %28 ] ret i32 %33 } declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1 declare i32 @gem_get_cell(ptr noundef) local_unnamed_addr #1 declare i32 @pci_enable_device(ptr noundef) local_unnamed_addr #1 declare i32 @netdev_err(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @gem_put_cell(ptr noundef) local_unnamed_addr #1 declare i32 @pci_set_master(ptr noundef) local_unnamed_addr #1 declare i32 @gem_reinit_chip(ptr noundef) local_unnamed_addr #1 declare i32 @request_irq(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @gem_reset(ptr noundef) local_unnamed_addr #1 declare i32 @gem_clean_rings(ptr noundef) local_unnamed_addr #1 declare i32 @netif_device_attach(ptr noundef) local_unnamed_addr #1 declare i32 @gem_netif_start(ptr noundef) local_unnamed_addr #1 declare i32 @gem_init_phy(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"gem", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0} !12 = !{!13, !11, i64 0} !13 = !{!"TYPE_3__", !11, i64 0} !14 = !{!15, !11, i64 0} !15 = !{!"net_device", !11, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sun/extr_sungem.c_gem_do_start.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/sun/extr_sungem.c_gem_do_start.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [36 x i8] c"Failed to enable chip on PCI bus !\0A\00", align 1 @ENXIO = common local_unnamed_addr global i32 0, align 4 @gem_interrupt = common local_unnamed_addr global i32 0, align 4 @IRQF_SHARED = common local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [25 x i8] c"failed to request irq !\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @gem_do_start], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @gem_do_start(ptr noundef %0) #0 { %2 = tail call ptr @netdev_priv(ptr noundef %0) #2 %3 = tail call i32 @gem_get_cell(ptr noundef %2) #2 %4 = load ptr, ptr %2, align 8, !tbaa !6 %5 = tail call i32 @pci_enable_device(ptr noundef %4) #2 %6 = icmp eq i32 %5, 0 br i1 %6, label %12, label %7 7: ; preds = %1 %8 = tail call i32 @netdev_err(ptr noundef %0, ptr noundef nonnull @.str) #2 %9 = tail call i32 @gem_put_cell(ptr noundef nonnull %2) #2 %10 = load i32, ptr @ENXIO, align 4, !tbaa !11 %11 = sub nsw i32 0, %10 br label %32 12: ; preds = %1 %13 = load ptr, ptr %2, align 8, !tbaa !6 %14 = tail call i32 @pci_set_master(ptr noundef %13) #2 %15 = tail call i32 @gem_reinit_chip(ptr noundef nonnull %2) #2 %16 = load ptr, ptr %2, align 8, !tbaa !6 %17 = load i32, ptr %16, align 4, !tbaa !13 %18 = load i32, ptr @gem_interrupt, align 4, !tbaa !11 %19 = load i32, ptr @IRQF_SHARED, align 4, !tbaa !11 %20 = load i32, ptr %0, align 4, !tbaa !15 %21 = tail call i32 @request_irq(i32 noundef %17, i32 noundef %18, i32 noundef %19, i32 noundef %20, ptr noundef nonnull %0) #2 %22 = icmp eq i32 %21, 0 br i1 %22, label %28, label %23 23: ; preds = %12 %24 = tail call i32 @netdev_err(ptr noundef nonnull %0, ptr noundef nonnull @.str.1) #2 %25 = tail call i32 @gem_reset(ptr noundef nonnull %2) #2 %26 = tail call i32 @gem_clean_rings(ptr noundef nonnull %2) #2 %27 = tail call i32 @gem_put_cell(ptr noundef nonnull %2) #2 br label %32 28: ; preds = %12 %29 = tail call i32 @netif_device_attach(ptr noundef nonnull %0) #2 %30 = tail call i32 @gem_netif_start(ptr noundef nonnull %2) #2 %31 = tail call i32 @gem_init_phy(ptr noundef nonnull %2) #2 br label %32 32: ; preds = %28, %23, %7 %33 = phi i32 [ %11, %7 ], [ %21, %23 ], [ 0, %28 ] ret i32 %33 } declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1 declare i32 @gem_get_cell(ptr noundef) local_unnamed_addr #1 declare i32 @pci_enable_device(ptr noundef) local_unnamed_addr #1 declare i32 @netdev_err(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @gem_put_cell(ptr noundef) local_unnamed_addr #1 declare i32 @pci_set_master(ptr noundef) local_unnamed_addr #1 declare i32 @gem_reinit_chip(ptr noundef) local_unnamed_addr #1 declare i32 @request_irq(i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @gem_reset(ptr noundef) local_unnamed_addr #1 declare i32 @gem_clean_rings(ptr noundef) local_unnamed_addr #1 declare i32 @netif_device_attach(ptr noundef) local_unnamed_addr #1 declare i32 @gem_netif_start(ptr noundef) local_unnamed_addr #1 declare i32 @gem_init_phy(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"gem", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !12, i64 0} !12 = !{!"int", !9, i64 0} !13 = !{!14, !12, i64 0} !14 = !{!"TYPE_3__", !12, i64 0} !15 = !{!16, !12, i64 0} !16 = !{!"net_device", !12, i64 0}
linux_drivers_net_ethernet_sun_extr_sungem.c_gem_do_start
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_evergreen_cs.c_evergreen_packet0_check.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_evergreen_cs.c_evergreen_packet0_check.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [28 x i8] c"No reloc for ib[%d]=0x%04X\0A\00", align 1 @.str.1 = private unnamed_addr constant [39 x i8] c"Forbidden register 0x%04X in cs at %d\0A\00", align 1 @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @evergreen_packet0_check], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @evergreen_packet0_check(ptr noundef %0, ptr nocapture readnone %1, i32 noundef %2, i32 noundef %3) #0 { %5 = icmp eq i32 %3, 128 br i1 %5, label %6, label %11 6: ; preds = %4 %7 = tail call i32 @evergreen_cs_packet_parse_vline(ptr noundef %0) #2 %8 = icmp eq i32 %7, 0 br i1 %8, label %15, label %9 9: ; preds = %6 %10 = tail call i32 @DRM_ERROR(ptr noundef nonnull @.str, i32 noundef %2, i32 noundef 128) #2 br label %15 11: ; preds = %4 %12 = tail call i32 @pr_err(ptr noundef nonnull @.str.1, i32 noundef %3, i32 noundef %2) #2 %13 = load i32, ptr @EINVAL, align 4, !tbaa !5 %14 = sub nsw i32 0, %13 br label %15 15: ; preds = %6, %11, %9 %16 = phi i32 [ %7, %9 ], [ %14, %11 ], [ 0, %6 ] ret i32 %16 } declare i32 @evergreen_cs_packet_parse_vline(ptr noundef) local_unnamed_addr #1 declare i32 @DRM_ERROR(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @pr_err(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_evergreen_cs.c_evergreen_packet0_check.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_evergreen_cs.c_evergreen_packet0_check.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [28 x i8] c"No reloc for ib[%d]=0x%04X\0A\00", align 1 @.str.1 = private unnamed_addr constant [39 x i8] c"Forbidden register 0x%04X in cs at %d\0A\00", align 1 @EINVAL = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @evergreen_packet0_check], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @evergreen_packet0_check(ptr noundef %0, ptr nocapture readnone %1, i32 noundef %2, i32 noundef %3) #0 { %5 = icmp eq i32 %3, 128 br i1 %5, label %6, label %11 6: ; preds = %4 %7 = tail call i32 @evergreen_cs_packet_parse_vline(ptr noundef %0) #2 %8 = icmp eq i32 %7, 0 br i1 %8, label %15, label %9 9: ; preds = %6 %10 = tail call i32 @DRM_ERROR(ptr noundef nonnull @.str, i32 noundef %2, i32 noundef 128) #2 br label %15 11: ; preds = %4 %12 = tail call i32 @pr_err(ptr noundef nonnull @.str.1, i32 noundef %3, i32 noundef %2) #2 %13 = load i32, ptr @EINVAL, align 4, !tbaa !6 %14 = sub nsw i32 0, %13 br label %15 15: ; preds = %6, %11, %9 %16 = phi i32 [ %7, %9 ], [ %14, %11 ], [ 0, %6 ] ret i32 %16 } declare i32 @evergreen_cs_packet_parse_vline(ptr noundef) local_unnamed_addr #1 declare i32 @DRM_ERROR(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @pr_err(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_drivers_gpu_drm_radeon_extr_evergreen_cs.c_evergreen_packet0_check
; ModuleID = 'AnghaBench/linux/drivers/media/platform/qcom/venus/extr_vdec.c_find_format_by_index.c' source_filename = "AnghaBench/linux/drivers/media/platform/qcom/venus/extr_vdec.c_find_format_by_index.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.venus_format = type { i64, i32 } @vdec_formats = dso_local local_unnamed_addr global ptr null, align 8 @V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @find_format_by_index], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal ptr @find_format_by_index(ptr noundef %0, i32 noundef %1, i64 noundef %2) #0 { %4 = load ptr, ptr @vdec_formats, align 8, !tbaa !5 %5 = tail call i32 @ARRAY_SIZE(ptr noundef %4) #2 %6 = icmp ult i32 %5, %1 br i1 %6, label %44, label %7 7: ; preds = %3 %8 = icmp eq i32 %5, 0 br i1 %8, label %38, label %9 9: ; preds = %7 %10 = zext i32 %5 to i64 br label %11 11: ; preds = %9, %32 %12 = phi i64 [ 0, %9 ], [ %34, %32 ] %13 = phi i32 [ 0, %9 ], [ %33, %32 ] %14 = getelementptr inbounds %struct.venus_format, ptr %4, i64 %12 %15 = load i64, ptr %14, align 8, !tbaa !9 %16 = icmp eq i64 %15, %2 br i1 %16, label %17, label %32 17: ; preds = %11 %18 = load i64, ptr @V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, align 8, !tbaa !13 %19 = icmp eq i64 %18, %2 br i1 %19, label %20, label %25 20: ; preds = %17 %21 = getelementptr inbounds %struct.venus_format, ptr %4, i64 %12, i32 1 %22 = load i32, ptr %21, align 8, !tbaa !14 %23 = tail call i64 @venus_helper_check_codec(ptr noundef %0, i32 noundef %22) #2 %24 = icmp ne i64 %23, 0 br label %25 25: ; preds = %20, %17 %26 = phi i1 [ true, %17 ], [ %24, %20 ] %27 = icmp eq i32 %13, %1 %28 = select i1 %27, i1 %26, i1 false br i1 %28, label %36, label %29 29: ; preds = %25 %30 = zext i1 %26 to i32 %31 = add i32 %13, %30 br label %32 32: ; preds = %29, %11 %33 = phi i32 [ %13, %11 ], [ %31, %29 ] %34 = add nuw nsw i64 %12, 1 %35 = icmp eq i64 %34, %10 br i1 %35, label %44, label %11, !llvm.loop !15 36: ; preds = %25 %37 = trunc i64 %12 to i32 br label %38 38: ; preds = %36, %7 %39 = phi i32 [ 0, %7 ], [ %37, %36 ] %40 = icmp eq i32 %39, %5 br i1 %40, label %44, label %41 41: ; preds = %38 %42 = zext i32 %39 to i64 %43 = getelementptr inbounds %struct.venus_format, ptr %4, i64 %42 br label %44 44: ; preds = %32, %38, %3, %41 %45 = phi ptr [ %43, %41 ], [ null, %3 ], [ null, %38 ], [ null, %32 ] ret ptr %45 } declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1 declare i64 @venus_helper_check_codec(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"venus_format", !11, i64 0, !12, i64 8} !11 = !{!"long", !7, i64 0} !12 = !{!"int", !7, i64 0} !13 = !{!11, !11, i64 0} !14 = !{!10, !12, i64 8} !15 = distinct !{!15, !16} !16 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/linux/drivers/media/platform/qcom/venus/extr_vdec.c_find_format_by_index.c' source_filename = "AnghaBench/linux/drivers/media/platform/qcom/venus/extr_vdec.c_find_format_by_index.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.venus_format = type { i64, i32 } @vdec_formats = common local_unnamed_addr global ptr null, align 8 @V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @find_format_by_index], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal ptr @find_format_by_index(ptr noundef %0, i32 noundef %1, i64 noundef %2) #0 { %4 = load ptr, ptr @vdec_formats, align 8, !tbaa !6 %5 = tail call i32 @ARRAY_SIZE(ptr noundef %4) #2 %6 = icmp ult i32 %5, %1 br i1 %6, label %44, label %7 7: ; preds = %3 %8 = icmp eq i32 %5, 0 br i1 %8, label %38, label %9 9: ; preds = %7 %10 = zext i32 %5 to i64 br label %11 11: ; preds = %9, %32 %12 = phi i64 [ 0, %9 ], [ %34, %32 ] %13 = phi i32 [ 0, %9 ], [ %33, %32 ] %14 = getelementptr inbounds %struct.venus_format, ptr %4, i64 %12 %15 = load i64, ptr %14, align 8, !tbaa !10 %16 = icmp eq i64 %15, %2 br i1 %16, label %17, label %32 17: ; preds = %11 %18 = load i64, ptr @V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE, align 8, !tbaa !14 %19 = icmp eq i64 %18, %2 br i1 %19, label %20, label %25 20: ; preds = %17 %21 = getelementptr inbounds i8, ptr %14, i64 8 %22 = load i32, ptr %21, align 8, !tbaa !15 %23 = tail call i64 @venus_helper_check_codec(ptr noundef %0, i32 noundef %22) #2 %24 = icmp ne i64 %23, 0 br label %25 25: ; preds = %20, %17 %26 = phi i1 [ true, %17 ], [ %24, %20 ] %27 = icmp eq i32 %13, %1 %28 = select i1 %27, i1 %26, i1 false br i1 %28, label %36, label %29 29: ; preds = %25 %30 = zext i1 %26 to i32 %31 = add i32 %13, %30 br label %32 32: ; preds = %29, %11 %33 = phi i32 [ %13, %11 ], [ %31, %29 ] %34 = add nuw nsw i64 %12, 1 %35 = icmp eq i64 %34, %10 br i1 %35, label %44, label %11, !llvm.loop !16 36: ; preds = %25 %37 = trunc nuw i64 %12 to i32 br label %38 38: ; preds = %36, %7 %39 = phi i32 [ 0, %7 ], [ %37, %36 ] %40 = icmp eq i32 %39, %5 br i1 %40, label %44, label %41 41: ; preds = %38 %42 = zext i32 %39 to i64 %43 = getelementptr inbounds %struct.venus_format, ptr %4, i64 %42 br label %44 44: ; preds = %32, %38, %3, %41 %45 = phi ptr [ %43, %41 ], [ null, %3 ], [ null, %38 ], [ null, %32 ] ret ptr %45 } declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1 declare i64 @venus_helper_check_codec(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"venus_format", !12, i64 0, !13, i64 8} !12 = !{!"long", !8, i64 0} !13 = !{!"int", !8, i64 0} !14 = !{!12, !12, i64 0} !15 = !{!11, !13, i64 8} !16 = distinct !{!16, !17} !17 = !{!"llvm.loop.mustprogress"}
linux_drivers_media_platform_qcom_venus_extr_vdec.c_find_format_by_index
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/e1000e/extr_ethtool.c_reg_pattern_test.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/e1000e/extr_ethtool.c_reg_pattern_test.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @reg_pattern_test.test = internal constant [4 x i32] [i32 1515870810, i32 -1515870811, i32 0, i32 -1], align 16 @.str = private unnamed_addr constant [62 x i8] c"pattern test failed (reg 0x%05X): got 0x%08X expected 0x%08X\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @reg_pattern_test], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef i32 @reg_pattern_test(ptr noundef %0, ptr nocapture noundef writeonly %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #0 { %7 = tail call i32 @ARRAY_SIZE(ptr noundef nonnull @reg_pattern_test.test) #2 %8 = icmp sgt i32 %7, 0 br i1 %8, label %9, label %29 9: ; preds = %6 %10 = and i32 %5, %4 br label %16 11: ; preds = %16 %12 = add nuw nsw i64 %17, 1 %13 = tail call i32 @ARRAY_SIZE(ptr noundef nonnull @reg_pattern_test.test) #2 %14 = sext i32 %13 to i64 %15 = icmp slt i64 %12, %14 br i1 %15, label %16, label %29, !llvm.loop !5 16: ; preds = %9, %11 %17 = phi i64 [ 0, %9 ], [ %12, %11 ] %18 = getelementptr inbounds [4 x i32], ptr @reg_pattern_test.test, i64 0, i64 %17 %19 = load i32, ptr %18, align 4, !tbaa !7 %20 = and i32 %19, %5 %21 = tail call i32 @E1000_WRITE_REG_ARRAY(ptr noundef %0, i32 noundef %2, i32 noundef %3, i32 noundef %20) #2 %22 = tail call i32 @E1000_READ_REG_ARRAY(ptr noundef %0, i32 noundef %2, i32 noundef %3) #2 %23 = and i32 %10, %19 %24 = icmp eq i32 %22, %23 br i1 %24, label %11, label %25 25: ; preds = %16 %26 = shl i32 %3, 2 %27 = add nsw i32 %26, %2 %28 = tail call i32 @e_err(ptr noundef nonnull @.str, i32 noundef %27, i32 noundef %22, i32 noundef %23) #2 store i32 %2, ptr %1, align 4, !tbaa !7 br label %29 29: ; preds = %11, %6, %25 %30 = phi i32 [ 1, %25 ], [ 0, %6 ], [ 0, %11 ] ret i32 %30 } declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1 declare i32 @E1000_WRITE_REG_ARRAY(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @E1000_READ_REG_ARRAY(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @e_err(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = distinct !{!5, !6} !6 = !{!"llvm.loop.mustprogress"} !7 = !{!8, !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/e1000e/extr_ethtool.c_reg_pattern_test.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/e1000e/extr_ethtool.c_reg_pattern_test.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @reg_pattern_test.test = internal constant [4 x i32] [i32 1515870810, i32 -1515870811, i32 0, i32 -1], align 4 @.str = private unnamed_addr constant [62 x i8] c"pattern test failed (reg 0x%05X): got 0x%08X expected 0x%08X\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @reg_pattern_test], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 0, 2) i32 @reg_pattern_test(ptr noundef %0, ptr nocapture noundef writeonly %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #0 { %7 = tail call i32 @ARRAY_SIZE(ptr noundef nonnull @reg_pattern_test.test) #2 %8 = icmp sgt i32 %7, 0 br i1 %8, label %9, label %29 9: ; preds = %6 %10 = and i32 %5, %4 br label %16 11: ; preds = %16 %12 = add nuw nsw i64 %17, 1 %13 = tail call i32 @ARRAY_SIZE(ptr noundef nonnull @reg_pattern_test.test) #2 %14 = sext i32 %13 to i64 %15 = icmp slt i64 %12, %14 br i1 %15, label %16, label %29, !llvm.loop !6 16: ; preds = %9, %11 %17 = phi i64 [ 0, %9 ], [ %12, %11 ] %18 = getelementptr inbounds [4 x i32], ptr @reg_pattern_test.test, i64 0, i64 %17 %19 = load i32, ptr %18, align 4, !tbaa !8 %20 = and i32 %19, %5 %21 = tail call i32 @E1000_WRITE_REG_ARRAY(ptr noundef %0, i32 noundef %2, i32 noundef %3, i32 noundef %20) #2 %22 = tail call i32 @E1000_READ_REG_ARRAY(ptr noundef %0, i32 noundef %2, i32 noundef %3) #2 %23 = and i32 %10, %19 %24 = icmp eq i32 %22, %23 br i1 %24, label %11, label %25 25: ; preds = %16 %26 = shl i32 %3, 2 %27 = add nsw i32 %26, %2 %28 = tail call i32 @e_err(ptr noundef nonnull @.str, i32 noundef %27, i32 noundef %22, i32 noundef %23) #2 store i32 %2, ptr %1, align 4, !tbaa !8 br label %29 29: ; preds = %11, %6, %25 %30 = phi i32 [ 1, %25 ], [ 0, %6 ], [ 0, %11 ] ret i32 %30 } declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1 declare i32 @E1000_WRITE_REG_ARRAY(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @E1000_READ_REG_ARRAY(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @e_err(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = distinct !{!6, !7} !7 = !{!"llvm.loop.mustprogress"} !8 = !{!9, !9, i64 0} !9 = !{!"int", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"}
fastsocket_kernel_drivers_net_e1000e_extr_ethtool.c_reg_pattern_test
; ModuleID = 'AnghaBench/numpy/numpy/core/src/multiarray/extr_dragon4.c_BigInt_Set_uint32.c' source_filename = "AnghaBench/numpy/numpy/core/src/multiarray/extr_dragon4.c_BigInt_Set_uint32.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_3__ = type { i32, ptr } @llvm.compiler.used = appending global [1 x ptr] [ptr @BigInt_Set_uint32], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable define internal void @BigInt_Set_uint32(ptr nocapture noundef %0, i64 noundef %1) #0 { %3 = icmp eq i64 %1, 0 br i1 %3, label %7, label %4 4: ; preds = %2 %5 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1 %6 = load ptr, ptr %5, align 8, !tbaa !5 store i64 %1, ptr %6, align 8, !tbaa !11 br label %7 7: ; preds = %2, %4 %8 = phi i32 [ 1, %4 ], [ 0, %2 ] store i32 %8, ptr %0, align 8, !tbaa !13 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 8} !6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!12, !12, i64 0} !12 = !{!"long", !8, i64 0} !13 = !{!6, !7, i64 0}
; ModuleID = 'AnghaBench/numpy/numpy/core/src/multiarray/extr_dragon4.c_BigInt_Set_uint32.c' source_filename = "AnghaBench/numpy/numpy/core/src/multiarray/extr_dragon4.c_BigInt_Set_uint32.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @BigInt_Set_uint32], section "llvm.metadata" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable(sync) define internal void @BigInt_Set_uint32(ptr nocapture noundef %0, i64 noundef %1) #0 { %3 = icmp eq i64 %1, 0 br i1 %3, label %7, label %4 4: ; preds = %2 %5 = getelementptr inbounds i8, ptr %0, i64 8 %6 = load ptr, ptr %5, align 8, !tbaa !6 store i64 %1, ptr %6, align 8, !tbaa !12 br label %7 7: ; preds = %2, %4 %8 = phi i32 [ 1, %4 ], [ 0, %2 ] store i32 %8, ptr %0, align 8, !tbaa !14 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 8} !7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!13, !13, i64 0} !13 = !{!"long", !9, i64 0} !14 = !{!7, !8, i64 0}
numpy_numpy_core_src_multiarray_extr_dragon4.c_BigInt_Set_uint32
; ModuleID = 'AnghaBench/linux/tools/perf/ui/extr_hist.c_hpp__equal.c' source_filename = "AnghaBench/linux/tools/perf/ui/extr_hist.c_hpp__equal.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @hpp__equal], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @hpp__equal(ptr noundef %0, ptr noundef %1) #0 { %3 = tail call i32 @perf_hpp__is_hpp_entry(ptr noundef %0) #2 %4 = icmp eq i32 %3, 0 br i1 %4, label %13, label %5 5: ; preds = %2 %6 = tail call i32 @perf_hpp__is_hpp_entry(ptr noundef %1) #2 %7 = icmp eq i32 %6, 0 br i1 %7, label %13, label %8 8: ; preds = %5 %9 = load i64, ptr %0, align 8, !tbaa !5 %10 = load i64, ptr %1, align 8, !tbaa !5 %11 = icmp eq i64 %9, %10 %12 = zext i1 %11 to i32 br label %13 13: ; preds = %2, %5, %8 %14 = phi i32 [ %12, %8 ], [ 0, %5 ], [ 0, %2 ] ret i32 %14 } declare i32 @perf_hpp__is_hpp_entry(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"perf_hpp_fmt", !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/tools/perf/ui/extr_hist.c_hpp__equal.c' source_filename = "AnghaBench/linux/tools/perf/ui/extr_hist.c_hpp__equal.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @hpp__equal], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 0, 2) i32 @hpp__equal(ptr noundef %0, ptr noundef %1) #0 { %3 = tail call i32 @perf_hpp__is_hpp_entry(ptr noundef %0) #2 %4 = icmp eq i32 %3, 0 br i1 %4, label %13, label %5 5: ; preds = %2 %6 = tail call i32 @perf_hpp__is_hpp_entry(ptr noundef %1) #2 %7 = icmp eq i32 %6, 0 br i1 %7, label %13, label %8 8: ; preds = %5 %9 = load i64, ptr %0, align 8, !tbaa !6 %10 = load i64, ptr %1, align 8, !tbaa !6 %11 = icmp eq i64 %9, %10 %12 = zext i1 %11 to i32 br label %13 13: ; preds = %2, %5, %8 %14 = phi i32 [ %12, %8 ], [ 0, %5 ], [ 0, %2 ] ret i32 %14 } declare i32 @perf_hpp__is_hpp_entry(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"perf_hpp_fmt", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
linux_tools_perf_ui_extr_hist.c_hpp__equal
; ModuleID = 'AnghaBench/linux/arch/sparc/kernel/extr_auxio_64.c_auxio_set_lte.c' source_filename = "AnghaBench/linux/arch/sparc/kernel/extr_auxio_64.c_auxio_set_lte.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @auxio_devtype = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local void @auxio_set_lte(i32 noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr @auxio_devtype, align 4, !tbaa !5 %3 = icmp eq i32 %2, 128 br i1 %3, label %4, label %6 4: ; preds = %1 %5 = tail call i32 @__auxio_sbus_set_lte(i32 noundef %0) #2 br label %6 6: ; preds = %1, %4 ret void } declare i32 @__auxio_sbus_set_lte(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/arch/sparc/kernel/extr_auxio_64.c_auxio_set_lte.c' source_filename = "AnghaBench/linux/arch/sparc/kernel/extr_auxio_64.c_auxio_set_lte.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @auxio_devtype = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define void @auxio_set_lte(i32 noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr @auxio_devtype, align 4, !tbaa !6 %3 = icmp eq i32 %2, 128 br i1 %3, label %4, label %6 4: ; preds = %1 %5 = tail call i32 @__auxio_sbus_set_lte(i32 noundef %0) #2 br label %6 6: ; preds = %1, %4 ret void } declare i32 @__auxio_sbus_set_lte(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_arch_sparc_kernel_extr_auxio_64.c_auxio_set_lte
; ModuleID = 'AnghaBench/linux/fs/extr_dax.c_dax_lock_entry.c' source_filename = "AnghaBench/linux/fs/extr_dax.c_dax_lock_entry.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @DAX_LOCKED = dso_local local_unnamed_addr global i64 0, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @dax_lock_entry], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal ptr @dax_lock_entry(ptr noundef %0, ptr noundef %1) #0 { %3 = tail call i64 @xa_to_value(ptr noundef %1) #2 %4 = load i64, ptr @DAX_LOCKED, align 8, !tbaa !5 %5 = or i64 %4, %3 %6 = tail call i32 @xa_mk_value(i64 noundef %5) #2 %7 = tail call ptr @xas_store(ptr noundef %0, i32 noundef %6) #2 ret ptr %7 } declare i64 @xa_to_value(ptr noundef) local_unnamed_addr #1 declare ptr @xas_store(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @xa_mk_value(i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/fs/extr_dax.c_dax_lock_entry.c' source_filename = "AnghaBench/linux/fs/extr_dax.c_dax_lock_entry.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @DAX_LOCKED = common local_unnamed_addr global i64 0, align 8 @llvm.used = appending global [1 x ptr] [ptr @dax_lock_entry], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal ptr @dax_lock_entry(ptr noundef %0, ptr noundef %1) #0 { %3 = tail call i64 @xa_to_value(ptr noundef %1) #2 %4 = load i64, ptr @DAX_LOCKED, align 8, !tbaa !6 %5 = or i64 %4, %3 %6 = tail call i32 @xa_mk_value(i64 noundef %5) #2 %7 = tail call ptr @xas_store(ptr noundef %0, i32 noundef %6) #2 ret ptr %7 } declare i64 @xa_to_value(ptr noundef) local_unnamed_addr #1 declare ptr @xas_store(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @xa_mk_value(i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_fs_extr_dax.c_dax_lock_entry
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_clearvideo.c_decode_block.c' source_filename = "AnghaBench/FFmpeg/libavcodec/extr_clearvideo.c_decode_block.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_7__ = type { %struct.TYPE_6__, %struct.TYPE_5__, i32 } %struct.TYPE_6__ = type { i32 } %struct.TYPE_5__ = type { i32 } @AVERROR_INVALIDDATA = dso_local local_unnamed_addr global i32 0, align 4 @ff_zigzag_direct = dso_local local_unnamed_addr global ptr null, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @decode_block], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal i32 @decode_block(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #0 { %5 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 2 %6 = tail call i32 @memset(ptr noundef %1, i32 noundef 0, i32 noundef 256) #2 %7 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 1 %8 = load i32, ptr %7, align 4, !tbaa !5 %9 = tail call i32 @get_vlc2(ptr noundef nonnull %5, i32 noundef %8, i32 noundef 9, i32 noundef 3) #2 store i32 %9, ptr %1, align 4, !tbaa !12 %10 = icmp slt i32 %9, 0 br i1 %10, label %11, label %13 11: ; preds = %4 %12 = load i32, ptr @AVERROR_INVALIDDATA, align 4, !tbaa !12 br label %74 13: ; preds = %4 %14 = add nsw i32 %9, -63 store i32 %14, ptr %1, align 4, !tbaa !12 %15 = icmp eq i32 %2, 0 br i1 %15, label %74, label %16 16: ; preds = %13 %17 = and i32 %3, 1 %18 = add nsw i32 %17, -1 br label %19 19: ; preds = %16, %61 %20 = phi i32 [ 1, %16 ], [ %63, %61 ] %21 = load i32, ptr %0, align 4, !tbaa !13 %22 = tail call i32 @get_vlc2(ptr noundef nonnull %5, i32 noundef %21, i32 noundef 9, i32 noundef 2) #2 %23 = icmp slt i32 %22, 0 br i1 %23, label %24, label %26 24: ; preds = %19 %25 = load i32, ptr @AVERROR_INVALIDDATA, align 4, !tbaa !12 br label %74 26: ; preds = %19 %27 = icmp eq i32 %22, 7167 br i1 %27, label %37, label %28 28: ; preds = %26 %29 = lshr i32 %22, 12 %30 = lshr i32 %22, 4 %31 = and i32 %30, 255 %32 = and i32 %22, 15 %33 = tail call i32 @get_bits1(ptr noundef nonnull %5) #2 %34 = icmp eq i32 %33, 0 %35 = sub nsw i32 0, %32 %36 = select i1 %34, i32 %32, i32 %35 br label %41 37: ; preds = %26 %38 = tail call i32 @get_bits1(ptr noundef nonnull %5) #2 %39 = tail call i32 @get_bits(ptr noundef nonnull %5, i32 noundef 6) #2 %40 = tail call i32 @get_sbits(ptr noundef nonnull %5, i32 noundef 8) #2 br label %41 41: ; preds = %28, %37 %42 = phi i32 [ %38, %37 ], [ %29, %28 ] %43 = phi i32 [ %40, %37 ], [ %36, %28 ] %44 = phi i32 [ %39, %37 ], [ %31, %28 ] %45 = icmp eq i32 %43, 0 br i1 %45, label %55, label %46 46: ; preds = %41 %47 = tail call i32 @FFABS(i32 noundef %43) #2 %48 = icmp slt i32 %43, 0 %49 = shl nsw i32 %47, 1 %50 = or disjoint i32 %49, 1 %51 = mul nsw i32 %50, %3 %52 = add nsw i32 %18, %51 %53 = sub nsw i32 0, %52 %54 = select i1 %48, i32 %53, i32 %52 br label %55 55: ; preds = %46, %41 %56 = phi i32 [ %54, %46 ], [ 0, %41 ] %57 = add nsw i32 %44, %20 %58 = icmp sgt i32 %57, 63 br i1 %58, label %59, label %61 59: ; preds = %55 %60 = load i32, ptr @AVERROR_INVALIDDATA, align 4, !tbaa !12 br label %74 61: ; preds = %55 %62 = load ptr, ptr @ff_zigzag_direct, align 8, !tbaa !14 %63 = add nsw i32 %57, 1 %64 = sext i32 %57 to i64 %65 = getelementptr inbounds i64, ptr %62, i64 %64 %66 = load i64, ptr %65, align 8, !tbaa !16 %67 = getelementptr inbounds i32, ptr %1, i64 %66 store i32 %56, ptr %67, align 4, !tbaa !12 %68 = icmp eq i32 %57, 63 %69 = icmp ne i32 %42, 0 %70 = select i1 %68, i1 true, i1 %69 br i1 %70, label %71, label %19, !llvm.loop !18 71: ; preds = %61 %72 = xor i1 %69, true %73 = sext i1 %72 to i32 br label %74 74: ; preds = %13, %71, %59, %24, %11 %75 = phi i32 [ %12, %11 ], [ %25, %24 ], [ %60, %59 ], [ %73, %71 ], [ 0, %13 ] ret i32 %75 } declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @get_vlc2(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @get_bits1(ptr noundef) local_unnamed_addr #1 declare i32 @get_bits(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @get_sbits(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @FFABS(i32 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !8, i64 4} !6 = !{!"TYPE_7__", !7, i64 0, !11, i64 4, !8, i64 8} !7 = !{!"TYPE_6__", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"TYPE_5__", !8, i64 0} !12 = !{!8, !8, i64 0} !13 = !{!6, !8, i64 0} !14 = !{!15, !15, i64 0} !15 = !{!"any pointer", !9, i64 0} !16 = !{!17, !17, i64 0} !17 = !{!"long", !9, i64 0} !18 = distinct !{!18, !19} !19 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_clearvideo.c_decode_block.c' source_filename = "AnghaBench/FFmpeg/libavcodec/extr_clearvideo.c_decode_block.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @AVERROR_INVALIDDATA = common local_unnamed_addr global i32 0, align 4 @ff_zigzag_direct = common local_unnamed_addr global ptr null, align 8 @llvm.used = appending global [1 x ptr] [ptr @decode_block], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal i32 @decode_block(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3) #0 { %5 = getelementptr inbounds i8, ptr %0, i64 8 %6 = tail call i32 @memset(ptr noundef %1, i32 noundef 0, i32 noundef 256) #2 %7 = getelementptr inbounds i8, ptr %0, i64 4 %8 = load i32, ptr %7, align 4, !tbaa !6 %9 = tail call i32 @get_vlc2(ptr noundef nonnull %5, i32 noundef %8, i32 noundef 9, i32 noundef 3) #2 store i32 %9, ptr %1, align 4, !tbaa !13 %10 = icmp slt i32 %9, 0 br i1 %10, label %11, label %13 11: ; preds = %4 %12 = load i32, ptr @AVERROR_INVALIDDATA, align 4, !tbaa !13 br label %74 13: ; preds = %4 %14 = add nsw i32 %9, -63 store i32 %14, ptr %1, align 4, !tbaa !13 %15 = icmp eq i32 %2, 0 br i1 %15, label %74, label %16 16: ; preds = %13 %17 = and i32 %3, 1 %18 = add nsw i32 %17, -1 br label %19 19: ; preds = %16, %61 %20 = phi i32 [ 1, %16 ], [ %63, %61 ] %21 = load i32, ptr %0, align 4, !tbaa !14 %22 = tail call i32 @get_vlc2(ptr noundef nonnull %5, i32 noundef %21, i32 noundef 9, i32 noundef 2) #2 %23 = icmp slt i32 %22, 0 br i1 %23, label %24, label %26 24: ; preds = %19 %25 = load i32, ptr @AVERROR_INVALIDDATA, align 4, !tbaa !13 br label %74 26: ; preds = %19 %27 = icmp eq i32 %22, 7167 br i1 %27, label %37, label %28 28: ; preds = %26 %29 = lshr i32 %22, 12 %30 = lshr i32 %22, 4 %31 = and i32 %30, 255 %32 = and i32 %22, 15 %33 = tail call i32 @get_bits1(ptr noundef nonnull %5) #2 %34 = icmp eq i32 %33, 0 %35 = sub nsw i32 0, %32 %36 = select i1 %34, i32 %32, i32 %35 br label %41 37: ; preds = %26 %38 = tail call i32 @get_bits1(ptr noundef nonnull %5) #2 %39 = tail call i32 @get_bits(ptr noundef nonnull %5, i32 noundef 6) #2 %40 = tail call i32 @get_sbits(ptr noundef nonnull %5, i32 noundef 8) #2 br label %41 41: ; preds = %28, %37 %42 = phi i32 [ %38, %37 ], [ %29, %28 ] %43 = phi i32 [ %40, %37 ], [ %36, %28 ] %44 = phi i32 [ %39, %37 ], [ %31, %28 ] %45 = icmp eq i32 %43, 0 br i1 %45, label %55, label %46 46: ; preds = %41 %47 = tail call i32 @FFABS(i32 noundef %43) #2 %48 = icmp slt i32 %43, 0 %49 = shl nsw i32 %47, 1 %50 = or disjoint i32 %49, 1 %51 = mul nsw i32 %50, %3 %52 = add nsw i32 %18, %51 %53 = sub nsw i32 0, %52 %54 = select i1 %48, i32 %53, i32 %52 br label %55 55: ; preds = %46, %41 %56 = phi i32 [ %54, %46 ], [ 0, %41 ] %57 = add nsw i32 %44, %20 %58 = icmp sgt i32 %57, 63 br i1 %58, label %59, label %61 59: ; preds = %55 %60 = load i32, ptr @AVERROR_INVALIDDATA, align 4, !tbaa !13 br label %74 61: ; preds = %55 %62 = load ptr, ptr @ff_zigzag_direct, align 8, !tbaa !15 %63 = add nsw i32 %57, 1 %64 = sext i32 %57 to i64 %65 = getelementptr inbounds i64, ptr %62, i64 %64 %66 = load i64, ptr %65, align 8, !tbaa !17 %67 = getelementptr inbounds i32, ptr %1, i64 %66 store i32 %56, ptr %67, align 4, !tbaa !13 %68 = icmp eq i32 %57, 63 %69 = icmp ne i32 %42, 0 %70 = select i1 %68, i1 true, i1 %69 br i1 %70, label %71, label %19, !llvm.loop !19 71: ; preds = %61 %72 = xor i1 %69, true %73 = sext i1 %72 to i32 br label %74 74: ; preds = %13, %71, %59, %24, %11 %75 = phi i32 [ %12, %11 ], [ %25, %24 ], [ %60, %59 ], [ %73, %71 ], [ 0, %13 ] ret i32 %75 } declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @get_vlc2(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @get_bits1(ptr noundef) local_unnamed_addr #1 declare i32 @get_bits(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @get_sbits(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @FFABS(i32 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !9, i64 4} !7 = !{!"TYPE_7__", !8, i64 0, !12, i64 4, !9, i64 8} !8 = !{!"TYPE_6__", !9, i64 0} !9 = !{!"int", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"} !12 = !{!"TYPE_5__", !9, i64 0} !13 = !{!9, !9, i64 0} !14 = !{!7, !9, i64 0} !15 = !{!16, !16, i64 0} !16 = !{!"any pointer", !10, i64 0} !17 = !{!18, !18, i64 0} !18 = !{!"long", !10, i64 0} !19 = distinct !{!19, !20} !20 = !{!"llvm.loop.mustprogress"}
FFmpeg_libavcodec_extr_clearvideo.c_decode_block
; ModuleID = 'AnghaBench/linux/drivers/net/can/m_can/extr_m_can.c_m_can_clean.c' source_filename = "AnghaBench/linux/drivers/net/can/m_can/extr_m_can.c_m_can_clean.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.m_can_classdev = type { i32, ptr, i32 } @M_CAN_TXFQS = dso_local local_unnamed_addr global i32 0, align 4 @TXFQS_TFQPI_MASK = dso_local local_unnamed_addr global i32 0, align 4 @TXFQS_TFQPI_SHIFT = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @m_can_clean], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @m_can_clean(ptr noundef %0) #0 { %2 = tail call ptr @netdev_priv(ptr noundef %0) #2 %3 = getelementptr inbounds %struct.m_can_classdev, ptr %2, i64 0, i32 1 %4 = load ptr, ptr %3, align 8, !tbaa !5 %5 = icmp eq ptr %4, null br i1 %5, label %23, label %6 6: ; preds = %1 %7 = load i32, ptr %0, align 4, !tbaa !11 %8 = add nsw i32 %7, 1 store i32 %8, ptr %0, align 4, !tbaa !11 %9 = load i32, ptr %2, align 8, !tbaa !14 %10 = icmp sgt i32 %9, 30 br i1 %10, label %11, label %18 11: ; preds = %6 %12 = load i32, ptr @M_CAN_TXFQS, align 4, !tbaa !15 %13 = tail call i32 @m_can_read(ptr noundef nonnull %2, i32 noundef %12) #2 %14 = load i32, ptr @TXFQS_TFQPI_MASK, align 4, !tbaa !15 %15 = and i32 %14, %13 %16 = load i32, ptr @TXFQS_TFQPI_SHIFT, align 4, !tbaa !15 %17 = ashr i32 %15, %16 br label %18 18: ; preds = %11, %6 %19 = phi i32 [ %17, %11 ], [ 0, %6 ] %20 = getelementptr inbounds %struct.m_can_classdev, ptr %2, i64 0, i32 2 %21 = load i32, ptr %20, align 8, !tbaa !16 %22 = tail call i32 @can_free_echo_skb(i32 noundef %21, i32 noundef %19) #2 store ptr null, ptr %3, align 8, !tbaa !5 br label %23 23: ; preds = %18, %1 ret void } declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1 declare i32 @m_can_read(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @can_free_echo_skb(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 8} !6 = !{!"m_can_classdev", !7, i64 0, !10, i64 8, !7, i64 16} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!12, !7, i64 0} !12 = !{!"net_device", !13, i64 0} !13 = !{!"TYPE_2__", !7, i64 0} !14 = !{!6, !7, i64 0} !15 = !{!7, !7, i64 0} !16 = !{!6, !7, i64 16}
; ModuleID = 'AnghaBench/linux/drivers/net/can/m_can/extr_m_can.c_m_can_clean.c' source_filename = "AnghaBench/linux/drivers/net/can/m_can/extr_m_can.c_m_can_clean.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @M_CAN_TXFQS = common local_unnamed_addr global i32 0, align 4 @TXFQS_TFQPI_MASK = common local_unnamed_addr global i32 0, align 4 @TXFQS_TFQPI_SHIFT = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @m_can_clean], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @m_can_clean(ptr noundef %0) #0 { %2 = tail call ptr @netdev_priv(ptr noundef %0) #2 %3 = getelementptr inbounds i8, ptr %2, i64 8 %4 = load ptr, ptr %3, align 8, !tbaa !6 %5 = icmp eq ptr %4, null br i1 %5, label %23, label %6 6: ; preds = %1 %7 = load i32, ptr %0, align 4, !tbaa !12 %8 = add nsw i32 %7, 1 store i32 %8, ptr %0, align 4, !tbaa !12 %9 = load i32, ptr %2, align 8, !tbaa !15 %10 = icmp sgt i32 %9, 30 br i1 %10, label %11, label %18 11: ; preds = %6 %12 = load i32, ptr @M_CAN_TXFQS, align 4, !tbaa !16 %13 = tail call i32 @m_can_read(ptr noundef nonnull %2, i32 noundef %12) #2 %14 = load i32, ptr @TXFQS_TFQPI_MASK, align 4, !tbaa !16 %15 = and i32 %14, %13 %16 = load i32, ptr @TXFQS_TFQPI_SHIFT, align 4, !tbaa !16 %17 = ashr i32 %15, %16 br label %18 18: ; preds = %11, %6 %19 = phi i32 [ %17, %11 ], [ 0, %6 ] %20 = getelementptr inbounds i8, ptr %2, i64 16 %21 = load i32, ptr %20, align 8, !tbaa !17 %22 = tail call i32 @can_free_echo_skb(i32 noundef %21, i32 noundef %19) #2 store ptr null, ptr %3, align 8, !tbaa !6 br label %23 23: ; preds = %18, %1 ret void } declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1 declare i32 @m_can_read(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @can_free_echo_skb(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 8} !7 = !{!"m_can_classdev", !8, i64 0, !11, i64 8, !8, i64 16} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!13, !8, i64 0} !13 = !{!"net_device", !14, i64 0} !14 = !{!"TYPE_2__", !8, i64 0} !15 = !{!7, !8, i64 0} !16 = !{!8, !8, i64 0} !17 = !{!7, !8, i64 16}
linux_drivers_net_can_m_can_extr_m_can.c_m_can_clean
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/mips/extr_vp8_mc_msa.c_ff_put_vp8_epel8_h6v6_msa.c' source_filename = "AnghaBench/FFmpeg/libavcodec/mips/extr_vp8_mc_msa.c_ff_put_vp8_epel8_h6v6_msa.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @subpel_filters_msa = dso_local local_unnamed_addr global ptr null, align 8 @mc_filt_mask_arr = dso_local local_unnamed_addr global ptr null, align 8 ; Function Attrs: nounwind uwtable define dso_local void @ff_put_vp8_epel8_h6v6_msa(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) local_unnamed_addr #0 { %8 = load ptr, ptr @subpel_filters_msa, align 8, !tbaa !5 %9 = sext i32 %5 to i64 %10 = getelementptr ptr, ptr %8, i64 %9 %11 = getelementptr ptr, ptr %10, i64 -1 %12 = load ptr, ptr %11, align 8, !tbaa !5 %13 = sext i32 %6 to i64 %14 = getelementptr ptr, ptr %8, i64 %13 %15 = getelementptr ptr, ptr %14, i64 -1 %16 = load ptr, ptr %15, align 8, !tbaa !5 %17 = load ptr, ptr @mc_filt_mask_arr, align 8, !tbaa !5 %18 = tail call i64 @LD_UB(ptr noundef %17) #2 %19 = shl nsw i32 %3, 1 %20 = sub nuw nsw i32 -2, %19 %21 = sext i32 %20 to i64 %22 = getelementptr inbounds i32, ptr %2, i64 %21 %23 = tail call i64 @LD_SH(ptr noundef %12) #2 %24 = tail call i32 @SPLATI_H3_SB(i64 noundef %23, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %25 = add nsw i64 %18, 2 %26 = add nsw i64 %18, 4 %27 = tail call i32 @LD_SB5(ptr noundef %22, i32 noundef %3, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %28 = tail call i32 @XORI_B5_128_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %29 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %30 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %31 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %32 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %33 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %34 = tail call i64 @LD_SH(ptr noundef %16) #2 %35 = tail call i32 @SPLATI_H3_SH(i64 noundef %34, i32 noundef 0, i32 noundef 1, i32 noundef 2, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2 %36 = tail call i32 @ILVEV_B2_SH(i64 noundef %29, i64 noundef %30, i64 noundef %31, i64 noundef %32, i64 noundef undef, i64 noundef undef) #2 %37 = tail call i32 @ILVEV_B2_SH(i64 noundef %30, i64 noundef %31, i64 noundef %32, i64 noundef %33, i64 noundef undef, i64 noundef undef) #2 %38 = icmp ult i32 %4, 4 br i1 %38, label %85, label %39 39: ; preds = %7 %40 = ashr i32 %4, 2 %41 = mul nsw i32 %3, 5 %42 = sext i32 %41 to i64 %43 = getelementptr inbounds i32, ptr %22, i64 %42 %44 = shl nsw i32 %3, 2 %45 = sext i32 %44 to i64 %46 = shl nsw i32 %1, 2 %47 = sext i32 %46 to i64 br label %48 48: ; preds = %39, %48 %49 = phi ptr [ %0, %39 ], [ %83, %48 ] %50 = phi ptr [ %43, %39 ], [ %59, %48 ] %51 = phi i32 [ %40, %39 ], [ %57, %48 ] %52 = phi i64 [ undef, %39 ], [ %76, %48 ] %53 = phi i64 [ undef, %39 ], [ %68, %48 ] %54 = phi i64 [ undef, %39 ], [ %72, %48 ] %55 = phi i64 [ undef, %39 ], [ %64, %48 ] %56 = phi i64 [ %33, %39 ], [ %74, %48 ] %57 = add nsw i32 %51, -1 %58 = tail call i32 @LD_SB4(ptr noundef %50, i32 noundef %3, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %59 = getelementptr inbounds i32, ptr %50, i64 %45 %60 = tail call i32 @XORI_B4_128_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %61 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %62 = trunc i64 %61 to i32 %63 = trunc i64 %56 to i32 %64 = tail call i64 @__msa_ilvev_b(i32 noundef %62, i32 noundef %63) #2 %65 = tail call i64 @DPADD_SH3_SH(i64 noundef %55, i64 noundef %54, i64 noundef %64, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2 %66 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %67 = trunc i64 %66 to i32 %68 = tail call i64 @__msa_ilvev_b(i32 noundef %67, i32 noundef %62) #2 %69 = tail call i64 @DPADD_SH3_SH(i64 noundef %53, i64 noundef %52, i64 noundef %68, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2 %70 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %71 = trunc i64 %70 to i32 %72 = tail call i64 @__msa_ilvev_b(i32 noundef %71, i32 noundef %67) #2 %73 = tail call i64 @DPADD_SH3_SH(i64 noundef %54, i64 noundef %64, i64 noundef %72, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2 %74 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %75 = trunc i64 %74 to i32 %76 = tail call i64 @__msa_ilvev_b(i32 noundef %75, i32 noundef %71) #2 %77 = tail call i64 @DPADD_SH3_SH(i64 noundef %52, i64 noundef %68, i64 noundef %76, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2 %78 = tail call i32 @SRARI_H4_SH(i64 noundef %65, i64 noundef %69, i64 noundef %73, i64 noundef %77, i32 noundef 7) #2 %79 = tail call i32 @SAT_SH4_SH(i64 noundef %65, i64 noundef %69, i64 noundef %73, i64 noundef %77, i32 noundef 7) #2 %80 = tail call i64 @PCKEV_XORI128_UB(i64 noundef %65, i64 noundef %69) #2 %81 = tail call i64 @PCKEV_XORI128_UB(i64 noundef %73, i64 noundef %77) #2 %82 = tail call i32 @ST_D4(i64 noundef %80, i64 noundef %81, i32 noundef 0, i32 noundef 1, i32 noundef 0, i32 noundef 1, ptr noundef %49, i32 noundef %1) #2 %83 = getelementptr inbounds i32, ptr %49, i64 %47 %84 = icmp eq i32 %57, 0 br i1 %84, label %85, label %48, !llvm.loop !9 85: ; preds = %48, %7 ret void } declare i64 @LD_UB(ptr noundef) local_unnamed_addr #1 declare i64 @LD_SH(ptr noundef) local_unnamed_addr #1 declare i32 @SPLATI_H3_SB(i64 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @LD_SB5(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @XORI_B5_128_SB(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i64 @HORIZ_6TAP_FILT(i32 noundef, i32 noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @SPLATI_H3_SH(i64 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @ILVEV_B2_SH(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @LD_SB4(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @XORI_B4_128_SB(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i64 @__msa_ilvev_b(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i64 @DPADD_SH3_SH(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @SRARI_H4_SH(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @SAT_SH4_SH(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i64 @PCKEV_XORI128_UB(i64 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @ST_D4(i64 noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = distinct !{!9, !10} !10 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/mips/extr_vp8_mc_msa.c_ff_put_vp8_epel8_h6v6_msa.c' source_filename = "AnghaBench/FFmpeg/libavcodec/mips/extr_vp8_mc_msa.c_ff_put_vp8_epel8_h6v6_msa.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @subpel_filters_msa = common local_unnamed_addr global ptr null, align 8 @mc_filt_mask_arr = common local_unnamed_addr global ptr null, align 8 ; Function Attrs: nounwind ssp uwtable(sync) define void @ff_put_vp8_epel8_h6v6_msa(ptr noundef %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %6) local_unnamed_addr #0 { %8 = load ptr, ptr @subpel_filters_msa, align 8, !tbaa !6 %9 = sext i32 %5 to i64 %10 = getelementptr ptr, ptr %8, i64 %9 %11 = getelementptr i8, ptr %10, i64 -8 %12 = load ptr, ptr %11, align 8, !tbaa !6 %13 = sext i32 %6 to i64 %14 = getelementptr ptr, ptr %8, i64 %13 %15 = getelementptr i8, ptr %14, i64 -8 %16 = load ptr, ptr %15, align 8, !tbaa !6 %17 = load ptr, ptr @mc_filt_mask_arr, align 8, !tbaa !6 %18 = tail call i64 @LD_UB(ptr noundef %17) #2 %19 = shl nsw i32 %3, 1 %20 = sub nuw nsw i32 -2, %19 %21 = sext i32 %20 to i64 %22 = getelementptr inbounds i32, ptr %2, i64 %21 %23 = tail call i64 @LD_SH(ptr noundef %12) #2 %24 = tail call i32 @SPLATI_H3_SB(i64 noundef %23, i32 noundef 0, i32 noundef 1, i32 noundef 2, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %25 = add nsw i64 %18, 2 %26 = add nsw i64 %18, 4 %27 = tail call i32 @LD_SB5(ptr noundef %22, i32 noundef %3, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %28 = tail call i32 @XORI_B5_128_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %29 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %30 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %31 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %32 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %33 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %34 = tail call i64 @LD_SH(ptr noundef %16) #2 %35 = tail call i32 @SPLATI_H3_SH(i64 noundef %34, i32 noundef 0, i32 noundef 1, i32 noundef 2, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2 %36 = tail call i32 @ILVEV_B2_SH(i64 noundef %29, i64 noundef %30, i64 noundef %31, i64 noundef %32, i64 noundef undef, i64 noundef undef) #2 %37 = tail call i32 @ILVEV_B2_SH(i64 noundef %30, i64 noundef %31, i64 noundef %32, i64 noundef %33, i64 noundef undef, i64 noundef undef) #2 %38 = icmp ult i32 %4, 4 br i1 %38, label %85, label %39 39: ; preds = %7 %40 = ashr i32 %4, 2 %41 = mul nsw i32 %3, 5 %42 = sext i32 %41 to i64 %43 = getelementptr inbounds i32, ptr %22, i64 %42 %44 = shl nsw i32 %3, 2 %45 = sext i32 %44 to i64 %46 = shl nsw i32 %1, 2 %47 = sext i32 %46 to i64 br label %48 48: ; preds = %39, %48 %49 = phi ptr [ %0, %39 ], [ %83, %48 ] %50 = phi ptr [ %43, %39 ], [ %59, %48 ] %51 = phi i32 [ %40, %39 ], [ %57, %48 ] %52 = phi i64 [ undef, %39 ], [ %76, %48 ] %53 = phi i64 [ undef, %39 ], [ %68, %48 ] %54 = phi i64 [ undef, %39 ], [ %72, %48 ] %55 = phi i64 [ undef, %39 ], [ %64, %48 ] %56 = phi i64 [ %33, %39 ], [ %74, %48 ] %57 = add nsw i32 %51, -1 %58 = tail call i32 @LD_SB4(ptr noundef %50, i32 noundef %3, i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %59 = getelementptr inbounds i32, ptr %50, i64 %45 %60 = tail call i32 @XORI_B4_128_SB(i32 noundef undef, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %61 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %62 = trunc i64 %61 to i32 %63 = trunc i64 %56 to i32 %64 = tail call i64 @__msa_ilvev_b(i32 noundef %62, i32 noundef %63) #2 %65 = tail call i64 @DPADD_SH3_SH(i64 noundef %55, i64 noundef %54, i64 noundef %64, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2 %66 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %67 = trunc i64 %66 to i32 %68 = tail call i64 @__msa_ilvev_b(i32 noundef %67, i32 noundef %62) #2 %69 = tail call i64 @DPADD_SH3_SH(i64 noundef %53, i64 noundef %52, i64 noundef %68, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2 %70 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %71 = trunc i64 %70 to i32 %72 = tail call i64 @__msa_ilvev_b(i32 noundef %71, i32 noundef %67) #2 %73 = tail call i64 @DPADD_SH3_SH(i64 noundef %54, i64 noundef %64, i64 noundef %72, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2 %74 = tail call i64 @HORIZ_6TAP_FILT(i32 noundef undef, i32 noundef undef, i64 noundef %18, i64 noundef %25, i64 noundef %26, i32 noundef undef, i32 noundef undef, i32 noundef undef) #2 %75 = trunc i64 %74 to i32 %76 = tail call i64 @__msa_ilvev_b(i32 noundef %75, i32 noundef %71) #2 %77 = tail call i64 @DPADD_SH3_SH(i64 noundef %52, i64 noundef %68, i64 noundef %76, i64 noundef undef, i64 noundef undef, i64 noundef undef) #2 %78 = tail call i32 @SRARI_H4_SH(i64 noundef %65, i64 noundef %69, i64 noundef %73, i64 noundef %77, i32 noundef 7) #2 %79 = tail call i32 @SAT_SH4_SH(i64 noundef %65, i64 noundef %69, i64 noundef %73, i64 noundef %77, i32 noundef 7) #2 %80 = tail call i64 @PCKEV_XORI128_UB(i64 noundef %65, i64 noundef %69) #2 %81 = tail call i64 @PCKEV_XORI128_UB(i64 noundef %73, i64 noundef %77) #2 %82 = tail call i32 @ST_D4(i64 noundef %80, i64 noundef %81, i32 noundef 0, i32 noundef 1, i32 noundef 0, i32 noundef 1, ptr noundef %49, i32 noundef %1) #2 %83 = getelementptr inbounds i32, ptr %49, i64 %47 %84 = icmp eq i32 %57, 0 br i1 %84, label %85, label %48, !llvm.loop !10 85: ; preds = %48, %7 ret void } declare i64 @LD_UB(ptr noundef) local_unnamed_addr #1 declare i64 @LD_SH(ptr noundef) local_unnamed_addr #1 declare i32 @SPLATI_H3_SB(i64 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @LD_SB5(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @XORI_B5_128_SB(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i64 @HORIZ_6TAP_FILT(i32 noundef, i32 noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @SPLATI_H3_SH(i64 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @ILVEV_B2_SH(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @LD_SB4(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @XORI_B4_128_SB(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i64 @__msa_ilvev_b(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i64 @DPADD_SH3_SH(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @SRARI_H4_SH(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @SAT_SH4_SH(i64 noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i64 @PCKEV_XORI128_UB(i64 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @ST_D4(i64 noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = distinct !{!10, !11} !11 = !{!"llvm.loop.mustprogress"}
FFmpeg_libavcodec_mips_extr_vp8_mc_msa.c_ff_put_vp8_epel8_h6v6_msa
; ModuleID = 'AnghaBench/freebsd/crypto/heimdal/lib/asn1/extr_gen_decode.c_decode_primitive.c' source_filename = "AnghaBench/freebsd/crypto/heimdal/lib/asn1/extr_gen_decode.c_decode_primitive.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @codefile = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [71 x i8] c"e = der_get_%s(p, len, %s, &l);\0Aif(e) %s;\0Ap += l; len -= l; ret += l;\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @decode_primitive], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @decode_primitive(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 { %4 = load i32, ptr @codefile, align 4, !tbaa !5 %5 = tail call i32 @fprintf(i32 noundef %4, ptr noundef nonnull @.str, ptr noundef %0, ptr noundef %1, ptr noundef %2) #2 ret void } declare i32 @fprintf(i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/freebsd/crypto/heimdal/lib/asn1/extr_gen_decode.c_decode_primitive.c' source_filename = "AnghaBench/freebsd/crypto/heimdal/lib/asn1/extr_gen_decode.c_decode_primitive.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @codefile = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [71 x i8] c"e = der_get_%s(p, len, %s, &l);\0Aif(e) %s;\0Ap += l; len -= l; ret += l;\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @decode_primitive], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @decode_primitive(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 { %4 = load i32, ptr @codefile, align 4, !tbaa !6 %5 = tail call i32 @fprintf(i32 noundef %4, ptr noundef nonnull @.str, ptr noundef %0, ptr noundef %1, ptr noundef %2) #2 ret void } declare i32 @fprintf(i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
freebsd_crypto_heimdal_lib_asn1_extr_gen_decode.c_decode_primitive
; ModuleID = 'AnghaBench/postgres/src/backend/lib/extr_binaryheap.c_left_offset.c' source_filename = "AnghaBench/postgres/src/backend/lib/extr_binaryheap.c_left_offset.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @left_offset], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define internal i32 @left_offset(i32 noundef %0) #0 { %2 = shl nsw i32 %0, 1 %3 = or disjoint i32 %2, 1 ret i32 %3 } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/postgres/src/backend/lib/extr_binaryheap.c_left_offset.c' source_filename = "AnghaBench/postgres/src/backend/lib/extr_binaryheap.c_left_offset.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @left_offset], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define internal range(i32 -2147483647, -2147483648) i32 @left_offset(i32 noundef %0) #0 { %2 = shl nsw i32 %0, 1 %3 = or disjoint i32 %2, 1 ret i32 %3 } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
postgres_src_backend_lib_extr_binaryheap.c_left_offset
; ModuleID = 'AnghaBench/Provenance/Cores/Mupen64Plus/png/extr_pngtest.c_init_callback_info.c' source_filename = "AnghaBench/Provenance/Cores/Mupen64Plus/png/extr_pngtest.c_init_callback_info.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_3__ = type { i32 } @user_chunk_data = dso_local local_unnamed_addr global %struct.TYPE_3__ zeroinitializer, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @init_callback_info], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @init_callback_info(i32 noundef %0) #0 { %2 = load i32, ptr @user_chunk_data, align 4 %3 = tail call i32 @MEMZERO(i32 %2) #2 store i32 %0, ptr @user_chunk_data, align 4, !tbaa !5 ret void } declare i32 @MEMZERO(i32) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_3__", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/Provenance/Cores/Mupen64Plus/png/extr_pngtest.c_init_callback_info.c' source_filename = "AnghaBench/Provenance/Cores/Mupen64Plus/png/extr_pngtest.c_init_callback_info.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_3__ = type { i32 } @user_chunk_data = common local_unnamed_addr global %struct.TYPE_3__ zeroinitializer, align 4 @llvm.used = appending global [1 x ptr] [ptr @init_callback_info], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @init_callback_info(i32 noundef %0) #0 { %2 = load i32, ptr @user_chunk_data, align 4 %3 = zext i32 %2 to i64 %4 = tail call i32 @MEMZERO(i64 %3) #2 store i32 %0, ptr @user_chunk_data, align 4, !tbaa !6 ret void } declare i32 @MEMZERO(i64) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_3__", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
Provenance_Cores_Mupen64Plus_png_extr_pngtest.c_init_callback_info
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx4/extr_pd.c_mlx4_cleanup_pd_table.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx4/extr_pd.c_mlx4_cleanup_pd_table.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local void @mlx4_cleanup_pd_table(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call ptr @mlx4_priv(ptr noundef %0) #2 %3 = tail call i32 @mlx4_bitmap_cleanup(ptr noundef %2) #2 ret void } declare i32 @mlx4_bitmap_cleanup(ptr noundef) local_unnamed_addr #1 declare ptr @mlx4_priv(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlx4/extr_pd.c_mlx4_cleanup_pd_table.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlx4/extr_pd.c_mlx4_cleanup_pd_table.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define void @mlx4_cleanup_pd_table(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call ptr @mlx4_priv(ptr noundef %0) #2 %3 = tail call i32 @mlx4_bitmap_cleanup(ptr noundef %2) #2 ret void } declare i32 @mlx4_bitmap_cleanup(ptr noundef) local_unnamed_addr #1 declare ptr @mlx4_priv(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
linux_drivers_net_ethernet_mellanox_mlx4_extr_pd.c_mlx4_cleanup_pd_table
; ModuleID = 'AnghaBench/sumatrapdf/ext/lcms2/src/extr_cmscgats.c_ParseFloatNumber.c' source_filename = "AnghaBench/sumatrapdf/ext/lcms2/src/extr_cmscgats.c_ParseFloatNumber.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @ParseFloatNumber], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal double @ParseFloatNumber(ptr noundef readonly %0) #0 { %2 = icmp eq ptr %0, null br i1 %2, label %124, label %3 3: ; preds = %1 %4 = load i8, ptr %0, align 1, !tbaa !5 switch i8 %4, label %10 [ i8 45, label %5 i8 43, label %5 ] 5: ; preds = %3, %3 %6 = icmp eq i8 %4, 45 %7 = getelementptr inbounds i8, ptr %0, i64 1 %8 = select i1 %6, double -1.000000e+00, double 1.000000e+00 %9 = load i8, ptr %7, align 1, !tbaa !5 br label %10 10: ; preds = %3, %5 %11 = phi i8 [ %9, %5 ], [ %4, %3 ] %12 = phi ptr [ %7, %5 ], [ %0, %3 ] %13 = phi double [ %8, %5 ], [ 1.000000e+00, %3 ] %14 = icmp eq i8 %11, 0 br i1 %14, label %121, label %15 15: ; preds = %10, %23 %16 = phi i8 [ %31, %23 ], [ %11, %10 ] %17 = phi double [ %27, %23 ], [ 0.000000e+00, %10 ] %18 = phi ptr [ %30, %23 ], [ %12, %10 ] %19 = sext i8 %16 to i32 %20 = tail call i64 @isdigit(i32 noundef %19) #3 %21 = icmp eq i64 %20, 0 %22 = load i8, ptr %18, align 1, !tbaa !5 br i1 %21, label %33, label %23 23: ; preds = %15 %24 = sext i8 %22 to i32 %25 = add nsw i32 %24, -48 %26 = sitofp i32 %25 to double %27 = tail call double @llvm.fmuladd.f64(double %17, double 1.000000e+01, double %26) %28 = icmp ne i8 %22, 0 %29 = zext i1 %28 to i64 %30 = getelementptr inbounds i8, ptr %18, i64 %29 %31 = load i8, ptr %30, align 1, !tbaa !5 %32 = icmp eq i8 %31, 0 br i1 %32, label %121, label %15, !llvm.loop !8 33: ; preds = %15 %34 = icmp eq i8 %22, 46 br i1 %34, label %35, label %67 35: ; preds = %33 %36 = getelementptr inbounds i8, ptr %18, i64 1 %37 = load i8, ptr %36, align 1, !tbaa !5 %38 = icmp eq i8 %37, 0 br i1 %38, label %59, label %39 39: ; preds = %35, %47 %40 = phi i8 [ %57, %47 ], [ %37, %35 ] %41 = phi i32 [ %53, %47 ], [ 0, %35 ] %42 = phi double [ %52, %47 ], [ 0.000000e+00, %35 ] %43 = phi ptr [ %56, %47 ], [ %36, %35 ] %44 = sext i8 %40 to i32 %45 = tail call i64 @isdigit(i32 noundef %44) #3 %46 = icmp eq i64 %45, 0 br i1 %46, label %59, label %47 47: ; preds = %39 %48 = load i8, ptr %43, align 1, !tbaa !5 %49 = sext i8 %48 to i32 %50 = add nsw i32 %49, -48 %51 = sitofp i32 %50 to double %52 = tail call double @llvm.fmuladd.f64(double %42, double 1.000000e+01, double %51) %53 = add nuw nsw i32 %41, 1 %54 = icmp ne i8 %48, 0 %55 = zext i1 %54 to i64 %56 = getelementptr inbounds i8, ptr %43, i64 %55 %57 = load i8, ptr %56, align 1, !tbaa !5 %58 = icmp eq i8 %57, 0 br i1 %58, label %59, label %39, !llvm.loop !10 59: ; preds = %39, %47, %35 %60 = phi ptr [ %36, %35 ], [ %56, %47 ], [ %43, %39 ] %61 = phi double [ 0.000000e+00, %35 ], [ %52, %47 ], [ %42, %39 ] %62 = phi i32 [ 0, %35 ], [ %53, %47 ], [ %41, %39 ] %63 = tail call double @xpow10(i32 noundef %62) #3 %64 = fdiv double %61, %63 %65 = fadd double %17, %64 %66 = load i8, ptr %60, align 1, !tbaa !5 br label %67 67: ; preds = %59, %33 %68 = phi i8 [ %66, %59 ], [ %22, %33 ] %69 = phi ptr [ %60, %59 ], [ %18, %33 ] %70 = phi double [ %65, %59 ], [ %17, %33 ] %71 = icmp eq i8 %68, 0 br i1 %71, label %121, label %72 72: ; preds = %67 %73 = tail call signext i8 @toupper(i8 noundef signext %68) #3 %74 = icmp eq i8 %73, 69 br i1 %74, label %75, label %121 75: ; preds = %72 %76 = load i8, ptr %69, align 1, !tbaa !5 %77 = icmp ne i8 %76, 0 %78 = zext i1 %77 to i64 %79 = getelementptr inbounds i8, ptr %69, i64 %78 %80 = load i8, ptr %79, align 1, !tbaa !5 switch i8 %80, label %86 [ i8 45, label %82 i8 43, label %81 ] 81: ; preds = %75 br label %82 82: ; preds = %75, %81 %83 = phi i32 [ 1, %81 ], [ -1, %75 ] %84 = getelementptr inbounds i8, ptr %79, i64 1 %85 = load i8, ptr %84, align 1, !tbaa !5 br label %86 86: ; preds = %82, %75 %87 = phi i8 [ %85, %82 ], [ %80, %75 ] %88 = phi ptr [ %84, %82 ], [ %79, %75 ] %89 = phi i32 [ %83, %82 ], [ 1, %75 ] %90 = icmp eq i8 %87, 0 br i1 %90, label %116, label %91 91: ; preds = %86, %98 %92 = phi i8 [ %114, %98 ], [ %87, %86 ] %93 = phi i32 [ %110, %98 ], [ 0, %86 ] %94 = phi ptr [ %113, %98 ], [ %88, %86 ] %95 = sext i8 %92 to i32 %96 = tail call i64 @isdigit(i32 noundef %95) #3 %97 = icmp eq i64 %96, 0 br i1 %97, label %116, label %98 98: ; preds = %91 %99 = load i8, ptr %94, align 1, !tbaa !5 %100 = sext i8 %99 to i32 %101 = add nsw i32 %100, -48 %102 = sitofp i32 %101 to double %103 = sitofp i32 %93 to double %104 = tail call double @llvm.fmuladd.f64(double %103, double 1.000000e+01, double %102) %105 = fcmp olt double %104, 0x41DFFFFFFFC00000 %106 = mul nsw i32 %93, 10 %107 = sitofp i32 %106 to double %108 = fadd double %107, %102 %109 = fptosi double %108 to i32 %110 = select i1 %105, i32 %109, i32 %93 %111 = icmp ne i8 %99, 0 %112 = zext i1 %111 to i64 %113 = getelementptr inbounds i8, ptr %94, i64 %112 %114 = load i8, ptr %113, align 1, !tbaa !5 %115 = icmp eq i8 %114, 0 br i1 %115, label %116, label %91, !llvm.loop !11 116: ; preds = %91, %98, %86 %117 = phi i32 [ 0, %86 ], [ %110, %98 ], [ %93, %91 ] %118 = mul nsw i32 %117, %89 %119 = tail call double @xpow10(i32 noundef %118) #3 %120 = fmul double %70, %119 br label %121 121: ; preds = %23, %10, %116, %72, %67 %122 = phi double [ %120, %116 ], [ %70, %72 ], [ %70, %67 ], [ 0.000000e+00, %10 ], [ %27, %23 ] %123 = fmul double %13, %122 br label %124 124: ; preds = %1, %121 %125 = phi double [ %123, %121 ], [ 0.000000e+00, %1 ] ret double %125 } declare i64 @isdigit(i32 noundef) local_unnamed_addr #1 ; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) declare double @llvm.fmuladd.f64(double, double, double) #2 declare double @xpow10(i32 noundef) local_unnamed_addr #1 declare signext i8 @toupper(i8 noundef signext) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"omnipotent char", !7, i64 0} !7 = !{!"Simple C/C++ TBAA"} !8 = distinct !{!8, !9} !9 = !{!"llvm.loop.mustprogress"} !10 = distinct !{!10, !9} !11 = distinct !{!11, !9}
; ModuleID = 'AnghaBench/sumatrapdf/ext/lcms2/src/extr_cmscgats.c_ParseFloatNumber.c' source_filename = "AnghaBench/sumatrapdf/ext/lcms2/src/extr_cmscgats.c_ParseFloatNumber.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @ParseFloatNumber], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal double @ParseFloatNumber(ptr noundef readonly %0) #0 { %2 = icmp eq ptr %0, null br i1 %2, label %124, label %3 3: ; preds = %1 %4 = load i8, ptr %0, align 1, !tbaa !6 switch i8 %4, label %10 [ i8 45, label %5 i8 43, label %5 ] 5: ; preds = %3, %3 %6 = icmp eq i8 %4, 45 %7 = getelementptr inbounds i8, ptr %0, i64 1 %8 = select i1 %6, double -1.000000e+00, double 1.000000e+00 %9 = load i8, ptr %7, align 1, !tbaa !6 br label %10 10: ; preds = %3, %5 %11 = phi i8 [ %9, %5 ], [ %4, %3 ] %12 = phi ptr [ %7, %5 ], [ %0, %3 ] %13 = phi double [ %8, %5 ], [ 1.000000e+00, %3 ] %14 = icmp eq i8 %11, 0 br i1 %14, label %121, label %15 15: ; preds = %10, %23 %16 = phi i8 [ %31, %23 ], [ %11, %10 ] %17 = phi double [ %27, %23 ], [ 0.000000e+00, %10 ] %18 = phi ptr [ %30, %23 ], [ %12, %10 ] %19 = sext i8 %16 to i32 %20 = tail call i64 @isdigit(i32 noundef %19) #3 %21 = icmp eq i64 %20, 0 %22 = load i8, ptr %18, align 1, !tbaa !6 br i1 %21, label %33, label %23 23: ; preds = %15 %24 = sext i8 %22 to i32 %25 = add nsw i32 %24, -48 %26 = sitofp i32 %25 to double %27 = tail call double @llvm.fmuladd.f64(double %17, double 1.000000e+01, double %26) %28 = icmp ne i8 %22, 0 %29 = zext i1 %28 to i64 %30 = getelementptr inbounds i8, ptr %18, i64 %29 %31 = load i8, ptr %30, align 1, !tbaa !6 %32 = icmp eq i8 %31, 0 br i1 %32, label %121, label %15, !llvm.loop !9 33: ; preds = %15 %34 = icmp eq i8 %22, 46 br i1 %34, label %35, label %67 35: ; preds = %33 %36 = getelementptr inbounds i8, ptr %18, i64 1 %37 = load i8, ptr %36, align 1, !tbaa !6 %38 = icmp eq i8 %37, 0 br i1 %38, label %59, label %39 39: ; preds = %35, %47 %40 = phi i8 [ %57, %47 ], [ %37, %35 ] %41 = phi i32 [ %53, %47 ], [ 0, %35 ] %42 = phi double [ %52, %47 ], [ 0.000000e+00, %35 ] %43 = phi ptr [ %56, %47 ], [ %36, %35 ] %44 = sext i8 %40 to i32 %45 = tail call i64 @isdigit(i32 noundef %44) #3 %46 = icmp eq i64 %45, 0 br i1 %46, label %59, label %47 47: ; preds = %39 %48 = load i8, ptr %43, align 1, !tbaa !6 %49 = sext i8 %48 to i32 %50 = add nsw i32 %49, -48 %51 = sitofp i32 %50 to double %52 = tail call double @llvm.fmuladd.f64(double %42, double 1.000000e+01, double %51) %53 = add nuw nsw i32 %41, 1 %54 = icmp ne i8 %48, 0 %55 = zext i1 %54 to i64 %56 = getelementptr inbounds i8, ptr %43, i64 %55 %57 = load i8, ptr %56, align 1, !tbaa !6 %58 = icmp eq i8 %57, 0 br i1 %58, label %59, label %39, !llvm.loop !11 59: ; preds = %39, %47, %35 %60 = phi ptr [ %36, %35 ], [ %56, %47 ], [ %43, %39 ] %61 = phi double [ 0.000000e+00, %35 ], [ %52, %47 ], [ %42, %39 ] %62 = phi i32 [ 0, %35 ], [ %53, %47 ], [ %41, %39 ] %63 = tail call double @xpow10(i32 noundef %62) #3 %64 = fdiv double %61, %63 %65 = fadd double %17, %64 %66 = load i8, ptr %60, align 1, !tbaa !6 br label %67 67: ; preds = %59, %33 %68 = phi i8 [ %66, %59 ], [ %22, %33 ] %69 = phi ptr [ %60, %59 ], [ %18, %33 ] %70 = phi double [ %65, %59 ], [ %17, %33 ] %71 = icmp eq i8 %68, 0 br i1 %71, label %121, label %72 72: ; preds = %67 %73 = tail call signext i8 @toupper(i8 noundef signext %68) #3 %74 = icmp eq i8 %73, 69 br i1 %74, label %75, label %121 75: ; preds = %72 %76 = load i8, ptr %69, align 1, !tbaa !6 %77 = icmp ne i8 %76, 0 %78 = zext i1 %77 to i64 %79 = getelementptr inbounds i8, ptr %69, i64 %78 %80 = load i8, ptr %79, align 1, !tbaa !6 switch i8 %80, label %86 [ i8 45, label %82 i8 43, label %81 ] 81: ; preds = %75 br label %82 82: ; preds = %75, %81 %83 = phi i32 [ 1, %81 ], [ -1, %75 ] %84 = getelementptr inbounds i8, ptr %79, i64 1 %85 = load i8, ptr %84, align 1, !tbaa !6 br label %86 86: ; preds = %82, %75 %87 = phi i8 [ %85, %82 ], [ %80, %75 ] %88 = phi ptr [ %84, %82 ], [ %79, %75 ] %89 = phi i32 [ %83, %82 ], [ 1, %75 ] %90 = icmp eq i8 %87, 0 br i1 %90, label %116, label %91 91: ; preds = %86, %98 %92 = phi i8 [ %114, %98 ], [ %87, %86 ] %93 = phi i32 [ %110, %98 ], [ 0, %86 ] %94 = phi ptr [ %113, %98 ], [ %88, %86 ] %95 = sext i8 %92 to i32 %96 = tail call i64 @isdigit(i32 noundef %95) #3 %97 = icmp eq i64 %96, 0 br i1 %97, label %116, label %98 98: ; preds = %91 %99 = load i8, ptr %94, align 1, !tbaa !6 %100 = sext i8 %99 to i32 %101 = add nsw i32 %100, -48 %102 = sitofp i32 %101 to double %103 = sitofp i32 %93 to double %104 = tail call double @llvm.fmuladd.f64(double %103, double 1.000000e+01, double %102) %105 = fcmp olt double %104, 0x41DFFFFFFFC00000 %106 = mul nsw i32 %93, 10 %107 = sitofp i32 %106 to double %108 = fadd double %107, %102 %109 = fptosi double %108 to i32 %110 = select i1 %105, i32 %109, i32 %93 %111 = icmp ne i8 %99, 0 %112 = zext i1 %111 to i64 %113 = getelementptr inbounds i8, ptr %94, i64 %112 %114 = load i8, ptr %113, align 1, !tbaa !6 %115 = icmp eq i8 %114, 0 br i1 %115, label %116, label %91, !llvm.loop !12 116: ; preds = %91, %98, %86 %117 = phi i32 [ 0, %86 ], [ %110, %98 ], [ %93, %91 ] %118 = mul nsw i32 %117, %89 %119 = tail call double @xpow10(i32 noundef %118) #3 %120 = fmul double %70, %119 br label %121 121: ; preds = %23, %10, %116, %72, %67 %122 = phi double [ %120, %116 ], [ %70, %72 ], [ %70, %67 ], [ 0.000000e+00, %10 ], [ %27, %23 ] %123 = fmul double %13, %122 br label %124 124: ; preds = %1, %121 %125 = phi double [ %123, %121 ], [ 0.000000e+00, %1 ] ret double %125 } declare i64 @isdigit(i32 noundef) local_unnamed_addr #1 ; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) declare double @llvm.fmuladd.f64(double, double, double) #2 declare double @xpow10(i32 noundef) local_unnamed_addr #1 declare signext i8 @toupper(i8 noundef signext) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = distinct !{!9, !10} !10 = !{!"llvm.loop.mustprogress"} !11 = distinct !{!11, !10} !12 = distinct !{!12, !10}
sumatrapdf_ext_lcms2_src_extr_cmscgats.c_ParseFloatNumber
; ModuleID = 'AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_heightOfSelect.c' source_filename = "AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_heightOfSelect.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_3__ = type { i32, i32, i32, i32, i32, i32, ptr } @llvm.compiler.used = appending global [1 x ptr] [ptr @heightOfSelect], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @heightOfSelect(ptr noundef readonly %0, ptr noundef %1) #0 { %3 = icmp eq ptr %0, null br i1 %3, label %26, label %4 4: ; preds = %2, %4 %5 = phi ptr [ %24, %4 ], [ %0, %2 ] %6 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 0, i32 5 %7 = load i32, ptr %6, align 4, !tbaa !5 %8 = tail call i32 @heightOfExpr(i32 noundef %7, ptr noundef %1) #2 %9 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 0, i32 4 %10 = load i32, ptr %9, align 8, !tbaa !11 %11 = tail call i32 @heightOfExpr(i32 noundef %10, ptr noundef %1) #2 %12 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 0, i32 3 %13 = load i32, ptr %12, align 4, !tbaa !12 %14 = tail call i32 @heightOfExpr(i32 noundef %13, ptr noundef %1) #2 %15 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 0, i32 2 %16 = load i32, ptr %15, align 8, !tbaa !13 %17 = tail call i32 @heightOfExprList(i32 noundef %16, ptr noundef %1) #2 %18 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 0, i32 1 %19 = load i32, ptr %18, align 4, !tbaa !14 %20 = tail call i32 @heightOfExprList(i32 noundef %19, ptr noundef %1) #2 %21 = load i32, ptr %5, align 8, !tbaa !15 %22 = tail call i32 @heightOfExprList(i32 noundef %21, ptr noundef %1) #2 %23 = getelementptr inbounds %struct.TYPE_3__, ptr %5, i64 0, i32 6 %24 = load ptr, ptr %23, align 8, !tbaa !16 %25 = icmp eq ptr %24, null br i1 %25, label %26, label %4, !llvm.loop !17 26: ; preds = %4, %2 ret void } declare i32 @heightOfExpr(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @heightOfExprList(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 20} !6 = !{!"TYPE_3__", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !10, i64 24} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!6, !7, i64 16} !12 = !{!6, !7, i64 12} !13 = !{!6, !7, i64 8} !14 = !{!6, !7, i64 4} !15 = !{!6, !7, i64 0} !16 = !{!6, !10, i64 24} !17 = distinct !{!17, !18} !18 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_heightOfSelect.c' source_filename = "AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_heightOfSelect.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @heightOfSelect], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @heightOfSelect(ptr noundef readonly %0, ptr noundef %1) #0 { %3 = icmp eq ptr %0, null br i1 %3, label %26, label %4 4: ; preds = %2, %4 %5 = phi ptr [ %24, %4 ], [ %0, %2 ] %6 = getelementptr inbounds i8, ptr %5, i64 20 %7 = load i32, ptr %6, align 4, !tbaa !6 %8 = tail call i32 @heightOfExpr(i32 noundef %7, ptr noundef %1) #2 %9 = getelementptr inbounds i8, ptr %5, i64 16 %10 = load i32, ptr %9, align 8, !tbaa !12 %11 = tail call i32 @heightOfExpr(i32 noundef %10, ptr noundef %1) #2 %12 = getelementptr inbounds i8, ptr %5, i64 12 %13 = load i32, ptr %12, align 4, !tbaa !13 %14 = tail call i32 @heightOfExpr(i32 noundef %13, ptr noundef %1) #2 %15 = getelementptr inbounds i8, ptr %5, i64 8 %16 = load i32, ptr %15, align 8, !tbaa !14 %17 = tail call i32 @heightOfExprList(i32 noundef %16, ptr noundef %1) #2 %18 = getelementptr inbounds i8, ptr %5, i64 4 %19 = load i32, ptr %18, align 4, !tbaa !15 %20 = tail call i32 @heightOfExprList(i32 noundef %19, ptr noundef %1) #2 %21 = load i32, ptr %5, align 8, !tbaa !16 %22 = tail call i32 @heightOfExprList(i32 noundef %21, ptr noundef %1) #2 %23 = getelementptr inbounds i8, ptr %5, i64 24 %24 = load ptr, ptr %23, align 8, !tbaa !17 %25 = icmp eq ptr %24, null br i1 %25, label %26, label %4, !llvm.loop !18 26: ; preds = %4, %2 ret void } declare i32 @heightOfExpr(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @heightOfExprList(i32 noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 20} !7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !11, i64 24} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!7, !8, i64 16} !13 = !{!7, !8, i64 12} !14 = !{!7, !8, i64 8} !15 = !{!7, !8, i64 4} !16 = !{!7, !8, i64 0} !17 = !{!7, !11, i64 24} !18 = distinct !{!18, !19} !19 = !{!"llvm.loop.mustprogress"}
ccv_lib_3rdparty_sqlite3_extr_sqlite3.c_heightOfSelect
; ModuleID = 'AnghaBench/freebsd/sys/opencrypto/extr_cryptodev.c_cod_free.c' source_filename = "AnghaBench/freebsd/sys/opencrypto/extr_cryptodev.c_cod_free.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @M_XDATA = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @cod_free], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @cod_free(ptr noundef %0) #0 { %2 = load ptr, ptr %0, align 8, !tbaa !5 %3 = load ptr, ptr %2, align 8, !tbaa !11 %4 = load i32, ptr @M_XDATA, align 4, !tbaa !13 %5 = tail call i32 @free(ptr noundef %3, i32 noundef %4) #2 %6 = load i32, ptr @M_XDATA, align 4, !tbaa !13 %7 = tail call i32 @free(ptr noundef nonnull %0, i32 noundef %6) #2 ret void } declare i32 @free(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !8, i64 0} !6 = !{!"cryptop_data", !7, i64 0} !7 = !{!"TYPE_4__", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !8, i64 0} !12 = !{!"TYPE_3__", !8, i64 0} !13 = !{!14, !14, i64 0} !14 = !{!"int", !9, i64 0}
; ModuleID = 'AnghaBench/freebsd/sys/opencrypto/extr_cryptodev.c_cod_free.c' source_filename = "AnghaBench/freebsd/sys/opencrypto/extr_cryptodev.c_cod_free.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @M_XDATA = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @cod_free], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @cod_free(ptr noundef %0) #0 { %2 = load ptr, ptr %0, align 8, !tbaa !6 %3 = load ptr, ptr %2, align 8, !tbaa !12 %4 = load i32, ptr @M_XDATA, align 4, !tbaa !14 %5 = tail call i32 @free(ptr noundef %3, i32 noundef %4) #2 %6 = load i32, ptr @M_XDATA, align 4, !tbaa !14 %7 = tail call i32 @free(ptr noundef nonnull %0, i32 noundef %6) #2 ret void } declare i32 @free(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !9, i64 0} !7 = !{!"cryptop_data", !8, i64 0} !8 = !{!"TYPE_4__", !9, i64 0} !9 = !{!"any pointer", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"} !12 = !{!13, !9, i64 0} !13 = !{!"TYPE_3__", !9, i64 0} !14 = !{!15, !15, i64 0} !15 = !{!"int", !10, i64 0}
freebsd_sys_opencrypto_extr_cryptodev.c_cod_free
; ModuleID = 'AnghaBench/linux/arch/mips/cavium-octeon/crypto/extr_octeon-md5.c_octeon_md5_read_hash.c' source_filename = "AnghaBench/linux/arch/mips/cavium-octeon/crypto/extr_octeon-md5.c_octeon_md5_read_hash.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @octeon_md5_read_hash], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @octeon_md5_read_hash(ptr nocapture noundef readonly %0) #0 { %2 = load i64, ptr %0, align 8, !tbaa !5 %3 = inttoptr i64 %2 to ptr %4 = tail call i32 @read_octeon_64bit_hash_dword(i32 noundef 0) #2 store i32 %4, ptr %3, align 4, !tbaa !10 %5 = tail call i32 @read_octeon_64bit_hash_dword(i32 noundef 1) #2 %6 = getelementptr inbounds i32, ptr %3, i64 1 store i32 %5, ptr %6, align 4, !tbaa !10 ret void } declare i32 @read_octeon_64bit_hash_dword(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"md5_state", !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0}
; ModuleID = 'AnghaBench/linux/arch/mips/cavium-octeon/crypto/extr_octeon-md5.c_octeon_md5_read_hash.c' source_filename = "AnghaBench/linux/arch/mips/cavium-octeon/crypto/extr_octeon-md5.c_octeon_md5_read_hash.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @octeon_md5_read_hash], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @octeon_md5_read_hash(ptr nocapture noundef readonly %0) #0 { %2 = load i64, ptr %0, align 8, !tbaa !6 %3 = inttoptr i64 %2 to ptr %4 = tail call i32 @read_octeon_64bit_hash_dword(i32 noundef 0) #2 store i32 %4, ptr %3, align 4, !tbaa !11 %5 = tail call i32 @read_octeon_64bit_hash_dword(i32 noundef 1) #2 %6 = getelementptr inbounds i8, ptr %3, i64 4 store i32 %5, ptr %6, align 4, !tbaa !11 ret void } declare i32 @read_octeon_64bit_hash_dword(i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"md5_state", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !12, i64 0} !12 = !{!"int", !9, i64 0}
linux_arch_mips_cavium-octeon_crypto_extr_octeon-md5.c_octeon_md5_read_hash
; ModuleID = 'AnghaBench/goaccess/src/extr_gholder.c_set_data_holder_metrics.c' source_filename = "AnghaBench/goaccess/src/extr_gholder.c_set_data_holder_metrics.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_13__ = type { i64, i64 } %struct.TYPE_20__ = type { i64, ptr, i32 } %struct.TYPE_18__ = type { ptr } %struct.TYPE_12__ = type { i32, ptr, i32, ptr, ptr, %struct.TYPE_17__, %struct.TYPE_16__, %struct.TYPE_15__, %struct.TYPE_14__ } %struct.TYPE_17__ = type { i32 } %struct.TYPE_16__ = type { i32 } %struct.TYPE_15__ = type { i32 } %struct.TYPE_14__ = type { i32 } @conf = dso_local local_unnamed_addr global %struct.TYPE_13__ zeroinitializer, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @set_data_holder_metrics], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @set_data_holder_metrics(i32 %0, ptr nocapture noundef readonly %1, ptr noundef %2, i32 noundef %3) #0 { %5 = getelementptr inbounds %struct.TYPE_20__, ptr %1, i64 0, i32 2 %6 = load i32, ptr %5, align 8, !tbaa !5 %7 = tail call i32 @ht_get_bw(i32 noundef %6, i32 noundef %0) #2 %8 = load i32, ptr %5, align 8, !tbaa !5 %9 = tail call i32 @ht_get_cumts(i32 noundef %8, i32 noundef %0) #2 %10 = load i32, ptr %5, align 8, !tbaa !5 %11 = tail call i32 @ht_get_maxts(i32 noundef %10, i32 noundef %0) #2 %12 = load i32, ptr %5, align 8, !tbaa !5 %13 = tail call i32 @ht_get_visitors(i32 noundef %12, i32 noundef %0) #2 %14 = tail call ptr (...) @new_gmetrics() #2 %15 = getelementptr inbounds %struct.TYPE_20__, ptr %1, i64 0, i32 1 %16 = load ptr, ptr %15, align 8, !tbaa !12 %17 = load i64, ptr %1, align 8, !tbaa !13 %18 = getelementptr inbounds %struct.TYPE_18__, ptr %16, i64 %17 store ptr %14, ptr %18, align 8, !tbaa !14 store i32 %3, ptr %14, align 8, !tbaa !16 %19 = getelementptr inbounds %struct.TYPE_12__, ptr %14, i64 0, i32 1 store ptr %2, ptr %19, align 8, !tbaa !22 %20 = getelementptr inbounds %struct.TYPE_12__, ptr %14, i64 0, i32 2 store i32 %13, ptr %20, align 8, !tbaa !23 %21 = getelementptr inbounds %struct.TYPE_12__, ptr %14, i64 0, i32 8 store i32 %7, ptr %21, align 4, !tbaa !24 %22 = sdiv i32 %9, %3 %23 = getelementptr inbounds %struct.TYPE_12__, ptr %14, i64 0, i32 7 store i32 %22, ptr %23, align 8, !tbaa !25 %24 = getelementptr inbounds %struct.TYPE_12__, ptr %14, i64 0, i32 6 store i32 %9, ptr %24, align 4, !tbaa !26 %25 = getelementptr inbounds %struct.TYPE_12__, ptr %14, i64 0, i32 5 store i32 %11, ptr %25, align 8, !tbaa !27 %26 = load i64, ptr getelementptr inbounds (%struct.TYPE_13__, ptr @conf, i64 0, i32 1), align 8, !tbaa !28 %27 = icmp eq i64 %26, 0 br i1 %27, label %36, label %28 28: ; preds = %4 %29 = load i32, ptr %5, align 8, !tbaa !5 %30 = tail call ptr @ht_get_method(i32 noundef %29, i32 noundef %0) #2 %31 = load ptr, ptr %15, align 8, !tbaa !12 %32 = load i64, ptr %1, align 8, !tbaa !13 %33 = getelementptr inbounds %struct.TYPE_18__, ptr %31, i64 %32 %34 = load ptr, ptr %33, align 8, !tbaa !14 %35 = getelementptr inbounds %struct.TYPE_12__, ptr %34, i64 0, i32 3 store ptr %30, ptr %35, align 8, !tbaa !30 br label %36 36: ; preds = %28, %4 %37 = load i64, ptr @conf, align 8, !tbaa !31 %38 = icmp eq i64 %37, 0 br i1 %38, label %47, label %39 39: ; preds = %36 %40 = load i32, ptr %5, align 8, !tbaa !5 %41 = tail call ptr @ht_get_protocol(i32 noundef %40, i32 noundef %0) #2 %42 = load ptr, ptr %15, align 8, !tbaa !12 %43 = load i64, ptr %1, align 8, !tbaa !13 %44 = getelementptr inbounds %struct.TYPE_18__, ptr %42, i64 %43 %45 = load ptr, ptr %44, align 8, !tbaa !14 %46 = getelementptr inbounds %struct.TYPE_12__, ptr %45, i64 0, i32 4 store ptr %41, ptr %46, align 8, !tbaa !32 br label %47 47: ; preds = %39, %36 ret void } declare i32 @ht_get_bw(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ht_get_cumts(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ht_get_maxts(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ht_get_visitors(i32 noundef, i32 noundef) local_unnamed_addr #1 declare ptr @new_gmetrics(...) local_unnamed_addr #1 declare ptr @ht_get_method(i32 noundef, i32 noundef) local_unnamed_addr #1 declare ptr @ht_get_protocol(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !11, i64 16} !6 = !{!"TYPE_20__", !7, i64 0, !10, i64 8, !11, i64 16} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!"int", !8, i64 0} !12 = !{!6, !10, i64 8} !13 = !{!6, !7, i64 0} !14 = !{!15, !10, i64 0} !15 = !{!"TYPE_18__", !10, i64 0} !16 = !{!17, !11, i64 0} !17 = !{!"TYPE_12__", !11, i64 0, !10, i64 8, !11, i64 16, !10, i64 24, !10, i64 32, !18, i64 40, !19, i64 44, !20, i64 48, !21, i64 52} !18 = !{!"TYPE_17__", !11, i64 0} !19 = !{!"TYPE_16__", !11, i64 0} !20 = !{!"TYPE_15__", !11, i64 0} !21 = !{!"TYPE_14__", !11, i64 0} !22 = !{!17, !10, i64 8} !23 = !{!17, !11, i64 16} !24 = !{!17, !11, i64 52} !25 = !{!17, !11, i64 48} !26 = !{!17, !11, i64 44} !27 = !{!17, !11, i64 40} !28 = !{!29, !7, i64 8} !29 = !{!"TYPE_13__", !7, i64 0, !7, i64 8} !30 = !{!17, !10, i64 24} !31 = !{!29, !7, i64 0} !32 = !{!17, !10, i64 32}
; ModuleID = 'AnghaBench/goaccess/src/extr_gholder.c_set_data_holder_metrics.c' source_filename = "AnghaBench/goaccess/src/extr_gholder.c_set_data_holder_metrics.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_13__ = type { i64, i64 } %struct.TYPE_18__ = type { ptr } @conf = common local_unnamed_addr global %struct.TYPE_13__ zeroinitializer, align 8 @llvm.used = appending global [1 x ptr] [ptr @set_data_holder_metrics], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @set_data_holder_metrics(i64 %0, ptr nocapture noundef readonly %1, ptr noundef %2, i32 noundef %3) #0 { %5 = trunc i64 %0 to i32 %6 = getelementptr inbounds i8, ptr %1, i64 16 %7 = load i32, ptr %6, align 8, !tbaa !6 %8 = tail call i32 @ht_get_bw(i32 noundef %7, i32 noundef %5) #2 %9 = load i32, ptr %6, align 8, !tbaa !6 %10 = tail call i32 @ht_get_cumts(i32 noundef %9, i32 noundef %5) #2 %11 = load i32, ptr %6, align 8, !tbaa !6 %12 = tail call i32 @ht_get_maxts(i32 noundef %11, i32 noundef %5) #2 %13 = load i32, ptr %6, align 8, !tbaa !6 %14 = tail call i32 @ht_get_visitors(i32 noundef %13, i32 noundef %5) #2 %15 = tail call ptr @new_gmetrics() #2 %16 = getelementptr inbounds i8, ptr %1, i64 8 %17 = load ptr, ptr %16, align 8, !tbaa !13 %18 = load i64, ptr %1, align 8, !tbaa !14 %19 = getelementptr inbounds %struct.TYPE_18__, ptr %17, i64 %18 store ptr %15, ptr %19, align 8, !tbaa !15 store i32 %3, ptr %15, align 8, !tbaa !17 %20 = getelementptr inbounds i8, ptr %15, i64 8 store ptr %2, ptr %20, align 8, !tbaa !23 %21 = getelementptr inbounds i8, ptr %15, i64 16 store i32 %14, ptr %21, align 8, !tbaa !24 %22 = getelementptr inbounds i8, ptr %15, i64 52 store i32 %8, ptr %22, align 4, !tbaa !25 %23 = sdiv i32 %10, %3 %24 = getelementptr inbounds i8, ptr %15, i64 48 store i32 %23, ptr %24, align 8, !tbaa !26 %25 = getelementptr inbounds i8, ptr %15, i64 44 store i32 %10, ptr %25, align 4, !tbaa !27 %26 = getelementptr inbounds i8, ptr %15, i64 40 store i32 %12, ptr %26, align 8, !tbaa !28 %27 = load i64, ptr getelementptr inbounds (i8, ptr @conf, i64 8), align 8, !tbaa !29 %28 = icmp eq i64 %27, 0 br i1 %28, label %37, label %29 29: ; preds = %4 %30 = load i32, ptr %6, align 8, !tbaa !6 %31 = tail call ptr @ht_get_method(i32 noundef %30, i32 noundef %5) #2 %32 = load ptr, ptr %16, align 8, !tbaa !13 %33 = load i64, ptr %1, align 8, !tbaa !14 %34 = getelementptr inbounds %struct.TYPE_18__, ptr %32, i64 %33 %35 = load ptr, ptr %34, align 8, !tbaa !15 %36 = getelementptr inbounds i8, ptr %35, i64 24 store ptr %31, ptr %36, align 8, !tbaa !31 br label %37 37: ; preds = %29, %4 %38 = load i64, ptr @conf, align 8, !tbaa !32 %39 = icmp eq i64 %38, 0 br i1 %39, label %48, label %40 40: ; preds = %37 %41 = load i32, ptr %6, align 8, !tbaa !6 %42 = tail call ptr @ht_get_protocol(i32 noundef %41, i32 noundef %5) #2 %43 = load ptr, ptr %16, align 8, !tbaa !13 %44 = load i64, ptr %1, align 8, !tbaa !14 %45 = getelementptr inbounds %struct.TYPE_18__, ptr %43, i64 %44 %46 = load ptr, ptr %45, align 8, !tbaa !15 %47 = getelementptr inbounds i8, ptr %46, i64 32 store ptr %42, ptr %47, align 8, !tbaa !33 br label %48 48: ; preds = %40, %37 ret void } declare i32 @ht_get_bw(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ht_get_cumts(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ht_get_maxts(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ht_get_visitors(i32 noundef, i32 noundef) local_unnamed_addr #1 declare ptr @new_gmetrics(...) local_unnamed_addr #1 declare ptr @ht_get_method(i32 noundef, i32 noundef) local_unnamed_addr #1 declare ptr @ht_get_protocol(i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !12, i64 16} !7 = !{!"TYPE_20__", !8, i64 0, !11, i64 8, !12, i64 16} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!"int", !9, i64 0} !13 = !{!7, !11, i64 8} !14 = !{!7, !8, i64 0} !15 = !{!16, !11, i64 0} !16 = !{!"TYPE_18__", !11, i64 0} !17 = !{!18, !12, i64 0} !18 = !{!"TYPE_12__", !12, i64 0, !11, i64 8, !12, i64 16, !11, i64 24, !11, i64 32, !19, i64 40, !20, i64 44, !21, i64 48, !22, i64 52} !19 = !{!"TYPE_17__", !12, i64 0} !20 = !{!"TYPE_16__", !12, i64 0} !21 = !{!"TYPE_15__", !12, i64 0} !22 = !{!"TYPE_14__", !12, i64 0} !23 = !{!18, !11, i64 8} !24 = !{!18, !12, i64 16} !25 = !{!18, !12, i64 52} !26 = !{!18, !12, i64 48} !27 = !{!18, !12, i64 44} !28 = !{!18, !12, i64 40} !29 = !{!30, !8, i64 8} !30 = !{!"TYPE_13__", !8, i64 0, !8, i64 8} !31 = !{!18, !11, i64 24} !32 = !{!30, !8, i64 0} !33 = !{!18, !11, i64 32}
goaccess_src_extr_gholder.c_set_data_holder_metrics
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/alteon/extr_acenic.c_ace_tx_int.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/alteon/extr_acenic.c_ace_tx_int.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.ace_private = type { i32, i32, ptr } %struct.tx_ring_info = type { ptr } @maplen = dso_local local_unnamed_addr global i32 0, align 4 @mapping = dso_local local_unnamed_addr global i32 0, align 4 @PCI_DMA_TODEVICE = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ace_tx_int], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal void @ace_tx_int(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 { %4 = tail call ptr @netdev_priv(ptr noundef %0) #2 %5 = getelementptr inbounds %struct.ace_private, ptr %4, i64 0, i32 2 %6 = getelementptr inbounds %struct.ace_private, ptr %4, i64 0, i32 1 br label %7 7: ; preds = %36, %3 %8 = phi i32 [ %2, %3 ], [ %39, %36 ] %9 = load ptr, ptr %5, align 8, !tbaa !5 %10 = load ptr, ptr %9, align 8, !tbaa !11 %11 = sext i32 %8 to i64 %12 = getelementptr inbounds %struct.tx_ring_info, ptr %10, i64 %11 %13 = load ptr, ptr %12, align 8, !tbaa !13 %14 = load i32, ptr @maplen, align 4, !tbaa !15 %15 = tail call i64 @dma_unmap_len(ptr noundef nonnull %12, i32 noundef %14) #2 %16 = icmp eq i64 %15, 0 br i1 %16, label %27, label %17 17: ; preds = %7 %18 = load i32, ptr %6, align 4, !tbaa !16 %19 = load i32, ptr @mapping, align 4, !tbaa !15 %20 = tail call i32 @dma_unmap_addr(ptr noundef nonnull %12, i32 noundef %19) #2 %21 = load i32, ptr @maplen, align 4, !tbaa !15 %22 = tail call i64 @dma_unmap_len(ptr noundef nonnull %12, i32 noundef %21) #2 %23 = load i32, ptr @PCI_DMA_TODEVICE, align 4, !tbaa !15 %24 = tail call i32 @pci_unmap_page(i32 noundef %18, i32 noundef %20, i64 noundef %22, i32 noundef %23) #2 %25 = load i32, ptr @maplen, align 4, !tbaa !15 %26 = tail call i32 @dma_unmap_len_set(ptr noundef nonnull %12, i32 noundef %25, i32 noundef 0) #2 br label %27 27: ; preds = %17, %7 %28 = icmp eq ptr %13, null br i1 %28, label %36, label %29 29: ; preds = %27 %30 = load i64, ptr %13, align 8, !tbaa !17 %31 = trunc i64 %30 to i32 %32 = load <2 x i32>, ptr %0, align 4, !tbaa !15 %33 = insertelement <2 x i32> <i32 poison, i32 1>, i32 %31, i64 0 %34 = add <2 x i32> %32, %33 store <2 x i32> %34, ptr %0, align 4, !tbaa !15 %35 = tail call i32 @dev_consume_skb_irq(ptr noundef nonnull %13) #2 store ptr null, ptr %12, align 8, !tbaa !13 br label %36 36: ; preds = %29, %27 %37 = add nsw i32 %8, 1 %38 = tail call i32 @ACE_TX_RING_ENTRIES(ptr noundef nonnull %4) #2 %39 = srem i32 %37, %38 %40 = icmp eq i32 %39, %1 br i1 %40, label %41, label %7, !llvm.loop !20 41: ; preds = %36 %42 = tail call i64 @netif_queue_stopped(ptr noundef %0) #2 %43 = icmp eq i64 %42, 0 br i1 %43, label %46, label %44 44: ; preds = %41 %45 = tail call i32 @netif_wake_queue(ptr noundef %0) #2 br label %46 46: ; preds = %44, %41 %47 = tail call i32 (...) @wmb() #2 store i32 %1, ptr %4, align 8, !tbaa !22 ret void } declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1 declare i64 @dma_unmap_len(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @pci_unmap_page(i32 noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dma_unmap_addr(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dma_unmap_len_set(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dev_consume_skb_irq(ptr noundef) local_unnamed_addr #1 declare i32 @ACE_TX_RING_ENTRIES(ptr noundef) local_unnamed_addr #1 declare i64 @netif_queue_stopped(ptr noundef) local_unnamed_addr #1 declare i32 @netif_wake_queue(ptr noundef) local_unnamed_addr #1 declare i32 @wmb(...) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 8} !6 = !{!"ace_private", !7, i64 0, !7, i64 4, !10, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!12, !10, i64 0} !12 = !{!"TYPE_3__", !10, i64 0} !13 = !{!14, !10, i64 0} !14 = !{!"tx_ring_info", !10, i64 0} !15 = !{!7, !7, i64 0} !16 = !{!6, !7, i64 4} !17 = !{!18, !19, i64 0} !18 = !{!"sk_buff", !19, i64 0} !19 = !{!"long", !8, i64 0} !20 = distinct !{!20, !21} !21 = !{!"llvm.loop.mustprogress"} !22 = !{!6, !7, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/alteon/extr_acenic.c_ace_tx_int.c' source_filename = "AnghaBench/linux/drivers/net/ethernet/alteon/extr_acenic.c_ace_tx_int.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.tx_ring_info = type { ptr } @maplen = common local_unnamed_addr global i32 0, align 4 @mapping = common local_unnamed_addr global i32 0, align 4 @PCI_DMA_TODEVICE = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ace_tx_int], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal void @ace_tx_int(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 { %4 = tail call ptr @netdev_priv(ptr noundef %0) #2 %5 = getelementptr inbounds i8, ptr %4, i64 8 %6 = getelementptr inbounds i8, ptr %4, i64 4 br label %7 7: ; preds = %36, %3 %8 = phi i32 [ %2, %3 ], [ %39, %36 ] %9 = load ptr, ptr %5, align 8, !tbaa !6 %10 = load ptr, ptr %9, align 8, !tbaa !12 %11 = sext i32 %8 to i64 %12 = getelementptr inbounds %struct.tx_ring_info, ptr %10, i64 %11 %13 = load ptr, ptr %12, align 8, !tbaa !14 %14 = load i32, ptr @maplen, align 4, !tbaa !16 %15 = tail call i64 @dma_unmap_len(ptr noundef nonnull %12, i32 noundef %14) #2 %16 = icmp eq i64 %15, 0 br i1 %16, label %27, label %17 17: ; preds = %7 %18 = load i32, ptr %6, align 4, !tbaa !17 %19 = load i32, ptr @mapping, align 4, !tbaa !16 %20 = tail call i32 @dma_unmap_addr(ptr noundef nonnull %12, i32 noundef %19) #2 %21 = load i32, ptr @maplen, align 4, !tbaa !16 %22 = tail call i64 @dma_unmap_len(ptr noundef nonnull %12, i32 noundef %21) #2 %23 = load i32, ptr @PCI_DMA_TODEVICE, align 4, !tbaa !16 %24 = tail call i32 @pci_unmap_page(i32 noundef %18, i32 noundef %20, i64 noundef %22, i32 noundef %23) #2 %25 = load i32, ptr @maplen, align 4, !tbaa !16 %26 = tail call i32 @dma_unmap_len_set(ptr noundef nonnull %12, i32 noundef %25, i32 noundef 0) #2 br label %27 27: ; preds = %17, %7 %28 = icmp eq ptr %13, null br i1 %28, label %36, label %29 29: ; preds = %27 %30 = load i64, ptr %13, align 8, !tbaa !18 %31 = trunc i64 %30 to i32 %32 = load <2 x i32>, ptr %0, align 4, !tbaa !16 %33 = insertelement <2 x i32> <i32 poison, i32 1>, i32 %31, i64 0 %34 = add <2 x i32> %32, %33 store <2 x i32> %34, ptr %0, align 4, !tbaa !16 %35 = tail call i32 @dev_consume_skb_irq(ptr noundef nonnull %13) #2 store ptr null, ptr %12, align 8, !tbaa !14 br label %36 36: ; preds = %29, %27 %37 = add nsw i32 %8, 1 %38 = tail call i32 @ACE_TX_RING_ENTRIES(ptr noundef nonnull %4) #2 %39 = srem i32 %37, %38 %40 = icmp eq i32 %39, %1 br i1 %40, label %41, label %7, !llvm.loop !21 41: ; preds = %36 %42 = tail call i64 @netif_queue_stopped(ptr noundef %0) #2 %43 = icmp eq i64 %42, 0 br i1 %43, label %46, label %44 44: ; preds = %41 %45 = tail call i32 @netif_wake_queue(ptr noundef %0) #2 br label %46 46: ; preds = %44, %41 %47 = tail call i32 @wmb() #2 store i32 %1, ptr %4, align 8, !tbaa !23 ret void } declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1 declare i64 @dma_unmap_len(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @pci_unmap_page(i32 noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dma_unmap_addr(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dma_unmap_len_set(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dev_consume_skb_irq(ptr noundef) local_unnamed_addr #1 declare i32 @ACE_TX_RING_ENTRIES(ptr noundef) local_unnamed_addr #1 declare i64 @netif_queue_stopped(ptr noundef) local_unnamed_addr #1 declare i32 @netif_wake_queue(ptr noundef) local_unnamed_addr #1 declare i32 @wmb(...) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 8} !7 = !{!"ace_private", !8, i64 0, !8, i64 4, !11, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!13, !11, i64 0} !13 = !{!"TYPE_3__", !11, i64 0} !14 = !{!15, !11, i64 0} !15 = !{!"tx_ring_info", !11, i64 0} !16 = !{!8, !8, i64 0} !17 = !{!7, !8, i64 4} !18 = !{!19, !20, i64 0} !19 = !{!"sk_buff", !20, i64 0} !20 = !{!"long", !9, i64 0} !21 = distinct !{!21, !22} !22 = !{!"llvm.loop.mustprogress"} !23 = !{!7, !8, i64 0}
linux_drivers_net_ethernet_alteon_extr_acenic.c_ace_tx_int
; ModuleID = 'AnghaBench/linux/sound/pci/ac97/extr_ac97_patch.c_snd_ac97_ymf7x3_put_speaker.c' source_filename = "AnghaBench/linux/sound/pci/ac97/extr_ac97_patch.c_snd_ac97_ymf7x3_put_speaker.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @AC97_YMF7X3_3D_MODE_SEL = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @snd_ac97_ymf7x3_put_speaker], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @snd_ac97_ymf7x3_put_speaker(ptr noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = tail call ptr @snd_kcontrol_chip(ptr noundef %0) #2 %4 = load ptr, ptr %1, align 8, !tbaa !5 %5 = load i32, ptr %4, align 4, !tbaa !12 %6 = icmp sgt i32 %5, 2 br i1 %6, label %7, label %10 7: ; preds = %2 %8 = load i32, ptr @EINVAL, align 4, !tbaa !12 %9 = sub nsw i32 0, %8 br label %16 10: ; preds = %2 %11 = trunc i32 %5 to i16 %12 = shl i16 %11, 10 %13 = add i16 %12, 1024 %14 = load i32, ptr @AC97_YMF7X3_3D_MODE_SEL, align 4, !tbaa !12 %15 = tail call i32 @snd_ac97_update(ptr noundef %3, i32 noundef %14, i16 noundef zeroext %13) #2 br label %16 16: ; preds = %10, %7 %17 = phi i32 [ %9, %7 ], [ %15, %10 ] ret i32 %17 } declare ptr @snd_kcontrol_chip(ptr noundef) local_unnamed_addr #1 declare i32 @snd_ac97_update(ptr noundef, i32 noundef, i16 noundef zeroext) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !9, i64 0} !6 = !{!"snd_ctl_elem_value", !7, i64 0} !7 = !{!"TYPE_4__", !8, i64 0} !8 = !{!"TYPE_3__", !9, i64 0} !9 = !{!"any pointer", !10, i64 0} !10 = !{!"omnipotent char", !11, i64 0} !11 = !{!"Simple C/C++ TBAA"} !12 = !{!13, !13, i64 0} !13 = !{!"int", !10, i64 0}
; ModuleID = 'AnghaBench/linux/sound/pci/ac97/extr_ac97_patch.c_snd_ac97_ymf7x3_put_speaker.c' source_filename = "AnghaBench/linux/sound/pci/ac97/extr_ac97_patch.c_snd_ac97_ymf7x3_put_speaker.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EINVAL = common local_unnamed_addr global i32 0, align 4 @AC97_YMF7X3_3D_MODE_SEL = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @snd_ac97_ymf7x3_put_speaker], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @snd_ac97_ymf7x3_put_speaker(ptr noundef %0, ptr nocapture noundef readonly %1) #0 { %3 = tail call ptr @snd_kcontrol_chip(ptr noundef %0) #2 %4 = load ptr, ptr %1, align 8, !tbaa !6 %5 = load i32, ptr %4, align 4, !tbaa !13 %6 = icmp sgt i32 %5, 2 br i1 %6, label %7, label %10 7: ; preds = %2 %8 = load i32, ptr @EINVAL, align 4, !tbaa !13 %9 = sub nsw i32 0, %8 br label %16 10: ; preds = %2 %11 = trunc i32 %5 to i16 %12 = shl i16 %11, 10 %13 = add i16 %12, 1024 %14 = load i32, ptr @AC97_YMF7X3_3D_MODE_SEL, align 4, !tbaa !13 %15 = tail call i32 @snd_ac97_update(ptr noundef %3, i32 noundef %14, i16 noundef zeroext %13) #2 br label %16 16: ; preds = %10, %7 %17 = phi i32 [ %9, %7 ], [ %15, %10 ] ret i32 %17 } declare ptr @snd_kcontrol_chip(ptr noundef) local_unnamed_addr #1 declare i32 @snd_ac97_update(ptr noundef, i32 noundef, i16 noundef zeroext) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !10, i64 0} !7 = !{!"snd_ctl_elem_value", !8, i64 0} !8 = !{!"TYPE_4__", !9, i64 0} !9 = !{!"TYPE_3__", !10, i64 0} !10 = !{!"any pointer", !11, i64 0} !11 = !{!"omnipotent char", !12, i64 0} !12 = !{!"Simple C/C++ TBAA"} !13 = !{!14, !14, i64 0} !14 = !{!"int", !11, i64 0}
linux_sound_pci_ac97_extr_ac97_patch.c_snd_ac97_ymf7x3_put_speaker
; ModuleID = 'AnghaBench/darwin-xnu/libsyscall/mach/extr_mach_init.c_mach_init.c' source_filename = "AnghaBench/darwin-xnu/libsyscall/mach/extr_mach_init.c_mach_init.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @mach_init.mach_init_inited = internal unnamed_addr global i1 false, align 4 ; Function Attrs: nounwind uwtable define dso_local noundef i32 @mach_init() local_unnamed_addr #0 { %1 = load i1, ptr @mach_init.mach_init_inited, align 4 br i1 %1, label %4, label %2 2: ; preds = %0 %3 = tail call i32 (...) @mach_init_doit() #2 store i1 true, ptr @mach_init.mach_init_inited, align 4 br label %4 4: ; preds = %2, %0 ret i32 0 } declare i32 @mach_init_doit(...) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/darwin-xnu/libsyscall/mach/extr_mach_init.c_mach_init.c' source_filename = "AnghaBench/darwin-xnu/libsyscall/mach/extr_mach_init.c_mach_init.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @mach_init.mach_init_inited = internal unnamed_addr global i1 false, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define noundef i32 @mach_init() local_unnamed_addr #0 { %1 = load i1, ptr @mach_init.mach_init_inited, align 4 br i1 %1, label %4, label %2 2: ; preds = %0 %3 = tail call i32 @mach_init_doit() #2 store i1 true, ptr @mach_init.mach_init_inited, align 4 br label %4 4: ; preds = %2, %0 ret i32 0 } declare i32 @mach_init_doit(...) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
darwin-xnu_libsyscall_mach_extr_mach_init.c_mach_init
; ModuleID = 'AnghaBench/reactos/dll/win32/msi/extr_dialog.c_msi_dialog_vsc_add_drives.c' source_filename = "AnghaBench/reactos/dll/win32/msi/extr_dialog.c_msi_dialog_vsc_add_drives.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @CB_ADDSTRING = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @msi_dialog_vsc_add_drives], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @msi_dialog_vsc_add_drives(ptr nocapture readnone %0, ptr nocapture noundef readonly %1) #0 { %3 = tail call i32 @GetLogicalDriveStringsW(i32 noundef 0, ptr noundef null) #2 %4 = icmp eq i32 %3, 0 br i1 %4, label %28, label %5 5: ; preds = %2 %6 = shl i32 %3, 2 %7 = add i32 %6, 4 %8 = tail call ptr @msi_alloc(i32 noundef %7) #2 %9 = icmp eq ptr %8, null br i1 %9, label %28, label %10 10: ; preds = %5 %11 = tail call i32 @GetLogicalDriveStringsW(i32 noundef %3, ptr noundef nonnull %8) #2 %12 = load i64, ptr %8, align 8, !tbaa !5 %13 = icmp eq i64 %12, 0 br i1 %13, label %26, label %14 14: ; preds = %10, %14 %15 = phi ptr [ %23, %14 ], [ %8, %10 ] %16 = load i32, ptr %1, align 4, !tbaa !9 %17 = load i32, ptr @CB_ADDSTRING, align 4, !tbaa !12 %18 = ptrtoint ptr %15 to i64 %19 = trunc i64 %18 to i32 %20 = tail call i32 @SendMessageW(i32 noundef %16, i32 noundef %17, i32 noundef 0, i32 noundef %19) #2 %21 = tail call i64 @lstrlenW(ptr noundef nonnull %15) #2 %22 = add nsw i64 %21, 1 %23 = getelementptr inbounds i64, ptr %15, i64 %22 %24 = load i64, ptr %23, align 8, !tbaa !5 %25 = icmp eq i64 %24, 0 br i1 %25, label %26, label %14, !llvm.loop !13 26: ; preds = %14, %10 %27 = tail call i32 @msi_free(ptr noundef nonnull %8) #2 br label %28 28: ; preds = %5, %2, %26 ret void } declare i32 @GetLogicalDriveStringsW(i32 noundef, ptr noundef) local_unnamed_addr #1 declare ptr @msi_alloc(i32 noundef) local_unnamed_addr #1 declare i32 @SendMessageW(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i64 @lstrlenW(ptr noundef) local_unnamed_addr #1 declare i32 @msi_free(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"TYPE_3__", !11, i64 0} !11 = !{!"int", !7, i64 0} !12 = !{!11, !11, i64 0} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/reactos/dll/win32/msi/extr_dialog.c_msi_dialog_vsc_add_drives.c' source_filename = "AnghaBench/reactos/dll/win32/msi/extr_dialog.c_msi_dialog_vsc_add_drives.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @CB_ADDSTRING = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @msi_dialog_vsc_add_drives], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @msi_dialog_vsc_add_drives(ptr nocapture readnone %0, ptr nocapture noundef readonly %1) #0 { %3 = tail call i32 @GetLogicalDriveStringsW(i32 noundef 0, ptr noundef null) #2 %4 = icmp eq i32 %3, 0 br i1 %4, label %28, label %5 5: ; preds = %2 %6 = shl i32 %3, 2 %7 = add i32 %6, 4 %8 = tail call ptr @msi_alloc(i32 noundef %7) #2 %9 = icmp eq ptr %8, null br i1 %9, label %28, label %10 10: ; preds = %5 %11 = tail call i32 @GetLogicalDriveStringsW(i32 noundef %3, ptr noundef nonnull %8) #2 %12 = load i64, ptr %8, align 8, !tbaa !6 %13 = icmp eq i64 %12, 0 br i1 %13, label %26, label %14 14: ; preds = %10, %14 %15 = phi ptr [ %23, %14 ], [ %8, %10 ] %16 = load i32, ptr %1, align 4, !tbaa !10 %17 = load i32, ptr @CB_ADDSTRING, align 4, !tbaa !13 %18 = ptrtoint ptr %15 to i64 %19 = trunc i64 %18 to i32 %20 = tail call i32 @SendMessageW(i32 noundef %16, i32 noundef %17, i32 noundef 0, i32 noundef %19) #2 %21 = tail call i64 @lstrlenW(ptr noundef nonnull %15) #2 %22 = add nsw i64 %21, 1 %23 = getelementptr inbounds i64, ptr %15, i64 %22 %24 = load i64, ptr %23, align 8, !tbaa !6 %25 = icmp eq i64 %24, 0 br i1 %25, label %26, label %14, !llvm.loop !14 26: ; preds = %14, %10 %27 = tail call i32 @msi_free(ptr noundef nonnull %8) #2 br label %28 28: ; preds = %5, %2, %26 ret void } declare i32 @GetLogicalDriveStringsW(i32 noundef, ptr noundef) local_unnamed_addr #1 declare ptr @msi_alloc(i32 noundef) local_unnamed_addr #1 declare i32 @SendMessageW(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i64 @lstrlenW(ptr noundef) local_unnamed_addr #1 declare i32 @msi_free(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"TYPE_3__", !12, i64 0} !12 = !{!"int", !8, i64 0} !13 = !{!12, !12, i64 0} !14 = distinct !{!14, !15} !15 = !{!"llvm.loop.mustprogress"}
reactos_dll_win32_msi_extr_dialog.c_msi_dialog_vsc_add_drives
; ModuleID = 'AnghaBench/linux/net/openvswitch/extr_flow.c_check_header.c' source_filename = "AnghaBench/linux/net/openvswitch/extr_flow.c_check_header.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @ENOMEM = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @check_header], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @check_header(ptr noundef %0, i32 noundef %1) #0 { %3 = load i32, ptr %0, align 4, !tbaa !5 %4 = icmp slt i32 %3, %1 %5 = zext i1 %4 to i32 %6 = tail call i64 @unlikely(i32 noundef %5) #2 %7 = icmp eq i64 %6, 0 br i1 %7, label %11, label %8 8: ; preds = %2 %9 = load i32, ptr @EINVAL, align 4, !tbaa !10 %10 = sub nsw i32 0, %9 br label %20 11: ; preds = %2 %12 = tail call i32 @pskb_may_pull(ptr noundef nonnull %0, i32 noundef %1) #2 %13 = icmp eq i32 %12, 0 %14 = zext i1 %13 to i32 %15 = tail call i64 @unlikely(i32 noundef %14) #2 %16 = icmp eq i64 %15, 0 br i1 %16, label %20, label %17 17: ; preds = %11 %18 = load i32, ptr @ENOMEM, align 4, !tbaa !10 %19 = sub nsw i32 0, %18 br label %20 20: ; preds = %11, %17, %8 %21 = phi i32 [ %10, %8 ], [ %19, %17 ], [ 0, %11 ] ret i32 %21 } declare i64 @unlikely(i32 noundef) local_unnamed_addr #1 declare i32 @pskb_may_pull(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"sk_buff", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!7, !7, i64 0}
; ModuleID = 'AnghaBench/linux/net/openvswitch/extr_flow.c_check_header.c' source_filename = "AnghaBench/linux/net/openvswitch/extr_flow.c_check_header.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EINVAL = common local_unnamed_addr global i32 0, align 4 @ENOMEM = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @check_header], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal range(i32 -2147483647, -2147483648) i32 @check_header(ptr noundef %0, i32 noundef %1) #0 { %3 = load i32, ptr %0, align 4, !tbaa !6 %4 = icmp slt i32 %3, %1 %5 = zext i1 %4 to i32 %6 = tail call i64 @unlikely(i32 noundef %5) #2 %7 = icmp eq i64 %6, 0 br i1 %7, label %11, label %8 8: ; preds = %2 %9 = load i32, ptr @EINVAL, align 4, !tbaa !11 %10 = sub nsw i32 0, %9 br label %20 11: ; preds = %2 %12 = tail call i32 @pskb_may_pull(ptr noundef nonnull %0, i32 noundef %1) #2 %13 = icmp eq i32 %12, 0 %14 = zext i1 %13 to i32 %15 = tail call i64 @unlikely(i32 noundef %14) #2 %16 = icmp eq i64 %15, 0 br i1 %16, label %20, label %17 17: ; preds = %11 %18 = load i32, ptr @ENOMEM, align 4, !tbaa !11 %19 = sub nsw i32 0, %18 br label %20 20: ; preds = %11, %17, %8 %21 = phi i32 [ %10, %8 ], [ %19, %17 ], [ 0, %11 ] ret i32 %21 } declare i64 @unlikely(i32 noundef) local_unnamed_addr #1 declare i32 @pskb_may_pull(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"sk_buff", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0}
linux_net_openvswitch_extr_flow.c_check_header
; ModuleID = 'AnghaBench/linux/drivers/edac/extr_edac_mc_sysfs.c_dimmdev_dev_type_show.c' source_filename = "AnghaBench/linux/drivers/edac/extr_edac_mc_sysfs.c_dimmdev_dev_type_show.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1 @dev_types = dso_local local_unnamed_addr global ptr null, align 8 @llvm.compiler.used = appending global [1 x ptr] [ptr @dimmdev_dev_type_show], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @dimmdev_dev_type_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 { %4 = tail call ptr @to_dimm(ptr noundef %0) #2 %5 = load ptr, ptr @dev_types, align 8, !tbaa !5 %6 = load i64, ptr %4, align 8, !tbaa !9 %7 = getelementptr inbounds ptr, ptr %5, i64 %6 %8 = load ptr, ptr %7, align 8, !tbaa !5 %9 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, ptr noundef %8) #2 ret i32 %9 } declare ptr @to_dimm(ptr noundef) local_unnamed_addr #1 declare i32 @sprintf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"dimm_info", !11, i64 0} !11 = !{!"long", !7, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/edac/extr_edac_mc_sysfs.c_dimmdev_dev_type_show.c' source_filename = "AnghaBench/linux/drivers/edac/extr_edac_mc_sysfs.c_dimmdev_dev_type_show.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1 @dev_types = common local_unnamed_addr global ptr null, align 8 @llvm.used = appending global [1 x ptr] [ptr @dimmdev_dev_type_show], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @dimmdev_dev_type_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 { %4 = tail call ptr @to_dimm(ptr noundef %0) #2 %5 = load ptr, ptr @dev_types, align 8, !tbaa !6 %6 = load i64, ptr %4, align 8, !tbaa !10 %7 = getelementptr inbounds ptr, ptr %5, i64 %6 %8 = load ptr, ptr %7, align 8, !tbaa !6 %9 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, ptr noundef %8) #2 ret i32 %9 } declare ptr @to_dimm(ptr noundef) local_unnamed_addr #1 declare i32 @sprintf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"dimm_info", !12, i64 0} !12 = !{!"long", !8, i64 0}
linux_drivers_edac_extr_edac_mc_sysfs.c_dimmdev_dev_type_show
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/kernel32/extr_drive.c_test_GetDiskFreeSpaceA.c' source_filename = "AnghaBench/reactos/modules/rostests/winetests/kernel32/extr_drive.c_test_GetDiskFreeSpaceA.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_4__ = type { i32 } @.str = private unnamed_addr constant [28 x i8] c"GetDiskFreeSpaceA error %d\0A\00", align 1 @.str.1 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1 @ERROR_PATH_NOT_FOUND = dso_local local_unnamed_addr global i64 0, align 8 @ERROR_INVALID_NAME = dso_local local_unnamed_addr global i64 0, align 8 @.str.2 = private unnamed_addr constant [47 x i8] c"GetDiskFreeSpaceA(\22\22): ret=%d GetLastError=%d\0A\00", align 1 @.str.3 = private unnamed_addr constant [2 x i8] c"\\\00", align 1 @.str.4 = private unnamed_addr constant [2 x i8] c"/\00", align 1 @.str.5 = private unnamed_addr constant [27 x i8] c"GetLogicalDrives error %d\0A\00", align 1 @DRIVE_REMOVABLE = dso_local local_unnamed_addr global i64 0, align 8 @DRIVE_NO_ROOT_DIR = dso_local local_unnamed_addr global i64 0, align 8 @ERROR_INVALID_DRIVE = dso_local local_unnamed_addr global i64 0, align 8 @.str.6 = private unnamed_addr constant [47 x i8] c"GetDiskFreeSpaceA(%s): ret=%d GetLastError=%d\0A\00", align 1 @.str.7 = private unnamed_addr constant [38 x i8] c"GetDiskFreeSpaceA(%s) failed with %d\0A\00", align 1 @.str.8 = private unnamed_addr constant [30 x i8] c"total clusters is %d > 65535\0A\00", align 1 @.str.9 = private unnamed_addr constant [40 x i8] c"GetDiskFreeSpaceExA(%s) failed with %d\0A\00", align 1 @.str.10 = private unnamed_addr constant [90 x i8] c"GetDiskFreeSpaceA should report at least as much bytes on disk %s as GetDiskFreeSpaceExA\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @test_GetDiskFreeSpaceA], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @test_GetDiskFreeSpaceA() #0 { %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 %4 = alloca i32, align 4 %5 = alloca [4 x i8], align 4 %6 = alloca %struct.TYPE_4__, align 4 %7 = alloca %struct.TYPE_4__, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3 store i32 6044225, ptr %5, align 4 %8 = call i32 @GetDiskFreeSpaceA(ptr noundef null, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef nonnull %4) #3 %9 = call i64 (...) @GetLastError() #3 %10 = call i32 (i32, ptr, ...) @ok(i32 noundef %8, ptr noundef nonnull @.str, i64 noundef %9) #3 %11 = call i32 @GetDiskFreeSpaceA(ptr noundef nonnull @.str.1, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef nonnull %4) #3 %12 = icmp eq i32 %11, 0 br i1 %12, label %13, label %22 13: ; preds = %0 %14 = call i64 (...) @GetLastError() #3 %15 = load i64, ptr @ERROR_PATH_NOT_FOUND, align 8, !tbaa !5 %16 = icmp eq i64 %14, %15 br i1 %16, label %22, label %17 17: ; preds = %13 %18 = call i64 (...) @GetLastError() #3 %19 = load i64, ptr @ERROR_INVALID_NAME, align 8, !tbaa !5 %20 = icmp eq i64 %18, %19 %21 = zext i1 %20 to i32 br label %22 22: ; preds = %13, %17, %0 %23 = phi i32 [ 0, %0 ], [ 1, %13 ], [ %21, %17 ] %24 = call i64 (...) @GetLastError() #3 %25 = call i32 (i32, ptr, ...) @ok(i32 noundef %23, ptr noundef nonnull @.str.2, i32 noundef %11, i64 noundef %24) #3 %26 = call i32 @GetDiskFreeSpaceA(ptr noundef nonnull @.str.3, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef nonnull %4) #3 %27 = call i64 (...) @GetLastError() #3 %28 = call i32 (i32, ptr, ...) @ok(i32 noundef %26, ptr noundef nonnull @.str, i64 noundef %27) #3 %29 = call i32 @GetDiskFreeSpaceA(ptr noundef nonnull @.str.4, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef nonnull %4) #3 %30 = call i64 (...) @GetLastError() #3 %31 = call i32 (i32, ptr, ...) @ok(i32 noundef %29, ptr noundef nonnull @.str, i64 noundef %30) #3 %32 = call i32 (...) @GetLogicalDrives() #3 %33 = icmp ne i32 %32, 0 %34 = zext i1 %33 to i32 %35 = call i64 (...) @GetLastError() #3 %36 = call i32 (i32, ptr, ...) @ok(i32 noundef %34, ptr noundef nonnull @.str.5, i64 noundef %35) #3 br label %37 37: ; preds = %22, %95 %38 = phi i32 [ %32, %22 ], [ %96, %95 ] %39 = call i64 @GetDriveTypeA(ptr noundef nonnull %5) #3 %40 = load i64, ptr @DRIVE_REMOVABLE, align 8, !tbaa !5 %41 = icmp eq i64 %39, %40 %42 = load i64, ptr @DRIVE_NO_ROOT_DIR, align 8 %43 = icmp eq i64 %39, %42 %44 = select i1 %41, i1 true, i1 %43 br i1 %44, label %95, label %45 45: ; preds = %37 %46 = call i32 @GetDiskFreeSpaceA(ptr noundef nonnull %5, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef nonnull %4) #3 %47 = and i32 %38, 1 %48 = icmp eq i32 %47, 0 %49 = icmp eq i32 %46, 0 br i1 %48, label %50, label %64 50: ; preds = %45 br i1 %49, label %51, label %59 51: ; preds = %50 %52 = call i64 (...) @GetLastError() #3 %53 = load i64, ptr @ERROR_PATH_NOT_FOUND, align 8, !tbaa !5 %54 = icmp eq i64 %52, %53 br i1 %54, label %59, label %55 55: ; preds = %51 %56 = call i64 (...) @GetLastError() #3 %57 = load i64, ptr @ERROR_INVALID_DRIVE, align 8, !tbaa !5 %58 = icmp eq i64 %56, %57 br label %59 59: ; preds = %51, %55, %50 %60 = phi i1 [ false, %50 ], [ true, %51 ], [ %58, %55 ] %61 = zext i1 %60 to i32 %62 = call i64 (...) @GetLastError() #3 %63 = call i32 (i32, ptr, ...) @ok(i32 noundef %61, ptr noundef nonnull @.str.6, ptr noundef nonnull %5, i32 noundef %46, i64 noundef %62) #3 br label %95 64: ; preds = %45 br i1 %49, label %65, label %68 65: ; preds = %64 %66 = call i64 (...) @GetLastError() #3 %67 = call i32 @trace(ptr noundef nonnull @.str.7, ptr noundef nonnull %5, i64 noundef %66) #3 br label %68 68: ; preds = %65, %64 %69 = call i32 (...) @GetVersion() #3 %70 = icmp sgt i32 %69, -1 br i1 %70, label %76, label %71 71: ; preds = %68 %72 = load i32, ptr %4, align 4, !tbaa !9 %73 = icmp slt i32 %72, 65536 %74 = zext i1 %73 to i32 %75 = call i32 (i32, ptr, ...) @ok(i32 noundef %74, ptr noundef nonnull @.str.8, i32 noundef %72) #3 br label %95 76: ; preds = %68 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3 %77 = load i32, ptr %1, align 4, !tbaa !9 %78 = load i32, ptr %2, align 4, !tbaa !9 %79 = mul nsw i32 %78, %77 %80 = load i32, ptr %4, align 4, !tbaa !9 %81 = mul nsw i32 %79, %80 %82 = call i32 @pGetDiskFreeSpaceExA(ptr noundef nonnull %5, ptr noundef nonnull %7, ptr noundef nonnull %6, ptr noundef null) #3 %83 = icmp eq i32 %82, 0 br i1 %83, label %84, label %87 84: ; preds = %76 %85 = call i64 (...) @GetLastError() #3 %86 = call i32 @trace(ptr noundef nonnull @.str.9, ptr noundef nonnull %5, i64 noundef %85) #3 br label %87 87: ; preds = %84, %76 %88 = load i32, ptr %2, align 4, !tbaa !9 %89 = icmp eq i32 %88, 0 %90 = load i32, ptr %6, align 4 %91 = icmp sle i32 %90, %81 %92 = select i1 %89, i1 true, i1 %91 %93 = zext i1 %92 to i32 %94 = call i32 (i32, ptr, ...) @ok(i32 noundef %93, ptr noundef nonnull @.str.10, ptr noundef nonnull %5) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3 br label %95 95: ; preds = %59, %87, %71, %37 %96 = ashr i32 %38, 1 %97 = load i8, ptr %5, align 4, !tbaa !11 %98 = add i8 %97, 1 store i8 %98, ptr %5, align 4, !tbaa !11 %99 = icmp slt i8 %98, 91 br i1 %99, label %37, label %100, !llvm.loop !12 100: ; preds = %95 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @GetDiskFreeSpaceA(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @ok(i32 noundef, ptr noundef, ...) local_unnamed_addr #2 declare i64 @GetLastError(...) local_unnamed_addr #2 declare i32 @GetLogicalDrives(...) local_unnamed_addr #2 declare i64 @GetDriveTypeA(ptr noundef) local_unnamed_addr #2 declare i32 @trace(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2 declare i32 @GetVersion(...) local_unnamed_addr #2 declare i32 @pGetDiskFreeSpaceExA(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"long", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !10, i64 0} !10 = !{!"int", !7, i64 0} !11 = !{!7, !7, i64 0} !12 = distinct !{!12, !13} !13 = !{!"llvm.loop.mustprogress"}
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/kernel32/extr_drive.c_test_GetDiskFreeSpaceA.c' source_filename = "AnghaBench/reactos/modules/rostests/winetests/kernel32/extr_drive.c_test_GetDiskFreeSpaceA.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_4__ = type { i32 } @.str = private unnamed_addr constant [28 x i8] c"GetDiskFreeSpaceA error %d\0A\00", align 1 @.str.1 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1 @ERROR_PATH_NOT_FOUND = common local_unnamed_addr global i64 0, align 8 @ERROR_INVALID_NAME = common local_unnamed_addr global i64 0, align 8 @.str.2 = private unnamed_addr constant [47 x i8] c"GetDiskFreeSpaceA(\22\22): ret=%d GetLastError=%d\0A\00", align 1 @.str.3 = private unnamed_addr constant [2 x i8] c"\\\00", align 1 @.str.4 = private unnamed_addr constant [2 x i8] c"/\00", align 1 @.str.5 = private unnamed_addr constant [27 x i8] c"GetLogicalDrives error %d\0A\00", align 1 @DRIVE_REMOVABLE = common local_unnamed_addr global i64 0, align 8 @DRIVE_NO_ROOT_DIR = common local_unnamed_addr global i64 0, align 8 @ERROR_INVALID_DRIVE = common local_unnamed_addr global i64 0, align 8 @.str.6 = private unnamed_addr constant [47 x i8] c"GetDiskFreeSpaceA(%s): ret=%d GetLastError=%d\0A\00", align 1 @.str.7 = private unnamed_addr constant [38 x i8] c"GetDiskFreeSpaceA(%s) failed with %d\0A\00", align 1 @.str.8 = private unnamed_addr constant [30 x i8] c"total clusters is %d > 65535\0A\00", align 1 @.str.9 = private unnamed_addr constant [40 x i8] c"GetDiskFreeSpaceExA(%s) failed with %d\0A\00", align 1 @.str.10 = private unnamed_addr constant [90 x i8] c"GetDiskFreeSpaceA should report at least as much bytes on disk %s as GetDiskFreeSpaceExA\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @test_GetDiskFreeSpaceA], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @test_GetDiskFreeSpaceA() #0 { %1 = alloca i32, align 4 %2 = alloca i32, align 4 %3 = alloca i32, align 4 %4 = alloca i32, align 4 %5 = alloca [4 x i8], align 4 %6 = alloca %struct.TYPE_4__, align 4 %7 = alloca %struct.TYPE_4__, align 4 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %1) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3 store i32 6044225, ptr %5, align 4 %8 = call i32 @GetDiskFreeSpaceA(ptr noundef null, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef nonnull %4) #3 %9 = call i64 @GetLastError() #3 %10 = call i32 (i32, ptr, ...) @ok(i32 noundef %8, ptr noundef nonnull @.str, i64 noundef %9) #3 %11 = call i32 @GetDiskFreeSpaceA(ptr noundef nonnull @.str.1, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef nonnull %4) #3 %12 = icmp eq i32 %11, 0 br i1 %12, label %13, label %22 13: ; preds = %0 %14 = call i64 @GetLastError() #3 %15 = load i64, ptr @ERROR_PATH_NOT_FOUND, align 8, !tbaa !6 %16 = icmp eq i64 %14, %15 br i1 %16, label %22, label %17 17: ; preds = %13 %18 = call i64 @GetLastError() #3 %19 = load i64, ptr @ERROR_INVALID_NAME, align 8, !tbaa !6 %20 = icmp eq i64 %18, %19 %21 = zext i1 %20 to i32 br label %22 22: ; preds = %13, %17, %0 %23 = phi i32 [ 0, %0 ], [ 1, %13 ], [ %21, %17 ] %24 = call i64 @GetLastError() #3 %25 = call i32 (i32, ptr, ...) @ok(i32 noundef %23, ptr noundef nonnull @.str.2, i32 noundef %11, i64 noundef %24) #3 %26 = call i32 @GetDiskFreeSpaceA(ptr noundef nonnull @.str.3, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef nonnull %4) #3 %27 = call i64 @GetLastError() #3 %28 = call i32 (i32, ptr, ...) @ok(i32 noundef %26, ptr noundef nonnull @.str, i64 noundef %27) #3 %29 = call i32 @GetDiskFreeSpaceA(ptr noundef nonnull @.str.4, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef nonnull %4) #3 %30 = call i64 @GetLastError() #3 %31 = call i32 (i32, ptr, ...) @ok(i32 noundef %29, ptr noundef nonnull @.str, i64 noundef %30) #3 %32 = call i32 @GetLogicalDrives() #3 %33 = icmp ne i32 %32, 0 %34 = zext i1 %33 to i32 %35 = call i64 @GetLastError() #3 %36 = call i32 (i32, ptr, ...) @ok(i32 noundef %34, ptr noundef nonnull @.str.5, i64 noundef %35) #3 br label %37 37: ; preds = %22, %95 %38 = phi i32 [ %32, %22 ], [ %96, %95 ] %39 = call i64 @GetDriveTypeA(ptr noundef nonnull %5) #3 %40 = load i64, ptr @DRIVE_REMOVABLE, align 8, !tbaa !6 %41 = icmp eq i64 %39, %40 %42 = load i64, ptr @DRIVE_NO_ROOT_DIR, align 8 %43 = icmp eq i64 %39, %42 %44 = select i1 %41, i1 true, i1 %43 br i1 %44, label %95, label %45 45: ; preds = %37 %46 = call i32 @GetDiskFreeSpaceA(ptr noundef nonnull %5, ptr noundef nonnull %1, ptr noundef nonnull %2, ptr noundef nonnull %3, ptr noundef nonnull %4) #3 %47 = and i32 %38, 1 %48 = icmp eq i32 %47, 0 %49 = icmp eq i32 %46, 0 br i1 %48, label %50, label %64 50: ; preds = %45 br i1 %49, label %51, label %59 51: ; preds = %50 %52 = call i64 @GetLastError() #3 %53 = load i64, ptr @ERROR_PATH_NOT_FOUND, align 8, !tbaa !6 %54 = icmp eq i64 %52, %53 br i1 %54, label %59, label %55 55: ; preds = %51 %56 = call i64 @GetLastError() #3 %57 = load i64, ptr @ERROR_INVALID_DRIVE, align 8, !tbaa !6 %58 = icmp eq i64 %56, %57 br label %59 59: ; preds = %51, %55, %50 %60 = phi i1 [ false, %50 ], [ true, %51 ], [ %58, %55 ] %61 = zext i1 %60 to i32 %62 = call i64 @GetLastError() #3 %63 = call i32 (i32, ptr, ...) @ok(i32 noundef %61, ptr noundef nonnull @.str.6, ptr noundef nonnull %5, i32 noundef %46, i64 noundef %62) #3 br label %95 64: ; preds = %45 br i1 %49, label %65, label %68 65: ; preds = %64 %66 = call i64 @GetLastError() #3 %67 = call i32 @trace(ptr noundef nonnull @.str.7, ptr noundef nonnull %5, i64 noundef %66) #3 br label %68 68: ; preds = %65, %64 %69 = call i32 @GetVersion() #3 %70 = icmp sgt i32 %69, -1 br i1 %70, label %76, label %71 71: ; preds = %68 %72 = load i32, ptr %4, align 4, !tbaa !10 %73 = icmp slt i32 %72, 65536 %74 = zext i1 %73 to i32 %75 = call i32 (i32, ptr, ...) @ok(i32 noundef %74, ptr noundef nonnull @.str.8, i32 noundef %72) #3 br label %95 76: ; preds = %68 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3 %77 = load i32, ptr %1, align 4, !tbaa !10 %78 = load i32, ptr %2, align 4, !tbaa !10 %79 = mul nsw i32 %78, %77 %80 = load i32, ptr %4, align 4, !tbaa !10 %81 = mul nsw i32 %79, %80 %82 = call i32 @pGetDiskFreeSpaceExA(ptr noundef nonnull %5, ptr noundef nonnull %7, ptr noundef nonnull %6, ptr noundef null) #3 %83 = icmp eq i32 %82, 0 br i1 %83, label %84, label %87 84: ; preds = %76 %85 = call i64 @GetLastError() #3 %86 = call i32 @trace(ptr noundef nonnull @.str.9, ptr noundef nonnull %5, i64 noundef %85) #3 br label %87 87: ; preds = %84, %76 %88 = load i32, ptr %2, align 4, !tbaa !10 %89 = icmp eq i32 %88, 0 %90 = load i32, ptr %6, align 4 %91 = icmp sle i32 %90, %81 %92 = select i1 %89, i1 true, i1 %91 %93 = zext i1 %92 to i32 %94 = call i32 (i32, ptr, ...) @ok(i32 noundef %93, ptr noundef nonnull @.str.10, ptr noundef nonnull %5) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3 br label %95 95: ; preds = %59, %87, %71, %37 %96 = ashr i32 %38, 1 %97 = load i8, ptr %5, align 4, !tbaa !12 %98 = add i8 %97, 1 store i8 %98, ptr %5, align 4, !tbaa !12 %99 = icmp slt i8 %98, 91 br i1 %99, label %37, label %100, !llvm.loop !13 100: ; preds = %95 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %1) #3 ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @GetDiskFreeSpaceA(ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 declare i32 @ok(i32 noundef, ptr noundef, ...) local_unnamed_addr #2 declare i64 @GetLastError(...) local_unnamed_addr #2 declare i32 @GetLogicalDrives(...) local_unnamed_addr #2 declare i64 @GetDriveTypeA(ptr noundef) local_unnamed_addr #2 declare i32 @trace(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2 declare i32 @GetVersion(...) local_unnamed_addr #2 declare i32 @pGetDiskFreeSpaceExA(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !11, i64 0} !11 = !{!"int", !8, i64 0} !12 = !{!8, !8, i64 0} !13 = distinct !{!13, !14} !14 = !{!"llvm.loop.mustprogress"}
reactos_modules_rostests_winetests_kernel32_extr_drive.c_test_GetDiskFreeSpaceA
; ModuleID = 'AnghaBench/freebsd/sys/dev/ixgbe/extr_ixgbe_x550.c_ixgbe_setup_fc_X550em.c' source_filename = "AnghaBench/freebsd/sys/dev/ixgbe/extr_ixgbe_x550.c_ixgbe_setup_fc_X550em.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.ixgbe_hw = type { i32, %struct.TYPE_8__, %struct.TYPE_7__, %struct.TYPE_6__ } %struct.TYPE_8__ = type { i32, ptr, i64 } %struct.TYPE_7__ = type { i32 } %struct.TYPE_6__ = type { %struct.TYPE_5__ } %struct.TYPE_5__ = type { ptr, ptr } @IXGBE_SUCCESS = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [22 x i8] c"ixgbe_setup_fc_X550em\00", align 1 @IXGBE_ERROR_UNSUPPORTED = dso_local local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [49 x i8] c"ixgbe_fc_rx_pause not valid in strict IEEE mode\0A\00", align 1 @IXGBE_ERR_INVALID_LINK_SETTINGS = dso_local local_unnamed_addr global i32 0, align 4 @ixgbe_fc_default = dso_local local_unnamed_addr global i32 0, align 4 @IXGBE_ERROR_ARGUMENT = dso_local local_unnamed_addr global i32 0, align 4 @.str.2 = private unnamed_addr constant [36 x i8] c"Flow control param set incorrectly\0A\00", align 1 @IXGBE_ERR_CONFIG = dso_local local_unnamed_addr global i32 0, align 4 @IXGBE_SB_IOSF_TARGET_KR_PHY = dso_local local_unnamed_addr global i32 0, align 4 @IXGBE_KRM_AN_CNTL_1_SYM_PAUSE = dso_local local_unnamed_addr global i32 0, align 4 @IXGBE_KRM_AN_CNTL_1_ASM_PAUSE = dso_local local_unnamed_addr global i32 0, align 4 @TRUE = dso_local local_unnamed_addr global ptr null, align 8 ; Function Attrs: nounwind uwtable define dso_local i32 @ixgbe_setup_fc_X550em(ptr noundef %0) local_unnamed_addr #0 { %2 = alloca i32, align 4 %3 = load i32, ptr @IXGBE_SUCCESS, align 4, !tbaa !5 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 %4 = tail call i32 @DEBUGFUNC(ptr noundef nonnull @.str) #3 %5 = getelementptr inbounds %struct.ixgbe_hw, ptr %0, i64 0, i32 1 %6 = getelementptr inbounds %struct.ixgbe_hw, ptr %0, i64 0, i32 1, i32 2 %7 = load i64, ptr %6, align 8, !tbaa !9 %8 = icmp ne i64 %7, 0 %9 = load i32, ptr %5, align 8, !tbaa !17 %10 = icmp eq i32 %9, 129 %11 = select i1 %8, i1 %10, i1 false br i1 %11, label %12, label %16 12: ; preds = %1 %13 = load i32, ptr @IXGBE_ERROR_UNSUPPORTED, align 4, !tbaa !5 %14 = tail call i32 @ERROR_REPORT1(i32 noundef %13, ptr noundef nonnull @.str.1) #3 %15 = load i32, ptr @IXGBE_ERR_INVALID_LINK_SETTINGS, align 4, !tbaa !5 br label %69 16: ; preds = %1 %17 = load i32, ptr @ixgbe_fc_default, align 4, !tbaa !5 %18 = icmp eq i32 %9, %17 br i1 %18, label %19, label %20 19: ; preds = %16 store i32 131, ptr %5, align 8, !tbaa !17 br label %32 20: ; preds = %16 %21 = and i32 %9, -4 %22 = icmp eq i32 %21, 128 br i1 %22, label %27, label %23 23: ; preds = %20 %24 = load i32, ptr @IXGBE_ERROR_ARGUMENT, align 4, !tbaa !5 %25 = tail call i32 @ERROR_REPORT1(i32 noundef %24, ptr noundef nonnull @.str.2) #3 %26 = load i32, ptr @IXGBE_ERR_CONFIG, align 4, !tbaa !5 br label %69 27: ; preds = %20 %28 = and i32 %9, 1 %29 = icmp eq i32 %28, 0 %30 = and i32 %9, 3 %31 = icmp eq i32 %30, 2 br label %32 32: ; preds = %27, %19 %33 = phi i1 [ false, %19 ], [ %29, %27 ] %34 = phi i1 [ false, %19 ], [ %31, %27 ] %35 = load i32, ptr %0, align 8, !tbaa !18 switch i32 %35, label %69 [ i32 133, label %36 i32 135, label %36 i32 134, label %36 i32 132, label %66 ] 36: ; preds = %32, %32, %32 %37 = getelementptr inbounds %struct.ixgbe_hw, ptr %0, i64 0, i32 3, i32 0, i32 1 %38 = load ptr, ptr %37, align 8, !tbaa !19 %39 = getelementptr inbounds %struct.ixgbe_hw, ptr %0, i64 0, i32 2 %40 = load i32, ptr %39, align 8, !tbaa !20 %41 = tail call i32 @IXGBE_KRM_AN_CNTL_1(i32 noundef %40) #3 %42 = load i32, ptr @IXGBE_SB_IOSF_TARGET_KR_PHY, align 4, !tbaa !5 %43 = call i32 %38(ptr noundef nonnull %0, i32 noundef %41, i32 noundef %42, ptr noundef nonnull %2) #3 %44 = load i32, ptr @IXGBE_SUCCESS, align 4, !tbaa !5 %45 = icmp eq i32 %43, %44 br i1 %45, label %46, label %69 46: ; preds = %36 %47 = getelementptr inbounds %struct.ixgbe_hw, ptr %0, i64 0, i32 3 %48 = load i32, ptr @IXGBE_KRM_AN_CNTL_1_SYM_PAUSE, align 4, !tbaa !5 %49 = load i32, ptr @IXGBE_KRM_AN_CNTL_1_ASM_PAUSE, align 4, !tbaa !5 %50 = or i32 %49, %48 %51 = xor i32 %50, -1 %52 = load i32, ptr %2, align 4, !tbaa !5 %53 = and i32 %52, %51 %54 = select i1 %33, i32 0, i32 %48 %55 = or i32 %53, %54 %56 = select i1 %34, i32 0, i32 %49 %57 = or i32 %55, %56 store i32 %57, ptr %2, align 4, !tbaa !5 %58 = load ptr, ptr %47, align 8, !tbaa !21 %59 = load i32, ptr %39, align 8, !tbaa !20 %60 = call i32 @IXGBE_KRM_AN_CNTL_1(i32 noundef %59) #3 %61 = load i32, ptr @IXGBE_SB_IOSF_TARGET_KR_PHY, align 4, !tbaa !5 %62 = load i32, ptr %2, align 4, !tbaa !5 %63 = call i32 %58(ptr noundef nonnull %0, i32 noundef %60, i32 noundef %61, i32 noundef %62) #3 %64 = load ptr, ptr @TRUE, align 8, !tbaa !22 %65 = getelementptr inbounds %struct.ixgbe_hw, ptr %0, i64 0, i32 1, i32 1 store ptr %64, ptr %65, align 8, !tbaa !23 br label %69 66: ; preds = %32 %67 = load ptr, ptr @TRUE, align 8, !tbaa !22 %68 = getelementptr inbounds %struct.ixgbe_hw, ptr %0, i64 0, i32 1, i32 1 store ptr %67, ptr %68, align 8, !tbaa !23 br label %69 69: ; preds = %46, %66, %32, %36, %23, %12 %70 = phi i32 [ %15, %12 ], [ %26, %23 ], [ %3, %32 ], [ %3, %66 ], [ %43, %36 ], [ %63, %46 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 ret i32 %70 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @DEBUGFUNC(ptr noundef) local_unnamed_addr #2 declare i32 @ERROR_REPORT1(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @IXGBE_KRM_AN_CNTL_1(i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !13, i64 24} !10 = !{!"ixgbe_hw", !6, i64 0, !11, i64 8, !14, i64 32, !15, i64 40} !11 = !{!"TYPE_8__", !6, i64 0, !12, i64 8, !13, i64 16} !12 = !{!"any pointer", !7, i64 0} !13 = !{!"long", !7, i64 0} !14 = !{!"TYPE_7__", !6, i64 0} !15 = !{!"TYPE_6__", !16, i64 0} !16 = !{!"TYPE_5__", !12, i64 0, !12, i64 8} !17 = !{!10, !6, i64 8} !18 = !{!10, !6, i64 0} !19 = !{!10, !12, i64 48} !20 = !{!10, !6, i64 32} !21 = !{!10, !12, i64 40} !22 = !{!12, !12, i64 0} !23 = !{!10, !12, i64 16}
; ModuleID = 'AnghaBench/freebsd/sys/dev/ixgbe/extr_ixgbe_x550.c_ixgbe_setup_fc_X550em.c' source_filename = "AnghaBench/freebsd/sys/dev/ixgbe/extr_ixgbe_x550.c_ixgbe_setup_fc_X550em.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @IXGBE_SUCCESS = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [22 x i8] c"ixgbe_setup_fc_X550em\00", align 1 @IXGBE_ERROR_UNSUPPORTED = common local_unnamed_addr global i32 0, align 4 @.str.1 = private unnamed_addr constant [49 x i8] c"ixgbe_fc_rx_pause not valid in strict IEEE mode\0A\00", align 1 @IXGBE_ERR_INVALID_LINK_SETTINGS = common local_unnamed_addr global i32 0, align 4 @ixgbe_fc_default = common local_unnamed_addr global i32 0, align 4 @IXGBE_ERROR_ARGUMENT = common local_unnamed_addr global i32 0, align 4 @.str.2 = private unnamed_addr constant [36 x i8] c"Flow control param set incorrectly\0A\00", align 1 @IXGBE_ERR_CONFIG = common local_unnamed_addr global i32 0, align 4 @IXGBE_SB_IOSF_TARGET_KR_PHY = common local_unnamed_addr global i32 0, align 4 @IXGBE_KRM_AN_CNTL_1_SYM_PAUSE = common local_unnamed_addr global i32 0, align 4 @IXGBE_KRM_AN_CNTL_1_ASM_PAUSE = common local_unnamed_addr global i32 0, align 4 @TRUE = common local_unnamed_addr global ptr null, align 8 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @ixgbe_setup_fc_X550em(ptr noundef %0) local_unnamed_addr #0 { %2 = alloca i32, align 4 %3 = load i32, ptr @IXGBE_SUCCESS, align 4, !tbaa !6 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3 %4 = tail call i32 @DEBUGFUNC(ptr noundef nonnull @.str) #3 %5 = getelementptr inbounds i8, ptr %0, i64 8 %6 = getelementptr inbounds i8, ptr %0, i64 24 %7 = load i64, ptr %6, align 8, !tbaa !10 %8 = icmp ne i64 %7, 0 %9 = load i32, ptr %5, align 8, !tbaa !18 %10 = icmp eq i32 %9, 129 %11 = select i1 %8, i1 %10, i1 false br i1 %11, label %12, label %16 12: ; preds = %1 %13 = load i32, ptr @IXGBE_ERROR_UNSUPPORTED, align 4, !tbaa !6 %14 = tail call i32 @ERROR_REPORT1(i32 noundef %13, ptr noundef nonnull @.str.1) #3 %15 = load i32, ptr @IXGBE_ERR_INVALID_LINK_SETTINGS, align 4, !tbaa !6 br label %70 16: ; preds = %1 %17 = load i32, ptr @ixgbe_fc_default, align 4, !tbaa !6 %18 = icmp eq i32 %9, %17 br i1 %18, label %19, label %20 19: ; preds = %16 store i32 131, ptr %5, align 8, !tbaa !18 br label %33 20: ; preds = %16 %21 = and i32 %9, -4 %22 = icmp eq i32 %21, 128 br i1 %22, label %27, label %23 23: ; preds = %20 %24 = load i32, ptr @IXGBE_ERROR_ARGUMENT, align 4, !tbaa !6 %25 = tail call i32 @ERROR_REPORT1(i32 noundef %24, ptr noundef nonnull @.str.2) #3 %26 = load i32, ptr @IXGBE_ERR_CONFIG, align 4, !tbaa !6 br label %70 27: ; preds = %20 %28 = trunc i32 %9 to i1 %29 = xor i1 %28, true %30 = trunc i32 %9 to i4 %31 = lshr i4 4, %30 %32 = trunc i4 %31 to i1 br label %33 33: ; preds = %27, %19 %34 = phi i1 [ false, %19 ], [ %29, %27 ] %35 = phi i1 [ false, %19 ], [ %32, %27 ] %36 = load i32, ptr %0, align 8, !tbaa !19 switch i32 %36, label %70 [ i32 133, label %37 i32 135, label %37 i32 134, label %37 i32 132, label %67 ] 37: ; preds = %33, %33, %33 %38 = getelementptr inbounds i8, ptr %0, i64 48 %39 = load ptr, ptr %38, align 8, !tbaa !20 %40 = getelementptr inbounds i8, ptr %0, i64 32 %41 = load i32, ptr %40, align 8, !tbaa !21 %42 = tail call i32 @IXGBE_KRM_AN_CNTL_1(i32 noundef %41) #3 %43 = load i32, ptr @IXGBE_SB_IOSF_TARGET_KR_PHY, align 4, !tbaa !6 %44 = call i32 %39(ptr noundef nonnull %0, i32 noundef %42, i32 noundef %43, ptr noundef nonnull %2) #3 %45 = load i32, ptr @IXGBE_SUCCESS, align 4, !tbaa !6 %46 = icmp eq i32 %44, %45 br i1 %46, label %47, label %70 47: ; preds = %37 %48 = getelementptr inbounds i8, ptr %0, i64 40 %49 = load i32, ptr @IXGBE_KRM_AN_CNTL_1_SYM_PAUSE, align 4, !tbaa !6 %50 = load i32, ptr @IXGBE_KRM_AN_CNTL_1_ASM_PAUSE, align 4, !tbaa !6 %51 = or i32 %50, %49 %52 = xor i32 %51, -1 %53 = load i32, ptr %2, align 4, !tbaa !6 %54 = and i32 %53, %52 %55 = select i1 %34, i32 0, i32 %49 %56 = or i32 %54, %55 %57 = select i1 %35, i32 0, i32 %50 %58 = or i32 %56, %57 store i32 %58, ptr %2, align 4, !tbaa !6 %59 = load ptr, ptr %48, align 8, !tbaa !22 %60 = load i32, ptr %40, align 8, !tbaa !21 %61 = call i32 @IXGBE_KRM_AN_CNTL_1(i32 noundef %60) #3 %62 = load i32, ptr @IXGBE_SB_IOSF_TARGET_KR_PHY, align 4, !tbaa !6 %63 = load i32, ptr %2, align 4, !tbaa !6 %64 = call i32 %59(ptr noundef nonnull %0, i32 noundef %61, i32 noundef %62, i32 noundef %63) #3 %65 = load ptr, ptr @TRUE, align 8, !tbaa !23 %66 = getelementptr inbounds i8, ptr %0, i64 16 store ptr %65, ptr %66, align 8, !tbaa !24 br label %70 67: ; preds = %33 %68 = load ptr, ptr @TRUE, align 8, !tbaa !23 %69 = getelementptr inbounds i8, ptr %0, i64 16 store ptr %68, ptr %69, align 8, !tbaa !24 br label %70 70: ; preds = %47, %67, %33, %37, %23, %12 %71 = phi i32 [ %15, %12 ], [ %26, %23 ], [ %3, %33 ], [ %3, %67 ], [ %44, %37 ], [ %64, %47 ] call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3 ret i32 %71 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @DEBUGFUNC(ptr noundef) local_unnamed_addr #2 declare i32 @ERROR_REPORT1(i32 noundef, ptr noundef) local_unnamed_addr #2 declare i32 @IXGBE_KRM_AN_CNTL_1(i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !14, i64 24} !11 = !{!"ixgbe_hw", !7, i64 0, !12, i64 8, !15, i64 32, !16, i64 40} !12 = !{!"TYPE_8__", !7, i64 0, !13, i64 8, !14, i64 16} !13 = !{!"any pointer", !8, i64 0} !14 = !{!"long", !8, i64 0} !15 = !{!"TYPE_7__", !7, i64 0} !16 = !{!"TYPE_6__", !17, i64 0} !17 = !{!"TYPE_5__", !13, i64 0, !13, i64 8} !18 = !{!11, !7, i64 8} !19 = !{!11, !7, i64 0} !20 = !{!11, !13, i64 48} !21 = !{!11, !7, i64 32} !22 = !{!11, !13, i64 40} !23 = !{!13, !13, i64 0} !24 = !{!11, !13, i64 16}
freebsd_sys_dev_ixgbe_extr_ixgbe_x550.c_ixgbe_setup_fc_X550em
; ModuleID = 'AnghaBench/linux/drivers/media/pci/bt8xx/extr_bttv-driver.c_bttv_g_fmt_vid_cap.c' source_filename = "AnghaBench/linux/drivers/media/pci/bt8xx/extr_bttv-driver.c_bttv_g_fmt_vid_cap.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.bttv_fh = type { ptr, %struct.TYPE_5__, i32, i32 } %struct.TYPE_5__ = type { i32 } %struct.TYPE_7__ = type { i32, i32, i32 } @V4L2_COLORSPACE_SMPTE170M = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @bttv_g_fmt_vid_cap], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef i32 @bttv_g_fmt_vid_cap(ptr nocapture readnone %0, ptr nocapture noundef readonly %1, ptr noundef %2) #0 { %4 = load ptr, ptr %1, align 8, !tbaa !5 %5 = getelementptr inbounds %struct.bttv_fh, ptr %1, i64 0, i32 3 %6 = load i32, ptr %5, align 8, !tbaa !12 %7 = getelementptr inbounds %struct.bttv_fh, ptr %1, i64 0, i32 2 %8 = load i32, ptr %7, align 4, !tbaa !13 %9 = tail call i32 @pix_format_set_size(ptr noundef %2, ptr noundef %4, i32 noundef %6, i32 noundef %8) #2 %10 = getelementptr inbounds %struct.bttv_fh, ptr %1, i64 0, i32 1 %11 = load i32, ptr %10, align 8, !tbaa !14 %12 = getelementptr inbounds %struct.TYPE_7__, ptr %2, i64 0, i32 2 store i32 %11, ptr %12, align 4, !tbaa !15 %13 = load ptr, ptr %1, align 8, !tbaa !5 %14 = load i32, ptr %13, align 4, !tbaa !19 %15 = getelementptr inbounds %struct.TYPE_7__, ptr %2, i64 0, i32 1 store i32 %14, ptr %15, align 4, !tbaa !21 %16 = load i32, ptr @V4L2_COLORSPACE_SMPTE170M, align 4, !tbaa !22 store i32 %16, ptr %2, align 4, !tbaa !23 ret i32 0 } declare i32 @pix_format_set_size(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"bttv_fh", !7, i64 0, !10, i64 8, !11, i64 12, !11, i64 16} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"TYPE_5__", !11, i64 0} !11 = !{!"int", !8, i64 0} !12 = !{!6, !11, i64 16} !13 = !{!6, !11, i64 12} !14 = !{!6, !11, i64 8} !15 = !{!16, !11, i64 8} !16 = !{!"v4l2_format", !17, i64 0} !17 = !{!"TYPE_6__", !18, i64 0} !18 = !{!"TYPE_7__", !11, i64 0, !11, i64 4, !11, i64 8} !19 = !{!20, !11, i64 0} !20 = !{!"TYPE_8__", !11, i64 0} !21 = !{!16, !11, i64 4} !22 = !{!11, !11, i64 0} !23 = !{!16, !11, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/media/pci/bt8xx/extr_bttv-driver.c_bttv_g_fmt_vid_cap.c' source_filename = "AnghaBench/linux/drivers/media/pci/bt8xx/extr_bttv-driver.c_bttv_g_fmt_vid_cap.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @V4L2_COLORSPACE_SMPTE170M = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @bttv_g_fmt_vid_cap], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal noundef i32 @bttv_g_fmt_vid_cap(ptr nocapture readnone %0, ptr nocapture noundef readonly %1, ptr noundef %2) #0 { %4 = load ptr, ptr %1, align 8, !tbaa !6 %5 = getelementptr inbounds i8, ptr %1, i64 16 %6 = load i32, ptr %5, align 8, !tbaa !13 %7 = getelementptr inbounds i8, ptr %1, i64 12 %8 = load i32, ptr %7, align 4, !tbaa !14 %9 = tail call i32 @pix_format_set_size(ptr noundef %2, ptr noundef %4, i32 noundef %6, i32 noundef %8) #2 %10 = getelementptr inbounds i8, ptr %1, i64 8 %11 = load i32, ptr %10, align 8, !tbaa !15 %12 = getelementptr inbounds i8, ptr %2, i64 8 store i32 %11, ptr %12, align 4, !tbaa !16 %13 = load ptr, ptr %1, align 8, !tbaa !6 %14 = load i32, ptr %13, align 4, !tbaa !20 %15 = getelementptr inbounds i8, ptr %2, i64 4 store i32 %14, ptr %15, align 4, !tbaa !22 %16 = load i32, ptr @V4L2_COLORSPACE_SMPTE170M, align 4, !tbaa !23 store i32 %16, ptr %2, align 4, !tbaa !24 ret i32 0 } declare i32 @pix_format_set_size(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"bttv_fh", !8, i64 0, !11, i64 8, !12, i64 12, !12, i64 16} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"TYPE_5__", !12, i64 0} !12 = !{!"int", !9, i64 0} !13 = !{!7, !12, i64 16} !14 = !{!7, !12, i64 12} !15 = !{!7, !12, i64 8} !16 = !{!17, !12, i64 8} !17 = !{!"v4l2_format", !18, i64 0} !18 = !{!"TYPE_6__", !19, i64 0} !19 = !{!"TYPE_7__", !12, i64 0, !12, i64 4, !12, i64 8} !20 = !{!21, !12, i64 0} !21 = !{!"TYPE_8__", !12, i64 0} !22 = !{!17, !12, i64 4} !23 = !{!12, !12, i64 0} !24 = !{!17, !12, i64 0}
linux_drivers_media_pci_bt8xx_extr_bttv-driver.c_bttv_g_fmt_vid_cap
; ModuleID = 'AnghaBench/systemd/src/libsystemd-network/extr_sd-ipv4acd.c_sd_ipv4acd_stop.c' source_filename = "AnghaBench/systemd/src/libsystemd-network/extr_sd-ipv4acd.c_sd_ipv4acd_stop.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [8 x i8] c"STOPPED\00", align 1 @SD_IPV4ACD_EVENT_STOP = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local noundef i32 @sd_ipv4acd_stop(ptr noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr @EINVAL, align 4, !tbaa !5 %3 = sub nsw i32 0, %2 %4 = tail call i32 @assert_return(ptr noundef %0, i32 noundef %3) #2 %5 = tail call i32 @ipv4acd_reset(ptr noundef %0) #2 %6 = tail call i32 @log_ipv4acd(ptr noundef %0, ptr noundef nonnull @.str) #2 %7 = load i32, ptr @SD_IPV4ACD_EVENT_STOP, align 4, !tbaa !5 %8 = tail call i32 @ipv4acd_client_notify(ptr noundef %0, i32 noundef %7) #2 ret i32 0 } declare i32 @assert_return(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ipv4acd_reset(ptr noundef) local_unnamed_addr #1 declare i32 @log_ipv4acd(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @ipv4acd_client_notify(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/systemd/src/libsystemd-network/extr_sd-ipv4acd.c_sd_ipv4acd_stop.c' source_filename = "AnghaBench/systemd/src/libsystemd-network/extr_sd-ipv4acd.c_sd_ipv4acd_stop.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EINVAL = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [8 x i8] c"STOPPED\00", align 1 @SD_IPV4ACD_EVENT_STOP = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define noundef i32 @sd_ipv4acd_stop(ptr noundef %0) local_unnamed_addr #0 { %2 = load i32, ptr @EINVAL, align 4, !tbaa !6 %3 = sub nsw i32 0, %2 %4 = tail call i32 @assert_return(ptr noundef %0, i32 noundef %3) #2 %5 = tail call i32 @ipv4acd_reset(ptr noundef %0) #2 %6 = tail call i32 @log_ipv4acd(ptr noundef %0, ptr noundef nonnull @.str) #2 %7 = load i32, ptr @SD_IPV4ACD_EVENT_STOP, align 4, !tbaa !6 %8 = tail call i32 @ipv4acd_client_notify(ptr noundef %0, i32 noundef %7) #2 ret i32 0 } declare i32 @assert_return(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ipv4acd_reset(ptr noundef) local_unnamed_addr #1 declare i32 @log_ipv4acd(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @ipv4acd_client_notify(ptr noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
systemd_src_libsystemd-network_extr_sd-ipv4acd.c_sd_ipv4acd_stop
; ModuleID = 'AnghaBench/fastsocket/kernel/tools/perf/util/extr_debugfs.c_debugfs_valid_mountpoint.c' source_filename = "AnghaBench/fastsocket/kernel/tools/perf/util/extr_debugfs.c_debugfs_valid_mountpoint.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.statfs = type { i64 } @ENOENT = dso_local local_unnamed_addr global i32 0, align 4 @DEBUGFS_MAGIC = dso_local local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind uwtable define dso_local i32 @debugfs_valid_mountpoint(ptr noundef %0) local_unnamed_addr #0 { %2 = alloca %struct.statfs, align 8 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3 %3 = call i64 @statfs(ptr noundef %0, ptr noundef nonnull %2) #3 %4 = icmp slt i64 %3, 0 br i1 %4, label %5, label %8 5: ; preds = %1 %6 = load i32, ptr @ENOENT, align 4, !tbaa !5 %7 = sub nsw i32 0, %6 br label %15 8: ; preds = %1 %9 = load i64, ptr %2, align 8, !tbaa !9 %10 = load i64, ptr @DEBUGFS_MAGIC, align 8, !tbaa !12 %11 = icmp eq i64 %9, %10 br i1 %11, label %15, label %12 12: ; preds = %8 %13 = load i32, ptr @ENOENT, align 4, !tbaa !5 %14 = sub nsw i32 0, %13 br label %15 15: ; preds = %8, %12, %5 %16 = phi i32 [ %7, %5 ], [ %14, %12 ], [ 0, %8 ] call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3 ret i32 %16 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i64 @statfs(ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"statfs", !11, i64 0} !11 = !{!"long", !7, i64 0} !12 = !{!11, !11, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/tools/perf/util/extr_debugfs.c_debugfs_valid_mountpoint.c' source_filename = "AnghaBench/fastsocket/kernel/tools/perf/util/extr_debugfs.c_debugfs_valid_mountpoint.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.statfs = type { i64 } @ENOENT = common local_unnamed_addr global i32 0, align 4 @DEBUGFS_MAGIC = common local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind ssp uwtable(sync) define range(i32 -2147483647, -2147483648) i32 @debugfs_valid_mountpoint(ptr noundef %0) local_unnamed_addr #0 { %2 = alloca %struct.statfs, align 8 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3 %3 = call i64 @statfs(ptr noundef %0, ptr noundef nonnull %2) #3 %4 = icmp slt i64 %3, 0 br i1 %4, label %5, label %8 5: ; preds = %1 %6 = load i32, ptr @ENOENT, align 4, !tbaa !6 %7 = sub nsw i32 0, %6 br label %15 8: ; preds = %1 %9 = load i64, ptr %2, align 8, !tbaa !10 %10 = load i64, ptr @DEBUGFS_MAGIC, align 8, !tbaa !13 %11 = icmp eq i64 %9, %10 br i1 %11, label %15, label %12 12: ; preds = %8 %13 = load i32, ptr @ENOENT, align 4, !tbaa !6 %14 = sub nsw i32 0, %13 br label %15 15: ; preds = %8, %12, %5 %16 = phi i32 [ %7, %5 ], [ %14, %12 ], [ 0, %8 ] call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3 ret i32 %16 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i64 @statfs(ptr noundef, ptr noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"statfs", !12, i64 0} !12 = !{!"long", !8, i64 0} !13 = !{!12, !12, i64 0}
fastsocket_kernel_tools_perf_util_extr_debugfs.c_debugfs_valid_mountpoint
; ModuleID = 'AnghaBench/linux/drivers/media/dvb-frontends/extr_ves1x93.c_ves1x93_set_inversion.c' source_filename = "AnghaBench/linux/drivers/media/dvb-frontends/extr_ves1x93.c_ves1x93_set_inversion.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ves1x93_set_inversion], section "llvm.metadata" @switch.table.ves1x93_set_inversion = private unnamed_addr constant [3 x i32] [i32 128, i32 192, i32 0], align 4 ; Function Attrs: nounwind uwtable define internal i32 @ves1x93_set_inversion(ptr noundef %0, i32 noundef %1) #0 { %3 = add i32 %1, -128 %4 = icmp ult i32 %3, 3 br i1 %4, label %8, label %5 5: ; preds = %2 %6 = load i32, ptr @EINVAL, align 4, !tbaa !5 %7 = sub nsw i32 0, %6 br label %18 8: ; preds = %2 %9 = zext nneg i32 %3 to i64 %10 = getelementptr inbounds [3 x i32], ptr @switch.table.ves1x93_set_inversion, i64 0, i64 %9 %11 = load i32, ptr %10, align 4 %12 = load ptr, ptr %0, align 8, !tbaa !9 %13 = getelementptr inbounds i32, ptr %12, i64 12 %14 = load i32, ptr %13, align 4, !tbaa !5 %15 = and i32 %14, 63 %16 = or disjoint i32 %15, %11 %17 = tail call i32 @ves1x93_writereg(ptr noundef nonnull %0, i32 noundef 12, i32 noundef %16) #2 br label %18 18: ; preds = %8, %5 %19 = phi i32 [ %7, %5 ], [ %17, %8 ] ret i32 %19 } declare i32 @ves1x93_writereg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"ves1x93_state", !11, i64 0} !11 = !{!"any pointer", !7, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/media/dvb-frontends/extr_ves1x93.c_ves1x93_set_inversion.c' source_filename = "AnghaBench/linux/drivers/media/dvb-frontends/extr_ves1x93.c_ves1x93_set_inversion.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EINVAL = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ves1x93_set_inversion], section "llvm.metadata" @switch.table.ves1x93_set_inversion = private unnamed_addr constant [3 x i32] [i32 128, i32 192, i32 0], align 4 ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @ves1x93_set_inversion(ptr noundef %0, i32 noundef %1) #0 { %3 = add i32 %1, -128 %4 = icmp ult i32 %3, 3 br i1 %4, label %8, label %5 5: ; preds = %2 %6 = load i32, ptr @EINVAL, align 4, !tbaa !6 %7 = sub nsw i32 0, %6 br label %18 8: ; preds = %2 %9 = zext nneg i32 %3 to i64 %10 = getelementptr inbounds [3 x i32], ptr @switch.table.ves1x93_set_inversion, i64 0, i64 %9 %11 = load i32, ptr %10, align 4 %12 = load ptr, ptr %0, align 8, !tbaa !10 %13 = getelementptr inbounds i8, ptr %12, i64 48 %14 = load i32, ptr %13, align 4, !tbaa !6 %15 = and i32 %14, 63 %16 = or disjoint i32 %15, %11 %17 = tail call i32 @ves1x93_writereg(ptr noundef nonnull %0, i32 noundef 12, i32 noundef %16) #2 br label %18 18: ; preds = %8, %5 %19 = phi i32 [ %7, %5 ], [ %17, %8 ] ret i32 %19 } declare i32 @ves1x93_writereg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"ves1x93_state", !12, i64 0} !12 = !{!"any pointer", !8, i64 0}
linux_drivers_media_dvb-frontends_extr_ves1x93.c_ves1x93_set_inversion
; ModuleID = 'AnghaBench/freebsd/sys/contrib/zstd/lib/legacy/extr_zstd_v04.c_FSE_decompress_usingDTable.c' source_filename = "AnghaBench/freebsd/sys/contrib/zstd/lib/legacy/extr_zstd_v04.c_FSE_decompress_usingDTable.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_3__ = type { i64 } @llvm.compiler.used = appending global [1 x ptr] [ptr @FSE_decompress_usingDTable], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i64 @FSE_decompress_usingDTable(ptr noundef %0, i64 noundef %1, ptr noundef %2, i64 noundef %3, ptr noundef %4) #0 { %6 = alloca %struct.TYPE_3__, align 8 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3 %7 = call i32 @memcpy(ptr noundef nonnull %6, ptr noundef %4, i32 noundef 8) #3 %8 = load i64, ptr %6, align 8, !tbaa !5 %9 = icmp ne i64 %8, 0 %10 = zext i1 %9 to i32 %11 = call i64 @FSE_decompress_usingDTable_generic(ptr noundef %0, i64 noundef %1, ptr noundef %2, i64 noundef %3, ptr noundef %4, i32 noundef %10) #3 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3 ret i64 %11 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i64 @FSE_decompress_usingDTable_generic(ptr noundef, i64 noundef, ptr noundef, i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"TYPE_3__", !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/freebsd/sys/contrib/zstd/lib/legacy/extr_zstd_v04.c_FSE_decompress_usingDTable.c' source_filename = "AnghaBench/freebsd/sys/contrib/zstd/lib/legacy/extr_zstd_v04.c_FSE_decompress_usingDTable.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" %struct.TYPE_3__ = type { i64 } @llvm.used = appending global [1 x ptr] [ptr @FSE_decompress_usingDTable], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i64 @FSE_decompress_usingDTable(ptr noundef %0, i64 noundef %1, ptr noundef %2, i64 noundef %3, ptr noundef %4) #0 { %6 = alloca %struct.TYPE_3__, align 8 call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3 %7 = call i32 @memcpy(ptr noundef nonnull %6, ptr noundef %4, i32 noundef 8) #3 %8 = load i64, ptr %6, align 8, !tbaa !6 %9 = icmp ne i64 %8, 0 %10 = zext i1 %9 to i32 %11 = call i64 @FSE_decompress_usingDTable_generic(ptr noundef %0, i64 noundef %1, ptr noundef %2, i64 noundef %3, ptr noundef %4, i32 noundef %10) #3 call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3 ret i64 %11 } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 declare i64 @FSE_decompress_usingDTable_generic(ptr noundef, i64 noundef, ptr noundef, i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"TYPE_3__", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
freebsd_sys_contrib_zstd_lib_legacy_extr_zstd_v04.c_FSE_decompress_usingDTable
; ModuleID = 'AnghaBench/php-src/ext/gd/libgd/extr_gd.c_gdClearErrorMethod.c' source_filename = "AnghaBench/php-src/ext/gd/libgd/extr_gd.c_gdClearErrorMethod.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @gd_stderr_error = dso_local local_unnamed_addr global i32 0, align 4 @gd_error_method = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable define dso_local void @gdClearErrorMethod() local_unnamed_addr #0 { %1 = load i32, ptr @gd_stderr_error, align 4, !tbaa !5 store i32 %1, ptr @gd_error_method, align 4, !tbaa !5 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/php-src/ext/gd/libgd/extr_gd.c_gdClearErrorMethod.c' source_filename = "AnghaBench/php-src/ext/gd/libgd/extr_gd.c_gdClearErrorMethod.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @gd_stderr_error = common local_unnamed_addr global i32 0, align 4 @gd_error_method = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable(sync) define void @gdClearErrorMethod() local_unnamed_addr #0 { %1 = load i32, ptr @gd_stderr_error, align 4, !tbaa !6 store i32 %1, ptr @gd_error_method, align 4, !tbaa !6 ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
php-src_ext_gd_libgd_extr_gd.c_gdClearErrorMethod
; ModuleID = 'AnghaBench/freebsd/usr.sbin/nscd/agents/extr_group.c_group_mp_destroy_func.c' source_filename = "AnghaBench/freebsd/usr.sbin/nscd/agents/extr_group.c_group_mp_destroy_func.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @group_mp_destroy_func], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @group_mp_destroy_func(ptr nocapture readnone %0) #0 { %2 = tail call i32 @TRACE_IN(ptr noundef nonnull @group_mp_destroy_func) #2 %3 = tail call i32 @TRACE_OUT(ptr noundef nonnull @group_mp_destroy_func) #2 ret void } declare i32 @TRACE_IN(ptr noundef) local_unnamed_addr #1 declare i32 @TRACE_OUT(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/freebsd/usr.sbin/nscd/agents/extr_group.c_group_mp_destroy_func.c' source_filename = "AnghaBench/freebsd/usr.sbin/nscd/agents/extr_group.c_group_mp_destroy_func.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @group_mp_destroy_func], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @group_mp_destroy_func(ptr nocapture readnone %0) #0 { %2 = tail call i32 @TRACE_IN(ptr noundef nonnull @group_mp_destroy_func) #2 %3 = tail call i32 @TRACE_OUT(ptr noundef nonnull @group_mp_destroy_func) #2 ret void } declare i32 @TRACE_IN(ptr noundef) local_unnamed_addr #1 declare i32 @TRACE_OUT(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
freebsd_usr.sbin_nscd_agents_extr_group.c_group_mp_destroy_func
; ModuleID = 'AnghaBench/fastsocket/kernel/net/wireless/extr_lib80211.c_lib80211_crypt_delayed_deinit.c' source_filename = "AnghaBench/fastsocket/kernel/net/wireless/extr_lib80211.c_lib80211_crypt_delayed_deinit.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.lib80211_crypt_info = type { i32, %struct.TYPE_3__, i32, i32 } %struct.TYPE_3__ = type { i64 } @jiffies = dso_local local_unnamed_addr global i64 0, align 8 @HZ = dso_local local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind uwtable define dso_local void @lib80211_crypt_delayed_deinit(ptr noundef %0, ptr nocapture noundef %1) local_unnamed_addr #0 { %3 = load ptr, ptr %1, align 8, !tbaa !5 %4 = icmp eq ptr %3, null br i1 %4, label %25, label %5 5: ; preds = %2 store ptr null, ptr %1, align 8, !tbaa !5 %6 = load i32, ptr %0, align 8, !tbaa !9 %7 = tail call i32 @spin_lock_irqsave(i32 noundef %6, i64 noundef undef) #2 %8 = getelementptr inbounds %struct.lib80211_crypt_info, ptr %0, i64 0, i32 3 %9 = load i32, ptr %8, align 4, !tbaa !14 %10 = icmp eq i32 %9, 0 br i1 %10, label %11, label %22 11: ; preds = %5 %12 = getelementptr inbounds %struct.lib80211_crypt_info, ptr %0, i64 0, i32 2 %13 = tail call i32 @list_add(ptr noundef nonnull %3, ptr noundef nonnull %12) #2 %14 = getelementptr inbounds %struct.lib80211_crypt_info, ptr %0, i64 0, i32 1 %15 = tail call i32 @timer_pending(ptr noundef nonnull %14) #2 %16 = icmp eq i32 %15, 0 br i1 %16, label %17, label %22 17: ; preds = %11 %18 = load i64, ptr @jiffies, align 8, !tbaa !15 %19 = load i64, ptr @HZ, align 8, !tbaa !15 %20 = add nsw i64 %19, %18 store i64 %20, ptr %14, align 8, !tbaa !16 %21 = tail call i32 @add_timer(ptr noundef nonnull %14) #2 br label %22 22: ; preds = %11, %17, %5 %23 = load i32, ptr %0, align 8, !tbaa !9 %24 = tail call i32 @spin_unlock_irqrestore(i32 noundef %23, i64 noundef undef) #2 br label %25 25: ; preds = %2, %22 ret void } declare i32 @spin_lock_irqsave(i32 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @list_add(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @timer_pending(ptr noundef) local_unnamed_addr #1 declare i32 @add_timer(ptr noundef) local_unnamed_addr #1 declare i32 @spin_unlock_irqrestore(i32 noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !11, i64 0} !10 = !{!"lib80211_crypt_info", !11, i64 0, !12, i64 8, !11, i64 16, !11, i64 20} !11 = !{!"int", !7, i64 0} !12 = !{!"TYPE_3__", !13, i64 0} !13 = !{!"long", !7, i64 0} !14 = !{!10, !11, i64 20} !15 = !{!13, !13, i64 0} !16 = !{!10, !13, i64 8}
; ModuleID = 'AnghaBench/fastsocket/kernel/net/wireless/extr_lib80211.c_lib80211_crypt_delayed_deinit.c' source_filename = "AnghaBench/fastsocket/kernel/net/wireless/extr_lib80211.c_lib80211_crypt_delayed_deinit.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @jiffies = common local_unnamed_addr global i64 0, align 8 @HZ = common local_unnamed_addr global i64 0, align 8 ; Function Attrs: nounwind ssp uwtable(sync) define void @lib80211_crypt_delayed_deinit(ptr noundef %0, ptr nocapture noundef %1) local_unnamed_addr #0 { %3 = load ptr, ptr %1, align 8, !tbaa !6 %4 = icmp eq ptr %3, null br i1 %4, label %25, label %5 5: ; preds = %2 store ptr null, ptr %1, align 8, !tbaa !6 %6 = load i32, ptr %0, align 8, !tbaa !10 %7 = tail call i32 @spin_lock_irqsave(i32 noundef %6, i64 noundef undef) #2 %8 = getelementptr inbounds i8, ptr %0, i64 20 %9 = load i32, ptr %8, align 4, !tbaa !15 %10 = icmp eq i32 %9, 0 br i1 %10, label %11, label %22 11: ; preds = %5 %12 = getelementptr inbounds i8, ptr %0, i64 16 %13 = tail call i32 @list_add(ptr noundef nonnull %3, ptr noundef nonnull %12) #2 %14 = getelementptr inbounds i8, ptr %0, i64 8 %15 = tail call i32 @timer_pending(ptr noundef nonnull %14) #2 %16 = icmp eq i32 %15, 0 br i1 %16, label %17, label %22 17: ; preds = %11 %18 = load i64, ptr @jiffies, align 8, !tbaa !16 %19 = load i64, ptr @HZ, align 8, !tbaa !16 %20 = add nsw i64 %19, %18 store i64 %20, ptr %14, align 8, !tbaa !17 %21 = tail call i32 @add_timer(ptr noundef nonnull %14) #2 br label %22 22: ; preds = %11, %17, %5 %23 = load i32, ptr %0, align 8, !tbaa !10 %24 = tail call i32 @spin_unlock_irqrestore(i32 noundef %23, i64 noundef undef) #2 br label %25 25: ; preds = %2, %22 ret void } declare i32 @spin_lock_irqsave(i32 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @list_add(ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @timer_pending(ptr noundef) local_unnamed_addr #1 declare i32 @add_timer(ptr noundef) local_unnamed_addr #1 declare i32 @spin_unlock_irqrestore(i32 noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"lib80211_crypt_info", !12, i64 0, !13, i64 8, !12, i64 16, !12, i64 20} !12 = !{!"int", !8, i64 0} !13 = !{!"TYPE_3__", !14, i64 0} !14 = !{!"long", !8, i64 0} !15 = !{!11, !12, i64 20} !16 = !{!14, !14, i64 0} !17 = !{!11, !14, i64 8}
fastsocket_kernel_net_wireless_extr_lib80211.c_lib80211_crypt_delayed_deinit
; ModuleID = 'AnghaBench/freebsd/contrib/libevent/test/extr_regress_ssl.c_get_ssl_ctx.c' source_filename = "AnghaBench/freebsd/contrib/libevent/test/extr_regress_ssl.c_get_ssl_ctx.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @the_ssl_ctx = dso_local local_unnamed_addr global ptr null, align 8 @disable_tls_11_and_12 = dso_local local_unnamed_addr global i64 0, align 8 @SSL_OP_NO_TLSv1_1 = dso_local local_unnamed_addr global i32 0, align 4 @SSL_OP_NO_TLSv1_2 = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local ptr @get_ssl_ctx() local_unnamed_addr #0 { %1 = load ptr, ptr @the_ssl_ctx, align 8, !tbaa !5 %2 = icmp eq ptr %1, null br i1 %2, label %3, label %6 3: ; preds = %0 %4 = tail call i32 (...) @SSLv23_method() #2 %5 = tail call ptr @SSL_CTX_new(i32 noundef %4) #2 store ptr %5, ptr @the_ssl_ctx, align 8, !tbaa !5 br label %6 6: ; preds = %3, %0 %7 = phi ptr [ %1, %0 ], [ %5, %3 ] ret ptr %7 } declare ptr @SSL_CTX_new(i32 noundef) local_unnamed_addr #1 declare i32 @SSLv23_method(...) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/freebsd/contrib/libevent/test/extr_regress_ssl.c_get_ssl_ctx.c' source_filename = "AnghaBench/freebsd/contrib/libevent/test/extr_regress_ssl.c_get_ssl_ctx.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @the_ssl_ctx = common local_unnamed_addr global ptr null, align 8 @disable_tls_11_and_12 = common local_unnamed_addr global i64 0, align 8 @SSL_OP_NO_TLSv1_1 = common local_unnamed_addr global i32 0, align 4 @SSL_OP_NO_TLSv1_2 = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define ptr @get_ssl_ctx() local_unnamed_addr #0 { %1 = load ptr, ptr @the_ssl_ctx, align 8, !tbaa !6 %2 = icmp eq ptr %1, null br i1 %2, label %3, label %6 3: ; preds = %0 %4 = tail call i32 @SSLv23_method() #2 %5 = tail call ptr @SSL_CTX_new(i32 noundef %4) #2 store ptr %5, ptr @the_ssl_ctx, align 8, !tbaa !6 br label %6 6: ; preds = %3, %0 %7 = phi ptr [ %1, %0 ], [ %5, %3 ] ret ptr %7 } declare ptr @SSL_CTX_new(i32 noundef) local_unnamed_addr #1 declare i32 @SSLv23_method(...) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
freebsd_contrib_libevent_test_extr_regress_ssl.c_get_ssl_ctx
; ModuleID = 'AnghaBench/linux/kernel/trace/extr_trace.h_ftrace_clear_pids.c' source_filename = "AnghaBench/linux/kernel/trace/extr_trace.h_ftrace_clear_pids.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @ftrace_clear_pids], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define internal void @ftrace_clear_pids(ptr nocapture readnone %0) #0 { ret void } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/linux/kernel/trace/extr_trace.h_ftrace_clear_pids.c' source_filename = "AnghaBench/linux/kernel/trace/extr_trace.h_ftrace_clear_pids.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @ftrace_clear_pids], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define internal void @ftrace_clear_pids(ptr nocapture readnone %0) #0 { ret void } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
linux_kernel_trace_extr_trace.h_ftrace_clear_pids
; ModuleID = 'AnghaBench/linux/drivers/staging/wusbcore/extr_devconnect.c_wusbhc_devconnect_destroy.c' source_filename = "AnghaBench/linux/drivers/staging/wusbcore/extr_devconnect.c_wusbhc_devconnect_destroy.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define dso_local void @wusbhc_devconnect_destroy(ptr nocapture noundef readnone %0) local_unnamed_addr #0 { ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/linux/drivers/staging/wusbcore/extr_devconnect.c_wusbhc_devconnect_destroy.c' source_filename = "AnghaBench/linux/drivers/staging/wusbcore/extr_devconnect.c_wusbhc_devconnect_destroy.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define void @wusbhc_devconnect_destroy(ptr nocapture noundef readnone %0) local_unnamed_addr #0 { ret void } attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
linux_drivers_staging_wusbcore_extr_devconnect.c_wusbhc_devconnect_destroy
; ModuleID = 'AnghaBench/linux/sound/soc/cirrus/extr_ep93xx-ac97.c_ep93xx_ac97_interrupt.c' source_filename = "AnghaBench/linux/sound/soc/cirrus/extr_ep93xx-ac97.c_ep93xx_ac97_interrupt.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @AC97GIS = dso_local local_unnamed_addr global i32 0, align 4 @AC97IM = dso_local local_unnamed_addr global i32 0, align 4 @IRQ_HANDLED = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @ep93xx_ac97_interrupt], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @ep93xx_ac97_interrupt(i32 %0, ptr noundef %1) #0 { %3 = load i32, ptr @AC97GIS, align 4, !tbaa !5 %4 = tail call i32 @ep93xx_ac97_read_reg(ptr noundef %1, i32 noundef %3) #2 %5 = load i32, ptr @AC97IM, align 4, !tbaa !5 %6 = tail call i32 @ep93xx_ac97_read_reg(ptr noundef %1, i32 noundef %5) #2 %7 = xor i32 %4, -1 %8 = and i32 %6, %7 %9 = load i32, ptr @AC97IM, align 4, !tbaa !5 %10 = tail call i32 @ep93xx_ac97_write_reg(ptr noundef %1, i32 noundef %9, i32 noundef %8) #2 %11 = tail call i32 @complete(ptr noundef %1) #2 %12 = load i32, ptr @IRQ_HANDLED, align 4, !tbaa !5 ret i32 %12 } declare i32 @ep93xx_ac97_read_reg(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ep93xx_ac97_write_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @complete(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/sound/soc/cirrus/extr_ep93xx-ac97.c_ep93xx_ac97_interrupt.c' source_filename = "AnghaBench/linux/sound/soc/cirrus/extr_ep93xx-ac97.c_ep93xx_ac97_interrupt.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @AC97GIS = common local_unnamed_addr global i32 0, align 4 @AC97IM = common local_unnamed_addr global i32 0, align 4 @IRQ_HANDLED = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @ep93xx_ac97_interrupt], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @ep93xx_ac97_interrupt(i32 %0, ptr noundef %1) #0 { %3 = load i32, ptr @AC97GIS, align 4, !tbaa !6 %4 = tail call i32 @ep93xx_ac97_read_reg(ptr noundef %1, i32 noundef %3) #2 %5 = load i32, ptr @AC97IM, align 4, !tbaa !6 %6 = tail call i32 @ep93xx_ac97_read_reg(ptr noundef %1, i32 noundef %5) #2 %7 = xor i32 %4, -1 %8 = and i32 %6, %7 %9 = load i32, ptr @AC97IM, align 4, !tbaa !6 %10 = tail call i32 @ep93xx_ac97_write_reg(ptr noundef %1, i32 noundef %9, i32 noundef %8) #2 %11 = tail call i32 @complete(ptr noundef %1) #2 %12 = load i32, ptr @IRQ_HANDLED, align 4, !tbaa !6 ret i32 %12 } declare i32 @ep93xx_ac97_read_reg(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @ep93xx_ac97_write_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @complete(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
linux_sound_soc_cirrus_extr_ep93xx-ac97.c_ep93xx_ac97_interrupt
; ModuleID = 'AnghaBench/linux/drivers/w1/masters/extr_omap_hdq.c_hdq_reg_in.c' source_filename = "AnghaBench/linux/drivers/w1/masters/extr_omap_hdq.c_hdq_reg_in.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @hdq_reg_in], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal i32 @hdq_reg_in(ptr nocapture noundef readonly %0, i64 noundef %1) #0 { %3 = load i64, ptr %0, align 8, !tbaa !5 %4 = add nsw i64 %3, %1 %5 = tail call i32 @__raw_readl(i64 noundef %4) #2 ret i32 %5 } declare i32 @__raw_readl(i64 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"hdq_data", !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/linux/drivers/w1/masters/extr_omap_hdq.c_hdq_reg_in.c' source_filename = "AnghaBench/linux/drivers/w1/masters/extr_omap_hdq.c_hdq_reg_in.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @hdq_reg_in], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal i32 @hdq_reg_in(ptr nocapture noundef readonly %0, i64 noundef %1) #0 { %3 = load i64, ptr %0, align 8, !tbaa !6 %4 = add nsw i64 %3, %1 %5 = tail call i32 @__raw_readl(i64 noundef %4) #2 ret i32 %5 } declare i32 @__raw_readl(i64 noundef) local_unnamed_addr #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"hdq_data", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
linux_drivers_w1_masters_extr_omap_hdq.c_hdq_reg_in
; ModuleID = 'AnghaBench/obs-studio/plugins/mac-capture/extr_mac-audio.c_coreaudio_destroy.c' source_filename = "AnghaBench/obs-studio/plugins/mac-capture/extr_mac-audio.c_coreaudio_destroy.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.coreaudio_data = type { ptr, ptr, i32 } @llvm.compiler.used = appending global [1 x ptr] [ptr @coreaudio_destroy], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @coreaudio_destroy(ptr noundef %0) #0 { %2 = icmp eq ptr %0, null br i1 %2, label %14, label %3 3: ; preds = %1 %4 = tail call i32 @coreaudio_shutdown(ptr noundef nonnull %0) #2 %5 = getelementptr inbounds %struct.coreaudio_data, ptr %0, i64 0, i32 2 %6 = load i32, ptr %5, align 8, !tbaa !5 %7 = tail call i32 @os_event_destroy(i32 noundef %6) #2 %8 = getelementptr inbounds %struct.coreaudio_data, ptr %0, i64 0, i32 1 %9 = load ptr, ptr %8, align 8, !tbaa !11 %10 = tail call i32 @bfree(ptr noundef %9) #2 %11 = load ptr, ptr %0, align 8, !tbaa !12 %12 = tail call i32 @bfree(ptr noundef %11) #2 %13 = tail call i32 @bfree(ptr noundef nonnull %0) #2 br label %14 14: ; preds = %3, %1 ret void } declare i32 @coreaudio_shutdown(ptr noundef) local_unnamed_addr #1 declare i32 @os_event_destroy(i32 noundef) local_unnamed_addr #1 declare i32 @bfree(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 16} !6 = !{!"coreaudio_data", !7, i64 0, !7, i64 8, !10, i64 16} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"int", !8, i64 0} !11 = !{!6, !7, i64 8} !12 = !{!6, !7, i64 0}
; ModuleID = 'AnghaBench/obs-studio/plugins/mac-capture/extr_mac-audio.c_coreaudio_destroy.c' source_filename = "AnghaBench/obs-studio/plugins/mac-capture/extr_mac-audio.c_coreaudio_destroy.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @coreaudio_destroy], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @coreaudio_destroy(ptr noundef %0) #0 { %2 = icmp eq ptr %0, null br i1 %2, label %14, label %3 3: ; preds = %1 %4 = tail call i32 @coreaudio_shutdown(ptr noundef nonnull %0) #2 %5 = getelementptr inbounds i8, ptr %0, i64 16 %6 = load i32, ptr %5, align 8, !tbaa !6 %7 = tail call i32 @os_event_destroy(i32 noundef %6) #2 %8 = getelementptr inbounds i8, ptr %0, i64 8 %9 = load ptr, ptr %8, align 8, !tbaa !12 %10 = tail call i32 @bfree(ptr noundef %9) #2 %11 = load ptr, ptr %0, align 8, !tbaa !13 %12 = tail call i32 @bfree(ptr noundef %11) #2 %13 = tail call i32 @bfree(ptr noundef nonnull %0) #2 br label %14 14: ; preds = %3, %1 ret void } declare i32 @coreaudio_shutdown(ptr noundef) local_unnamed_addr #1 declare i32 @os_event_destroy(i32 noundef) local_unnamed_addr #1 declare i32 @bfree(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 16} !7 = !{!"coreaudio_data", !8, i64 0, !8, i64 8, !11, i64 16} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"int", !9, i64 0} !12 = !{!7, !8, i64 8} !13 = !{!7, !8, i64 0}
obs-studio_plugins_mac-capture_extr_mac-audio.c_coreaudio_destroy
; ModuleID = 'AnghaBench/freebsd/sys/dev/qlxgb/extr_qla_inline.h_qla_read_mac_addr.c' source_filename = "AnghaBench/freebsd/sys/dev/qlxgb/extr_qla_inline.h_qla_read_mac_addr.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_6__ = type { i32, %struct.TYPE_5__ } %struct.TYPE_5__ = type { ptr } @Q8_CRB_MAC_BLOCK_START = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @qla_read_mac_addr], section "llvm.metadata" ; Function Attrs: inlinehint nounwind uwtable define internal void @qla_read_mac_addr(ptr noundef %0) #0 { %2 = alloca i32, align 8 %3 = alloca i32, align 8 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) %4 = load i32, ptr @Q8_CRB_MAC_BLOCK_START, align 4, !tbaa !5 %5 = load i32, ptr %0, align 8, !tbaa !9 %6 = lshr i32 %5, 1 %7 = mul i32 %6, 12 %8 = add nsw i32 %7, %4 %9 = shl i32 %5, 2 %10 = and i32 %9, 4 %11 = add nsw i32 %8, %10 %12 = tail call i32 @READ_REG32(ptr noundef nonnull %0, i32 noundef %11) #3 store i32 %12, ptr %2, align 8, !tbaa !5 %13 = add nsw i32 %11, 4 %14 = tail call i32 @READ_REG32(ptr noundef nonnull %0, i32 noundef %13) #3 store i32 %14, ptr %3, align 8, !tbaa !5 %15 = load i32, ptr %0, align 8, !tbaa !9 %16 = and i32 %15, 1 %17 = icmp eq i32 %16, 0 br i1 %17, label %20, label %18 18: ; preds = %1 %19 = ashr i32 %12, 16 store i32 %19, ptr %2, align 8, !tbaa !5 br label %20 20: ; preds = %1, %18 %21 = phi i64 [ 3, %18 ], [ 1, %1 ] %22 = load ptr, ptr %2, align 8, !tbaa !13 %23 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1 %24 = load ptr, ptr %23, align 8, !tbaa !14 %25 = getelementptr inbounds ptr, ptr %24, i64 5 store ptr %22, ptr %25, align 8, !tbaa !13 %26 = load ptr, ptr %3, align 8, !tbaa !13 %27 = load ptr, ptr %23, align 8, !tbaa !14 %28 = getelementptr inbounds ptr, ptr %27, i64 %21 store ptr %26, ptr %28, align 8, !tbaa !13 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @READ_REG32(ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"TYPE_6__", !6, i64 0, !11, i64 8} !11 = !{!"TYPE_5__", !12, i64 0} !12 = !{!"any pointer", !7, i64 0} !13 = !{!12, !12, i64 0} !14 = !{!10, !12, i64 8}
; ModuleID = 'AnghaBench/freebsd/sys/dev/qlxgb/extr_qla_inline.h_qla_read_mac_addr.c' source_filename = "AnghaBench/freebsd/sys/dev/qlxgb/extr_qla_inline.h_qla_read_mac_addr.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @Q8_CRB_MAC_BLOCK_START = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @qla_read_mac_addr], section "llvm.metadata" ; Function Attrs: inlinehint nounwind ssp uwtable(sync) define internal void @qla_read_mac_addr(ptr noundef %0) #0 { %2 = alloca i32, align 8 %3 = alloca i32, align 8 call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) %4 = load i32, ptr @Q8_CRB_MAC_BLOCK_START, align 4, !tbaa !6 %5 = load i32, ptr %0, align 8, !tbaa !10 %6 = lshr i32 %5, 1 %7 = mul i32 %6, 12 %8 = add nsw i32 %7, %4 %9 = shl i32 %5, 2 %10 = and i32 %9, 4 %11 = add nsw i32 %8, %10 %12 = tail call i32 @READ_REG32(ptr noundef nonnull %0, i32 noundef %11) #3 store i32 %12, ptr %2, align 8, !tbaa !6 %13 = add nsw i32 %11, 4 %14 = tail call i32 @READ_REG32(ptr noundef nonnull %0, i32 noundef %13) #3 store i32 %14, ptr %3, align 8, !tbaa !6 %15 = load i32, ptr %0, align 8, !tbaa !10 %16 = and i32 %15, 1 %17 = icmp eq i32 %16, 0 br i1 %17, label %20, label %18 18: ; preds = %1 %19 = ashr i32 %12, 16 store i32 %19, ptr %2, align 8, !tbaa !6 br label %20 20: ; preds = %1, %18 %21 = phi i64 [ 24, %18 ], [ 8, %1 ] %22 = load ptr, ptr %2, align 8, !tbaa !14 %23 = getelementptr inbounds i8, ptr %0, i64 8 %24 = load ptr, ptr %23, align 8, !tbaa !15 %25 = getelementptr inbounds i8, ptr %24, i64 40 store ptr %22, ptr %25, align 8, !tbaa !14 %26 = load ptr, ptr %3, align 8, !tbaa !14 %27 = load ptr, ptr %23, align 8, !tbaa !15 %28 = getelementptr inbounds i8, ptr %27, i64 %21 store ptr %26, ptr %28, align 8, !tbaa !14 call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) ret void } ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1 declare i32 @READ_REG32(ptr noundef, i32 noundef) local_unnamed_addr #2 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1 attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #3 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"TYPE_6__", !7, i64 0, !12, i64 8} !12 = !{!"TYPE_5__", !13, i64 0} !13 = !{!"any pointer", !8, i64 0} !14 = !{!13, !13, i64 0} !15 = !{!11, !13, i64 8}
freebsd_sys_dev_qlxgb_extr_qla_inline.h_qla_read_mac_addr
; ModuleID = 'AnghaBench/freebsd/sys/dev/iscsi/extr_iscsi.c_iscsi_quiesce.c' source_filename = "AnghaBench/freebsd/sys/dev/iscsi/extr_iscsi.c_iscsi_quiesce.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_2__ = type { i32, i32 } @sc = dso_local local_unnamed_addr global ptr null, align 8 @EBUSY = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @iscsi_quiesce], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @iscsi_quiesce() #0 { %1 = load ptr, ptr @sc, align 8, !tbaa !5 %2 = tail call i32 @sx_slock(ptr noundef %1) #2 %3 = load ptr, ptr @sc, align 8, !tbaa !5 %4 = getelementptr inbounds %struct.TYPE_2__, ptr %3, i64 0, i32 1 %5 = tail call i32 @TAILQ_EMPTY(ptr noundef nonnull %4) #2 %6 = icmp eq i32 %5, 0 %7 = load ptr, ptr @sc, align 8, !tbaa !5 %8 = tail call i32 @sx_sunlock(ptr noundef %7) #2 %9 = load i32, ptr @EBUSY, align 4 %10 = select i1 %6, i32 %9, i32 0 ret i32 %10 } declare i32 @sx_slock(ptr noundef) local_unnamed_addr #1 declare i32 @TAILQ_EMPTY(ptr noundef) local_unnamed_addr #1 declare i32 @sx_sunlock(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/freebsd/sys/dev/iscsi/extr_iscsi.c_iscsi_quiesce.c' source_filename = "AnghaBench/freebsd/sys/dev/iscsi/extr_iscsi.c_iscsi_quiesce.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @sc = common local_unnamed_addr global ptr null, align 8 @EBUSY = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @iscsi_quiesce], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @iscsi_quiesce() #0 { %1 = load ptr, ptr @sc, align 8, !tbaa !6 %2 = tail call i32 @sx_slock(ptr noundef %1) #2 %3 = load ptr, ptr @sc, align 8, !tbaa !6 %4 = getelementptr inbounds i8, ptr %3, i64 4 %5 = tail call i32 @TAILQ_EMPTY(ptr noundef nonnull %4) #2 %6 = icmp eq i32 %5, 0 %7 = load ptr, ptr @sc, align 8, !tbaa !6 %8 = tail call i32 @sx_sunlock(ptr noundef %7) #2 %9 = load i32, ptr @EBUSY, align 4 %10 = select i1 %6, i32 %9, i32 0 ret i32 %10 } declare i32 @sx_slock(ptr noundef) local_unnamed_addr #1 declare i32 @TAILQ_EMPTY(ptr noundef) local_unnamed_addr #1 declare i32 @sx_sunlock(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
freebsd_sys_dev_iscsi_extr_iscsi.c_iscsi_quiesce
; ModuleID = 'AnghaBench/linux/arch/mips/kernel/extr_vdso.c_arch_setup_additional_pages.c' source_filename = "AnghaBench/linux/arch/mips/kernel/extr_vdso.c_arch_setup_additional_pages.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.TYPE_8__ = type { ptr, %struct.TYPE_6__ } %struct.TYPE_6__ = type { ptr } %struct.mips_vdso_image = type { i64, i32 } %struct.mm_struct = type { i32, %struct.TYPE_7__ } %struct.TYPE_7__ = type { ptr } @current = dso_local local_unnamed_addr global ptr null, align 8 @EINTR = dso_local local_unnamed_addr global i32 0, align 4 @STACK_TOP = dso_local local_unnamed_addr global i32 0, align 4 @PAGE_SIZE = dso_local local_unnamed_addr global i64 0, align 8 @VM_READ = dso_local local_unnamed_addr global i32 0, align 4 @VM_EXEC = dso_local local_unnamed_addr global i32 0, align 4 @VM_MAYREAD = dso_local local_unnamed_addr global i32 0, align 4 @VM_MAYWRITE = dso_local local_unnamed_addr global i32 0, align 4 @VM_MAYEXEC = dso_local local_unnamed_addr global i32 0, align 4 @cpu_has_dc_aliases = dso_local local_unnamed_addr global i64 0, align 8 @shm_align_mask = dso_local local_unnamed_addr global i32 0, align 4 @vdso_data = dso_local local_unnamed_addr global i64 0, align 8 @vdso_vvar_mapping = dso_local global i32 0, align 4 @mips_gic_base = dso_local local_unnamed_addr global i64 0, align 8 @MIPS_GIC_USER_OFS = dso_local local_unnamed_addr global i64 0, align 8 @PAGE_SHIFT = dso_local local_unnamed_addr global i64 0, align 8 @PAGE_READONLY = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local i32 @arch_setup_additional_pages(ptr nocapture noundef readnone %0, i32 noundef %1) local_unnamed_addr #0 { %3 = load ptr, ptr @current, align 8, !tbaa !5 %4 = getelementptr inbounds %struct.TYPE_8__, ptr %3, i64 0, i32 1 %5 = load ptr, ptr %4, align 8, !tbaa !9 %6 = load ptr, ptr %5, align 8, !tbaa !12 %7 = load ptr, ptr %3, align 8, !tbaa !14 %8 = tail call i64 @down_write_killable(ptr noundef %7) #2 %9 = icmp eq i64 %8, 0 br i1 %9, label %13, label %10 10: ; preds = %2 %11 = load i32, ptr @EINTR, align 4, !tbaa !15 %12 = sub nsw i32 0, %11 br label %121 13: ; preds = %2 %14 = load i32, ptr @STACK_TOP, align 4, !tbaa !15 %15 = load i64, ptr @PAGE_SIZE, align 8, !tbaa !17 %16 = load i32, ptr @VM_READ, align 4, !tbaa !15 %17 = load i32, ptr @VM_EXEC, align 4, !tbaa !15 %18 = or i32 %17, %16 %19 = load i32, ptr @VM_MAYREAD, align 4, !tbaa !15 %20 = or i32 %18, %19 %21 = load i32, ptr @VM_MAYWRITE, align 4, !tbaa !15 %22 = or i32 %20, %21 %23 = load i32, ptr @VM_MAYEXEC, align 4, !tbaa !15 %24 = or i32 %22, %23 %25 = tail call i64 @mmap_region(ptr noundef null, i32 noundef %14, i64 noundef %15, i32 noundef %24, i32 noundef 0, ptr noundef null) #2 %26 = tail call i64 @IS_ERR_VALUE(i64 noundef %25) #2 %27 = icmp eq i64 %26, 0 br i1 %27, label %30, label %28 28: ; preds = %13 %29 = trunc i64 %25 to i32 br label %118 30: ; preds = %13 %31 = tail call i64 (...) @mips_gic_present() #2 %32 = icmp eq i64 %31, 0 %33 = load i64, ptr @PAGE_SIZE, align 8 %34 = select i1 %32, i64 0, i64 %33 %35 = add i64 %34, %33 %36 = load i64, ptr %6, align 8, !tbaa !19 %37 = add i64 %35, %36 %38 = load i64, ptr @cpu_has_dc_aliases, align 8, !tbaa !17 %39 = icmp eq i64 %38, 0 %40 = load i32, ptr @shm_align_mask, align 4 %41 = add nsw i32 %40, 1 %42 = sext i32 %41 to i64 %43 = select i1 %39, i64 0, i64 %42 %44 = add i64 %37, %43 %45 = tail call i32 (...) @vdso_base() #2 %46 = tail call i64 @get_unmapped_area(ptr noundef null, i32 noundef %45, i64 noundef %44, i32 noundef 0, i32 noundef 0) #2 %47 = tail call i64 @IS_ERR_VALUE(i64 noundef %46) #2 %48 = icmp eq i64 %47, 0 br i1 %48, label %51, label %49 49: ; preds = %30 %50 = trunc i64 %46 to i32 br label %118 51: ; preds = %30 %52 = load i64, ptr @cpu_has_dc_aliases, align 8, !tbaa !17 %53 = icmp eq i64 %52, 0 br i1 %53, label %63, label %54 54: ; preds = %51 %55 = load i32, ptr @shm_align_mask, align 4, !tbaa !15 %56 = tail call i64 @__ALIGN_MASK(i64 noundef %46, i32 noundef %55) #2 %57 = load i64, ptr @vdso_data, align 8, !tbaa !17 %58 = sub i64 %57, %34 %59 = load i32, ptr @shm_align_mask, align 4, !tbaa !15 %60 = sext i32 %59 to i64 %61 = and i64 %58, %60 %62 = add i64 %61, %56 br label %63 63: ; preds = %54, %51 %64 = phi i64 [ %62, %54 ], [ %46, %51 ] %65 = add i64 %64, %34 %66 = load i64, ptr @PAGE_SIZE, align 8, !tbaa !17 %67 = add i64 %65, %66 %68 = load i32, ptr @VM_READ, align 4, !tbaa !15 %69 = load i32, ptr @VM_MAYREAD, align 4, !tbaa !15 %70 = or i32 %69, %68 %71 = tail call ptr @_install_special_mapping(ptr noundef %7, i64 noundef %64, i64 noundef %35, i32 noundef %70, ptr noundef nonnull @vdso_vvar_mapping) #2 %72 = tail call i64 @IS_ERR(ptr noundef %71) #2 %73 = icmp eq i64 %72, 0 br i1 %73, label %76, label %74 74: ; preds = %63 %75 = tail call i32 @PTR_ERR(ptr noundef %71) #2 br label %118 76: ; preds = %63 %77 = icmp eq i64 %34, 0 br i1 %77, label %89, label %78 78: ; preds = %76 %79 = load i64, ptr @mips_gic_base, align 8, !tbaa !17 %80 = load i64, ptr @MIPS_GIC_USER_OFS, align 8, !tbaa !17 %81 = add nsw i64 %80, %79 %82 = tail call i64 @virt_to_phys(i64 noundef %81) #2 %83 = load i64, ptr @PAGE_SHIFT, align 8, !tbaa !17 %84 = lshr i64 %82, %83 %85 = load i32, ptr @PAGE_READONLY, align 4, !tbaa !15 %86 = tail call i32 @pgprot_noncached(i32 noundef %85) #2 %87 = tail call i32 @io_remap_pfn_range(ptr noundef %71, i64 noundef %64, i64 noundef %84, i64 noundef %34, i32 noundef %86) #2 %88 = icmp eq i32 %87, 0 br i1 %88, label %89, label %118 89: ; preds = %78, %76 %90 = load i64, ptr @vdso_data, align 8, !tbaa !17 %91 = tail call i64 @virt_to_phys(i64 noundef %90) #2 %92 = load i64, ptr @PAGE_SHIFT, align 8, !tbaa !17 %93 = lshr i64 %91, %92 %94 = load i64, ptr @PAGE_SIZE, align 8, !tbaa !17 %95 = load i32, ptr @PAGE_READONLY, align 4, !tbaa !15 %96 = tail call i32 @remap_pfn_range(ptr noundef %71, i64 noundef %65, i64 noundef %93, i64 noundef %94, i32 noundef %95) #2 %97 = icmp eq i32 %96, 0 br i1 %97, label %98, label %118 98: ; preds = %89 %99 = load i64, ptr %6, align 8, !tbaa !19 %100 = load i32, ptr @VM_READ, align 4, !tbaa !15 %101 = load i32, ptr @VM_EXEC, align 4, !tbaa !15 %102 = or i32 %101, %100 %103 = load i32, ptr @VM_MAYREAD, align 4, !tbaa !15 %104 = or i32 %102, %103 %105 = load i32, ptr @VM_MAYWRITE, align 4, !tbaa !15 %106 = or i32 %104, %105 %107 = load i32, ptr @VM_MAYEXEC, align 4, !tbaa !15 %108 = or i32 %106, %107 %109 = getelementptr inbounds %struct.mips_vdso_image, ptr %6, i64 0, i32 1 %110 = tail call ptr @_install_special_mapping(ptr noundef %7, i64 noundef %67, i64 noundef %99, i32 noundef %108, ptr noundef nonnull %109) #2 %111 = tail call i64 @IS_ERR(ptr noundef %110) #2 %112 = icmp eq i64 %111, 0 br i1 %112, label %115, label %113 113: ; preds = %98 %114 = tail call i32 @PTR_ERR(ptr noundef %110) #2 br label %118 115: ; preds = %98 %116 = inttoptr i64 %67 to ptr %117 = getelementptr inbounds %struct.mm_struct, ptr %7, i64 0, i32 1 store ptr %116, ptr %117, align 8, !tbaa !21 br label %118 118: ; preds = %89, %78, %115, %113, %74, %49, %28 %119 = phi i32 [ %29, %28 ], [ %50, %49 ], [ %75, %74 ], [ %87, %78 ], [ %96, %89 ], [ %114, %113 ], [ 0, %115 ] %120 = tail call i32 @up_write(ptr noundef %7) #2 br label %121 121: ; preds = %118, %10 %122 = phi i32 [ %12, %10 ], [ %119, %118 ] ret i32 %122 } declare i64 @down_write_killable(ptr noundef) local_unnamed_addr #1 declare i64 @mmap_region(ptr noundef, i32 noundef, i64 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i64 @IS_ERR_VALUE(i64 noundef) local_unnamed_addr #1 declare i64 @mips_gic_present(...) local_unnamed_addr #1 declare i64 @get_unmapped_area(ptr noundef, i32 noundef, i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @vdso_base(...) local_unnamed_addr #1 declare i64 @__ALIGN_MASK(i64 noundef, i32 noundef) local_unnamed_addr #1 declare ptr @_install_special_mapping(ptr noundef, i64 noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1 declare i64 @virt_to_phys(i64 noundef) local_unnamed_addr #1 declare i32 @io_remap_pfn_range(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @pgprot_noncached(i32 noundef) local_unnamed_addr #1 declare i32 @remap_pfn_range(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @up_write(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"any pointer", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 8} !10 = !{!"TYPE_8__", !6, i64 0, !11, i64 8} !11 = !{!"TYPE_6__", !6, i64 0} !12 = !{!13, !6, i64 0} !13 = !{!"TYPE_5__", !6, i64 0} !14 = !{!10, !6, i64 0} !15 = !{!16, !16, i64 0} !16 = !{!"int", !7, i64 0} !17 = !{!18, !18, i64 0} !18 = !{!"long", !7, i64 0} !19 = !{!20, !18, i64 0} !20 = !{!"mips_vdso_image", !18, i64 0, !16, i64 8} !21 = !{!22, !6, i64 8} !22 = !{!"mm_struct", !16, i64 0, !23, i64 8} !23 = !{!"TYPE_7__", !6, i64 0}
; ModuleID = 'AnghaBench/linux/arch/mips/kernel/extr_vdso.c_arch_setup_additional_pages.c' source_filename = "AnghaBench/linux/arch/mips/kernel/extr_vdso.c_arch_setup_additional_pages.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @current = common local_unnamed_addr global ptr null, align 8 @EINTR = common local_unnamed_addr global i32 0, align 4 @STACK_TOP = common local_unnamed_addr global i32 0, align 4 @PAGE_SIZE = common local_unnamed_addr global i64 0, align 8 @VM_READ = common local_unnamed_addr global i32 0, align 4 @VM_EXEC = common local_unnamed_addr global i32 0, align 4 @VM_MAYREAD = common local_unnamed_addr global i32 0, align 4 @VM_MAYWRITE = common local_unnamed_addr global i32 0, align 4 @VM_MAYEXEC = common local_unnamed_addr global i32 0, align 4 @cpu_has_dc_aliases = common local_unnamed_addr global i64 0, align 8 @shm_align_mask = common local_unnamed_addr global i32 0, align 4 @vdso_data = common local_unnamed_addr global i64 0, align 8 @vdso_vvar_mapping = common global i32 0, align 4 @mips_gic_base = common local_unnamed_addr global i64 0, align 8 @MIPS_GIC_USER_OFS = common local_unnamed_addr global i64 0, align 8 @PAGE_SHIFT = common local_unnamed_addr global i64 0, align 8 @PAGE_READONLY = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @arch_setup_additional_pages(ptr nocapture noundef readnone %0, i32 noundef %1) local_unnamed_addr #0 { %3 = load ptr, ptr @current, align 8, !tbaa !6 %4 = getelementptr inbounds i8, ptr %3, i64 8 %5 = load ptr, ptr %4, align 8, !tbaa !10 %6 = load ptr, ptr %5, align 8, !tbaa !13 %7 = load ptr, ptr %3, align 8, !tbaa !15 %8 = tail call i64 @down_write_killable(ptr noundef %7) #2 %9 = icmp eq i64 %8, 0 br i1 %9, label %13, label %10 10: ; preds = %2 %11 = load i32, ptr @EINTR, align 4, !tbaa !16 %12 = sub nsw i32 0, %11 br label %121 13: ; preds = %2 %14 = load i32, ptr @STACK_TOP, align 4, !tbaa !16 %15 = load i64, ptr @PAGE_SIZE, align 8, !tbaa !18 %16 = load i32, ptr @VM_READ, align 4, !tbaa !16 %17 = load i32, ptr @VM_EXEC, align 4, !tbaa !16 %18 = or i32 %17, %16 %19 = load i32, ptr @VM_MAYREAD, align 4, !tbaa !16 %20 = or i32 %18, %19 %21 = load i32, ptr @VM_MAYWRITE, align 4, !tbaa !16 %22 = or i32 %20, %21 %23 = load i32, ptr @VM_MAYEXEC, align 4, !tbaa !16 %24 = or i32 %22, %23 %25 = tail call i64 @mmap_region(ptr noundef null, i32 noundef %14, i64 noundef %15, i32 noundef %24, i32 noundef 0, ptr noundef null) #2 %26 = tail call i64 @IS_ERR_VALUE(i64 noundef %25) #2 %27 = icmp eq i64 %26, 0 br i1 %27, label %30, label %28 28: ; preds = %13 %29 = trunc i64 %25 to i32 br label %118 30: ; preds = %13 %31 = tail call i64 @mips_gic_present() #2 %32 = icmp eq i64 %31, 0 %33 = load i64, ptr @PAGE_SIZE, align 8 %34 = select i1 %32, i64 0, i64 %33 %35 = add i64 %34, %33 %36 = load i64, ptr %6, align 8, !tbaa !20 %37 = add i64 %35, %36 %38 = load i64, ptr @cpu_has_dc_aliases, align 8, !tbaa !18 %39 = icmp eq i64 %38, 0 %40 = load i32, ptr @shm_align_mask, align 4 %41 = add nsw i32 %40, 1 %42 = sext i32 %41 to i64 %43 = select i1 %39, i64 0, i64 %42 %44 = add i64 %37, %43 %45 = tail call i32 @vdso_base() #2 %46 = tail call i64 @get_unmapped_area(ptr noundef null, i32 noundef %45, i64 noundef %44, i32 noundef 0, i32 noundef 0) #2 %47 = tail call i64 @IS_ERR_VALUE(i64 noundef %46) #2 %48 = icmp eq i64 %47, 0 br i1 %48, label %51, label %49 49: ; preds = %30 %50 = trunc i64 %46 to i32 br label %118 51: ; preds = %30 %52 = load i64, ptr @cpu_has_dc_aliases, align 8, !tbaa !18 %53 = icmp eq i64 %52, 0 br i1 %53, label %63, label %54 54: ; preds = %51 %55 = load i32, ptr @shm_align_mask, align 4, !tbaa !16 %56 = tail call i64 @__ALIGN_MASK(i64 noundef %46, i32 noundef %55) #2 %57 = load i64, ptr @vdso_data, align 8, !tbaa !18 %58 = sub i64 %57, %34 %59 = load i32, ptr @shm_align_mask, align 4, !tbaa !16 %60 = sext i32 %59 to i64 %61 = and i64 %58, %60 %62 = add i64 %61, %56 br label %63 63: ; preds = %54, %51 %64 = phi i64 [ %62, %54 ], [ %46, %51 ] %65 = add i64 %64, %34 %66 = load i64, ptr @PAGE_SIZE, align 8, !tbaa !18 %67 = add i64 %65, %66 %68 = load i32, ptr @VM_READ, align 4, !tbaa !16 %69 = load i32, ptr @VM_MAYREAD, align 4, !tbaa !16 %70 = or i32 %69, %68 %71 = tail call ptr @_install_special_mapping(ptr noundef %7, i64 noundef %64, i64 noundef %35, i32 noundef %70, ptr noundef nonnull @vdso_vvar_mapping) #2 %72 = tail call i64 @IS_ERR(ptr noundef %71) #2 %73 = icmp eq i64 %72, 0 br i1 %73, label %76, label %74 74: ; preds = %63 %75 = tail call i32 @PTR_ERR(ptr noundef %71) #2 br label %118 76: ; preds = %63 %77 = icmp eq i64 %34, 0 br i1 %77, label %89, label %78 78: ; preds = %76 %79 = load i64, ptr @mips_gic_base, align 8, !tbaa !18 %80 = load i64, ptr @MIPS_GIC_USER_OFS, align 8, !tbaa !18 %81 = add nsw i64 %80, %79 %82 = tail call i64 @virt_to_phys(i64 noundef %81) #2 %83 = load i64, ptr @PAGE_SHIFT, align 8, !tbaa !18 %84 = lshr i64 %82, %83 %85 = load i32, ptr @PAGE_READONLY, align 4, !tbaa !16 %86 = tail call i32 @pgprot_noncached(i32 noundef %85) #2 %87 = tail call i32 @io_remap_pfn_range(ptr noundef %71, i64 noundef %64, i64 noundef %84, i64 noundef %34, i32 noundef %86) #2 %88 = icmp eq i32 %87, 0 br i1 %88, label %89, label %118 89: ; preds = %78, %76 %90 = load i64, ptr @vdso_data, align 8, !tbaa !18 %91 = tail call i64 @virt_to_phys(i64 noundef %90) #2 %92 = load i64, ptr @PAGE_SHIFT, align 8, !tbaa !18 %93 = lshr i64 %91, %92 %94 = load i64, ptr @PAGE_SIZE, align 8, !tbaa !18 %95 = load i32, ptr @PAGE_READONLY, align 4, !tbaa !16 %96 = tail call i32 @remap_pfn_range(ptr noundef %71, i64 noundef %65, i64 noundef %93, i64 noundef %94, i32 noundef %95) #2 %97 = icmp eq i32 %96, 0 br i1 %97, label %98, label %118 98: ; preds = %89 %99 = load i64, ptr %6, align 8, !tbaa !20 %100 = load i32, ptr @VM_READ, align 4, !tbaa !16 %101 = load i32, ptr @VM_EXEC, align 4, !tbaa !16 %102 = or i32 %101, %100 %103 = load i32, ptr @VM_MAYREAD, align 4, !tbaa !16 %104 = or i32 %102, %103 %105 = load i32, ptr @VM_MAYWRITE, align 4, !tbaa !16 %106 = or i32 %104, %105 %107 = load i32, ptr @VM_MAYEXEC, align 4, !tbaa !16 %108 = or i32 %106, %107 %109 = getelementptr inbounds i8, ptr %6, i64 8 %110 = tail call ptr @_install_special_mapping(ptr noundef %7, i64 noundef %67, i64 noundef %99, i32 noundef %108, ptr noundef nonnull %109) #2 %111 = tail call i64 @IS_ERR(ptr noundef %110) #2 %112 = icmp eq i64 %111, 0 br i1 %112, label %115, label %113 113: ; preds = %98 %114 = tail call i32 @PTR_ERR(ptr noundef %110) #2 br label %118 115: ; preds = %98 %116 = inttoptr i64 %67 to ptr %117 = getelementptr inbounds i8, ptr %7, i64 8 store ptr %116, ptr %117, align 8, !tbaa !22 br label %118 118: ; preds = %89, %78, %115, %113, %74, %49, %28 %119 = phi i32 [ %29, %28 ], [ %50, %49 ], [ %75, %74 ], [ %87, %78 ], [ %96, %89 ], [ %114, %113 ], [ 0, %115 ] %120 = tail call i32 @up_write(ptr noundef %7) #2 br label %121 121: ; preds = %118, %10 %122 = phi i32 [ %12, %10 ], [ %119, %118 ] ret i32 %122 } declare i64 @down_write_killable(ptr noundef) local_unnamed_addr #1 declare i64 @mmap_region(ptr noundef, i32 noundef, i64 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i64 @IS_ERR_VALUE(i64 noundef) local_unnamed_addr #1 declare i64 @mips_gic_present(...) local_unnamed_addr #1 declare i64 @get_unmapped_area(ptr noundef, i32 noundef, i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @vdso_base(...) local_unnamed_addr #1 declare i64 @__ALIGN_MASK(i64 noundef, i32 noundef) local_unnamed_addr #1 declare ptr @_install_special_mapping(ptr noundef, i64 noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1 declare i64 @virt_to_phys(i64 noundef) local_unnamed_addr #1 declare i32 @io_remap_pfn_range(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @pgprot_noncached(i32 noundef) local_unnamed_addr #1 declare i32 @remap_pfn_range(ptr noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @up_write(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 8} !11 = !{!"TYPE_8__", !7, i64 0, !12, i64 8} !12 = !{!"TYPE_6__", !7, i64 0} !13 = !{!14, !7, i64 0} !14 = !{!"TYPE_5__", !7, i64 0} !15 = !{!11, !7, i64 0} !16 = !{!17, !17, i64 0} !17 = !{!"int", !8, i64 0} !18 = !{!19, !19, i64 0} !19 = !{!"long", !8, i64 0} !20 = !{!21, !19, i64 0} !21 = !{!"mips_vdso_image", !19, i64 0, !17, i64 8} !22 = !{!23, !7, i64 8} !23 = !{!"mm_struct", !17, i64 0, !24, i64 8} !24 = !{!"TYPE_7__", !7, i64 0}
linux_arch_mips_kernel_extr_vdso.c_arch_setup_additional_pages
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/hfi1/extr_init.c_hfi1_rcd_get_by_index.c' source_filename = "AnghaBench/linux/drivers/infiniband/hw/hfi1/extr_init.c_hfi1_rcd_get_by_index.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.hfi1_devdata = type { i32, ptr } ; Function Attrs: nounwind uwtable define dso_local ptr @hfi1_rcd_get_by_index(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 { %3 = tail call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #2 %4 = getelementptr inbounds %struct.hfi1_devdata, ptr %0, i64 0, i32 1 %5 = load ptr, ptr %4, align 8, !tbaa !5 %6 = getelementptr inbounds ptr, ptr %5, i64 %1 %7 = load ptr, ptr %6, align 8, !tbaa !11 %8 = icmp eq ptr %7, null br i1 %8, label %13, label %9 9: ; preds = %2 %10 = tail call i32 @hfi1_rcd_get(ptr noundef nonnull %7) #2 %11 = icmp eq i32 %10, 0 %12 = select i1 %11, ptr null, ptr %7 br label %13 13: ; preds = %9, %2 %14 = phi ptr [ null, %2 ], [ %12, %9 ] %15 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %0, i64 noundef undef) #2 ret ptr %14 } declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @hfi1_rcd_get(ptr noundef) local_unnamed_addr #1 declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !10, i64 8} !6 = !{!"hfi1_devdata", !7, i64 0, !10, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"any pointer", !8, i64 0} !11 = !{!10, !10, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/infiniband/hw/hfi1/extr_init.c_hfi1_rcd_get_by_index.c' source_filename = "AnghaBench/linux/drivers/infiniband/hw/hfi1/extr_init.c_hfi1_rcd_get_by_index.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define ptr @hfi1_rcd_get_by_index(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 { %3 = tail call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #2 %4 = getelementptr inbounds i8, ptr %0, i64 8 %5 = load ptr, ptr %4, align 8, !tbaa !6 %6 = getelementptr inbounds ptr, ptr %5, i64 %1 %7 = load ptr, ptr %6, align 8, !tbaa !12 %8 = icmp eq ptr %7, null br i1 %8, label %13, label %9 9: ; preds = %2 %10 = tail call i32 @hfi1_rcd_get(ptr noundef nonnull %7) #2 %11 = icmp eq i32 %10, 0 %12 = select i1 %11, ptr null, ptr %7 br label %13 13: ; preds = %9, %2 %14 = phi ptr [ null, %2 ], [ %12, %9 ] %15 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %0, i64 noundef undef) #2 ret ptr %14 } declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @hfi1_rcd_get(ptr noundef) local_unnamed_addr #1 declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !11, i64 8} !7 = !{!"hfi1_devdata", !8, i64 0, !11, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"any pointer", !9, i64 0} !12 = !{!11, !11, i64 0}
linux_drivers_infiniband_hw_hfi1_extr_init.c_hfi1_rcd_get_by_index
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/radeon/extr_radeon_encoders.c_radeon_get_encoder_enum.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/radeon/extr_radeon_encoders.c_radeon_get_encoder_enum.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @CHIP_RS300 = dso_local local_unnamed_addr global i32 0, align 4 @CHIP_RS400 = dso_local local_unnamed_addr global i32 0, align 4 @CHIP_RS480 = dso_local local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_DAC2_ENUM_ID1 = dso_local local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 = dso_local local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_DAC1_ENUM_ID1 = dso_local local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 = dso_local local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 = dso_local local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_DVO1_ENUM_ID1 = dso_local local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_LVTM1_ENUM_ID1 = dso_local local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_LVDS_ENUM_ID1 = dso_local local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 = dso_local local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_TMDS1_ENUM_ID1 = dso_local local_unnamed_addr global i32 0, align 4 @CHIP_RS600 = dso_local local_unnamed_addr global i32 0, align 4 @CHIP_RS690 = dso_local local_unnamed_addr global i32 0, align 4 @CHIP_RS740 = dso_local local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_DDI_ENUM_ID1 = dso_local local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind uwtable define dso_local i32 @radeon_get_encoder_enum(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 { %4 = load ptr, ptr %0, align 8, !tbaa !5 switch i32 %1, label %86 [ i32 137, label %5 i32 129, label %5 i32 128, label %5 i32 136, label %5 i32 135, label %5 i32 131, label %39 i32 134, label %46 i32 130, label %65 i32 133, label %65 i32 132, label %84 ] 5: ; preds = %3, %3, %3, %3, %3 switch i32 %2, label %86 [ i32 1, label %6 i32 2, label %25 i32 3, label %32 ] 6: ; preds = %5 %7 = load i32, ptr %4, align 4, !tbaa !10 %8 = load i32, ptr @CHIP_RS300, align 4, !tbaa !13 %9 = icmp eq i32 %7, %8 %10 = load i32, ptr @CHIP_RS400, align 4 %11 = icmp eq i32 %7, %10 %12 = select i1 %9, i1 true, i1 %11 %13 = load i32, ptr @CHIP_RS480, align 4 %14 = icmp eq i32 %7, %13 %15 = select i1 %12, i1 true, i1 %14 br i1 %15, label %16, label %18 16: ; preds = %6 %17 = load i32, ptr @ENCODER_INTERNAL_DAC2_ENUM_ID1, align 4, !tbaa !13 br label %86 18: ; preds = %6 %19 = tail call i32 @ASIC_IS_AVIVO(ptr noundef nonnull %4) #2 %20 = icmp eq i32 %19, 0 br i1 %20, label %23, label %21 21: ; preds = %18 %22 = load i32, ptr @ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1, align 4, !tbaa !13 br label %86 23: ; preds = %18 %24 = load i32, ptr @ENCODER_INTERNAL_DAC1_ENUM_ID1, align 4, !tbaa !13 br label %86 25: ; preds = %5 %26 = tail call i32 @ASIC_IS_AVIVO(ptr noundef %4) #2 %27 = icmp eq i32 %26, 0 br i1 %27, label %30, label %28 28: ; preds = %25 %29 = load i32, ptr @ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1, align 4, !tbaa !13 br label %86 30: ; preds = %25 %31 = load i32, ptr @ENCODER_INTERNAL_DAC2_ENUM_ID1, align 4, !tbaa !13 br label %86 32: ; preds = %5 %33 = tail call i32 @ASIC_IS_AVIVO(ptr noundef %4) #2 %34 = icmp eq i32 %33, 0 br i1 %34, label %37, label %35 35: ; preds = %32 %36 = load i32, ptr @ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1, align 4, !tbaa !13 br label %86 37: ; preds = %32 %38 = load i32, ptr @ENCODER_INTERNAL_DVO1_ENUM_ID1, align 4, !tbaa !13 br label %86 39: ; preds = %3 %40 = tail call i32 @ASIC_IS_AVIVO(ptr noundef %4) #2 %41 = icmp eq i32 %40, 0 br i1 %41, label %44, label %42 42: ; preds = %39 %43 = load i32, ptr @ENCODER_INTERNAL_LVTM1_ENUM_ID1, align 4, !tbaa !13 br label %86 44: ; preds = %39 %45 = load i32, ptr @ENCODER_INTERNAL_LVDS_ENUM_ID1, align 4, !tbaa !13 br label %86 46: ; preds = %3 %47 = load i32, ptr %4, align 4, !tbaa !10 %48 = load i32, ptr @CHIP_RS300, align 4, !tbaa !13 %49 = icmp eq i32 %47, %48 %50 = load i32, ptr @CHIP_RS400, align 4 %51 = icmp eq i32 %47, %50 %52 = select i1 %49, i1 true, i1 %51 %53 = load i32, ptr @CHIP_RS480, align 4 %54 = icmp eq i32 %47, %53 %55 = select i1 %52, i1 true, i1 %54 br i1 %55, label %56, label %58 56: ; preds = %46 %57 = load i32, ptr @ENCODER_INTERNAL_DVO1_ENUM_ID1, align 4, !tbaa !13 br label %86 58: ; preds = %46 %59 = tail call i32 @ASIC_IS_AVIVO(ptr noundef nonnull %4) #2 %60 = icmp eq i32 %59, 0 br i1 %60, label %63, label %61 61: ; preds = %58 %62 = load i32, ptr @ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1, align 4, !tbaa !13 br label %86 63: ; preds = %58 %64 = load i32, ptr @ENCODER_INTERNAL_TMDS1_ENUM_ID1, align 4, !tbaa !13 br label %86 65: ; preds = %3, %3 %66 = load i32, ptr %4, align 4, !tbaa !10 %67 = load i32, ptr @CHIP_RS600, align 4, !tbaa !13 %68 = icmp eq i32 %66, %67 %69 = load i32, ptr @CHIP_RS690, align 4 %70 = icmp eq i32 %66, %69 %71 = select i1 %68, i1 true, i1 %70 %72 = load i32, ptr @CHIP_RS740, align 4 %73 = icmp eq i32 %66, %72 %74 = select i1 %71, i1 true, i1 %73 br i1 %74, label %75, label %77 75: ; preds = %65 %76 = load i32, ptr @ENCODER_INTERNAL_DDI_ENUM_ID1, align 4, !tbaa !13 br label %86 77: ; preds = %65 %78 = tail call i32 @ASIC_IS_AVIVO(ptr noundef nonnull %4) #2 %79 = icmp eq i32 %78, 0 br i1 %79, label %82, label %80 80: ; preds = %77 %81 = load i32, ptr @ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1, align 4, !tbaa !13 br label %86 82: ; preds = %77 %83 = load i32, ptr @ENCODER_INTERNAL_DVO1_ENUM_ID1, align 4, !tbaa !13 br label %86 84: ; preds = %3 %85 = load i32, ptr @ENCODER_INTERNAL_LVTM1_ENUM_ID1, align 4, !tbaa !13 br label %86 86: ; preds = %75, %82, %80, %56, %63, %61, %42, %44, %5, %21, %23, %16, %30, %28, %37, %35, %3, %84 %87 = phi i32 [ 0, %3 ], [ %85, %84 ], [ %76, %75 ], [ %81, %80 ], [ %83, %82 ], [ %57, %56 ], [ %62, %61 ], [ %64, %63 ], [ %43, %42 ], [ %45, %44 ], [ 0, %5 ], [ %36, %35 ], [ %38, %37 ], [ %29, %28 ], [ %31, %30 ], [ %17, %16 ], [ %22, %21 ], [ %24, %23 ] ret i32 %87 } declare i32 @ASIC_IS_AVIVO(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"drm_device", !7, i64 0} !7 = !{!"any pointer", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !12, i64 0} !11 = !{!"radeon_device", !12, i64 0} !12 = !{!"int", !8, i64 0} !13 = !{!12, !12, i64 0}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/radeon/extr_radeon_encoders.c_radeon_get_encoder_enum.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/radeon/extr_radeon_encoders.c_radeon_get_encoder_enum.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @CHIP_RS300 = common local_unnamed_addr global i32 0, align 4 @CHIP_RS400 = common local_unnamed_addr global i32 0, align 4 @CHIP_RS480 = common local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_DAC2_ENUM_ID1 = common local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 = common local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_DAC1_ENUM_ID1 = common local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 = common local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 = common local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_DVO1_ENUM_ID1 = common local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_LVTM1_ENUM_ID1 = common local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_LVDS_ENUM_ID1 = common local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 = common local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_TMDS1_ENUM_ID1 = common local_unnamed_addr global i32 0, align 4 @CHIP_RS600 = common local_unnamed_addr global i32 0, align 4 @CHIP_RS690 = common local_unnamed_addr global i32 0, align 4 @CHIP_RS740 = common local_unnamed_addr global i32 0, align 4 @ENCODER_INTERNAL_DDI_ENUM_ID1 = common local_unnamed_addr global i32 0, align 4 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @radeon_get_encoder_enum(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 { %4 = load ptr, ptr %0, align 8, !tbaa !6 switch i32 %1, label %86 [ i32 137, label %5 i32 129, label %5 i32 128, label %5 i32 136, label %5 i32 135, label %5 i32 131, label %39 i32 134, label %46 i32 130, label %65 i32 133, label %65 i32 132, label %84 ] 5: ; preds = %3, %3, %3, %3, %3 switch i32 %2, label %86 [ i32 1, label %6 i32 2, label %25 i32 3, label %32 ] 6: ; preds = %5 %7 = load i32, ptr %4, align 4, !tbaa !11 %8 = load i32, ptr @CHIP_RS300, align 4, !tbaa !14 %9 = icmp eq i32 %7, %8 %10 = load i32, ptr @CHIP_RS400, align 4 %11 = icmp eq i32 %7, %10 %12 = select i1 %9, i1 true, i1 %11 %13 = load i32, ptr @CHIP_RS480, align 4 %14 = icmp eq i32 %7, %13 %15 = select i1 %12, i1 true, i1 %14 br i1 %15, label %16, label %18 16: ; preds = %6 %17 = load i32, ptr @ENCODER_INTERNAL_DAC2_ENUM_ID1, align 4, !tbaa !14 br label %86 18: ; preds = %6 %19 = tail call i32 @ASIC_IS_AVIVO(ptr noundef nonnull %4) #2 %20 = icmp eq i32 %19, 0 br i1 %20, label %23, label %21 21: ; preds = %18 %22 = load i32, ptr @ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1, align 4, !tbaa !14 br label %86 23: ; preds = %18 %24 = load i32, ptr @ENCODER_INTERNAL_DAC1_ENUM_ID1, align 4, !tbaa !14 br label %86 25: ; preds = %5 %26 = tail call i32 @ASIC_IS_AVIVO(ptr noundef %4) #2 %27 = icmp eq i32 %26, 0 br i1 %27, label %30, label %28 28: ; preds = %25 %29 = load i32, ptr @ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1, align 4, !tbaa !14 br label %86 30: ; preds = %25 %31 = load i32, ptr @ENCODER_INTERNAL_DAC2_ENUM_ID1, align 4, !tbaa !14 br label %86 32: ; preds = %5 %33 = tail call i32 @ASIC_IS_AVIVO(ptr noundef %4) #2 %34 = icmp eq i32 %33, 0 br i1 %34, label %37, label %35 35: ; preds = %32 %36 = load i32, ptr @ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1, align 4, !tbaa !14 br label %86 37: ; preds = %32 %38 = load i32, ptr @ENCODER_INTERNAL_DVO1_ENUM_ID1, align 4, !tbaa !14 br label %86 39: ; preds = %3 %40 = tail call i32 @ASIC_IS_AVIVO(ptr noundef %4) #2 %41 = icmp eq i32 %40, 0 br i1 %41, label %44, label %42 42: ; preds = %39 %43 = load i32, ptr @ENCODER_INTERNAL_LVTM1_ENUM_ID1, align 4, !tbaa !14 br label %86 44: ; preds = %39 %45 = load i32, ptr @ENCODER_INTERNAL_LVDS_ENUM_ID1, align 4, !tbaa !14 br label %86 46: ; preds = %3 %47 = load i32, ptr %4, align 4, !tbaa !11 %48 = load i32, ptr @CHIP_RS300, align 4, !tbaa !14 %49 = icmp eq i32 %47, %48 %50 = load i32, ptr @CHIP_RS400, align 4 %51 = icmp eq i32 %47, %50 %52 = select i1 %49, i1 true, i1 %51 %53 = load i32, ptr @CHIP_RS480, align 4 %54 = icmp eq i32 %47, %53 %55 = select i1 %52, i1 true, i1 %54 br i1 %55, label %56, label %58 56: ; preds = %46 %57 = load i32, ptr @ENCODER_INTERNAL_DVO1_ENUM_ID1, align 4, !tbaa !14 br label %86 58: ; preds = %46 %59 = tail call i32 @ASIC_IS_AVIVO(ptr noundef nonnull %4) #2 %60 = icmp eq i32 %59, 0 br i1 %60, label %63, label %61 61: ; preds = %58 %62 = load i32, ptr @ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1, align 4, !tbaa !14 br label %86 63: ; preds = %58 %64 = load i32, ptr @ENCODER_INTERNAL_TMDS1_ENUM_ID1, align 4, !tbaa !14 br label %86 65: ; preds = %3, %3 %66 = load i32, ptr %4, align 4, !tbaa !11 %67 = load i32, ptr @CHIP_RS600, align 4, !tbaa !14 %68 = icmp eq i32 %66, %67 %69 = load i32, ptr @CHIP_RS690, align 4 %70 = icmp eq i32 %66, %69 %71 = select i1 %68, i1 true, i1 %70 %72 = load i32, ptr @CHIP_RS740, align 4 %73 = icmp eq i32 %66, %72 %74 = select i1 %71, i1 true, i1 %73 br i1 %74, label %75, label %77 75: ; preds = %65 %76 = load i32, ptr @ENCODER_INTERNAL_DDI_ENUM_ID1, align 4, !tbaa !14 br label %86 77: ; preds = %65 %78 = tail call i32 @ASIC_IS_AVIVO(ptr noundef nonnull %4) #2 %79 = icmp eq i32 %78, 0 br i1 %79, label %82, label %80 80: ; preds = %77 %81 = load i32, ptr @ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1, align 4, !tbaa !14 br label %86 82: ; preds = %77 %83 = load i32, ptr @ENCODER_INTERNAL_DVO1_ENUM_ID1, align 4, !tbaa !14 br label %86 84: ; preds = %3 %85 = load i32, ptr @ENCODER_INTERNAL_LVTM1_ENUM_ID1, align 4, !tbaa !14 br label %86 86: ; preds = %75, %82, %80, %56, %63, %61, %42, %44, %5, %21, %23, %16, %30, %28, %37, %35, %3, %84 %87 = phi i32 [ 0, %3 ], [ %85, %84 ], [ %76, %75 ], [ %81, %80 ], [ %83, %82 ], [ %57, %56 ], [ %62, %61 ], [ %64, %63 ], [ %43, %42 ], [ %45, %44 ], [ 0, %5 ], [ %36, %35 ], [ %38, %37 ], [ %29, %28 ], [ %31, %30 ], [ %17, %16 ], [ %22, %21 ], [ %24, %23 ] ret i32 %87 } declare i32 @ASIC_IS_AVIVO(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"drm_device", !8, i64 0} !8 = !{!"any pointer", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!12, !13, i64 0} !12 = !{!"radeon_device", !13, i64 0} !13 = !{!"int", !9, i64 0} !14 = !{!13, !13, i64 0}
fastsocket_kernel_drivers_gpu_drm_radeon_extr_radeon_encoders.c_radeon_get_encoder_enum
; ModuleID = 'AnghaBench/lede/target/linux/adm5120/files-3.18/drivers/mtd/maps/extr_adm5120-flash.c_adm5120_flash_write.c' source_filename = "AnghaBench/lede/target/linux/adm5120/files-3.18/drivers/mtd/maps/extr_adm5120-flash.c_adm5120_flash_write.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [20 x i8] c"writing to ofs %lX\0A\00", align 1 @llvm.compiler.used = appending global [1 x ptr] [ptr @adm5120_flash_write], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @adm5120_flash_write(ptr noundef %0, i32 noundef %1, i64 noundef %2) #0 { %4 = tail call ptr @map_to_amap(ptr noundef %0) #2 %5 = tail call i32 @MAP_DBG(ptr noundef %0, ptr noundef nonnull @.str, i64 noundef %2) #2 %6 = load i64, ptr %4, align 8, !tbaa !5 %7 = icmp ult i64 %6, %2 br i1 %7, label %16, label %8 8: ; preds = %3 %9 = tail call i32 (...) @FLASH_LOCK() #2 %10 = tail call i32 @adm5120_flash_switchbank(ptr noundef %0, i64 noundef %2) #2 %11 = load i64, ptr %4, align 8, !tbaa !5 %12 = add i64 %11, -1 %13 = and i64 %12, %2 %14 = tail call i32 @inline_map_write(ptr noundef %0, i32 noundef %1, i64 noundef %13) #2 %15 = tail call i32 (...) @FLASH_UNLOCK() #2 br label %16 16: ; preds = %3, %8 ret void } declare ptr @map_to_amap(ptr noundef) local_unnamed_addr #1 declare i32 @MAP_DBG(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @FLASH_LOCK(...) local_unnamed_addr #1 declare i32 @adm5120_flash_switchbank(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @inline_map_write(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @FLASH_UNLOCK(...) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"adm5120_map_info", !7, i64 0} !7 = !{!"long", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/lede/target/linux/adm5120/files-3.18/drivers/mtd/maps/extr_adm5120-flash.c_adm5120_flash_write.c' source_filename = "AnghaBench/lede/target/linux/adm5120/files-3.18/drivers/mtd/maps/extr_adm5120-flash.c_adm5120_flash_write.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [20 x i8] c"writing to ofs %lX\0A\00", align 1 @llvm.used = appending global [1 x ptr] [ptr @adm5120_flash_write], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @adm5120_flash_write(ptr noundef %0, i32 noundef %1, i64 noundef %2) #0 { %4 = tail call ptr @map_to_amap(ptr noundef %0) #2 %5 = tail call i32 @MAP_DBG(ptr noundef %0, ptr noundef nonnull @.str, i64 noundef %2) #2 %6 = load i64, ptr %4, align 8, !tbaa !6 %7 = icmp ult i64 %6, %2 br i1 %7, label %16, label %8 8: ; preds = %3 %9 = tail call i32 @FLASH_LOCK() #2 %10 = tail call i32 @adm5120_flash_switchbank(ptr noundef %0, i64 noundef %2) #2 %11 = load i64, ptr %4, align 8, !tbaa !6 %12 = add i64 %11, -1 %13 = and i64 %12, %2 %14 = tail call i32 @inline_map_write(ptr noundef %0, i32 noundef %1, i64 noundef %13) #2 %15 = tail call i32 @FLASH_UNLOCK() #2 br label %16 16: ; preds = %3, %8 ret void } declare ptr @map_to_amap(ptr noundef) local_unnamed_addr #1 declare i32 @MAP_DBG(ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @FLASH_LOCK(...) local_unnamed_addr #1 declare i32 @adm5120_flash_switchbank(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @inline_map_write(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1 declare i32 @FLASH_UNLOCK(...) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"adm5120_map_info", !8, i64 0} !8 = !{!"long", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"}
lede_target_linux_adm5120_files-3.18_drivers_mtd_maps_extr_adm5120-flash.c_adm5120_flash_write
; ModuleID = 'AnghaBench/linux/arch/arm/mach-omap2/extr_clockdomain.c_clkdm_read_sleepdep.c' source_filename = "AnghaBench/linux/arch/arm/mach-omap2/extr_clockdomain.c_clkdm_read_sleepdep.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.clockdomain = type { i32, i32 } @EINVAL = dso_local local_unnamed_addr global i32 0, align 4 @arch_clkdm = dso_local local_unnamed_addr global ptr null, align 8 @.str = private unnamed_addr constant [78 x i8] c"clockdomain: hardware cannot set/clear sleep dependency affecting %s from %s\0A\00", align 1 ; Function Attrs: nounwind uwtable define dso_local i32 @clkdm_read_sleepdep(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = icmp ne ptr %0, null %4 = icmp ne ptr %1, null %5 = and i1 %3, %4 br i1 %5, label %9, label %6 6: ; preds = %2 %7 = load i32, ptr @EINVAL, align 4, !tbaa !5 %8 = sub nsw i32 0, %7 br label %37 9: ; preds = %2 %10 = getelementptr inbounds %struct.clockdomain, ptr %0, i64 0, i32 1 %11 = load i32, ptr %10, align 4, !tbaa !9 %12 = tail call ptr @_clkdm_deps_lookup(ptr noundef nonnull %1, i32 noundef %11) #2 %13 = tail call i64 @IS_ERR(ptr noundef %12) #2 %14 = icmp eq i64 %13, 0 br i1 %14, label %17, label %15 15: ; preds = %9 %16 = tail call i32 @PTR_ERR(ptr noundef %12) #2 br label %17 17: ; preds = %15, %9 %18 = phi i32 [ %16, %15 ], [ 0, %9 ] %19 = load ptr, ptr @arch_clkdm, align 8, !tbaa !11 %20 = icmp eq ptr %19, null br i1 %20, label %24, label %21 21: ; preds = %17 %22 = load ptr, ptr %19, align 8, !tbaa !13 %23 = icmp eq ptr %22, null br i1 %23, label %24, label %27 24: ; preds = %21, %17 %25 = load i32, ptr @EINVAL, align 4, !tbaa !5 %26 = sub nsw i32 0, %25 br label %27 27: ; preds = %24, %21 %28 = phi i32 [ %18, %21 ], [ %26, %24 ] %29 = icmp eq i32 %28, 0 br i1 %29, label %34, label %30 30: ; preds = %27 %31 = load i32, ptr %0, align 4, !tbaa !15 %32 = load i32, ptr %1, align 4, !tbaa !15 %33 = tail call i32 @pr_debug(ptr noundef nonnull @.str, i32 noundef %31, i32 noundef %32) #2 br label %37 34: ; preds = %27 %35 = load ptr, ptr %19, align 8, !tbaa !13 %36 = tail call i32 %35(ptr noundef nonnull %0, ptr noundef nonnull %1) #2 br label %37 37: ; preds = %34, %30, %6 %38 = phi i32 [ %28, %30 ], [ %36, %34 ], [ %8, %6 ] ret i32 %38 } declare ptr @_clkdm_deps_lookup(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @pr_debug(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 4} !10 = !{!"clockdomain", !6, i64 0, !6, i64 4} !11 = !{!12, !12, i64 0} !12 = !{!"any pointer", !7, i64 0} !13 = !{!14, !12, i64 0} !14 = !{!"TYPE_2__", !12, i64 0} !15 = !{!10, !6, i64 0}
; ModuleID = 'AnghaBench/linux/arch/arm/mach-omap2/extr_clockdomain.c_clkdm_read_sleepdep.c' source_filename = "AnghaBench/linux/arch/arm/mach-omap2/extr_clockdomain.c_clkdm_read_sleepdep.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @EINVAL = common local_unnamed_addr global i32 0, align 4 @arch_clkdm = common local_unnamed_addr global ptr null, align 8 @.str = private unnamed_addr constant [78 x i8] c"clockdomain: hardware cannot set/clear sleep dependency affecting %s from %s\0A\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @clkdm_read_sleepdep(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 { %3 = icmp ne ptr %0, null %4 = icmp ne ptr %1, null %5 = and i1 %3, %4 br i1 %5, label %9, label %6 6: ; preds = %2 %7 = load i32, ptr @EINVAL, align 4, !tbaa !6 %8 = sub nsw i32 0, %7 br label %37 9: ; preds = %2 %10 = getelementptr inbounds i8, ptr %0, i64 4 %11 = load i32, ptr %10, align 4, !tbaa !10 %12 = tail call ptr @_clkdm_deps_lookup(ptr noundef nonnull %1, i32 noundef %11) #2 %13 = tail call i64 @IS_ERR(ptr noundef %12) #2 %14 = icmp eq i64 %13, 0 br i1 %14, label %17, label %15 15: ; preds = %9 %16 = tail call i32 @PTR_ERR(ptr noundef %12) #2 br label %17 17: ; preds = %15, %9 %18 = phi i32 [ %16, %15 ], [ 0, %9 ] %19 = load ptr, ptr @arch_clkdm, align 8, !tbaa !12 %20 = icmp eq ptr %19, null br i1 %20, label %24, label %21 21: ; preds = %17 %22 = load ptr, ptr %19, align 8, !tbaa !14 %23 = icmp eq ptr %22, null br i1 %23, label %24, label %27 24: ; preds = %21, %17 %25 = load i32, ptr @EINVAL, align 4, !tbaa !6 %26 = sub nsw i32 0, %25 br label %27 27: ; preds = %24, %21 %28 = phi i32 [ %18, %21 ], [ %26, %24 ] %29 = icmp eq i32 %28, 0 br i1 %29, label %34, label %30 30: ; preds = %27 %31 = load i32, ptr %0, align 4, !tbaa !16 %32 = load i32, ptr %1, align 4, !tbaa !16 %33 = tail call i32 @pr_debug(ptr noundef nonnull @.str, i32 noundef %31, i32 noundef %32) #2 br label %37 34: ; preds = %27 %35 = load ptr, ptr %19, align 8, !tbaa !14 %36 = tail call i32 %35(ptr noundef nonnull %0, ptr noundef nonnull %1) #2 br label %37 37: ; preds = %34, %30, %6 %38 = phi i32 [ %28, %30 ], [ %36, %34 ], [ %8, %6 ] ret i32 %38 } declare ptr @_clkdm_deps_lookup(ptr noundef, i32 noundef) local_unnamed_addr #1 declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1 declare i32 @pr_debug(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 4} !11 = !{!"clockdomain", !7, i64 0, !7, i64 4} !12 = !{!13, !13, i64 0} !13 = !{!"any pointer", !8, i64 0} !14 = !{!15, !13, i64 0} !15 = !{!"TYPE_2__", !13, i64 0} !16 = !{!11, !7, i64 0}
linux_arch_arm_mach-omap2_extr_clockdomain.c_clkdm_read_sleepdep
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/nouveau/extr_nouveau_svm.h_nouveau_svm_init.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/nouveau/extr_nouveau_svm.h_nouveau_svm_init.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @nouveau_svm_init], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable define internal void @nouveau_svm_init(ptr nocapture readnone %0) #0 { ret void } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/nouveau/extr_nouveau_svm.h_nouveau_svm_init.c' source_filename = "AnghaBench/linux/drivers/gpu/drm/nouveau/extr_nouveau_svm.h_nouveau_svm_init.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @nouveau_svm_init], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) define internal void @nouveau_svm_init(ptr nocapture readnone %0) #0 { ret void } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
linux_drivers_gpu_drm_nouveau_extr_nouveau_svm.h_nouveau_svm_init
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/extr_..rtl8192c..wifi.h_set_hal_stop.c' source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/extr_..rtl8192c..wifi.h_set_hal_stop.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @_HAL_STATE_STOP = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @set_hal_stop], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable define internal void @set_hal_stop(ptr nocapture noundef writeonly %0) #0 { %2 = load i32, ptr @_HAL_STATE_STOP, align 4, !tbaa !5 store i32 %2, ptr %0, align 4, !tbaa !9 ret void } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"} !9 = !{!10, !6, i64 0} !10 = !{!"rtl_hal", !6, i64 0}
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/extr_..rtl8192c..wifi.h_set_hal_stop.c' source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/extr_..rtl8192c..wifi.h_set_hal_stop.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @_HAL_STATE_STOP = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @set_hal_stop], section "llvm.metadata" ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) define internal void @set_hal_stop(ptr nocapture noundef writeonly %0) #0 { %2 = load i32, ptr @_HAL_STATE_STOP, align 4, !tbaa !6 store i32 %2, ptr %0, align 4, !tbaa !10 ret void } attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: write, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!11, !7, i64 0} !11 = !{!"rtl_hal", !7, i64 0}
linux_drivers_net_wireless_realtek_rtlwifi_rtl8192cu_extr_..rtl8192c..wifi.h_set_hal_stop
; ModuleID = 'AnghaBench/freebsd/sys/arm/annapurna/alpine/extr_alpine_common.c_alpine_pic_decode_fdt.c' source_filename = "AnghaBench/freebsd/sys/arm/annapurna/alpine/extr_alpine_common.c_alpine_pic_decode_fdt.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @llvm.compiler.used = appending global [1 x ptr] [ptr @alpine_pic_decode_fdt], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal i32 @alpine_pic_decode_fdt(i32 noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #0 { %6 = tail call i32 @gic_decode_fdt(i32 noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #2 %7 = icmp eq i32 %6, 0 br i1 %7, label %8, label %14 8: ; preds = %5 %9 = tail call ptr @FDT_MAP_IRQ(i32 noundef %0, ptr noundef %2) #2 %10 = load i32, ptr %9, align 4, !tbaa !5 %11 = load i32, ptr %3, align 4, !tbaa !5 %12 = load i32, ptr %4, align 4, !tbaa !5 %13 = tail call i32 @arm_config_irq(i32 noundef %10, i32 noundef %11, i32 noundef %12) #2 br label %14 14: ; preds = %8, %5 ret i32 %6 } declare i32 @gic_decode_fdt(i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @FDT_MAP_IRQ(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @arm_config_irq(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/freebsd/sys/arm/annapurna/alpine/extr_alpine_common.c_alpine_pic_decode_fdt.c' source_filename = "AnghaBench/freebsd/sys/arm/annapurna/alpine/extr_alpine_common.c_alpine_pic_decode_fdt.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @llvm.used = appending global [1 x ptr] [ptr @alpine_pic_decode_fdt], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal i32 @alpine_pic_decode_fdt(i32 noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #0 { %6 = tail call i32 @gic_decode_fdt(i32 noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4) #2 %7 = icmp eq i32 %6, 0 br i1 %7, label %8, label %14 8: ; preds = %5 %9 = tail call ptr @FDT_MAP_IRQ(i32 noundef %0, ptr noundef %2) #2 %10 = load i32, ptr %9, align 4, !tbaa !6 %11 = load i32, ptr %3, align 4, !tbaa !6 %12 = load i32, ptr %4, align 4, !tbaa !6 %13 = tail call i32 @arm_config_irq(i32 noundef %10, i32 noundef %11, i32 noundef %12) #2 br label %14 14: ; preds = %8, %5 ret i32 %6 } declare i32 @gic_decode_fdt(i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @FDT_MAP_IRQ(i32 noundef, ptr noundef) local_unnamed_addr #1 declare i32 @arm_config_irq(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
freebsd_sys_arm_annapurna_alpine_extr_alpine_common.c_alpine_pic_decode_fdt
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_xmit.c_b43_tx_resume.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_xmit.c_b43_tx_resume.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" ; Function Attrs: nounwind uwtable define dso_local void @b43_tx_resume(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call i64 @b43_using_pio_transfers(ptr noundef %0) #2 %3 = icmp eq i64 %2, 0 br i1 %3, label %6, label %4 4: ; preds = %1 %5 = tail call i32 @b43_pio_tx_resume(ptr noundef %0) #2 br label %8 6: ; preds = %1 %7 = tail call i32 @b43_dma_tx_resume(ptr noundef %0) #2 br label %8 8: ; preds = %6, %4 ret void } declare i64 @b43_using_pio_transfers(ptr noundef) local_unnamed_addr #1 declare i32 @b43_pio_tx_resume(ptr noundef) local_unnamed_addr #1 declare i32 @b43_dma_tx_resume(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_xmit.c_b43_tx_resume.c' source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_xmit.c_b43_tx_resume.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" ; Function Attrs: nounwind ssp uwtable(sync) define void @b43_tx_resume(ptr noundef %0) local_unnamed_addr #0 { %2 = tail call i64 @b43_using_pio_transfers(ptr noundef %0) #2 %3 = icmp eq i64 %2, 0 br i1 %3, label %6, label %4 4: ; preds = %1 %5 = tail call i32 @b43_pio_tx_resume(ptr noundef %0) #2 br label %8 6: ; preds = %1 %7 = tail call i32 @b43_dma_tx_resume(ptr noundef %0) #2 br label %8 8: ; preds = %6, %4 ret void } declare i64 @b43_using_pio_transfers(ptr noundef) local_unnamed_addr #1 declare i32 @b43_pio_tx_resume(ptr noundef) local_unnamed_addr #1 declare i32 @b43_dma_tx_resume(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
fastsocket_kernel_drivers_net_wireless_b43_extr_xmit.c_b43_tx_resume
; ModuleID = 'AnghaBench/linux/drivers/pcmcia/extr_pd6729.c_indirect_write.c' source_filename = "AnghaBench/linux/drivers/pcmcia/extr_pd6729.c_indirect_write.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.pd6729_socket = type { i32, i64 } @port_lock = dso_local global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @indirect_write], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @indirect_write(ptr nocapture noundef readonly %0, i16 noundef zeroext %1, i8 noundef zeroext %2) #0 { %4 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull @port_lock, i64 noundef undef) #2 %5 = load i32, ptr %0, align 8, !tbaa !5 %6 = trunc i32 %5 to i16 %7 = shl i16 %6, 6 %8 = add i16 %7, %1 %9 = getelementptr inbounds %struct.pd6729_socket, ptr %0, i64 0, i32 1 %10 = load i64, ptr %9, align 8, !tbaa !11 %11 = trunc i16 %8 to i8 %12 = tail call i32 @outb(i8 noundef zeroext %11, i64 noundef %10) #2 %13 = add i64 %10, 1 %14 = tail call i32 @outb(i8 noundef zeroext %2, i64 noundef %13) #2 %15 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull @port_lock, i64 noundef undef) #2 ret void } declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @outb(i8 noundef zeroext, i64 noundef) local_unnamed_addr #1 declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"pd6729_socket", !7, i64 0, !10, i64 8} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!"long", !8, i64 0} !11 = !{!6, !10, i64 8}
; ModuleID = 'AnghaBench/linux/drivers/pcmcia/extr_pd6729.c_indirect_write.c' source_filename = "AnghaBench/linux/drivers/pcmcia/extr_pd6729.c_indirect_write.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @port_lock = common global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @indirect_write], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @indirect_write(ptr nocapture noundef readonly %0, i16 noundef zeroext %1, i8 noundef zeroext %2) #0 { %4 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull @port_lock, i64 noundef undef) #2 %5 = load i32, ptr %0, align 8, !tbaa !6 %6 = trunc i32 %5 to i16 %7 = shl i16 %6, 6 %8 = add i16 %7, %1 %9 = getelementptr inbounds i8, ptr %0, i64 8 %10 = load i64, ptr %9, align 8, !tbaa !12 %11 = trunc i16 %8 to i8 %12 = tail call i32 @outb(i8 noundef zeroext %11, i64 noundef %10) #2 %13 = add i64 %10, 1 %14 = tail call i32 @outb(i8 noundef zeroext %2, i64 noundef %13) #2 %15 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull @port_lock, i64 noundef undef) #2 ret void } declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1 declare i32 @outb(i8 noundef zeroext, i64 noundef) local_unnamed_addr #1 declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"pd6729_socket", !8, i64 0, !11, i64 8} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!"long", !9, i64 0} !12 = !{!7, !11, i64 8}
linux_drivers_pcmcia_extr_pd6729.c_indirect_write
; ModuleID = 'AnghaBench/linux/net/decnet/extr_dn_table.c_dn_rtmsg_fib.c' source_filename = "AnghaBench/linux/net/decnet/extr_dn_table.c_dn_rtmsg_fib.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" %struct.dn_fib_node = type { i32, i32, i32 } @ENOBUFS = dso_local local_unnamed_addr global i32 0, align 4 @GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4 @EMSGSIZE = dso_local local_unnamed_addr global i32 0, align 4 @init_net = dso_local global i32 0, align 4 @RTNLGRP_DECnet_ROUTE = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @dn_rtmsg_fib], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal void @dn_rtmsg_fib(i32 noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef %4, ptr noundef readonly %5) #0 { %7 = icmp eq ptr %5, null br i1 %7, label %10, label %8 8: ; preds = %6 %9 = load i32, ptr %5, align 4, !tbaa !5 br label %10 10: ; preds = %6, %8 %11 = phi i32 [ %9, %8 ], [ 0, %6 ] %12 = load i32, ptr @ENOBUFS, align 4, !tbaa !10 %13 = tail call i32 @DN_FIB_INFO(ptr noundef %1) #2 %14 = tail call i32 @dn_fib_nlmsg_size(i32 noundef %13) #2 %15 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !10 %16 = tail call ptr @nlmsg_new(i32 noundef %14, i32 noundef %15) #2 %17 = icmp eq ptr %16, null br i1 %17, label %38, label %18 18: ; preds = %10 %19 = load i32, ptr %4, align 4, !tbaa !11 %20 = getelementptr inbounds %struct.dn_fib_node, ptr %1, i64 0, i32 2 %21 = load i32, ptr %20, align 4, !tbaa !13 %22 = getelementptr inbounds %struct.dn_fib_node, ptr %1, i64 0, i32 1 %23 = load i32, ptr %22, align 4, !tbaa !15 %24 = tail call i32 @DN_FIB_INFO(ptr noundef %1) #2 %25 = tail call i32 @dn_fib_dump_info(ptr noundef nonnull %16, i32 noundef %11, i32 noundef %19, i32 noundef %0, i32 noundef %3, i32 noundef %21, i32 noundef %23, ptr noundef %1, i32 noundef %2, i32 noundef %24, i32 noundef 0) #2 %26 = icmp slt i32 %25, 0 br i1 %26, label %27, label %34 27: ; preds = %18 %28 = load i32, ptr @EMSGSIZE, align 4, !tbaa !10 %29 = sub nsw i32 0, %28 %30 = icmp eq i32 %25, %29 %31 = zext i1 %30 to i32 %32 = tail call i32 @WARN_ON(i32 noundef %31) #2 %33 = tail call i32 @kfree_skb(ptr noundef nonnull %16) #2 br label %41 34: ; preds = %18 %35 = load i32, ptr @RTNLGRP_DECnet_ROUTE, align 4, !tbaa !10 %36 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !10 %37 = tail call i32 @rtnl_notify(ptr noundef nonnull %16, ptr noundef nonnull @init_net, i32 noundef %11, i32 noundef %35, ptr noundef nonnull %4, i32 noundef %36) #2 br label %45 38: ; preds = %10 %39 = sub nsw i32 0, %12 %40 = icmp sgt i32 %12, 0 br i1 %40, label %41, label %45 41: ; preds = %27, %38 %42 = phi i32 [ %25, %27 ], [ %39, %38 ] %43 = load i32, ptr @RTNLGRP_DECnet_ROUTE, align 4, !tbaa !10 %44 = tail call i32 @rtnl_set_sk_err(ptr noundef nonnull @init_net, i32 noundef %43, i32 noundef %42) #2 br label %45 45: ; preds = %38, %41, %34 ret void } declare ptr @nlmsg_new(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dn_fib_nlmsg_size(i32 noundef) local_unnamed_addr #1 declare i32 @DN_FIB_INFO(ptr noundef) local_unnamed_addr #1 declare i32 @dn_fib_dump_info(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1 declare i32 @kfree_skb(ptr noundef) local_unnamed_addr #1 declare i32 @rtnl_notify(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @rtnl_set_sk_err(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !7, i64 0} !6 = !{!"netlink_skb_parms", !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"} !10 = !{!7, !7, i64 0} !11 = !{!12, !7, i64 0} !12 = !{!"nlmsghdr", !7, i64 0} !13 = !{!14, !7, i64 8} !14 = !{!"dn_fib_node", !7, i64 0, !7, i64 4, !7, i64 8} !15 = !{!14, !7, i64 4}
; ModuleID = 'AnghaBench/linux/net/decnet/extr_dn_table.c_dn_rtmsg_fib.c' source_filename = "AnghaBench/linux/net/decnet/extr_dn_table.c_dn_rtmsg_fib.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @ENOBUFS = common local_unnamed_addr global i32 0, align 4 @GFP_KERNEL = common local_unnamed_addr global i32 0, align 4 @EMSGSIZE = common local_unnamed_addr global i32 0, align 4 @init_net = common global i32 0, align 4 @RTNLGRP_DECnet_ROUTE = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @dn_rtmsg_fib], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal void @dn_rtmsg_fib(i32 noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, ptr noundef %4, ptr noundef readonly %5) #0 { %7 = icmp eq ptr %5, null br i1 %7, label %10, label %8 8: ; preds = %6 %9 = load i32, ptr %5, align 4, !tbaa !6 br label %10 10: ; preds = %6, %8 %11 = phi i32 [ %9, %8 ], [ 0, %6 ] %12 = load i32, ptr @ENOBUFS, align 4, !tbaa !11 %13 = tail call i32 @DN_FIB_INFO(ptr noundef %1) #2 %14 = tail call i32 @dn_fib_nlmsg_size(i32 noundef %13) #2 %15 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !11 %16 = tail call ptr @nlmsg_new(i32 noundef %14, i32 noundef %15) #2 %17 = icmp eq ptr %16, null br i1 %17, label %38, label %18 18: ; preds = %10 %19 = load i32, ptr %4, align 4, !tbaa !12 %20 = getelementptr inbounds i8, ptr %1, i64 8 %21 = load i32, ptr %20, align 4, !tbaa !14 %22 = getelementptr inbounds i8, ptr %1, i64 4 %23 = load i32, ptr %22, align 4, !tbaa !16 %24 = tail call i32 @DN_FIB_INFO(ptr noundef %1) #2 %25 = tail call i32 @dn_fib_dump_info(ptr noundef nonnull %16, i32 noundef %11, i32 noundef %19, i32 noundef %0, i32 noundef %3, i32 noundef %21, i32 noundef %23, ptr noundef %1, i32 noundef %2, i32 noundef %24, i32 noundef 0) #2 %26 = icmp slt i32 %25, 0 br i1 %26, label %27, label %34 27: ; preds = %18 %28 = load i32, ptr @EMSGSIZE, align 4, !tbaa !11 %29 = sub nsw i32 0, %28 %30 = icmp eq i32 %25, %29 %31 = zext i1 %30 to i32 %32 = tail call i32 @WARN_ON(i32 noundef %31) #2 %33 = tail call i32 @kfree_skb(ptr noundef nonnull %16) #2 br label %41 34: ; preds = %18 %35 = load i32, ptr @RTNLGRP_DECnet_ROUTE, align 4, !tbaa !11 %36 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !11 %37 = tail call i32 @rtnl_notify(ptr noundef nonnull %16, ptr noundef nonnull @init_net, i32 noundef %11, i32 noundef %35, ptr noundef nonnull %4, i32 noundef %36) #2 br label %45 38: ; preds = %10 %39 = sub nsw i32 0, %12 %40 = icmp sgt i32 %12, 0 br i1 %40, label %41, label %45 41: ; preds = %27, %38 %42 = phi i32 [ %25, %27 ], [ %39, %38 ] %43 = load i32, ptr @RTNLGRP_DECnet_ROUTE, align 4, !tbaa !11 %44 = tail call i32 @rtnl_set_sk_err(ptr noundef nonnull @init_net, i32 noundef %43, i32 noundef %42) #2 br label %45 45: ; preds = %38, %41, %34 ret void } declare ptr @nlmsg_new(i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @dn_fib_nlmsg_size(i32 noundef) local_unnamed_addr #1 declare i32 @DN_FIB_INFO(ptr noundef) local_unnamed_addr #1 declare i32 @dn_fib_dump_info(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 declare i32 @WARN_ON(i32 noundef) local_unnamed_addr #1 declare i32 @kfree_skb(ptr noundef) local_unnamed_addr #1 declare i32 @rtnl_notify(ptr noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1 declare i32 @rtnl_set_sk_err(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !8, i64 0} !7 = !{!"netlink_skb_parms", !8, i64 0} !8 = !{!"int", !9, i64 0} !9 = !{!"omnipotent char", !10, i64 0} !10 = !{!"Simple C/C++ TBAA"} !11 = !{!8, !8, i64 0} !12 = !{!13, !8, i64 0} !13 = !{!"nlmsghdr", !8, i64 0} !14 = !{!15, !8, i64 8} !15 = !{!"dn_fib_node", !8, i64 0, !8, i64 4, !8, i64 8} !16 = !{!15, !8, i64 4}
linux_net_decnet_extr_dn_table.c_dn_rtmsg_fib
; ModuleID = 'AnghaBench/systemd/src/udev/extr_udev-builtin.c_udev_builtin_add_property.c' source_filename = "AnghaBench/systemd/src/udev/extr_udev-builtin.c_udev_builtin_add_property.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @.str = private unnamed_addr constant [32 x i8] c"Failed to add property '%s%s%s'\00", align 1 @.str.1 = private unnamed_addr constant [2 x i8] c"=\00", align 1 @.str.2 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1 @.str.3 = private unnamed_addr constant [7 x i8] c"%s=%s\0A\00", align 1 ; Function Attrs: nounwind uwtable define dso_local i32 @udev_builtin_add_property(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 { %5 = tail call i32 @assert(ptr noundef %0) #2 %6 = tail call i32 @assert(ptr noundef %2) #2 %7 = tail call i32 @device_add_property(ptr noundef %0, ptr noundef %2, ptr noundef %3) #2 %8 = icmp slt i32 %7, 0 br i1 %8, label %9, label %14 9: ; preds = %4 %10 = icmp eq ptr %3, null %11 = select i1 %10, ptr @.str.2, ptr @.str.1 %12 = tail call ptr @strempty(ptr noundef %3) #2 %13 = tail call i32 @log_device_debug_errno(ptr noundef %0, i32 noundef %7, ptr noundef nonnull @.str, ptr noundef %2, ptr noundef nonnull %11, ptr noundef %12) #2 br label %19 14: ; preds = %4 %15 = icmp eq i32 %1, 0 br i1 %15, label %19, label %16 16: ; preds = %14 %17 = tail call ptr @strempty(ptr noundef %3) #2 %18 = tail call i32 @printf(ptr noundef nonnull @.str.3, ptr noundef %2, ptr noundef %17) #2 br label %19 19: ; preds = %14, %16, %9 %20 = phi i32 [ %13, %9 ], [ 0, %16 ], [ 0, %14 ] ret i32 %20 } declare i32 @assert(ptr noundef) local_unnamed_addr #1 declare i32 @device_add_property(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @log_device_debug_errno(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @strempty(ptr noundef) local_unnamed_addr #1 declare i32 @printf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
; ModuleID = 'AnghaBench/systemd/src/udev/extr_udev-builtin.c_udev_builtin_add_property.c' source_filename = "AnghaBench/systemd/src/udev/extr_udev-builtin.c_udev_builtin_add_property.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @.str = private unnamed_addr constant [32 x i8] c"Failed to add property '%s%s%s'\00", align 1 @.str.1 = private unnamed_addr constant [2 x i8] c"=\00", align 1 @.str.2 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1 @.str.3 = private unnamed_addr constant [7 x i8] c"%s=%s\0A\00", align 1 ; Function Attrs: nounwind ssp uwtable(sync) define i32 @udev_builtin_add_property(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 { %5 = tail call i32 @assert(ptr noundef %0) #2 %6 = tail call i32 @assert(ptr noundef %2) #2 %7 = tail call i32 @device_add_property(ptr noundef %0, ptr noundef %2, ptr noundef %3) #2 %8 = icmp slt i32 %7, 0 br i1 %8, label %9, label %14 9: ; preds = %4 %10 = icmp eq ptr %3, null %11 = select i1 %10, ptr @.str.2, ptr @.str.1 %12 = tail call ptr @strempty(ptr noundef %3) #2 %13 = tail call i32 @log_device_debug_errno(ptr noundef %0, i32 noundef %7, ptr noundef nonnull @.str, ptr noundef %2, ptr noundef nonnull %11, ptr noundef %12) #2 br label %19 14: ; preds = %4 %15 = icmp eq i32 %1, 0 br i1 %15, label %19, label %16 16: ; preds = %14 %17 = tail call ptr @strempty(ptr noundef %3) #2 %18 = tail call i32 @printf(ptr noundef nonnull @.str.3, ptr noundef %2, ptr noundef %17) #2 br label %19 19: ; preds = %14, %16, %9 %20 = phi i32 [ %13, %9 ], [ 0, %16 ], [ 0, %14 ] ret i32 %20 } declare i32 @assert(ptr noundef) local_unnamed_addr #1 declare i32 @device_add_property(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare i32 @log_device_debug_errno(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 declare ptr @strempty(ptr noundef) local_unnamed_addr #1 declare i32 @printf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
systemd_src_udev_extr_udev-builtin.c_udev_builtin_add_property
; ModuleID = 'AnghaBench/git/builtin/extr_clean.c_help_cmd.c' source_filename = "AnghaBench/git/builtin/extr_clean.c_help_cmd.c" target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128" target triple = "x86_64-unknown-linux-gnu" @CLEAN_COLOR_HELP = dso_local local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [324 x i8] c"clean - start cleaning\0Afilter by pattern - exclude items from deletion\0Aselect by numbers - select items to be deleted by numbers\0Aask each - confirm each deletion (like \22rm -i\22)\0Aquit - stop cleaning\0Ahelp - this screen\0A? - help for prompt selection\00", align 1 @CLEAN_COLOR_RESET = dso_local local_unnamed_addr global i32 0, align 4 @llvm.compiler.used = appending global [1 x ptr] [ptr @help_cmd], section "llvm.metadata" ; Function Attrs: nounwind uwtable define internal noundef i32 @help_cmd() #0 { %1 = load i32, ptr @CLEAN_COLOR_HELP, align 4, !tbaa !5 %2 = tail call i32 @clean_print_color(i32 noundef %1) #2 %3 = tail call i32 @_(ptr noundef nonnull @.str) #2 %4 = tail call i32 @printf_ln(i32 noundef %3) #2 %5 = load i32, ptr @CLEAN_COLOR_RESET, align 4, !tbaa !5 %6 = tail call i32 @clean_print_color(i32 noundef %5) #2 ret i32 0 } declare i32 @clean_print_color(i32 noundef) local_unnamed_addr #1 declare i32 @printf_ln(i32 noundef) local_unnamed_addr #1 declare i32 @_(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3} !llvm.ident = !{!4} !0 = !{i32 1, !"wchar_size", i32 4} !1 = !{i32 8, !"PIC Level", i32 2} !2 = !{i32 7, !"PIE Level", i32 2} !3 = !{i32 7, !"uwtable", i32 2} !4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"} !5 = !{!6, !6, i64 0} !6 = !{!"int", !7, i64 0} !7 = !{!"omnipotent char", !8, i64 0} !8 = !{!"Simple C/C++ TBAA"}
; ModuleID = 'AnghaBench/git/builtin/extr_clean.c_help_cmd.c' source_filename = "AnghaBench/git/builtin/extr_clean.c_help_cmd.c" target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32" target triple = "arm64-apple-macosx15.0.0" @CLEAN_COLOR_HELP = common local_unnamed_addr global i32 0, align 4 @.str = private unnamed_addr constant [324 x i8] c"clean - start cleaning\0Afilter by pattern - exclude items from deletion\0Aselect by numbers - select items to be deleted by numbers\0Aask each - confirm each deletion (like \22rm -i\22)\0Aquit - stop cleaning\0Ahelp - this screen\0A? - help for prompt selection\00", align 1 @CLEAN_COLOR_RESET = common local_unnamed_addr global i32 0, align 4 @llvm.used = appending global [1 x ptr] [ptr @help_cmd], section "llvm.metadata" ; Function Attrs: nounwind ssp uwtable(sync) define internal noundef i32 @help_cmd() #0 { %1 = load i32, ptr @CLEAN_COLOR_HELP, align 4, !tbaa !6 %2 = tail call i32 @clean_print_color(i32 noundef %1) #2 %3 = tail call i32 @_(ptr noundef nonnull @.str) #2 %4 = tail call i32 @printf_ln(i32 noundef %3) #2 %5 = load i32, ptr @CLEAN_COLOR_RESET, align 4, !tbaa !6 %6 = tail call i32 @clean_print_color(i32 noundef %5) #2 ret i32 0 } declare i32 @clean_print_color(i32 noundef) local_unnamed_addr #1 declare i32 @printf_ln(i32 noundef) local_unnamed_addr #1 declare i32 @_(ptr noundef) local_unnamed_addr #1 attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" } attributes #2 = { nounwind } !llvm.module.flags = !{!0, !1, !2, !3, !4} !llvm.ident = !{!5} !0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]} !1 = !{i32 1, !"wchar_size", i32 4} !2 = !{i32 8, !"PIC Level", i32 2} !3 = !{i32 7, !"uwtable", i32 1} !4 = !{i32 7, !"frame-pointer", i32 1} !5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"} !6 = !{!7, !7, i64 0} !7 = !{!"int", !8, i64 0} !8 = !{!"omnipotent char", !9, i64 0} !9 = !{!"Simple C/C++ TBAA"}
git_builtin_extr_clean.c_help_cmd