IR_x86 string | IR_arm string | filename string |
|---|---|---|
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mach-pxa/extr_clock.c_clk_cken_enable.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mach-pxa/extr_clock.c_clk_cken_enable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@CKEN = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: read, inaccessiblemem: none) uwtable
define dso_local void @clk_cken_enable(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = shl nuw i32 1, %2
%4 = load i32, ptr @CKEN, align 4, !tbaa !10
%5 = or i32 %4, %3
store i32 %5, ptr @CKEN, align 4, !tbaa !10
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"clk", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mach-pxa/extr_clock.c_clk_cken_enable.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mach-pxa/extr_clock.c_clk_cken_enable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CKEN = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: read, inaccessiblemem: none) uwtable(sync)
define void @clk_cken_enable(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = shl nuw i32 1, %2
%4 = load i32, ptr @CKEN, align 4, !tbaa !11
%5 = or i32 %4, %3
store i32 %5, ptr @CKEN, align 4, !tbaa !11
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"clk", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| fastsocket_kernel_arch_arm_mach-pxa_extr_clock.c_clk_cken_enable |
; ModuleID = 'AnghaBench/linux/drivers/s390/char/extr_con3215.c_tty3215_write_room.c'
source_filename = "AnghaBench/linux/drivers/s390/char/extr_con3215.c_tty3215_write_room.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@RAW3215_BUFFER_SIZE = dso_local local_unnamed_addr global i64 0, align 8
@TAB_STOP_SIZE = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @tty3215_write_room], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define internal i32 @tty3215_write_room(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = inttoptr i64 %2 to ptr
%4 = load i64, ptr @RAW3215_BUFFER_SIZE, align 8, !tbaa !10
%5 = load i64, ptr %3, align 8, !tbaa !11
%6 = load i64, ptr @TAB_STOP_SIZE, align 8, !tbaa !10
%7 = add i64 %5, %6
%8 = sub i64 %4, %7
%9 = icmp sgt i64 %8, -1
%10 = trunc i64 %8 to i32
%11 = select i1 %9, i32 %10, i32 0
ret i32 %11
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"tty_struct", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"raw3215_info", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/s390/char/extr_con3215.c_tty3215_write_room.c'
source_filename = "AnghaBench/linux/drivers/s390/char/extr_con3215.c_tty3215_write_room.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RAW3215_BUFFER_SIZE = common local_unnamed_addr global i64 0, align 8
@TAB_STOP_SIZE = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @tty3215_write_room], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define internal i32 @tty3215_write_room(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = inttoptr i64 %2 to ptr
%4 = load i64, ptr @RAW3215_BUFFER_SIZE, align 8, !tbaa !11
%5 = load i64, ptr %3, align 8, !tbaa !12
%6 = load i64, ptr @TAB_STOP_SIZE, align 8, !tbaa !11
%7 = add i64 %5, %6
%8 = sub i64 %4, %7
%9 = icmp sgt i64 %8, -1
%10 = trunc i64 %8 to i32
%11 = select i1 %9, i32 %10, i32 0
ret i32 %11
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"tty_struct", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"raw3215_info", !8, i64 0}
| linux_drivers_s390_char_extr_con3215.c_tty3215_write_room |
; ModuleID = 'AnghaBench/linux/arch/arm/mach-omap2/extr_powerdomains3xxx_data.c_ti81xx_pwrdm_set_next_pwrst.c'
source_filename = "AnghaBench/linux/arch/arm/mach-omap2/extr_powerdomains3xxx_data.c_ti81xx_pwrdm_set_next_pwrst.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@OMAP_POWERSTATE_MASK = dso_local local_unnamed_addr global i32 0, align 4
@OMAP_POWERSTATE_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@TI81XX_PM_PWSTCTRL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ti81xx_pwrdm_set_next_pwrst], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @ti81xx_pwrdm_set_next_pwrst(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i32, ptr @OMAP_POWERSTATE_MASK, align 4, !tbaa !5
%4 = load i32, ptr @OMAP_POWERSTATE_SHIFT, align 4, !tbaa !5
%5 = shl i32 %1, %4
%6 = load i32, ptr %0, align 4, !tbaa !9
%7 = load i32, ptr @TI81XX_PM_PWSTCTRL, align 4, !tbaa !5
%8 = tail call i32 @omap2_prm_rmw_mod_reg_bits(i32 noundef %3, i32 noundef %5, i32 noundef %6, i32 noundef %7) #2
ret i32 0
}
declare i32 @omap2_prm_rmw_mod_reg_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"powerdomain", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/arch/arm/mach-omap2/extr_powerdomains3xxx_data.c_ti81xx_pwrdm_set_next_pwrst.c'
source_filename = "AnghaBench/linux/arch/arm/mach-omap2/extr_powerdomains3xxx_data.c_ti81xx_pwrdm_set_next_pwrst.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@OMAP_POWERSTATE_MASK = common local_unnamed_addr global i32 0, align 4
@OMAP_POWERSTATE_SHIFT = common local_unnamed_addr global i32 0, align 4
@TI81XX_PM_PWSTCTRL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ti81xx_pwrdm_set_next_pwrst], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @ti81xx_pwrdm_set_next_pwrst(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i32, ptr @OMAP_POWERSTATE_MASK, align 4, !tbaa !6
%4 = load i32, ptr @OMAP_POWERSTATE_SHIFT, align 4, !tbaa !6
%5 = shl i32 %1, %4
%6 = load i32, ptr %0, align 4, !tbaa !10
%7 = load i32, ptr @TI81XX_PM_PWSTCTRL, align 4, !tbaa !6
%8 = tail call i32 @omap2_prm_rmw_mod_reg_bits(i32 noundef %3, i32 noundef %5, i32 noundef %6, i32 noundef %7) #2
ret i32 0
}
declare i32 @omap2_prm_rmw_mod_reg_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"powerdomain", !7, i64 0}
| linux_arch_arm_mach-omap2_extr_powerdomains3xxx_data.c_ti81xx_pwrdm_set_next_pwrst |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/message/i2o/extr_debug.c_i2o_report_util_cmd.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/message/i2o/extr_debug.c_i2o_report_util_cmd.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [11 x i8] c"UTIL_NOP, \00", align 1
@.str.1 = private unnamed_addr constant [13 x i8] c"UTIL_ABORT, \00", align 1
@.str.2 = private unnamed_addr constant [13 x i8] c"UTIL_CLAIM, \00", align 1
@.str.3 = private unnamed_addr constant [21 x i8] c"UTIL_CLAIM_RELEASE, \00", align 1
@.str.4 = private unnamed_addr constant [21 x i8] c"UTIL_CONFIG_DIALOG, \00", align 1
@.str.5 = private unnamed_addr constant [22 x i8] c"UTIL_DEVICE_RESERVE, \00", align 1
@.str.6 = private unnamed_addr constant [22 x i8] c"UTIL_DEVICE_RELEASE, \00", align 1
@.str.7 = private unnamed_addr constant [25 x i8] c"UTIL_EVENT_ACKNOWLEDGE, \00", align 1
@.str.8 = private unnamed_addr constant [22 x i8] c"UTIL_EVENT_REGISTER, \00", align 1
@.str.9 = private unnamed_addr constant [12 x i8] c"UTIL_LOCK, \00", align 1
@.str.10 = private unnamed_addr constant [20 x i8] c"UTIL_LOCK_RELEASE, \00", align 1
@.str.11 = private unnamed_addr constant [18 x i8] c"UTIL_PARAMS_GET, \00", align 1
@.str.12 = private unnamed_addr constant [18 x i8] c"UTIL_PARAMS_SET, \00", align 1
@.str.13 = private unnamed_addr constant [26 x i8] c"UTIL_REPLY_FAULT_NOTIFY, \00", align 1
@.str.14 = private unnamed_addr constant [14 x i8] c"Cmd = %0#2x, \00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @i2o_report_util_cmd], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @i2o_report_util_cmd(i32 noundef %0) #0 {
switch i32 %0, label %30 [
i32 132, label %2
i32 141, label %4
i32 140, label %6
i32 129, label %8
i32 139, label %10
i32 137, label %12
i32 138, label %14
i32 136, label %16
i32 135, label %18
i32 134, label %20
i32 133, label %22
i32 131, label %24
i32 130, label %26
i32 128, label %28
]
2: ; preds = %1
%3 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str) #2
br label %32
4: ; preds = %1
%5 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.1) #2
br label %32
6: ; preds = %1
%7 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.2) #2
br label %32
8: ; preds = %1
%9 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.3) #2
br label %32
10: ; preds = %1
%11 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.4) #2
br label %32
12: ; preds = %1
%13 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.5) #2
br label %32
14: ; preds = %1
%15 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.6) #2
br label %32
16: ; preds = %1
%17 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.7) #2
br label %32
18: ; preds = %1
%19 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.8) #2
br label %32
20: ; preds = %1
%21 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.9) #2
br label %32
22: ; preds = %1
%23 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.10) #2
br label %32
24: ; preds = %1
%25 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.11) #2
br label %32
26: ; preds = %1
%27 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.12) #2
br label %32
28: ; preds = %1
%29 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.13) #2
br label %32
30: ; preds = %1
%31 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.14, i32 noundef %0) #2
br label %32
32: ; preds = %30, %28, %26, %24, %22, %20, %18, %16, %14, %12, %10, %8, %6, %4, %2
ret void
}
declare i32 @printk(ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/message/i2o/extr_debug.c_i2o_report_util_cmd.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/message/i2o/extr_debug.c_i2o_report_util_cmd.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [11 x i8] c"UTIL_NOP, \00", align 1
@.str.1 = private unnamed_addr constant [13 x i8] c"UTIL_ABORT, \00", align 1
@.str.2 = private unnamed_addr constant [13 x i8] c"UTIL_CLAIM, \00", align 1
@.str.3 = private unnamed_addr constant [21 x i8] c"UTIL_CLAIM_RELEASE, \00", align 1
@.str.4 = private unnamed_addr constant [21 x i8] c"UTIL_CONFIG_DIALOG, \00", align 1
@.str.5 = private unnamed_addr constant [22 x i8] c"UTIL_DEVICE_RESERVE, \00", align 1
@.str.6 = private unnamed_addr constant [22 x i8] c"UTIL_DEVICE_RELEASE, \00", align 1
@.str.7 = private unnamed_addr constant [25 x i8] c"UTIL_EVENT_ACKNOWLEDGE, \00", align 1
@.str.8 = private unnamed_addr constant [22 x i8] c"UTIL_EVENT_REGISTER, \00", align 1
@.str.9 = private unnamed_addr constant [12 x i8] c"UTIL_LOCK, \00", align 1
@.str.10 = private unnamed_addr constant [20 x i8] c"UTIL_LOCK_RELEASE, \00", align 1
@.str.11 = private unnamed_addr constant [18 x i8] c"UTIL_PARAMS_GET, \00", align 1
@.str.12 = private unnamed_addr constant [18 x i8] c"UTIL_PARAMS_SET, \00", align 1
@.str.13 = private unnamed_addr constant [26 x i8] c"UTIL_REPLY_FAULT_NOTIFY, \00", align 1
@.str.14 = private unnamed_addr constant [14 x i8] c"Cmd = %0#2x, \00", align 1
@llvm.used = appending global [1 x ptr] [ptr @i2o_report_util_cmd], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @i2o_report_util_cmd(i32 noundef %0) #0 {
switch i32 %0, label %30 [
i32 132, label %2
i32 141, label %4
i32 140, label %6
i32 129, label %8
i32 139, label %10
i32 137, label %12
i32 138, label %14
i32 136, label %16
i32 135, label %18
i32 134, label %20
i32 133, label %22
i32 131, label %24
i32 130, label %26
i32 128, label %28
]
2: ; preds = %1
%3 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str) #2
br label %32
4: ; preds = %1
%5 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.1) #2
br label %32
6: ; preds = %1
%7 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.2) #2
br label %32
8: ; preds = %1
%9 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.3) #2
br label %32
10: ; preds = %1
%11 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.4) #2
br label %32
12: ; preds = %1
%13 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.5) #2
br label %32
14: ; preds = %1
%15 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.6) #2
br label %32
16: ; preds = %1
%17 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.7) #2
br label %32
18: ; preds = %1
%19 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.8) #2
br label %32
20: ; preds = %1
%21 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.9) #2
br label %32
22: ; preds = %1
%23 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.10) #2
br label %32
24: ; preds = %1
%25 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.11) #2
br label %32
26: ; preds = %1
%27 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.12) #2
br label %32
28: ; preds = %1
%29 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.13) #2
br label %32
30: ; preds = %1
%31 = tail call i32 (ptr, ...) @printk(ptr noundef nonnull @.str.14, i32 noundef %0) #2
br label %32
32: ; preds = %30, %28, %26, %24, %22, %20, %18, %16, %14, %12, %10, %8, %6, %4, %2
ret void
}
declare i32 @printk(ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_message_i2o_extr_debug.c_i2o_report_util_cmd |
; ModuleID = 'AnghaBench/linux/arch/ia64/kernel/extr_process.c_dump_fpu.c'
source_filename = "AnghaBench/linux/arch/ia64/kernel/extr_process.c_dump_fpu.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@do_dump_fpu = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @dump_fpu(ptr nocapture noundef readnone %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @do_dump_fpu, align 4, !tbaa !5
%4 = tail call i32 @unw_init_running(i32 noundef %3, i32 noundef %1) #2
ret i32 1
}
declare i32 @unw_init_running(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/arch/ia64/kernel/extr_process.c_dump_fpu.c'
source_filename = "AnghaBench/linux/arch/ia64/kernel/extr_process.c_dump_fpu.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@do_dump_fpu = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @dump_fpu(ptr nocapture noundef readnone %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @do_dump_fpu, align 4, !tbaa !6
%4 = tail call i32 @unw_init_running(i32 noundef %3, i32 noundef %1) #2
ret i32 1
}
declare i32 @unw_init_running(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_arch_ia64_kernel_extr_process.c_dump_fpu |
; ModuleID = 'AnghaBench/linux/sound/pci/au88x0/extr_au88x0_eq.c_vortex_EqHw_SetA3DBypassGain.c'
source_filename = "AnghaBench/linux/sound/pci/au88x0/extr_au88x0_eq.c_vortex_EqHw_SetA3DBypassGain.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @vortex_EqHw_SetA3DBypassGain], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @vortex_EqHw_SetA3DBypassGain(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr %0, align 4, !tbaa !5
%5 = tail call i32 @hwwrite(i32 noundef %4, i32 noundef 177120, i32 noundef %1) #2
%6 = load i32, ptr %0, align 4, !tbaa !5
%7 = tail call i32 @hwwrite(i32 noundef %6, i32 noundef 177144, i32 noundef %2) #2
ret void
}
declare i32 @hwwrite(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/sound/pci/au88x0/extr_au88x0_eq.c_vortex_EqHw_SetA3DBypassGain.c'
source_filename = "AnghaBench/linux/sound/pci/au88x0/extr_au88x0_eq.c_vortex_EqHw_SetA3DBypassGain.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @vortex_EqHw_SetA3DBypassGain], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @vortex_EqHw_SetA3DBypassGain(ptr nocapture noundef readonly %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr %0, align 4, !tbaa !6
%5 = tail call i32 @hwwrite(i32 noundef %4, i32 noundef 177120, i32 noundef %1) #2
%6 = load i32, ptr %0, align 4, !tbaa !6
%7 = tail call i32 @hwwrite(i32 noundef %6, i32 noundef 177144, i32 noundef %2) #2
ret void
}
declare i32 @hwwrite(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_sound_pci_au88x0_extr_au88x0_eq.c_vortex_EqHw_SetA3DBypassGain |
; ModuleID = 'AnghaBench/linux/drivers/scsi/qla2xxx/extr_qla_target.c_qlt_chk_unresolv_exchg.c'
source_filename = "AnghaBench/linux/drivers/scsi/qla2xxx/extr_qla_target.c_qlt_chk_unresolv_exchg.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.scsi_qla_host = type { i32, ptr }
%struct.qla_qpair = type { i64, i64, i32 }
%struct.qla_hw_data = type { ptr, ptr }
@jiffies = dso_local local_unnamed_addr global i64 0, align 8
@EIO = dso_local local_unnamed_addr global i32 0, align 4
@ql_log_warn = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [48 x i8] c"Unable to send ABTS Respond. Dumping firmware.\0A\00", align 1
@ql_dbg_tgt_mgt = dso_local local_unnamed_addr global i64 0, align 8
@ql_dbg_buffer = dso_local local_unnamed_addr global i64 0, align 8
@ISP_ABORT_NEEDED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @qlt_chk_unresolv_exchg], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @qlt_chk_unresolv_exchg(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds %struct.scsi_qla_host, ptr %0, i64 0, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = load i64, ptr %1, align 8, !tbaa !11
%7 = load i64, ptr %2, align 8, !tbaa !14
%8 = icmp eq i64 %6, %7
%9 = getelementptr inbounds %struct.qla_qpair, ptr %1, i64 0, i32 1
%10 = load i64, ptr %9, align 8, !tbaa !16
%11 = load i64, ptr @jiffies, align 8, !tbaa !17
%12 = icmp eq i64 %10, %11
%13 = select i1 %8, i1 %12, i1 false
br i1 %13, label %14, label %37
14: ; preds = %3
%15 = getelementptr inbounds %struct.qla_qpair, ptr %1, i64 0, i32 2
%16 = load i32, ptr %15, align 8, !tbaa !18
%17 = add nsw i32 %16, 1
store i32 %17, ptr %15, align 8, !tbaa !18
%18 = icmp sgt i32 %16, 3
br i1 %18, label %19, label %43
19: ; preds = %14
%20 = load i32, ptr @EIO, align 4, !tbaa !19
store i32 0, ptr %15, align 8, !tbaa !18
%21 = load i32, ptr @ql_log_warn, align 4, !tbaa !19
%22 = tail call i32 @ql_log(i32 noundef %21, ptr noundef nonnull %0, i32 noundef 65535, ptr noundef nonnull @.str) #2
%23 = load i64, ptr @ql_dbg_tgt_mgt, align 8, !tbaa !17
%24 = load i64, ptr @ql_dbg_buffer, align 8, !tbaa !17
%25 = add nsw i64 %24, %23
%26 = tail call i32 @ql_dump_buffer(i64 noundef %25, ptr noundef nonnull %0, i32 noundef 65535, ptr noundef nonnull %2, i32 noundef 8) #2
%27 = getelementptr inbounds %struct.qla_hw_data, ptr %5, i64 0, i32 1
%28 = load ptr, ptr %27, align 8, !tbaa !20
%29 = icmp eq ptr %28, %1
%30 = load ptr, ptr %5, align 8, !tbaa !22
%31 = load ptr, ptr %30, align 8, !tbaa !23
%32 = zext i1 %29 to i32
%33 = tail call i32 %31(ptr noundef nonnull %0, i32 noundef %32) #2
%34 = load i32, ptr @ISP_ABORT_NEEDED, align 4, !tbaa !19
%35 = tail call i32 @set_bit(i32 noundef %34, ptr noundef nonnull %0) #2
%36 = tail call i32 @qla2xxx_wake_dpc(ptr noundef nonnull %0) #2
br label %43
37: ; preds = %3
%38 = icmp eq i64 %10, %11
br i1 %38, label %43, label %39
39: ; preds = %37
%40 = getelementptr inbounds %struct.qla_qpair, ptr %1, i64 0, i32 1
store i64 %7, ptr %1, align 8, !tbaa !11
%41 = getelementptr inbounds %struct.qla_qpair, ptr %1, i64 0, i32 2
store i32 0, ptr %41, align 8, !tbaa !18
%42 = load i64, ptr @jiffies, align 8, !tbaa !17
store i64 %42, ptr %40, align 8, !tbaa !16
br label %43
43: ; preds = %37, %39, %14, %19
%44 = phi i32 [ %20, %19 ], [ 0, %14 ], [ 0, %39 ], [ 0, %37 ]
ret i32 %44
}
declare i32 @ql_log(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ql_dump_buffer(i64 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qla2xxx_wake_dpc(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"scsi_qla_host", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"qla_qpair", !13, i64 0, !13, i64 8, !7, i64 16}
!13 = !{!"long", !8, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"abts_resp_from_24xx_fw", !13, i64 0}
!16 = !{!12, !13, i64 8}
!17 = !{!13, !13, i64 0}
!18 = !{!12, !7, i64 16}
!19 = !{!7, !7, i64 0}
!20 = !{!21, !10, i64 8}
!21 = !{!"qla_hw_data", !10, i64 0, !10, i64 8}
!22 = !{!21, !10, i64 0}
!23 = !{!24, !10, i64 0}
!24 = !{!"TYPE_2__", !10, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/qla2xxx/extr_qla_target.c_qlt_chk_unresolv_exchg.c'
source_filename = "AnghaBench/linux/drivers/scsi/qla2xxx/extr_qla_target.c_qlt_chk_unresolv_exchg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@jiffies = common local_unnamed_addr global i64 0, align 8
@EIO = common local_unnamed_addr global i32 0, align 4
@ql_log_warn = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [48 x i8] c"Unable to send ABTS Respond. Dumping firmware.\0A\00", align 1
@ql_dbg_tgt_mgt = common local_unnamed_addr global i64 0, align 8
@ql_dbg_buffer = common local_unnamed_addr global i64 0, align 8
@ISP_ABORT_NEEDED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @qlt_chk_unresolv_exchg], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @qlt_chk_unresolv_exchg(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = load i64, ptr %1, align 8, !tbaa !12
%7 = load i64, ptr %2, align 8, !tbaa !15
%8 = icmp eq i64 %6, %7
%9 = getelementptr inbounds i8, ptr %1, i64 8
%10 = load i64, ptr %9, align 8, !tbaa !17
%11 = load i64, ptr @jiffies, align 8, !tbaa !18
%12 = icmp eq i64 %10, %11
%13 = select i1 %8, i1 %12, i1 false
br i1 %13, label %14, label %37
14: ; preds = %3
%15 = getelementptr inbounds i8, ptr %1, i64 16
%16 = load i32, ptr %15, align 8, !tbaa !19
%17 = add nsw i32 %16, 1
store i32 %17, ptr %15, align 8, !tbaa !19
%18 = icmp sgt i32 %16, 3
br i1 %18, label %19, label %41
19: ; preds = %14
%20 = load i32, ptr @EIO, align 4, !tbaa !20
store i32 0, ptr %15, align 8, !tbaa !19
%21 = load i32, ptr @ql_log_warn, align 4, !tbaa !20
%22 = tail call i32 @ql_log(i32 noundef %21, ptr noundef nonnull %0, i32 noundef 65535, ptr noundef nonnull @.str) #2
%23 = load i64, ptr @ql_dbg_tgt_mgt, align 8, !tbaa !18
%24 = load i64, ptr @ql_dbg_buffer, align 8, !tbaa !18
%25 = add nsw i64 %24, %23
%26 = tail call i32 @ql_dump_buffer(i64 noundef %25, ptr noundef nonnull %0, i32 noundef 65535, ptr noundef nonnull %2, i32 noundef 8) #2
%27 = getelementptr inbounds i8, ptr %5, i64 8
%28 = load ptr, ptr %27, align 8, !tbaa !21
%29 = icmp eq ptr %28, %1
%30 = load ptr, ptr %5, align 8, !tbaa !23
%31 = load ptr, ptr %30, align 8, !tbaa !24
%32 = zext i1 %29 to i32
%33 = tail call i32 %31(ptr noundef nonnull %0, i32 noundef %32) #2
%34 = load i32, ptr @ISP_ABORT_NEEDED, align 4, !tbaa !20
%35 = tail call i32 @set_bit(i32 noundef %34, ptr noundef nonnull %0) #2
%36 = tail call i32 @qla2xxx_wake_dpc(ptr noundef nonnull %0) #2
br label %41
37: ; preds = %3
br i1 %12, label %41, label %38
38: ; preds = %37
store i64 %7, ptr %1, align 8, !tbaa !12
%39 = getelementptr inbounds i8, ptr %1, i64 16
store i32 0, ptr %39, align 8, !tbaa !19
%40 = load i64, ptr @jiffies, align 8, !tbaa !18
store i64 %40, ptr %9, align 8, !tbaa !17
br label %41
41: ; preds = %37, %38, %14, %19
%42 = phi i32 [ %20, %19 ], [ 0, %14 ], [ 0, %38 ], [ 0, %37 ]
ret i32 %42
}
declare i32 @ql_log(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ql_dump_buffer(i64 noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @set_bit(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @qla2xxx_wake_dpc(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"scsi_qla_host", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"qla_qpair", !14, i64 0, !14, i64 8, !8, i64 16}
!14 = !{!"long", !9, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"abts_resp_from_24xx_fw", !14, i64 0}
!17 = !{!13, !14, i64 8}
!18 = !{!14, !14, i64 0}
!19 = !{!13, !8, i64 16}
!20 = !{!8, !8, i64 0}
!21 = !{!22, !11, i64 8}
!22 = !{!"qla_hw_data", !11, i64 0, !11, i64 8}
!23 = !{!22, !11, i64 0}
!24 = !{!25, !11, i64 0}
!25 = !{!"TYPE_2__", !11, i64 0}
| linux_drivers_scsi_qla2xxx_extr_qla_target.c_qlt_chk_unresolv_exchg |
; ModuleID = 'AnghaBench/fastsocket/kernel/net/xfrm/extr_xfrm_user.c_xfrm_add_pol_expire.c'
source_filename = "AnghaBench/fastsocket/kernel/net/xfrm/extr_xfrm_user.c_xfrm_add_pol_expire.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.xfrm_mark = type { i32 }
%struct.xfrm_user_polexpire = type { i64, %struct.xfrm_userpolicy_info }
%struct.xfrm_userpolicy_info = type { i32, i32, i64 }
@XFRM_POLICY_TYPE_MAIN = dso_local local_unnamed_addr global i32 0, align 4
@ENOENT = dso_local local_unnamed_addr global i32 0, align 4
@XFRMA_SEC_CTX = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [46 x i8] c"Dont know what to do with soft policy expire\0A\00", align 1
@current = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @xfrm_add_pol_expire], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @xfrm_add_pol_expire(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = alloca i32, align 4
%5 = alloca i32, align 4
%6 = alloca %struct.xfrm_mark, align 4
%7 = alloca ptr, align 8
%8 = load i32, ptr %0, align 4, !tbaa !5
%9 = tail call ptr @sock_net(i32 noundef %8) #3
%10 = tail call ptr @nlmsg_data(ptr noundef %1) #3
%11 = getelementptr inbounds %struct.xfrm_user_polexpire, ptr %10, i64 0, i32 1
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%12 = load i32, ptr @XFRM_POLICY_TYPE_MAIN, align 4, !tbaa !10
store i32 %12, ptr %4, align 4, !tbaa !10
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
%13 = call i32 @xfrm_mark_get(ptr noundef %2, ptr noundef nonnull %6) #3
%14 = call i32 @copy_from_user_policy_type(ptr noundef nonnull %4, ptr noundef %2) #3
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %89
16: ; preds = %3
%17 = load i32, ptr %11, align 8, !tbaa !11
%18 = call i32 @verify_policy_dir(i32 noundef %17) #3
store i32 %18, ptr %5, align 4, !tbaa !10
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %89
20: ; preds = %16
%21 = getelementptr inbounds %struct.xfrm_user_polexpire, ptr %10, i64 0, i32 1, i32 2
%22 = load i64, ptr %21, align 8, !tbaa !14
%23 = icmp eq i64 %22, 0
br i1 %23, label %28, label %24
24: ; preds = %20
%25 = load i32, ptr %4, align 4, !tbaa !10
%26 = load i32, ptr %11, align 8, !tbaa !11
%27 = call ptr @xfrm_policy_byid(ptr noundef %9, i32 noundef %13, i32 noundef %25, i32 noundef %26, i64 noundef %22, i32 noundef 0, ptr noundef nonnull %5) #3
br label %52
28: ; preds = %20
%29 = load i64, ptr @XFRMA_SEC_CTX, align 8, !tbaa !15
%30 = getelementptr inbounds ptr, ptr %2, i64 %29
%31 = load ptr, ptr %30, align 8, !tbaa !16
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #3
%32 = call i32 @verify_sec_ctx_len(ptr noundef %2) #3
store i32 %32, ptr %5, align 4, !tbaa !10
%33 = icmp eq i32 %32, 0
br i1 %33, label %34, label %42
34: ; preds = %28
store ptr null, ptr %7, align 8, !tbaa !16
%35 = icmp eq ptr %31, null
br i1 %35, label %44, label %36
36: ; preds = %34
%37 = call ptr @nla_data(ptr noundef nonnull %31) #3
%38 = call i32 @security_xfrm_policy_alloc(ptr noundef nonnull %7, ptr noundef %37) #3
store i32 %38, ptr %5, align 4, !tbaa !10
%39 = icmp eq i32 %38, 0
br i1 %39, label %40, label %42
40: ; preds = %36
%41 = load ptr, ptr %7, align 8, !tbaa !16
br label %44
42: ; preds = %36, %28
%43 = phi i32 [ %32, %28 ], [ %38, %36 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
br label %89
44: ; preds = %40, %34
%45 = phi ptr [ %41, %40 ], [ null, %34 ]
%46 = load i32, ptr %4, align 4, !tbaa !10
%47 = load i32, ptr %11, align 8, !tbaa !11
%48 = getelementptr inbounds %struct.xfrm_user_polexpire, ptr %10, i64 0, i32 1, i32 1
%49 = call ptr @xfrm_policy_bysel_ctx(ptr noundef %9, i32 noundef %13, i32 noundef %46, i32 noundef %47, ptr noundef nonnull %48, ptr noundef %45, i32 noundef 0, ptr noundef nonnull %5) #3
%50 = load ptr, ptr %7, align 8, !tbaa !16
%51 = call i32 @security_xfrm_policy_free(ptr noundef %50) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
br label %52
52: ; preds = %44, %24
%53 = phi ptr [ %27, %24 ], [ %49, %44 ]
%54 = icmp eq ptr %53, null
br i1 %54, label %55, label %58
55: ; preds = %52
%56 = load i32, ptr @ENOENT, align 4, !tbaa !10
%57 = sub nsw i32 0, %56
br label %89
58: ; preds = %52
%59 = load i32, ptr %53, align 4, !tbaa !18
%60 = call i64 @unlikely(i32 noundef %59) #3
%61 = icmp eq i64 %60, 0
br i1 %61, label %62, label %86
62: ; preds = %58
store i32 0, ptr %5, align 4, !tbaa !10
%63 = load i64, ptr %10, align 8, !tbaa !21
%64 = icmp eq i64 %63, 0
br i1 %64, label %78, label %65
65: ; preds = %62
%66 = call { i64, i32 } @NETLINK_CB(ptr noundef nonnull %0) #3
%67 = extractvalue { i64, i32 } %66, 1
%68 = call { i64, i32 } @NETLINK_CB(ptr noundef nonnull %0) #3
%69 = extractvalue { i64, i32 } %68, 0
%70 = lshr i64 %69, 32
%71 = trunc i64 %70 to i32
%72 = call { i64, i32 } @NETLINK_CB(ptr noundef nonnull %0) #3
%73 = extractvalue { i64, i32 } %72, 0
%74 = trunc i64 %73 to i32
%75 = load i32, ptr %11, align 8, !tbaa !11
%76 = call i32 @xfrm_policy_delete(ptr noundef nonnull %53, i32 noundef %75) #3
%77 = call i32 @xfrm_audit_policy_delete(ptr noundef nonnull %53, i32 noundef 1, i32 noundef %67, i32 noundef %71, i32 noundef %74) #3
br label %80
78: ; preds = %62
%79 = call i32 @printk(ptr noundef nonnull @.str) #3
br label %80
80: ; preds = %78, %65
%81 = load i32, ptr %11, align 8, !tbaa !11
%82 = load i64, ptr %10, align 8, !tbaa !21
%83 = load ptr, ptr @current, align 8, !tbaa !16
%84 = load i32, ptr %83, align 4, !tbaa !23
%85 = call i32 @km_policy_expired(ptr noundef nonnull %53, i32 noundef %81, i64 noundef %82, i32 noundef %84) #3
br label %86
86: ; preds = %58, %80
%87 = call i32 @xfrm_pol_put(ptr noundef nonnull %53) #3
%88 = load i32, ptr %5, align 4, !tbaa !10
br label %89
89: ; preds = %42, %16, %3, %86, %55
%90 = phi i32 [ %57, %55 ], [ %88, %86 ], [ %14, %3 ], [ %18, %16 ], [ %43, %42 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %90
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @sock_net(i32 noundef) local_unnamed_addr #2
declare ptr @nlmsg_data(ptr noundef) local_unnamed_addr #2
declare i32 @xfrm_mark_get(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @copy_from_user_policy_type(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @verify_policy_dir(i32 noundef) local_unnamed_addr #2
declare ptr @xfrm_policy_byid(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @verify_sec_ctx_len(ptr noundef) local_unnamed_addr #2
declare ptr @nla_data(ptr noundef) local_unnamed_addr #2
declare i32 @security_xfrm_policy_alloc(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare ptr @xfrm_policy_bysel_ctx(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @security_xfrm_policy_free(ptr noundef) local_unnamed_addr #2
declare i64 @unlikely(i32 noundef) local_unnamed_addr #2
declare { i64, i32 } @NETLINK_CB(ptr noundef) local_unnamed_addr #2
declare i32 @xfrm_policy_delete(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @xfrm_audit_policy_delete(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @printk(ptr noundef) local_unnamed_addr #2
declare i32 @km_policy_expired(ptr noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @xfrm_pol_put(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"sk_buff", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"xfrm_userpolicy_info", !7, i64 0, !7, i64 4, !13, i64 8}
!13 = !{!"long", !8, i64 0}
!14 = !{!12, !13, i64 8}
!15 = !{!13, !13, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"any pointer", !8, i64 0}
!18 = !{!19, !7, i64 0}
!19 = !{!"xfrm_policy", !20, i64 0}
!20 = !{!"TYPE_4__", !7, i64 0}
!21 = !{!22, !13, i64 0}
!22 = !{!"xfrm_user_polexpire", !13, i64 0, !12, i64 8}
!23 = !{!24, !7, i64 0}
!24 = !{!"TYPE_5__", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/xfrm/extr_xfrm_user.c_xfrm_add_pol_expire.c'
source_filename = "AnghaBench/fastsocket/kernel/net/xfrm/extr_xfrm_user.c_xfrm_add_pol_expire.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.xfrm_mark = type { i32 }
@XFRM_POLICY_TYPE_MAIN = common local_unnamed_addr global i32 0, align 4
@ENOENT = common local_unnamed_addr global i32 0, align 4
@XFRMA_SEC_CTX = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [46 x i8] c"Dont know what to do with soft policy expire\0A\00", align 1
@current = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @xfrm_add_pol_expire], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @xfrm_add_pol_expire(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = alloca i32, align 4
%5 = alloca i32, align 4
%6 = alloca %struct.xfrm_mark, align 4
%7 = alloca ptr, align 8
%8 = load i32, ptr %0, align 4, !tbaa !6
%9 = tail call ptr @sock_net(i32 noundef %8) #3
%10 = tail call ptr @nlmsg_data(ptr noundef %1) #3
%11 = getelementptr inbounds i8, ptr %10, i64 8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%12 = load i32, ptr @XFRM_POLICY_TYPE_MAIN, align 4, !tbaa !11
store i32 %12, ptr %4, align 4, !tbaa !11
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
%13 = call i32 @xfrm_mark_get(ptr noundef %2, ptr noundef nonnull %6) #3
%14 = call i32 @copy_from_user_policy_type(ptr noundef nonnull %4, ptr noundef %2) #3
%15 = icmp eq i32 %14, 0
br i1 %15, label %16, label %90
16: ; preds = %3
%17 = load i32, ptr %11, align 8, !tbaa !12
%18 = call i32 @verify_policy_dir(i32 noundef %17) #3
store i32 %18, ptr %5, align 4, !tbaa !11
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %90
20: ; preds = %16
%21 = getelementptr inbounds i8, ptr %10, i64 16
%22 = load i64, ptr %21, align 8, !tbaa !15
%23 = icmp eq i64 %22, 0
br i1 %23, label %28, label %24
24: ; preds = %20
%25 = load i32, ptr %4, align 4, !tbaa !11
%26 = load i32, ptr %11, align 8, !tbaa !12
%27 = call ptr @xfrm_policy_byid(ptr noundef %9, i32 noundef %13, i32 noundef %25, i32 noundef %26, i64 noundef %22, i32 noundef 0, ptr noundef nonnull %5) #3
br label %52
28: ; preds = %20
%29 = load i64, ptr @XFRMA_SEC_CTX, align 8, !tbaa !16
%30 = getelementptr inbounds ptr, ptr %2, i64 %29
%31 = load ptr, ptr %30, align 8, !tbaa !17
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %7) #3
%32 = call i32 @verify_sec_ctx_len(ptr noundef %2) #3
store i32 %32, ptr %5, align 4, !tbaa !11
%33 = icmp eq i32 %32, 0
br i1 %33, label %34, label %42
34: ; preds = %28
store ptr null, ptr %7, align 8, !tbaa !17
%35 = icmp eq ptr %31, null
br i1 %35, label %44, label %36
36: ; preds = %34
%37 = call ptr @nla_data(ptr noundef nonnull %31) #3
%38 = call i32 @security_xfrm_policy_alloc(ptr noundef nonnull %7, ptr noundef %37) #3
store i32 %38, ptr %5, align 4, !tbaa !11
%39 = icmp eq i32 %38, 0
br i1 %39, label %40, label %42
40: ; preds = %36
%41 = load ptr, ptr %7, align 8, !tbaa !17
br label %44
42: ; preds = %36, %28
%43 = phi i32 [ %32, %28 ], [ %38, %36 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
br label %90
44: ; preds = %40, %34
%45 = phi ptr [ %41, %40 ], [ null, %34 ]
%46 = load i32, ptr %4, align 4, !tbaa !11
%47 = load i32, ptr %11, align 8, !tbaa !12
%48 = getelementptr inbounds i8, ptr %10, i64 12
%49 = call ptr @xfrm_policy_bysel_ctx(ptr noundef %9, i32 noundef %13, i32 noundef %46, i32 noundef %47, ptr noundef nonnull %48, ptr noundef %45, i32 noundef 0, ptr noundef nonnull %5) #3
%50 = load ptr, ptr %7, align 8, !tbaa !17
%51 = call i32 @security_xfrm_policy_free(ptr noundef %50) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %7) #3
br label %52
52: ; preds = %44, %24
%53 = phi ptr [ %27, %24 ], [ %49, %44 ]
%54 = icmp eq ptr %53, null
br i1 %54, label %55, label %58
55: ; preds = %52
%56 = load i32, ptr @ENOENT, align 4, !tbaa !11
%57 = sub nsw i32 0, %56
br label %90
58: ; preds = %52
%59 = load i32, ptr %53, align 4, !tbaa !19
%60 = call i64 @unlikely(i32 noundef %59) #3
%61 = icmp eq i64 %60, 0
br i1 %61, label %62, label %87
62: ; preds = %58
store i32 0, ptr %5, align 4, !tbaa !11
%63 = load i64, ptr %10, align 8, !tbaa !22
%64 = icmp eq i64 %63, 0
br i1 %64, label %79, label %65
65: ; preds = %62
%66 = call [2 x i64] @NETLINK_CB(ptr noundef nonnull %0) #3
%67 = extractvalue [2 x i64] %66, 1
%68 = trunc i64 %67 to i32
%69 = call [2 x i64] @NETLINK_CB(ptr noundef nonnull %0) #3
%70 = extractvalue [2 x i64] %69, 0
%71 = lshr i64 %70, 32
%72 = trunc nuw i64 %71 to i32
%73 = call [2 x i64] @NETLINK_CB(ptr noundef nonnull %0) #3
%74 = extractvalue [2 x i64] %73, 0
%75 = trunc i64 %74 to i32
%76 = load i32, ptr %11, align 8, !tbaa !12
%77 = call i32 @xfrm_policy_delete(ptr noundef nonnull %53, i32 noundef %76) #3
%78 = call i32 @xfrm_audit_policy_delete(ptr noundef nonnull %53, i32 noundef 1, i32 noundef %68, i32 noundef %72, i32 noundef %75) #3
br label %81
79: ; preds = %62
%80 = call i32 @printk(ptr noundef nonnull @.str) #3
br label %81
81: ; preds = %79, %65
%82 = load i32, ptr %11, align 8, !tbaa !12
%83 = load i64, ptr %10, align 8, !tbaa !22
%84 = load ptr, ptr @current, align 8, !tbaa !17
%85 = load i32, ptr %84, align 4, !tbaa !24
%86 = call i32 @km_policy_expired(ptr noundef nonnull %53, i32 noundef %82, i64 noundef %83, i32 noundef %85) #3
br label %87
87: ; preds = %58, %81
%88 = call i32 @xfrm_pol_put(ptr noundef nonnull %53) #3
%89 = load i32, ptr %5, align 4, !tbaa !11
br label %90
90: ; preds = %42, %16, %3, %87, %55
%91 = phi i32 [ %57, %55 ], [ %89, %87 ], [ %14, %3 ], [ %18, %16 ], [ %43, %42 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %91
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @sock_net(i32 noundef) local_unnamed_addr #2
declare ptr @nlmsg_data(ptr noundef) local_unnamed_addr #2
declare i32 @xfrm_mark_get(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @copy_from_user_policy_type(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @verify_policy_dir(i32 noundef) local_unnamed_addr #2
declare ptr @xfrm_policy_byid(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @verify_sec_ctx_len(ptr noundef) local_unnamed_addr #2
declare ptr @nla_data(ptr noundef) local_unnamed_addr #2
declare i32 @security_xfrm_policy_alloc(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare ptr @xfrm_policy_bysel_ctx(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @security_xfrm_policy_free(ptr noundef) local_unnamed_addr #2
declare i64 @unlikely(i32 noundef) local_unnamed_addr #2
declare [2 x i64] @NETLINK_CB(ptr noundef) local_unnamed_addr #2
declare i32 @xfrm_policy_delete(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @xfrm_audit_policy_delete(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @printk(ptr noundef) local_unnamed_addr #2
declare i32 @km_policy_expired(ptr noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @xfrm_pol_put(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"sk_buff", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"xfrm_userpolicy_info", !8, i64 0, !8, i64 4, !14, i64 8}
!14 = !{!"long", !9, i64 0}
!15 = !{!13, !14, i64 8}
!16 = !{!14, !14, i64 0}
!17 = !{!18, !18, i64 0}
!18 = !{!"any pointer", !9, i64 0}
!19 = !{!20, !8, i64 0}
!20 = !{!"xfrm_policy", !21, i64 0}
!21 = !{!"TYPE_4__", !8, i64 0}
!22 = !{!23, !14, i64 0}
!23 = !{!"xfrm_user_polexpire", !14, i64 0, !13, i64 8}
!24 = !{!25, !8, i64 0}
!25 = !{!"TYPE_5__", !8, i64 0}
| fastsocket_kernel_net_xfrm_extr_xfrm_user.c_xfrm_add_pol_expire |
; ModuleID = 'AnghaBench/RetroArch/libretro-common/net/extr_net_socket_ssl.c_ssl_socket_free.c'
source_filename = "AnghaBench/RetroArch/libretro-common/net/extr_net_socket_ssl.c_ssl_socket_free.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ssl_state = type { i32, i32, i32, i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local void @ssl_socket_free(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %13, label %3
3: ; preds = %1
%4 = getelementptr inbounds %struct.ssl_state, ptr %0, i64 0, i32 4
%5 = tail call i32 @mbedtls_ssl_free(ptr noundef nonnull %4) #2
%6 = getelementptr inbounds %struct.ssl_state, ptr %0, i64 0, i32 3
%7 = tail call i32 @mbedtls_ssl_config_free(ptr noundef nonnull %6) #2
%8 = getelementptr inbounds %struct.ssl_state, ptr %0, i64 0, i32 2
%9 = tail call i32 @mbedtls_ctr_drbg_free(ptr noundef nonnull %8) #2
%10 = getelementptr inbounds %struct.ssl_state, ptr %0, i64 0, i32 1
%11 = tail call i32 @mbedtls_entropy_free(ptr noundef nonnull %10) #2
%12 = tail call i32 @free(ptr noundef nonnull %0) #2
br label %13
13: ; preds = %1, %3
ret void
}
declare i32 @mbedtls_ssl_free(ptr noundef) local_unnamed_addr #1
declare i32 @mbedtls_ssl_config_free(ptr noundef) local_unnamed_addr #1
declare i32 @mbedtls_ctr_drbg_free(ptr noundef) local_unnamed_addr #1
declare i32 @mbedtls_entropy_free(ptr noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/RetroArch/libretro-common/net/extr_net_socket_ssl.c_ssl_socket_free.c'
source_filename = "AnghaBench/RetroArch/libretro-common/net/extr_net_socket_ssl.c_ssl_socket_free.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @ssl_socket_free(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %13, label %3
3: ; preds = %1
%4 = getelementptr inbounds i8, ptr %0, i64 16
%5 = tail call i32 @mbedtls_ssl_free(ptr noundef nonnull %4) #2
%6 = getelementptr inbounds i8, ptr %0, i64 12
%7 = tail call i32 @mbedtls_ssl_config_free(ptr noundef nonnull %6) #2
%8 = getelementptr inbounds i8, ptr %0, i64 8
%9 = tail call i32 @mbedtls_ctr_drbg_free(ptr noundef nonnull %8) #2
%10 = getelementptr inbounds i8, ptr %0, i64 4
%11 = tail call i32 @mbedtls_entropy_free(ptr noundef nonnull %10) #2
%12 = tail call i32 @free(ptr noundef nonnull %0) #2
br label %13
13: ; preds = %1, %3
ret void
}
declare i32 @mbedtls_ssl_free(ptr noundef) local_unnamed_addr #1
declare i32 @mbedtls_ssl_config_free(ptr noundef) local_unnamed_addr #1
declare i32 @mbedtls_ctr_drbg_free(ptr noundef) local_unnamed_addr #1
declare i32 @mbedtls_entropy_free(ptr noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| RetroArch_libretro-common_net_extr_net_socket_ssl.c_ssl_socket_free |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_core.c_mlxsw_core_port_ib_set.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_core.c_mlxsw_core_port_ib_set.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mlxsw_core_port = type { ptr, %struct.devlink_port }
%struct.devlink_port = type { i32 }
; Function Attrs: nounwind uwtable
define dso_local void @mlxsw_core_port_ib_set(ptr nocapture noundef readonly %0, i64 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.mlxsw_core_port, ptr %4, i64 %1
%6 = getelementptr inbounds %struct.mlxsw_core_port, ptr %4, i64 %1, i32 1
store ptr %2, ptr %5, align 8, !tbaa !10
%7 = tail call i32 @devlink_port_type_ib_set(ptr noundef nonnull %6, ptr noundef null) #2
ret void
}
declare i32 @devlink_port_type_ib_set(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"mlxsw_core", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"mlxsw_core_port", !7, i64 0, !12, i64 8}
!12 = !{!"devlink_port", !13, i64 0}
!13 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_core.c_mlxsw_core_port_ib_set.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_core.c_mlxsw_core_port_ib_set.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.mlxsw_core_port = type { ptr, %struct.devlink_port }
%struct.devlink_port = type { i32 }
; Function Attrs: nounwind ssp uwtable(sync)
define void @mlxsw_core_port_ib_set(ptr nocapture noundef readonly %0, i64 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = getelementptr inbounds %struct.mlxsw_core_port, ptr %4, i64 %1
%6 = getelementptr inbounds i8, ptr %5, i64 8
store ptr %2, ptr %5, align 8, !tbaa !11
%7 = tail call i32 @devlink_port_type_ib_set(ptr noundef nonnull %6, ptr noundef null) #2
ret void
}
declare i32 @devlink_port_type_ib_set(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mlxsw_core", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"mlxsw_core_port", !8, i64 0, !13, i64 8}
!13 = !{!"devlink_port", !14, i64 0}
!14 = !{!"int", !9, i64 0}
| linux_drivers_net_ethernet_mellanox_mlxsw_extr_core.c_mlxsw_core_port_ib_set |
; ModuleID = 'AnghaBench/postgres/src/backend/commands/extr_tablecmds.c_add_column_collation_dependency.c'
source_filename = "AnghaBench/postgres/src/backend/commands/extr_tablecmds.c_add_column_collation_dependency.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i64, i64, i32 }
@DEFAULT_COLLATION_OID = dso_local local_unnamed_addr global i64 0, align 8
@RelationRelationId = dso_local local_unnamed_addr global i32 0, align 4
@CollationRelationId = dso_local local_unnamed_addr global i32 0, align 4
@DEPENDENCY_NORMAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @add_column_collation_dependency], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @add_column_collation_dependency(i64 noundef %0, i64 noundef %1, i64 noundef %2) #0 {
%4 = alloca %struct.TYPE_4__, align 8
%5 = alloca %struct.TYPE_4__, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #3
%6 = tail call i64 @OidIsValid(i64 noundef %2) #3
%7 = icmp eq i64 %6, 0
%8 = load i64, ptr @DEFAULT_COLLATION_OID, align 8
%9 = icmp eq i64 %8, %2
%10 = select i1 %7, i1 true, i1 %9
br i1 %10, label %20, label %11
11: ; preds = %3
%12 = load i32, ptr @RelationRelationId, align 4, !tbaa !5
%13 = getelementptr inbounds %struct.TYPE_4__, ptr %4, i64 0, i32 2
store i32 %12, ptr %13, align 8, !tbaa !9
%14 = getelementptr inbounds %struct.TYPE_4__, ptr %4, i64 0, i32 1
store i64 %0, ptr %14, align 8, !tbaa !12
store i64 %1, ptr %4, align 8, !tbaa !13
%15 = load i32, ptr @CollationRelationId, align 4, !tbaa !5
%16 = getelementptr inbounds %struct.TYPE_4__, ptr %5, i64 0, i32 2
store i32 %15, ptr %16, align 8, !tbaa !9
%17 = getelementptr inbounds %struct.TYPE_4__, ptr %5, i64 0, i32 1
store i64 %2, ptr %17, align 8, !tbaa !12
store i64 0, ptr %5, align 8, !tbaa !13
%18 = load i32, ptr @DEPENDENCY_NORMAL, align 4, !tbaa !5
%19 = call i32 @recordDependencyOn(ptr noundef nonnull %4, ptr noundef nonnull %5, i32 noundef %18) #3
br label %20
20: ; preds = %11, %3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @OidIsValid(i64 noundef) local_unnamed_addr #2
declare i32 @recordDependencyOn(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"TYPE_4__", !11, i64 0, !11, i64 8, !6, i64 16}
!11 = !{!"long", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!10, !11, i64 0}
| ; ModuleID = 'AnghaBench/postgres/src/backend/commands/extr_tablecmds.c_add_column_collation_dependency.c'
source_filename = "AnghaBench/postgres/src/backend/commands/extr_tablecmds.c_add_column_collation_dependency.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_4__ = type { i64, i64, i32 }
@DEFAULT_COLLATION_OID = common local_unnamed_addr global i64 0, align 8
@RelationRelationId = common local_unnamed_addr global i32 0, align 4
@CollationRelationId = common local_unnamed_addr global i32 0, align 4
@DEPENDENCY_NORMAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @add_column_collation_dependency], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @add_column_collation_dependency(i64 noundef %0, i64 noundef %1, i64 noundef %2) #0 {
%4 = alloca %struct.TYPE_4__, align 8
%5 = alloca %struct.TYPE_4__, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #3
%6 = tail call i64 @OidIsValid(i64 noundef %2) #3
%7 = icmp eq i64 %6, 0
%8 = load i64, ptr @DEFAULT_COLLATION_OID, align 8
%9 = icmp eq i64 %8, %2
%10 = select i1 %7, i1 true, i1 %9
br i1 %10, label %20, label %11
11: ; preds = %3
%12 = load i32, ptr @RelationRelationId, align 4, !tbaa !6
%13 = getelementptr inbounds i8, ptr %4, i64 16
store i32 %12, ptr %13, align 8, !tbaa !10
%14 = getelementptr inbounds i8, ptr %4, i64 8
store i64 %0, ptr %14, align 8, !tbaa !13
store i64 %1, ptr %4, align 8, !tbaa !14
%15 = load i32, ptr @CollationRelationId, align 4, !tbaa !6
%16 = getelementptr inbounds i8, ptr %5, i64 16
store i32 %15, ptr %16, align 8, !tbaa !10
%17 = getelementptr inbounds i8, ptr %5, i64 8
store i64 %2, ptr %17, align 8, !tbaa !13
store i64 0, ptr %5, align 8, !tbaa !14
%18 = load i32, ptr @DEPENDENCY_NORMAL, align 4, !tbaa !6
%19 = call i32 @recordDependencyOn(ptr noundef nonnull %4, ptr noundef nonnull %5, i32 noundef %18) #3
br label %20
20: ; preds = %11, %3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @OidIsValid(i64 noundef) local_unnamed_addr #2
declare i32 @recordDependencyOn(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 16}
!11 = !{!"TYPE_4__", !12, i64 0, !12, i64 8, !7, i64 16}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!11, !12, i64 0}
| postgres_src_backend_commands_extr_tablecmds.c_add_column_collation_dependency |
; ModuleID = 'AnghaBench/linux/drivers/media/platform/omap3isp/extr_isp.c_omap3isp_pipeline_set_stream.c'
source_filename = "AnghaBench/linux/drivers/media/platform/omap3isp/extr_isp.c_omap3isp_pipeline_set_stream.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ISP_PIPELINE_STREAM_STOPPED = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @omap3isp_pipeline_set_stream(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @ISP_PIPELINE_STREAM_STOPPED, align 4, !tbaa !5
%4 = icmp eq i32 %3, %1
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @isp_pipeline_disable(ptr noundef %0) #2
br label %9
7: ; preds = %2
%8 = tail call i32 @isp_pipeline_enable(ptr noundef %0, i32 noundef %1) #2
br label %9
9: ; preds = %7, %5
%10 = phi i32 [ %6, %5 ], [ %8, %7 ]
%11 = icmp eq i32 %10, 0
%12 = load i32, ptr @ISP_PIPELINE_STREAM_STOPPED, align 4
%13 = icmp eq i32 %12, %1
%14 = select i1 %11, i1 true, i1 %13
br i1 %14, label %15, label %16
15: ; preds = %9
store i32 %1, ptr %0, align 4, !tbaa !9
br label %16
16: ; preds = %9, %15
ret i32 %10
}
declare i32 @isp_pipeline_disable(ptr noundef) local_unnamed_addr #1
declare i32 @isp_pipeline_enable(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"isp_pipeline", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/media/platform/omap3isp/extr_isp.c_omap3isp_pipeline_set_stream.c'
source_filename = "AnghaBench/linux/drivers/media/platform/omap3isp/extr_isp.c_omap3isp_pipeline_set_stream.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ISP_PIPELINE_STREAM_STOPPED = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @omap3isp_pipeline_set_stream(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @ISP_PIPELINE_STREAM_STOPPED, align 4, !tbaa !6
%4 = icmp eq i32 %3, %1
br i1 %4, label %5, label %7
5: ; preds = %2
%6 = tail call i32 @isp_pipeline_disable(ptr noundef %0) #2
br label %9
7: ; preds = %2
%8 = tail call i32 @isp_pipeline_enable(ptr noundef %0, i32 noundef %1) #2
br label %9
9: ; preds = %7, %5
%10 = phi i32 [ %6, %5 ], [ %8, %7 ]
%11 = icmp eq i32 %10, 0
%12 = load i32, ptr @ISP_PIPELINE_STREAM_STOPPED, align 4
%13 = icmp eq i32 %12, %1
%14 = select i1 %11, i1 true, i1 %13
br i1 %14, label %15, label %16
15: ; preds = %9
store i32 %1, ptr %0, align 4, !tbaa !10
br label %16
16: ; preds = %9, %15
ret i32 %10
}
declare i32 @isp_pipeline_disable(ptr noundef) local_unnamed_addr #1
declare i32 @isp_pipeline_enable(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"isp_pipeline", !7, i64 0}
| linux_drivers_media_platform_omap3isp_extr_isp.c_omap3isp_pipeline_set_stream |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/display/dc/dce80/extr_dce80_timing_generator.c_program_pix_dur.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/display/dc/dce80/extr_dce80_timing_generator.c_program_pix_dur.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@mmDMIF_PG0_DPG_PIPE_ARBITRATION_CONTROL1 = dso_local local_unnamed_addr global i64 0, align 8
@DPG_PIPE_ARBITRATION_CONTROL1 = dso_local local_unnamed_addr global i32 0, align 4
@PIXEL_DURATION = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @program_pix_dur], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @program_pix_dur(ptr noundef %0, i64 noundef %1) #0 {
%3 = load i64, ptr @mmDMIF_PG0_DPG_PIPE_ARBITRATION_CONTROL1, align 8, !tbaa !5
%4 = tail call ptr @DCE110TG_FROM_TG(ptr noundef %0) #2
%5 = load i64, ptr %4, align 8, !tbaa !9
%6 = add nsw i64 %5, %3
%7 = load i32, ptr %0, align 4, !tbaa !12
%8 = tail call i64 @dm_read_reg(i32 noundef %7, i64 noundef %6) #2
%9 = icmp eq i64 %1, 0
br i1 %9, label %17, label %10
10: ; preds = %2
%11 = tail call i32 @div_u64(i64 noundef 10000000000, i64 noundef %1) #2
%12 = load i32, ptr @DPG_PIPE_ARBITRATION_CONTROL1, align 4, !tbaa !15
%13 = load i32, ptr @PIXEL_DURATION, align 4, !tbaa !15
%14 = tail call i32 @set_reg_field_value(i64 noundef %8, i32 noundef %11, i32 noundef %12, i32 noundef %13) #2
%15 = load i32, ptr %0, align 4, !tbaa !12
%16 = tail call i32 @dm_write_reg(i32 noundef %15, i64 noundef %6, i64 noundef %8) #2
br label %17
17: ; preds = %2, %10
ret void
}
declare ptr @DCE110TG_FROM_TG(ptr noundef) local_unnamed_addr #1
declare i64 @dm_read_reg(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @div_u64(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @set_reg_field_value(i64 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dm_write_reg(i32 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_4__", !11, i64 0}
!11 = !{!"TYPE_3__", !6, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"timing_generator", !14, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!14, !14, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/display/dc/dce80/extr_dce80_timing_generator.c_program_pix_dur.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/display/dc/dce80/extr_dce80_timing_generator.c_program_pix_dur.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@mmDMIF_PG0_DPG_PIPE_ARBITRATION_CONTROL1 = common local_unnamed_addr global i64 0, align 8
@DPG_PIPE_ARBITRATION_CONTROL1 = common local_unnamed_addr global i32 0, align 4
@PIXEL_DURATION = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @program_pix_dur], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @program_pix_dur(ptr noundef %0, i64 noundef %1) #0 {
%3 = load i64, ptr @mmDMIF_PG0_DPG_PIPE_ARBITRATION_CONTROL1, align 8, !tbaa !6
%4 = tail call ptr @DCE110TG_FROM_TG(ptr noundef %0) #2
%5 = load i64, ptr %4, align 8, !tbaa !10
%6 = add nsw i64 %5, %3
%7 = load i32, ptr %0, align 4, !tbaa !13
%8 = tail call i64 @dm_read_reg(i32 noundef %7, i64 noundef %6) #2
%9 = icmp eq i64 %1, 0
br i1 %9, label %17, label %10
10: ; preds = %2
%11 = tail call i32 @div_u64(i64 noundef 10000000000, i64 noundef %1) #2
%12 = load i32, ptr @DPG_PIPE_ARBITRATION_CONTROL1, align 4, !tbaa !16
%13 = load i32, ptr @PIXEL_DURATION, align 4, !tbaa !16
%14 = tail call i32 @set_reg_field_value(i64 noundef %8, i32 noundef %11, i32 noundef %12, i32 noundef %13) #2
%15 = load i32, ptr %0, align 4, !tbaa !13
%16 = tail call i32 @dm_write_reg(i32 noundef %15, i64 noundef %6, i64 noundef %8) #2
br label %17
17: ; preds = %2, %10
ret void
}
declare ptr @DCE110TG_FROM_TG(ptr noundef) local_unnamed_addr #1
declare i64 @dm_read_reg(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @div_u64(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @set_reg_field_value(i64 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dm_write_reg(i32 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"TYPE_3__", !7, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"timing_generator", !15, i64 0}
!15 = !{!"int", !8, i64 0}
!16 = !{!15, !15, i64 0}
| linux_drivers_gpu_drm_amd_display_dc_dce80_extr_dce80_timing_generator.c_program_pix_dur |
; ModuleID = 'AnghaBench/freebsd/contrib/unbound/services/extr_authzone.c_ixfr_start_serial.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/services/extr_authzone.c_ixfr_start_serial.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@VERB_OPS = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [30 x i8] c"IXFR has no second SOA record\00", align 1
@.str.1 = private unnamed_addr constant [36 x i8] c"IXFR cannot parse second SOA record\00", align 1
@LDNS_RR_TYPE_SOA = dso_local local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [35 x i8] c"IXFR second record is not type SOA\00", align 1
@.str.3 = private unnamed_addr constant [36 x i8] c"IXFR, second SOA has short rdlength\00", align 1
@.str.4 = private unnamed_addr constant [33 x i8] c"IXFR second serial same as first\00", align 1
@.str.5 = private unnamed_addr constant [75 x i8] c"IXFR is from serial %u to %u but %u in memory, rejecting the zone transfer\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @ixfr_start_serial], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @ixfr_start_serial(ptr noundef %0, i32 noundef %1, i64 noundef %2, ptr noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6, i64 noundef %7, ptr noundef %8, i64 noundef %9, i64 noundef %10, i64 noundef %11) #0 {
%13 = alloca ptr, align 8
%14 = alloca i32, align 4
%15 = alloca i64, align 8
%16 = alloca ptr, align 8
%17 = alloca i64, align 8
%18 = alloca i64, align 8
%19 = alloca i64, align 8
%20 = alloca i64, align 8
%21 = alloca ptr, align 8
%22 = alloca i64, align 8
store ptr %0, ptr %13, align 8, !tbaa !5
store i32 %1, ptr %14, align 4, !tbaa !9
store i64 %2, ptr %15, align 8, !tbaa !11
store ptr %3, ptr %16, align 8, !tbaa !5
store i64 %4, ptr %17, align 8, !tbaa !11
store i64 %5, ptr %18, align 8, !tbaa !11
store i64 %6, ptr %19, align 8, !tbaa !11
store i64 %7, ptr %20, align 8, !tbaa !11
store ptr %8, ptr %21, align 8, !tbaa !5
store i64 %9, ptr %22, align 8, !tbaa !11
%23 = call i32 @chunk_rrlist_gonext(ptr noundef nonnull %13, ptr noundef nonnull %14, ptr noundef nonnull %15, i64 noundef %9) #2
%24 = load ptr, ptr %13, align 8, !tbaa !5
%25 = load i32, ptr %14, align 4, !tbaa !9
%26 = call i64 @chunk_rrlist_end(ptr noundef %24, i32 noundef %25) #2
%27 = icmp eq i64 %26, 0
br i1 %27, label %31, label %28
28: ; preds = %12
%29 = load i32, ptr @VERB_OPS, align 4, !tbaa !9
%30 = call i32 (i32, ptr, ...) @verbose(i32 noundef %29, ptr noundef nonnull @.str) #2
br label %70
31: ; preds = %12
%32 = load ptr, ptr %13, align 8, !tbaa !5
%33 = load i32, ptr %14, align 4, !tbaa !9
%34 = load i64, ptr %15, align 8, !tbaa !11
%35 = call i32 @chunk_rrlist_get_current(ptr noundef %32, i32 noundef %33, i64 noundef %34, ptr noundef nonnull %16, ptr noundef nonnull %17, ptr noundef nonnull %18, ptr noundef nonnull %19, ptr noundef nonnull %20, ptr noundef nonnull %21, ptr noundef nonnull %22) #2
%36 = icmp eq i32 %35, 0
br i1 %36, label %37, label %40
37: ; preds = %31
%38 = load i32, ptr @VERB_OPS, align 4, !tbaa !9
%39 = call i32 (i32, ptr, ...) @verbose(i32 noundef %38, ptr noundef nonnull @.str.1) #2
br label %70
40: ; preds = %31
%41 = load i64, ptr %17, align 8, !tbaa !11
%42 = load i64, ptr @LDNS_RR_TYPE_SOA, align 8, !tbaa !11
%43 = icmp eq i64 %41, %42
br i1 %43, label %47, label %44
44: ; preds = %40
%45 = load i32, ptr @VERB_OPS, align 4, !tbaa !9
%46 = call i32 (i32, ptr, ...) @verbose(i32 noundef %45, ptr noundef nonnull @.str.2) #2
br label %70
47: ; preds = %40
%48 = load i64, ptr %20, align 8, !tbaa !11
%49 = icmp slt i64 %48, 22
br i1 %49, label %50, label %53
50: ; preds = %47
%51 = load i32, ptr @VERB_OPS, align 4, !tbaa !9
%52 = call i32 (i32, ptr, ...) @verbose(i32 noundef %51, ptr noundef nonnull @.str.3) #2
br label %70
53: ; preds = %47
%54 = load ptr, ptr %21, align 8, !tbaa !5
%55 = getelementptr inbounds i32, ptr %54, i64 %48
%56 = getelementptr inbounds i32, ptr %55, i64 -20
%57 = call i64 @sldns_read_uint32(ptr noundef nonnull %56) #2
%58 = icmp eq i64 %57, %10
br i1 %58, label %59, label %62
59: ; preds = %53
%60 = load i32, ptr @VERB_OPS, align 4, !tbaa !9
%61 = call i32 (i32, ptr, ...) @verbose(i32 noundef %60, ptr noundef nonnull @.str.4) #2
br label %70
62: ; preds = %53
%63 = icmp eq i64 %57, %11
br i1 %63, label %70, label %64
64: ; preds = %62
%65 = load i32, ptr @VERB_OPS, align 4, !tbaa !9
%66 = trunc i64 %57 to i32
%67 = trunc i64 %10 to i32
%68 = trunc i64 %11 to i32
%69 = call i32 (i32, ptr, ...) @verbose(i32 noundef %65, ptr noundef nonnull @.str.5, i32 noundef %66, i32 noundef %67, i32 noundef %68) #2
br label %70
70: ; preds = %62, %64, %59, %50, %44, %37, %28
%71 = phi i32 [ 0, %28 ], [ 0, %44 ], [ 0, %50 ], [ 0, %59 ], [ 0, %64 ], [ 0, %37 ], [ 1, %62 ]
ret i32 %71
}
declare i32 @chunk_rrlist_gonext(ptr noundef, ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @chunk_rrlist_end(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @verbose(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @chunk_rrlist_get_current(ptr noundef, i32 noundef, i64 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @sldns_read_uint32(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/unbound/services/extr_authzone.c_ixfr_start_serial.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/services/extr_authzone.c_ixfr_start_serial.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VERB_OPS = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [30 x i8] c"IXFR has no second SOA record\00", align 1
@.str.1 = private unnamed_addr constant [36 x i8] c"IXFR cannot parse second SOA record\00", align 1
@LDNS_RR_TYPE_SOA = common local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [35 x i8] c"IXFR second record is not type SOA\00", align 1
@.str.3 = private unnamed_addr constant [36 x i8] c"IXFR, second SOA has short rdlength\00", align 1
@.str.4 = private unnamed_addr constant [33 x i8] c"IXFR second serial same as first\00", align 1
@.str.5 = private unnamed_addr constant [75 x i8] c"IXFR is from serial %u to %u but %u in memory, rejecting the zone transfer\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ixfr_start_serial], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @ixfr_start_serial(ptr noundef %0, i32 noundef %1, i64 noundef %2, ptr noundef %3, i64 noundef %4, i64 noundef %5, i64 noundef %6, i64 noundef %7, ptr noundef %8, i64 noundef %9, i64 noundef %10, i64 noundef %11) #0 {
%13 = alloca ptr, align 8
%14 = alloca i32, align 4
%15 = alloca i64, align 8
%16 = alloca ptr, align 8
%17 = alloca i64, align 8
%18 = alloca i64, align 8
%19 = alloca i64, align 8
%20 = alloca i64, align 8
%21 = alloca ptr, align 8
%22 = alloca i64, align 8
store ptr %0, ptr %13, align 8, !tbaa !6
store i32 %1, ptr %14, align 4, !tbaa !10
store i64 %2, ptr %15, align 8, !tbaa !12
store ptr %3, ptr %16, align 8, !tbaa !6
store i64 %4, ptr %17, align 8, !tbaa !12
store i64 %5, ptr %18, align 8, !tbaa !12
store i64 %6, ptr %19, align 8, !tbaa !12
store i64 %7, ptr %20, align 8, !tbaa !12
store ptr %8, ptr %21, align 8, !tbaa !6
store i64 %9, ptr %22, align 8, !tbaa !12
%23 = call i32 @chunk_rrlist_gonext(ptr noundef nonnull %13, ptr noundef nonnull %14, ptr noundef nonnull %15, i64 noundef %9) #2
%24 = load ptr, ptr %13, align 8, !tbaa !6
%25 = load i32, ptr %14, align 4, !tbaa !10
%26 = call i64 @chunk_rrlist_end(ptr noundef %24, i32 noundef %25) #2
%27 = icmp eq i64 %26, 0
br i1 %27, label %31, label %28
28: ; preds = %12
%29 = load i32, ptr @VERB_OPS, align 4, !tbaa !10
%30 = call i32 (i32, ptr, ...) @verbose(i32 noundef %29, ptr noundef nonnull @.str) #2
br label %70
31: ; preds = %12
%32 = load ptr, ptr %13, align 8, !tbaa !6
%33 = load i32, ptr %14, align 4, !tbaa !10
%34 = load i64, ptr %15, align 8, !tbaa !12
%35 = call i32 @chunk_rrlist_get_current(ptr noundef %32, i32 noundef %33, i64 noundef %34, ptr noundef nonnull %16, ptr noundef nonnull %17, ptr noundef nonnull %18, ptr noundef nonnull %19, ptr noundef nonnull %20, ptr noundef nonnull %21, ptr noundef nonnull %22) #2
%36 = icmp eq i32 %35, 0
br i1 %36, label %37, label %40
37: ; preds = %31
%38 = load i32, ptr @VERB_OPS, align 4, !tbaa !10
%39 = call i32 (i32, ptr, ...) @verbose(i32 noundef %38, ptr noundef nonnull @.str.1) #2
br label %70
40: ; preds = %31
%41 = load i64, ptr %17, align 8, !tbaa !12
%42 = load i64, ptr @LDNS_RR_TYPE_SOA, align 8, !tbaa !12
%43 = icmp eq i64 %41, %42
br i1 %43, label %47, label %44
44: ; preds = %40
%45 = load i32, ptr @VERB_OPS, align 4, !tbaa !10
%46 = call i32 (i32, ptr, ...) @verbose(i32 noundef %45, ptr noundef nonnull @.str.2) #2
br label %70
47: ; preds = %40
%48 = load i64, ptr %20, align 8, !tbaa !12
%49 = icmp slt i64 %48, 22
br i1 %49, label %50, label %53
50: ; preds = %47
%51 = load i32, ptr @VERB_OPS, align 4, !tbaa !10
%52 = call i32 (i32, ptr, ...) @verbose(i32 noundef %51, ptr noundef nonnull @.str.3) #2
br label %70
53: ; preds = %47
%54 = load ptr, ptr %21, align 8, !tbaa !6
%55 = getelementptr inbounds i32, ptr %54, i64 %48
%56 = getelementptr inbounds i8, ptr %55, i64 -80
%57 = call i64 @sldns_read_uint32(ptr noundef nonnull %56) #2
%58 = icmp eq i64 %57, %10
br i1 %58, label %59, label %62
59: ; preds = %53
%60 = load i32, ptr @VERB_OPS, align 4, !tbaa !10
%61 = call i32 (i32, ptr, ...) @verbose(i32 noundef %60, ptr noundef nonnull @.str.4) #2
br label %70
62: ; preds = %53
%63 = icmp eq i64 %57, %11
br i1 %63, label %70, label %64
64: ; preds = %62
%65 = load i32, ptr @VERB_OPS, align 4, !tbaa !10
%66 = trunc i64 %57 to i32
%67 = trunc i64 %10 to i32
%68 = trunc i64 %11 to i32
%69 = call i32 (i32, ptr, ...) @verbose(i32 noundef %65, ptr noundef nonnull @.str.5, i32 noundef %66, i32 noundef %67, i32 noundef %68) #2
br label %70
70: ; preds = %62, %64, %59, %50, %44, %37, %28
%71 = phi i32 [ 0, %28 ], [ 0, %44 ], [ 0, %50 ], [ 0, %59 ], [ 0, %64 ], [ 0, %37 ], [ 1, %62 ]
ret i32 %71
}
declare i32 @chunk_rrlist_gonext(ptr noundef, ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @chunk_rrlist_end(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @verbose(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @chunk_rrlist_get_current(ptr noundef, i32 noundef, i64 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @sldns_read_uint32(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
| freebsd_contrib_unbound_services_extr_authzone.c_ixfr_start_serial |
; ModuleID = 'AnghaBench/linux/arch/mips/paravirt/extr_setup.c_get_system_type.c'
source_filename = "AnghaBench/linux/arch/mips/paravirt/extr_setup.c_get_system_type.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [28 x i8] c"MIPS Para-Virtualized Guest\00", align 1
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef nonnull ptr @get_system_type() local_unnamed_addr #0 {
ret ptr @.str
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/arch/mips/paravirt/extr_setup.c_get_system_type.c'
source_filename = "AnghaBench/linux/arch/mips/paravirt/extr_setup.c_get_system_type.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [28 x i8] c"MIPS Para-Virtualized Guest\00", align 1
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef nonnull ptr @get_system_type() local_unnamed_addr #0 {
ret ptr @.str
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_arch_mips_paravirt_extr_setup.c_get_system_type |
; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv4/extr_tcp_output.c_tcp_event_ack_sent.c'
source_filename = "AnghaBench/fastsocket/kernel/net/ipv4/extr_tcp_output.c_tcp_event_ack_sent.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ICSK_TIME_DACK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @tcp_event_ack_sent], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @tcp_event_ack_sent(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call i32 @tcp_dec_quickack_mode(ptr noundef %0, i32 noundef %1) #2
%4 = load i32, ptr @ICSK_TIME_DACK, align 4, !tbaa !5
%5 = tail call i32 @inet_csk_clear_xmit_timer(ptr noundef %0, i32 noundef %4) #2
ret void
}
declare i32 @tcp_dec_quickack_mode(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @inet_csk_clear_xmit_timer(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/ipv4/extr_tcp_output.c_tcp_event_ack_sent.c'
source_filename = "AnghaBench/fastsocket/kernel/net/ipv4/extr_tcp_output.c_tcp_event_ack_sent.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ICSK_TIME_DACK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @tcp_event_ack_sent], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @tcp_event_ack_sent(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call i32 @tcp_dec_quickack_mode(ptr noundef %0, i32 noundef %1) #2
%4 = load i32, ptr @ICSK_TIME_DACK, align 4, !tbaa !6
%5 = tail call i32 @inet_csk_clear_xmit_timer(ptr noundef %0, i32 noundef %4) #2
ret void
}
declare i32 @tcp_dec_quickack_mode(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @inet_csk_clear_xmit_timer(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_net_ipv4_extr_tcp_output.c_tcp_event_ack_sent |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_dce_v6_0.c_dce_v6_0_available_bandwidth.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_dce_v6_0.c_dce_v6_0_available_bandwidth.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @dce_v6_0_available_bandwidth], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @dce_v6_0_available_bandwidth(ptr noundef %0) #0 {
%2 = tail call i32 @dce_v6_0_dram_bandwidth(ptr noundef %0) #2
%3 = tail call i32 @dce_v6_0_data_return_bandwidth(ptr noundef %0) #2
%4 = tail call i32 @dce_v6_0_dmif_request_bandwidth(ptr noundef %0) #2
%5 = tail call i32 @min(i32 noundef %3, i32 noundef %4) #2
%6 = tail call i32 @min(i32 noundef %2, i32 noundef %5) #2
ret i32 %6
}
declare i32 @dce_v6_0_dram_bandwidth(ptr noundef) local_unnamed_addr #1
declare i32 @dce_v6_0_data_return_bandwidth(ptr noundef) local_unnamed_addr #1
declare i32 @dce_v6_0_dmif_request_bandwidth(ptr noundef) local_unnamed_addr #1
declare i32 @min(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_dce_v6_0.c_dce_v6_0_available_bandwidth.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_dce_v6_0.c_dce_v6_0_available_bandwidth.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dce_v6_0_available_bandwidth], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @dce_v6_0_available_bandwidth(ptr noundef %0) #0 {
%2 = tail call i32 @dce_v6_0_dram_bandwidth(ptr noundef %0) #2
%3 = tail call i32 @dce_v6_0_data_return_bandwidth(ptr noundef %0) #2
%4 = tail call i32 @dce_v6_0_dmif_request_bandwidth(ptr noundef %0) #2
%5 = tail call i32 @min(i32 noundef %3, i32 noundef %4) #2
%6 = tail call i32 @min(i32 noundef %2, i32 noundef %5) #2
ret i32 %6
}
declare i32 @dce_v6_0_dram_bandwidth(ptr noundef) local_unnamed_addr #1
declare i32 @dce_v6_0_data_return_bandwidth(ptr noundef) local_unnamed_addr #1
declare i32 @dce_v6_0_dmif_request_bandwidth(ptr noundef) local_unnamed_addr #1
declare i32 @min(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_gpu_drm_amd_amdgpu_extr_dce_v6_0.c_dce_v6_0_available_bandwidth |
; ModuleID = 'AnghaBench/numpy/numpy/random/src/pcg64/extr_pcg64.orig.h_pcg_oneseq_32_rxs_m_xs_32_boundedrand_r.c'
source_filename = "AnghaBench/numpy/numpy/random/src/pcg64/extr_pcg64.orig.h_pcg_oneseq_32_rxs_m_xs_32_boundedrand_r.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/numpy/numpy/random/src/pcg64/extr_pcg64.orig.h_pcg_oneseq_32_rxs_m_xs_32_boundedrand_r.c'
source_filename = "AnghaBench/numpy/numpy/random/src/pcg64/extr_pcg64.orig.h_pcg_oneseq_32_rxs_m_xs_32_boundedrand_r.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| numpy_numpy_random_src_pcg64_extr_pcg64.orig.h_pcg_oneseq_32_rxs_m_xs_32_boundedrand_r |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/ath/ath9k/extr_ar9003_mci.c_ar9003_mci_osla_setup.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/ath/ath9k/extr_ar9003_mci.c_ar9003_mci_osla_setup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@AR_BTCOEX_CTRL = dso_local local_unnamed_addr global i32 0, align 4
@AR_BTCOEX_CTRL_ONE_STEP_LOOK_AHEAD_EN = dso_local local_unnamed_addr global i32 0, align 4
@AR_MCI_SCHD_TABLE_2 = dso_local local_unnamed_addr global i32 0, align 4
@AR_MCI_SCHD_TABLE_2_HW_BASED = dso_local local_unnamed_addr global i32 0, align 4
@AR_MCI_SCHD_TABLE_2_MEM_BASED = dso_local local_unnamed_addr global i32 0, align 4
@AR_MCI_MISC = dso_local local_unnamed_addr global i32 0, align 4
@AR_MCI_MISC_HW_FIX_EN = dso_local local_unnamed_addr global i32 0, align 4
@ATH_MCI_CONFIG_DISABLE_AGGR_THRESH = dso_local local_unnamed_addr global i32 0, align 4
@ATH_MCI_CONFIG_AGGR_THRESH = dso_local local_unnamed_addr global i32 0, align 4
@AR_BTCOEX_CTRL_AGGR_THRESH = dso_local local_unnamed_addr global i32 0, align 4
@AR_BTCOEX_CTRL_TIME_TO_NEXT_BT_THRESH_EN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ar9003_mci_osla_setup], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ar9003_mci_osla_setup(ptr noundef %0, i32 noundef %1) #0 {
%3 = icmp eq i32 %1, 0
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = load i32, ptr @AR_BTCOEX_CTRL, align 4, !tbaa !5
%6 = load i32, ptr @AR_BTCOEX_CTRL_ONE_STEP_LOOK_AHEAD_EN, align 4, !tbaa !5
%7 = tail call i32 @REG_CLR_BIT(ptr noundef %0, i32 noundef %5, i32 noundef %6) #2
br label %40
8: ; preds = %2
%9 = load i32, ptr @AR_MCI_SCHD_TABLE_2, align 4, !tbaa !5
%10 = load i32, ptr @AR_MCI_SCHD_TABLE_2_HW_BASED, align 4, !tbaa !5
%11 = tail call i32 @REG_RMW_FIELD(ptr noundef %0, i32 noundef %9, i32 noundef %10, i32 noundef 1) #2
%12 = load i32, ptr @AR_MCI_SCHD_TABLE_2, align 4, !tbaa !5
%13 = load i32, ptr @AR_MCI_SCHD_TABLE_2_MEM_BASED, align 4, !tbaa !5
%14 = tail call i32 @REG_RMW_FIELD(ptr noundef %0, i32 noundef %12, i32 noundef %13, i32 noundef 1) #2
%15 = tail call i64 @AR_SREV_9565(ptr noundef %0) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %21, label %17
17: ; preds = %8
%18 = load i32, ptr @AR_MCI_MISC, align 4, !tbaa !5
%19 = load i32, ptr @AR_MCI_MISC_HW_FIX_EN, align 4, !tbaa !5
%20 = tail call i32 @REG_RMW_FIELD(ptr noundef %0, i32 noundef %18, i32 noundef %19, i32 noundef 1) #2
br label %21
21: ; preds = %17, %8
%22 = load i32, ptr %0, align 4, !tbaa !9
%23 = load i32, ptr @ATH_MCI_CONFIG_DISABLE_AGGR_THRESH, align 4, !tbaa !5
%24 = and i32 %23, %22
%25 = icmp eq i32 %24, 0
br i1 %25, label %26, label %32
26: ; preds = %21
%27 = load i32, ptr @ATH_MCI_CONFIG_AGGR_THRESH, align 4, !tbaa !5
%28 = tail call i32 @MS(i32 noundef %22, i32 noundef %27) #2
%29 = load i32, ptr @AR_BTCOEX_CTRL, align 4, !tbaa !5
%30 = load i32, ptr @AR_BTCOEX_CTRL_AGGR_THRESH, align 4, !tbaa !5
%31 = tail call i32 @REG_RMW_FIELD(ptr noundef nonnull %0, i32 noundef %29, i32 noundef %30, i32 noundef %28) #2
br label %32
32: ; preds = %21, %26
%33 = phi i32 [ 1, %26 ], [ 0, %21 ]
%34 = load i32, ptr @AR_BTCOEX_CTRL, align 4, !tbaa !5
%35 = load i32, ptr @AR_BTCOEX_CTRL_TIME_TO_NEXT_BT_THRESH_EN, align 4, !tbaa !5
%36 = tail call i32 @REG_RMW_FIELD(ptr noundef nonnull %0, i32 noundef %34, i32 noundef %35, i32 noundef %33) #2
%37 = load i32, ptr @AR_BTCOEX_CTRL, align 4, !tbaa !5
%38 = load i32, ptr @AR_BTCOEX_CTRL_ONE_STEP_LOOK_AHEAD_EN, align 4, !tbaa !5
%39 = tail call i32 @REG_RMW_FIELD(ptr noundef nonnull %0, i32 noundef %37, i32 noundef %38, i32 noundef 1) #2
br label %40
40: ; preds = %32, %4
ret void
}
declare i32 @REG_CLR_BIT(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @REG_RMW_FIELD(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @AR_SREV_9565(ptr noundef) local_unnamed_addr #1
declare i32 @MS(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"ath9k_hw_mci", !6, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/ath/ath9k/extr_ar9003_mci.c_ar9003_mci_osla_setup.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/ath/ath9k/extr_ar9003_mci.c_ar9003_mci_osla_setup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AR_BTCOEX_CTRL = common local_unnamed_addr global i32 0, align 4
@AR_BTCOEX_CTRL_ONE_STEP_LOOK_AHEAD_EN = common local_unnamed_addr global i32 0, align 4
@AR_MCI_SCHD_TABLE_2 = common local_unnamed_addr global i32 0, align 4
@AR_MCI_SCHD_TABLE_2_HW_BASED = common local_unnamed_addr global i32 0, align 4
@AR_MCI_SCHD_TABLE_2_MEM_BASED = common local_unnamed_addr global i32 0, align 4
@AR_MCI_MISC = common local_unnamed_addr global i32 0, align 4
@AR_MCI_MISC_HW_FIX_EN = common local_unnamed_addr global i32 0, align 4
@ATH_MCI_CONFIG_DISABLE_AGGR_THRESH = common local_unnamed_addr global i32 0, align 4
@ATH_MCI_CONFIG_AGGR_THRESH = common local_unnamed_addr global i32 0, align 4
@AR_BTCOEX_CTRL_AGGR_THRESH = common local_unnamed_addr global i32 0, align 4
@AR_BTCOEX_CTRL_TIME_TO_NEXT_BT_THRESH_EN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ar9003_mci_osla_setup], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ar9003_mci_osla_setup(ptr noundef %0, i32 noundef %1) #0 {
%3 = icmp eq i32 %1, 0
br i1 %3, label %4, label %8
4: ; preds = %2
%5 = load i32, ptr @AR_BTCOEX_CTRL, align 4, !tbaa !6
%6 = load i32, ptr @AR_BTCOEX_CTRL_ONE_STEP_LOOK_AHEAD_EN, align 4, !tbaa !6
%7 = tail call i32 @REG_CLR_BIT(ptr noundef %0, i32 noundef %5, i32 noundef %6) #2
br label %40
8: ; preds = %2
%9 = load i32, ptr @AR_MCI_SCHD_TABLE_2, align 4, !tbaa !6
%10 = load i32, ptr @AR_MCI_SCHD_TABLE_2_HW_BASED, align 4, !tbaa !6
%11 = tail call i32 @REG_RMW_FIELD(ptr noundef %0, i32 noundef %9, i32 noundef %10, i32 noundef 1) #2
%12 = load i32, ptr @AR_MCI_SCHD_TABLE_2, align 4, !tbaa !6
%13 = load i32, ptr @AR_MCI_SCHD_TABLE_2_MEM_BASED, align 4, !tbaa !6
%14 = tail call i32 @REG_RMW_FIELD(ptr noundef %0, i32 noundef %12, i32 noundef %13, i32 noundef 1) #2
%15 = tail call i64 @AR_SREV_9565(ptr noundef %0) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %21, label %17
17: ; preds = %8
%18 = load i32, ptr @AR_MCI_MISC, align 4, !tbaa !6
%19 = load i32, ptr @AR_MCI_MISC_HW_FIX_EN, align 4, !tbaa !6
%20 = tail call i32 @REG_RMW_FIELD(ptr noundef %0, i32 noundef %18, i32 noundef %19, i32 noundef 1) #2
br label %21
21: ; preds = %17, %8
%22 = load i32, ptr %0, align 4, !tbaa !10
%23 = load i32, ptr @ATH_MCI_CONFIG_DISABLE_AGGR_THRESH, align 4, !tbaa !6
%24 = and i32 %23, %22
%25 = icmp eq i32 %24, 0
br i1 %25, label %26, label %32
26: ; preds = %21
%27 = load i32, ptr @ATH_MCI_CONFIG_AGGR_THRESH, align 4, !tbaa !6
%28 = tail call i32 @MS(i32 noundef %22, i32 noundef %27) #2
%29 = load i32, ptr @AR_BTCOEX_CTRL, align 4, !tbaa !6
%30 = load i32, ptr @AR_BTCOEX_CTRL_AGGR_THRESH, align 4, !tbaa !6
%31 = tail call i32 @REG_RMW_FIELD(ptr noundef nonnull %0, i32 noundef %29, i32 noundef %30, i32 noundef %28) #2
br label %32
32: ; preds = %21, %26
%33 = phi i32 [ 1, %26 ], [ 0, %21 ]
%34 = load i32, ptr @AR_BTCOEX_CTRL, align 4, !tbaa !6
%35 = load i32, ptr @AR_BTCOEX_CTRL_TIME_TO_NEXT_BT_THRESH_EN, align 4, !tbaa !6
%36 = tail call i32 @REG_RMW_FIELD(ptr noundef nonnull %0, i32 noundef %34, i32 noundef %35, i32 noundef %33) #2
%37 = load i32, ptr @AR_BTCOEX_CTRL, align 4, !tbaa !6
%38 = load i32, ptr @AR_BTCOEX_CTRL_ONE_STEP_LOOK_AHEAD_EN, align 4, !tbaa !6
%39 = tail call i32 @REG_RMW_FIELD(ptr noundef nonnull %0, i32 noundef %37, i32 noundef %38, i32 noundef 1) #2
br label %40
40: ; preds = %32, %4
ret void
}
declare i32 @REG_CLR_BIT(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @REG_RMW_FIELD(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @AR_SREV_9565(ptr noundef) local_unnamed_addr #1
declare i32 @MS(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"ath9k_hw_mci", !7, i64 0}
| fastsocket_kernel_drivers_net_wireless_ath_ath9k_extr_ar9003_mci.c_ar9003_mci_osla_setup |
; ModuleID = 'AnghaBench/linux/drivers/mtd/tests/extr_subpagetest.c_verify_eraseblock2.c'
source_filename = "AnghaBench/linux/drivers/mtd/tests/extr_subpagetest.c_verify_eraseblock2.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@mtd = dso_local local_unnamed_addr global ptr null, align 8
@subpgsize = dso_local local_unnamed_addr global i32 0, align 4
@rnd_state = dso_local global i32 0, align 4
@writebuf = dso_local local_unnamed_addr global i32 0, align 4
@readbuf = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"ECC correction at %#llx\0A\00", align 1
@.str.1 = private unnamed_addr constant [29 x i8] c"error: read failed at %#llx\0A\00", align 1
@.str.2 = private unnamed_addr constant [31 x i8] c"error: verify failed at %#llx\0A\00", align 1
@errcnt = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @verify_eraseblock2], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @verify_eraseblock2(i32 noundef %0) #0 {
%2 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%3 = load ptr, ptr @mtd, align 8, !tbaa !5
%4 = load i32, ptr %3, align 4, !tbaa !9
%5 = mul nsw i32 %4, %0
%6 = add nsw i32 %0, 1
%7 = load i32, ptr @subpgsize, align 4, !tbaa !12
%8 = add nsw i32 %7, %5
%9 = mul nsw i32 %4, %6
%10 = icmp sgt i32 %8, %9
br i1 %10, label %81, label %21
11: ; preds = %78
%12 = load i32, ptr @subpgsize, align 4, !tbaa !12
%13 = mul nsw i32 %12, %23
%14 = add nsw i32 %13, %24
%15 = mul nsw i32 %12, %79
%16 = add nsw i32 %15, %14
%17 = load ptr, ptr @mtd, align 8, !tbaa !5
%18 = load i32, ptr %17, align 4, !tbaa !9
%19 = mul nsw i32 %18, %6
%20 = icmp sgt i32 %16, %19
br i1 %20, label %81, label %21, !llvm.loop !13
21: ; preds = %1, %11
%22 = phi i32 [ %15, %11 ], [ %7, %1 ]
%23 = phi i32 [ %79, %11 ], [ 1, %1 ]
%24 = phi i32 [ %14, %11 ], [ %5, %1 ]
%25 = load i32, ptr @writebuf, align 4, !tbaa !12
%26 = call i32 @prandom_bytes_state(ptr noundef nonnull @rnd_state, i32 noundef %25, i32 noundef %22) #3
%27 = load i32, ptr @readbuf, align 4, !tbaa !12
%28 = load i32, ptr @subpgsize, align 4, !tbaa !12
%29 = mul nsw i32 %28, %23
%30 = call i32 @clear_data(i32 noundef %27, i32 noundef %29) #3
%31 = load ptr, ptr @mtd, align 8, !tbaa !5
%32 = load i32, ptr @subpgsize, align 4, !tbaa !12
%33 = mul nsw i32 %32, %23
%34 = load i32, ptr @readbuf, align 4, !tbaa !12
%35 = call i32 @mtd_read(ptr noundef %31, i32 noundef %24, i32 noundef %33, ptr noundef nonnull %2, i32 noundef %34) #3
%36 = icmp eq i32 %35, 0
br i1 %36, label %37, label %43
37: ; preds = %21
%38 = load i64, ptr %2, align 8, !tbaa !15
%39 = load i32, ptr @subpgsize, align 4, !tbaa !12
%40 = mul nsw i32 %39, %23
%41 = sext i32 %40 to i64
%42 = icmp ne i64 %38, %41
br label %43
43: ; preds = %37, %21
%44 = phi i1 [ true, %21 ], [ %42, %37 ]
%45 = zext i1 %44 to i32
%46 = call i64 @unlikely(i32 noundef %45) #3
%47 = icmp eq i64 %46, 0
br i1 %47, label %64, label %48
48: ; preds = %43
%49 = call i64 @mtd_is_bitflip(i32 noundef %35) #3
%50 = icmp eq i64 %49, 0
br i1 %50, label %60, label %51
51: ; preds = %48
%52 = load i64, ptr %2, align 8, !tbaa !15
%53 = load i32, ptr @subpgsize, align 4, !tbaa !12
%54 = mul nsw i32 %53, %23
%55 = sext i32 %54 to i64
%56 = icmp eq i64 %52, %55
br i1 %56, label %57, label %60
57: ; preds = %51
%58 = sext i32 %24 to i64
%59 = call i32 @pr_info(ptr noundef nonnull @.str, i64 noundef %58) #3
br label %64
60: ; preds = %51, %48
%61 = sext i32 %24 to i64
%62 = call i32 @pr_err(ptr noundef nonnull @.str.1, i64 noundef %61) #3
%63 = select i1 %36, i32 -1, i32 %35
br label %81
64: ; preds = %57, %43
%65 = phi i32 [ 0, %57 ], [ %35, %43 ]
%66 = load i32, ptr @readbuf, align 4, !tbaa !12
%67 = load i32, ptr @writebuf, align 4, !tbaa !12
%68 = load i32, ptr @subpgsize, align 4, !tbaa !12
%69 = mul nsw i32 %68, %23
%70 = call i32 @memcmp(i32 noundef %66, i32 noundef %67, i32 noundef %69) #3
%71 = call i64 @unlikely(i32 noundef %70) #3
%72 = icmp eq i64 %71, 0
br i1 %72, label %78, label %73
73: ; preds = %64
%74 = sext i32 %24 to i64
%75 = call i32 @pr_err(ptr noundef nonnull @.str.2, i64 noundef %74) #3
%76 = load i32, ptr @errcnt, align 4, !tbaa !12
%77 = add nsw i32 %76, 1
store i32 %77, ptr @errcnt, align 4, !tbaa !12
br label %78
78: ; preds = %73, %64
%79 = add nuw nsw i32 %23, 1
%80 = icmp eq i32 %79, 33
br i1 %80, label %81, label %11, !llvm.loop !13
81: ; preds = %11, %78, %1, %60
%82 = phi i32 [ %63, %60 ], [ 0, %1 ], [ %65, %78 ], [ %65, %11 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret i32 %82
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @prandom_bytes_state(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @clear_data(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mtd_read(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @unlikely(i32 noundef) local_unnamed_addr #2
declare i64 @mtd_is_bitflip(i32 noundef) local_unnamed_addr #2
declare i32 @pr_info(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @pr_err(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @memcmp(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_3__", !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/mtd/tests/extr_subpagetest.c_verify_eraseblock2.c'
source_filename = "AnghaBench/linux/drivers/mtd/tests/extr_subpagetest.c_verify_eraseblock2.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@mtd = common local_unnamed_addr global ptr null, align 8
@subpgsize = common local_unnamed_addr global i32 0, align 4
@rnd_state = common global i32 0, align 4
@writebuf = common local_unnamed_addr global i32 0, align 4
@readbuf = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"ECC correction at %#llx\0A\00", align 1
@.str.1 = private unnamed_addr constant [29 x i8] c"error: read failed at %#llx\0A\00", align 1
@.str.2 = private unnamed_addr constant [31 x i8] c"error: verify failed at %#llx\0A\00", align 1
@errcnt = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @verify_eraseblock2], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @verify_eraseblock2(i32 noundef %0) #0 {
%2 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%3 = load ptr, ptr @mtd, align 8, !tbaa !6
%4 = load i32, ptr %3, align 4, !tbaa !10
%5 = mul nsw i32 %4, %0
%6 = add nsw i32 %0, 1
%7 = load i32, ptr @subpgsize, align 4, !tbaa !13
%8 = add nsw i32 %7, %5
%9 = mul nsw i32 %4, %6
%10 = icmp sgt i32 %8, %9
br i1 %10, label %81, label %21
11: ; preds = %78
%12 = load i32, ptr @subpgsize, align 4, !tbaa !13
%13 = mul nsw i32 %12, %23
%14 = add nsw i32 %13, %24
%15 = mul nsw i32 %12, %79
%16 = add nsw i32 %15, %14
%17 = load ptr, ptr @mtd, align 8, !tbaa !6
%18 = load i32, ptr %17, align 4, !tbaa !10
%19 = mul nsw i32 %18, %6
%20 = icmp sgt i32 %16, %19
br i1 %20, label %81, label %21, !llvm.loop !14
21: ; preds = %1, %11
%22 = phi i32 [ %15, %11 ], [ %7, %1 ]
%23 = phi i32 [ %79, %11 ], [ 1, %1 ]
%24 = phi i32 [ %14, %11 ], [ %5, %1 ]
%25 = load i32, ptr @writebuf, align 4, !tbaa !13
%26 = call i32 @prandom_bytes_state(ptr noundef nonnull @rnd_state, i32 noundef %25, i32 noundef %22) #3
%27 = load i32, ptr @readbuf, align 4, !tbaa !13
%28 = load i32, ptr @subpgsize, align 4, !tbaa !13
%29 = mul nsw i32 %28, %23
%30 = call i32 @clear_data(i32 noundef %27, i32 noundef %29) #3
%31 = load ptr, ptr @mtd, align 8, !tbaa !6
%32 = load i32, ptr @subpgsize, align 4, !tbaa !13
%33 = mul nsw i32 %32, %23
%34 = load i32, ptr @readbuf, align 4, !tbaa !13
%35 = call i32 @mtd_read(ptr noundef %31, i32 noundef %24, i32 noundef %33, ptr noundef nonnull %2, i32 noundef %34) #3
%36 = icmp eq i32 %35, 0
br i1 %36, label %37, label %43
37: ; preds = %21
%38 = load i64, ptr %2, align 8, !tbaa !16
%39 = load i32, ptr @subpgsize, align 4, !tbaa !13
%40 = mul nsw i32 %39, %23
%41 = sext i32 %40 to i64
%42 = icmp ne i64 %38, %41
br label %43
43: ; preds = %37, %21
%44 = phi i1 [ true, %21 ], [ %42, %37 ]
%45 = zext i1 %44 to i32
%46 = call i64 @unlikely(i32 noundef %45) #3
%47 = icmp eq i64 %46, 0
br i1 %47, label %64, label %48
48: ; preds = %43
%49 = call i64 @mtd_is_bitflip(i32 noundef %35) #3
%50 = icmp eq i64 %49, 0
br i1 %50, label %60, label %51
51: ; preds = %48
%52 = load i64, ptr %2, align 8, !tbaa !16
%53 = load i32, ptr @subpgsize, align 4, !tbaa !13
%54 = mul nsw i32 %53, %23
%55 = sext i32 %54 to i64
%56 = icmp eq i64 %52, %55
br i1 %56, label %57, label %60
57: ; preds = %51
%58 = sext i32 %24 to i64
%59 = call i32 @pr_info(ptr noundef nonnull @.str, i64 noundef %58) #3
br label %64
60: ; preds = %51, %48
%61 = sext i32 %24 to i64
%62 = call i32 @pr_err(ptr noundef nonnull @.str.1, i64 noundef %61) #3
%63 = select i1 %36, i32 -1, i32 %35
br label %81
64: ; preds = %57, %43
%65 = phi i32 [ 0, %57 ], [ %35, %43 ]
%66 = load i32, ptr @readbuf, align 4, !tbaa !13
%67 = load i32, ptr @writebuf, align 4, !tbaa !13
%68 = load i32, ptr @subpgsize, align 4, !tbaa !13
%69 = mul nsw i32 %68, %23
%70 = call i32 @memcmp(i32 noundef %66, i32 noundef %67, i32 noundef %69) #3
%71 = call i64 @unlikely(i32 noundef %70) #3
%72 = icmp eq i64 %71, 0
br i1 %72, label %78, label %73
73: ; preds = %64
%74 = sext i32 %24 to i64
%75 = call i32 @pr_err(ptr noundef nonnull @.str.2, i64 noundef %74) #3
%76 = load i32, ptr @errcnt, align 4, !tbaa !13
%77 = add nsw i32 %76, 1
store i32 %77, ptr @errcnt, align 4, !tbaa !13
br label %78
78: ; preds = %73, %64
%79 = add nuw nsw i32 %23, 1
%80 = icmp eq i32 %79, 33
br i1 %80, label %81, label %11, !llvm.loop !14
81: ; preds = %11, %78, %1, %60
%82 = phi i32 [ %63, %60 ], [ 0, %1 ], [ %65, %78 ], [ %65, %11 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret i32 %82
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @prandom_bytes_state(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @clear_data(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mtd_read(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @unlikely(i32 noundef) local_unnamed_addr #2
declare i64 @mtd_is_bitflip(i32 noundef) local_unnamed_addr #2
declare i32 @pr_info(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @pr_err(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @memcmp(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_3__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!17, !17, i64 0}
!17 = !{!"long", !8, i64 0}
| linux_drivers_mtd_tests_extr_subpagetest.c_verify_eraseblock2 |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/qxl/extr_qxl_cmd.c_qxl_ring_create.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/qxl/extr_qxl_cmd.c_qxl_ring_create.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.qxl_ring = type { i32, i32, i32, i32, ptr, ptr }
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @qxl_ring_create(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5) local_unnamed_addr #0 {
%7 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%8 = tail call ptr @kmalloc(i32 noundef 32, i32 noundef %7) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %21, label %10
10: ; preds = %6
%11 = getelementptr inbounds %struct.qxl_ring, ptr %8, i64 0, i32 5
store ptr %0, ptr %11, align 8, !tbaa !9
store i32 %1, ptr %8, align 8, !tbaa !12
%12 = getelementptr inbounds %struct.qxl_ring, ptr %8, i64 0, i32 1
store i32 %2, ptr %12, align 4, !tbaa !13
%13 = getelementptr inbounds %struct.qxl_ring, ptr %8, i64 0, i32 2
store i32 %3, ptr %13, align 8, !tbaa !14
%14 = getelementptr inbounds %struct.qxl_ring, ptr %8, i64 0, i32 4
store ptr %5, ptr %14, align 8, !tbaa !15
%15 = icmp eq i32 %4, 0
br i1 %15, label %18, label %16
16: ; preds = %10
%17 = tail call i32 @qxl_ring_init_hdr(ptr noundef nonnull %8) #2
br label %18
18: ; preds = %16, %10
%19 = getelementptr inbounds %struct.qxl_ring, ptr %8, i64 0, i32 3
%20 = tail call i32 @spin_lock_init(ptr noundef nonnull %19) #2
br label %21
21: ; preds = %6, %18
ret ptr %8
}
declare ptr @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @qxl_ring_init_hdr(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_init(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 24}
!10 = !{!"qxl_ring", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !11, i64 16, !11, i64 24}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !6, i64 0}
!13 = !{!10, !6, i64 4}
!14 = !{!10, !6, i64 8}
!15 = !{!10, !11, i64 16}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/qxl/extr_qxl_cmd.c_qxl_ring_create.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/qxl/extr_qxl_cmd.c_qxl_ring_create.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @qxl_ring_create(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5) local_unnamed_addr #0 {
%7 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%8 = tail call ptr @kmalloc(i32 noundef 32, i32 noundef %7) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %21, label %10
10: ; preds = %6
%11 = getelementptr inbounds i8, ptr %8, i64 24
store ptr %0, ptr %11, align 8, !tbaa !10
store i32 %1, ptr %8, align 8, !tbaa !13
%12 = getelementptr inbounds i8, ptr %8, i64 4
store i32 %2, ptr %12, align 4, !tbaa !14
%13 = getelementptr inbounds i8, ptr %8, i64 8
store i32 %3, ptr %13, align 8, !tbaa !15
%14 = getelementptr inbounds i8, ptr %8, i64 16
store ptr %5, ptr %14, align 8, !tbaa !16
%15 = icmp eq i32 %4, 0
br i1 %15, label %18, label %16
16: ; preds = %10
%17 = tail call i32 @qxl_ring_init_hdr(ptr noundef nonnull %8) #2
br label %18
18: ; preds = %16, %10
%19 = getelementptr inbounds i8, ptr %8, i64 12
%20 = tail call i32 @spin_lock_init(ptr noundef nonnull %19) #2
br label %21
21: ; preds = %6, %18
ret ptr %8
}
declare ptr @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @qxl_ring_init_hdr(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_init(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 24}
!11 = !{!"qxl_ring", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !12, i64 16, !12, i64 24}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !7, i64 0}
!14 = !{!11, !7, i64 4}
!15 = !{!11, !7, i64 8}
!16 = !{!11, !12, i64 16}
| linux_drivers_gpu_drm_qxl_extr_qxl_cmd.c_qxl_ring_create |
; ModuleID = 'AnghaBench/freebsd/sys/dev/ixl/extr_ixl_pf_main.c_ixl_enable_intr.c'
source_filename = "AnghaBench/freebsd/sys/dev/ixl/extr_ixl_pf_main.c_ixl_enable_intr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ixl_vsi = type { i32, ptr, ptr, ptr }
%struct.ixl_rx_queue = type { %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32 }
@IFLIB_INTR_MSIX = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind uwtable
define dso_local void @ixl_enable_intr(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds %struct.ixl_vsi, ptr %0, i64 0, i32 3
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = getelementptr inbounds %struct.ixl_vsi, ptr %0, i64 0, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !11
%6 = load i64, ptr %5, align 8, !tbaa !12
%7 = load i64, ptr @IFLIB_INTR_MSIX, align 8, !tbaa !15
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %24
9: ; preds = %1
%10 = load i32, ptr %0, align 8, !tbaa !16
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %26
12: ; preds = %9
%13 = getelementptr inbounds %struct.ixl_vsi, ptr %0, i64 0, i32 2
%14 = load ptr, ptr %13, align 8, !tbaa !17
br label %15
15: ; preds = %12, %15
%16 = phi i32 [ %20, %15 ], [ 0, %12 ]
%17 = phi ptr [ %21, %15 ], [ %14, %12 ]
%18 = load i32, ptr %17, align 4, !tbaa !18
%19 = tail call i32 @ixl_enable_queue(ptr noundef %3, i32 noundef %18) #2
%20 = add nuw nsw i32 %16, 1
%21 = getelementptr inbounds %struct.ixl_rx_queue, ptr %17, i64 1
%22 = load i32, ptr %0, align 8, !tbaa !16
%23 = icmp slt i32 %20, %22
br i1 %23, label %15, label %26, !llvm.loop !21
24: ; preds = %1
%25 = tail call i32 @ixl_enable_intr0(ptr noundef %3) #2
br label %26
26: ; preds = %15, %9, %24
ret void
}
declare i32 @ixl_enable_queue(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ixl_enable_intr0(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 24}
!6 = !{!"ixl_vsi", !7, i64 0, !10, i64 8, !10, i64 16, !10, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_3__", !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!14, !14, i64 0}
!16 = !{!6, !7, i64 0}
!17 = !{!6, !10, i64 16}
!18 = !{!19, !7, i64 0}
!19 = !{!"ixl_rx_queue", !20, i64 0}
!20 = !{!"TYPE_4__", !7, i64 0}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/ixl/extr_ixl_pf_main.c_ixl_enable_intr.c'
source_filename = "AnghaBench/freebsd/sys/dev/ixl/extr_ixl_pf_main.c_ixl_enable_intr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IFLIB_INTR_MSIX = common local_unnamed_addr global i64 0, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @ixl_enable_intr(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 24
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !12
%6 = load i64, ptr %5, align 8, !tbaa !13
%7 = load i64, ptr @IFLIB_INTR_MSIX, align 8, !tbaa !16
%8 = icmp eq i64 %6, %7
br i1 %8, label %9, label %24
9: ; preds = %1
%10 = load i32, ptr %0, align 8, !tbaa !17
%11 = icmp sgt i32 %10, 0
br i1 %11, label %12, label %26
12: ; preds = %9
%13 = getelementptr inbounds i8, ptr %0, i64 16
%14 = load ptr, ptr %13, align 8, !tbaa !18
br label %15
15: ; preds = %12, %15
%16 = phi i32 [ %20, %15 ], [ 0, %12 ]
%17 = phi ptr [ %21, %15 ], [ %14, %12 ]
%18 = load i32, ptr %17, align 4, !tbaa !19
%19 = tail call i32 @ixl_enable_queue(ptr noundef %3, i32 noundef %18) #2
%20 = add nuw nsw i32 %16, 1
%21 = getelementptr inbounds i8, ptr %17, i64 4
%22 = load i32, ptr %0, align 8, !tbaa !17
%23 = icmp slt i32 %20, %22
br i1 %23, label %15, label %26, !llvm.loop !22
24: ; preds = %1
%25 = tail call i32 @ixl_enable_intr0(ptr noundef %3) #2
br label %26
26: ; preds = %15, %9, %24
ret void
}
declare i32 @ixl_enable_queue(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ixl_enable_intr0(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 24}
!7 = !{!"ixl_vsi", !8, i64 0, !11, i64 8, !11, i64 16, !11, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!14, !15, i64 0}
!14 = !{!"TYPE_3__", !15, i64 0}
!15 = !{!"long", !9, i64 0}
!16 = !{!15, !15, i64 0}
!17 = !{!7, !8, i64 0}
!18 = !{!7, !11, i64 16}
!19 = !{!20, !8, i64 0}
!20 = !{!"ixl_rx_queue", !21, i64 0}
!21 = !{!"TYPE_4__", !8, i64 0}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
| freebsd_sys_dev_ixl_extr_ixl_pf_main.c_ixl_enable_intr |
; ModuleID = 'AnghaBench/lede/package/lean/luci-app-xlnetacc/tools/po2lmo/src/extr_po2lmo.c_die.c'
source_filename = "AnghaBench/lede/package/lean/luci-app-xlnetacc/tools/po2lmo/src/extr_po2lmo.c_die.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@stderr = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [11 x i8] c"Error: %s\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @die], section "llvm.metadata"
; Function Attrs: noreturn nounwind uwtable
define internal void @die(ptr noundef %0) #0 {
%2 = load i32, ptr @stderr, align 4, !tbaa !5
%3 = tail call i32 @fprintf(i32 noundef %2, ptr noundef nonnull @.str, ptr noundef %0) #3
%4 = tail call i32 @exit(i32 noundef 1) #4
unreachable
}
declare i32 @fprintf(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/lede/package/lean/luci-app-xlnetacc/tools/po2lmo/src/extr_po2lmo.c_die.c'
source_filename = "AnghaBench/lede/package/lean/luci-app-xlnetacc/tools/po2lmo/src/extr_po2lmo.c_die.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@stderr = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [11 x i8] c"Error: %s\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @die], section "llvm.metadata"
; Function Attrs: noreturn nounwind ssp uwtable(sync)
define internal void @die(ptr noundef %0) #0 {
%2 = load i32, ptr @stderr, align 4, !tbaa !6
%3 = tail call i32 @fprintf(i32 noundef %2, ptr noundef nonnull @.str, ptr noundef %0) #3
%4 = tail call i32 @exit(i32 noundef 1) #4
unreachable
}
declare i32 @fprintf(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| lede_package_lean_luci-app-xlnetacc_tools_po2lmo_src_extr_po2lmo.c_die |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/extr_wl3501_cs.c_wl3501_esbq_confirm_done.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/extr_wl3501_cs.c_wl3501_esbq_confirm_done.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.wl3501_card = type { i64, i64, i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @wl3501_esbq_confirm_done], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @wl3501_esbq_confirm_done(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 0, ptr %2, align 4, !tbaa !5
%3 = load i64, ptr %0, align 8, !tbaa !9
%4 = add nsw i64 %3, 3
%5 = call i32 @wl3501_set_to_wla(ptr noundef nonnull %0, i64 noundef %4, ptr noundef nonnull %2, i32 noundef 4) #3
%6 = load i64, ptr %0, align 8, !tbaa !9
%7 = add nsw i64 %6, 4
store i64 %7, ptr %0, align 8, !tbaa !9
%8 = getelementptr inbounds %struct.wl3501_card, ptr %0, i64 0, i32 1
%9 = load i64, ptr %8, align 8, !tbaa !12
%10 = icmp slt i64 %7, %9
br i1 %10, label %14, label %11
11: ; preds = %1
%12 = getelementptr inbounds %struct.wl3501_card, ptr %0, i64 0, i32 2
%13 = load i64, ptr %12, align 8, !tbaa !13
store i64 %13, ptr %0, align 8, !tbaa !9
br label %14
14: ; preds = %11, %1
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @wl3501_set_to_wla(ptr noundef, i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"wl3501_card", !11, i64 0, !11, i64 8, !11, i64 16}
!11 = !{!"long", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!10, !11, i64 16}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/extr_wl3501_cs.c_wl3501_esbq_confirm_done.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/extr_wl3501_cs.c_wl3501_esbq_confirm_done.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @wl3501_esbq_confirm_done], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @wl3501_esbq_confirm_done(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
store i32 0, ptr %2, align 4, !tbaa !6
%3 = load i64, ptr %0, align 8, !tbaa !10
%4 = add nsw i64 %3, 3
%5 = call i32 @wl3501_set_to_wla(ptr noundef nonnull %0, i64 noundef %4, ptr noundef nonnull %2, i32 noundef 4) #3
%6 = load i64, ptr %0, align 8, !tbaa !10
%7 = add nsw i64 %6, 4
store i64 %7, ptr %0, align 8, !tbaa !10
%8 = getelementptr inbounds i8, ptr %0, i64 8
%9 = load i64, ptr %8, align 8, !tbaa !13
%10 = icmp slt i64 %7, %9
br i1 %10, label %14, label %11
11: ; preds = %1
%12 = getelementptr inbounds i8, ptr %0, i64 16
%13 = load i64, ptr %12, align 8, !tbaa !14
store i64 %13, ptr %0, align 8, !tbaa !10
br label %14
14: ; preds = %11, %1
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @wl3501_set_to_wla(ptr noundef, i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"wl3501_card", !12, i64 0, !12, i64 8, !12, i64 16}
!12 = !{!"long", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!11, !12, i64 16}
| fastsocket_kernel_drivers_net_wireless_extr_wl3501_cs.c_wl3501_esbq_confirm_done |
; ModuleID = 'AnghaBench/freebsd/contrib/byacc/test/btyacc/extr_btyacc_calc1.tab.c_yygrowstack.c'
source_filename = "AnghaBench/freebsd/contrib/byacc/test/btyacc/extr_btyacc_calc1.tab.c_yygrowstack.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr }
@YYINITSTACKSIZE = dso_local local_unnamed_addr global i32 0, align 4
@YYMAXDEPTH = dso_local local_unnamed_addr global i32 0, align 4
@YYENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@YYPREFIX = dso_local local_unnamed_addr global ptr null, align 8
@stderr = dso_local local_unnamed_addr global i32 0, align 4
@yydebug = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @yygrowstack], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @yygrowstack(ptr nocapture noundef %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !5
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = load i32, ptr @YYINITSTACKSIZE, align 4, !tbaa !11
br label %14
6: ; preds = %1
%7 = load i32, ptr @YYMAXDEPTH, align 4, !tbaa !11
%8 = icmp ult i32 %2, %7
br i1 %8, label %11, label %9
9: ; preds = %6
%10 = load i32, ptr @YYENOMEM, align 4, !tbaa !11
br label %48
11: ; preds = %6
%12 = shl i32 %2, 1
%13 = tail call i32 @llvm.umin.i32(i32 %12, i32 %7)
br label %14
14: ; preds = %11, %4
%15 = phi i32 [ %5, %4 ], [ %13, %11 ]
%16 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 7
%17 = load ptr, ptr %16, align 8, !tbaa !12
%18 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%19 = load ptr, ptr %18, align 8, !tbaa !13
%20 = zext i32 %15 to i64
%21 = shl i32 %15, 2
%22 = tail call i64 @realloc(ptr noundef %19, i32 noundef %21) #3
%23 = icmp eq i64 %22, 0
br i1 %23, label %24, label %26
24: ; preds = %14
%25 = load i32, ptr @YYENOMEM, align 4, !tbaa !11
br label %48
26: ; preds = %14
%27 = inttoptr i64 %22 to ptr
%28 = ptrtoint ptr %17 to i64
%29 = ptrtoint ptr %19 to i64
%30 = sub i64 %28, %29
store ptr %27, ptr %18, align 8, !tbaa !13
%31 = shl i64 %30, 30
%32 = ashr i64 %31, 32
%33 = getelementptr inbounds i32, ptr %27, i64 %32
store ptr %33, ptr %16, align 8, !tbaa !12
%34 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 6
%35 = load ptr, ptr %34, align 8, !tbaa !14
%36 = tail call i64 @realloc(ptr noundef %35, i32 noundef %21) #3
%37 = icmp eq i64 %36, 0
br i1 %37, label %38, label %40
38: ; preds = %26
%39 = load i32, ptr @YYENOMEM, align 4, !tbaa !11
br label %48
40: ; preds = %26
%41 = inttoptr i64 %36 to ptr
store ptr %41, ptr %34, align 8, !tbaa !14
%42 = getelementptr inbounds i32, ptr %41, i64 %32
%43 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 5
store ptr %42, ptr %43, align 8, !tbaa !15
store i32 %15, ptr %0, align 8, !tbaa !5
%44 = load ptr, ptr %18, align 8, !tbaa !13
%45 = getelementptr inbounds i32, ptr %44, i64 %20
%46 = getelementptr inbounds i32, ptr %45, i64 -1
%47 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 2
store ptr %46, ptr %47, align 8, !tbaa !16
br label %48
48: ; preds = %40, %38, %24, %9
%49 = phi i32 [ %25, %24 ], [ %39, %38 ], [ 0, %40 ], [ %10, %9 ]
ret i32 %49
}
declare i64 @realloc(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32, !10, i64 40, !10, i64 48, !10, i64 56}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !10, i64 56}
!13 = !{!6, !10, i64 8}
!14 = !{!6, !10, i64 48}
!15 = !{!6, !10, i64 40}
!16 = !{!6, !10, i64 16}
| ; ModuleID = 'AnghaBench/freebsd/contrib/byacc/test/btyacc/extr_btyacc_calc1.tab.c_yygrowstack.c'
source_filename = "AnghaBench/freebsd/contrib/byacc/test/btyacc/extr_btyacc_calc1.tab.c_yygrowstack.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@YYINITSTACKSIZE = common local_unnamed_addr global i32 0, align 4
@YYMAXDEPTH = common local_unnamed_addr global i32 0, align 4
@YYENOMEM = common local_unnamed_addr global i32 0, align 4
@YYPREFIX = common local_unnamed_addr global ptr null, align 8
@stderr = common local_unnamed_addr global i32 0, align 4
@yydebug = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @yygrowstack], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @yygrowstack(ptr nocapture noundef %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !6
%3 = icmp eq i32 %2, 0
br i1 %3, label %4, label %6
4: ; preds = %1
%5 = load i32, ptr @YYINITSTACKSIZE, align 4, !tbaa !12
br label %14
6: ; preds = %1
%7 = load i32, ptr @YYMAXDEPTH, align 4, !tbaa !12
%8 = icmp ult i32 %2, %7
br i1 %8, label %11, label %9
9: ; preds = %6
%10 = load i32, ptr @YYENOMEM, align 4, !tbaa !12
br label %48
11: ; preds = %6
%12 = shl i32 %2, 1
%13 = tail call i32 @llvm.umin.i32(i32 %12, i32 %7)
br label %14
14: ; preds = %11, %4
%15 = phi i32 [ %5, %4 ], [ %13, %11 ]
%16 = getelementptr inbounds i8, ptr %0, i64 56
%17 = load ptr, ptr %16, align 8, !tbaa !13
%18 = getelementptr inbounds i8, ptr %0, i64 8
%19 = load ptr, ptr %18, align 8, !tbaa !14
%20 = zext i32 %15 to i64
%21 = shl i32 %15, 2
%22 = tail call i64 @realloc(ptr noundef %19, i32 noundef %21) #3
%23 = icmp eq i64 %22, 0
br i1 %23, label %24, label %26
24: ; preds = %14
%25 = load i32, ptr @YYENOMEM, align 4, !tbaa !12
br label %48
26: ; preds = %14
%27 = inttoptr i64 %22 to ptr
%28 = ptrtoint ptr %17 to i64
%29 = ptrtoint ptr %19 to i64
%30 = sub i64 %28, %29
store ptr %27, ptr %18, align 8, !tbaa !14
%31 = shl i64 %30, 30
%32 = ashr i64 %31, 32
%33 = getelementptr inbounds i32, ptr %27, i64 %32
store ptr %33, ptr %16, align 8, !tbaa !13
%34 = getelementptr inbounds i8, ptr %0, i64 48
%35 = load ptr, ptr %34, align 8, !tbaa !15
%36 = tail call i64 @realloc(ptr noundef %35, i32 noundef %21) #3
%37 = icmp eq i64 %36, 0
br i1 %37, label %38, label %40
38: ; preds = %26
%39 = load i32, ptr @YYENOMEM, align 4, !tbaa !12
br label %48
40: ; preds = %26
%41 = inttoptr i64 %36 to ptr
store ptr %41, ptr %34, align 8, !tbaa !15
%42 = getelementptr inbounds i32, ptr %41, i64 %32
%43 = getelementptr inbounds i8, ptr %0, i64 40
store ptr %42, ptr %43, align 8, !tbaa !16
store i32 %15, ptr %0, align 8, !tbaa !6
%44 = load ptr, ptr %18, align 8, !tbaa !14
%45 = getelementptr inbounds i32, ptr %44, i64 %20
%46 = getelementptr inbounds i8, ptr %45, i64 -4
%47 = getelementptr inbounds i8, ptr %0, i64 16
store ptr %46, ptr %47, align 8, !tbaa !17
br label %48
48: ; preds = %40, %38, %24, %9
%49 = phi i32 [ %25, %24 ], [ %39, %38 ], [ 0, %40 ], [ %10, %9 ]
ret i32 %49
}
declare i64 @realloc(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40, !11, i64 48, !11, i64 56}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !11, i64 56}
!14 = !{!7, !11, i64 8}
!15 = !{!7, !11, i64 48}
!16 = !{!7, !11, i64 40}
!17 = !{!7, !11, i64 16}
| freebsd_contrib_byacc_test_btyacc_extr_btyacc_calc1.tab.c_yygrowstack |
; ModuleID = 'AnghaBench/nginx/src/os/win32/extr_ngx_alloc.c_ngx_alloc.c'
source_filename = "AnghaBench/nginx/src/os/win32/extr_ngx_alloc.c_ngx_alloc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@NGX_LOG_EMERG = dso_local local_unnamed_addr global i32 0, align 4
@ngx_errno = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [19 x i8] c"malloc(%uz) failed\00", align 1
@NGX_LOG_DEBUG_ALLOC = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [15 x i8] c"malloc: %p:%uz\00", align 1
; Function Attrs: nounwind uwtable
define dso_local noundef ptr @ngx_alloc(i64 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @malloc(i64 noundef %0) #3
%4 = icmp eq ptr %3, null
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load i32, ptr @NGX_LOG_EMERG, align 4, !tbaa !5
%7 = load i32, ptr @ngx_errno, align 4, !tbaa !5
%8 = tail call i32 @ngx_log_error(i32 noundef %6, ptr noundef %1, i32 noundef %7, ptr noundef nonnull @.str, i64 noundef %0) #4
br label %9
9: ; preds = %5, %2
%10 = load i32, ptr @NGX_LOG_DEBUG_ALLOC, align 4, !tbaa !5
%11 = tail call i32 @ngx_log_debug2(i32 noundef %10, ptr noundef %1, i32 noundef 0, ptr noundef nonnull @.str.1, ptr noundef %3, i64 noundef %0) #4
ret ptr %3
}
; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @malloc(i64 noundef) local_unnamed_addr #1
declare i32 @ngx_log_error(i32 noundef, ptr noundef, i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @ngx_log_debug2(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { allocsize(0) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/nginx/src/os/win32/extr_ngx_alloc.c_ngx_alloc.c'
source_filename = "AnghaBench/nginx/src/os/win32/extr_ngx_alloc.c_ngx_alloc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NGX_LOG_EMERG = common local_unnamed_addr global i32 0, align 4
@ngx_errno = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [19 x i8] c"malloc(%uz) failed\00", align 1
@NGX_LOG_DEBUG_ALLOC = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [15 x i8] c"malloc: %p:%uz\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define noundef ptr @ngx_alloc(i64 noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @malloc(i64 noundef %0) #3
%4 = icmp eq ptr %3, null
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load i32, ptr @NGX_LOG_EMERG, align 4, !tbaa !6
%7 = load i32, ptr @ngx_errno, align 4, !tbaa !6
%8 = tail call i32 @ngx_log_error(i32 noundef %6, ptr noundef %1, i32 noundef %7, ptr noundef nonnull @.str, i64 noundef %0) #4
br label %9
9: ; preds = %5, %2
%10 = load i32, ptr @NGX_LOG_DEBUG_ALLOC, align 4, !tbaa !6
%11 = tail call i32 @ngx_log_debug2(i32 noundef %10, ptr noundef %1, i32 noundef 0, ptr noundef nonnull @.str.1, ptr noundef %3, i64 noundef %0) #4
ret ptr %3
}
; Function Attrs: mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @malloc(i64 noundef) local_unnamed_addr #1
declare i32 @ngx_log_error(i32 noundef, ptr noundef, i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @ngx_log_debug2(i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nofree nounwind willreturn allockind("alloc,uninitialized") allocsize(0) memory(inaccessiblemem: readwrite) "alloc-family"="malloc" "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { allocsize(0) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| nginx_src_os_win32_extr_ngx_alloc.c_ngx_alloc |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/hwmon/extr_adt7475.c_rpm2tach.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/hwmon/extr_adt7475.c_rpm2tach.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @rpm2tach], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @rpm2tach(i64 noundef %0) #0 {
%2 = icmp eq i64 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = udiv i64 5400000, %0
%5 = trunc i64 %4 to i32
%6 = tail call i32 @SENSORS_LIMIT(i32 noundef %5, i32 noundef 1, i32 noundef 65535) #2
br label %7
7: ; preds = %1, %3
%8 = phi i32 [ %6, %3 ], [ 0, %1 ]
ret i32 %8
}
declare i32 @SENSORS_LIMIT(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/hwmon/extr_adt7475.c_rpm2tach.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/hwmon/extr_adt7475.c_rpm2tach.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @rpm2tach], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @rpm2tach(i64 noundef %0) #0 {
%2 = icmp eq i64 %0, 0
br i1 %2, label %7, label %3
3: ; preds = %1
%4 = udiv i64 5400000, %0
%5 = trunc nuw nsw i64 %4 to i32
%6 = tail call i32 @SENSORS_LIMIT(i32 noundef %5, i32 noundef 1, i32 noundef 65535) #2
br label %7
7: ; preds = %1, %3
%8 = phi i32 [ %6, %3 ], [ 0, %1 ]
ret i32 %8
}
declare i32 @SENSORS_LIMIT(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_hwmon_extr_adt7475.c_rpm2tach |
; ModuleID = 'AnghaBench/linux/drivers/block/rsxx/extr_cregs.c_rsxx_get_card_state.c'
source_filename = "AnghaBench/linux/drivers/block/rsxx/extr_cregs.c_rsxx_get_card_state.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@CREG_ADD_CARD_STATE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @rsxx_get_card_state(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @CREG_ADD_CARD_STATE, align 4, !tbaa !5
%4 = tail call i32 @rsxx_creg_read(ptr noundef %0, i32 noundef %3, i32 noundef 4, ptr noundef %1, i32 noundef 0) #2
ret i32 %4
}
declare i32 @rsxx_creg_read(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/block/rsxx/extr_cregs.c_rsxx_get_card_state.c'
source_filename = "AnghaBench/linux/drivers/block/rsxx/extr_cregs.c_rsxx_get_card_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CREG_ADD_CARD_STATE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @rsxx_get_card_state(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr @CREG_ADD_CARD_STATE, align 4, !tbaa !6
%4 = tail call i32 @rsxx_creg_read(ptr noundef %0, i32 noundef %3, i32 noundef 4, ptr noundef %1, i32 noundef 0) #2
ret i32 %4
}
declare i32 @rsxx_creg_read(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_block_rsxx_extr_cregs.c_rsxx_get_card_state |
; ModuleID = 'AnghaBench/radare2/libr/io/p/extr_io_default.c_r_io_def_mmap_write.c'
source_filename = "AnghaBench/radare2/libr/io/p/extr_io_default.c_r_io_def_mmap_write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, i32, ptr }
%struct.TYPE_7__ = type { i32, i32, i64, i32, i64 }
@SEEK_SET = dso_local local_unnamed_addr global i32 0, align 4
@R_PERM_W = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [60 x i8] c"io_def_mmap: failed to refresh the def_mmap backed buffer.\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @r_io_def_mmap_write], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @r_io_def_mmap_write(ptr noundef readonly %0, ptr noundef readonly %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = icmp ne ptr %0, null
%6 = icmp ne ptr %1, null
%7 = and i1 %5, %6
br i1 %7, label %8, label %15
8: ; preds = %4
%9 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 2
%10 = load ptr, ptr %9, align 8, !tbaa !5
%11 = icmp ne ptr %10, null
%12 = icmp ne ptr %2, null
%13 = and i1 %12, %11
%14 = zext i1 %13 to i32
br label %15
15: ; preds = %8, %4
%16 = phi i32 [ 0, %4 ], [ %14, %8 ]
%17 = tail call i32 @r_return_val_if_fail(i32 noundef %16, i32 noundef -1) #2
%18 = load i32, ptr %0, align 4, !tbaa !11
%19 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 2
%20 = load ptr, ptr %19, align 8, !tbaa !5
%21 = getelementptr inbounds %struct.TYPE_7__, ptr %20, i64 0, i32 4
%22 = load i64, ptr %21, align 8, !tbaa !13
%23 = icmp eq i64 %22, 0
br i1 %23, label %95, label %24
24: ; preds = %15
%25 = load i32, ptr %1, align 8, !tbaa !16
%26 = icmp eq i32 %25, 0
br i1 %26, label %87, label %27
27: ; preds = %24
%28 = srem i32 %18, %25
%29 = sub nsw i32 %18, %28
%30 = icmp slt i32 %28, 0
br i1 %30, label %136, label %31
31: ; preds = %27
%32 = srem i32 %3, %25
%33 = sub nsw i32 %25, %32
%34 = add nsw i32 %33, %3
%35 = add nsw i32 %34, %25
%36 = tail call ptr @malloc(i32 noundef %35) #2
%37 = icmp eq ptr %36, null
br i1 %37, label %85, label %38
38: ; preds = %31
%39 = tail call i32 @memset(ptr noundef nonnull %36, i32 noundef 255, i32 noundef %35) #2
%40 = icmp sgt i32 %34, 0
br i1 %40, label %45, label %41
41: ; preds = %38
%42 = zext nneg i32 %28 to i64
%43 = getelementptr inbounds i8, ptr %36, i64 %42
%44 = tail call i32 @memcpy(ptr noundef nonnull %43, ptr noundef %2, i32 noundef %3) #2
br label %85
45: ; preds = %38
%46 = getelementptr inbounds %struct.TYPE_7__, ptr %20, i64 0, i32 3
%47 = sext i32 %25 to i64
%48 = zext nneg i32 %34 to i64
br label %49
49: ; preds = %45, %49
%50 = phi i64 [ 0, %45 ], [ %59, %49 ]
%51 = load i32, ptr %46, align 8, !tbaa !17
%52 = trunc i64 %50 to i32
%53 = add nsw i32 %29, %52
%54 = load i32, ptr @SEEK_SET, align 4, !tbaa !18
%55 = tail call i64 @lseek(i32 noundef %51, i32 noundef %53, i32 noundef %54) #2
%56 = load i32, ptr %46, align 8, !tbaa !17
%57 = getelementptr inbounds i8, ptr %36, i64 %50
%58 = tail call i32 @read(i32 noundef %56, ptr noundef nonnull %57, i32 noundef %25) #2
%59 = add i64 %50, %47
%60 = icmp slt i64 %59, %48
br i1 %60, label %49, label %61, !llvm.loop !19
61: ; preds = %49
%62 = zext nneg i32 %28 to i64
%63 = getelementptr inbounds i8, ptr %36, i64 %62
%64 = tail call i32 @memcpy(ptr noundef nonnull %63, ptr noundef %2, i32 noundef %3) #2
br i1 %40, label %65, label %85
65: ; preds = %61
%66 = getelementptr inbounds %struct.TYPE_7__, ptr %20, i64 0, i32 3
%67 = sext i32 %25 to i64
%68 = zext nneg i32 %34 to i64
br label %72
69: ; preds = %72
%70 = add i64 %73, %67
%71 = icmp slt i64 %70, %68
br i1 %71, label %72, label %85, !llvm.loop !21
72: ; preds = %65, %69
%73 = phi i64 [ 0, %65 ], [ %70, %69 ]
%74 = load i32, ptr %66, align 8, !tbaa !17
%75 = trunc i64 %73 to i32
%76 = add nsw i32 %29, %75
%77 = load i32, ptr @SEEK_SET, align 4, !tbaa !18
%78 = tail call i64 @lseek(i32 noundef %74, i32 noundef %76, i32 noundef %77) #2
%79 = load i32, ptr %66, align 8, !tbaa !17
%80 = getelementptr inbounds i8, ptr %36, i64 %73
%81 = tail call i32 @write(i32 noundef %79, ptr noundef nonnull %80, i32 noundef %25) #2
%82 = icmp eq i32 %81, %25
br i1 %82, label %69, label %83
83: ; preds = %72
%84 = tail call i32 @free(ptr noundef nonnull %36) #2
br label %136
85: ; preds = %69, %41, %61, %31
%86 = tail call i32 @free(ptr noundef %36) #2
br label %136
87: ; preds = %24
%88 = getelementptr inbounds %struct.TYPE_7__, ptr %20, i64 0, i32 3
%89 = load i32, ptr %88, align 8, !tbaa !17
%90 = tail call i64 @lseek(i32 noundef %89, i32 noundef %18, i32 noundef 0) #2
%91 = icmp slt i64 %90, 0
br i1 %91, label %136, label %92
92: ; preds = %87
%93 = load i32, ptr %88, align 8, !tbaa !17
%94 = tail call i32 @write(i32 noundef %93, ptr noundef %2, i32 noundef %3) #2
br label %136
95: ; preds = %15
%96 = getelementptr inbounds %struct.TYPE_7__, ptr %20, i64 0, i32 2
%97 = load i64, ptr %96, align 8, !tbaa !22
%98 = icmp eq i64 %97, 0
br i1 %98, label %116, label %99
99: ; preds = %95
%100 = load i32, ptr %20, align 8, !tbaa !23
%101 = load i32, ptr @R_PERM_W, align 4, !tbaa !18
%102 = and i32 %101, %100
%103 = icmp eq i32 %102, 0
br i1 %103, label %136, label %104
104: ; preds = %99
%105 = add nsw i32 %18, %3
%106 = tail call i32 @r_buf_size(i64 noundef %97) #2
%107 = icmp sgt i32 %105, %106
br i1 %107, label %112, label %108
108: ; preds = %104
%109 = load i64, ptr %96, align 8, !tbaa !22
%110 = tail call i32 @r_buf_size(i64 noundef %109) #2
%111 = icmp eq i32 %110, 0
br i1 %111, label %112, label %116
112: ; preds = %108, %104
%113 = getelementptr inbounds %struct.TYPE_7__, ptr %20, i64 0, i32 1
%114 = load i32, ptr %113, align 4, !tbaa !24
%115 = tail call i32 @r_file_truncate(i32 noundef %114, i32 noundef %105) #2
br label %116
116: ; preds = %108, %112, %95
%117 = getelementptr inbounds %struct.TYPE_7__, ptr %20, i64 0, i32 1
%118 = load i32, ptr %117, align 4, !tbaa !24
%119 = load i32, ptr %0, align 4, !tbaa !11
%120 = tail call i32 @r_file_mmap_write(i32 noundef %118, i32 noundef %119, ptr noundef %2, i32 noundef %3) #2
%121 = icmp eq i32 %120, %3
br i1 %121, label %130, label %122
122: ; preds = %116
%123 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 1
%124 = load i32, ptr %123, align 4, !tbaa !25
%125 = tail call i64 @lseek(i32 noundef %124, i32 noundef %18, i32 noundef 0) #2
%126 = icmp slt i64 %125, 0
br i1 %126, label %136, label %127
127: ; preds = %122
%128 = load i32, ptr %123, align 4, !tbaa !25
%129 = tail call i32 @write(i32 noundef %128, ptr noundef %2, i32 noundef %3) #2
br label %130
130: ; preds = %127, %116
%131 = phi i32 [ %129, %127 ], [ %3, %116 ]
%132 = tail call i32 @r_io_def_mmap_refresh_def_mmap_buf(ptr noundef nonnull %20) #2
%133 = icmp eq i32 %132, 0
br i1 %133, label %134, label %136
134: ; preds = %130
%135 = tail call i32 @eprintf(ptr noundef nonnull @.str) #2
br label %136
136: ; preds = %83, %130, %134, %122, %99, %87, %85, %27, %92
%137 = phi i32 [ %94, %92 ], [ %3, %85 ], [ -1, %27 ], [ -1, %87 ], [ -1, %99 ], [ -1, %122 ], [ %131, %134 ], [ %131, %130 ], [ %81, %83 ]
ret i32 %137
}
declare i32 @r_return_val_if_fail(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @malloc(i32 noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @lseek(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @read(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @write(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
declare i32 @r_buf_size(i64 noundef) local_unnamed_addr #1
declare i32 @r_file_truncate(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @r_file_mmap_write(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @r_io_def_mmap_refresh_def_mmap_buf(ptr noundef) local_unnamed_addr #1
declare i32 @eprintf(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_8__", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"TYPE_9__", !7, i64 0}
!13 = !{!14, !15, i64 24}
!14 = !{!"TYPE_7__", !7, i64 0, !7, i64 4, !15, i64 8, !7, i64 16, !15, i64 24}
!15 = !{!"long", !8, i64 0}
!16 = !{!6, !7, i64 0}
!17 = !{!14, !7, i64 16}
!18 = !{!7, !7, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = distinct !{!21, !20}
!22 = !{!14, !15, i64 8}
!23 = !{!14, !7, i64 0}
!24 = !{!14, !7, i64 4}
!25 = !{!6, !7, i64 4}
| ; ModuleID = 'AnghaBench/radare2/libr/io/p/extr_io_default.c_r_io_def_mmap_write.c'
source_filename = "AnghaBench/radare2/libr/io/p/extr_io_default.c_r_io_def_mmap_write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SEEK_SET = common local_unnamed_addr global i32 0, align 4
@R_PERM_W = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [60 x i8] c"io_def_mmap: failed to refresh the def_mmap backed buffer.\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @r_io_def_mmap_write], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @r_io_def_mmap_write(ptr noundef readonly %0, ptr noundef readonly %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = icmp ne ptr %0, null
%6 = icmp ne ptr %1, null
%7 = and i1 %5, %6
br i1 %7, label %8, label %15
8: ; preds = %4
%9 = getelementptr inbounds i8, ptr %1, i64 8
%10 = load ptr, ptr %9, align 8, !tbaa !6
%11 = icmp ne ptr %10, null
%12 = icmp ne ptr %2, null
%13 = and i1 %12, %11
%14 = zext i1 %13 to i32
br label %15
15: ; preds = %8, %4
%16 = phi i32 [ 0, %4 ], [ %14, %8 ]
%17 = tail call i32 @r_return_val_if_fail(i32 noundef %16, i32 noundef -1) #2
%18 = load i32, ptr %0, align 4, !tbaa !12
%19 = getelementptr inbounds i8, ptr %1, i64 8
%20 = load ptr, ptr %19, align 8, !tbaa !6
%21 = getelementptr inbounds i8, ptr %20, i64 24
%22 = load i64, ptr %21, align 8, !tbaa !14
%23 = icmp eq i64 %22, 0
br i1 %23, label %91, label %24
24: ; preds = %15
%25 = load i32, ptr %1, align 8, !tbaa !17
%26 = icmp eq i32 %25, 0
br i1 %26, label %83, label %27
27: ; preds = %24
%28 = srem i32 %18, %25
%29 = sub nsw i32 %18, %28
%30 = icmp slt i32 %28, 0
br i1 %30, label %132, label %31
31: ; preds = %27
%32 = srem i32 %3, %25
%33 = sub nsw i32 %25, %32
%34 = add nsw i32 %33, %3
%35 = add nsw i32 %34, %25
%36 = tail call ptr @malloc(i32 noundef %35) #2
%37 = icmp eq ptr %36, null
br i1 %37, label %81, label %38
38: ; preds = %31
%39 = tail call i32 @memset(ptr noundef nonnull %36, i32 noundef 255, i32 noundef %35) #2
%40 = icmp sgt i32 %34, 0
br i1 %40, label %45, label %41
41: ; preds = %38
%42 = zext nneg i32 %28 to i64
%43 = getelementptr inbounds i8, ptr %36, i64 %42
%44 = tail call i32 @memcpy(ptr noundef nonnull %43, ptr noundef %2, i32 noundef %3) #2
br label %81
45: ; preds = %38
%46 = getelementptr inbounds i8, ptr %20, i64 16
%47 = sext i32 %25 to i64
%48 = zext nneg i32 %34 to i64
br label %49
49: ; preds = %45, %49
%50 = phi i64 [ 0, %45 ], [ %59, %49 ]
%51 = load i32, ptr %46, align 8, !tbaa !18
%52 = trunc nsw i64 %50 to i32
%53 = add nsw i32 %29, %52
%54 = load i32, ptr @SEEK_SET, align 4, !tbaa !19
%55 = tail call i64 @lseek(i32 noundef %51, i32 noundef %53, i32 noundef %54) #2
%56 = load i32, ptr %46, align 8, !tbaa !18
%57 = getelementptr inbounds i8, ptr %36, i64 %50
%58 = tail call i32 @read(i32 noundef %56, ptr noundef nonnull %57, i32 noundef %25) #2
%59 = add nsw i64 %50, %47
%60 = icmp slt i64 %59, %48
br i1 %60, label %49, label %61, !llvm.loop !20
61: ; preds = %49
%62 = zext nneg i32 %28 to i64
%63 = getelementptr inbounds i8, ptr %36, i64 %62
%64 = tail call i32 @memcpy(ptr noundef nonnull %63, ptr noundef %2, i32 noundef %3) #2
br label %68
65: ; preds = %68
%66 = add nsw i64 %69, %47
%67 = icmp slt i64 %66, %48
br i1 %67, label %68, label %81, !llvm.loop !22
68: ; preds = %61, %65
%69 = phi i64 [ 0, %61 ], [ %66, %65 ]
%70 = load i32, ptr %46, align 8, !tbaa !18
%71 = trunc nsw i64 %69 to i32
%72 = add nsw i32 %29, %71
%73 = load i32, ptr @SEEK_SET, align 4, !tbaa !19
%74 = tail call i64 @lseek(i32 noundef %70, i32 noundef %72, i32 noundef %73) #2
%75 = load i32, ptr %46, align 8, !tbaa !18
%76 = getelementptr inbounds i8, ptr %36, i64 %69
%77 = tail call i32 @write(i32 noundef %75, ptr noundef nonnull %76, i32 noundef %25) #2
%78 = icmp eq i32 %77, %25
br i1 %78, label %65, label %79
79: ; preds = %68
%80 = tail call i32 @free(ptr noundef nonnull %36) #2
br label %132
81: ; preds = %65, %41, %31
%82 = tail call i32 @free(ptr noundef %36) #2
br label %132
83: ; preds = %24
%84 = getelementptr inbounds i8, ptr %20, i64 16
%85 = load i32, ptr %84, align 8, !tbaa !18
%86 = tail call i64 @lseek(i32 noundef %85, i32 noundef %18, i32 noundef 0) #2
%87 = icmp slt i64 %86, 0
br i1 %87, label %132, label %88
88: ; preds = %83
%89 = load i32, ptr %84, align 8, !tbaa !18
%90 = tail call i32 @write(i32 noundef %89, ptr noundef %2, i32 noundef %3) #2
br label %132
91: ; preds = %15
%92 = getelementptr inbounds i8, ptr %20, i64 8
%93 = load i64, ptr %92, align 8, !tbaa !23
%94 = icmp eq i64 %93, 0
br i1 %94, label %112, label %95
95: ; preds = %91
%96 = load i32, ptr %20, align 8, !tbaa !24
%97 = load i32, ptr @R_PERM_W, align 4, !tbaa !19
%98 = and i32 %97, %96
%99 = icmp eq i32 %98, 0
br i1 %99, label %132, label %100
100: ; preds = %95
%101 = add nsw i32 %18, %3
%102 = tail call i32 @r_buf_size(i64 noundef %93) #2
%103 = icmp sgt i32 %101, %102
br i1 %103, label %108, label %104
104: ; preds = %100
%105 = load i64, ptr %92, align 8, !tbaa !23
%106 = tail call i32 @r_buf_size(i64 noundef %105) #2
%107 = icmp eq i32 %106, 0
br i1 %107, label %108, label %112
108: ; preds = %104, %100
%109 = getelementptr inbounds i8, ptr %20, i64 4
%110 = load i32, ptr %109, align 4, !tbaa !25
%111 = tail call i32 @r_file_truncate(i32 noundef %110, i32 noundef %101) #2
br label %112
112: ; preds = %104, %108, %91
%113 = getelementptr inbounds i8, ptr %20, i64 4
%114 = load i32, ptr %113, align 4, !tbaa !25
%115 = load i32, ptr %0, align 4, !tbaa !12
%116 = tail call i32 @r_file_mmap_write(i32 noundef %114, i32 noundef %115, ptr noundef %2, i32 noundef %3) #2
%117 = icmp eq i32 %116, %3
br i1 %117, label %126, label %118
118: ; preds = %112
%119 = getelementptr inbounds i8, ptr %1, i64 4
%120 = load i32, ptr %119, align 4, !tbaa !26
%121 = tail call i64 @lseek(i32 noundef %120, i32 noundef %18, i32 noundef 0) #2
%122 = icmp slt i64 %121, 0
br i1 %122, label %132, label %123
123: ; preds = %118
%124 = load i32, ptr %119, align 4, !tbaa !26
%125 = tail call i32 @write(i32 noundef %124, ptr noundef %2, i32 noundef %3) #2
br label %126
126: ; preds = %123, %112
%127 = phi i32 [ %125, %123 ], [ %3, %112 ]
%128 = tail call i32 @r_io_def_mmap_refresh_def_mmap_buf(ptr noundef nonnull %20) #2
%129 = icmp eq i32 %128, 0
br i1 %129, label %130, label %132
130: ; preds = %126
%131 = tail call i32 @eprintf(ptr noundef nonnull @.str) #2
br label %132
132: ; preds = %79, %126, %130, %118, %95, %83, %81, %27, %88
%133 = phi i32 [ %90, %88 ], [ %3, %81 ], [ -1, %27 ], [ -1, %83 ], [ -1, %95 ], [ -1, %118 ], [ %127, %130 ], [ %127, %126 ], [ %77, %79 ]
ret i32 %133
}
declare i32 @r_return_val_if_fail(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @malloc(i32 noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @lseek(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @read(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @write(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
declare i32 @r_buf_size(i64 noundef) local_unnamed_addr #1
declare i32 @r_file_truncate(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @r_file_mmap_write(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @r_io_def_mmap_refresh_def_mmap_buf(ptr noundef) local_unnamed_addr #1
declare i32 @eprintf(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_8__", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"TYPE_9__", !8, i64 0}
!14 = !{!15, !16, i64 24}
!15 = !{!"TYPE_7__", !8, i64 0, !8, i64 4, !16, i64 8, !8, i64 16, !16, i64 24}
!16 = !{!"long", !9, i64 0}
!17 = !{!7, !8, i64 0}
!18 = !{!15, !8, i64 16}
!19 = !{!8, !8, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = distinct !{!22, !21}
!23 = !{!15, !16, i64 8}
!24 = !{!15, !8, i64 0}
!25 = !{!15, !8, i64 4}
!26 = !{!7, !8, i64 4}
| radare2_libr_io_p_extr_io_default.c_r_io_def_mmap_write |
; ModuleID = 'AnghaBench/linux/sound/soc/codecs/extr_wm8510.c_wm8510_set_bias_level.c'
source_filename = "AnghaBench/linux/sound/soc/codecs/extr_wm8510.c_wm8510_set_bias_level.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@WM8510_POWER1 = dso_local local_unnamed_addr global i32 0, align 4
@WM8510_POWER1_BIASEN = dso_local local_unnamed_addr global i32 0, align 4
@WM8510_POWER1_BUFIOEN = dso_local local_unnamed_addr global i32 0, align 4
@WM8510_POWER2 = dso_local local_unnamed_addr global i32 0, align 4
@WM8510_POWER3 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @wm8510_set_bias_level], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @wm8510_set_bias_level(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @snd_soc_component_get_drvdata(ptr noundef %0) #2
%4 = load i32, ptr @WM8510_POWER1, align 4, !tbaa !5
%5 = tail call i32 @snd_soc_component_read32(ptr noundef %0, i32 noundef %4) #2
%6 = and i32 %5, -4
switch i32 %1, label %35 [
i32 130, label %7
i32 129, label %7
i32 128, label %9
i32 131, label %25
]
7: ; preds = %2, %2
%8 = or disjoint i32 %6, 1
br label %30
9: ; preds = %2
%10 = load i32, ptr @WM8510_POWER1_BIASEN, align 4, !tbaa !5
%11 = load i32, ptr @WM8510_POWER1_BUFIOEN, align 4, !tbaa !5
%12 = or i32 %10, %11
%13 = or i32 %12, %6
%14 = tail call i32 @snd_soc_component_get_bias_level(ptr noundef %0) #2
%15 = icmp eq i32 %14, 131
br i1 %15, label %16, label %23
16: ; preds = %9
%17 = load i32, ptr %3, align 4, !tbaa !9
%18 = tail call i32 @regcache_sync(i32 noundef %17) #2
%19 = load i32, ptr @WM8510_POWER1, align 4, !tbaa !5
%20 = or i32 %13, 3
%21 = tail call i32 @snd_soc_component_write(ptr noundef %0, i32 noundef %19, i32 noundef %20) #2
%22 = tail call i32 @mdelay(i32 noundef 100) #2
br label %23
23: ; preds = %16, %9
%24 = or i32 %13, 2
br label %30
25: ; preds = %2
%26 = load i32, ptr @WM8510_POWER1, align 4, !tbaa !5
%27 = tail call i32 @snd_soc_component_write(ptr noundef %0, i32 noundef %26, i32 noundef 0) #2
%28 = load i32, ptr @WM8510_POWER2, align 4, !tbaa !5
%29 = tail call i32 @snd_soc_component_write(ptr noundef %0, i32 noundef %28, i32 noundef 0) #2
br label %30
30: ; preds = %7, %23, %25
%31 = phi ptr [ @WM8510_POWER3, %25 ], [ @WM8510_POWER1, %23 ], [ @WM8510_POWER1, %7 ]
%32 = phi i32 [ 0, %25 ], [ %24, %23 ], [ %8, %7 ]
%33 = load i32, ptr %31, align 4, !tbaa !5
%34 = tail call i32 @snd_soc_component_write(ptr noundef %0, i32 noundef %33, i32 noundef %32) #2
br label %35
35: ; preds = %30, %2
ret i32 0
}
declare ptr @snd_soc_component_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @snd_soc_component_read32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snd_soc_component_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snd_soc_component_get_bias_level(ptr noundef) local_unnamed_addr #1
declare i32 @regcache_sync(i32 noundef) local_unnamed_addr #1
declare i32 @mdelay(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"wm8510_priv", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/sound/soc/codecs/extr_wm8510.c_wm8510_set_bias_level.c'
source_filename = "AnghaBench/linux/sound/soc/codecs/extr_wm8510.c_wm8510_set_bias_level.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@WM8510_POWER1 = common local_unnamed_addr global i32 0, align 4
@WM8510_POWER1_BIASEN = common local_unnamed_addr global i32 0, align 4
@WM8510_POWER1_BUFIOEN = common local_unnamed_addr global i32 0, align 4
@WM8510_POWER2 = common local_unnamed_addr global i32 0, align 4
@WM8510_POWER3 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @wm8510_set_bias_level], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @wm8510_set_bias_level(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @snd_soc_component_get_drvdata(ptr noundef %0) #2
%4 = load i32, ptr @WM8510_POWER1, align 4, !tbaa !6
%5 = tail call i32 @snd_soc_component_read32(ptr noundef %0, i32 noundef %4) #2
%6 = and i32 %5, -4
switch i32 %1, label %35 [
i32 130, label %7
i32 129, label %7
i32 128, label %9
i32 131, label %25
]
7: ; preds = %2, %2
%8 = or disjoint i32 %6, 1
br label %30
9: ; preds = %2
%10 = load i32, ptr @WM8510_POWER1_BIASEN, align 4, !tbaa !6
%11 = load i32, ptr @WM8510_POWER1_BUFIOEN, align 4, !tbaa !6
%12 = or i32 %10, %11
%13 = or i32 %12, %6
%14 = tail call i32 @snd_soc_component_get_bias_level(ptr noundef %0) #2
%15 = icmp eq i32 %14, 131
br i1 %15, label %16, label %23
16: ; preds = %9
%17 = load i32, ptr %3, align 4, !tbaa !10
%18 = tail call i32 @regcache_sync(i32 noundef %17) #2
%19 = load i32, ptr @WM8510_POWER1, align 4, !tbaa !6
%20 = or i32 %13, 3
%21 = tail call i32 @snd_soc_component_write(ptr noundef %0, i32 noundef %19, i32 noundef %20) #2
%22 = tail call i32 @mdelay(i32 noundef 100) #2
br label %23
23: ; preds = %16, %9
%24 = or i32 %13, 2
br label %30
25: ; preds = %2
%26 = load i32, ptr @WM8510_POWER1, align 4, !tbaa !6
%27 = tail call i32 @snd_soc_component_write(ptr noundef %0, i32 noundef %26, i32 noundef 0) #2
%28 = load i32, ptr @WM8510_POWER2, align 4, !tbaa !6
%29 = tail call i32 @snd_soc_component_write(ptr noundef %0, i32 noundef %28, i32 noundef 0) #2
br label %30
30: ; preds = %7, %23, %25
%31 = phi ptr [ @WM8510_POWER3, %25 ], [ @WM8510_POWER1, %23 ], [ @WM8510_POWER1, %7 ]
%32 = phi i32 [ 0, %25 ], [ %24, %23 ], [ %8, %7 ]
%33 = load i32, ptr %31, align 4, !tbaa !6
%34 = tail call i32 @snd_soc_component_write(ptr noundef %0, i32 noundef %33, i32 noundef %32) #2
br label %35
35: ; preds = %30, %2
ret i32 0
}
declare ptr @snd_soc_component_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @snd_soc_component_read32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snd_soc_component_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @snd_soc_component_get_bias_level(ptr noundef) local_unnamed_addr #1
declare i32 @regcache_sync(i32 noundef) local_unnamed_addr #1
declare i32 @mdelay(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"wm8510_priv", !7, i64 0}
| linux_sound_soc_codecs_extr_wm8510.c_wm8510_set_bias_level |
; ModuleID = 'AnghaBench/linux/drivers/scsi/qedi/extr_qedi_iscsi.c_qedi_bind_conn_to_iscsi_cid.c'
source_filename = "AnghaBench/linux/drivers/scsi/qedi/extr_qedi_iscsi.c_qedi_bind_conn_to_iscsi_cid.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.qedi_conn = type { i64, ptr }
@KERN_ALERT = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [32 x i8] c"conn bind - entry #%d not free\0A\00", align 1
@EBUSY = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @qedi_bind_conn_to_iscsi_cid], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @qedi_bind_conn_to_iscsi_cid(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = load i64, ptr %1, align 8, !tbaa !5
%4 = load ptr, ptr %0, align 8, !tbaa !11
%5 = getelementptr inbounds ptr, ptr %4, i64 %3
%6 = load ptr, ptr %5, align 8, !tbaa !14
%7 = icmp eq ptr %6, null
br i1 %7, label %16, label %8
8: ; preds = %2
%9 = load i32, ptr @KERN_ALERT, align 4, !tbaa !15
%10 = getelementptr inbounds %struct.qedi_conn, ptr %1, i64 0, i32 1
%11 = load ptr, ptr %10, align 8, !tbaa !17
%12 = load i32, ptr %11, align 4, !tbaa !18
%13 = tail call i32 @iscsi_conn_printk(i32 noundef %9, i32 noundef %12, ptr noundef nonnull @.str, i64 noundef %3) #2
%14 = load i32, ptr @EBUSY, align 4, !tbaa !15
%15 = sub nsw i32 0, %14
br label %17
16: ; preds = %2
store ptr %1, ptr %5, align 8, !tbaa !14
br label %17
17: ; preds = %16, %8
%18 = phi i32 [ %15, %8 ], [ 0, %16 ]
ret i32 %18
}
declare i32 @iscsi_conn_printk(i32 noundef, i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"qedi_conn", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"qedi_ctx", !13, i64 0}
!13 = !{!"TYPE_4__", !10, i64 0}
!14 = !{!10, !10, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !8, i64 0}
!17 = !{!6, !10, i64 8}
!18 = !{!19, !16, i64 0}
!19 = !{!"TYPE_3__", !16, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/qedi/extr_qedi_iscsi.c_qedi_bind_conn_to_iscsi_cid.c'
source_filename = "AnghaBench/linux/drivers/scsi/qedi/extr_qedi_iscsi.c_qedi_bind_conn_to_iscsi_cid.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@KERN_ALERT = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [32 x i8] c"conn bind - entry #%d not free\0A\00", align 1
@EBUSY = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @qedi_bind_conn_to_iscsi_cid], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @qedi_bind_conn_to_iscsi_cid(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = load i64, ptr %1, align 8, !tbaa !6
%4 = load ptr, ptr %0, align 8, !tbaa !12
%5 = getelementptr inbounds ptr, ptr %4, i64 %3
%6 = load ptr, ptr %5, align 8, !tbaa !15
%7 = icmp eq ptr %6, null
br i1 %7, label %16, label %8
8: ; preds = %2
%9 = load i32, ptr @KERN_ALERT, align 4, !tbaa !16
%10 = getelementptr inbounds i8, ptr %1, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !18
%12 = load i32, ptr %11, align 4, !tbaa !19
%13 = tail call i32 @iscsi_conn_printk(i32 noundef %9, i32 noundef %12, ptr noundef nonnull @.str, i64 noundef %3) #2
%14 = load i32, ptr @EBUSY, align 4, !tbaa !16
%15 = sub nsw i32 0, %14
br label %17
16: ; preds = %2
store ptr %1, ptr %5, align 8, !tbaa !15
br label %17
17: ; preds = %16, %8
%18 = phi i32 [ %15, %8 ], [ 0, %16 ]
ret i32 %18
}
declare i32 @iscsi_conn_printk(i32 noundef, i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"qedi_conn", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"qedi_ctx", !14, i64 0}
!14 = !{!"TYPE_4__", !11, i64 0}
!15 = !{!11, !11, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"int", !9, i64 0}
!18 = !{!7, !11, i64 8}
!19 = !{!20, !17, i64 0}
!20 = !{!"TYPE_3__", !17, i64 0}
| linux_drivers_scsi_qedi_extr_qedi_iscsi.c_qedi_bind_conn_to_iscsi_cid |
; ModuleID = 'AnghaBench/linux/drivers/mmc/host/extr_sdhci-pci-core.c_sdhci_pci_hw_reset.c'
source_filename = "AnghaBench/linux/drivers/mmc/host/extr_sdhci-pci-core.c_sdhci_pci_hw_reset.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @sdhci_pci_hw_reset], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @sdhci_pci_hw_reset(ptr noundef %0) #0 {
%2 = tail call ptr @sdhci_priv(ptr noundef %0) #2
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = icmp eq ptr %3, null
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 %3(ptr noundef %0) #2
br label %7
7: ; preds = %5, %1
ret void
}
declare ptr @sdhci_priv(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"sdhci_pci_slot", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/mmc/host/extr_sdhci-pci-core.c_sdhci_pci_hw_reset.c'
source_filename = "AnghaBench/linux/drivers/mmc/host/extr_sdhci-pci-core.c_sdhci_pci_hw_reset.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @sdhci_pci_hw_reset], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @sdhci_pci_hw_reset(ptr noundef %0) #0 {
%2 = tail call ptr @sdhci_priv(ptr noundef %0) #2
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = icmp eq ptr %3, null
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 %3(ptr noundef %0) #2
br label %7
7: ; preds = %5, %1
ret void
}
declare ptr @sdhci_priv(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"sdhci_pci_slot", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_mmc_host_extr_sdhci-pci-core.c_sdhci_pci_hw_reset |
; ModuleID = 'AnghaBench/linux/arch/x86/kvm/vmx/extr_vmx.c_vmx_set_apic_access_page_addr.c'
source_filename = "AnghaBench/linux/arch/x86/kvm/vmx/extr_vmx.c_vmx_set_apic_access_page_addr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@APIC_ACCESS_ADDR = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @vmx_set_apic_access_page_addr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @vmx_set_apic_access_page_addr(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call i32 @is_guest_mode(ptr noundef %0) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load i32, ptr @APIC_ACCESS_ADDR, align 4, !tbaa !5
%7 = tail call i32 @vmcs_write64(i32 noundef %6, i32 noundef %1) #2
%8 = tail call i32 @vmx_flush_tlb(ptr noundef %0, i32 noundef 1) #2
br label %9
9: ; preds = %5, %2
ret void
}
declare i32 @is_guest_mode(ptr noundef) local_unnamed_addr #1
declare i32 @vmcs_write64(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vmx_flush_tlb(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/arch/x86/kvm/vmx/extr_vmx.c_vmx_set_apic_access_page_addr.c'
source_filename = "AnghaBench/linux/arch/x86/kvm/vmx/extr_vmx.c_vmx_set_apic_access_page_addr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@APIC_ACCESS_ADDR = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @vmx_set_apic_access_page_addr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @vmx_set_apic_access_page_addr(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call i32 @is_guest_mode(ptr noundef %0) #2
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load i32, ptr @APIC_ACCESS_ADDR, align 4, !tbaa !6
%7 = tail call i32 @vmcs_write64(i32 noundef %6, i32 noundef %1) #2
%8 = tail call i32 @vmx_flush_tlb(ptr noundef %0, i32 noundef 1) #2
br label %9
9: ; preds = %5, %2
ret void
}
declare i32 @is_guest_mode(ptr noundef) local_unnamed_addr #1
declare i32 @vmcs_write64(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vmx_flush_tlb(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_arch_x86_kvm_vmx_extr_vmx.c_vmx_set_apic_access_page_addr |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/qlogic/qlcnic/extr_qlcnic_dcb.h_qlcnic_dcb_get_cee_cfg.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/qlogic/qlcnic/extr_qlcnic_dcb.h_qlcnic_dcb_get_cee_cfg.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @qlcnic_dcb_get_cee_cfg], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @qlcnic_dcb_get_cee_cfg(ptr noundef %0) #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = load ptr, ptr %0, align 8, !tbaa !5
%5 = load ptr, ptr %4, align 8, !tbaa !10
%6 = icmp eq ptr %5, null
br i1 %6, label %9, label %7
7: ; preds = %3
%8 = tail call i32 %5(ptr noundef nonnull %0) #1
br label %9
9: ; preds = %1, %3, %7
%10 = phi i32 [ %8, %7 ], [ 0, %3 ], [ 0, %1 ]
ret i32 %10
}
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"qlcnic_dcb", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/qlogic/qlcnic/extr_qlcnic_dcb.h_qlcnic_dcb_get_cee_cfg.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/qlogic/qlcnic/extr_qlcnic_dcb.h_qlcnic_dcb_get_cee_cfg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @qlcnic_dcb_get_cee_cfg], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @qlcnic_dcb_get_cee_cfg(ptr noundef %0) #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %9, label %3
3: ; preds = %1
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = load ptr, ptr %4, align 8, !tbaa !11
%6 = icmp eq ptr %5, null
br i1 %6, label %9, label %7
7: ; preds = %3
%8 = tail call i32 %5(ptr noundef nonnull %0) #1
br label %9
9: ; preds = %1, %3, %7
%10 = phi i32 [ %8, %7 ], [ 0, %3 ], [ 0, %1 ]
ret i32 %10
}
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"qlcnic_dcb", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_2__", !8, i64 0}
| linux_drivers_net_ethernet_qlogic_qlcnic_extr_qlcnic_dcb.h_qlcnic_dcb_get_cee_cfg |
; ModuleID = 'AnghaBench/RetroArch/wii/libogc/libogc/extr_arqueue.c_ARQ_GetChunkSize.c'
source_filename = "AnghaBench/RetroArch/wii/libogc/libogc/extr_arqueue.c_ARQ_GetChunkSize.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@__ARQChunkSize = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local i32 @ARQ_GetChunkSize() local_unnamed_addr #0 {
%1 = load i32, ptr @__ARQChunkSize, align 4, !tbaa !5
ret i32 %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/RetroArch/wii/libogc/libogc/extr_arqueue.c_ARQ_GetChunkSize.c'
source_filename = "AnghaBench/RetroArch/wii/libogc/libogc/extr_arqueue.c_ARQ_GetChunkSize.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@__ARQChunkSize = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define i32 @ARQ_GetChunkSize() local_unnamed_addr #0 {
%1 = load i32, ptr @__ARQChunkSize, align 4, !tbaa !6
ret i32 %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| RetroArch_wii_libogc_libogc_extr_arqueue.c_ARQ_GetChunkSize |
; ModuleID = 'AnghaBench/xhyve/src/vmm/io/extr_vhpet.c_vhpet_stop_timer.c'
source_filename = "AnghaBench/xhyve/src/vmm/io/extr_vhpet.c_vhpet_stop_timer.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.vhpet = type { i32, ptr }
%struct.TYPE_2__ = type { i64, i32 }
@.str = private unnamed_addr constant [17 x i8] c"hpet t%d stopped\00", align 1
@.str.1 = private unnamed_addr constant [50 x i8] c"hpet t%d interrupt triggered after stopping timer\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @vhpet_stop_timer], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @vhpet_stop_timer(ptr noundef %0, i32 noundef %1, i64 noundef %2) #0 {
%4 = load i32, ptr %0, align 8, !tbaa !5
%5 = tail call i32 @VM_CTR1(i32 noundef %4, ptr noundef nonnull @.str, i32 noundef %1) #2
%6 = getelementptr inbounds %struct.vhpet, ptr %0, i64 0, i32 1
%7 = load ptr, ptr %6, align 8, !tbaa !11
%8 = sext i32 %1 to i64
%9 = getelementptr inbounds %struct.TYPE_2__, ptr %7, i64 %8, i32 1
%10 = tail call i32 @callout_stop(ptr noundef nonnull %9) #2
%11 = load ptr, ptr %6, align 8, !tbaa !11
%12 = getelementptr inbounds %struct.TYPE_2__, ptr %11, i64 %8
%13 = load i64, ptr %12, align 8, !tbaa !12
%14 = icmp slt i64 %13, %2
br i1 %14, label %15, label %19
15: ; preds = %3
%16 = load i32, ptr %0, align 8, !tbaa !5
%17 = tail call i32 @VM_CTR1(i32 noundef %16, ptr noundef nonnull @.str.1, i32 noundef %1) #2
%18 = tail call i32 @vhpet_timer_interrupt(ptr noundef nonnull %0, i32 noundef %1) #2
br label %19
19: ; preds = %15, %3
ret void
}
declare i32 @VM_CTR1(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @callout_stop(ptr noundef) local_unnamed_addr #1
declare i32 @vhpet_timer_interrupt(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"vhpet", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_2__", !14, i64 0, !7, i64 8}
!14 = !{!"long", !8, i64 0}
| ; ModuleID = 'AnghaBench/xhyve/src/vmm/io/extr_vhpet.c_vhpet_stop_timer.c'
source_filename = "AnghaBench/xhyve/src/vmm/io/extr_vhpet.c_vhpet_stop_timer.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i64, i32 }
@.str = private unnamed_addr constant [17 x i8] c"hpet t%d stopped\00", align 1
@.str.1 = private unnamed_addr constant [50 x i8] c"hpet t%d interrupt triggered after stopping timer\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @vhpet_stop_timer], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @vhpet_stop_timer(ptr noundef %0, i32 noundef %1, i64 noundef %2) #0 {
%4 = load i32, ptr %0, align 8, !tbaa !6
%5 = tail call i32 @VM_CTR1(i32 noundef %4, ptr noundef nonnull @.str, i32 noundef %1) #2
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load ptr, ptr %6, align 8, !tbaa !12
%8 = sext i32 %1 to i64
%9 = getelementptr inbounds %struct.TYPE_2__, ptr %7, i64 %8, i32 1
%10 = tail call i32 @callout_stop(ptr noundef nonnull %9) #2
%11 = load ptr, ptr %6, align 8, !tbaa !12
%12 = getelementptr inbounds %struct.TYPE_2__, ptr %11, i64 %8
%13 = load i64, ptr %12, align 8, !tbaa !13
%14 = icmp slt i64 %13, %2
br i1 %14, label %15, label %19
15: ; preds = %3
%16 = load i32, ptr %0, align 8, !tbaa !6
%17 = tail call i32 @VM_CTR1(i32 noundef %16, ptr noundef nonnull @.str.1, i32 noundef %1) #2
%18 = tail call i32 @vhpet_timer_interrupt(ptr noundef nonnull %0, i32 noundef %1) #2
br label %19
19: ; preds = %15, %3
ret void
}
declare i32 @VM_CTR1(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @callout_stop(ptr noundef) local_unnamed_addr #1
declare i32 @vhpet_timer_interrupt(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"vhpet", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!14, !15, i64 0}
!14 = !{!"TYPE_2__", !15, i64 0, !8, i64 8}
!15 = !{!"long", !9, i64 0}
| xhyve_src_vmm_io_extr_vhpet.c_vhpet_stop_timer |
; ModuleID = 'AnghaBench/postgres/src/backend/utils/adt/extr_tsquery.c_pushval_asis.c'
source_filename = "AnghaBench/postgres/src/backend/utils/adt/extr_tsquery.c_pushval_asis.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @pushval_asis], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @pushval_asis(i32 %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #0 {
%7 = tail call i32 @pushValue(i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #2
ret void
}
declare i32 @pushValue(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/postgres/src/backend/utils/adt/extr_tsquery.c_pushval_asis.c'
source_filename = "AnghaBench/postgres/src/backend/utils/adt/extr_tsquery.c_pushval_asis.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pushval_asis], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @pushval_asis(i32 %0, i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #0 {
%7 = tail call i32 @pushValue(i32 noundef %1, ptr noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5) #2
ret void
}
declare i32 @pushValue(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| postgres_src_backend_utils_adt_extr_tsquery.c_pushval_asis |
; ModuleID = 'AnghaBench/freebsd/usr.sbin/rtadvd/extr_rtadvd.c_free_ndopts.c'
source_filename = "AnghaBench/freebsd/usr.sbin/rtadvd/extr_rtadvd.c_free_ndopts.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@nol_next = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @free_ndopts], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @free_ndopts(ptr noundef %0) #0 {
%2 = tail call ptr @TAILQ_FIRST(ptr noundef %0) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi ptr [ %9, %4 ], [ %2, %1 ]
%6 = load i32, ptr @nol_next, align 4, !tbaa !5
%7 = tail call i32 @TAILQ_REMOVE(ptr noundef %0, ptr noundef nonnull %5, i32 noundef %6) #2
%8 = tail call i32 @free(ptr noundef nonnull %5) #2
%9 = tail call ptr @TAILQ_FIRST(ptr noundef %0) #2
%10 = icmp eq ptr %9, null
br i1 %10, label %11, label %4, !llvm.loop !9
11: ; preds = %4, %1
ret void
}
declare ptr @TAILQ_FIRST(ptr noundef) local_unnamed_addr #1
declare i32 @TAILQ_REMOVE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/usr.sbin/rtadvd/extr_rtadvd.c_free_ndopts.c'
source_filename = "AnghaBench/freebsd/usr.sbin/rtadvd/extr_rtadvd.c_free_ndopts.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@nol_next = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @free_ndopts], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @free_ndopts(ptr noundef %0) #0 {
%2 = tail call ptr @TAILQ_FIRST(ptr noundef %0) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %11, label %4
4: ; preds = %1, %4
%5 = phi ptr [ %9, %4 ], [ %2, %1 ]
%6 = load i32, ptr @nol_next, align 4, !tbaa !6
%7 = tail call i32 @TAILQ_REMOVE(ptr noundef %0, ptr noundef nonnull %5, i32 noundef %6) #2
%8 = tail call i32 @free(ptr noundef nonnull %5) #2
%9 = tail call ptr @TAILQ_FIRST(ptr noundef %0) #2
%10 = icmp eq ptr %9, null
br i1 %10, label %11, label %4, !llvm.loop !10
11: ; preds = %4, %1
ret void
}
declare ptr @TAILQ_FIRST(ptr noundef) local_unnamed_addr #1
declare i32 @TAILQ_REMOVE(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| freebsd_usr.sbin_rtadvd_extr_rtadvd.c_free_ndopts |
; ModuleID = 'AnghaBench/exploitdb/exploits/linux/remote/extr_110.c_connect_to_server.c'
source_filename = "AnghaBench/exploitdb/exploits/linux/remote/extr_110.c_connect_to_server.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sockaddr_in = type { %struct.in_addr, i32, i32 }
%struct.in_addr = type { i32 }
@.str = private unnamed_addr constant [11 x i8] c"Connecting\00", align 1
@server = dso_local local_unnamed_addr global i32 0, align 4
@FAILURE = dso_local local_unnamed_addr global i32 0, align 4
@PF_INET = dso_local local_unnamed_addr global i32 0, align 4
@SOCK_STREAM = dso_local local_unnamed_addr global i32 0, align 4
@IPPROTO_TCP = dso_local local_unnamed_addr global i32 0, align 4
@AF_INET = dso_local local_unnamed_addr global i32 0, align 4
@TCP_NODELAY = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @connect_to_server(i32 noundef %0) local_unnamed_addr #0 {
%2 = alloca %struct.sockaddr_in, align 4
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
store i32 1, ptr %3, align 4, !tbaa !5
%4 = tail call i32 @status_bar(ptr noundef nonnull @.str) #3
%5 = load i32, ptr @server, align 4, !tbaa !5
%6 = tail call ptr @gethostbyname(i32 noundef %5) #3
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i32, ptr @FAILURE, align 4, !tbaa !5
br label %35
10: ; preds = %1
%11 = load i32, ptr @PF_INET, align 4, !tbaa !5
%12 = load i32, ptr @SOCK_STREAM, align 4, !tbaa !5
%13 = load i32, ptr @IPPROTO_TCP, align 4, !tbaa !5
%14 = tail call i32 @socket(i32 noundef %11, i32 noundef %12, i32 noundef %13) #3
%15 = icmp slt i32 %14, 0
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = load i32, ptr @FAILURE, align 4, !tbaa !5
br label %35
18: ; preds = %10
%19 = call i32 @bzero(ptr noundef nonnull %2, i32 noundef 4) #3
%20 = load i32, ptr @AF_INET, align 4, !tbaa !5
%21 = getelementptr inbounds %struct.sockaddr_in, ptr %2, i64 0, i32 2
store i32 %20, ptr %21, align 4, !tbaa !9
%22 = call i32 @htons(i32 noundef %0) #3
%23 = getelementptr inbounds %struct.sockaddr_in, ptr %2, i64 0, i32 1
store i32 %22, ptr %23, align 4, !tbaa !12
%24 = load i64, ptr %6, align 8, !tbaa !13
%25 = inttoptr i64 %24 to ptr
%26 = load i32, ptr %25, align 4, !tbaa !5
store i32 %26, ptr %2, align 4, !tbaa !5
%27 = load i32, ptr @IPPROTO_TCP, align 4, !tbaa !5
%28 = load i32, ptr @TCP_NODELAY, align 4, !tbaa !5
%29 = call i32 @setsockopt(i32 noundef %14, i32 noundef %27, i32 noundef %28, ptr noundef nonnull %3, i32 noundef 4) #3
%30 = call i64 @connect(i32 noundef %14, ptr noundef nonnull %2, i32 noundef 4) #3
%31 = icmp slt i64 %30, 0
br i1 %31, label %32, label %35
32: ; preds = %18
%33 = call i32 @close(i32 noundef %14) #3
%34 = load i32, ptr @FAILURE, align 4, !tbaa !5
br label %35
35: ; preds = %18, %32, %16, %8
%36 = phi i32 [ %9, %8 ], [ %17, %16 ], [ %34, %32 ], [ %14, %18 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %2) #3
ret i32 %36
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @status_bar(ptr noundef) local_unnamed_addr #2
declare ptr @gethostbyname(i32 noundef) local_unnamed_addr #2
declare i32 @socket(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @bzero(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @htons(i32 noundef) local_unnamed_addr #2
declare i32 @setsockopt(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @connect(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @close(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"sockaddr_in", !11, i64 0, !6, i64 4, !6, i64 8}
!11 = !{!"in_addr", !6, i64 0}
!12 = !{!10, !6, i64 4}
!13 = !{!14, !15, i64 0}
!14 = !{!"hostent", !15, i64 0}
!15 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/exploitdb/exploits/linux/remote/extr_110.c_connect_to_server.c'
source_filename = "AnghaBench/exploitdb/exploits/linux/remote/extr_110.c_connect_to_server.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.sockaddr_in = type { %struct.in_addr, i32, i32 }
%struct.in_addr = type { i32 }
@.str = private unnamed_addr constant [11 x i8] c"Connecting\00", align 1
@server = common local_unnamed_addr global i32 0, align 4
@FAILURE = common local_unnamed_addr global i32 0, align 4
@PF_INET = common local_unnamed_addr global i32 0, align 4
@SOCK_STREAM = common local_unnamed_addr global i32 0, align 4
@IPPROTO_TCP = common local_unnamed_addr global i32 0, align 4
@AF_INET = common local_unnamed_addr global i32 0, align 4
@TCP_NODELAY = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @connect_to_server(i32 noundef %0) local_unnamed_addr #0 {
%2 = alloca %struct.sockaddr_in, align 4
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
store i32 1, ptr %3, align 4, !tbaa !6
%4 = tail call i32 @status_bar(ptr noundef nonnull @.str) #3
%5 = load i32, ptr @server, align 4, !tbaa !6
%6 = tail call ptr @gethostbyname(i32 noundef %5) #3
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = load i32, ptr @FAILURE, align 4, !tbaa !6
br label %35
10: ; preds = %1
%11 = load i32, ptr @PF_INET, align 4, !tbaa !6
%12 = load i32, ptr @SOCK_STREAM, align 4, !tbaa !6
%13 = load i32, ptr @IPPROTO_TCP, align 4, !tbaa !6
%14 = tail call i32 @socket(i32 noundef %11, i32 noundef %12, i32 noundef %13) #3
%15 = icmp slt i32 %14, 0
br i1 %15, label %16, label %18
16: ; preds = %10
%17 = load i32, ptr @FAILURE, align 4, !tbaa !6
br label %35
18: ; preds = %10
%19 = call i32 @bzero(ptr noundef nonnull %2, i32 noundef 4) #3
%20 = load i32, ptr @AF_INET, align 4, !tbaa !6
%21 = getelementptr inbounds i8, ptr %2, i64 8
store i32 %20, ptr %21, align 4, !tbaa !10
%22 = call i32 @htons(i32 noundef %0) #3
%23 = getelementptr inbounds i8, ptr %2, i64 4
store i32 %22, ptr %23, align 4, !tbaa !13
%24 = load i64, ptr %6, align 8, !tbaa !14
%25 = inttoptr i64 %24 to ptr
%26 = load i32, ptr %25, align 4, !tbaa !6
store i32 %26, ptr %2, align 4, !tbaa !6
%27 = load i32, ptr @IPPROTO_TCP, align 4, !tbaa !6
%28 = load i32, ptr @TCP_NODELAY, align 4, !tbaa !6
%29 = call i32 @setsockopt(i32 noundef %14, i32 noundef %27, i32 noundef %28, ptr noundef nonnull %3, i32 noundef 4) #3
%30 = call i64 @connect(i32 noundef %14, ptr noundef nonnull %2, i32 noundef 4) #3
%31 = icmp slt i64 %30, 0
br i1 %31, label %32, label %35
32: ; preds = %18
%33 = call i32 @close(i32 noundef %14) #3
%34 = load i32, ptr @FAILURE, align 4, !tbaa !6
br label %35
35: ; preds = %18, %32, %16, %8
%36 = phi i32 [ %9, %8 ], [ %17, %16 ], [ %34, %32 ], [ %14, %18 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %2) #3
ret i32 %36
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @status_bar(ptr noundef) local_unnamed_addr #2
declare ptr @gethostbyname(i32 noundef) local_unnamed_addr #2
declare i32 @socket(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @bzero(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @htons(i32 noundef) local_unnamed_addr #2
declare i32 @setsockopt(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @connect(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @close(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"sockaddr_in", !12, i64 0, !7, i64 4, !7, i64 8}
!12 = !{!"in_addr", !7, i64 0}
!13 = !{!11, !7, i64 4}
!14 = !{!15, !16, i64 0}
!15 = !{!"hostent", !16, i64 0}
!16 = !{!"long", !8, i64 0}
| exploitdb_exploits_linux_remote_extr_110.c_connect_to_server |
; ModuleID = 'AnghaBench/linux/drivers/usb/musb/extr_cppi_dma.c_cppi_bd_alloc.c'
source_filename = "AnghaBench/linux/drivers/usb/musb/extr_cppi_dma.c_cppi_bd_alloc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @cppi_bd_alloc], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define internal ptr @cppi_bd_alloc(ptr nocapture noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = icmp eq ptr %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = load ptr, ptr %2, align 8, !tbaa !10
store ptr %5, ptr %0, align 8, !tbaa !5
br label %6
6: ; preds = %4, %1
ret ptr %2
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"cppi_channel", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"cppi_descriptor", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/musb/extr_cppi_dma.c_cppi_bd_alloc.c'
source_filename = "AnghaBench/linux/drivers/usb/musb/extr_cppi_dma.c_cppi_bd_alloc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cppi_bd_alloc], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal ptr @cppi_bd_alloc(ptr nocapture noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = icmp eq ptr %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = load ptr, ptr %2, align 8, !tbaa !11
store ptr %5, ptr %0, align 8, !tbaa !6
br label %6
6: ; preds = %4, %1
ret ptr %2
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"cppi_channel", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"cppi_descriptor", !8, i64 0}
| linux_drivers_usb_musb_extr_cppi_dma.c_cppi_bd_alloc |
; ModuleID = 'AnghaBench/Quake-III-Arena/code/bspc/extr_portals.c_MakeNodePortal.c'
source_filename = "AnghaBench/Quake-III-Arena/code/bspc/extr_portals.c_MakeNodePortal.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_9__ = type { i64, ptr, ptr }
%struct.TYPE_8__ = type { i64, ptr, ptr, %struct.TYPE_10__, ptr, ptr }
%struct.TYPE_10__ = type { float, i32 }
@vec3_origin = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [33 x i8] c"MakeNodePortal: mislinked portal\00", align 1
@c_tinyportals = dso_local local_unnamed_addr global i32 0, align 4
@mapplanes = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local void @MakeNodePortal(ptr noundef %0) local_unnamed_addr #0 {
%2 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%3 = tail call ptr @BaseWindingForNode(ptr noundef %0) #3
store ptr %3, ptr %2, align 8, !tbaa !5
%4 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 2
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = icmp ne ptr %5, null
%7 = icmp ne ptr %3, null
%8 = select i1 %6, i1 %7, i1 false
br i1 %8, label %9, label %50
9: ; preds = %1, %37
%10 = phi ptr [ %46, %37 ], [ %5, %1 ]
%11 = phi i32 [ %39, %37 ], [ undef, %1 ]
%12 = phi float [ %38, %37 ], [ undef, %1 ]
%13 = getelementptr inbounds %struct.TYPE_8__, ptr %10, i64 0, i32 4
%14 = load ptr, ptr %13, align 8, !tbaa !9
%15 = load ptr, ptr %14, align 8, !tbaa !5
%16 = icmp eq ptr %15, %0
br i1 %16, label %17, label %23
17: ; preds = %9
%18 = getelementptr inbounds %struct.TYPE_8__, ptr %10, i64 0, i32 3
%19 = getelementptr inbounds %struct.TYPE_8__, ptr %10, i64 0, i32 3, i32 1
%20 = load i32, ptr %19, align 4, !tbaa !15
%21 = call i32 @VectorCopy(i32 noundef %20, i32 noundef undef) #3
%22 = load float, ptr %18, align 8, !tbaa !16
br label %37
23: ; preds = %9
%24 = getelementptr inbounds ptr, ptr %14, i64 1
%25 = load ptr, ptr %24, align 8, !tbaa !5
%26 = icmp eq ptr %25, %0
br i1 %26, label %27, label %35
27: ; preds = %23
%28 = load i32, ptr @vec3_origin, align 4, !tbaa !17
%29 = getelementptr inbounds %struct.TYPE_8__, ptr %10, i64 0, i32 3
%30 = getelementptr inbounds %struct.TYPE_8__, ptr %10, i64 0, i32 3, i32 1
%31 = load i32, ptr %30, align 4, !tbaa !15
%32 = call i32 @VectorSubtract(i32 noundef %28, i32 noundef %31, i32 noundef undef) #3
%33 = load float, ptr %29, align 8, !tbaa !16
%34 = fneg float %33
br label %37
35: ; preds = %23
%36 = call i32 @Error(ptr noundef nonnull @.str) #3
br label %37
37: ; preds = %27, %35, %17
%38 = phi float [ %22, %17 ], [ %34, %27 ], [ %12, %35 ]
%39 = phi i32 [ 0, %17 ], [ 1, %27 ], [ %11, %35 ]
%40 = call i32 @ChopWindingInPlace(ptr noundef nonnull %2, i32 noundef undef, float noundef %38, double noundef 1.000000e-01) #3
%41 = getelementptr inbounds %struct.TYPE_8__, ptr %10, i64 0, i32 5
%42 = load ptr, ptr %41, align 8, !tbaa !18
%43 = sext i32 %39 to i64
%44 = getelementptr inbounds ptr, ptr %42, i64 %43
%45 = load ptr, ptr %2, align 8
%46 = load ptr, ptr %44, align 8, !tbaa !5
%47 = icmp ne ptr %46, null
%48 = icmp ne ptr %45, null
%49 = select i1 %47, i1 %48, i1 false
br i1 %49, label %9, label %50, !llvm.loop !19
50: ; preds = %37, %1
%51 = phi ptr [ %3, %1 ], [ %45, %37 ]
%52 = phi i1 [ %7, %1 ], [ %48, %37 ]
br i1 %52, label %53, label %77
53: ; preds = %50
%54 = call i64 @WindingIsTiny(ptr noundef nonnull %51) #3
%55 = icmp eq i64 %54, 0
br i1 %55, label %61, label %56
56: ; preds = %53
%57 = load i32, ptr @c_tinyportals, align 4, !tbaa !17
%58 = add nsw i32 %57, 1
store i32 %58, ptr @c_tinyportals, align 4, !tbaa !17
%59 = load ptr, ptr %2, align 8, !tbaa !5
%60 = call i32 @FreeWinding(ptr noundef %59) #3
br label %77
61: ; preds = %53
%62 = call ptr (...) @AllocPortal() #3
%63 = getelementptr inbounds %struct.TYPE_8__, ptr %62, i64 0, i32 3
%64 = load ptr, ptr @mapplanes, align 8, !tbaa !5
%65 = load i64, ptr %0, align 8, !tbaa !21
%66 = getelementptr inbounds %struct.TYPE_10__, ptr %64, i64 %65
%67 = load i64, ptr %66, align 4
store i64 %67, ptr %63, align 8
%68 = getelementptr inbounds %struct.TYPE_8__, ptr %62, i64 0, i32 2
store ptr %0, ptr %68, align 8, !tbaa !23
%69 = load ptr, ptr %2, align 8, !tbaa !5
%70 = getelementptr inbounds %struct.TYPE_8__, ptr %62, i64 0, i32 1
store ptr %69, ptr %70, align 8, !tbaa !24
%71 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 1
%72 = load ptr, ptr %71, align 8, !tbaa !25
%73 = load i32, ptr %72, align 4, !tbaa !17
%74 = getelementptr inbounds i32, ptr %72, i64 1
%75 = load i32, ptr %74, align 4, !tbaa !17
%76 = call i32 @AddPortalToNodes(ptr noundef %62, i32 noundef %73, i32 noundef %75) #3
br label %77
77: ; preds = %50, %61, %56
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @BaseWindingForNode(ptr noundef) local_unnamed_addr #2
declare i32 @VectorCopy(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @VectorSubtract(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @Error(ptr noundef) local_unnamed_addr #2
declare i32 @ChopWindingInPlace(ptr noundef, i32 noundef, float noundef, double noundef) local_unnamed_addr #2
declare i64 @WindingIsTiny(ptr noundef) local_unnamed_addr #2
declare i32 @FreeWinding(ptr noundef) local_unnamed_addr #2
declare ptr @AllocPortal(...) local_unnamed_addr #2
declare i32 @AddPortalToNodes(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 32}
!10 = !{!"TYPE_8__", !11, i64 0, !6, i64 8, !6, i64 16, !12, i64 24, !6, i64 32, !6, i64 40}
!11 = !{!"long", !7, i64 0}
!12 = !{!"TYPE_10__", !13, i64 0, !14, i64 4}
!13 = !{!"float", !7, i64 0}
!14 = !{!"int", !7, i64 0}
!15 = !{!10, !14, i64 28}
!16 = !{!10, !13, i64 24}
!17 = !{!14, !14, i64 0}
!18 = !{!10, !6, i64 40}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!22, !11, i64 0}
!22 = !{!"TYPE_9__", !11, i64 0, !6, i64 8, !6, i64 16}
!23 = !{!10, !6, i64 16}
!24 = !{!10, !6, i64 8}
!25 = !{!22, !6, i64 8}
| ; ModuleID = 'AnghaBench/Quake-III-Arena/code/bspc/extr_portals.c_MakeNodePortal.c'
source_filename = "AnghaBench/Quake-III-Arena/code/bspc/extr_portals.c_MakeNodePortal.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_10__ = type { float, i32 }
@vec3_origin = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [33 x i8] c"MakeNodePortal: mislinked portal\00", align 1
@c_tinyportals = common local_unnamed_addr global i32 0, align 4
@mapplanes = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @MakeNodePortal(ptr noundef %0) local_unnamed_addr #0 {
%2 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %2) #3
%3 = tail call ptr @BaseWindingForNode(ptr noundef %0) #3
store ptr %3, ptr %2, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %0, i64 16
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = icmp ne ptr %5, null
%7 = icmp ne ptr %3, null
%8 = select i1 %6, i1 %7, i1 false
br i1 %8, label %9, label %50
9: ; preds = %1, %37
%10 = phi ptr [ %46, %37 ], [ %5, %1 ]
%11 = phi i32 [ %39, %37 ], [ undef, %1 ]
%12 = phi float [ %38, %37 ], [ undef, %1 ]
%13 = getelementptr inbounds i8, ptr %10, i64 32
%14 = load ptr, ptr %13, align 8, !tbaa !10
%15 = load ptr, ptr %14, align 8, !tbaa !6
%16 = icmp eq ptr %15, %0
br i1 %16, label %17, label %23
17: ; preds = %9
%18 = getelementptr inbounds i8, ptr %10, i64 24
%19 = getelementptr inbounds i8, ptr %10, i64 28
%20 = load i32, ptr %19, align 4, !tbaa !16
%21 = call i32 @VectorCopy(i32 noundef %20, i32 noundef undef) #3
%22 = load float, ptr %18, align 8, !tbaa !17
br label %37
23: ; preds = %9
%24 = getelementptr inbounds i8, ptr %14, i64 8
%25 = load ptr, ptr %24, align 8, !tbaa !6
%26 = icmp eq ptr %25, %0
br i1 %26, label %27, label %35
27: ; preds = %23
%28 = load i32, ptr @vec3_origin, align 4, !tbaa !18
%29 = getelementptr inbounds i8, ptr %10, i64 24
%30 = getelementptr inbounds i8, ptr %10, i64 28
%31 = load i32, ptr %30, align 4, !tbaa !16
%32 = call i32 @VectorSubtract(i32 noundef %28, i32 noundef %31, i32 noundef undef) #3
%33 = load float, ptr %29, align 8, !tbaa !17
%34 = fneg float %33
br label %37
35: ; preds = %23
%36 = call i32 @Error(ptr noundef nonnull @.str) #3
br label %37
37: ; preds = %27, %35, %17
%38 = phi float [ %22, %17 ], [ %34, %27 ], [ %12, %35 ]
%39 = phi i32 [ 0, %17 ], [ 1, %27 ], [ %11, %35 ]
%40 = call i32 @ChopWindingInPlace(ptr noundef nonnull %2, i32 noundef undef, float noundef %38, double noundef 1.000000e-01) #3
%41 = getelementptr inbounds i8, ptr %10, i64 40
%42 = load ptr, ptr %41, align 8, !tbaa !19
%43 = sext i32 %39 to i64
%44 = getelementptr inbounds ptr, ptr %42, i64 %43
%45 = load ptr, ptr %2, align 8
%46 = load ptr, ptr %44, align 8, !tbaa !6
%47 = icmp ne ptr %46, null
%48 = icmp ne ptr %45, null
%49 = select i1 %47, i1 %48, i1 false
br i1 %49, label %9, label %50, !llvm.loop !20
50: ; preds = %37, %1
%51 = phi ptr [ %3, %1 ], [ %45, %37 ]
%52 = phi i1 [ %7, %1 ], [ %48, %37 ]
br i1 %52, label %53, label %77
53: ; preds = %50
%54 = call i64 @WindingIsTiny(ptr noundef nonnull %51) #3
%55 = icmp eq i64 %54, 0
br i1 %55, label %61, label %56
56: ; preds = %53
%57 = load i32, ptr @c_tinyportals, align 4, !tbaa !18
%58 = add nsw i32 %57, 1
store i32 %58, ptr @c_tinyportals, align 4, !tbaa !18
%59 = load ptr, ptr %2, align 8, !tbaa !6
%60 = call i32 @FreeWinding(ptr noundef %59) #3
br label %77
61: ; preds = %53
%62 = call ptr @AllocPortal() #3
%63 = getelementptr inbounds i8, ptr %62, i64 24
%64 = load ptr, ptr @mapplanes, align 8, !tbaa !6
%65 = load i64, ptr %0, align 8, !tbaa !22
%66 = getelementptr inbounds %struct.TYPE_10__, ptr %64, i64 %65
%67 = load i64, ptr %66, align 4
store i64 %67, ptr %63, align 8
%68 = getelementptr inbounds i8, ptr %62, i64 16
store ptr %0, ptr %68, align 8, !tbaa !24
%69 = load ptr, ptr %2, align 8, !tbaa !6
%70 = getelementptr inbounds i8, ptr %62, i64 8
store ptr %69, ptr %70, align 8, !tbaa !25
%71 = getelementptr inbounds i8, ptr %0, i64 8
%72 = load ptr, ptr %71, align 8, !tbaa !26
%73 = load i32, ptr %72, align 4, !tbaa !18
%74 = getelementptr inbounds i8, ptr %72, i64 4
%75 = load i32, ptr %74, align 4, !tbaa !18
%76 = call i32 @AddPortalToNodes(ptr noundef %62, i32 noundef %73, i32 noundef %75) #3
br label %77
77: ; preds = %50, %61, %56
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @BaseWindingForNode(ptr noundef) local_unnamed_addr #2
declare i32 @VectorCopy(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @VectorSubtract(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @Error(ptr noundef) local_unnamed_addr #2
declare i32 @ChopWindingInPlace(ptr noundef, i32 noundef, float noundef, double noundef) local_unnamed_addr #2
declare i64 @WindingIsTiny(ptr noundef) local_unnamed_addr #2
declare i32 @FreeWinding(ptr noundef) local_unnamed_addr #2
declare ptr @AllocPortal(...) local_unnamed_addr #2
declare i32 @AddPortalToNodes(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 32}
!11 = !{!"TYPE_8__", !12, i64 0, !7, i64 8, !7, i64 16, !13, i64 24, !7, i64 32, !7, i64 40}
!12 = !{!"long", !8, i64 0}
!13 = !{!"TYPE_10__", !14, i64 0, !15, i64 4}
!14 = !{!"float", !8, i64 0}
!15 = !{!"int", !8, i64 0}
!16 = !{!11, !15, i64 28}
!17 = !{!11, !14, i64 24}
!18 = !{!15, !15, i64 0}
!19 = !{!11, !7, i64 40}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!23, !12, i64 0}
!23 = !{!"TYPE_9__", !12, i64 0, !7, i64 8, !7, i64 16}
!24 = !{!11, !7, i64 16}
!25 = !{!11, !7, i64 8}
!26 = !{!23, !7, i64 8}
| Quake-III-Arena_code_bspc_extr_portals.c_MakeNodePortal |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/display/dc/dcn20/extr_dcn20_dccg.c_dccg2_update_dpp_dto.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/display/dc/dcn20/extr_dcn20_dccg.c_dccg2_update_dpp_dto.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DPPCLK_DTO_PARAM = dso_local local_unnamed_addr global ptr null, align 8
@DPPCLK0_DTO_PHASE = dso_local local_unnamed_addr global i32 0, align 4
@DPPCLK0_DTO_MODULO = dso_local local_unnamed_addr global i32 0, align 4
@DPPCLK_DTO_CTRL = dso_local local_unnamed_addr global i32 0, align 4
@DPPCLK_DTO_ENABLE = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind uwtable
define dso_local void @dccg2_update_dpp_dto(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = alloca i32, align 4
%6 = alloca i32, align 4
%7 = tail call ptr @TO_DCN_DCCG(ptr noundef %0) #4
%8 = load i32, ptr %0, align 4, !tbaa !5
%9 = icmp ne i32 %8, 0
%10 = icmp ne i32 %2, 0
%11 = and i1 %10, %9
br i1 %11, label %12, label %64
12: ; preds = %4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #4
%13 = icmp sge i32 %8, %2
%14 = zext i1 %13 to i32
%15 = tail call i32 @ASSERT(i32 noundef %14) #4
%16 = icmp sgt i32 %8, 255
br i1 %16, label %17, label %25
17: ; preds = %12
%18 = add nuw nsw i32 %8, 254
%19 = udiv i32 %18, 255
%20 = udiv i32 %8, %19
%21 = add i32 %2, -1
%22 = add i32 %21, %19
%23 = sdiv i32 %22, %19
%24 = tail call i32 @llvm.smin.i32(i32 %23, i32 %20)
br label %25
25: ; preds = %17, %12
%26 = phi i32 [ %20, %17 ], [ %8, %12 ]
%27 = phi i32 [ %24, %17 ], [ %2, %12 ]
%28 = load ptr, ptr @DPPCLK_DTO_PARAM, align 8, !tbaa !10
%29 = sext i32 %1 to i64
%30 = getelementptr inbounds i32, ptr %28, i64 %29
%31 = load i32, ptr %30, align 4, !tbaa !12
%32 = load i32, ptr @DPPCLK0_DTO_PHASE, align 4, !tbaa !12
%33 = load i32, ptr @DPPCLK0_DTO_MODULO, align 4, !tbaa !12
%34 = call i32 @REG_GET_2(i32 noundef %31, i32 noundef %32, ptr noundef nonnull %5, i32 noundef %33, ptr noundef nonnull %6) #4
%35 = icmp eq i32 %3, 0
br i1 %35, label %51, label %36
36: ; preds = %25
%37 = load i32, ptr %6, align 4, !tbaa !12
%38 = mul nsw i32 %37, %27
%39 = load i32, ptr %5, align 4, !tbaa !12
%40 = mul nsw i32 %39, %26
%41 = icmp slt i32 %38, %40
%42 = load ptr, ptr @DPPCLK_DTO_PARAM, align 8, !tbaa !10
%43 = getelementptr inbounds i32, ptr %42, i64 %29
%44 = load i32, ptr %43, align 4, !tbaa !12
%45 = load i32, ptr @DPPCLK0_DTO_PHASE, align 4, !tbaa !12
%46 = load i32, ptr @DPPCLK0_DTO_MODULO, align 4, !tbaa !12
br i1 %41, label %49, label %47
47: ; preds = %36
%48 = call i32 @REG_SET_2(i32 noundef %44, i32 noundef 0, i32 noundef %45, i32 noundef %27, i32 noundef %46, i32 noundef %26) #4
br label %58
49: ; preds = %36
%50 = call i32 @REG_SET_2(i32 noundef %44, i32 noundef 0, i32 noundef %45, i32 noundef %39, i32 noundef %46, i32 noundef %37) #4
br label %58
51: ; preds = %25
%52 = load ptr, ptr @DPPCLK_DTO_PARAM, align 8, !tbaa !10
%53 = getelementptr inbounds i32, ptr %52, i64 %29
%54 = load i32, ptr %53, align 4, !tbaa !12
%55 = load i32, ptr @DPPCLK0_DTO_PHASE, align 4, !tbaa !12
%56 = load i32, ptr @DPPCLK0_DTO_MODULO, align 4, !tbaa !12
%57 = call i32 @REG_SET_2(i32 noundef %54, i32 noundef 0, i32 noundef %55, i32 noundef %27, i32 noundef %56, i32 noundef %26) #4
br label %58
58: ; preds = %47, %49, %51
%59 = load i32, ptr @DPPCLK_DTO_CTRL, align 4, !tbaa !12
%60 = load ptr, ptr @DPPCLK_DTO_ENABLE, align 8, !tbaa !10
%61 = getelementptr inbounds i32, ptr %60, i64 %29
%62 = load i32, ptr %61, align 4, !tbaa !12
%63 = call i32 @REG_UPDATE(i32 noundef %59, i32 noundef %62, i32 noundef 1) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #4
br label %71
64: ; preds = %4
%65 = load i32, ptr @DPPCLK_DTO_CTRL, align 4, !tbaa !12
%66 = load ptr, ptr @DPPCLK_DTO_ENABLE, align 8, !tbaa !10
%67 = sext i32 %1 to i64
%68 = getelementptr inbounds i32, ptr %66, i64 %67
%69 = load i32, ptr %68, align 4, !tbaa !12
%70 = tail call i32 @REG_UPDATE(i32 noundef %65, i32 noundef %69, i32 noundef 0) #4
br label %71
71: ; preds = %64, %58
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @TO_DCN_DCCG(ptr noundef) local_unnamed_addr #2
declare i32 @ASSERT(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @REG_GET_2(i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @REG_SET_2(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @REG_UPDATE(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"dccg", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/display/dc/dcn20/extr_dcn20_dccg.c_dccg2_update_dpp_dto.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/display/dc/dcn20/extr_dcn20_dccg.c_dccg2_update_dpp_dto.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DPPCLK_DTO_PARAM = common local_unnamed_addr global ptr null, align 8
@DPPCLK0_DTO_PHASE = common local_unnamed_addr global i32 0, align 4
@DPPCLK0_DTO_MODULO = common local_unnamed_addr global i32 0, align 4
@DPPCLK_DTO_CTRL = common local_unnamed_addr global i32 0, align 4
@DPPCLK_DTO_ENABLE = common local_unnamed_addr global ptr null, align 8
; Function Attrs: nounwind ssp uwtable(sync)
define void @dccg2_update_dpp_dto(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = alloca i32, align 4
%6 = alloca i32, align 4
%7 = tail call ptr @TO_DCN_DCCG(ptr noundef %0) #4
%8 = load i32, ptr %0, align 4, !tbaa !6
%9 = icmp ne i32 %8, 0
%10 = icmp ne i32 %2, 0
%11 = and i1 %10, %9
br i1 %11, label %12, label %64
12: ; preds = %4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %5) #4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #4
%13 = icmp sge i32 %8, %2
%14 = zext i1 %13 to i32
%15 = tail call i32 @ASSERT(i32 noundef %14) #4
%16 = icmp sgt i32 %8, 255
br i1 %16, label %17, label %25
17: ; preds = %12
%18 = add nuw nsw i32 %8, 254
%19 = udiv i32 %18, 255
%20 = udiv i32 %8, %19
%21 = add i32 %2, -1
%22 = add i32 %21, %19
%23 = sdiv i32 %22, %19
%24 = tail call i32 @llvm.smin.i32(i32 %23, i32 %20)
br label %25
25: ; preds = %17, %12
%26 = phi i32 [ %20, %17 ], [ %8, %12 ]
%27 = phi i32 [ %24, %17 ], [ %2, %12 ]
%28 = load ptr, ptr @DPPCLK_DTO_PARAM, align 8, !tbaa !11
%29 = sext i32 %1 to i64
%30 = getelementptr inbounds i32, ptr %28, i64 %29
%31 = load i32, ptr %30, align 4, !tbaa !13
%32 = load i32, ptr @DPPCLK0_DTO_PHASE, align 4, !tbaa !13
%33 = load i32, ptr @DPPCLK0_DTO_MODULO, align 4, !tbaa !13
%34 = call i32 @REG_GET_2(i32 noundef %31, i32 noundef %32, ptr noundef nonnull %5, i32 noundef %33, ptr noundef nonnull %6) #4
%35 = icmp eq i32 %3, 0
br i1 %35, label %51, label %36
36: ; preds = %25
%37 = load i32, ptr %6, align 4, !tbaa !13
%38 = mul nsw i32 %37, %27
%39 = load i32, ptr %5, align 4, !tbaa !13
%40 = mul nsw i32 %39, %26
%41 = icmp slt i32 %38, %40
%42 = load ptr, ptr @DPPCLK_DTO_PARAM, align 8, !tbaa !11
%43 = getelementptr inbounds i32, ptr %42, i64 %29
%44 = load i32, ptr %43, align 4, !tbaa !13
%45 = load i32, ptr @DPPCLK0_DTO_PHASE, align 4, !tbaa !13
%46 = load i32, ptr @DPPCLK0_DTO_MODULO, align 4, !tbaa !13
br i1 %41, label %49, label %47
47: ; preds = %36
%48 = call i32 @REG_SET_2(i32 noundef %44, i32 noundef 0, i32 noundef %45, i32 noundef %27, i32 noundef %46, i32 noundef %26) #4
br label %58
49: ; preds = %36
%50 = call i32 @REG_SET_2(i32 noundef %44, i32 noundef 0, i32 noundef %45, i32 noundef %39, i32 noundef %46, i32 noundef %37) #4
br label %58
51: ; preds = %25
%52 = load ptr, ptr @DPPCLK_DTO_PARAM, align 8, !tbaa !11
%53 = getelementptr inbounds i32, ptr %52, i64 %29
%54 = load i32, ptr %53, align 4, !tbaa !13
%55 = load i32, ptr @DPPCLK0_DTO_PHASE, align 4, !tbaa !13
%56 = load i32, ptr @DPPCLK0_DTO_MODULO, align 4, !tbaa !13
%57 = call i32 @REG_SET_2(i32 noundef %54, i32 noundef 0, i32 noundef %55, i32 noundef %27, i32 noundef %56, i32 noundef %26) #4
br label %58
58: ; preds = %47, %49, %51
%59 = load i32, ptr @DPPCLK_DTO_CTRL, align 4, !tbaa !13
%60 = load ptr, ptr @DPPCLK_DTO_ENABLE, align 8, !tbaa !11
%61 = getelementptr inbounds i32, ptr %60, i64 %29
%62 = load i32, ptr %61, align 4, !tbaa !13
%63 = call i32 @REG_UPDATE(i32 noundef %59, i32 noundef %62, i32 noundef 1) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %5) #4
br label %71
64: ; preds = %4
%65 = load i32, ptr @DPPCLK_DTO_CTRL, align 4, !tbaa !13
%66 = load ptr, ptr @DPPCLK_DTO_ENABLE, align 8, !tbaa !11
%67 = sext i32 %1 to i64
%68 = getelementptr inbounds i32, ptr %66, i64 %67
%69 = load i32, ptr %68, align 4, !tbaa !13
%70 = tail call i32 @REG_UPDATE(i32 noundef %65, i32 noundef %69, i32 noundef 0) #4
br label %71
71: ; preds = %64, %58
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @TO_DCN_DCCG(ptr noundef) local_unnamed_addr #2
declare i32 @ASSERT(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @REG_GET_2(i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @REG_SET_2(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @REG_UPDATE(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dccg", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!8, !8, i64 0}
| linux_drivers_gpu_drm_amd_display_dc_dcn20_extr_dcn20_dccg.c_dccg2_update_dpp_dto |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723be/extr_..btcoexist..wifi.h_rtl_read_byte.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723be/extr_..btcoexist..wifi.h_rtl_read_byte.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @rtl_read_byte], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @rtl_read_byte(ptr noundef %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = tail call i32 %3(ptr noundef nonnull %0, i32 noundef %1) #1
ret i32 %4
}
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"rtl_priv", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723be/extr_..btcoexist..wifi.h_rtl_read_byte.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723be/extr_..btcoexist..wifi.h_rtl_read_byte.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @rtl_read_byte], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @rtl_read_byte(ptr noundef %0, i32 noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = tail call i32 %3(ptr noundef nonnull %0, i32 noundef %1) #1
ret i32 %4
}
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"rtl_priv", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
| linux_drivers_net_wireless_realtek_rtlwifi_rtl8723be_extr_..btcoexist..wifi.h_rtl_read_byte |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/bfa/extr_bfa_ioc.c_bfa_dconf_iocdisable.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/bfa/extr_bfa_ioc.c_bfa_dconf_iocdisable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@BFA_DCONF_SM_IOCDISABLE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @bfa_dconf_iocdisable], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @bfa_dconf_iocdisable(ptr noundef %0) #0 {
%2 = tail call ptr @BFA_DCONF_MOD(ptr noundef %0) #2
%3 = load i32, ptr @BFA_DCONF_SM_IOCDISABLE, align 4, !tbaa !5
%4 = tail call i32 @bfa_sm_send_event(ptr noundef %2, i32 noundef %3) #2
ret void
}
declare ptr @BFA_DCONF_MOD(ptr noundef) local_unnamed_addr #1
declare i32 @bfa_sm_send_event(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/bfa/extr_bfa_ioc.c_bfa_dconf_iocdisable.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/bfa/extr_bfa_ioc.c_bfa_dconf_iocdisable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BFA_DCONF_SM_IOCDISABLE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @bfa_dconf_iocdisable], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @bfa_dconf_iocdisable(ptr noundef %0) #0 {
%2 = tail call ptr @BFA_DCONF_MOD(ptr noundef %0) #2
%3 = load i32, ptr @BFA_DCONF_SM_IOCDISABLE, align 4, !tbaa !6
%4 = tail call i32 @bfa_sm_send_event(ptr noundef %2, i32 noundef %3) #2
ret void
}
declare ptr @BFA_DCONF_MOD(ptr noundef) local_unnamed_addr #1
declare i32 @bfa_sm_send_event(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_scsi_bfa_extr_bfa_ioc.c_bfa_dconf_iocdisable |
; ModuleID = 'AnghaBench/linux/drivers/usb/storage/extr_shuttle_usbat.c_usbat_write.c'
source_filename = "AnghaBench/linux/drivers/usb/storage/extr_shuttle_usbat.c_usbat_write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@USBAT_CMD_WRITE_REG = dso_local local_unnamed_addr global i8 0, align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @usbat_write], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @usbat_write(ptr noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2, i8 noundef zeroext %3) #0 {
%5 = load i32, ptr %0, align 4, !tbaa !5
%6 = load i8, ptr @USBAT_CMD_WRITE_REG, align 1, !tbaa !10
%7 = or i8 %6, %1
%8 = tail call i32 @short_pack(i8 noundef zeroext %2, i8 noundef zeroext %3) #2
%9 = tail call i32 @usb_stor_ctrl_transfer(ptr noundef nonnull %0, i32 noundef %5, i8 noundef zeroext %7, i32 noundef 64, i32 noundef %8, i32 noundef 0, ptr noundef null, i32 noundef 0) #2
ret i32 %9
}
declare i32 @usb_stor_ctrl_transfer(ptr noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @short_pack(i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"us_data", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/storage/extr_shuttle_usbat.c_usbat_write.c'
source_filename = "AnghaBench/linux/drivers/usb/storage/extr_shuttle_usbat.c_usbat_write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@USBAT_CMD_WRITE_REG = common local_unnamed_addr global i8 0, align 1
@llvm.used = appending global [1 x ptr] [ptr @usbat_write], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @usbat_write(ptr noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2, i8 noundef zeroext %3) #0 {
%5 = load i32, ptr %0, align 4, !tbaa !6
%6 = load i8, ptr @USBAT_CMD_WRITE_REG, align 1, !tbaa !11
%7 = or i8 %6, %1
%8 = tail call i32 @short_pack(i8 noundef zeroext %2, i8 noundef zeroext %3) #2
%9 = tail call i32 @usb_stor_ctrl_transfer(ptr noundef nonnull %0, i32 noundef %5, i8 noundef zeroext %7, i32 noundef 64, i32 noundef %8, i32 noundef 0, ptr noundef null, i32 noundef 0) #2
ret i32 %9
}
declare i32 @usb_stor_ctrl_transfer(ptr noundef, i32 noundef, i8 noundef zeroext, i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @short_pack(i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"us_data", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!9, !9, i64 0}
| linux_drivers_usb_storage_extr_shuttle_usbat.c_usbat_write |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_phy_n.c_b43_nphy_op_allocate.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_phy_n.c_b43_nphy_op_allocate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @b43_nphy_op_allocate], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @b43_nphy_op_allocate(ptr nocapture noundef writeonly %0) #0 {
%2 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%3 = tail call ptr @kzalloc(i32 noundef 4, i32 noundef %2) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%7 = sub nsw i32 0, %6
br label %9
8: ; preds = %1
store ptr %3, ptr %0, align 8, !tbaa !9
br label %9
9: ; preds = %8, %5
%10 = phi i32 [ 0, %8 ], [ %7, %5 ]
ret i32 %10
}
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 0}
!10 = !{!"b43_wldev", !11, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_phy_n.c_b43_nphy_op_allocate.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/b43/extr_phy_n.c_b43_nphy_op_allocate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @b43_nphy_op_allocate], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @b43_nphy_op_allocate(ptr nocapture noundef writeonly %0) #0 {
%2 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%3 = tail call ptr @kzalloc(i32 noundef 4, i32 noundef %2) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%7 = sub nsw i32 0, %6
br label %9
8: ; preds = %1
store ptr %3, ptr %0, align 8, !tbaa !10
br label %9
9: ; preds = %8, %5
%10 = phi i32 [ 0, %8 ], [ %7, %5 ]
ret i32 %10
}
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 0}
!11 = !{!"b43_wldev", !12, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
| fastsocket_kernel_drivers_net_wireless_b43_extr_phy_n.c_b43_nphy_op_allocate |
; ModuleID = 'AnghaBench/postgres/src/backend/executor/extr_execParallel.c_ExecParallelEstimate.c'
source_filename = "AnghaBench/postgres/src/backend/executor/extr_execParallel.c_ExecParallelEstimate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_13__ = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @ExecParallelEstimate], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ExecParallelEstimate(ptr noundef %0, ptr noundef %1) #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %73, label %4
4: ; preds = %2
%5 = getelementptr inbounds %struct.TYPE_13__, ptr %1, i64 0, i32 1
%6 = load i32, ptr %5, align 4, !tbaa !5
%7 = add nsw i32 %6, 1
store i32 %7, ptr %5, align 4, !tbaa !5
%8 = tail call i32 @nodeTag(ptr noundef nonnull %0) #2
switch i32 %8, label %71 [
i32 129, label %9
i32 130, label %16
i32 131, label %23
i32 134, label %30
i32 137, label %37
i32 135, label %44
i32 136, label %51
i32 133, label %58
i32 132, label %65
i32 128, label %68
]
9: ; preds = %4
%10 = load ptr, ptr %0, align 8, !tbaa !10
%11 = load i32, ptr %10, align 4, !tbaa !13
%12 = icmp eq i32 %11, 0
br i1 %12, label %71, label %13
13: ; preds = %9
%14 = load i32, ptr %1, align 4, !tbaa !15
%15 = tail call i32 @ExecSeqScanEstimate(ptr noundef nonnull %0, i32 noundef %14) #2
br label %71
16: ; preds = %4
%17 = load ptr, ptr %0, align 8, !tbaa !10
%18 = load i32, ptr %17, align 4, !tbaa !13
%19 = icmp eq i32 %18, 0
br i1 %19, label %71, label %20
20: ; preds = %16
%21 = load i32, ptr %1, align 4, !tbaa !15
%22 = tail call i32 @ExecIndexScanEstimate(ptr noundef nonnull %0, i32 noundef %21) #2
br label %71
23: ; preds = %4
%24 = load ptr, ptr %0, align 8, !tbaa !10
%25 = load i32, ptr %24, align 4, !tbaa !13
%26 = icmp eq i32 %25, 0
br i1 %26, label %71, label %27
27: ; preds = %23
%28 = load i32, ptr %1, align 4, !tbaa !15
%29 = tail call i32 @ExecIndexOnlyScanEstimate(ptr noundef nonnull %0, i32 noundef %28) #2
br label %71
30: ; preds = %4
%31 = load ptr, ptr %0, align 8, !tbaa !10
%32 = load i32, ptr %31, align 4, !tbaa !13
%33 = icmp eq i32 %32, 0
br i1 %33, label %71, label %34
34: ; preds = %30
%35 = load i32, ptr %1, align 4, !tbaa !15
%36 = tail call i32 @ExecForeignScanEstimate(ptr noundef nonnull %0, i32 noundef %35) #2
br label %71
37: ; preds = %4
%38 = load ptr, ptr %0, align 8, !tbaa !10
%39 = load i32, ptr %38, align 4, !tbaa !13
%40 = icmp eq i32 %39, 0
br i1 %40, label %71, label %41
41: ; preds = %37
%42 = load i32, ptr %1, align 4, !tbaa !15
%43 = tail call i32 @ExecAppendEstimate(ptr noundef nonnull %0, i32 noundef %42) #2
br label %71
44: ; preds = %4
%45 = load ptr, ptr %0, align 8, !tbaa !10
%46 = load i32, ptr %45, align 4, !tbaa !13
%47 = icmp eq i32 %46, 0
br i1 %47, label %71, label %48
48: ; preds = %44
%49 = load i32, ptr %1, align 4, !tbaa !15
%50 = tail call i32 @ExecCustomScanEstimate(ptr noundef nonnull %0, i32 noundef %49) #2
br label %71
51: ; preds = %4
%52 = load ptr, ptr %0, align 8, !tbaa !10
%53 = load i32, ptr %52, align 4, !tbaa !13
%54 = icmp eq i32 %53, 0
br i1 %54, label %71, label %55
55: ; preds = %51
%56 = load i32, ptr %1, align 4, !tbaa !15
%57 = tail call i32 @ExecBitmapHeapEstimate(ptr noundef nonnull %0, i32 noundef %56) #2
br label %71
58: ; preds = %4
%59 = load ptr, ptr %0, align 8, !tbaa !10
%60 = load i32, ptr %59, align 4, !tbaa !13
%61 = icmp eq i32 %60, 0
br i1 %61, label %71, label %62
62: ; preds = %58
%63 = load i32, ptr %1, align 4, !tbaa !15
%64 = tail call i32 @ExecHashJoinEstimate(ptr noundef nonnull %0, i32 noundef %63) #2
br label %71
65: ; preds = %4
%66 = load i32, ptr %1, align 4, !tbaa !15
%67 = tail call i32 @ExecHashEstimate(ptr noundef nonnull %0, i32 noundef %66) #2
br label %71
68: ; preds = %4
%69 = load i32, ptr %1, align 4, !tbaa !15
%70 = tail call i32 @ExecSortEstimate(ptr noundef nonnull %0, i32 noundef %69) #2
br label %71
71: ; preds = %4, %58, %62, %51, %55, %44, %48, %37, %41, %30, %34, %23, %27, %16, %20, %9, %13, %68, %65
%72 = tail call i32 @planstate_tree_walker(ptr noundef nonnull %0, ptr noundef nonnull @ExecParallelEstimate, ptr noundef nonnull %1) #2
br label %73
73: ; preds = %2, %71
%74 = phi i32 [ %72, %71 ], [ 0, %2 ]
ret i32 %74
}
declare i32 @nodeTag(ptr noundef) local_unnamed_addr #1
declare i32 @ExecSeqScanEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecIndexScanEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecIndexOnlyScanEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecForeignScanEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecAppendEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecCustomScanEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecBitmapHeapEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecHashJoinEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecHashEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecSortEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @planstate_tree_walker(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"TYPE_13__", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_12__", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_11__", !7, i64 0}
!15 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/postgres/src/backend/executor/extr_execParallel.c_ExecParallelEstimate.c'
source_filename = "AnghaBench/postgres/src/backend/executor/extr_execParallel.c_ExecParallelEstimate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ExecParallelEstimate], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ExecParallelEstimate(ptr noundef %0, ptr noundef %1) #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %73, label %4
4: ; preds = %2
%5 = getelementptr inbounds i8, ptr %1, i64 4
%6 = load i32, ptr %5, align 4, !tbaa !6
%7 = add nsw i32 %6, 1
store i32 %7, ptr %5, align 4, !tbaa !6
%8 = tail call i32 @nodeTag(ptr noundef nonnull %0) #2
switch i32 %8, label %71 [
i32 129, label %9
i32 130, label %16
i32 131, label %23
i32 134, label %30
i32 137, label %37
i32 135, label %44
i32 136, label %51
i32 133, label %58
i32 132, label %65
i32 128, label %68
]
9: ; preds = %4
%10 = load ptr, ptr %0, align 8, !tbaa !11
%11 = load i32, ptr %10, align 4, !tbaa !14
%12 = icmp eq i32 %11, 0
br i1 %12, label %71, label %13
13: ; preds = %9
%14 = load i32, ptr %1, align 4, !tbaa !16
%15 = tail call i32 @ExecSeqScanEstimate(ptr noundef nonnull %0, i32 noundef %14) #2
br label %71
16: ; preds = %4
%17 = load ptr, ptr %0, align 8, !tbaa !11
%18 = load i32, ptr %17, align 4, !tbaa !14
%19 = icmp eq i32 %18, 0
br i1 %19, label %71, label %20
20: ; preds = %16
%21 = load i32, ptr %1, align 4, !tbaa !16
%22 = tail call i32 @ExecIndexScanEstimate(ptr noundef nonnull %0, i32 noundef %21) #2
br label %71
23: ; preds = %4
%24 = load ptr, ptr %0, align 8, !tbaa !11
%25 = load i32, ptr %24, align 4, !tbaa !14
%26 = icmp eq i32 %25, 0
br i1 %26, label %71, label %27
27: ; preds = %23
%28 = load i32, ptr %1, align 4, !tbaa !16
%29 = tail call i32 @ExecIndexOnlyScanEstimate(ptr noundef nonnull %0, i32 noundef %28) #2
br label %71
30: ; preds = %4
%31 = load ptr, ptr %0, align 8, !tbaa !11
%32 = load i32, ptr %31, align 4, !tbaa !14
%33 = icmp eq i32 %32, 0
br i1 %33, label %71, label %34
34: ; preds = %30
%35 = load i32, ptr %1, align 4, !tbaa !16
%36 = tail call i32 @ExecForeignScanEstimate(ptr noundef nonnull %0, i32 noundef %35) #2
br label %71
37: ; preds = %4
%38 = load ptr, ptr %0, align 8, !tbaa !11
%39 = load i32, ptr %38, align 4, !tbaa !14
%40 = icmp eq i32 %39, 0
br i1 %40, label %71, label %41
41: ; preds = %37
%42 = load i32, ptr %1, align 4, !tbaa !16
%43 = tail call i32 @ExecAppendEstimate(ptr noundef nonnull %0, i32 noundef %42) #2
br label %71
44: ; preds = %4
%45 = load ptr, ptr %0, align 8, !tbaa !11
%46 = load i32, ptr %45, align 4, !tbaa !14
%47 = icmp eq i32 %46, 0
br i1 %47, label %71, label %48
48: ; preds = %44
%49 = load i32, ptr %1, align 4, !tbaa !16
%50 = tail call i32 @ExecCustomScanEstimate(ptr noundef nonnull %0, i32 noundef %49) #2
br label %71
51: ; preds = %4
%52 = load ptr, ptr %0, align 8, !tbaa !11
%53 = load i32, ptr %52, align 4, !tbaa !14
%54 = icmp eq i32 %53, 0
br i1 %54, label %71, label %55
55: ; preds = %51
%56 = load i32, ptr %1, align 4, !tbaa !16
%57 = tail call i32 @ExecBitmapHeapEstimate(ptr noundef nonnull %0, i32 noundef %56) #2
br label %71
58: ; preds = %4
%59 = load ptr, ptr %0, align 8, !tbaa !11
%60 = load i32, ptr %59, align 4, !tbaa !14
%61 = icmp eq i32 %60, 0
br i1 %61, label %71, label %62
62: ; preds = %58
%63 = load i32, ptr %1, align 4, !tbaa !16
%64 = tail call i32 @ExecHashJoinEstimate(ptr noundef nonnull %0, i32 noundef %63) #2
br label %71
65: ; preds = %4
%66 = load i32, ptr %1, align 4, !tbaa !16
%67 = tail call i32 @ExecHashEstimate(ptr noundef nonnull %0, i32 noundef %66) #2
br label %71
68: ; preds = %4
%69 = load i32, ptr %1, align 4, !tbaa !16
%70 = tail call i32 @ExecSortEstimate(ptr noundef nonnull %0, i32 noundef %69) #2
br label %71
71: ; preds = %4, %58, %62, %51, %55, %44, %48, %37, %41, %30, %34, %23, %27, %16, %20, %9, %13, %68, %65
%72 = tail call i32 @planstate_tree_walker(ptr noundef nonnull %0, ptr noundef nonnull @ExecParallelEstimate, ptr noundef nonnull %1) #2
br label %73
73: ; preds = %2, %71
%74 = phi i32 [ %72, %71 ], [ 0, %2 ]
ret i32 %74
}
declare i32 @nodeTag(ptr noundef) local_unnamed_addr #1
declare i32 @ExecSeqScanEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecIndexScanEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecIndexOnlyScanEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecForeignScanEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecAppendEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecCustomScanEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecBitmapHeapEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecHashJoinEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecHashEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ExecSortEstimate(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @planstate_tree_walker(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"TYPE_13__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_12__", !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"TYPE_11__", !8, i64 0}
!16 = !{!7, !8, i64 0}
| postgres_src_backend_executor_extr_execParallel.c_ExecParallelEstimate |
; ModuleID = 'AnghaBench/RetroArch/deps/lua/src/extr_lundump.c_LoadInt.c'
source_filename = "AnghaBench/RetroArch/deps/lua/src/extr_lundump.c_LoadInt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @LoadInt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @LoadInt(ptr noundef %0) #0 {
%2 = tail call i32 @LoadVar(ptr noundef %0, i32 noundef undef) #2
ret i32 undef
}
declare i32 @LoadVar(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/RetroArch/deps/lua/src/extr_lundump.c_LoadInt.c'
source_filename = "AnghaBench/RetroArch/deps/lua/src/extr_lundump.c_LoadInt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @LoadInt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @LoadInt(ptr noundef %0) #0 {
%2 = tail call i32 @LoadVar(ptr noundef %0, i32 noundef undef) #2
ret i32 undef
}
declare i32 @LoadVar(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| RetroArch_deps_lua_src_extr_lundump.c_LoadInt |
; ModuleID = 'AnghaBench/qmk_firmware/keyboards/dichotomy/extr_matrix.c_matrix_get_row.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/dichotomy/extr_matrix.c_matrix_get_row.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@matrix = dso_local local_unnamed_addr global ptr null, align 8
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/qmk_firmware/keyboards/dichotomy/extr_matrix.c_matrix_get_row.c'
source_filename = "AnghaBench/qmk_firmware/keyboards/dichotomy/extr_matrix.c_matrix_get_row.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@matrix = common local_unnamed_addr global ptr null, align 8
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| qmk_firmware_keyboards_dichotomy_extr_matrix.c_matrix_get_row |
; ModuleID = 'AnghaBench/linux/drivers/net/can/c_can/extr_c_can_platform.c_c_can_hw_raminit_syscon.c'
source_filename = "AnghaBench/linux/drivers/net/can/c_can/extr_c_can_platform.c_c_can_hw_raminit_syscon.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, i32 }
%struct.c_can_raminit = type { %struct.TYPE_2__, i32, i32, i64 }
@raminit_lock = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @c_can_hw_raminit_syscon], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @c_can_hw_raminit_syscon(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
store i32 0, ptr %3, align 4, !tbaa !5
%4 = tail call i32 @spin_lock(ptr noundef nonnull @raminit_lock) #3
%5 = load i32, ptr %0, align 8, !tbaa !9
%6 = shl nuw i32 1, %5
%7 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 1
%8 = load i32, ptr %7, align 4, !tbaa !13
%9 = shl nuw i32 1, %8
%10 = or i32 %9, %6
%11 = getelementptr inbounds %struct.c_can_raminit, ptr %0, i64 0, i32 2
%12 = load i32, ptr %11, align 4, !tbaa !14
%13 = getelementptr inbounds %struct.c_can_raminit, ptr %0, i64 0, i32 1
%14 = load i32, ptr %13, align 8, !tbaa !15
%15 = call i32 @regmap_read(i32 noundef %12, i32 noundef %14, ptr noundef nonnull %3) #3
%16 = xor i32 %10, -1
%17 = load i32, ptr %3, align 4, !tbaa !5
%18 = and i32 %17, %16
store i32 %18, ptr %3, align 4, !tbaa !5
%19 = load i32, ptr %11, align 4, !tbaa !14
%20 = load i32, ptr %13, align 8, !tbaa !15
%21 = call i32 @regmap_update_bits(i32 noundef %19, i32 noundef %20, i32 noundef %10, i32 noundef %18) #3
%22 = load i32, ptr %0, align 8, !tbaa !9
%23 = shl nuw i32 1, %22
%24 = load i32, ptr %3, align 4, !tbaa !5
%25 = call i32 @c_can_hw_raminit_wait_syscon(ptr noundef nonnull %0, i32 noundef %23, i32 noundef %24) #3
%26 = icmp eq i32 %1, 0
br i1 %26, label %62, label %27
27: ; preds = %2
%28 = load i32, ptr %0, align 8, !tbaa !9
%29 = shl nuw i32 1, %28
%30 = load i32, ptr %3, align 4, !tbaa !5
%31 = or i32 %30, %29
%32 = load i32, ptr %7, align 4, !tbaa !13
%33 = shl nuw i32 1, %32
%34 = or i32 %33, %31
store i32 %34, ptr %3, align 4, !tbaa !5
%35 = load i32, ptr %11, align 4, !tbaa !14
%36 = load i32, ptr %13, align 8, !tbaa !15
%37 = call i32 @regmap_update_bits(i32 noundef %35, i32 noundef %36, i32 noundef %10, i32 noundef %34) #3
%38 = load i32, ptr %7, align 4, !tbaa !13
%39 = shl nuw i32 1, %38
%40 = xor i32 %39, -1
%41 = load i32, ptr %3, align 4, !tbaa !5
%42 = and i32 %41, %40
%43 = getelementptr inbounds %struct.c_can_raminit, ptr %0, i64 0, i32 3
%44 = load i64, ptr %43, align 8, !tbaa !16
%45 = icmp eq i64 %44, 0
br i1 %45, label %57, label %46
46: ; preds = %27
%47 = load i32, ptr %0, align 8, !tbaa !9
%48 = shl nuw i32 1, %47
%49 = xor i32 %48, -1
%50 = and i32 %42, %49
store i32 %50, ptr %3, align 4, !tbaa !5
%51 = load i32, ptr %11, align 4, !tbaa !14
%52 = load i32, ptr %13, align 8, !tbaa !15
%53 = call i32 @regmap_update_bits(i32 noundef %51, i32 noundef %52, i32 noundef %10, i32 noundef %50) #3
%54 = load i32, ptr %7, align 4, !tbaa !13
%55 = load i32, ptr %3, align 4, !tbaa !5
%56 = shl nuw i32 1, %54
br label %57
57: ; preds = %46, %27
%58 = phi i32 [ %56, %46 ], [ %39, %27 ]
%59 = phi i32 [ %55, %46 ], [ %42, %27 ]
%60 = or i32 %59, %58
store i32 %60, ptr %3, align 4, !tbaa !5
%61 = call i32 @c_can_hw_raminit_wait_syscon(ptr noundef nonnull %0, i32 noundef %10, i32 noundef %60) #3
br label %62
62: ; preds = %57, %2
%63 = call i32 @spin_unlock(ptr noundef nonnull @raminit_lock) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #2
declare i32 @regmap_read(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @regmap_update_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @c_can_hw_raminit_wait_syscon(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"c_can_raminit", !11, i64 0, !6, i64 8, !6, i64 12, !12, i64 16}
!11 = !{!"TYPE_2__", !6, i64 0, !6, i64 4}
!12 = !{!"long", !7, i64 0}
!13 = !{!10, !6, i64 4}
!14 = !{!10, !6, i64 12}
!15 = !{!10, !6, i64 8}
!16 = !{!10, !12, i64 16}
| ; ModuleID = 'AnghaBench/linux/drivers/net/can/c_can/extr_c_can_platform.c_c_can_hw_raminit_syscon.c'
source_filename = "AnghaBench/linux/drivers/net/can/c_can/extr_c_can_platform.c_c_can_hw_raminit_syscon.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@raminit_lock = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @c_can_hw_raminit_syscon], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @c_can_hw_raminit_syscon(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
store i32 0, ptr %3, align 4, !tbaa !6
%4 = tail call i32 @spin_lock(ptr noundef nonnull @raminit_lock) #3
%5 = load i32, ptr %0, align 8, !tbaa !10
%6 = shl nuw i32 1, %5
%7 = getelementptr inbounds i8, ptr %0, i64 4
%8 = load i32, ptr %7, align 4, !tbaa !14
%9 = shl nuw i32 1, %8
%10 = or i32 %9, %6
%11 = getelementptr inbounds i8, ptr %0, i64 12
%12 = load i32, ptr %11, align 4, !tbaa !15
%13 = getelementptr inbounds i8, ptr %0, i64 8
%14 = load i32, ptr %13, align 8, !tbaa !16
%15 = call i32 @regmap_read(i32 noundef %12, i32 noundef %14, ptr noundef nonnull %3) #3
%16 = xor i32 %10, -1
%17 = load i32, ptr %3, align 4, !tbaa !6
%18 = and i32 %17, %16
store i32 %18, ptr %3, align 4, !tbaa !6
%19 = load i32, ptr %11, align 4, !tbaa !15
%20 = load i32, ptr %13, align 8, !tbaa !16
%21 = call i32 @regmap_update_bits(i32 noundef %19, i32 noundef %20, i32 noundef %10, i32 noundef %18) #3
%22 = load i32, ptr %0, align 8, !tbaa !10
%23 = shl nuw i32 1, %22
%24 = load i32, ptr %3, align 4, !tbaa !6
%25 = call i32 @c_can_hw_raminit_wait_syscon(ptr noundef nonnull %0, i32 noundef %23, i32 noundef %24) #3
%26 = icmp eq i32 %1, 0
br i1 %26, label %62, label %27
27: ; preds = %2
%28 = load i32, ptr %0, align 8, !tbaa !10
%29 = shl nuw i32 1, %28
%30 = load i32, ptr %3, align 4, !tbaa !6
%31 = or i32 %30, %29
%32 = load i32, ptr %7, align 4, !tbaa !14
%33 = shl nuw i32 1, %32
%34 = or i32 %33, %31
store i32 %34, ptr %3, align 4, !tbaa !6
%35 = load i32, ptr %11, align 4, !tbaa !15
%36 = load i32, ptr %13, align 8, !tbaa !16
%37 = call i32 @regmap_update_bits(i32 noundef %35, i32 noundef %36, i32 noundef %10, i32 noundef %34) #3
%38 = load i32, ptr %7, align 4, !tbaa !14
%39 = shl nuw i32 1, %38
%40 = xor i32 %39, -1
%41 = load i32, ptr %3, align 4, !tbaa !6
%42 = and i32 %41, %40
%43 = getelementptr inbounds i8, ptr %0, i64 16
%44 = load i64, ptr %43, align 8, !tbaa !17
%45 = icmp eq i64 %44, 0
br i1 %45, label %57, label %46
46: ; preds = %27
%47 = load i32, ptr %0, align 8, !tbaa !10
%48 = shl nuw i32 1, %47
%49 = xor i32 %48, -1
%50 = and i32 %42, %49
store i32 %50, ptr %3, align 4, !tbaa !6
%51 = load i32, ptr %11, align 4, !tbaa !15
%52 = load i32, ptr %13, align 8, !tbaa !16
%53 = call i32 @regmap_update_bits(i32 noundef %51, i32 noundef %52, i32 noundef %10, i32 noundef %50) #3
%54 = load i32, ptr %7, align 4, !tbaa !14
%55 = load i32, ptr %3, align 4, !tbaa !6
%56 = shl nuw i32 1, %54
br label %57
57: ; preds = %46, %27
%58 = phi i32 [ %56, %46 ], [ %39, %27 ]
%59 = phi i32 [ %55, %46 ], [ %42, %27 ]
%60 = or i32 %59, %58
store i32 %60, ptr %3, align 4, !tbaa !6
%61 = call i32 @c_can_hw_raminit_wait_syscon(ptr noundef nonnull %0, i32 noundef %10, i32 noundef %60) #3
br label %62
62: ; preds = %57, %2
%63 = call i32 @spin_unlock(ptr noundef nonnull @raminit_lock) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #2
declare i32 @regmap_read(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @regmap_update_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @c_can_hw_raminit_wait_syscon(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"c_can_raminit", !12, i64 0, !7, i64 8, !7, i64 12, !13, i64 16}
!12 = !{!"TYPE_2__", !7, i64 0, !7, i64 4}
!13 = !{!"long", !8, i64 0}
!14 = !{!11, !7, i64 4}
!15 = !{!11, !7, i64 12}
!16 = !{!11, !7, i64 8}
!17 = !{!11, !13, i64 16}
| linux_drivers_net_can_c_can_extr_c_can_platform.c_c_can_hw_raminit_syscon |
; ModuleID = 'AnghaBench/darwin-xnu/bsd/kern/extr_subr_xxx.c_nullsys.c'
source_filename = "AnghaBench/darwin-xnu/bsd/kern/extr_subr_xxx.c_nullsys.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local void @nullsys() local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/darwin-xnu/bsd/kern/extr_subr_xxx.c_nullsys.c'
source_filename = "AnghaBench/darwin-xnu/bsd/kern/extr_subr_xxx.c_nullsys.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @nullsys() local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| darwin-xnu_bsd_kern_extr_subr_xxx.c_nullsys |
; ModuleID = 'AnghaBench/freebsd/contrib/ntp/sntp/libevent/extr_event_tagging.c_evtag_decode_int64.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/sntp/libevent/extr_event_tagging.c_evtag_decode_int64.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @evtag_decode_int64(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @decode_int64_internal(ptr noundef %0, ptr noundef %1, i32 noundef 0) #2
%4 = icmp eq i32 %3, -1
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @evbuffer_drain(ptr noundef %1, i32 noundef %3) #2
br label %7
7: ; preds = %5, %2
%8 = sext i1 %4 to i32
ret i32 %8
}
declare i32 @decode_int64_internal(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @evbuffer_drain(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ntp/sntp/libevent/extr_event_tagging.c_evtag_decode_int64.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/sntp/libevent/extr_event_tagging.c_evtag_decode_int64.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -1, 1) i32 @evtag_decode_int64(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @decode_int64_internal(ptr noundef %0, ptr noundef %1, i32 noundef 0) #2
%4 = icmp eq i32 %3, -1
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = tail call i32 @evbuffer_drain(ptr noundef %1, i32 noundef %3) #2
br label %7
7: ; preds = %5, %2
%8 = sext i1 %4 to i32
ret i32 %8
}
declare i32 @decode_int64_internal(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @evbuffer_drain(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_ntp_sntp_libevent_extr_event_tagging.c_evtag_decode_int64 |
; ModuleID = 'AnghaBench/reactos/dll/win32/mshtml/extr_htmlstyle.c_get_nsstyle_pixel_val.c'
source_filename = "AnghaBench/reactos/dll/win32/mshtml/extr_htmlstyle.c_get_nsstyle_pixel_val.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@E_POINTER = dso_local local_unnamed_addr global i64 0, align 8
@S_OK = dso_local local_unnamed_addr global i64 0, align 8
@pxW = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [44 x i8] c"%s: only px values are currently supported\0A\00", align 1
@E_NOTIMPL = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @get_nsstyle_pixel_val], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @get_nsstyle_pixel_val(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef writeonly %2) #0 {
%4 = alloca i32, align 4
%5 = alloca ptr, align 8
%6 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%7 = icmp eq ptr %2, null
br i1 %7, label %8, label %10
8: ; preds = %3
%9 = load i64, ptr @E_POINTER, align 8, !tbaa !5
br label %54
10: ; preds = %3
%11 = call i32 @nsAString_Init(ptr noundef nonnull %4, ptr noundef null) #3
%12 = load i32, ptr %0, align 4, !tbaa !9
%13 = call i64 @get_nsstyle_attr_nsval(i32 noundef %12, i32 noundef %1, ptr noundef nonnull %4) #3
%14 = load i64, ptr @S_OK, align 8, !tbaa !5
%15 = icmp eq i64 %13, %14
br i1 %15, label %16, label %51
16: ; preds = %10
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
%17 = call i32 @nsAString_GetData(ptr noundef nonnull %4, ptr noundef nonnull %6) #3
%18 = load ptr, ptr %6, align 8, !tbaa !12
%19 = icmp eq ptr %18, null
br i1 %19, label %48, label %20
20: ; preds = %16
%21 = call i32 @strtolW(ptr noundef nonnull %18, ptr noundef nonnull %5, i32 noundef 10) #3
store i32 %21, ptr %2, align 4, !tbaa !14
%22 = load ptr, ptr %5, align 8, !tbaa !12
%23 = load i8, ptr %22, align 1, !tbaa !15
%24 = icmp eq i8 %23, 46
br i1 %24, label %25, label %34
25: ; preds = %20, %25
%26 = load ptr, ptr %5, align 8, !tbaa !12
%27 = getelementptr inbounds i8, ptr %26, i64 1
store ptr %27, ptr %5, align 8, !tbaa !12
%28 = load i8, ptr %27, align 1, !tbaa !15
%29 = call i64 @isdigitW(i8 noundef signext %28) #3
%30 = icmp eq i64 %29, 0
br i1 %30, label %31, label %25, !llvm.loop !16
31: ; preds = %25
%32 = load ptr, ptr %5, align 8, !tbaa !12
%33 = load i8, ptr %32, align 1, !tbaa !15
br label %34
34: ; preds = %31, %20
%35 = phi i8 [ %33, %31 ], [ %23, %20 ]
%36 = phi ptr [ %32, %31 ], [ %22, %20 ]
%37 = icmp eq i8 %35, 0
br i1 %37, label %49, label %38
38: ; preds = %34
%39 = load i32, ptr @pxW, align 4, !tbaa !14
%40 = call i64 @strcmpW(ptr noundef nonnull %36, i32 noundef %39) #3
%41 = icmp eq i64 %40, 0
br i1 %41, label %49, label %42
42: ; preds = %38
%43 = call i32 @nsAString_Finish(ptr noundef nonnull %4) #3
%44 = load ptr, ptr %6, align 8, !tbaa !12
%45 = call i32 @debugstr_w(ptr noundef %44) #3
%46 = call i32 @FIXME(ptr noundef nonnull @.str, i32 noundef %45) #3
%47 = load i64, ptr @E_NOTIMPL, align 8, !tbaa !5
br label %49
48: ; preds = %16
store i32 0, ptr %2, align 4, !tbaa !14
br label %49
49: ; preds = %34, %38, %42, %48
%50 = phi i64 [ %47, %42 ], [ %13, %38 ], [ %13, %34 ], [ %13, %48 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
br label %51
51: ; preds = %49, %10
%52 = phi i64 [ %50, %49 ], [ %13, %10 ]
%53 = call i32 @nsAString_Finish(ptr noundef nonnull %4) #3
br label %54
54: ; preds = %51, %8
%55 = phi i64 [ %52, %51 ], [ %9, %8 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i64 %55
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @nsAString_Init(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @get_nsstyle_attr_nsval(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @nsAString_GetData(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @strtolW(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @isdigitW(i8 noundef signext) local_unnamed_addr #2
declare i64 @strcmpW(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @nsAString_Finish(ptr noundef) local_unnamed_addr #2
declare i32 @FIXME(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @debugstr_w(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_3__", !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!11, !11, i64 0}
!15 = !{!7, !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/reactos/dll/win32/mshtml/extr_htmlstyle.c_get_nsstyle_pixel_val.c'
source_filename = "AnghaBench/reactos/dll/win32/mshtml/extr_htmlstyle.c_get_nsstyle_pixel_val.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@E_POINTER = common local_unnamed_addr global i64 0, align 8
@S_OK = common local_unnamed_addr global i64 0, align 8
@pxW = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [44 x i8] c"%s: only px values are currently supported\0A\00", align 1
@E_NOTIMPL = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @get_nsstyle_pixel_val], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @get_nsstyle_pixel_val(ptr nocapture noundef readonly %0, i32 noundef %1, ptr noundef writeonly %2) #0 {
%4 = alloca i32, align 4
%5 = alloca ptr, align 8
%6 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%7 = icmp eq ptr %2, null
br i1 %7, label %8, label %10
8: ; preds = %3
%9 = load i64, ptr @E_POINTER, align 8, !tbaa !6
br label %54
10: ; preds = %3
%11 = call i32 @nsAString_Init(ptr noundef nonnull %4, ptr noundef null) #3
%12 = load i32, ptr %0, align 4, !tbaa !10
%13 = call i64 @get_nsstyle_attr_nsval(i32 noundef %12, i32 noundef %1, ptr noundef nonnull %4) #3
%14 = load i64, ptr @S_OK, align 8, !tbaa !6
%15 = icmp eq i64 %13, %14
br i1 %15, label %16, label %51
16: ; preds = %10
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %6) #3
%17 = call i32 @nsAString_GetData(ptr noundef nonnull %4, ptr noundef nonnull %6) #3
%18 = load ptr, ptr %6, align 8, !tbaa !13
%19 = icmp eq ptr %18, null
br i1 %19, label %48, label %20
20: ; preds = %16
%21 = call i32 @strtolW(ptr noundef nonnull %18, ptr noundef nonnull %5, i32 noundef 10) #3
store i32 %21, ptr %2, align 4, !tbaa !15
%22 = load ptr, ptr %5, align 8, !tbaa !13
%23 = load i8, ptr %22, align 1, !tbaa !16
%24 = icmp eq i8 %23, 46
br i1 %24, label %25, label %34
25: ; preds = %20, %25
%26 = load ptr, ptr %5, align 8, !tbaa !13
%27 = getelementptr inbounds i8, ptr %26, i64 1
store ptr %27, ptr %5, align 8, !tbaa !13
%28 = load i8, ptr %27, align 1, !tbaa !16
%29 = call i64 @isdigitW(i8 noundef signext %28) #3
%30 = icmp eq i64 %29, 0
br i1 %30, label %31, label %25, !llvm.loop !17
31: ; preds = %25
%32 = load ptr, ptr %5, align 8, !tbaa !13
%33 = load i8, ptr %32, align 1, !tbaa !16
br label %34
34: ; preds = %31, %20
%35 = phi i8 [ %33, %31 ], [ %23, %20 ]
%36 = phi ptr [ %32, %31 ], [ %22, %20 ]
%37 = icmp eq i8 %35, 0
br i1 %37, label %49, label %38
38: ; preds = %34
%39 = load i32, ptr @pxW, align 4, !tbaa !15
%40 = call i64 @strcmpW(ptr noundef nonnull %36, i32 noundef %39) #3
%41 = icmp eq i64 %40, 0
br i1 %41, label %49, label %42
42: ; preds = %38
%43 = call i32 @nsAString_Finish(ptr noundef nonnull %4) #3
%44 = load ptr, ptr %6, align 8, !tbaa !13
%45 = call i32 @debugstr_w(ptr noundef %44) #3
%46 = call i32 @FIXME(ptr noundef nonnull @.str, i32 noundef %45) #3
%47 = load i64, ptr @E_NOTIMPL, align 8, !tbaa !6
br label %49
48: ; preds = %16
store i32 0, ptr %2, align 4, !tbaa !15
br label %49
49: ; preds = %34, %38, %42, %48
%50 = phi i64 [ %47, %42 ], [ %13, %38 ], [ %13, %34 ], [ %13, %48 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
br label %51
51: ; preds = %49, %10
%52 = phi i64 [ %50, %49 ], [ %13, %10 ]
%53 = call i32 @nsAString_Finish(ptr noundef nonnull %4) #3
br label %54
54: ; preds = %51, %8
%55 = phi i64 [ %52, %51 ], [ %9, %8 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i64 %55
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @nsAString_Init(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @get_nsstyle_attr_nsval(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @nsAString_GetData(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @strtolW(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @isdigitW(i8 noundef signext) local_unnamed_addr #2
declare i64 @strcmpW(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @nsAString_Finish(ptr noundef) local_unnamed_addr #2
declare i32 @FIXME(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @debugstr_w(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_3__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!12, !12, i64 0}
!16 = !{!8, !8, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
| reactos_dll_win32_mshtml_extr_htmlstyle.c_get_nsstyle_pixel_val |
; ModuleID = 'AnghaBench/linux/net/rds/extr_rdma_transport.c_rds_rdma_exit.c'
source_filename = "AnghaBench/linux/net/rds/extr_rdma_transport.c_rds_rdma_exit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @rds_rdma_exit], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @rds_rdma_exit() #0 {
%1 = tail call i32 (...) @rds_rdma_listen_stop() #2
%2 = tail call i32 (...) @rds_ib_exit() #2
ret void
}
declare i32 @rds_rdma_listen_stop(...) local_unnamed_addr #1
declare i32 @rds_ib_exit(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/net/rds/extr_rdma_transport.c_rds_rdma_exit.c'
source_filename = "AnghaBench/linux/net/rds/extr_rdma_transport.c_rds_rdma_exit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @rds_rdma_exit], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @rds_rdma_exit() #0 {
%1 = tail call i32 @rds_rdma_listen_stop() #2
%2 = tail call i32 @rds_ib_exit() #2
ret void
}
declare i32 @rds_rdma_listen_stop(...) local_unnamed_addr #1
declare i32 @rds_ib_exit(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_net_rds_extr_rdma_transport.c_rds_rdma_exit |
; ModuleID = 'AnghaBench/Provenance/Cores/FCEU/FCEU/lua/src/extr_ldblib.c_settabsi.c'
source_filename = "AnghaBench/Provenance/Cores/FCEU/FCEU/lua/src/extr_ldblib.c_settabsi.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @settabsi], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @settabsi(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = tail call i32 @lua_pushinteger(ptr noundef %0, i32 noundef %2) #2
%5 = tail call i32 @lua_setfield(ptr noundef %0, i32 noundef -2, ptr noundef %1) #2
ret void
}
declare i32 @lua_pushinteger(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_setfield(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/FCEU/FCEU/lua/src/extr_ldblib.c_settabsi.c'
source_filename = "AnghaBench/Provenance/Cores/FCEU/FCEU/lua/src/extr_ldblib.c_settabsi.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @settabsi], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @settabsi(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = tail call i32 @lua_pushinteger(ptr noundef %0, i32 noundef %2) #2
%5 = tail call i32 @lua_setfield(ptr noundef %0, i32 noundef -2, ptr noundef %1) #2
ret void
}
declare i32 @lua_pushinteger(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_setfield(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| Provenance_Cores_FCEU_FCEU_lua_src_extr_ldblib.c_settabsi |
; ModuleID = 'AnghaBench/exploitdb/exploits/linux/remote/extr_107.c_quit.c'
source_filename = "AnghaBench/exploitdb/exploits/linux/remote/extr_107.c_quit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@sockfd = dso_local local_unnamed_addr global i64 0, align 8
@sockfd1 = dso_local local_unnamed_addr global i64 0, align 8
@sockfd2 = dso_local local_unnamed_addr global i64 0, align 8
; Function Attrs: noreturn nounwind uwtable
define dso_local void @quit() local_unnamed_addr #0 {
%1 = load i64, ptr @sockfd, align 8, !tbaa !5
%2 = icmp sgt i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @close(i64 noundef %1) #3
br label %5
5: ; preds = %3, %0
%6 = load i64, ptr @sockfd1, align 8, !tbaa !5
%7 = icmp sgt i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i64, ptr @sockfd, align 8, !tbaa !5
%10 = tail call i32 @close(i64 noundef %9) #3
br label %11
11: ; preds = %8, %5
%12 = load i64, ptr @sockfd2, align 8, !tbaa !5
%13 = icmp sgt i64 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i64, ptr @sockfd, align 8, !tbaa !5
%16 = tail call i32 @close(i64 noundef %15) #3
br label %17
17: ; preds = %14, %11
%18 = tail call i32 @exit(i32 noundef 0) #4
unreachable
}
declare i32 @close(i64 noundef) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
attributes #0 = { noreturn nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { noreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/exploitdb/exploits/linux/remote/extr_107.c_quit.c'
source_filename = "AnghaBench/exploitdb/exploits/linux/remote/extr_107.c_quit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@sockfd = common local_unnamed_addr global i64 0, align 8
@sockfd1 = common local_unnamed_addr global i64 0, align 8
@sockfd2 = common local_unnamed_addr global i64 0, align 8
; Function Attrs: noreturn nounwind ssp uwtable(sync)
define void @quit() local_unnamed_addr #0 {
%1 = load i64, ptr @sockfd, align 8, !tbaa !6
%2 = icmp sgt i64 %1, 0
br i1 %2, label %3, label %5
3: ; preds = %0
%4 = tail call i32 @close(i64 noundef %1) #3
br label %5
5: ; preds = %3, %0
%6 = load i64, ptr @sockfd1, align 8, !tbaa !6
%7 = icmp sgt i64 %6, 0
br i1 %7, label %8, label %11
8: ; preds = %5
%9 = load i64, ptr @sockfd, align 8, !tbaa !6
%10 = tail call i32 @close(i64 noundef %9) #3
br label %11
11: ; preds = %8, %5
%12 = load i64, ptr @sockfd2, align 8, !tbaa !6
%13 = icmp sgt i64 %12, 0
br i1 %13, label %14, label %17
14: ; preds = %11
%15 = load i64, ptr @sockfd, align 8, !tbaa !6
%16 = tail call i32 @close(i64 noundef %15) #3
br label %17
17: ; preds = %14, %11
%18 = tail call i32 @exit(i32 noundef 0) #4
unreachable
}
declare i32 @close(i64 noundef) local_unnamed_addr #1
; Function Attrs: noreturn
declare i32 @exit(i32 noundef) local_unnamed_addr #2
attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { noreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
attributes #4 = { noreturn nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| exploitdb_exploits_linux_remote_extr_107.c_quit |
; ModuleID = 'AnghaBench/freebsd/contrib/unbound/daemon/extr_cachedump.c_load_rrset_cache.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/daemon/extr_cachedump.c_load_rrset_cache.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [18 x i8] c"START_RRSET_CACHE\00", align 1
@.str.1 = private unnamed_addr constant [16 x i8] c"END_RRSET_CACHE\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @load_rrset_cache], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @load_rrset_cache(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !5
%4 = tail call i32 @read_fixed(ptr noundef %0, ptr noundef %3, ptr noundef nonnull @.str) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %17, label %6
6: ; preds = %2, %14
%7 = tail call i64 @ssl_read_buf(ptr noundef %0, ptr noundef %3) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %17, label %9
9: ; preds = %6
%10 = tail call i64 @sldns_buffer_begin(ptr noundef %3) #2
%11 = inttoptr i64 %10 to ptr
%12 = tail call i64 @strcmp(ptr noundef %11, ptr noundef nonnull @.str.1) #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %17, label %14
14: ; preds = %9
%15 = tail call i32 @load_rrset(ptr noundef %0, ptr noundef %3, ptr noundef nonnull %1) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %6, !llvm.loop !11
17: ; preds = %9, %6, %14, %2
%18 = phi i32 [ 0, %2 ], [ 1, %9 ], [ 1, %6 ], [ 0, %14 ]
ret i32 %18
}
declare i32 @read_fixed(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @ssl_read_buf(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @sldns_buffer_begin(ptr noundef) local_unnamed_addr #1
declare i32 @load_rrset(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"worker", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/unbound/daemon/extr_cachedump.c_load_rrset_cache.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/daemon/extr_cachedump.c_load_rrset_cache.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [18 x i8] c"START_RRSET_CACHE\00", align 1
@.str.1 = private unnamed_addr constant [16 x i8] c"END_RRSET_CACHE\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @load_rrset_cache], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @load_rrset_cache(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !6
%4 = tail call i32 @read_fixed(ptr noundef %0, ptr noundef %3, ptr noundef nonnull @.str) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %17, label %6
6: ; preds = %2, %14
%7 = tail call i64 @ssl_read_buf(ptr noundef %0, ptr noundef %3) #2
%8 = icmp eq i64 %7, 0
br i1 %8, label %17, label %9
9: ; preds = %6
%10 = tail call i64 @sldns_buffer_begin(ptr noundef %3) #2
%11 = inttoptr i64 %10 to ptr
%12 = tail call i64 @strcmp(ptr noundef %11, ptr noundef nonnull @.str.1) #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %17, label %14
14: ; preds = %9
%15 = tail call i32 @load_rrset(ptr noundef %0, ptr noundef %3, ptr noundef nonnull %1) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %6, !llvm.loop !12
17: ; preds = %9, %6, %14, %2
%18 = phi i32 [ 0, %2 ], [ 1, %9 ], [ 1, %6 ], [ 0, %14 ]
ret i32 %18
}
declare i32 @read_fixed(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @ssl_read_buf(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @sldns_buffer_begin(ptr noundef) local_unnamed_addr #1
declare i32 @load_rrset(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"worker", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
| freebsd_contrib_unbound_daemon_extr_cachedump.c_load_rrset_cache |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/e1000e/extr_ich8lan.c___er16flash.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/e1000e/extr_ich8lan.c___er16flash.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @__er16flash], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @__er16flash(ptr nocapture noundef readonly %0, i64 noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = add i64 %3, %1
%5 = tail call i32 @readw(i64 noundef %4) #2
ret i32 %5
}
declare i32 @readw(i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"e1000_hw", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/e1000e/extr_ich8lan.c___er16flash.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/e1000e/extr_ich8lan.c___er16flash.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @__er16flash], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @__er16flash(ptr nocapture noundef readonly %0, i64 noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = add i64 %3, %1
%5 = tail call i32 @readw(i64 noundef %4) #2
ret i32 %5
}
declare i32 @readw(i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"e1000_hw", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_net_e1000e_extr_ich8lan.c___er16flash |
; ModuleID = 'AnghaBench/reactos/win32ss/printing/base/spoolsv/extr_rpcstubs.c__RpcDeletePrinterConnection.c'
source_filename = "AnghaBench/reactos/win32ss/printing/base/spoolsv/extr_rpcstubs.c__RpcDeletePrinterConnection.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@UNIMPLEMENTED = dso_local local_unnamed_addr global i32 0, align 4
@ERROR_INVALID_FUNCTION = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local i32 @_RpcDeletePrinterConnection(i32 noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @ERROR_INVALID_FUNCTION, align 4, !tbaa !5
ret i32 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/reactos/win32ss/printing/base/spoolsv/extr_rpcstubs.c__RpcDeletePrinterConnection.c'
source_filename = "AnghaBench/reactos/win32ss/printing/base/spoolsv/extr_rpcstubs.c__RpcDeletePrinterConnection.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@UNIMPLEMENTED = common local_unnamed_addr global i32 0, align 4
@ERROR_INVALID_FUNCTION = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define i32 @_RpcDeletePrinterConnection(i32 noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @ERROR_INVALID_FUNCTION, align 4, !tbaa !6
ret i32 %2
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| reactos_win32ss_printing_base_spoolsv_extr_rpcstubs.c__RpcDeletePrinterConnection |
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/extr_als4000.c_snd_als4k_iobase_readl.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/extr_als4000.c_snd_als4k_iobase_readl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_als4k_iobase_readl], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @snd_als4k_iobase_readl(i64 noundef %0, i32 noundef %1) #0 {
%3 = trunc i64 %0 to i32
%4 = add i32 %3, %1
%5 = tail call i32 @inl(i32 noundef %4) #2
ret i32 %5
}
declare i32 @inl(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/extr_als4000.c_snd_als4k_iobase_readl.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/extr_als4000.c_snd_als4k_iobase_readl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @snd_als4k_iobase_readl], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @snd_als4k_iobase_readl(i64 noundef %0, i32 noundef %1) #0 {
%3 = trunc i64 %0 to i32
%4 = add i32 %3, %1
%5 = tail call i32 @inl(i32 noundef %4) #2
ret i32 %5
}
declare i32 @inl(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_sound_pci_extr_als4000.c_snd_als4k_iobase_readl |
; ModuleID = 'AnghaBench/reactos/dll/directx/wine/d3dcompiler_43/extr_asmshader.yy.c_asmshader_push_buffer_state.c'
source_filename = "AnghaBench/reactos/dll/directx/wine/d3dcompiler_43/extr_asmshader.yy.c_asmshader_push_buffer_state.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, ptr }
@YY_CURRENT_BUFFER = dso_local local_unnamed_addr global i64 0, align 8
@yy_hold_char = dso_local local_unnamed_addr global i32 0, align 4
@yy_c_buf_p = dso_local local_unnamed_addr global ptr null, align 8
@YY_CURRENT_BUFFER_LVALUE = dso_local local_unnamed_addr global ptr null, align 8
@yy_n_chars = dso_local local_unnamed_addr global i32 0, align 4
@yy_buffer_stack_top = dso_local local_unnamed_addr global i32 0, align 4
@yy_did_buffer_switch_on_eof = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @yypush_buffer_state(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %17, label %3
3: ; preds = %1
%4 = tail call i32 (...) @yyensure_buffer_stack() #2
%5 = load i64, ptr @YY_CURRENT_BUFFER, align 8, !tbaa !5
%6 = icmp eq i64 %5, 0
br i1 %6, label %15, label %7
7: ; preds = %3
%8 = load i32, ptr @yy_hold_char, align 4, !tbaa !9
%9 = load ptr, ptr @yy_c_buf_p, align 8, !tbaa !11
store i32 %8, ptr %9, align 4, !tbaa !9
%10 = load ptr, ptr @YY_CURRENT_BUFFER_LVALUE, align 8, !tbaa !11
%11 = getelementptr inbounds %struct.TYPE_4__, ptr %10, i64 0, i32 1
store ptr %9, ptr %11, align 8, !tbaa !13
%12 = load i32, ptr @yy_n_chars, align 4, !tbaa !9
store i32 %12, ptr %10, align 8, !tbaa !15
%13 = load i32, ptr @yy_buffer_stack_top, align 4, !tbaa !9
%14 = add nsw i32 %13, 1
store i32 %14, ptr @yy_buffer_stack_top, align 4, !tbaa !9
br label %15
15: ; preds = %3, %7
store ptr %0, ptr @YY_CURRENT_BUFFER_LVALUE, align 8, !tbaa !11
%16 = tail call i32 (...) @yy_load_buffer_state() #2
store i32 1, ptr @yy_did_buffer_switch_on_eof, align 4, !tbaa !9
br label %17
17: ; preds = %1, %15
ret void
}
declare i32 @yyensure_buffer_stack(...) local_unnamed_addr #1
declare i32 @yy_load_buffer_state(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !12, i64 8}
!14 = !{!"TYPE_4__", !10, i64 0, !12, i64 8}
!15 = !{!14, !10, i64 0}
| ; ModuleID = 'AnghaBench/reactos/dll/directx/wine/d3dcompiler_43/extr_asmshader.yy.c_asmshader_push_buffer_state.c'
source_filename = "AnghaBench/reactos/dll/directx/wine/d3dcompiler_43/extr_asmshader.yy.c_asmshader_push_buffer_state.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@YY_CURRENT_BUFFER = common local_unnamed_addr global i64 0, align 8
@yy_hold_char = common local_unnamed_addr global i32 0, align 4
@yy_c_buf_p = common local_unnamed_addr global ptr null, align 8
@YY_CURRENT_BUFFER_LVALUE = common local_unnamed_addr global ptr null, align 8
@yy_n_chars = common local_unnamed_addr global i32 0, align 4
@yy_buffer_stack_top = common local_unnamed_addr global i32 0, align 4
@yy_did_buffer_switch_on_eof = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @yypush_buffer_state(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %17, label %3
3: ; preds = %1
%4 = tail call i32 @yyensure_buffer_stack() #2
%5 = load i64, ptr @YY_CURRENT_BUFFER, align 8, !tbaa !6
%6 = icmp eq i64 %5, 0
br i1 %6, label %15, label %7
7: ; preds = %3
%8 = load i32, ptr @yy_hold_char, align 4, !tbaa !10
%9 = load ptr, ptr @yy_c_buf_p, align 8, !tbaa !12
store i32 %8, ptr %9, align 4, !tbaa !10
%10 = load ptr, ptr @YY_CURRENT_BUFFER_LVALUE, align 8, !tbaa !12
%11 = getelementptr inbounds i8, ptr %10, i64 8
store ptr %9, ptr %11, align 8, !tbaa !14
%12 = load i32, ptr @yy_n_chars, align 4, !tbaa !10
store i32 %12, ptr %10, align 8, !tbaa !16
%13 = load i32, ptr @yy_buffer_stack_top, align 4, !tbaa !10
%14 = add nsw i32 %13, 1
store i32 %14, ptr @yy_buffer_stack_top, align 4, !tbaa !10
br label %15
15: ; preds = %3, %7
store ptr %0, ptr @YY_CURRENT_BUFFER_LVALUE, align 8, !tbaa !12
%16 = tail call i32 @yy_load_buffer_state() #2
store i32 1, ptr @yy_did_buffer_switch_on_eof, align 4, !tbaa !10
br label %17
17: ; preds = %1, %15
ret void
}
declare i32 @yyensure_buffer_stack(...) local_unnamed_addr #1
declare i32 @yy_load_buffer_state(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !13, i64 8}
!15 = !{!"TYPE_4__", !11, i64 0, !13, i64 8}
!16 = !{!15, !11, i64 0}
| reactos_dll_directx_wine_d3dcompiler_43_extr_asmshader.yy.c_asmshader_push_buffer_state |
; ModuleID = 'AnghaBench/linux/virt/kvm/arm/vgic/extr_vgic.c_kvm_vgic_set_owner.c'
source_filename = "AnghaBench/linux/virt/kvm/arm/vgic/extr_vgic.c_kvm_vgic_set_owner.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.vgic_irq = type { ptr, i32 }
@EAGAIN = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@EEXIST = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @kvm_vgic_set_owner(ptr noundef %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr %0, align 4, !tbaa !5
%5 = tail call i32 @vgic_initialized(i32 noundef %4) #2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i32, ptr @EAGAIN, align 4, !tbaa !10
%9 = sub nsw i32 0, %8
br label %36
10: ; preds = %3
%11 = tail call i32 @irq_is_ppi(i32 noundef %1) #2
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %20
13: ; preds = %10
%14 = load i32, ptr %0, align 4, !tbaa !5
%15 = tail call i32 @vgic_valid_spi(i32 noundef %14, i32 noundef %1) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %13
%18 = load i32, ptr @EINVAL, align 4, !tbaa !10
%19 = sub nsw i32 0, %18
br label %36
20: ; preds = %13, %10
%21 = load i32, ptr %0, align 4, !tbaa !5
%22 = tail call ptr @vgic_get_irq(i32 noundef %21, ptr noundef nonnull %0, i32 noundef %1) #2
%23 = getelementptr inbounds %struct.vgic_irq, ptr %22, i64 0, i32 1
%24 = tail call i32 @raw_spin_lock_irqsave(ptr noundef nonnull %23, i64 noundef undef) #2
%25 = load ptr, ptr %22, align 8, !tbaa !11
%26 = icmp eq ptr %25, null
%27 = icmp eq ptr %25, %2
%28 = or i1 %26, %27
br i1 %28, label %32, label %29
29: ; preds = %20
%30 = load i32, ptr @EEXIST, align 4, !tbaa !10
%31 = sub nsw i32 0, %30
br label %33
32: ; preds = %20
store ptr %2, ptr %22, align 8, !tbaa !11
br label %33
33: ; preds = %32, %29
%34 = phi i32 [ %31, %29 ], [ 0, %32 ]
%35 = tail call i32 @raw_spin_unlock_irqrestore(ptr noundef nonnull %23, i64 noundef undef) #2
br label %36
36: ; preds = %33, %17, %7
%37 = phi i32 [ %34, %33 ], [ %19, %17 ], [ %9, %7 ]
ret i32 %37
}
declare i32 @vgic_initialized(i32 noundef) local_unnamed_addr #1
declare i32 @irq_is_ppi(i32 noundef) local_unnamed_addr #1
declare i32 @vgic_valid_spi(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @vgic_get_irq(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @raw_spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @raw_spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"kvm_vcpu", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"vgic_irq", !13, i64 0, !7, i64 8}
!13 = !{!"any pointer", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/virt/kvm/arm/vgic/extr_vgic.c_kvm_vgic_set_owner.c'
source_filename = "AnghaBench/linux/virt/kvm/arm/vgic/extr_vgic.c_kvm_vgic_set_owner.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EAGAIN = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@EEXIST = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @kvm_vgic_set_owner(ptr noundef %0, i32 noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr %0, align 4, !tbaa !6
%5 = tail call i32 @vgic_initialized(i32 noundef %4) #2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i32, ptr @EAGAIN, align 4, !tbaa !11
%9 = sub nsw i32 0, %8
br label %36
10: ; preds = %3
%11 = tail call i32 @irq_is_ppi(i32 noundef %1) #2
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %20
13: ; preds = %10
%14 = load i32, ptr %0, align 4, !tbaa !6
%15 = tail call i32 @vgic_valid_spi(i32 noundef %14, i32 noundef %1) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %20
17: ; preds = %13
%18 = load i32, ptr @EINVAL, align 4, !tbaa !11
%19 = sub nsw i32 0, %18
br label %36
20: ; preds = %13, %10
%21 = load i32, ptr %0, align 4, !tbaa !6
%22 = tail call ptr @vgic_get_irq(i32 noundef %21, ptr noundef nonnull %0, i32 noundef %1) #2
%23 = getelementptr inbounds i8, ptr %22, i64 8
%24 = tail call i32 @raw_spin_lock_irqsave(ptr noundef nonnull %23, i64 noundef undef) #2
%25 = load ptr, ptr %22, align 8, !tbaa !12
%26 = icmp eq ptr %25, null
%27 = icmp eq ptr %25, %2
%28 = or i1 %26, %27
br i1 %28, label %32, label %29
29: ; preds = %20
%30 = load i32, ptr @EEXIST, align 4, !tbaa !11
%31 = sub nsw i32 0, %30
br label %33
32: ; preds = %20
store ptr %2, ptr %22, align 8, !tbaa !12
br label %33
33: ; preds = %32, %29
%34 = phi i32 [ %31, %29 ], [ 0, %32 ]
%35 = tail call i32 @raw_spin_unlock_irqrestore(ptr noundef nonnull %23, i64 noundef undef) #2
br label %36
36: ; preds = %33, %17, %7
%37 = phi i32 [ %34, %33 ], [ %19, %17 ], [ %9, %7 ]
ret i32 %37
}
declare i32 @vgic_initialized(i32 noundef) local_unnamed_addr #1
declare i32 @irq_is_ppi(i32 noundef) local_unnamed_addr #1
declare i32 @vgic_valid_spi(i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @vgic_get_irq(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @raw_spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @raw_spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"kvm_vcpu", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"vgic_irq", !14, i64 0, !8, i64 8}
!14 = !{!"any pointer", !9, i64 0}
| linux_virt_kvm_arm_vgic_extr_vgic.c_kvm_vgic_set_owner |
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/jbd2/extr_recovery.c_count_tags.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/jbd2/extr_recovery.c_count_tags.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@JBD2_FLAG_SAME_UUID = dso_local local_unnamed_addr global i32 0, align 4
@JBD2_FLAG_LAST_TAG = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @count_tags], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @count_tags(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = tail call i32 @journal_tag_bytes(ptr noundef nonnull %0) #2
%5 = load ptr, ptr %1, align 8, !tbaa !10
%6 = getelementptr inbounds i8, ptr %5, i64 4
%7 = sext i32 %4 to i64
%8 = sext i32 %3 to i64
br label %9
9: ; preds = %18, %2
%10 = phi i32 [ 0, %2 ], [ %19, %18 ]
%11 = phi ptr [ %6, %2 ], [ %27, %18 ]
%12 = load ptr, ptr %1, align 8, !tbaa !10
%13 = ptrtoint ptr %11 to i64
%14 = ptrtoint ptr %12 to i64
%15 = add i64 %13, %7
%16 = sub i64 %15, %14
%17 = icmp sgt i64 %16, %8
br i1 %17, label %33, label %18
18: ; preds = %9
%19 = add nuw nsw i32 %10, 1
%20 = getelementptr inbounds i8, ptr %11, i64 %7
%21 = load i32, ptr %11, align 4, !tbaa !13
%22 = load i32, ptr @JBD2_FLAG_SAME_UUID, align 4, !tbaa !15
%23 = tail call i32 @cpu_to_be32(i32 noundef %22) #2
%24 = and i32 %23, %21
%25 = icmp eq i32 %24, 0
%26 = select i1 %25, i64 16, i64 0
%27 = getelementptr inbounds i8, ptr %20, i64 %26
%28 = load i32, ptr %11, align 4, !tbaa !13
%29 = load i32, ptr @JBD2_FLAG_LAST_TAG, align 4, !tbaa !15
%30 = tail call i32 @cpu_to_be32(i32 noundef %29) #2
%31 = and i32 %30, %28
%32 = icmp eq i32 %31, 0
br i1 %32, label %9, label %33, !llvm.loop !16
33: ; preds = %18, %9
%34 = phi i32 [ %19, %18 ], [ %10, %9 ]
ret i32 %34
}
declare i32 @journal_tag_bytes(ptr noundef) local_unnamed_addr #1
declare i32 @cpu_to_be32(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"buffer_head", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_6__", !7, i64 0}
!15 = !{!7, !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/fs/jbd2/extr_recovery.c_count_tags.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/jbd2/extr_recovery.c_count_tags.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@JBD2_FLAG_SAME_UUID = common local_unnamed_addr global i32 0, align 4
@JBD2_FLAG_LAST_TAG = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @count_tags], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @count_tags(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = tail call i32 @journal_tag_bytes(ptr noundef nonnull %0) #2
%5 = load ptr, ptr %1, align 8, !tbaa !11
%6 = getelementptr inbounds i8, ptr %5, i64 4
%7 = sext i32 %4 to i64
%8 = sext i32 %3 to i64
br label %9
9: ; preds = %18, %2
%10 = phi i32 [ 0, %2 ], [ %19, %18 ]
%11 = phi ptr [ %6, %2 ], [ %27, %18 ]
%12 = load ptr, ptr %1, align 8, !tbaa !11
%13 = ptrtoint ptr %11 to i64
%14 = ptrtoint ptr %12 to i64
%15 = add i64 %13, %7
%16 = sub i64 %15, %14
%17 = icmp sgt i64 %16, %8
br i1 %17, label %33, label %18
18: ; preds = %9
%19 = add nuw nsw i32 %10, 1
%20 = getelementptr inbounds i8, ptr %11, i64 %7
%21 = load i32, ptr %11, align 4, !tbaa !14
%22 = load i32, ptr @JBD2_FLAG_SAME_UUID, align 4, !tbaa !16
%23 = tail call i32 @cpu_to_be32(i32 noundef %22) #2
%24 = and i32 %23, %21
%25 = icmp eq i32 %24, 0
%26 = select i1 %25, i64 16, i64 0
%27 = getelementptr inbounds i8, ptr %20, i64 %26
%28 = load i32, ptr %11, align 4, !tbaa !14
%29 = load i32, ptr @JBD2_FLAG_LAST_TAG, align 4, !tbaa !16
%30 = tail call i32 @cpu_to_be32(i32 noundef %29) #2
%31 = and i32 %30, %28
%32 = icmp eq i32 %31, 0
br i1 %32, label %9, label %33, !llvm.loop !17
33: ; preds = %18, %9
%34 = phi i32 [ %19, %18 ], [ %10, %9 ]
ret i32 %34
}
declare i32 @journal_tag_bytes(ptr noundef) local_unnamed_addr #1
declare i32 @cpu_to_be32(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"buffer_head", !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"TYPE_6__", !8, i64 0}
!16 = !{!8, !8, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
| fastsocket_kernel_fs_jbd2_extr_recovery.c_count_tags |
; ModuleID = 'AnghaBench/freebsd/sys/dev/fb/extr_vga.c_vga_error.c'
source_filename = "AnghaBench/freebsd/sys/dev/fb/extr_vga.c_vga_error.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ENODEV = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @vga_error], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define internal i32 @vga_error() #0 {
%1 = load i32, ptr @ENODEV, align 4, !tbaa !5
ret i32 %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/fb/extr_vga.c_vga_error.c'
source_filename = "AnghaBench/freebsd/sys/dev/fb/extr_vga.c_vga_error.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENODEV = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @vga_error], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define internal i32 @vga_error() #0 {
%1 = load i32, ptr @ENODEV, align 4, !tbaa !6
ret i32 %1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_dev_fb_extr_vga.c_vga_error |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/extr_hw.c_rtl8821ae_set_check_bssid.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/extr_hw.c_rtl8821ae_set_check_bssid.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.rtl_priv = type { ptr, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i64 }
@ERFON = dso_local local_unnamed_addr global i64 0, align 8
@RCR_CBSSID_DATA = dso_local local_unnamed_addr global i32 0, align 4
@RCR_CBSSID_BCN = dso_local local_unnamed_addr global i32 0, align 4
@HW_VAR_RCR = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @rtl8821ae_set_check_bssid(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
%4 = tail call ptr @rtl_priv(ptr noundef %0) #3
%5 = tail call i32 @rtl_pcipriv(ptr noundef %0) #3
%6 = tail call ptr @rtl_pcidev(i32 noundef %5) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%7 = load i32, ptr %6, align 4, !tbaa !5
%8 = getelementptr inbounds %struct.rtl_priv, ptr %4, i64 0, i32 1
%9 = load i64, ptr %8, align 8, !tbaa !10
%10 = load i64, ptr @ERFON, align 8, !tbaa !15
%11 = icmp eq i64 %9, %10
br i1 %11, label %12, label %37
12: ; preds = %2
%13 = icmp eq i32 %1, 0
%14 = load i32, ptr @RCR_CBSSID_DATA, align 4, !tbaa !16
%15 = load i32, ptr @RCR_CBSSID_BCN, align 4, !tbaa !16
br i1 %13, label %26, label %16
16: ; preds = %12
%17 = or i32 %14, %15
%18 = or i32 %17, %7
store i32 %18, ptr %3, align 4, !tbaa !16
%19 = load ptr, ptr %4, align 8, !tbaa !17
%20 = load ptr, ptr %19, align 8, !tbaa !18
%21 = load ptr, ptr %20, align 8, !tbaa !20
%22 = load i32, ptr @HW_VAR_RCR, align 4, !tbaa !16
%23 = call i32 %21(ptr noundef %0, i32 noundef %22, ptr noundef nonnull %3) #3
%24 = call i32 @BIT(i32 noundef 4) #3
%25 = call i32 @_rtl8821ae_set_bcn_ctrl_reg(ptr noundef %0, i32 noundef 0, i32 noundef %24) #3
br label %37
26: ; preds = %12
%27 = or i32 %15, %14
%28 = xor i32 %27, -1
%29 = and i32 %7, %28
store i32 %29, ptr %3, align 4, !tbaa !16
%30 = tail call i32 @BIT(i32 noundef 4) #3
%31 = tail call i32 @_rtl8821ae_set_bcn_ctrl_reg(ptr noundef %0, i32 noundef %30, i32 noundef 0) #3
%32 = load ptr, ptr %4, align 8, !tbaa !17
%33 = load ptr, ptr %32, align 8, !tbaa !18
%34 = load ptr, ptr %33, align 8, !tbaa !20
%35 = load i32, ptr @HW_VAR_RCR, align 4, !tbaa !16
%36 = call i32 %34(ptr noundef %0, i32 noundef %35, ptr noundef nonnull %3) #3
br label %37
37: ; preds = %16, %26, %2
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @rtl_priv(ptr noundef) local_unnamed_addr #2
declare ptr @rtl_pcidev(i32 noundef) local_unnamed_addr #2
declare i32 @rtl_pcipriv(ptr noundef) local_unnamed_addr #2
declare i32 @_rtl8821ae_set_bcn_ctrl_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BIT(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"rtl_pci", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !14, i64 8}
!11 = !{!"rtl_priv", !12, i64 0, !13, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"TYPE_4__", !14, i64 0}
!14 = !{!"long", !8, i64 0}
!15 = !{!14, !14, i64 0}
!16 = !{!7, !7, i64 0}
!17 = !{!11, !12, i64 0}
!18 = !{!19, !12, i64 0}
!19 = !{!"TYPE_6__", !12, i64 0}
!20 = !{!21, !12, i64 0}
!21 = !{!"TYPE_5__", !12, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/extr_hw.c_rtl8821ae_set_check_bssid.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/extr_hw.c_rtl8821ae_set_check_bssid.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ERFON = common local_unnamed_addr global i64 0, align 8
@RCR_CBSSID_DATA = common local_unnamed_addr global i32 0, align 4
@RCR_CBSSID_BCN = common local_unnamed_addr global i32 0, align 4
@HW_VAR_RCR = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @rtl8821ae_set_check_bssid(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
%4 = tail call ptr @rtl_priv(ptr noundef %0) #3
%5 = tail call i32 @rtl_pcipriv(ptr noundef %0) #3
%6 = tail call ptr @rtl_pcidev(i32 noundef %5) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%7 = load i32, ptr %6, align 4, !tbaa !6
%8 = getelementptr inbounds i8, ptr %4, i64 8
%9 = load i64, ptr %8, align 8, !tbaa !11
%10 = load i64, ptr @ERFON, align 8, !tbaa !16
%11 = icmp eq i64 %9, %10
br i1 %11, label %12, label %37
12: ; preds = %2
%13 = icmp eq i32 %1, 0
%14 = load i32, ptr @RCR_CBSSID_DATA, align 4, !tbaa !17
%15 = load i32, ptr @RCR_CBSSID_BCN, align 4, !tbaa !17
br i1 %13, label %26, label %16
16: ; preds = %12
%17 = or i32 %14, %15
%18 = or i32 %17, %7
store i32 %18, ptr %3, align 4, !tbaa !17
%19 = load ptr, ptr %4, align 8, !tbaa !18
%20 = load ptr, ptr %19, align 8, !tbaa !19
%21 = load ptr, ptr %20, align 8, !tbaa !21
%22 = load i32, ptr @HW_VAR_RCR, align 4, !tbaa !17
%23 = call i32 %21(ptr noundef %0, i32 noundef %22, ptr noundef nonnull %3) #3
%24 = call i32 @BIT(i32 noundef 4) #3
%25 = call i32 @_rtl8821ae_set_bcn_ctrl_reg(ptr noundef %0, i32 noundef 0, i32 noundef %24) #3
br label %37
26: ; preds = %12
%27 = or i32 %15, %14
%28 = xor i32 %27, -1
%29 = and i32 %7, %28
store i32 %29, ptr %3, align 4, !tbaa !17
%30 = tail call i32 @BIT(i32 noundef 4) #3
%31 = tail call i32 @_rtl8821ae_set_bcn_ctrl_reg(ptr noundef %0, i32 noundef %30, i32 noundef 0) #3
%32 = load ptr, ptr %4, align 8, !tbaa !18
%33 = load ptr, ptr %32, align 8, !tbaa !19
%34 = load ptr, ptr %33, align 8, !tbaa !21
%35 = load i32, ptr @HW_VAR_RCR, align 4, !tbaa !17
%36 = call i32 %34(ptr noundef %0, i32 noundef %35, ptr noundef nonnull %3) #3
br label %37
37: ; preds = %16, %26, %2
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @rtl_priv(ptr noundef) local_unnamed_addr #2
declare ptr @rtl_pcidev(i32 noundef) local_unnamed_addr #2
declare i32 @rtl_pcipriv(ptr noundef) local_unnamed_addr #2
declare i32 @_rtl8821ae_set_bcn_ctrl_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BIT(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"rtl_pci", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !15, i64 8}
!12 = !{!"rtl_priv", !13, i64 0, !14, i64 8}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!"TYPE_4__", !15, i64 0}
!15 = !{!"long", !9, i64 0}
!16 = !{!15, !15, i64 0}
!17 = !{!8, !8, i64 0}
!18 = !{!12, !13, i64 0}
!19 = !{!20, !13, i64 0}
!20 = !{!"TYPE_6__", !13, i64 0}
!21 = !{!22, !13, i64 0}
!22 = !{!"TYPE_5__", !13, i64 0}
| linux_drivers_net_wireless_realtek_rtlwifi_rtl8821ae_extr_hw.c_rtl8821ae_set_check_bssid |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mach-omap2/extr_clockdomain.c__omap2_clkdm_set_hwsup.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mach-omap2/extr_clockdomain.c__omap2_clkdm_set_hwsup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.clockdomain = type { %struct.TYPE_4__, i32 }
%struct.TYPE_4__ = type { ptr }
@OMAP24XX_CLKSTCTRL_ENABLE_AUTO = dso_local local_unnamed_addr global i32 0, align 4
@OMAP24XX_CLKSTCTRL_DISABLE_AUTO = dso_local local_unnamed_addr global i32 0, align 4
@OMAP34XX_CLKSTCTRL_ENABLE_AUTO = dso_local local_unnamed_addr global i32 0, align 4
@OMAP34XX_CLKSTCTRL_DISABLE_AUTO = dso_local local_unnamed_addr global i32 0, align 4
@CM_CLKSTCTRL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @_omap2_clkdm_set_hwsup], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @_omap2_clkdm_set_hwsup(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = tail call i64 (...) @cpu_is_omap24xx() #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %2
%6 = icmp eq i32 %1, 0
br i1 %6, label %9, label %7
7: ; preds = %5
%8 = load i32, ptr @OMAP24XX_CLKSTCTRL_ENABLE_AUTO, align 4, !tbaa !5
br label %22
9: ; preds = %5
%10 = load i32, ptr @OMAP24XX_CLKSTCTRL_DISABLE_AUTO, align 4, !tbaa !5
br label %22
11: ; preds = %2
%12 = tail call i64 (...) @cpu_is_omap34xx() #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %20, label %14
14: ; preds = %11
%15 = icmp eq i32 %1, 0
br i1 %15, label %18, label %16
16: ; preds = %14
%17 = load i32, ptr @OMAP34XX_CLKSTCTRL_ENABLE_AUTO, align 4, !tbaa !5
br label %22
18: ; preds = %14
%19 = load i32, ptr @OMAP34XX_CLKSTCTRL_DISABLE_AUTO, align 4, !tbaa !5
br label %22
20: ; preds = %11
%21 = tail call i32 (...) @BUG() #2
br label %22
22: ; preds = %20, %18, %16, %7, %9
%23 = phi i32 [ %8, %7 ], [ %10, %9 ], [ %17, %16 ], [ %19, %18 ], [ undef, %20 ]
%24 = getelementptr inbounds %struct.clockdomain, ptr %0, i64 0, i32 1
%25 = load i32, ptr %24, align 8, !tbaa !9
%26 = tail call i32 @__ffs(i32 noundef %25) #2
%27 = shl i32 %23, %26
%28 = load ptr, ptr %0, align 8, !tbaa !13
%29 = load i32, ptr %28, align 4, !tbaa !14
%30 = load i32, ptr @CM_CLKSTCTRL, align 4, !tbaa !5
%31 = tail call i32 @cm_rmw_mod_reg_bits(i32 noundef %25, i32 noundef %27, i32 noundef %29, i32 noundef %30) #2
ret void
}
declare i64 @cpu_is_omap24xx(...) local_unnamed_addr #1
declare i64 @cpu_is_omap34xx(...) local_unnamed_addr #1
declare i32 @BUG(...) local_unnamed_addr #1
declare i32 @cm_rmw_mod_reg_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__ffs(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"clockdomain", !11, i64 0, !6, i64 8}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!10, !12, i64 0}
!14 = !{!15, !6, i64 0}
!15 = !{!"TYPE_3__", !6, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mach-omap2/extr_clockdomain.c__omap2_clkdm_set_hwsup.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mach-omap2/extr_clockdomain.c__omap2_clkdm_set_hwsup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@OMAP24XX_CLKSTCTRL_ENABLE_AUTO = common local_unnamed_addr global i32 0, align 4
@OMAP24XX_CLKSTCTRL_DISABLE_AUTO = common local_unnamed_addr global i32 0, align 4
@OMAP34XX_CLKSTCTRL_ENABLE_AUTO = common local_unnamed_addr global i32 0, align 4
@OMAP34XX_CLKSTCTRL_DISABLE_AUTO = common local_unnamed_addr global i32 0, align 4
@CM_CLKSTCTRL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @_omap2_clkdm_set_hwsup], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @_omap2_clkdm_set_hwsup(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = tail call i64 @cpu_is_omap24xx() #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %11, label %5
5: ; preds = %2
%6 = icmp eq i32 %1, 0
br i1 %6, label %9, label %7
7: ; preds = %5
%8 = load i32, ptr @OMAP24XX_CLKSTCTRL_ENABLE_AUTO, align 4, !tbaa !6
br label %22
9: ; preds = %5
%10 = load i32, ptr @OMAP24XX_CLKSTCTRL_DISABLE_AUTO, align 4, !tbaa !6
br label %22
11: ; preds = %2
%12 = tail call i64 @cpu_is_omap34xx() #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %20, label %14
14: ; preds = %11
%15 = icmp eq i32 %1, 0
br i1 %15, label %18, label %16
16: ; preds = %14
%17 = load i32, ptr @OMAP34XX_CLKSTCTRL_ENABLE_AUTO, align 4, !tbaa !6
br label %22
18: ; preds = %14
%19 = load i32, ptr @OMAP34XX_CLKSTCTRL_DISABLE_AUTO, align 4, !tbaa !6
br label %22
20: ; preds = %11
%21 = tail call i32 @BUG() #2
br label %22
22: ; preds = %20, %18, %16, %7, %9
%23 = phi i32 [ %8, %7 ], [ %10, %9 ], [ %17, %16 ], [ %19, %18 ], [ undef, %20 ]
%24 = getelementptr inbounds i8, ptr %0, i64 8
%25 = load i32, ptr %24, align 8, !tbaa !10
%26 = tail call i32 @__ffs(i32 noundef %25) #2
%27 = shl i32 %23, %26
%28 = load ptr, ptr %0, align 8, !tbaa !14
%29 = load i32, ptr %28, align 4, !tbaa !15
%30 = load i32, ptr @CM_CLKSTCTRL, align 4, !tbaa !6
%31 = tail call i32 @cm_rmw_mod_reg_bits(i32 noundef %25, i32 noundef %27, i32 noundef %29, i32 noundef %30) #2
ret void
}
declare i64 @cpu_is_omap24xx(...) local_unnamed_addr #1
declare i64 @cpu_is_omap34xx(...) local_unnamed_addr #1
declare i32 @BUG(...) local_unnamed_addr #1
declare i32 @cm_rmw_mod_reg_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__ffs(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"clockdomain", !12, i64 0, !7, i64 8}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!11, !13, i64 0}
!15 = !{!16, !7, i64 0}
!16 = !{!"TYPE_3__", !7, i64 0}
| fastsocket_kernel_arch_arm_mach-omap2_extr_clockdomain.c__omap2_clkdm_set_hwsup |
; ModuleID = 'AnghaBench/disque/deps/jemalloc/test/unit/extr_junk.c_arena_dalloc_junk_small_intercept.c'
source_filename = "AnghaBench/disque/deps/jemalloc/test/unit/extr_junk.c_arena_dalloc_junk_small_intercept.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [57 x i8] c"Missing junk fill for byte %zu/%zu of deallocated region\00", align 1
@watch_for_junking = dso_local local_unnamed_addr global ptr null, align 8
@saw_junking = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @arena_dalloc_junk_small_intercept], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @arena_dalloc_junk_small_intercept(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @arena_dalloc_junk_small_orig(ptr noundef %0, ptr noundef %1) #2
%4 = load i64, ptr %1, align 8, !tbaa !5
%5 = icmp eq i64 %4, 0
br i1 %5, label %15, label %6
6: ; preds = %2, %6
%7 = phi i64 [ %13, %6 ], [ %4, %2 ]
%8 = phi i64 [ %12, %6 ], [ 0, %2 ]
%9 = getelementptr inbounds i8, ptr %0, i64 %8
%10 = load i8, ptr %9, align 1, !tbaa !10
%11 = tail call i32 @assert_c_eq(i8 noundef signext %10, i32 noundef 90, ptr noundef nonnull @.str, i64 noundef %8, i64 noundef %7) #2
%12 = add nuw i64 %8, 1
%13 = load i64, ptr %1, align 8, !tbaa !5
%14 = icmp ult i64 %12, %13
br i1 %14, label %6, label %15, !llvm.loop !11
15: ; preds = %6, %2
%16 = load ptr, ptr @watch_for_junking, align 8, !tbaa !13
%17 = icmp eq ptr %16, %0
br i1 %17, label %18, label %19
18: ; preds = %15
store i32 1, ptr @saw_junking, align 4, !tbaa !15
br label %19
19: ; preds = %18, %15
ret void
}
declare i32 @arena_dalloc_junk_small_orig(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @assert_c_eq(i8 noundef signext, i32 noundef, ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !14, i64 0}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/disque/deps/jemalloc/test/unit/extr_junk.c_arena_dalloc_junk_small_intercept.c'
source_filename = "AnghaBench/disque/deps/jemalloc/test/unit/extr_junk.c_arena_dalloc_junk_small_intercept.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [57 x i8] c"Missing junk fill for byte %zu/%zu of deallocated region\00", align 1
@watch_for_junking = common local_unnamed_addr global ptr null, align 8
@saw_junking = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @arena_dalloc_junk_small_intercept], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @arena_dalloc_junk_small_intercept(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @arena_dalloc_junk_small_orig(ptr noundef %0, ptr noundef %1) #2
%4 = load i64, ptr %1, align 8, !tbaa !6
%5 = icmp eq i64 %4, 0
br i1 %5, label %15, label %6
6: ; preds = %2, %6
%7 = phi i64 [ %13, %6 ], [ %4, %2 ]
%8 = phi i64 [ %12, %6 ], [ 0, %2 ]
%9 = getelementptr inbounds i8, ptr %0, i64 %8
%10 = load i8, ptr %9, align 1, !tbaa !11
%11 = tail call i32 @assert_c_eq(i8 noundef signext %10, i32 noundef 90, ptr noundef nonnull @.str, i64 noundef %8, i64 noundef %7) #2
%12 = add nuw i64 %8, 1
%13 = load i64, ptr %1, align 8, !tbaa !6
%14 = icmp ult i64 %12, %13
br i1 %14, label %6, label %15, !llvm.loop !12
15: ; preds = %6, %2
%16 = load ptr, ptr @watch_for_junking, align 8, !tbaa !14
%17 = icmp eq ptr %16, %0
br i1 %17, label %18, label %19
18: ; preds = %15
store i32 1, ptr @saw_junking, align 4, !tbaa !16
br label %19
19: ; preds = %18, %15
ret void
}
declare i32 @arena_dalloc_junk_small_orig(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @assert_c_eq(i8 noundef signext, i32 noundef, ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!9, !9, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!15, !15, i64 0}
!15 = !{!"any pointer", !9, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"int", !9, i64 0}
| disque_deps_jemalloc_test_unit_extr_junk.c_arena_dalloc_junk_small_intercept |
; ModuleID = 'AnghaBench/HandBrake/libhb/extr_decvobsub.c_ColumnIsTransparent.c'
source_filename = "AnghaBench/HandBrake/libhb/extr_decvobsub.c_ColumnIsTransparent.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @ColumnIsTransparent], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable
define internal noundef i32 @ColumnIsTransparent(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load i32, ptr %3, align 4, !tbaa !10
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %20
6: ; preds = %2
%7 = getelementptr inbounds %struct.TYPE_4__, ptr %3, i64 0, i32 1
%8 = load i32, ptr %7, align 4, !tbaa !13
%9 = sext i32 %8 to i64
%10 = zext nneg i32 %4 to i64
br label %14
11: ; preds = %14
%12 = add nuw nsw i64 %15, 1
%13 = icmp eq i64 %12, %10
br i1 %13, label %20, label %14, !llvm.loop !14
14: ; preds = %6, %11
%15 = phi i64 [ 0, %6 ], [ %12, %11 ]
%16 = mul nsw i64 %15, %9
%17 = getelementptr inbounds i64, ptr %1, i64 %16
%18 = load i64, ptr %17, align 8, !tbaa !16
%19 = icmp eq i64 %18, 0
br i1 %19, label %11, label %20
20: ; preds = %14, %11, %2
%21 = phi i32 [ 1, %2 ], [ 1, %11 ], [ 0, %14 ]
ret i32 %21
}
attributes #0 = { nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_4__", !12, i64 0, !12, i64 4}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !12, i64 4}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!17, !17, i64 0}
!17 = !{!"long", !8, i64 0}
| ; ModuleID = 'AnghaBench/HandBrake/libhb/extr_decvobsub.c_ColumnIsTransparent.c'
source_filename = "AnghaBench/HandBrake/libhb/extr_decvobsub.c_ColumnIsTransparent.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ColumnIsTransparent], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @ColumnIsTransparent(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load i32, ptr %3, align 4, !tbaa !11
%5 = icmp sgt i32 %4, 0
br i1 %5, label %6, label %20
6: ; preds = %2
%7 = getelementptr inbounds i8, ptr %3, i64 4
%8 = load i32, ptr %7, align 4, !tbaa !14
%9 = sext i32 %8 to i64
%10 = zext nneg i32 %4 to i64
br label %14
11: ; preds = %14
%12 = add nuw nsw i64 %15, 1
%13 = icmp eq i64 %12, %10
br i1 %13, label %20, label %14, !llvm.loop !15
14: ; preds = %6, %11
%15 = phi i64 [ 0, %6 ], [ %12, %11 ]
%16 = mul nsw i64 %15, %9
%17 = getelementptr inbounds i64, ptr %1, i64 %16
%18 = load i64, ptr %17, align 8, !tbaa !17
%19 = icmp eq i64 %18, 0
br i1 %19, label %11, label %20
20: ; preds = %14, %11, %2
%21 = phi i32 [ 1, %2 ], [ 1, %11 ], [ 0, %14 ]
ret i32 %21
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0, !13, i64 4}
!13 = !{!"int", !9, i64 0}
!14 = !{!12, !13, i64 4}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = !{!18, !18, i64 0}
!18 = !{!"long", !9, i64 0}
| HandBrake_libhb_extr_decvobsub.c_ColumnIsTransparent |
; ModuleID = 'AnghaBench/linux/lib/extr_cpumask.c_cpumask_next_and.c'
source_filename = "AnghaBench/linux/lib/extr_cpumask.c_cpumask_next_and.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@nr_cpumask_bits = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @cpumask_next_and(i32 noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = icmp eq i32 %0, -1
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @cpumask_check(i32 noundef %0) #2
br label %7
7: ; preds = %5, %3
%8 = tail call i32 @cpumask_bits(ptr noundef %1) #2
%9 = tail call i32 @cpumask_bits(ptr noundef %2) #2
%10 = load i32, ptr @nr_cpumask_bits, align 4, !tbaa !5
%11 = add nsw i32 %0, 1
%12 = tail call i32 @find_next_and_bit(i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11) #2
ret i32 %12
}
declare i32 @cpumask_check(i32 noundef) local_unnamed_addr #1
declare i32 @find_next_and_bit(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cpumask_bits(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/lib/extr_cpumask.c_cpumask_next_and.c'
source_filename = "AnghaBench/linux/lib/extr_cpumask.c_cpumask_next_and.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@nr_cpumask_bits = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @cpumask_next_and(i32 noundef %0, ptr noundef %1, ptr noundef %2) local_unnamed_addr #0 {
%4 = icmp eq i32 %0, -1
br i1 %4, label %7, label %5
5: ; preds = %3
%6 = tail call i32 @cpumask_check(i32 noundef %0) #2
br label %7
7: ; preds = %5, %3
%8 = tail call i32 @cpumask_bits(ptr noundef %1) #2
%9 = tail call i32 @cpumask_bits(ptr noundef %2) #2
%10 = load i32, ptr @nr_cpumask_bits, align 4, !tbaa !6
%11 = add nsw i32 %0, 1
%12 = tail call i32 @find_next_and_bit(i32 noundef %8, i32 noundef %9, i32 noundef %10, i32 noundef %11) #2
ret i32 %12
}
declare i32 @cpumask_check(i32 noundef) local_unnamed_addr #1
declare i32 @find_next_and_bit(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cpumask_bits(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_lib_extr_cpumask.c_cpumask_next_and |
; ModuleID = 'AnghaBench/freebsd/sys/contrib/dev/acpica/components/executer/extr_extrace.c_AcpiExStopTraceMethod.c'
source_filename = "AnghaBench/freebsd/sys/contrib/dev/acpica/components/executer/extr_extrace.c_AcpiExStopTraceMethod.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ExStopTraceMethod = dso_local local_unnamed_addr global i32 0, align 4
@TRUE = dso_local local_unnamed_addr global i32 0, align 4
@ACPI_TRACE_AML_METHOD = dso_local local_unnamed_addr global i32 0, align 4
@FALSE = dso_local local_unnamed_addr global i32 0, align 4
@AcpiGbl_TraceMethodObject = dso_local local_unnamed_addr global ptr null, align 8
@AcpiGbl_TraceFlags = dso_local local_unnamed_addr global i32 0, align 4
@ACPI_TRACE_ONESHOT = dso_local local_unnamed_addr global i32 0, align 4
@AcpiGbl_TraceMethodName = dso_local local_unnamed_addr global ptr null, align 8
@AcpiGbl_OriginalDbgLevel = dso_local local_unnamed_addr global i32 0, align 4
@AcpiDbgLevel = dso_local local_unnamed_addr global i32 0, align 4
@AcpiGbl_OriginalDbgLayer = dso_local local_unnamed_addr global i32 0, align 4
@AcpiDbgLayer = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @AcpiExStopTraceMethod(ptr noundef %0, ptr noundef readonly %1, ptr nocapture noundef readnone %2) local_unnamed_addr #0 {
%4 = load i32, ptr @ExStopTraceMethod, align 4, !tbaa !5
%5 = tail call i32 @ACPI_FUNCTION_NAME(i32 noundef %4) #2
%6 = icmp eq ptr %0, null
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = load i32, ptr @TRUE, align 4, !tbaa !5
%9 = tail call ptr @AcpiNsGetNormalizedPathname(ptr noundef nonnull %0, i32 noundef %8) #2
br label %10
10: ; preds = %7, %3
%11 = phi ptr [ %9, %7 ], [ null, %3 ]
%12 = tail call i64 @AcpiExInterpreterTraceEnabled(ptr noundef null) #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %23, label %14
14: ; preds = %10
%15 = load i32, ptr @ACPI_TRACE_AML_METHOD, align 4, !tbaa !5
%16 = load i32, ptr @FALSE, align 4, !tbaa !5
%17 = icmp eq ptr %1, null
br i1 %17, label %20, label %18
18: ; preds = %14
%19 = load ptr, ptr %1, align 8, !tbaa !9
br label %20
20: ; preds = %14, %18
%21 = phi ptr [ %19, %18 ], [ null, %14 ]
%22 = tail call i32 @ACPI_TRACE_POINT(i32 noundef %15, i32 noundef %16, ptr noundef %21, ptr noundef %11) #2
br label %23
23: ; preds = %20, %10
%24 = load ptr, ptr @AcpiGbl_TraceMethodObject, align 8, !tbaa !13
%25 = icmp eq ptr %24, %1
br i1 %25, label %26, label %35
26: ; preds = %23
%27 = load i32, ptr @AcpiGbl_TraceFlags, align 4, !tbaa !5
%28 = load i32, ptr @ACPI_TRACE_ONESHOT, align 4, !tbaa !5
%29 = and i32 %28, %27
%30 = icmp eq i32 %29, 0
br i1 %30, label %32, label %31
31: ; preds = %26
store ptr null, ptr @AcpiGbl_TraceMethodName, align 8, !tbaa !13
br label %32
32: ; preds = %31, %26
%33 = load i32, ptr @AcpiGbl_OriginalDbgLevel, align 4, !tbaa !5
store i32 %33, ptr @AcpiDbgLevel, align 4, !tbaa !5
%34 = load i32, ptr @AcpiGbl_OriginalDbgLayer, align 4, !tbaa !5
store i32 %34, ptr @AcpiDbgLayer, align 4, !tbaa !5
store ptr null, ptr @AcpiGbl_TraceMethodObject, align 8, !tbaa !13
br label %35
35: ; preds = %32, %23
%36 = icmp eq ptr %11, null
br i1 %36, label %39, label %37
37: ; preds = %35
%38 = tail call i32 @ACPI_FREE(ptr noundef nonnull %11) #2
br label %39
39: ; preds = %37, %35
ret void
}
declare i32 @ACPI_FUNCTION_NAME(i32 noundef) local_unnamed_addr #1
declare ptr @AcpiNsGetNormalizedPathname(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @AcpiExInterpreterTraceEnabled(ptr noundef) local_unnamed_addr #1
declare i32 @ACPI_TRACE_POINT(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ACPI_FREE(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 0}
!10 = !{!"TYPE_6__", !11, i64 0}
!11 = !{!"TYPE_5__", !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!12, !12, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/contrib/dev/acpica/components/executer/extr_extrace.c_AcpiExStopTraceMethod.c'
source_filename = "AnghaBench/freebsd/sys/contrib/dev/acpica/components/executer/extr_extrace.c_AcpiExStopTraceMethod.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ExStopTraceMethod = common local_unnamed_addr global i32 0, align 4
@TRUE = common local_unnamed_addr global i32 0, align 4
@ACPI_TRACE_AML_METHOD = common local_unnamed_addr global i32 0, align 4
@FALSE = common local_unnamed_addr global i32 0, align 4
@AcpiGbl_TraceMethodObject = common local_unnamed_addr global ptr null, align 8
@AcpiGbl_TraceFlags = common local_unnamed_addr global i32 0, align 4
@ACPI_TRACE_ONESHOT = common local_unnamed_addr global i32 0, align 4
@AcpiGbl_TraceMethodName = common local_unnamed_addr global ptr null, align 8
@AcpiGbl_OriginalDbgLevel = common local_unnamed_addr global i32 0, align 4
@AcpiDbgLevel = common local_unnamed_addr global i32 0, align 4
@AcpiGbl_OriginalDbgLayer = common local_unnamed_addr global i32 0, align 4
@AcpiDbgLayer = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @AcpiExStopTraceMethod(ptr noundef %0, ptr noundef readonly %1, ptr nocapture noundef readnone %2) local_unnamed_addr #0 {
%4 = load i32, ptr @ExStopTraceMethod, align 4, !tbaa !6
%5 = tail call i32 @ACPI_FUNCTION_NAME(i32 noundef %4) #2
%6 = icmp eq ptr %0, null
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = load i32, ptr @TRUE, align 4, !tbaa !6
%9 = tail call ptr @AcpiNsGetNormalizedPathname(ptr noundef nonnull %0, i32 noundef %8) #2
br label %10
10: ; preds = %7, %3
%11 = phi ptr [ %9, %7 ], [ null, %3 ]
%12 = tail call i64 @AcpiExInterpreterTraceEnabled(ptr noundef null) #2
%13 = icmp eq i64 %12, 0
br i1 %13, label %23, label %14
14: ; preds = %10
%15 = load i32, ptr @ACPI_TRACE_AML_METHOD, align 4, !tbaa !6
%16 = load i32, ptr @FALSE, align 4, !tbaa !6
%17 = icmp eq ptr %1, null
br i1 %17, label %20, label %18
18: ; preds = %14
%19 = load ptr, ptr %1, align 8, !tbaa !10
br label %20
20: ; preds = %14, %18
%21 = phi ptr [ %19, %18 ], [ null, %14 ]
%22 = tail call i32 @ACPI_TRACE_POINT(i32 noundef %15, i32 noundef %16, ptr noundef %21, ptr noundef %11) #2
br label %23
23: ; preds = %20, %10
%24 = load ptr, ptr @AcpiGbl_TraceMethodObject, align 8, !tbaa !14
%25 = icmp eq ptr %24, %1
br i1 %25, label %26, label %35
26: ; preds = %23
%27 = load i32, ptr @AcpiGbl_TraceFlags, align 4, !tbaa !6
%28 = load i32, ptr @ACPI_TRACE_ONESHOT, align 4, !tbaa !6
%29 = and i32 %28, %27
%30 = icmp eq i32 %29, 0
br i1 %30, label %32, label %31
31: ; preds = %26
store ptr null, ptr @AcpiGbl_TraceMethodName, align 8, !tbaa !14
br label %32
32: ; preds = %31, %26
%33 = load i32, ptr @AcpiGbl_OriginalDbgLevel, align 4, !tbaa !6
store i32 %33, ptr @AcpiDbgLevel, align 4, !tbaa !6
%34 = load i32, ptr @AcpiGbl_OriginalDbgLayer, align 4, !tbaa !6
store i32 %34, ptr @AcpiDbgLayer, align 4, !tbaa !6
store ptr null, ptr @AcpiGbl_TraceMethodObject, align 8, !tbaa !14
br label %35
35: ; preds = %32, %23
%36 = icmp eq ptr %11, null
br i1 %36, label %39, label %37
37: ; preds = %35
%38 = tail call i32 @ACPI_FREE(ptr noundef nonnull %11) #2
br label %39
39: ; preds = %37, %35
ret void
}
declare i32 @ACPI_FUNCTION_NAME(i32 noundef) local_unnamed_addr #1
declare ptr @AcpiNsGetNormalizedPathname(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @AcpiExInterpreterTraceEnabled(ptr noundef) local_unnamed_addr #1
declare i32 @ACPI_TRACE_POINT(i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ACPI_FREE(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 0}
!11 = !{!"TYPE_6__", !12, i64 0}
!12 = !{!"TYPE_5__", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!13, !13, i64 0}
| freebsd_sys_contrib_dev_acpica_components_executer_extr_extrace.c_AcpiExStopTraceMethod |
; ModuleID = 'AnghaBench/linux/drivers/s390/char/extr_vmur.c_ur_open.c'
source_filename = "AnghaBench/linux/drivers/s390/char/extr_vmur.c_ur_open.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.urdev = type { i64, i64, i32, i32, i32 }
%struct.urfile = type { i32, i32 }
%struct.file = type { i16, ptr }
@O_ACCMODE = dso_local local_unnamed_addr global i16 0, align 2
@O_RDWR = dso_local local_unnamed_addr global i16 0, align 2
@EACCES = dso_local local_unnamed_addr global i32 0, align 4
@ENXIO = dso_local local_unnamed_addr global i32 0, align 4
@O_NONBLOCK = dso_local local_unnamed_addr global i32 0, align 4
@EBUSY = dso_local local_unnamed_addr global i32 0, align 4
@ERESTARTSYS = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [9 x i8] c"ur_open\0A\00", align 1
@O_RDONLY = dso_local local_unnamed_addr global i16 0, align 2
@DEV_CLASS_UR_I = dso_local local_unnamed_addr global i64 0, align 8
@O_WRONLY = dso_local local_unnamed_addr global i16 0, align 2
@DEV_CLASS_UR_O = dso_local local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [37 x i8] c"ur_open: unsupported dev class (%d)\0A\00", align 1
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ur_open], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ur_open(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = load i16, ptr %1, align 8, !tbaa !5
%4 = load i16, ptr @O_ACCMODE, align 2, !tbaa !11
%5 = and i16 %4, %3
%6 = load i16, ptr @O_RDWR, align 2, !tbaa !11
%7 = icmp eq i16 %5, %6
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, ptr @EACCES, align 4, !tbaa !12
%10 = sub nsw i32 0, %9
br label %102
11: ; preds = %2
%12 = tail call ptr @file_inode(ptr noundef nonnull %1) #2
%13 = load i32, ptr %12, align 4, !tbaa !14
%14 = tail call i32 @MINOR(i32 noundef %13) #2
%15 = tail call ptr @urdev_get_from_devno(i32 noundef %14) #2
%16 = icmp eq ptr %15, null
br i1 %16, label %17, label %20
17: ; preds = %11
%18 = load i32, ptr @ENXIO, align 4, !tbaa !12
%19 = sub nsw i32 0, %18
br label %102
20: ; preds = %11
%21 = getelementptr inbounds %struct.urdev, ptr %15, i64 0, i32 2
%22 = tail call i32 @spin_lock(ptr noundef nonnull %21) #2
%23 = load i64, ptr %15, align 8, !tbaa !16
%24 = icmp eq i64 %23, 0
br i1 %24, label %51, label %25
25: ; preds = %20
%26 = getelementptr inbounds %struct.urdev, ptr %15, i64 0, i32 4
br label %27
27: ; preds = %25, %47
%28 = tail call i32 @spin_unlock(ptr noundef nonnull %21) #2
%29 = load i16, ptr %1, align 8, !tbaa !5
%30 = zext i16 %29 to i32
%31 = load i32, ptr @O_NONBLOCK, align 4, !tbaa !12
%32 = and i32 %31, %30
%33 = icmp eq i32 %32, 0
br i1 %33, label %37, label %34
34: ; preds = %27
%35 = load i32, ptr @EBUSY, align 4, !tbaa !12
%36 = sub nsw i32 0, %35
br label %99
37: ; preds = %27
%38 = load i32, ptr %26, align 8, !tbaa !19
%39 = load i64, ptr %15, align 8, !tbaa !16
%40 = icmp eq i64 %39, 0
%41 = zext i1 %40 to i32
%42 = tail call i64 @wait_event_interruptible(i32 noundef %38, i32 noundef %41) #2
%43 = icmp eq i64 %42, 0
br i1 %43, label %47, label %44
44: ; preds = %37
%45 = load i32, ptr @ERESTARTSYS, align 4, !tbaa !12
%46 = sub nsw i32 0, %45
br label %99
47: ; preds = %37
%48 = tail call i32 @spin_lock(ptr noundef nonnull %21) #2
%49 = load i64, ptr %15, align 8, !tbaa !16
%50 = icmp eq i64 %49, 0
br i1 %50, label %51, label %27, !llvm.loop !20
51: ; preds = %47, %20
store i64 1, ptr %15, align 8, !tbaa !16
%52 = tail call i32 @spin_unlock(ptr noundef nonnull %21) #2
%53 = tail call i32 (ptr, ...) @TRACE(ptr noundef nonnull @.str) #2
%54 = load i16, ptr @O_RDONLY, align 2, !tbaa !11
%55 = icmp eq i16 %5, %54
br i1 %55, label %56, label %61
56: ; preds = %51
%57 = getelementptr inbounds %struct.urdev, ptr %15, i64 0, i32 1
%58 = load i64, ptr %57, align 8, !tbaa !22
%59 = load i64, ptr @DEV_CLASS_UR_I, align 8, !tbaa !23
%60 = icmp eq i64 %58, %59
br i1 %60, label %61, label %69
61: ; preds = %56, %51
%62 = load i16, ptr @O_WRONLY, align 2, !tbaa !11
%63 = icmp eq i16 %5, %62
br i1 %63, label %64, label %74
64: ; preds = %61
%65 = getelementptr inbounds %struct.urdev, ptr %15, i64 0, i32 1
%66 = load i64, ptr %65, align 8, !tbaa !22
%67 = load i64, ptr @DEV_CLASS_UR_O, align 8, !tbaa !23
%68 = icmp eq i64 %66, %67
br i1 %68, label %74, label %69
69: ; preds = %64, %56
%70 = phi i64 [ %66, %64 ], [ %58, %56 ]
%71 = tail call i32 (ptr, ...) @TRACE(ptr noundef nonnull @.str.1, i64 noundef %70) #2
%72 = load i32, ptr @EACCES, align 4, !tbaa !12
%73 = sub nsw i32 0, %72
br label %93
74: ; preds = %64, %61
%75 = tail call i32 @verify_device(ptr noundef nonnull %15) #2
%76 = icmp eq i32 %75, 0
br i1 %76, label %77, label %93
77: ; preds = %74
%78 = tail call ptr @urfile_alloc(ptr noundef nonnull %15) #2
%79 = icmp eq ptr %78, null
br i1 %79, label %80, label %83
80: ; preds = %77
%81 = load i32, ptr @ENOMEM, align 4, !tbaa !12
%82 = sub nsw i32 0, %81
br label %93
83: ; preds = %77
%84 = getelementptr inbounds %struct.urdev, ptr %15, i64 0, i32 3
%85 = load i32, ptr %84, align 4, !tbaa !24
%86 = getelementptr inbounds %struct.urfile, ptr %78, i64 0, i32 1
store i32 %85, ptr %86, align 4, !tbaa !25
%87 = tail call i32 @get_file_reclen(ptr noundef nonnull %15) #2
%88 = icmp slt i32 %87, 0
br i1 %88, label %91, label %89
89: ; preds = %83
store i32 %87, ptr %78, align 4, !tbaa !27
%90 = getelementptr inbounds %struct.file, ptr %1, i64 0, i32 1
store ptr %78, ptr %90, align 8, !tbaa !28
br label %102
91: ; preds = %83
%92 = tail call i32 @urfile_free(ptr noundef nonnull %78) #2
br label %93
93: ; preds = %74, %91, %80, %69
%94 = phi i32 [ %73, %69 ], [ %75, %74 ], [ %87, %91 ], [ %82, %80 ]
%95 = tail call i32 @spin_lock(ptr noundef nonnull %21) #2
%96 = load i64, ptr %15, align 8, !tbaa !16
%97 = add nsw i64 %96, -1
store i64 %97, ptr %15, align 8, !tbaa !16
%98 = tail call i32 @spin_unlock(ptr noundef nonnull %21) #2
br label %99
99: ; preds = %93, %44, %34
%100 = phi i32 [ %36, %34 ], [ %46, %44 ], [ %94, %93 ]
%101 = tail call i32 @urdev_put(ptr noundef nonnull %15) #2
br label %102
102: ; preds = %17, %99, %89, %8
%103 = phi i32 [ %10, %8 ], [ 0, %89 ], [ %100, %99 ], [ %19, %17 ]
ret i32 %103
}
declare i32 @MINOR(i32 noundef) local_unnamed_addr #1
declare ptr @file_inode(ptr noundef) local_unnamed_addr #1
declare ptr @urdev_get_from_devno(i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i64 @wait_event_interruptible(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @TRACE(ptr noundef, ...) local_unnamed_addr #1
declare i32 @verify_device(ptr noundef) local_unnamed_addr #1
declare ptr @urfile_alloc(ptr noundef) local_unnamed_addr #1
declare i32 @get_file_reclen(ptr noundef) local_unnamed_addr #1
declare i32 @urfile_free(ptr noundef) local_unnamed_addr #1
declare i32 @urdev_put(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"file", !7, i64 0, !10, i64 8}
!7 = !{!"short", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"TYPE_2__", !13, i64 0}
!16 = !{!17, !18, i64 0}
!17 = !{!"urdev", !18, i64 0, !18, i64 8, !13, i64 16, !13, i64 20, !13, i64 24}
!18 = !{!"long", !8, i64 0}
!19 = !{!17, !13, i64 24}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!17, !18, i64 8}
!23 = !{!18, !18, i64 0}
!24 = !{!17, !13, i64 20}
!25 = !{!26, !13, i64 4}
!26 = !{!"urfile", !13, i64 0, !13, i64 4}
!27 = !{!26, !13, i64 0}
!28 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/s390/char/extr_vmur.c_ur_open.c'
source_filename = "AnghaBench/linux/drivers/s390/char/extr_vmur.c_ur_open.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@O_ACCMODE = common local_unnamed_addr global i16 0, align 2
@O_RDWR = common local_unnamed_addr global i16 0, align 2
@EACCES = common local_unnamed_addr global i32 0, align 4
@ENXIO = common local_unnamed_addr global i32 0, align 4
@O_NONBLOCK = common local_unnamed_addr global i32 0, align 4
@EBUSY = common local_unnamed_addr global i32 0, align 4
@ERESTARTSYS = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [9 x i8] c"ur_open\0A\00", align 1
@O_RDONLY = common local_unnamed_addr global i16 0, align 2
@DEV_CLASS_UR_I = common local_unnamed_addr global i64 0, align 8
@O_WRONLY = common local_unnamed_addr global i16 0, align 2
@DEV_CLASS_UR_O = common local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [37 x i8] c"ur_open: unsupported dev class (%d)\0A\00", align 1
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ur_open], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ur_open(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = load i16, ptr %1, align 8, !tbaa !6
%4 = load i16, ptr @O_ACCMODE, align 2, !tbaa !12
%5 = and i16 %4, %3
%6 = load i16, ptr @O_RDWR, align 2, !tbaa !12
%7 = icmp eq i16 %5, %6
br i1 %7, label %8, label %11
8: ; preds = %2
%9 = load i32, ptr @EACCES, align 4, !tbaa !13
%10 = sub nsw i32 0, %9
br label %102
11: ; preds = %2
%12 = tail call ptr @file_inode(ptr noundef nonnull %1) #2
%13 = load i32, ptr %12, align 4, !tbaa !15
%14 = tail call i32 @MINOR(i32 noundef %13) #2
%15 = tail call ptr @urdev_get_from_devno(i32 noundef %14) #2
%16 = icmp eq ptr %15, null
br i1 %16, label %17, label %20
17: ; preds = %11
%18 = load i32, ptr @ENXIO, align 4, !tbaa !13
%19 = sub nsw i32 0, %18
br label %102
20: ; preds = %11
%21 = getelementptr inbounds i8, ptr %15, i64 16
%22 = tail call i32 @spin_lock(ptr noundef nonnull %21) #2
%23 = load i64, ptr %15, align 8, !tbaa !17
%24 = icmp eq i64 %23, 0
br i1 %24, label %51, label %25
25: ; preds = %20
%26 = getelementptr inbounds i8, ptr %15, i64 24
br label %27
27: ; preds = %25, %47
%28 = tail call i32 @spin_unlock(ptr noundef nonnull %21) #2
%29 = load i16, ptr %1, align 8, !tbaa !6
%30 = zext i16 %29 to i32
%31 = load i32, ptr @O_NONBLOCK, align 4, !tbaa !13
%32 = and i32 %31, %30
%33 = icmp eq i32 %32, 0
br i1 %33, label %37, label %34
34: ; preds = %27
%35 = load i32, ptr @EBUSY, align 4, !tbaa !13
%36 = sub nsw i32 0, %35
br label %99
37: ; preds = %27
%38 = load i32, ptr %26, align 8, !tbaa !20
%39 = load i64, ptr %15, align 8, !tbaa !17
%40 = icmp eq i64 %39, 0
%41 = zext i1 %40 to i32
%42 = tail call i64 @wait_event_interruptible(i32 noundef %38, i32 noundef %41) #2
%43 = icmp eq i64 %42, 0
br i1 %43, label %47, label %44
44: ; preds = %37
%45 = load i32, ptr @ERESTARTSYS, align 4, !tbaa !13
%46 = sub nsw i32 0, %45
br label %99
47: ; preds = %37
%48 = tail call i32 @spin_lock(ptr noundef nonnull %21) #2
%49 = load i64, ptr %15, align 8, !tbaa !17
%50 = icmp eq i64 %49, 0
br i1 %50, label %51, label %27, !llvm.loop !21
51: ; preds = %47, %20
store i64 1, ptr %15, align 8, !tbaa !17
%52 = tail call i32 @spin_unlock(ptr noundef nonnull %21) #2
%53 = tail call i32 (ptr, ...) @TRACE(ptr noundef nonnull @.str) #2
%54 = load i16, ptr @O_RDONLY, align 2, !tbaa !12
%55 = icmp eq i16 %5, %54
br i1 %55, label %56, label %61
56: ; preds = %51
%57 = getelementptr inbounds i8, ptr %15, i64 8
%58 = load i64, ptr %57, align 8, !tbaa !23
%59 = load i64, ptr @DEV_CLASS_UR_I, align 8, !tbaa !24
%60 = icmp eq i64 %58, %59
br i1 %60, label %61, label %69
61: ; preds = %56, %51
%62 = load i16, ptr @O_WRONLY, align 2, !tbaa !12
%63 = icmp eq i16 %5, %62
br i1 %63, label %64, label %74
64: ; preds = %61
%65 = getelementptr inbounds i8, ptr %15, i64 8
%66 = load i64, ptr %65, align 8, !tbaa !23
%67 = load i64, ptr @DEV_CLASS_UR_O, align 8, !tbaa !24
%68 = icmp eq i64 %66, %67
br i1 %68, label %74, label %69
69: ; preds = %64, %56
%70 = phi i64 [ %66, %64 ], [ %58, %56 ]
%71 = tail call i32 (ptr, ...) @TRACE(ptr noundef nonnull @.str.1, i64 noundef %70) #2
%72 = load i32, ptr @EACCES, align 4, !tbaa !13
%73 = sub nsw i32 0, %72
br label %93
74: ; preds = %64, %61
%75 = tail call i32 @verify_device(ptr noundef nonnull %15) #2
%76 = icmp eq i32 %75, 0
br i1 %76, label %77, label %93
77: ; preds = %74
%78 = tail call ptr @urfile_alloc(ptr noundef nonnull %15) #2
%79 = icmp eq ptr %78, null
br i1 %79, label %80, label %83
80: ; preds = %77
%81 = load i32, ptr @ENOMEM, align 4, !tbaa !13
%82 = sub nsw i32 0, %81
br label %93
83: ; preds = %77
%84 = getelementptr inbounds i8, ptr %15, i64 20
%85 = load i32, ptr %84, align 4, !tbaa !25
%86 = getelementptr inbounds i8, ptr %78, i64 4
store i32 %85, ptr %86, align 4, !tbaa !26
%87 = tail call i32 @get_file_reclen(ptr noundef nonnull %15) #2
%88 = icmp slt i32 %87, 0
br i1 %88, label %91, label %89
89: ; preds = %83
store i32 %87, ptr %78, align 4, !tbaa !28
%90 = getelementptr inbounds i8, ptr %1, i64 8
store ptr %78, ptr %90, align 8, !tbaa !29
br label %102
91: ; preds = %83
%92 = tail call i32 @urfile_free(ptr noundef nonnull %78) #2
br label %93
93: ; preds = %74, %91, %80, %69
%94 = phi i32 [ %73, %69 ], [ %75, %74 ], [ %87, %91 ], [ %82, %80 ]
%95 = tail call i32 @spin_lock(ptr noundef nonnull %21) #2
%96 = load i64, ptr %15, align 8, !tbaa !17
%97 = add nsw i64 %96, -1
store i64 %97, ptr %15, align 8, !tbaa !17
%98 = tail call i32 @spin_unlock(ptr noundef nonnull %21) #2
br label %99
99: ; preds = %93, %44, %34
%100 = phi i32 [ %36, %34 ], [ %46, %44 ], [ %94, %93 ]
%101 = tail call i32 @urdev_put(ptr noundef nonnull %15) #2
br label %102
102: ; preds = %17, %99, %89, %8
%103 = phi i32 [ %10, %8 ], [ 0, %89 ], [ %100, %99 ], [ %19, %17 ]
ret i32 %103
}
declare i32 @MINOR(i32 noundef) local_unnamed_addr #1
declare ptr @file_inode(ptr noundef) local_unnamed_addr #1
declare ptr @urdev_get_from_devno(i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i64 @wait_event_interruptible(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @TRACE(ptr noundef, ...) local_unnamed_addr #1
declare i32 @verify_device(ptr noundef) local_unnamed_addr #1
declare ptr @urfile_alloc(ptr noundef) local_unnamed_addr #1
declare i32 @get_file_reclen(ptr noundef) local_unnamed_addr #1
declare i32 @urfile_free(ptr noundef) local_unnamed_addr #1
declare i32 @urdev_put(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"file", !8, i64 0, !11, i64 8}
!8 = !{!"short", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"TYPE_2__", !14, i64 0}
!17 = !{!18, !19, i64 0}
!18 = !{!"urdev", !19, i64 0, !19, i64 8, !14, i64 16, !14, i64 20, !14, i64 24}
!19 = !{!"long", !9, i64 0}
!20 = !{!18, !14, i64 24}
!21 = distinct !{!21, !22}
!22 = !{!"llvm.loop.mustprogress"}
!23 = !{!18, !19, i64 8}
!24 = !{!19, !19, i64 0}
!25 = !{!18, !14, i64 20}
!26 = !{!27, !14, i64 4}
!27 = !{!"urfile", !14, i64 0, !14, i64 4}
!28 = !{!27, !14, i64 0}
!29 = !{!7, !11, i64 8}
| linux_drivers_s390_char_extr_vmur.c_ur_open |
; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_me_cmp.c_zero_cmp.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_me_cmp.c_zero_cmp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @zero_cmp], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @zero_cmp(ptr nocapture readnone %0, ptr nocapture readnone %1, ptr nocapture readnone %2, i32 %3, i32 %4) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/FFmpeg/libavcodec/extr_me_cmp.c_zero_cmp.c'
source_filename = "AnghaBench/FFmpeg/libavcodec/extr_me_cmp.c_zero_cmp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @zero_cmp], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @zero_cmp(ptr nocapture readnone %0, ptr nocapture readnone %1, ptr nocapture readnone %2, i32 %3, i32 %4) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| FFmpeg_libavcodec_extr_me_cmp.c_zero_cmp |
; ModuleID = 'AnghaBench/tengine/src/core/extr_ngx_shmtx.c_ngx_shmtx_force_unlock.c'
source_filename = "AnghaBench/tengine/src/core/extr_ngx_shmtx.c_ngx_shmtx_force_unlock.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local noundef i32 @ngx_shmtx_force_unlock(ptr nocapture noundef readnone %0, i32 noundef %1) local_unnamed_addr #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/tengine/src/core/extr_ngx_shmtx.c_ngx_shmtx_force_unlock.c'
source_filename = "AnghaBench/tengine/src/core/extr_ngx_shmtx.c_ngx_shmtx_force_unlock.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define noundef i32 @ngx_shmtx_force_unlock(ptr nocapture noundef readnone %0, i32 noundef %1) local_unnamed_addr #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| tengine_src_core_extr_ngx_shmtx.c_ngx_shmtx_force_unlock |
; ModuleID = 'AnghaBench/linux/drivers/target/iscsi/extr_iscsi_target_util.c_iscsit_add_cmd_to_response_queue.c'
source_filename = "AnghaBench/linux/drivers/target/iscsi/extr_iscsi_target_util.c_iscsit_add_cmd_to_response_queue.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.iscsi_queue_req = type { i32, i32, ptr }
%struct.iscsi_conn = type { i32, i32, i32 }
@lio_qr_cache = dso_local local_unnamed_addr global i32 0, align 4
@GFP_ATOMIC = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [54 x i8] c"Unable to allocate memory for struct iscsi_queue_req\0A\00", align 1
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @iscsit_add_cmd_to_response_queue(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @lio_qr_cache, align 4, !tbaa !5
%5 = load i32, ptr @GFP_ATOMIC, align 4, !tbaa !5
%6 = tail call ptr @kmem_cache_zalloc(i32 noundef %4, i32 noundef %5) #2
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %12
8: ; preds = %3
%9 = tail call i32 @pr_err(ptr noundef nonnull @.str) #2
%10 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%11 = sub nsw i32 0, %10
br label %23
12: ; preds = %3
%13 = tail call i32 @INIT_LIST_HEAD(ptr noundef nonnull %6) #2
%14 = getelementptr inbounds %struct.iscsi_queue_req, ptr %6, i64 0, i32 2
store ptr %0, ptr %14, align 8, !tbaa !9
%15 = getelementptr inbounds %struct.iscsi_queue_req, ptr %6, i64 0, i32 1
store i32 %2, ptr %15, align 4, !tbaa !12
%16 = getelementptr inbounds %struct.iscsi_conn, ptr %1, i64 0, i32 1
%17 = tail call i32 @spin_lock_bh(ptr noundef nonnull %16) #2
%18 = getelementptr inbounds %struct.iscsi_conn, ptr %1, i64 0, i32 2
%19 = tail call i32 @list_add_tail(ptr noundef nonnull %6, ptr noundef nonnull %18) #2
%20 = tail call i32 @atomic_inc(ptr noundef %0) #2
%21 = tail call i32 @spin_unlock_bh(ptr noundef nonnull %16) #2
%22 = tail call i32 @wake_up(ptr noundef %1) #2
br label %23
23: ; preds = %12, %8
%24 = phi i32 [ 0, %12 ], [ %11, %8 ]
ret i32 %24
}
declare ptr @kmem_cache_zalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef) local_unnamed_addr #1
declare i32 @INIT_LIST_HEAD(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_bh(ptr noundef) local_unnamed_addr #1
declare i32 @list_add_tail(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @atomic_inc(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_bh(ptr noundef) local_unnamed_addr #1
declare i32 @wake_up(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"iscsi_queue_req", !6, i64 0, !6, i64 4, !11, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !6, i64 4}
| ; ModuleID = 'AnghaBench/linux/drivers/target/iscsi/extr_iscsi_target_util.c_iscsit_add_cmd_to_response_queue.c'
source_filename = "AnghaBench/linux/drivers/target/iscsi/extr_iscsi_target_util.c_iscsit_add_cmd_to_response_queue.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@lio_qr_cache = common local_unnamed_addr global i32 0, align 4
@GFP_ATOMIC = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [54 x i8] c"Unable to allocate memory for struct iscsi_queue_req\0A\00", align 1
@ENOMEM = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @iscsit_add_cmd_to_response_queue(ptr noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @lio_qr_cache, align 4, !tbaa !6
%5 = load i32, ptr @GFP_ATOMIC, align 4, !tbaa !6
%6 = tail call ptr @kmem_cache_zalloc(i32 noundef %4, i32 noundef %5) #2
%7 = icmp eq ptr %6, null
br i1 %7, label %8, label %12
8: ; preds = %3
%9 = tail call i32 @pr_err(ptr noundef nonnull @.str) #2
%10 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%11 = sub nsw i32 0, %10
br label %23
12: ; preds = %3
%13 = tail call i32 @INIT_LIST_HEAD(ptr noundef nonnull %6) #2
%14 = getelementptr inbounds i8, ptr %6, i64 8
store ptr %0, ptr %14, align 8, !tbaa !10
%15 = getelementptr inbounds i8, ptr %6, i64 4
store i32 %2, ptr %15, align 4, !tbaa !13
%16 = getelementptr inbounds i8, ptr %1, i64 4
%17 = tail call i32 @spin_lock_bh(ptr noundef nonnull %16) #2
%18 = getelementptr inbounds i8, ptr %1, i64 8
%19 = tail call i32 @list_add_tail(ptr noundef nonnull %6, ptr noundef nonnull %18) #2
%20 = tail call i32 @atomic_inc(ptr noundef %0) #2
%21 = tail call i32 @spin_unlock_bh(ptr noundef nonnull %16) #2
%22 = tail call i32 @wake_up(ptr noundef %1) #2
br label %23
23: ; preds = %12, %8
%24 = phi i32 [ 0, %12 ], [ %11, %8 ]
ret i32 %24
}
declare ptr @kmem_cache_zalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef) local_unnamed_addr #1
declare i32 @INIT_LIST_HEAD(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_bh(ptr noundef) local_unnamed_addr #1
declare i32 @list_add_tail(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @atomic_inc(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_bh(ptr noundef) local_unnamed_addr #1
declare i32 @wake_up(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"iscsi_queue_req", !7, i64 0, !7, i64 4, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !7, i64 4}
| linux_drivers_target_iscsi_extr_iscsi_target_util.c_iscsit_add_cmd_to_response_queue |
; ModuleID = 'AnghaBench/freebsd/sys/arm/nvidia/drm2/extr_tegra_bo.c_tegra_bo_alloc_contig.c'
source_filename = "AnghaBench/freebsd/sys/arm/nvidia/drm2/extr_tegra_bo.c_tegra_bo_alloc_contig.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, i32 }
@VM_ALLOC_NORMAL = dso_local local_unnamed_addr global i32 0, align 4
@VM_ALLOC_NOOBJ = dso_local local_unnamed_addr global i32 0, align 4
@VM_ALLOC_NOBUSY = dso_local local_unnamed_addr global i32 0, align 4
@VM_ALLOC_WIRED = dso_local local_unnamed_addr global i32 0, align 4
@VM_ALLOC_ZERO = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@PG_ZERO = dso_local local_unnamed_addr global i32 0, align 4
@VM_PAGE_BITS_ALL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @tegra_bo_alloc_contig], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @tegra_bo_alloc_contig(i64 noundef %0, i32 noundef %1, i32 noundef %2, ptr nocapture noundef readonly %3) #0 {
%5 = load i32, ptr @VM_ALLOC_NORMAL, align 4, !tbaa !5
%6 = load i32, ptr @VM_ALLOC_NOOBJ, align 4, !tbaa !5
%7 = or i32 %6, %5
%8 = load i32, ptr @VM_ALLOC_NOBUSY, align 4, !tbaa !5
%9 = or i32 %7, %8
%10 = load i32, ptr @VM_ALLOC_WIRED, align 4, !tbaa !5
%11 = or i32 %9, %10
%12 = load i32, ptr @VM_ALLOC_ZERO, align 4, !tbaa !5
%13 = or i32 %11, %12
%14 = tail call ptr @vm_page_alloc_contig(ptr noundef null, i32 noundef 0, i32 noundef %13, i64 noundef %0, i64 noundef 0, i64 noundef -1, i32 noundef %1, i64 noundef 0, i32 noundef %2) #2
%15 = icmp eq ptr %14, null
br i1 %15, label %16, label %19
16: ; preds = %4
%17 = tail call i32 @vm_page_reclaim_contig(i32 noundef %13, i64 noundef %0, i64 noundef 0, i64 noundef -1, i32 noundef %1, i64 noundef 0) #2
%18 = icmp eq i32 %17, 0
br i1 %18, label %24, label %26
19: ; preds = %26, %34, %42, %4
%20 = phi ptr [ %14, %4 ], [ %27, %26 ], [ %35, %34 ], [ %43, %42 ]
%21 = icmp eq i64 %0, 0
br i1 %21, label %66, label %22
22: ; preds = %19
%23 = load i32, ptr @PG_ZERO, align 4, !tbaa !5
br label %47
24: ; preds = %16
%25 = tail call i32 @vm_wait(ptr noundef null) #2
br label %26
26: ; preds = %24, %16
%27 = tail call ptr @vm_page_alloc_contig(ptr noundef null, i32 noundef 0, i32 noundef %13, i64 noundef %0, i64 noundef 0, i64 noundef -1, i32 noundef %1, i64 noundef 0, i32 noundef %2) #2
%28 = icmp eq ptr %27, null
br i1 %28, label %29, label %19
29: ; preds = %26
%30 = tail call i32 @vm_page_reclaim_contig(i32 noundef %13, i64 noundef %0, i64 noundef 0, i64 noundef -1, i32 noundef %1, i64 noundef 0) #2
%31 = icmp eq i32 %30, 0
br i1 %31, label %32, label %34
32: ; preds = %29
%33 = tail call i32 @vm_wait(ptr noundef null) #2
br label %34
34: ; preds = %32, %29
%35 = tail call ptr @vm_page_alloc_contig(ptr noundef null, i32 noundef 0, i32 noundef %13, i64 noundef %0, i64 noundef 0, i64 noundef -1, i32 noundef %1, i64 noundef 0, i32 noundef %2) #2
%36 = icmp eq ptr %35, null
br i1 %36, label %37, label %19
37: ; preds = %34
%38 = tail call i32 @vm_page_reclaim_contig(i32 noundef %13, i64 noundef %0, i64 noundef 0, i64 noundef -1, i32 noundef %1, i64 noundef 0) #2
%39 = icmp eq i32 %38, 0
br i1 %39, label %40, label %42
40: ; preds = %37
%41 = tail call i32 @vm_wait(ptr noundef null) #2
br label %42
42: ; preds = %40, %37
%43 = tail call ptr @vm_page_alloc_contig(ptr noundef null, i32 noundef 0, i32 noundef %13, i64 noundef %0, i64 noundef 0, i64 noundef -1, i32 noundef %1, i64 noundef 0, i32 noundef %2) #2
%44 = icmp eq ptr %43, null
br i1 %44, label %45, label %19
45: ; preds = %42
%46 = load i32, ptr @ENOMEM, align 4, !tbaa !5
br label %66
47: ; preds = %22, %57
%48 = phi i32 [ %23, %22 ], [ %58, %57 ]
%49 = phi i64 [ 0, %22 ], [ %63, %57 ]
%50 = phi ptr [ %20, %22 ], [ %64, %57 ]
%51 = load i32, ptr %50, align 4, !tbaa !9
%52 = and i32 %48, %51
%53 = icmp eq i32 %52, 0
br i1 %53, label %54, label %57
54: ; preds = %47
%55 = tail call i32 @pmap_zero_page(ptr noundef nonnull %50) #2
%56 = load i32, ptr @PG_ZERO, align 4, !tbaa !5
br label %57
57: ; preds = %54, %47
%58 = phi i32 [ %56, %54 ], [ %48, %47 ]
%59 = load i32, ptr @VM_PAGE_BITS_ALL, align 4, !tbaa !5
%60 = getelementptr inbounds %struct.TYPE_5__, ptr %50, i64 0, i32 1
store i32 %59, ptr %60, align 4, !tbaa !11
%61 = load ptr, ptr %3, align 8, !tbaa !12
%62 = getelementptr inbounds ptr, ptr %61, i64 %49
store ptr %50, ptr %62, align 8, !tbaa !12
%63 = add nuw i64 %49, 1
%64 = getelementptr inbounds %struct.TYPE_5__, ptr %50, i64 1
%65 = icmp eq i64 %63, %0
br i1 %65, label %66, label %47, !llvm.loop !14
66: ; preds = %57, %19, %45
%67 = phi i32 [ %46, %45 ], [ 0, %19 ], [ 0, %57 ]
ret i32 %67
}
declare ptr @vm_page_alloc_contig(ptr noundef, i32 noundef, i32 noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vm_page_reclaim_contig(i32 noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @vm_wait(ptr noundef) local_unnamed_addr #1
declare i32 @pmap_zero_page(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_5__", !6, i64 0, !6, i64 4}
!11 = !{!10, !6, i64 4}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !7, i64 0}
!14 = distinct !{!14, !15}
!15 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/sys/arm/nvidia/drm2/extr_tegra_bo.c_tegra_bo_alloc_contig.c'
source_filename = "AnghaBench/freebsd/sys/arm/nvidia/drm2/extr_tegra_bo.c_tegra_bo_alloc_contig.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VM_ALLOC_NORMAL = common local_unnamed_addr global i32 0, align 4
@VM_ALLOC_NOOBJ = common local_unnamed_addr global i32 0, align 4
@VM_ALLOC_NOBUSY = common local_unnamed_addr global i32 0, align 4
@VM_ALLOC_WIRED = common local_unnamed_addr global i32 0, align 4
@VM_ALLOC_ZERO = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@PG_ZERO = common local_unnamed_addr global i32 0, align 4
@VM_PAGE_BITS_ALL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @tegra_bo_alloc_contig], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @tegra_bo_alloc_contig(i64 noundef %0, i32 noundef %1, i32 noundef %2, ptr nocapture noundef readonly %3) #0 {
%5 = load i32, ptr @VM_ALLOC_NORMAL, align 4, !tbaa !6
%6 = load i32, ptr @VM_ALLOC_NOOBJ, align 4, !tbaa !6
%7 = or i32 %6, %5
%8 = load i32, ptr @VM_ALLOC_NOBUSY, align 4, !tbaa !6
%9 = or i32 %7, %8
%10 = load i32, ptr @VM_ALLOC_WIRED, align 4, !tbaa !6
%11 = or i32 %9, %10
%12 = load i32, ptr @VM_ALLOC_ZERO, align 4, !tbaa !6
%13 = or i32 %11, %12
%14 = tail call ptr @vm_page_alloc_contig(ptr noundef null, i32 noundef 0, i32 noundef %13, i64 noundef %0, i64 noundef 0, i64 noundef -1, i32 noundef %1, i64 noundef 0, i32 noundef %2) #2
%15 = icmp eq ptr %14, null
br i1 %15, label %16, label %19
16: ; preds = %4
%17 = tail call i32 @vm_page_reclaim_contig(i32 noundef %13, i64 noundef %0, i64 noundef 0, i64 noundef -1, i32 noundef %1, i64 noundef 0) #2
%18 = icmp eq i32 %17, 0
br i1 %18, label %24, label %26
19: ; preds = %26, %34, %42, %4
%20 = phi ptr [ %14, %4 ], [ %27, %26 ], [ %35, %34 ], [ %43, %42 ]
%21 = icmp eq i64 %0, 0
br i1 %21, label %66, label %22
22: ; preds = %19
%23 = load i32, ptr @PG_ZERO, align 4, !tbaa !6
br label %47
24: ; preds = %16
%25 = tail call i32 @vm_wait(ptr noundef null) #2
br label %26
26: ; preds = %24, %16
%27 = tail call ptr @vm_page_alloc_contig(ptr noundef null, i32 noundef 0, i32 noundef %13, i64 noundef %0, i64 noundef 0, i64 noundef -1, i32 noundef %1, i64 noundef 0, i32 noundef %2) #2
%28 = icmp eq ptr %27, null
br i1 %28, label %29, label %19
29: ; preds = %26
%30 = tail call i32 @vm_page_reclaim_contig(i32 noundef %13, i64 noundef %0, i64 noundef 0, i64 noundef -1, i32 noundef %1, i64 noundef 0) #2
%31 = icmp eq i32 %30, 0
br i1 %31, label %32, label %34
32: ; preds = %29
%33 = tail call i32 @vm_wait(ptr noundef null) #2
br label %34
34: ; preds = %32, %29
%35 = tail call ptr @vm_page_alloc_contig(ptr noundef null, i32 noundef 0, i32 noundef %13, i64 noundef %0, i64 noundef 0, i64 noundef -1, i32 noundef %1, i64 noundef 0, i32 noundef %2) #2
%36 = icmp eq ptr %35, null
br i1 %36, label %37, label %19
37: ; preds = %34
%38 = tail call i32 @vm_page_reclaim_contig(i32 noundef %13, i64 noundef %0, i64 noundef 0, i64 noundef -1, i32 noundef %1, i64 noundef 0) #2
%39 = icmp eq i32 %38, 0
br i1 %39, label %40, label %42
40: ; preds = %37
%41 = tail call i32 @vm_wait(ptr noundef null) #2
br label %42
42: ; preds = %40, %37
%43 = tail call ptr @vm_page_alloc_contig(ptr noundef null, i32 noundef 0, i32 noundef %13, i64 noundef %0, i64 noundef 0, i64 noundef -1, i32 noundef %1, i64 noundef 0, i32 noundef %2) #2
%44 = icmp eq ptr %43, null
br i1 %44, label %45, label %19
45: ; preds = %42
%46 = load i32, ptr @ENOMEM, align 4, !tbaa !6
br label %66
47: ; preds = %22, %57
%48 = phi i32 [ %23, %22 ], [ %58, %57 ]
%49 = phi i64 [ 0, %22 ], [ %63, %57 ]
%50 = phi ptr [ %20, %22 ], [ %64, %57 ]
%51 = load i32, ptr %50, align 4, !tbaa !10
%52 = and i32 %48, %51
%53 = icmp eq i32 %52, 0
br i1 %53, label %54, label %57
54: ; preds = %47
%55 = tail call i32 @pmap_zero_page(ptr noundef nonnull %50) #2
%56 = load i32, ptr @PG_ZERO, align 4, !tbaa !6
br label %57
57: ; preds = %54, %47
%58 = phi i32 [ %56, %54 ], [ %48, %47 ]
%59 = load i32, ptr @VM_PAGE_BITS_ALL, align 4, !tbaa !6
%60 = getelementptr inbounds i8, ptr %50, i64 4
store i32 %59, ptr %60, align 4, !tbaa !12
%61 = load ptr, ptr %3, align 8, !tbaa !13
%62 = getelementptr inbounds ptr, ptr %61, i64 %49
store ptr %50, ptr %62, align 8, !tbaa !13
%63 = add nuw i64 %49, 1
%64 = getelementptr inbounds i8, ptr %50, i64 8
%65 = icmp eq i64 %63, %0
br i1 %65, label %66, label %47, !llvm.loop !15
66: ; preds = %57, %19, %45
%67 = phi i32 [ %46, %45 ], [ 0, %19 ], [ 0, %57 ]
ret i32 %67
}
declare ptr @vm_page_alloc_contig(ptr noundef, i32 noundef, i32 noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vm_page_reclaim_contig(i32 noundef, i64 noundef, i64 noundef, i64 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @vm_wait(ptr noundef) local_unnamed_addr #1
declare i32 @pmap_zero_page(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_5__", !7, i64 0, !7, i64 4}
!12 = !{!11, !7, i64 4}
!13 = !{!14, !14, i64 0}
!14 = !{!"any pointer", !8, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
| freebsd_sys_arm_nvidia_drm2_extr_tegra_bo.c_tegra_bo_alloc_contig |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a3xx.xml.h_REG_A3XX_RB_MRT.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a3xx.xml.h_REG_A3XX_RB_MRT.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @REG_A3XX_RB_MRT], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal i32 @REG_A3XX_RB_MRT(i32 noundef %0) #0 {
%2 = shl nsw i32 %0, 2
%3 = add nsw i32 %2, 8388
ret i32 %3
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a3xx.xml.h_REG_A3XX_RB_MRT.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/adreno/extr_a3xx.xml.h_REG_A3XX_RB_MRT.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @REG_A3XX_RB_MRT], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal range(i32 -2147475260, -2147483648) i32 @REG_A3XX_RB_MRT(i32 noundef %0) #0 {
%2 = shl nsw i32 %0, 2
%3 = add nsw i32 %2, 8388
ret i32 %3
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_gpu_drm_msm_adreno_extr_a3xx.xml.h_REG_A3XX_RB_MRT |
; ModuleID = 'AnghaBench/esp-idf/components/esp32s2beta/extr_cache_err_int.c_esp_cache_err_int_init.c'
source_filename = "AnghaBench/esp-idf/components/esp32s2beta/extr_cache_err_int.c_esp_cache_err_int_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ETS_CACHEERR_INUM = dso_local local_unnamed_addr global i32 0, align 4
@ETS_CACHE_IA_INTR_SOURCE = dso_local local_unnamed_addr global i32 0, align 4
@DPORT_PRO_CACHE_IA_INT_EN_REG = dso_local local_unnamed_addr global i32 0, align 4
@DPORT_MMU_ENTRY_FAULT_INT_ENA = dso_local local_unnamed_addr global i32 0, align 4
@DPORT_DCACHE_REJECT_INT_ENA = dso_local local_unnamed_addr global i32 0, align 4
@DPORT_DCACHE_WRITE_FLASH_INT_ENA = dso_local local_unnamed_addr global i32 0, align 4
@DPORT_DC_PRELOAD_SIZE_FAULT_INT_ENA = dso_local local_unnamed_addr global i32 0, align 4
@DPORT_DC_SYNC_SIZE_FAULT_INT_ENA = dso_local local_unnamed_addr global i32 0, align 4
@DPORT_ICACHE_REJECT_INT_ENA = dso_local local_unnamed_addr global i32 0, align 4
@DPORT_IC_PRELOAD_SIZE_FAULT_INT_ENA = dso_local local_unnamed_addr global i32 0, align 4
@DPORT_IC_SYNC_SIZE_FAULT_INT_ENA = dso_local local_unnamed_addr global i32 0, align 4
@DPORT_CACHE_DBG_INT_CLR = dso_local local_unnamed_addr global i32 0, align 4
@DPORT_CACHE_DBG_EN = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @esp_cache_err_int_init() local_unnamed_addr #0 {
%1 = tail call i32 (...) @xPortGetCoreID() #2
%2 = load i32, ptr @ETS_CACHEERR_INUM, align 4, !tbaa !5
%3 = tail call i32 @ESP_INTR_DISABLE(i32 noundef %2) #2
%4 = load i32, ptr @ETS_CACHE_IA_INTR_SOURCE, align 4, !tbaa !5
%5 = load i32, ptr @ETS_CACHEERR_INUM, align 4, !tbaa !5
%6 = tail call i32 @intr_matrix_set(i32 noundef %1, i32 noundef %4, i32 noundef %5) #2
%7 = load i32, ptr @DPORT_PRO_CACHE_IA_INT_EN_REG, align 4, !tbaa !5
%8 = load i32, ptr @DPORT_MMU_ENTRY_FAULT_INT_ENA, align 4, !tbaa !5
%9 = load i32, ptr @DPORT_DCACHE_REJECT_INT_ENA, align 4, !tbaa !5
%10 = or i32 %9, %8
%11 = load i32, ptr @DPORT_DCACHE_WRITE_FLASH_INT_ENA, align 4, !tbaa !5
%12 = or i32 %10, %11
%13 = load i32, ptr @DPORT_DC_PRELOAD_SIZE_FAULT_INT_ENA, align 4, !tbaa !5
%14 = or i32 %12, %13
%15 = load i32, ptr @DPORT_DC_SYNC_SIZE_FAULT_INT_ENA, align 4, !tbaa !5
%16 = or i32 %14, %15
%17 = load i32, ptr @DPORT_ICACHE_REJECT_INT_ENA, align 4, !tbaa !5
%18 = or i32 %16, %17
%19 = load i32, ptr @DPORT_IC_PRELOAD_SIZE_FAULT_INT_ENA, align 4, !tbaa !5
%20 = or i32 %18, %19
%21 = load i32, ptr @DPORT_IC_SYNC_SIZE_FAULT_INT_ENA, align 4, !tbaa !5
%22 = or i32 %20, %21
%23 = load i32, ptr @DPORT_CACHE_DBG_INT_CLR, align 4, !tbaa !5
%24 = or i32 %22, %23
%25 = load i32, ptr @DPORT_CACHE_DBG_EN, align 4, !tbaa !5
%26 = or i32 %24, %25
%27 = tail call i32 @DPORT_SET_PERI_REG_MASK(i32 noundef %7, i32 noundef %26) #2
%28 = load i32, ptr @ETS_CACHEERR_INUM, align 4, !tbaa !5
%29 = tail call i32 @ESP_INTR_ENABLE(i32 noundef %28) #2
ret void
}
declare i32 @xPortGetCoreID(...) local_unnamed_addr #1
declare i32 @ESP_INTR_DISABLE(i32 noundef) local_unnamed_addr #1
declare i32 @intr_matrix_set(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DPORT_SET_PERI_REG_MASK(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ESP_INTR_ENABLE(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/esp-idf/components/esp32s2beta/extr_cache_err_int.c_esp_cache_err_int_init.c'
source_filename = "AnghaBench/esp-idf/components/esp32s2beta/extr_cache_err_int.c_esp_cache_err_int_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ETS_CACHEERR_INUM = common local_unnamed_addr global i32 0, align 4
@ETS_CACHE_IA_INTR_SOURCE = common local_unnamed_addr global i32 0, align 4
@DPORT_PRO_CACHE_IA_INT_EN_REG = common local_unnamed_addr global i32 0, align 4
@DPORT_MMU_ENTRY_FAULT_INT_ENA = common local_unnamed_addr global i32 0, align 4
@DPORT_DCACHE_REJECT_INT_ENA = common local_unnamed_addr global i32 0, align 4
@DPORT_DCACHE_WRITE_FLASH_INT_ENA = common local_unnamed_addr global i32 0, align 4
@DPORT_DC_PRELOAD_SIZE_FAULT_INT_ENA = common local_unnamed_addr global i32 0, align 4
@DPORT_DC_SYNC_SIZE_FAULT_INT_ENA = common local_unnamed_addr global i32 0, align 4
@DPORT_ICACHE_REJECT_INT_ENA = common local_unnamed_addr global i32 0, align 4
@DPORT_IC_PRELOAD_SIZE_FAULT_INT_ENA = common local_unnamed_addr global i32 0, align 4
@DPORT_IC_SYNC_SIZE_FAULT_INT_ENA = common local_unnamed_addr global i32 0, align 4
@DPORT_CACHE_DBG_INT_CLR = common local_unnamed_addr global i32 0, align 4
@DPORT_CACHE_DBG_EN = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @esp_cache_err_int_init() local_unnamed_addr #0 {
%1 = tail call i32 @xPortGetCoreID() #2
%2 = load i32, ptr @ETS_CACHEERR_INUM, align 4, !tbaa !6
%3 = tail call i32 @ESP_INTR_DISABLE(i32 noundef %2) #2
%4 = load i32, ptr @ETS_CACHE_IA_INTR_SOURCE, align 4, !tbaa !6
%5 = load i32, ptr @ETS_CACHEERR_INUM, align 4, !tbaa !6
%6 = tail call i32 @intr_matrix_set(i32 noundef %1, i32 noundef %4, i32 noundef %5) #2
%7 = load i32, ptr @DPORT_PRO_CACHE_IA_INT_EN_REG, align 4, !tbaa !6
%8 = load i32, ptr @DPORT_MMU_ENTRY_FAULT_INT_ENA, align 4, !tbaa !6
%9 = load i32, ptr @DPORT_DCACHE_REJECT_INT_ENA, align 4, !tbaa !6
%10 = or i32 %9, %8
%11 = load i32, ptr @DPORT_DCACHE_WRITE_FLASH_INT_ENA, align 4, !tbaa !6
%12 = or i32 %10, %11
%13 = load i32, ptr @DPORT_DC_PRELOAD_SIZE_FAULT_INT_ENA, align 4, !tbaa !6
%14 = or i32 %12, %13
%15 = load i32, ptr @DPORT_DC_SYNC_SIZE_FAULT_INT_ENA, align 4, !tbaa !6
%16 = or i32 %14, %15
%17 = load i32, ptr @DPORT_ICACHE_REJECT_INT_ENA, align 4, !tbaa !6
%18 = or i32 %16, %17
%19 = load i32, ptr @DPORT_IC_PRELOAD_SIZE_FAULT_INT_ENA, align 4, !tbaa !6
%20 = or i32 %18, %19
%21 = load i32, ptr @DPORT_IC_SYNC_SIZE_FAULT_INT_ENA, align 4, !tbaa !6
%22 = or i32 %20, %21
%23 = load i32, ptr @DPORT_CACHE_DBG_INT_CLR, align 4, !tbaa !6
%24 = or i32 %22, %23
%25 = load i32, ptr @DPORT_CACHE_DBG_EN, align 4, !tbaa !6
%26 = or i32 %24, %25
%27 = tail call i32 @DPORT_SET_PERI_REG_MASK(i32 noundef %7, i32 noundef %26) #2
%28 = load i32, ptr @ETS_CACHEERR_INUM, align 4, !tbaa !6
%29 = tail call i32 @ESP_INTR_ENABLE(i32 noundef %28) #2
ret void
}
declare i32 @xPortGetCoreID(...) local_unnamed_addr #1
declare i32 @ESP_INTR_DISABLE(i32 noundef) local_unnamed_addr #1
declare i32 @intr_matrix_set(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @DPORT_SET_PERI_REG_MASK(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ESP_INTR_ENABLE(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| esp-idf_components_esp32s2beta_extr_cache_err_int.c_esp_cache_err_int_init |
; ModuleID = 'AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_whereForeignKeys.c'
source_filename = "AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_whereForeignKeys.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { ptr, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @whereForeignKeys], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @whereForeignKeys(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = tail call ptr @sqlite3FkReferences(ptr noundef %1) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi ptr [ %11, %5 ], [ null, %2 ]
%7 = phi ptr [ %13, %5 ], [ %3, %2 ]
%8 = load i32, ptr %0, align 4, !tbaa !5
%9 = load ptr, ptr %7, align 8, !tbaa !10
%10 = load i32, ptr %9, align 4, !tbaa !13
%11 = tail call ptr @whereOrName(i32 noundef %8, ptr noundef %6, i32 noundef %10) #2
%12 = getelementptr inbounds %struct.TYPE_8__, ptr %7, i64 0, i32 1
%13 = load ptr, ptr %12, align 8, !tbaa !15
%14 = icmp eq ptr %13, null
br i1 %14, label %15, label %5, !llvm.loop !16
15: ; preds = %5, %2
%16 = phi ptr [ null, %2 ], [ %11, %5 ]
ret ptr %16
}
declare ptr @sqlite3FkReferences(ptr noundef) local_unnamed_addr #1
declare ptr @whereOrName(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_7__", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_8__", !12, i64 0, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_6__", !7, i64 0}
!15 = !{!11, !12, i64 8}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_whereForeignKeys.c'
source_filename = "AnghaBench/ccv/lib/3rdparty/sqlite3/extr_sqlite3.c_whereForeignKeys.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @whereForeignKeys], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @whereForeignKeys(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = tail call ptr @sqlite3FkReferences(ptr noundef %1) #2
%4 = icmp eq ptr %3, null
br i1 %4, label %15, label %5
5: ; preds = %2, %5
%6 = phi ptr [ %11, %5 ], [ null, %2 ]
%7 = phi ptr [ %13, %5 ], [ %3, %2 ]
%8 = load i32, ptr %0, align 4, !tbaa !6
%9 = load ptr, ptr %7, align 8, !tbaa !11
%10 = load i32, ptr %9, align 4, !tbaa !14
%11 = tail call ptr @whereOrName(i32 noundef %8, ptr noundef %6, i32 noundef %10) #2
%12 = getelementptr inbounds i8, ptr %7, i64 8
%13 = load ptr, ptr %12, align 8, !tbaa !16
%14 = icmp eq ptr %13, null
br i1 %14, label %15, label %5, !llvm.loop !17
15: ; preds = %5, %2
%16 = phi ptr [ null, %2 ], [ %11, %5 ]
ret ptr %16
}
declare ptr @sqlite3FkReferences(ptr noundef) local_unnamed_addr #1
declare ptr @whereOrName(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_7__", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_8__", !13, i64 0, !13, i64 8}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"TYPE_6__", !8, i64 0}
!16 = !{!12, !13, i64 8}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
| ccv_lib_3rdparty_sqlite3_extr_sqlite3.c_whereForeignKeys |
; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_dsl_userhold.c_dsl_onexit_hold_cleanup.c'
source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_dsl_userhold.c_dsl_onexit_hold_cleanup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { ptr, i32, i32 }
@KM_SLEEP = dso_local local_unnamed_addr global i32 0, align 4
@dsl_dataset_user_release_onexit = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @dsl_onexit_hold_cleanup], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @dsl_onexit_hold_cleanup(ptr noundef %0, ptr noundef %1, i64 noundef %2) #0 {
%4 = icmp eq i64 %2, 0
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = tail call i64 @nvlist_empty(ptr noundef %1) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %5, %3
%9 = tail call i32 @fnvlist_free(ptr noundef %1) #2
br label %25
10: ; preds = %5
%11 = icmp ne ptr %0, null
%12 = zext i1 %11 to i32
%13 = tail call i32 @ASSERT(i32 noundef %12) #2
%14 = load i32, ptr @KM_SLEEP, align 4, !tbaa !5
%15 = tail call ptr @kmem_alloc(i32 noundef 16, i32 noundef %14) #2
%16 = getelementptr inbounds %struct.TYPE_4__, ptr %15, i64 0, i32 2
%17 = load i32, ptr %16, align 4, !tbaa !9
%18 = tail call i32 @spa_name(ptr noundef %0) #2
%19 = tail call i32 @strlcpy(i32 noundef %17, i32 noundef %18, i32 noundef 4) #2
%20 = tail call i32 @spa_load_guid(ptr noundef %0) #2
%21 = getelementptr inbounds %struct.TYPE_4__, ptr %15, i64 0, i32 1
store i32 %20, ptr %21, align 8, !tbaa !12
store ptr %1, ptr %15, align 8, !tbaa !13
%22 = load i32, ptr @dsl_dataset_user_release_onexit, align 4, !tbaa !5
%23 = tail call i32 @zfs_onexit_add_cb(i64 noundef %2, i32 noundef %22, ptr noundef nonnull %15, ptr noundef null) #2
%24 = tail call i32 @VERIFY0(i32 noundef %23) #2
br label %25
25: ; preds = %10, %8
ret void
}
declare i64 @nvlist_empty(ptr noundef) local_unnamed_addr #1
declare i32 @fnvlist_free(ptr noundef) local_unnamed_addr #1
declare i32 @ASSERT(i32 noundef) local_unnamed_addr #1
declare ptr @kmem_alloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @strlcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spa_name(ptr noundef) local_unnamed_addr #1
declare i32 @spa_load_guid(ptr noundef) local_unnamed_addr #1
declare i32 @VERIFY0(i32 noundef) local_unnamed_addr #1
declare i32 @zfs_onexit_add_cb(i64 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 12}
!10 = !{!"TYPE_4__", !11, i64 0, !6, i64 8, !6, i64 12}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !6, i64 8}
!13 = !{!10, !11, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_dsl_userhold.c_dsl_onexit_hold_cleanup.c'
source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_dsl_userhold.c_dsl_onexit_hold_cleanup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@KM_SLEEP = common local_unnamed_addr global i32 0, align 4
@dsl_dataset_user_release_onexit = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @dsl_onexit_hold_cleanup], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @dsl_onexit_hold_cleanup(ptr noundef %0, ptr noundef %1, i64 noundef %2) #0 {
%4 = icmp eq i64 %2, 0
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = tail call i64 @nvlist_empty(ptr noundef %1) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %10, label %8
8: ; preds = %5, %3
%9 = tail call i32 @fnvlist_free(ptr noundef %1) #2
br label %25
10: ; preds = %5
%11 = icmp ne ptr %0, null
%12 = zext i1 %11 to i32
%13 = tail call i32 @ASSERT(i32 noundef %12) #2
%14 = load i32, ptr @KM_SLEEP, align 4, !tbaa !6
%15 = tail call ptr @kmem_alloc(i32 noundef 16, i32 noundef %14) #2
%16 = getelementptr inbounds i8, ptr %15, i64 12
%17 = load i32, ptr %16, align 4, !tbaa !10
%18 = tail call i32 @spa_name(ptr noundef %0) #2
%19 = tail call i32 @strlcpy(i32 noundef %17, i32 noundef %18, i32 noundef 4) #2
%20 = tail call i32 @spa_load_guid(ptr noundef %0) #2
%21 = getelementptr inbounds i8, ptr %15, i64 8
store i32 %20, ptr %21, align 8, !tbaa !13
store ptr %1, ptr %15, align 8, !tbaa !14
%22 = load i32, ptr @dsl_dataset_user_release_onexit, align 4, !tbaa !6
%23 = tail call i32 @zfs_onexit_add_cb(i64 noundef %2, i32 noundef %22, ptr noundef nonnull %15, ptr noundef null) #2
%24 = tail call i32 @VERIFY0(i32 noundef %23) #2
br label %25
25: ; preds = %10, %8
ret void
}
declare i64 @nvlist_empty(ptr noundef) local_unnamed_addr #1
declare i32 @fnvlist_free(ptr noundef) local_unnamed_addr #1
declare i32 @ASSERT(i32 noundef) local_unnamed_addr #1
declare ptr @kmem_alloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @strlcpy(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spa_name(ptr noundef) local_unnamed_addr #1
declare i32 @spa_load_guid(ptr noundef) local_unnamed_addr #1
declare i32 @VERIFY0(i32 noundef) local_unnamed_addr #1
declare i32 @zfs_onexit_add_cb(i64 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 12}
!11 = !{!"TYPE_4__", !12, i64 0, !7, i64 8, !7, i64 12}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !7, i64 8}
!14 = !{!11, !12, i64 0}
| freebsd_sys_cddl_contrib_opensolaris_uts_common_fs_zfs_extr_dsl_userhold.c_dsl_onexit_hold_cleanup |
; ModuleID = 'AnghaBench/postgres/src/interfaces/libpq/extr_fe-connect.c_sendTerminateConn.c'
source_filename = "AnghaBench/postgres/src/interfaces/libpq/extr_fe-connect.c_sendTerminateConn.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i64, i64 }
@PGINVALID_SOCKET = dso_local local_unnamed_addr global i64 0, align 8
@CONNECTION_OK = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @sendTerminateConn], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @sendTerminateConn(ptr noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = load i64, ptr @PGINVALID_SOCKET, align 8, !tbaa !10
%4 = icmp eq i64 %2, %3
br i1 %4, label %14, label %5
5: ; preds = %1
%6 = getelementptr inbounds %struct.TYPE_6__, ptr %0, i64 0, i32 1
%7 = load i64, ptr %6, align 8, !tbaa !11
%8 = load i64, ptr @CONNECTION_OK, align 8, !tbaa !10
%9 = icmp eq i64 %7, %8
br i1 %9, label %10, label %14
10: ; preds = %5
%11 = tail call i32 @pqPutMsgStart(i8 noundef signext 88, i32 noundef 0, ptr noundef nonnull %0) #2
%12 = tail call i32 @pqPutMsgEnd(ptr noundef nonnull %0) #2
%13 = tail call i32 @pqFlush(ptr noundef nonnull %0) #2
br label %14
14: ; preds = %10, %5, %1
ret void
}
declare i32 @pqPutMsgStart(i8 noundef signext, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @pqPutMsgEnd(ptr noundef) local_unnamed_addr #1
declare i32 @pqFlush(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_6__", !7, i64 0, !7, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 8}
| ; ModuleID = 'AnghaBench/postgres/src/interfaces/libpq/extr_fe-connect.c_sendTerminateConn.c'
source_filename = "AnghaBench/postgres/src/interfaces/libpq/extr_fe-connect.c_sendTerminateConn.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PGINVALID_SOCKET = common local_unnamed_addr global i64 0, align 8
@CONNECTION_OK = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @sendTerminateConn], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @sendTerminateConn(ptr noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = load i64, ptr @PGINVALID_SOCKET, align 8, !tbaa !11
%4 = icmp eq i64 %2, %3
br i1 %4, label %14, label %5
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load i64, ptr %6, align 8, !tbaa !12
%8 = load i64, ptr @CONNECTION_OK, align 8, !tbaa !11
%9 = icmp eq i64 %7, %8
br i1 %9, label %10, label %14
10: ; preds = %5
%11 = tail call i32 @pqPutMsgStart(i8 noundef signext 88, i32 noundef 0, ptr noundef nonnull %0) #2
%12 = tail call i32 @pqPutMsgEnd(ptr noundef nonnull %0) #2
%13 = tail call i32 @pqFlush(ptr noundef nonnull %0) #2
br label %14
14: ; preds = %10, %5, %1
ret void
}
declare i32 @pqPutMsgStart(i8 noundef signext, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @pqPutMsgEnd(ptr noundef) local_unnamed_addr #1
declare i32 @pqFlush(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0, !8, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!7, !8, i64 8}
| postgres_src_interfaces_libpq_extr_fe-connect.c_sendTerminateConn |
; ModuleID = 'AnghaBench/linux/fs/ocfs2/extr_namei.c_ocfs2_lookup_lock_orphan_dir.c'
source_filename = "AnghaBench/linux/fs/ocfs2/extr_namei.c_ocfs2_lookup_lock_orphan_dir.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ORPHAN_DIR_SYSTEM_INODE = dso_local local_unnamed_addr global i32 0, align 4
@ENOENT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ocfs2_lookup_lock_orphan_dir], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ocfs2_lookup_lock_orphan_dir(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef writeonly %2) #0 {
%4 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
store ptr null, ptr %4, align 8, !tbaa !5
%5 = load i32, ptr @ORPHAN_DIR_SYSTEM_INODE, align 4, !tbaa !9
%6 = load i32, ptr %0, align 4, !tbaa !11
%7 = tail call ptr @ocfs2_get_system_file_inode(ptr noundef nonnull %0, i32 noundef %5, i32 noundef %6) #3
%8 = icmp eq ptr %7, null
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load i32, ptr @ENOENT, align 4, !tbaa !9
%11 = sub nsw i32 0, %10
%12 = tail call i32 @mlog_errno(i32 noundef %11) #3
br label %23
13: ; preds = %3
%14 = tail call i32 @inode_lock(ptr noundef nonnull %7) #3
%15 = call i32 @ocfs2_inode_lock(ptr noundef nonnull %7, ptr noundef nonnull %4, i32 noundef 1) #3
%16 = icmp slt i32 %15, 0
br i1 %16, label %17, label %21
17: ; preds = %13
%18 = call i32 @inode_unlock(ptr noundef nonnull %7) #3
%19 = call i32 @iput(ptr noundef nonnull %7) #3
%20 = call i32 @mlog_errno(i32 noundef %15) #3
br label %23
21: ; preds = %13
store ptr %7, ptr %1, align 8, !tbaa !5
%22 = load ptr, ptr %4, align 8, !tbaa !5
store ptr %22, ptr %2, align 8, !tbaa !5
br label %23
23: ; preds = %21, %17, %9
%24 = phi i32 [ %15, %17 ], [ 0, %21 ], [ %11, %9 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret i32 %24
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @ocfs2_get_system_file_inode(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mlog_errno(i32 noundef) local_unnamed_addr #2
declare i32 @inode_lock(ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_inode_lock(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @inode_unlock(ptr noundef) local_unnamed_addr #2
declare i32 @iput(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"ocfs2_super", !10, i64 0}
| ; ModuleID = 'AnghaBench/linux/fs/ocfs2/extr_namei.c_ocfs2_lookup_lock_orphan_dir.c'
source_filename = "AnghaBench/linux/fs/ocfs2/extr_namei.c_ocfs2_lookup_lock_orphan_dir.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ORPHAN_DIR_SYSTEM_INODE = common local_unnamed_addr global i32 0, align 4
@ENOENT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ocfs2_lookup_lock_orphan_dir], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ocfs2_lookup_lock_orphan_dir(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef writeonly %2) #0 {
%4 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %4) #3
store ptr null, ptr %4, align 8, !tbaa !6
%5 = load i32, ptr @ORPHAN_DIR_SYSTEM_INODE, align 4, !tbaa !10
%6 = load i32, ptr %0, align 4, !tbaa !12
%7 = tail call ptr @ocfs2_get_system_file_inode(ptr noundef nonnull %0, i32 noundef %5, i32 noundef %6) #3
%8 = icmp eq ptr %7, null
br i1 %8, label %9, label %13
9: ; preds = %3
%10 = load i32, ptr @ENOENT, align 4, !tbaa !10
%11 = sub nsw i32 0, %10
%12 = tail call i32 @mlog_errno(i32 noundef %11) #3
br label %23
13: ; preds = %3
%14 = tail call i32 @inode_lock(ptr noundef nonnull %7) #3
%15 = call i32 @ocfs2_inode_lock(ptr noundef nonnull %7, ptr noundef nonnull %4, i32 noundef 1) #3
%16 = icmp slt i32 %15, 0
br i1 %16, label %17, label %21
17: ; preds = %13
%18 = call i32 @inode_unlock(ptr noundef nonnull %7) #3
%19 = call i32 @iput(ptr noundef nonnull %7) #3
%20 = call i32 @mlog_errno(i32 noundef %15) #3
br label %23
21: ; preds = %13
store ptr %7, ptr %1, align 8, !tbaa !6
%22 = load ptr, ptr %4, align 8, !tbaa !6
store ptr %22, ptr %2, align 8, !tbaa !6
br label %23
23: ; preds = %21, %17, %9
%24 = phi i32 [ %15, %17 ], [ 0, %21 ], [ %11, %9 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %4) #3
ret i32 %24
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @ocfs2_get_system_file_inode(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @mlog_errno(i32 noundef) local_unnamed_addr #2
declare i32 @inode_lock(ptr noundef) local_unnamed_addr #2
declare i32 @ocfs2_inode_lock(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @inode_unlock(ptr noundef) local_unnamed_addr #2
declare i32 @iput(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"ocfs2_super", !11, i64 0}
| linux_fs_ocfs2_extr_namei.c_ocfs2_lookup_lock_orphan_dir |
; ModuleID = 'AnghaBench/mongoose/examples/api_server/extr_sqlite3.c_explainAppendTerm.c'
source_filename = "AnghaBench/mongoose/examples/api_server/extr_sqlite3.c_explainAppendTerm.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [6 x i8] c" AND \00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"?\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @explainAppendTerm], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @explainAppendTerm(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = icmp eq i32 %1, 0
br i1 %5, label %8, label %6
6: ; preds = %4
%7 = tail call i32 @sqlite3StrAccumAppend(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef 5) #2
br label %8
8: ; preds = %6, %4
%9 = tail call i32 @sqlite3StrAccumAppend(ptr noundef %0, ptr noundef %2, i32 noundef -1) #2
%10 = tail call i32 @sqlite3StrAccumAppend(ptr noundef %0, ptr noundef %3, i32 noundef 1) #2
%11 = tail call i32 @sqlite3StrAccumAppend(ptr noundef %0, ptr noundef nonnull @.str.1, i32 noundef 1) #2
ret void
}
declare i32 @sqlite3StrAccumAppend(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/mongoose/examples/api_server/extr_sqlite3.c_explainAppendTerm.c'
source_filename = "AnghaBench/mongoose/examples/api_server/extr_sqlite3.c_explainAppendTerm.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [6 x i8] c" AND \00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"?\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @explainAppendTerm], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @explainAppendTerm(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = icmp eq i32 %1, 0
br i1 %5, label %8, label %6
6: ; preds = %4
%7 = tail call i32 @sqlite3StrAccumAppend(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef 5) #2
br label %8
8: ; preds = %6, %4
%9 = tail call i32 @sqlite3StrAccumAppend(ptr noundef %0, ptr noundef %2, i32 noundef -1) #2
%10 = tail call i32 @sqlite3StrAccumAppend(ptr noundef %0, ptr noundef %3, i32 noundef 1) #2
%11 = tail call i32 @sqlite3StrAccumAppend(ptr noundef %0, ptr noundef nonnull @.str.1, i32 noundef 1) #2
ret void
}
declare i32 @sqlite3StrAccumAppend(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| mongoose_examples_api_server_extr_sqlite3.c_explainAppendTerm |
; ModuleID = 'AnghaBench/freebsd/sys/contrib/ncsw/Peripherals/FM/Pcd/extr_fm_replic.c_DeleteGroup.c'
source_filename = "AnghaBench/freebsd/sys/contrib/ncsw/Peripherals/FM/Pcd/extr_fm_replic.c_DeleteGroup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_19__ = type { i32, i32, i64, ptr, ptr, ptr, ptr }
@FALSE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @DeleteGroup], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @DeleteGroup(ptr noundef %0) #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %60, label %3
3: ; preds = %1
%4 = getelementptr inbounds %struct.TYPE_19__, ptr %0, i64 0, i32 3
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = tail call i32 @ASSERT_COND(ptr noundef %5) #2
%7 = load ptr, ptr %4, align 8, !tbaa !5
%8 = tail call ptr @FmPcdGetMuramHandle(ptr noundef %7) #2
%9 = tail call i32 @ASSERT_COND(ptr noundef %8) #2
%10 = getelementptr inbounds %struct.TYPE_19__, ptr %0, i64 0, i32 6
%11 = load ptr, ptr %10, align 8, !tbaa !12
%12 = icmp eq ptr %11, null
br i1 %12, label %15, label %13
13: ; preds = %3
%14 = tail call i32 @FM_MURAM_FreeMem(ptr noundef %8, ptr noundef nonnull %11) #2
store ptr null, ptr %10, align 8, !tbaa !12
br label %15
15: ; preds = %13, %3
%16 = load i32, ptr %0, align 8, !tbaa !13
%17 = icmp sgt i32 %16, 0
br i1 %17, label %18, label %33
18: ; preds = %15, %29
%19 = phi i32 [ %20, %29 ], [ %16, %15 ]
%20 = add nsw i32 %19, -1
%21 = tail call ptr @GetMemberByIndex(ptr noundef nonnull %0, i32 noundef %20) #2
%22 = tail call i32 @ASSERT_COND(ptr noundef %21) #2
%23 = getelementptr inbounds %struct.TYPE_19__, ptr %21, i64 0, i32 5
%24 = load ptr, ptr %23, align 8, !tbaa !14
%25 = icmp eq ptr %24, null
br i1 %25, label %29, label %26
26: ; preds = %18
%27 = load i32, ptr @FALSE, align 4, !tbaa !15
%28 = tail call i32 @FmPcdManipUpdateOwner(ptr noundef nonnull %24, i32 noundef %27) #2
store ptr null, ptr %23, align 8, !tbaa !14
br label %29
29: ; preds = %26, %18
%30 = tail call i32 @RemoveMemberFromList(ptr noundef nonnull %0, ptr noundef nonnull %21) #2
%31 = tail call i32 @FreeMember(ptr noundef nonnull %0, ptr noundef nonnull %21) #2
%32 = icmp ugt i32 %19, 1
br i1 %32, label %18, label %33, !llvm.loop !16
33: ; preds = %29, %15
%34 = getelementptr inbounds %struct.TYPE_19__, ptr %0, i64 0, i32 1
%35 = load i32, ptr %34, align 4, !tbaa !18
%36 = icmp sgt i32 %35, 0
br i1 %36, label %37, label %51
37: ; preds = %33, %46
%38 = phi i32 [ %48, %46 ], [ 0, %33 ]
%39 = tail call ptr @GetAvailableMember(ptr noundef nonnull %0) #2
%40 = tail call i32 @ASSERT_COND(ptr noundef %39) #2
%41 = getelementptr inbounds %struct.TYPE_19__, ptr %39, i64 0, i32 4
%42 = load ptr, ptr %41, align 8, !tbaa !19
%43 = icmp eq ptr %42, null
br i1 %43, label %46, label %44
44: ; preds = %37
%45 = tail call i32 @FM_MURAM_FreeMem(ptr noundef %8, ptr noundef nonnull %42) #2
store ptr null, ptr %41, align 8, !tbaa !19
br label %46
46: ; preds = %44, %37
%47 = tail call i32 @XX_Free(ptr noundef nonnull %39) #2
%48 = add nuw nsw i32 %38, 1
%49 = load i32, ptr %34, align 4, !tbaa !18
%50 = icmp slt i32 %48, %49
br i1 %50, label %37, label %51, !llvm.loop !20
51: ; preds = %46, %33
%52 = getelementptr inbounds %struct.TYPE_19__, ptr %0, i64 0, i32 2
%53 = load i64, ptr %52, align 8, !tbaa !21
%54 = icmp eq i64 %53, 0
br i1 %54, label %58, label %55
55: ; preds = %51
%56 = load ptr, ptr %4, align 8, !tbaa !5
%57 = tail call i32 @FmPcdReleaseLock(ptr noundef %56, i64 noundef %53) #2
br label %58
58: ; preds = %55, %51
%59 = tail call i32 @XX_Free(ptr noundef nonnull %0) #2
br label %60
60: ; preds = %58, %1
ret void
}
declare i32 @ASSERT_COND(ptr noundef) local_unnamed_addr #1
declare ptr @FmPcdGetMuramHandle(ptr noundef) local_unnamed_addr #1
declare i32 @FM_MURAM_FreeMem(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @GetMemberByIndex(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @FmPcdManipUpdateOwner(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @RemoveMemberFromList(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @FreeMember(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @GetAvailableMember(ptr noundef) local_unnamed_addr #1
declare i32 @XX_Free(ptr noundef) local_unnamed_addr #1
declare i32 @FmPcdReleaseLock(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 16}
!6 = !{!"TYPE_19__", !7, i64 0, !7, i64 4, !10, i64 8, !11, i64 16, !11, i64 24, !11, i64 32, !11, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !11, i64 40}
!13 = !{!6, !7, i64 0}
!14 = !{!6, !11, i64 32}
!15 = !{!7, !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!6, !7, i64 4}
!19 = !{!6, !11, i64 24}
!20 = distinct !{!20, !17}
!21 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/freebsd/sys/contrib/ncsw/Peripherals/FM/Pcd/extr_fm_replic.c_DeleteGroup.c'
source_filename = "AnghaBench/freebsd/sys/contrib/ncsw/Peripherals/FM/Pcd/extr_fm_replic.c_DeleteGroup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FALSE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @DeleteGroup], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @DeleteGroup(ptr noundef %0) #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %60, label %3
3: ; preds = %1
%4 = getelementptr inbounds i8, ptr %0, i64 16
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = tail call i32 @ASSERT_COND(ptr noundef %5) #2
%7 = load ptr, ptr %4, align 8, !tbaa !6
%8 = tail call ptr @FmPcdGetMuramHandle(ptr noundef %7) #2
%9 = tail call i32 @ASSERT_COND(ptr noundef %8) #2
%10 = getelementptr inbounds i8, ptr %0, i64 40
%11 = load ptr, ptr %10, align 8, !tbaa !13
%12 = icmp eq ptr %11, null
br i1 %12, label %15, label %13
13: ; preds = %3
%14 = tail call i32 @FM_MURAM_FreeMem(ptr noundef %8, ptr noundef nonnull %11) #2
store ptr null, ptr %10, align 8, !tbaa !13
br label %15
15: ; preds = %13, %3
%16 = load i32, ptr %0, align 8, !tbaa !14
%17 = icmp sgt i32 %16, 0
br i1 %17, label %18, label %33
18: ; preds = %15, %29
%19 = phi i32 [ %20, %29 ], [ %16, %15 ]
%20 = add nsw i32 %19, -1
%21 = tail call ptr @GetMemberByIndex(ptr noundef nonnull %0, i32 noundef %20) #2
%22 = tail call i32 @ASSERT_COND(ptr noundef %21) #2
%23 = getelementptr inbounds i8, ptr %21, i64 32
%24 = load ptr, ptr %23, align 8, !tbaa !15
%25 = icmp eq ptr %24, null
br i1 %25, label %29, label %26
26: ; preds = %18
%27 = load i32, ptr @FALSE, align 4, !tbaa !16
%28 = tail call i32 @FmPcdManipUpdateOwner(ptr noundef nonnull %24, i32 noundef %27) #2
store ptr null, ptr %23, align 8, !tbaa !15
br label %29
29: ; preds = %26, %18
%30 = tail call i32 @RemoveMemberFromList(ptr noundef nonnull %0, ptr noundef nonnull %21) #2
%31 = tail call i32 @FreeMember(ptr noundef nonnull %0, ptr noundef nonnull %21) #2
%32 = icmp ugt i32 %19, 1
br i1 %32, label %18, label %33, !llvm.loop !17
33: ; preds = %29, %15
%34 = getelementptr inbounds i8, ptr %0, i64 4
%35 = load i32, ptr %34, align 4, !tbaa !19
%36 = icmp sgt i32 %35, 0
br i1 %36, label %37, label %51
37: ; preds = %33, %46
%38 = phi i32 [ %48, %46 ], [ 0, %33 ]
%39 = tail call ptr @GetAvailableMember(ptr noundef nonnull %0) #2
%40 = tail call i32 @ASSERT_COND(ptr noundef %39) #2
%41 = getelementptr inbounds i8, ptr %39, i64 24
%42 = load ptr, ptr %41, align 8, !tbaa !20
%43 = icmp eq ptr %42, null
br i1 %43, label %46, label %44
44: ; preds = %37
%45 = tail call i32 @FM_MURAM_FreeMem(ptr noundef %8, ptr noundef nonnull %42) #2
store ptr null, ptr %41, align 8, !tbaa !20
br label %46
46: ; preds = %44, %37
%47 = tail call i32 @XX_Free(ptr noundef nonnull %39) #2
%48 = add nuw nsw i32 %38, 1
%49 = load i32, ptr %34, align 4, !tbaa !19
%50 = icmp slt i32 %48, %49
br i1 %50, label %37, label %51, !llvm.loop !21
51: ; preds = %46, %33
%52 = getelementptr inbounds i8, ptr %0, i64 8
%53 = load i64, ptr %52, align 8, !tbaa !22
%54 = icmp eq i64 %53, 0
br i1 %54, label %58, label %55
55: ; preds = %51
%56 = load ptr, ptr %4, align 8, !tbaa !6
%57 = tail call i32 @FmPcdReleaseLock(ptr noundef %56, i64 noundef %53) #2
br label %58
58: ; preds = %55, %51
%59 = tail call i32 @XX_Free(ptr noundef nonnull %0) #2
br label %60
60: ; preds = %58, %1
ret void
}
declare i32 @ASSERT_COND(ptr noundef) local_unnamed_addr #1
declare ptr @FmPcdGetMuramHandle(ptr noundef) local_unnamed_addr #1
declare i32 @FM_MURAM_FreeMem(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @GetMemberByIndex(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @FmPcdManipUpdateOwner(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @RemoveMemberFromList(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @FreeMember(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @GetAvailableMember(ptr noundef) local_unnamed_addr #1
declare i32 @XX_Free(ptr noundef) local_unnamed_addr #1
declare i32 @FmPcdReleaseLock(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 16}
!7 = !{!"TYPE_19__", !8, i64 0, !8, i64 4, !11, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !12, i64 40}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!7, !12, i64 40}
!14 = !{!7, !8, i64 0}
!15 = !{!7, !12, i64 32}
!16 = !{!8, !8, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!7, !8, i64 4}
!20 = !{!7, !12, i64 24}
!21 = distinct !{!21, !18}
!22 = !{!7, !11, i64 8}
| freebsd_sys_contrib_ncsw_Peripherals_FM_Pcd_extr_fm_replic.c_DeleteGroup |
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/common/extr_dpp.c_dpp_akm_dpp.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/common/extr_dpp.c_dpp_akm_dpp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DPP_AKM_DPP = dso_local local_unnamed_addr global i32 0, align 4
@DPP_AKM_SAE_DPP = dso_local local_unnamed_addr global i32 0, align 4
@DPP_AKM_PSK_SAE_DPP = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable
define dso_local i32 @dpp_akm_dpp(i32 noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @DPP_AKM_DPP, align 4, !tbaa !5
%3 = icmp eq i32 %2, %0
%4 = load i32, ptr @DPP_AKM_SAE_DPP, align 4
%5 = icmp eq i32 %4, %0
%6 = select i1 %3, i1 true, i1 %5
%7 = load i32, ptr @DPP_AKM_PSK_SAE_DPP, align 4
%8 = icmp eq i32 %7, %0
%9 = select i1 %6, i1 true, i1 %8
%10 = zext i1 %9 to i32
ret i32 %10
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/common/extr_dpp.c_dpp_akm_dpp.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/common/extr_dpp.c_dpp_akm_dpp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DPP_AKM_DPP = common local_unnamed_addr global i32 0, align 4
@DPP_AKM_SAE_DPP = common local_unnamed_addr global i32 0, align 4
@DPP_AKM_PSK_SAE_DPP = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync)
define range(i32 0, 2) i32 @dpp_akm_dpp(i32 noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @DPP_AKM_DPP, align 4, !tbaa !6
%3 = icmp eq i32 %2, %0
%4 = load i32, ptr @DPP_AKM_SAE_DPP, align 4
%5 = icmp eq i32 %4, %0
%6 = select i1 %3, i1 true, i1 %5
%7 = load i32, ptr @DPP_AKM_PSK_SAE_DPP, align 4
%8 = icmp eq i32 %7, %0
%9 = select i1 %6, i1 true, i1 %8
%10 = zext i1 %9 to i32
ret i32 %10
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: none, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_wpa_src_common_extr_dpp.c_dpp_akm_dpp |
; ModuleID = 'AnghaBench/fastsocket/kernel/net/openvswitch/extr_flow.h_ovs_flow_tun_key_init.c'
source_filename = "AnghaBench/fastsocket/kernel/net/openvswitch/extr_flow.h_ovs_flow_tun_key_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ovs_key_ipv4_tunnel = type { i32, i32, i32, i32, i32, i32 }
@OVS_TUNNEL_KEY_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ovs_flow_tun_key_init], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @ovs_flow_tun_key_init(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = getelementptr inbounds %struct.ovs_key_ipv4_tunnel, ptr %0, i64 0, i32 5
store i32 %2, ptr %5, align 4, !tbaa !5
%6 = getelementptr inbounds %struct.ovs_key_ipv4_tunnel, ptr %0, i64 0, i32 1
%7 = load <4 x i32>, ptr %1, align 4, !tbaa !10
store <4 x i32> %7, ptr %6, align 4, !tbaa !10
store i32 %3, ptr %0, align 4, !tbaa !11
%8 = load i32, ptr @OVS_TUNNEL_KEY_SIZE, align 4, !tbaa !10
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, ptr %0, i64 %9
%11 = sub i32 24, %8
%12 = tail call i32 @memset(ptr noundef nonnull %10, i32 noundef 0, i32 noundef %11) #2
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 20}
!6 = !{!"ovs_key_ipv4_tunnel", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/net/openvswitch/extr_flow.h_ovs_flow_tun_key_init.c'
source_filename = "AnghaBench/fastsocket/kernel/net/openvswitch/extr_flow.h_ovs_flow_tun_key_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@OVS_TUNNEL_KEY_SIZE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ovs_flow_tun_key_init], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @ovs_flow_tun_key_init(ptr noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = getelementptr inbounds i8, ptr %0, i64 20
store i32 %2, ptr %5, align 4, !tbaa !6
%6 = getelementptr inbounds i8, ptr %0, i64 4
%7 = load <4 x i32>, ptr %1, align 4, !tbaa !11
store <4 x i32> %7, ptr %6, align 4, !tbaa !11
store i32 %3, ptr %0, align 4, !tbaa !12
%8 = load i32, ptr @OVS_TUNNEL_KEY_SIZE, align 4, !tbaa !11
%9 = sext i32 %8 to i64
%10 = getelementptr inbounds i8, ptr %0, i64 %9
%11 = sub i32 24, %8
%12 = tail call i32 @memset(ptr noundef nonnull %10, i32 noundef 0, i32 noundef %11) #2
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 20}
!7 = !{!"ovs_key_ipv4_tunnel", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!7, !8, i64 0}
| fastsocket_kernel_net_openvswitch_extr_flow.h_ovs_flow_tun_key_init |
; ModuleID = 'AnghaBench/linux/fs/hfsplus/extr_dir.c_hfsplus_create.c'
source_filename = "AnghaBench/linux/fs/hfsplus/extr_dir.c_hfsplus_create.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @hfsplus_create], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @hfsplus_create(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 %3) #0 {
%5 = tail call i32 @hfsplus_mknod(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef 0) #2
ret i32 %5
}
declare i32 @hfsplus_mknod(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/fs/hfsplus/extr_dir.c_hfsplus_create.c'
source_filename = "AnghaBench/linux/fs/hfsplus/extr_dir.c_hfsplus_create.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @hfsplus_create], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @hfsplus_create(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 %3) #0 {
%5 = tail call i32 @hfsplus_mknod(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef 0) #2
ret i32 %5
}
declare i32 @hfsplus_mknod(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_fs_hfsplus_extr_dir.c_hfsplus_create |
; ModuleID = 'AnghaBench/linux/net/openvswitch/extr_actions.c_set_ipv6.c'
source_filename = "AnghaBench/linux/net/openvswitch/extr_actions.c_set_ipv6.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ovs_key_ipv6 = type { i32, i32, i64, i32, i32 }
%struct.ipv6hdr = type { i32, i32, i32, i32 }
%struct.TYPE_6__ = type { i32, i32, i32 }
%struct.sw_flow_key = type { %struct.TYPE_6__, %struct.TYPE_5__ }
%struct.TYPE_5__ = type { i32, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32, i32 }
@IP6_FH_F_SKIP_RH = dso_local local_unnamed_addr global i32 0, align 4
@NEXTHDR_ROUTING = dso_local local_unnamed_addr global i64 0, align 8
@IPV6_FLOWINFO_FLOWLABEL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @set_ipv6], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @set_ipv6(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3) #0 {
%5 = alloca [4 x i32], align 16
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca [4 x i32], align 16
%9 = tail call i64 @skb_network_offset(ptr noundef %0) #4
%10 = add i64 %9, 16
%11 = tail call i32 @skb_ensure_writable(ptr noundef %0, i64 noundef %10) #4
%12 = tail call i64 @unlikely(i32 noundef %11) #4
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %105
14: ; preds = %4
%15 = tail call ptr @ipv6_hdr(ptr noundef %0) #4
%16 = getelementptr inbounds %struct.ovs_key_ipv6, ptr %3, i64 0, i32 4
%17 = load i32, ptr %16, align 4, !tbaa !5
%18 = tail call i64 @is_ipv6_mask_nonzero(i32 noundef %17) #4
%19 = icmp eq i64 %18, 0
br i1 %19, label %36, label %20
20: ; preds = %14
%21 = getelementptr inbounds %struct.ipv6hdr, ptr %15, i64 0, i32 3
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %5) #4
%22 = getelementptr inbounds %struct.ovs_key_ipv6, ptr %2, i64 0, i32 4
%23 = load i32, ptr %22, align 4, !tbaa !5
%24 = load i32, ptr %16, align 4, !tbaa !5
%25 = call i32 @mask_ipv6_addr(ptr noundef nonnull %21, i32 noundef %23, i32 noundef %24, ptr noundef nonnull %5) #4
%26 = call i32 @memcmp(ptr noundef nonnull %21, ptr noundef nonnull %5, i32 noundef 16) #4
%27 = call i64 @unlikely(i32 noundef %26) #4
%28 = icmp eq i64 %27, 0
br i1 %28, label %35, label %29
29: ; preds = %20
%30 = getelementptr inbounds %struct.TYPE_6__, ptr %1, i64 0, i32 2
%31 = load i32, ptr %30, align 4, !tbaa !11
%32 = call i32 @set_ipv6_addr(ptr noundef %0, i32 noundef %31, ptr noundef nonnull %21, ptr noundef nonnull %5, i32 noundef 1) #4
%33 = getelementptr inbounds %struct.sw_flow_key, ptr %1, i64 0, i32 1, i32 1, i32 1
%34 = call i32 @memcpy(ptr noundef nonnull %33, ptr noundef nonnull %5, i32 noundef 4) #4
br label %35
35: ; preds = %29, %20
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #4
br label %36
36: ; preds = %35, %14
%37 = getelementptr inbounds %struct.ovs_key_ipv6, ptr %3, i64 0, i32 3
%38 = load i32, ptr %37, align 8, !tbaa !16
%39 = call i64 @is_ipv6_mask_nonzero(i32 noundef %38) #4
%40 = icmp eq i64 %39, 0
br i1 %40, label %70, label %41
41: ; preds = %36
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #4
store i32 0, ptr %6, align 4, !tbaa !17
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #4
%42 = load i32, ptr @IP6_FH_F_SKIP_RH, align 4, !tbaa !17
store i32 %42, ptr %7, align 4, !tbaa !17
%43 = getelementptr inbounds %struct.ipv6hdr, ptr %15, i64 0, i32 2
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %8) #4
%44 = getelementptr inbounds %struct.ovs_key_ipv6, ptr %2, i64 0, i32 3
%45 = load i32, ptr %44, align 8, !tbaa !16
%46 = load i32, ptr %37, align 8, !tbaa !16
%47 = call i32 @mask_ipv6_addr(ptr noundef nonnull %43, i32 noundef %45, i32 noundef %46, ptr noundef nonnull %8) #4
%48 = call i32 @memcmp(ptr noundef nonnull %43, ptr noundef nonnull %8, i32 noundef 16) #4
%49 = call i64 @unlikely(i32 noundef %48) #4
%50 = icmp eq i64 %49, 0
br i1 %50, label %69, label %51
51: ; preds = %41
%52 = getelementptr inbounds %struct.ipv6hdr, ptr %15, i64 0, i32 1
%53 = load i32, ptr %52, align 4, !tbaa !18
%54 = call i64 @ipv6_ext_hdr(i32 noundef %53) #4
%55 = icmp eq i64 %54, 0
br i1 %55, label %62, label %56
56: ; preds = %51
%57 = load i64, ptr @NEXTHDR_ROUTING, align 8, !tbaa !20
%58 = call i64 @ipv6_find_hdr(ptr noundef %0, ptr noundef nonnull %6, i64 noundef %57, ptr noundef null, ptr noundef nonnull %7) #4
%59 = load i64, ptr @NEXTHDR_ROUTING, align 8, !tbaa !20
%60 = icmp ne i64 %58, %59
%61 = zext i1 %60 to i32
br label %62
62: ; preds = %56, %51
%63 = phi i32 [ %61, %56 ], [ 1, %51 ]
%64 = getelementptr inbounds %struct.TYPE_6__, ptr %1, i64 0, i32 2
%65 = load i32, ptr %64, align 4, !tbaa !11
%66 = call i32 @set_ipv6_addr(ptr noundef %0, i32 noundef %65, ptr noundef nonnull %43, ptr noundef nonnull %8, i32 noundef %63) #4
%67 = getelementptr inbounds %struct.sw_flow_key, ptr %1, i64 0, i32 1, i32 1
%68 = call i32 @memcpy(ptr noundef nonnull %67, ptr noundef nonnull %8, i32 noundef 4) #4
br label %69
69: ; preds = %62, %41
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %8) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #4
br label %70
70: ; preds = %69, %36
%71 = load i32, ptr %3, align 8, !tbaa !21
%72 = icmp eq i32 %71, 0
br i1 %72, label %79, label %73
73: ; preds = %70
%74 = xor i32 %71, -1
%75 = load i32, ptr %2, align 8, !tbaa !21
%76 = call i32 @ipv6_change_dsfield(ptr noundef %15, i32 noundef %74, i32 noundef %75) #4
%77 = call i32 @ipv6_get_dsfield(ptr noundef %15) #4
%78 = getelementptr inbounds %struct.TYPE_6__, ptr %1, i64 0, i32 1
store i32 %77, ptr %78, align 4, !tbaa !22
br label %79
79: ; preds = %73, %70
%80 = getelementptr inbounds %struct.ovs_key_ipv6, ptr %3, i64 0, i32 2
%81 = load i64, ptr %80, align 8, !tbaa !23
%82 = icmp eq i64 %81, 0
br i1 %82, label %95, label %83
83: ; preds = %79
%84 = getelementptr inbounds %struct.ovs_key_ipv6, ptr %2, i64 0, i32 2
%85 = load i64, ptr %84, align 8, !tbaa !23
%86 = call i32 @ntohl(i64 noundef %85) #4
%87 = load i64, ptr %80, align 8, !tbaa !23
%88 = call i32 @ntohl(i64 noundef %87) #4
%89 = call i32 @set_ipv6_fl(ptr noundef %15, i32 noundef %86, i32 noundef %88) #4
%90 = load i32, ptr %15, align 4, !tbaa !17
%91 = load i32, ptr @IPV6_FLOWINFO_FLOWLABEL, align 4, !tbaa !17
%92 = call i32 @htonl(i32 noundef %91)
%93 = and i32 %92, %90
%94 = getelementptr inbounds %struct.sw_flow_key, ptr %1, i64 0, i32 1
store i32 %93, ptr %94, align 4, !tbaa !24
br label %95
95: ; preds = %83, %79
%96 = getelementptr inbounds %struct.ovs_key_ipv6, ptr %3, i64 0, i32 1
%97 = load i32, ptr %96, align 4, !tbaa !25
%98 = icmp eq i32 %97, 0
br i1 %98, label %105, label %99
99: ; preds = %95
%100 = load i32, ptr %15, align 4, !tbaa !26
%101 = getelementptr inbounds %struct.ovs_key_ipv6, ptr %2, i64 0, i32 1
%102 = load i32, ptr %101, align 4, !tbaa !25
%103 = call i32 @OVS_SET_MASKED(i32 noundef %100, i32 noundef %102, i32 noundef %97) #4
%104 = load i32, ptr %15, align 4, !tbaa !26
store i32 %104, ptr %1, align 4, !tbaa !27
br label %105
105: ; preds = %95, %99, %4
%106 = phi i32 [ %11, %4 ], [ 0, %99 ], [ 0, %95 ]
ret i32 %106
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @skb_ensure_writable(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @skb_network_offset(ptr noundef) local_unnamed_addr #2
declare i64 @unlikely(i32 noundef) local_unnamed_addr #2
declare ptr @ipv6_hdr(ptr noundef) local_unnamed_addr #2
declare i64 @is_ipv6_mask_nonzero(i32 noundef) local_unnamed_addr #2
declare i32 @mask_ipv6_addr(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @memcmp(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @set_ipv6_addr(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i64 @ipv6_ext_hdr(i32 noundef) local_unnamed_addr #2
declare i64 @ipv6_find_hdr(ptr noundef, ptr noundef, i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ipv6_change_dsfield(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ipv6_get_dsfield(ptr noundef) local_unnamed_addr #2
declare i32 @set_ipv6_fl(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ntohl(i64 noundef) local_unnamed_addr #2
; Function Attrs: nofree nosync nounwind memory(none)
declare i32 @htonl(i32 noundef) local_unnamed_addr #3
declare i32 @OVS_SET_MASKED(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nosync nounwind memory(none) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 20}
!6 = !{!"ovs_key_ipv6", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16, !7, i64 20}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!12, !7, i64 8}
!12 = !{!"sw_flow_key", !13, i64 0, !14, i64 12}
!13 = !{!"TYPE_6__", !7, i64 0, !7, i64 4, !7, i64 8}
!14 = !{!"TYPE_5__", !7, i64 0, !15, i64 4}
!15 = !{!"TYPE_4__", !7, i64 0, !7, i64 4}
!16 = !{!6, !7, i64 16}
!17 = !{!7, !7, i64 0}
!18 = !{!19, !7, i64 4}
!19 = !{!"ipv6hdr", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!20 = !{!10, !10, i64 0}
!21 = !{!6, !7, i64 0}
!22 = !{!12, !7, i64 4}
!23 = !{!6, !10, i64 8}
!24 = !{!12, !7, i64 12}
!25 = !{!6, !7, i64 4}
!26 = !{!19, !7, i64 0}
!27 = !{!12, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/net/openvswitch/extr_actions.c_set_ipv6.c'
source_filename = "AnghaBench/linux/net/openvswitch/extr_actions.c_set_ipv6.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IP6_FH_F_SKIP_RH = common local_unnamed_addr global i32 0, align 4
@NEXTHDR_ROUTING = common local_unnamed_addr global i64 0, align 8
@IPV6_FLOWINFO_FLOWLABEL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @set_ipv6], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @set_ipv6(ptr noundef %0, ptr noundef %1, ptr nocapture noundef readonly %2, ptr nocapture noundef readonly %3) #0 {
%5 = alloca [4 x i32], align 4
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca [4 x i32], align 4
%9 = tail call i64 @skb_network_offset(ptr noundef %0) #4
%10 = add i64 %9, 16
%11 = tail call i32 @skb_ensure_writable(ptr noundef %0, i64 noundef %10) #4
%12 = tail call i64 @unlikely(i32 noundef %11) #4
%13 = icmp eq i64 %12, 0
br i1 %13, label %14, label %105
14: ; preds = %4
%15 = tail call ptr @ipv6_hdr(ptr noundef %0) #4
%16 = getelementptr inbounds i8, ptr %3, i64 20
%17 = load i32, ptr %16, align 4, !tbaa !6
%18 = tail call i64 @is_ipv6_mask_nonzero(i32 noundef %17) #4
%19 = icmp eq i64 %18, 0
br i1 %19, label %36, label %20
20: ; preds = %14
%21 = getelementptr inbounds i8, ptr %15, i64 12
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %5) #4
%22 = getelementptr inbounds i8, ptr %2, i64 20
%23 = load i32, ptr %22, align 4, !tbaa !6
%24 = load i32, ptr %16, align 4, !tbaa !6
%25 = call i32 @mask_ipv6_addr(ptr noundef nonnull %21, i32 noundef %23, i32 noundef %24, ptr noundef nonnull %5) #4
%26 = call i32 @memcmp(ptr noundef nonnull %21, ptr noundef nonnull %5, i32 noundef 16) #4
%27 = call i64 @unlikely(i32 noundef %26) #4
%28 = icmp eq i64 %27, 0
br i1 %28, label %35, label %29
29: ; preds = %20
%30 = getelementptr inbounds i8, ptr %1, i64 8
%31 = load i32, ptr %30, align 4, !tbaa !12
%32 = call i32 @set_ipv6_addr(ptr noundef %0, i32 noundef %31, ptr noundef nonnull %21, ptr noundef nonnull %5, i32 noundef 1) #4
%33 = getelementptr inbounds i8, ptr %1, i64 20
%34 = call i32 @memcpy(ptr noundef nonnull %33, ptr noundef nonnull %5, i32 noundef 4) #4
br label %35
35: ; preds = %29, %20
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %5) #4
br label %36
36: ; preds = %35, %14
%37 = getelementptr inbounds i8, ptr %3, i64 16
%38 = load i32, ptr %37, align 8, !tbaa !17
%39 = call i64 @is_ipv6_mask_nonzero(i32 noundef %38) #4
%40 = icmp eq i64 %39, 0
br i1 %40, label %70, label %41
41: ; preds = %36
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #4
store i32 0, ptr %6, align 4, !tbaa !18
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #4
%42 = load i32, ptr @IP6_FH_F_SKIP_RH, align 4, !tbaa !18
store i32 %42, ptr %7, align 4, !tbaa !18
%43 = getelementptr inbounds i8, ptr %15, i64 8
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %8) #4
%44 = getelementptr inbounds i8, ptr %2, i64 16
%45 = load i32, ptr %44, align 8, !tbaa !17
%46 = load i32, ptr %37, align 8, !tbaa !17
%47 = call i32 @mask_ipv6_addr(ptr noundef nonnull %43, i32 noundef %45, i32 noundef %46, ptr noundef nonnull %8) #4
%48 = call i32 @memcmp(ptr noundef nonnull %43, ptr noundef nonnull %8, i32 noundef 16) #4
%49 = call i64 @unlikely(i32 noundef %48) #4
%50 = icmp eq i64 %49, 0
br i1 %50, label %69, label %51
51: ; preds = %41
%52 = getelementptr inbounds i8, ptr %15, i64 4
%53 = load i32, ptr %52, align 4, !tbaa !19
%54 = call i64 @ipv6_ext_hdr(i32 noundef %53) #4
%55 = icmp eq i64 %54, 0
br i1 %55, label %62, label %56
56: ; preds = %51
%57 = load i64, ptr @NEXTHDR_ROUTING, align 8, !tbaa !21
%58 = call i64 @ipv6_find_hdr(ptr noundef %0, ptr noundef nonnull %6, i64 noundef %57, ptr noundef null, ptr noundef nonnull %7) #4
%59 = load i64, ptr @NEXTHDR_ROUTING, align 8, !tbaa !21
%60 = icmp ne i64 %58, %59
%61 = zext i1 %60 to i32
br label %62
62: ; preds = %56, %51
%63 = phi i32 [ %61, %56 ], [ 1, %51 ]
%64 = getelementptr inbounds i8, ptr %1, i64 8
%65 = load i32, ptr %64, align 4, !tbaa !12
%66 = call i32 @set_ipv6_addr(ptr noundef %0, i32 noundef %65, ptr noundef nonnull %43, ptr noundef nonnull %8, i32 noundef %63) #4
%67 = getelementptr inbounds i8, ptr %1, i64 16
%68 = call i32 @memcpy(ptr noundef nonnull %67, ptr noundef nonnull %8, i32 noundef 4) #4
br label %69
69: ; preds = %62, %41
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %8) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #4
br label %70
70: ; preds = %69, %36
%71 = load i32, ptr %3, align 8, !tbaa !22
%72 = icmp eq i32 %71, 0
br i1 %72, label %79, label %73
73: ; preds = %70
%74 = xor i32 %71, -1
%75 = load i32, ptr %2, align 8, !tbaa !22
%76 = call i32 @ipv6_change_dsfield(ptr noundef %15, i32 noundef %74, i32 noundef %75) #4
%77 = call i32 @ipv6_get_dsfield(ptr noundef %15) #4
%78 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %77, ptr %78, align 4, !tbaa !23
br label %79
79: ; preds = %73, %70
%80 = getelementptr inbounds i8, ptr %3, i64 8
%81 = load i64, ptr %80, align 8, !tbaa !24
%82 = icmp eq i64 %81, 0
br i1 %82, label %95, label %83
83: ; preds = %79
%84 = getelementptr inbounds i8, ptr %2, i64 8
%85 = load i64, ptr %84, align 8, !tbaa !24
%86 = call i32 @ntohl(i64 noundef %85) #4
%87 = load i64, ptr %80, align 8, !tbaa !24
%88 = call i32 @ntohl(i64 noundef %87) #4
%89 = call i32 @set_ipv6_fl(ptr noundef %15, i32 noundef %86, i32 noundef %88) #4
%90 = load i32, ptr %15, align 4, !tbaa !18
%91 = load i32, ptr @IPV6_FLOWINFO_FLOWLABEL, align 4, !tbaa !18
%92 = call i32 @htonl(i32 noundef %91)
%93 = and i32 %92, %90
%94 = getelementptr inbounds i8, ptr %1, i64 12
store i32 %93, ptr %94, align 4, !tbaa !25
br label %95
95: ; preds = %83, %79
%96 = getelementptr inbounds i8, ptr %3, i64 4
%97 = load i32, ptr %96, align 4, !tbaa !26
%98 = icmp eq i32 %97, 0
br i1 %98, label %105, label %99
99: ; preds = %95
%100 = load i32, ptr %15, align 4, !tbaa !27
%101 = getelementptr inbounds i8, ptr %2, i64 4
%102 = load i32, ptr %101, align 4, !tbaa !26
%103 = call i32 @OVS_SET_MASKED(i32 noundef %100, i32 noundef %102, i32 noundef %97) #4
%104 = load i32, ptr %15, align 4, !tbaa !27
store i32 %104, ptr %1, align 4, !tbaa !28
br label %105
105: ; preds = %95, %99, %4
%106 = phi i32 [ %11, %4 ], [ 0, %99 ], [ 0, %95 ]
ret i32 %106
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @skb_ensure_writable(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i64 @skb_network_offset(ptr noundef) local_unnamed_addr #2
declare i64 @unlikely(i32 noundef) local_unnamed_addr #2
declare ptr @ipv6_hdr(ptr noundef) local_unnamed_addr #2
declare i64 @is_ipv6_mask_nonzero(i32 noundef) local_unnamed_addr #2
declare i32 @mask_ipv6_addr(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @memcmp(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @set_ipv6_addr(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i64 @ipv6_ext_hdr(i32 noundef) local_unnamed_addr #2
declare i64 @ipv6_find_hdr(ptr noundef, ptr noundef, i64 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @ipv6_change_dsfield(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ipv6_get_dsfield(ptr noundef) local_unnamed_addr #2
declare i32 @set_ipv6_fl(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ntohl(i64 noundef) local_unnamed_addr #2
; Function Attrs: nofree nosync nounwind memory(none)
declare i32 @htonl(i32 noundef) local_unnamed_addr #3
declare i32 @OVS_SET_MASKED(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nofree nosync nounwind memory(none) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 20}
!7 = !{!"ovs_key_ipv6", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16, !8, i64 20}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!13, !8, i64 8}
!13 = !{!"sw_flow_key", !14, i64 0, !15, i64 12}
!14 = !{!"TYPE_6__", !8, i64 0, !8, i64 4, !8, i64 8}
!15 = !{!"TYPE_5__", !8, i64 0, !16, i64 4}
!16 = !{!"TYPE_4__", !8, i64 0, !8, i64 4}
!17 = !{!7, !8, i64 16}
!18 = !{!8, !8, i64 0}
!19 = !{!20, !8, i64 4}
!20 = !{!"ipv6hdr", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12}
!21 = !{!11, !11, i64 0}
!22 = !{!7, !8, i64 0}
!23 = !{!13, !8, i64 4}
!24 = !{!7, !11, i64 8}
!25 = !{!13, !8, i64 12}
!26 = !{!7, !8, i64 4}
!27 = !{!20, !8, i64 0}
!28 = !{!13, !8, i64 0}
| linux_net_openvswitch_extr_actions.c_set_ipv6 |
; ModuleID = 'AnghaBench/linux/arch/mips/mm/extr_c-r4k.c___r4k_flush_icache_range.c'
source_filename = "AnghaBench/linux/arch/mips/mm/extr_c-r4k.c___r4k_flush_icache_range.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.flush_icache_range_args = type { i64, i64, i32, i32 }
@R4K_HIT = dso_local local_unnamed_addr global i32 0, align 4
@R4K_INDEX = dso_local local_unnamed_addr global i32 0, align 4
@icache_size = dso_local local_unnamed_addr global i64 0, align 8
@cpu_has_ic_fills_f_dc = dso_local local_unnamed_addr global i32 0, align 4
@dcache_size = dso_local local_unnamed_addr global i64 0, align 8
@local_r4k_flush_icache_range_ipi = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @__r4k_flush_icache_range], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @__r4k_flush_icache_range(i64 noundef %0, i64 noundef %1, i32 noundef %2) #0 {
%4 = alloca %struct.flush_icache_range_args, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #3
store i64 %0, ptr %4, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.flush_icache_range_args, ptr %4, i64 0, i32 1
store i64 %1, ptr %5, align 8, !tbaa !11
%6 = load i32, ptr @R4K_HIT, align 4, !tbaa !12
%7 = load i32, ptr @R4K_INDEX, align 4, !tbaa !12
%8 = or i32 %7, %6
%9 = getelementptr inbounds %struct.flush_icache_range_args, ptr %4, i64 0, i32 2
store i32 %8, ptr %9, align 8, !tbaa !13
%10 = getelementptr inbounds %struct.flush_icache_range_args, ptr %4, i64 0, i32 3
store i32 %2, ptr %10, align 4, !tbaa !14
%11 = tail call i32 (...) @preempt_disable() #3
%12 = load i32, ptr @R4K_INDEX, align 4, !tbaa !12
%13 = tail call i64 @r4k_op_needs_ipi(i32 noundef %12) #3
%14 = icmp eq i64 %13, 0
br i1 %14, label %34, label %15
15: ; preds = %3
%16 = load i32, ptr @R4K_HIT, align 4, !tbaa !12
%17 = tail call i64 @r4k_op_needs_ipi(i32 noundef %16) #3
%18 = icmp eq i64 %17, 0
br i1 %18, label %19, label %34
19: ; preds = %15
%20 = sub i64 %1, %0
%21 = load i64, ptr @icache_size, align 8, !tbaa !15
%22 = load i32, ptr @cpu_has_ic_fills_f_dc, align 4, !tbaa !12
%23 = icmp eq i32 %22, 0
%24 = load i64, ptr @dcache_size, align 8
%25 = zext i1 %23 to i64
%26 = shl i64 %20, %25
%27 = select i1 %23, i64 %24, i64 0
%28 = add i64 %27, %21
%29 = icmp ugt i64 %26, %28
br i1 %29, label %34, label %30
30: ; preds = %19
%31 = load i32, ptr @R4K_INDEX, align 4, !tbaa !12
%32 = xor i32 %31, -1
%33 = and i32 %8, %32
store i32 %33, ptr %9, align 8, !tbaa !13
br label %34
34: ; preds = %19, %30, %15, %3
%35 = phi i32 [ %8, %19 ], [ %33, %30 ], [ %8, %15 ], [ %8, %3 ]
%36 = load i32, ptr @local_r4k_flush_icache_range_ipi, align 4, !tbaa !12
%37 = call i32 @r4k_on_each_cpu(i32 noundef %35, i32 noundef %36, ptr noundef nonnull %4) #3
%38 = call i32 (...) @preempt_enable() #3
%39 = call i32 (...) @instruction_hazard() #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @preempt_disable(...) local_unnamed_addr #2
declare i64 @r4k_op_needs_ipi(i32 noundef) local_unnamed_addr #2
declare i32 @r4k_on_each_cpu(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @preempt_enable(...) local_unnamed_addr #2
declare i32 @instruction_hazard(...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"flush_icache_range_args", !7, i64 0, !7, i64 8, !10, i64 16, !10, i64 20}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !7, i64 8}
!12 = !{!10, !10, i64 0}
!13 = !{!6, !10, i64 16}
!14 = !{!6, !10, i64 20}
!15 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/arch/mips/mm/extr_c-r4k.c___r4k_flush_icache_range.c'
source_filename = "AnghaBench/linux/arch/mips/mm/extr_c-r4k.c___r4k_flush_icache_range.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.flush_icache_range_args = type { i64, i64, i32, i32 }
@R4K_HIT = common local_unnamed_addr global i32 0, align 4
@R4K_INDEX = common local_unnamed_addr global i32 0, align 4
@icache_size = common local_unnamed_addr global i64 0, align 8
@cpu_has_ic_fills_f_dc = common local_unnamed_addr global i32 0, align 4
@dcache_size = common local_unnamed_addr global i64 0, align 8
@local_r4k_flush_icache_range_ipi = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @__r4k_flush_icache_range], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @__r4k_flush_icache_range(i64 noundef %0, i64 noundef %1, i32 noundef %2) #0 {
%4 = alloca %struct.flush_icache_range_args, align 8
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #3
store i64 %0, ptr %4, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %4, i64 8
store i64 %1, ptr %5, align 8, !tbaa !12
%6 = load i32, ptr @R4K_HIT, align 4, !tbaa !13
%7 = load i32, ptr @R4K_INDEX, align 4, !tbaa !13
%8 = or i32 %7, %6
%9 = getelementptr inbounds i8, ptr %4, i64 16
store i32 %8, ptr %9, align 8, !tbaa !14
%10 = getelementptr inbounds i8, ptr %4, i64 20
store i32 %2, ptr %10, align 4, !tbaa !15
%11 = tail call i32 @preempt_disable() #3
%12 = load i32, ptr @R4K_INDEX, align 4, !tbaa !13
%13 = tail call i64 @r4k_op_needs_ipi(i32 noundef %12) #3
%14 = icmp eq i64 %13, 0
br i1 %14, label %34, label %15
15: ; preds = %3
%16 = load i32, ptr @R4K_HIT, align 4, !tbaa !13
%17 = tail call i64 @r4k_op_needs_ipi(i32 noundef %16) #3
%18 = icmp eq i64 %17, 0
br i1 %18, label %19, label %34
19: ; preds = %15
%20 = sub i64 %1, %0
%21 = load i64, ptr @icache_size, align 8, !tbaa !16
%22 = load i32, ptr @cpu_has_ic_fills_f_dc, align 4, !tbaa !13
%23 = icmp eq i32 %22, 0
%24 = load i64, ptr @dcache_size, align 8
%25 = zext i1 %23 to i64
%26 = shl i64 %20, %25
%27 = select i1 %23, i64 %24, i64 0
%28 = add i64 %27, %21
%29 = icmp ugt i64 %26, %28
br i1 %29, label %34, label %30
30: ; preds = %19
%31 = load i32, ptr @R4K_INDEX, align 4, !tbaa !13
%32 = xor i32 %31, -1
%33 = and i32 %8, %32
store i32 %33, ptr %9, align 8, !tbaa !14
br label %34
34: ; preds = %19, %30, %15, %3
%35 = phi i32 [ %8, %19 ], [ %33, %30 ], [ %8, %15 ], [ %8, %3 ]
%36 = load i32, ptr @local_r4k_flush_icache_range_ipi, align 4, !tbaa !13
%37 = call i32 @r4k_on_each_cpu(i32 noundef %35, i32 noundef %36, ptr noundef nonnull %4) #3
%38 = call i32 @preempt_enable() #3
%39 = call i32 @instruction_hazard() #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @preempt_disable(...) local_unnamed_addr #2
declare i64 @r4k_op_needs_ipi(i32 noundef) local_unnamed_addr #2
declare i32 @r4k_on_each_cpu(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @preempt_enable(...) local_unnamed_addr #2
declare i32 @instruction_hazard(...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"flush_icache_range_args", !8, i64 0, !8, i64 8, !11, i64 16, !11, i64 20}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !8, i64 8}
!13 = !{!11, !11, i64 0}
!14 = !{!7, !11, i64 16}
!15 = !{!7, !11, i64 20}
!16 = !{!8, !8, i64 0}
| linux_arch_mips_mm_extr_c-r4k.c___r4k_flush_icache_range |
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/ice1712/extr_ice1724.c_snd_vt1724_set_pro_rate.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/ice1712/extr_ice1724.c_snd_vt1724_set_pro_rate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.snd_ice1712 = type { i32, ptr, ptr, i32, %struct.TYPE_11__, ptr, %struct.TYPE_8__, i32, ptr, ptr }
%struct.TYPE_11__ = type { %struct.TYPE_10__ }
%struct.TYPE_10__ = type { ptr }
%struct.TYPE_8__ = type { ptr, ptr }
%struct.TYPE_7__ = type { ptr, i32 }
%struct.TYPE_12__ = type { %struct.TYPE_9__ }
%struct.TYPE_9__ = type { ptr }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@DMA_CONTROL = dso_local local_unnamed_addr global i32 0, align 4
@DMA_STARTS = dso_local local_unnamed_addr global i32 0, align 4
@DMA_PAUSE = dso_local local_unnamed_addr global i32 0, align 4
@DMA_PAUSES = dso_local local_unnamed_addr global i32 0, align 4
@EBUSY = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_vt1724_set_pro_rate], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @snd_vt1724_set_pro_rate(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = getelementptr inbounds %struct.snd_ice1712, ptr %0, i64 0, i32 9
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = load ptr, ptr %5, align 8, !tbaa !14
%7 = getelementptr inbounds %struct.TYPE_7__, ptr %5, i64 0, i32 1
%8 = load i32, ptr %7, align 8, !tbaa !16
%9 = sext i32 %8 to i64
%10 = getelementptr i32, ptr %6, i64 %9
%11 = getelementptr i32, ptr %10, i64 -1
%12 = load i32, ptr %11, align 4, !tbaa !17
%13 = icmp ult i32 %12, %1
br i1 %13, label %14, label %17
14: ; preds = %3
%15 = load i32, ptr @EINVAL, align 4, !tbaa !17
%16 = sub nsw i32 0, %15
br label %114
17: ; preds = %3
%18 = getelementptr inbounds %struct.snd_ice1712, ptr %0, i64 0, i32 7
%19 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %18, i64 noundef undef) #2
%20 = load i32, ptr @DMA_CONTROL, align 4, !tbaa !17
%21 = tail call i32 @ICEMT1724(ptr noundef nonnull %0, i32 noundef %20) #2
%22 = tail call i32 @inb(i32 noundef %21) #2
%23 = load i32, ptr @DMA_STARTS, align 4, !tbaa !17
%24 = and i32 %23, %22
%25 = icmp eq i32 %24, 0
br i1 %25, label %26, label %33
26: ; preds = %17
%27 = load i32, ptr @DMA_PAUSE, align 4, !tbaa !17
%28 = tail call i32 @ICEMT1724(ptr noundef nonnull %0, i32 noundef %27) #2
%29 = tail call i32 @inb(i32 noundef %28) #2
%30 = load i32, ptr @DMA_PAUSES, align 4, !tbaa !17
%31 = and i32 %30, %29
%32 = icmp eq i32 %31, 0
br i1 %32, label %42, label %33
33: ; preds = %26, %17
%34 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %18, i64 noundef undef) #2
%35 = load i32, ptr %0, align 8, !tbaa !18
%36 = icmp ne i32 %35, %1
%37 = icmp ne i32 %2, 0
%38 = or i1 %37, %36
%39 = load i32, ptr @EBUSY, align 4
%40 = sub nsw i32 0, %39
%41 = select i1 %38, i32 %40, i32 0
br label %114
42: ; preds = %26
%43 = icmp eq i32 %2, 0
br i1 %43, label %44, label %54
44: ; preds = %42
%45 = tail call i64 @is_pro_rate_locked(ptr noundef nonnull %0) #2
%46 = icmp eq i64 %45, 0
br i1 %46, label %54, label %47
47: ; preds = %44
%48 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %18, i64 noundef undef) #2
%49 = load i32, ptr %0, align 8, !tbaa !18
%50 = icmp eq i32 %49, %1
%51 = load i32, ptr @EBUSY, align 4
%52 = sub nsw i32 0, %51
%53 = select i1 %50, i32 0, i32 %52
br label %114
54: ; preds = %44, %42
%55 = getelementptr inbounds %struct.snd_ice1712, ptr %0, i64 0, i32 1
%56 = load ptr, ptr %55, align 8, !tbaa !19
%57 = tail call i32 %56(ptr noundef nonnull %0) #2
%58 = icmp eq i32 %57, %1
%59 = select i1 %43, i1 %58, i1 false
br i1 %59, label %64, label %60
60: ; preds = %54
%61 = getelementptr inbounds %struct.snd_ice1712, ptr %0, i64 0, i32 8
%62 = load ptr, ptr %61, align 8, !tbaa !20
%63 = tail call i32 %62(ptr noundef nonnull %0, i32 noundef %1) #2
br label %69
64: ; preds = %54
%65 = load i32, ptr %0, align 8, !tbaa !18
%66 = icmp eq i32 %65, %1
br i1 %66, label %67, label %69
67: ; preds = %64
%68 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %18, i64 noundef undef) #2
br label %114
69: ; preds = %64, %60
store i32 %1, ptr %0, align 8, !tbaa !18
%70 = getelementptr inbounds %struct.snd_ice1712, ptr %0, i64 0, i32 2
%71 = load ptr, ptr %70, align 8, !tbaa !21
%72 = tail call zeroext i8 %71(ptr noundef nonnull %0, i32 noundef %1) #2
%73 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %18, i64 noundef undef) #2
%74 = icmp eq i8 %72, 0
br i1 %74, label %81, label %75
75: ; preds = %69
%76 = getelementptr inbounds %struct.snd_ice1712, ptr %0, i64 0, i32 6, i32 1
%77 = load ptr, ptr %76, align 8, !tbaa !22
%78 = icmp eq ptr %77, null
br i1 %78, label %81, label %79
79: ; preds = %75
%80 = tail call i32 %77(ptr noundef nonnull %0) #2
br label %81
81: ; preds = %79, %75, %69
%82 = getelementptr inbounds %struct.snd_ice1712, ptr %0, i64 0, i32 6
%83 = load ptr, ptr %82, align 8, !tbaa !23
%84 = icmp eq ptr %83, null
br i1 %84, label %87, label %85
85: ; preds = %81
%86 = tail call i32 %83(ptr noundef nonnull %0, i32 noundef %1) #2
br label %87
87: ; preds = %85, %81
%88 = getelementptr inbounds %struct.snd_ice1712, ptr %0, i64 0, i32 3
%89 = load i32, ptr %88, align 8, !tbaa !24
%90 = icmp eq i32 %89, 0
br i1 %90, label %108, label %91
91: ; preds = %87
%92 = getelementptr inbounds %struct.snd_ice1712, ptr %0, i64 0, i32 5
br label %93
93: ; preds = %91, %103
%94 = phi i32 [ %89, %91 ], [ %104, %103 ]
%95 = phi i64 [ 0, %91 ], [ %105, %103 ]
%96 = load ptr, ptr %92, align 8, !tbaa !25
%97 = getelementptr inbounds %struct.TYPE_12__, ptr %96, i64 %95
%98 = load ptr, ptr %97, align 8, !tbaa !26
%99 = icmp eq ptr %98, null
br i1 %99, label %103, label %100
100: ; preds = %93
%101 = tail call i32 %98(ptr noundef nonnull %97, i32 noundef %1) #2
%102 = load i32, ptr %88, align 8, !tbaa !24
br label %103
103: ; preds = %93, %100
%104 = phi i32 [ %94, %93 ], [ %102, %100 ]
%105 = add nuw nsw i64 %95, 1
%106 = zext i32 %104 to i64
%107 = icmp ult i64 %105, %106
br i1 %107, label %93, label %108, !llvm.loop !29
108: ; preds = %103, %87
%109 = getelementptr inbounds %struct.snd_ice1712, ptr %0, i64 0, i32 4
%110 = load ptr, ptr %109, align 8, !tbaa !31
%111 = icmp eq ptr %110, null
br i1 %111, label %114, label %112
112: ; preds = %108
%113 = tail call i32 %110(ptr noundef nonnull %0, i32 noundef %1) #2
br label %114
114: ; preds = %108, %112, %67, %47, %33, %14
%115 = phi i32 [ %16, %14 ], [ %41, %33 ], [ 0, %67 ], [ %53, %47 ], [ 0, %112 ], [ 0, %108 ]
ret i32 %115
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @inb(i32 noundef) local_unnamed_addr #1
declare i32 @ICEMT1724(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @is_pro_rate_locked(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 80}
!6 = !{!"snd_ice1712", !7, i64 0, !10, i64 8, !10, i64 16, !7, i64 24, !11, i64 32, !10, i64 40, !13, i64 48, !7, i64 64, !10, i64 72, !10, i64 80}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"TYPE_11__", !12, i64 0}
!12 = !{!"TYPE_10__", !10, i64 0}
!13 = !{!"TYPE_8__", !10, i64 0, !10, i64 8}
!14 = !{!15, !10, i64 0}
!15 = !{!"TYPE_7__", !10, i64 0, !7, i64 8}
!16 = !{!15, !7, i64 8}
!17 = !{!7, !7, i64 0}
!18 = !{!6, !7, i64 0}
!19 = !{!6, !10, i64 8}
!20 = !{!6, !10, i64 72}
!21 = !{!6, !10, i64 16}
!22 = !{!6, !10, i64 56}
!23 = !{!6, !10, i64 48}
!24 = !{!6, !7, i64 24}
!25 = !{!6, !10, i64 40}
!26 = !{!27, !10, i64 0}
!27 = !{!"TYPE_12__", !28, i64 0}
!28 = !{!"TYPE_9__", !10, i64 0}
!29 = distinct !{!29, !30}
!30 = !{!"llvm.loop.mustprogress"}
!31 = !{!6, !10, i64 32}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/ice1712/extr_ice1724.c_snd_vt1724_set_pro_rate.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/ice1712/extr_ice1724.c_snd_vt1724_set_pro_rate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_12__ = type { %struct.TYPE_9__ }
%struct.TYPE_9__ = type { ptr }
@EINVAL = common local_unnamed_addr global i32 0, align 4
@DMA_CONTROL = common local_unnamed_addr global i32 0, align 4
@DMA_STARTS = common local_unnamed_addr global i32 0, align 4
@DMA_PAUSE = common local_unnamed_addr global i32 0, align 4
@DMA_PAUSES = common local_unnamed_addr global i32 0, align 4
@EBUSY = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @snd_vt1724_set_pro_rate], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @snd_vt1724_set_pro_rate(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %0, i64 80
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = load ptr, ptr %5, align 8, !tbaa !15
%7 = getelementptr inbounds i8, ptr %5, i64 8
%8 = load i32, ptr %7, align 8, !tbaa !17
%9 = sext i32 %8 to i64
%10 = getelementptr i32, ptr %6, i64 %9
%11 = getelementptr i8, ptr %10, i64 -4
%12 = load i32, ptr %11, align 4, !tbaa !18
%13 = icmp ult i32 %12, %1
br i1 %13, label %14, label %17
14: ; preds = %3
%15 = load i32, ptr @EINVAL, align 4, !tbaa !18
%16 = sub nsw i32 0, %15
br label %114
17: ; preds = %3
%18 = getelementptr inbounds i8, ptr %0, i64 64
%19 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %18, i64 noundef undef) #2
%20 = load i32, ptr @DMA_CONTROL, align 4, !tbaa !18
%21 = tail call i32 @ICEMT1724(ptr noundef nonnull %0, i32 noundef %20) #2
%22 = tail call i32 @inb(i32 noundef %21) #2
%23 = load i32, ptr @DMA_STARTS, align 4, !tbaa !18
%24 = and i32 %23, %22
%25 = icmp eq i32 %24, 0
br i1 %25, label %26, label %33
26: ; preds = %17
%27 = load i32, ptr @DMA_PAUSE, align 4, !tbaa !18
%28 = tail call i32 @ICEMT1724(ptr noundef nonnull %0, i32 noundef %27) #2
%29 = tail call i32 @inb(i32 noundef %28) #2
%30 = load i32, ptr @DMA_PAUSES, align 4, !tbaa !18
%31 = and i32 %30, %29
%32 = icmp eq i32 %31, 0
br i1 %32, label %42, label %33
33: ; preds = %26, %17
%34 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %18, i64 noundef undef) #2
%35 = load i32, ptr %0, align 8, !tbaa !19
%36 = icmp ne i32 %35, %1
%37 = icmp ne i32 %2, 0
%38 = or i1 %37, %36
%39 = load i32, ptr @EBUSY, align 4
%40 = sub nsw i32 0, %39
%41 = select i1 %38, i32 %40, i32 0
br label %114
42: ; preds = %26
%43 = icmp eq i32 %2, 0
br i1 %43, label %44, label %54
44: ; preds = %42
%45 = tail call i64 @is_pro_rate_locked(ptr noundef nonnull %0) #2
%46 = icmp eq i64 %45, 0
br i1 %46, label %54, label %47
47: ; preds = %44
%48 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %18, i64 noundef undef) #2
%49 = load i32, ptr %0, align 8, !tbaa !19
%50 = icmp eq i32 %49, %1
%51 = load i32, ptr @EBUSY, align 4
%52 = sub nsw i32 0, %51
%53 = select i1 %50, i32 0, i32 %52
br label %114
54: ; preds = %44, %42
%55 = getelementptr inbounds i8, ptr %0, i64 8
%56 = load ptr, ptr %55, align 8, !tbaa !20
%57 = tail call i32 %56(ptr noundef nonnull %0) #2
%58 = icmp eq i32 %57, %1
%59 = select i1 %43, i1 %58, i1 false
br i1 %59, label %64, label %60
60: ; preds = %54
%61 = getelementptr inbounds i8, ptr %0, i64 72
%62 = load ptr, ptr %61, align 8, !tbaa !21
%63 = tail call i32 %62(ptr noundef nonnull %0, i32 noundef %1) #2
br label %69
64: ; preds = %54
%65 = load i32, ptr %0, align 8, !tbaa !19
%66 = icmp eq i32 %65, %1
br i1 %66, label %67, label %69
67: ; preds = %64
%68 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %18, i64 noundef undef) #2
br label %114
69: ; preds = %64, %60
store i32 %1, ptr %0, align 8, !tbaa !19
%70 = getelementptr inbounds i8, ptr %0, i64 16
%71 = load ptr, ptr %70, align 8, !tbaa !22
%72 = tail call zeroext i8 %71(ptr noundef nonnull %0, i32 noundef %1) #2
%73 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %18, i64 noundef undef) #2
%74 = icmp eq i8 %72, 0
br i1 %74, label %81, label %75
75: ; preds = %69
%76 = getelementptr inbounds i8, ptr %0, i64 56
%77 = load ptr, ptr %76, align 8, !tbaa !23
%78 = icmp eq ptr %77, null
br i1 %78, label %81, label %79
79: ; preds = %75
%80 = tail call i32 %77(ptr noundef nonnull %0) #2
br label %81
81: ; preds = %79, %75, %69
%82 = getelementptr inbounds i8, ptr %0, i64 48
%83 = load ptr, ptr %82, align 8, !tbaa !24
%84 = icmp eq ptr %83, null
br i1 %84, label %87, label %85
85: ; preds = %81
%86 = tail call i32 %83(ptr noundef nonnull %0, i32 noundef %1) #2
br label %87
87: ; preds = %85, %81
%88 = getelementptr inbounds i8, ptr %0, i64 24
%89 = load i32, ptr %88, align 8, !tbaa !25
%90 = icmp eq i32 %89, 0
br i1 %90, label %108, label %91
91: ; preds = %87
%92 = getelementptr inbounds i8, ptr %0, i64 40
br label %93
93: ; preds = %91, %103
%94 = phi i32 [ %89, %91 ], [ %104, %103 ]
%95 = phi i64 [ 0, %91 ], [ %105, %103 ]
%96 = load ptr, ptr %92, align 8, !tbaa !26
%97 = getelementptr inbounds %struct.TYPE_12__, ptr %96, i64 %95
%98 = load ptr, ptr %97, align 8, !tbaa !27
%99 = icmp eq ptr %98, null
br i1 %99, label %103, label %100
100: ; preds = %93
%101 = tail call i32 %98(ptr noundef nonnull %97, i32 noundef %1) #2
%102 = load i32, ptr %88, align 8, !tbaa !25
br label %103
103: ; preds = %93, %100
%104 = phi i32 [ %94, %93 ], [ %102, %100 ]
%105 = add nuw nsw i64 %95, 1
%106 = zext i32 %104 to i64
%107 = icmp ult i64 %105, %106
br i1 %107, label %93, label %108, !llvm.loop !30
108: ; preds = %103, %87
%109 = getelementptr inbounds i8, ptr %0, i64 32
%110 = load ptr, ptr %109, align 8, !tbaa !32
%111 = icmp eq ptr %110, null
br i1 %111, label %114, label %112
112: ; preds = %108
%113 = tail call i32 %110(ptr noundef nonnull %0, i32 noundef %1) #2
br label %114
114: ; preds = %108, %112, %67, %47, %33, %14
%115 = phi i32 [ %16, %14 ], [ %41, %33 ], [ 0, %67 ], [ %53, %47 ], [ 0, %112 ], [ 0, %108 ]
ret i32 %115
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @inb(i32 noundef) local_unnamed_addr #1
declare i32 @ICEMT1724(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i64 @is_pro_rate_locked(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 80}
!7 = !{!"snd_ice1712", !8, i64 0, !11, i64 8, !11, i64 16, !8, i64 24, !12, i64 32, !11, i64 40, !14, i64 48, !8, i64 64, !11, i64 72, !11, i64 80}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"TYPE_11__", !13, i64 0}
!13 = !{!"TYPE_10__", !11, i64 0}
!14 = !{!"TYPE_8__", !11, i64 0, !11, i64 8}
!15 = !{!16, !11, i64 0}
!16 = !{!"TYPE_7__", !11, i64 0, !8, i64 8}
!17 = !{!16, !8, i64 8}
!18 = !{!8, !8, i64 0}
!19 = !{!7, !8, i64 0}
!20 = !{!7, !11, i64 8}
!21 = !{!7, !11, i64 72}
!22 = !{!7, !11, i64 16}
!23 = !{!7, !11, i64 56}
!24 = !{!7, !11, i64 48}
!25 = !{!7, !8, i64 24}
!26 = !{!7, !11, i64 40}
!27 = !{!28, !11, i64 0}
!28 = !{!"TYPE_12__", !29, i64 0}
!29 = !{!"TYPE_9__", !11, i64 0}
!30 = distinct !{!30, !31}
!31 = !{!"llvm.loop.mustprogress"}
!32 = !{!7, !11, i64 32}
| fastsocket_kernel_sound_pci_ice1712_extr_ice1724.c_snd_vt1724_set_pro_rate |
; ModuleID = 'AnghaBench/linux/net/dsa/extr_master.c_dsa_master_ndo_teardown.c'
source_filename = "AnghaBench/linux/net/dsa/extr_master.c_dsa_master_ndo_teardown.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.net_device = type { ptr, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @dsa_master_ndo_teardown], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable
define internal void @dsa_master_ndo_teardown(ptr nocapture noundef %0) #0 {
%2 = getelementptr inbounds %struct.net_device, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load ptr, ptr %3, align 8, !tbaa !10
store ptr %4, ptr %0, align 8, !tbaa !12
store ptr null, ptr %3, align 8, !tbaa !10
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"net_device", !7, i64 0, !7, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"dsa_port", !7, i64 0}
!12 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/net/dsa/extr_master.c_dsa_master_ndo_teardown.c'
source_filename = "AnghaBench/linux/net/dsa/extr_master.c_dsa_master_ndo_teardown.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @dsa_master_ndo_teardown], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @dsa_master_ndo_teardown(ptr nocapture noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load ptr, ptr %3, align 8, !tbaa !11
store ptr %4, ptr %0, align 8, !tbaa !13
store ptr null, ptr %3, align 8, !tbaa !11
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"net_device", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"dsa_port", !8, i64 0}
!13 = !{!7, !8, i64 0}
| linux_net_dsa_extr_master.c_dsa_master_ndo_teardown |
; ModuleID = 'AnghaBench/Cinder/src/libtess2/extr_priorityq.c_FloatUp.c'
source_filename = "AnghaBench/Cinder/src/libtess2/extr_priorityq.c_FloatUp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { ptr, ptr }
%struct.TYPE_6__ = type { i64 }
%struct.TYPE_7__ = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @FloatUp], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @FloatUp(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = load ptr, ptr %0, align 8, !tbaa !10
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds %struct.TYPE_6__, ptr %4, i64 %6
%8 = load i64, ptr %7, align 8, !tbaa !11
%9 = icmp ult i32 %1, 2
br i1 %9, label %25, label %10
10: ; preds = %2
%11 = getelementptr inbounds %struct.TYPE_7__, ptr %5, i64 %8, i32 1
br label %12
12: ; preds = %10, %30
%13 = phi i32 [ %1, %10 ], [ %14, %30 ]
%14 = ashr i32 %13, 1
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds %struct.TYPE_6__, ptr %4, i64 %15
%17 = load i64, ptr %16, align 8, !tbaa !11
%18 = getelementptr inbounds %struct.TYPE_7__, ptr %5, i64 %17, i32 1
%19 = load i32, ptr %18, align 4, !tbaa !14
%20 = load i32, ptr %11, align 4, !tbaa !14
%21 = tail call i64 @LEQ(i32 noundef %19, i32 noundef %20) #2
%22 = icmp eq i64 %21, 0
br i1 %22, label %30, label %23
23: ; preds = %12
%24 = sext i32 %13 to i64
br label %25
25: ; preds = %30, %23, %2
%26 = phi i64 [ %6, %2 ], [ %24, %23 ], [ %15, %30 ]
%27 = phi i32 [ %1, %2 ], [ %13, %23 ], [ %14, %30 ]
%28 = getelementptr inbounds %struct.TYPE_6__, ptr %4, i64 %26
store i64 %8, ptr %28, align 8, !tbaa !11
%29 = getelementptr inbounds %struct.TYPE_7__, ptr %5, i64 %8
store i32 %27, ptr %29, align 4, !tbaa !17
ret void
30: ; preds = %12
%31 = getelementptr inbounds %struct.TYPE_7__, ptr %5, i64 %17
%32 = sext i32 %13 to i64
%33 = getelementptr inbounds %struct.TYPE_6__, ptr %4, i64 %32
store i64 %17, ptr %33, align 8, !tbaa !11
store i32 %13, ptr %31, align 4, !tbaa !17
%34 = icmp ult i32 %14, 2
br i1 %34, label %25, label %12
}
declare i64 @LEQ(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"TYPE_5__", !7, i64 0, !7, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_6__", !13, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!15, !16, i64 4}
!15 = !{!"TYPE_7__", !16, i64 0, !16, i64 4}
!16 = !{!"int", !8, i64 0}
!17 = !{!15, !16, i64 0}
| ; ModuleID = 'AnghaBench/Cinder/src/libtess2/extr_priorityq.c_FloatUp.c'
source_filename = "AnghaBench/Cinder/src/libtess2/extr_priorityq.c_FloatUp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_6__ = type { i64 }
%struct.TYPE_7__ = type { i32, i32 }
@llvm.used = appending global [1 x ptr] [ptr @FloatUp], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @FloatUp(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load ptr, ptr %0, align 8, !tbaa !11
%6 = sext i32 %1 to i64
%7 = getelementptr inbounds %struct.TYPE_6__, ptr %4, i64 %6
%8 = load i64, ptr %7, align 8, !tbaa !12
%9 = icmp ult i32 %1, 2
br i1 %9, label %25, label %10
10: ; preds = %2
%11 = getelementptr inbounds %struct.TYPE_7__, ptr %5, i64 %8, i32 1
br label %12
12: ; preds = %10, %30
%13 = phi i32 [ %1, %10 ], [ %14, %30 ]
%14 = ashr i32 %13, 1
%15 = sext i32 %14 to i64
%16 = getelementptr inbounds %struct.TYPE_6__, ptr %4, i64 %15
%17 = load i64, ptr %16, align 8, !tbaa !12
%18 = getelementptr inbounds %struct.TYPE_7__, ptr %5, i64 %17
%19 = getelementptr inbounds i8, ptr %18, i64 4
%20 = load i32, ptr %19, align 4, !tbaa !15
%21 = load i32, ptr %11, align 4, !tbaa !15
%22 = tail call i64 @LEQ(i32 noundef %20, i32 noundef %21) #2
%23 = icmp eq i64 %22, 0
%24 = sext i32 %13 to i64
br i1 %23, label %30, label %25
25: ; preds = %30, %12, %2
%26 = phi i64 [ %6, %2 ], [ %15, %30 ], [ %24, %12 ]
%27 = phi i32 [ %1, %2 ], [ %14, %30 ], [ %13, %12 ]
%28 = getelementptr inbounds %struct.TYPE_6__, ptr %4, i64 %26
store i64 %8, ptr %28, align 8, !tbaa !12
%29 = getelementptr inbounds %struct.TYPE_7__, ptr %5, i64 %8
store i32 %27, ptr %29, align 4, !tbaa !18
ret void
30: ; preds = %12
%31 = getelementptr inbounds %struct.TYPE_6__, ptr %4, i64 %24
store i64 %17, ptr %31, align 8, !tbaa !12
store i32 %13, ptr %18, align 4, !tbaa !18
%32 = icmp ult i32 %14, 2
br i1 %32, label %25, label %12
}
declare i64 @LEQ(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"TYPE_5__", !8, i64 0, !8, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_6__", !14, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!16, !17, i64 4}
!16 = !{!"TYPE_7__", !17, i64 0, !17, i64 4}
!17 = !{!"int", !9, i64 0}
!18 = !{!16, !17, i64 0}
| Cinder_src_libtess2_extr_priorityq.c_FloatUp |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_mite.h_mite_csigr_dmac.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_mite.h_mite_csigr_dmac.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @mite_csigr_dmac], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @mite_csigr_dmac(i32 noundef %0) #0 {
%2 = lshr i32 %0, 16
%3 = and i32 %2, 15
ret i32 %3
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_mite.h_mite_csigr_dmac.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_mite.h_mite_csigr_dmac.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @mite_csigr_dmac], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef range(i32 0, 16) i32 @mite_csigr_dmac(i32 noundef %0) #0 {
%2 = lshr i32 %0, 16
%3 = and i32 %2, 15
ret i32 %3
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_drivers_staging_comedi_drivers_extr_mite.h_mite_csigr_dmac |
; ModuleID = 'AnghaBench/freebsd/sys/dev/bhnd/cores/chipc/extr_bhnd_sprom_chipc.c_chipc_sprom_attach.c'
source_filename = "AnghaBench/freebsd/sys/dev/bhnd/cores/chipc/extr_bhnd_sprom_chipc.c_chipc_sprom_attach.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @chipc_sprom_attach], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @chipc_sprom_attach(i32 noundef %0) #0 {
%2 = tail call i32 @device_get_parent(i32 noundef %0) #2
%3 = tail call ptr @BHND_CHIPC_GET_CAPS(i32 noundef %2) #2
%4 = tail call i32 @BHND_CHIPC_ENABLE_SPROM(i32 noundef %2) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, ptr %3, align 4, !tbaa !5
%8 = tail call i32 @bhnd_sprom_attach(i32 noundef %0, i32 noundef %7) #2
%9 = tail call i32 @BHND_CHIPC_DISABLE_SPROM(i32 noundef %2) #2
br label %10
10: ; preds = %1, %6
%11 = phi i32 [ %8, %6 ], [ %4, %1 ]
ret i32 %11
}
declare i32 @device_get_parent(i32 noundef) local_unnamed_addr #1
declare ptr @BHND_CHIPC_GET_CAPS(i32 noundef) local_unnamed_addr #1
declare i32 @BHND_CHIPC_ENABLE_SPROM(i32 noundef) local_unnamed_addr #1
declare i32 @bhnd_sprom_attach(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BHND_CHIPC_DISABLE_SPROM(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"chipc_caps", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/bhnd/cores/chipc/extr_bhnd_sprom_chipc.c_chipc_sprom_attach.c'
source_filename = "AnghaBench/freebsd/sys/dev/bhnd/cores/chipc/extr_bhnd_sprom_chipc.c_chipc_sprom_attach.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @chipc_sprom_attach], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @chipc_sprom_attach(i32 noundef %0) #0 {
%2 = tail call i32 @device_get_parent(i32 noundef %0) #2
%3 = tail call ptr @BHND_CHIPC_GET_CAPS(i32 noundef %2) #2
%4 = tail call i32 @BHND_CHIPC_ENABLE_SPROM(i32 noundef %2) #2
%5 = icmp eq i32 %4, 0
br i1 %5, label %6, label %10
6: ; preds = %1
%7 = load i32, ptr %3, align 4, !tbaa !6
%8 = tail call i32 @bhnd_sprom_attach(i32 noundef %0, i32 noundef %7) #2
%9 = tail call i32 @BHND_CHIPC_DISABLE_SPROM(i32 noundef %2) #2
br label %10
10: ; preds = %1, %6
%11 = phi i32 [ %8, %6 ], [ %4, %1 ]
ret i32 %11
}
declare i32 @device_get_parent(i32 noundef) local_unnamed_addr #1
declare ptr @BHND_CHIPC_GET_CAPS(i32 noundef) local_unnamed_addr #1
declare i32 @BHND_CHIPC_ENABLE_SPROM(i32 noundef) local_unnamed_addr #1
declare i32 @bhnd_sprom_attach(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @BHND_CHIPC_DISABLE_SPROM(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"chipc_caps", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_dev_bhnd_cores_chipc_extr_bhnd_sprom_chipc.c_chipc_sprom_attach |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/hisilicon/hns3/extr_hns3_ethtool.c_hns3_get_rss.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/hisilicon/hns3/extr_hns3_ethtool.c_hns3_get_rss.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EOPNOTSUPP = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @hns3_get_rss], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @hns3_get_rss(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = tail call ptr @hns3_get_handle(ptr noundef %0) #2
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = load ptr, ptr %6, align 8, !tbaa !10
%8 = load ptr, ptr %7, align 8, !tbaa !12
%9 = icmp eq ptr %8, null
br i1 %9, label %10, label %13
10: ; preds = %4
%11 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !14
%12 = sub nsw i32 0, %11
br label %15
13: ; preds = %4
%14 = tail call i32 %8(ptr noundef nonnull %5, ptr noundef %1, ptr noundef %2, ptr noundef %3) #2
br label %15
15: ; preds = %13, %10
%16 = phi i32 [ %14, %13 ], [ %12, %10 ]
ret i32 %16
}
declare ptr @hns3_get_handle(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"hnae3_handle", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_4__", !7, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"TYPE_3__", !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/hisilicon/hns3/extr_hns3_ethtool.c_hns3_get_rss.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/hisilicon/hns3/extr_hns3_ethtool.c_hns3_get_rss.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EOPNOTSUPP = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @hns3_get_rss], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @hns3_get_rss(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = tail call ptr @hns3_get_handle(ptr noundef %0) #2
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = load ptr, ptr %6, align 8, !tbaa !11
%8 = load ptr, ptr %7, align 8, !tbaa !13
%9 = icmp eq ptr %8, null
br i1 %9, label %10, label %13
10: ; preds = %4
%11 = load i32, ptr @EOPNOTSUPP, align 4, !tbaa !15
%12 = sub nsw i32 0, %11
br label %15
13: ; preds = %4
%14 = tail call i32 %8(ptr noundef nonnull %5, ptr noundef %1, ptr noundef %2, ptr noundef %3) #2
br label %15
15: ; preds = %13, %10
%16 = phi i32 [ %14, %13 ], [ %12, %10 ]
ret i32 %16
}
declare ptr @hns3_get_handle(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"hnae3_handle", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 0}
!12 = !{!"TYPE_4__", !8, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"TYPE_3__", !8, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !9, i64 0}
| linux_drivers_net_ethernet_hisilicon_hns3_extr_hns3_ethtool.c_hns3_get_rss |
; ModuleID = 'AnghaBench/linux/drivers/ide/extr_ide-sysfs.c_model_show.c'
source_filename = "AnghaBench/linux/drivers/ide/extr_ide-sysfs.c_model_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1
@ATA_ID_PROD = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @model_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @model_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @to_ide_device(ptr noundef %0) #2
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = load i64, ptr @ATA_ID_PROD, align 8, !tbaa !10
%7 = getelementptr inbounds i32, ptr %5, i64 %6
%8 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, ptr noundef %7) #2
ret i32 %8
}
declare ptr @to_ide_device(ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/ide/extr_ide-sysfs.c_model_show.c'
source_filename = "AnghaBench/linux/drivers/ide/extr_ide-sysfs.c_model_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1
@ATA_ID_PROD = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @model_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @model_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @to_ide_device(ptr noundef %0) #2
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = load i64, ptr @ATA_ID_PROD, align 8, !tbaa !11
%7 = getelementptr inbounds i32, ptr %5, i64 %6
%8 = tail call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, ptr noundef %7) #2
ret i32 %8
}
declare ptr @to_ide_device(ptr noundef) local_unnamed_addr #1
declare i32 @sprintf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !9, i64 0}
| linux_drivers_ide_extr_ide-sysfs.c_model_show |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/md/extr_dm-log-userspace-base.c_userspace_resume.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/md/extr_dm-log-userspace-base.c_userspace_resume.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.log_c = type { i32, i32, i64 }
@DM_ULOG_RESUME = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @userspace_resume], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @userspace_resume(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = getelementptr inbounds %struct.log_c, ptr %2, i64 0, i32 2
store i64 0, ptr %3, align 8, !tbaa !10
%4 = getelementptr inbounds %struct.log_c, ptr %2, i64 0, i32 1
%5 = load i32, ptr %4, align 4, !tbaa !14
%6 = load i32, ptr %2, align 8, !tbaa !15
%7 = load i32, ptr @DM_ULOG_RESUME, align 4, !tbaa !16
%8 = tail call i32 @dm_consult_userspace(i32 noundef %5, i32 noundef %6, i32 noundef %7, ptr noundef null, i32 noundef 0, ptr noundef null, ptr noundef null) #2
ret i32 %8
}
declare i32 @dm_consult_userspace(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"dm_dirty_log", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 8}
!11 = !{!"log_c", !12, i64 0, !12, i64 4, !13, i64 8}
!12 = !{!"int", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!11, !12, i64 4}
!15 = !{!11, !12, i64 0}
!16 = !{!12, !12, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/md/extr_dm-log-userspace-base.c_userspace_resume.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/md/extr_dm-log-userspace-base.c_userspace_resume.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DM_ULOG_RESUME = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @userspace_resume], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @userspace_resume(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = getelementptr inbounds i8, ptr %2, i64 8
store i64 0, ptr %3, align 8, !tbaa !11
%4 = getelementptr inbounds i8, ptr %2, i64 4
%5 = load i32, ptr %4, align 4, !tbaa !15
%6 = load i32, ptr %2, align 8, !tbaa !16
%7 = load i32, ptr @DM_ULOG_RESUME, align 4, !tbaa !17
%8 = tail call i32 @dm_consult_userspace(i32 noundef %5, i32 noundef %6, i32 noundef %7, ptr noundef null, i32 noundef 0, ptr noundef null, ptr noundef null) #2
ret i32 %8
}
declare i32 @dm_consult_userspace(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dm_dirty_log", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !14, i64 8}
!12 = !{!"log_c", !13, i64 0, !13, i64 4, !14, i64 8}
!13 = !{!"int", !9, i64 0}
!14 = !{!"long", !9, i64 0}
!15 = !{!12, !13, i64 4}
!16 = !{!12, !13, i64 0}
!17 = !{!13, !13, i64 0}
| fastsocket_kernel_drivers_md_extr_dm-log-userspace-base.c_userspace_resume |
; ModuleID = 'AnghaBench/linux/drivers/usb/host/extr_uhci-q.c_uhci_set_next_interrupt.c'
source_filename = "AnghaBench/linux/drivers/usb/host/extr_uhci-q.c_uhci_set_next_interrupt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.uhci_hcd = type { ptr, i64 }
@jiffies = dso_local local_unnamed_addr global i32 0, align 4
@TD_CTRL_IOC = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @uhci_set_next_interrupt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @uhci_set_next_interrupt(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.uhci_hcd, ptr %0, i64 0, i32 1
%3 = load i64, ptr %2, align 8, !tbaa !5
%4 = icmp eq i64 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = tail call ptr @uhci_to_hcd(ptr noundef nonnull %0) #2
%7 = load i32, ptr @jiffies, align 4, !tbaa !11
%8 = tail call i32 @mod_timer(ptr noundef %6, i32 noundef %7) #2
br label %9
9: ; preds = %5, %1
%10 = load i32, ptr @TD_CTRL_IOC, align 4, !tbaa !11
%11 = tail call i32 @cpu_to_hc32(ptr noundef nonnull %0, i32 noundef %10) #2
%12 = load ptr, ptr %0, align 8, !tbaa !13
%13 = load i32, ptr %12, align 4, !tbaa !14
%14 = or i32 %13, %11
store i32 %14, ptr %12, align 4, !tbaa !14
ret void
}
declare i32 @mod_timer(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @uhci_to_hcd(ptr noundef) local_unnamed_addr #1
declare i32 @cpu_to_hc32(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"uhci_hcd", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!6, !7, i64 0}
!14 = !{!15, !12, i64 0}
!15 = !{!"TYPE_3__", !12, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/host/extr_uhci-q.c_uhci_set_next_interrupt.c'
source_filename = "AnghaBench/linux/drivers/usb/host/extr_uhci-q.c_uhci_set_next_interrupt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@jiffies = common local_unnamed_addr global i32 0, align 4
@TD_CTRL_IOC = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @uhci_set_next_interrupt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @uhci_set_next_interrupt(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %9, label %5
5: ; preds = %1
%6 = tail call ptr @uhci_to_hcd(ptr noundef nonnull %0) #2
%7 = load i32, ptr @jiffies, align 4, !tbaa !12
%8 = tail call i32 @mod_timer(ptr noundef %6, i32 noundef %7) #2
br label %9
9: ; preds = %5, %1
%10 = load i32, ptr @TD_CTRL_IOC, align 4, !tbaa !12
%11 = tail call i32 @cpu_to_hc32(ptr noundef nonnull %0, i32 noundef %10) #2
%12 = load ptr, ptr %0, align 8, !tbaa !14
%13 = load i32, ptr %12, align 4, !tbaa !15
%14 = or i32 %13, %11
store i32 %14, ptr %12, align 4, !tbaa !15
ret void
}
declare i32 @mod_timer(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @uhci_to_hcd(ptr noundef) local_unnamed_addr #1
declare i32 @cpu_to_hc32(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"uhci_hcd", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!7, !8, i64 0}
!15 = !{!16, !13, i64 0}
!16 = !{!"TYPE_3__", !13, i64 0}
| linux_drivers_usb_host_extr_uhci-q.c_uhci_set_next_interrupt |
; ModuleID = 'AnghaBench/freebsd/crypto/heimdal/lib/hdb/extr_mkey.c_hdb_seal_keys_mkey.c'
source_filename = "AnghaBench/freebsd/crypto/heimdal/lib/hdb/extr_mkey.c_hdb_seal_keys_mkey.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i64, ptr }
; Function Attrs: nounwind uwtable
define dso_local i64 @hdb_seal_keys_mkey(i32 noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = getelementptr inbounds %struct.TYPE_4__, ptr %1, i64 0, i32 1
%5 = load i64, ptr %1, align 8, !tbaa !5
%6 = icmp eq i64 %5, 0
br i1 %6, label %17, label %11
7: ; preds = %11
%8 = add nuw i64 %12, 1
%9 = load i64, ptr %1, align 8, !tbaa !5
%10 = icmp ult i64 %8, %9
br i1 %10, label %11, label %17, !llvm.loop !12
11: ; preds = %3, %7
%12 = phi i64 [ %8, %7 ], [ 0, %3 ]
%13 = load ptr, ptr %4, align 8, !tbaa !14
%14 = getelementptr inbounds i32, ptr %13, i64 %12
%15 = tail call i64 @hdb_seal_key_mkey(i32 noundef %0, ptr noundef %14, i32 noundef %2) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %7, label %17
17: ; preds = %11, %7, %3
%18 = phi i64 [ 0, %3 ], [ 0, %7 ], [ %15, %11 ]
ret i64 %18
}
declare i64 @hdb_seal_key_mkey(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!6, !11, i64 8}
| ; ModuleID = 'AnghaBench/freebsd/crypto/heimdal/lib/hdb/extr_mkey.c_hdb_seal_keys_mkey.c'
source_filename = "AnghaBench/freebsd/crypto/heimdal/lib/hdb/extr_mkey.c_hdb_seal_keys_mkey.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @hdb_seal_keys_mkey(i32 noundef %0, ptr nocapture noundef readonly %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = getelementptr inbounds i8, ptr %1, i64 8
%5 = load i64, ptr %1, align 8, !tbaa !6
%6 = icmp eq i64 %5, 0
br i1 %6, label %17, label %11
7: ; preds = %11
%8 = add nuw i64 %12, 1
%9 = load i64, ptr %1, align 8, !tbaa !6
%10 = icmp ult i64 %8, %9
br i1 %10, label %11, label %17, !llvm.loop !13
11: ; preds = %3, %7
%12 = phi i64 [ %8, %7 ], [ 0, %3 ]
%13 = load ptr, ptr %4, align 8, !tbaa !15
%14 = getelementptr inbounds i32, ptr %13, i64 %12
%15 = tail call i64 @hdb_seal_key_mkey(i32 noundef %0, ptr noundef %14, i32 noundef %2) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %7, label %17
17: ; preds = %11, %7, %3
%18 = phi i64 [ 0, %3 ], [ 0, %7 ], [ %15, %11 ]
ret i64 %18
}
declare i64 @hdb_seal_key_mkey(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0}
!8 = !{!"TYPE_4__", !9, i64 0, !12, i64 8}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!7, !12, i64 8}
| freebsd_crypto_heimdal_lib_hdb_extr_mkey.c_hdb_seal_keys_mkey |
; ModuleID = 'AnghaBench/radare2/libr/anal/extr_..includer_types.h_r_run_call9.c'
source_filename = "AnghaBench/radare2/libr/anal/extr_..includer_types.h_r_run_call9.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @r_run_call9], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @r_run_call9(ptr nocapture noundef readonly %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, ptr noundef %9) #0 {
tail call void %0(ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, ptr noundef %9) #1
ret void
}
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/radare2/libr/anal/extr_..includer_types.h_r_run_call9.c'
source_filename = "AnghaBench/radare2/libr/anal/extr_..includer_types.h_r_run_call9.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @r_run_call9], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @r_run_call9(ptr nocapture noundef readonly %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, ptr noundef %9) #0 {
tail call void %0(ptr noundef %1, ptr noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7, ptr noundef %8, ptr noundef %9) #1
ret void
}
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| radare2_libr_anal_extr_..includer_types.h_r_run_call9 |
; ModuleID = 'AnghaBench/linux/drivers/usb/gadget/udc/extr_pch_udc.c_pch_udc_readl.c'
source_filename = "AnghaBench/linux/drivers/usb/gadget/udc/extr_pch_udc.c_pch_udc_readl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @pch_udc_readl], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @pch_udc_readl(ptr nocapture noundef readonly %0, i64 noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = add i64 %3, %1
%5 = tail call i32 @ioread32(i64 noundef %4) #2
ret i32 %5
}
declare i32 @ioread32(i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"pch_udc_dev", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/gadget/udc/extr_pch_udc.c_pch_udc_readl.c'
source_filename = "AnghaBench/linux/drivers/usb/gadget/udc/extr_pch_udc.c_pch_udc_readl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pch_udc_readl], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @pch_udc_readl(ptr nocapture noundef readonly %0, i64 noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = add i64 %3, %1
%5 = tail call i32 @ioread32(i64 noundef %4) #2
ret i32 %5
}
declare i32 @ioread32(i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"pch_udc_dev", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_usb_gadget_udc_extr_pch_udc.c_pch_udc_readl |
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