IR_x86 string | IR_arm string | filename string |
|---|---|---|
; ModuleID = 'AnghaBench/linux/drivers/input/tablet/extr_aiptek.c_aiptek_command.c'
source_filename = "AnghaBench/linux/drivers/input/tablet/extr_aiptek.c_aiptek_command.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [54 x i8] c"aiptek_program: failed, tried to send: 0x%02x 0x%02x\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @aiptek_command], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @aiptek_command(ptr noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2) #0 {
%4 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%5 = tail call ptr @kmalloc(i32 noundef 12, i32 noundef %4) #3
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%9 = sub nsw i32 0, %8
br label %23
10: ; preds = %3
store i32 2, ptr %5, align 4, !tbaa !5
%11 = zext i8 %1 to i32
%12 = getelementptr inbounds i32, ptr %5, i64 1
store i32 %11, ptr %12, align 4, !tbaa !5
%13 = zext i8 %2 to i32
%14 = getelementptr inbounds i32, ptr %5, i64 2
store i32 %13, ptr %14, align 4, !tbaa !5
%15 = tail call i32 @aiptek_set_report(ptr noundef %0, i32 noundef 3, i32 noundef 2, ptr noundef nonnull %5, i32 noundef 12) #3
%16 = icmp eq i32 %15, 12
br i1 %16, label %20, label %17
17: ; preds = %10
%18 = load ptr, ptr %0, align 8, !tbaa !9
%19 = tail call i32 @dev_dbg(ptr noundef %18, ptr noundef nonnull @.str, i8 noundef zeroext %1, i8 noundef zeroext %2) #3
br label %20
20: ; preds = %17, %10
%21 = tail call i32 @kfree(ptr noundef nonnull %5) #3
%22 = tail call i32 @llvm.smin.i32(i32 %15, i32 0)
br label %23
23: ; preds = %20, %7
%24 = phi i32 [ %22, %20 ], [ %9, %7 ]
ret i32 %24
}
declare ptr @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @aiptek_set_report(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_dbg(ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"aiptek", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/input/tablet/extr_aiptek.c_aiptek_command.c'
source_filename = "AnghaBench/linux/drivers/input/tablet/extr_aiptek.c_aiptek_command.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [54 x i8] c"aiptek_program: failed, tried to send: 0x%02x 0x%02x\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @aiptek_command], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @aiptek_command(ptr noundef %0, i8 noundef zeroext %1, i8 noundef zeroext %2) #0 {
%4 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%5 = tail call ptr @kmalloc(i32 noundef 12, i32 noundef %4) #3
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%9 = sub nsw i32 0, %8
br label %23
10: ; preds = %3
store i32 2, ptr %5, align 4, !tbaa !6
%11 = zext i8 %1 to i32
%12 = getelementptr inbounds i8, ptr %5, i64 4
store i32 %11, ptr %12, align 4, !tbaa !6
%13 = zext i8 %2 to i32
%14 = getelementptr inbounds i8, ptr %5, i64 8
store i32 %13, ptr %14, align 4, !tbaa !6
%15 = tail call i32 @aiptek_set_report(ptr noundef %0, i32 noundef 3, i32 noundef 2, ptr noundef nonnull %5, i32 noundef 12) #3
%16 = icmp eq i32 %15, 12
br i1 %16, label %20, label %17
17: ; preds = %10
%18 = load ptr, ptr %0, align 8, !tbaa !10
%19 = tail call i32 @dev_dbg(ptr noundef %18, ptr noundef nonnull @.str, i8 noundef zeroext %1, i8 noundef zeroext %2) #3
br label %20
20: ; preds = %17, %10
%21 = tail call i32 @kfree(ptr noundef nonnull %5) #3
%22 = tail call i32 @llvm.smin.i32(i32 %15, i32 0)
br label %23
23: ; preds = %20, %7
%24 = phi i32 [ %22, %20 ], [ %9, %7 ]
ret i32 %24
}
declare ptr @kmalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @aiptek_set_report(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_dbg(ptr noundef, ptr noundef, i8 noundef zeroext, i8 noundef zeroext) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"aiptek", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
| linux_drivers_input_tablet_extr_aiptek.c_aiptek_command |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_aio_iiro_16.c_aio_iiro_16_dio_insn_bits_write.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_aio_iiro_16.c_aio_iiro_16_dio_insn_bits_write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@AIO_IIRO_16_RELAY_0_7 = dso_local local_unnamed_addr global i64 0, align 8
@AIO_IIRO_16_RELAY_8_15 = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @aio_iiro_16_dio_insn_bits_write], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @aio_iiro_16_dio_insn_bits_write(ptr nocapture noundef readonly %0, ptr nocapture noundef %1, ptr nocapture noundef readonly %2, ptr nocapture noundef %3) #0 {
%5 = load i32, ptr %2, align 4, !tbaa !5
%6 = icmp eq i32 %5, 2
br i1 %6, label %10, label %7
7: ; preds = %4
%8 = load i32, ptr @EINVAL, align 4, !tbaa !10
%9 = sub nsw i32 0, %8
br label %37
10: ; preds = %4
%11 = load i32, ptr %3, align 4, !tbaa !10
%12 = icmp eq i32 %11, 0
br i1 %12, label %34, label %13
13: ; preds = %10
%14 = xor i32 %11, -1
%15 = load i32, ptr %1, align 4, !tbaa !11
%16 = and i32 %15, %14
store i32 %16, ptr %1, align 4, !tbaa !11
%17 = load i32, ptr %3, align 4, !tbaa !10
%18 = getelementptr inbounds i32, ptr %3, i64 1
%19 = load i32, ptr %18, align 4, !tbaa !10
%20 = and i32 %19, %17
%21 = or i32 %20, %16
store i32 %21, ptr %1, align 4, !tbaa !11
%22 = and i32 %21, 255
%23 = load i64, ptr %0, align 8, !tbaa !13
%24 = load i64, ptr @AIO_IIRO_16_RELAY_0_7, align 8, !tbaa !16
%25 = add nsw i64 %24, %23
%26 = tail call i32 @outb(i32 noundef %22, i64 noundef %25) #2
%27 = load i32, ptr %1, align 4, !tbaa !11
%28 = lshr i32 %27, 8
%29 = and i32 %28, 255
%30 = load i64, ptr %0, align 8, !tbaa !13
%31 = load i64, ptr @AIO_IIRO_16_RELAY_8_15, align 8, !tbaa !16
%32 = add nsw i64 %31, %30
%33 = tail call i32 @outb(i32 noundef %29, i64 noundef %32) #2
br label %34
34: ; preds = %13, %10
%35 = load i32, ptr %1, align 4, !tbaa !11
%36 = getelementptr inbounds i32, ptr %3, i64 1
store i32 %35, ptr %36, align 4, !tbaa !10
br label %37
37: ; preds = %34, %7
%38 = phi i32 [ %9, %7 ], [ 2, %34 ]
ret i32 %38
}
declare i32 @outb(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"comedi_insn", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"comedi_subdevice", !7, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"comedi_device", !15, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!15, !15, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_aio_iiro_16.c_aio_iiro_16_dio_insn_bits_write.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/extr_aio_iiro_16.c_aio_iiro_16_dio_insn_bits_write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@AIO_IIRO_16_RELAY_0_7 = common local_unnamed_addr global i64 0, align 8
@AIO_IIRO_16_RELAY_8_15 = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @aio_iiro_16_dio_insn_bits_write], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @aio_iiro_16_dio_insn_bits_write(ptr nocapture noundef readonly %0, ptr nocapture noundef %1, ptr nocapture noundef readonly %2, ptr nocapture noundef %3) #0 {
%5 = load i32, ptr %2, align 4, !tbaa !6
%6 = icmp eq i32 %5, 2
br i1 %6, label %10, label %7
7: ; preds = %4
%8 = load i32, ptr @EINVAL, align 4, !tbaa !11
%9 = sub nsw i32 0, %8
br label %37
10: ; preds = %4
%11 = load i32, ptr %3, align 4, !tbaa !11
%12 = icmp eq i32 %11, 0
br i1 %12, label %34, label %13
13: ; preds = %10
%14 = xor i32 %11, -1
%15 = load i32, ptr %1, align 4, !tbaa !12
%16 = and i32 %15, %14
store i32 %16, ptr %1, align 4, !tbaa !12
%17 = load i32, ptr %3, align 4, !tbaa !11
%18 = getelementptr inbounds i8, ptr %3, i64 4
%19 = load i32, ptr %18, align 4, !tbaa !11
%20 = and i32 %19, %17
%21 = or i32 %20, %16
store i32 %21, ptr %1, align 4, !tbaa !12
%22 = and i32 %21, 255
%23 = load i64, ptr %0, align 8, !tbaa !14
%24 = load i64, ptr @AIO_IIRO_16_RELAY_0_7, align 8, !tbaa !17
%25 = add nsw i64 %24, %23
%26 = tail call i32 @outb(i32 noundef %22, i64 noundef %25) #2
%27 = load i32, ptr %1, align 4, !tbaa !12
%28 = lshr i32 %27, 8
%29 = and i32 %28, 255
%30 = load i64, ptr %0, align 8, !tbaa !14
%31 = load i64, ptr @AIO_IIRO_16_RELAY_8_15, align 8, !tbaa !17
%32 = add nsw i64 %31, %30
%33 = tail call i32 @outb(i32 noundef %29, i64 noundef %32) #2
br label %34
34: ; preds = %13, %10
%35 = load i32, ptr %1, align 4, !tbaa !12
%36 = getelementptr inbounds i8, ptr %3, i64 4
store i32 %35, ptr %36, align 4, !tbaa !11
br label %37
37: ; preds = %34, %7
%38 = phi i32 [ %9, %7 ], [ 2, %34 ]
ret i32 %38
}
declare i32 @outb(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"comedi_insn", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"comedi_subdevice", !8, i64 0}
!14 = !{!15, !16, i64 0}
!15 = !{!"comedi_device", !16, i64 0}
!16 = !{!"long", !9, i64 0}
!17 = !{!16, !16, i64 0}
| fastsocket_kernel_drivers_staging_comedi_drivers_extr_aio_iiro_16.c_aio_iiro_16_dio_insn_bits_write |
; ModuleID = 'AnghaBench/linux/drivers/s390/virtio/extr_virtio_ccw.c_virtio_ccw_setup_vq.c'
source_filename = "AnghaBench/linux/drivers/s390/virtio/extr_virtio_ccw.c_virtio_ccw_setup_vq.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.virtio_ccw_device = type { i64, ptr, i32, i32 }
%struct.virtio_ccw_vq_info = type { i32, ptr, i32, ptr }
%struct.TYPE_9__ = type { %struct.TYPE_8__, %struct.TYPE_7__ }
%struct.TYPE_8__ = type { i32, i32, ptr, ptr, ptr }
%struct.TYPE_7__ = type { i32, i32, i32, ptr }
%struct.ccw1 = type { i32, i64, i32, i32 }
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [9 x i8] c"no info\0A\00", align 1
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [15 x i8] c"no info block\0A\00", align 1
@KVM_VIRTIO_CCW_RING_ALIGN = dso_local local_unnamed_addr global i32 0, align 4
@virtio_ccw_kvm_notify = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [7 x i8] c"no vq\0A\00", align 1
@CCW_CMD_SET_VQ = dso_local local_unnamed_addr global i32 0, align 4
@VIRTIO_CCW_DOING_SET_VQ = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [15 x i8] c"SET_VQ failed\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @virtio_ccw_setup_vq], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @virtio_ccw_setup_vq(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, ptr noundef %5) #0 {
%7 = tail call ptr @to_vc_device(ptr noundef %0) #2
%8 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%9 = tail call ptr @kzalloc(i32 noundef 32, i32 noundef %8) #2
%10 = icmp eq ptr %9, null
%11 = getelementptr inbounds %struct.virtio_ccw_device, ptr %7, i64 0, i32 1
%12 = load ptr, ptr %11, align 8, !tbaa !9
br i1 %10, label %87, label %13
13: ; preds = %6
%14 = tail call ptr @ccw_device_dma_zalloc(ptr noundef %12, i32 noundef 56) #2
%15 = getelementptr inbounds %struct.virtio_ccw_vq_info, ptr %9, i64 0, i32 1
store ptr %14, ptr %15, align 8, !tbaa !13
%16 = icmp eq ptr %14, null
br i1 %16, label %17, label %22
17: ; preds = %13
%18 = load ptr, ptr %11, align 8, !tbaa !9
%19 = tail call i32 @dev_warn(ptr noundef %18, ptr noundef nonnull @.str.1) #2
%20 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%21 = sub nsw i32 0, %20
br label %91
22: ; preds = %13
%23 = tail call i32 @virtio_ccw_read_vq_conf(ptr noundef nonnull %7, ptr noundef %5, i32 noundef %1) #2
store i32 %23, ptr %9, align 8, !tbaa !15
%24 = icmp slt i32 %23, 0
br i1 %24, label %91, label %25
25: ; preds = %22
%26 = load i64, ptr %7, align 8, !tbaa !16
%27 = icmp sgt i64 %26, 0
%28 = zext i1 %27 to i32
%29 = load i32, ptr @KVM_VIRTIO_CCW_RING_ALIGN, align 4, !tbaa !5
%30 = load i32, ptr @virtio_ccw_kvm_notify, align 4, !tbaa !5
%31 = tail call ptr @vring_create_virtqueue(i32 noundef %1, i32 noundef %23, i32 noundef %29, ptr noundef %0, i32 noundef 1, i32 noundef %28, i32 noundef %4, i32 noundef %30, ptr noundef %2, ptr noundef %3) #2
%32 = icmp eq ptr %31, null
br i1 %32, label %33, label %38
33: ; preds = %25
%34 = load ptr, ptr %11, align 8, !tbaa !9
%35 = tail call i32 @dev_warn(ptr noundef %34, ptr noundef nonnull @.str.2) #2
%36 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%37 = sub nsw i32 0, %36
br label %91
38: ; preds = %25
%39 = tail call i32 @virtqueue_get_vring_size(ptr noundef nonnull %31) #2
store i32 %39, ptr %9, align 8, !tbaa !15
%40 = tail call ptr @virtqueue_get_desc_addr(ptr noundef nonnull %31) #2
%41 = load i64, ptr %7, align 8, !tbaa !16
%42 = icmp eq i64 %41, 0
%43 = load ptr, ptr %15, align 8, !tbaa !13
br i1 %42, label %44, label %51
44: ; preds = %38
%45 = getelementptr inbounds %struct.TYPE_9__, ptr %43, i64 0, i32 1, i32 3
store ptr %40, ptr %45, align 8, !tbaa !17
%46 = load i32, ptr @KVM_VIRTIO_CCW_RING_ALIGN, align 4, !tbaa !5
%47 = getelementptr inbounds %struct.TYPE_9__, ptr %43, i64 0, i32 1, i32 2
store i32 %46, ptr %47, align 8, !tbaa !21
%48 = getelementptr inbounds %struct.TYPE_9__, ptr %43, i64 0, i32 1
store i32 %1, ptr %48, align 8, !tbaa !22
%49 = load i32, ptr %9, align 8, !tbaa !15
%50 = getelementptr inbounds %struct.TYPE_9__, ptr %43, i64 0, i32 1, i32 1
store i32 %49, ptr %50, align 4, !tbaa !23
br label %63
51: ; preds = %38
%52 = getelementptr inbounds %struct.TYPE_8__, ptr %43, i64 0, i32 4
store ptr %40, ptr %52, align 8, !tbaa !24
store i32 %1, ptr %43, align 8, !tbaa !25
%53 = load i32, ptr %9, align 8, !tbaa !15
%54 = getelementptr inbounds %struct.TYPE_8__, ptr %43, i64 0, i32 1
store i32 %53, ptr %54, align 4, !tbaa !26
%55 = tail call i64 @virtqueue_get_avail_addr(ptr noundef nonnull %31) #2
%56 = inttoptr i64 %55 to ptr
%57 = load ptr, ptr %15, align 8, !tbaa !13
%58 = getelementptr inbounds %struct.TYPE_8__, ptr %57, i64 0, i32 3
store ptr %56, ptr %58, align 8, !tbaa !27
%59 = tail call i64 @virtqueue_get_used_addr(ptr noundef nonnull %31) #2
%60 = inttoptr i64 %59 to ptr
%61 = load ptr, ptr %15, align 8, !tbaa !13
%62 = getelementptr inbounds %struct.TYPE_8__, ptr %61, i64 0, i32 2
store ptr %60, ptr %62, align 8, !tbaa !28
br label %63
63: ; preds = %51, %44
%64 = phi ptr [ %61, %51 ], [ %43, %44 ]
%65 = phi i32 [ 32, %51 ], [ 24, %44 ]
store i32 %65, ptr %5, align 8, !tbaa !29
%66 = load i32, ptr @CCW_CMD_SET_VQ, align 4, !tbaa !5
%67 = getelementptr inbounds %struct.ccw1, ptr %5, i64 0, i32 3
store i32 %66, ptr %67, align 4, !tbaa !31
%68 = getelementptr inbounds %struct.ccw1, ptr %5, i64 0, i32 2
store i32 0, ptr %68, align 8, !tbaa !32
%69 = ptrtoint ptr %64 to i64
%70 = getelementptr inbounds %struct.ccw1, ptr %5, i64 0, i32 1
store i64 %69, ptr %70, align 8, !tbaa !33
%71 = load i32, ptr @VIRTIO_CCW_DOING_SET_VQ, align 4, !tbaa !5
%72 = or i32 %71, %1
%73 = tail call i32 @ccw_io_helper(ptr noundef nonnull %7, ptr noundef nonnull %5, i32 noundef %72) #2
%74 = icmp eq i32 %73, 0
br i1 %74, label %75, label %83
75: ; preds = %63
%76 = getelementptr inbounds %struct.virtio_ccw_vq_info, ptr %9, i64 0, i32 3
store ptr %31, ptr %76, align 8, !tbaa !34
store ptr %9, ptr %31, align 8, !tbaa !35
%77 = getelementptr inbounds %struct.virtio_ccw_device, ptr %7, i64 0, i32 2
%78 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %77, i64 noundef undef) #2
%79 = getelementptr inbounds %struct.virtio_ccw_vq_info, ptr %9, i64 0, i32 2
%80 = getelementptr inbounds %struct.virtio_ccw_device, ptr %7, i64 0, i32 3
%81 = tail call i32 @list_add(ptr noundef nonnull %79, ptr noundef nonnull %80) #2
%82 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %77, i64 noundef undef) #2
br label %100
83: ; preds = %63
%84 = load ptr, ptr %11, align 8, !tbaa !9
%85 = tail call i32 @dev_warn(ptr noundef %84, ptr noundef nonnull @.str.3) #2
%86 = tail call i32 @vring_del_virtqueue(ptr noundef nonnull %31) #2
br label %91
87: ; preds = %6
%88 = tail call i32 @dev_warn(ptr noundef %12, ptr noundef nonnull @.str) #2
%89 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%90 = sub nsw i32 0, %89
br label %96
91: ; preds = %22, %17, %33, %83
%92 = phi i32 [ %73, %83 ], [ %37, %33 ], [ %21, %17 ], [ %23, %22 ]
%93 = load ptr, ptr %11, align 8, !tbaa !9
%94 = load ptr, ptr %15, align 8, !tbaa !13
%95 = tail call i32 @ccw_device_dma_free(ptr noundef %93, ptr noundef %94, i32 noundef 56) #2
br label %96
96: ; preds = %87, %91
%97 = phi i32 [ %92, %91 ], [ %90, %87 ]
%98 = tail call i32 @kfree(ptr noundef %9) #2
%99 = tail call ptr @ERR_PTR(i32 noundef %97) #2
br label %100
100: ; preds = %96, %75
%101 = phi ptr [ %99, %96 ], [ %31, %75 ]
ret ptr %101
}
declare ptr @to_vc_device(ptr noundef) local_unnamed_addr #1
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_warn(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @ccw_device_dma_zalloc(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @virtio_ccw_read_vq_conf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @vring_create_virtqueue(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @virtqueue_get_vring_size(ptr noundef) local_unnamed_addr #1
declare ptr @virtqueue_get_desc_addr(ptr noundef) local_unnamed_addr #1
declare i64 @virtqueue_get_avail_addr(ptr noundef) local_unnamed_addr #1
declare i64 @virtqueue_get_used_addr(ptr noundef) local_unnamed_addr #1
declare i32 @ccw_io_helper(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @list_add(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @vring_del_virtqueue(ptr noundef) local_unnamed_addr #1
declare i32 @ccw_device_dma_free(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
declare ptr @ERR_PTR(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"virtio_ccw_device", !11, i64 0, !12, i64 8, !6, i64 16, !6, i64 20}
!11 = !{!"long", !7, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !12, i64 8}
!14 = !{!"virtio_ccw_vq_info", !6, i64 0, !12, i64 8, !6, i64 16, !12, i64 24}
!15 = !{!14, !6, i64 0}
!16 = !{!10, !11, i64 0}
!17 = !{!18, !12, i64 48}
!18 = !{!"TYPE_9__", !19, i64 0, !20, i64 32}
!19 = !{!"TYPE_8__", !6, i64 0, !6, i64 4, !12, i64 8, !12, i64 16, !12, i64 24}
!20 = !{!"TYPE_7__", !6, i64 0, !6, i64 4, !6, i64 8, !12, i64 16}
!21 = !{!18, !6, i64 40}
!22 = !{!18, !6, i64 32}
!23 = !{!18, !6, i64 36}
!24 = !{!18, !12, i64 24}
!25 = !{!18, !6, i64 0}
!26 = !{!18, !6, i64 4}
!27 = !{!18, !12, i64 16}
!28 = !{!18, !12, i64 8}
!29 = !{!30, !6, i64 0}
!30 = !{!"ccw1", !6, i64 0, !11, i64 8, !6, i64 16, !6, i64 20}
!31 = !{!30, !6, i64 20}
!32 = !{!30, !6, i64 16}
!33 = !{!30, !11, i64 8}
!34 = !{!14, !12, i64 24}
!35 = !{!36, !12, i64 0}
!36 = !{!"virtqueue", !12, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/s390/virtio/extr_virtio_ccw.c_virtio_ccw_setup_vq.c'
source_filename = "AnghaBench/linux/drivers/s390/virtio/extr_virtio_ccw.c_virtio_ccw_setup_vq.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [9 x i8] c"no info\0A\00", align 1
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [15 x i8] c"no info block\0A\00", align 1
@KVM_VIRTIO_CCW_RING_ALIGN = common local_unnamed_addr global i32 0, align 4
@virtio_ccw_kvm_notify = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [7 x i8] c"no vq\0A\00", align 1
@CCW_CMD_SET_VQ = common local_unnamed_addr global i32 0, align 4
@VIRTIO_CCW_DOING_SET_VQ = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [15 x i8] c"SET_VQ failed\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @virtio_ccw_setup_vq], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @virtio_ccw_setup_vq(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, ptr noundef %5) #0 {
%7 = tail call ptr @to_vc_device(ptr noundef %0) #2
%8 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%9 = tail call ptr @kzalloc(i32 noundef 32, i32 noundef %8) #2
%10 = icmp eq ptr %9, null
%11 = getelementptr inbounds i8, ptr %7, i64 8
%12 = load ptr, ptr %11, align 8, !tbaa !10
br i1 %10, label %87, label %13
13: ; preds = %6
%14 = tail call ptr @ccw_device_dma_zalloc(ptr noundef %12, i32 noundef 56) #2
%15 = getelementptr inbounds i8, ptr %9, i64 8
store ptr %14, ptr %15, align 8, !tbaa !14
%16 = icmp eq ptr %14, null
br i1 %16, label %17, label %22
17: ; preds = %13
%18 = load ptr, ptr %11, align 8, !tbaa !10
%19 = tail call i32 @dev_warn(ptr noundef %18, ptr noundef nonnull @.str.1) #2
%20 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%21 = sub nsw i32 0, %20
br label %91
22: ; preds = %13
%23 = tail call i32 @virtio_ccw_read_vq_conf(ptr noundef nonnull %7, ptr noundef %5, i32 noundef %1) #2
store i32 %23, ptr %9, align 8, !tbaa !16
%24 = icmp slt i32 %23, 0
br i1 %24, label %91, label %25
25: ; preds = %22
%26 = load i64, ptr %7, align 8, !tbaa !17
%27 = icmp sgt i64 %26, 0
%28 = zext i1 %27 to i32
%29 = load i32, ptr @KVM_VIRTIO_CCW_RING_ALIGN, align 4, !tbaa !6
%30 = load i32, ptr @virtio_ccw_kvm_notify, align 4, !tbaa !6
%31 = tail call ptr @vring_create_virtqueue(i32 noundef %1, i32 noundef %23, i32 noundef %29, ptr noundef %0, i32 noundef 1, i32 noundef %28, i32 noundef %4, i32 noundef %30, ptr noundef %2, ptr noundef %3) #2
%32 = icmp eq ptr %31, null
br i1 %32, label %33, label %38
33: ; preds = %25
%34 = load ptr, ptr %11, align 8, !tbaa !10
%35 = tail call i32 @dev_warn(ptr noundef %34, ptr noundef nonnull @.str.2) #2
%36 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%37 = sub nsw i32 0, %36
br label %91
38: ; preds = %25
%39 = tail call i32 @virtqueue_get_vring_size(ptr noundef nonnull %31) #2
store i32 %39, ptr %9, align 8, !tbaa !16
%40 = tail call ptr @virtqueue_get_desc_addr(ptr noundef nonnull %31) #2
%41 = load i64, ptr %7, align 8, !tbaa !17
%42 = icmp eq i64 %41, 0
%43 = load ptr, ptr %15, align 8, !tbaa !14
br i1 %42, label %44, label %51
44: ; preds = %38
%45 = getelementptr inbounds i8, ptr %43, i64 48
store ptr %40, ptr %45, align 8, !tbaa !18
%46 = load i32, ptr @KVM_VIRTIO_CCW_RING_ALIGN, align 4, !tbaa !6
%47 = getelementptr inbounds i8, ptr %43, i64 40
store i32 %46, ptr %47, align 8, !tbaa !22
%48 = getelementptr inbounds i8, ptr %43, i64 32
store i32 %1, ptr %48, align 8, !tbaa !23
%49 = load i32, ptr %9, align 8, !tbaa !16
%50 = getelementptr inbounds i8, ptr %43, i64 36
store i32 %49, ptr %50, align 4, !tbaa !24
br label %63
51: ; preds = %38
%52 = getelementptr inbounds i8, ptr %43, i64 24
store ptr %40, ptr %52, align 8, !tbaa !25
store i32 %1, ptr %43, align 8, !tbaa !26
%53 = load i32, ptr %9, align 8, !tbaa !16
%54 = getelementptr inbounds i8, ptr %43, i64 4
store i32 %53, ptr %54, align 4, !tbaa !27
%55 = tail call i64 @virtqueue_get_avail_addr(ptr noundef nonnull %31) #2
%56 = inttoptr i64 %55 to ptr
%57 = load ptr, ptr %15, align 8, !tbaa !14
%58 = getelementptr inbounds i8, ptr %57, i64 16
store ptr %56, ptr %58, align 8, !tbaa !28
%59 = tail call i64 @virtqueue_get_used_addr(ptr noundef nonnull %31) #2
%60 = inttoptr i64 %59 to ptr
%61 = load ptr, ptr %15, align 8, !tbaa !14
%62 = getelementptr inbounds i8, ptr %61, i64 8
store ptr %60, ptr %62, align 8, !tbaa !29
br label %63
63: ; preds = %51, %44
%64 = phi ptr [ %61, %51 ], [ %43, %44 ]
%65 = phi i32 [ 32, %51 ], [ 24, %44 ]
store i32 %65, ptr %5, align 8, !tbaa !30
%66 = load i32, ptr @CCW_CMD_SET_VQ, align 4, !tbaa !6
%67 = getelementptr inbounds i8, ptr %5, i64 20
store i32 %66, ptr %67, align 4, !tbaa !32
%68 = getelementptr inbounds i8, ptr %5, i64 16
store i32 0, ptr %68, align 8, !tbaa !33
%69 = ptrtoint ptr %64 to i64
%70 = getelementptr inbounds i8, ptr %5, i64 8
store i64 %69, ptr %70, align 8, !tbaa !34
%71 = load i32, ptr @VIRTIO_CCW_DOING_SET_VQ, align 4, !tbaa !6
%72 = or i32 %71, %1
%73 = tail call i32 @ccw_io_helper(ptr noundef nonnull %7, ptr noundef nonnull %5, i32 noundef %72) #2
%74 = icmp eq i32 %73, 0
br i1 %74, label %75, label %83
75: ; preds = %63
%76 = getelementptr inbounds i8, ptr %9, i64 24
store ptr %31, ptr %76, align 8, !tbaa !35
store ptr %9, ptr %31, align 8, !tbaa !36
%77 = getelementptr inbounds i8, ptr %7, i64 16
%78 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %77, i64 noundef undef) #2
%79 = getelementptr inbounds i8, ptr %9, i64 16
%80 = getelementptr inbounds i8, ptr %7, i64 20
%81 = tail call i32 @list_add(ptr noundef nonnull %79, ptr noundef nonnull %80) #2
%82 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %77, i64 noundef undef) #2
br label %100
83: ; preds = %63
%84 = load ptr, ptr %11, align 8, !tbaa !10
%85 = tail call i32 @dev_warn(ptr noundef %84, ptr noundef nonnull @.str.3) #2
%86 = tail call i32 @vring_del_virtqueue(ptr noundef nonnull %31) #2
br label %91
87: ; preds = %6
%88 = tail call i32 @dev_warn(ptr noundef %12, ptr noundef nonnull @.str) #2
%89 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%90 = sub nsw i32 0, %89
br label %96
91: ; preds = %22, %17, %33, %83
%92 = phi i32 [ %73, %83 ], [ %37, %33 ], [ %21, %17 ], [ %23, %22 ]
%93 = load ptr, ptr %11, align 8, !tbaa !10
%94 = load ptr, ptr %15, align 8, !tbaa !14
%95 = tail call i32 @ccw_device_dma_free(ptr noundef %93, ptr noundef %94, i32 noundef 56) #2
br label %96
96: ; preds = %87, %91
%97 = phi i32 [ %92, %91 ], [ %90, %87 ]
%98 = tail call i32 @kfree(ptr noundef %9) #2
%99 = tail call ptr @ERR_PTR(i32 noundef %97) #2
br label %100
100: ; preds = %96, %75
%101 = phi ptr [ %99, %96 ], [ %31, %75 ]
ret ptr %101
}
declare ptr @to_vc_device(ptr noundef) local_unnamed_addr #1
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_warn(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @ccw_device_dma_zalloc(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @virtio_ccw_read_vq_conf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @vring_create_virtqueue(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @virtqueue_get_vring_size(ptr noundef) local_unnamed_addr #1
declare ptr @virtqueue_get_desc_addr(ptr noundef) local_unnamed_addr #1
declare i64 @virtqueue_get_avail_addr(ptr noundef) local_unnamed_addr #1
declare i64 @virtqueue_get_used_addr(ptr noundef) local_unnamed_addr #1
declare i32 @ccw_io_helper(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @list_add(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @vring_del_virtqueue(ptr noundef) local_unnamed_addr #1
declare i32 @ccw_device_dma_free(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
declare ptr @ERR_PTR(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 8}
!11 = !{!"virtio_ccw_device", !12, i64 0, !13, i64 8, !7, i64 16, !7, i64 20}
!12 = !{!"long", !8, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !13, i64 8}
!15 = !{!"virtio_ccw_vq_info", !7, i64 0, !13, i64 8, !7, i64 16, !13, i64 24}
!16 = !{!15, !7, i64 0}
!17 = !{!11, !12, i64 0}
!18 = !{!19, !13, i64 48}
!19 = !{!"TYPE_9__", !20, i64 0, !21, i64 32}
!20 = !{!"TYPE_8__", !7, i64 0, !7, i64 4, !13, i64 8, !13, i64 16, !13, i64 24}
!21 = !{!"TYPE_7__", !7, i64 0, !7, i64 4, !7, i64 8, !13, i64 16}
!22 = !{!19, !7, i64 40}
!23 = !{!19, !7, i64 32}
!24 = !{!19, !7, i64 36}
!25 = !{!19, !13, i64 24}
!26 = !{!19, !7, i64 0}
!27 = !{!19, !7, i64 4}
!28 = !{!19, !13, i64 16}
!29 = !{!19, !13, i64 8}
!30 = !{!31, !7, i64 0}
!31 = !{!"ccw1", !7, i64 0, !12, i64 8, !7, i64 16, !7, i64 20}
!32 = !{!31, !7, i64 20}
!33 = !{!31, !7, i64 16}
!34 = !{!31, !12, i64 8}
!35 = !{!15, !13, i64 24}
!36 = !{!37, !13, i64 0}
!37 = !{!"virtqueue", !13, i64 0}
| linux_drivers_s390_virtio_extr_virtio_ccw.c_virtio_ccw_setup_vq |
; ModuleID = 'AnghaBench/freebsd/contrib/gcclibs/libdecnumber/extr_decNumber.c_decNumberRemainder.c'
source_filename = "AnghaBench/freebsd/contrib/gcclibs/libdecnumber/extr_decNumber.c_decNumberRemainder.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@REMAINDER = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef ptr @decNumberRemainder(ptr noundef returned %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
store i64 0, ptr %5, align 8, !tbaa !5
%6 = load i32, ptr @REMAINDER, align 4, !tbaa !9
%7 = call i32 @decDivideOp(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %6, ptr noundef nonnull %5) #3
%8 = load i64, ptr %5, align 8, !tbaa !5
%9 = icmp eq i64 %8, 0
br i1 %9, label %12, label %10
10: ; preds = %4
%11 = call i32 @decStatus(ptr noundef %0, i64 noundef %8, ptr noundef %3) #3
br label %12
12: ; preds = %10, %4
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret ptr %0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @decDivideOp(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @decStatus(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gcclibs/libdecnumber/extr_decNumber.c_decNumberRemainder.c'
source_filename = "AnghaBench/freebsd/contrib/gcclibs/libdecnumber/extr_decNumber.c_decNumberRemainder.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@REMAINDER = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define noundef ptr @decNumberRemainder(ptr noundef returned %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = alloca i64, align 8
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
store i64 0, ptr %5, align 8, !tbaa !6
%6 = load i32, ptr @REMAINDER, align 4, !tbaa !10
%7 = call i32 @decDivideOp(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %6, ptr noundef nonnull %5) #3
%8 = load i64, ptr %5, align 8, !tbaa !6
%9 = icmp eq i64 %8, 0
br i1 %9, label %12, label %10
10: ; preds = %4
%11 = call i32 @decStatus(ptr noundef %0, i64 noundef %8, ptr noundef %3) #3
br label %12
12: ; preds = %10, %4
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret ptr %0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @decDivideOp(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @decStatus(ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| freebsd_contrib_gcclibs_libdecnumber_extr_decNumber.c_decNumberRemainder |
; ModuleID = 'AnghaBench/linux/drivers/usb/mtu3/extr_mtu3_debug.h_ssusb_debugfs_remove_root.c'
source_filename = "AnghaBench/linux/drivers/usb/mtu3/extr_mtu3_debug.h_ssusb_debugfs_remove_root.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ssusb_debugfs_remove_root], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @ssusb_debugfs_remove_root(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/usb/mtu3/extr_mtu3_debug.h_ssusb_debugfs_remove_root.c'
source_filename = "AnghaBench/linux/drivers/usb/mtu3/extr_mtu3_debug.h_ssusb_debugfs_remove_root.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ssusb_debugfs_remove_root], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @ssusb_debugfs_remove_root(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_usb_mtu3_extr_mtu3_debug.h_ssusb_debugfs_remove_root |
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_alpha-mdebug-tdep.c_alpha_mdebug_frame_prev_register.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_alpha-mdebug-tdep.c_alpha_mdebug_frame_prev_register.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.alpha_mdebug_unwind_cache = type { i32, ptr, i32 }
@ALPHA_PC_REGNUM = dso_local local_unnamed_addr global i32 0, align 4
@lval_memory = dso_local local_unnamed_addr global i32 0, align 4
@ALPHA_REGISTER_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@ALPHA_SP_REGNUM = dso_local local_unnamed_addr global i32 0, align 4
@not_lval = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @alpha_mdebug_frame_prev_register], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @alpha_mdebug_frame_prev_register(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7) #0 {
%9 = tail call ptr @alpha_mdebug_frame_unwind_cache(ptr noundef %0, ptr noundef %1) #2
%10 = load i32, ptr @ALPHA_PC_REGNUM, align 4, !tbaa !5
%11 = icmp eq i32 %10, %2
br i1 %11, label %12, label %16
12: ; preds = %8
%13 = getelementptr inbounds %struct.alpha_mdebug_unwind_cache, ptr %9, i64 0, i32 2
%14 = load i32, ptr %13, align 8, !tbaa !9
%15 = tail call i32 @PROC_PC_REG(i32 noundef %14) #2
br label %16
16: ; preds = %12, %8
%17 = phi i32 [ %15, %12 ], [ %2, %8 ]
%18 = getelementptr inbounds %struct.alpha_mdebug_unwind_cache, ptr %9, i64 0, i32 1
%19 = load ptr, ptr %18, align 8, !tbaa !12
%20 = sext i32 %17 to i64
%21 = getelementptr inbounds i64, ptr %19, i64 %20
%22 = load i64, ptr %21, align 8, !tbaa !13
%23 = icmp eq i64 %22, 0
br i1 %23, label %30, label %24
24: ; preds = %16
store i32 0, ptr %3, align 4, !tbaa !5
%25 = load i32, ptr @lval_memory, align 4, !tbaa !5
store i32 %25, ptr %4, align 4, !tbaa !5
store i64 %22, ptr %5, align 8, !tbaa !13
store i32 -1, ptr %6, align 4, !tbaa !5
%26 = icmp eq ptr %7, null
br i1 %26, label %42, label %27
27: ; preds = %24
%28 = load i32, ptr @ALPHA_REGISTER_SIZE, align 4, !tbaa !5
%29 = tail call i32 @get_frame_memory(ptr noundef %0, i64 noundef %22, ptr noundef nonnull %7, i32 noundef %28) #2
br label %42
30: ; preds = %16
%31 = load i32, ptr @ALPHA_SP_REGNUM, align 4, !tbaa !5
%32 = icmp eq i32 %17, %31
br i1 %32, label %33, label %40
33: ; preds = %30
store i32 0, ptr %3, align 4, !tbaa !5
%34 = load i32, ptr @not_lval, align 4, !tbaa !5
store i32 %34, ptr %4, align 4, !tbaa !5
store i64 0, ptr %5, align 8, !tbaa !13
store i32 -1, ptr %6, align 4, !tbaa !5
%35 = icmp eq ptr %7, null
br i1 %35, label %42, label %36
36: ; preds = %33
%37 = load i32, ptr @ALPHA_REGISTER_SIZE, align 4, !tbaa !5
%38 = load i32, ptr %9, align 8, !tbaa !15
%39 = tail call i32 @store_unsigned_integer(ptr noundef nonnull %7, i32 noundef %37, i32 noundef %38) #2
br label %42
40: ; preds = %30
%41 = tail call i32 @frame_register(ptr noundef %0, i32 noundef %17, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7) #2
br label %42
42: ; preds = %33, %36, %24, %27, %40
ret void
}
declare ptr @alpha_mdebug_frame_unwind_cache(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @PROC_PC_REG(i32 noundef) local_unnamed_addr #1
declare i32 @get_frame_memory(ptr noundef, i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @store_unsigned_integer(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @frame_register(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"alpha_mdebug_unwind_cache", !6, i64 0, !11, i64 8, !6, i64 16}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!10, !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_alpha-mdebug-tdep.c_alpha_mdebug_frame_prev_register.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_alpha-mdebug-tdep.c_alpha_mdebug_frame_prev_register.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ALPHA_PC_REGNUM = common local_unnamed_addr global i32 0, align 4
@lval_memory = common local_unnamed_addr global i32 0, align 4
@ALPHA_REGISTER_SIZE = common local_unnamed_addr global i32 0, align 4
@ALPHA_SP_REGNUM = common local_unnamed_addr global i32 0, align 4
@not_lval = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @alpha_mdebug_frame_prev_register], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @alpha_mdebug_frame_prev_register(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7) #0 {
%9 = tail call ptr @alpha_mdebug_frame_unwind_cache(ptr noundef %0, ptr noundef %1) #2
%10 = load i32, ptr @ALPHA_PC_REGNUM, align 4, !tbaa !6
%11 = icmp eq i32 %10, %2
br i1 %11, label %12, label %16
12: ; preds = %8
%13 = getelementptr inbounds i8, ptr %9, i64 16
%14 = load i32, ptr %13, align 8, !tbaa !10
%15 = tail call i32 @PROC_PC_REG(i32 noundef %14) #2
br label %16
16: ; preds = %12, %8
%17 = phi i32 [ %15, %12 ], [ %2, %8 ]
%18 = getelementptr inbounds i8, ptr %9, i64 8
%19 = load ptr, ptr %18, align 8, !tbaa !13
%20 = sext i32 %17 to i64
%21 = getelementptr inbounds i64, ptr %19, i64 %20
%22 = load i64, ptr %21, align 8, !tbaa !14
%23 = icmp eq i64 %22, 0
br i1 %23, label %30, label %24
24: ; preds = %16
store i32 0, ptr %3, align 4, !tbaa !6
%25 = load i32, ptr @lval_memory, align 4, !tbaa !6
store i32 %25, ptr %4, align 4, !tbaa !6
store i64 %22, ptr %5, align 8, !tbaa !14
store i32 -1, ptr %6, align 4, !tbaa !6
%26 = icmp eq ptr %7, null
br i1 %26, label %42, label %27
27: ; preds = %24
%28 = load i32, ptr @ALPHA_REGISTER_SIZE, align 4, !tbaa !6
%29 = tail call i32 @get_frame_memory(ptr noundef %0, i64 noundef %22, ptr noundef nonnull %7, i32 noundef %28) #2
br label %42
30: ; preds = %16
%31 = load i32, ptr @ALPHA_SP_REGNUM, align 4, !tbaa !6
%32 = icmp eq i32 %17, %31
br i1 %32, label %33, label %40
33: ; preds = %30
store i32 0, ptr %3, align 4, !tbaa !6
%34 = load i32, ptr @not_lval, align 4, !tbaa !6
store i32 %34, ptr %4, align 4, !tbaa !6
store i64 0, ptr %5, align 8, !tbaa !14
store i32 -1, ptr %6, align 4, !tbaa !6
%35 = icmp eq ptr %7, null
br i1 %35, label %42, label %36
36: ; preds = %33
%37 = load i32, ptr @ALPHA_REGISTER_SIZE, align 4, !tbaa !6
%38 = load i32, ptr %9, align 8, !tbaa !16
%39 = tail call i32 @store_unsigned_integer(ptr noundef nonnull %7, i32 noundef %37, i32 noundef %38) #2
br label %42
40: ; preds = %30
%41 = tail call i32 @frame_register(ptr noundef %0, i32 noundef %17, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6, ptr noundef %7) #2
br label %42
42: ; preds = %33, %36, %24, %27, %40
ret void
}
declare ptr @alpha_mdebug_frame_unwind_cache(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @PROC_PC_REG(i32 noundef) local_unnamed_addr #1
declare i32 @get_frame_memory(ptr noundef, i64 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @store_unsigned_integer(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @frame_register(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 16}
!11 = !{!"alpha_mdebug_unwind_cache", !7, i64 0, !12, i64 8, !7, i64 16}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!11, !7, i64 0}
| freebsd_contrib_gdb_gdb_extr_alpha-mdebug-tdep.c_alpha_mdebug_frame_prev_register |
; ModuleID = 'AnghaBench/linux/fs/ecryptfs/extr_inode.c___ecryptfs_get_inode.c'
source_filename = "AnghaBench/linux/fs/ecryptfs/extr_inode.c___ecryptfs_get_inode.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.inode = type { i64, i32 }
@EXDEV = dso_local local_unnamed_addr global i32 0, align 4
@ESTALE = dso_local local_unnamed_addr global i32 0, align 4
@ecryptfs_inode_test = dso_local local_unnamed_addr global i32 0, align 4
@ecryptfs_inode_set = dso_local local_unnamed_addr global i32 0, align 4
@EACCES = dso_local local_unnamed_addr global i32 0, align 4
@I_NEW = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @__ecryptfs_get_inode], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @__ecryptfs_get_inode(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = tail call i64 @ecryptfs_superblock_to_lower(ptr noundef %1) #2
%5 = icmp eq i64 %3, %4
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = load i32, ptr @EXDEV, align 4, !tbaa !11
%8 = sub nsw i32 0, %7
%9 = tail call ptr @ERR_PTR(i32 noundef %8) #2
br label %36
10: ; preds = %2
%11 = tail call i32 @igrab(ptr noundef nonnull %0) #2
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %10
%14 = load i32, ptr @ESTALE, align 4, !tbaa !11
%15 = sub nsw i32 0, %14
%16 = tail call ptr @ERR_PTR(i32 noundef %15) #2
br label %36
17: ; preds = %10
%18 = ptrtoint ptr %0 to i64
%19 = load i32, ptr @ecryptfs_inode_test, align 4, !tbaa !11
%20 = load i32, ptr @ecryptfs_inode_set, align 4, !tbaa !11
%21 = tail call ptr @iget5_locked(ptr noundef %1, i64 noundef %18, i32 noundef %19, i32 noundef %20, ptr noundef nonnull %0) #2
%22 = icmp eq ptr %21, null
br i1 %22, label %23, label %28
23: ; preds = %17
%24 = tail call i32 @iput(ptr noundef nonnull %0) #2
%25 = load i32, ptr @EACCES, align 4, !tbaa !11
%26 = sub nsw i32 0, %25
%27 = tail call ptr @ERR_PTR(i32 noundef %26) #2
br label %36
28: ; preds = %17
%29 = getelementptr inbounds %struct.inode, ptr %21, i64 0, i32 1
%30 = load i32, ptr %29, align 8, !tbaa !12
%31 = load i32, ptr @I_NEW, align 4, !tbaa !11
%32 = and i32 %31, %30
%33 = icmp eq i32 %32, 0
br i1 %33, label %34, label %36
34: ; preds = %28
%35 = tail call i32 @iput(ptr noundef nonnull %0) #2
br label %36
36: ; preds = %28, %34, %23, %13, %6
%37 = phi ptr [ %9, %6 ], [ %27, %23 ], [ %16, %13 ], [ %21, %34 ], [ %21, %28 ]
ret ptr %37
}
declare i64 @ecryptfs_superblock_to_lower(ptr noundef) local_unnamed_addr #1
declare ptr @ERR_PTR(i32 noundef) local_unnamed_addr #1
declare i32 @igrab(ptr noundef) local_unnamed_addr #1
declare ptr @iget5_locked(ptr noundef, i64 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @iput(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"inode", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/linux/fs/ecryptfs/extr_inode.c___ecryptfs_get_inode.c'
source_filename = "AnghaBench/linux/fs/ecryptfs/extr_inode.c___ecryptfs_get_inode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EXDEV = common local_unnamed_addr global i32 0, align 4
@ESTALE = common local_unnamed_addr global i32 0, align 4
@ecryptfs_inode_test = common local_unnamed_addr global i32 0, align 4
@ecryptfs_inode_set = common local_unnamed_addr global i32 0, align 4
@EACCES = common local_unnamed_addr global i32 0, align 4
@I_NEW = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @__ecryptfs_get_inode], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @__ecryptfs_get_inode(ptr noundef %0, ptr noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = tail call i64 @ecryptfs_superblock_to_lower(ptr noundef %1) #2
%5 = icmp eq i64 %3, %4
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = load i32, ptr @EXDEV, align 4, !tbaa !12
%8 = sub nsw i32 0, %7
%9 = tail call ptr @ERR_PTR(i32 noundef %8) #2
br label %36
10: ; preds = %2
%11 = tail call i32 @igrab(ptr noundef nonnull %0) #2
%12 = icmp eq i32 %11, 0
br i1 %12, label %13, label %17
13: ; preds = %10
%14 = load i32, ptr @ESTALE, align 4, !tbaa !12
%15 = sub nsw i32 0, %14
%16 = tail call ptr @ERR_PTR(i32 noundef %15) #2
br label %36
17: ; preds = %10
%18 = ptrtoint ptr %0 to i64
%19 = load i32, ptr @ecryptfs_inode_test, align 4, !tbaa !12
%20 = load i32, ptr @ecryptfs_inode_set, align 4, !tbaa !12
%21 = tail call ptr @iget5_locked(ptr noundef %1, i64 noundef %18, i32 noundef %19, i32 noundef %20, ptr noundef nonnull %0) #2
%22 = icmp eq ptr %21, null
br i1 %22, label %23, label %28
23: ; preds = %17
%24 = tail call i32 @iput(ptr noundef nonnull %0) #2
%25 = load i32, ptr @EACCES, align 4, !tbaa !12
%26 = sub nsw i32 0, %25
%27 = tail call ptr @ERR_PTR(i32 noundef %26) #2
br label %36
28: ; preds = %17
%29 = getelementptr inbounds i8, ptr %21, i64 8
%30 = load i32, ptr %29, align 8, !tbaa !13
%31 = load i32, ptr @I_NEW, align 4, !tbaa !12
%32 = and i32 %31, %30
%33 = icmp eq i32 %32, 0
br i1 %33, label %34, label %36
34: ; preds = %28
%35 = tail call i32 @iput(ptr noundef nonnull %0) #2
br label %36
36: ; preds = %28, %34, %23, %13, %6
%37 = phi ptr [ %9, %6 ], [ %27, %23 ], [ %16, %13 ], [ %21, %34 ], [ %21, %28 ]
ret ptr %37
}
declare i64 @ecryptfs_superblock_to_lower(ptr noundef) local_unnamed_addr #1
declare ptr @ERR_PTR(i32 noundef) local_unnamed_addr #1
declare i32 @igrab(ptr noundef) local_unnamed_addr #1
declare ptr @iget5_locked(ptr noundef, i64 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @iput(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"inode", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!7, !11, i64 8}
| linux_fs_ecryptfs_extr_inode.c___ecryptfs_get_inode |
; ModuleID = 'AnghaBench/TDengine/deps/iconv/extr_cns11643_5.h_cns11643_5_mbtowc.c'
source_filename = "AnghaBench/TDengine/deps/iconv/extr_cns11643_5.h_cns11643_5_mbtowc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@cns11643_5_2uni_page21 = dso_local local_unnamed_addr global ptr null, align 8
@cns11643_5_2uni_upages = dso_local local_unnamed_addr global ptr null, align 8
@RET_ILSEQ = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cns11643_5_mbtowc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @cns11643_5_mbtowc(i32 %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef readonly %2, i32 noundef %3) #0 {
%5 = load i8, ptr %2, align 1, !tbaa !5
%6 = zext i8 %5 to i32
%7 = add i8 %5, -33
%8 = icmp ult i8 %7, 92
br i1 %8, label %9, label %42
9: ; preds = %4
%10 = icmp sgt i32 %3, 1
br i1 %10, label %11, label %40
11: ; preds = %9
%12 = getelementptr inbounds i8, ptr %2, i64 1
%13 = load i8, ptr %12, align 1, !tbaa !5
%14 = add i8 %13, -33
%15 = icmp ult i8 %14, 94
br i1 %15, label %16, label %38
16: ; preds = %11
%17 = zext nneg i8 %13 to i32
%18 = mul nuw nsw i32 %6, 94
%19 = add nsw i32 %18, -3135
%20 = add nsw i32 %19, %17
%21 = icmp ult i32 %20, 8603
br i1 %21, label %22, label %38
22: ; preds = %16
%23 = load ptr, ptr @cns11643_5_2uni_page21, align 8, !tbaa !8
%24 = zext nneg i32 %20 to i64
%25 = getelementptr inbounds i16, ptr %23, i64 %24
%26 = load i16, ptr %25, align 2, !tbaa !10
%27 = load ptr, ptr @cns11643_5_2uni_upages, align 8, !tbaa !8
%28 = zext i16 %26 to i32
%29 = lshr i32 %28, 8
%30 = zext nneg i32 %29 to i64
%31 = getelementptr inbounds i16, ptr %27, i64 %30
%32 = load i16, ptr %31, align 2, !tbaa !10
%33 = zext i16 %32 to i32
%34 = and i32 %28, 255
%35 = or i32 %34, %33
%36 = icmp eq i32 %35, 65533
br i1 %36, label %38, label %37
37: ; preds = %22
store i32 %35, ptr %1, align 4, !tbaa !12
br label %44
38: ; preds = %16, %22, %11
%39 = load i32, ptr @RET_ILSEQ, align 4, !tbaa !12
br label %44
40: ; preds = %9
%41 = tail call i32 @RET_TOOFEW(i32 noundef 0) #2
br label %44
42: ; preds = %4
%43 = load i32, ptr @RET_ILSEQ, align 4, !tbaa !12
br label %44
44: ; preds = %37, %38, %42, %40
%45 = phi i32 [ %41, %40 ], [ %43, %42 ], [ %39, %38 ], [ 2, %37 ]
ret i32 %45
}
declare i32 @RET_TOOFEW(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"any pointer", !6, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"short", !6, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !6, i64 0}
| ; ModuleID = 'AnghaBench/TDengine/deps/iconv/extr_cns11643_5.h_cns11643_5_mbtowc.c'
source_filename = "AnghaBench/TDengine/deps/iconv/extr_cns11643_5.h_cns11643_5_mbtowc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@cns11643_5_2uni_page21 = common local_unnamed_addr global ptr null, align 8
@cns11643_5_2uni_upages = common local_unnamed_addr global ptr null, align 8
@RET_ILSEQ = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cns11643_5_mbtowc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @cns11643_5_mbtowc(i32 %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef readonly %2, i32 noundef %3) #0 {
%5 = load i8, ptr %2, align 1, !tbaa !6
%6 = zext i8 %5 to i32
%7 = add i8 %5, -33
%8 = icmp ult i8 %7, 92
br i1 %8, label %9, label %42
9: ; preds = %4
%10 = icmp sgt i32 %3, 1
br i1 %10, label %11, label %40
11: ; preds = %9
%12 = getelementptr inbounds i8, ptr %2, i64 1
%13 = load i8, ptr %12, align 1, !tbaa !6
%14 = add i8 %13, -33
%15 = icmp ult i8 %14, 94
br i1 %15, label %16, label %38
16: ; preds = %11
%17 = zext nneg i8 %13 to i32
%18 = mul nuw nsw i32 %6, 94
%19 = add nsw i32 %18, -3135
%20 = add nsw i32 %19, %17
%21 = icmp ult i32 %20, 8603
br i1 %21, label %22, label %38
22: ; preds = %16
%23 = load ptr, ptr @cns11643_5_2uni_page21, align 8, !tbaa !9
%24 = zext nneg i32 %20 to i64
%25 = getelementptr inbounds i16, ptr %23, i64 %24
%26 = load i16, ptr %25, align 2, !tbaa !11
%27 = load ptr, ptr @cns11643_5_2uni_upages, align 8, !tbaa !9
%28 = zext i16 %26 to i32
%29 = lshr i32 %28, 8
%30 = zext nneg i32 %29 to i64
%31 = getelementptr inbounds i16, ptr %27, i64 %30
%32 = load i16, ptr %31, align 2, !tbaa !11
%33 = zext i16 %32 to i32
%34 = and i32 %28, 255
%35 = or i32 %34, %33
%36 = icmp eq i32 %35, 65533
br i1 %36, label %38, label %37
37: ; preds = %22
store i32 %35, ptr %1, align 4, !tbaa !13
br label %44
38: ; preds = %16, %22, %11
%39 = load i32, ptr @RET_ILSEQ, align 4, !tbaa !13
br label %44
40: ; preds = %9
%41 = tail call i32 @RET_TOOFEW(i32 noundef 0) #2
br label %44
42: ; preds = %4
%43 = load i32, ptr @RET_ILSEQ, align 4, !tbaa !13
br label %44
44: ; preds = %37, %38, %42, %40
%45 = phi i32 [ %41, %40 ], [ %43, %42 ], [ %39, %38 ], [ 2, %37 ]
ret i32 %45
}
declare i32 @RET_TOOFEW(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"short", !7, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !7, i64 0}
| TDengine_deps_iconv_extr_cns11643_5.h_cns11643_5_mbtowc |
; ModuleID = 'AnghaBench/tig/src/extr_argv.c_format_append_arg.c'
source_filename = "AnghaBench/tig/src/extr_argv.c_format_append_arg.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.format_context = type { i32, i64 }
@.str = private unnamed_addr constant [3 x i8] c"%(\00", align 1
@.str.1 = private unnamed_addr constant [5 x i8] c"%.*s\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @format_append_arg], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @format_append_arg(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = load i32, ptr %0, align 8, !tbaa !5
%5 = tail call i32 @memset(i32 noundef %4, i32 noundef 0, i32 noundef 4) #3
%6 = getelementptr inbounds %struct.format_context, ptr %0, i64 0, i32 1
store i64 0, ptr %6, align 8, !tbaa !11
%7 = icmp eq ptr %2, null
br i1 %7, label %36, label %8
8: ; preds = %3, %34
%9 = phi ptr [ %24, %34 ], [ %2, %3 ]
%10 = tail call ptr @strstr(ptr noundef nonnull dereferenceable(1) %9, ptr noundef nonnull dereferenceable(1) @.str)
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = tail call i32 @strlen(ptr noundef nonnull %9) #3
br label %22
14: ; preds = %8
%15 = tail call ptr @strchr(ptr noundef nonnull %10, i8 noundef signext 41) #3
%16 = icmp eq ptr %15, null
%17 = getelementptr inbounds i8, ptr %15, i64 1
%18 = ptrtoint ptr %10 to i64
%19 = ptrtoint ptr %9 to i64
%20 = sub i64 %18, %19
%21 = trunc i64 %20 to i32
br i1 %16, label %39, label %22
22: ; preds = %12, %14
%23 = phi i32 [ %13, %12 ], [ %21, %14 ]
%24 = phi ptr [ null, %12 ], [ %17, %14 ]
%25 = icmp eq i32 %23, 0
br i1 %25, label %30, label %26
26: ; preds = %22
%27 = load i32, ptr %0, align 8, !tbaa !5
%28 = tail call i32 @string_format_from(i32 noundef %27, ptr noundef nonnull %6, ptr noundef nonnull @.str.1, i32 noundef %23, ptr noundef nonnull %9) #3
%29 = icmp eq i32 %28, 0
br i1 %29, label %39, label %30
30: ; preds = %26, %22
br i1 %11, label %34, label %31
31: ; preds = %30
%32 = tail call i32 @format_expand_arg(ptr noundef nonnull %0, ptr noundef nonnull %10, ptr noundef %24) #3
%33 = icmp eq i32 %32, 0
br i1 %33, label %39, label %34
34: ; preds = %30, %31
%35 = icmp eq ptr %24, null
br i1 %35, label %36, label %8
36: ; preds = %34, %3
%37 = load i32, ptr %0, align 8, !tbaa !5
%38 = tail call i32 @argv_append(ptr noundef %1, i32 noundef %37) #3
br label %39
39: ; preds = %31, %26, %14, %36
%40 = phi i32 [ %38, %36 ], [ 0, %14 ], [ 0, %26 ], [ 0, %31 ]
ret i32 %40
}
declare i32 @memset(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare ptr @strstr(ptr noundef, ptr nocapture noundef) local_unnamed_addr #2
declare ptr @strchr(ptr noundef, i8 noundef signext) local_unnamed_addr #1
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
declare i32 @string_format_from(i32 noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @format_expand_arg(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @argv_append(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"format_context", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/tig/src/extr_argv.c_format_append_arg.c'
source_filename = "AnghaBench/tig/src/extr_argv.c_format_append_arg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [3 x i8] c"%(\00", align 1
@.str.1 = private unnamed_addr constant [5 x i8] c"%.*s\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @format_append_arg], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @format_append_arg(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = load i32, ptr %0, align 8, !tbaa !6
%5 = tail call i32 @memset(i32 noundef %4, i32 noundef 0, i32 noundef 4) #3
%6 = getelementptr inbounds i8, ptr %0, i64 8
store i64 0, ptr %6, align 8, !tbaa !12
%7 = icmp eq ptr %2, null
br i1 %7, label %36, label %8
8: ; preds = %3, %34
%9 = phi ptr [ %24, %34 ], [ %2, %3 ]
%10 = tail call ptr @strstr(ptr noundef nonnull dereferenceable(1) %9, ptr noundef nonnull dereferenceable(1) @.str)
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %14
12: ; preds = %8
%13 = tail call i32 @strlen(ptr noundef nonnull %9) #3
br label %22
14: ; preds = %8
%15 = tail call ptr @strchr(ptr noundef nonnull %10, i8 noundef signext 41) #3
%16 = icmp eq ptr %15, null
%17 = getelementptr inbounds i8, ptr %15, i64 1
%18 = ptrtoint ptr %10 to i64
%19 = ptrtoint ptr %9 to i64
%20 = sub i64 %18, %19
%21 = trunc i64 %20 to i32
br i1 %16, label %39, label %22
22: ; preds = %12, %14
%23 = phi i32 [ %13, %12 ], [ %21, %14 ]
%24 = phi ptr [ null, %12 ], [ %17, %14 ]
%25 = icmp eq i32 %23, 0
br i1 %25, label %30, label %26
26: ; preds = %22
%27 = load i32, ptr %0, align 8, !tbaa !6
%28 = tail call i32 @string_format_from(i32 noundef %27, ptr noundef nonnull %6, ptr noundef nonnull @.str.1, i32 noundef %23, ptr noundef nonnull %9) #3
%29 = icmp eq i32 %28, 0
br i1 %29, label %39, label %30
30: ; preds = %26, %22
br i1 %11, label %34, label %31
31: ; preds = %30
%32 = tail call i32 @format_expand_arg(ptr noundef nonnull %0, ptr noundef nonnull %10, ptr noundef %24) #3
%33 = icmp eq i32 %32, 0
br i1 %33, label %39, label %34
34: ; preds = %30, %31
%35 = icmp eq ptr %24, null
br i1 %35, label %36, label %8
36: ; preds = %34, %3
%37 = load i32, ptr %0, align 8, !tbaa !6
%38 = tail call i32 @argv_append(ptr noundef %1, i32 noundef %37) #3
br label %39
39: ; preds = %31, %26, %14, %36
%40 = phi i32 [ %38, %36 ], [ 0, %14 ], [ 0, %26 ], [ 0, %31 ]
ret i32 %40
}
declare i32 @memset(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare ptr @strstr(ptr noundef, ptr nocapture noundef) local_unnamed_addr #2
declare ptr @strchr(ptr noundef, i8 noundef signext) local_unnamed_addr #1
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
declare i32 @string_format_from(i32 noundef, ptr noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @format_expand_arg(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @argv_append(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"format_context", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !11, i64 8}
| tig_src_extr_argv.c_format_append_arg |
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/ncpfs/extr_ncplib_kernel.c_ncp_ObtainSpecificDirBase.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/ncpfs/extr_ncplib_kernel.c_ncp_ObtainSpecificDirBase.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@RIM_ALL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ncp_ObtainSpecificDirBase], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ncp_ObtainSpecificDirBase(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5, ptr noundef writeonly %6, ptr noundef writeonly %7) #0 {
%9 = tail call i32 @ncp_init_request(ptr noundef %0) #2
%10 = tail call i32 @ncp_add_byte(ptr noundef %0, i32 noundef 6) #2
%11 = tail call i32 @ncp_add_byte(ptr noundef %0, i32 noundef %1) #2
%12 = tail call i32 @ncp_add_byte(ptr noundef %0, i32 noundef %2) #2
%13 = tail call i32 @cpu_to_le16(i32 noundef 32774) #2
%14 = tail call i32 @ncp_add_word(ptr noundef %0, i32 noundef %13) #2
%15 = load i32, ptr @RIM_ALL, align 4, !tbaa !5
%16 = tail call i32 @ncp_add_dword(ptr noundef %0, i32 noundef %15) #2
%17 = tail call i32 @ncp_add_handle_path(ptr noundef %0, i32 noundef %3, i32 noundef %4, i32 noundef 1, ptr noundef %5) #2
%18 = tail call i32 @ncp_request(ptr noundef %0, i32 noundef 87) #2
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %28
20: ; preds = %8
%21 = icmp eq ptr %6, null
br i1 %21, label %24, label %22
22: ; preds = %20
%23 = tail call i32 @ncp_reply_dword(ptr noundef %0, i32 noundef 48) #2
store i32 %23, ptr %6, align 4, !tbaa !5
br label %24
24: ; preds = %22, %20
%25 = icmp eq ptr %7, null
br i1 %25, label %28, label %26
26: ; preds = %24
%27 = tail call i32 @ncp_reply_dword(ptr noundef %0, i32 noundef 52) #2
store i32 %27, ptr %7, align 4, !tbaa !5
br label %28
28: ; preds = %24, %26, %8
%29 = tail call i32 @ncp_unlock_server(ptr noundef %0) #2
ret i32 %18
}
declare i32 @ncp_init_request(ptr noundef) local_unnamed_addr #1
declare i32 @ncp_add_byte(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ncp_add_word(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cpu_to_le16(i32 noundef) local_unnamed_addr #1
declare i32 @ncp_add_dword(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ncp_add_handle_path(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ncp_request(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ncp_unlock_server(ptr noundef) local_unnamed_addr #1
declare i32 @ncp_reply_dword(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/fs/ncpfs/extr_ncplib_kernel.c_ncp_ObtainSpecificDirBase.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/ncpfs/extr_ncplib_kernel.c_ncp_ObtainSpecificDirBase.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RIM_ALL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ncp_ObtainSpecificDirBase], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ncp_ObtainSpecificDirBase(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5, ptr noundef writeonly %6, ptr noundef writeonly %7) #0 {
%9 = tail call i32 @ncp_init_request(ptr noundef %0) #2
%10 = tail call i32 @ncp_add_byte(ptr noundef %0, i32 noundef 6) #2
%11 = tail call i32 @ncp_add_byte(ptr noundef %0, i32 noundef %1) #2
%12 = tail call i32 @ncp_add_byte(ptr noundef %0, i32 noundef %2) #2
%13 = tail call i32 @cpu_to_le16(i32 noundef 32774) #2
%14 = tail call i32 @ncp_add_word(ptr noundef %0, i32 noundef %13) #2
%15 = load i32, ptr @RIM_ALL, align 4, !tbaa !6
%16 = tail call i32 @ncp_add_dword(ptr noundef %0, i32 noundef %15) #2
%17 = tail call i32 @ncp_add_handle_path(ptr noundef %0, i32 noundef %3, i32 noundef %4, i32 noundef 1, ptr noundef %5) #2
%18 = tail call i32 @ncp_request(ptr noundef %0, i32 noundef 87) #2
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %28
20: ; preds = %8
%21 = icmp eq ptr %6, null
br i1 %21, label %24, label %22
22: ; preds = %20
%23 = tail call i32 @ncp_reply_dword(ptr noundef %0, i32 noundef 48) #2
store i32 %23, ptr %6, align 4, !tbaa !6
br label %24
24: ; preds = %22, %20
%25 = icmp eq ptr %7, null
br i1 %25, label %28, label %26
26: ; preds = %24
%27 = tail call i32 @ncp_reply_dword(ptr noundef %0, i32 noundef 52) #2
store i32 %27, ptr %7, align 4, !tbaa !6
br label %28
28: ; preds = %24, %26, %8
%29 = tail call i32 @ncp_unlock_server(ptr noundef %0) #2
ret i32 %18
}
declare i32 @ncp_init_request(ptr noundef) local_unnamed_addr #1
declare i32 @ncp_add_byte(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ncp_add_word(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cpu_to_le16(i32 noundef) local_unnamed_addr #1
declare i32 @ncp_add_dword(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ncp_add_handle_path(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ncp_request(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ncp_unlock_server(ptr noundef) local_unnamed_addr #1
declare i32 @ncp_reply_dword(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_fs_ncpfs_extr_ncplib_kernel.c_ncp_ObtainSpecificDirBase |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/kernel/cpu/mcheck/extr_mce_amd.c_show_error_count.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/kernel/cpu/mcheck/extr_mce_amd.c_show_error_count.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.threshold_block_cross_cpu = type { i32, ptr }
@local_error_count_handler = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [5 x i8] c"%lx\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @show_error_count], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @show_error_count(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca %struct.threshold_block_cross_cpu, align 8
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #3
store i32 0, ptr %3, align 8, !tbaa !5
%4 = getelementptr inbounds %struct.threshold_block_cross_cpu, ptr %3, i64 0, i32 1
store ptr %0, ptr %4, align 8, !tbaa !11
%5 = load i32, ptr %0, align 4, !tbaa !12
%6 = load i32, ptr @local_error_count_handler, align 4, !tbaa !14
%7 = call i32 @smp_call_function_single(i32 noundef %5, i32 noundef %6, ptr noundef nonnull %3, i32 noundef 1) #3
%8 = load i32, ptr %3, align 8, !tbaa !5
%9 = call i32 @sprintf(ptr noundef %1, ptr noundef nonnull @.str, i32 noundef %8) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #3
ret i32 %9
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @smp_call_function_single(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"threshold_block_cross_cpu", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!13, !7, i64 0}
!13 = !{!"threshold_block", !7, i64 0}
!14 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/kernel/cpu/mcheck/extr_mce_amd.c_show_error_count.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/kernel/cpu/mcheck/extr_mce_amd.c_show_error_count.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.threshold_block_cross_cpu = type { i32, ptr }
@local_error_count_handler = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [5 x i8] c"%lx\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @show_error_count], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @show_error_count(ptr noundef %0, ptr noundef %1) #0 {
%3 = alloca %struct.threshold_block_cross_cpu, align 8
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #3
store i32 0, ptr %3, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %3, i64 8
store ptr %0, ptr %4, align 8, !tbaa !12
%5 = load i32, ptr %0, align 4, !tbaa !13
%6 = load i32, ptr @local_error_count_handler, align 4, !tbaa !15
%7 = call i32 @smp_call_function_single(i32 noundef %5, i32 noundef %6, ptr noundef nonnull %3, i32 noundef 1) #3
%8 = load i32, ptr %3, align 8, !tbaa !6
%9 = call i32 @sprintf(ptr noundef %1, ptr noundef nonnull @.str, i32 noundef %8) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #3
ret i32 %9
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @smp_call_function_single(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"threshold_block_cross_cpu", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!14, !8, i64 0}
!14 = !{!"threshold_block", !8, i64 0}
!15 = !{!8, !8, i64 0}
| fastsocket_kernel_arch_x86_kernel_cpu_mcheck_extr_mce_amd.c_show_error_count |
; ModuleID = 'AnghaBench/FFmpeg/libavformat/extr_rtpdec_h264.c_h264_close_context.c'
source_filename = "AnghaBench/FFmpeg/libavformat/extr_rtpdec_h264.c_h264_close_context.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@AV_LOG_DEBUG = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @h264_close_context], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @h264_close_context(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/FFmpeg/libavformat/extr_rtpdec_h264.c_h264_close_context.c'
source_filename = "AnghaBench/FFmpeg/libavformat/extr_rtpdec_h264.c_h264_close_context.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AV_LOG_DEBUG = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @h264_close_context], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @h264_close_context(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| FFmpeg_libavformat_extr_rtpdec_h264.c_h264_close_context |
; ModuleID = 'AnghaBench/git/extr_editor.c_is_terminal_dumb.c'
source_filename = "AnghaBench/git/extr_editor.c_is_terminal_dumb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [5 x i8] c"TERM\00", align 1
@.str.1 = private unnamed_addr constant [5 x i8] c"dumb\00", align 1
; Function Attrs: nofree nounwind memory(read) uwtable
define dso_local i32 @is_terminal_dumb() local_unnamed_addr #0 {
%1 = tail call ptr @getenv(ptr noundef nonnull @.str)
%2 = icmp eq ptr %1, null
br i1 %2, label %7, label %3
3: ; preds = %0
%4 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %1, ptr noundef nonnull dereferenceable(5) @.str.1)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %0
%8 = phi i32 [ 1, %0 ], [ %6, %3 ]
ret i32 %8
}
; Function Attrs: nofree nounwind memory(read)
declare noundef ptr @getenv(ptr nocapture noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @strcmp(ptr nocapture noundef, ptr nocapture noundef) local_unnamed_addr #2
attributes #0 = { nofree nounwind memory(read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nounwind memory(read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/git/extr_editor.c_is_terminal_dumb.c'
source_filename = "AnghaBench/git/extr_editor.c_is_terminal_dumb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [5 x i8] c"TERM\00", align 1
@.str.1 = private unnamed_addr constant [5 x i8] c"dumb\00", align 1
; Function Attrs: nofree nounwind ssp memory(read) uwtable(sync)
define range(i32 0, 2) i32 @is_terminal_dumb() local_unnamed_addr #0 {
%1 = tail call ptr @getenv(ptr noundef nonnull @.str)
%2 = icmp eq ptr %1, null
br i1 %2, label %7, label %3
3: ; preds = %0
%4 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %1, ptr noundef nonnull dereferenceable(5) @.str.1)
%5 = icmp eq i32 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %0
%8 = phi i32 [ 1, %0 ], [ %6, %3 ]
ret i32 %8
}
; Function Attrs: nofree nounwind memory(read)
declare noundef ptr @getenv(ptr nocapture noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @strcmp(ptr nocapture noundef, ptr nocapture noundef) local_unnamed_addr #2
attributes #0 = { nofree nounwind ssp memory(read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nofree nounwind memory(read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| git_extr_editor.c_is_terminal_dumb |
; ModuleID = 'AnghaBench/freebsd/cddl/contrib/opensolaris/cmd/zhack/extr_zhack.c_zhack_spa_open.c'
source_filename = "AnghaBench/freebsd/cddl/contrib/opensolaris/cmd/zhack/extr_zhack.c_zhack_spa_open.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@B_TRUE = dso_local local_unnamed_addr global i32 0, align 4
@zfeature_checks_disable = dso_local local_unnamed_addr global i32 0, align 4
@B_FALSE = dso_local local_unnamed_addr global i32 0, align 4
@FTAG = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [21 x i8] c"cannot open '%s': %s\00", align 1
@SPA_VERSION_FEATURES = dso_local local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [42 x i8] c"'%s' has version %d, features not enabled\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @zhack_spa_open], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @zhack_spa_open(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = tail call i32 @import_pool(ptr noundef %0, i32 noundef %1) #2
%6 = load i32, ptr @B_TRUE, align 4, !tbaa !5
store i32 %6, ptr @zfeature_checks_disable, align 4, !tbaa !5
%7 = tail call i32 @spa_open(ptr noundef %0, ptr noundef %3, ptr noundef %2) #2
%8 = load i32, ptr @B_FALSE, align 4, !tbaa !5
store i32 %8, ptr @zfeature_checks_disable, align 4, !tbaa !5
%9 = icmp eq i32 %7, 0
br i1 %9, label %15, label %10
10: ; preds = %4
%11 = load ptr, ptr %3, align 8, !tbaa !9
%12 = load i32, ptr @FTAG, align 4, !tbaa !5
%13 = tail call i32 @strerror(i32 noundef %7) #2
%14 = tail call i32 @fatal(ptr noundef %11, i32 noundef %12, ptr noundef nonnull @.str, ptr noundef %0, i32 noundef %13) #2
br label %15
15: ; preds = %10, %4
%16 = load ptr, ptr %3, align 8, !tbaa !9
%17 = tail call i64 @spa_version(ptr noundef %16) #2
%18 = load i64, ptr @SPA_VERSION_FEATURES, align 8, !tbaa !11
%19 = icmp slt i64 %17, %18
br i1 %19, label %20, label %26
20: ; preds = %15
%21 = load ptr, ptr %3, align 8, !tbaa !9
%22 = load i32, ptr @FTAG, align 4, !tbaa !5
%23 = tail call i64 @spa_version(ptr noundef %21) #2
%24 = trunc i64 %23 to i32
%25 = tail call i32 @fatal(ptr noundef %21, i32 noundef %22, ptr noundef nonnull @.str.1, ptr noundef %0, i32 noundef %24) #2
br label %26
26: ; preds = %20, %15
ret void
}
declare i32 @import_pool(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spa_open(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @fatal(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @strerror(i32 noundef) local_unnamed_addr #1
declare i64 @spa_version(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/cddl/contrib/opensolaris/cmd/zhack/extr_zhack.c_zhack_spa_open.c'
source_filename = "AnghaBench/freebsd/cddl/contrib/opensolaris/cmd/zhack/extr_zhack.c_zhack_spa_open.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@B_TRUE = common local_unnamed_addr global i32 0, align 4
@zfeature_checks_disable = common local_unnamed_addr global i32 0, align 4
@B_FALSE = common local_unnamed_addr global i32 0, align 4
@FTAG = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [21 x i8] c"cannot open '%s': %s\00", align 1
@SPA_VERSION_FEATURES = common local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [42 x i8] c"'%s' has version %d, features not enabled\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @zhack_spa_open], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @zhack_spa_open(ptr noundef %0, i32 noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = tail call i32 @import_pool(ptr noundef %0, i32 noundef %1) #2
%6 = load i32, ptr @B_TRUE, align 4, !tbaa !6
store i32 %6, ptr @zfeature_checks_disable, align 4, !tbaa !6
%7 = tail call i32 @spa_open(ptr noundef %0, ptr noundef %3, ptr noundef %2) #2
%8 = load i32, ptr @B_FALSE, align 4, !tbaa !6
store i32 %8, ptr @zfeature_checks_disable, align 4, !tbaa !6
%9 = icmp eq i32 %7, 0
br i1 %9, label %15, label %10
10: ; preds = %4
%11 = load ptr, ptr %3, align 8, !tbaa !10
%12 = load i32, ptr @FTAG, align 4, !tbaa !6
%13 = tail call i32 @strerror(i32 noundef %7) #2
%14 = tail call i32 @fatal(ptr noundef %11, i32 noundef %12, ptr noundef nonnull @.str, ptr noundef %0, i32 noundef %13) #2
br label %15
15: ; preds = %10, %4
%16 = load ptr, ptr %3, align 8, !tbaa !10
%17 = tail call i64 @spa_version(ptr noundef %16) #2
%18 = load i64, ptr @SPA_VERSION_FEATURES, align 8, !tbaa !12
%19 = icmp slt i64 %17, %18
br i1 %19, label %20, label %26
20: ; preds = %15
%21 = load ptr, ptr %3, align 8, !tbaa !10
%22 = load i32, ptr @FTAG, align 4, !tbaa !6
%23 = tail call i64 @spa_version(ptr noundef %21) #2
%24 = trunc i64 %23 to i32
%25 = tail call i32 @fatal(ptr noundef %21, i32 noundef %22, ptr noundef nonnull @.str.1, ptr noundef %0, i32 noundef %24) #2
br label %26
26: ; preds = %20, %15
ret void
}
declare i32 @import_pool(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spa_open(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @fatal(ptr noundef, i32 noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @strerror(i32 noundef) local_unnamed_addr #1
declare i64 @spa_version(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !8, i64 0}
| freebsd_cddl_contrib_opensolaris_cmd_zhack_extr_zhack.c_zhack_spa_open |
; ModuleID = 'AnghaBench/git/builtin/extr_notes.c_remove_one_note.c'
source_filename = "AnghaBench/git/builtin/extr_notes.c_remove_one_note.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.object_id = type { i32 }
@.str = private unnamed_addr constant [39 x i8] c"Failed to resolve '%s' as a valid ref.\00", align 1
@stderr = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [23 x i8] c"Object %s has no note\0A\00", align 1
@.str.2 = private unnamed_addr constant [29 x i8] c"Removing note for object %s\0A\00", align 1
@IGNORE_MISSING = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @remove_one_note], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @remove_one_note(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = alloca %struct.object_id, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = call i64 @get_oid(ptr noundef %1, ptr noundef nonnull %4) #3
%6 = icmp eq i64 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = call ptr @_(ptr noundef nonnull @.str) #3
%9 = call i32 @error(ptr noundef %8, ptr noundef %1) #3
br label %22
10: ; preds = %3
%11 = load i32, ptr %4, align 4, !tbaa !5
%12 = call i32 @remove_note(ptr noundef %0, i32 noundef %11) #3
%13 = icmp eq i32 %12, 0
%14 = load i32, ptr @stderr, align 4, !tbaa !10
%15 = select i1 %13, ptr @.str.2, ptr @.str.1
%16 = call ptr @_(ptr noundef nonnull %15) #3
%17 = call i32 @fprintf(i32 noundef %14, ptr noundef %16, ptr noundef %1) #3
%18 = load i32, ptr @IGNORE_MISSING, align 4, !tbaa !10
%19 = and i32 %18, %2
%20 = icmp eq i32 %19, 0
%21 = select i1 %20, i32 %12, i32 0
br label %22
22: ; preds = %10, %7
%23 = phi i32 [ %9, %7 ], [ %21, %10 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %23
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @get_oid(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @error(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @_(ptr noundef) local_unnamed_addr #2
declare i32 @remove_note(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @fprintf(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"object_id", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/git/builtin/extr_notes.c_remove_one_note.c'
source_filename = "AnghaBench/git/builtin/extr_notes.c_remove_one_note.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.object_id = type { i32 }
@.str = private unnamed_addr constant [39 x i8] c"Failed to resolve '%s' as a valid ref.\00", align 1
@stderr = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [23 x i8] c"Object %s has no note\0A\00", align 1
@.str.2 = private unnamed_addr constant [29 x i8] c"Removing note for object %s\0A\00", align 1
@IGNORE_MISSING = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @remove_one_note], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @remove_one_note(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = alloca %struct.object_id, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%5 = call i64 @get_oid(ptr noundef %1, ptr noundef nonnull %4) #3
%6 = icmp eq i64 %5, 0
br i1 %6, label %10, label %7
7: ; preds = %3
%8 = call ptr @_(ptr noundef nonnull @.str) #3
%9 = call i32 @error(ptr noundef %8, ptr noundef %1) #3
br label %22
10: ; preds = %3
%11 = load i32, ptr %4, align 4, !tbaa !6
%12 = call i32 @remove_note(ptr noundef %0, i32 noundef %11) #3
%13 = icmp eq i32 %12, 0
%14 = load i32, ptr @stderr, align 4, !tbaa !11
%15 = select i1 %13, ptr @.str.2, ptr @.str.1
%16 = call ptr @_(ptr noundef nonnull %15) #3
%17 = call i32 @fprintf(i32 noundef %14, ptr noundef %16, ptr noundef %1) #3
%18 = load i32, ptr @IGNORE_MISSING, align 4, !tbaa !11
%19 = and i32 %18, %2
%20 = icmp eq i32 %19, 0
%21 = select i1 %20, i32 %12, i32 0
br label %22
22: ; preds = %10, %7
%23 = phi i32 [ %9, %7 ], [ %21, %10 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
ret i32 %23
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @get_oid(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @error(ptr noundef, ptr noundef) local_unnamed_addr #2
declare ptr @_(ptr noundef) local_unnamed_addr #2
declare i32 @remove_note(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @fprintf(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"object_id", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| git_builtin_extr_notes.c_remove_one_note |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_hw-ops.h_ath9k_hw_ani_control.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_hw-ops.h_ath9k_hw_ani_control.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @ath9k_hw_ani_control], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @ath9k_hw_ani_control(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = tail call ptr @ath9k_hw_private_ops(ptr noundef %0) #2
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = tail call i32 %5(ptr noundef %0, i32 noundef %1, i32 noundef %2) #2
ret i32 %6
}
declare ptr @ath9k_hw_private_ops(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_hw-ops.h_ath9k_hw_ani_control.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/ath/ath9k/extr_hw-ops.h_ath9k_hw_ani_control.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ath9k_hw_ani_control], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @ath9k_hw_ani_control(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = tail call ptr @ath9k_hw_private_ops(ptr noundef %0) #2
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = tail call i32 %5(ptr noundef %0, i32 noundef %1, i32 noundef %2) #2
ret i32 %6
}
declare ptr @ath9k_hw_private_ops(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_net_wireless_ath_ath9k_extr_hw-ops.h_ath9k_hw_ani_control |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gt/uc/extr_intel_guc_submission.c___guc_client_disable.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gt/uc/extr_intel_guc_submission.c___guc_client_disable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @__guc_client_disable], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @__guc_client_disable(ptr noundef %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = tail call i64 @intel_guc_is_running(i32 noundef %2) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 @destroy_doorbell(ptr noundef nonnull %0) #2
br label %9
7: ; preds = %1
%8 = tail call i32 @__fini_doorbell(ptr noundef nonnull %0) #2
br label %9
9: ; preds = %7, %5
%10 = tail call i32 @guc_stage_desc_fini(ptr noundef nonnull %0) #2
%11 = tail call i32 @guc_proc_desc_fini(ptr noundef nonnull %0) #2
ret void
}
declare i64 @intel_guc_is_running(i32 noundef) local_unnamed_addr #1
declare i32 @destroy_doorbell(ptr noundef) local_unnamed_addr #1
declare i32 @__fini_doorbell(ptr noundef) local_unnamed_addr #1
declare i32 @guc_stage_desc_fini(ptr noundef) local_unnamed_addr #1
declare i32 @guc_proc_desc_fini(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"intel_guc_client", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gt/uc/extr_intel_guc_submission.c___guc_client_disable.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gt/uc/extr_intel_guc_submission.c___guc_client_disable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @__guc_client_disable], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @__guc_client_disable(ptr noundef %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = tail call i64 @intel_guc_is_running(i32 noundef %2) #2
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 @destroy_doorbell(ptr noundef nonnull %0) #2
br label %9
7: ; preds = %1
%8 = tail call i32 @__fini_doorbell(ptr noundef nonnull %0) #2
br label %9
9: ; preds = %7, %5
%10 = tail call i32 @guc_stage_desc_fini(ptr noundef nonnull %0) #2
%11 = tail call i32 @guc_proc_desc_fini(ptr noundef nonnull %0) #2
ret void
}
declare i64 @intel_guc_is_running(i32 noundef) local_unnamed_addr #1
declare i32 @destroy_doorbell(ptr noundef) local_unnamed_addr #1
declare i32 @__fini_doorbell(ptr noundef) local_unnamed_addr #1
declare i32 @guc_stage_desc_fini(ptr noundef) local_unnamed_addr #1
declare i32 @guc_proc_desc_fini(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"intel_guc_client", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_drm_i915_gt_uc_extr_intel_guc_submission.c___guc_client_disable |
; ModuleID = 'AnghaBench/raspberry-pi-os/exercises/lesson04/1/rs/src/extr_sched.c_schedule_tail.c'
source_filename = "AnghaBench/raspberry-pi-os/exercises/lesson04/1/rs/src/extr_sched.c_schedule_tail.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @schedule_tail() local_unnamed_addr #0 {
%1 = tail call i32 (...) @preempt_enable() #2
ret void
}
declare i32 @preempt_enable(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/raspberry-pi-os/exercises/lesson04/1/rs/src/extr_sched.c_schedule_tail.c'
source_filename = "AnghaBench/raspberry-pi-os/exercises/lesson04/1/rs/src/extr_sched.c_schedule_tail.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @schedule_tail() local_unnamed_addr #0 {
%1 = tail call i32 @preempt_enable() #2
ret void
}
declare i32 @preempt_enable(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| raspberry-pi-os_exercises_lesson04_1_rs_src_extr_sched.c_schedule_tail |
; ModuleID = 'AnghaBench/linux/drivers/hid/extr_hid-core.c_item_udata.c'
source_filename = "AnghaBench/linux/drivers/hid/extr_hid-core.c_item_udata.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.hid_item = type { i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32, i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @item_udata], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define internal i32 @item_udata(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
switch i32 %2, label %12 [
i32 1, label %3
i32 2, label %5
i32 4, label %7
]
3: ; preds = %1
%4 = getelementptr inbounds %struct.hid_item, ptr %0, i64 0, i32 1, i32 2
br label %9
5: ; preds = %1
%6 = getelementptr inbounds %struct.hid_item, ptr %0, i64 0, i32 1, i32 1
br label %9
7: ; preds = %1
%8 = getelementptr inbounds %struct.hid_item, ptr %0, i64 0, i32 1
br label %9
9: ; preds = %3, %5, %7
%10 = phi ptr [ %8, %7 ], [ %6, %5 ], [ %4, %3 ]
%11 = load i32, ptr %10, align 4, !tbaa !11
br label %12
12: ; preds = %9, %1
%13 = phi i32 [ 0, %1 ], [ %11, %9 ]
ret i32 %13
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"hid_item", !7, i64 0, !10, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"TYPE_2__", !7, i64 0, !7, i64 4, !7, i64 8}
!11 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/hid/extr_hid-core.c_item_udata.c'
source_filename = "AnghaBench/linux/drivers/hid/extr_hid-core.c_item_udata.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @item_udata], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal i32 @item_udata(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
switch i32 %2, label %9 [
i32 1, label %5
i32 2, label %3
i32 4, label %4
]
3: ; preds = %1
br label %5
4: ; preds = %1
br label %5
5: ; preds = %1, %3, %4
%6 = phi i64 [ 4, %4 ], [ 8, %3 ], [ 12, %1 ]
%7 = getelementptr inbounds i8, ptr %0, i64 %6
%8 = load i32, ptr %7, align 4, !tbaa !12
br label %9
9: ; preds = %5, %1
%10 = phi i32 [ 0, %1 ], [ %8, %5 ]
ret i32 %10
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"hid_item", !8, i64 0, !11, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"TYPE_2__", !8, i64 0, !8, i64 4, !8, i64 8}
!12 = !{!8, !8, i64 0}
| linux_drivers_hid_extr_hid-core.c_item_udata |
; ModuleID = 'AnghaBench/linux/drivers/staging/vc04_services/interface/vchiq_arm/extr_vchiq_core.c_notify_bulks.c'
source_filename = "AnghaBench/linux/drivers/staging/vc04_services/interface/vchiq_arm/extr_vchiq_core.c_notify_bulks.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.vchiq_service = type { %struct.vchiq_bulk_queue, ptr, i32, i64, i32 }
%struct.vchiq_bulk_queue = type { i64, i64, i64, ptr }
%struct.vchiq_bulk = type { i64, i64, i64, ptr, i64 }
%struct.bulk_waiter = type { i64, i32 }
@VCHIQ_SUCCESS = dso_local local_unnamed_addr global i64 0, align 8
@vchiq_core_log_level = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [32 x i8] c"%d: nb:%d %cx - p=%x rn=%x r=%x\00", align 1
@VCHIQ_BULK_ACTUAL_ABORTED = dso_local local_unnamed_addr global i64 0, align 8
@VCHIQ_BULK_TRANSMIT = dso_local local_unnamed_addr global i64 0, align 8
@bulk_tx_count = dso_local local_unnamed_addr global i32 0, align 4
@bulk_tx_bytes = dso_local local_unnamed_addr global i32 0, align 4
@bulk_rx_count = dso_local local_unnamed_addr global i32 0, align 4
@bulk_rx_bytes = dso_local local_unnamed_addr global i32 0, align 4
@bulk_aborted_count = dso_local local_unnamed_addr global i32 0, align 4
@VCHIQ_BULK_MODE_BLOCKING = dso_local local_unnamed_addr global i64 0, align 8
@bulk_waiter_spinlock = dso_local global i32 0, align 4
@VCHIQ_BULK_MODE_CALLBACK = dso_local local_unnamed_addr global i64 0, align 8
@VCHIQ_BULK_TRANSMIT_ABORTED = dso_local local_unnamed_addr global i32 0, align 4
@VCHIQ_BULK_TRANSMIT_DONE = dso_local local_unnamed_addr global i32 0, align 4
@VCHIQ_BULK_RECEIVE_ABORTED = dso_local local_unnamed_addr global i32 0, align 4
@VCHIQ_BULK_RECEIVE_DONE = dso_local local_unnamed_addr global i32 0, align 4
@VCHIQ_RETRY = dso_local local_unnamed_addr global i64 0, align 8
@VCHIQ_POLL_TXNOTIFY = dso_local local_unnamed_addr global i32 0, align 4
@VCHIQ_POLL_RXNOTIFY = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @notify_bulks], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i64 @notify_bulks(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = load i64, ptr @VCHIQ_SUCCESS, align 8, !tbaa !5
%5 = load i32, ptr @vchiq_core_log_level, align 4, !tbaa !9
%6 = getelementptr inbounds %struct.vchiq_service, ptr %0, i64 0, i32 1
%7 = load ptr, ptr %6, align 8, !tbaa !11
%8 = load i32, ptr %7, align 4, !tbaa !15
%9 = getelementptr inbounds %struct.vchiq_service, ptr %0, i64 0, i32 4
%10 = load i32, ptr %9, align 8, !tbaa !17
%11 = icmp eq ptr %1, %0
%12 = select i1 %11, i8 116, i8 114
%13 = load i64, ptr %1, align 8, !tbaa !18
%14 = getelementptr inbounds %struct.vchiq_bulk_queue, ptr %1, i64 0, i32 1
%15 = load i64, ptr %14, align 8, !tbaa !19
%16 = getelementptr inbounds %struct.vchiq_bulk_queue, ptr %1, i64 0, i32 2
%17 = load i64, ptr %16, align 8, !tbaa !20
%18 = tail call i32 @vchiq_log_trace(i32 noundef %5, ptr noundef nonnull @.str, i32 noundef %8, i32 noundef %10, i8 noundef signext %12, i64 noundef %13, i64 noundef %15, i64 noundef %17) #2
%19 = load i64, ptr %1, align 8, !tbaa !18
store i64 %19, ptr %14, align 8, !tbaa !19
%20 = load i64, ptr @VCHIQ_SUCCESS, align 8, !tbaa !5
%21 = icmp eq i64 %4, %20
br i1 %21, label %22, label %117
22: ; preds = %3
%23 = getelementptr inbounds %struct.vchiq_bulk_queue, ptr %1, i64 0, i32 3
%24 = getelementptr inbounds %struct.vchiq_service, ptr %0, i64 0, i32 3
%25 = getelementptr inbounds %struct.vchiq_service, ptr %0, i64 0, i32 2
%26 = load i64, ptr %16, align 8, !tbaa !20
%27 = load i64, ptr %14, align 8, !tbaa !19
%28 = icmp eq i64 %26, %27
br i1 %28, label %112, label %29
29: ; preds = %22, %104
%30 = phi i64 [ %109, %104 ], [ %26, %22 ]
%31 = phi i64 [ %105, %104 ], [ %4, %22 ]
%32 = load ptr, ptr %23, align 8, !tbaa !21
%33 = tail call i64 @BULK_INDEX(i64 noundef %30) #2
%34 = getelementptr inbounds %struct.vchiq_bulk, ptr %32, i64 %33
%35 = getelementptr inbounds %struct.vchiq_bulk, ptr %32, i64 %33, i32 4
%36 = load i64, ptr %35, align 8, !tbaa !22
%37 = icmp eq i64 %36, 0
br i1 %37, label %104, label %38
38: ; preds = %29
%39 = load i64, ptr %24, align 8, !tbaa !24
%40 = icmp eq i64 %39, 0
br i1 %40, label %104, label %41
41: ; preds = %38
%42 = load i64, ptr %34, align 8, !tbaa !25
%43 = load i64, ptr @VCHIQ_BULK_ACTUAL_ABORTED, align 8, !tbaa !5
%44 = icmp eq i64 %42, %43
br i1 %44, label %62, label %45
45: ; preds = %41
%46 = getelementptr inbounds %struct.vchiq_bulk, ptr %32, i64 %33, i32 1
%47 = load i64, ptr %46, align 8, !tbaa !26
%48 = load i64, ptr @VCHIQ_BULK_TRANSMIT, align 8, !tbaa !5
%49 = icmp eq i64 %47, %48
br i1 %49, label %50, label %56
50: ; preds = %45
%51 = load i32, ptr @bulk_tx_count, align 4, !tbaa !9
%52 = tail call i32 @VCHIQ_SERVICE_STATS_INC(ptr noundef nonnull %0, i32 noundef %51) #2
%53 = load i32, ptr @bulk_tx_bytes, align 4, !tbaa !9
%54 = load i64, ptr %34, align 8, !tbaa !25
%55 = tail call i32 @VCHIQ_SERVICE_STATS_ADD(ptr noundef nonnull %0, i32 noundef %53, i64 noundef %54) #2
br label %65
56: ; preds = %45
%57 = load i32, ptr @bulk_rx_count, align 4, !tbaa !9
%58 = tail call i32 @VCHIQ_SERVICE_STATS_INC(ptr noundef nonnull %0, i32 noundef %57) #2
%59 = load i32, ptr @bulk_rx_bytes, align 4, !tbaa !9
%60 = load i64, ptr %34, align 8, !tbaa !25
%61 = tail call i32 @VCHIQ_SERVICE_STATS_ADD(ptr noundef nonnull %0, i32 noundef %59, i64 noundef %60) #2
br label %65
62: ; preds = %41
%63 = load i32, ptr @bulk_aborted_count, align 4, !tbaa !9
%64 = tail call i32 @VCHIQ_SERVICE_STATS_INC(ptr noundef nonnull %0, i32 noundef %63) #2
br label %65
65: ; preds = %50, %56, %62
%66 = getelementptr inbounds %struct.vchiq_bulk, ptr %32, i64 %33, i32 2
%67 = load i64, ptr %66, align 8, !tbaa !27
%68 = load i64, ptr @VCHIQ_BULK_MODE_BLOCKING, align 8, !tbaa !5
%69 = icmp eq i64 %67, %68
br i1 %69, label %70, label %81
70: ; preds = %65
%71 = tail call i32 @spin_lock(ptr noundef nonnull @bulk_waiter_spinlock) #2
%72 = getelementptr inbounds %struct.vchiq_bulk, ptr %32, i64 %33, i32 3
%73 = load ptr, ptr %72, align 8, !tbaa !28
%74 = icmp eq ptr %73, null
br i1 %74, label %79, label %75
75: ; preds = %70
%76 = load i64, ptr %34, align 8, !tbaa !25
store i64 %76, ptr %73, align 8, !tbaa !29
%77 = getelementptr inbounds %struct.bulk_waiter, ptr %73, i64 0, i32 1
%78 = tail call i32 @complete(ptr noundef nonnull %77) #2
br label %79
79: ; preds = %75, %70
%80 = tail call i32 @spin_unlock(ptr noundef nonnull @bulk_waiter_spinlock) #2
br label %104
81: ; preds = %65
%82 = load i64, ptr @VCHIQ_BULK_MODE_CALLBACK, align 8, !tbaa !5
%83 = icmp eq i64 %67, %82
br i1 %83, label %84, label %104
84: ; preds = %81
%85 = getelementptr inbounds %struct.vchiq_bulk, ptr %32, i64 %33, i32 1
%86 = load i64, ptr %85, align 8, !tbaa !26
%87 = load i64, ptr @VCHIQ_BULK_TRANSMIT, align 8, !tbaa !5
%88 = icmp eq i64 %86, %87
%89 = load i64, ptr %34, align 8, !tbaa !25
%90 = load i64, ptr @VCHIQ_BULK_ACTUAL_ABORTED, align 8, !tbaa !5
%91 = icmp eq i64 %89, %90
%92 = load i32, ptr @VCHIQ_BULK_TRANSMIT_ABORTED, align 4
%93 = load i32, ptr @VCHIQ_BULK_RECEIVE_ABORTED, align 4
%94 = select i1 %88, i32 %92, i32 %93
%95 = load i32, ptr @VCHIQ_BULK_TRANSMIT_DONE, align 4
%96 = load i32, ptr @VCHIQ_BULK_RECEIVE_DONE, align 4
%97 = select i1 %88, i32 %95, i32 %96
%98 = select i1 %91, i32 %94, i32 %97
%99 = getelementptr inbounds %struct.vchiq_bulk, ptr %32, i64 %33, i32 3
%100 = load ptr, ptr %99, align 8, !tbaa !28
%101 = tail call i64 @make_service_callback(ptr noundef nonnull %0, i32 noundef %98, ptr noundef null, ptr noundef %100) #2
%102 = load i64, ptr @VCHIQ_RETRY, align 8, !tbaa !5
%103 = icmp eq i64 %101, %102
br i1 %103, label %112, label %104
104: ; preds = %29, %38, %81, %84, %79
%105 = phi i64 [ %31, %79 ], [ %101, %84 ], [ %31, %81 ], [ %31, %38 ], [ %31, %29 ]
%106 = load i64, ptr %16, align 8, !tbaa !20
%107 = add nsw i64 %106, 1
store i64 %107, ptr %16, align 8, !tbaa !20
%108 = tail call i32 @complete(ptr noundef nonnull %25) #2
%109 = load i64, ptr %16, align 8, !tbaa !20
%110 = load i64, ptr %14, align 8, !tbaa !19
%111 = icmp eq i64 %109, %110
br i1 %111, label %112, label %29
112: ; preds = %104, %84, %22
%113 = phi i64 [ %4, %22 ], [ %105, %104 ], [ %101, %84 ]
%114 = icmp eq i32 %2, 0
%115 = load i64, ptr @VCHIQ_SUCCESS, align 8
%116 = select i1 %114, i64 %115, i64 %113
br label %117
117: ; preds = %112, %3
%118 = phi i64 [ %4, %3 ], [ %116, %112 ]
%119 = load i64, ptr @VCHIQ_RETRY, align 8, !tbaa !5
%120 = icmp eq i64 %118, %119
br i1 %120, label %121, label %127
121: ; preds = %117
%122 = load ptr, ptr %6, align 8, !tbaa !11
%123 = load i32, ptr @VCHIQ_POLL_TXNOTIFY, align 4
%124 = load i32, ptr @VCHIQ_POLL_RXNOTIFY, align 4
%125 = select i1 %11, i32 %123, i32 %124
%126 = tail call i32 @request_poll(ptr noundef %122, ptr noundef %0, i32 noundef %125) #2
br label %127
127: ; preds = %121, %117
ret i64 %118
}
declare i32 @vchiq_log_trace(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i8 noundef signext, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @BULK_INDEX(i64 noundef) local_unnamed_addr #1
declare i32 @VCHIQ_SERVICE_STATS_INC(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @VCHIQ_SERVICE_STATS_ADD(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @complete(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i64 @make_service_callback(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @request_poll(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !14, i64 32}
!12 = !{!"vchiq_service", !13, i64 0, !14, i64 32, !10, i64 40, !6, i64 48, !10, i64 56}
!13 = !{!"vchiq_bulk_queue", !6, i64 0, !6, i64 8, !6, i64 16, !14, i64 24}
!14 = !{!"any pointer", !7, i64 0}
!15 = !{!16, !10, i64 0}
!16 = !{!"TYPE_2__", !10, i64 0}
!17 = !{!12, !10, i64 56}
!18 = !{!13, !6, i64 0}
!19 = !{!13, !6, i64 8}
!20 = !{!13, !6, i64 16}
!21 = !{!13, !14, i64 24}
!22 = !{!23, !6, i64 32}
!23 = !{!"vchiq_bulk", !6, i64 0, !6, i64 8, !6, i64 16, !14, i64 24, !6, i64 32}
!24 = !{!12, !6, i64 48}
!25 = !{!23, !6, i64 0}
!26 = !{!23, !6, i64 8}
!27 = !{!23, !6, i64 16}
!28 = !{!23, !14, i64 24}
!29 = !{!30, !6, i64 0}
!30 = !{!"bulk_waiter", !6, i64 0, !10, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/staging/vc04_services/interface/vchiq_arm/extr_vchiq_core.c_notify_bulks.c'
source_filename = "AnghaBench/linux/drivers/staging/vc04_services/interface/vchiq_arm/extr_vchiq_core.c_notify_bulks.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.vchiq_bulk = type { i64, i64, i64, ptr, i64 }
@VCHIQ_SUCCESS = common local_unnamed_addr global i64 0, align 8
@vchiq_core_log_level = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [32 x i8] c"%d: nb:%d %cx - p=%x rn=%x r=%x\00", align 1
@VCHIQ_BULK_ACTUAL_ABORTED = common local_unnamed_addr global i64 0, align 8
@VCHIQ_BULK_TRANSMIT = common local_unnamed_addr global i64 0, align 8
@bulk_tx_count = common local_unnamed_addr global i32 0, align 4
@bulk_tx_bytes = common local_unnamed_addr global i32 0, align 4
@bulk_rx_count = common local_unnamed_addr global i32 0, align 4
@bulk_rx_bytes = common local_unnamed_addr global i32 0, align 4
@bulk_aborted_count = common local_unnamed_addr global i32 0, align 4
@VCHIQ_BULK_MODE_BLOCKING = common local_unnamed_addr global i64 0, align 8
@bulk_waiter_spinlock = common global i32 0, align 4
@VCHIQ_BULK_MODE_CALLBACK = common local_unnamed_addr global i64 0, align 8
@VCHIQ_BULK_TRANSMIT_ABORTED = common local_unnamed_addr global i32 0, align 4
@VCHIQ_BULK_TRANSMIT_DONE = common local_unnamed_addr global i32 0, align 4
@VCHIQ_BULK_RECEIVE_ABORTED = common local_unnamed_addr global i32 0, align 4
@VCHIQ_BULK_RECEIVE_DONE = common local_unnamed_addr global i32 0, align 4
@VCHIQ_RETRY = common local_unnamed_addr global i64 0, align 8
@VCHIQ_POLL_TXNOTIFY = common local_unnamed_addr global i32 0, align 4
@VCHIQ_POLL_RXNOTIFY = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @notify_bulks], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i64 @notify_bulks(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = load i64, ptr @VCHIQ_SUCCESS, align 8, !tbaa !6
%5 = load i32, ptr @vchiq_core_log_level, align 4, !tbaa !10
%6 = getelementptr inbounds i8, ptr %0, i64 32
%7 = load ptr, ptr %6, align 8, !tbaa !12
%8 = load i32, ptr %7, align 4, !tbaa !16
%9 = getelementptr inbounds i8, ptr %0, i64 56
%10 = load i32, ptr %9, align 8, !tbaa !18
%11 = icmp eq ptr %1, %0
%12 = select i1 %11, i8 116, i8 114
%13 = load i64, ptr %1, align 8, !tbaa !19
%14 = getelementptr inbounds i8, ptr %1, i64 8
%15 = load i64, ptr %14, align 8, !tbaa !20
%16 = getelementptr inbounds i8, ptr %1, i64 16
%17 = load i64, ptr %16, align 8, !tbaa !21
%18 = tail call i32 @vchiq_log_trace(i32 noundef %5, ptr noundef nonnull @.str, i32 noundef %8, i32 noundef %10, i8 noundef signext %12, i64 noundef %13, i64 noundef %15, i64 noundef %17) #2
%19 = load i64, ptr %1, align 8, !tbaa !19
store i64 %19, ptr %14, align 8, !tbaa !20
%20 = load i64, ptr @VCHIQ_SUCCESS, align 8, !tbaa !6
%21 = icmp eq i64 %4, %20
br i1 %21, label %22, label %117
22: ; preds = %3
%23 = getelementptr inbounds i8, ptr %1, i64 24
%24 = getelementptr inbounds i8, ptr %0, i64 48
%25 = getelementptr inbounds i8, ptr %0, i64 40
%26 = load i64, ptr %16, align 8, !tbaa !21
%27 = load i64, ptr %14, align 8, !tbaa !20
%28 = icmp eq i64 %26, %27
br i1 %28, label %112, label %29
29: ; preds = %22, %104
%30 = phi i64 [ %109, %104 ], [ %26, %22 ]
%31 = phi i64 [ %105, %104 ], [ %4, %22 ]
%32 = load ptr, ptr %23, align 8, !tbaa !22
%33 = tail call i64 @BULK_INDEX(i64 noundef %30) #2
%34 = getelementptr inbounds %struct.vchiq_bulk, ptr %32, i64 %33
%35 = getelementptr inbounds i8, ptr %34, i64 32
%36 = load i64, ptr %35, align 8, !tbaa !23
%37 = icmp eq i64 %36, 0
br i1 %37, label %104, label %38
38: ; preds = %29
%39 = load i64, ptr %24, align 8, !tbaa !25
%40 = icmp eq i64 %39, 0
br i1 %40, label %104, label %41
41: ; preds = %38
%42 = load i64, ptr %34, align 8, !tbaa !26
%43 = load i64, ptr @VCHIQ_BULK_ACTUAL_ABORTED, align 8, !tbaa !6
%44 = icmp eq i64 %42, %43
br i1 %44, label %62, label %45
45: ; preds = %41
%46 = getelementptr inbounds i8, ptr %34, i64 8
%47 = load i64, ptr %46, align 8, !tbaa !27
%48 = load i64, ptr @VCHIQ_BULK_TRANSMIT, align 8, !tbaa !6
%49 = icmp eq i64 %47, %48
br i1 %49, label %50, label %56
50: ; preds = %45
%51 = load i32, ptr @bulk_tx_count, align 4, !tbaa !10
%52 = tail call i32 @VCHIQ_SERVICE_STATS_INC(ptr noundef nonnull %0, i32 noundef %51) #2
%53 = load i32, ptr @bulk_tx_bytes, align 4, !tbaa !10
%54 = load i64, ptr %34, align 8, !tbaa !26
%55 = tail call i32 @VCHIQ_SERVICE_STATS_ADD(ptr noundef nonnull %0, i32 noundef %53, i64 noundef %54) #2
br label %65
56: ; preds = %45
%57 = load i32, ptr @bulk_rx_count, align 4, !tbaa !10
%58 = tail call i32 @VCHIQ_SERVICE_STATS_INC(ptr noundef nonnull %0, i32 noundef %57) #2
%59 = load i32, ptr @bulk_rx_bytes, align 4, !tbaa !10
%60 = load i64, ptr %34, align 8, !tbaa !26
%61 = tail call i32 @VCHIQ_SERVICE_STATS_ADD(ptr noundef nonnull %0, i32 noundef %59, i64 noundef %60) #2
br label %65
62: ; preds = %41
%63 = load i32, ptr @bulk_aborted_count, align 4, !tbaa !10
%64 = tail call i32 @VCHIQ_SERVICE_STATS_INC(ptr noundef nonnull %0, i32 noundef %63) #2
br label %65
65: ; preds = %50, %56, %62
%66 = getelementptr inbounds i8, ptr %34, i64 16
%67 = load i64, ptr %66, align 8, !tbaa !28
%68 = load i64, ptr @VCHIQ_BULK_MODE_BLOCKING, align 8, !tbaa !6
%69 = icmp eq i64 %67, %68
br i1 %69, label %70, label %81
70: ; preds = %65
%71 = tail call i32 @spin_lock(ptr noundef nonnull @bulk_waiter_spinlock) #2
%72 = getelementptr inbounds i8, ptr %34, i64 24
%73 = load ptr, ptr %72, align 8, !tbaa !29
%74 = icmp eq ptr %73, null
br i1 %74, label %79, label %75
75: ; preds = %70
%76 = load i64, ptr %34, align 8, !tbaa !26
store i64 %76, ptr %73, align 8, !tbaa !30
%77 = getelementptr inbounds i8, ptr %73, i64 8
%78 = tail call i32 @complete(ptr noundef nonnull %77) #2
br label %79
79: ; preds = %75, %70
%80 = tail call i32 @spin_unlock(ptr noundef nonnull @bulk_waiter_spinlock) #2
br label %104
81: ; preds = %65
%82 = load i64, ptr @VCHIQ_BULK_MODE_CALLBACK, align 8, !tbaa !6
%83 = icmp eq i64 %67, %82
br i1 %83, label %84, label %104
84: ; preds = %81
%85 = getelementptr inbounds i8, ptr %34, i64 8
%86 = load i64, ptr %85, align 8, !tbaa !27
%87 = load i64, ptr @VCHIQ_BULK_TRANSMIT, align 8, !tbaa !6
%88 = icmp eq i64 %86, %87
%89 = load i64, ptr %34, align 8, !tbaa !26
%90 = load i64, ptr @VCHIQ_BULK_ACTUAL_ABORTED, align 8, !tbaa !6
%91 = icmp eq i64 %89, %90
%92 = load i32, ptr @VCHIQ_BULK_TRANSMIT_ABORTED, align 4
%93 = load i32, ptr @VCHIQ_BULK_RECEIVE_ABORTED, align 4
%94 = select i1 %88, i32 %92, i32 %93
%95 = load i32, ptr @VCHIQ_BULK_TRANSMIT_DONE, align 4
%96 = load i32, ptr @VCHIQ_BULK_RECEIVE_DONE, align 4
%97 = select i1 %88, i32 %95, i32 %96
%98 = select i1 %91, i32 %94, i32 %97
%99 = getelementptr inbounds i8, ptr %34, i64 24
%100 = load ptr, ptr %99, align 8, !tbaa !29
%101 = tail call i64 @make_service_callback(ptr noundef nonnull %0, i32 noundef %98, ptr noundef null, ptr noundef %100) #2
%102 = load i64, ptr @VCHIQ_RETRY, align 8, !tbaa !6
%103 = icmp eq i64 %101, %102
br i1 %103, label %112, label %104
104: ; preds = %29, %38, %81, %84, %79
%105 = phi i64 [ %31, %79 ], [ %101, %84 ], [ %31, %81 ], [ %31, %38 ], [ %31, %29 ]
%106 = load i64, ptr %16, align 8, !tbaa !21
%107 = add nsw i64 %106, 1
store i64 %107, ptr %16, align 8, !tbaa !21
%108 = tail call i32 @complete(ptr noundef nonnull %25) #2
%109 = load i64, ptr %16, align 8, !tbaa !21
%110 = load i64, ptr %14, align 8, !tbaa !20
%111 = icmp eq i64 %109, %110
br i1 %111, label %112, label %29
112: ; preds = %104, %84, %22
%113 = phi i64 [ %4, %22 ], [ %105, %104 ], [ %101, %84 ]
%114 = icmp eq i32 %2, 0
%115 = load i64, ptr @VCHIQ_SUCCESS, align 8
%116 = select i1 %114, i64 %115, i64 %113
br label %117
117: ; preds = %112, %3
%118 = phi i64 [ %4, %3 ], [ %116, %112 ]
%119 = load i64, ptr @VCHIQ_RETRY, align 8, !tbaa !6
%120 = icmp eq i64 %118, %119
br i1 %120, label %121, label %127
121: ; preds = %117
%122 = load ptr, ptr %6, align 8, !tbaa !12
%123 = load i32, ptr @VCHIQ_POLL_TXNOTIFY, align 4
%124 = load i32, ptr @VCHIQ_POLL_RXNOTIFY, align 4
%125 = select i1 %11, i32 %123, i32 %124
%126 = tail call i32 @request_poll(ptr noundef %122, ptr noundef %0, i32 noundef %125) #2
br label %127
127: ; preds = %121, %117
ret i64 %118
}
declare i32 @vchiq_log_trace(i32 noundef, ptr noundef, i32 noundef, i32 noundef, i8 noundef signext, i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @BULK_INDEX(i64 noundef) local_unnamed_addr #1
declare i32 @VCHIQ_SERVICE_STATS_INC(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @VCHIQ_SERVICE_STATS_ADD(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @complete(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i64 @make_service_callback(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @request_poll(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !15, i64 32}
!13 = !{!"vchiq_service", !14, i64 0, !15, i64 32, !11, i64 40, !7, i64 48, !11, i64 56}
!14 = !{!"vchiq_bulk_queue", !7, i64 0, !7, i64 8, !7, i64 16, !15, i64 24}
!15 = !{!"any pointer", !8, i64 0}
!16 = !{!17, !11, i64 0}
!17 = !{!"TYPE_2__", !11, i64 0}
!18 = !{!13, !11, i64 56}
!19 = !{!14, !7, i64 0}
!20 = !{!14, !7, i64 8}
!21 = !{!14, !7, i64 16}
!22 = !{!14, !15, i64 24}
!23 = !{!24, !7, i64 32}
!24 = !{!"vchiq_bulk", !7, i64 0, !7, i64 8, !7, i64 16, !15, i64 24, !7, i64 32}
!25 = !{!13, !7, i64 48}
!26 = !{!24, !7, i64 0}
!27 = !{!24, !7, i64 8}
!28 = !{!24, !7, i64 16}
!29 = !{!24, !15, i64 24}
!30 = !{!31, !7, i64 0}
!31 = !{!"bulk_waiter", !7, i64 0, !11, i64 8}
| linux_drivers_staging_vc04_services_interface_vchiq_arm_extr_vchiq_core.c_notify_bulks |
; ModuleID = 'AnghaBench/freebsd/crypto/openssh/extr_monitor_wrap.c_mm_is_monitor.c'
source_filename = "AnghaBench/freebsd/crypto/openssh/extr_monitor_wrap.c_mm_is_monitor.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@pmonitor = dso_local local_unnamed_addr global ptr null, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define dso_local i32 @mm_is_monitor() local_unnamed_addr #0 {
%1 = load ptr, ptr @pmonitor, align 8, !tbaa !5
%2 = icmp eq ptr %1, null
br i1 %2, label %7, label %3
3: ; preds = %0
%4 = load i64, ptr %1, align 8, !tbaa !9
%5 = icmp sgt i64 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %0
%8 = phi i32 [ 0, %0 ], [ %6, %3 ]
ret i32 %8
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_2__", !11, i64 0}
!11 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/crypto/openssh/extr_monitor_wrap.c_mm_is_monitor.c'
source_filename = "AnghaBench/freebsd/crypto/openssh/extr_monitor_wrap.c_mm_is_monitor.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@pmonitor = common local_unnamed_addr global ptr null, align 8
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define range(i32 0, 2) i32 @mm_is_monitor() local_unnamed_addr #0 {
%1 = load ptr, ptr @pmonitor, align 8, !tbaa !6
%2 = icmp eq ptr %1, null
br i1 %2, label %7, label %3
3: ; preds = %0
%4 = load i64, ptr %1, align 8, !tbaa !10
%5 = icmp sgt i64 %4, 0
%6 = zext i1 %5 to i32
br label %7
7: ; preds = %3, %0
%8 = phi i32 [ 0, %0 ], [ %6, %3 ]
ret i32 %8
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"long", !8, i64 0}
| freebsd_crypto_openssh_extr_monitor_wrap.c_mm_is_monitor |
; ModuleID = 'AnghaBench/linux/drivers/iio/health/extr_max30100.c_max30100_set_powermode.c'
source_filename = "AnghaBench/linux/drivers/iio/health/extr_max30100.c_max30100_set_powermode.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MAX30100_REG_MODE_CONFIG = dso_local local_unnamed_addr global i32 0, align 4
@MAX30100_REG_MODE_CONFIG_PWR = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @max30100_set_powermode], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @max30100_set_powermode(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = load i32, ptr @MAX30100_REG_MODE_CONFIG, align 4, !tbaa !10
%5 = load i32, ptr @MAX30100_REG_MODE_CONFIG_PWR, align 4
%6 = icmp eq i32 %1, 0
%7 = select i1 %6, i32 %5, i32 0
%8 = tail call i32 @regmap_update_bits(i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %7) #2
ret i32 %8
}
declare i32 @regmap_update_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"max30100_data", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/iio/health/extr_max30100.c_max30100_set_powermode.c'
source_filename = "AnghaBench/linux/drivers/iio/health/extr_max30100.c_max30100_set_powermode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MAX30100_REG_MODE_CONFIG = common local_unnamed_addr global i32 0, align 4
@MAX30100_REG_MODE_CONFIG_PWR = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @max30100_set_powermode], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @max30100_set_powermode(ptr nocapture noundef readonly %0, i32 noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = load i32, ptr @MAX30100_REG_MODE_CONFIG, align 4, !tbaa !11
%5 = load i32, ptr @MAX30100_REG_MODE_CONFIG_PWR, align 4
%6 = icmp eq i32 %1, 0
%7 = select i1 %6, i32 %5, i32 0
%8 = tail call i32 @regmap_update_bits(i32 noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %7) #2
ret i32 %8
}
declare i32 @regmap_update_bits(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"max30100_data", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| linux_drivers_iio_health_extr_max30100.c_max30100_set_powermode |
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_except.c_arh_to_landing_pad.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_except.c_arh_to_landing_pad.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@NULL_RTX = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @arh_to_landing_pad], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @arh_to_landing_pad(ptr nocapture noundef readonly %0, ptr nocapture noundef %1) #0 {
%3 = load i64, ptr %1, align 8, !tbaa !5
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load i32, ptr %0, align 4, !tbaa !9
%7 = load i32, ptr @NULL_RTX, align 4, !tbaa !12
%8 = tail call i64 @alloc_INSN_LIST(i32 noundef %6, i32 noundef %7) #2
store i64 %8, ptr %1, align 8, !tbaa !5
br label %9
9: ; preds = %5, %2
ret void
}
declare i64 @alloc_INSN_LIST(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"eh_region", !11, i64 0}
!11 = !{!"int", !7, i64 0}
!12 = !{!11, !11, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_except.c_arh_to_landing_pad.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_except.c_arh_to_landing_pad.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NULL_RTX = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @arh_to_landing_pad], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @arh_to_landing_pad(ptr nocapture noundef readonly %0, ptr nocapture noundef %1) #0 {
%3 = load i64, ptr %1, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %9
5: ; preds = %2
%6 = load i32, ptr %0, align 4, !tbaa !10
%7 = load i32, ptr @NULL_RTX, align 4, !tbaa !13
%8 = tail call i64 @alloc_INSN_LIST(i32 noundef %6, i32 noundef %7) #2
store i64 %8, ptr %1, align 8, !tbaa !6
br label %9
9: ; preds = %5, %2
ret void
}
declare i64 @alloc_INSN_LIST(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"eh_region", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
| freebsd_contrib_gcc_extr_except.c_arh_to_landing_pad |
; ModuleID = 'AnghaBench/linux/arch/mips/mm/extr_c-r4k.c_local_r4k_flush_cache_page.c'
source_filename = "AnghaBench/linux/arch/mips/mm/extr_c-r4k.c_local_r4k_flush_cache_page.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.flush_cache_page_args = type { i64, i32, ptr }
%struct.vm_area_struct = type { i32, ptr }
@VM_EXEC = dso_local local_unnamed_addr global i32 0, align 4
@R4K_HIT = dso_local local_unnamed_addr global i32 0, align 4
@PAGE_MASK = dso_local local_unnamed_addr global i64 0, align 8
@current = dso_local local_unnamed_addr global ptr null, align 8
@_PAGE_VALID = dso_local local_unnamed_addr global i32 0, align 4
@cpu_has_dc_aliases = dso_local local_unnamed_addr global i64 0, align 8
@cpu_has_ic_fills_f_dc = dso_local local_unnamed_addr global i32 0, align 4
@cpu_icache_snoops_remote_store = dso_local local_unnamed_addr global i32 0, align 4
@cpu_has_vtag_icache = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @local_r4k_flush_cache_page], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @local_r4k_flush_cache_page(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds %struct.flush_cache_page_args, ptr %0, i64 0, i32 2
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load i64, ptr %0, align 8, !tbaa !12
%5 = getelementptr inbounds %struct.flush_cache_page_args, ptr %0, i64 0, i32 1
%6 = load i32, ptr %5, align 8, !tbaa !13
%7 = tail call ptr @pfn_to_page(i32 noundef %6) #2
%8 = load i32, ptr %3, align 8, !tbaa !14
%9 = load i32, ptr @VM_EXEC, align 4, !tbaa !16
%10 = and i32 %9, %8
%11 = getelementptr inbounds %struct.vm_area_struct, ptr %3, i64 0, i32 1
%12 = load ptr, ptr %11, align 8, !tbaa !17
%13 = load i32, ptr @R4K_HIT, align 4, !tbaa !16
%14 = tail call i32 @has_valid_asid(ptr noundef %12, i32 noundef %13) #2
%15 = icmp eq i32 %14, 0
br i1 %15, label %102, label %16
16: ; preds = %1
%17 = load i64, ptr @PAGE_MASK, align 8, !tbaa !18
%18 = and i64 %17, %4
%19 = tail call ptr @pgd_offset(ptr noundef %12, i64 noundef %18) #2
%20 = tail call ptr @pud_offset(ptr noundef %19, i64 noundef %18) #2
%21 = tail call ptr @pmd_offset(ptr noundef %20, i64 noundef %18) #2
%22 = tail call ptr @pte_offset(ptr noundef %21, i64 noundef %18) #2
%23 = load i32, ptr %22, align 4, !tbaa !16
%24 = tail call i32 @pte_present(i32 noundef %23) #2
%25 = icmp eq i32 %24, 0
br i1 %25, label %102, label %26
26: ; preds = %16
%27 = load ptr, ptr @current, align 8, !tbaa !19
%28 = load ptr, ptr %27, align 8, !tbaa !20
%29 = icmp eq ptr %12, %28
br i1 %29, label %30, label %36
30: ; preds = %26
%31 = load i32, ptr %22, align 4, !tbaa !16
%32 = tail call i32 @pte_val(i32 noundef %31) #2
%33 = load i32, ptr @_PAGE_VALID, align 4, !tbaa !16
%34 = and i32 %33, %32
%35 = icmp eq i32 %34, 0
br i1 %35, label %36, label %53
36: ; preds = %30, %26
%37 = load i64, ptr @cpu_has_dc_aliases, align 8, !tbaa !18
%38 = icmp eq i64 %37, 0
br i1 %38, label %47, label %39
39: ; preds = %36
%40 = tail call i64 @page_mapcount(ptr noundef %7) #2
%41 = icmp eq i64 %40, 0
br i1 %41, label %47, label %42
42: ; preds = %39
%43 = tail call i32 @Page_dcache_dirty(ptr noundef %7) #2
%44 = icmp eq i32 %43, 0
br i1 %44, label %45, label %47
45: ; preds = %42
%46 = tail call ptr @kmap_coherent(ptr noundef %7, i64 noundef %18) #2
br label %49
47: ; preds = %36, %39, %42
%48 = tail call ptr @kmap_atomic(ptr noundef %7) #2
br label %49
49: ; preds = %47, %45
%50 = phi i1 [ false, %45 ], [ true, %47 ]
%51 = phi ptr [ %46, %45 ], [ %48, %47 ]
%52 = ptrtoint ptr %51 to i64
br label %53
53: ; preds = %30, %49
%54 = phi i1 [ %50, %49 ], [ true, %30 ]
%55 = phi i64 [ %52, %49 ], [ %18, %30 ]
%56 = phi ptr [ %51, %49 ], [ null, %30 ]
%57 = load i64, ptr @cpu_has_dc_aliases, align 8, !tbaa !18
%58 = icmp eq i64 %57, 0
br i1 %58, label %59, label %64
59: ; preds = %53
%60 = icmp eq i32 %10, 0
%61 = load i32, ptr @cpu_has_ic_fills_f_dc, align 4
%62 = icmp ne i32 %61, 0
%63 = select i1 %60, i1 true, i1 %62
br i1 %63, label %77, label %64
64: ; preds = %59, %53
%65 = icmp eq ptr %56, null
br i1 %65, label %68, label %66
66: ; preds = %64
%67 = tail call i32 @r4k_blast_dcache_page(i64 noundef %55) #2
br label %70
68: ; preds = %64
%69 = tail call i32 @r4k_blast_dcache_user_page(i64 noundef %55) #2
br label %70
70: ; preds = %68, %66
%71 = icmp eq i32 %10, 0
%72 = load i32, ptr @cpu_icache_snoops_remote_store, align 4
%73 = icmp ne i32 %72, 0
%74 = select i1 %71, i1 true, i1 %73
br i1 %74, label %77, label %75
75: ; preds = %70
%76 = tail call i32 @r4k_blast_scache_page(i64 noundef %55) #2
br label %79
77: ; preds = %70, %59
%78 = icmp eq i32 %10, 0
br i1 %78, label %95, label %79
79: ; preds = %75, %77
%80 = icmp ne ptr %56, null
%81 = load i64, ptr @cpu_has_vtag_icache, align 8
%82 = icmp ne i64 %81, 0
%83 = select i1 %80, i1 %82, i1 false
br i1 %83, label %84, label %90
84: ; preds = %79
%85 = load ptr, ptr @current, align 8, !tbaa !19
%86 = load ptr, ptr %85, align 8, !tbaa !20
%87 = icmp eq ptr %12, %86
br i1 %87, label %88, label %91
88: ; preds = %84
%89 = tail call i32 @drop_mmu_context(ptr noundef %12) #2
br label %97
90: ; preds = %79
br i1 %80, label %91, label %93
91: ; preds = %84, %90
%92 = tail call i32 @r4k_blast_icache_page(i64 noundef %55) #2
br label %97
93: ; preds = %90
%94 = tail call i32 @r4k_blast_icache_user_page(i64 noundef %55) #2
br label %102
95: ; preds = %77
%96 = icmp eq ptr %56, null
br i1 %96, label %102, label %97
97: ; preds = %91, %88, %95
br i1 %54, label %100, label %98
98: ; preds = %97
%99 = tail call i32 (...) @kunmap_coherent() #2
br label %102
100: ; preds = %97
%101 = tail call i32 @kunmap_atomic(ptr noundef nonnull %56) #2
br label %102
102: ; preds = %93, %95, %100, %98, %16, %1
ret void
}
declare ptr @pfn_to_page(i32 noundef) local_unnamed_addr #1
declare i32 @has_valid_asid(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @pgd_offset(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @pud_offset(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @pmd_offset(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @pte_offset(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @pte_present(i32 noundef) local_unnamed_addr #1
declare i32 @pte_val(i32 noundef) local_unnamed_addr #1
declare i64 @page_mapcount(ptr noundef) local_unnamed_addr #1
declare i32 @Page_dcache_dirty(ptr noundef) local_unnamed_addr #1
declare ptr @kmap_coherent(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @kmap_atomic(ptr noundef) local_unnamed_addr #1
declare i32 @r4k_blast_dcache_page(i64 noundef) local_unnamed_addr #1
declare i32 @r4k_blast_dcache_user_page(i64 noundef) local_unnamed_addr #1
declare i32 @r4k_blast_scache_page(i64 noundef) local_unnamed_addr #1
declare i32 @drop_mmu_context(ptr noundef) local_unnamed_addr #1
declare i32 @r4k_blast_icache_page(i64 noundef) local_unnamed_addr #1
declare i32 @r4k_blast_icache_user_page(i64 noundef) local_unnamed_addr #1
declare i32 @kunmap_coherent(...) local_unnamed_addr #1
declare i32 @kunmap_atomic(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 16}
!6 = !{!"flush_cache_page_args", !7, i64 0, !10, i64 8, !11, i64 16}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!6, !7, i64 0}
!13 = !{!6, !10, i64 8}
!14 = !{!15, !10, i64 0}
!15 = !{!"vm_area_struct", !10, i64 0, !11, i64 8}
!16 = !{!10, !10, i64 0}
!17 = !{!15, !11, i64 8}
!18 = !{!7, !7, i64 0}
!19 = !{!11, !11, i64 0}
!20 = !{!21, !11, i64 0}
!21 = !{!"TYPE_2__", !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/arch/mips/mm/extr_c-r4k.c_local_r4k_flush_cache_page.c'
source_filename = "AnghaBench/linux/arch/mips/mm/extr_c-r4k.c_local_r4k_flush_cache_page.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VM_EXEC = common local_unnamed_addr global i32 0, align 4
@R4K_HIT = common local_unnamed_addr global i32 0, align 4
@PAGE_MASK = common local_unnamed_addr global i64 0, align 8
@current = common local_unnamed_addr global ptr null, align 8
@_PAGE_VALID = common local_unnamed_addr global i32 0, align 4
@cpu_has_dc_aliases = common local_unnamed_addr global i64 0, align 8
@cpu_has_ic_fills_f_dc = common local_unnamed_addr global i32 0, align 4
@cpu_icache_snoops_remote_store = common local_unnamed_addr global i32 0, align 4
@cpu_has_vtag_icache = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @local_r4k_flush_cache_page], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @local_r4k_flush_cache_page(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i64, ptr %0, align 8, !tbaa !13
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load i32, ptr %5, align 8, !tbaa !14
%7 = tail call ptr @pfn_to_page(i32 noundef %6) #2
%8 = load i32, ptr %3, align 8, !tbaa !15
%9 = load i32, ptr @VM_EXEC, align 4, !tbaa !17
%10 = and i32 %9, %8
%11 = getelementptr inbounds i8, ptr %3, i64 8
%12 = load ptr, ptr %11, align 8, !tbaa !18
%13 = load i32, ptr @R4K_HIT, align 4, !tbaa !17
%14 = tail call i32 @has_valid_asid(ptr noundef %12, i32 noundef %13) #2
%15 = icmp eq i32 %14, 0
br i1 %15, label %102, label %16
16: ; preds = %1
%17 = load i64, ptr @PAGE_MASK, align 8, !tbaa !19
%18 = and i64 %17, %4
%19 = tail call ptr @pgd_offset(ptr noundef %12, i64 noundef %18) #2
%20 = tail call ptr @pud_offset(ptr noundef %19, i64 noundef %18) #2
%21 = tail call ptr @pmd_offset(ptr noundef %20, i64 noundef %18) #2
%22 = tail call ptr @pte_offset(ptr noundef %21, i64 noundef %18) #2
%23 = load i32, ptr %22, align 4, !tbaa !17
%24 = tail call i32 @pte_present(i32 noundef %23) #2
%25 = icmp eq i32 %24, 0
br i1 %25, label %102, label %26
26: ; preds = %16
%27 = load ptr, ptr @current, align 8, !tbaa !20
%28 = load ptr, ptr %27, align 8, !tbaa !21
%29 = icmp eq ptr %12, %28
br i1 %29, label %30, label %36
30: ; preds = %26
%31 = load i32, ptr %22, align 4, !tbaa !17
%32 = tail call i32 @pte_val(i32 noundef %31) #2
%33 = load i32, ptr @_PAGE_VALID, align 4, !tbaa !17
%34 = and i32 %33, %32
%35 = icmp eq i32 %34, 0
br i1 %35, label %36, label %53
36: ; preds = %30, %26
%37 = load i64, ptr @cpu_has_dc_aliases, align 8, !tbaa !19
%38 = icmp eq i64 %37, 0
br i1 %38, label %47, label %39
39: ; preds = %36
%40 = tail call i64 @page_mapcount(ptr noundef %7) #2
%41 = icmp eq i64 %40, 0
br i1 %41, label %47, label %42
42: ; preds = %39
%43 = tail call i32 @Page_dcache_dirty(ptr noundef %7) #2
%44 = icmp eq i32 %43, 0
br i1 %44, label %45, label %47
45: ; preds = %42
%46 = tail call ptr @kmap_coherent(ptr noundef %7, i64 noundef %18) #2
br label %49
47: ; preds = %36, %39, %42
%48 = tail call ptr @kmap_atomic(ptr noundef %7) #2
br label %49
49: ; preds = %47, %45
%50 = phi i1 [ false, %45 ], [ true, %47 ]
%51 = phi ptr [ %46, %45 ], [ %48, %47 ]
%52 = ptrtoint ptr %51 to i64
br label %53
53: ; preds = %30, %49
%54 = phi i1 [ %50, %49 ], [ true, %30 ]
%55 = phi i64 [ %52, %49 ], [ %18, %30 ]
%56 = phi ptr [ %51, %49 ], [ null, %30 ]
%57 = load i64, ptr @cpu_has_dc_aliases, align 8, !tbaa !19
%58 = icmp eq i64 %57, 0
br i1 %58, label %59, label %64
59: ; preds = %53
%60 = icmp eq i32 %10, 0
%61 = load i32, ptr @cpu_has_ic_fills_f_dc, align 4
%62 = icmp ne i32 %61, 0
%63 = select i1 %60, i1 true, i1 %62
br i1 %63, label %77, label %64
64: ; preds = %59, %53
%65 = icmp eq ptr %56, null
br i1 %65, label %68, label %66
66: ; preds = %64
%67 = tail call i32 @r4k_blast_dcache_page(i64 noundef %55) #2
br label %70
68: ; preds = %64
%69 = tail call i32 @r4k_blast_dcache_user_page(i64 noundef %55) #2
br label %70
70: ; preds = %68, %66
%71 = icmp eq i32 %10, 0
%72 = load i32, ptr @cpu_icache_snoops_remote_store, align 4
%73 = icmp ne i32 %72, 0
%74 = select i1 %71, i1 true, i1 %73
br i1 %74, label %77, label %75
75: ; preds = %70
%76 = tail call i32 @r4k_blast_scache_page(i64 noundef %55) #2
br label %79
77: ; preds = %70, %59
%78 = icmp eq i32 %10, 0
br i1 %78, label %95, label %79
79: ; preds = %75, %77
%80 = icmp ne ptr %56, null
%81 = load i64, ptr @cpu_has_vtag_icache, align 8
%82 = icmp ne i64 %81, 0
%83 = select i1 %80, i1 %82, i1 false
br i1 %83, label %84, label %90
84: ; preds = %79
%85 = load ptr, ptr @current, align 8, !tbaa !20
%86 = load ptr, ptr %85, align 8, !tbaa !21
%87 = icmp eq ptr %12, %86
br i1 %87, label %88, label %91
88: ; preds = %84
%89 = tail call i32 @drop_mmu_context(ptr noundef %12) #2
br label %97
90: ; preds = %79
br i1 %80, label %91, label %93
91: ; preds = %84, %90
%92 = tail call i32 @r4k_blast_icache_page(i64 noundef %55) #2
br label %97
93: ; preds = %90
%94 = tail call i32 @r4k_blast_icache_user_page(i64 noundef %55) #2
br label %102
95: ; preds = %77
%96 = icmp eq ptr %56, null
br i1 %96, label %102, label %97
97: ; preds = %91, %88, %95
br i1 %54, label %100, label %98
98: ; preds = %97
%99 = tail call i32 @kunmap_coherent() #2
br label %102
100: ; preds = %97
%101 = tail call i32 @kunmap_atomic(ptr noundef nonnull %56) #2
br label %102
102: ; preds = %93, %95, %100, %98, %16, %1
ret void
}
declare ptr @pfn_to_page(i32 noundef) local_unnamed_addr #1
declare i32 @has_valid_asid(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @pgd_offset(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @pud_offset(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @pmd_offset(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @pte_offset(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @pte_present(i32 noundef) local_unnamed_addr #1
declare i32 @pte_val(i32 noundef) local_unnamed_addr #1
declare i64 @page_mapcount(ptr noundef) local_unnamed_addr #1
declare i32 @Page_dcache_dirty(ptr noundef) local_unnamed_addr #1
declare ptr @kmap_coherent(ptr noundef, i64 noundef) local_unnamed_addr #1
declare ptr @kmap_atomic(ptr noundef) local_unnamed_addr #1
declare i32 @r4k_blast_dcache_page(i64 noundef) local_unnamed_addr #1
declare i32 @r4k_blast_dcache_user_page(i64 noundef) local_unnamed_addr #1
declare i32 @r4k_blast_scache_page(i64 noundef) local_unnamed_addr #1
declare i32 @drop_mmu_context(ptr noundef) local_unnamed_addr #1
declare i32 @r4k_blast_icache_page(i64 noundef) local_unnamed_addr #1
declare i32 @r4k_blast_icache_user_page(i64 noundef) local_unnamed_addr #1
declare i32 @kunmap_coherent(...) local_unnamed_addr #1
declare i32 @kunmap_atomic(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 16}
!7 = !{!"flush_cache_page_args", !8, i64 0, !11, i64 8, !12, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!7, !8, i64 0}
!14 = !{!7, !11, i64 8}
!15 = !{!16, !11, i64 0}
!16 = !{!"vm_area_struct", !11, i64 0, !12, i64 8}
!17 = !{!11, !11, i64 0}
!18 = !{!16, !12, i64 8}
!19 = !{!8, !8, i64 0}
!20 = !{!12, !12, i64 0}
!21 = !{!22, !12, i64 0}
!22 = !{!"TYPE_2__", !12, i64 0}
| linux_arch_mips_mm_extr_c-r4k.c_local_r4k_flush_cache_page |
; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_genautomata.c_create_ticker.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_genautomata.c_create_ticker.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @create_ticker], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal { i64, i32 } @create_ticker() #0 {
%1 = tail call i32 (...) @get_run_time() #2
%2 = insertvalue { i64, i32 } { i64 0, i32 poison }, i32 %1, 1
ret { i64, i32 } %2
}
declare i32 @get_run_time(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gcc/extr_genautomata.c_create_ticker.c'
source_filename = "AnghaBench/freebsd/contrib/gcc/extr_genautomata.c_create_ticker.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @create_ticker], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal [2 x i64] @create_ticker() #0 {
%1 = tail call i32 @get_run_time() #2
%2 = zext i32 %1 to i64
%3 = insertvalue [2 x i64] [i64 0, i64 poison], i64 %2, 1
ret [2 x i64] %3
}
declare i32 @get_run_time(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_gcc_extr_genautomata.c_create_ticker |
; ModuleID = 'AnghaBench/linux/drivers/md/extr_dm-verity-target.c_verity_iterate_devices.c'
source_filename = "AnghaBench/linux/drivers/md/extr_dm-verity-target.c_verity_iterate_devices.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.dm_target = type { i32, ptr }
%struct.dm_verity = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @verity_iterate_devices], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @verity_iterate_devices(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds %struct.dm_target, ptr %0, i64 0, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = getelementptr inbounds %struct.dm_verity, ptr %5, i64 0, i32 1
%7 = load i32, ptr %6, align 4, !tbaa !11
%8 = load i32, ptr %5, align 4, !tbaa !13
%9 = load i32, ptr %0, align 8, !tbaa !14
%10 = tail call i32 %1(ptr noundef nonnull %0, i32 noundef %7, i32 noundef %8, i32 noundef %9, ptr noundef %2) #1
ret i32 %10
}
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"dm_target", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !7, i64 4}
!12 = !{!"dm_verity", !7, i64 0, !7, i64 4}
!13 = !{!12, !7, i64 0}
!14 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/md/extr_dm-verity-target.c_verity_iterate_devices.c'
source_filename = "AnghaBench/linux/drivers/md/extr_dm-verity-target.c_verity_iterate_devices.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @verity_iterate_devices], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @verity_iterate_devices(ptr noundef %0, ptr nocapture noundef readonly %1, ptr noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %0, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = getelementptr inbounds i8, ptr %5, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !12
%8 = load i32, ptr %5, align 4, !tbaa !14
%9 = load i32, ptr %0, align 8, !tbaa !15
%10 = tail call i32 %1(ptr noundef nonnull %0, i32 noundef %7, i32 noundef %8, i32 noundef %9, ptr noundef %2) #1
ret i32 %10
}
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"dm_target", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 4}
!13 = !{!"dm_verity", !8, i64 0, !8, i64 4}
!14 = !{!13, !8, i64 0}
!15 = !{!7, !8, i64 0}
| linux_drivers_md_extr_dm-verity-target.c_verity_iterate_devices |
; ModuleID = 'AnghaBench/linux/drivers/md/extr_md.c_md_stop.c'
source_filename = "AnghaBench/linux/drivers/md/extr_md.c_md_stop.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mddev = type { i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local void @md_stop(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @__md_stop(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.mddev, ptr %0, i64 0, i32 1
%4 = tail call i32 @bioset_exit(ptr noundef nonnull %3) #2
%5 = tail call i32 @bioset_exit(ptr noundef %0) #2
ret void
}
declare i32 @__md_stop(ptr noundef) local_unnamed_addr #1
declare i32 @bioset_exit(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/md/extr_md.c_md_stop.c'
source_filename = "AnghaBench/linux/drivers/md/extr_md.c_md_stop.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @md_stop(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @__md_stop(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %0, i64 4
%4 = tail call i32 @bioset_exit(ptr noundef nonnull %3) #2
%5 = tail call i32 @bioset_exit(ptr noundef %0) #2
ret void
}
declare i32 @__md_stop(ptr noundef) local_unnamed_addr #1
declare i32 @bioset_exit(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_md_extr_md.c_md_stop |
; ModuleID = 'AnghaBench/esp-idf/components/driver/test/esp32/extr_test_gpio.c_drive_capability_set_get.c'
source_filename = "AnghaBench/esp-idf/components/driver/test/esp32/extr_test_gpio.c_drive_capability_set_get.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@GPIO_DRIVE_CAP_MAX = dso_local local_unnamed_addr global i32 0, align 4
@ESP_ERR_INVALID_ARG = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @drive_capability_set_get], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @drive_capability_set_get(i32 noundef %0, i32 noundef %1) #0 {
%3 = alloca i32, align 4
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%5 = tail call i32 @init_io(i32 noundef %0) #3
store i32 %5, ptr %3, align 4, !tbaa !5
%6 = call i32 @gpio_config(ptr noundef nonnull %3) #3
%7 = call i32 @TEST_ESP_OK(i32 noundef %6) #3
%8 = load i32, ptr @GPIO_DRIVE_CAP_MAX, align 4, !tbaa !5
%9 = call i32 @gpio_set_drive_capability(i32 noundef %0, i32 noundef %8) #3
%10 = load i32, ptr @ESP_ERR_INVALID_ARG, align 4, !tbaa !5
%11 = icmp eq i32 %9, %10
%12 = zext i1 %11 to i32
%13 = call i32 @TEST_ASSERT(i32 noundef %12) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%14 = call i32 @gpio_set_drive_capability(i32 noundef %0, i32 noundef %1) #3
%15 = call i32 @TEST_ESP_OK(i32 noundef %14) #3
%16 = call i32 @gpio_get_drive_capability(i32 noundef %0, ptr noundef nonnull %4) #3
%17 = call i32 @TEST_ESP_OK(i32 noundef %16) #3
%18 = load i32, ptr %4, align 4, !tbaa !5
%19 = call i32 @TEST_ASSERT_EQUAL_INT(i32 noundef %18, i32 noundef %1) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @init_io(i32 noundef) local_unnamed_addr #2
declare i32 @TEST_ESP_OK(i32 noundef) local_unnamed_addr #2
declare i32 @gpio_config(ptr noundef) local_unnamed_addr #2
declare i32 @TEST_ASSERT(i32 noundef) local_unnamed_addr #2
declare i32 @gpio_set_drive_capability(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @gpio_get_drive_capability(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @TEST_ASSERT_EQUAL_INT(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/esp-idf/components/driver/test/esp32/extr_test_gpio.c_drive_capability_set_get.c'
source_filename = "AnghaBench/esp-idf/components/driver/test/esp32/extr_test_gpio.c_drive_capability_set_get.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GPIO_DRIVE_CAP_MAX = common local_unnamed_addr global i32 0, align 4
@ESP_ERR_INVALID_ARG = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @drive_capability_set_get], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @drive_capability_set_get(i32 noundef %0, i32 noundef %1) #0 {
%3 = alloca i32, align 4
%4 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%5 = tail call i32 @init_io(i32 noundef %0) #3
store i32 %5, ptr %3, align 4, !tbaa !6
%6 = call i32 @gpio_config(ptr noundef nonnull %3) #3
%7 = call i32 @TEST_ESP_OK(i32 noundef %6) #3
%8 = load i32, ptr @GPIO_DRIVE_CAP_MAX, align 4, !tbaa !6
%9 = call i32 @gpio_set_drive_capability(i32 noundef %0, i32 noundef %8) #3
%10 = load i32, ptr @ESP_ERR_INVALID_ARG, align 4, !tbaa !6
%11 = icmp eq i32 %9, %10
%12 = zext i1 %11 to i32
%13 = call i32 @TEST_ASSERT(i32 noundef %12) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
%14 = call i32 @gpio_set_drive_capability(i32 noundef %0, i32 noundef %1) #3
%15 = call i32 @TEST_ESP_OK(i32 noundef %14) #3
%16 = call i32 @gpio_get_drive_capability(i32 noundef %0, ptr noundef nonnull %4) #3
%17 = call i32 @TEST_ESP_OK(i32 noundef %16) #3
%18 = load i32, ptr %4, align 4, !tbaa !6
%19 = call i32 @TEST_ASSERT_EQUAL_INT(i32 noundef %18, i32 noundef %1) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @init_io(i32 noundef) local_unnamed_addr #2
declare i32 @TEST_ESP_OK(i32 noundef) local_unnamed_addr #2
declare i32 @gpio_config(ptr noundef) local_unnamed_addr #2
declare i32 @TEST_ASSERT(i32 noundef) local_unnamed_addr #2
declare i32 @gpio_set_drive_capability(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @gpio_get_drive_capability(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @TEST_ASSERT_EQUAL_INT(i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| esp-idf_components_driver_test_esp32_extr_test_gpio.c_drive_capability_set_get |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/bfa/extr_bfa_ioc.c_bfa_dconf_modexit.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/bfa/extr_bfa_ioc.c_bfa_dconf_modexit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@BFA_DCONF_SM_EXIT = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @bfa_dconf_modexit(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @BFA_DCONF_MOD(ptr noundef %0) #2
%3 = load i32, ptr @BFA_DCONF_SM_EXIT, align 4, !tbaa !5
%4 = tail call i32 @bfa_sm_send_event(ptr noundef %2, i32 noundef %3) #2
ret void
}
declare ptr @BFA_DCONF_MOD(ptr noundef) local_unnamed_addr #1
declare i32 @bfa_sm_send_event(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/scsi/bfa/extr_bfa_ioc.c_bfa_dconf_modexit.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/scsi/bfa/extr_bfa_ioc.c_bfa_dconf_modexit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BFA_DCONF_SM_EXIT = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @bfa_dconf_modexit(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @BFA_DCONF_MOD(ptr noundef %0) #2
%3 = load i32, ptr @BFA_DCONF_SM_EXIT, align 4, !tbaa !6
%4 = tail call i32 @bfa_sm_send_event(ptr noundef %2, i32 noundef %3) #2
ret void
}
declare ptr @BFA_DCONF_MOD(ptr noundef) local_unnamed_addr #1
declare i32 @bfa_sm_send_event(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_scsi_bfa_extr_bfa_ioc.c_bfa_dconf_modexit |
; ModuleID = 'AnghaBench/linux/arch/arm/mm/extr_dma-mapping.c_pool_allocator_alloc.c'
source_filename = "AnghaBench/linux/arch/arm/mm/extr_dma-mapping.c_pool_allocator_alloc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @pool_allocator_alloc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @pool_allocator_alloc(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = tail call ptr @__alloc_from_pool(i32 noundef %3, ptr noundef %1) #2
ret ptr %4
}
declare ptr @__alloc_from_pool(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"arm_dma_alloc_args", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/arch/arm/mm/extr_dma-mapping.c_pool_allocator_alloc.c'
source_filename = "AnghaBench/linux/arch/arm/mm/extr_dma-mapping.c_pool_allocator_alloc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pool_allocator_alloc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @pool_allocator_alloc(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = tail call ptr @__alloc_from_pool(i32 noundef %3, ptr noundef %1) #2
ret ptr %4
}
declare ptr @__alloc_from_pool(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"arm_dma_alloc_args", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_arch_arm_mm_extr_dma-mapping.c_pool_allocator_alloc |
; ModuleID = 'AnghaBench/linux/drivers/scsi/esas2r/extr_esas2r_flash.c_fix_efi.c'
source_filename = "AnghaBench/linux/drivers/scsi/esas2r/extr_esas2r_flash.c_fix_efi.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.esas2r_component_header = type { i32, i32 }
%struct.esas2r_boot_header = type { i32, i32 }
@CH_IT_EFI = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @fix_efi], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @fix_efi(ptr nocapture noundef readonly %0, ptr nocapture noundef %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !5
%4 = load i64, ptr @CH_IT_EFI, align 8, !tbaa !10
%5 = getelementptr inbounds %struct.esas2r_component_header, ptr %3, i64 %4
%6 = load i32, ptr %5, align 4, !tbaa !12
%7 = getelementptr inbounds %struct.esas2r_component_header, ptr %3, i64 %4, i32 1
%8 = load i32, ptr %7, align 4, !tbaa !15
br label %9
9: ; preds = %13, %2
%10 = phi i32 [ %8, %2 ], [ %29, %13 ]
%11 = phi i32 [ %6, %2 ], [ %28, %13 ]
%12 = icmp eq i32 %11, 0
br i1 %12, label %30, label %13
13: ; preds = %9
%14 = sext i32 %10 to i64
%15 = getelementptr inbounds i32, ptr %1, i64 %14
%16 = load i32, ptr %15, align 4, !tbaa !16
%17 = tail call i32 @le16_to_cpu(i32 noundef %16) #2
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, ptr %15, i64 %18
%20 = load ptr, ptr %0, align 8, !tbaa !18
%21 = load i32, ptr %20, align 4, !tbaa !20
%22 = tail call i32 @cpu_to_le16(i32 noundef %21) #2
%23 = getelementptr inbounds %struct.esas2r_boot_header, ptr %19, i64 0, i32 1
store i32 %22, ptr %23, align 4, !tbaa !22
%24 = load i32, ptr %19, align 4, !tbaa !24
%25 = tail call i32 @le16_to_cpu(i32 noundef %24) #2
%26 = shl nsw i32 %25, 9
%27 = icmp sgt i32 %26, %11
%28 = sub nsw i32 %11, %26
%29 = add nsw i32 %26, %10
br i1 %27, label %30, label %9
30: ; preds = %13, %9
ret void
}
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #1
declare i32 @cpu_to_le16(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"esas2r_flash_img", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"esas2r_component_header", !14, i64 0, !14, i64 4}
!14 = !{!"int", !8, i64 0}
!15 = !{!13, !14, i64 4}
!16 = !{!17, !14, i64 0}
!17 = !{!"esas2r_efi_image", !14, i64 0}
!18 = !{!19, !7, i64 0}
!19 = !{!"esas2r_adapter", !7, i64 0}
!20 = !{!21, !14, i64 0}
!21 = !{!"TYPE_2__", !14, i64 0}
!22 = !{!23, !14, i64 4}
!23 = !{!"esas2r_boot_header", !14, i64 0, !14, i64 4}
!24 = !{!23, !14, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/esas2r/extr_esas2r_flash.c_fix_efi.c'
source_filename = "AnghaBench/linux/drivers/scsi/esas2r/extr_esas2r_flash.c_fix_efi.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.esas2r_component_header = type { i32, i32 }
@CH_IT_EFI = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @fix_efi], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @fix_efi(ptr nocapture noundef readonly %0, ptr nocapture noundef %1) #0 {
%3 = load ptr, ptr %1, align 8, !tbaa !6
%4 = load i64, ptr @CH_IT_EFI, align 8, !tbaa !11
%5 = getelementptr inbounds %struct.esas2r_component_header, ptr %3, i64 %4
%6 = load i32, ptr %5, align 4, !tbaa !13
%7 = getelementptr inbounds i8, ptr %5, i64 4
%8 = load i32, ptr %7, align 4, !tbaa !16
br label %9
9: ; preds = %13, %2
%10 = phi i32 [ %8, %2 ], [ %29, %13 ]
%11 = phi i32 [ %6, %2 ], [ %28, %13 ]
%12 = icmp eq i32 %11, 0
br i1 %12, label %30, label %13
13: ; preds = %9
%14 = sext i32 %10 to i64
%15 = getelementptr inbounds i32, ptr %1, i64 %14
%16 = load i32, ptr %15, align 4, !tbaa !17
%17 = tail call i32 @le16_to_cpu(i32 noundef %16) #2
%18 = sext i32 %17 to i64
%19 = getelementptr inbounds i32, ptr %15, i64 %18
%20 = load ptr, ptr %0, align 8, !tbaa !19
%21 = load i32, ptr %20, align 4, !tbaa !21
%22 = tail call i32 @cpu_to_le16(i32 noundef %21) #2
%23 = getelementptr inbounds i8, ptr %19, i64 4
store i32 %22, ptr %23, align 4, !tbaa !23
%24 = load i32, ptr %19, align 4, !tbaa !25
%25 = tail call i32 @le16_to_cpu(i32 noundef %24) #2
%26 = shl nsw i32 %25, 9
%27 = icmp sgt i32 %26, %11
%28 = sub nsw i32 %11, %26
%29 = add nsw i32 %26, %10
br i1 %27, label %30, label %9
30: ; preds = %13, %9
ret void
}
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #1
declare i32 @cpu_to_le16(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"esas2r_flash_img", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!14, !15, i64 0}
!14 = !{!"esas2r_component_header", !15, i64 0, !15, i64 4}
!15 = !{!"int", !9, i64 0}
!16 = !{!14, !15, i64 4}
!17 = !{!18, !15, i64 0}
!18 = !{!"esas2r_efi_image", !15, i64 0}
!19 = !{!20, !8, i64 0}
!20 = !{!"esas2r_adapter", !8, i64 0}
!21 = !{!22, !15, i64 0}
!22 = !{!"TYPE_2__", !15, i64 0}
!23 = !{!24, !15, i64 4}
!24 = !{!"esas2r_boot_header", !15, i64 0, !15, i64 4}
!25 = !{!24, !15, i64 0}
| linux_drivers_scsi_esas2r_extr_esas2r_flash.c_fix_efi |
; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_coff-pe-read.c_read_pe_section_index.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_coff-pe-read.c_read_pe_section_index.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [6 x i8] c".text\00", align 1
@PE_SECTION_INDEX_TEXT = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [6 x i8] c".data\00", align 1
@PE_SECTION_INDEX_DATA = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [5 x i8] c".bss\00", align 1
@PE_SECTION_INDEX_BSS = dso_local local_unnamed_addr global i32 0, align 4
@PE_SECTION_INDEX_INVALID = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @read_pe_section_index], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @read_pe_section_index(ptr noundef %0) #0 {
%2 = tail call i64 @strcmp(ptr noundef %0, ptr noundef nonnull @.str) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = tail call i64 @strcmp(ptr noundef %0, ptr noundef nonnull @.str.1) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = tail call i64 @strcmp(ptr noundef %0, ptr noundef nonnull @.str.2) #2
%9 = icmp eq i64 %8, 0
%10 = select i1 %9, ptr @PE_SECTION_INDEX_BSS, ptr @PE_SECTION_INDEX_INVALID
br label %11
11: ; preds = %7, %4, %1
%12 = phi ptr [ @PE_SECTION_INDEX_TEXT, %1 ], [ @PE_SECTION_INDEX_DATA, %4 ], [ %10, %7 ]
%13 = load i32, ptr %12, align 4, !tbaa !5
ret i32 %13
}
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/gdb/gdb/extr_coff-pe-read.c_read_pe_section_index.c'
source_filename = "AnghaBench/freebsd/contrib/gdb/gdb/extr_coff-pe-read.c_read_pe_section_index.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [6 x i8] c".text\00", align 1
@PE_SECTION_INDEX_TEXT = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [6 x i8] c".data\00", align 1
@PE_SECTION_INDEX_DATA = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [5 x i8] c".bss\00", align 1
@PE_SECTION_INDEX_BSS = common local_unnamed_addr global i32 0, align 4
@PE_SECTION_INDEX_INVALID = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @read_pe_section_index], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @read_pe_section_index(ptr noundef %0) #0 {
%2 = tail call i64 @strcmp(ptr noundef %0, ptr noundef nonnull @.str) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %11, label %4
4: ; preds = %1
%5 = tail call i64 @strcmp(ptr noundef %0, ptr noundef nonnull @.str.1) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %11, label %7
7: ; preds = %4
%8 = tail call i64 @strcmp(ptr noundef %0, ptr noundef nonnull @.str.2) #2
%9 = icmp eq i64 %8, 0
%10 = select i1 %9, ptr @PE_SECTION_INDEX_BSS, ptr @PE_SECTION_INDEX_INVALID
br label %11
11: ; preds = %7, %4, %1
%12 = phi ptr [ @PE_SECTION_INDEX_TEXT, %1 ], [ @PE_SECTION_INDEX_DATA, %4 ], [ %10, %7 ]
%13 = load i32, ptr %12, align 4, !tbaa !6
ret i32 %13
}
declare i64 @strcmp(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_gdb_gdb_extr_coff-pe-read.c_read_pe_section_index |
; ModuleID = 'AnghaBench/linux/drivers/platform/x86/extr_intel_menlow.c_aux_show.c'
source_filename = "AnghaBench/linux/drivers/platform/x86/extr_intel_menlow.c_aux_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [4 x i8] c"%lu\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @aux_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @aux_show(ptr nocapture readnone %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = alloca i64, align 8
%6 = tail call ptr @to_intel_menlow_attr(ptr noundef %1) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%7 = load i32, ptr %6, align 4, !tbaa !5
%8 = call i32 @sensor_get_auxtrip(i32 noundef %7, i32 noundef %3, ptr noundef nonnull %5) #3
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %4
%11 = load i64, ptr %5, align 8, !tbaa !10
%12 = call i32 @DECI_KELVIN_TO_CELSIUS(i64 noundef %11) #3
%13 = call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, i32 noundef %12) #3
br label %14
14: ; preds = %4, %10
%15 = phi i32 [ %13, %10 ], [ %8, %4 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret i32 %15
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @to_intel_menlow_attr(ptr noundef) local_unnamed_addr #2
declare i32 @sensor_get_auxtrip(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @DECI_KELVIN_TO_CELSIUS(i64 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"intel_menlow_attribute", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long long", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/platform/x86/extr_intel_menlow.c_aux_show.c'
source_filename = "AnghaBench/linux/drivers/platform/x86/extr_intel_menlow.c_aux_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [4 x i8] c"%lu\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @aux_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @aux_show(ptr nocapture readnone %0, ptr noundef %1, ptr noundef %2, i32 noundef %3) #0 {
%5 = alloca i64, align 8
%6 = tail call ptr @to_intel_menlow_attr(ptr noundef %1) #3
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
%7 = load i32, ptr %6, align 4, !tbaa !6
%8 = call i32 @sensor_get_auxtrip(i32 noundef %7, i32 noundef %3, ptr noundef nonnull %5) #3
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %14
10: ; preds = %4
%11 = load i64, ptr %5, align 8, !tbaa !11
%12 = call i32 @DECI_KELVIN_TO_CELSIUS(i64 noundef %11) #3
%13 = call i32 @sprintf(ptr noundef %2, ptr noundef nonnull @.str, i32 noundef %12) #3
br label %14
14: ; preds = %4, %10
%15 = phi i32 [ %13, %10 ], [ %8, %4 ]
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret i32 %15
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @to_intel_menlow_attr(ptr noundef) local_unnamed_addr #2
declare i32 @sensor_get_auxtrip(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @sprintf(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @DECI_KELVIN_TO_CELSIUS(i64 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"intel_menlow_attribute", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"long long", !9, i64 0}
| linux_drivers_platform_x86_extr_intel_menlow.c_aux_show |
; ModuleID = 'AnghaBench/zstd/tests/extr_paramgrill.c_badusage.c'
source_filename = "AnghaBench/zstd/tests/extr_paramgrill.c_badusage.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [18 x i8] c"Wrong parameters\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @badusage], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @badusage(ptr noundef %0) #0 {
%2 = tail call i32 @DISPLAY(ptr noundef nonnull @.str) #2
%3 = tail call i32 @usage(ptr noundef %0) #2
ret i32 1
}
declare i32 @DISPLAY(ptr noundef) local_unnamed_addr #1
declare i32 @usage(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/zstd/tests/extr_paramgrill.c_badusage.c'
source_filename = "AnghaBench/zstd/tests/extr_paramgrill.c_badusage.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [18 x i8] c"Wrong parameters\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @badusage], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @badusage(ptr noundef %0) #0 {
%2 = tail call i32 @DISPLAY(ptr noundef nonnull @.str) #2
%3 = tail call i32 @usage(ptr noundef %0) #2
ret i32 1
}
declare i32 @DISPLAY(ptr noundef) local_unnamed_addr #1
declare i32 @usage(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| zstd_tests_extr_paramgrill.c_badusage |
; ModuleID = 'AnghaBench/macvim/src/extr_if_ruby.c_vim_to_ruby.c'
source_filename = "AnghaBench/macvim/src/extr_if_ruby.c_vim_to_ruby.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_15__ = type { i64, %struct.TYPE_14__ }
%struct.TYPE_14__ = type { ptr, ptr, i32, i32, ptr }
%struct.TYPE_16__ = type { %struct.TYPE_15__, ptr }
%struct.TYPE_18__ = type { i64, ptr }
%struct.TYPE_19__ = type { i64 }
@Qnil = dso_local local_unnamed_addr global ptr null, align 8
@VAR_STRING = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@VAR_NUMBER = dso_local local_unnamed_addr global i64 0, align 8
@VAR_LIST = dso_local local_unnamed_addr global i64 0, align 8
@VAR_DICT = dso_local local_unnamed_addr global i64 0, align 8
@VAR_FLOAT = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @vim_to_ruby], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @vim_to_ruby(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr @Qnil, align 8, !tbaa !5
%3 = load i64, ptr %0, align 8, !tbaa !9
%4 = load i64, ptr @VAR_STRING, align 8, !tbaa !14
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = getelementptr inbounds %struct.TYPE_15__, ptr %0, i64 0, i32 1, i32 4
%8 = load ptr, ptr %7, align 8, !tbaa !15
%9 = icmp eq ptr %8, null
%10 = select i1 %9, ptr @.str, ptr %8
%11 = tail call ptr @rb_str_new2(ptr noundef nonnull %10) #2
br label %68
12: ; preds = %1
%13 = load i64, ptr @VAR_NUMBER, align 8, !tbaa !14
%14 = icmp eq i64 %3, %13
br i1 %14, label %15, label %19
15: ; preds = %12
%16 = getelementptr inbounds %struct.TYPE_15__, ptr %0, i64 0, i32 1, i32 3
%17 = load i32, ptr %16, align 4, !tbaa !16
%18 = tail call ptr @INT2NUM(i32 noundef %17) #2
br label %68
19: ; preds = %12
%20 = load i64, ptr @VAR_LIST, align 8, !tbaa !14
%21 = icmp eq i64 %3, %20
br i1 %21, label %22, label %37
22: ; preds = %19
%23 = getelementptr inbounds %struct.TYPE_15__, ptr %0, i64 0, i32 1, i32 1
%24 = load ptr, ptr %23, align 8, !tbaa !17
%25 = tail call ptr (...) @rb_ary_new() #2
%26 = icmp eq ptr %24, null
br i1 %26, label %68, label %27
27: ; preds = %22
%28 = load ptr, ptr %24, align 8, !tbaa !5
%29 = icmp eq ptr %28, null
br i1 %29, label %68, label %30
30: ; preds = %27, %30
%31 = phi ptr [ %35, %30 ], [ %28, %27 ]
%32 = tail call ptr @vim_to_ruby(ptr noundef nonnull %31)
%33 = tail call i32 @rb_ary_push(ptr noundef %25, ptr noundef %32) #2
%34 = getelementptr inbounds %struct.TYPE_16__, ptr %31, i64 0, i32 1
%35 = load ptr, ptr %34, align 8, !tbaa !5
%36 = icmp eq ptr %35, null
br i1 %36, label %68, label %30, !llvm.loop !18
37: ; preds = %19
%38 = load i64, ptr @VAR_DICT, align 8, !tbaa !14
%39 = icmp eq i64 %3, %38
br i1 %39, label %40, label %68
40: ; preds = %37
%41 = tail call ptr (...) @rb_hash_new() #2
%42 = getelementptr inbounds %struct.TYPE_15__, ptr %0, i64 0, i32 1
%43 = load ptr, ptr %42, align 8, !tbaa !20
%44 = icmp eq ptr %43, null
br i1 %44, label %68, label %45
45: ; preds = %40
%46 = load i64, ptr %43, align 8, !tbaa !21
%47 = icmp sgt i64 %46, 0
br i1 %47, label %48, label %68
48: ; preds = %45
%49 = getelementptr inbounds %struct.TYPE_18__, ptr %43, i64 0, i32 1
%50 = load ptr, ptr %49, align 8, !tbaa !23
br label %51
51: ; preds = %48, %64
%52 = phi ptr [ %66, %64 ], [ %50, %48 ]
%53 = phi i64 [ %65, %64 ], [ %46, %48 ]
%54 = tail call i32 @HASHITEM_EMPTY(ptr noundef %52) #2
%55 = icmp eq i32 %54, 0
br i1 %55, label %56, label %64
56: ; preds = %51
%57 = add nsw i64 %53, -1
%58 = tail call ptr @dict_lookup(ptr noundef %52) #2
%59 = load i64, ptr %52, align 8, !tbaa !24
%60 = inttoptr i64 %59 to ptr
%61 = tail call ptr @rb_str_new2(ptr noundef %60) #2
%62 = tail call ptr @vim_to_ruby(ptr noundef %58)
%63 = tail call i32 @rb_hash_aset(ptr noundef %41, ptr noundef %61, ptr noundef %62) #2
br label %64
64: ; preds = %51, %56
%65 = phi i64 [ %53, %51 ], [ %57, %56 ]
%66 = getelementptr inbounds %struct.TYPE_19__, ptr %52, i64 1
%67 = icmp sgt i64 %65, 0
br i1 %67, label %51, label %68, !llvm.loop !26
68: ; preds = %64, %30, %45, %27, %22, %15, %37, %40, %6
%69 = phi ptr [ %11, %6 ], [ %18, %15 ], [ %41, %40 ], [ %2, %37 ], [ %25, %22 ], [ %25, %27 ], [ %41, %45 ], [ %25, %30 ], [ %41, %64 ]
ret ptr %69
}
declare ptr @rb_str_new2(ptr noundef) local_unnamed_addr #1
declare ptr @INT2NUM(i32 noundef) local_unnamed_addr #1
declare ptr @rb_ary_new(...) local_unnamed_addr #1
declare i32 @rb_ary_push(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @rb_hash_new(...) local_unnamed_addr #1
declare i32 @HASHITEM_EMPTY(ptr noundef) local_unnamed_addr #1
declare ptr @dict_lookup(ptr noundef) local_unnamed_addr #1
declare i32 @rb_hash_aset(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_15__", !11, i64 0, !12, i64 8}
!11 = !{!"long", !7, i64 0}
!12 = !{!"TYPE_14__", !6, i64 0, !6, i64 8, !13, i64 16, !13, i64 20, !6, i64 24}
!13 = !{!"int", !7, i64 0}
!14 = !{!11, !11, i64 0}
!15 = !{!10, !6, i64 32}
!16 = !{!10, !13, i64 28}
!17 = !{!10, !6, i64 16}
!18 = distinct !{!18, !19}
!19 = !{!"llvm.loop.mustprogress"}
!20 = !{!10, !6, i64 8}
!21 = !{!22, !11, i64 0}
!22 = !{!"TYPE_18__", !11, i64 0, !6, i64 8}
!23 = !{!22, !6, i64 8}
!24 = !{!25, !11, i64 0}
!25 = !{!"TYPE_19__", !11, i64 0}
!26 = distinct !{!26, !19}
| ; ModuleID = 'AnghaBench/macvim/src/extr_if_ruby.c_vim_to_ruby.c'
source_filename = "AnghaBench/macvim/src/extr_if_ruby.c_vim_to_ruby.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@Qnil = common local_unnamed_addr global ptr null, align 8
@VAR_STRING = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@VAR_NUMBER = common local_unnamed_addr global i64 0, align 8
@VAR_LIST = common local_unnamed_addr global i64 0, align 8
@VAR_DICT = common local_unnamed_addr global i64 0, align 8
@VAR_FLOAT = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @vim_to_ruby], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @vim_to_ruby(ptr nocapture noundef readonly %0) #0 {
%2 = load ptr, ptr @Qnil, align 8, !tbaa !6
%3 = load i64, ptr %0, align 8, !tbaa !10
%4 = load i64, ptr @VAR_STRING, align 8, !tbaa !15
%5 = icmp eq i64 %3, %4
br i1 %5, label %6, label %12
6: ; preds = %1
%7 = getelementptr inbounds i8, ptr %0, i64 32
%8 = load ptr, ptr %7, align 8, !tbaa !16
%9 = icmp eq ptr %8, null
%10 = select i1 %9, ptr @.str, ptr %8
%11 = tail call ptr @rb_str_new2(ptr noundef nonnull %10) #2
br label %68
12: ; preds = %1
%13 = load i64, ptr @VAR_NUMBER, align 8, !tbaa !15
%14 = icmp eq i64 %3, %13
br i1 %14, label %15, label %19
15: ; preds = %12
%16 = getelementptr inbounds i8, ptr %0, i64 28
%17 = load i32, ptr %16, align 4, !tbaa !17
%18 = tail call ptr @INT2NUM(i32 noundef %17) #2
br label %68
19: ; preds = %12
%20 = load i64, ptr @VAR_LIST, align 8, !tbaa !15
%21 = icmp eq i64 %3, %20
br i1 %21, label %22, label %37
22: ; preds = %19
%23 = getelementptr inbounds i8, ptr %0, i64 16
%24 = load ptr, ptr %23, align 8, !tbaa !18
%25 = tail call ptr @rb_ary_new() #2
%26 = icmp eq ptr %24, null
br i1 %26, label %68, label %27
27: ; preds = %22
%28 = load ptr, ptr %24, align 8, !tbaa !6
%29 = icmp eq ptr %28, null
br i1 %29, label %68, label %30
30: ; preds = %27, %30
%31 = phi ptr [ %35, %30 ], [ %28, %27 ]
%32 = tail call ptr @vim_to_ruby(ptr noundef nonnull %31)
%33 = tail call i32 @rb_ary_push(ptr noundef %25, ptr noundef %32) #2
%34 = getelementptr inbounds i8, ptr %31, i64 40
%35 = load ptr, ptr %34, align 8, !tbaa !6
%36 = icmp eq ptr %35, null
br i1 %36, label %68, label %30, !llvm.loop !19
37: ; preds = %19
%38 = load i64, ptr @VAR_DICT, align 8, !tbaa !15
%39 = icmp eq i64 %3, %38
br i1 %39, label %40, label %68
40: ; preds = %37
%41 = tail call ptr @rb_hash_new() #2
%42 = getelementptr inbounds i8, ptr %0, i64 8
%43 = load ptr, ptr %42, align 8, !tbaa !21
%44 = icmp eq ptr %43, null
br i1 %44, label %68, label %45
45: ; preds = %40
%46 = load i64, ptr %43, align 8, !tbaa !22
%47 = icmp sgt i64 %46, 0
br i1 %47, label %48, label %68
48: ; preds = %45
%49 = getelementptr inbounds i8, ptr %43, i64 8
%50 = load ptr, ptr %49, align 8, !tbaa !24
br label %51
51: ; preds = %48, %64
%52 = phi ptr [ %66, %64 ], [ %50, %48 ]
%53 = phi i64 [ %65, %64 ], [ %46, %48 ]
%54 = tail call i32 @HASHITEM_EMPTY(ptr noundef %52) #2
%55 = icmp eq i32 %54, 0
br i1 %55, label %56, label %64
56: ; preds = %51
%57 = add nsw i64 %53, -1
%58 = tail call ptr @dict_lookup(ptr noundef %52) #2
%59 = load i64, ptr %52, align 8, !tbaa !25
%60 = inttoptr i64 %59 to ptr
%61 = tail call ptr @rb_str_new2(ptr noundef %60) #2
%62 = tail call ptr @vim_to_ruby(ptr noundef %58)
%63 = tail call i32 @rb_hash_aset(ptr noundef %41, ptr noundef %61, ptr noundef %62) #2
br label %64
64: ; preds = %51, %56
%65 = phi i64 [ %53, %51 ], [ %57, %56 ]
%66 = getelementptr inbounds i8, ptr %52, i64 8
%67 = icmp sgt i64 %65, 0
br i1 %67, label %51, label %68, !llvm.loop !27
68: ; preds = %64, %30, %45, %27, %22, %15, %37, %40, %6
%69 = phi ptr [ %11, %6 ], [ %18, %15 ], [ %41, %40 ], [ %2, %37 ], [ %25, %22 ], [ %25, %27 ], [ %41, %45 ], [ %25, %30 ], [ %41, %64 ]
ret ptr %69
}
declare ptr @rb_str_new2(ptr noundef) local_unnamed_addr #1
declare ptr @INT2NUM(i32 noundef) local_unnamed_addr #1
declare ptr @rb_ary_new(...) local_unnamed_addr #1
declare i32 @rb_ary_push(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @rb_hash_new(...) local_unnamed_addr #1
declare i32 @HASHITEM_EMPTY(ptr noundef) local_unnamed_addr #1
declare ptr @dict_lookup(ptr noundef) local_unnamed_addr #1
declare i32 @rb_hash_aset(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_15__", !12, i64 0, !13, i64 8}
!12 = !{!"long", !8, i64 0}
!13 = !{!"TYPE_14__", !7, i64 0, !7, i64 8, !14, i64 16, !14, i64 20, !7, i64 24}
!14 = !{!"int", !8, i64 0}
!15 = !{!12, !12, i64 0}
!16 = !{!11, !7, i64 32}
!17 = !{!11, !14, i64 28}
!18 = !{!11, !7, i64 16}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!11, !7, i64 8}
!22 = !{!23, !12, i64 0}
!23 = !{!"TYPE_18__", !12, i64 0, !7, i64 8}
!24 = !{!23, !7, i64 8}
!25 = !{!26, !12, i64 0}
!26 = !{!"TYPE_19__", !12, i64 0}
!27 = distinct !{!27, !20}
| macvim_src_extr_if_ruby.c_vim_to_ruby |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_ci_dpm.c_ci_fan_ctrl_stop_smc_fan_control.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_ci_dpm.c_ci_fan_ctrl_stop_smc_fan_control.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PPSMC_StopFanControl = dso_local local_unnamed_addr global i32 0, align 4
@PPSMC_Result_OK = dso_local local_unnamed_addr global i64 0, align 8
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ci_fan_ctrl_stop_smc_fan_control], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ci_fan_ctrl_stop_smc_fan_control(ptr noundef %0) #0 {
%2 = tail call ptr @ci_get_pi(ptr noundef %0) #2
%3 = load i32, ptr @PPSMC_StopFanControl, align 4, !tbaa !5
%4 = tail call i64 @ci_send_msg_to_smc(ptr noundef %0, i32 noundef %3) #2
%5 = load i64, ptr @PPSMC_Result_OK, align 8, !tbaa !9
%6 = icmp eq i64 %4, %5
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, ptr %2, align 4, !tbaa !11
br label %11
8: ; preds = %1
%9 = load i32, ptr @EINVAL, align 4, !tbaa !5
%10 = sub nsw i32 0, %9
br label %11
11: ; preds = %8, %7
%12 = phi i32 [ 0, %7 ], [ %10, %8 ]
ret i32 %12
}
declare ptr @ci_get_pi(ptr noundef) local_unnamed_addr #1
declare i64 @ci_send_msg_to_smc(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !6, i64 0}
!12 = !{!"ci_power_info", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/radeon/extr_ci_dpm.c_ci_fan_ctrl_stop_smc_fan_control.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/radeon/extr_ci_dpm.c_ci_fan_ctrl_stop_smc_fan_control.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PPSMC_StopFanControl = common local_unnamed_addr global i32 0, align 4
@PPSMC_Result_OK = common local_unnamed_addr global i64 0, align 8
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ci_fan_ctrl_stop_smc_fan_control], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @ci_fan_ctrl_stop_smc_fan_control(ptr noundef %0) #0 {
%2 = tail call ptr @ci_get_pi(ptr noundef %0) #2
%3 = load i32, ptr @PPSMC_StopFanControl, align 4, !tbaa !6
%4 = tail call i64 @ci_send_msg_to_smc(ptr noundef %0, i32 noundef %3) #2
%5 = load i64, ptr @PPSMC_Result_OK, align 8, !tbaa !10
%6 = icmp eq i64 %4, %5
br i1 %6, label %7, label %8
7: ; preds = %1
store i32 0, ptr %2, align 4, !tbaa !12
br label %11
8: ; preds = %1
%9 = load i32, ptr @EINVAL, align 4, !tbaa !6
%10 = sub nsw i32 0, %9
br label %11
11: ; preds = %8, %7
%12 = phi i32 [ 0, %7 ], [ %10, %8 ]
ret i32 %12
}
declare ptr @ci_get_pi(ptr noundef) local_unnamed_addr #1
declare i64 @ci_send_msg_to_smc(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"ci_power_info", !7, i64 0}
| linux_drivers_gpu_drm_radeon_extr_ci_dpm.c_ci_fan_ctrl_stop_smc_fan_control |
; ModuleID = 'AnghaBench/lz4/lib/extr_lz4hc.c_LZ4_compress_HC_destSize.c'
source_filename = "AnghaBench/lz4/lib/extr_lz4hc.c_LZ4_compress_HC_destSize.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@fillOutput = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @LZ4_compress_HC_destSize(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
%7 = tail call ptr @LZ4_initStreamHC(ptr noundef %0, i32 noundef 4) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %14, label %9
9: ; preds = %6
%10 = tail call i32 @LZ4HC_init_internal(ptr noundef nonnull %7, ptr noundef %1) #2
%11 = tail call i32 @LZ4_setCompressionLevel(ptr noundef nonnull %7, i32 noundef %5) #2
%12 = load i32, ptr @fillOutput, align 4, !tbaa !5
%13 = tail call i32 @LZ4HC_compress_generic(ptr noundef nonnull %7, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %12) #2
br label %14
14: ; preds = %6, %9
%15 = phi i32 [ %13, %9 ], [ 0, %6 ]
ret i32 %15
}
declare ptr @LZ4_initStreamHC(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LZ4HC_init_internal(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @LZ4_setCompressionLevel(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LZ4HC_compress_generic(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/lz4/lib/extr_lz4hc.c_LZ4_compress_HC_destSize.c'
source_filename = "AnghaBench/lz4/lib/extr_lz4hc.c_LZ4_compress_HC_destSize.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@fillOutput = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @LZ4_compress_HC_destSize(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5) local_unnamed_addr #0 {
%7 = tail call ptr @LZ4_initStreamHC(ptr noundef %0, i32 noundef 4) #2
%8 = icmp eq ptr %7, null
br i1 %8, label %14, label %9
9: ; preds = %6
%10 = tail call i32 @LZ4HC_init_internal(ptr noundef nonnull %7, ptr noundef %1) #2
%11 = tail call i32 @LZ4_setCompressionLevel(ptr noundef nonnull %7, i32 noundef %5) #2
%12 = load i32, ptr @fillOutput, align 4, !tbaa !6
%13 = tail call i32 @LZ4HC_compress_generic(ptr noundef nonnull %7, ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef %4, i32 noundef %5, i32 noundef %12) #2
br label %14
14: ; preds = %6, %9
%15 = phi i32 [ %13, %9 ], [ 0, %6 ]
ret i32 %15
}
declare ptr @LZ4_initStreamHC(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LZ4HC_init_internal(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @LZ4_setCompressionLevel(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @LZ4HC_compress_generic(ptr noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| lz4_lib_extr_lz4hc.c_LZ4_compress_HC_destSize |
; ModuleID = 'AnghaBench/nginx/src/http/modules/extr_ngx_http_fastcgi_module.c_ngx_http_fastcgi_process_record.c'
source_filename = "AnghaBench/nginx/src/http/modules/extr_ngx_http_fastcgi_module.c_ngx_http_fastcgi_process_record.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i32, ptr, ptr, i32, i64, i32 }
@NGX_LOG_DEBUG_HTTP = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [32 x i8] c"http fastcgi record byte: %02Xd\00", align 1
@NGX_LOG_ERR = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [55 x i8] c"upstream sent unsupported FastCGI protocol version: %d\00", align 1
@NGX_ERROR = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [46 x i8] c"upstream sent invalid FastCGI record type: %d\00", align 1
@.str.3 = private unnamed_addr constant [58 x i8] c"upstream sent unexpected FastCGI request id high byte: %d\00", align 1
@.str.4 = private unnamed_addr constant [57 x i8] c"upstream sent unexpected FastCGI request id low byte: %d\00", align 1
@.str.5 = private unnamed_addr constant [31 x i8] c"http fastcgi record length: %z\00", align 1
@NGX_OK = dso_local local_unnamed_addr global i32 0, align 4
@NGX_AGAIN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ngx_http_fastcgi_process_record], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ngx_http_fastcgi_process_record(ptr nocapture noundef readonly %0, ptr nocapture noundef %1) #0 {
%3 = load i32, ptr %1, align 8, !tbaa !5
%4 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 1
%5 = load ptr, ptr %4, align 8, !tbaa !12
%6 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 2
%7 = load ptr, ptr %6, align 8, !tbaa !13
%8 = icmp ult ptr %5, %7
br i1 %8, label %9, label %70
9: ; preds = %2
%10 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 4
%11 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 3
%12 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 5
br label %13
13: ; preds = %9, %65
%14 = phi i32 [ %3, %9 ], [ %66, %65 ]
%15 = phi ptr [ %5, %9 ], [ %67, %65 ]
%16 = load i32, ptr %15, align 4, !tbaa !14
%17 = load i32, ptr @NGX_LOG_DEBUG_HTTP, align 4, !tbaa !14
%18 = load ptr, ptr %0, align 8, !tbaa !15
%19 = load i32, ptr %18, align 4, !tbaa !17
%20 = tail call i32 @ngx_log_debug1(i32 noundef %17, i32 noundef %19, i32 noundef 0, ptr noundef nonnull @.str, i32 noundef %16) #2
switch i32 %14, label %65 [
i32 128, label %21
i32 129, label %28
i32 132, label %37
i32 131, label %44
i32 137, label %51
i32 136, label %53
i32 133, label %56
i32 130, label %58
]
21: ; preds = %13
%22 = icmp eq i32 %16, 1
br i1 %22, label %65, label %23
23: ; preds = %21
%24 = load i32, ptr @NGX_LOG_ERR, align 4, !tbaa !14
%25 = load ptr, ptr %0, align 8, !tbaa !15
%26 = load i32, ptr %25, align 4, !tbaa !17
%27 = tail call i32 @ngx_log_error(i32 noundef %24, i32 noundef %26, i32 noundef 0, ptr noundef nonnull @.str.1, i32 noundef %16) #2
br label %73
28: ; preds = %13
%29 = add i32 %16, -138
%30 = icmp ult i32 %29, 3
br i1 %30, label %31, label %32
31: ; preds = %28
store i32 %16, ptr %12, align 8, !tbaa !19
br label %65
32: ; preds = %28
%33 = load i32, ptr @NGX_LOG_ERR, align 4, !tbaa !14
%34 = load ptr, ptr %0, align 8, !tbaa !15
%35 = load i32, ptr %34, align 4, !tbaa !17
%36 = tail call i32 @ngx_log_error(i32 noundef %33, i32 noundef %35, i32 noundef 0, ptr noundef nonnull @.str.2, i32 noundef %16) #2
br label %73
37: ; preds = %13
%38 = icmp eq i32 %16, 0
br i1 %38, label %65, label %39
39: ; preds = %37
%40 = load i32, ptr @NGX_LOG_ERR, align 4, !tbaa !14
%41 = load ptr, ptr %0, align 8, !tbaa !15
%42 = load i32, ptr %41, align 4, !tbaa !17
%43 = tail call i32 @ngx_log_error(i32 noundef %40, i32 noundef %42, i32 noundef 0, ptr noundef nonnull @.str.3, i32 noundef %16) #2
br label %73
44: ; preds = %13
%45 = icmp eq i32 %16, 1
br i1 %45, label %65, label %46
46: ; preds = %44
%47 = load i32, ptr @NGX_LOG_ERR, align 4, !tbaa !14
%48 = load ptr, ptr %0, align 8, !tbaa !15
%49 = load i32, ptr %48, align 4, !tbaa !17
%50 = tail call i32 @ngx_log_error(i32 noundef %47, i32 noundef %49, i32 noundef 0, ptr noundef nonnull @.str.4, i32 noundef %16) #2
br label %73
51: ; preds = %13
%52 = shl i32 %16, 8
store i32 %52, ptr %11, align 8, !tbaa !20
br label %65
53: ; preds = %13
%54 = load i32, ptr %11, align 8, !tbaa !20
%55 = or i32 %54, %16
store i32 %55, ptr %11, align 8, !tbaa !20
br label %65
56: ; preds = %13
%57 = sext i32 %16 to i64
store i64 %57, ptr %10, align 8, !tbaa !21
br label %65
58: ; preds = %13
%59 = load i32, ptr @NGX_LOG_DEBUG_HTTP, align 4, !tbaa !14
%60 = load ptr, ptr %0, align 8, !tbaa !15
%61 = load i32, ptr %60, align 4, !tbaa !17
%62 = load i32, ptr %11, align 8, !tbaa !20
%63 = tail call i32 @ngx_log_debug1(i32 noundef %59, i32 noundef %61, i32 noundef 0, ptr noundef nonnull @.str.5, i32 noundef %62) #2
%64 = getelementptr inbounds i32, ptr %15, i64 1
store ptr %64, ptr %4, align 8, !tbaa !12
store i32 135, ptr %1, align 8, !tbaa !5
br label %73
65: ; preds = %44, %37, %21, %31, %51, %53, %56, %13
%66 = phi i32 [ %14, %13 ], [ 130, %56 ], [ 133, %53 ], [ 136, %51 ], [ 132, %31 ], [ 129, %21 ], [ 131, %37 ], [ 137, %44 ]
%67 = getelementptr inbounds i32, ptr %15, i64 1
%68 = load ptr, ptr %6, align 8, !tbaa !13
%69 = icmp ult ptr %67, %68
br i1 %69, label %13, label %70, !llvm.loop !22
70: ; preds = %65, %2
%71 = phi ptr [ %5, %2 ], [ %67, %65 ]
%72 = phi i32 [ %3, %2 ], [ %66, %65 ]
store ptr %71, ptr %4, align 8, !tbaa !12
store i32 %72, ptr %1, align 8, !tbaa !5
br label %73
73: ; preds = %70, %58, %46, %39, %32, %23
%74 = phi ptr [ @NGX_OK, %58 ], [ @NGX_ERROR, %46 ], [ @NGX_ERROR, %39 ], [ @NGX_ERROR, %32 ], [ @NGX_ERROR, %23 ], [ @NGX_AGAIN, %70 ]
%75 = load i32, ptr %74, align 4, !tbaa !14
ret i32 %75
}
declare i32 @ngx_log_debug1(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ngx_log_error(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_8__", !7, i64 0, !10, i64 8, !10, i64 16, !7, i64 24, !11, i64 32, !7, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!6, !10, i64 16}
!14 = !{!7, !7, i64 0}
!15 = !{!16, !10, i64 0}
!16 = !{!"TYPE_7__", !10, i64 0}
!17 = !{!18, !7, i64 0}
!18 = !{!"TYPE_6__", !7, i64 0}
!19 = !{!6, !7, i64 40}
!20 = !{!6, !7, i64 24}
!21 = !{!6, !11, i64 32}
!22 = distinct !{!22, !23}
!23 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/nginx/src/http/modules/extr_ngx_http_fastcgi_module.c_ngx_http_fastcgi_process_record.c'
source_filename = "AnghaBench/nginx/src/http/modules/extr_ngx_http_fastcgi_module.c_ngx_http_fastcgi_process_record.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NGX_LOG_DEBUG_HTTP = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [32 x i8] c"http fastcgi record byte: %02Xd\00", align 1
@NGX_LOG_ERR = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [55 x i8] c"upstream sent unsupported FastCGI protocol version: %d\00", align 1
@NGX_ERROR = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [46 x i8] c"upstream sent invalid FastCGI record type: %d\00", align 1
@.str.3 = private unnamed_addr constant [58 x i8] c"upstream sent unexpected FastCGI request id high byte: %d\00", align 1
@.str.4 = private unnamed_addr constant [57 x i8] c"upstream sent unexpected FastCGI request id low byte: %d\00", align 1
@.str.5 = private unnamed_addr constant [31 x i8] c"http fastcgi record length: %z\00", align 1
@NGX_OK = common local_unnamed_addr global i32 0, align 4
@NGX_AGAIN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ngx_http_fastcgi_process_record], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ngx_http_fastcgi_process_record(ptr nocapture noundef readonly %0, ptr nocapture noundef %1) #0 {
%3 = load i32, ptr %1, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %1, i64 8
%5 = load ptr, ptr %4, align 8, !tbaa !13
%6 = getelementptr inbounds i8, ptr %1, i64 16
%7 = load ptr, ptr %6, align 8, !tbaa !14
%8 = icmp ult ptr %5, %7
br i1 %8, label %9, label %70
9: ; preds = %2
%10 = getelementptr inbounds i8, ptr %1, i64 32
%11 = getelementptr inbounds i8, ptr %1, i64 24
%12 = getelementptr inbounds i8, ptr %1, i64 40
br label %13
13: ; preds = %9, %65
%14 = phi i32 [ %3, %9 ], [ %66, %65 ]
%15 = phi ptr [ %5, %9 ], [ %67, %65 ]
%16 = load i32, ptr %15, align 4, !tbaa !15
%17 = load i32, ptr @NGX_LOG_DEBUG_HTTP, align 4, !tbaa !15
%18 = load ptr, ptr %0, align 8, !tbaa !16
%19 = load i32, ptr %18, align 4, !tbaa !18
%20 = tail call i32 @ngx_log_debug1(i32 noundef %17, i32 noundef %19, i32 noundef 0, ptr noundef nonnull @.str, i32 noundef %16) #2
switch i32 %14, label %65 [
i32 128, label %21
i32 129, label %28
i32 132, label %37
i32 131, label %44
i32 137, label %51
i32 136, label %53
i32 133, label %56
i32 130, label %58
]
21: ; preds = %13
%22 = icmp eq i32 %16, 1
br i1 %22, label %65, label %23
23: ; preds = %21
%24 = load i32, ptr @NGX_LOG_ERR, align 4, !tbaa !15
%25 = load ptr, ptr %0, align 8, !tbaa !16
%26 = load i32, ptr %25, align 4, !tbaa !18
%27 = tail call i32 @ngx_log_error(i32 noundef %24, i32 noundef %26, i32 noundef 0, ptr noundef nonnull @.str.1, i32 noundef %16) #2
br label %73
28: ; preds = %13
%29 = add i32 %16, -138
%30 = icmp ult i32 %29, 3
br i1 %30, label %31, label %32
31: ; preds = %28
store i32 %16, ptr %12, align 8, !tbaa !20
br label %65
32: ; preds = %28
%33 = load i32, ptr @NGX_LOG_ERR, align 4, !tbaa !15
%34 = load ptr, ptr %0, align 8, !tbaa !16
%35 = load i32, ptr %34, align 4, !tbaa !18
%36 = tail call i32 @ngx_log_error(i32 noundef %33, i32 noundef %35, i32 noundef 0, ptr noundef nonnull @.str.2, i32 noundef %16) #2
br label %73
37: ; preds = %13
%38 = icmp eq i32 %16, 0
br i1 %38, label %65, label %39
39: ; preds = %37
%40 = load i32, ptr @NGX_LOG_ERR, align 4, !tbaa !15
%41 = load ptr, ptr %0, align 8, !tbaa !16
%42 = load i32, ptr %41, align 4, !tbaa !18
%43 = tail call i32 @ngx_log_error(i32 noundef %40, i32 noundef %42, i32 noundef 0, ptr noundef nonnull @.str.3, i32 noundef %16) #2
br label %73
44: ; preds = %13
%45 = icmp eq i32 %16, 1
br i1 %45, label %65, label %46
46: ; preds = %44
%47 = load i32, ptr @NGX_LOG_ERR, align 4, !tbaa !15
%48 = load ptr, ptr %0, align 8, !tbaa !16
%49 = load i32, ptr %48, align 4, !tbaa !18
%50 = tail call i32 @ngx_log_error(i32 noundef %47, i32 noundef %49, i32 noundef 0, ptr noundef nonnull @.str.4, i32 noundef %16) #2
br label %73
51: ; preds = %13
%52 = shl i32 %16, 8
store i32 %52, ptr %11, align 8, !tbaa !21
br label %65
53: ; preds = %13
%54 = load i32, ptr %11, align 8, !tbaa !21
%55 = or i32 %54, %16
store i32 %55, ptr %11, align 8, !tbaa !21
br label %65
56: ; preds = %13
%57 = sext i32 %16 to i64
store i64 %57, ptr %10, align 8, !tbaa !22
br label %65
58: ; preds = %13
%59 = load i32, ptr @NGX_LOG_DEBUG_HTTP, align 4, !tbaa !15
%60 = load ptr, ptr %0, align 8, !tbaa !16
%61 = load i32, ptr %60, align 4, !tbaa !18
%62 = load i32, ptr %11, align 8, !tbaa !21
%63 = tail call i32 @ngx_log_debug1(i32 noundef %59, i32 noundef %61, i32 noundef 0, ptr noundef nonnull @.str.5, i32 noundef %62) #2
%64 = getelementptr inbounds i8, ptr %15, i64 4
store ptr %64, ptr %4, align 8, !tbaa !13
store i32 135, ptr %1, align 8, !tbaa !6
br label %73
65: ; preds = %44, %37, %21, %31, %51, %53, %56, %13
%66 = phi i32 [ %14, %13 ], [ 130, %56 ], [ 133, %53 ], [ 136, %51 ], [ 132, %31 ], [ 129, %21 ], [ 131, %37 ], [ 137, %44 ]
%67 = getelementptr inbounds i8, ptr %15, i64 4
%68 = load ptr, ptr %6, align 8, !tbaa !14
%69 = icmp ult ptr %67, %68
br i1 %69, label %13, label %70, !llvm.loop !23
70: ; preds = %65, %2
%71 = phi ptr [ %5, %2 ], [ %67, %65 ]
%72 = phi i32 [ %3, %2 ], [ %66, %65 ]
store ptr %71, ptr %4, align 8, !tbaa !13
store i32 %72, ptr %1, align 8, !tbaa !6
br label %73
73: ; preds = %70, %58, %46, %39, %32, %23
%74 = phi ptr [ @NGX_OK, %58 ], [ @NGX_ERROR, %46 ], [ @NGX_ERROR, %39 ], [ @NGX_ERROR, %32 ], [ @NGX_ERROR, %23 ], [ @NGX_AGAIN, %70 ]
%75 = load i32, ptr %74, align 4, !tbaa !15
ret i32 %75
}
declare i32 @ngx_log_debug1(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ngx_log_error(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_8__", !8, i64 0, !11, i64 8, !11, i64 16, !8, i64 24, !12, i64 32, !8, i64 40}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!7, !11, i64 16}
!15 = !{!8, !8, i64 0}
!16 = !{!17, !11, i64 0}
!17 = !{!"TYPE_7__", !11, i64 0}
!18 = !{!19, !8, i64 0}
!19 = !{!"TYPE_6__", !8, i64 0}
!20 = !{!7, !8, i64 40}
!21 = !{!7, !8, i64 24}
!22 = !{!7, !12, i64 32}
!23 = distinct !{!23, !24}
!24 = !{!"llvm.loop.mustprogress"}
| nginx_src_http_modules_extr_ngx_http_fastcgi_module.c_ngx_http_fastcgi_process_record |
; ModuleID = 'AnghaBench/linux/drivers/mmc/core/extr_core.c_mmc_is_req_done.c'
source_filename = "AnghaBench/linux/drivers/mmc/core/extr_core.c_mmc_is_req_done.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @mmc_is_req_done(ptr nocapture noundef readnone %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @completion_done(ptr noundef %1) #2
ret i32 %3
}
declare i32 @completion_done(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/mmc/core/extr_core.c_mmc_is_req_done.c'
source_filename = "AnghaBench/linux/drivers/mmc/core/extr_core.c_mmc_is_req_done.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @mmc_is_req_done(ptr nocapture noundef readnone %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @completion_done(ptr noundef %1) #2
ret i32 %3
}
declare i32 @completion_done(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_mmc_core_extr_core.c_mmc_is_req_done |
; ModuleID = 'AnghaBench/linux/drivers/media/platform/vsp1/extr_vsp1.h_vsp1_read.c'
source_filename = "AnghaBench/linux/drivers/media/platform/vsp1/extr_vsp1.h_vsp1_read.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @vsp1_read], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i64 @vsp1_read(ptr nocapture noundef readonly %0, i64 noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = add nsw i64 %3, %1
%5 = tail call i64 @ioread32(i64 noundef %4) #2
ret i64 %5
}
declare i64 @ioread32(i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"vsp1_device", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/media/platform/vsp1/extr_vsp1.h_vsp1_read.c'
source_filename = "AnghaBench/linux/drivers/media/platform/vsp1/extr_vsp1.h_vsp1_read.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @vsp1_read], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i64 @vsp1_read(ptr nocapture noundef readonly %0, i64 noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = add nsw i64 %3, %1
%5 = tail call i64 @ioread32(i64 noundef %4) #2
ret i64 %5
}
declare i64 @ioread32(i64 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"vsp1_device", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_media_platform_vsp1_extr_vsp1.h_vsp1_read |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/serial/extr_pmac_zilog.h_read_zsdata.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/serial/extr_pmac_zilog.h_read_zsdata.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @read_zsdata], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @read_zsdata(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = tail call i32 @readb(i32 noundef %2) #2
ret i32 %3
}
declare i32 @readb(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"uart_pmac_port", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/serial/extr_pmac_zilog.h_read_zsdata.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/serial/extr_pmac_zilog.h_read_zsdata.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @read_zsdata], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @read_zsdata(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = tail call i32 @readb(i32 noundef %2) #2
ret i32 %3
}
declare i32 @readb(i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"uart_pmac_port", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_serial_extr_pmac_zilog.h_read_zsdata |
; ModuleID = 'AnghaBench/mruby/mrbgems/mruby-compiler/core/extr_codegen.c_genop_2.c'
source_filename = "AnghaBench/mruby/mrbgems/mruby-compiler/core/extr_codegen.c_genop_2.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, i32 }
@OP_EXT3 = dso_local local_unnamed_addr global i32 0, align 4
@OP_EXT2 = dso_local local_unnamed_addr global i32 0, align 4
@OP_EXT1 = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @genop_2], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @genop_2(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = load i32, ptr %0, align 4, !tbaa !5
%6 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
store i32 %5, ptr %6, align 4, !tbaa !10
%7 = icmp sgt i32 %2, 255
%8 = icmp sgt i32 %3, 255
%9 = and i1 %7, %8
br i1 %9, label %10, label %16
10: ; preds = %4
%11 = load i32, ptr @OP_EXT3, align 4, !tbaa !11
%12 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %11) #2
%13 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %1) #2
%14 = tail call i32 @gen_S(ptr noundef nonnull %0, i32 noundef %2) #2
%15 = tail call i32 @gen_S(ptr noundef nonnull %0, i32 noundef %3) #2
br label %34
16: ; preds = %4
br i1 %8, label %17, label %23
17: ; preds = %16
%18 = load i32, ptr @OP_EXT2, align 4, !tbaa !11
%19 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %18) #2
%20 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %1) #2
%21 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %2) #2
%22 = tail call i32 @gen_S(ptr noundef nonnull %0, i32 noundef %3) #2
br label %34
23: ; preds = %16
br i1 %7, label %24, label %30
24: ; preds = %23
%25 = load i32, ptr @OP_EXT1, align 4, !tbaa !11
%26 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %25) #2
%27 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %1) #2
%28 = tail call i32 @gen_S(ptr noundef nonnull %0, i32 noundef %2) #2
%29 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %3) #2
br label %34
30: ; preds = %23
%31 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %1) #2
%32 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %2) #2
%33 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %3) #2
br label %34
34: ; preds = %17, %30, %24, %10
ret void
}
declare i32 @gen_B(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @gen_S(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_5__", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/mruby/mrbgems/mruby-compiler/core/extr_codegen.c_genop_2.c'
source_filename = "AnghaBench/mruby/mrbgems/mruby-compiler/core/extr_codegen.c_genop_2.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@OP_EXT3 = common local_unnamed_addr global i32 0, align 4
@OP_EXT2 = common local_unnamed_addr global i32 0, align 4
@OP_EXT1 = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @genop_2], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @genop_2(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) #0 {
%5 = load i32, ptr %0, align 4, !tbaa !6
%6 = getelementptr inbounds i8, ptr %0, i64 4
store i32 %5, ptr %6, align 4, !tbaa !11
%7 = icmp sgt i32 %2, 255
%8 = icmp sgt i32 %3, 255
%9 = and i1 %7, %8
br i1 %9, label %10, label %16
10: ; preds = %4
%11 = load i32, ptr @OP_EXT3, align 4, !tbaa !12
%12 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %11) #2
%13 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %1) #2
%14 = tail call i32 @gen_S(ptr noundef nonnull %0, i32 noundef %2) #2
%15 = tail call i32 @gen_S(ptr noundef nonnull %0, i32 noundef %3) #2
br label %34
16: ; preds = %4
br i1 %8, label %17, label %23
17: ; preds = %16
%18 = load i32, ptr @OP_EXT2, align 4, !tbaa !12
%19 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %18) #2
%20 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %1) #2
%21 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %2) #2
%22 = tail call i32 @gen_S(ptr noundef nonnull %0, i32 noundef %3) #2
br label %34
23: ; preds = %16
br i1 %7, label %24, label %30
24: ; preds = %23
%25 = load i32, ptr @OP_EXT1, align 4, !tbaa !12
%26 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %25) #2
%27 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %1) #2
%28 = tail call i32 @gen_S(ptr noundef nonnull %0, i32 noundef %2) #2
%29 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %3) #2
br label %34
30: ; preds = %23
%31 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %1) #2
%32 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %2) #2
%33 = tail call i32 @gen_B(ptr noundef nonnull %0, i32 noundef %3) #2
br label %34
34: ; preds = %17, %30, %24, %10
ret void
}
declare i32 @gen_B(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @gen_S(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_5__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!8, !8, i64 0}
| mruby_mrbgems_mruby-compiler_core_extr_codegen.c_genop_2 |
; ModuleID = 'AnghaBench/linux/arch/x86/events/amd/extr_iommu.c_clear_avail_iommu_bnk_cntr.c'
source_filename = "AnghaBench/linux/arch/x86/events/amd/extr_iommu.c_clear_avail_iommu_bnk_cntr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.perf_amd_iommu = type { i32, i32, i64, i32 }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @clear_avail_iommu_bnk_cntr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @clear_avail_iommu_bnk_cntr(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr %0, align 8, !tbaa !5
%5 = icmp slt i32 %4, %1
br i1 %5, label %10, label %6
6: ; preds = %3
%7 = getelementptr inbounds %struct.perf_amd_iommu, ptr %0, i64 0, i32 1
%8 = load i32, ptr %7, align 4, !tbaa !11
%9 = icmp slt i32 %8, %2
br i1 %9, label %10, label %13
10: ; preds = %6, %3
%11 = load i32, ptr @EINVAL, align 4, !tbaa !12
%12 = sub nsw i32 0, %11
br label %26
13: ; preds = %6
%14 = add nsw i32 %2, %1
%15 = mul nsw i32 %1, 3
%16 = add nsw i32 %14, %15
%17 = getelementptr inbounds %struct.perf_amd_iommu, ptr %0, i64 0, i32 3
%18 = tail call i32 @raw_spin_lock_irqsave(ptr noundef nonnull %17, i64 noundef undef) #2
%19 = zext nneg i32 %16 to i64
%20 = shl nuw i64 1, %19
%21 = xor i64 %20, -1
%22 = getelementptr inbounds %struct.perf_amd_iommu, ptr %0, i64 0, i32 2
%23 = load i64, ptr %22, align 8, !tbaa !13
%24 = and i64 %23, %21
store i64 %24, ptr %22, align 8, !tbaa !13
%25 = tail call i32 @raw_spin_unlock_irqrestore(ptr noundef nonnull %17, i64 noundef undef) #2
br label %26
26: ; preds = %13, %10
%27 = phi i32 [ %12, %10 ], [ 0, %13 ]
ret i32 %27
}
declare i32 @raw_spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @raw_spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"perf_amd_iommu", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long long", !8, i64 0}
!11 = !{!6, !7, i64 4}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/linux/arch/x86/events/amd/extr_iommu.c_clear_avail_iommu_bnk_cntr.c'
source_filename = "AnghaBench/linux/arch/x86/events/amd/extr_iommu.c_clear_avail_iommu_bnk_cntr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @clear_avail_iommu_bnk_cntr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @clear_avail_iommu_bnk_cntr(ptr noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr %0, align 8, !tbaa !6
%5 = icmp slt i32 %4, %1
br i1 %5, label %10, label %6
6: ; preds = %3
%7 = getelementptr inbounds i8, ptr %0, i64 4
%8 = load i32, ptr %7, align 4, !tbaa !12
%9 = icmp slt i32 %8, %2
br i1 %9, label %10, label %13
10: ; preds = %6, %3
%11 = load i32, ptr @EINVAL, align 4, !tbaa !13
%12 = sub nsw i32 0, %11
br label %26
13: ; preds = %6
%14 = add nsw i32 %2, %1
%15 = mul nsw i32 %1, 3
%16 = add nsw i32 %14, %15
%17 = getelementptr inbounds i8, ptr %0, i64 16
%18 = tail call i32 @raw_spin_lock_irqsave(ptr noundef nonnull %17, i64 noundef undef) #2
%19 = zext nneg i32 %16 to i64
%20 = shl nuw i64 1, %19
%21 = xor i64 %20, -1
%22 = getelementptr inbounds i8, ptr %0, i64 8
%23 = load i64, ptr %22, align 8, !tbaa !14
%24 = and i64 %23, %21
store i64 %24, ptr %22, align 8, !tbaa !14
%25 = tail call i32 @raw_spin_unlock_irqrestore(ptr noundef nonnull %17, i64 noundef undef) #2
br label %26
26: ; preds = %13, %10
%27 = phi i32 [ %12, %10 ], [ 0, %13 ]
ret i32 %27
}
declare i32 @raw_spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @raw_spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"perf_amd_iommu", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long long", !9, i64 0}
!12 = !{!7, !8, i64 4}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !11, i64 8}
| linux_arch_x86_events_amd_extr_iommu.c_clear_avail_iommu_bnk_cntr |
; ModuleID = 'AnghaBench/freebsd/sys/contrib/octeon-sdk/extr_cvmx-shmem.c___cvmx_shmem_close_standalone.c'
source_filename = "AnghaBench/freebsd/sys/contrib/octeon-sdk/extr_cvmx-shmem.c___cvmx_shmem_close_standalone.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @__cvmx_shmem_close_standalone], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @__cvmx_shmem_close_standalone(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call i32 @__cvmx_shmem_close_dscptr(ptr noundef %0, i32 noundef %1) #2
ret i32 %3
}
declare i32 @__cvmx_shmem_close_dscptr(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/sys/contrib/octeon-sdk/extr_cvmx-shmem.c___cvmx_shmem_close_standalone.c'
source_filename = "AnghaBench/freebsd/sys/contrib/octeon-sdk/extr_cvmx-shmem.c___cvmx_shmem_close_standalone.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @__cvmx_shmem_close_standalone], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @__cvmx_shmem_close_standalone(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call i32 @__cvmx_shmem_close_dscptr(ptr noundef %0, i32 noundef %1) #2
ret i32 %3
}
declare i32 @__cvmx_shmem_close_dscptr(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_sys_contrib_octeon-sdk_extr_cvmx-shmem.c___cvmx_shmem_close_standalone |
; ModuleID = 'AnghaBench/freebsd/sys/dev/mlx5/mlx5_core/extr_mlx5_srq.c_mlx5_srq_event.c'
source_filename = "AnghaBench/freebsd/sys/dev/mlx5/mlx5_core/extr_mlx5_srq.c_mlx5_srq_event.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mlx5_srq_table = type { i32, i32 }
%struct.mlx5_core_srq = type { i32, i32, ptr }
@.str = private unnamed_addr constant [34 x i8] c"Async event for bogus SRQ 0x%08x\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local void @mlx5_srq_event(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = tail call i32 @spin_lock(ptr noundef %0) #2
%5 = getelementptr inbounds %struct.mlx5_srq_table, ptr %0, i64 0, i32 1
%6 = tail call ptr @radix_tree_lookup(ptr noundef nonnull %5, i32 noundef %1) #2
%7 = icmp eq ptr %6, null
br i1 %7, label %17, label %8
8: ; preds = %3
%9 = getelementptr inbounds %struct.mlx5_core_srq, ptr %6, i64 0, i32 1
%10 = tail call i32 @atomic_inc(ptr noundef nonnull %9) #2
%11 = tail call i32 @spin_unlock(ptr noundef %0) #2
%12 = getelementptr inbounds %struct.mlx5_core_srq, ptr %6, i64 0, i32 2
%13 = load ptr, ptr %12, align 8, !tbaa !5
%14 = tail call i32 %13(ptr noundef nonnull %6, i32 noundef %2) #2
%15 = tail call i64 @atomic_dec_and_test(ptr noundef nonnull %9) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %22, label %20
17: ; preds = %3
%18 = tail call i32 @spin_unlock(ptr noundef %0) #2
%19 = tail call i32 @mlx5_core_warn(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %1) #2
br label %22
20: ; preds = %8
%21 = tail call i32 @complete(ptr noundef nonnull %6) #2
br label %22
22: ; preds = %8, %20, %17
ret void
}
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare ptr @radix_tree_lookup(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @atomic_inc(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @mlx5_core_warn(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @atomic_dec_and_test(ptr noundef) local_unnamed_addr #1
declare i32 @complete(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"mlx5_core_srq", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/mlx5/mlx5_core/extr_mlx5_srq.c_mlx5_srq_event.c'
source_filename = "AnghaBench/freebsd/sys/dev/mlx5/mlx5_core/extr_mlx5_srq.c_mlx5_srq_event.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [34 x i8] c"Async event for bogus SRQ 0x%08x\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define void @mlx5_srq_event(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = tail call i32 @spin_lock(ptr noundef %0) #2
%5 = getelementptr inbounds i8, ptr %0, i64 4
%6 = tail call ptr @radix_tree_lookup(ptr noundef nonnull %5, i32 noundef %1) #2
%7 = icmp eq ptr %6, null
br i1 %7, label %17, label %8
8: ; preds = %3
%9 = getelementptr inbounds i8, ptr %6, i64 4
%10 = tail call i32 @atomic_inc(ptr noundef nonnull %9) #2
%11 = tail call i32 @spin_unlock(ptr noundef %0) #2
%12 = getelementptr inbounds i8, ptr %6, i64 8
%13 = load ptr, ptr %12, align 8, !tbaa !6
%14 = tail call i32 %13(ptr noundef nonnull %6, i32 noundef %2) #2
%15 = tail call i64 @atomic_dec_and_test(ptr noundef nonnull %9) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %22, label %20
17: ; preds = %3
%18 = tail call i32 @spin_unlock(ptr noundef %0) #2
%19 = tail call i32 @mlx5_core_warn(ptr noundef %0, ptr noundef nonnull @.str, i32 noundef %1) #2
br label %22
20: ; preds = %8
%21 = tail call i32 @complete(ptr noundef nonnull %6) #2
br label %22
22: ; preds = %8, %20, %17
ret void
}
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare ptr @radix_tree_lookup(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @atomic_inc(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @mlx5_core_warn(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @atomic_dec_and_test(ptr noundef) local_unnamed_addr #1
declare i32 @complete(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"mlx5_core_srq", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
| freebsd_sys_dev_mlx5_mlx5_core_extr_mlx5_srq.c_mlx5_srq_event |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/disp/mdp4/extr_mdp4.xml.h_REG_MDP4_PIPE_SRCP3_BASE.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/disp/mdp4/extr_mdp4.xml.h_REG_MDP4_PIPE_SRCP3_BASE.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @REG_MDP4_PIPE_SRCP3_BASE], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @REG_MDP4_PIPE_SRCP3_BASE(i32 noundef %0) #0 {
%2 = shl i32 %0, 16
%3 = add i32 %2, 131100
ret i32 %3
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/disp/mdp4/extr_mdp4.xml.h_REG_MDP4_PIPE_SRCP3_BASE.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/disp/mdp4/extr_mdp4.xml.h_REG_MDP4_PIPE_SRCP3_BASE.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @REG_MDP4_PIPE_SRCP3_BASE], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @REG_MDP4_PIPE_SRCP3_BASE(i32 noundef %0) #0 {
%2 = shl i32 %0, 16
%3 = add i32 %2, 131100
ret i32 %3
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_gpu_drm_msm_disp_mdp4_extr_mdp4.xml.h_REG_MDP4_PIPE_SRCP3_BASE |
; ModuleID = 'AnghaBench/freebsd/sys/dev/aic7xxx/extr_aic79xx_reg_print.c_ahd_mdffstat_print.c'
source_filename = "AnghaBench/freebsd/sys/dev/aic7xxx/extr_aic79xx_reg_print.c_ahd_mdffstat_print.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MDFFSTAT_parse_table = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [9 x i8] c"MDFFSTAT\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i32 @ahd_mdffstat_print(i32 noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @MDFFSTAT_parse_table, align 4, !tbaa !5
%5 = tail call i32 @ahd_print_register(i32 noundef %4, i32 noundef 7, ptr noundef nonnull @.str, i32 noundef 93, i32 noundef %0, ptr noundef %1, i32 noundef %2) #2
ret i32 %5
}
declare i32 @ahd_print_register(i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/aic7xxx/extr_aic79xx_reg_print.c_ahd_mdffstat_print.c'
source_filename = "AnghaBench/freebsd/sys/dev/aic7xxx/extr_aic79xx_reg_print.c_ahd_mdffstat_print.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MDFFSTAT_parse_table = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [9 x i8] c"MDFFSTAT\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @ahd_mdffstat_print(i32 noundef %0, ptr noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = load i32, ptr @MDFFSTAT_parse_table, align 4, !tbaa !6
%5 = tail call i32 @ahd_print_register(i32 noundef %4, i32 noundef 7, ptr noundef nonnull @.str, i32 noundef 93, i32 noundef %0, ptr noundef %1, i32 noundef %2) #2
ret i32 %5
}
declare i32 @ahd_print_register(i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_dev_aic7xxx_extr_aic79xx_reg_print.c_ahd_mdffstat_print |
; ModuleID = 'AnghaBench/linux/drivers/input/touchscreen/extr_sx8654.c_sx8654_close.c'
source_filename = "AnghaBench/linux/drivers/input/touchscreen/extr_sx8654.c_sx8654_close.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sx8654 = type { ptr, i32, ptr }
%struct.i2c_client = type { i32, i32 }
%struct.TYPE_2__ = type { i32, i32 }
@.str = private unnamed_addr constant [34 x i8] c"writing command CMD_MANUAL failed\00", align 1
@I2C_REG_TOUCH0 = dso_local local_unnamed_addr global i32 0, align 4
@RATE_MANUAL = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [33 x i8] c"writing to I2C_REG_TOUCH0 failed\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @sx8654_close], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @sx8654_close(ptr noundef %0) #0 {
%2 = tail call ptr @input_get_drvdata(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.sx8654, ptr %2, i64 0, i32 2
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.i2c_client, ptr %4, i64 0, i32 1
%6 = load i32, ptr %5, align 4, !tbaa !11
%7 = tail call i32 @disable_irq(i32 noundef %6) #2
%8 = load ptr, ptr %2, align 8, !tbaa !13
%9 = getelementptr inbounds %struct.TYPE_2__, ptr %8, i64 0, i32 1
%10 = load i32, ptr %9, align 4, !tbaa !14
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %1
%13 = getelementptr inbounds %struct.sx8654, ptr %2, i64 0, i32 1
%14 = tail call i32 @del_timer_sync(ptr noundef nonnull %13) #2
%15 = load ptr, ptr %2, align 8, !tbaa !13
br label %16
16: ; preds = %12, %1
%17 = phi ptr [ %15, %12 ], [ %8, %1 ]
%18 = load i32, ptr %17, align 4, !tbaa !16
%19 = tail call i32 @i2c_smbus_write_byte(ptr noundef nonnull %4, i32 noundef %18) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %26
21: ; preds = %16
%22 = load i32, ptr @I2C_REG_TOUCH0, align 4, !tbaa !17
%23 = load i32, ptr @RATE_MANUAL, align 4, !tbaa !17
%24 = tail call i32 @i2c_smbus_write_byte_data(ptr noundef nonnull %4, i32 noundef %22, i32 noundef %23) #2
%25 = icmp eq i32 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %21, %16
%27 = phi ptr [ @.str, %16 ], [ @.str.1, %21 ]
%28 = tail call i32 @dev_err(ptr noundef nonnull %4, ptr noundef nonnull %27) #2
br label %29
29: ; preds = %26, %21
ret void
}
declare ptr @input_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @disable_irq(i32 noundef) local_unnamed_addr #1
declare i32 @del_timer_sync(ptr noundef) local_unnamed_addr #1
declare i32 @i2c_smbus_write_byte(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @i2c_smbus_write_byte_data(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"sx8654", !7, i64 0, !10, i64 8, !7, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!12, !10, i64 4}
!12 = !{!"i2c_client", !10, i64 0, !10, i64 4}
!13 = !{!6, !7, i64 0}
!14 = !{!15, !10, i64 4}
!15 = !{!"TYPE_2__", !10, i64 0, !10, i64 4}
!16 = !{!15, !10, i64 0}
!17 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/input/touchscreen/extr_sx8654.c_sx8654_close.c'
source_filename = "AnghaBench/linux/drivers/input/touchscreen/extr_sx8654.c_sx8654_close.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [34 x i8] c"writing command CMD_MANUAL failed\00", align 1
@I2C_REG_TOUCH0 = common local_unnamed_addr global i32 0, align 4
@RATE_MANUAL = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [33 x i8] c"writing to I2C_REG_TOUCH0 failed\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @sx8654_close], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @sx8654_close(ptr noundef %0) #0 {
%2 = tail call ptr @input_get_drvdata(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %2, i64 16
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %4, i64 4
%6 = load i32, ptr %5, align 4, !tbaa !12
%7 = tail call i32 @disable_irq(i32 noundef %6) #2
%8 = load ptr, ptr %2, align 8, !tbaa !14
%9 = getelementptr inbounds i8, ptr %8, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !15
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %16
12: ; preds = %1
%13 = getelementptr inbounds i8, ptr %2, i64 8
%14 = tail call i32 @del_timer_sync(ptr noundef nonnull %13) #2
%15 = load ptr, ptr %2, align 8, !tbaa !14
br label %16
16: ; preds = %12, %1
%17 = phi ptr [ %15, %12 ], [ %8, %1 ]
%18 = load i32, ptr %17, align 4, !tbaa !17
%19 = tail call i32 @i2c_smbus_write_byte(ptr noundef nonnull %4, i32 noundef %18) #2
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %26
21: ; preds = %16
%22 = load i32, ptr @I2C_REG_TOUCH0, align 4, !tbaa !18
%23 = load i32, ptr @RATE_MANUAL, align 4, !tbaa !18
%24 = tail call i32 @i2c_smbus_write_byte_data(ptr noundef nonnull %4, i32 noundef %22, i32 noundef %23) #2
%25 = icmp eq i32 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %21, %16
%27 = phi ptr [ @.str, %16 ], [ @.str.1, %21 ]
%28 = tail call i32 @dev_err(ptr noundef nonnull %4, ptr noundef nonnull %27) #2
br label %29
29: ; preds = %26, %21
ret void
}
declare ptr @input_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @disable_irq(i32 noundef) local_unnamed_addr #1
declare i32 @del_timer_sync(ptr noundef) local_unnamed_addr #1
declare i32 @i2c_smbus_write_byte(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @i2c_smbus_write_byte_data(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"sx8654", !8, i64 0, !11, i64 8, !8, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!13, !11, i64 4}
!13 = !{!"i2c_client", !11, i64 0, !11, i64 4}
!14 = !{!7, !8, i64 0}
!15 = !{!16, !11, i64 4}
!16 = !{!"TYPE_2__", !11, i64 0, !11, i64 4}
!17 = !{!16, !11, i64 0}
!18 = !{!11, !11, i64 0}
| linux_drivers_input_touchscreen_extr_sx8654.c_sx8654_close |
; ModuleID = 'AnghaBench/freebsd/sys/dev/xen/netfront/extr_netfront.c_xn_ioctl.c'
source_filename = "AnghaBench/freebsd/sys/dev/xen/netfront/extr_netfront.c_xn_ioctl.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ifnet = type { i32, i32, i32, i32, i32, ptr }
%struct.netfront_info = type { i32, i32, i32, i32 }
%struct.ifreq = type { i32, i32 }
@IFF_DRV_RUNNING = dso_local local_unnamed_addr global i32 0, align 4
@IFF_UP = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_TXCSUM = dso_local local_unnamed_addr global i32 0, align 4
@XN_CSUM_FEATURES = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_TSO4 = dso_local local_unnamed_addr global i32 0, align 4
@CSUM_TSO = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_RXCSUM = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_LRO = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [50 x i8] c"performing interface reset due to feature change\0A\00", align 1
@XST_NIL = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [18 x i8] c"feature-gso-tcpv4\00", align 1
@.str.2 = private unnamed_addr constant [24 x i8] c"feature-no-csum-offload\00", align 1
@XenbusStateClosing = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [7 x i8] c"xn_rst\00", align 1
@hz = dso_local local_unnamed_addr global i32 0, align 4
@AF_INET = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @xn_ioctl], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @xn_ioctl(ptr noundef %0, i32 noundef %1, i64 noundef %2) #0 {
%4 = getelementptr inbounds %struct.ifnet, ptr %0, i64 0, i32 5
%5 = load ptr, ptr %4, align 8, !tbaa !5
%6 = inttoptr i64 %2 to ptr
%7 = getelementptr inbounds %struct.netfront_info, ptr %5, i64 0, i32 3
%8 = load i32, ptr %7, align 4, !tbaa !11
switch i32 %1, label %108 [
i32 132, label %9
i32 128, label %11
i32 130, label %24
i32 131, label %43
i32 135, label %110
i32 134, label %110
i32 129, label %105
i32 133, label %105
]
9: ; preds = %3
%10 = tail call i32 @ether_ioctl(ptr noundef nonnull %0, i32 noundef 132, i64 noundef %2) #2
br label %110
11: ; preds = %3
%12 = getelementptr inbounds %struct.ifnet, ptr %0, i64 0, i32 4
%13 = load i32, ptr %12, align 8, !tbaa !13
%14 = getelementptr inbounds %struct.ifreq, ptr %6, i64 0, i32 1
%15 = load i32, ptr %14, align 4, !tbaa !14
%16 = icmp eq i32 %13, %15
br i1 %16, label %110, label %17
17: ; preds = %11
store i32 %15, ptr %12, align 8, !tbaa !13
%18 = load i32, ptr @IFF_DRV_RUNNING, align 4, !tbaa !16
%19 = xor i32 %18, -1
%20 = getelementptr inbounds %struct.ifnet, ptr %0, i64 0, i32 1
%21 = load i32, ptr %20, align 4, !tbaa !17
%22 = and i32 %21, %19
store i32 %22, ptr %20, align 4, !tbaa !17
%23 = tail call i32 @xn_ifinit(ptr noundef nonnull %5) #2
br label %110
24: ; preds = %3
%25 = tail call i32 @XN_LOCK(ptr noundef nonnull %5) #2
%26 = load i32, ptr %0, align 8, !tbaa !18
%27 = load i32, ptr @IFF_UP, align 4, !tbaa !16
%28 = and i32 %27, %26
%29 = icmp eq i32 %28, 0
br i1 %29, label %32, label %30
30: ; preds = %24
%31 = tail call i32 @xn_ifinit_locked(ptr noundef nonnull %5) #2
br label %40
32: ; preds = %24
%33 = getelementptr inbounds %struct.ifnet, ptr %0, i64 0, i32 1
%34 = load i32, ptr %33, align 4, !tbaa !17
%35 = load i32, ptr @IFF_DRV_RUNNING, align 4, !tbaa !16
%36 = and i32 %35, %34
%37 = icmp eq i32 %36, 0
br i1 %37, label %40, label %38
38: ; preds = %32
%39 = tail call i32 @xn_stop(ptr noundef nonnull %5) #2
br label %40
40: ; preds = %32, %38, %30
%41 = load i32, ptr %0, align 8, !tbaa !18
store i32 %41, ptr %5, align 4, !tbaa !19
%42 = tail call i32 @XN_UNLOCK(ptr noundef nonnull %5) #2
br label %110
43: ; preds = %3
%44 = load i32, ptr %6, align 4, !tbaa !20
%45 = getelementptr inbounds %struct.ifnet, ptr %0, i64 0, i32 2
%46 = load i32, ptr %45, align 8, !tbaa !21
%47 = xor i32 %46, %44
%48 = load i32, ptr @IFCAP_TXCSUM, align 4, !tbaa !16
%49 = and i32 %47, %48
%50 = icmp eq i32 %49, 0
br i1 %50, label %57, label %51
51: ; preds = %43
%52 = xor i32 %48, %46
store i32 %52, ptr %45, align 8, !tbaa !21
%53 = load i32, ptr @XN_CSUM_FEATURES, align 4, !tbaa !16
%54 = getelementptr inbounds %struct.ifnet, ptr %0, i64 0, i32 3
%55 = load i32, ptr %54, align 4, !tbaa !22
%56 = xor i32 %55, %53
store i32 %56, ptr %54, align 4, !tbaa !22
br label %57
57: ; preds = %51, %43
%58 = phi i32 [ %52, %51 ], [ %46, %43 ]
%59 = load i32, ptr @IFCAP_TSO4, align 4, !tbaa !16
%60 = and i32 %59, %47
%61 = icmp eq i32 %60, 0
br i1 %61, label %68, label %62
62: ; preds = %57
%63 = xor i32 %58, %59
store i32 %63, ptr %45, align 8, !tbaa !21
%64 = load i32, ptr @CSUM_TSO, align 4, !tbaa !16
%65 = getelementptr inbounds %struct.ifnet, ptr %0, i64 0, i32 3
%66 = load i32, ptr %65, align 4, !tbaa !22
%67 = xor i32 %66, %64
store i32 %67, ptr %65, align 4, !tbaa !22
br label %68
68: ; preds = %62, %57
%69 = phi i32 [ %63, %62 ], [ %58, %57 ]
%70 = load i32, ptr @IFCAP_RXCSUM, align 4, !tbaa !16
%71 = load i32, ptr @IFCAP_LRO, align 4, !tbaa !16
%72 = or i32 %71, %70
%73 = and i32 %72, %47
%74 = icmp eq i32 %73, 0
br i1 %74, label %110, label %75
75: ; preds = %68
%76 = or i32 %70, %71
%77 = and i32 %47, %76
%78 = icmp eq i32 %77, 0
br i1 %78, label %88, label %79
79: ; preds = %75
%80 = and i32 %71, %47
%81 = icmp eq i32 %80, 0
%82 = and i32 %70, %47
%83 = icmp eq i32 %82, 0
%84 = select i1 %83, i32 0, i32 %70
%85 = xor i32 %69, %84
%86 = select i1 %81, i32 0, i32 %71
%87 = xor i32 %85, %86
store i32 %87, ptr %45, align 8, !tbaa !21
br label %88
88: ; preds = %75, %79
%89 = tail call i32 @device_printf(i32 noundef %8, ptr noundef nonnull @.str) #2
%90 = tail call i32 @XN_LOCK(ptr noundef nonnull %5) #2
%91 = tail call i32 @netfront_carrier_off(ptr noundef nonnull %5) #2
%92 = getelementptr inbounds %struct.netfront_info, ptr %5, i64 0, i32 1
store i32 1, ptr %92, align 4, !tbaa !23
%93 = tail call i32 @XN_UNLOCK(ptr noundef nonnull %5) #2
%94 = load i32, ptr @XST_NIL, align 4, !tbaa !16
%95 = tail call i32 @xenbus_get_node(i32 noundef %8) #2
%96 = tail call i32 @xs_rm(i32 noundef %94, i32 noundef %95, ptr noundef nonnull @.str.1) #2
%97 = load i32, ptr @XST_NIL, align 4, !tbaa !16
%98 = tail call i32 @xenbus_get_node(i32 noundef %8) #2
%99 = tail call i32 @xs_rm(i32 noundef %97, i32 noundef %98, ptr noundef nonnull @.str.2) #2
%100 = load i32, ptr @XenbusStateClosing, align 4, !tbaa !16
%101 = tail call i32 @xenbus_set_state(i32 noundef %8, i32 noundef %100) #2
%102 = load i32, ptr @hz, align 4, !tbaa !16
%103 = mul nsw i32 %102, 30
%104 = tail call i32 @tsleep(ptr noundef nonnull %5, i32 noundef 0, ptr noundef nonnull @.str.3, i32 noundef %103) #2
br label %110
105: ; preds = %3, %3
%106 = getelementptr inbounds %struct.netfront_info, ptr %5, i64 0, i32 2
%107 = tail call i32 @ifmedia_ioctl(ptr noundef nonnull %0, ptr noundef %6, ptr noundef nonnull %106, i32 noundef %1) #2
br label %110
108: ; preds = %3
%109 = tail call i32 @ether_ioctl(ptr noundef nonnull %0, i32 noundef %1, i64 noundef %2) #2
br label %110
110: ; preds = %68, %3, %3, %11, %108, %105, %88, %40, %17, %9
%111 = phi i32 [ %109, %108 ], [ %107, %105 ], [ 0, %3 ], [ 0, %3 ], [ %104, %88 ], [ 0, %40 ], [ 0, %11 ], [ 0, %17 ], [ %10, %9 ], [ 0, %68 ]
ret i32 %111
}
declare i32 @ether_ioctl(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @xn_ifinit(ptr noundef) local_unnamed_addr #1
declare i32 @XN_LOCK(ptr noundef) local_unnamed_addr #1
declare i32 @xn_ifinit_locked(ptr noundef) local_unnamed_addr #1
declare i32 @xn_stop(ptr noundef) local_unnamed_addr #1
declare i32 @XN_UNLOCK(ptr noundef) local_unnamed_addr #1
declare i32 @device_printf(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @netfront_carrier_off(ptr noundef) local_unnamed_addr #1
declare i32 @xs_rm(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @xenbus_get_node(i32 noundef) local_unnamed_addr #1
declare i32 @xenbus_set_state(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tsleep(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ifmedia_ioctl(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 24}
!6 = !{!"ifnet", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !10, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !7, i64 12}
!12 = !{!"netfront_info", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12}
!13 = !{!6, !7, i64 16}
!14 = !{!15, !7, i64 4}
!15 = !{!"ifreq", !7, i64 0, !7, i64 4}
!16 = !{!7, !7, i64 0}
!17 = !{!6, !7, i64 4}
!18 = !{!6, !7, i64 0}
!19 = !{!12, !7, i64 0}
!20 = !{!15, !7, i64 0}
!21 = !{!6, !7, i64 8}
!22 = !{!6, !7, i64 12}
!23 = !{!12, !7, i64 4}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/xen/netfront/extr_netfront.c_xn_ioctl.c'
source_filename = "AnghaBench/freebsd/sys/dev/xen/netfront/extr_netfront.c_xn_ioctl.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IFF_DRV_RUNNING = common local_unnamed_addr global i32 0, align 4
@IFF_UP = common local_unnamed_addr global i32 0, align 4
@IFCAP_TXCSUM = common local_unnamed_addr global i32 0, align 4
@XN_CSUM_FEATURES = common local_unnamed_addr global i32 0, align 4
@IFCAP_TSO4 = common local_unnamed_addr global i32 0, align 4
@CSUM_TSO = common local_unnamed_addr global i32 0, align 4
@IFCAP_RXCSUM = common local_unnamed_addr global i32 0, align 4
@IFCAP_LRO = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [50 x i8] c"performing interface reset due to feature change\0A\00", align 1
@XST_NIL = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [18 x i8] c"feature-gso-tcpv4\00", align 1
@.str.2 = private unnamed_addr constant [24 x i8] c"feature-no-csum-offload\00", align 1
@XenbusStateClosing = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [7 x i8] c"xn_rst\00", align 1
@hz = common local_unnamed_addr global i32 0, align 4
@AF_INET = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @xn_ioctl], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @xn_ioctl(ptr noundef %0, i32 noundef %1, i64 noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %0, i64 24
%5 = load ptr, ptr %4, align 8, !tbaa !6
%6 = inttoptr i64 %2 to ptr
%7 = getelementptr inbounds i8, ptr %5, i64 12
%8 = load i32, ptr %7, align 4, !tbaa !12
switch i32 %1, label %103 [
i32 132, label %9
i32 128, label %11
i32 130, label %24
i32 131, label %43
i32 135, label %105
i32 134, label %105
i32 129, label %100
i32 133, label %100
]
9: ; preds = %3
%10 = tail call i32 @ether_ioctl(ptr noundef nonnull %0, i32 noundef 132, i64 noundef %2) #2
br label %105
11: ; preds = %3
%12 = getelementptr inbounds i8, ptr %0, i64 16
%13 = load i32, ptr %12, align 8, !tbaa !14
%14 = getelementptr inbounds i8, ptr %6, i64 4
%15 = load i32, ptr %14, align 4, !tbaa !15
%16 = icmp eq i32 %13, %15
br i1 %16, label %105, label %17
17: ; preds = %11
store i32 %15, ptr %12, align 8, !tbaa !14
%18 = load i32, ptr @IFF_DRV_RUNNING, align 4, !tbaa !17
%19 = xor i32 %18, -1
%20 = getelementptr inbounds i8, ptr %0, i64 4
%21 = load i32, ptr %20, align 4, !tbaa !18
%22 = and i32 %21, %19
store i32 %22, ptr %20, align 4, !tbaa !18
%23 = tail call i32 @xn_ifinit(ptr noundef nonnull %5) #2
br label %105
24: ; preds = %3
%25 = tail call i32 @XN_LOCK(ptr noundef nonnull %5) #2
%26 = load i32, ptr %0, align 8, !tbaa !19
%27 = load i32, ptr @IFF_UP, align 4, !tbaa !17
%28 = and i32 %27, %26
%29 = icmp eq i32 %28, 0
br i1 %29, label %32, label %30
30: ; preds = %24
%31 = tail call i32 @xn_ifinit_locked(ptr noundef nonnull %5) #2
br label %40
32: ; preds = %24
%33 = getelementptr inbounds i8, ptr %0, i64 4
%34 = load i32, ptr %33, align 4, !tbaa !18
%35 = load i32, ptr @IFF_DRV_RUNNING, align 4, !tbaa !17
%36 = and i32 %35, %34
%37 = icmp eq i32 %36, 0
br i1 %37, label %40, label %38
38: ; preds = %32
%39 = tail call i32 @xn_stop(ptr noundef nonnull %5) #2
br label %40
40: ; preds = %32, %38, %30
%41 = load i32, ptr %0, align 8, !tbaa !19
store i32 %41, ptr %5, align 4, !tbaa !20
%42 = tail call i32 @XN_UNLOCK(ptr noundef nonnull %5) #2
br label %105
43: ; preds = %3
%44 = load i32, ptr %6, align 4, !tbaa !21
%45 = getelementptr inbounds i8, ptr %0, i64 8
%46 = load i32, ptr %45, align 8, !tbaa !22
%47 = xor i32 %46, %44
%48 = load i32, ptr @IFCAP_TXCSUM, align 4, !tbaa !17
%49 = and i32 %47, %48
%50 = icmp eq i32 %49, 0
br i1 %50, label %57, label %51
51: ; preds = %43
%52 = xor i32 %48, %46
store i32 %52, ptr %45, align 8, !tbaa !22
%53 = load i32, ptr @XN_CSUM_FEATURES, align 4, !tbaa !17
%54 = getelementptr inbounds i8, ptr %0, i64 12
%55 = load i32, ptr %54, align 4, !tbaa !23
%56 = xor i32 %55, %53
store i32 %56, ptr %54, align 4, !tbaa !23
br label %57
57: ; preds = %51, %43
%58 = phi i32 [ %52, %51 ], [ %46, %43 ]
%59 = load i32, ptr @IFCAP_TSO4, align 4, !tbaa !17
%60 = and i32 %59, %47
%61 = icmp eq i32 %60, 0
br i1 %61, label %68, label %62
62: ; preds = %57
%63 = xor i32 %58, %59
store i32 %63, ptr %45, align 8, !tbaa !22
%64 = load i32, ptr @CSUM_TSO, align 4, !tbaa !17
%65 = getelementptr inbounds i8, ptr %0, i64 12
%66 = load i32, ptr %65, align 4, !tbaa !23
%67 = xor i32 %66, %64
store i32 %67, ptr %65, align 4, !tbaa !23
br label %68
68: ; preds = %62, %57
%69 = phi i32 [ %63, %62 ], [ %58, %57 ]
%70 = load i32, ptr @IFCAP_RXCSUM, align 4, !tbaa !17
%71 = load i32, ptr @IFCAP_LRO, align 4, !tbaa !17
%72 = or i32 %71, %70
%73 = and i32 %72, %47
%74 = icmp eq i32 %73, 0
br i1 %74, label %105, label %75
75: ; preds = %68
%76 = and i32 %71, %47
%77 = icmp eq i32 %76, 0
%78 = and i32 %70, %47
%79 = icmp eq i32 %78, 0
%80 = select i1 %79, i32 0, i32 %70
%81 = xor i32 %69, %80
%82 = select i1 %77, i32 0, i32 %71
%83 = xor i32 %81, %82
store i32 %83, ptr %45, align 8, !tbaa !22
%84 = tail call i32 @device_printf(i32 noundef %8, ptr noundef nonnull @.str) #2
%85 = tail call i32 @XN_LOCK(ptr noundef nonnull %5) #2
%86 = tail call i32 @netfront_carrier_off(ptr noundef nonnull %5) #2
%87 = getelementptr inbounds i8, ptr %5, i64 4
store i32 1, ptr %87, align 4, !tbaa !24
%88 = tail call i32 @XN_UNLOCK(ptr noundef nonnull %5) #2
%89 = load i32, ptr @XST_NIL, align 4, !tbaa !17
%90 = tail call i32 @xenbus_get_node(i32 noundef %8) #2
%91 = tail call i32 @xs_rm(i32 noundef %89, i32 noundef %90, ptr noundef nonnull @.str.1) #2
%92 = load i32, ptr @XST_NIL, align 4, !tbaa !17
%93 = tail call i32 @xenbus_get_node(i32 noundef %8) #2
%94 = tail call i32 @xs_rm(i32 noundef %92, i32 noundef %93, ptr noundef nonnull @.str.2) #2
%95 = load i32, ptr @XenbusStateClosing, align 4, !tbaa !17
%96 = tail call i32 @xenbus_set_state(i32 noundef %8, i32 noundef %95) #2
%97 = load i32, ptr @hz, align 4, !tbaa !17
%98 = mul nsw i32 %97, 30
%99 = tail call i32 @tsleep(ptr noundef nonnull %5, i32 noundef 0, ptr noundef nonnull @.str.3, i32 noundef %98) #2
br label %105
100: ; preds = %3, %3
%101 = getelementptr inbounds i8, ptr %5, i64 8
%102 = tail call i32 @ifmedia_ioctl(ptr noundef nonnull %0, ptr noundef %6, ptr noundef nonnull %101, i32 noundef %1) #2
br label %105
103: ; preds = %3
%104 = tail call i32 @ether_ioctl(ptr noundef nonnull %0, i32 noundef %1, i64 noundef %2) #2
br label %105
105: ; preds = %68, %3, %3, %11, %103, %100, %75, %40, %17, %9
%106 = phi i32 [ %104, %103 ], [ %102, %100 ], [ 0, %3 ], [ 0, %3 ], [ %99, %75 ], [ 0, %40 ], [ 0, %11 ], [ 0, %17 ], [ %10, %9 ], [ 0, %68 ]
ret i32 %106
}
declare i32 @ether_ioctl(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @xn_ifinit(ptr noundef) local_unnamed_addr #1
declare i32 @XN_LOCK(ptr noundef) local_unnamed_addr #1
declare i32 @xn_ifinit_locked(ptr noundef) local_unnamed_addr #1
declare i32 @xn_stop(ptr noundef) local_unnamed_addr #1
declare i32 @XN_UNLOCK(ptr noundef) local_unnamed_addr #1
declare i32 @device_printf(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @netfront_carrier_off(ptr noundef) local_unnamed_addr #1
declare i32 @xs_rm(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @xenbus_get_node(i32 noundef) local_unnamed_addr #1
declare i32 @xenbus_set_state(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @tsleep(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ifmedia_ioctl(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 24}
!7 = !{!"ifnet", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !11, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 12}
!13 = !{!"netfront_info", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12}
!14 = !{!7, !8, i64 16}
!15 = !{!16, !8, i64 4}
!16 = !{!"ifreq", !8, i64 0, !8, i64 4}
!17 = !{!8, !8, i64 0}
!18 = !{!7, !8, i64 4}
!19 = !{!7, !8, i64 0}
!20 = !{!13, !8, i64 0}
!21 = !{!16, !8, i64 0}
!22 = !{!7, !8, i64 8}
!23 = !{!7, !8, i64 12}
!24 = !{!13, !8, i64 4}
| freebsd_sys_dev_xen_netfront_extr_netfront.c_xn_ioctl |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/netronome/nfp/bpf/extr_main.h_is_mbpf_classic_store_pkt.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/netronome/nfp/bpf/extr_main.h_is_mbpf_classic_store_pkt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PTR_TO_PACKET = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @is_mbpf_classic_store_pkt], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @is_mbpf_classic_store_pkt(ptr noundef %0) #0 {
%2 = tail call i64 @is_mbpf_classic_store(ptr noundef %0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = load i64, ptr %0, align 8, !tbaa !5
%6 = load i64, ptr @PTR_TO_PACKET, align 8, !tbaa !11
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %4, %1
%10 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %10
}
declare i64 @is_mbpf_classic_store(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"nfp_insn_meta", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/netronome/nfp/bpf/extr_main.h_is_mbpf_classic_store_pkt.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/netronome/nfp/bpf/extr_main.h_is_mbpf_classic_store_pkt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PTR_TO_PACKET = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @is_mbpf_classic_store_pkt], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @is_mbpf_classic_store_pkt(ptr noundef %0) #0 {
%2 = tail call i64 @is_mbpf_classic_store(ptr noundef %0) #2
%3 = icmp eq i64 %2, 0
br i1 %3, label %9, label %4
4: ; preds = %1
%5 = load i64, ptr %0, align 8, !tbaa !6
%6 = load i64, ptr @PTR_TO_PACKET, align 8, !tbaa !12
%7 = icmp eq i64 %5, %6
%8 = zext i1 %7 to i32
br label %9
9: ; preds = %4, %1
%10 = phi i32 [ 0, %1 ], [ %8, %4 ]
ret i32 %10
}
declare i64 @is_mbpf_classic_store(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"nfp_insn_meta", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!9, !9, i64 0}
| linux_drivers_net_ethernet_netronome_nfp_bpf_extr_main.h_is_mbpf_classic_store_pkt |
; ModuleID = 'AnghaBench/git/builtin/extr_remote.c_get_url.c'
source_filename = "AnghaBench/git/builtin/extr_remote.c_get_url.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.option = type { i32 }
%struct.remote = type { ptr, i32, ptr, i32 }
@.str = private unnamed_addr constant [5 x i8] c"push\00", align 1
@.str.1 = private unnamed_addr constant [39 x i8] c"query push URLs rather than fetch URLs\00", align 1
@.str.2 = private unnamed_addr constant [4 x i8] c"all\00", align 1
@.str.3 = private unnamed_addr constant [16 x i8] c"return all URLs\00", align 1
@builtin_remote_geturl_usage = dso_local local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [20 x i8] c"No such remote '%s'\00", align 1
@.str.5 = private unnamed_addr constant [35 x i8] c"no URLs configured for remote '%s'\00", align 1
@.str.6 = private unnamed_addr constant [3 x i8] c"%s\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @get_url], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @get_url(i32 noundef %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
%4 = alloca i32, align 4
%5 = alloca [3 x %struct.option], align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
store i32 0, ptr %3, align 4, !tbaa !5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
store i32 0, ptr %4, align 4, !tbaa !5
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %5) #3
%6 = tail call i32 @N_(ptr noundef nonnull @.str.1) #3
%7 = call i32 @OPT_BOOL(i8 noundef signext 0, ptr noundef nonnull @.str, ptr noundef nonnull %3, i32 noundef %6) #3
store i32 %7, ptr %5, align 4
%8 = getelementptr inbounds %struct.option, ptr %5, i64 1
%9 = call i32 @N_(ptr noundef nonnull @.str.3) #3
%10 = call i32 @OPT_BOOL(i8 noundef signext 0, ptr noundef nonnull @.str.2, ptr noundef nonnull %4, i32 noundef %9) #3
store i32 %10, ptr %8, align 4
%11 = getelementptr inbounds %struct.option, ptr %5, i64 2
%12 = call i32 (...) @OPT_END() #3
store i32 %12, ptr %11, align 4
%13 = load i32, ptr @builtin_remote_geturl_usage, align 4, !tbaa !5
%14 = call i32 @parse_options(i32 noundef %0, ptr noundef %1, ptr noundef null, ptr noundef nonnull %5, i32 noundef %13, i32 noundef 0) #3
%15 = icmp eq i32 %14, 1
br i1 %15, label %19, label %16
16: ; preds = %2
%17 = load i32, ptr @builtin_remote_geturl_usage, align 4, !tbaa !5
%18 = call i32 @usage_with_options(i32 noundef %17, ptr noundef nonnull %5) #3
br label %19
19: ; preds = %16, %2
%20 = load ptr, ptr %1, align 8, !tbaa !9
%21 = call ptr @remote_get(ptr noundef %20) #3
%22 = call i32 @remote_is_configured(ptr noundef %21, i32 noundef 1) #3
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %27
24: ; preds = %19
%25 = call i32 @_(ptr noundef nonnull @.str.4) #3
%26 = call i32 @die(i32 noundef %25, ptr noundef %20) #3
br label %27
27: ; preds = %24, %19
%28 = load i32, ptr %3, align 4, !tbaa !5
%29 = icmp eq i32 %28, 0
br i1 %29, label %35, label %30
30: ; preds = %27
%31 = load ptr, ptr %21, align 8, !tbaa !11
%32 = getelementptr inbounds %struct.remote, ptr %21, i64 0, i32 1
%33 = load i32, ptr %32, align 8, !tbaa !13
%34 = icmp eq i32 %33, 0
br i1 %34, label %35, label %41
35: ; preds = %27, %30
%36 = getelementptr inbounds %struct.remote, ptr %21, i64 0, i32 2
%37 = load ptr, ptr %36, align 8, !tbaa !14
%38 = getelementptr inbounds %struct.remote, ptr %21, i64 0, i32 3
%39 = load i32, ptr %38, align 8, !tbaa !15
%40 = icmp eq i32 %39, 0
br i1 %40, label %46, label %41
41: ; preds = %30, %35
%42 = phi i32 [ %39, %35 ], [ %33, %30 ]
%43 = phi ptr [ %37, %35 ], [ %31, %30 ]
%44 = load i32, ptr %4, align 4, !tbaa !5
%45 = icmp eq i32 %44, 0
br i1 %45, label %62, label %51
46: ; preds = %35
%47 = call i32 @_(ptr noundef nonnull @.str.5) #3
%48 = call i32 @die(i32 noundef %47, ptr noundef %20) #3
%49 = load i32, ptr %4, align 4, !tbaa !5
%50 = icmp eq i32 %49, 0
br i1 %50, label %62, label %66
51: ; preds = %41
%52 = icmp sgt i32 %42, 0
br i1 %52, label %53, label %66
53: ; preds = %51
%54 = zext nneg i32 %42 to i64
br label %55
55: ; preds = %53, %55
%56 = phi i64 [ 0, %53 ], [ %60, %55 ]
%57 = getelementptr inbounds ptr, ptr %43, i64 %56
%58 = load ptr, ptr %57, align 8, !tbaa !9
%59 = call i32 @printf_ln(ptr noundef nonnull @.str.6, ptr noundef %58) #3
%60 = add nuw nsw i64 %56, 1
%61 = icmp eq i64 %60, %54
br i1 %61, label %66, label %55, !llvm.loop !16
62: ; preds = %46, %41
%63 = phi ptr [ %37, %46 ], [ %43, %41 ]
%64 = load ptr, ptr %63, align 8, !tbaa !9
%65 = call i32 @printf_ln(ptr noundef nonnull @.str.6, ptr noundef %64) #3
br label %66
66: ; preds = %55, %46, %51, %62
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @OPT_BOOL(i8 noundef signext, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @N_(ptr noundef) local_unnamed_addr #2
declare i32 @OPT_END(...) local_unnamed_addr #2
declare i32 @parse_options(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @usage_with_options(i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @remote_get(ptr noundef) local_unnamed_addr #2
declare i32 @remote_is_configured(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @die(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @_(ptr noundef) local_unnamed_addr #2
declare i32 @printf_ln(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"remote", !10, i64 0, !6, i64 8, !10, i64 16, !6, i64 24}
!13 = !{!12, !6, i64 8}
!14 = !{!12, !10, i64 16}
!15 = !{!12, !6, i64 24}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/git/builtin/extr_remote.c_get_url.c'
source_filename = "AnghaBench/git/builtin/extr_remote.c_get_url.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.option = type { i32 }
@.str = private unnamed_addr constant [5 x i8] c"push\00", align 1
@.str.1 = private unnamed_addr constant [39 x i8] c"query push URLs rather than fetch URLs\00", align 1
@.str.2 = private unnamed_addr constant [4 x i8] c"all\00", align 1
@.str.3 = private unnamed_addr constant [16 x i8] c"return all URLs\00", align 1
@builtin_remote_geturl_usage = common local_unnamed_addr global i32 0, align 4
@.str.4 = private unnamed_addr constant [20 x i8] c"No such remote '%s'\00", align 1
@.str.5 = private unnamed_addr constant [35 x i8] c"no URLs configured for remote '%s'\00", align 1
@.str.6 = private unnamed_addr constant [3 x i8] c"%s\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @get_url], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @get_url(i32 noundef %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
%4 = alloca i32, align 4
%5 = alloca [3 x %struct.option], align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
store i32 0, ptr %3, align 4, !tbaa !6
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #3
store i32 0, ptr %4, align 4, !tbaa !6
call void @llvm.lifetime.start.p0(i64 12, ptr nonnull %5) #3
%6 = tail call i32 @N_(ptr noundef nonnull @.str.1) #3
%7 = call i32 @OPT_BOOL(i8 noundef signext 0, ptr noundef nonnull @.str, ptr noundef nonnull %3, i32 noundef %6) #3
store i32 %7, ptr %5, align 4
%8 = getelementptr inbounds i8, ptr %5, i64 4
%9 = call i32 @N_(ptr noundef nonnull @.str.3) #3
%10 = call i32 @OPT_BOOL(i8 noundef signext 0, ptr noundef nonnull @.str.2, ptr noundef nonnull %4, i32 noundef %9) #3
store i32 %10, ptr %8, align 4
%11 = getelementptr inbounds i8, ptr %5, i64 8
%12 = call i32 @OPT_END() #3
store i32 %12, ptr %11, align 4
%13 = load i32, ptr @builtin_remote_geturl_usage, align 4, !tbaa !6
%14 = call i32 @parse_options(i32 noundef %0, ptr noundef %1, ptr noundef null, ptr noundef nonnull %5, i32 noundef %13, i32 noundef 0) #3
%15 = icmp eq i32 %14, 1
br i1 %15, label %19, label %16
16: ; preds = %2
%17 = load i32, ptr @builtin_remote_geturl_usage, align 4, !tbaa !6
%18 = call i32 @usage_with_options(i32 noundef %17, ptr noundef nonnull %5) #3
br label %19
19: ; preds = %16, %2
%20 = load ptr, ptr %1, align 8, !tbaa !10
%21 = call ptr @remote_get(ptr noundef %20) #3
%22 = call i32 @remote_is_configured(ptr noundef %21, i32 noundef 1) #3
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %27
24: ; preds = %19
%25 = call i32 @_(ptr noundef nonnull @.str.4) #3
%26 = call i32 @die(i32 noundef %25, ptr noundef %20) #3
br label %27
27: ; preds = %24, %19
%28 = load i32, ptr %3, align 4, !tbaa !6
%29 = icmp eq i32 %28, 0
br i1 %29, label %35, label %30
30: ; preds = %27
%31 = load ptr, ptr %21, align 8, !tbaa !12
%32 = getelementptr inbounds i8, ptr %21, i64 8
%33 = load i32, ptr %32, align 8, !tbaa !14
%34 = icmp eq i32 %33, 0
br i1 %34, label %35, label %41
35: ; preds = %27, %30
%36 = getelementptr inbounds i8, ptr %21, i64 16
%37 = load ptr, ptr %36, align 8, !tbaa !15
%38 = getelementptr inbounds i8, ptr %21, i64 24
%39 = load i32, ptr %38, align 8, !tbaa !16
%40 = icmp eq i32 %39, 0
br i1 %40, label %46, label %41
41: ; preds = %30, %35
%42 = phi i32 [ %39, %35 ], [ %33, %30 ]
%43 = phi ptr [ %37, %35 ], [ %31, %30 ]
%44 = load i32, ptr %4, align 4, !tbaa !6
%45 = icmp eq i32 %44, 0
br i1 %45, label %62, label %51
46: ; preds = %35
%47 = call i32 @_(ptr noundef nonnull @.str.5) #3
%48 = call i32 @die(i32 noundef %47, ptr noundef %20) #3
%49 = load i32, ptr %4, align 4, !tbaa !6
%50 = icmp eq i32 %49, 0
br i1 %50, label %62, label %66
51: ; preds = %41
%52 = icmp sgt i32 %42, 0
br i1 %52, label %53, label %66
53: ; preds = %51
%54 = zext nneg i32 %42 to i64
br label %55
55: ; preds = %53, %55
%56 = phi i64 [ 0, %53 ], [ %60, %55 ]
%57 = getelementptr inbounds ptr, ptr %43, i64 %56
%58 = load ptr, ptr %57, align 8, !tbaa !10
%59 = call i32 @printf_ln(ptr noundef nonnull @.str.6, ptr noundef %58) #3
%60 = add nuw nsw i64 %56, 1
%61 = icmp eq i64 %60, %54
br i1 %61, label %66, label %55, !llvm.loop !17
62: ; preds = %46, %41
%63 = phi ptr [ %37, %46 ], [ %43, %41 ]
%64 = load ptr, ptr %63, align 8, !tbaa !10
%65 = call i32 @printf_ln(ptr noundef nonnull @.str.6, ptr noundef %64) #3
br label %66
66: ; preds = %55, %46, %51, %62
call void @llvm.lifetime.end.p0(i64 12, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 0
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @OPT_BOOL(i8 noundef signext, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @N_(ptr noundef) local_unnamed_addr #2
declare i32 @OPT_END(...) local_unnamed_addr #2
declare i32 @parse_options(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @usage_with_options(i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @remote_get(ptr noundef) local_unnamed_addr #2
declare i32 @remote_is_configured(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @die(i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @_(ptr noundef) local_unnamed_addr #2
declare i32 @printf_ln(ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"remote", !11, i64 0, !7, i64 8, !11, i64 16, !7, i64 24}
!14 = !{!13, !7, i64 8}
!15 = !{!13, !11, i64 16}
!16 = !{!13, !7, i64 24}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
| git_builtin_extr_remote.c_get_url |
; ModuleID = 'AnghaBench/freebsd/contrib/unbound/compat/extr_arc4random.c_arc4random_buf.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/compat/extr_arc4random.c_arc4random_buf.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @arc4random_buf(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 (...) @_ARC4_LOCK() #2
%4 = tail call i32 @_rs_random_buf(ptr noundef %0, i64 noundef %1) #2
%5 = tail call i32 (...) @_ARC4_UNLOCK() #2
ret void
}
declare i32 @_ARC4_LOCK(...) local_unnamed_addr #1
declare i32 @_rs_random_buf(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @_ARC4_UNLOCK(...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/unbound/compat/extr_arc4random.c_arc4random_buf.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/compat/extr_arc4random.c_arc4random_buf.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @arc4random_buf(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @_ARC4_LOCK() #2
%4 = tail call i32 @_rs_random_buf(ptr noundef %0, i64 noundef %1) #2
%5 = tail call i32 @_ARC4_UNLOCK() #2
ret void
}
declare i32 @_ARC4_LOCK(...) local_unnamed_addr #1
declare i32 @_rs_random_buf(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @_ARC4_UNLOCK(...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_unbound_compat_extr_arc4random.c_arc4random_buf |
; ModuleID = 'AnghaBench/freebsd/sys/x86/x86/extr_mca.c_mca_ia32_misc_reg.c'
source_filename = "AnghaBench/freebsd/sys/x86/x86/extr_mca.c_mca_ia32_misc_reg.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @mca_ia32_misc_reg], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mca_ia32_misc_reg(i32 noundef %0) #0 {
%2 = tail call i32 @MSR_MC_MISC(i32 noundef %0) #2
ret i32 %2
}
declare i32 @MSR_MC_MISC(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/sys/x86/x86/extr_mca.c_mca_ia32_misc_reg.c'
source_filename = "AnghaBench/freebsd/sys/x86/x86/extr_mca.c_mca_ia32_misc_reg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @mca_ia32_misc_reg], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mca_ia32_misc_reg(i32 noundef %0) #0 {
%2 = tail call i32 @MSR_MC_MISC(i32 noundef %0) #2
ret i32 %2
}
declare i32 @MSR_MC_MISC(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_sys_x86_x86_extr_mca.c_mca_ia32_misc_reg |
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_client/extr_add.c_get_auto_props_for_pattern.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_client/extr_add.c_get_auto_props_for_pattern.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { ptr, i32 }
@APR_FNM_CASE_BLIND = dso_local local_unnamed_addr global i32 0, align 4
@APR_FNM_NOMATCH = dso_local local_unnamed_addr global i64 0, align 8
@SVN_PROP_MIME_TYPE = dso_local local_unnamed_addr global i32 0, align 4
@SVN_PROP_EXECUTABLE = dso_local local_unnamed_addr global i32 0, align 4
@TRUE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @get_auto_props_for_pattern], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @get_auto_props_for_pattern(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef writeonly %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6) #0 {
%8 = load i32, ptr @APR_FNM_CASE_BLIND, align 4, !tbaa !5
%9 = tail call i64 @apr_fnmatch(ptr noundef %4, ptr noundef %3, i32 noundef %8) #2
%10 = load i64, ptr @APR_FNM_NOMATCH, align 8, !tbaa !9
%11 = icmp eq i64 %9, %10
br i1 %11, label %37, label %12
12: ; preds = %7
%13 = tail call ptr @apr_hash_first(ptr noundef %6, ptr noundef %5) #2
%14 = icmp eq ptr %13, null
br i1 %14, label %37, label %15
15: ; preds = %12, %34
%16 = phi ptr [ %35, %34 ], [ %13, %12 ]
%17 = tail call ptr @apr_hash_this_key(ptr noundef nonnull %16) #2
%18 = tail call ptr @apr_hash_this_val(ptr noundef nonnull %16) #2
%19 = tail call i32 @apr_hash_pool_get(ptr noundef %0) #2
%20 = tail call ptr @svn_string_create_empty(i32 noundef %19) #2
store ptr %18, ptr %20, align 8, !tbaa !11
%21 = tail call i32 @strlen(ptr noundef %18) #2
%22 = getelementptr inbounds %struct.TYPE_4__, ptr %20, i64 0, i32 1
store i32 %21, ptr %22, align 8, !tbaa !14
%23 = tail call i32 @svn_hash_sets(ptr noundef %0, ptr noundef %17, ptr noundef nonnull %20) #2
%24 = load i32, ptr @SVN_PROP_MIME_TYPE, align 4, !tbaa !5
%25 = tail call i64 @strcmp(ptr noundef %17, i32 noundef %24) #2
%26 = icmp eq i64 %25, 0
br i1 %26, label %27, label %28
27: ; preds = %15
store ptr %18, ptr %1, align 8, !tbaa !15
br label %34
28: ; preds = %15
%29 = load i32, ptr @SVN_PROP_EXECUTABLE, align 4, !tbaa !5
%30 = tail call i64 @strcmp(ptr noundef %17, i32 noundef %29) #2
%31 = icmp eq i64 %30, 0
br i1 %31, label %32, label %34
32: ; preds = %28
%33 = load i32, ptr @TRUE, align 4, !tbaa !5
store i32 %33, ptr %2, align 4, !tbaa !5
br label %34
34: ; preds = %28, %32, %27
%35 = tail call ptr @apr_hash_next(ptr noundef nonnull %16) #2
%36 = icmp eq ptr %35, null
br i1 %36, label %37, label %15, !llvm.loop !16
37: ; preds = %34, %12, %7
ret void
}
declare i64 @apr_fnmatch(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @apr_hash_first(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @apr_hash_this_key(ptr noundef) local_unnamed_addr #1
declare ptr @apr_hash_this_val(ptr noundef) local_unnamed_addr #1
declare ptr @svn_string_create_empty(i32 noundef) local_unnamed_addr #1
declare i32 @apr_hash_pool_get(ptr noundef) local_unnamed_addr #1
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
declare i32 @svn_hash_sets(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @strcmp(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @apr_hash_next(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0, !6, i64 8}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!12, !6, i64 8}
!15 = !{!13, !13, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_client/extr_add.c_get_auto_props_for_pattern.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_client/extr_add.c_get_auto_props_for_pattern.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@APR_FNM_CASE_BLIND = common local_unnamed_addr global i32 0, align 4
@APR_FNM_NOMATCH = common local_unnamed_addr global i64 0, align 8
@SVN_PROP_MIME_TYPE = common local_unnamed_addr global i32 0, align 4
@SVN_PROP_EXECUTABLE = common local_unnamed_addr global i32 0, align 4
@TRUE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @get_auto_props_for_pattern], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @get_auto_props_for_pattern(ptr noundef %0, ptr nocapture noundef writeonly %1, ptr nocapture noundef writeonly %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, ptr noundef %6) #0 {
%8 = load i32, ptr @APR_FNM_CASE_BLIND, align 4, !tbaa !6
%9 = tail call i64 @apr_fnmatch(ptr noundef %4, ptr noundef %3, i32 noundef %8) #2
%10 = load i64, ptr @APR_FNM_NOMATCH, align 8, !tbaa !10
%11 = icmp eq i64 %9, %10
br i1 %11, label %37, label %12
12: ; preds = %7
%13 = tail call ptr @apr_hash_first(ptr noundef %6, ptr noundef %5) #2
%14 = icmp eq ptr %13, null
br i1 %14, label %37, label %15
15: ; preds = %12, %34
%16 = phi ptr [ %35, %34 ], [ %13, %12 ]
%17 = tail call ptr @apr_hash_this_key(ptr noundef nonnull %16) #2
%18 = tail call ptr @apr_hash_this_val(ptr noundef nonnull %16) #2
%19 = tail call i32 @apr_hash_pool_get(ptr noundef %0) #2
%20 = tail call ptr @svn_string_create_empty(i32 noundef %19) #2
store ptr %18, ptr %20, align 8, !tbaa !12
%21 = tail call i32 @strlen(ptr noundef %18) #2
%22 = getelementptr inbounds i8, ptr %20, i64 8
store i32 %21, ptr %22, align 8, !tbaa !15
%23 = tail call i32 @svn_hash_sets(ptr noundef %0, ptr noundef %17, ptr noundef nonnull %20) #2
%24 = load i32, ptr @SVN_PROP_MIME_TYPE, align 4, !tbaa !6
%25 = tail call i64 @strcmp(ptr noundef %17, i32 noundef %24) #2
%26 = icmp eq i64 %25, 0
br i1 %26, label %27, label %28
27: ; preds = %15
store ptr %18, ptr %1, align 8, !tbaa !16
br label %34
28: ; preds = %15
%29 = load i32, ptr @SVN_PROP_EXECUTABLE, align 4, !tbaa !6
%30 = tail call i64 @strcmp(ptr noundef %17, i32 noundef %29) #2
%31 = icmp eq i64 %30, 0
br i1 %31, label %32, label %34
32: ; preds = %28
%33 = load i32, ptr @TRUE, align 4, !tbaa !6
store i32 %33, ptr %2, align 4, !tbaa !6
br label %34
34: ; preds = %28, %32, %27
%35 = tail call ptr @apr_hash_next(ptr noundef nonnull %16) #2
%36 = icmp eq ptr %35, null
br i1 %36, label %37, label %15, !llvm.loop !17
37: ; preds = %34, %12, %7
ret void
}
declare i64 @apr_fnmatch(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @apr_hash_first(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @apr_hash_this_key(ptr noundef) local_unnamed_addr #1
declare ptr @apr_hash_this_val(ptr noundef) local_unnamed_addr #1
declare ptr @svn_string_create_empty(i32 noundef) local_unnamed_addr #1
declare i32 @apr_hash_pool_get(ptr noundef) local_unnamed_addr #1
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
declare i32 @svn_hash_sets(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @strcmp(ptr noundef, i32 noundef) local_unnamed_addr #1
declare ptr @apr_hash_next(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_4__", !14, i64 0, !7, i64 8}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!13, !7, i64 8}
!16 = !{!14, !14, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
| freebsd_contrib_subversion_subversion_libsvn_client_extr_add.c_get_auto_props_for_pattern |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/rockchip/extr_cdn-dp-reg.c_cdn_dp_dpcd_write.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/rockchip/extr_cdn-dp-reg.c_cdn_dp_dpcd_write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@MB_MODULE_ID_DP_TX = dso_local local_unnamed_addr global i32 0, align 4
@DPTX_WRITE_DPCD = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [23 x i8] c"dpcd write failed: %d\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @cdn_dp_dpcd_write(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca [6 x i32], align 16
%5 = alloca [5 x i32], align 16
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %5) #3
store i32 0, ptr %4, align 16, !tbaa !5
%6 = getelementptr inbounds [6 x i32], ptr %4, i64 0, i64 1
store i32 1, ptr %6, align 4, !tbaa !5
%7 = lshr i32 %1, 16
%8 = and i32 %7, 255
%9 = getelementptr inbounds [6 x i32], ptr %4, i64 0, i64 2
store i32 %8, ptr %9, align 8, !tbaa !5
%10 = lshr i32 %1, 8
%11 = and i32 %10, 255
%12 = getelementptr inbounds [6 x i32], ptr %4, i64 0, i64 3
store i32 %11, ptr %12, align 4, !tbaa !5
%13 = and i32 %1, 255
%14 = getelementptr inbounds [6 x i32], ptr %4, i64 0, i64 4
store i32 %13, ptr %14, align 16, !tbaa !5
%15 = getelementptr inbounds [6 x i32], ptr %4, i64 0, i64 5
store i32 %2, ptr %15, align 4, !tbaa !5
%16 = load i32, ptr @MB_MODULE_ID_DP_TX, align 4, !tbaa !5
%17 = load i32, ptr @DPTX_WRITE_DPCD, align 4, !tbaa !5
%18 = call i32 @cdn_dp_mailbox_send(ptr noundef %0, i32 noundef %16, i32 noundef %17, i32 noundef 24, ptr noundef nonnull %4) #3
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %44
20: ; preds = %3
%21 = load i32, ptr @MB_MODULE_ID_DP_TX, align 4, !tbaa !5
%22 = load i32, ptr @DPTX_WRITE_DPCD, align 4, !tbaa !5
%23 = call i32 @cdn_dp_mailbox_validate_receive(ptr noundef %0, i32 noundef %21, i32 noundef %22, i32 noundef 20) #3
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %44
25: ; preds = %20
%26 = call i32 @cdn_dp_mailbox_read_receive(ptr noundef %0, ptr noundef nonnull %5, i32 noundef 20) #3
%27 = icmp eq i32 %26, 0
br i1 %27, label %28, label %44
28: ; preds = %25
%29 = getelementptr inbounds [5 x i32], ptr %5, i64 0, i64 2
%30 = load i32, ptr %29, align 8, !tbaa !5
%31 = shl i32 %30, 16
%32 = getelementptr inbounds [5 x i32], ptr %5, i64 0, i64 3
%33 = load i32, ptr %32, align 4, !tbaa !5
%34 = shl i32 %33, 8
%35 = or i32 %34, %31
%36 = getelementptr inbounds [5 x i32], ptr %5, i64 0, i64 4
%37 = load i32, ptr %36, align 16, !tbaa !5
%38 = or i32 %35, %37
%39 = icmp eq i32 %38, %1
br i1 %39, label %48, label %40
40: ; preds = %28
%41 = load i32, ptr @EINVAL, align 4, !tbaa !5
%42 = sub nsw i32 0, %41
%43 = icmp eq i32 %41, 0
br i1 %43, label %48, label %44
44: ; preds = %25, %20, %3, %40
%45 = phi i32 [ %42, %40 ], [ %26, %25 ], [ %23, %20 ], [ %18, %3 ]
%46 = load i32, ptr %0, align 4, !tbaa !9
%47 = call i32 @DRM_DEV_ERROR(i32 noundef %46, ptr noundef nonnull @.str, i32 noundef %45) #3
br label %48
48: ; preds = %28, %44, %40
%49 = phi i32 [ %45, %44 ], [ 0, %40 ], [ 0, %28 ]
call void @llvm.lifetime.end.p0(i64 20, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #3
ret i32 %49
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cdn_dp_mailbox_send(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @cdn_dp_mailbox_validate_receive(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @cdn_dp_mailbox_read_receive(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @DRM_DEV_ERROR(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"cdn_dp_device", !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/rockchip/extr_cdn-dp-reg.c_cdn_dp_dpcd_write.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/rockchip/extr_cdn-dp-reg.c_cdn_dp_dpcd_write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@MB_MODULE_ID_DP_TX = common local_unnamed_addr global i32 0, align 4
@DPTX_WRITE_DPCD = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [23 x i8] c"dpcd write failed: %d\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @cdn_dp_dpcd_write(ptr noundef %0, i32 noundef %1, i32 noundef %2) local_unnamed_addr #0 {
%4 = alloca [6 x i32], align 8
%5 = alloca [5 x i32], align 4
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %4) #3
call void @llvm.lifetime.start.p0(i64 20, ptr nonnull %5) #3
store <2 x i32> <i32 0, i32 1>, ptr %4, align 8, !tbaa !6
%6 = insertelement <2 x i32> poison, i32 %1, i64 0
%7 = shufflevector <2 x i32> %6, <2 x i32> poison, <2 x i32> zeroinitializer
%8 = lshr <2 x i32> %7, <i32 16, i32 8>
%9 = getelementptr inbounds i8, ptr %4, i64 8
%10 = and <2 x i32> %8, <i32 255, i32 255>
store <2 x i32> %10, ptr %9, align 8, !tbaa !6
%11 = and i32 %1, 255
%12 = getelementptr inbounds i8, ptr %4, i64 16
store i32 %11, ptr %12, align 8, !tbaa !6
%13 = getelementptr inbounds i8, ptr %4, i64 20
store i32 %2, ptr %13, align 4, !tbaa !6
%14 = load i32, ptr @MB_MODULE_ID_DP_TX, align 4, !tbaa !6
%15 = load i32, ptr @DPTX_WRITE_DPCD, align 4, !tbaa !6
%16 = call i32 @cdn_dp_mailbox_send(ptr noundef %0, i32 noundef %14, i32 noundef %15, i32 noundef 24, ptr noundef nonnull %4) #3
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %42
18: ; preds = %3
%19 = load i32, ptr @MB_MODULE_ID_DP_TX, align 4, !tbaa !6
%20 = load i32, ptr @DPTX_WRITE_DPCD, align 4, !tbaa !6
%21 = call i32 @cdn_dp_mailbox_validate_receive(ptr noundef %0, i32 noundef %19, i32 noundef %20, i32 noundef 20) #3
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %42
23: ; preds = %18
%24 = call i32 @cdn_dp_mailbox_read_receive(ptr noundef %0, ptr noundef nonnull %5, i32 noundef 20) #3
%25 = icmp eq i32 %24, 0
br i1 %25, label %26, label %42
26: ; preds = %23
%27 = getelementptr inbounds i8, ptr %5, i64 8
%28 = load i32, ptr %27, align 4, !tbaa !6
%29 = shl i32 %28, 16
%30 = getelementptr inbounds i8, ptr %5, i64 12
%31 = load i32, ptr %30, align 4, !tbaa !6
%32 = shl i32 %31, 8
%33 = or i32 %32, %29
%34 = getelementptr inbounds i8, ptr %5, i64 16
%35 = load i32, ptr %34, align 4, !tbaa !6
%36 = or i32 %33, %35
%37 = icmp eq i32 %36, %1
br i1 %37, label %46, label %38
38: ; preds = %26
%39 = load i32, ptr @EINVAL, align 4, !tbaa !6
%40 = sub nsw i32 0, %39
%41 = icmp eq i32 %39, 0
br i1 %41, label %46, label %42
42: ; preds = %23, %18, %3, %38
%43 = phi i32 [ %40, %38 ], [ %24, %23 ], [ %21, %18 ], [ %16, %3 ]
%44 = load i32, ptr %0, align 4, !tbaa !10
%45 = call i32 @DRM_DEV_ERROR(i32 noundef %44, ptr noundef nonnull @.str, i32 noundef %43) #3
br label %46
46: ; preds = %26, %42, %38
%47 = phi i32 [ %43, %42 ], [ 0, %38 ], [ 0, %26 ]
call void @llvm.lifetime.end.p0(i64 20, ptr nonnull %5) #3
call void @llvm.lifetime.end.p0(i64 24, ptr nonnull %4) #3
ret i32 %47
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @cdn_dp_mailbox_send(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @cdn_dp_mailbox_validate_receive(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @cdn_dp_mailbox_read_receive(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @DRM_DEV_ERROR(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"cdn_dp_device", !7, i64 0}
| linux_drivers_gpu_drm_rockchip_extr_cdn-dp-reg.c_cdn_dp_dpcd_write |
; ModuleID = 'AnghaBench/lede/target/linux/generic/files/drivers/net/phy/extr_rtl8366_smi.c_rtl8366_sw_get_vlan_enable.c'
source_filename = "AnghaBench/lede/target/linux/generic/files/drivers/net/phy/extr_rtl8366_smi.c_rtl8366_sw_get_vlan_enable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.rtl8366_smi = type { i32, i32 }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @rtl8366_sw_get_vlan_enable(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
%4 = tail call ptr @sw_to_rtl8366_smi(ptr noundef %0) #2
%5 = load i32, ptr %1, align 4, !tbaa !5
%6 = icmp sgt i32 %5, 2
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i32, ptr @EINVAL, align 4, !tbaa !10
%9 = sub nsw i32 0, %8
br label %15
10: ; preds = %3
%11 = icmp eq i32 %5, 1
%12 = getelementptr inbounds %struct.rtl8366_smi, ptr %4, i64 0, i32 1
%13 = select i1 %11, ptr %12, ptr %4
%14 = load i32, ptr %13, align 4, !tbaa !10
store i32 %14, ptr %2, align 4, !tbaa !11
br label %15
15: ; preds = %10, %7
%16 = phi i32 [ %9, %7 ], [ 0, %10 ]
ret i32 %16
}
declare ptr @sw_to_rtl8366_smi(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"switch_attr", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"switch_val", !13, i64 0}
!13 = !{!"TYPE_2__", !7, i64 0}
| ; ModuleID = 'AnghaBench/lede/target/linux/generic/files/drivers/net/phy/extr_rtl8366_smi.c_rtl8366_sw_get_vlan_enable.c'
source_filename = "AnghaBench/lede/target/linux/generic/files/drivers/net/phy/extr_rtl8366_smi.c_rtl8366_sw_get_vlan_enable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483647, -2147483648) i32 @rtl8366_sw_get_vlan_enable(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef writeonly %2) local_unnamed_addr #0 {
%4 = tail call ptr @sw_to_rtl8366_smi(ptr noundef %0) #2
%5 = load i32, ptr %1, align 4, !tbaa !6
%6 = icmp sgt i32 %5, 2
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i32, ptr @EINVAL, align 4, !tbaa !11
%9 = sub nsw i32 0, %8
br label %15
10: ; preds = %3
%11 = icmp eq i32 %5, 1
%12 = select i1 %11, i64 4, i64 0
%13 = getelementptr inbounds i8, ptr %4, i64 %12
%14 = load i32, ptr %13, align 4, !tbaa !11
store i32 %14, ptr %2, align 4, !tbaa !12
br label %15
15: ; preds = %10, %7
%16 = phi i32 [ %9, %7 ], [ 0, %10 ]
ret i32 %16
}
declare ptr @sw_to_rtl8366_smi(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"switch_attr", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"switch_val", !14, i64 0}
!14 = !{!"TYPE_2__", !8, i64 0}
| lede_target_linux_generic_files_drivers_net_phy_extr_rtl8366_smi.c_rtl8366_sw_get_vlan_enable |
; ModuleID = 'AnghaBench/freebsd/sys/netpfil/ipfw/extr_ip_fw_table.c_destroy_table_locked.c'
source_filename = "AnghaBench/freebsd/sys/netpfil/ipfw/extr_ip_fw_table.c_destroy_table_locked.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.named_object = type { i32, ptr }
@.str = private unnamed_addr constant [39 x i8] c"Error unlinking kidx %d from table %s\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @destroy_table_locked], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @destroy_table_locked(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call i32 @unlink_table(ptr noundef %2, ptr noundef %1) #2
%5 = load i32, ptr %1, align 8, !tbaa !5
%6 = tail call i64 @ipfw_objhash_free_idx(ptr noundef %0, i32 noundef %5) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %13, label %8
8: ; preds = %3
%9 = load i32, ptr %1, align 8, !tbaa !5
%10 = getelementptr inbounds %struct.named_object, ptr %1, i64 0, i32 1
%11 = load ptr, ptr %10, align 8, !tbaa !11
%12 = tail call i32 @printf(ptr noundef nonnull @.str, i32 noundef %9, ptr noundef %11) #2
br label %13
13: ; preds = %8, %3
%14 = tail call i32 @free_table_config(ptr noundef %0, ptr noundef nonnull %1) #2
ret i32 0
}
declare i32 @unlink_table(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @ipfw_objhash_free_idx(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @printf(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @free_table_config(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"named_object", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/freebsd/sys/netpfil/ipfw/extr_ip_fw_table.c_destroy_table_locked.c'
source_filename = "AnghaBench/freebsd/sys/netpfil/ipfw/extr_ip_fw_table.c_destroy_table_locked.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [39 x i8] c"Error unlinking kidx %d from table %s\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @destroy_table_locked], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @destroy_table_locked(ptr noundef %0, ptr noundef %1, ptr noundef %2) #0 {
%4 = tail call i32 @unlink_table(ptr noundef %2, ptr noundef %1) #2
%5 = load i32, ptr %1, align 8, !tbaa !6
%6 = tail call i64 @ipfw_objhash_free_idx(ptr noundef %0, i32 noundef %5) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %13, label %8
8: ; preds = %3
%9 = load i32, ptr %1, align 8, !tbaa !6
%10 = getelementptr inbounds i8, ptr %1, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !12
%12 = tail call i32 @printf(ptr noundef nonnull @.str, i32 noundef %9, ptr noundef %11) #2
br label %13
13: ; preds = %8, %3
%14 = tail call i32 @free_table_config(ptr noundef %0, ptr noundef nonnull %1) #2
ret i32 0
}
declare i32 @unlink_table(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @ipfw_objhash_free_idx(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @printf(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @free_table_config(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"named_object", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
| freebsd_sys_netpfil_ipfw_extr_ip_fw_table.c_destroy_table_locked |
; ModuleID = 'AnghaBench/lab/engine/code/tools/lcc/src/extr_gen.c_mkreg.c'
source_filename = "AnghaBench/lab/engine/code/tools/lcc/src/extr_gen.c_mkreg.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-linux-gnu"
%struct.TYPE_6__ = type { i32, i32, i32, %struct.TYPE_5__, i32 }
%struct.TYPE_5__ = type { %struct.TYPE_6__*, i32 }
@PERM = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: noreturn nounwind uwtable
define dso_local noalias nonnull %struct.TYPE_6__* @mkreg(i8* noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = load i32, i32* @PERM, align 4, !tbaa !5
%6 = tail call i32 @NEW0(%struct.TYPE_6__* noundef undef, i32 noundef %5) #2
%7 = tail call i32 @stringf(i8* noundef %0, i32 noundef %1) #2
unreachable
}
declare i32 @NEW0(%struct.TYPE_6__* noundef, i32 noundef) local_unnamed_addr #1
declare i32 @stringf(i8* noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { noreturn nounwind uwtable "frame-pointer"="none" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "frame-pointer"="none" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 7, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{!"Ubuntu clang version 14.0.0-1ubuntu1.1"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/lab/engine/code/tools/lcc/src/extr_gen.c_mkreg.c'
source_filename = "AnghaBench/lab/engine/code/tools/lcc/src/extr_gen.c_mkreg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PERM = common local_unnamed_addr global i32 0, align 4
; Function Attrs: noreturn nounwind ssp uwtable(sync)
define noalias noundef nonnull ptr @mkreg(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = load i32, ptr @PERM, align 4, !tbaa !6
%6 = tail call i32 @NEW0(ptr noundef undef, i32 noundef %5) #2
%7 = tail call i32 @stringf(ptr noundef %0, i32 noundef %1) #2
unreachable
}
declare i32 @NEW0(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @stringf(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { noreturn nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| lab_engine_code_tools_lcc_src_extr_gen.c_mkreg |
; ModuleID = 'AnghaBench/linux/sound/pci/rme9652/extr_hdsp.c_snd_hdsp_midi_output_open.c'
source_filename = "AnghaBench/linux/sound/pci/rme9652/extr_hdsp.c_snd_hdsp_midi_output_open.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.hdsp_midi = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_hdsp_midi_output_open], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @snd_hdsp_midi_output_open(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = load i64, ptr %2, align 8, !tbaa !10
%4 = inttoptr i64 %3 to ptr
%5 = tail call i32 @spin_lock_irq(ptr noundef %4) #2
%6 = getelementptr inbounds %struct.hdsp_midi, ptr %4, i64 0, i32 1
store ptr %0, ptr %6, align 8, !tbaa !13
%7 = tail call i32 @spin_unlock_irq(ptr noundef %4) #2
ret i32 0
}
declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"snd_rawmidi_substream", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!14, !7, i64 8}
!14 = !{!"hdsp_midi", !15, i64 0, !7, i64 8}
!15 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/sound/pci/rme9652/extr_hdsp.c_snd_hdsp_midi_output_open.c'
source_filename = "AnghaBench/linux/sound/pci/rme9652/extr_hdsp.c_snd_hdsp_midi_output_open.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @snd_hdsp_midi_output_open], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @snd_hdsp_midi_output_open(ptr noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load i64, ptr %2, align 8, !tbaa !11
%4 = inttoptr i64 %3 to ptr
%5 = tail call i32 @spin_lock_irq(ptr noundef %4) #2
%6 = getelementptr inbounds i8, ptr %4, i64 8
store ptr %0, ptr %6, align 8, !tbaa !14
%7 = tail call i32 @spin_unlock_irq(ptr noundef %4) #2
ret i32 0
}
declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"snd_rawmidi_substream", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"long", !9, i64 0}
!14 = !{!15, !8, i64 8}
!15 = !{!"hdsp_midi", !16, i64 0, !8, i64 8}
!16 = !{!"int", !9, i64 0}
| linux_sound_pci_rme9652_extr_hdsp.c_snd_hdsp_midi_output_open |
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/vm/extr_vm_map_store.c_vm_map_store_init.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/vm/extr_vm_map_store.c_vm_map_store_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @vm_map_store_init(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @vm_map_store_init_ll(ptr noundef %0) #2
ret void
}
declare i32 @vm_map_store_init_ll(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/darwin-xnu/osfmk/vm/extr_vm_map_store.c_vm_map_store_init.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/vm/extr_vm_map_store.c_vm_map_store_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @vm_map_store_init(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @vm_map_store_init_ll(ptr noundef %0) #2
ret void
}
declare i32 @vm_map_store_init_ll(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| darwin-xnu_osfmk_vm_extr_vm_map_store.c_vm_map_store_init |
; ModuleID = 'AnghaBench/freebsd/sys/dev/ath/ath_hal/ar5210/extr_ar5210_misc.c_ar5210GetMacAddress.c'
source_filename = "AnghaBench/freebsd/sys/dev/ath/ath_hal/ar5210/extr_ar5210_misc.c_ar5210GetMacAddress.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@IEEE80211_ADDR_LEN = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @ar5210GetMacAddress(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @AH5210(ptr noundef %0) #2
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = load i32, ptr @IEEE80211_ADDR_LEN, align 4, !tbaa !10
%6 = tail call i32 @OS_MEMCPY(ptr noundef %1, i32 noundef %4, i32 noundef %5) #2
ret void
}
declare ptr @AH5210(ptr noundef) local_unnamed_addr #1
declare i32 @OS_MEMCPY(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"ath_hal_5210", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/ath/ath_hal/ar5210/extr_ar5210_misc.c_ar5210GetMacAddress.c'
source_filename = "AnghaBench/freebsd/sys/dev/ath/ath_hal/ar5210/extr_ar5210_misc.c_ar5210GetMacAddress.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IEEE80211_ADDR_LEN = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @ar5210GetMacAddress(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @AH5210(ptr noundef %0) #2
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = load i32, ptr @IEEE80211_ADDR_LEN, align 4, !tbaa !11
%6 = tail call i32 @OS_MEMCPY(ptr noundef %1, i32 noundef %4, i32 noundef %5) #2
ret void
}
declare ptr @AH5210(ptr noundef) local_unnamed_addr #1
declare i32 @OS_MEMCPY(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"ath_hal_5210", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| freebsd_sys_dev_ath_ath_hal_ar5210_extr_ar5210_misc.c_ar5210GetMacAddress |
; ModuleID = 'AnghaBench/linux/arch/um/drivers/extr_pcap_kern.c_register_pcap.c'
source_filename = "AnghaBench/linux/arch/um/drivers/extr_pcap_kern.c_register_pcap.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@pcap_transport = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @register_pcap], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @register_pcap() #0 {
%1 = tail call i32 @register_transport(ptr noundef nonnull @pcap_transport) #2
ret i32 0
}
declare i32 @register_transport(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/arch/um/drivers/extr_pcap_kern.c_register_pcap.c'
source_filename = "AnghaBench/linux/arch/um/drivers/extr_pcap_kern.c_register_pcap.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@pcap_transport = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @register_pcap], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @register_pcap() #0 {
%1 = tail call i32 @register_transport(ptr noundef nonnull @pcap_transport) #2
ret i32 0
}
declare i32 @register_transport(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_arch_um_drivers_extr_pcap_kern.c_register_pcap |
; ModuleID = 'AnghaBench/freebsd/sys/dev/vge/extr_if_vge.c_vge_setwol.c'
source_filename = "AnghaBench/freebsd/sys/dev/vge/extr_if_vge.c_vge_setwol.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.vge_softc = type { i32, i64, i32, ptr, i32 }
@VGE_FLAG_PMCAP = dso_local local_unnamed_addr global i32 0, align 4
@MII_BMCR = dso_local local_unnamed_addr global i32 0, align 4
@BMCR_PDOWN = dso_local local_unnamed_addr global i32 0, align 4
@VGE_WOLCR0C = dso_local local_unnamed_addr global i32 0, align 4
@VGE_WOLCR0_PATTERN_ALL = dso_local local_unnamed_addr global i32 0, align 4
@VGE_WOLCR1C = dso_local local_unnamed_addr global i32 0, align 4
@VGE_WOLCFGC = dso_local local_unnamed_addr global i32 0, align 4
@VGE_WOLCFG_SAB = dso_local local_unnamed_addr global i32 0, align 4
@VGE_WOLCFG_SAM = dso_local local_unnamed_addr global i32 0, align 4
@VGE_WOLCFG_PMEOVR = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_WOL = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_WOL_UCAST = dso_local local_unnamed_addr global i32 0, align 4
@VGE_WOLCR1_UCAST = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_WOL_MAGIC = dso_local local_unnamed_addr global i32 0, align 4
@VGE_WOLCR1_MAGIC = dso_local local_unnamed_addr global i32 0, align 4
@VGE_WOLCR1S = dso_local local_unnamed_addr global i32 0, align 4
@IFCAP_WOL_MCAST = dso_local local_unnamed_addr global i32 0, align 4
@VGE_WOLCFGS = dso_local local_unnamed_addr global i32 0, align 4
@VGE_DIAGCTL = dso_local local_unnamed_addr global i32 0, align 4
@VGE_DIAGCTL_MACFORCE = dso_local local_unnamed_addr global i32 0, align 4
@VGE_DIAGCTL_FDXFORCE = dso_local local_unnamed_addr global i32 0, align 4
@VGE_DIAGCTL_GMII = dso_local local_unnamed_addr global i32 0, align 4
@VGE_WOLSR0C = dso_local local_unnamed_addr global i32 0, align 4
@VGE_WOLSR1C = dso_local local_unnamed_addr global i32 0, align 4
@VGE_PWRSTAT = dso_local local_unnamed_addr global i32 0, align 4
@VGE_STICKHW_SWPTAG = dso_local local_unnamed_addr global i32 0, align 4
@VGE_STICKHW_DS0 = dso_local local_unnamed_addr global i32 0, align 4
@VGE_STICKHW_DS1 = dso_local local_unnamed_addr global i32 0, align 4
@PCIR_POWER_STATUS = dso_local local_unnamed_addr global i64 0, align 8
@PCIM_PSTAT_PME = dso_local local_unnamed_addr global i32 0, align 4
@PCIM_PSTAT_PMEENABLE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @vge_setwol], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @vge_setwol(ptr noundef %0) #0 {
%2 = tail call i32 @VGE_LOCK_ASSERT(ptr noundef %0) #2
%3 = load i32, ptr %0, align 8, !tbaa !5
%4 = load i32, ptr @VGE_FLAG_PMCAP, align 4, !tbaa !12
%5 = and i32 %4, %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %16
7: ; preds = %1
%8 = getelementptr inbounds %struct.vge_softc, ptr %0, i64 0, i32 2
%9 = load i32, ptr %8, align 8, !tbaa !13
%10 = getelementptr inbounds %struct.vge_softc, ptr %0, i64 0, i32 4
%11 = load i32, ptr %10, align 8, !tbaa !14
%12 = load i32, ptr @MII_BMCR, align 4, !tbaa !12
%13 = load i32, ptr @BMCR_PDOWN, align 4, !tbaa !12
%14 = tail call i32 @vge_miibus_writereg(i32 noundef %9, i32 noundef %11, i32 noundef %12, i32 noundef %13) #2
%15 = tail call i32 @vge_miipoll_stop(ptr noundef nonnull %0) #2
br label %114
16: ; preds = %1
%17 = getelementptr inbounds %struct.vge_softc, ptr %0, i64 0, i32 3
%18 = load ptr, ptr %17, align 8, !tbaa !15
%19 = load i32, ptr @VGE_WOLCR0C, align 4, !tbaa !12
%20 = load i32, ptr @VGE_WOLCR0_PATTERN_ALL, align 4, !tbaa !12
%21 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %19, i32 noundef %20) #2
%22 = load i32, ptr @VGE_WOLCR1C, align 4, !tbaa !12
%23 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %22, i32 noundef 15) #2
%24 = load i32, ptr @VGE_WOLCFGC, align 4, !tbaa !12
%25 = load i32, ptr @VGE_WOLCFG_SAB, align 4, !tbaa !12
%26 = load i32, ptr @VGE_WOLCFG_SAM, align 4, !tbaa !12
%27 = or i32 %26, %25
%28 = load i32, ptr @VGE_WOLCFG_PMEOVR, align 4, !tbaa !12
%29 = or i32 %27, %28
%30 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %24, i32 noundef %29) #2
%31 = load i32, ptr %18, align 4, !tbaa !16
%32 = load i32, ptr @IFCAP_WOL, align 4, !tbaa !12
%33 = and i32 %32, %31
%34 = icmp eq i32 %33, 0
br i1 %34, label %64, label %35
35: ; preds = %16
%36 = tail call i32 @vge_setlinkspeed(ptr noundef nonnull %0) #2
%37 = load i32, ptr %18, align 4, !tbaa !16
%38 = load i32, ptr @IFCAP_WOL_UCAST, align 4, !tbaa !12
%39 = and i32 %38, %37
%40 = icmp eq i32 %39, 0
%41 = load i32, ptr @VGE_WOLCR1_UCAST, align 4
%42 = select i1 %40, i32 0, i32 %41
%43 = load i32, ptr @IFCAP_WOL_MAGIC, align 4, !tbaa !12
%44 = and i32 %43, %37
%45 = icmp eq i32 %44, 0
%46 = load i32, ptr @VGE_WOLCR1_MAGIC, align 4
%47 = select i1 %45, i32 0, i32 %46
%48 = or i32 %47, %42
%49 = load i32, ptr @VGE_WOLCR1S, align 4, !tbaa !12
%50 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %49, i32 noundef %48) #2
%51 = load i32, ptr %18, align 4, !tbaa !16
%52 = load i32, ptr @IFCAP_WOL_MCAST, align 4, !tbaa !12
%53 = and i32 %52, %51
%54 = icmp eq i32 %53, 0
%55 = load i32, ptr @VGE_WOLCFG_SAM, align 4
%56 = load i32, ptr @VGE_WOLCFG_SAB, align 4
%57 = or i32 %56, %55
%58 = select i1 %54, i32 0, i32 %57
%59 = load i32, ptr @VGE_WOLCFGS, align 4, !tbaa !12
%60 = load i32, ptr @VGE_WOLCFG_PMEOVR, align 4, !tbaa !12
%61 = or i32 %58, %60
%62 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %59, i32 noundef %61) #2
%63 = tail call i32 @vge_miipoll_stop(ptr noundef nonnull %0) #2
br label %64
64: ; preds = %35, %16
%65 = load i32, ptr @VGE_DIAGCTL, align 4, !tbaa !12
%66 = load i32, ptr @VGE_DIAGCTL_MACFORCE, align 4, !tbaa !12
%67 = load i32, ptr @VGE_DIAGCTL_FDXFORCE, align 4, !tbaa !12
%68 = or i32 %67, %66
%69 = tail call i32 @CSR_SETBIT_1(ptr noundef nonnull %0, i32 noundef %65, i32 noundef %68) #2
%70 = load i32, ptr @VGE_DIAGCTL, align 4, !tbaa !12
%71 = load i32, ptr @VGE_DIAGCTL_GMII, align 4, !tbaa !12
%72 = tail call i32 @CSR_CLRBIT_1(ptr noundef nonnull %0, i32 noundef %70, i32 noundef %71) #2
%73 = load i32, ptr @VGE_WOLSR0C, align 4, !tbaa !12
%74 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %73, i32 noundef 255) #2
%75 = load i32, ptr @VGE_WOLSR1C, align 4, !tbaa !12
%76 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %75, i32 noundef 255) #2
%77 = load i32, ptr @VGE_PWRSTAT, align 4, !tbaa !12
%78 = tail call i32 @CSR_READ_1(ptr noundef nonnull %0, i32 noundef %77) #2
%79 = load i32, ptr @VGE_STICKHW_SWPTAG, align 4, !tbaa !12
%80 = or i32 %79, %78
%81 = load i32, ptr @VGE_PWRSTAT, align 4, !tbaa !12
%82 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %81, i32 noundef %80) #2
%83 = load i32, ptr @VGE_PWRSTAT, align 4, !tbaa !12
%84 = tail call i32 @CSR_READ_1(ptr noundef nonnull %0, i32 noundef %83) #2
%85 = load i32, ptr @VGE_STICKHW_DS0, align 4, !tbaa !12
%86 = load i32, ptr @VGE_STICKHW_DS1, align 4, !tbaa !12
%87 = or i32 %85, %84
%88 = or i32 %87, %86
%89 = load i32, ptr @VGE_PWRSTAT, align 4, !tbaa !12
%90 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %89, i32 noundef %88) #2
%91 = getelementptr inbounds %struct.vge_softc, ptr %0, i64 0, i32 2
%92 = load i32, ptr %91, align 8, !tbaa !13
%93 = getelementptr inbounds %struct.vge_softc, ptr %0, i64 0, i32 1
%94 = load i64, ptr %93, align 8, !tbaa !18
%95 = load i64, ptr @PCIR_POWER_STATUS, align 8, !tbaa !19
%96 = add nsw i64 %95, %94
%97 = tail call i32 @pci_read_config(i32 noundef %92, i64 noundef %96, i32 noundef 2) #2
%98 = load i32, ptr @PCIM_PSTAT_PME, align 4, !tbaa !12
%99 = load i32, ptr @PCIM_PSTAT_PMEENABLE, align 4, !tbaa !12
%100 = or i32 %99, %98
%101 = xor i32 %100, -1
%102 = and i32 %97, %101
%103 = load i32, ptr %18, align 4, !tbaa !16
%104 = load i32, ptr @IFCAP_WOL, align 4, !tbaa !12
%105 = and i32 %104, %103
%106 = icmp eq i32 %105, 0
%107 = or i32 %100, %97
%108 = select i1 %106, i32 %102, i32 %107
%109 = load i32, ptr %91, align 8, !tbaa !13
%110 = load i64, ptr %93, align 8, !tbaa !18
%111 = load i64, ptr @PCIR_POWER_STATUS, align 8, !tbaa !19
%112 = add nsw i64 %111, %110
%113 = tail call i32 @pci_write_config(i32 noundef %109, i64 noundef %112, i32 noundef %108, i32 noundef 2) #2
br label %114
114: ; preds = %64, %7
ret void
}
declare i32 @VGE_LOCK_ASSERT(ptr noundef) local_unnamed_addr #1
declare i32 @vge_miibus_writereg(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vge_miipoll_stop(ptr noundef) local_unnamed_addr #1
declare i32 @CSR_WRITE_1(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vge_setlinkspeed(ptr noundef) local_unnamed_addr #1
declare i32 @CSR_SETBIT_1(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @CSR_CLRBIT_1(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @CSR_READ_1(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pci_read_config(i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pci_write_config(i32 noundef, i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"vge_softc", !7, i64 0, !10, i64 8, !7, i64 16, !11, i64 24, !7, i64 32}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!7, !7, i64 0}
!13 = !{!6, !7, i64 16}
!14 = !{!6, !7, i64 32}
!15 = !{!6, !11, i64 24}
!16 = !{!17, !7, i64 0}
!17 = !{!"ifnet", !7, i64 0}
!18 = !{!6, !10, i64 8}
!19 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/vge/extr_if_vge.c_vge_setwol.c'
source_filename = "AnghaBench/freebsd/sys/dev/vge/extr_if_vge.c_vge_setwol.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VGE_FLAG_PMCAP = common local_unnamed_addr global i32 0, align 4
@MII_BMCR = common local_unnamed_addr global i32 0, align 4
@BMCR_PDOWN = common local_unnamed_addr global i32 0, align 4
@VGE_WOLCR0C = common local_unnamed_addr global i32 0, align 4
@VGE_WOLCR0_PATTERN_ALL = common local_unnamed_addr global i32 0, align 4
@VGE_WOLCR1C = common local_unnamed_addr global i32 0, align 4
@VGE_WOLCFGC = common local_unnamed_addr global i32 0, align 4
@VGE_WOLCFG_SAB = common local_unnamed_addr global i32 0, align 4
@VGE_WOLCFG_SAM = common local_unnamed_addr global i32 0, align 4
@VGE_WOLCFG_PMEOVR = common local_unnamed_addr global i32 0, align 4
@IFCAP_WOL = common local_unnamed_addr global i32 0, align 4
@IFCAP_WOL_UCAST = common local_unnamed_addr global i32 0, align 4
@VGE_WOLCR1_UCAST = common local_unnamed_addr global i32 0, align 4
@IFCAP_WOL_MAGIC = common local_unnamed_addr global i32 0, align 4
@VGE_WOLCR1_MAGIC = common local_unnamed_addr global i32 0, align 4
@VGE_WOLCR1S = common local_unnamed_addr global i32 0, align 4
@IFCAP_WOL_MCAST = common local_unnamed_addr global i32 0, align 4
@VGE_WOLCFGS = common local_unnamed_addr global i32 0, align 4
@VGE_DIAGCTL = common local_unnamed_addr global i32 0, align 4
@VGE_DIAGCTL_MACFORCE = common local_unnamed_addr global i32 0, align 4
@VGE_DIAGCTL_FDXFORCE = common local_unnamed_addr global i32 0, align 4
@VGE_DIAGCTL_GMII = common local_unnamed_addr global i32 0, align 4
@VGE_WOLSR0C = common local_unnamed_addr global i32 0, align 4
@VGE_WOLSR1C = common local_unnamed_addr global i32 0, align 4
@VGE_PWRSTAT = common local_unnamed_addr global i32 0, align 4
@VGE_STICKHW_SWPTAG = common local_unnamed_addr global i32 0, align 4
@VGE_STICKHW_DS0 = common local_unnamed_addr global i32 0, align 4
@VGE_STICKHW_DS1 = common local_unnamed_addr global i32 0, align 4
@PCIR_POWER_STATUS = common local_unnamed_addr global i64 0, align 8
@PCIM_PSTAT_PME = common local_unnamed_addr global i32 0, align 4
@PCIM_PSTAT_PMEENABLE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @vge_setwol], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @vge_setwol(ptr noundef %0) #0 {
%2 = tail call i32 @VGE_LOCK_ASSERT(ptr noundef %0) #2
%3 = load i32, ptr %0, align 8, !tbaa !6
%4 = load i32, ptr @VGE_FLAG_PMCAP, align 4, !tbaa !13
%5 = and i32 %4, %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %16
7: ; preds = %1
%8 = getelementptr inbounds i8, ptr %0, i64 16
%9 = load i32, ptr %8, align 8, !tbaa !14
%10 = getelementptr inbounds i8, ptr %0, i64 32
%11 = load i32, ptr %10, align 8, !tbaa !15
%12 = load i32, ptr @MII_BMCR, align 4, !tbaa !13
%13 = load i32, ptr @BMCR_PDOWN, align 4, !tbaa !13
%14 = tail call i32 @vge_miibus_writereg(i32 noundef %9, i32 noundef %11, i32 noundef %12, i32 noundef %13) #2
%15 = tail call i32 @vge_miipoll_stop(ptr noundef nonnull %0) #2
br label %114
16: ; preds = %1
%17 = getelementptr inbounds i8, ptr %0, i64 24
%18 = load ptr, ptr %17, align 8, !tbaa !16
%19 = load i32, ptr @VGE_WOLCR0C, align 4, !tbaa !13
%20 = load i32, ptr @VGE_WOLCR0_PATTERN_ALL, align 4, !tbaa !13
%21 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %19, i32 noundef %20) #2
%22 = load i32, ptr @VGE_WOLCR1C, align 4, !tbaa !13
%23 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %22, i32 noundef 15) #2
%24 = load i32, ptr @VGE_WOLCFGC, align 4, !tbaa !13
%25 = load i32, ptr @VGE_WOLCFG_SAB, align 4, !tbaa !13
%26 = load i32, ptr @VGE_WOLCFG_SAM, align 4, !tbaa !13
%27 = or i32 %26, %25
%28 = load i32, ptr @VGE_WOLCFG_PMEOVR, align 4, !tbaa !13
%29 = or i32 %27, %28
%30 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %24, i32 noundef %29) #2
%31 = load i32, ptr %18, align 4, !tbaa !17
%32 = load i32, ptr @IFCAP_WOL, align 4, !tbaa !13
%33 = and i32 %32, %31
%34 = icmp eq i32 %33, 0
br i1 %34, label %64, label %35
35: ; preds = %16
%36 = tail call i32 @vge_setlinkspeed(ptr noundef nonnull %0) #2
%37 = load i32, ptr %18, align 4, !tbaa !17
%38 = load i32, ptr @IFCAP_WOL_UCAST, align 4, !tbaa !13
%39 = and i32 %38, %37
%40 = icmp eq i32 %39, 0
%41 = load i32, ptr @VGE_WOLCR1_UCAST, align 4
%42 = select i1 %40, i32 0, i32 %41
%43 = load i32, ptr @IFCAP_WOL_MAGIC, align 4, !tbaa !13
%44 = and i32 %43, %37
%45 = icmp eq i32 %44, 0
%46 = load i32, ptr @VGE_WOLCR1_MAGIC, align 4
%47 = select i1 %45, i32 0, i32 %46
%48 = or i32 %47, %42
%49 = load i32, ptr @VGE_WOLCR1S, align 4, !tbaa !13
%50 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %49, i32 noundef %48) #2
%51 = load i32, ptr %18, align 4, !tbaa !17
%52 = load i32, ptr @IFCAP_WOL_MCAST, align 4, !tbaa !13
%53 = and i32 %52, %51
%54 = icmp eq i32 %53, 0
%55 = load i32, ptr @VGE_WOLCFG_SAM, align 4
%56 = load i32, ptr @VGE_WOLCFG_SAB, align 4
%57 = or i32 %56, %55
%58 = select i1 %54, i32 0, i32 %57
%59 = load i32, ptr @VGE_WOLCFGS, align 4, !tbaa !13
%60 = load i32, ptr @VGE_WOLCFG_PMEOVR, align 4, !tbaa !13
%61 = or i32 %58, %60
%62 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %59, i32 noundef %61) #2
%63 = tail call i32 @vge_miipoll_stop(ptr noundef nonnull %0) #2
br label %64
64: ; preds = %35, %16
%65 = load i32, ptr @VGE_DIAGCTL, align 4, !tbaa !13
%66 = load i32, ptr @VGE_DIAGCTL_MACFORCE, align 4, !tbaa !13
%67 = load i32, ptr @VGE_DIAGCTL_FDXFORCE, align 4, !tbaa !13
%68 = or i32 %67, %66
%69 = tail call i32 @CSR_SETBIT_1(ptr noundef nonnull %0, i32 noundef %65, i32 noundef %68) #2
%70 = load i32, ptr @VGE_DIAGCTL, align 4, !tbaa !13
%71 = load i32, ptr @VGE_DIAGCTL_GMII, align 4, !tbaa !13
%72 = tail call i32 @CSR_CLRBIT_1(ptr noundef nonnull %0, i32 noundef %70, i32 noundef %71) #2
%73 = load i32, ptr @VGE_WOLSR0C, align 4, !tbaa !13
%74 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %73, i32 noundef 255) #2
%75 = load i32, ptr @VGE_WOLSR1C, align 4, !tbaa !13
%76 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %75, i32 noundef 255) #2
%77 = load i32, ptr @VGE_PWRSTAT, align 4, !tbaa !13
%78 = tail call i32 @CSR_READ_1(ptr noundef nonnull %0, i32 noundef %77) #2
%79 = load i32, ptr @VGE_STICKHW_SWPTAG, align 4, !tbaa !13
%80 = or i32 %79, %78
%81 = load i32, ptr @VGE_PWRSTAT, align 4, !tbaa !13
%82 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %81, i32 noundef %80) #2
%83 = load i32, ptr @VGE_PWRSTAT, align 4, !tbaa !13
%84 = tail call i32 @CSR_READ_1(ptr noundef nonnull %0, i32 noundef %83) #2
%85 = load i32, ptr @VGE_STICKHW_DS0, align 4, !tbaa !13
%86 = load i32, ptr @VGE_STICKHW_DS1, align 4, !tbaa !13
%87 = or i32 %85, %84
%88 = or i32 %87, %86
%89 = load i32, ptr @VGE_PWRSTAT, align 4, !tbaa !13
%90 = tail call i32 @CSR_WRITE_1(ptr noundef nonnull %0, i32 noundef %89, i32 noundef %88) #2
%91 = getelementptr inbounds i8, ptr %0, i64 16
%92 = load i32, ptr %91, align 8, !tbaa !14
%93 = getelementptr inbounds i8, ptr %0, i64 8
%94 = load i64, ptr %93, align 8, !tbaa !19
%95 = load i64, ptr @PCIR_POWER_STATUS, align 8, !tbaa !20
%96 = add nsw i64 %95, %94
%97 = tail call i32 @pci_read_config(i32 noundef %92, i64 noundef %96, i32 noundef 2) #2
%98 = load i32, ptr @PCIM_PSTAT_PME, align 4, !tbaa !13
%99 = load i32, ptr @PCIM_PSTAT_PMEENABLE, align 4, !tbaa !13
%100 = or i32 %99, %98
%101 = xor i32 %100, -1
%102 = and i32 %97, %101
%103 = load i32, ptr %18, align 4, !tbaa !17
%104 = load i32, ptr @IFCAP_WOL, align 4, !tbaa !13
%105 = and i32 %104, %103
%106 = icmp eq i32 %105, 0
%107 = or i32 %100, %97
%108 = select i1 %106, i32 %102, i32 %107
%109 = load i32, ptr %91, align 8, !tbaa !14
%110 = load i64, ptr %93, align 8, !tbaa !19
%111 = load i64, ptr @PCIR_POWER_STATUS, align 8, !tbaa !20
%112 = add nsw i64 %111, %110
%113 = tail call i32 @pci_write_config(i32 noundef %109, i64 noundef %112, i32 noundef %108, i32 noundef 2) #2
br label %114
114: ; preds = %64, %7
ret void
}
declare i32 @VGE_LOCK_ASSERT(ptr noundef) local_unnamed_addr #1
declare i32 @vge_miibus_writereg(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vge_miipoll_stop(ptr noundef) local_unnamed_addr #1
declare i32 @CSR_WRITE_1(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @vge_setlinkspeed(ptr noundef) local_unnamed_addr #1
declare i32 @CSR_SETBIT_1(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @CSR_CLRBIT_1(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @CSR_READ_1(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pci_read_config(i32 noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @pci_write_config(i32 noundef, i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"vge_softc", !8, i64 0, !11, i64 8, !8, i64 16, !12, i64 24, !8, i64 32}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!8, !8, i64 0}
!14 = !{!7, !8, i64 16}
!15 = !{!7, !8, i64 32}
!16 = !{!7, !12, i64 24}
!17 = !{!18, !8, i64 0}
!18 = !{!"ifnet", !8, i64 0}
!19 = !{!7, !11, i64 8}
!20 = !{!11, !11, i64 0}
| freebsd_sys_dev_vge_extr_if_vge.c_vge_setwol |
; ModuleID = 'AnghaBench/freebsd/contrib/bearssl/src/ssl/extr_ssl_server.c_br_ssl_server_zero.c'
source_filename = "AnghaBench/freebsd/contrib/bearssl/src/ssl/extr_ssl_server.c_br_ssl_server_zero.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @br_ssl_server_zero(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @memset(ptr noundef %0, i32 noundef 0, i32 noundef 4) #2
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/bearssl/src/ssl/extr_ssl_server.c_br_ssl_server_zero.c'
source_filename = "AnghaBench/freebsd/contrib/bearssl/src/ssl/extr_ssl_server.c_br_ssl_server_zero.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @br_ssl_server_zero(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @memset(ptr noundef %0, i32 noundef 0, i32 noundef 4) #2
ret void
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_contrib_bearssl_src_ssl_extr_ssl_server.c_br_ssl_server_zero |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/ttm/extr_ttm_bo.c_ttm_bo_put.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/ttm/extr_ttm_bo.c_ttm_bo_put.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ttm_bo_release = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @ttm_bo_put(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @ttm_bo_release, align 4, !tbaa !5
%3 = tail call i32 @kref_put(ptr noundef %0, i32 noundef %2) #2
ret void
}
declare i32 @kref_put(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/ttm/extr_ttm_bo.c_ttm_bo_put.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/ttm/extr_ttm_bo.c_ttm_bo_put.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ttm_bo_release = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @ttm_bo_put(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @ttm_bo_release, align 4, !tbaa !6
%3 = tail call i32 @kref_put(ptr noundef %0, i32 noundef %2) #2
ret void
}
declare i32 @kref_put(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_drm_ttm_extr_ttm_bo.c_ttm_bo_put |
; ModuleID = 'AnghaBench/linux/drivers/power/supply/extr_power_supply_core.c___power_supply_am_i_supplied.c'
source_filename = "AnghaBench/linux/drivers/power/supply/extr_power_supply_core.c___power_supply_am_i_supplied.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%union.power_supply_propval = type { i32 }
%struct.psy_am_i_supplied_data = type { i32, i32 }
@POWER_SUPPLY_PROP_ONLINE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @__power_supply_am_i_supplied], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @__power_supply_am_i_supplied(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = alloca %union.power_supply_propval, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
store i32 0, ptr %3, align 4
%4 = tail call ptr @dev_get_drvdata(ptr noundef %0) #3
%5 = getelementptr inbounds %struct.psy_am_i_supplied_data, ptr %1, i64 0, i32 1
%6 = load i32, ptr %5, align 4, !tbaa !5
%7 = tail call i64 @__power_supply_is_supplied_by(ptr noundef %4, i32 noundef %6) #3
%8 = icmp eq i64 %7, 0
br i1 %8, label %19, label %9
9: ; preds = %2
%10 = load i32, ptr %1, align 4, !tbaa !10
%11 = add nsw i32 %10, 1
store i32 %11, ptr %1, align 4, !tbaa !10
%12 = load ptr, ptr %4, align 8, !tbaa !11
%13 = load ptr, ptr %12, align 8, !tbaa !14
%14 = load i32, ptr @POWER_SUPPLY_PROP_ONLINE, align 4, !tbaa !16
%15 = call i32 %13(ptr noundef nonnull %4, i32 noundef %14, ptr noundef nonnull %3) #3
%16 = icmp eq i32 %15, 0
%17 = load i32, ptr %3, align 4
%18 = select i1 %16, i32 %17, i32 0
br label %19
19: ; preds = %9, %2
%20 = phi i32 [ 0, %2 ], [ %18, %9 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %20
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #2
declare i64 @__power_supply_is_supplied_by(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"psy_am_i_supplied_data", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"power_supply", !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"TYPE_2__", !13, i64 0}
!16 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/power/supply/extr_power_supply_core.c___power_supply_am_i_supplied.c'
source_filename = "AnghaBench/linux/drivers/power/supply/extr_power_supply_core.c___power_supply_am_i_supplied.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%union.power_supply_propval = type { i32 }
@POWER_SUPPLY_PROP_ONLINE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @__power_supply_am_i_supplied], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @__power_supply_am_i_supplied(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = alloca %union.power_supply_propval, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
store i32 0, ptr %3, align 4
%4 = tail call ptr @dev_get_drvdata(ptr noundef %0) #3
%5 = getelementptr inbounds i8, ptr %1, i64 4
%6 = load i32, ptr %5, align 4, !tbaa !6
%7 = tail call i64 @__power_supply_is_supplied_by(ptr noundef %4, i32 noundef %6) #3
%8 = icmp eq i64 %7, 0
br i1 %8, label %19, label %9
9: ; preds = %2
%10 = load i32, ptr %1, align 4, !tbaa !11
%11 = add nsw i32 %10, 1
store i32 %11, ptr %1, align 4, !tbaa !11
%12 = load ptr, ptr %4, align 8, !tbaa !12
%13 = load ptr, ptr %12, align 8, !tbaa !15
%14 = load i32, ptr @POWER_SUPPLY_PROP_ONLINE, align 4, !tbaa !17
%15 = call i32 %13(ptr noundef nonnull %4, i32 noundef %14, ptr noundef nonnull %3) #3
%16 = icmp eq i32 %15, 0
%17 = load i32, ptr %3, align 4
%18 = select i1 %16, i32 %17, i32 0
br label %19
19: ; preds = %9, %2
%20 = phi i32 [ 0, %2 ], [ %18, %9 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
ret i32 %20
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #2
declare i64 @__power_supply_is_supplied_by(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"psy_am_i_supplied_data", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"power_supply", !14, i64 0}
!14 = !{!"any pointer", !9, i64 0}
!15 = !{!16, !14, i64 0}
!16 = !{!"TYPE_2__", !14, i64 0}
!17 = !{!8, !8, i64 0}
| linux_drivers_power_supply_extr_power_supply_core.c___power_supply_am_i_supplied |
; ModuleID = 'AnghaBench/linux/drivers/rtc/extr_rtc-max77686.c_max77686_rtc_set_alarm.c'
source_filename = "AnghaBench/linux/drivers/rtc/extr_rtc-max77686.c_max77686_rtc_set_alarm.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.rtc_wkalrm = type { i64, i32 }
%struct.max77686_rtc_info = type { i32, i32, ptr, i32 }
@RTC_NR_TIME = dso_local local_unnamed_addr global i32 0, align 4
@REG_ALARM1_SEC = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [29 x i8] c"Fail to write alarm reg(%d)\0A\00", align 1
@MAX77686_RTC_WRITE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @max77686_rtc_set_alarm], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @max77686_rtc_set_alarm(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%4 = load i32, ptr @RTC_NR_TIME, align 4, !tbaa !5
%5 = zext i32 %4 to i64
%6 = alloca i32, i64 %5, align 16
%7 = getelementptr inbounds %struct.rtc_wkalrm, ptr %1, i64 0, i32 1
%8 = call i32 @max77686_rtc_tm_to_data(ptr noundef nonnull %7, ptr noundef nonnull %6, ptr noundef %3) #2
%9 = icmp slt i32 %8, 0
br i1 %9, label %42, label %10
10: ; preds = %2
%11 = call i32 @mutex_lock(ptr noundef %3) #2
%12 = call i32 @max77686_rtc_stop_alarm(ptr noundef %3) #2
%13 = icmp slt i32 %12, 0
br i1 %13, label %39, label %14
14: ; preds = %10
%15 = getelementptr inbounds %struct.max77686_rtc_info, ptr %3, i64 0, i32 3
%16 = load i32, ptr %15, align 8, !tbaa !9
%17 = getelementptr inbounds %struct.max77686_rtc_info, ptr %3, i64 0, i32 2
%18 = load ptr, ptr %17, align 8, !tbaa !12
%19 = load ptr, ptr %18, align 8, !tbaa !13
%20 = load i64, ptr @REG_ALARM1_SEC, align 8, !tbaa !15
%21 = getelementptr inbounds i32, ptr %19, i64 %20
%22 = load i32, ptr %21, align 4, !tbaa !5
%23 = call i32 @ARRAY_SIZE(ptr noundef nonnull %6) #2
%24 = call i32 @regmap_bulk_write(i32 noundef %16, i32 noundef %22, ptr noundef nonnull %6, i32 noundef %23) #2
%25 = icmp slt i32 %24, 0
br i1 %25, label %26, label %30
26: ; preds = %14
%27 = getelementptr inbounds %struct.max77686_rtc_info, ptr %3, i64 0, i32 1
%28 = load i32, ptr %27, align 4, !tbaa !17
%29 = call i32 @dev_err(i32 noundef %28, ptr noundef nonnull @.str, i32 noundef %24) #2
br label %39
30: ; preds = %14
%31 = load i32, ptr @MAX77686_RTC_WRITE, align 4, !tbaa !5
%32 = call i32 @max77686_rtc_update(ptr noundef nonnull %3, i32 noundef %31) #2
%33 = icmp slt i32 %32, 0
br i1 %33, label %39, label %34
34: ; preds = %30
%35 = load i64, ptr %1, align 8, !tbaa !18
%36 = icmp eq i64 %35, 0
br i1 %36, label %39, label %37
37: ; preds = %34
%38 = call i32 @max77686_rtc_start_alarm(ptr noundef nonnull %3) #2
br label %39
39: ; preds = %34, %37, %30, %10, %26
%40 = phi i32 [ %12, %10 ], [ %24, %26 ], [ %32, %30 ], [ %38, %37 ], [ %32, %34 ]
%41 = call i32 @mutex_unlock(ptr noundef %3) #2
br label %42
42: ; preds = %2, %39
%43 = phi i32 [ %40, %39 ], [ %8, %2 ]
ret i32 %43
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @max77686_rtc_tm_to_data(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @max77686_rtc_stop_alarm(ptr noundef) local_unnamed_addr #1
declare i32 @regmap_bulk_write(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @max77686_rtc_update(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @max77686_rtc_start_alarm(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 16}
!10 = !{!"max77686_rtc_info", !6, i64 0, !6, i64 4, !11, i64 8, !6, i64 16}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!14, !11, i64 0}
!14 = !{!"TYPE_2__", !11, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = !{!10, !6, i64 4}
!18 = !{!19, !16, i64 0}
!19 = !{!"rtc_wkalrm", !16, i64 0, !6, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/rtc/extr_rtc-max77686.c_max77686_rtc_set_alarm.c'
source_filename = "AnghaBench/linux/drivers/rtc/extr_rtc-max77686.c_max77686_rtc_set_alarm.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RTC_NR_TIME = common local_unnamed_addr global i32 0, align 4
@REG_ALARM1_SEC = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [29 x i8] c"Fail to write alarm reg(%d)\0A\00", align 1
@MAX77686_RTC_WRITE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @max77686_rtc_set_alarm], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @max77686_rtc_set_alarm(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @dev_get_drvdata(ptr noundef %0) #2
%4 = load i32, ptr @RTC_NR_TIME, align 4, !tbaa !6
%5 = zext i32 %4 to i64
%6 = alloca i32, i64 %5, align 4
%7 = getelementptr inbounds i8, ptr %1, i64 8
%8 = call i32 @max77686_rtc_tm_to_data(ptr noundef nonnull %7, ptr noundef nonnull %6, ptr noundef %3) #2
%9 = icmp slt i32 %8, 0
br i1 %9, label %42, label %10
10: ; preds = %2
%11 = call i32 @mutex_lock(ptr noundef %3) #2
%12 = call i32 @max77686_rtc_stop_alarm(ptr noundef %3) #2
%13 = icmp slt i32 %12, 0
br i1 %13, label %39, label %14
14: ; preds = %10
%15 = getelementptr inbounds i8, ptr %3, i64 16
%16 = load i32, ptr %15, align 8, !tbaa !10
%17 = getelementptr inbounds i8, ptr %3, i64 8
%18 = load ptr, ptr %17, align 8, !tbaa !13
%19 = load ptr, ptr %18, align 8, !tbaa !14
%20 = load i64, ptr @REG_ALARM1_SEC, align 8, !tbaa !16
%21 = getelementptr inbounds i32, ptr %19, i64 %20
%22 = load i32, ptr %21, align 4, !tbaa !6
%23 = call i32 @ARRAY_SIZE(ptr noundef nonnull %6) #2
%24 = call i32 @regmap_bulk_write(i32 noundef %16, i32 noundef %22, ptr noundef nonnull %6, i32 noundef %23) #2
%25 = icmp slt i32 %24, 0
br i1 %25, label %26, label %30
26: ; preds = %14
%27 = getelementptr inbounds i8, ptr %3, i64 4
%28 = load i32, ptr %27, align 4, !tbaa !18
%29 = call i32 @dev_err(i32 noundef %28, ptr noundef nonnull @.str, i32 noundef %24) #2
br label %39
30: ; preds = %14
%31 = load i32, ptr @MAX77686_RTC_WRITE, align 4, !tbaa !6
%32 = call i32 @max77686_rtc_update(ptr noundef nonnull %3, i32 noundef %31) #2
%33 = icmp slt i32 %32, 0
br i1 %33, label %39, label %34
34: ; preds = %30
%35 = load i64, ptr %1, align 8, !tbaa !19
%36 = icmp eq i64 %35, 0
br i1 %36, label %39, label %37
37: ; preds = %34
%38 = call i32 @max77686_rtc_start_alarm(ptr noundef nonnull %3) #2
br label %39
39: ; preds = %34, %37, %30, %10, %26
%40 = phi i32 [ %12, %10 ], [ %24, %26 ], [ %32, %30 ], [ %38, %37 ], [ %32, %34 ]
%41 = call i32 @mutex_unlock(ptr noundef %3) #2
br label %42
42: ; preds = %2, %39
%43 = phi i32 [ %40, %39 ], [ %8, %2 ]
ret i32 %43
}
declare ptr @dev_get_drvdata(ptr noundef) local_unnamed_addr #1
declare i32 @max77686_rtc_tm_to_data(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @max77686_rtc_stop_alarm(ptr noundef) local_unnamed_addr #1
declare i32 @regmap_bulk_write(i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @max77686_rtc_update(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @max77686_rtc_start_alarm(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 16}
!11 = !{!"max77686_rtc_info", !7, i64 0, !7, i64 4, !12, i64 8, !7, i64 16}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!15, !12, i64 0}
!15 = !{!"TYPE_2__", !12, i64 0}
!16 = !{!17, !17, i64 0}
!17 = !{!"long", !8, i64 0}
!18 = !{!11, !7, i64 4}
!19 = !{!20, !17, i64 0}
!20 = !{!"rtc_wkalrm", !17, i64 0, !7, i64 8}
| linux_drivers_rtc_extr_rtc-max77686.c_max77686_rtc_set_alarm |
; ModuleID = 'AnghaBench/xLua/build/luajit-2.1.0b2/src/extr_lj_record.c_rec_call_setup.c'
source_filename = "AnghaBench/xLua/build/luajit-2.1.0b2/src/extr_lj_record.c_rec_call_setup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_11__ = type { i32, i32, i32, i32 }
%struct.TYPE_10__ = type { ptr, i64, ptr }
@LJ_FR2 = dso_local local_unnamed_addr global i32 0, align 4
@MM_call = dso_local local_unnamed_addr global i32 0, align 4
@LJ_TRERR_NOMM = dso_local local_unnamed_addr global i32 0, align 4
@TREF_FRAME = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @rec_call_setup], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @rec_call_setup(ptr noundef %0, i64 noundef %1, i64 noundef %2) #0 {
%4 = alloca %struct.TYPE_11__, align 4
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
%5 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 2
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = load ptr, ptr %6, align 8, !tbaa !11
%8 = load ptr, ptr %0, align 8, !tbaa !13
%9 = load i32, ptr @LJ_FR2, align 4, !tbaa !14
%10 = icmp eq i32 %9, 0
%11 = zext i1 %10 to i32
%12 = tail call i32 @lua_assert(i32 noundef %11) #3
br label %13
13: ; preds = %3, %13
%14 = phi i64 [ 0, %3 ], [ %17, %13 ]
%15 = add i64 %14, %1
%16 = tail call i32 @getslot(ptr noundef nonnull %0, i64 noundef %15) #3
%17 = add i64 %14, 1
%18 = icmp ugt i64 %17, %2
br i1 %18, label %19, label %13, !llvm.loop !16
19: ; preds = %13
%20 = getelementptr inbounds i32, ptr %7, i64 %1
%21 = getelementptr inbounds i32, ptr %8, i64 %1
%22 = load i32, ptr %21, align 4, !tbaa !14
%23 = tail call i32 @tref_isfunc(i32 noundef %22) #3
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %74
25: ; preds = %19
%26 = load i32, ptr %21, align 4, !tbaa !14
store i32 %26, ptr %4, align 4, !tbaa !18
%27 = load ptr, ptr %5, align 8, !tbaa !5
%28 = getelementptr inbounds %struct.TYPE_11__, ptr %4, i64 0, i32 3
%29 = call i32 @copyTV(ptr noundef %27, ptr noundef nonnull %28, ptr noundef %20) #3
%30 = load i32, ptr @MM_call, align 4, !tbaa !14
%31 = call i32 @lj_record_mm_lookup(ptr noundef nonnull %0, ptr noundef nonnull %4, i32 noundef %30) #3
%32 = icmp eq i32 %31, 0
br i1 %32, label %38, label %33
33: ; preds = %25
%34 = getelementptr inbounds %struct.TYPE_11__, ptr %4, i64 0, i32 1
%35 = load i32, ptr %34, align 4, !tbaa !20
%36 = call i32 @tref_isfunc(i32 noundef %35) #3
%37 = icmp eq i32 %36, 0
br i1 %37, label %38, label %41
38: ; preds = %33, %25
%39 = load i32, ptr @LJ_TRERR_NOMM, align 4, !tbaa !14
%40 = call i32 @lj_trace_err(ptr noundef nonnull %0, i32 noundef %39) #3
br label %41
41: ; preds = %38, %33
%42 = add i64 %2, 1
%43 = icmp ult i64 %42, 8
br i1 %43, label %61, label %44
44: ; preds = %41
%45 = and i64 %42, -8
%46 = and i64 %42, 7
br label %47
47: ; preds = %47, %44
%48 = phi i64 [ 0, %44 ], [ %57, %47 ]
%49 = sub i64 %42, %48
%50 = getelementptr i32, ptr %21, i64 %49
%51 = getelementptr i32, ptr %50, i64 -4
%52 = getelementptr i32, ptr %50, i64 -8
%53 = load <4 x i32>, ptr %51, align 4, !tbaa !14
%54 = load <4 x i32>, ptr %52, align 4, !tbaa !14
%55 = getelementptr i32, ptr %50, i64 -3
%56 = getelementptr i32, ptr %50, i64 -7
store <4 x i32> %53, ptr %55, align 4, !tbaa !14
store <4 x i32> %54, ptr %56, align 4, !tbaa !14
%57 = add nuw i64 %48, 8
%58 = icmp eq i64 %57, %45
br i1 %58, label %59, label %47, !llvm.loop !21
59: ; preds = %47
%60 = icmp eq i64 %42, %45
br i1 %60, label %70, label %61
61: ; preds = %41, %59
%62 = phi i64 [ %42, %41 ], [ %46, %59 ]
br label %63
63: ; preds = %61, %63
%64 = phi i64 [ %68, %63 ], [ %62, %61 ]
%65 = getelementptr i32, ptr %21, i64 %64
%66 = getelementptr i32, ptr %65, i64 -1
%67 = load i32, ptr %66, align 4, !tbaa !14
store i32 %67, ptr %65, align 4, !tbaa !14
%68 = add i64 %64, -1
%69 = icmp eq i64 %68, 0
br i1 %69, label %70, label %63, !llvm.loop !24
70: ; preds = %63, %59
%71 = getelementptr inbounds %struct.TYPE_11__, ptr %4, i64 0, i32 1
%72 = load i32, ptr %71, align 4, !tbaa !20
store i32 %72, ptr %21, align 4, !tbaa !14
%73 = getelementptr inbounds %struct.TYPE_11__, ptr %4, i64 0, i32 2
br label %74
74: ; preds = %70, %19
%75 = phi ptr [ %20, %19 ], [ %73, %70 ]
%76 = phi i64 [ %2, %19 ], [ %42, %70 ]
%77 = load i32, ptr @TREF_FRAME, align 4, !tbaa !14
%78 = call i32 @funcV(ptr noundef %75) #3
%79 = load i32, ptr %21, align 4, !tbaa !14
%80 = call i32 @rec_call_specialize(ptr noundef nonnull %0, i32 noundef %78, i32 noundef %79) #3
%81 = or i32 %80, %77
store i32 %81, ptr %21, align 4, !tbaa !14
%82 = getelementptr inbounds %struct.TYPE_10__, ptr %0, i64 0, i32 1
store i64 %76, ptr %82, align 8, !tbaa !25
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @lua_assert(i32 noundef) local_unnamed_addr #2
declare i32 @getslot(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @tref_isfunc(i32 noundef) local_unnamed_addr #2
declare i32 @copyTV(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @lj_record_mm_lookup(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @lj_trace_err(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @rec_call_specialize(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @funcV(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"TYPE_10__", !7, i64 0, !10, i64 8, !7, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"TYPE_12__", !7, i64 0}
!13 = !{!6, !7, i64 0}
!14 = !{!15, !15, i64 0}
!15 = !{!"int", !8, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = !{!19, !15, i64 0}
!19 = !{!"TYPE_11__", !15, i64 0, !15, i64 4, !15, i64 8, !15, i64 12}
!20 = !{!19, !15, i64 4}
!21 = distinct !{!21, !17, !22, !23}
!22 = !{!"llvm.loop.isvectorized", i32 1}
!23 = !{!"llvm.loop.unroll.runtime.disable"}
!24 = distinct !{!24, !17, !23, !22}
!25 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/xLua/build/luajit-2.1.0b2/src/extr_lj_record.c_rec_call_setup.c'
source_filename = "AnghaBench/xLua/build/luajit-2.1.0b2/src/extr_lj_record.c_rec_call_setup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_11__ = type { i32, i32, i32, i32 }
@LJ_FR2 = common local_unnamed_addr global i32 0, align 4
@MM_call = common local_unnamed_addr global i32 0, align 4
@LJ_TRERR_NOMM = common local_unnamed_addr global i32 0, align 4
@TREF_FRAME = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @rec_call_setup], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @rec_call_setup(ptr noundef %0, i64 noundef %1, i64 noundef %2) #0 {
%4 = alloca %struct.TYPE_11__, align 4
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
%5 = getelementptr inbounds i8, ptr %0, i64 16
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = load ptr, ptr %6, align 8, !tbaa !12
%8 = load ptr, ptr %0, align 8, !tbaa !14
%9 = load i32, ptr @LJ_FR2, align 4, !tbaa !15
%10 = icmp eq i32 %9, 0
%11 = zext i1 %10 to i32
%12 = tail call i32 @lua_assert(i32 noundef %11) #3
br label %13
13: ; preds = %3, %13
%14 = phi i64 [ 0, %3 ], [ %17, %13 ]
%15 = add i64 %14, %1
%16 = tail call i32 @getslot(ptr noundef nonnull %0, i64 noundef %15) #3
%17 = add i64 %14, 1
%18 = icmp ugt i64 %17, %2
br i1 %18, label %19, label %13, !llvm.loop !17
19: ; preds = %13
%20 = getelementptr inbounds i32, ptr %7, i64 %1
%21 = getelementptr inbounds i32, ptr %8, i64 %1
%22 = load i32, ptr %21, align 4, !tbaa !15
%23 = tail call i32 @tref_isfunc(i32 noundef %22) #3
%24 = icmp eq i32 %23, 0
br i1 %24, label %25, label %80
25: ; preds = %19
%26 = load i32, ptr %21, align 4, !tbaa !15
store i32 %26, ptr %4, align 4, !tbaa !19
%27 = load ptr, ptr %5, align 8, !tbaa !6
%28 = getelementptr inbounds i8, ptr %4, i64 12
%29 = call i32 @copyTV(ptr noundef %27, ptr noundef nonnull %28, ptr noundef %20) #3
%30 = load i32, ptr @MM_call, align 4, !tbaa !15
%31 = call i32 @lj_record_mm_lookup(ptr noundef nonnull %0, ptr noundef nonnull %4, i32 noundef %30) #3
%32 = icmp eq i32 %31, 0
br i1 %32, label %38, label %33
33: ; preds = %25
%34 = getelementptr inbounds i8, ptr %4, i64 4
%35 = load i32, ptr %34, align 4, !tbaa !21
%36 = call i32 @tref_isfunc(i32 noundef %35) #3
%37 = icmp eq i32 %36, 0
br i1 %37, label %38, label %41
38: ; preds = %33, %25
%39 = load i32, ptr @LJ_TRERR_NOMM, align 4, !tbaa !15
%40 = call i32 @lj_trace_err(ptr noundef nonnull %0, i32 noundef %39) #3
br label %41
41: ; preds = %38, %33
%42 = add i64 %2, 1
%43 = icmp ult i64 %42, 16
br i1 %43, label %67, label %44
44: ; preds = %41
%45 = and i64 %42, -16
%46 = and i64 %42, 15
br label %47
47: ; preds = %47, %44
%48 = phi i64 [ 0, %44 ], [ %63, %47 ]
%49 = sub i64 %42, %48
%50 = getelementptr i32, ptr %21, i64 %49
%51 = getelementptr i8, ptr %50, i64 -16
%52 = getelementptr i8, ptr %50, i64 -32
%53 = getelementptr i8, ptr %50, i64 -48
%54 = getelementptr i8, ptr %50, i64 -64
%55 = load <4 x i32>, ptr %51, align 4, !tbaa !15
%56 = load <4 x i32>, ptr %52, align 4, !tbaa !15
%57 = load <4 x i32>, ptr %53, align 4, !tbaa !15
%58 = load <4 x i32>, ptr %54, align 4, !tbaa !15
%59 = getelementptr i8, ptr %50, i64 -12
%60 = getelementptr i8, ptr %50, i64 -28
%61 = getelementptr i8, ptr %50, i64 -44
%62 = getelementptr i8, ptr %50, i64 -60
store <4 x i32> %55, ptr %59, align 4, !tbaa !15
store <4 x i32> %56, ptr %60, align 4, !tbaa !15
store <4 x i32> %57, ptr %61, align 4, !tbaa !15
store <4 x i32> %58, ptr %62, align 4, !tbaa !15
%63 = add nuw i64 %48, 16
%64 = icmp eq i64 %63, %45
br i1 %64, label %65, label %47, !llvm.loop !22
65: ; preds = %47
%66 = icmp eq i64 %42, %45
br i1 %66, label %76, label %67
67: ; preds = %65, %41
%68 = phi i64 [ %42, %41 ], [ %46, %65 ]
br label %69
69: ; preds = %67, %69
%70 = phi i64 [ %74, %69 ], [ %68, %67 ]
%71 = getelementptr i32, ptr %21, i64 %70
%72 = getelementptr i8, ptr %71, i64 -4
%73 = load i32, ptr %72, align 4, !tbaa !15
store i32 %73, ptr %71, align 4, !tbaa !15
%74 = add i64 %70, -1
%75 = icmp eq i64 %74, 0
br i1 %75, label %76, label %69, !llvm.loop !25
76: ; preds = %69, %65
%77 = getelementptr inbounds i8, ptr %4, i64 4
%78 = load i32, ptr %77, align 4, !tbaa !21
store i32 %78, ptr %21, align 4, !tbaa !15
%79 = getelementptr inbounds i8, ptr %4, i64 8
br label %80
80: ; preds = %76, %19
%81 = phi ptr [ %20, %19 ], [ %79, %76 ]
%82 = phi i64 [ %2, %19 ], [ %42, %76 ]
%83 = load i32, ptr @TREF_FRAME, align 4, !tbaa !15
%84 = call i32 @funcV(ptr noundef %81) #3
%85 = load i32, ptr %21, align 4, !tbaa !15
%86 = call i32 @rec_call_specialize(ptr noundef nonnull %0, i32 noundef %84, i32 noundef %85) #3
%87 = or i32 %86, %83
store i32 %87, ptr %21, align 4, !tbaa !15
%88 = getelementptr inbounds i8, ptr %0, i64 8
store i64 %82, ptr %88, align 8, !tbaa !26
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @lua_assert(i32 noundef) local_unnamed_addr #2
declare i32 @getslot(ptr noundef, i64 noundef) local_unnamed_addr #2
declare i32 @tref_isfunc(i32 noundef) local_unnamed_addr #2
declare i32 @copyTV(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @lj_record_mm_lookup(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @lj_trace_err(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @rec_call_specialize(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @funcV(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"TYPE_10__", !8, i64 0, !11, i64 8, !8, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"TYPE_12__", !8, i64 0}
!14 = !{!7, !8, i64 0}
!15 = !{!16, !16, i64 0}
!16 = !{!"int", !9, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = !{!20, !16, i64 0}
!20 = !{!"TYPE_11__", !16, i64 0, !16, i64 4, !16, i64 8, !16, i64 12}
!21 = !{!20, !16, i64 4}
!22 = distinct !{!22, !18, !23, !24}
!23 = !{!"llvm.loop.isvectorized", i32 1}
!24 = !{!"llvm.loop.unroll.runtime.disable"}
!25 = distinct !{!25, !18, !24, !23}
!26 = !{!7, !11, i64 8}
| xLua_build_luajit-2.1.0b2_src_extr_lj_record.c_rec_call_setup |
; ModuleID = 'AnghaBench/linux/tools/perf/util/extr_thread_map.c_thread_map__fprintf.c'
source_filename = "AnghaBench/linux/tools/perf/util/extr_thread_map.c_thread_map__fprintf.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [14 x i8] c"%d thread%s: \00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"s\00", align 1
@.str.2 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.3 = private unnamed_addr constant [5 x i8] c"%s%d\00", align 1
@.str.4 = private unnamed_addr constant [3 x i8] c", \00", align 1
@.str.5 = private unnamed_addr constant [2 x i8] c"\0A\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i64 @thread_map__fprintf(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = icmp sgt i32 %3, 1
%5 = select i1 %4, ptr @.str.1, ptr @.str.2
%6 = tail call i64 (ptr, ptr, ...) @fprintf(ptr noundef %1, ptr noundef nonnull @.str, i32 noundef %3, ptr noundef nonnull %5) #2
%7 = load i32, ptr %0, align 4, !tbaa !5
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %24
9: ; preds = %2
%10 = tail call i32 @perf_thread_map__pid(ptr noundef nonnull %0, i32 noundef 0) #2
%11 = tail call i64 (ptr, ptr, ...) @fprintf(ptr noundef %1, ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.2, i32 noundef %10) #2
%12 = add i64 %11, %6
%13 = load i32, ptr %0, align 4, !tbaa !5
%14 = icmp sgt i32 %13, 1
br i1 %14, label %15, label %24
15: ; preds = %9, %15
%16 = phi i64 [ %20, %15 ], [ %12, %9 ]
%17 = phi i32 [ %21, %15 ], [ 1, %9 ]
%18 = tail call i32 @perf_thread_map__pid(ptr noundef nonnull %0, i32 noundef %17) #2
%19 = tail call i64 (ptr, ptr, ...) @fprintf(ptr noundef %1, ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.4, i32 noundef %18) #2
%20 = add i64 %19, %16
%21 = add nuw nsw i32 %17, 1
%22 = load i32, ptr %0, align 4, !tbaa !5
%23 = icmp slt i32 %21, %22
br i1 %23, label %15, label %24, !llvm.loop !10
24: ; preds = %15, %9, %2
%25 = phi i64 [ %6, %2 ], [ %12, %9 ], [ %20, %15 ]
%26 = tail call i64 (ptr, ptr, ...) @fprintf(ptr noundef %1, ptr noundef nonnull @.str.5) #2
%27 = add i64 %26, %25
ret i64 %27
}
declare i64 @fprintf(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @perf_thread_map__pid(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"perf_thread_map", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11, !12}
!11 = !{!"llvm.loop.mustprogress"}
!12 = !{!"llvm.loop.peeled.count", i32 1}
| ; ModuleID = 'AnghaBench/linux/tools/perf/util/extr_thread_map.c_thread_map__fprintf.c'
source_filename = "AnghaBench/linux/tools/perf/util/extr_thread_map.c_thread_map__fprintf.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [14 x i8] c"%d thread%s: \00", align 1
@.str.1 = private unnamed_addr constant [2 x i8] c"s\00", align 1
@.str.2 = private unnamed_addr constant [1 x i8] zeroinitializer, align 1
@.str.3 = private unnamed_addr constant [5 x i8] c"%s%d\00", align 1
@.str.4 = private unnamed_addr constant [3 x i8] c", \00", align 1
@.str.5 = private unnamed_addr constant [2 x i8] c"\0A\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @thread_map__fprintf(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = icmp sgt i32 %3, 1
%5 = select i1 %4, ptr @.str.1, ptr @.str.2
%6 = tail call i64 (ptr, ptr, ...) @fprintf(ptr noundef %1, ptr noundef nonnull @.str, i32 noundef %3, ptr noundef nonnull %5) #2
%7 = load i32, ptr %0, align 4, !tbaa !6
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %24
9: ; preds = %2
%10 = tail call i32 @perf_thread_map__pid(ptr noundef nonnull %0, i32 noundef 0) #2
%11 = tail call i64 (ptr, ptr, ...) @fprintf(ptr noundef %1, ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.2, i32 noundef %10) #2
%12 = add i64 %11, %6
%13 = load i32, ptr %0, align 4, !tbaa !6
%14 = icmp sgt i32 %13, 1
br i1 %14, label %15, label %24
15: ; preds = %9, %15
%16 = phi i64 [ %20, %15 ], [ %12, %9 ]
%17 = phi i32 [ %21, %15 ], [ 1, %9 ]
%18 = tail call i32 @perf_thread_map__pid(ptr noundef nonnull %0, i32 noundef %17) #2
%19 = tail call i64 (ptr, ptr, ...) @fprintf(ptr noundef %1, ptr noundef nonnull @.str.3, ptr noundef nonnull @.str.4, i32 noundef %18) #2
%20 = add i64 %19, %16
%21 = add nuw nsw i32 %17, 1
%22 = load i32, ptr %0, align 4, !tbaa !6
%23 = icmp slt i32 %21, %22
br i1 %23, label %15, label %24, !llvm.loop !11
24: ; preds = %15, %9, %2
%25 = phi i64 [ %6, %2 ], [ %12, %9 ], [ %20, %15 ]
%26 = tail call i64 (ptr, ptr, ...) @fprintf(ptr noundef %1, ptr noundef nonnull @.str.5) #2
%27 = add i64 %26, %25
ret i64 %27
}
declare i64 @fprintf(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @perf_thread_map__pid(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"perf_thread_map", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = distinct !{!11, !12, !13}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!"llvm.loop.peeled.count", i32 1}
| linux_tools_perf_util_extr_thread_map.c_thread_map__fprintf |
; ModuleID = 'AnghaBench/mpv/stream/extr_stream.c_mp_url_unescape_inplace.c'
source_filename = "AnghaBench/mpv/stream/extr_stream.c_mp_url_unescape_inplace.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @mp_url_unescape_inplace(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @strlen(ptr noundef %0) #2
%3 = getelementptr i8, ptr %0, i64 1
%4 = icmp slt i32 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = add nsw i32 %2, -3
br label %8
7: ; preds = %22, %1
ret void
8: ; preds = %5, %22
%9 = phi i32 [ 0, %5 ], [ %24, %22 ]
%10 = phi i32 [ 0, %5 ], [ %23, %22 ]
%11 = sext i32 %9 to i64
%12 = getelementptr inbounds i8, ptr %0, i64 %11
%13 = load i8, ptr %12, align 1, !tbaa !5
%14 = icmp ne i8 %13, 37
%15 = icmp sgt i32 %9, %6
%16 = select i1 %14, i1 true, i1 %15
br i1 %16, label %17, label %26
17: ; preds = %8
%18 = add nsw i32 %9, 1
%19 = add nsw i32 %10, 1
%20 = sext i32 %10 to i64
%21 = getelementptr inbounds i8, ptr %0, i64 %20
store i8 %13, ptr %21, align 1, !tbaa !5
br label %22
22: ; preds = %17, %52
%23 = phi i32 [ %19, %17 ], [ %53, %52 ]
%24 = phi i32 [ %18, %17 ], [ %54, %52 ]
%25 = icmp sgt i32 %24, %2
br i1 %25, label %7, label %8, !llvm.loop !8
26: ; preds = %8
%27 = getelementptr i8, ptr %3, i64 %11
%28 = load i8, ptr %27, align 1, !tbaa !5
%29 = tail call i32 @hex2dec(i8 noundef signext %28) #2
%30 = getelementptr i8, ptr %12, i64 2
%31 = load i8, ptr %30, align 1, !tbaa !5
%32 = tail call i32 @hex2dec(i8 noundef signext %31) #2
%33 = icmp sgt i32 %29, -1
%34 = icmp sgt i32 %32, -1
%35 = select i1 %33, i1 %34, i1 false
br i1 %35, label %36, label %43
36: ; preds = %26
%37 = shl nsw i32 %29, 4
%38 = add nsw i32 %32, %37
%39 = trunc i32 %38 to i8
%40 = add nsw i32 %10, 1
%41 = sext i32 %10 to i64
%42 = getelementptr inbounds i8, ptr %0, i64 %41
store i8 %39, ptr %42, align 1, !tbaa !5
br label %52
43: ; preds = %26
%44 = load i8, ptr %12, align 1, !tbaa !5
%45 = sext i32 %10 to i64
%46 = getelementptr inbounds i8, ptr %0, i64 %45
store i8 %44, ptr %46, align 1, !tbaa !5
%47 = load i8, ptr %27, align 1, !tbaa !5
%48 = getelementptr i8, ptr %46, i64 1
store i8 %47, ptr %48, align 1, !tbaa !5
%49 = load i8, ptr %30, align 1, !tbaa !5
%50 = add nsw i32 %10, 3
%51 = getelementptr i8, ptr %46, i64 2
store i8 %49, ptr %51, align 1, !tbaa !5
br label %52
52: ; preds = %43, %36
%53 = phi i32 [ %40, %36 ], [ %50, %43 ]
%54 = add nsw i32 %9, 3
br label %22
}
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
declare i32 @hex2dec(i8 noundef signext) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9}
!9 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/mpv/stream/extr_stream.c_mp_url_unescape_inplace.c'
source_filename = "AnghaBench/mpv/stream/extr_stream.c_mp_url_unescape_inplace.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @mp_url_unescape_inplace(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @strlen(ptr noundef %0) #2
%3 = getelementptr i8, ptr %0, i64 1
%4 = icmp slt i32 %2, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = add nsw i32 %2, -3
br label %8
7: ; preds = %22, %1
ret void
8: ; preds = %5, %22
%9 = phi i32 [ 0, %5 ], [ %24, %22 ]
%10 = phi i32 [ 0, %5 ], [ %23, %22 ]
%11 = sext i32 %9 to i64
%12 = getelementptr inbounds i8, ptr %0, i64 %11
%13 = load i8, ptr %12, align 1, !tbaa !6
%14 = icmp ne i8 %13, 37
%15 = icmp sgt i32 %9, %6
%16 = select i1 %14, i1 true, i1 %15
br i1 %16, label %17, label %26
17: ; preds = %8
%18 = add nsw i32 %9, 1
%19 = add nsw i32 %10, 1
%20 = sext i32 %10 to i64
%21 = getelementptr inbounds i8, ptr %0, i64 %20
store i8 %13, ptr %21, align 1, !tbaa !6
br label %22
22: ; preds = %17, %52
%23 = phi i32 [ %19, %17 ], [ %53, %52 ]
%24 = phi i32 [ %18, %17 ], [ %54, %52 ]
%25 = icmp sgt i32 %24, %2
br i1 %25, label %7, label %8, !llvm.loop !9
26: ; preds = %8
%27 = getelementptr i8, ptr %3, i64 %11
%28 = load i8, ptr %27, align 1, !tbaa !6
%29 = tail call i32 @hex2dec(i8 noundef signext %28) #2
%30 = getelementptr i8, ptr %12, i64 2
%31 = load i8, ptr %30, align 1, !tbaa !6
%32 = tail call i32 @hex2dec(i8 noundef signext %31) #2
%33 = icmp sgt i32 %29, -1
%34 = icmp sgt i32 %32, -1
%35 = select i1 %33, i1 %34, i1 false
br i1 %35, label %36, label %43
36: ; preds = %26
%37 = shl nsw i32 %29, 4
%38 = add nuw nsw i32 %32, %37
%39 = trunc i32 %38 to i8
%40 = add nsw i32 %10, 1
%41 = sext i32 %10 to i64
%42 = getelementptr inbounds i8, ptr %0, i64 %41
store i8 %39, ptr %42, align 1, !tbaa !6
br label %52
43: ; preds = %26
%44 = load i8, ptr %12, align 1, !tbaa !6
%45 = sext i32 %10 to i64
%46 = getelementptr inbounds i8, ptr %0, i64 %45
store i8 %44, ptr %46, align 1, !tbaa !6
%47 = load i8, ptr %27, align 1, !tbaa !6
%48 = getelementptr i8, ptr %46, i64 1
store i8 %47, ptr %48, align 1, !tbaa !6
%49 = load i8, ptr %30, align 1, !tbaa !6
%50 = add nsw i32 %10, 3
%51 = getelementptr i8, ptr %46, i64 2
store i8 %49, ptr %51, align 1, !tbaa !6
br label %52
52: ; preds = %43, %36
%53 = phi i32 [ %40, %36 ], [ %50, %43 ]
%54 = add nsw i32 %9, 3
br label %22
}
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
declare i32 @hex2dec(i8 noundef signext) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| mpv_stream_extr_stream.c_mp_url_unescape_inplace |
; ModuleID = 'AnghaBench/freebsd/lib/libiconv_modules/HZ/extr_citrus_hz.c__citrus_HZ_encoding_module_init.c'
source_filename = "AnghaBench/freebsd/lib/libiconv_modules/HZ/extr_citrus_hz.c__citrus_HZ_encoding_module_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@root_hints = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @_citrus_HZ_encoding_module_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @_citrus_HZ_encoding_module_init(ptr noalias noundef %0, ptr noalias noundef %1, i64 noundef %2) #0 {
%4 = tail call i32 @memset(ptr noundef %0, i32 noundef 0, i32 noundef 4) #2
%5 = tail call i32 @E0SET(ptr noundef %0) #2
%6 = tail call i32 @TAILQ_INIT(i32 noundef %5) #2
%7 = tail call i32 @E1SET(ptr noundef %0) #2
%8 = tail call i32 @TAILQ_INIT(i32 noundef %7) #2
%9 = load i32, ptr @root_hints, align 4, !tbaa !5
%10 = tail call i32 @_citrus_prop_parse_variable(i32 noundef %9, ptr noundef %0, ptr noundef %1, i64 noundef %2) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %14, label %12
12: ; preds = %3
%13 = tail call i32 @_citrus_HZ_encoding_module_uninit(ptr noundef %0) #2
br label %14
14: ; preds = %12, %3
ret i32 %10
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @TAILQ_INIT(i32 noundef) local_unnamed_addr #1
declare i32 @E0SET(ptr noundef) local_unnamed_addr #1
declare i32 @E1SET(ptr noundef) local_unnamed_addr #1
declare i32 @_citrus_prop_parse_variable(i32 noundef, ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @_citrus_HZ_encoding_module_uninit(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/lib/libiconv_modules/HZ/extr_citrus_hz.c__citrus_HZ_encoding_module_init.c'
source_filename = "AnghaBench/freebsd/lib/libiconv_modules/HZ/extr_citrus_hz.c__citrus_HZ_encoding_module_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@root_hints = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @_citrus_HZ_encoding_module_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @_citrus_HZ_encoding_module_init(ptr noalias noundef %0, ptr noalias noundef %1, i64 noundef %2) #0 {
%4 = tail call i32 @memset(ptr noundef %0, i32 noundef 0, i32 noundef 4) #2
%5 = tail call i32 @E0SET(ptr noundef %0) #2
%6 = tail call i32 @TAILQ_INIT(i32 noundef %5) #2
%7 = tail call i32 @E1SET(ptr noundef %0) #2
%8 = tail call i32 @TAILQ_INIT(i32 noundef %7) #2
%9 = load i32, ptr @root_hints, align 4, !tbaa !6
%10 = tail call i32 @_citrus_prop_parse_variable(i32 noundef %9, ptr noundef %0, ptr noundef %1, i64 noundef %2) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %14, label %12
12: ; preds = %3
%13 = tail call i32 @_citrus_HZ_encoding_module_uninit(ptr noundef %0) #2
br label %14
14: ; preds = %12, %3
ret i32 %10
}
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @TAILQ_INIT(i32 noundef) local_unnamed_addr #1
declare i32 @E0SET(ptr noundef) local_unnamed_addr #1
declare i32 @E1SET(ptr noundef) local_unnamed_addr #1
declare i32 @_citrus_prop_parse_variable(i32 noundef, ptr noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @_citrus_HZ_encoding_module_uninit(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_lib_libiconv_modules_HZ_extr_citrus_hz.c__citrus_HZ_encoding_module_init |
; ModuleID = 'AnghaBench/linux/drivers/video/fbdev/extr_smscufx.c_ufx_ops_imageblit.c'
source_filename = "AnghaBench/linux/drivers/video/fbdev/extr_smscufx.c_ufx_ops_imageblit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.fb_image = type { i32, i32, i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @ufx_ops_imageblit], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ufx_ops_imageblit(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = tail call i32 @sys_imageblit(ptr noundef nonnull %0, ptr noundef %1) #2
%5 = getelementptr inbounds %struct.fb_image, ptr %1, i64 0, i32 3
%6 = load i32, ptr %5, align 4, !tbaa !10
%7 = getelementptr inbounds %struct.fb_image, ptr %1, i64 0, i32 2
%8 = load i32, ptr %7, align 4, !tbaa !13
%9 = getelementptr inbounds %struct.fb_image, ptr %1, i64 0, i32 1
%10 = load i32, ptr %9, align 4, !tbaa !14
%11 = load i32, ptr %1, align 4, !tbaa !15
%12 = tail call i32 @ufx_handle_damage(ptr noundef %3, i32 noundef %6, i32 noundef %8, i32 noundef %10, i32 noundef %11) #2
ret void
}
declare i32 @sys_imageblit(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ufx_handle_damage(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"fb_info", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 12}
!11 = !{!"fb_image", !12, i64 0, !12, i64 4, !12, i64 8, !12, i64 12}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!11, !12, i64 4}
!15 = !{!11, !12, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/video/fbdev/extr_smscufx.c_ufx_ops_imageblit.c'
source_filename = "AnghaBench/linux/drivers/video/fbdev/extr_smscufx.c_ufx_ops_imageblit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @ufx_ops_imageblit], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ufx_ops_imageblit(ptr noundef %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = tail call i32 @sys_imageblit(ptr noundef nonnull %0, ptr noundef %1) #2
%5 = getelementptr inbounds i8, ptr %1, i64 12
%6 = load i32, ptr %5, align 4, !tbaa !11
%7 = getelementptr inbounds i8, ptr %1, i64 8
%8 = load i32, ptr %7, align 4, !tbaa !14
%9 = getelementptr inbounds i8, ptr %1, i64 4
%10 = load i32, ptr %9, align 4, !tbaa !15
%11 = load i32, ptr %1, align 4, !tbaa !16
%12 = tail call i32 @ufx_handle_damage(ptr noundef %3, i32 noundef %6, i32 noundef %8, i32 noundef %10, i32 noundef %11) #2
ret void
}
declare i32 @sys_imageblit(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ufx_handle_damage(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"fb_info", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 12}
!12 = !{!"fb_image", !13, i64 0, !13, i64 4, !13, i64 8, !13, i64 12}
!13 = !{!"int", !9, i64 0}
!14 = !{!12, !13, i64 8}
!15 = !{!12, !13, i64 4}
!16 = !{!12, !13, i64 0}
| linux_drivers_video_fbdev_extr_smscufx.c_ufx_ops_imageblit |
; ModuleID = 'AnghaBench/linux/arch/m68k/kernel/extr_pcibios.c_pcibios_align_resource.c'
source_filename = "AnghaBench/linux/arch/m68k/kernel/extr_pcibios.c_pcibios_align_resource.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.resource = type { i32, i32 }
@IORESOURCE_IO = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable
define dso_local i32 @pcibios_align_resource(ptr nocapture noundef readnone %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = load i32, ptr %1, align 4, !tbaa !5
%6 = getelementptr inbounds %struct.resource, ptr %1, i64 0, i32 1
%7 = load i32, ptr %6, align 4, !tbaa !10
%8 = load i32, ptr @IORESOURCE_IO, align 4, !tbaa !11
%9 = and i32 %8, %7
%10 = icmp eq i32 %9, 0
%11 = and i32 %5, 768
%12 = icmp eq i32 %11, 0
%13 = select i1 %10, i1 true, i1 %12
%14 = add nsw i32 %5, 1023
%15 = and i32 %14, -1024
%16 = select i1 %13, i32 %5, i32 %15
%17 = add i32 %3, -1
%18 = add i32 %17, %16
%19 = sub i32 0, %3
%20 = and i32 %18, %19
ret i32 %20
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"resource", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/arch/m68k/kernel/extr_pcibios.c_pcibios_align_resource.c'
source_filename = "AnghaBench/linux/arch/m68k/kernel/extr_pcibios.c_pcibios_align_resource.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IORESOURCE_IO = common local_unnamed_addr global i32 0, align 4
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync)
define i32 @pcibios_align_resource(ptr nocapture noundef readnone %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3) local_unnamed_addr #0 {
%5 = load i32, ptr %1, align 4, !tbaa !6
%6 = getelementptr inbounds i8, ptr %1, i64 4
%7 = load i32, ptr %6, align 4, !tbaa !11
%8 = load i32, ptr @IORESOURCE_IO, align 4, !tbaa !12
%9 = and i32 %8, %7
%10 = icmp eq i32 %9, 0
%11 = and i32 %5, 768
%12 = icmp eq i32 %11, 0
%13 = select i1 %10, i1 true, i1 %12
%14 = add nsw i32 %5, 1023
%15 = and i32 %14, -1024
%16 = select i1 %13, i32 %5, i32 %15
%17 = add i32 %3, -1
%18 = add i32 %17, %16
%19 = sub i32 0, %3
%20 = and i32 %18, %19
ret i32 %20
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"resource", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
!12 = !{!8, !8, i64 0}
| linux_arch_m68k_kernel_extr_pcibios.c_pcibios_align_resource |
; ModuleID = 'AnghaBench/linux/drivers/dma/extr_iop-adma.c_iop_adma_check_threshold.c'
source_filename = "AnghaBench/linux/drivers/dma/extr_iop-adma.c_iop_adma_check_threshold.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.iop_adma_chan = type { i64, ptr }
@.str = private unnamed_addr constant [13 x i8] c"pending: %d\0A\00", align 1
@IOP_ADMA_THRESHOLD = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @iop_adma_check_threshold], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @iop_adma_check_threshold(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.iop_adma_chan, ptr %0, i64 0, i32 1
%3 = load ptr, ptr %2, align 8, !tbaa !5
%4 = load i32, ptr %3, align 4, !tbaa !11
%5 = load i64, ptr %0, align 8, !tbaa !15
%6 = tail call i32 @dev_dbg(i32 noundef %4, ptr noundef nonnull @.str, i64 noundef %5) #2
%7 = load i64, ptr %0, align 8, !tbaa !15
%8 = load i64, ptr @IOP_ADMA_THRESHOLD, align 8, !tbaa !16
%9 = icmp slt i64 %7, %8
br i1 %9, label %12, label %10
10: ; preds = %1
store i64 0, ptr %0, align 8, !tbaa !15
%11 = tail call i32 @iop_chan_append(ptr noundef nonnull %0) #2
br label %12
12: ; preds = %10, %1
ret void
}
declare i32 @dev_dbg(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @iop_chan_append(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"iop_adma_chan", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !14, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"TYPE_3__", !14, i64 0}
!14 = !{!"int", !8, i64 0}
!15 = !{!6, !7, i64 0}
!16 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/dma/extr_iop-adma.c_iop_adma_check_threshold.c'
source_filename = "AnghaBench/linux/drivers/dma/extr_iop-adma.c_iop_adma_check_threshold.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [13 x i8] c"pending: %d\0A\00", align 1
@IOP_ADMA_THRESHOLD = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @iop_adma_check_threshold], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @iop_adma_check_threshold(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 8
%3 = load ptr, ptr %2, align 8, !tbaa !6
%4 = load i32, ptr %3, align 4, !tbaa !12
%5 = load i64, ptr %0, align 8, !tbaa !16
%6 = tail call i32 @dev_dbg(i32 noundef %4, ptr noundef nonnull @.str, i64 noundef %5) #2
%7 = load i64, ptr %0, align 8, !tbaa !16
%8 = load i64, ptr @IOP_ADMA_THRESHOLD, align 8, !tbaa !17
%9 = icmp slt i64 %7, %8
br i1 %9, label %12, label %10
10: ; preds = %1
store i64 0, ptr %0, align 8, !tbaa !16
%11 = tail call i32 @iop_chan_append(ptr noundef nonnull %0) #2
br label %12
12: ; preds = %10, %1
ret void
}
declare i32 @dev_dbg(i32 noundef, ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @iop_chan_append(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"iop_adma_chan", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !15, i64 0}
!13 = !{!"TYPE_4__", !14, i64 0}
!14 = !{!"TYPE_3__", !15, i64 0}
!15 = !{!"int", !9, i64 0}
!16 = !{!7, !8, i64 0}
!17 = !{!8, !8, i64 0}
| linux_drivers_dma_extr_iop-adma.c_iop_adma_check_threshold |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/alpha/kernel/extr_irq_pyxis.c_pyxis_startup_irq.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/alpha/kernel/extr_irq_pyxis.c_pyxis_startup_irq.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @pyxis_startup_irq], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @pyxis_startup_irq(i32 noundef %0) #0 {
%2 = tail call i32 @pyxis_enable_irq(i32 noundef %0) #2
ret i32 0
}
declare i32 @pyxis_enable_irq(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/alpha/kernel/extr_irq_pyxis.c_pyxis_startup_irq.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/alpha/kernel/extr_irq_pyxis.c_pyxis_startup_irq.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pyxis_startup_irq], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @pyxis_startup_irq(i32 noundef %0) #0 {
%2 = tail call i32 @pyxis_enable_irq(i32 noundef %0) #2
ret i32 0
}
declare i32 @pyxis_enable_irq(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_arch_alpha_kernel_extr_irq_pyxis.c_pyxis_startup_irq |
; ModuleID = 'AnghaBench/freebsd/sys/arm/amlogic/aml8726/extr_aml8726_fb.c_aml8726_fb_cfg_canvas.c'
source_filename = "AnghaBench/freebsd/sys/arm/amlogic/aml8726/extr_aml8726_fb.c_aml8726_fb_cfg_canvas.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i64, i64, i64 }
@AML_CAV_LUT_DATAL_WIDTH_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAL_WIDTH_MASK = dso_local local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAL_REG = dso_local local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAL_WIDTH_WIDTH = dso_local local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAH_WIDTH_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAH_WIDTH_MASK = dso_local local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAH_HEIGHT_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAH_HEIGHT_MASK = dso_local local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAH_BLKMODE_LINEAR = dso_local local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAH_REG = dso_local local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_ADDR_REG = dso_local local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_ADDR_WR_EN = dso_local local_unnamed_addr global i32 0, align 4
@AML_CAV_OSD1_INDEX = dso_local local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_ADDR_INDEX_SHIFT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @aml8726_fb_cfg_canvas], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @aml8726_fb_cfg_canvas(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 2
%3 = load i64, ptr %2, align 8, !tbaa !5
%4 = trunc i64 %3 to i32
%5 = sdiv i32 %4, 8
%6 = load i32, ptr @AML_CAV_LUT_DATAL_WIDTH_SHIFT, align 4, !tbaa !11
%7 = shl i32 %5, %6
%8 = load i32, ptr @AML_CAV_LUT_DATAL_WIDTH_MASK, align 4, !tbaa !11
%9 = and i32 %7, %8
%10 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 1
%11 = load i64, ptr %10, align 8, !tbaa !13
%12 = trunc i64 %11 to i32
%13 = sdiv i32 %12, 8
%14 = or i32 %13, %9
%15 = load i32, ptr @AML_CAV_LUT_DATAL_REG, align 4, !tbaa !11
%16 = tail call i32 @CAV_WRITE_4(ptr noundef %0, i32 noundef %15, i32 noundef %14) #2
%17 = load i32, ptr @AML_CAV_LUT_DATAL_WIDTH_WIDTH, align 4, !tbaa !11
%18 = ashr i32 %5, %17
%19 = load i32, ptr @AML_CAV_LUT_DATAH_WIDTH_SHIFT, align 4, !tbaa !11
%20 = shl i32 %18, %19
%21 = load i32, ptr @AML_CAV_LUT_DATAH_WIDTH_MASK, align 4, !tbaa !11
%22 = and i32 %20, %21
%23 = load i64, ptr %0, align 8, !tbaa !14
%24 = trunc i64 %23 to i32
%25 = load i32, ptr @AML_CAV_LUT_DATAH_HEIGHT_SHIFT, align 4, !tbaa !11
%26 = shl i32 %24, %25
%27 = load i32, ptr @AML_CAV_LUT_DATAH_HEIGHT_MASK, align 4, !tbaa !11
%28 = and i32 %26, %27
%29 = or i32 %28, %22
%30 = load i32, ptr @AML_CAV_LUT_DATAH_BLKMODE_LINEAR, align 4, !tbaa !11
%31 = or i32 %29, %30
%32 = load i32, ptr @AML_CAV_LUT_DATAH_REG, align 4, !tbaa !11
%33 = tail call i32 @CAV_WRITE_4(ptr noundef nonnull %0, i32 noundef %32, i32 noundef %31) #2
%34 = load i32, ptr @AML_CAV_LUT_ADDR_REG, align 4, !tbaa !11
%35 = load i32, ptr @AML_CAV_LUT_ADDR_WR_EN, align 4, !tbaa !11
%36 = load i32, ptr @AML_CAV_OSD1_INDEX, align 4, !tbaa !11
%37 = load i32, ptr @AML_CAV_LUT_ADDR_INDEX_SHIFT, align 4, !tbaa !11
%38 = shl i32 %36, %37
%39 = or i32 %38, %35
%40 = tail call i32 @CAV_WRITE_4(ptr noundef nonnull %0, i32 noundef %34, i32 noundef %39) #2
%41 = load i32, ptr @AML_CAV_LUT_ADDR_REG, align 4, !tbaa !11
%42 = tail call i32 @CAV_BARRIER(ptr noundef nonnull %0, i32 noundef %41) #2
ret void
}
declare i32 @CAV_WRITE_4(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @CAV_BARRIER(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 16}
!6 = !{!"aml8726_fb_softc", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0, !8, i64 8, !8, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!6, !8, i64 8}
!14 = !{!6, !8, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sys/arm/amlogic/aml8726/extr_aml8726_fb.c_aml8726_fb_cfg_canvas.c'
source_filename = "AnghaBench/freebsd/sys/arm/amlogic/aml8726/extr_aml8726_fb.c_aml8726_fb_cfg_canvas.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AML_CAV_LUT_DATAL_WIDTH_SHIFT = common local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAL_WIDTH_MASK = common local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAL_REG = common local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAL_WIDTH_WIDTH = common local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAH_WIDTH_SHIFT = common local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAH_WIDTH_MASK = common local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAH_HEIGHT_SHIFT = common local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAH_HEIGHT_MASK = common local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAH_BLKMODE_LINEAR = common local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_DATAH_REG = common local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_ADDR_REG = common local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_ADDR_WR_EN = common local_unnamed_addr global i32 0, align 4
@AML_CAV_OSD1_INDEX = common local_unnamed_addr global i32 0, align 4
@AML_CAV_LUT_ADDR_INDEX_SHIFT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @aml8726_fb_cfg_canvas], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @aml8726_fb_cfg_canvas(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = trunc i64 %3 to i32
%5 = sdiv i32 %4, 8
%6 = load i32, ptr @AML_CAV_LUT_DATAL_WIDTH_SHIFT, align 4, !tbaa !12
%7 = shl i32 %5, %6
%8 = load i32, ptr @AML_CAV_LUT_DATAL_WIDTH_MASK, align 4, !tbaa !12
%9 = and i32 %7, %8
%10 = getelementptr inbounds i8, ptr %0, i64 8
%11 = load i64, ptr %10, align 8, !tbaa !14
%12 = trunc i64 %11 to i32
%13 = sdiv i32 %12, 8
%14 = or i32 %13, %9
%15 = load i32, ptr @AML_CAV_LUT_DATAL_REG, align 4, !tbaa !12
%16 = tail call i32 @CAV_WRITE_4(ptr noundef %0, i32 noundef %15, i32 noundef %14) #2
%17 = load i32, ptr @AML_CAV_LUT_DATAL_WIDTH_WIDTH, align 4, !tbaa !12
%18 = ashr i32 %5, %17
%19 = load i32, ptr @AML_CAV_LUT_DATAH_WIDTH_SHIFT, align 4, !tbaa !12
%20 = shl i32 %18, %19
%21 = load i32, ptr @AML_CAV_LUT_DATAH_WIDTH_MASK, align 4, !tbaa !12
%22 = and i32 %20, %21
%23 = load i64, ptr %0, align 8, !tbaa !15
%24 = trunc i64 %23 to i32
%25 = load i32, ptr @AML_CAV_LUT_DATAH_HEIGHT_SHIFT, align 4, !tbaa !12
%26 = shl i32 %24, %25
%27 = load i32, ptr @AML_CAV_LUT_DATAH_HEIGHT_MASK, align 4, !tbaa !12
%28 = and i32 %26, %27
%29 = or i32 %28, %22
%30 = load i32, ptr @AML_CAV_LUT_DATAH_BLKMODE_LINEAR, align 4, !tbaa !12
%31 = or i32 %29, %30
%32 = load i32, ptr @AML_CAV_LUT_DATAH_REG, align 4, !tbaa !12
%33 = tail call i32 @CAV_WRITE_4(ptr noundef nonnull %0, i32 noundef %32, i32 noundef %31) #2
%34 = load i32, ptr @AML_CAV_LUT_ADDR_REG, align 4, !tbaa !12
%35 = load i32, ptr @AML_CAV_LUT_ADDR_WR_EN, align 4, !tbaa !12
%36 = load i32, ptr @AML_CAV_OSD1_INDEX, align 4, !tbaa !12
%37 = load i32, ptr @AML_CAV_LUT_ADDR_INDEX_SHIFT, align 4, !tbaa !12
%38 = shl i32 %36, %37
%39 = or i32 %38, %35
%40 = tail call i32 @CAV_WRITE_4(ptr noundef nonnull %0, i32 noundef %34, i32 noundef %39) #2
%41 = load i32, ptr @AML_CAV_LUT_ADDR_REG, align 4, !tbaa !12
%42 = tail call i32 @CAV_BARRIER(ptr noundef nonnull %0, i32 noundef %41) #2
ret void
}
declare i32 @CAV_WRITE_4(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @CAV_BARRIER(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 16}
!7 = !{!"aml8726_fb_softc", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0, !9, i64 8, !9, i64 16}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !10, i64 0}
!14 = !{!7, !9, i64 8}
!15 = !{!7, !9, i64 0}
| freebsd_sys_arm_amlogic_aml8726_extr_aml8726_fb.c_aml8726_fb_cfg_canvas |
; ModuleID = 'AnghaBench/linux/arch/arm64/mm/extr_context.c_new_context.c'
source_filename = "AnghaBench/linux/arch/arm64/mm/extr_context.c_new_context.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@new_context.cur_idx = internal unnamed_addr global i32 1, align 4
@asid_generation = dso_local global i32 0, align 4
@ASID_MASK = dso_local local_unnamed_addr global i32 0, align 4
@asid_map = dso_local local_unnamed_addr global i32 0, align 4
@NUM_USER_ASIDS = dso_local local_unnamed_addr global i32 0, align 4
@ASID_FIRST_VERSION = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @new_context], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @new_context(ptr noundef %0) #0 {
%2 = tail call i32 @atomic64_read(ptr noundef %0) #2
%3 = tail call i32 @atomic64_read(ptr noundef nonnull @asid_generation) #2
%4 = icmp eq i32 %2, 0
br i1 %4, label %17, label %5
5: ; preds = %1
%6 = load i32, ptr @ASID_MASK, align 4, !tbaa !5
%7 = xor i32 %6, -1
%8 = and i32 %2, %7
%9 = or i32 %8, %3
%10 = tail call i64 @check_update_reserved_asid(i32 noundef %2, i32 noundef %9) #2
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %38
12: ; preds = %5
%13 = tail call i32 @asid2idx(i32 noundef %2) #2
%14 = load i32, ptr @asid_map, align 4, !tbaa !5
%15 = tail call i32 @__test_and_set_bit(i32 noundef %13, i32 noundef %14) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %38, label %17
17: ; preds = %12, %1
%18 = load i32, ptr @asid_map, align 4, !tbaa !5
%19 = load i32, ptr @NUM_USER_ASIDS, align 4, !tbaa !5
%20 = load i32, ptr @new_context.cur_idx, align 4, !tbaa !5
%21 = tail call i32 @find_next_zero_bit(i32 noundef %18, i32 noundef %19, i32 noundef %20) #2
%22 = load i32, ptr @NUM_USER_ASIDS, align 4, !tbaa !5
%23 = icmp eq i32 %21, %22
br i1 %23, label %24, label %31
24: ; preds = %17
%25 = load i32, ptr @ASID_FIRST_VERSION, align 4, !tbaa !5
%26 = tail call i32 @atomic64_add_return_relaxed(i32 noundef %25, ptr noundef nonnull @asid_generation) #2
%27 = tail call i32 (...) @flush_context() #2
%28 = load i32, ptr @asid_map, align 4, !tbaa !5
%29 = load i32, ptr @NUM_USER_ASIDS, align 4, !tbaa !5
%30 = tail call i32 @find_next_zero_bit(i32 noundef %28, i32 noundef %29, i32 noundef 1) #2
br label %31
31: ; preds = %17, %24
%32 = phi i32 [ %21, %17 ], [ %30, %24 ]
%33 = phi i32 [ %3, %17 ], [ %26, %24 ]
%34 = load i32, ptr @asid_map, align 4, !tbaa !5
%35 = tail call i32 @__set_bit(i32 noundef %32, i32 noundef %34) #2
store i32 %32, ptr @new_context.cur_idx, align 4, !tbaa !5
%36 = tail call i32 @idx2asid(i32 noundef %32) #2
%37 = or i32 %36, %33
br label %38
38: ; preds = %5, %12, %31
%39 = phi i32 [ %37, %31 ], [ %9, %12 ], [ %9, %5 ]
ret i32 %39
}
declare i32 @atomic64_read(ptr noundef) local_unnamed_addr #1
declare i64 @check_update_reserved_asid(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__test_and_set_bit(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @asid2idx(i32 noundef) local_unnamed_addr #1
declare i32 @find_next_zero_bit(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @atomic64_add_return_relaxed(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @flush_context(...) local_unnamed_addr #1
declare i32 @__set_bit(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @idx2asid(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/arch/arm64/mm/extr_context.c_new_context.c'
source_filename = "AnghaBench/linux/arch/arm64/mm/extr_context.c_new_context.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@new_context.cur_idx = internal unnamed_addr global i32 1, align 4
@asid_generation = common global i32 0, align 4
@ASID_MASK = common local_unnamed_addr global i32 0, align 4
@asid_map = common local_unnamed_addr global i32 0, align 4
@NUM_USER_ASIDS = common local_unnamed_addr global i32 0, align 4
@ASID_FIRST_VERSION = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @new_context], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @new_context(ptr noundef %0) #0 {
%2 = tail call i32 @atomic64_read(ptr noundef %0) #2
%3 = tail call i32 @atomic64_read(ptr noundef nonnull @asid_generation) #2
%4 = icmp eq i32 %2, 0
br i1 %4, label %17, label %5
5: ; preds = %1
%6 = load i32, ptr @ASID_MASK, align 4, !tbaa !6
%7 = xor i32 %6, -1
%8 = and i32 %2, %7
%9 = or i32 %8, %3
%10 = tail call i64 @check_update_reserved_asid(i32 noundef %2, i32 noundef %9) #2
%11 = icmp eq i64 %10, 0
br i1 %11, label %12, label %38
12: ; preds = %5
%13 = tail call i32 @asid2idx(i32 noundef %2) #2
%14 = load i32, ptr @asid_map, align 4, !tbaa !6
%15 = tail call i32 @__test_and_set_bit(i32 noundef %13, i32 noundef %14) #2
%16 = icmp eq i32 %15, 0
br i1 %16, label %38, label %17
17: ; preds = %12, %1
%18 = load i32, ptr @asid_map, align 4, !tbaa !6
%19 = load i32, ptr @NUM_USER_ASIDS, align 4, !tbaa !6
%20 = load i32, ptr @new_context.cur_idx, align 4, !tbaa !6
%21 = tail call i32 @find_next_zero_bit(i32 noundef %18, i32 noundef %19, i32 noundef %20) #2
%22 = load i32, ptr @NUM_USER_ASIDS, align 4, !tbaa !6
%23 = icmp eq i32 %21, %22
br i1 %23, label %24, label %31
24: ; preds = %17
%25 = load i32, ptr @ASID_FIRST_VERSION, align 4, !tbaa !6
%26 = tail call i32 @atomic64_add_return_relaxed(i32 noundef %25, ptr noundef nonnull @asid_generation) #2
%27 = tail call i32 @flush_context() #2
%28 = load i32, ptr @asid_map, align 4, !tbaa !6
%29 = load i32, ptr @NUM_USER_ASIDS, align 4, !tbaa !6
%30 = tail call i32 @find_next_zero_bit(i32 noundef %28, i32 noundef %29, i32 noundef 1) #2
br label %31
31: ; preds = %17, %24
%32 = phi i32 [ %21, %17 ], [ %30, %24 ]
%33 = phi i32 [ %3, %17 ], [ %26, %24 ]
%34 = load i32, ptr @asid_map, align 4, !tbaa !6
%35 = tail call i32 @__set_bit(i32 noundef %32, i32 noundef %34) #2
store i32 %32, ptr @new_context.cur_idx, align 4, !tbaa !6
%36 = tail call i32 @idx2asid(i32 noundef %32) #2
%37 = or i32 %36, %33
br label %38
38: ; preds = %5, %12, %31
%39 = phi i32 [ %37, %31 ], [ %9, %12 ], [ %9, %5 ]
ret i32 %39
}
declare i32 @atomic64_read(ptr noundef) local_unnamed_addr #1
declare i64 @check_update_reserved_asid(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__test_and_set_bit(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @asid2idx(i32 noundef) local_unnamed_addr #1
declare i32 @find_next_zero_bit(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @atomic64_add_return_relaxed(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @flush_context(...) local_unnamed_addr #1
declare i32 @__set_bit(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @idx2asid(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_arch_arm64_mm_extr_context.c_new_context |
; ModuleID = 'AnghaBench/linux/drivers/media/usb/cx231xx/extr_cx231xx-cards.c_cx231xx_media_device_init.c'
source_filename = "AnghaBench/linux/drivers/media/usb/cx231xx/extr_cx231xx-cards.c_cx231xx_media_device_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cx231xx_media_device_init], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @cx231xx_media_device_init(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/media/usb/cx231xx/extr_cx231xx-cards.c_cx231xx_media_device_init.c'
source_filename = "AnghaBench/linux/drivers/media/usb/cx231xx/extr_cx231xx-cards.c_cx231xx_media_device_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cx231xx_media_device_init], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @cx231xx_media_device_init(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_media_usb_cx231xx_extr_cx231xx-cards.c_cx231xx_media_device_init |
; ModuleID = 'AnghaBench/reactos/dll/win32/dbghelp/extr_dwarf.c_dwarf2_debug_di.c'
source_filename = "AnghaBench/reactos/dll/win32/dbghelp/extr_dwarf.c_dwarf2_debug_di.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32 }
@.str = private unnamed_addr constant [30 x i8] c"debug_info(abbrev:%p,symt:%p)\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @dwarf2_debug_di], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @dwarf2_debug_di(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds %struct.TYPE_3__, ptr %0, i64 0, i32 1
%3 = load i32, ptr %2, align 4, !tbaa !5
%4 = load i32, ptr %0, align 4, !tbaa !10
%5 = tail call ptr @wine_dbg_sprintf(ptr noundef nonnull @.str, i32 noundef %3, i32 noundef %4) #2
ret ptr %5
}
declare ptr @wine_dbg_sprintf(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"TYPE_3__", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/reactos/dll/win32/dbghelp/extr_dwarf.c_dwarf2_debug_di.c'
source_filename = "AnghaBench/reactos/dll/win32/dbghelp/extr_dwarf.c_dwarf2_debug_di.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [30 x i8] c"debug_info(abbrev:%p,symt:%p)\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @dwarf2_debug_di], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @dwarf2_debug_di(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = load i32, ptr %2, align 4, !tbaa !6
%4 = load i32, ptr %0, align 4, !tbaa !11
%5 = tail call ptr @wine_dbg_sprintf(ptr noundef nonnull @.str, i32 noundef %3, i32 noundef %4) #2
ret ptr %5
}
declare ptr @wine_dbg_sprintf(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 0}
| reactos_dll_win32_dbghelp_extr_dwarf.c_dwarf2_debug_di |
; ModuleID = 'AnghaBench/freebsd/sys/dev/usb/wlan/extr_if_rsu.c_rsu_key_delete.c'
source_filename = "AnghaBench/freebsd/sys/dev/usb/wlan/extr_if_rsu.c_rsu_key_delete.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @rsu_key_delete], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @rsu_key_delete(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @rsu_process_key(ptr noundef %0, ptr noundef %1, i32 noundef 0) #2
ret i32 %3
}
declare i32 @rsu_process_key(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/usb/wlan/extr_if_rsu.c_rsu_key_delete.c'
source_filename = "AnghaBench/freebsd/sys/dev/usb/wlan/extr_if_rsu.c_rsu_key_delete.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @rsu_key_delete], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @rsu_key_delete(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @rsu_process_key(ptr noundef %0, ptr noundef %1, i32 noundef 0) #2
ret i32 %3
}
declare i32 @rsu_process_key(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| freebsd_sys_dev_usb_wlan_extr_if_rsu.c_rsu_key_delete |
; ModuleID = 'AnghaBench/openssl/crypto/ui/extr_ui_lib.c_print_error.c'
source_filename = "AnghaBench/openssl/crypto/ui/extr_ui_lib.c_print_error.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_9__ = type { ptr, i32 }
@UIT_ERROR = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @print_error], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @print_error(ptr noundef %0, i64 %1, ptr noundef %2) #0 {
%4 = alloca %struct.TYPE_9__, align 8
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
%5 = call i32 @memset(ptr noundef nonnull %4, i32 noundef 0, i32 noundef 16) #3
%6 = load i32, ptr @UIT_ERROR, align 4, !tbaa !5
%7 = getelementptr inbounds %struct.TYPE_9__, ptr %4, i64 0, i32 1
store i32 %6, ptr %7, align 8, !tbaa !9
store ptr %0, ptr %4, align 8, !tbaa !12
%8 = load ptr, ptr %2, align 8, !tbaa !13
%9 = load ptr, ptr %8, align 8, !tbaa !15
%10 = icmp eq ptr %9, null
br i1 %10, label %14, label %11
11: ; preds = %3
%12 = call i64 %9(ptr noundef nonnull %2, ptr noundef nonnull %4) #3
%13 = icmp slt i64 %12, 1
br i1 %13, label %15, label %14
14: ; preds = %11, %3
br label %15
15: ; preds = %11, %14
%16 = phi i32 [ 0, %14 ], [ -1, %11 ]
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
ret i32 %16
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 8}
!10 = !{!"TYPE_9__", !11, i64 0, !6, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"TYPE_10__", !11, i64 0}
!15 = !{!16, !11, i64 0}
!16 = !{!"TYPE_8__", !11, i64 0}
| ; ModuleID = 'AnghaBench/openssl/crypto/ui/extr_ui_lib.c_print_error.c'
source_filename = "AnghaBench/openssl/crypto/ui/extr_ui_lib.c_print_error.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_9__ = type { ptr, i32 }
@UIT_ERROR = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @print_error], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -1, 1) i32 @print_error(ptr noundef %0, i64 %1, ptr noundef %2) #0 {
%4 = alloca %struct.TYPE_9__, align 8
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #3
%5 = call i32 @memset(ptr noundef nonnull %4, i32 noundef 0, i32 noundef 16) #3
%6 = load i32, ptr @UIT_ERROR, align 4, !tbaa !6
%7 = getelementptr inbounds i8, ptr %4, i64 8
store i32 %6, ptr %7, align 8, !tbaa !10
store ptr %0, ptr %4, align 8, !tbaa !13
%8 = load ptr, ptr %2, align 8, !tbaa !14
%9 = load ptr, ptr %8, align 8, !tbaa !16
%10 = icmp eq ptr %9, null
br i1 %10, label %14, label %11
11: ; preds = %3
%12 = call i64 %9(ptr noundef nonnull %2, ptr noundef nonnull %4) #3
%13 = icmp slt i64 %12, 1
br i1 %13, label %15, label %14
14: ; preds = %11, %3
br label %15
15: ; preds = %11, %14
%16 = phi i32 [ 0, %14 ], [ -1, %11 ]
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #3
ret i32 %16
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 8}
!11 = !{!"TYPE_9__", !12, i64 0, !7, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 0}
!14 = !{!15, !12, i64 0}
!15 = !{!"TYPE_10__", !12, i64 0}
!16 = !{!17, !12, i64 0}
!17 = !{!"TYPE_8__", !12, i64 0}
| openssl_crypto_ui_extr_ui_lib.c_print_error |
; ModuleID = 'AnghaBench/linux/drivers/md/extr_dm-linear.c_linear_dtr.c'
source_filename = "AnghaBench/linux/drivers/md/extr_dm-linear.c_linear_dtr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @linear_dtr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @linear_dtr(ptr noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = inttoptr i64 %2 to ptr
%4 = load i32, ptr %3, align 4, !tbaa !10
%5 = tail call i32 @dm_put_device(ptr noundef nonnull %0, i32 noundef %4) #2
%6 = tail call i32 @kfree(ptr noundef nonnull %3) #2
ret void
}
declare i32 @dm_put_device(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"dm_target", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"linear_c", !12, i64 0}
!12 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/md/extr_dm-linear.c_linear_dtr.c'
source_filename = "AnghaBench/linux/drivers/md/extr_dm-linear.c_linear_dtr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @linear_dtr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @linear_dtr(ptr noundef %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = inttoptr i64 %2 to ptr
%4 = load i32, ptr %3, align 4, !tbaa !11
%5 = tail call i32 @dm_put_device(ptr noundef nonnull %0, i32 noundef %4) #2
%6 = tail call i32 @kfree(ptr noundef nonnull %3) #2
ret void
}
declare i32 @dm_put_device(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @kfree(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"dm_target", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"linear_c", !13, i64 0}
!13 = !{!"int", !9, i64 0}
| linux_drivers_md_extr_dm-linear.c_linear_dtr |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/m32r/platforms/opsput/extr_io.c__ne_outb.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/m32r/platforms/opsput/extr_io.c__ne_outb.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @_ne_outb], section "llvm.metadata"
; Function Attrs: inlinehint nofree norecurse nounwind memory(argmem: readwrite, inaccessiblemem: readwrite) uwtable
define internal void @_ne_outb(i8 noundef zeroext %0, ptr noundef %1) #0 {
store volatile i8 %0, ptr %1, align 1, !tbaa !5
ret void
}
attributes #0 = { inlinehint nofree norecurse nounwind memory(argmem: readwrite, inaccessiblemem: readwrite) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/m32r/platforms/opsput/extr_io.c__ne_outb.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/m32r/platforms/opsput/extr_io.c__ne_outb.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @_ne_outb], section "llvm.metadata"
; Function Attrs: inlinehint nofree norecurse nounwind ssp memory(argmem: readwrite, inaccessiblemem: readwrite) uwtable(sync)
define internal void @_ne_outb(i8 noundef zeroext %0, ptr noundef %1) #0 {
store volatile i8 %0, ptr %1, align 1, !tbaa !6
ret void
}
attributes #0 = { inlinehint nofree norecurse nounwind ssp memory(argmem: readwrite, inaccessiblemem: readwrite) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_arch_m32r_platforms_opsput_extr_io.c__ne_outb |
; ModuleID = 'AnghaBench/darwin-xnu/bsd/net/extr_bpf.c_bpf_copydata.c'
source_filename = "AnghaBench/darwin-xnu/bsd/net/extr_bpf.c_bpf_copydata.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bpf_packet = type { i64, i32 }
@BPF_PACKET_TYPE_MBUF = dso_local local_unnamed_addr global i64 0, align 8
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @bpf_copydata], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @bpf_copydata(ptr nocapture noundef readonly %0, i64 noundef %1, i64 noundef %2, ptr noundef %3) #0 {
%5 = load i64, ptr %0, align 8, !tbaa !5
%6 = load i64, ptr @BPF_PACKET_TYPE_MBUF, align 8, !tbaa !11
%7 = icmp eq i64 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %4
%9 = getelementptr inbounds %struct.bpf_packet, ptr %0, i64 0, i32 1
%10 = load i32, ptr %9, align 8, !tbaa !12
%11 = tail call i32 @mbuf_copydata(i32 noundef %10, i64 noundef %1, i64 noundef %2, ptr noundef %3) #2
br label %14
12: ; preds = %4
%13 = load i32, ptr @EINVAL, align 4, !tbaa !13
br label %14
14: ; preds = %12, %8
%15 = phi i32 [ %11, %8 ], [ %13, %12 ]
ret i32 %15
}
declare i32 @mbuf_copydata(i32 noundef, i64 noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"bpf_packet", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!6, !10, i64 8}
!13 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/darwin-xnu/bsd/net/extr_bpf.c_bpf_copydata.c'
source_filename = "AnghaBench/darwin-xnu/bsd/net/extr_bpf.c_bpf_copydata.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BPF_PACKET_TYPE_MBUF = common local_unnamed_addr global i64 0, align 8
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @bpf_copydata], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @bpf_copydata(ptr nocapture noundef readonly %0, i64 noundef %1, i64 noundef %2, ptr noundef %3) #0 {
%5 = load i64, ptr %0, align 8, !tbaa !6
%6 = load i64, ptr @BPF_PACKET_TYPE_MBUF, align 8, !tbaa !12
%7 = icmp eq i64 %5, %6
br i1 %7, label %8, label %12
8: ; preds = %4
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = load i32, ptr %9, align 8, !tbaa !13
%11 = tail call i32 @mbuf_copydata(i32 noundef %10, i64 noundef %1, i64 noundef %2, ptr noundef %3) #2
br label %14
12: ; preds = %4
%13 = load i32, ptr @EINVAL, align 4, !tbaa !14
br label %14
14: ; preds = %12, %8
%15 = phi i32 [ %11, %8 ], [ %13, %12 ]
ret i32 %15
}
declare i32 @mbuf_copydata(i32 noundef, i64 noundef, i64 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"bpf_packet", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!7, !11, i64 8}
!14 = !{!11, !11, i64 0}
| darwin-xnu_bsd_net_extr_bpf.c_bpf_copydata |
; ModuleID = 'AnghaBench/Quake-III-Arena/code/cgame/extr_cg_newdraw.c_CG_RunMenuScript.c'
source_filename = "AnghaBench/Quake-III-Arena/code/cgame/extr_cg_newdraw.c_CG_RunMenuScript.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local void @CG_RunMenuScript(ptr nocapture noundef readnone %0) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/Quake-III-Arena/code/cgame/extr_cg_newdraw.c_CG_RunMenuScript.c'
source_filename = "AnghaBench/Quake-III-Arena/code/cgame/extr_cg_newdraw.c_CG_RunMenuScript.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @CG_RunMenuScript(ptr nocapture noundef readnone %0) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| Quake-III-Arena_code_cgame_extr_cg_newdraw.c_CG_RunMenuScript |
; ModuleID = 'AnghaBench/darwin-xnu/osfmk/device/extr_subrs.c___memset_chk.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/device/extr_subrs.c___memset_chk.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [65 x i8] c"__memset_chk object size check failed: dst %p, c %c, (%zu < %zu)\00", align 1
; Function Attrs: nounwind uwtable
define dso_local noundef ptr @__memset_chk(ptr noundef returned %0, i32 noundef %1, i64 noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = icmp ult i64 %3, %2
%6 = zext i1 %5 to i32
%7 = tail call i64 @__improbable(i32 noundef %6) #3
%8 = icmp eq i64 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %4
%10 = tail call i32 @panic(ptr noundef nonnull @.str, ptr noundef %0, i32 noundef %1, i64 noundef %3, i64 noundef %2) #3
br label %11
11: ; preds = %9, %4
%12 = trunc i32 %1 to i8
tail call void @llvm.memset.p0.i64(ptr align 1 %0, i8 %12, i64 %2, i1 false)
ret ptr %0
}
declare i64 @__improbable(i32 noundef) local_unnamed_addr #1
declare i32 @panic(ptr noundef, ptr noundef, i32 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/darwin-xnu/osfmk/device/extr_subrs.c___memset_chk.c'
source_filename = "AnghaBench/darwin-xnu/osfmk/device/extr_subrs.c___memset_chk.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [65 x i8] c"__memset_chk object size check failed: dst %p, c %c, (%zu < %zu)\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define noundef ptr @__memset_chk(ptr noundef returned %0, i32 noundef %1, i64 noundef %2, i64 noundef %3) local_unnamed_addr #0 {
%5 = icmp ult i64 %3, %2
%6 = zext i1 %5 to i32
%7 = tail call i64 @__improbable(i32 noundef %6) #3
%8 = icmp eq i64 %7, 0
br i1 %8, label %11, label %9
9: ; preds = %4
%10 = tail call i32 @panic(ptr noundef nonnull @.str, ptr noundef %0, i32 noundef %1, i64 noundef %3, i64 noundef %2) #3
br label %11
11: ; preds = %9, %4
%12 = trunc i32 %1 to i8
tail call void @llvm.memset.p0.i64(ptr align 1 %0, i8 %12, i64 %2, i1 false)
ret ptr %0
}
declare i64 @__improbable(i32 noundef) local_unnamed_addr #1
declare i32 @panic(ptr noundef, ptr noundef, i32 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| darwin-xnu_osfmk_device_extr_subrs.c___memset_chk |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mach-omap1/extr_mailbox.c_omap1_mbox_fifo_read.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mach-omap1/extr_mailbox.c_omap1_mbox_fifo_read.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.omap_mbox1_fifo = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @omap1_mbox_fifo_read], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @omap1_mbox_fifo_read(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = inttoptr i64 %2 to ptr
%4 = getelementptr inbounds %struct.omap_mbox1_fifo, ptr %3, i64 0, i32 1
%5 = load i32, ptr %4, align 4, !tbaa !10
%6 = tail call i32 @mbox_read_reg(i32 noundef %5) #2
%7 = load i32, ptr %3, align 4, !tbaa !13
%8 = tail call i32 @mbox_read_reg(i32 noundef %7) #2
%9 = shl i32 %8, 16
%10 = or i32 %9, %6
ret i32 %10
}
declare i32 @mbox_read_reg(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"omap_mbox", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 4}
!11 = !{!"omap_mbox1_fifo", !12, i64 0, !12, i64 4}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !12, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/mach-omap1/extr_mailbox.c_omap1_mbox_fifo_read.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/mach-omap1/extr_mailbox.c_omap1_mbox_fifo_read.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @omap1_mbox_fifo_read], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @omap1_mbox_fifo_read(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = inttoptr i64 %2 to ptr
%4 = getelementptr inbounds i8, ptr %3, i64 4
%5 = load i32, ptr %4, align 4, !tbaa !11
%6 = tail call i32 @mbox_read_reg(i32 noundef %5) #2
%7 = load i32, ptr %3, align 4, !tbaa !14
%8 = tail call i32 @mbox_read_reg(i32 noundef %7) #2
%9 = shl i32 %8, 16
%10 = or i32 %9, %6
ret i32 %10
}
declare i32 @mbox_read_reg(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"omap_mbox", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 4}
!12 = !{!"omap_mbox1_fifo", !13, i64 0, !13, i64 4}
!13 = !{!"int", !9, i64 0}
!14 = !{!12, !13, i64 0}
| fastsocket_kernel_arch_arm_mach-omap1_extr_mailbox.c_omap1_mbox_fifo_read |
; ModuleID = 'AnghaBench/linux/drivers/perf/extr_arm-ccn.c_arm_ccn_pmu_disable.c'
source_filename = "AnghaBench/linux/drivers/perf/extr_arm-ccn.c_arm_ccn_pmu_disable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@CCN_DT_PMCR = dso_local local_unnamed_addr global i64 0, align 8
@CCN_DT_PMCR__PMU_EN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @arm_ccn_pmu_disable], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @arm_ccn_pmu_disable(ptr noundef %0) #0 {
%2 = tail call ptr @pmu_to_arm_ccn(ptr noundef %0) #2
%3 = load i64, ptr %2, align 8, !tbaa !5
%4 = load i64, ptr @CCN_DT_PMCR, align 8, !tbaa !11
%5 = add nsw i64 %4, %3
%6 = tail call i32 @readl(i64 noundef %5) #2
%7 = load i32, ptr @CCN_DT_PMCR__PMU_EN, align 4, !tbaa !12
%8 = xor i32 %7, -1
%9 = and i32 %6, %8
%10 = load i64, ptr %2, align 8, !tbaa !5
%11 = load i64, ptr @CCN_DT_PMCR, align 8, !tbaa !11
%12 = add nsw i64 %11, %10
%13 = tail call i32 @writel(i32 noundef %9, i64 noundef %12) #2
ret void
}
declare ptr @pmu_to_arm_ccn(ptr noundef) local_unnamed_addr #1
declare i32 @readl(i64 noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"arm_ccn", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !9, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/perf/extr_arm-ccn.c_arm_ccn_pmu_disable.c'
source_filename = "AnghaBench/linux/drivers/perf/extr_arm-ccn.c_arm_ccn_pmu_disable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CCN_DT_PMCR = common local_unnamed_addr global i64 0, align 8
@CCN_DT_PMCR__PMU_EN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @arm_ccn_pmu_disable], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @arm_ccn_pmu_disable(ptr noundef %0) #0 {
%2 = tail call ptr @pmu_to_arm_ccn(ptr noundef %0) #2
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = load i64, ptr @CCN_DT_PMCR, align 8, !tbaa !12
%5 = add nsw i64 %4, %3
%6 = tail call i32 @readl(i64 noundef %5) #2
%7 = load i32, ptr @CCN_DT_PMCR__PMU_EN, align 4, !tbaa !13
%8 = xor i32 %7, -1
%9 = and i32 %6, %8
%10 = load i64, ptr %2, align 8, !tbaa !6
%11 = load i64, ptr @CCN_DT_PMCR, align 8, !tbaa !12
%12 = add nsw i64 %11, %10
%13 = tail call i32 @writel(i32 noundef %9, i64 noundef %12) #2
ret void
}
declare ptr @pmu_to_arm_ccn(ptr noundef) local_unnamed_addr #1
declare i32 @readl(i64 noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"arm_ccn", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0}
!9 = !{!"long", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!9, !9, i64 0}
!13 = !{!14, !14, i64 0}
!14 = !{!"int", !10, i64 0}
| linux_drivers_perf_extr_arm-ccn.c_arm_ccn_pmu_disable |
; ModuleID = 'AnghaBench/numpy/numpy/random/src/pcg64/extr_pcg64.orig.h_pcg_unique_64_rxs_m_xs_64_boundedrand_r.c'
source_filename = "AnghaBench/numpy/numpy/random/src/pcg64/extr_pcg64.orig.h_pcg_unique_64_rxs_m_xs_64_boundedrand_r.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/numpy/numpy/random/src/pcg64/extr_pcg64.orig.h_pcg_unique_64_rxs_m_xs_64_boundedrand_r.c'
source_filename = "AnghaBench/numpy/numpy/random/src/pcg64/extr_pcg64.orig.h_pcg_unique_64_rxs_m_xs_64_boundedrand_r.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| numpy_numpy_random_src_pcg64_extr_pcg64.orig.h_pcg_unique_64_rxs_m_xs_64_boundedrand_r |
; ModuleID = 'AnghaBench/capstone/arch/M68K/extr_M68KDisassembler.c_d68020_trapcc_0.c'
source_filename = "AnghaBench/capstone/arch/M68K/extr_M68KDisassembler.c_d68020_trapcc_0.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@M68020_PLUS = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @d68020_trapcc_0], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @d68020_trapcc_0(ptr noundef %0) #0 {
%2 = load i32, ptr @M68020_PLUS, align 4, !tbaa !5
%3 = tail call i32 @LIMIT_CPU_TYPES(ptr noundef %0, i32 noundef %2) #2
%4 = tail call i32 @build_trap(ptr noundef %0, i32 noundef 0, i32 noundef 0) #2
store i64 0, ptr %0, align 8, !tbaa !9
ret void
}
declare i32 @LIMIT_CPU_TYPES(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @build_trap(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 0}
!10 = !{!"TYPE_7__", !11, i64 0}
!11 = !{!"TYPE_6__", !12, i64 0}
!12 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/capstone/arch/M68K/extr_M68KDisassembler.c_d68020_trapcc_0.c'
source_filename = "AnghaBench/capstone/arch/M68K/extr_M68KDisassembler.c_d68020_trapcc_0.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@M68020_PLUS = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @d68020_trapcc_0], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @d68020_trapcc_0(ptr noundef %0) #0 {
%2 = load i32, ptr @M68020_PLUS, align 4, !tbaa !6
%3 = tail call i32 @LIMIT_CPU_TYPES(ptr noundef %0, i32 noundef %2) #2
%4 = tail call i32 @build_trap(ptr noundef %0, i32 noundef 0, i32 noundef 0) #2
store i64 0, ptr %0, align 8, !tbaa !10
ret void
}
declare i32 @LIMIT_CPU_TYPES(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @build_trap(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 0}
!11 = !{!"TYPE_7__", !12, i64 0}
!12 = !{!"TYPE_6__", !13, i64 0}
!13 = !{!"long", !8, i64 0}
| capstone_arch_M68K_extr_M68KDisassembler.c_d68020_trapcc_0 |
; ModuleID = 'AnghaBench/HandBrake/libhb/extr_muxcommon.c_hb_bitvec_cmp.c'
source_filename = "AnghaBench/HandBrake/libhb/extr_muxcommon.c_hb_bitvec_cmp.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_4__ = type { i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @hb_bitvec_cmp], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable
define internal noundef i32 @hb_bitvec_cmp(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr %0, align 8, !tbaa !5
%4 = load i32, ptr %1, align 8, !tbaa !5
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %26
6: ; preds = %2
%7 = add nsw i32 %3, 31
%8 = ashr i32 %7, 5
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %26
10: ; preds = %6
%11 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 1
%12 = load ptr, ptr %11, align 8, !tbaa !11
%13 = getelementptr inbounds %struct.TYPE_4__, ptr %1, i64 0, i32 1
%14 = load ptr, ptr %13, align 8, !tbaa !11
%15 = zext nneg i32 %8 to i64
br label %19
16: ; preds = %19
%17 = add nuw nsw i64 %20, 1
%18 = icmp eq i64 %17, %15
br i1 %18, label %26, label %19, !llvm.loop !12
19: ; preds = %10, %16
%20 = phi i64 [ 0, %10 ], [ %17, %16 ]
%21 = getelementptr inbounds i64, ptr %12, i64 %20
%22 = load i64, ptr %21, align 8, !tbaa !14
%23 = getelementptr inbounds i64, ptr %14, i64 %20
%24 = load i64, ptr %23, align 8, !tbaa !14
%25 = icmp eq i64 %22, %24
br i1 %25, label %16, label %26
26: ; preds = %16, %19, %6, %2
%27 = phi i32 [ 0, %2 ], [ 1, %6 ], [ 1, %16 ], [ 0, %19 ]
ret i32 %27
}
attributes #0 = { nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!15, !15, i64 0}
!15 = !{!"long", !8, i64 0}
| ; ModuleID = 'AnghaBench/HandBrake/libhb/extr_muxcommon.c_hb_bitvec_cmp.c'
source_filename = "AnghaBench/HandBrake/libhb/extr_muxcommon.c_hb_bitvec_cmp.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @hb_bitvec_cmp], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal range(i32 0, 2) i32 @hb_bitvec_cmp(ptr nocapture noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr %0, align 8, !tbaa !6
%4 = load i32, ptr %1, align 8, !tbaa !6
%5 = icmp eq i32 %3, %4
br i1 %5, label %6, label %26
6: ; preds = %2
%7 = add nsw i32 %3, 31
%8 = ashr i32 %7, 5
%9 = icmp sgt i32 %8, 0
br i1 %9, label %10, label %26
10: ; preds = %6
%11 = getelementptr inbounds i8, ptr %0, i64 8
%12 = load ptr, ptr %11, align 8, !tbaa !12
%13 = getelementptr inbounds i8, ptr %1, i64 8
%14 = load ptr, ptr %13, align 8, !tbaa !12
%15 = zext nneg i32 %8 to i64
br label %19
16: ; preds = %19
%17 = add nuw nsw i64 %20, 1
%18 = icmp eq i64 %17, %15
br i1 %18, label %26, label %19, !llvm.loop !13
19: ; preds = %10, %16
%20 = phi i64 [ 0, %10 ], [ %17, %16 ]
%21 = getelementptr inbounds i64, ptr %12, i64 %20
%22 = load i64, ptr %21, align 8, !tbaa !15
%23 = getelementptr inbounds i64, ptr %14, i64 %20
%24 = load i64, ptr %23, align 8, !tbaa !15
%25 = icmp eq i64 %22, %24
br i1 %25, label %16, label %26
26: ; preds = %16, %19, %6, %2
%27 = phi i32 [ 0, %2 ], [ 1, %6 ], [ 1, %16 ], [ 0, %19 ]
ret i32 %27
}
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!16, !16, i64 0}
!16 = !{!"long", !9, i64 0}
| HandBrake_libhb_extr_muxcommon.c_hb_bitvec_cmp |
; ModuleID = 'AnghaBench/postgres/src/backend/utils/adt/extr_pg_locale.c_free_struct_lconv.c'
source_filename = "AnghaBench/postgres/src/backend/utils/adt/extr_pg_locale.c_free_struct_lconv.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.lconv = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @free_struct_lconv], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @free_struct_lconv(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds %struct.lconv, ptr %0, i64 0, i32 9
%3 = load i64, ptr %2, align 8, !tbaa !5
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 @free(i64 noundef %3) #2
br label %7
7: ; preds = %5, %1
%8 = getelementptr inbounds %struct.lconv, ptr %0, i64 0, i32 8
%9 = load i64, ptr %8, align 8, !tbaa !10
%10 = icmp eq i64 %9, 0
br i1 %10, label %13, label %11
11: ; preds = %7
%12 = tail call i32 @free(i64 noundef %9) #2
br label %13
13: ; preds = %11, %7
%14 = getelementptr inbounds %struct.lconv, ptr %0, i64 0, i32 7
%15 = load i64, ptr %14, align 8, !tbaa !11
%16 = icmp eq i64 %15, 0
br i1 %16, label %19, label %17
17: ; preds = %13
%18 = tail call i32 @free(i64 noundef %15) #2
br label %19
19: ; preds = %17, %13
%20 = getelementptr inbounds %struct.lconv, ptr %0, i64 0, i32 6
%21 = load i64, ptr %20, align 8, !tbaa !12
%22 = icmp eq i64 %21, 0
br i1 %22, label %25, label %23
23: ; preds = %19
%24 = tail call i32 @free(i64 noundef %21) #2
br label %25
25: ; preds = %23, %19
%26 = getelementptr inbounds %struct.lconv, ptr %0, i64 0, i32 5
%27 = load i64, ptr %26, align 8, !tbaa !13
%28 = icmp eq i64 %27, 0
br i1 %28, label %31, label %29
29: ; preds = %25
%30 = tail call i32 @free(i64 noundef %27) #2
br label %31
31: ; preds = %29, %25
%32 = getelementptr inbounds %struct.lconv, ptr %0, i64 0, i32 4
%33 = load i64, ptr %32, align 8, !tbaa !14
%34 = icmp eq i64 %33, 0
br i1 %34, label %37, label %35
35: ; preds = %31
%36 = tail call i32 @free(i64 noundef %33) #2
br label %37
37: ; preds = %35, %31
%38 = getelementptr inbounds %struct.lconv, ptr %0, i64 0, i32 3
%39 = load i64, ptr %38, align 8, !tbaa !15
%40 = icmp eq i64 %39, 0
br i1 %40, label %43, label %41
41: ; preds = %37
%42 = tail call i32 @free(i64 noundef %39) #2
br label %43
43: ; preds = %41, %37
%44 = getelementptr inbounds %struct.lconv, ptr %0, i64 0, i32 2
%45 = load i64, ptr %44, align 8, !tbaa !16
%46 = icmp eq i64 %45, 0
br i1 %46, label %49, label %47
47: ; preds = %43
%48 = tail call i32 @free(i64 noundef %45) #2
br label %49
49: ; preds = %47, %43
%50 = getelementptr inbounds %struct.lconv, ptr %0, i64 0, i32 1
%51 = load i64, ptr %50, align 8, !tbaa !17
%52 = icmp eq i64 %51, 0
br i1 %52, label %55, label %53
53: ; preds = %49
%54 = tail call i32 @free(i64 noundef %51) #2
br label %55
55: ; preds = %53, %49
%56 = load i64, ptr %0, align 8, !tbaa !18
%57 = icmp eq i64 %56, 0
br i1 %57, label %60, label %58
58: ; preds = %55
%59 = tail call i32 @free(i64 noundef %56) #2
br label %60
60: ; preds = %58, %55
ret void
}
declare i32 @free(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 72}
!6 = !{!"lconv", !7, i64 0, !7, i64 8, !7, i64 16, !7, i64 24, !7, i64 32, !7, i64 40, !7, i64 48, !7, i64 56, !7, i64 64, !7, i64 72}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 64}
!11 = !{!6, !7, i64 56}
!12 = !{!6, !7, i64 48}
!13 = !{!6, !7, i64 40}
!14 = !{!6, !7, i64 32}
!15 = !{!6, !7, i64 24}
!16 = !{!6, !7, i64 16}
!17 = !{!6, !7, i64 8}
!18 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/postgres/src/backend/utils/adt/extr_pg_locale.c_free_struct_lconv.c'
source_filename = "AnghaBench/postgres/src/backend/utils/adt/extr_pg_locale.c_free_struct_lconv.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @free_struct_lconv], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @free_struct_lconv(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 72
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = tail call i32 @free(i64 noundef %3) #2
br label %7
7: ; preds = %5, %1
%8 = getelementptr inbounds i8, ptr %0, i64 64
%9 = load i64, ptr %8, align 8, !tbaa !11
%10 = icmp eq i64 %9, 0
br i1 %10, label %13, label %11
11: ; preds = %7
%12 = tail call i32 @free(i64 noundef %9) #2
br label %13
13: ; preds = %11, %7
%14 = getelementptr inbounds i8, ptr %0, i64 56
%15 = load i64, ptr %14, align 8, !tbaa !12
%16 = icmp eq i64 %15, 0
br i1 %16, label %19, label %17
17: ; preds = %13
%18 = tail call i32 @free(i64 noundef %15) #2
br label %19
19: ; preds = %17, %13
%20 = getelementptr inbounds i8, ptr %0, i64 48
%21 = load i64, ptr %20, align 8, !tbaa !13
%22 = icmp eq i64 %21, 0
br i1 %22, label %25, label %23
23: ; preds = %19
%24 = tail call i32 @free(i64 noundef %21) #2
br label %25
25: ; preds = %23, %19
%26 = getelementptr inbounds i8, ptr %0, i64 40
%27 = load i64, ptr %26, align 8, !tbaa !14
%28 = icmp eq i64 %27, 0
br i1 %28, label %31, label %29
29: ; preds = %25
%30 = tail call i32 @free(i64 noundef %27) #2
br label %31
31: ; preds = %29, %25
%32 = getelementptr inbounds i8, ptr %0, i64 32
%33 = load i64, ptr %32, align 8, !tbaa !15
%34 = icmp eq i64 %33, 0
br i1 %34, label %37, label %35
35: ; preds = %31
%36 = tail call i32 @free(i64 noundef %33) #2
br label %37
37: ; preds = %35, %31
%38 = getelementptr inbounds i8, ptr %0, i64 24
%39 = load i64, ptr %38, align 8, !tbaa !16
%40 = icmp eq i64 %39, 0
br i1 %40, label %43, label %41
41: ; preds = %37
%42 = tail call i32 @free(i64 noundef %39) #2
br label %43
43: ; preds = %41, %37
%44 = getelementptr inbounds i8, ptr %0, i64 16
%45 = load i64, ptr %44, align 8, !tbaa !17
%46 = icmp eq i64 %45, 0
br i1 %46, label %49, label %47
47: ; preds = %43
%48 = tail call i32 @free(i64 noundef %45) #2
br label %49
49: ; preds = %47, %43
%50 = getelementptr inbounds i8, ptr %0, i64 8
%51 = load i64, ptr %50, align 8, !tbaa !18
%52 = icmp eq i64 %51, 0
br i1 %52, label %55, label %53
53: ; preds = %49
%54 = tail call i32 @free(i64 noundef %51) #2
br label %55
55: ; preds = %53, %49
%56 = load i64, ptr %0, align 8, !tbaa !19
%57 = icmp eq i64 %56, 0
br i1 %57, label %60, label %58
58: ; preds = %55
%59 = tail call i32 @free(i64 noundef %56) #2
br label %60
60: ; preds = %58, %55
ret void
}
declare i32 @free(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 72}
!7 = !{!"lconv", !8, i64 0, !8, i64 8, !8, i64 16, !8, i64 24, !8, i64 32, !8, i64 40, !8, i64 48, !8, i64 56, !8, i64 64, !8, i64 72}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 64}
!12 = !{!7, !8, i64 56}
!13 = !{!7, !8, i64 48}
!14 = !{!7, !8, i64 40}
!15 = !{!7, !8, i64 32}
!16 = !{!7, !8, i64 24}
!17 = !{!7, !8, i64 16}
!18 = !{!7, !8, i64 8}
!19 = !{!7, !8, i64 0}
| postgres_src_backend_utils_adt_extr_pg_locale.c_free_struct_lconv |
; ModuleID = 'AnghaBench/linux/drivers/spi/extr_spi-qup.c_spi_qup_prep_sg.c'
source_filename = "AnghaBench/linux/drivers/spi/extr_spi-qup.c_spi_qup_prep_sg.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.spi_master = type { ptr, ptr }
%struct.dma_async_tx_descriptor = type { ptr, i32 }
@DMA_PREP_INTERRUPT = dso_local local_unnamed_addr global i64 0, align 8
@DMA_PREP_FENCE = dso_local local_unnamed_addr global i64 0, align 8
@DMA_MEM_TO_DEV = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @spi_qup_prep_sg], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @spi_qup_prep_sg(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
%6 = tail call ptr @spi_master_get_devdata(ptr noundef %0) #2
%7 = load i64, ptr @DMA_PREP_INTERRUPT, align 8, !tbaa !5
%8 = load i64, ptr @DMA_PREP_FENCE, align 8, !tbaa !5
%9 = or i64 %8, %7
%10 = load i32, ptr @DMA_MEM_TO_DEV, align 4, !tbaa !9
%11 = icmp eq i32 %10, %3
%12 = getelementptr inbounds %struct.spi_master, ptr %0, i64 0, i32 1
%13 = select i1 %11, ptr %12, ptr %0
%14 = load ptr, ptr %13, align 8, !tbaa !11
%15 = tail call ptr @dmaengine_prep_slave_sg(ptr noundef %14, ptr noundef %1, i32 noundef %2, i32 noundef %3, i64 noundef %9) #2
%16 = tail call i64 @IS_ERR_OR_NULL(ptr noundef %15) #2
%17 = icmp eq i64 %16, 0
br i1 %17, label %25, label %18
18: ; preds = %5
%19 = icmp eq ptr %15, null
br i1 %19, label %22, label %20
20: ; preds = %18
%21 = tail call i32 @PTR_ERR(ptr noundef nonnull %15) #2
br label %29
22: ; preds = %18
%23 = load i32, ptr @EINVAL, align 4, !tbaa !9
%24 = sub nsw i32 0, %23
br label %29
25: ; preds = %5
%26 = getelementptr inbounds %struct.dma_async_tx_descriptor, ptr %15, i64 0, i32 1
store i32 %4, ptr %26, align 8, !tbaa !13
store ptr %6, ptr %15, align 8, !tbaa !15
%27 = tail call i32 @dmaengine_submit(ptr noundef nonnull %15) #2
%28 = tail call i32 @dma_submit_error(i32 noundef %27) #2
br label %29
29: ; preds = %20, %22, %25
%30 = phi i32 [ %28, %25 ], [ %21, %20 ], [ %24, %22 ]
ret i32 %30
}
declare ptr @spi_master_get_devdata(ptr noundef) local_unnamed_addr #1
declare ptr @dmaengine_prep_slave_sg(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @IS_ERR_OR_NULL(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @dmaengine_submit(ptr noundef) local_unnamed_addr #1
declare i32 @dma_submit_error(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"any pointer", !7, i64 0}
!13 = !{!14, !10, i64 8}
!14 = !{!"dma_async_tx_descriptor", !12, i64 0, !10, i64 8}
!15 = !{!14, !12, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/spi/extr_spi-qup.c_spi_qup_prep_sg.c'
source_filename = "AnghaBench/linux/drivers/spi/extr_spi-qup.c_spi_qup_prep_sg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DMA_PREP_INTERRUPT = common local_unnamed_addr global i64 0, align 8
@DMA_PREP_FENCE = common local_unnamed_addr global i64 0, align 8
@DMA_MEM_TO_DEV = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @spi_qup_prep_sg], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @spi_qup_prep_sg(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
%6 = tail call ptr @spi_master_get_devdata(ptr noundef %0) #2
%7 = load i64, ptr @DMA_PREP_INTERRUPT, align 8, !tbaa !6
%8 = load i64, ptr @DMA_PREP_FENCE, align 8, !tbaa !6
%9 = or i64 %8, %7
%10 = load i32, ptr @DMA_MEM_TO_DEV, align 4, !tbaa !10
%11 = icmp eq i32 %10, %3
%12 = select i1 %11, i64 8, i64 0
%13 = getelementptr inbounds i8, ptr %0, i64 %12
%14 = load ptr, ptr %13, align 8, !tbaa !12
%15 = tail call ptr @dmaengine_prep_slave_sg(ptr noundef %14, ptr noundef %1, i32 noundef %2, i32 noundef %3, i64 noundef %9) #2
%16 = tail call i64 @IS_ERR_OR_NULL(ptr noundef %15) #2
%17 = icmp eq i64 %16, 0
br i1 %17, label %25, label %18
18: ; preds = %5
%19 = icmp eq ptr %15, null
br i1 %19, label %22, label %20
20: ; preds = %18
%21 = tail call i32 @PTR_ERR(ptr noundef nonnull %15) #2
br label %29
22: ; preds = %18
%23 = load i32, ptr @EINVAL, align 4, !tbaa !10
%24 = sub nsw i32 0, %23
br label %29
25: ; preds = %5
%26 = getelementptr inbounds i8, ptr %15, i64 8
store i32 %4, ptr %26, align 8, !tbaa !14
store ptr %6, ptr %15, align 8, !tbaa !16
%27 = tail call i32 @dmaengine_submit(ptr noundef nonnull %15) #2
%28 = tail call i32 @dma_submit_error(i32 noundef %27) #2
br label %29
29: ; preds = %20, %22, %25
%30 = phi i32 [ %28, %25 ], [ %21, %20 ], [ %24, %22 ]
ret i32 %30
}
declare ptr @spi_master_get_devdata(ptr noundef) local_unnamed_addr #1
declare ptr @dmaengine_prep_slave_sg(ptr noundef, ptr noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i64 @IS_ERR_OR_NULL(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @dmaengine_submit(ptr noundef) local_unnamed_addr #1
declare i32 @dma_submit_error(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"any pointer", !8, i64 0}
!14 = !{!15, !11, i64 8}
!15 = !{!"dma_async_tx_descriptor", !13, i64 0, !11, i64 8}
!16 = !{!15, !13, i64 0}
| linux_drivers_spi_extr_spi-qup.c_spi_qup_prep_sg |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/synopsys/extr_dwc-xlgmac-hw.c_xlgmac_config_rx_buffer_size.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/synopsys/extr_dwc-xlgmac-hw.c_xlgmac_config_rx_buffer_size.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.xlgmac_pdata = type { i32, i32, ptr }
%struct.xlgmac_channel = type { i32 }
@DMA_CH_RCR = dso_local local_unnamed_addr global i32 0, align 4
@DMA_CH_RCR_RBSZ_POS = dso_local local_unnamed_addr global i32 0, align 4
@DMA_CH_RCR_RBSZ_LEN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @xlgmac_config_rx_buffer_size], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @xlgmac_config_rx_buffer_size(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !5
%3 = icmp eq i32 %2, 0
br i1 %3, label %28, label %4
4: ; preds = %1
%5 = getelementptr inbounds %struct.xlgmac_pdata, ptr %0, i64 0, i32 2
%6 = load ptr, ptr %5, align 8, !tbaa !11
%7 = getelementptr inbounds %struct.xlgmac_pdata, ptr %0, i64 0, i32 1
br label %8
8: ; preds = %4, %13
%9 = phi ptr [ %6, %4 ], [ %25, %13 ]
%10 = phi i32 [ 0, %4 ], [ %24, %13 ]
%11 = load i32, ptr %9, align 4, !tbaa !12
%12 = icmp eq i32 %11, 0
br i1 %12, label %28, label %13
13: ; preds = %8
%14 = load i32, ptr @DMA_CH_RCR, align 4, !tbaa !14
%15 = tail call i32 @XLGMAC_DMA_REG(ptr noundef nonnull %9, i32 noundef %14) #2
%16 = tail call i32 @readl(i32 noundef %15) #2
%17 = load i32, ptr @DMA_CH_RCR_RBSZ_POS, align 4, !tbaa !14
%18 = load i32, ptr @DMA_CH_RCR_RBSZ_LEN, align 4, !tbaa !14
%19 = load i32, ptr %7, align 4, !tbaa !15
%20 = tail call i32 @XLGMAC_SET_REG_BITS(i32 noundef %16, i32 noundef %17, i32 noundef %18, i32 noundef %19) #2
%21 = load i32, ptr @DMA_CH_RCR, align 4, !tbaa !14
%22 = tail call i32 @XLGMAC_DMA_REG(ptr noundef nonnull %9, i32 noundef %21) #2
%23 = tail call i32 @writel(i32 noundef %20, i32 noundef %22) #2
%24 = add nuw i32 %10, 1
%25 = getelementptr inbounds %struct.xlgmac_channel, ptr %9, i64 1
%26 = load i32, ptr %0, align 8, !tbaa !5
%27 = icmp ult i32 %24, %26
br i1 %27, label %8, label %28, !llvm.loop !16
28: ; preds = %13, %8, %1
ret void
}
declare i32 @readl(i32 noundef) local_unnamed_addr #1
declare i32 @XLGMAC_DMA_REG(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @XLGMAC_SET_REG_BITS(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"xlgmac_pdata", !7, i64 0, !7, i64 4, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!13, !7, i64 0}
!13 = !{!"xlgmac_channel", !7, i64 0}
!14 = !{!7, !7, i64 0}
!15 = !{!6, !7, i64 4}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/synopsys/extr_dwc-xlgmac-hw.c_xlgmac_config_rx_buffer_size.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/synopsys/extr_dwc-xlgmac-hw.c_xlgmac_config_rx_buffer_size.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DMA_CH_RCR = common local_unnamed_addr global i32 0, align 4
@DMA_CH_RCR_RBSZ_POS = common local_unnamed_addr global i32 0, align 4
@DMA_CH_RCR_RBSZ_LEN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @xlgmac_config_rx_buffer_size], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @xlgmac_config_rx_buffer_size(ptr nocapture noundef readonly %0) #0 {
%2 = load i32, ptr %0, align 8, !tbaa !6
%3 = icmp eq i32 %2, 0
br i1 %3, label %28, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !12
%7 = getelementptr inbounds i8, ptr %0, i64 4
br label %8
8: ; preds = %4, %13
%9 = phi ptr [ %6, %4 ], [ %25, %13 ]
%10 = phi i32 [ 0, %4 ], [ %24, %13 ]
%11 = load i32, ptr %9, align 4, !tbaa !13
%12 = icmp eq i32 %11, 0
br i1 %12, label %28, label %13
13: ; preds = %8
%14 = load i32, ptr @DMA_CH_RCR, align 4, !tbaa !15
%15 = tail call i32 @XLGMAC_DMA_REG(ptr noundef nonnull %9, i32 noundef %14) #2
%16 = tail call i32 @readl(i32 noundef %15) #2
%17 = load i32, ptr @DMA_CH_RCR_RBSZ_POS, align 4, !tbaa !15
%18 = load i32, ptr @DMA_CH_RCR_RBSZ_LEN, align 4, !tbaa !15
%19 = load i32, ptr %7, align 4, !tbaa !16
%20 = tail call i32 @XLGMAC_SET_REG_BITS(i32 noundef %16, i32 noundef %17, i32 noundef %18, i32 noundef %19) #2
%21 = load i32, ptr @DMA_CH_RCR, align 4, !tbaa !15
%22 = tail call i32 @XLGMAC_DMA_REG(ptr noundef nonnull %9, i32 noundef %21) #2
%23 = tail call i32 @writel(i32 noundef %20, i32 noundef %22) #2
%24 = add nuw i32 %10, 1
%25 = getelementptr inbounds i8, ptr %9, i64 4
%26 = load i32, ptr %0, align 8, !tbaa !6
%27 = icmp ult i32 %24, %26
br i1 %27, label %8, label %28, !llvm.loop !17
28: ; preds = %13, %8, %1
ret void
}
declare i32 @readl(i32 noundef) local_unnamed_addr #1
declare i32 @XLGMAC_DMA_REG(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @XLGMAC_SET_REG_BITS(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @writel(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"xlgmac_pdata", !8, i64 0, !8, i64 4, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!14, !8, i64 0}
!14 = !{!"xlgmac_channel", !8, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!7, !8, i64 4}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
| linux_drivers_net_ethernet_synopsys_extr_dwc-xlgmac-hw.c_xlgmac_config_rx_buffer_size |
; ModuleID = 'AnghaBench/obs-studio/deps/glad/src/extr_glad.c_get_proc.c'
source_filename = "AnghaBench/obs-studio/deps/glad/src/extr_glad.c_get_proc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@libGL = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @get_proc], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @get_proc(ptr noundef %0) #0 {
%2 = load ptr, ptr @libGL, align 8, !tbaa !5
%3 = icmp eq ptr %2, null
br i1 %3, label %10, label %4
4: ; preds = %1
%5 = tail call ptr @gladGetProcAddressPtr(ptr noundef %0) #2
%6 = icmp eq ptr %5, null
br i1 %6, label %7, label %10
7: ; preds = %4
%8 = load ptr, ptr @libGL, align 8, !tbaa !5
%9 = tail call ptr @dlsym(ptr noundef %8, ptr noundef %0) #2
br label %10
10: ; preds = %4, %7, %1
%11 = phi ptr [ null, %1 ], [ %9, %7 ], [ %5, %4 ]
ret ptr %11
}
declare ptr @gladGetProcAddressPtr(ptr noundef) local_unnamed_addr #1
declare ptr @dlsym(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/obs-studio/deps/glad/src/extr_glad.c_get_proc.c'
source_filename = "AnghaBench/obs-studio/deps/glad/src/extr_glad.c_get_proc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@libGL = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @get_proc], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @get_proc(ptr noundef %0) #0 {
%2 = load ptr, ptr @libGL, align 8, !tbaa !6
%3 = icmp eq ptr %2, null
br i1 %3, label %6, label %4
4: ; preds = %1
%5 = tail call ptr @dlsym(ptr noundef nonnull %2, ptr noundef %0) #2
br label %6
6: ; preds = %1, %4
%7 = phi ptr [ %5, %4 ], [ null, %1 ]
ret ptr %7
}
declare ptr @dlsym(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| obs-studio_deps_glad_src_extr_glad.c_get_proc |
; ModuleID = 'AnghaBench/freebsd/contrib/ntp/sntp/libevent/extr_buffer.c_evbuffer_freeze.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/sntp/libevent/extr_buffer.c_evbuffer_freeze.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.evbuffer = type { i32, i32 }
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @evbuffer_freeze(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @EVBUFFER_LOCK(ptr noundef %0) #2
%4 = icmp eq i32 %1, 0
%5 = getelementptr inbounds %struct.evbuffer, ptr %0, i64 0, i32 1
%6 = select i1 %4, ptr %5, ptr %0
store i32 1, ptr %6, align 4, !tbaa !5
%7 = tail call i32 @EVBUFFER_UNLOCK(ptr noundef nonnull %0) #2
ret i32 0
}
declare i32 @EVBUFFER_LOCK(ptr noundef) local_unnamed_addr #1
declare i32 @EVBUFFER_UNLOCK(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/contrib/ntp/sntp/libevent/extr_buffer.c_evbuffer_freeze.c'
source_filename = "AnghaBench/freebsd/contrib/ntp/sntp/libevent/extr_buffer.c_evbuffer_freeze.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @evbuffer_freeze(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @EVBUFFER_LOCK(ptr noundef %0) #2
%4 = icmp eq i32 %1, 0
%5 = select i1 %4, i64 4, i64 0
%6 = getelementptr inbounds i8, ptr %0, i64 %5
store i32 1, ptr %6, align 4, !tbaa !6
%7 = tail call i32 @EVBUFFER_UNLOCK(ptr noundef nonnull %0) #2
ret i32 0
}
declare i32 @EVBUFFER_LOCK(ptr noundef) local_unnamed_addr #1
declare i32 @EVBUFFER_UNLOCK(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_contrib_ntp_sntp_libevent_extr_buffer.c_evbuffer_freeze |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/vxge/extr_vxge-traffic.c_vxge_hw_vpath_mac_addr_delete.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/vxge/extr_vxge-traffic.c_vxge_hw_vpath_mac_addr_delete.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ETH_ALEN = dso_local local_unnamed_addr global i64 0, align 8
@VXGE_HW_OK = dso_local local_unnamed_addr global i32 0, align 4
@VXGE_HW_ERR_INVALID_HANDLE = dso_local local_unnamed_addr global i32 0, align 4
@VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_DELETE_ENTRY = dso_local local_unnamed_addr global i32 0, align 4
@VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @vxge_hw_vpath_mac_addr_delete(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2) local_unnamed_addr #0 {
%4 = icmp eq ptr %0, null
br i1 %4, label %13, label %5
5: ; preds = %3
%6 = load i64, ptr @ETH_ALEN, align 8, !tbaa !5
%7 = icmp eq i64 %6, 0
br i1 %7, label %57, label %8
8: ; preds = %5
%9 = and i64 %6, 1
%10 = icmp eq i64 %6, 1
br i1 %10, label %43, label %11
11: ; preds = %8
%12 = and i64 %6, -2
br label %15
13: ; preds = %3
%14 = load i32, ptr @VXGE_HW_ERR_INVALID_HANDLE, align 4, !tbaa !9
br label %65
15: ; preds = %15, %11
%16 = phi i32 [ 0, %11 ], [ %36, %15 ]
%17 = phi i32 [ 0, %11 ], [ %30, %15 ]
%18 = phi i64 [ 0, %11 ], [ %37, %15 ]
%19 = phi i64 [ 0, %11 ], [ %38, %15 ]
%20 = getelementptr inbounds i32, ptr %1, i64 %18
%21 = load i32, ptr %20, align 4, !tbaa !9
%22 = getelementptr inbounds i32, ptr %2, i64 %18
%23 = load i32, ptr %22, align 4, !tbaa !9
%24 = or disjoint i64 %18, 1
%25 = shl i32 %17, 16
%26 = shl i32 %21, 8
%27 = or i32 %25, %26
%28 = getelementptr inbounds i32, ptr %1, i64 %24
%29 = load i32, ptr %28, align 4, !tbaa !9
%30 = or i32 %29, %27
%31 = shl i32 %16, 16
%32 = shl i32 %23, 8
%33 = or i32 %31, %32
%34 = getelementptr inbounds i32, ptr %2, i64 %24
%35 = load i32, ptr %34, align 4, !tbaa !9
%36 = or i32 %35, %33
%37 = add nuw i64 %18, 2
%38 = add i64 %19, 2
%39 = icmp eq i64 %38, %12
br i1 %39, label %40, label %15, !llvm.loop !11
40: ; preds = %15
%41 = shl i32 %30, 8
%42 = shl i32 %36, 8
br label %43
43: ; preds = %40, %8
%44 = phi i32 [ undef, %8 ], [ %30, %40 ]
%45 = phi i32 [ undef, %8 ], [ %36, %40 ]
%46 = phi i32 [ 0, %8 ], [ %42, %40 ]
%47 = phi i32 [ 0, %8 ], [ %41, %40 ]
%48 = phi i64 [ 0, %8 ], [ %37, %40 ]
%49 = icmp eq i64 %9, 0
br i1 %49, label %57, label %50
50: ; preds = %43
%51 = getelementptr inbounds i32, ptr %1, i64 %48
%52 = load i32, ptr %51, align 4, !tbaa !9
%53 = or i32 %52, %47
%54 = getelementptr inbounds i32, ptr %2, i64 %48
%55 = load i32, ptr %54, align 4, !tbaa !9
%56 = or i32 %55, %46
br label %57
57: ; preds = %50, %43, %5
%58 = phi i32 [ 0, %5 ], [ %44, %43 ], [ %53, %50 ]
%59 = phi i32 [ 0, %5 ], [ %45, %43 ], [ %56, %50 ]
%60 = load i32, ptr @VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_DELETE_ENTRY, align 4, !tbaa !9
%61 = load i32, ptr @VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA, align 4, !tbaa !9
%62 = tail call i32 @VXGE_HW_RTS_ACCESS_STEER_DATA0_DA_MAC_ADDR(i32 noundef %58) #2
%63 = tail call i32 @VXGE_HW_RTS_ACCESS_STEER_DATA1_DA_MAC_ADDR_MASK(i32 noundef %59) #2
%64 = tail call i32 @__vxge_hw_vpath_rts_table_set(ptr noundef nonnull %0, i32 noundef %60, i32 noundef %61, i32 noundef 0, i32 noundef %62, i32 noundef %63) #2
br label %65
65: ; preds = %57, %13
%66 = phi i32 [ %14, %13 ], [ %64, %57 ]
ret i32 %66
}
declare i32 @__vxge_hw_vpath_rts_table_set(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @VXGE_HW_RTS_ACCESS_STEER_DATA0_DA_MAC_ADDR(i32 noundef) local_unnamed_addr #1
declare i32 @VXGE_HW_RTS_ACCESS_STEER_DATA1_DA_MAC_ADDR_MASK(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/vxge/extr_vxge-traffic.c_vxge_hw_vpath_mac_addr_delete.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/vxge/extr_vxge-traffic.c_vxge_hw_vpath_mac_addr_delete.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ETH_ALEN = common local_unnamed_addr global i64 0, align 8
@VXGE_HW_OK = common local_unnamed_addr global i32 0, align 4
@VXGE_HW_ERR_INVALID_HANDLE = common local_unnamed_addr global i32 0, align 4
@VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_DELETE_ENTRY = common local_unnamed_addr global i32 0, align 4
@VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @vxge_hw_vpath_mac_addr_delete(ptr noundef %0, ptr nocapture noundef readonly %1, ptr nocapture noundef readonly %2) local_unnamed_addr #0 {
%4 = icmp eq ptr %0, null
br i1 %4, label %8, label %5
5: ; preds = %3
%6 = load i64, ptr @ETH_ALEN, align 8, !tbaa !6
%7 = icmp eq i64 %6, 0
br i1 %7, label %24, label %10
8: ; preds = %3
%9 = load i32, ptr @VXGE_HW_ERR_INVALID_HANDLE, align 4, !tbaa !10
br label %32
10: ; preds = %5, %10
%11 = phi i32 [ %21, %10 ], [ 0, %5 ]
%12 = phi i32 [ %17, %10 ], [ 0, %5 ]
%13 = phi i64 [ %22, %10 ], [ 0, %5 ]
%14 = shl i32 %12, 8
%15 = getelementptr inbounds i32, ptr %1, i64 %13
%16 = load i32, ptr %15, align 4, !tbaa !10
%17 = or i32 %16, %14
%18 = shl i32 %11, 8
%19 = getelementptr inbounds i32, ptr %2, i64 %13
%20 = load i32, ptr %19, align 4, !tbaa !10
%21 = or i32 %20, %18
%22 = add nuw i64 %13, 1
%23 = icmp eq i64 %22, %6
br i1 %23, label %24, label %10, !llvm.loop !12
24: ; preds = %10, %5
%25 = phi i32 [ 0, %5 ], [ %17, %10 ]
%26 = phi i32 [ 0, %5 ], [ %21, %10 ]
%27 = load i32, ptr @VXGE_HW_RTS_ACCESS_STEER_CTRL_ACTION_DELETE_ENTRY, align 4, !tbaa !10
%28 = load i32, ptr @VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA, align 4, !tbaa !10
%29 = tail call i32 @VXGE_HW_RTS_ACCESS_STEER_DATA0_DA_MAC_ADDR(i32 noundef %25) #2
%30 = tail call i32 @VXGE_HW_RTS_ACCESS_STEER_DATA1_DA_MAC_ADDR_MASK(i32 noundef %26) #2
%31 = tail call i32 @__vxge_hw_vpath_rts_table_set(ptr noundef nonnull %0, i32 noundef %27, i32 noundef %28, i32 noundef 0, i32 noundef %29, i32 noundef %30) #2
br label %32
32: ; preds = %24, %8
%33 = phi i32 [ %9, %8 ], [ %31, %24 ]
ret i32 %33
}
declare i32 @__vxge_hw_vpath_rts_table_set(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @VXGE_HW_RTS_ACCESS_STEER_DATA0_DA_MAC_ADDR(i32 noundef) local_unnamed_addr #1
declare i32 @VXGE_HW_RTS_ACCESS_STEER_DATA1_DA_MAC_ADDR_MASK(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
| fastsocket_kernel_drivers_net_vxge_extr_vxge-traffic.c_vxge_hw_vpath_mac_addr_delete |
; ModuleID = 'AnghaBench/linux/net/mac80211/extr_util.c_ieee80211_can_queue_work.c'
source_filename = "AnghaBench/linux/net/mac80211/extr_util.c_ieee80211_can_queue_work.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ieee80211_local = type { i32, i64, i64 }
@.str = private unnamed_addr constant [48 x i8] c"queueing ieee80211 work while going to suspend\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @ieee80211_can_queue_work], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @ieee80211_can_queue_work(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds %struct.ieee80211_local, ptr %0, i64 0, i32 2
%3 = load i64, ptr %2, align 8, !tbaa !5
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = getelementptr inbounds %struct.ieee80211_local, ptr %0, i64 0, i32 1
%7 = load i64, ptr %6, align 8, !tbaa !11
%8 = icmp eq i64 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %5
%10 = load i32, ptr %0, align 8, !tbaa !12
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %9, %1
%13 = tail call i32 @pr_warn(ptr noundef nonnull @.str) #2
br label %14
14: ; preds = %5, %9, %12
%15 = phi i32 [ 0, %12 ], [ 1, %9 ], [ 1, %5 ]
ret i32 %15
}
declare i32 @pr_warn(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"ieee80211_local", !7, i64 0, !10, i64 8, !10, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/net/mac80211/extr_util.c_ieee80211_can_queue_work.c'
source_filename = "AnghaBench/linux/net/mac80211/extr_util.c_ieee80211_can_queue_work.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [48 x i8] c"queueing ieee80211 work while going to suspend\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @ieee80211_can_queue_work], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @ieee80211_can_queue_work(ptr nocapture noundef readonly %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = load i64, ptr %2, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %12
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load i64, ptr %6, align 8, !tbaa !12
%8 = icmp eq i64 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %5
%10 = load i32, ptr %0, align 8, !tbaa !13
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %14
12: ; preds = %9, %1
%13 = tail call i32 @pr_warn(ptr noundef nonnull @.str) #2
br label %14
14: ; preds = %5, %9, %12
%15 = phi i32 [ 0, %12 ], [ 1, %9 ], [ 1, %5 ]
ret i32 %15
}
declare i32 @pr_warn(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"ieee80211_local", !8, i64 0, !11, i64 8, !11, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!7, !8, i64 0}
| linux_net_mac80211_extr_util.c_ieee80211_can_queue_work |
; ModuleID = 'AnghaBench/linux/drivers/gpu/ipu-v3/extr_ipu-di.c_ipu_di_sync_config_interlaced.c'
source_filename = "AnghaBench/linux/drivers/gpu/ipu-v3/extr_ipu-di.c_ipu_di_sync_config_interlaced.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.di_sync_config = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.TYPE_2__ = type { i32, i32, i32, i32, i32, i32, i32, i32 }
@DI_SYNC_CLK = dso_local local_unnamed_addr global i32 0, align 4
@DI_SYNC_CNT1 = dso_local local_unnamed_addr global i32 0, align 4
@DI_SYNC_HSYNC = dso_local local_unnamed_addr global i32 0, align 4
@DI_SYNC_CNT4 = dso_local local_unnamed_addr global i32 0, align 4
@DI_SYNC_CNT5 = dso_local local_unnamed_addr global i32 0, align 4
@DI_SCR_CONF = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ipu_di_sync_config_interlaced], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ipu_di_sync_config_interlaced(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = alloca [7 x %struct.di_sync_config], align 16
%4 = load i32, ptr %1, align 4, !tbaa !5
%5 = getelementptr inbounds %struct.TYPE_2__, ptr %1, i64 0, i32 1
%6 = load i32, ptr %5, align 4, !tbaa !11
%7 = getelementptr inbounds %struct.TYPE_2__, ptr %1, i64 0, i32 2
%8 = load i32, ptr %7, align 4, !tbaa !12
%9 = getelementptr inbounds %struct.TYPE_2__, ptr %1, i64 0, i32 3
%10 = load i32, ptr %9, align 4, !tbaa !13
%11 = add i32 %8, %6
%12 = add i32 %11, %4
%13 = add nsw i32 %12, %10
%14 = getelementptr inbounds %struct.TYPE_2__, ptr %1, i64 0, i32 4
%15 = load i32, ptr %14, align 4, !tbaa !14
%16 = getelementptr inbounds %struct.TYPE_2__, ptr %1, i64 0, i32 5
%17 = load i32, ptr %16, align 4, !tbaa !15
%18 = getelementptr inbounds %struct.TYPE_2__, ptr %1, i64 0, i32 6
%19 = load i32, ptr %18, align 4, !tbaa !16
%20 = getelementptr inbounds %struct.TYPE_2__, ptr %1, i64 0, i32 7
%21 = load i32, ptr %20, align 4, !tbaa !17
%22 = add i32 %19, %17
%23 = add i32 %22, %15
%24 = add nsw i32 %23, %21
call void @llvm.lifetime.start.p0(i64 252, ptr nonnull %3) #4
call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(36) %3, i8 0, i64 36, i1 false)
%25 = shl nsw i32 %24, 1
%26 = add nsw i32 %25, -1
store i32 %26, ptr %3, align 16, !tbaa !18
%27 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 0, i32 1
store i32 3, ptr %27, align 4, !tbaa !20
%28 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 1
%29 = add nsw i32 %13, -1
store i32 %29, ptr %28, align 4, !tbaa !18
%30 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 1, i32 1
%31 = load i32, ptr @DI_SYNC_CLK, align 4, !tbaa !21
store i32 %31, ptr %30, align 8, !tbaa !20
%32 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 1, i32 2
store i32 1, ptr %32, align 4, !tbaa !22
%33 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 1, i32 3
store i32 %31, ptr %33, align 16, !tbaa !23
%34 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 1, i32 4
%35 = shl nsw i32 %6, 1
store i32 %35, ptr %34, align 4, !tbaa !24
%36 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 1, i32 5
%37 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 2
%38 = add nsw i32 %24, -1
call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %36, i8 0, i64 16, i1 false)
store i32 %38, ptr %37, align 8, !tbaa !18
%39 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 2, i32 1
store i32 4, ptr %39, align 4, !tbaa !20
%40 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 2, i32 2
store i32 1, ptr %40, align 16, !tbaa !22
%41 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 2, i32 3
store i32 4, ptr %41, align 4, !tbaa !23
%42 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 2, i32 4
%43 = shl nsw i32 %17, 1
store i32 %43, ptr %42, align 8, !tbaa !24
%44 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 2, i32 5
store i32 0, ptr %44, align 4, !tbaa !25
%45 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 2, i32 6
store i32 0, ptr %45, align 16, !tbaa !26
%46 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 2, i32 7
store i32 0, ptr %46, align 4, !tbaa !27
%47 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 2, i32 8
%48 = load i32, ptr @DI_SYNC_CNT1, align 4, !tbaa !21
store i32 %48, ptr %47, align 8, !tbaa !28
%49 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 3
%50 = sdiv i32 %24, 2
store i32 %50, ptr %49, align 4, !tbaa !18
%51 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 3, i32 1
%52 = load i32, ptr @DI_SYNC_HSYNC, align 4, !tbaa !21
store i32 %52, ptr %51, align 16, !tbaa !20
%53 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 3, i32 2
store i32 0, ptr %53, align 4, !tbaa !22
%54 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 3, i32 3
store i32 0, ptr %54, align 8, !tbaa !23
%55 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 3, i32 4
store i32 0, ptr %55, align 4, !tbaa !24
%56 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 3, i32 5
%57 = sdiv i32 %13, 2
store i32 %57, ptr %56, align 16, !tbaa !25
%58 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 3, i32 6
store i32 %31, ptr %58, align 4, !tbaa !26
%59 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 3, i32 7
store i32 2, ptr %59, align 8, !tbaa !27
%60 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 3, i32 8
store i32 %48, ptr %60, align 4, !tbaa !28
%61 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 4
store i32 0, ptr %61, align 16, !tbaa !18
%62 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 4, i32 1
store i32 %52, ptr %62, align 4, !tbaa !20
%63 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 4, i32 2
store i32 0, ptr %63, align 8, !tbaa !22
%64 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 4, i32 3
store i32 0, ptr %64, align 4, !tbaa !23
%65 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 4, i32 4
store i32 0, ptr %65, align 16, !tbaa !24
%66 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 4, i32 5
%67 = sdiv i32 %22, 2
store i32 %67, ptr %66, align 4, !tbaa !25
%68 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 4, i32 6
store i32 %52, ptr %68, align 8, !tbaa !26
%69 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 4, i32 7
%70 = sdiv i32 %15, 2
store i32 %70, ptr %69, align 4, !tbaa !27
%71 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 4, i32 8
%72 = load i32, ptr @DI_SYNC_CNT4, align 4, !tbaa !21
store i32 %72, ptr %71, align 16, !tbaa !28
%73 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 5
store i32 0, ptr %73, align 4, !tbaa !18
%74 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 5, i32 1
store i32 %31, ptr %74, align 8, !tbaa !20
%75 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 5, i32 2
store i32 0, ptr %75, align 4, !tbaa !22
%76 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 5, i32 3
store i32 0, ptr %76, align 16, !tbaa !23
%77 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 5, i32 4
store i32 0, ptr %77, align 4, !tbaa !24
%78 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 5, i32 5
store i32 %11, ptr %78, align 8, !tbaa !25
%79 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 5, i32 6
store i32 %31, ptr %79, align 4, !tbaa !26
%80 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 5, i32 7
store i32 %4, ptr %80, align 16, !tbaa !27
%81 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 5, i32 8
%82 = load i32, ptr @DI_SYNC_CNT5, align 4, !tbaa !21
store i32 %82, ptr %81, align 4, !tbaa !28
%83 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 6
%84 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 6, i32 2
call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(36) %84, i8 0, i64 28, i1 false)
%85 = add nsw i32 %57, -1
store i32 %85, ptr %83, align 8, !tbaa !18
%86 = getelementptr inbounds %struct.di_sync_config, ptr %3, i64 6, i32 1
store i32 %31, ptr %86, align 4, !tbaa !20
%87 = call i32 @ARRAY_SIZE(ptr noundef nonnull %3) #4
%88 = call i32 @ipu_di_sync_config(ptr noundef %0, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %87) #4
%89 = add nsw i32 %50, -1
%90 = load i32, ptr @DI_SCR_CONF, align 4, !tbaa !21
%91 = call i32 @ipu_di_write(ptr noundef %0, i32 noundef %89, i32 noundef %90) #4
call void @llvm.lifetime.end.p0(i64 252, ptr nonnull %3) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
declare i32 @ipu_di_sync_config(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #3
declare i32 @ipu_di_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"ipu_di_signal_cfg", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !8, i64 24, !8, i64 28}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!6, !8, i64 4}
!12 = !{!6, !8, i64 8}
!13 = !{!6, !8, i64 12}
!14 = !{!6, !8, i64 16}
!15 = !{!6, !8, i64 20}
!16 = !{!6, !8, i64 24}
!17 = !{!6, !8, i64 28}
!18 = !{!19, !8, i64 0}
!19 = !{!"di_sync_config", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !8, i64 16, !8, i64 20, !8, i64 24, !8, i64 28, !8, i64 32}
!20 = !{!19, !8, i64 4}
!21 = !{!8, !8, i64 0}
!22 = !{!19, !8, i64 8}
!23 = !{!19, !8, i64 12}
!24 = !{!19, !8, i64 16}
!25 = !{!19, !8, i64 20}
!26 = !{!19, !8, i64 24}
!27 = !{!19, !8, i64 28}
!28 = !{!19, !8, i64 32}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/ipu-v3/extr_ipu-di.c_ipu_di_sync_config_interlaced.c'
source_filename = "AnghaBench/linux/drivers/gpu/ipu-v3/extr_ipu-di.c_ipu_di_sync_config_interlaced.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.di_sync_config = type { i32, i32, i32, i32, i32, i32, i32, i32, i32 }
@DI_SYNC_CLK = common local_unnamed_addr global i32 0, align 4
@DI_SYNC_CNT1 = common local_unnamed_addr global i32 0, align 4
@DI_SYNC_HSYNC = common local_unnamed_addr global i32 0, align 4
@DI_SYNC_CNT4 = common local_unnamed_addr global i32 0, align 4
@DI_SYNC_CNT5 = common local_unnamed_addr global i32 0, align 4
@DI_SCR_CONF = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ipu_di_sync_config_interlaced], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ipu_di_sync_config_interlaced(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = alloca [7 x %struct.di_sync_config], align 4
%4 = load i32, ptr %1, align 4, !tbaa !6
%5 = getelementptr inbounds i8, ptr %1, i64 4
%6 = load i32, ptr %5, align 4, !tbaa !12
%7 = getelementptr inbounds i8, ptr %1, i64 8
%8 = load i32, ptr %7, align 4, !tbaa !13
%9 = getelementptr inbounds i8, ptr %1, i64 12
%10 = load i32, ptr %9, align 4, !tbaa !14
%11 = add i32 %8, %6
%12 = add i32 %11, %4
%13 = add nsw i32 %12, %10
%14 = getelementptr inbounds i8, ptr %1, i64 16
%15 = load i32, ptr %14, align 4, !tbaa !15
%16 = getelementptr inbounds i8, ptr %1, i64 20
%17 = load i32, ptr %16, align 4, !tbaa !16
%18 = getelementptr inbounds i8, ptr %1, i64 24
%19 = load i32, ptr %18, align 4, !tbaa !17
%20 = getelementptr inbounds i8, ptr %1, i64 28
%21 = load i32, ptr %20, align 4, !tbaa !18
%22 = add i32 %19, %17
%23 = add i32 %22, %15
%24 = add nsw i32 %23, %21
call void @llvm.lifetime.start.p0(i64 252, ptr nonnull %3) #4
%25 = getelementptr inbounds i8, ptr %3, i64 8
call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(36) %25, i8 0, i64 28, i1 false)
%26 = shl nsw i32 %24, 1
%27 = add nsw i32 %26, -1
store i32 %27, ptr %3, align 4, !tbaa !19
%28 = getelementptr inbounds i8, ptr %3, i64 4
store i32 3, ptr %28, align 4, !tbaa !21
%29 = getelementptr inbounds i8, ptr %3, i64 36
%30 = add nsw i32 %13, -1
store i32 %30, ptr %29, align 4, !tbaa !19
%31 = getelementptr inbounds i8, ptr %3, i64 40
%32 = load i32, ptr @DI_SYNC_CLK, align 4, !tbaa !22
store i32 %32, ptr %31, align 4, !tbaa !21
%33 = getelementptr inbounds i8, ptr %3, i64 44
store i32 1, ptr %33, align 4, !tbaa !23
%34 = getelementptr inbounds i8, ptr %3, i64 48
store i32 %32, ptr %34, align 4, !tbaa !24
%35 = getelementptr inbounds i8, ptr %3, i64 52
%36 = shl nsw i32 %6, 1
store i32 %36, ptr %35, align 4, !tbaa !25
%37 = getelementptr inbounds i8, ptr %3, i64 56
%38 = getelementptr inbounds i8, ptr %3, i64 72
%39 = add nsw i32 %24, -1
call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %37, i8 0, i64 16, i1 false)
store i32 %39, ptr %38, align 4, !tbaa !19
%40 = getelementptr inbounds i8, ptr %3, i64 76
store <2 x i32> <i32 4, i32 1>, ptr %40, align 4, !tbaa !22
%41 = getelementptr inbounds i8, ptr %3, i64 84
store i32 4, ptr %41, align 4, !tbaa !24
%42 = getelementptr inbounds i8, ptr %3, i64 88
%43 = shl nsw i32 %17, 1
store i32 %43, ptr %42, align 4, !tbaa !25
%44 = getelementptr inbounds i8, ptr %3, i64 92
store <2 x i32> zeroinitializer, ptr %44, align 4, !tbaa !22
%45 = getelementptr inbounds i8, ptr %3, i64 100
store i32 0, ptr %45, align 4, !tbaa !26
%46 = getelementptr inbounds i8, ptr %3, i64 104
%47 = load i32, ptr @DI_SYNC_CNT1, align 4, !tbaa !22
store i32 %47, ptr %46, align 4, !tbaa !27
%48 = getelementptr inbounds i8, ptr %3, i64 108
%49 = sdiv i32 %24, 2
store i32 %49, ptr %48, align 4, !tbaa !19
%50 = getelementptr inbounds i8, ptr %3, i64 112
%51 = load i32, ptr @DI_SYNC_HSYNC, align 4, !tbaa !22
store i32 %51, ptr %50, align 4, !tbaa !21
%52 = getelementptr inbounds i8, ptr %3, i64 116
store <2 x i32> zeroinitializer, ptr %52, align 4, !tbaa !22
%53 = getelementptr inbounds i8, ptr %3, i64 124
store i32 0, ptr %53, align 4, !tbaa !25
%54 = getelementptr inbounds i8, ptr %3, i64 128
%55 = sdiv i32 %13, 2
store i32 %55, ptr %54, align 4, !tbaa !28
%56 = getelementptr inbounds i8, ptr %3, i64 132
store i32 %32, ptr %56, align 4, !tbaa !29
%57 = getelementptr inbounds i8, ptr %3, i64 136
store i32 2, ptr %57, align 4, !tbaa !26
%58 = getelementptr inbounds i8, ptr %3, i64 140
store i32 %47, ptr %58, align 4, !tbaa !27
%59 = getelementptr inbounds i8, ptr %3, i64 144
store i32 0, ptr %59, align 4, !tbaa !19
%60 = getelementptr inbounds i8, ptr %3, i64 148
store i32 %51, ptr %60, align 4, !tbaa !21
%61 = getelementptr inbounds i8, ptr %3, i64 152
store <2 x i32> zeroinitializer, ptr %61, align 4, !tbaa !22
%62 = getelementptr inbounds i8, ptr %3, i64 160
store i32 0, ptr %62, align 4, !tbaa !25
%63 = getelementptr inbounds i8, ptr %3, i64 164
%64 = sdiv i32 %22, 2
store i32 %64, ptr %63, align 4, !tbaa !28
%65 = getelementptr inbounds i8, ptr %3, i64 168
store i32 %51, ptr %65, align 4, !tbaa !29
%66 = getelementptr inbounds i8, ptr %3, i64 172
%67 = sdiv i32 %15, 2
store i32 %67, ptr %66, align 4, !tbaa !26
%68 = getelementptr inbounds i8, ptr %3, i64 176
%69 = load i32, ptr @DI_SYNC_CNT4, align 4, !tbaa !22
store i32 %69, ptr %68, align 4, !tbaa !27
%70 = getelementptr inbounds i8, ptr %3, i64 180
store i32 0, ptr %70, align 4, !tbaa !19
%71 = getelementptr inbounds i8, ptr %3, i64 184
store i32 %32, ptr %71, align 4, !tbaa !21
%72 = getelementptr inbounds i8, ptr %3, i64 188
store <2 x i32> zeroinitializer, ptr %72, align 4, !tbaa !22
%73 = getelementptr inbounds i8, ptr %3, i64 196
store i32 0, ptr %73, align 4, !tbaa !25
%74 = getelementptr inbounds i8, ptr %3, i64 200
store i32 %11, ptr %74, align 4, !tbaa !28
%75 = getelementptr inbounds i8, ptr %3, i64 204
store i32 %32, ptr %75, align 4, !tbaa !29
%76 = getelementptr inbounds i8, ptr %3, i64 208
store i32 %4, ptr %76, align 4, !tbaa !26
%77 = getelementptr inbounds i8, ptr %3, i64 212
%78 = load i32, ptr @DI_SYNC_CNT5, align 4, !tbaa !22
store i32 %78, ptr %77, align 4, !tbaa !27
%79 = getelementptr inbounds i8, ptr %3, i64 216
%80 = getelementptr inbounds i8, ptr %3, i64 224
call void @llvm.memset.p0.i64(ptr noundef nonnull align 4 dereferenceable(36) %80, i8 0, i64 28, i1 false)
%81 = add nsw i32 %55, -1
store i32 %81, ptr %79, align 4, !tbaa !19
%82 = getelementptr inbounds i8, ptr %3, i64 220
store i32 %32, ptr %82, align 4, !tbaa !21
%83 = call i32 @ARRAY_SIZE(ptr noundef nonnull %3) #4
%84 = call i32 @ipu_di_sync_config(ptr noundef %0, ptr noundef nonnull %3, i32 noundef 0, i32 noundef %83) #4
%85 = add nsw i32 %49, -1
%86 = load i32, ptr @DI_SCR_CONF, align 4, !tbaa !22
%87 = call i32 @ipu_di_write(ptr noundef %0, i32 noundef %85, i32 noundef %86) #4
call void @llvm.lifetime.end.p0(i64 252, ptr nonnull %3) #4
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
; Function Attrs: mustprogress nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
declare i32 @ipu_di_sync_config(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #3
declare i32 @ipu_di_write(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #3
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"ipu_di_signal_cfg", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0, !9, i64 4, !9, i64 8, !9, i64 12, !9, i64 16, !9, i64 20, !9, i64 24, !9, i64 28}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!7, !9, i64 4}
!13 = !{!7, !9, i64 8}
!14 = !{!7, !9, i64 12}
!15 = !{!7, !9, i64 16}
!16 = !{!7, !9, i64 20}
!17 = !{!7, !9, i64 24}
!18 = !{!7, !9, i64 28}
!19 = !{!20, !9, i64 0}
!20 = !{!"di_sync_config", !9, i64 0, !9, i64 4, !9, i64 8, !9, i64 12, !9, i64 16, !9, i64 20, !9, i64 24, !9, i64 28, !9, i64 32}
!21 = !{!20, !9, i64 4}
!22 = !{!9, !9, i64 0}
!23 = !{!20, !9, i64 8}
!24 = !{!20, !9, i64 12}
!25 = !{!20, !9, i64 16}
!26 = !{!20, !9, i64 28}
!27 = !{!20, !9, i64 32}
!28 = !{!20, !9, i64 20}
!29 = !{!20, !9, i64 24}
| linux_drivers_gpu_ipu-v3_extr_ipu-di.c_ipu_di_sync_config_interlaced |
; ModuleID = 'AnghaBench/linux/drivers/tty/vt/extr_vt.c_notify_write.c'
source_filename = "AnghaBench/linux/drivers/tty/vt/extr_vt.c_notify_write.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.vt_notifier_param = type { i32, ptr }
@vt_notifier_list = dso_local global i32 0, align 4
@VT_WRITE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @notify_write], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @notify_write(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca %struct.vt_notifier_param, align 8
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #3
store i32 %1, ptr %3, align 8, !tbaa !5
%4 = getelementptr inbounds %struct.vt_notifier_param, ptr %3, i64 0, i32 1
store ptr %0, ptr %4, align 8, !tbaa !11
%5 = load i32, ptr @VT_WRITE, align 4, !tbaa !12
%6 = call i32 @atomic_notifier_call_chain(ptr noundef nonnull @vt_notifier_list, i32 noundef %5, ptr noundef nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @atomic_notifier_call_chain(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"vt_notifier_param", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/tty/vt/extr_vt.c_notify_write.c'
source_filename = "AnghaBench/linux/drivers/tty/vt/extr_vt.c_notify_write.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.vt_notifier_param = type { i32, ptr }
@vt_notifier_list = common global i32 0, align 4
@VT_WRITE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @notify_write], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @notify_write(ptr noundef %0, i32 noundef %1) #0 {
%3 = alloca %struct.vt_notifier_param, align 8
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %3) #3
store i32 %1, ptr %3, align 8, !tbaa !6
%4 = getelementptr inbounds i8, ptr %3, i64 8
store ptr %0, ptr %4, align 8, !tbaa !12
%5 = load i32, ptr @VT_WRITE, align 4, !tbaa !13
%6 = call i32 @atomic_notifier_call_chain(ptr noundef nonnull @vt_notifier_list, i32 noundef %5, ptr noundef nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %3) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @atomic_notifier_call_chain(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"vt_notifier_param", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!8, !8, i64 0}
| linux_drivers_tty_vt_extr_vt.c_notify_write |
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