IR_x86 string | IR_arm string | filename string |
|---|---|---|
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtw88/extr_coex.c_rtw_coex_set_bt_tx_power.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtw88/extr_coex.c_rtw_coex_set_bt_tx_power.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @rtw_coex_set_bt_tx_power], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @rtw_coex_set_bt_tx_power(ptr noundef %0, i64 noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !5
%4 = icmp eq i64 %3, %1
br i1 %4, label %7, label %5
5: ; preds = %2
store i64 %1, ptr %0, align 8, !tbaa !5
%6 = tail call i32 @rtw_fw_force_bt_tx_power(ptr noundef nonnull %0, i64 noundef %1) #2
br label %7
7: ; preds = %2, %5
ret void
}
declare i32 @rtw_fw_force_bt_tx_power(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"rtw_coex_dm", !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/realtek/rtw88/extr_coex.c_rtw_coex_set_bt_tx_power.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/realtek/rtw88/extr_coex.c_rtw_coex_set_bt_tx_power.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @rtw_coex_set_bt_tx_power], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @rtw_coex_set_bt_tx_power(ptr noundef %0, i64 noundef %1) #0 {
%3 = load i64, ptr %0, align 8, !tbaa !6
%4 = icmp eq i64 %3, %1
br i1 %4, label %7, label %5
5: ; preds = %2
store i64 %1, ptr %0, align 8, !tbaa !6
%6 = tail call i32 @rtw_fw_force_bt_tx_power(ptr noundef nonnull %0, i64 noundef %1) #2
br label %7
7: ; preds = %2, %5
ret void
}
declare i32 @rtw_fw_force_bt_tx_power(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"rtw_coex_dm", !8, i64 0}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_net_wireless_realtek_rtw88_extr_coex.c_rtw_coex_set_bt_tx_power |
; ModuleID = 'AnghaBench/openpilot/phonelibs/nanovg/extr_nanovg.c_nvg__buttCapEnd.c'
source_filename = "AnghaBench/openpilot/phonelibs/nanovg/extr_nanovg.c_nvg__buttCapEnd.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { float, float }
@llvm.compiler.used = appending global [1 x ptr] [ptr @nvg__buttCapEnd], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal nonnull ptr @nvg__buttCapEnd(ptr noundef %0, ptr nocapture noundef readonly %1, float noundef %2, float noundef %3, float noundef %4, float noundef %5, float noundef %6) #0 {
%8 = load float, ptr %1, align 4, !tbaa !5
%9 = tail call float @llvm.fmuladd.f32(float %2, float %5, float %8)
%10 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 1
%11 = load float, ptr %10, align 4, !tbaa !10
%12 = tail call float @llvm.fmuladd.f32(float %3, float %5, float %11)
%13 = fneg float %2
%14 = tail call float @llvm.fmuladd.f32(float %3, float %4, float %9)
%15 = tail call float @llvm.fmuladd.f32(float %13, float %4, float %12)
%16 = tail call i32 @nvg__vset(ptr noundef %0, float noundef %14, float noundef %15, i32 noundef 0, i32 noundef 1) #3
%17 = getelementptr inbounds i32, ptr %0, i64 1
%18 = fneg float %3
%19 = tail call float @llvm.fmuladd.f32(float %18, float %4, float %9)
%20 = tail call float @llvm.fmuladd.f32(float %2, float %4, float %12)
%21 = tail call i32 @nvg__vset(ptr noundef nonnull %17, float noundef %19, float noundef %20, i32 noundef 1, i32 noundef 1) #3
%22 = getelementptr inbounds i32, ptr %0, i64 2
%23 = tail call float @llvm.fmuladd.f32(float %2, float %6, float %14)
%24 = tail call float @llvm.fmuladd.f32(float %3, float %6, float %15)
%25 = tail call i32 @nvg__vset(ptr noundef nonnull %22, float noundef %23, float noundef %24, i32 noundef 0, i32 noundef 0) #3
%26 = getelementptr inbounds i32, ptr %0, i64 3
%27 = tail call float @llvm.fmuladd.f32(float %2, float %6, float %19)
%28 = tail call float @llvm.fmuladd.f32(float %3, float %6, float %20)
%29 = tail call i32 @nvg__vset(ptr noundef nonnull %26, float noundef %27, float noundef %28, i32 noundef 1, i32 noundef 0) #3
%30 = getelementptr inbounds i32, ptr %0, i64 4
ret ptr %30
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1
declare i32 @nvg__vset(ptr noundef, float noundef, float noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_3__", !7, i64 0, !7, i64 4}
!7 = !{!"float", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
| ; ModuleID = 'AnghaBench/openpilot/phonelibs/nanovg/extr_nanovg.c_nvg__buttCapEnd.c'
source_filename = "AnghaBench/openpilot/phonelibs/nanovg/extr_nanovg.c_nvg__buttCapEnd.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @nvg__buttCapEnd], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal nonnull ptr @nvg__buttCapEnd(ptr noundef %0, ptr nocapture noundef readonly %1, float noundef %2, float noundef %3, float noundef %4, float noundef %5, float noundef %6) #0 {
%8 = load float, ptr %1, align 4, !tbaa !6
%9 = tail call float @llvm.fmuladd.f32(float %2, float %5, float %8)
%10 = getelementptr inbounds i8, ptr %1, i64 4
%11 = load float, ptr %10, align 4, !tbaa !11
%12 = tail call float @llvm.fmuladd.f32(float %3, float %5, float %11)
%13 = fneg float %2
%14 = tail call float @llvm.fmuladd.f32(float %3, float %4, float %9)
%15 = tail call float @llvm.fmuladd.f32(float %13, float %4, float %12)
%16 = tail call i32 @nvg__vset(ptr noundef %0, float noundef %14, float noundef %15, i32 noundef 0, i32 noundef 1) #3
%17 = getelementptr inbounds i8, ptr %0, i64 4
%18 = fneg float %3
%19 = tail call float @llvm.fmuladd.f32(float %18, float %4, float %9)
%20 = tail call float @llvm.fmuladd.f32(float %2, float %4, float %12)
%21 = tail call i32 @nvg__vset(ptr noundef nonnull %17, float noundef %19, float noundef %20, i32 noundef 1, i32 noundef 1) #3
%22 = getelementptr inbounds i8, ptr %0, i64 8
%23 = tail call float @llvm.fmuladd.f32(float %2, float %6, float %14)
%24 = tail call float @llvm.fmuladd.f32(float %3, float %6, float %15)
%25 = tail call i32 @nvg__vset(ptr noundef nonnull %22, float noundef %23, float noundef %24, i32 noundef 0, i32 noundef 0) #3
%26 = getelementptr inbounds i8, ptr %0, i64 12
%27 = tail call float @llvm.fmuladd.f32(float %2, float %6, float %19)
%28 = tail call float @llvm.fmuladd.f32(float %3, float %6, float %20)
%29 = tail call i32 @nvg__vset(ptr noundef nonnull %26, float noundef %27, float noundef %28, i32 noundef 1, i32 noundef 0) #3
%30 = getelementptr inbounds i8, ptr %0, i64 16
ret ptr %30
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare float @llvm.fmuladd.f32(float, float, float) #1
declare i32 @nvg__vset(ptr noundef, float noundef, float noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_3__", !8, i64 0, !8, i64 4}
!8 = !{!"float", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!7, !8, i64 4}
| openpilot_phonelibs_nanovg_extr_nanovg.c_nvg__buttCapEnd |
; ModuleID = 'AnghaBench/freebsd/contrib/unbound/validator/extr_val_nsec3.c_nsec3_prove_nodata.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/validator/extr_val_nsec3.c_nsec3_prove_nodata.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.nsec3_filter = type { i32 }
@sec_status_bogus = dso_local local_unnamed_addr global i32 0, align 4
@nsec3_hash_cmp = dso_local global i32 0, align 4
@sec_status_insecure = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @nsec3_prove_nodata(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3, ptr noundef %4, ptr noundef %5) local_unnamed_addr #0 {
%7 = alloca i32, align 4
%8 = alloca %struct.nsec3_filter, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
%9 = icmp ne ptr %2, null
%10 = icmp ne i64 %3, 0
%11 = and i1 %9, %10
%12 = icmp ne ptr %5, null
%13 = and i1 %11, %12
br i1 %13, label %14, label %17
14: ; preds = %6
%15 = tail call i32 @key_entry_isgood(ptr noundef nonnull %5) #3
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %19
17: ; preds = %14, %6
%18 = load i32, ptr @sec_status_bogus, align 4, !tbaa !5
br label %33
19: ; preds = %14
%20 = call i32 @rbtree_init(ptr noundef nonnull %7, ptr noundef nonnull @nsec3_hash_cmp) #3
%21 = call i32 @filter_init(ptr noundef nonnull %8, ptr noundef nonnull %2, i64 noundef %3, ptr noundef %4) #3
%22 = load i32, ptr %8, align 4, !tbaa !9
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %26
24: ; preds = %19
%25 = load i32, ptr @sec_status_bogus, align 4, !tbaa !5
br label %33
26: ; preds = %19
%27 = call i64 @nsec3_iteration_count_high(ptr noundef %1, ptr noundef nonnull %8, ptr noundef nonnull %5) #3
%28 = icmp eq i64 %27, 0
br i1 %28, label %31, label %29
29: ; preds = %26
%30 = load i32, ptr @sec_status_insecure, align 4, !tbaa !5
br label %33
31: ; preds = %26
%32 = call i32 @nsec3_do_prove_nodata(ptr noundef %0, ptr noundef nonnull %8, ptr noundef nonnull %7, ptr noundef %4) #3
br label %33
33: ; preds = %31, %29, %24, %17
%34 = phi i32 [ %30, %29 ], [ %32, %31 ], [ %25, %24 ], [ %18, %17 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
ret i32 %34
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @key_entry_isgood(ptr noundef) local_unnamed_addr #2
declare i32 @rbtree_init(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @filter_init(ptr noundef, ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @nsec3_iteration_count_high(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @nsec3_do_prove_nodata(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"nsec3_filter", !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/unbound/validator/extr_val_nsec3.c_nsec3_prove_nodata.c'
source_filename = "AnghaBench/freebsd/contrib/unbound/validator/extr_val_nsec3.c_nsec3_prove_nodata.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.nsec3_filter = type { i32 }
@sec_status_bogus = common local_unnamed_addr global i32 0, align 4
@nsec3_hash_cmp = common global i32 0, align 4
@sec_status_insecure = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @nsec3_prove_nodata(ptr noundef %0, ptr noundef %1, ptr noundef %2, i64 noundef %3, ptr noundef %4, ptr noundef %5) local_unnamed_addr #0 {
%7 = alloca i32, align 4
%8 = alloca %struct.nsec3_filter, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
%9 = icmp ne ptr %2, null
%10 = icmp ne i64 %3, 0
%11 = and i1 %9, %10
%12 = icmp ne ptr %5, null
%13 = and i1 %11, %12
br i1 %13, label %14, label %17
14: ; preds = %6
%15 = tail call i32 @key_entry_isgood(ptr noundef nonnull %5) #3
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %19
17: ; preds = %14, %6
%18 = load i32, ptr @sec_status_bogus, align 4, !tbaa !6
br label %33
19: ; preds = %14
%20 = call i32 @rbtree_init(ptr noundef nonnull %7, ptr noundef nonnull @nsec3_hash_cmp) #3
%21 = call i32 @filter_init(ptr noundef nonnull %8, ptr noundef nonnull %2, i64 noundef %3, ptr noundef %4) #3
%22 = load i32, ptr %8, align 4, !tbaa !10
%23 = icmp eq i32 %22, 0
br i1 %23, label %24, label %26
24: ; preds = %19
%25 = load i32, ptr @sec_status_bogus, align 4, !tbaa !6
br label %33
26: ; preds = %19
%27 = call i64 @nsec3_iteration_count_high(ptr noundef %1, ptr noundef nonnull %8, ptr noundef nonnull %5) #3
%28 = icmp eq i64 %27, 0
br i1 %28, label %31, label %29
29: ; preds = %26
%30 = load i32, ptr @sec_status_insecure, align 4, !tbaa !6
br label %33
31: ; preds = %26
%32 = call i32 @nsec3_do_prove_nodata(ptr noundef %0, ptr noundef nonnull %8, ptr noundef nonnull %7, ptr noundef %4) #3
br label %33
33: ; preds = %31, %29, %24, %17
%34 = phi i32 [ %30, %29 ], [ %32, %31 ], [ %25, %24 ], [ %18, %17 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
ret i32 %34
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @key_entry_isgood(ptr noundef) local_unnamed_addr #2
declare i32 @rbtree_init(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @filter_init(ptr noundef, ptr noundef, i64 noundef, ptr noundef) local_unnamed_addr #2
declare i64 @nsec3_iteration_count_high(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @nsec3_do_prove_nodata(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"nsec3_filter", !7, i64 0}
| freebsd_contrib_unbound_validator_extr_val_nsec3.c_nsec3_prove_nodata |
; ModuleID = 'AnghaBench/linux/net/ieee802154/6lowpan/extr_reassembly.c_lowpan_frag_reasm.c'
source_filename = "AnghaBench/linux/net/ieee802154/6lowpan/extr_reassembly.c_lowpan_frag_reasm.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sk_buff = type { i32, ptr }
%struct.TYPE_4__ = type { ptr, ptr, i32, i32 }
@RB_ROOT = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [45 x i8] c"lowpan_frag_reasm: no memory for reassembly\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @lowpan_frag_reasm], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @lowpan_frag_reasm(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = tail call i32 @inet_frag_kill(ptr noundef %0) #3
%6 = tail call ptr @inet_frag_reasm_prepare(ptr noundef %0, ptr noundef %1, ptr noundef %2) #3
%7 = icmp eq ptr %6, null
br i1 %7, label %15, label %8
8: ; preds = %4
%9 = tail call i32 @inet_frag_reasm_finish(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %6, i32 noundef 0) #3
%10 = getelementptr inbounds %struct.sk_buff, ptr %1, i64 0, i32 1
store ptr %3, ptr %10, align 8, !tbaa !5
%11 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 3
%12 = load i32, ptr %11, align 4, !tbaa !11
store i32 %12, ptr %1, align 8, !tbaa !14
%13 = load i32, ptr @RB_ROOT, align 4, !tbaa !15
%14 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 2
store i32 %13, ptr %14, align 8, !tbaa !16
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %0, i8 0, i64 16, i1 false)
br label %17
15: ; preds = %4
%16 = tail call i32 @net_dbg_ratelimited(ptr noundef nonnull @.str) #3
br label %17
17: ; preds = %15, %8
%18 = phi i32 [ 1, %8 ], [ -1, %15 ]
ret i32 %18
}
declare i32 @inet_frag_kill(ptr noundef) local_unnamed_addr #1
declare ptr @inet_frag_reasm_prepare(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @inet_frag_reasm_finish(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @net_dbg_ratelimited(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"sk_buff", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !7, i64 20}
!12 = !{!"lowpan_frag_queue", !13, i64 0}
!13 = !{!"TYPE_4__", !10, i64 0, !10, i64 8, !7, i64 16, !7, i64 20}
!14 = !{!6, !7, i64 0}
!15 = !{!7, !7, i64 0}
!16 = !{!12, !7, i64 16}
| ; ModuleID = 'AnghaBench/linux/net/ieee802154/6lowpan/extr_reassembly.c_lowpan_frag_reasm.c'
source_filename = "AnghaBench/linux/net/ieee802154/6lowpan/extr_reassembly.c_lowpan_frag_reasm.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@RB_ROOT = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [45 x i8] c"lowpan_frag_reasm: no memory for reassembly\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @lowpan_frag_reasm], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -1, 2) i32 @lowpan_frag_reasm(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = tail call i32 @inet_frag_kill(ptr noundef %0) #3
%6 = tail call ptr @inet_frag_reasm_prepare(ptr noundef %0, ptr noundef %1, ptr noundef %2) #3
%7 = icmp eq ptr %6, null
br i1 %7, label %15, label %8
8: ; preds = %4
%9 = tail call i32 @inet_frag_reasm_finish(ptr noundef %0, ptr noundef %1, ptr noundef nonnull %6, i32 noundef 0) #3
%10 = getelementptr inbounds i8, ptr %1, i64 8
store ptr %3, ptr %10, align 8, !tbaa !6
%11 = getelementptr inbounds i8, ptr %0, i64 20
%12 = load i32, ptr %11, align 4, !tbaa !12
store i32 %12, ptr %1, align 8, !tbaa !15
%13 = load i32, ptr @RB_ROOT, align 4, !tbaa !16
%14 = getelementptr inbounds i8, ptr %0, i64 16
store i32 %13, ptr %14, align 8, !tbaa !17
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %0, i8 0, i64 16, i1 false)
br label %17
15: ; preds = %4
%16 = tail call i32 @net_dbg_ratelimited(ptr noundef nonnull @.str) #3
br label %17
17: ; preds = %15, %8
%18 = phi i32 [ 1, %8 ], [ -1, %15 ]
ret i32 %18
}
declare i32 @inet_frag_kill(ptr noundef) local_unnamed_addr #1
declare ptr @inet_frag_reasm_prepare(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @inet_frag_reasm_finish(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @net_dbg_ratelimited(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"sk_buff", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !8, i64 20}
!13 = !{!"lowpan_frag_queue", !14, i64 0}
!14 = !{!"TYPE_4__", !11, i64 0, !11, i64 8, !8, i64 16, !8, i64 20}
!15 = !{!7, !8, i64 0}
!16 = !{!8, !8, i64 0}
!17 = !{!13, !8, i64 16}
| linux_net_ieee802154_6lowpan_extr_reassembly.c_lowpan_frag_reasm |
; ModuleID = 'AnghaBench/radare2/shlr/mpc/extr_mpc.c_mpca_many1.c'
source_filename = "AnghaBench/radare2/shlr/mpc/extr_mpc.c_mpca_many1.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@mpcf_fold_ast = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @mpca_many1(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @mpcf_fold_ast, align 4, !tbaa !5
%3 = tail call ptr @mpc_many1(i32 noundef %2, ptr noundef %0) #2
ret ptr %3
}
declare ptr @mpc_many1(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/radare2/shlr/mpc/extr_mpc.c_mpca_many1.c'
source_filename = "AnghaBench/radare2/shlr/mpc/extr_mpc.c_mpca_many1.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@mpcf_fold_ast = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @mpca_many1(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @mpcf_fold_ast, align 4, !tbaa !6
%3 = tail call ptr @mpc_many1(i32 noundef %2, ptr noundef %0) #2
ret ptr %3
}
declare ptr @mpc_many1(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| radare2_shlr_mpc_extr_mpc.c_mpca_many1 |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/marvell/octeontx2/af/extr_rvu.c_rvu_mbox_handler_attach_resources.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/marvell/octeontx2/af/extr_rvu.c_rvu_mbox_handler_attach_resources.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.rsrc_attach = type { i32, i32, i32, i32, i64, i64, i64, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i32 }
@BLKTYPE_NPA = dso_local local_unnamed_addr global i32 0, align 4
@BLKTYPE_NIX = dso_local local_unnamed_addr global i32 0, align 4
@BLKTYPE_SSO = dso_local local_unnamed_addr global i32 0, align 4
@BLKTYPE_SSOW = dso_local local_unnamed_addr global i32 0, align 4
@BLKTYPE_TIM = dso_local local_unnamed_addr global i32 0, align 4
@BLKTYPE_CPT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @rvu_mbox_handler_attach_resources], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @rvu_mbox_handler_attach_resources(ptr noundef %0, ptr noundef %1, ptr nocapture readnone %2) #0 {
%4 = getelementptr inbounds %struct.rsrc_attach, ptr %1, i64 0, i32 7
%5 = load i32, ptr %4, align 8, !tbaa !5
%6 = getelementptr inbounds %struct.rsrc_attach, ptr %1, i64 0, i32 4
%7 = load i64, ptr %6, align 8, !tbaa !12
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %3
%10 = tail call i32 @rvu_detach_rsrcs(ptr noundef %0, ptr noundef null, i32 noundef %5) #2
br label %11
11: ; preds = %9, %3
%12 = tail call i32 @mutex_lock(ptr noundef %0) #2
%13 = tail call i32 @rvu_check_rsrc_availability(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %5) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %88
15: ; preds = %11
%16 = getelementptr inbounds %struct.rsrc_attach, ptr %1, i64 0, i32 6
%17 = load i64, ptr %16, align 8, !tbaa !13
%18 = icmp eq i64 %17, 0
br i1 %18, label %22, label %19
19: ; preds = %15
%20 = load i32, ptr @BLKTYPE_NPA, align 4, !tbaa !14
%21 = tail call i32 @rvu_attach_block(ptr noundef %0, i32 noundef %5, i32 noundef %20, i32 noundef 1) #2
br label %22
22: ; preds = %19, %15
%23 = getelementptr inbounds %struct.rsrc_attach, ptr %1, i64 0, i32 5
%24 = load i64, ptr %23, align 8, !tbaa !15
%25 = icmp eq i64 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %22
%27 = load i32, ptr @BLKTYPE_NIX, align 4, !tbaa !14
%28 = tail call i32 @rvu_attach_block(ptr noundef %0, i32 noundef %5, i32 noundef %27, i32 noundef 1) #2
br label %29
29: ; preds = %26, %22
%30 = load i32, ptr %1, align 8, !tbaa !16
%31 = icmp eq i32 %30, 0
br i1 %31, label %43, label %32
32: ; preds = %29
%33 = load i64, ptr %6, align 8, !tbaa !12
%34 = icmp eq i64 %33, 0
br i1 %34, label %39, label %35
35: ; preds = %32
%36 = load i32, ptr @BLKTYPE_SSO, align 4, !tbaa !14
%37 = tail call i32 @rvu_detach_block(ptr noundef %0, i32 noundef %5, i32 noundef %36) #2
%38 = load i32, ptr %1, align 8, !tbaa !16
br label %39
39: ; preds = %35, %32
%40 = phi i32 [ %38, %35 ], [ %30, %32 ]
%41 = load i32, ptr @BLKTYPE_SSO, align 4, !tbaa !14
%42 = tail call i32 @rvu_attach_block(ptr noundef %0, i32 noundef %5, i32 noundef %41, i32 noundef %40) #2
br label %43
43: ; preds = %39, %29
%44 = getelementptr inbounds %struct.rsrc_attach, ptr %1, i64 0, i32 1
%45 = load i32, ptr %44, align 4, !tbaa !17
%46 = icmp eq i32 %45, 0
br i1 %46, label %58, label %47
47: ; preds = %43
%48 = load i64, ptr %6, align 8, !tbaa !12
%49 = icmp eq i64 %48, 0
br i1 %49, label %54, label %50
50: ; preds = %47
%51 = load i32, ptr @BLKTYPE_SSOW, align 4, !tbaa !14
%52 = tail call i32 @rvu_detach_block(ptr noundef %0, i32 noundef %5, i32 noundef %51) #2
%53 = load i32, ptr %44, align 4, !tbaa !17
br label %54
54: ; preds = %50, %47
%55 = phi i32 [ %53, %50 ], [ %45, %47 ]
%56 = load i32, ptr @BLKTYPE_SSOW, align 4, !tbaa !14
%57 = tail call i32 @rvu_attach_block(ptr noundef %0, i32 noundef %5, i32 noundef %56, i32 noundef %55) #2
br label %58
58: ; preds = %54, %43
%59 = getelementptr inbounds %struct.rsrc_attach, ptr %1, i64 0, i32 2
%60 = load i32, ptr %59, align 8, !tbaa !18
%61 = icmp eq i32 %60, 0
br i1 %61, label %73, label %62
62: ; preds = %58
%63 = load i64, ptr %6, align 8, !tbaa !12
%64 = icmp eq i64 %63, 0
br i1 %64, label %69, label %65
65: ; preds = %62
%66 = load i32, ptr @BLKTYPE_TIM, align 4, !tbaa !14
%67 = tail call i32 @rvu_detach_block(ptr noundef %0, i32 noundef %5, i32 noundef %66) #2
%68 = load i32, ptr %59, align 8, !tbaa !18
br label %69
69: ; preds = %65, %62
%70 = phi i32 [ %68, %65 ], [ %60, %62 ]
%71 = load i32, ptr @BLKTYPE_TIM, align 4, !tbaa !14
%72 = tail call i32 @rvu_attach_block(ptr noundef %0, i32 noundef %5, i32 noundef %71, i32 noundef %70) #2
br label %73
73: ; preds = %69, %58
%74 = getelementptr inbounds %struct.rsrc_attach, ptr %1, i64 0, i32 3
%75 = load i32, ptr %74, align 4, !tbaa !19
%76 = icmp eq i32 %75, 0
br i1 %76, label %88, label %77
77: ; preds = %73
%78 = load i64, ptr %6, align 8, !tbaa !12
%79 = icmp eq i64 %78, 0
br i1 %79, label %84, label %80
80: ; preds = %77
%81 = load i32, ptr @BLKTYPE_CPT, align 4, !tbaa !14
%82 = tail call i32 @rvu_detach_block(ptr noundef %0, i32 noundef %5, i32 noundef %81) #2
%83 = load i32, ptr %74, align 4, !tbaa !19
br label %84
84: ; preds = %80, %77
%85 = phi i32 [ %83, %80 ], [ %75, %77 ]
%86 = load i32, ptr @BLKTYPE_CPT, align 4, !tbaa !14
%87 = tail call i32 @rvu_attach_block(ptr noundef %0, i32 noundef %5, i32 noundef %86, i32 noundef %85) #2
br label %88
88: ; preds = %73, %84, %11
%89 = tail call i32 @mutex_unlock(ptr noundef %0) #2
ret i32 %13
}
declare i32 @rvu_detach_rsrcs(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @rvu_check_rsrc_availability(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rvu_attach_block(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rvu_detach_block(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 40}
!6 = !{!"rsrc_attach", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !10, i64 16, !10, i64 24, !10, i64 32, !11, i64 40}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
!12 = !{!6, !10, i64 16}
!13 = !{!6, !10, i64 32}
!14 = !{!7, !7, i64 0}
!15 = !{!6, !10, i64 24}
!16 = !{!6, !7, i64 0}
!17 = !{!6, !7, i64 4}
!18 = !{!6, !7, i64 8}
!19 = !{!6, !7, i64 12}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/marvell/octeontx2/af/extr_rvu.c_rvu_mbox_handler_attach_resources.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/marvell/octeontx2/af/extr_rvu.c_rvu_mbox_handler_attach_resources.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BLKTYPE_NPA = common local_unnamed_addr global i32 0, align 4
@BLKTYPE_NIX = common local_unnamed_addr global i32 0, align 4
@BLKTYPE_SSO = common local_unnamed_addr global i32 0, align 4
@BLKTYPE_SSOW = common local_unnamed_addr global i32 0, align 4
@BLKTYPE_TIM = common local_unnamed_addr global i32 0, align 4
@BLKTYPE_CPT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @rvu_mbox_handler_attach_resources], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @rvu_mbox_handler_attach_resources(ptr noundef %0, ptr noundef %1, ptr nocapture readnone %2) #0 {
%4 = getelementptr inbounds i8, ptr %1, i64 40
%5 = load i32, ptr %4, align 8, !tbaa !6
%6 = getelementptr inbounds i8, ptr %1, i64 16
%7 = load i64, ptr %6, align 8, !tbaa !13
%8 = icmp eq i64 %7, 0
br i1 %8, label %9, label %11
9: ; preds = %3
%10 = tail call i32 @rvu_detach_rsrcs(ptr noundef %0, ptr noundef null, i32 noundef %5) #2
br label %11
11: ; preds = %9, %3
%12 = tail call i32 @mutex_lock(ptr noundef %0) #2
%13 = tail call i32 @rvu_check_rsrc_availability(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %5) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %88
15: ; preds = %11
%16 = getelementptr inbounds i8, ptr %1, i64 32
%17 = load i64, ptr %16, align 8, !tbaa !14
%18 = icmp eq i64 %17, 0
br i1 %18, label %22, label %19
19: ; preds = %15
%20 = load i32, ptr @BLKTYPE_NPA, align 4, !tbaa !15
%21 = tail call i32 @rvu_attach_block(ptr noundef %0, i32 noundef %5, i32 noundef %20, i32 noundef 1) #2
br label %22
22: ; preds = %19, %15
%23 = getelementptr inbounds i8, ptr %1, i64 24
%24 = load i64, ptr %23, align 8, !tbaa !16
%25 = icmp eq i64 %24, 0
br i1 %25, label %29, label %26
26: ; preds = %22
%27 = load i32, ptr @BLKTYPE_NIX, align 4, !tbaa !15
%28 = tail call i32 @rvu_attach_block(ptr noundef %0, i32 noundef %5, i32 noundef %27, i32 noundef 1) #2
br label %29
29: ; preds = %26, %22
%30 = load i32, ptr %1, align 8, !tbaa !17
%31 = icmp eq i32 %30, 0
br i1 %31, label %43, label %32
32: ; preds = %29
%33 = load i64, ptr %6, align 8, !tbaa !13
%34 = icmp eq i64 %33, 0
br i1 %34, label %39, label %35
35: ; preds = %32
%36 = load i32, ptr @BLKTYPE_SSO, align 4, !tbaa !15
%37 = tail call i32 @rvu_detach_block(ptr noundef %0, i32 noundef %5, i32 noundef %36) #2
%38 = load i32, ptr %1, align 8, !tbaa !17
br label %39
39: ; preds = %35, %32
%40 = phi i32 [ %38, %35 ], [ %30, %32 ]
%41 = load i32, ptr @BLKTYPE_SSO, align 4, !tbaa !15
%42 = tail call i32 @rvu_attach_block(ptr noundef %0, i32 noundef %5, i32 noundef %41, i32 noundef %40) #2
br label %43
43: ; preds = %39, %29
%44 = getelementptr inbounds i8, ptr %1, i64 4
%45 = load i32, ptr %44, align 4, !tbaa !18
%46 = icmp eq i32 %45, 0
br i1 %46, label %58, label %47
47: ; preds = %43
%48 = load i64, ptr %6, align 8, !tbaa !13
%49 = icmp eq i64 %48, 0
br i1 %49, label %54, label %50
50: ; preds = %47
%51 = load i32, ptr @BLKTYPE_SSOW, align 4, !tbaa !15
%52 = tail call i32 @rvu_detach_block(ptr noundef %0, i32 noundef %5, i32 noundef %51) #2
%53 = load i32, ptr %44, align 4, !tbaa !18
br label %54
54: ; preds = %50, %47
%55 = phi i32 [ %53, %50 ], [ %45, %47 ]
%56 = load i32, ptr @BLKTYPE_SSOW, align 4, !tbaa !15
%57 = tail call i32 @rvu_attach_block(ptr noundef %0, i32 noundef %5, i32 noundef %56, i32 noundef %55) #2
br label %58
58: ; preds = %54, %43
%59 = getelementptr inbounds i8, ptr %1, i64 8
%60 = load i32, ptr %59, align 8, !tbaa !19
%61 = icmp eq i32 %60, 0
br i1 %61, label %73, label %62
62: ; preds = %58
%63 = load i64, ptr %6, align 8, !tbaa !13
%64 = icmp eq i64 %63, 0
br i1 %64, label %69, label %65
65: ; preds = %62
%66 = load i32, ptr @BLKTYPE_TIM, align 4, !tbaa !15
%67 = tail call i32 @rvu_detach_block(ptr noundef %0, i32 noundef %5, i32 noundef %66) #2
%68 = load i32, ptr %59, align 8, !tbaa !19
br label %69
69: ; preds = %65, %62
%70 = phi i32 [ %68, %65 ], [ %60, %62 ]
%71 = load i32, ptr @BLKTYPE_TIM, align 4, !tbaa !15
%72 = tail call i32 @rvu_attach_block(ptr noundef %0, i32 noundef %5, i32 noundef %71, i32 noundef %70) #2
br label %73
73: ; preds = %69, %58
%74 = getelementptr inbounds i8, ptr %1, i64 12
%75 = load i32, ptr %74, align 4, !tbaa !20
%76 = icmp eq i32 %75, 0
br i1 %76, label %88, label %77
77: ; preds = %73
%78 = load i64, ptr %6, align 8, !tbaa !13
%79 = icmp eq i64 %78, 0
br i1 %79, label %84, label %80
80: ; preds = %77
%81 = load i32, ptr @BLKTYPE_CPT, align 4, !tbaa !15
%82 = tail call i32 @rvu_detach_block(ptr noundef %0, i32 noundef %5, i32 noundef %81) #2
%83 = load i32, ptr %74, align 4, !tbaa !20
br label %84
84: ; preds = %80, %77
%85 = phi i32 [ %83, %80 ], [ %75, %77 ]
%86 = load i32, ptr @BLKTYPE_CPT, align 4, !tbaa !15
%87 = tail call i32 @rvu_attach_block(ptr noundef %0, i32 noundef %5, i32 noundef %86, i32 noundef %85) #2
br label %88
88: ; preds = %73, %84, %11
%89 = tail call i32 @mutex_unlock(ptr noundef %0) #2
ret i32 %13
}
declare i32 @rvu_detach_rsrcs(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @rvu_check_rsrc_availability(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rvu_attach_block(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @rvu_detach_block(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 40}
!7 = !{!"rsrc_attach", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12, !11, i64 16, !11, i64 24, !11, i64 32, !12, i64 40}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"TYPE_2__", !8, i64 0}
!13 = !{!7, !11, i64 16}
!14 = !{!7, !11, i64 32}
!15 = !{!8, !8, i64 0}
!16 = !{!7, !11, i64 24}
!17 = !{!7, !8, i64 0}
!18 = !{!7, !8, i64 4}
!19 = !{!7, !8, i64 8}
!20 = !{!7, !8, i64 12}
| linux_drivers_net_ethernet_marvell_octeontx2_af_extr_rvu.c_rvu_mbox_handler_attach_resources |
; ModuleID = 'AnghaBench/freebsd/sbin/ifconfig/extr_ifbridge.c_setbridge_ifmaxaddr.c'
source_filename = "AnghaBench/freebsd/sbin/ifconfig/extr_ifbridge.c_setbridge_ifmaxaddr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ifbreq = type { i32, i32 }
@.str = private unnamed_addr constant [18 x i8] c"invalid value: %s\00", align 1
@BRDGSIFAMAX = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [15 x i8] c"BRDGSIFAMAX %s\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @setbridge_ifmaxaddr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @setbridge_ifmaxaddr(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr nocapture readnone %3) #0 {
%5 = alloca %struct.ifbreq, align 4
%6 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
%7 = call i32 @memset(ptr noundef nonnull %5, i32 noundef 0, i32 noundef 8) #3
%8 = call i64 @get_val(ptr noundef %1, ptr noundef nonnull %6) #3
%9 = icmp slt i64 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %4
%11 = call i32 @errx(i32 noundef 1, ptr noundef nonnull @.str, ptr noundef %1) #3
br label %12
12: ; preds = %4, %10
%13 = getelementptr inbounds %struct.ifbreq, ptr %5, i64 0, i32 1
%14 = load i32, ptr %13, align 4, !tbaa !5
%15 = call i32 @strlcpy(i32 noundef %14, ptr noundef %0, i32 noundef 4) #3
%16 = load i32, ptr %6, align 4, !tbaa !10
store i32 %16, ptr %5, align 4, !tbaa !11
%17 = load i32, ptr @BRDGSIFAMAX, align 4, !tbaa !10
%18 = call i64 @do_cmd(i32 noundef %2, i32 noundef %17, ptr noundef nonnull %5, i32 noundef 8, i32 noundef 1) #3
%19 = icmp slt i64 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %12
%21 = call i32 @err(i32 noundef 1, ptr noundef nonnull @.str.1, ptr noundef %1) #3
br label %22
22: ; preds = %20, %12
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @get_val(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @errx(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @strlcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @do_cmd(i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @err(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 4}
!6 = !{!"ifbreq", !7, i64 0, !7, i64 4}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!6, !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/sbin/ifconfig/extr_ifbridge.c_setbridge_ifmaxaddr.c'
source_filename = "AnghaBench/freebsd/sbin/ifconfig/extr_ifbridge.c_setbridge_ifmaxaddr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.ifbreq = type { i32, i32 }
@.str = private unnamed_addr constant [18 x i8] c"invalid value: %s\00", align 1
@BRDGSIFAMAX = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [15 x i8] c"BRDGSIFAMAX %s\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @setbridge_ifmaxaddr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @setbridge_ifmaxaddr(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr nocapture readnone %3) #0 {
%5 = alloca %struct.ifbreq, align 4
%6 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
%7 = call i32 @memset(ptr noundef nonnull %5, i32 noundef 0, i32 noundef 8) #3
%8 = call i64 @get_val(ptr noundef %1, ptr noundef nonnull %6) #3
%9 = icmp slt i64 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %4
%11 = call i32 @errx(i32 noundef 1, ptr noundef nonnull @.str, ptr noundef %1) #3
br label %12
12: ; preds = %4, %10
%13 = getelementptr inbounds i8, ptr %5, i64 4
%14 = load i32, ptr %13, align 4, !tbaa !6
%15 = call i32 @strlcpy(i32 noundef %14, ptr noundef %0, i32 noundef 4) #3
%16 = load i32, ptr %6, align 4, !tbaa !11
store i32 %16, ptr %5, align 4, !tbaa !12
%17 = load i32, ptr @BRDGSIFAMAX, align 4, !tbaa !11
%18 = call i64 @do_cmd(i32 noundef %2, i32 noundef %17, ptr noundef nonnull %5, i32 noundef 8, i32 noundef 1) #3
%19 = icmp slt i64 %18, 0
br i1 %19, label %20, label %22
20: ; preds = %12
%21 = call i32 @err(i32 noundef 1, ptr noundef nonnull @.str.1, ptr noundef %1) #3
br label %22
22: ; preds = %20, %12
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @get_val(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @errx(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @strlcpy(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @do_cmd(i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @err(i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 4}
!7 = !{!"ifbreq", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!7, !8, i64 0}
| freebsd_sbin_ifconfig_extr_ifbridge.c_setbridge_ifmaxaddr |
; ModuleID = 'AnghaBench/seafile/daemon/extr_wt-monitor-win32.c_handle_refresh_repo.c'
source_filename = "AnghaBench/seafile/daemon/extr_wt-monitor-win32.c_handle_refresh_repo.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @handle_refresh_repo], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @handle_refresh_repo(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/seafile/daemon/extr_wt-monitor-win32.c_handle_refresh_repo.c'
source_filename = "AnghaBench/seafile/daemon/extr_wt-monitor-win32.c_handle_refresh_repo.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @handle_refresh_repo], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @handle_refresh_repo(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| seafile_daemon_extr_wt-monitor-win32.c_handle_refresh_repo |
; ModuleID = 'AnghaBench/freebsd/contrib/tcpdump/extr_strtoaddr.c_strtoaddr.c'
source_filename = "AnghaBench/freebsd/contrib/tcpdump/extr_strtoaddr.c_strtoaddr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@NS_INADDRSZ = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @strtoaddr(ptr nocapture noundef readonly %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
%4 = alloca [4 x i32], align 16
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #4
%5 = load i8, ptr %0, align 1, !tbaa !5
%6 = tail call i64 @isdigit(i8 noundef zeroext %5) #4
%7 = icmp eq i64 %6, 0
br i1 %7, label %89, label %8
8: ; preds = %2, %51
%9 = phi i8 [ %55, %51 ], [ %5, %2 ]
%10 = phi ptr [ %54, %51 ], [ %4, %2 ]
%11 = phi i64 [ %52, %51 ], [ 0, %2 ]
%12 = phi ptr [ %53, %51 ], [ %0, %2 ]
store i32 0, ptr %3, align 4, !tbaa !8
%13 = icmp eq i8 %9, 48
br i1 %13, label %14, label %24
14: ; preds = %8
%15 = getelementptr inbounds i8, ptr %12, i64 1
%16 = load i8, ptr %15, align 1, !tbaa !5
%17 = and i8 %16, -33
%18 = icmp eq i8 %17, 88
br i1 %18, label %89, label %19
19: ; preds = %14
%20 = tail call i64 @isdigit(i8 noundef zeroext %16) #4
%21 = icmp ne i64 %20, 0
%22 = icmp ne i8 %16, 57
%23 = and i1 %22, %21
br i1 %23, label %89, label %24
24: ; preds = %19, %8
%25 = phi ptr [ %15, %19 ], [ %12, %8 ]
%26 = phi i8 [ %16, %19 ], [ %9, %8 ]
%27 = tail call i64 @isdigit(i8 noundef zeroext %26) #4
%28 = icmp eq i64 %27, 0
%29 = icmp ugt i8 %26, 57
%30 = or i1 %29, %28
br i1 %30, label %45, label %31
31: ; preds = %24, %31
%32 = phi i8 [ %40, %31 ], [ %26, %24 ]
%33 = phi ptr [ %39, %31 ], [ %25, %24 ]
%34 = phi i32 [ %38, %31 ], [ 0, %24 ]
%35 = zext nneg i8 %32 to i32
%36 = add nsw i32 %35, -48
%37 = mul nsw i32 %34, 10
%38 = add nsw i32 %36, %37
store i32 %38, ptr %3, align 4, !tbaa !8
%39 = getelementptr inbounds i8, ptr %33, i64 1
%40 = load i8, ptr %39, align 1, !tbaa !5
%41 = tail call i64 @isdigit(i8 noundef zeroext %40) #4
%42 = icmp eq i64 %41, 0
%43 = icmp ugt i8 %40, 57
%44 = or i1 %43, %42
br i1 %44, label %45, label %31
45: ; preds = %31, %24
%46 = phi i32 [ 0, %24 ], [ %38, %31 ]
%47 = phi ptr [ %25, %24 ], [ %39, %31 ]
%48 = phi i8 [ %26, %24 ], [ %40, %31 ]
switch i8 %48, label %58 [
i8 46, label %49
i8 0, label %64
]
49: ; preds = %45
%50 = icmp ult i64 %11, 12
br i1 %50, label %51, label %89
51: ; preds = %49
%52 = add nuw nsw i64 %11, 4
store i32 %46, ptr %10, align 4, !tbaa !8
%53 = getelementptr inbounds i8, ptr %47, i64 1
%54 = getelementptr inbounds i8, ptr %4, i64 %52
%55 = load i8, ptr %53, align 1, !tbaa !5
%56 = tail call i64 @isdigit(i8 noundef zeroext %55) #4
%57 = icmp eq i64 %56, 0
br i1 %57, label %89, label %8
58: ; preds = %45
%59 = tail call i32 @isspace(i8 noundef zeroext %48) #4
%60 = icmp ne i32 %59, 0
%61 = and i64 %11, 17179869180
%62 = icmp eq i64 %61, 12
%63 = select i1 %60, i1 %62, i1 false
br i1 %63, label %67, label %89
64: ; preds = %45
%65 = and i64 %11, 17179869180
%66 = icmp eq i64 %65, 12
br i1 %66, label %67, label %89
67: ; preds = %58, %64
%68 = load i32, ptr %4, align 16, !tbaa !8
%69 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 1
%70 = load i32, ptr %69, align 4, !tbaa !8
%71 = or i32 %70, %68
%72 = getelementptr inbounds [4 x i32], ptr %4, i64 0, i64 2
%73 = load i32, ptr %72, align 8, !tbaa !8
%74 = or i32 %71, %73
%75 = or i32 %74, %46
%76 = icmp sgt i32 %75, 255
br i1 %76, label %89, label %77
77: ; preds = %67
%78 = icmp eq ptr %1, null
br i1 %78, label %89, label %79
79: ; preds = %77
%80 = shl i32 %70, 16
%81 = shl i32 %68, 24
%82 = or i32 %80, %81
%83 = shl i32 %73, 8
%84 = or i32 %82, %83
%85 = or i32 %84, %46
%86 = tail call i32 @htonl(i32 noundef %85)
store i32 %86, ptr %3, align 4, !tbaa !8
%87 = load i32, ptr @NS_INADDRSZ, align 4, !tbaa !8
%88 = call i32 @memcpy(ptr noundef nonnull %1, ptr noundef nonnull %3, i32 noundef %87) #4
br label %89
89: ; preds = %51, %14, %19, %49, %2, %77, %79, %67, %64, %58
%90 = phi i32 [ 0, %58 ], [ 0, %64 ], [ 0, %67 ], [ 1, %79 ], [ 1, %77 ], [ 0, %2 ], [ 0, %49 ], [ 0, %19 ], [ 0, %14 ], [ 0, %51 ]
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
ret i32 %90
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @isdigit(i8 noundef zeroext) local_unnamed_addr #2
declare i32 @isspace(i8 noundef zeroext) local_unnamed_addr #2
; Function Attrs: nofree nosync nounwind memory(none)
declare i32 @htonl(i32 noundef) local_unnamed_addr #3
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nosync nounwind memory(none) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = !{!9, !9, i64 0}
!9 = !{!"int", !6, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/tcpdump/extr_strtoaddr.c_strtoaddr.c'
source_filename = "AnghaBench/freebsd/contrib/tcpdump/extr_strtoaddr.c_strtoaddr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NS_INADDRSZ = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 0, 2) i32 @strtoaddr(ptr nocapture noundef readonly %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = alloca i32, align 4
%4 = alloca [4 x i32], align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %4) #4
%5 = load i8, ptr %0, align 1, !tbaa !6
%6 = tail call i64 @isdigit(i8 noundef zeroext %5) #4
%7 = icmp eq i64 %6, 0
br i1 %7, label %88, label %8
8: ; preds = %2, %51
%9 = phi i8 [ %54, %51 ], [ %5, %2 ]
%10 = phi i64 [ %52, %51 ], [ 0, %2 ]
%11 = phi ptr [ %53, %51 ], [ %0, %2 ]
%12 = getelementptr inbounds i8, ptr %4, i64 %10
store i32 0, ptr %3, align 4, !tbaa !9
%13 = icmp eq i8 %9, 48
br i1 %13, label %14, label %24
14: ; preds = %8
%15 = getelementptr inbounds i8, ptr %11, i64 1
%16 = load i8, ptr %15, align 1, !tbaa !6
%17 = and i8 %16, -33
%18 = icmp eq i8 %17, 88
br i1 %18, label %88, label %19
19: ; preds = %14
%20 = tail call i64 @isdigit(i8 noundef zeroext %16) #4
%21 = icmp ne i64 %20, 0
%22 = icmp ne i8 %16, 57
%23 = and i1 %22, %21
br i1 %23, label %88, label %24
24: ; preds = %19, %8
%25 = phi ptr [ %15, %19 ], [ %11, %8 ]
%26 = phi i8 [ %16, %19 ], [ %9, %8 ]
%27 = tail call i64 @isdigit(i8 noundef zeroext %26) #4
%28 = icmp eq i64 %27, 0
%29 = icmp ugt i8 %26, 57
%30 = or i1 %29, %28
br i1 %30, label %45, label %31
31: ; preds = %24, %31
%32 = phi i8 [ %40, %31 ], [ %26, %24 ]
%33 = phi ptr [ %39, %31 ], [ %25, %24 ]
%34 = phi i32 [ %38, %31 ], [ 0, %24 ]
%35 = zext nneg i8 %32 to i32
%36 = add nsw i32 %35, -48
%37 = mul nsw i32 %34, 10
%38 = add nsw i32 %36, %37
store i32 %38, ptr %3, align 4, !tbaa !9
%39 = getelementptr inbounds i8, ptr %33, i64 1
%40 = load i8, ptr %39, align 1, !tbaa !6
%41 = tail call i64 @isdigit(i8 noundef zeroext %40) #4
%42 = icmp eq i64 %41, 0
%43 = icmp ugt i8 %40, 57
%44 = or i1 %43, %42
br i1 %44, label %45, label %31
45: ; preds = %31, %24
%46 = phi i32 [ 0, %24 ], [ %38, %31 ]
%47 = phi ptr [ %25, %24 ], [ %39, %31 ]
%48 = phi i8 [ %26, %24 ], [ %40, %31 ]
switch i8 %48, label %57 [
i8 46, label %49
i8 0, label %63
]
49: ; preds = %45
%50 = icmp ult i64 %10, 12
br i1 %50, label %51, label %88
51: ; preds = %49
%52 = add nuw nsw i64 %10, 4
store i32 %46, ptr %12, align 4, !tbaa !9
%53 = getelementptr inbounds i8, ptr %47, i64 1
%54 = load i8, ptr %53, align 1, !tbaa !6
%55 = tail call i64 @isdigit(i8 noundef zeroext %54) #4
%56 = icmp eq i64 %55, 0
br i1 %56, label %88, label %8
57: ; preds = %45
%58 = tail call i32 @isspace(i8 noundef zeroext %48) #4
%59 = icmp ne i32 %58, 0
%60 = and i64 %10, 17179869180
%61 = icmp eq i64 %60, 12
%62 = select i1 %59, i1 %61, i1 false
br i1 %62, label %66, label %88
63: ; preds = %45
%64 = and i64 %10, 17179869180
%65 = icmp eq i64 %64, 12
br i1 %65, label %66, label %88
66: ; preds = %57, %63
%67 = load i32, ptr %4, align 4, !tbaa !9
%68 = getelementptr inbounds i8, ptr %4, i64 4
%69 = load i32, ptr %68, align 4, !tbaa !9
%70 = or i32 %69, %67
%71 = getelementptr inbounds i8, ptr %4, i64 8
%72 = load i32, ptr %71, align 4, !tbaa !9
%73 = or i32 %70, %72
%74 = or i32 %73, %46
%75 = icmp sgt i32 %74, 255
br i1 %75, label %88, label %76
76: ; preds = %66
%77 = icmp eq ptr %1, null
br i1 %77, label %88, label %78
78: ; preds = %76
%79 = shl i32 %69, 16
%80 = shl i32 %67, 24
%81 = or i32 %79, %80
%82 = shl i32 %72, 8
%83 = or i32 %81, %82
%84 = or i32 %83, %46
%85 = tail call i32 @htonl(i32 noundef %84)
store i32 %85, ptr %3, align 4, !tbaa !9
%86 = load i32, ptr @NS_INADDRSZ, align 4, !tbaa !9
%87 = call i32 @memcpy(ptr noundef nonnull %1, ptr noundef nonnull %3, i32 noundef %86) #4
br label %88
88: ; preds = %51, %14, %19, %49, %2, %76, %78, %66, %63, %57
%89 = phi i32 [ 0, %57 ], [ 0, %63 ], [ 0, %66 ], [ 1, %78 ], [ 1, %76 ], [ 0, %2 ], [ 0, %49 ], [ 0, %19 ], [ 0, %14 ], [ 0, %51 ]
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %4) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
ret i32 %89
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @isdigit(i8 noundef zeroext) local_unnamed_addr #2
declare i32 @isspace(i8 noundef zeroext) local_unnamed_addr #2
; Function Attrs: nofree nosync nounwind memory(none)
declare i32 @htonl(i32 noundef) local_unnamed_addr #3
declare i32 @memcpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nofree nosync nounwind memory(none) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| freebsd_contrib_tcpdump_extr_strtoaddr.c_strtoaddr |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_dispc.c_dispc_ovl_set_fir.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_dispc.c_dispc_ovl_set_fir.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@DISPC_COLOR_COMPONENT_RGB_Y = dso_local local_unnamed_addr global i32 0, align 4
@FEAT_REG_FIRHINC = dso_local local_unnamed_addr global i32 0, align 4
@FEAT_REG_FIRVINC = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @dispc_ovl_set_fir], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @dispc_ovl_set_fir(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca i32, align 4
%9 = alloca i32, align 4
%10 = load i32, ptr @DISPC_COLOR_COMPONENT_RGB_Y, align 4, !tbaa !5
%11 = icmp eq i32 %10, %4
br i1 %11, label %12, label %26
12: ; preds = %5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %9) #3
%13 = load i32, ptr @FEAT_REG_FIRHINC, align 4, !tbaa !5
%14 = call i32 @dispc_get_reg_field(ptr noundef %0, i32 noundef %13, ptr noundef nonnull %6, ptr noundef nonnull %7) #3
%15 = load i32, ptr @FEAT_REG_FIRVINC, align 4, !tbaa !5
%16 = call i32 @dispc_get_reg_field(ptr noundef %0, i32 noundef %15, ptr noundef nonnull %8, ptr noundef nonnull %9) #3
%17 = load i32, ptr %8, align 4, !tbaa !5
%18 = load i32, ptr %9, align 4, !tbaa !5
%19 = call i32 @FLD_VAL(i32 noundef %3, i32 noundef %17, i32 noundef %18) #3
%20 = load i32, ptr %6, align 4, !tbaa !5
%21 = load i32, ptr %7, align 4, !tbaa !5
%22 = call i32 @FLD_VAL(i32 noundef %2, i32 noundef %20, i32 noundef %21) #3
%23 = or i32 %22, %19
%24 = call i32 @DISPC_OVL_FIR(i32 noundef %1) #3
%25 = call i32 @dispc_write_reg(ptr noundef %0, i32 noundef %24, i32 noundef %23) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %9) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
br label %32
26: ; preds = %5
%27 = tail call i32 @FLD_VAL(i32 noundef %3, i32 noundef 28, i32 noundef 16) #3
%28 = tail call i32 @FLD_VAL(i32 noundef %2, i32 noundef 12, i32 noundef 0) #3
%29 = or i32 %28, %27
%30 = tail call i32 @DISPC_OVL_FIR2(i32 noundef %1) #3
%31 = tail call i32 @dispc_write_reg(ptr noundef %0, i32 noundef %30, i32 noundef %29) #3
br label %32
32: ; preds = %26, %12
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @dispc_get_reg_field(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @FLD_VAL(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dispc_write_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @DISPC_OVL_FIR(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @DISPC_OVL_FIR2(i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_dispc.c_dispc_ovl_set_fir.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/omapdrm/dss/extr_dispc.c_dispc_ovl_set_fir.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DISPC_COLOR_COMPONENT_RGB_Y = common local_unnamed_addr global i32 0, align 4
@FEAT_REG_FIRHINC = common local_unnamed_addr global i32 0, align 4
@FEAT_REG_FIRVINC = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @dispc_ovl_set_fir], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @dispc_ovl_set_fir(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
%6 = alloca i32, align 4
%7 = alloca i32, align 4
%8 = alloca i32, align 4
%9 = alloca i32, align 4
%10 = load i32, ptr @DISPC_COLOR_COMPONENT_RGB_Y, align 4, !tbaa !6
%11 = icmp eq i32 %10, %4
br i1 %11, label %12, label %26
12: ; preds = %5
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %6) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %9) #3
%13 = load i32, ptr @FEAT_REG_FIRHINC, align 4, !tbaa !6
%14 = call i32 @dispc_get_reg_field(ptr noundef %0, i32 noundef %13, ptr noundef nonnull %6, ptr noundef nonnull %7) #3
%15 = load i32, ptr @FEAT_REG_FIRVINC, align 4, !tbaa !6
%16 = call i32 @dispc_get_reg_field(ptr noundef %0, i32 noundef %15, ptr noundef nonnull %8, ptr noundef nonnull %9) #3
%17 = load i32, ptr %8, align 4, !tbaa !6
%18 = load i32, ptr %9, align 4, !tbaa !6
%19 = call i32 @FLD_VAL(i32 noundef %3, i32 noundef %17, i32 noundef %18) #3
%20 = load i32, ptr %6, align 4, !tbaa !6
%21 = load i32, ptr %7, align 4, !tbaa !6
%22 = call i32 @FLD_VAL(i32 noundef %2, i32 noundef %20, i32 noundef %21) #3
%23 = or i32 %22, %19
%24 = call i32 @DISPC_OVL_FIR(i32 noundef %1) #3
%25 = call i32 @dispc_write_reg(ptr noundef %0, i32 noundef %24, i32 noundef %23) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %9) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %8) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %6) #3
br label %32
26: ; preds = %5
%27 = tail call i32 @FLD_VAL(i32 noundef %3, i32 noundef 28, i32 noundef 16) #3
%28 = tail call i32 @FLD_VAL(i32 noundef %2, i32 noundef 12, i32 noundef 0) #3
%29 = or i32 %28, %27
%30 = tail call i32 @DISPC_OVL_FIR2(i32 noundef %1) #3
%31 = tail call i32 @dispc_write_reg(ptr noundef %0, i32 noundef %30, i32 noundef %29) #3
br label %32
32: ; preds = %26, %12
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @dispc_get_reg_field(ptr noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @FLD_VAL(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dispc_write_reg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @DISPC_OVL_FIR(i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @DISPC_OVL_FIR2(i32 noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_drm_omapdrm_dss_extr_dispc.c_dispc_ovl_set_fir |
; ModuleID = 'AnghaBench/hashcat/deps/LZMA-SDK/C/Util/7z/extr_7zMain.c_Utf16_To_Utf8.c'
source_filename = "AnghaBench/hashcat/deps/LZMA-SDK/C/Util/7z/extr_7zMain.c_Utf16_To_Utf8.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @Utf16_To_Utf8], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @Utf16_To_Utf8(ptr noundef writeonly %0, ptr noundef readonly %1, ptr noundef readnone %2) #0 {
%4 = icmp eq ptr %1, %2
br i1 %4, label %56, label %5
5: ; preds = %3, %52
%6 = phi ptr [ %54, %52 ], [ %0, %3 ]
%7 = phi ptr [ %53, %52 ], [ %1, %3 ]
%8 = getelementptr inbounds i32, ptr %7, i64 1
%9 = load i32, ptr %7, align 4, !tbaa !5
%10 = icmp slt i32 %9, 128
br i1 %10, label %11, label %15
11: ; preds = %5
%12 = shl i32 %9, 24
%13 = ashr exact i32 %12, 24
%14 = getelementptr inbounds i32, ptr %6, i64 1
store i32 %13, ptr %6, align 4, !tbaa !5
br label %52
15: ; preds = %5
%16 = tail call i32 @_UTF8_RANGE(i32 noundef 1) #2
%17 = icmp slt i32 %9, %16
br i1 %17, label %18, label %23
18: ; preds = %15
%19 = tail call i32 @_UTF8_HEAD(i32 noundef 1, i32 noundef %9) #2
store i32 %19, ptr %6, align 4, !tbaa !5
%20 = tail call i32 @_UTF8_CHAR(i32 noundef 0, i32 noundef %9) #2
%21 = getelementptr inbounds i32, ptr %6, i64 1
store i32 %20, ptr %21, align 4, !tbaa !5
%22 = getelementptr inbounds i32, ptr %6, i64 2
br label %52
23: ; preds = %15
%24 = and i32 %9, 2147482624
%25 = icmp ne i32 %24, 55296
%26 = icmp eq ptr %8, %2
%27 = select i1 %25, i1 true, i1 %26
br i1 %27, label %45, label %28
28: ; preds = %23
%29 = load i32, ptr %8, align 4, !tbaa !5
%30 = and i32 %29, -1024
%31 = icmp eq i32 %30, 56320
br i1 %31, label %32, label %45
32: ; preds = %28
%33 = getelementptr inbounds i32, ptr %7, i64 2
%34 = shl nuw nsw i32 %9, 10
%35 = add nsw i32 %34, -56613888
%36 = add nsw i32 %35, %29
%37 = tail call i32 @_UTF8_HEAD(i32 noundef 3, i32 noundef %36) #2
store i32 %37, ptr %6, align 4, !tbaa !5
%38 = tail call i32 @_UTF8_CHAR(i32 noundef 2, i32 noundef %36) #2
%39 = getelementptr inbounds i32, ptr %6, i64 1
store i32 %38, ptr %39, align 4, !tbaa !5
%40 = tail call i32 @_UTF8_CHAR(i32 noundef 1, i32 noundef %36) #2
%41 = getelementptr inbounds i32, ptr %6, i64 2
store i32 %40, ptr %41, align 4, !tbaa !5
%42 = tail call i32 @_UTF8_CHAR(i32 noundef 0, i32 noundef %36) #2
%43 = getelementptr inbounds i32, ptr %6, i64 3
store i32 %42, ptr %43, align 4, !tbaa !5
%44 = getelementptr inbounds i32, ptr %6, i64 4
br label %52
45: ; preds = %28, %23
%46 = tail call i32 @_UTF8_HEAD(i32 noundef 2, i32 noundef %9) #2
store i32 %46, ptr %6, align 4, !tbaa !5
%47 = tail call i32 @_UTF8_CHAR(i32 noundef 1, i32 noundef %9) #2
%48 = getelementptr inbounds i32, ptr %6, i64 1
store i32 %47, ptr %48, align 4, !tbaa !5
%49 = tail call i32 @_UTF8_CHAR(i32 noundef 0, i32 noundef %9) #2
%50 = getelementptr inbounds i32, ptr %6, i64 2
store i32 %49, ptr %50, align 4, !tbaa !5
%51 = getelementptr inbounds i32, ptr %6, i64 3
br label %52
52: ; preds = %32, %45, %18, %11
%53 = phi ptr [ %8, %11 ], [ %8, %18 ], [ %8, %45 ], [ %33, %32 ]
%54 = phi ptr [ %14, %11 ], [ %22, %18 ], [ %51, %45 ], [ %44, %32 ]
%55 = icmp eq ptr %53, %2
br i1 %55, label %56, label %5
56: ; preds = %52, %3
%57 = phi ptr [ %0, %3 ], [ %54, %52 ]
ret ptr %57
}
declare i32 @_UTF8_RANGE(i32 noundef) local_unnamed_addr #1
declare i32 @_UTF8_HEAD(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @_UTF8_CHAR(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/hashcat/deps/LZMA-SDK/C/Util/7z/extr_7zMain.c_Utf16_To_Utf8.c'
source_filename = "AnghaBench/hashcat/deps/LZMA-SDK/C/Util/7z/extr_7zMain.c_Utf16_To_Utf8.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @Utf16_To_Utf8], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @Utf16_To_Utf8(ptr noundef writeonly %0, ptr noundef readonly %1, ptr noundef readnone %2) #0 {
%4 = icmp eq ptr %1, %2
br i1 %4, label %56, label %5
5: ; preds = %3, %52
%6 = phi ptr [ %54, %52 ], [ %0, %3 ]
%7 = phi ptr [ %53, %52 ], [ %1, %3 ]
%8 = getelementptr inbounds i8, ptr %7, i64 4
%9 = load i32, ptr %7, align 4, !tbaa !6
%10 = icmp slt i32 %9, 128
br i1 %10, label %11, label %15
11: ; preds = %5
%12 = shl i32 %9, 24
%13 = ashr exact i32 %12, 24
%14 = getelementptr inbounds i8, ptr %6, i64 4
store i32 %13, ptr %6, align 4, !tbaa !6
br label %52
15: ; preds = %5
%16 = tail call i32 @_UTF8_RANGE(i32 noundef 1) #2
%17 = icmp slt i32 %9, %16
br i1 %17, label %18, label %23
18: ; preds = %15
%19 = tail call i32 @_UTF8_HEAD(i32 noundef 1, i32 noundef %9) #2
store i32 %19, ptr %6, align 4, !tbaa !6
%20 = tail call i32 @_UTF8_CHAR(i32 noundef 0, i32 noundef %9) #2
%21 = getelementptr inbounds i8, ptr %6, i64 4
store i32 %20, ptr %21, align 4, !tbaa !6
%22 = getelementptr inbounds i8, ptr %6, i64 8
br label %52
23: ; preds = %15
%24 = and i32 %9, 2147482624
%25 = icmp ne i32 %24, 55296
%26 = icmp eq ptr %8, %2
%27 = select i1 %25, i1 true, i1 %26
br i1 %27, label %45, label %28
28: ; preds = %23
%29 = load i32, ptr %8, align 4, !tbaa !6
%30 = and i32 %29, -1024
%31 = icmp eq i32 %30, 56320
br i1 %31, label %32, label %45
32: ; preds = %28
%33 = getelementptr inbounds i8, ptr %7, i64 8
%34 = shl nuw nsw i32 %9, 10
%35 = add nsw i32 %34, -56613888
%36 = add nuw nsw i32 %35, %29
%37 = tail call i32 @_UTF8_HEAD(i32 noundef 3, i32 noundef %36) #2
store i32 %37, ptr %6, align 4, !tbaa !6
%38 = tail call i32 @_UTF8_CHAR(i32 noundef 2, i32 noundef %36) #2
%39 = getelementptr inbounds i8, ptr %6, i64 4
store i32 %38, ptr %39, align 4, !tbaa !6
%40 = tail call i32 @_UTF8_CHAR(i32 noundef 1, i32 noundef %36) #2
%41 = getelementptr inbounds i8, ptr %6, i64 8
store i32 %40, ptr %41, align 4, !tbaa !6
%42 = tail call i32 @_UTF8_CHAR(i32 noundef 0, i32 noundef %36) #2
%43 = getelementptr inbounds i8, ptr %6, i64 12
store i32 %42, ptr %43, align 4, !tbaa !6
%44 = getelementptr inbounds i8, ptr %6, i64 16
br label %52
45: ; preds = %28, %23
%46 = tail call i32 @_UTF8_HEAD(i32 noundef 2, i32 noundef %9) #2
store i32 %46, ptr %6, align 4, !tbaa !6
%47 = tail call i32 @_UTF8_CHAR(i32 noundef 1, i32 noundef %9) #2
%48 = getelementptr inbounds i8, ptr %6, i64 4
store i32 %47, ptr %48, align 4, !tbaa !6
%49 = tail call i32 @_UTF8_CHAR(i32 noundef 0, i32 noundef %9) #2
%50 = getelementptr inbounds i8, ptr %6, i64 8
store i32 %49, ptr %50, align 4, !tbaa !6
%51 = getelementptr inbounds i8, ptr %6, i64 12
br label %52
52: ; preds = %32, %45, %18, %11
%53 = phi ptr [ %8, %11 ], [ %8, %18 ], [ %8, %45 ], [ %33, %32 ]
%54 = phi ptr [ %14, %11 ], [ %22, %18 ], [ %51, %45 ], [ %44, %32 ]
%55 = icmp eq ptr %53, %2
br i1 %55, label %56, label %5
56: ; preds = %52, %3
%57 = phi ptr [ %0, %3 ], [ %54, %52 ]
ret ptr %57
}
declare i32 @_UTF8_RANGE(i32 noundef) local_unnamed_addr #1
declare i32 @_UTF8_HEAD(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @_UTF8_CHAR(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| hashcat_deps_LZMA-SDK_C_Util_7z_extr_7zMain.c_Utf16_To_Utf8 |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/video/nvidia/extr_nv_setup.c_NVReadMiscOut.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/video/nvidia/extr_nv_setup.c_NVReadMiscOut.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@VGA_MIS_R = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @NVReadMiscOut(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
%3 = load i32, ptr @VGA_MIS_R, align 4, !tbaa !10
%4 = tail call i32 @VGA_RD08(i32 noundef %2, i32 noundef %3) #2
ret i32 %4
}
declare i32 @VGA_RD08(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"nvidia_par", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/video/nvidia/extr_nv_setup.c_NVReadMiscOut.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/video/nvidia/extr_nv_setup.c_NVReadMiscOut.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VGA_MIS_R = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @NVReadMiscOut(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
%3 = load i32, ptr @VGA_MIS_R, align 4, !tbaa !11
%4 = tail call i32 @VGA_RD08(i32 noundef %2, i32 noundef %3) #2
ret i32 %4
}
declare i32 @VGA_RD08(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"nvidia_par", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| fastsocket_kernel_drivers_video_nvidia_extr_nv_setup.c_NVReadMiscOut |
; ModuleID = 'AnghaBench/linux/drivers/nvme/target/extr_..hostnvme.h_nvme_mpath_uninit.c'
source_filename = "AnghaBench/linux/drivers/nvme/target/extr_..hostnvme.h_nvme_mpath_uninit.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @nvme_mpath_uninit], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @nvme_mpath_uninit(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/nvme/target/extr_..hostnvme.h_nvme_mpath_uninit.c'
source_filename = "AnghaBench/linux/drivers/nvme/target/extr_..hostnvme.h_nvme_mpath_uninit.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @nvme_mpath_uninit], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @nvme_mpath_uninit(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_nvme_target_extr_..hostnvme.h_nvme_mpath_uninit |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/disp/mdp5/extr_mdp5_mdss.c_mdss_irq.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/disp/mdp5/extr_mdp5_mdss.c_mdss_irq.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@REG_MDSS_HW_INTR_STATUS = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [10 x i8] c"intr=%08x\00", align 1
@IRQ_HANDLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @mdss_irq], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @mdss_irq(i32 %0, ptr noundef %1) #0 {
%3 = load i32, ptr @REG_MDSS_HW_INTR_STATUS, align 4, !tbaa !5
%4 = tail call i32 @mdss_read(ptr noundef %1, i32 noundef %3) #2
%5 = tail call i32 @VERB(ptr noundef nonnull @.str, i32 noundef %4) #2
%6 = icmp eq i32 %4, 0
br i1 %6, label %18, label %7
7: ; preds = %2, %7
%8 = phi i32 [ %16, %7 ], [ %4, %2 ]
%9 = tail call i32 @fls(i32 noundef %8) #2
%10 = add nsw i32 %9, -1
%11 = load i32, ptr %1, align 4, !tbaa !9
%12 = tail call i32 @irq_find_mapping(i32 noundef %11, i32 noundef %10) #2
%13 = tail call i32 @generic_handle_irq(i32 noundef %12) #2
%14 = shl nuw i32 1, %10
%15 = xor i32 %14, -1
%16 = and i32 %8, %15
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %7, !llvm.loop !12
18: ; preds = %7, %2
%19 = load i32, ptr @IRQ_HANDLED, align 4, !tbaa !5
ret i32 %19
}
declare i32 @mdss_read(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @VERB(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fls(i32 noundef) local_unnamed_addr #1
declare i32 @generic_handle_irq(i32 noundef) local_unnamed_addr #1
declare i32 @irq_find_mapping(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"mdp5_mdss", !11, i64 0}
!11 = !{!"TYPE_2__", !6, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/msm/disp/mdp5/extr_mdp5_mdss.c_mdss_irq.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/msm/disp/mdp5/extr_mdp5_mdss.c_mdss_irq.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@REG_MDSS_HW_INTR_STATUS = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [10 x i8] c"intr=%08x\00", align 1
@IRQ_HANDLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @mdss_irq], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @mdss_irq(i32 %0, ptr noundef %1) #0 {
%3 = load i32, ptr @REG_MDSS_HW_INTR_STATUS, align 4, !tbaa !6
%4 = tail call i32 @mdss_read(ptr noundef %1, i32 noundef %3) #2
%5 = tail call i32 @VERB(ptr noundef nonnull @.str, i32 noundef %4) #2
%6 = icmp eq i32 %4, 0
br i1 %6, label %18, label %7
7: ; preds = %2, %7
%8 = phi i32 [ %16, %7 ], [ %4, %2 ]
%9 = tail call i32 @fls(i32 noundef %8) #2
%10 = add nsw i32 %9, -1
%11 = load i32, ptr %1, align 4, !tbaa !10
%12 = tail call i32 @irq_find_mapping(i32 noundef %11, i32 noundef %10) #2
%13 = tail call i32 @generic_handle_irq(i32 noundef %12) #2
%14 = shl nuw i32 1, %10
%15 = xor i32 %14, -1
%16 = and i32 %8, %15
%17 = icmp eq i32 %16, 0
br i1 %17, label %18, label %7, !llvm.loop !13
18: ; preds = %7, %2
%19 = load i32, ptr @IRQ_HANDLED, align 4, !tbaa !6
ret i32 %19
}
declare i32 @mdss_read(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @VERB(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @fls(i32 noundef) local_unnamed_addr #1
declare i32 @generic_handle_irq(i32 noundef) local_unnamed_addr #1
declare i32 @irq_find_mapping(i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"mdp5_mdss", !12, i64 0}
!12 = !{!"TYPE_2__", !7, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| linux_drivers_gpu_drm_msm_disp_mdp5_extr_mdp5_mdss.c_mdss_irq |
; ModuleID = 'AnghaBench/linux/arch/x86/kvm/extr_svm.c_nested_svm_set_tdp_cr3.c'
source_filename = "AnghaBench/linux/arch/x86/kvm/extr_svm.c_nested_svm_set_tdp_cr3.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@VMCB_NPT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @nested_svm_set_tdp_cr3], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @nested_svm_set_tdp_cr3(ptr noundef %0, i64 noundef %1) #0 {
%3 = tail call ptr @to_svm(ptr noundef %0) #2
%4 = tail call i32 @__sme_set(i64 noundef %1) #2
%5 = load ptr, ptr %3, align 8, !tbaa !5
store i32 %4, ptr %5, align 4, !tbaa !10
%6 = load i32, ptr @VMCB_NPT, align 4, !tbaa !14
%7 = tail call i32 @mark_dirty(ptr noundef nonnull %5, i32 noundef %6) #2
ret void
}
declare ptr @to_svm(ptr noundef) local_unnamed_addr #1
declare i32 @__sme_set(i64 noundef) local_unnamed_addr #1
declare i32 @mark_dirty(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"vcpu_svm", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 0}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"TYPE_3__", !13, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!13, !13, i64 0}
| ; ModuleID = 'AnghaBench/linux/arch/x86/kvm/extr_svm.c_nested_svm_set_tdp_cr3.c'
source_filename = "AnghaBench/linux/arch/x86/kvm/extr_svm.c_nested_svm_set_tdp_cr3.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@VMCB_NPT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nested_svm_set_tdp_cr3], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @nested_svm_set_tdp_cr3(ptr noundef %0, i64 noundef %1) #0 {
%3 = tail call ptr @to_svm(ptr noundef %0) #2
%4 = tail call i32 @__sme_set(i64 noundef %1) #2
%5 = load ptr, ptr %3, align 8, !tbaa !6
store i32 %4, ptr %5, align 4, !tbaa !11
%6 = load i32, ptr @VMCB_NPT, align 4, !tbaa !15
%7 = tail call i32 @mark_dirty(ptr noundef nonnull %5, i32 noundef %6) #2
ret void
}
declare ptr @to_svm(ptr noundef) local_unnamed_addr #1
declare i32 @__sme_set(i64 noundef) local_unnamed_addr #1
declare i32 @mark_dirty(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"vcpu_svm", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !14, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"TYPE_3__", !14, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!14, !14, i64 0}
| linux_arch_x86_kvm_extr_svm.c_nested_svm_set_tdp_cr3 |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sun/extr_niu.c_niu_phy_type_prop_decode.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/sun/extr_niu.c_niu_phy_type_prop_decode.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.niu = type { i32, ptr }
@.str = private unnamed_addr constant [4 x i8] c"mif\00", align 1
@NIU_FLAGS_FIBER = dso_local local_unnamed_addr global i32 0, align 4
@NIU_FLAGS_10G = dso_local local_unnamed_addr global i32 0, align 4
@MAC_XCVR_MII = dso_local local_unnamed_addr global ptr null, align 8
@.str.1 = private unnamed_addr constant [4 x i8] c"xgf\00", align 1
@MAC_XCVR_XPCS = dso_local local_unnamed_addr global ptr null, align 8
@.str.2 = private unnamed_addr constant [4 x i8] c"pcs\00", align 1
@MAC_XCVR_PCS = dso_local local_unnamed_addr global ptr null, align 8
@.str.3 = private unnamed_addr constant [4 x i8] c"xgc\00", align 1
@.str.4 = private unnamed_addr constant [5 x i8] c"xgsd\00", align 1
@.str.5 = private unnamed_addr constant [4 x i8] c"gsd\00", align 1
@NIU_FLAGS_XCVR_SERDES = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @niu_phy_type_prop_decode], section "llvm.metadata"
; Function Attrs: mustprogress nofree nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define internal i32 @niu_phy_type_prop_decode(ptr nocapture noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %1, ptr noundef nonnull dereferenceable(4) @.str)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %14
5: ; preds = %2
%6 = load i32, ptr @NIU_FLAGS_FIBER, align 4, !tbaa !5
%7 = load i32, ptr @NIU_FLAGS_10G, align 4, !tbaa !5
%8 = or i32 %7, %6
%9 = xor i32 %8, -1
%10 = load i32, ptr %0, align 8, !tbaa !9
%11 = and i32 %10, %9
store i32 %11, ptr %0, align 8, !tbaa !9
%12 = load ptr, ptr @MAC_XCVR_MII, align 8, !tbaa !12
%13 = getelementptr inbounds %struct.niu, ptr %0, i64 0, i32 1
store ptr %12, ptr %13, align 8, !tbaa !13
br label %69
14: ; preds = %2
%15 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %1, ptr noundef nonnull dereferenceable(4) @.str.1)
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %25
17: ; preds = %14
%18 = load i32, ptr @NIU_FLAGS_10G, align 4, !tbaa !5
%19 = load i32, ptr @NIU_FLAGS_FIBER, align 4, !tbaa !5
%20 = or i32 %19, %18
%21 = load i32, ptr %0, align 8, !tbaa !9
%22 = or i32 %20, %21
store i32 %22, ptr %0, align 8, !tbaa !9
%23 = load ptr, ptr @MAC_XCVR_XPCS, align 8, !tbaa !12
%24 = getelementptr inbounds %struct.niu, ptr %0, i64 0, i32 1
store ptr %23, ptr %24, align 8, !tbaa !13
br label %69
25: ; preds = %14
%26 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %1, ptr noundef nonnull dereferenceable(4) @.str.2)
%27 = icmp eq i32 %26, 0
br i1 %27, label %28, label %37
28: ; preds = %25
%29 = load i32, ptr @NIU_FLAGS_10G, align 4, !tbaa !5
%30 = xor i32 %29, -1
%31 = load i32, ptr %0, align 8, !tbaa !9
%32 = and i32 %31, %30
store i32 %32, ptr %0, align 8, !tbaa !9
%33 = load i32, ptr @NIU_FLAGS_FIBER, align 4, !tbaa !5
%34 = or i32 %33, %32
store i32 %34, ptr %0, align 8, !tbaa !9
%35 = load ptr, ptr @MAC_XCVR_PCS, align 8, !tbaa !12
%36 = getelementptr inbounds %struct.niu, ptr %0, i64 0, i32 1
store ptr %35, ptr %36, align 8, !tbaa !13
br label %69
37: ; preds = %25
%38 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %1, ptr noundef nonnull dereferenceable(4) @.str.3)
%39 = icmp eq i32 %38, 0
br i1 %39, label %40, label %49
40: ; preds = %37
%41 = load i32, ptr @NIU_FLAGS_10G, align 4, !tbaa !5
%42 = load i32, ptr %0, align 8, !tbaa !9
%43 = or i32 %42, %41
store i32 %43, ptr %0, align 8, !tbaa !9
%44 = load i32, ptr @NIU_FLAGS_FIBER, align 4, !tbaa !5
%45 = xor i32 %44, -1
%46 = and i32 %43, %45
store i32 %46, ptr %0, align 8, !tbaa !9
%47 = load ptr, ptr @MAC_XCVR_XPCS, align 8, !tbaa !12
%48 = getelementptr inbounds %struct.niu, ptr %0, i64 0, i32 1
store ptr %47, ptr %48, align 8, !tbaa !13
br label %69
49: ; preds = %37
%50 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %1, ptr noundef nonnull dereferenceable(5) @.str.4)
%51 = icmp eq i32 %50, 0
br i1 %51, label %55, label %52
52: ; preds = %49
%53 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %1, ptr noundef nonnull dereferenceable(4) @.str.5)
%54 = icmp eq i32 %53, 0
br i1 %54, label %55, label %66
55: ; preds = %52, %49
%56 = load i32, ptr @NIU_FLAGS_10G, align 4, !tbaa !5
%57 = load i32, ptr %0, align 8, !tbaa !9
%58 = or i32 %57, %56
store i32 %58, ptr %0, align 8, !tbaa !9
%59 = load i32, ptr @NIU_FLAGS_FIBER, align 4, !tbaa !5
%60 = xor i32 %59, -1
%61 = and i32 %58, %60
store i32 %61, ptr %0, align 8, !tbaa !9
%62 = load i32, ptr @NIU_FLAGS_XCVR_SERDES, align 4, !tbaa !5
%63 = or i32 %62, %61
store i32 %63, ptr %0, align 8, !tbaa !9
%64 = load ptr, ptr @MAC_XCVR_XPCS, align 8, !tbaa !12
%65 = getelementptr inbounds %struct.niu, ptr %0, i64 0, i32 1
store ptr %64, ptr %65, align 8, !tbaa !13
br label %69
66: ; preds = %52
%67 = load i32, ptr @EINVAL, align 4, !tbaa !5
%68 = sub nsw i32 0, %67
br label %69
69: ; preds = %5, %28, %55, %40, %17, %66
%70 = phi i32 [ %68, %66 ], [ 0, %17 ], [ 0, %40 ], [ 0, %55 ], [ 0, %28 ], [ 0, %5 ]
ret i32 %70
}
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @strcmp(ptr nocapture noundef, ptr nocapture noundef) local_unnamed_addr #1
attributes #0 = { mustprogress nofree nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: read) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"niu", !6, i64 0, !11, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!10, !11, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sun/extr_niu.c_niu_phy_type_prop_decode.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/sun/extr_niu.c_niu_phy_type_prop_decode.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [4 x i8] c"mif\00", align 1
@NIU_FLAGS_FIBER = common local_unnamed_addr global i32 0, align 4
@NIU_FLAGS_10G = common local_unnamed_addr global i32 0, align 4
@MAC_XCVR_MII = common local_unnamed_addr global ptr null, align 8
@.str.1 = private unnamed_addr constant [4 x i8] c"xgf\00", align 1
@MAC_XCVR_XPCS = common local_unnamed_addr global ptr null, align 8
@.str.2 = private unnamed_addr constant [4 x i8] c"pcs\00", align 1
@MAC_XCVR_PCS = common local_unnamed_addr global ptr null, align 8
@.str.3 = private unnamed_addr constant [4 x i8] c"xgc\00", align 1
@.str.4 = private unnamed_addr constant [5 x i8] c"xgsd\00", align 1
@.str.5 = private unnamed_addr constant [4 x i8] c"gsd\00", align 1
@NIU_FLAGS_XCVR_SERDES = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @niu_phy_type_prop_decode], section "llvm.metadata"
; Function Attrs: mustprogress nofree nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @niu_phy_type_prop_decode(ptr nocapture noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %1, ptr noundef nonnull dereferenceable(4) @.str)
%4 = icmp eq i32 %3, 0
br i1 %4, label %5, label %14
5: ; preds = %2
%6 = load i32, ptr @NIU_FLAGS_FIBER, align 4, !tbaa !6
%7 = load i32, ptr @NIU_FLAGS_10G, align 4, !tbaa !6
%8 = or i32 %7, %6
%9 = xor i32 %8, -1
%10 = load i32, ptr %0, align 8, !tbaa !10
%11 = and i32 %10, %9
store i32 %11, ptr %0, align 8, !tbaa !10
%12 = load ptr, ptr @MAC_XCVR_MII, align 8, !tbaa !13
%13 = getelementptr inbounds i8, ptr %0, i64 8
store ptr %12, ptr %13, align 8, !tbaa !14
br label %69
14: ; preds = %2
%15 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %1, ptr noundef nonnull dereferenceable(4) @.str.1)
%16 = icmp eq i32 %15, 0
br i1 %16, label %17, label %25
17: ; preds = %14
%18 = load i32, ptr @NIU_FLAGS_10G, align 4, !tbaa !6
%19 = load i32, ptr @NIU_FLAGS_FIBER, align 4, !tbaa !6
%20 = or i32 %19, %18
%21 = load i32, ptr %0, align 8, !tbaa !10
%22 = or i32 %20, %21
store i32 %22, ptr %0, align 8, !tbaa !10
%23 = load ptr, ptr @MAC_XCVR_XPCS, align 8, !tbaa !13
%24 = getelementptr inbounds i8, ptr %0, i64 8
store ptr %23, ptr %24, align 8, !tbaa !14
br label %69
25: ; preds = %14
%26 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %1, ptr noundef nonnull dereferenceable(4) @.str.2)
%27 = icmp eq i32 %26, 0
br i1 %27, label %28, label %37
28: ; preds = %25
%29 = load i32, ptr @NIU_FLAGS_10G, align 4, !tbaa !6
%30 = xor i32 %29, -1
%31 = load i32, ptr %0, align 8, !tbaa !10
%32 = and i32 %31, %30
store i32 %32, ptr %0, align 8, !tbaa !10
%33 = load i32, ptr @NIU_FLAGS_FIBER, align 4, !tbaa !6
%34 = or i32 %33, %32
store i32 %34, ptr %0, align 8, !tbaa !10
%35 = load ptr, ptr @MAC_XCVR_PCS, align 8, !tbaa !13
%36 = getelementptr inbounds i8, ptr %0, i64 8
store ptr %35, ptr %36, align 8, !tbaa !14
br label %69
37: ; preds = %25
%38 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %1, ptr noundef nonnull dereferenceable(4) @.str.3)
%39 = icmp eq i32 %38, 0
br i1 %39, label %40, label %49
40: ; preds = %37
%41 = load i32, ptr @NIU_FLAGS_10G, align 4, !tbaa !6
%42 = load i32, ptr %0, align 8, !tbaa !10
%43 = or i32 %42, %41
store i32 %43, ptr %0, align 8, !tbaa !10
%44 = load i32, ptr @NIU_FLAGS_FIBER, align 4, !tbaa !6
%45 = xor i32 %44, -1
%46 = and i32 %43, %45
store i32 %46, ptr %0, align 8, !tbaa !10
%47 = load ptr, ptr @MAC_XCVR_XPCS, align 8, !tbaa !13
%48 = getelementptr inbounds i8, ptr %0, i64 8
store ptr %47, ptr %48, align 8, !tbaa !14
br label %69
49: ; preds = %37
%50 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %1, ptr noundef nonnull dereferenceable(5) @.str.4)
%51 = icmp eq i32 %50, 0
br i1 %51, label %55, label %52
52: ; preds = %49
%53 = tail call i32 @strcmp(ptr noundef nonnull dereferenceable(1) %1, ptr noundef nonnull dereferenceable(4) @.str.5)
%54 = icmp eq i32 %53, 0
br i1 %54, label %55, label %66
55: ; preds = %52, %49
%56 = load i32, ptr @NIU_FLAGS_10G, align 4, !tbaa !6
%57 = load i32, ptr %0, align 8, !tbaa !10
%58 = or i32 %57, %56
store i32 %58, ptr %0, align 8, !tbaa !10
%59 = load i32, ptr @NIU_FLAGS_FIBER, align 4, !tbaa !6
%60 = xor i32 %59, -1
%61 = and i32 %58, %60
store i32 %61, ptr %0, align 8, !tbaa !10
%62 = load i32, ptr @NIU_FLAGS_XCVR_SERDES, align 4, !tbaa !6
%63 = or i32 %62, %61
store i32 %63, ptr %0, align 8, !tbaa !10
%64 = load ptr, ptr @MAC_XCVR_XPCS, align 8, !tbaa !13
%65 = getelementptr inbounds i8, ptr %0, i64 8
store ptr %64, ptr %65, align 8, !tbaa !14
br label %69
66: ; preds = %52
%67 = load i32, ptr @EINVAL, align 4, !tbaa !6
%68 = sub nsw i32 0, %67
br label %69
69: ; preds = %5, %28, %55, %40, %17, %66
%70 = phi i32 [ %68, %66 ], [ 0, %17 ], [ 0, %40 ], [ 0, %55 ], [ 0, %28 ], [ 0, %5 ]
ret i32 %70
}
; Function Attrs: mustprogress nofree nounwind willreturn memory(argmem: read)
declare i32 @strcmp(ptr nocapture noundef, ptr nocapture noundef) local_unnamed_addr #1
attributes #0 = { mustprogress nofree nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"niu", !7, i64 0, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!12, !12, i64 0}
!14 = !{!11, !12, i64 8}
| linux_drivers_net_ethernet_sun_extr_niu.c_niu_phy_type_prop_decode |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/um/kernel/skas/extr_uaccess.c_virt_to_pte.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/um/kernel/skas/extr_uaccess.c_virt_to_pte.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local ptr @virt_to_pte(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %21, label %4
4: ; preds = %2
%5 = tail call ptr @pgd_offset(ptr noundef nonnull %0, i64 noundef %1) #2
%6 = load i32, ptr %5, align 4, !tbaa !5
%7 = tail call i32 @pgd_present(i32 noundef %6) #2
%8 = icmp eq i32 %7, 0
br i1 %8, label %21, label %9
9: ; preds = %4
%10 = tail call ptr @pud_offset(ptr noundef nonnull %5, i64 noundef %1) #2
%11 = load i32, ptr %10, align 4, !tbaa !5
%12 = tail call i32 @pud_present(i32 noundef %11) #2
%13 = icmp eq i32 %12, 0
br i1 %13, label %21, label %14
14: ; preds = %9
%15 = tail call ptr @pmd_offset(ptr noundef nonnull %10, i64 noundef %1) #2
%16 = load i32, ptr %15, align 4, !tbaa !5
%17 = tail call i32 @pmd_present(i32 noundef %16) #2
%18 = icmp eq i32 %17, 0
br i1 %18, label %21, label %19
19: ; preds = %14
%20 = tail call ptr @pte_offset_kernel(ptr noundef nonnull %15, i64 noundef %1) #2
br label %21
21: ; preds = %14, %9, %4, %2, %19
%22 = phi ptr [ %20, %19 ], [ null, %2 ], [ null, %4 ], [ null, %9 ], [ null, %14 ]
ret ptr %22
}
declare ptr @pgd_offset(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @pgd_present(i32 noundef) local_unnamed_addr #1
declare ptr @pud_offset(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @pud_present(i32 noundef) local_unnamed_addr #1
declare ptr @pmd_offset(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @pmd_present(i32 noundef) local_unnamed_addr #1
declare ptr @pte_offset_kernel(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/um/kernel/skas/extr_uaccess.c_virt_to_pte.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/um/kernel/skas/extr_uaccess.c_virt_to_pte.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @virt_to_pte(ptr noundef %0, i64 noundef %1) local_unnamed_addr #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %21, label %4
4: ; preds = %2
%5 = tail call ptr @pgd_offset(ptr noundef nonnull %0, i64 noundef %1) #2
%6 = load i32, ptr %5, align 4, !tbaa !6
%7 = tail call i32 @pgd_present(i32 noundef %6) #2
%8 = icmp eq i32 %7, 0
br i1 %8, label %21, label %9
9: ; preds = %4
%10 = tail call ptr @pud_offset(ptr noundef nonnull %5, i64 noundef %1) #2
%11 = load i32, ptr %10, align 4, !tbaa !6
%12 = tail call i32 @pud_present(i32 noundef %11) #2
%13 = icmp eq i32 %12, 0
br i1 %13, label %21, label %14
14: ; preds = %9
%15 = tail call ptr @pmd_offset(ptr noundef nonnull %10, i64 noundef %1) #2
%16 = load i32, ptr %15, align 4, !tbaa !6
%17 = tail call i32 @pmd_present(i32 noundef %16) #2
%18 = icmp eq i32 %17, 0
br i1 %18, label %21, label %19
19: ; preds = %14
%20 = tail call ptr @pte_offset_kernel(ptr noundef nonnull %15, i64 noundef %1) #2
br label %21
21: ; preds = %14, %9, %4, %2, %19
%22 = phi ptr [ %20, %19 ], [ null, %2 ], [ null, %4 ], [ null, %9 ], [ null, %14 ]
ret ptr %22
}
declare ptr @pgd_offset(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @pgd_present(i32 noundef) local_unnamed_addr #1
declare ptr @pud_offset(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @pud_present(i32 noundef) local_unnamed_addr #1
declare ptr @pmd_offset(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @pmd_present(i32 noundef) local_unnamed_addr #1
declare ptr @pte_offset_kernel(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_arch_um_kernel_skas_extr_uaccess.c_virt_to_pte |
; ModuleID = 'AnghaBench/zfs/module/icp/api/extr_kcf_miscapi.c_crypto_mech2id.c'
source_filename = "AnghaBench/zfs/module/icp/api/extr_kcf_miscapi.c_crypto_mech2id.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@B_TRUE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @crypto_mech2id(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @B_TRUE, align 4, !tbaa !5
%3 = tail call i32 @crypto_mech2id_common(ptr noundef %0, i32 noundef %2) #2
ret i32 %3
}
declare i32 @crypto_mech2id_common(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/zfs/module/icp/api/extr_kcf_miscapi.c_crypto_mech2id.c'
source_filename = "AnghaBench/zfs/module/icp/api/extr_kcf_miscapi.c_crypto_mech2id.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@B_TRUE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @crypto_mech2id(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr @B_TRUE, align 4, !tbaa !6
%3 = tail call i32 @crypto_mech2id_common(ptr noundef %0, i32 noundef %2) #2
ret i32 %3
}
declare i32 @crypto_mech2id_common(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| zfs_module_icp_api_extr_kcf_miscapi.c_crypto_mech2id |
; ModuleID = 'AnghaBench/vlc/modules/codec/avcodec/extr_video.c_lavc_dr_GetFrame.c'
source_filename = "AnghaBench/vlc/modules/codec/avcodec/extr_video.c_lavc_dr_GetFrame.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.AVCodecContext = type { i64, ptr }
%struct.TYPE_17__ = type { i32, i32, ptr, ptr, ptr, ptr }
%struct.TYPE_14__ = type { i32, ptr }
%struct.TYPE_13__ = type { i32, i32, i32, ptr }
@AV_PIX_FMT_PAL8 = dso_local local_unnamed_addr global i64 0, align 8
@AV_NUM_DATA_POINTERS = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [65 x i8] c"plane %d: pitch not aligned (%d%%%d): disabling direct rendering\00", align 1
@.str.1 = private unnamed_addr constant [49 x i8] c"plane %d not aligned: disabling direct rendering\00", align 1
@PICTURE_PLANE_MAX = dso_local local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [6 x i8] c"Oops!\00", align 1
@lavc_ReleaseFrame = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @lavc_dr_GetFrame], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @lavc_dr_GetFrame(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = alloca i32, align 4
%4 = alloca i32, align 4
%5 = getelementptr inbounds %struct.AVCodecContext, ptr %0, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = load ptr, ptr %6, align 8, !tbaa !11
%8 = load i64, ptr %0, align 8, !tbaa !13
%9 = load i64, ptr @AV_PIX_FMT_PAL8, align 8, !tbaa !14
%10 = icmp eq i64 %8, %9
br i1 %10, label %153, label %11
11: ; preds = %2
%12 = tail call ptr @decoder_NewPicture(ptr noundef nonnull %6) #4
%13 = icmp eq ptr %12, null
br i1 %13, label %153, label %14
14: ; preds = %11
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
%15 = load i32, ptr %1, align 8, !tbaa !15
store i32 %15, ptr %3, align 4, !tbaa !18
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
%16 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 1
%17 = load i32, ptr %16, align 4, !tbaa !19
store i32 %17, ptr %4, align 4, !tbaa !18
%18 = load i32, ptr @AV_NUM_DATA_POINTERS, align 4, !tbaa !18
%19 = zext i32 %18 to i64
%20 = tail call ptr @llvm.stacksave.p0()
%21 = alloca i32, i64 %19, align 16
%22 = call i32 @avcodec_align_dimensions2(ptr noundef nonnull %0, ptr noundef nonnull %3, ptr noundef nonnull %4, ptr noundef nonnull %21) #4
%23 = getelementptr inbounds %struct.TYPE_14__, ptr %12, i64 0, i32 1
%24 = load ptr, ptr %23, align 8, !tbaa !20
%25 = load i32, ptr %24, align 8, !tbaa !22
%26 = load i32, ptr %3, align 4, !tbaa !18
%27 = getelementptr inbounds %struct.TYPE_13__, ptr %24, i64 0, i32 1
%28 = load i32, ptr %27, align 4, !tbaa !24
%29 = mul nsw i32 %28, %26
%30 = icmp sge i32 %25, %29
%31 = zext i1 %30 to i32
%32 = call i32 @assert(i32 noundef %31) #4
%33 = load ptr, ptr %23, align 8, !tbaa !20
%34 = getelementptr inbounds %struct.TYPE_13__, ptr %33, i64 0, i32 2
%35 = load i32, ptr %34, align 8, !tbaa !25
%36 = load i32, ptr %4, align 4, !tbaa !18
%37 = icmp sge i32 %35, %36
%38 = zext i1 %37 to i32
%39 = call i32 @assert(i32 noundef %38) #4
%40 = load i32, ptr %12, align 8, !tbaa !26
%41 = icmp sgt i32 %40, 0
br i1 %41, label %42, label %80
42: ; preds = %14
%43 = load ptr, ptr %23, align 8, !tbaa !20
%44 = zext nneg i32 %40 to i64
br label %45
45: ; preds = %42, %77
%46 = phi i64 [ 0, %42 ], [ %78, %77 ]
%47 = getelementptr inbounds %struct.TYPE_13__, ptr %43, i64 %46
%48 = load i32, ptr %47, align 8, !tbaa !22
%49 = getelementptr inbounds i32, ptr %21, i64 %46
%50 = load i32, ptr %49, align 4, !tbaa !18
%51 = srem i32 %48, %50
%52 = icmp eq i32 %51, 0
br i1 %52, label %64, label %53
53: ; preds = %45
%54 = call i32 @atomic_exchange(ptr noundef %7, i32 noundef 1) #4
%55 = icmp eq i32 %54, 0
br i1 %55, label %56, label %150
56: ; preds = %53
%57 = getelementptr inbounds i32, ptr %21, i64 %46
%58 = trunc i64 %46 to i32
%59 = load ptr, ptr %23, align 8, !tbaa !20
%60 = getelementptr inbounds %struct.TYPE_13__, ptr %59, i64 %46
%61 = load i32, ptr %60, align 8, !tbaa !22
%62 = load i32, ptr %57, align 4, !tbaa !18
%63 = call i32 (ptr, ptr, i32, ...) @msg_Warn(ptr noundef nonnull %6, ptr noundef nonnull @.str, i32 noundef %58, i32 noundef %61, i32 noundef %62) #4
br label %150
64: ; preds = %45
%65 = getelementptr inbounds %struct.TYPE_13__, ptr %43, i64 %46, i32 3
%66 = load ptr, ptr %65, align 8, !tbaa !27
%67 = ptrtoint ptr %66 to i64
%68 = sext i32 %50 to i64
%69 = urem i64 %67, %68
%70 = icmp eq i64 %69, 0
br i1 %70, label %77, label %71
71: ; preds = %64
%72 = call i32 @atomic_exchange(ptr noundef %7, i32 noundef 1) #4
%73 = icmp eq i32 %72, 0
br i1 %73, label %74, label %150
74: ; preds = %71
%75 = trunc i64 %46 to i32
%76 = call i32 (ptr, ptr, i32, ...) @msg_Warn(ptr noundef nonnull %6, ptr noundef nonnull @.str.1, i32 noundef %75) #4
br label %150
77: ; preds = %64
%78 = add nuw nsw i64 %46, 1
%79 = icmp eq i64 %78, %44
br i1 %79, label %80, label %45, !llvm.loop !28
80: ; preds = %77, %14
%81 = sext i32 %40 to i64
%82 = load i64, ptr @PICTURE_PLANE_MAX, align 8, !tbaa !14
%83 = icmp sgt i64 %82, %81
%84 = zext i1 %83 to i32
%85 = call i32 @assert(i32 noundef %84) #4
%86 = load i64, ptr @PICTURE_PLANE_MAX, align 8, !tbaa !14
%87 = load i32, ptr @AV_NUM_DATA_POINTERS, align 4, !tbaa !18
%88 = sext i32 %87 to i64
%89 = icmp sle i64 %86, %88
%90 = zext i1 %89 to i32
%91 = call i32 @static_assert(i32 noundef %90, ptr noundef nonnull @.str.2) #4
%92 = load i32, ptr %12, align 8, !tbaa !26
%93 = icmp sgt i32 %92, 0
br i1 %93, label %94, label %146
94: ; preds = %80
%95 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 5
%96 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 2
%97 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 4
br label %98
98: ; preds = %94, %137
%99 = phi i64 [ 0, %94 ], [ %139, %137 ]
%100 = load ptr, ptr %23, align 8, !tbaa !20
%101 = getelementptr inbounds %struct.TYPE_13__, ptr %100, i64 %99
%102 = getelementptr inbounds %struct.TYPE_13__, ptr %100, i64 %99, i32 3
%103 = load ptr, ptr %102, align 8, !tbaa !27
%104 = load i32, ptr %101, align 8, !tbaa !22
%105 = getelementptr inbounds %struct.TYPE_13__, ptr %100, i64 %99, i32 2
%106 = load i32, ptr %105, align 8, !tbaa !25
%107 = mul nsw i32 %106, %104
%108 = load ptr, ptr %95, align 8, !tbaa !30
%109 = getelementptr inbounds ptr, ptr %108, i64 %99
store ptr %103, ptr %109, align 8, !tbaa !31
%110 = load ptr, ptr %23, align 8, !tbaa !20
%111 = getelementptr inbounds %struct.TYPE_13__, ptr %110, i64 %99
%112 = load i32, ptr %111, align 8, !tbaa !22
%113 = load ptr, ptr %96, align 8, !tbaa !32
%114 = getelementptr inbounds i32, ptr %113, i64 %99
store i32 %112, ptr %114, align 4, !tbaa !18
%115 = load i32, ptr @lavc_ReleaseFrame, align 4, !tbaa !18
%116 = call ptr @av_buffer_create(ptr noundef %103, i32 noundef %107, i32 noundef %115, ptr noundef nonnull %12, i32 noundef 0) #4
%117 = load ptr, ptr %97, align 8, !tbaa !33
%118 = getelementptr inbounds ptr, ptr %117, i64 %99
store ptr %116, ptr %118, align 8, !tbaa !31
%119 = load ptr, ptr %97, align 8, !tbaa !33
%120 = getelementptr inbounds ptr, ptr %119, i64 %99
%121 = load ptr, ptr %120, align 8, !tbaa !31
%122 = icmp eq ptr %121, null
%123 = zext i1 %122 to i32
%124 = call i64 @unlikely(i32 noundef %123) #4
%125 = icmp eq i64 %124, 0
br i1 %125, label %137, label %126
126: ; preds = %98
%127 = and i64 %99, 4294967295
%128 = icmp eq i64 %127, 0
br i1 %128, label %150, label %129
129: ; preds = %126, %129
%130 = phi i64 [ %132, %129 ], [ %99, %126 ]
%131 = load ptr, ptr %97, align 8, !tbaa !33
%132 = add nsw i64 %130, -1
%133 = and i64 %132, 4294967295
%134 = getelementptr inbounds ptr, ptr %131, i64 %133
%135 = call i32 @av_buffer_unref(ptr noundef %134) #4
%136 = icmp sgt i64 %130, 1
br i1 %136, label %129, label %150, !llvm.loop !34
137: ; preds = %98
%138 = call i32 @picture_Hold(ptr noundef nonnull %12) #4
%139 = add nuw nsw i64 %99, 1
%140 = load i32, ptr %12, align 8, !tbaa !26
%141 = sext i32 %140 to i64
%142 = icmp slt i64 %139, %141
br i1 %142, label %98, label %143, !llvm.loop !35
143: ; preds = %137
%144 = icmp sgt i32 %140, 0
%145 = zext i1 %144 to i32
br label %146
146: ; preds = %143, %80
%147 = phi i32 [ %145, %143 ], [ 0, %80 ]
%148 = getelementptr inbounds %struct.TYPE_17__, ptr %1, i64 0, i32 3
store ptr %12, ptr %148, align 8, !tbaa !36
%149 = call i32 @assert(i32 noundef %147) #4
br label %150
150: ; preds = %129, %56, %53, %74, %71, %126, %146
%151 = phi i32 [ 0, %146 ], [ -1, %126 ], [ -1, %71 ], [ -1, %74 ], [ -1, %53 ], [ -1, %56 ], [ -1, %129 ]
%152 = call i32 @picture_Release(ptr noundef nonnull %12) #4
call void @llvm.stackrestore.p0(ptr %20)
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
br label %153
153: ; preds = %150, %11, %2
%154 = phi i32 [ -1, %2 ], [ %151, %150 ], [ -1, %11 ]
ret i32 %154
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @decoder_NewPicture(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #3
declare i32 @avcodec_align_dimensions2(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @assert(i32 noundef) local_unnamed_addr #2
declare i32 @atomic_exchange(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @msg_Warn(ptr noundef, ptr noundef, i32 noundef, ...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @static_assert(i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @av_buffer_create(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @unlikely(i32 noundef) local_unnamed_addr #2
declare i32 @av_buffer_unref(ptr noundef) local_unnamed_addr #2
declare i32 @picture_Hold(ptr noundef) local_unnamed_addr #2
declare i32 @picture_Release(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #3
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind willreturn }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"AVCodecContext", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_15__", !10, i64 0}
!13 = !{!6, !7, i64 0}
!14 = !{!7, !7, i64 0}
!15 = !{!16, !17, i64 0}
!16 = !{!"TYPE_17__", !17, i64 0, !17, i64 4, !10, i64 8, !10, i64 16, !10, i64 24, !10, i64 32}
!17 = !{!"int", !8, i64 0}
!18 = !{!17, !17, i64 0}
!19 = !{!16, !17, i64 4}
!20 = !{!21, !10, i64 8}
!21 = !{!"TYPE_14__", !17, i64 0, !10, i64 8}
!22 = !{!23, !17, i64 0}
!23 = !{!"TYPE_13__", !17, i64 0, !17, i64 4, !17, i64 8, !10, i64 16}
!24 = !{!23, !17, i64 4}
!25 = !{!23, !17, i64 8}
!26 = !{!21, !17, i64 0}
!27 = !{!23, !10, i64 16}
!28 = distinct !{!28, !29}
!29 = !{!"llvm.loop.mustprogress"}
!30 = !{!16, !10, i64 32}
!31 = !{!10, !10, i64 0}
!32 = !{!16, !10, i64 8}
!33 = !{!16, !10, i64 24}
!34 = distinct !{!34, !29}
!35 = distinct !{!35, !29}
!36 = !{!16, !10, i64 16}
| ; ModuleID = 'AnghaBench/vlc/modules/codec/avcodec/extr_video.c_lavc_dr_GetFrame.c'
source_filename = "AnghaBench/vlc/modules/codec/avcodec/extr_video.c_lavc_dr_GetFrame.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_13__ = type { i32, i32, i32, ptr }
@AV_PIX_FMT_PAL8 = common local_unnamed_addr global i64 0, align 8
@AV_NUM_DATA_POINTERS = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [65 x i8] c"plane %d: pitch not aligned (%d%%%d): disabling direct rendering\00", align 1
@.str.1 = private unnamed_addr constant [49 x i8] c"plane %d not aligned: disabling direct rendering\00", align 1
@PICTURE_PLANE_MAX = common local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [6 x i8] c"Oops!\00", align 1
@lavc_ReleaseFrame = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @lavc_dr_GetFrame], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @lavc_dr_GetFrame(ptr noundef %0, ptr nocapture noundef %1) #0 {
%3 = alloca i32, align 4
%4 = alloca i32, align 4
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = load ptr, ptr %6, align 8, !tbaa !12
%8 = load i64, ptr %0, align 8, !tbaa !14
%9 = load i64, ptr @AV_PIX_FMT_PAL8, align 8, !tbaa !15
%10 = icmp eq i64 %8, %9
br i1 %10, label %152, label %11
11: ; preds = %2
%12 = tail call ptr @decoder_NewPicture(ptr noundef nonnull %6) #4
%13 = icmp eq ptr %12, null
br i1 %13, label %152, label %14
14: ; preds = %11
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #4
%15 = load i32, ptr %1, align 8, !tbaa !16
store i32 %15, ptr %3, align 4, !tbaa !19
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #4
%16 = getelementptr inbounds i8, ptr %1, i64 4
%17 = load i32, ptr %16, align 4, !tbaa !20
store i32 %17, ptr %4, align 4, !tbaa !19
%18 = load i32, ptr @AV_NUM_DATA_POINTERS, align 4, !tbaa !19
%19 = zext i32 %18 to i64
%20 = tail call ptr @llvm.stacksave.p0()
%21 = alloca i32, i64 %19, align 4
%22 = call i32 @avcodec_align_dimensions2(ptr noundef nonnull %0, ptr noundef nonnull %3, ptr noundef nonnull %4, ptr noundef nonnull %21) #4
%23 = getelementptr inbounds i8, ptr %12, i64 8
%24 = load ptr, ptr %23, align 8, !tbaa !21
%25 = load i32, ptr %24, align 8, !tbaa !23
%26 = load i32, ptr %3, align 4, !tbaa !19
%27 = getelementptr inbounds i8, ptr %24, i64 4
%28 = load i32, ptr %27, align 4, !tbaa !25
%29 = mul nsw i32 %28, %26
%30 = icmp sge i32 %25, %29
%31 = zext i1 %30 to i32
%32 = call i32 @assert(i32 noundef %31) #4
%33 = load ptr, ptr %23, align 8, !tbaa !21
%34 = getelementptr inbounds i8, ptr %33, i64 8
%35 = load i32, ptr %34, align 8, !tbaa !26
%36 = load i32, ptr %4, align 4, !tbaa !19
%37 = icmp sge i32 %35, %36
%38 = zext i1 %37 to i32
%39 = call i32 @assert(i32 noundef %38) #4
%40 = load i32, ptr %12, align 8, !tbaa !27
%41 = icmp sgt i32 %40, 0
br i1 %41, label %42, label %80
42: ; preds = %14
%43 = load ptr, ptr %23, align 8, !tbaa !21
%44 = zext nneg i32 %40 to i64
br label %45
45: ; preds = %42, %77
%46 = phi i64 [ 0, %42 ], [ %78, %77 ]
%47 = getelementptr inbounds %struct.TYPE_13__, ptr %43, i64 %46
%48 = load i32, ptr %47, align 8, !tbaa !23
%49 = getelementptr inbounds i32, ptr %21, i64 %46
%50 = load i32, ptr %49, align 4, !tbaa !19
%51 = srem i32 %48, %50
%52 = icmp eq i32 %51, 0
br i1 %52, label %64, label %53
53: ; preds = %45
%54 = getelementptr inbounds i32, ptr %21, i64 %46
%55 = call i32 @atomic_exchange(ptr noundef %7, i32 noundef 1) #4
%56 = icmp eq i32 %55, 0
br i1 %56, label %57, label %149
57: ; preds = %53
%58 = trunc nuw nsw i64 %46 to i32
%59 = load ptr, ptr %23, align 8, !tbaa !21
%60 = getelementptr inbounds %struct.TYPE_13__, ptr %59, i64 %46
%61 = load i32, ptr %60, align 8, !tbaa !23
%62 = load i32, ptr %54, align 4, !tbaa !19
%63 = call i32 (ptr, ptr, i32, ...) @msg_Warn(ptr noundef nonnull %6, ptr noundef nonnull @.str, i32 noundef %58, i32 noundef %61, i32 noundef %62) #4
br label %149
64: ; preds = %45
%65 = getelementptr inbounds i8, ptr %47, i64 16
%66 = load ptr, ptr %65, align 8, !tbaa !28
%67 = ptrtoint ptr %66 to i64
%68 = sext i32 %50 to i64
%69 = urem i64 %67, %68
%70 = icmp eq i64 %69, 0
br i1 %70, label %77, label %71
71: ; preds = %64
%72 = call i32 @atomic_exchange(ptr noundef %7, i32 noundef 1) #4
%73 = icmp eq i32 %72, 0
br i1 %73, label %74, label %149
74: ; preds = %71
%75 = trunc nuw nsw i64 %46 to i32
%76 = call i32 (ptr, ptr, i32, ...) @msg_Warn(ptr noundef nonnull %6, ptr noundef nonnull @.str.1, i32 noundef %75) #4
br label %149
77: ; preds = %64
%78 = add nuw nsw i64 %46, 1
%79 = icmp eq i64 %78, %44
br i1 %79, label %80, label %45, !llvm.loop !29
80: ; preds = %77, %14
%81 = sext i32 %40 to i64
%82 = load i64, ptr @PICTURE_PLANE_MAX, align 8, !tbaa !15
%83 = icmp sgt i64 %82, %81
%84 = zext i1 %83 to i32
%85 = call i32 @assert(i32 noundef %84) #4
%86 = load i64, ptr @PICTURE_PLANE_MAX, align 8, !tbaa !15
%87 = load i32, ptr @AV_NUM_DATA_POINTERS, align 4, !tbaa !19
%88 = sext i32 %87 to i64
%89 = icmp sle i64 %86, %88
%90 = zext i1 %89 to i32
%91 = call i32 @static_assert(i32 noundef %90, ptr noundef nonnull @.str.2) #4
%92 = load i32, ptr %12, align 8, !tbaa !27
%93 = icmp sgt i32 %92, 0
br i1 %93, label %94, label %145
94: ; preds = %80
%95 = getelementptr inbounds i8, ptr %1, i64 32
%96 = getelementptr inbounds i8, ptr %1, i64 8
%97 = getelementptr inbounds i8, ptr %1, i64 24
br label %98
98: ; preds = %94, %136
%99 = phi i64 [ 0, %94 ], [ %138, %136 ]
%100 = load ptr, ptr %23, align 8, !tbaa !21
%101 = getelementptr inbounds %struct.TYPE_13__, ptr %100, i64 %99
%102 = getelementptr inbounds i8, ptr %101, i64 16
%103 = load ptr, ptr %102, align 8, !tbaa !28
%104 = load i32, ptr %101, align 8, !tbaa !23
%105 = getelementptr inbounds i8, ptr %101, i64 8
%106 = load i32, ptr %105, align 8, !tbaa !26
%107 = mul nsw i32 %106, %104
%108 = load ptr, ptr %95, align 8, !tbaa !31
%109 = getelementptr inbounds ptr, ptr %108, i64 %99
store ptr %103, ptr %109, align 8, !tbaa !32
%110 = load ptr, ptr %23, align 8, !tbaa !21
%111 = getelementptr inbounds %struct.TYPE_13__, ptr %110, i64 %99
%112 = load i32, ptr %111, align 8, !tbaa !23
%113 = load ptr, ptr %96, align 8, !tbaa !33
%114 = getelementptr inbounds i32, ptr %113, i64 %99
store i32 %112, ptr %114, align 4, !tbaa !19
%115 = load i32, ptr @lavc_ReleaseFrame, align 4, !tbaa !19
%116 = call ptr @av_buffer_create(ptr noundef %103, i32 noundef %107, i32 noundef %115, ptr noundef nonnull %12, i32 noundef 0) #4
%117 = load ptr, ptr %97, align 8, !tbaa !34
%118 = getelementptr inbounds ptr, ptr %117, i64 %99
store ptr %116, ptr %118, align 8, !tbaa !32
%119 = load ptr, ptr %97, align 8, !tbaa !34
%120 = getelementptr inbounds ptr, ptr %119, i64 %99
%121 = load ptr, ptr %120, align 8, !tbaa !32
%122 = icmp eq ptr %121, null
%123 = zext i1 %122 to i32
%124 = call i64 @unlikely(i32 noundef %123) #4
%125 = icmp eq i64 %124, 0
br i1 %125, label %136, label %126
126: ; preds = %98
%127 = icmp eq i64 %99, 0
br i1 %127, label %149, label %128
128: ; preds = %126, %128
%129 = phi i64 [ %131, %128 ], [ %99, %126 ]
%130 = load ptr, ptr %97, align 8, !tbaa !34
%131 = add nsw i64 %129, -1
%132 = and i64 %131, 4294967295
%133 = getelementptr inbounds ptr, ptr %130, i64 %132
%134 = call i32 @av_buffer_unref(ptr noundef %133) #4
%135 = icmp sgt i64 %129, 1
br i1 %135, label %128, label %149, !llvm.loop !35
136: ; preds = %98
%137 = call i32 @picture_Hold(ptr noundef nonnull %12) #4
%138 = add nuw nsw i64 %99, 1
%139 = load i32, ptr %12, align 8, !tbaa !27
%140 = sext i32 %139 to i64
%141 = icmp slt i64 %138, %140
br i1 %141, label %98, label %142, !llvm.loop !36
142: ; preds = %136
%143 = icmp sgt i32 %139, 0
%144 = zext i1 %143 to i32
br label %145
145: ; preds = %142, %80
%146 = phi i32 [ %144, %142 ], [ 0, %80 ]
%147 = getelementptr inbounds i8, ptr %1, i64 16
store ptr %12, ptr %147, align 8, !tbaa !37
%148 = call i32 @assert(i32 noundef %146) #4
br label %149
149: ; preds = %128, %57, %53, %74, %71, %126, %145
%150 = phi i32 [ 0, %145 ], [ -1, %126 ], [ -1, %71 ], [ -1, %74 ], [ -1, %53 ], [ -1, %57 ], [ -1, %128 ]
%151 = call i32 @picture_Release(ptr noundef nonnull %12) #4
call void @llvm.stackrestore.p0(ptr %20)
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #4
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #4
br label %152
152: ; preds = %149, %11, %2
%153 = phi i32 [ -1, %2 ], [ %150, %149 ], [ -1, %11 ]
ret i32 %153
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @decoder_NewPicture(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare ptr @llvm.stacksave.p0() #3
declare i32 @avcodec_align_dimensions2(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @assert(i32 noundef) local_unnamed_addr #2
declare i32 @atomic_exchange(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @msg_Warn(ptr noundef, ptr noundef, i32 noundef, ...) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @static_assert(i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @av_buffer_create(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @unlikely(i32 noundef) local_unnamed_addr #2
declare i32 @av_buffer_unref(ptr noundef) local_unnamed_addr #2
declare i32 @picture_Hold(ptr noundef) local_unnamed_addr #2
declare i32 @picture_Release(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare void @llvm.stackrestore.p0(ptr) #3
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { mustprogress nocallback nofree nosync nounwind willreturn }
attributes #4 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"AVCodecContext", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_15__", !11, i64 0}
!14 = !{!7, !8, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!17, !18, i64 0}
!17 = !{!"TYPE_17__", !18, i64 0, !18, i64 4, !11, i64 8, !11, i64 16, !11, i64 24, !11, i64 32}
!18 = !{!"int", !9, i64 0}
!19 = !{!18, !18, i64 0}
!20 = !{!17, !18, i64 4}
!21 = !{!22, !11, i64 8}
!22 = !{!"TYPE_14__", !18, i64 0, !11, i64 8}
!23 = !{!24, !18, i64 0}
!24 = !{!"TYPE_13__", !18, i64 0, !18, i64 4, !18, i64 8, !11, i64 16}
!25 = !{!24, !18, i64 4}
!26 = !{!24, !18, i64 8}
!27 = !{!22, !18, i64 0}
!28 = !{!24, !11, i64 16}
!29 = distinct !{!29, !30}
!30 = !{!"llvm.loop.mustprogress"}
!31 = !{!17, !11, i64 32}
!32 = !{!11, !11, i64 0}
!33 = !{!17, !11, i64 8}
!34 = !{!17, !11, i64 24}
!35 = distinct !{!35, !30}
!36 = distinct !{!36, !30}
!37 = !{!17, !11, i64 16}
| vlc_modules_codec_avcodec_extr_video.c_lavc_dr_GetFrame |
; ModuleID = 'AnghaBench/radare2/libr/core/extr_agraph.c_get_bb_body.c'
source_filename = "AnghaBench/radare2/libr/core/extr_agraph.c_get_bb_body.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_11__ = type { i64, ptr, i32, ptr }
%struct.TYPE_13__ = type { i64, i64, i64, i64, i64, ptr, i32 }
@.str = private unnamed_addr constant [3 x i8] c"gp\00", align 1
@INT_MAX = dso_local local_unnamed_addr global i64 0, align 8
@UT64_MAX = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @get_bb_body], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @get_bb_body(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, ptr noundef %5, ptr noundef %6) #0 {
%8 = icmp eq i32 %4, 0
br i1 %8, label %31, label %9
9: ; preds = %7
%10 = load ptr, ptr %0, align 8, !tbaa !5
%11 = getelementptr inbounds %struct.TYPE_11__, ptr %10, i64 0, i32 3
store ptr %5, ptr %11, align 8, !tbaa !10
%12 = getelementptr inbounds %struct.TYPE_13__, ptr %1, i64 0, i32 5
%13 = load ptr, ptr %12, align 8, !tbaa !14
%14 = icmp eq ptr %13, null
%15 = getelementptr inbounds %struct.TYPE_11__, ptr %10, i64 0, i32 2
%16 = load i32, ptr %15, align 8, !tbaa !16
br i1 %14, label %29, label %17
17: ; preds = %9
%18 = tail call i32 @r_reg_arena_poke(i32 noundef %16, ptr noundef nonnull %13) #2
%19 = load ptr, ptr %12, align 8, !tbaa !14
%20 = tail call i32 @R_FREE(ptr noundef %19) #2
%21 = load ptr, ptr %0, align 8, !tbaa !5
%22 = getelementptr inbounds %struct.TYPE_11__, ptr %21, i64 0, i32 2
%23 = load i32, ptr %22, align 8, !tbaa !16
%24 = tail call ptr @r_reg_getv(i32 noundef %23, ptr noundef nonnull @.str) #2
%25 = icmp eq ptr %24, null
br i1 %25, label %31, label %26
26: ; preds = %17
%27 = load ptr, ptr %0, align 8, !tbaa !5
%28 = getelementptr inbounds %struct.TYPE_11__, ptr %27, i64 0, i32 3
store ptr %24, ptr %28, align 8, !tbaa !10
br label %31
29: ; preds = %9
%30 = tail call i32 @r_reg_arena_poke(i32 noundef %16, ptr noundef %6) #2
br label %31
31: ; preds = %17, %26, %29, %7
%32 = load i64, ptr %1, align 8, !tbaa !17
%33 = load i64, ptr @INT_MAX, align 8, !tbaa !18
%34 = icmp eq i64 %32, %33
br i1 %34, label %37, label %35
35: ; preds = %31
%36 = load ptr, ptr %0, align 8, !tbaa !5
store i64 %32, ptr %36, align 8, !tbaa !19
br label %37
37: ; preds = %35, %31
%38 = getelementptr inbounds %struct.TYPE_13__, ptr %1, i64 0, i32 1
%39 = load i64, ptr %38, align 8, !tbaa !20
%40 = getelementptr inbounds %struct.TYPE_13__, ptr %1, i64 0, i32 6
%41 = load i32, ptr %40, align 8, !tbaa !21
%42 = tail call ptr @get_body(ptr noundef %0, i64 noundef %39, i32 noundef %41, i32 noundef %2) #2
%43 = getelementptr inbounds %struct.TYPE_13__, ptr %1, i64 0, i32 2
%44 = load i64, ptr %43, align 8, !tbaa !22
%45 = load i64, ptr @UT64_MAX, align 8, !tbaa !18
%46 = icmp eq i64 %44, %45
br i1 %46, label %77, label %47
47: ; preds = %37
%48 = load i64, ptr %38, align 8, !tbaa !20
%49 = icmp sgt i64 %44, %48
br i1 %49, label %50, label %77
50: ; preds = %47
%51 = tail call ptr @r_anal_bb_get_jumpbb(ptr noundef %3, ptr noundef nonnull %1) #2
%52 = icmp eq ptr %51, null
br i1 %52, label %77, label %53
53: ; preds = %50
br i1 %8, label %67, label %54
54: ; preds = %53
%55 = load ptr, ptr %0, align 8, !tbaa !5
%56 = getelementptr inbounds %struct.TYPE_11__, ptr %55, i64 0, i32 1
%57 = load ptr, ptr %56, align 8, !tbaa !23
%58 = icmp eq ptr %57, null
br i1 %58, label %67, label %59
59: ; preds = %54
%60 = getelementptr inbounds %struct.TYPE_13__, ptr %51, i64 0, i32 5
%61 = load ptr, ptr %60, align 8, !tbaa !14
%62 = icmp eq ptr %61, null
br i1 %62, label %63, label %67
63: ; preds = %59
%64 = getelementptr inbounds %struct.TYPE_11__, ptr %55, i64 0, i32 2
%65 = load i32, ptr %64, align 8, !tbaa !16
%66 = tail call ptr @r_reg_arena_dup(i32 noundef %65, ptr noundef nonnull %57) #2
store ptr %66, ptr %60, align 8, !tbaa !14
br label %67
67: ; preds = %63, %59, %54, %53
%68 = load i64, ptr %51, align 8, !tbaa !17
%69 = load i64, ptr @INT_MAX, align 8, !tbaa !18
%70 = icmp eq i64 %68, %69
br i1 %70, label %71, label %77
71: ; preds = %67
%72 = load ptr, ptr %0, align 8, !tbaa !5
%73 = load i64, ptr %72, align 8, !tbaa !19
%74 = getelementptr inbounds %struct.TYPE_13__, ptr %1, i64 0, i32 3
%75 = load i64, ptr %74, align 8, !tbaa !24
%76 = add nsw i64 %75, %73
store i64 %76, ptr %51, align 8, !tbaa !17
br label %77
77: ; preds = %50, %71, %67, %47, %37
%78 = getelementptr inbounds %struct.TYPE_13__, ptr %1, i64 0, i32 4
%79 = load i64, ptr %78, align 8, !tbaa !25
%80 = load i64, ptr @UT64_MAX, align 8, !tbaa !18
%81 = icmp eq i64 %79, %80
br i1 %81, label %112, label %82
82: ; preds = %77
%83 = load i64, ptr %38, align 8, !tbaa !20
%84 = icmp sgt i64 %79, %83
br i1 %84, label %85, label %112
85: ; preds = %82
%86 = tail call ptr @r_anal_bb_get_failbb(ptr noundef %3, ptr noundef nonnull %1) #2
%87 = icmp eq ptr %86, null
br i1 %87, label %112, label %88
88: ; preds = %85
br i1 %8, label %102, label %89
89: ; preds = %88
%90 = load ptr, ptr %0, align 8, !tbaa !5
%91 = getelementptr inbounds %struct.TYPE_11__, ptr %90, i64 0, i32 1
%92 = load ptr, ptr %91, align 8, !tbaa !23
%93 = icmp eq ptr %92, null
br i1 %93, label %102, label %94
94: ; preds = %89
%95 = getelementptr inbounds %struct.TYPE_13__, ptr %86, i64 0, i32 5
%96 = load ptr, ptr %95, align 8, !tbaa !14
%97 = icmp eq ptr %96, null
br i1 %97, label %98, label %102
98: ; preds = %94
%99 = getelementptr inbounds %struct.TYPE_11__, ptr %90, i64 0, i32 2
%100 = load i32, ptr %99, align 8, !tbaa !16
%101 = tail call ptr @r_reg_arena_dup(i32 noundef %100, ptr noundef nonnull %92) #2
store ptr %101, ptr %95, align 8, !tbaa !14
br label %102
102: ; preds = %98, %94, %89, %88
%103 = load i64, ptr %86, align 8, !tbaa !17
%104 = load i64, ptr @INT_MAX, align 8, !tbaa !18
%105 = icmp eq i64 %103, %104
br i1 %105, label %106, label %112
106: ; preds = %102
%107 = load ptr, ptr %0, align 8, !tbaa !5
%108 = load i64, ptr %107, align 8, !tbaa !19
%109 = getelementptr inbounds %struct.TYPE_13__, ptr %1, i64 0, i32 3
%110 = load i64, ptr %109, align 8, !tbaa !24
%111 = add nsw i64 %110, %108
store i64 %111, ptr %86, align 8, !tbaa !17
br label %112
112: ; preds = %85, %106, %102, %82, %77
ret ptr %42
}
declare i32 @r_reg_arena_poke(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @R_FREE(ptr noundef) local_unnamed_addr #1
declare ptr @r_reg_getv(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @get_body(ptr noundef, i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @r_anal_bb_get_jumpbb(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @r_reg_arena_dup(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @r_anal_bb_get_failbb(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_12__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 24}
!11 = !{!"TYPE_11__", !12, i64 0, !7, i64 8, !13, i64 16, !7, i64 24}
!12 = !{!"long", !8, i64 0}
!13 = !{!"int", !8, i64 0}
!14 = !{!15, !7, i64 40}
!15 = !{!"TYPE_13__", !12, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !12, i64 32, !7, i64 40, !13, i64 48}
!16 = !{!11, !13, i64 16}
!17 = !{!15, !12, i64 0}
!18 = !{!12, !12, i64 0}
!19 = !{!11, !12, i64 0}
!20 = !{!15, !12, i64 8}
!21 = !{!15, !13, i64 48}
!22 = !{!15, !12, i64 16}
!23 = !{!11, !7, i64 8}
!24 = !{!15, !12, i64 24}
!25 = !{!15, !12, i64 32}
| ; ModuleID = 'AnghaBench/radare2/libr/core/extr_agraph.c_get_bb_body.c'
source_filename = "AnghaBench/radare2/libr/core/extr_agraph.c_get_bb_body.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [3 x i8] c"gp\00", align 1
@INT_MAX = common local_unnamed_addr global i64 0, align 8
@UT64_MAX = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @get_bb_body], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @get_bb_body(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, ptr noundef %5, ptr noundef %6) #0 {
%8 = icmp eq i32 %4, 0
br i1 %8, label %31, label %9
9: ; preds = %7
%10 = load ptr, ptr %0, align 8, !tbaa !6
%11 = getelementptr inbounds i8, ptr %10, i64 24
store ptr %5, ptr %11, align 8, !tbaa !11
%12 = getelementptr inbounds i8, ptr %1, i64 40
%13 = load ptr, ptr %12, align 8, !tbaa !15
%14 = icmp eq ptr %13, null
%15 = getelementptr inbounds i8, ptr %10, i64 16
%16 = load i32, ptr %15, align 8, !tbaa !17
br i1 %14, label %29, label %17
17: ; preds = %9
%18 = tail call i32 @r_reg_arena_poke(i32 noundef %16, ptr noundef nonnull %13) #2
%19 = load ptr, ptr %12, align 8, !tbaa !15
%20 = tail call i32 @R_FREE(ptr noundef %19) #2
%21 = load ptr, ptr %0, align 8, !tbaa !6
%22 = getelementptr inbounds i8, ptr %21, i64 16
%23 = load i32, ptr %22, align 8, !tbaa !17
%24 = tail call ptr @r_reg_getv(i32 noundef %23, ptr noundef nonnull @.str) #2
%25 = icmp eq ptr %24, null
br i1 %25, label %31, label %26
26: ; preds = %17
%27 = load ptr, ptr %0, align 8, !tbaa !6
%28 = getelementptr inbounds i8, ptr %27, i64 24
store ptr %24, ptr %28, align 8, !tbaa !11
br label %31
29: ; preds = %9
%30 = tail call i32 @r_reg_arena_poke(i32 noundef %16, ptr noundef %6) #2
br label %31
31: ; preds = %17, %26, %29, %7
%32 = load i64, ptr %1, align 8, !tbaa !18
%33 = load i64, ptr @INT_MAX, align 8, !tbaa !19
%34 = icmp eq i64 %32, %33
br i1 %34, label %37, label %35
35: ; preds = %31
%36 = load ptr, ptr %0, align 8, !tbaa !6
store i64 %32, ptr %36, align 8, !tbaa !20
br label %37
37: ; preds = %35, %31
%38 = getelementptr inbounds i8, ptr %1, i64 8
%39 = load i64, ptr %38, align 8, !tbaa !21
%40 = getelementptr inbounds i8, ptr %1, i64 48
%41 = load i32, ptr %40, align 8, !tbaa !22
%42 = tail call ptr @get_body(ptr noundef %0, i64 noundef %39, i32 noundef %41, i32 noundef %2) #2
%43 = getelementptr inbounds i8, ptr %1, i64 16
%44 = load i64, ptr %43, align 8, !tbaa !23
%45 = load i64, ptr @UT64_MAX, align 8, !tbaa !19
%46 = icmp eq i64 %44, %45
br i1 %46, label %77, label %47
47: ; preds = %37
%48 = load i64, ptr %38, align 8, !tbaa !21
%49 = icmp sgt i64 %44, %48
br i1 %49, label %50, label %77
50: ; preds = %47
%51 = tail call ptr @r_anal_bb_get_jumpbb(ptr noundef %3, ptr noundef nonnull %1) #2
%52 = icmp eq ptr %51, null
br i1 %52, label %77, label %53
53: ; preds = %50
br i1 %8, label %67, label %54
54: ; preds = %53
%55 = load ptr, ptr %0, align 8, !tbaa !6
%56 = getelementptr inbounds i8, ptr %55, i64 8
%57 = load ptr, ptr %56, align 8, !tbaa !24
%58 = icmp eq ptr %57, null
br i1 %58, label %67, label %59
59: ; preds = %54
%60 = getelementptr inbounds i8, ptr %51, i64 40
%61 = load ptr, ptr %60, align 8, !tbaa !15
%62 = icmp eq ptr %61, null
br i1 %62, label %63, label %67
63: ; preds = %59
%64 = getelementptr inbounds i8, ptr %55, i64 16
%65 = load i32, ptr %64, align 8, !tbaa !17
%66 = tail call ptr @r_reg_arena_dup(i32 noundef %65, ptr noundef nonnull %57) #2
store ptr %66, ptr %60, align 8, !tbaa !15
br label %67
67: ; preds = %63, %59, %54, %53
%68 = load i64, ptr %51, align 8, !tbaa !18
%69 = load i64, ptr @INT_MAX, align 8, !tbaa !19
%70 = icmp eq i64 %68, %69
br i1 %70, label %71, label %77
71: ; preds = %67
%72 = load ptr, ptr %0, align 8, !tbaa !6
%73 = load i64, ptr %72, align 8, !tbaa !20
%74 = getelementptr inbounds i8, ptr %1, i64 24
%75 = load i64, ptr %74, align 8, !tbaa !25
%76 = add nsw i64 %75, %73
store i64 %76, ptr %51, align 8, !tbaa !18
br label %77
77: ; preds = %50, %71, %67, %47, %37
%78 = getelementptr inbounds i8, ptr %1, i64 32
%79 = load i64, ptr %78, align 8, !tbaa !26
%80 = load i64, ptr @UT64_MAX, align 8, !tbaa !19
%81 = icmp eq i64 %79, %80
br i1 %81, label %112, label %82
82: ; preds = %77
%83 = load i64, ptr %38, align 8, !tbaa !21
%84 = icmp sgt i64 %79, %83
br i1 %84, label %85, label %112
85: ; preds = %82
%86 = tail call ptr @r_anal_bb_get_failbb(ptr noundef %3, ptr noundef nonnull %1) #2
%87 = icmp eq ptr %86, null
br i1 %87, label %112, label %88
88: ; preds = %85
br i1 %8, label %102, label %89
89: ; preds = %88
%90 = load ptr, ptr %0, align 8, !tbaa !6
%91 = getelementptr inbounds i8, ptr %90, i64 8
%92 = load ptr, ptr %91, align 8, !tbaa !24
%93 = icmp eq ptr %92, null
br i1 %93, label %102, label %94
94: ; preds = %89
%95 = getelementptr inbounds i8, ptr %86, i64 40
%96 = load ptr, ptr %95, align 8, !tbaa !15
%97 = icmp eq ptr %96, null
br i1 %97, label %98, label %102
98: ; preds = %94
%99 = getelementptr inbounds i8, ptr %90, i64 16
%100 = load i32, ptr %99, align 8, !tbaa !17
%101 = tail call ptr @r_reg_arena_dup(i32 noundef %100, ptr noundef nonnull %92) #2
store ptr %101, ptr %95, align 8, !tbaa !15
br label %102
102: ; preds = %98, %94, %89, %88
%103 = load i64, ptr %86, align 8, !tbaa !18
%104 = load i64, ptr @INT_MAX, align 8, !tbaa !19
%105 = icmp eq i64 %103, %104
br i1 %105, label %106, label %112
106: ; preds = %102
%107 = load ptr, ptr %0, align 8, !tbaa !6
%108 = load i64, ptr %107, align 8, !tbaa !20
%109 = getelementptr inbounds i8, ptr %1, i64 24
%110 = load i64, ptr %109, align 8, !tbaa !25
%111 = add nsw i64 %110, %108
store i64 %111, ptr %86, align 8, !tbaa !18
br label %112
112: ; preds = %85, %106, %102, %82, %77
ret ptr %42
}
declare i32 @r_reg_arena_poke(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @R_FREE(ptr noundef) local_unnamed_addr #1
declare ptr @r_reg_getv(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @get_body(ptr noundef, i64 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @r_anal_bb_get_jumpbb(ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @r_reg_arena_dup(i32 noundef, ptr noundef) local_unnamed_addr #1
declare ptr @r_anal_bb_get_failbb(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_12__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 24}
!12 = !{!"TYPE_11__", !13, i64 0, !8, i64 8, !14, i64 16, !8, i64 24}
!13 = !{!"long", !9, i64 0}
!14 = !{!"int", !9, i64 0}
!15 = !{!16, !8, i64 40}
!16 = !{!"TYPE_13__", !13, i64 0, !13, i64 8, !13, i64 16, !13, i64 24, !13, i64 32, !8, i64 40, !14, i64 48}
!17 = !{!12, !14, i64 16}
!18 = !{!16, !13, i64 0}
!19 = !{!13, !13, i64 0}
!20 = !{!12, !13, i64 0}
!21 = !{!16, !13, i64 8}
!22 = !{!16, !14, i64 48}
!23 = !{!16, !13, i64 16}
!24 = !{!12, !8, i64 8}
!25 = !{!16, !13, i64 24}
!26 = !{!16, !13, i64 32}
| radare2_libr_core_extr_agraph.c_get_bb_body |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/alpha/kernel/extr_pci-sysfs.c_pci_mmap_resource_sparse.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/alpha/kernel/extr_pci-sysfs.c_pci_mmap_resource_sparse.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @pci_mmap_resource_sparse], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @pci_mmap_resource_sparse(ptr nocapture readnone %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = tail call i32 @pci_mmap_resource(ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef 1) #2
ret i32 %5
}
declare i32 @pci_mmap_resource(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/alpha/kernel/extr_pci-sysfs.c_pci_mmap_resource_sparse.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/alpha/kernel/extr_pci-sysfs.c_pci_mmap_resource_sparse.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @pci_mmap_resource_sparse], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @pci_mmap_resource_sparse(ptr nocapture readnone %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = tail call i32 @pci_mmap_resource(ptr noundef %1, ptr noundef %2, ptr noundef %3, i32 noundef 1) #2
ret i32 %5
}
declare i32 @pci_mmap_resource(ptr noundef, ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| fastsocket_kernel_arch_alpha_kernel_extr_pci-sysfs.c_pci_mmap_resource_sparse |
; ModuleID = 'AnghaBench/freebsd/contrib/binutils/gas/config/extr_tc-i386.c_i386_index_check.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/gas/config/extr_tc-i386.c_i386_index_check.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_11__ = type { ptr, ptr, i64, i32, ptr, ptr }
%struct.TYPE_12__ = type { ptr, ptr }
%struct.TYPE_7__ = type { ptr }
%struct.TYPE_8__ = type { i32, i32 }
%struct.TYPE_9__ = type { i32, i32 }
%struct.TYPE_10__ = type { i32, i32 }
@current_templates = dso_local local_unnamed_addr global ptr null, align 8
@CpuSVME = dso_local local_unnamed_addr global i32 0, align 4
@AnyMem = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [7 x i8] c"skinit\00", align 1
@Reg32 = dso_local local_unnamed_addr global i32 0, align 4
@flag_code = dso_local local_unnamed_addr global i64 0, align 8
@CODE_64BIT = dso_local local_unnamed_addr global i64 0, align 8
@i = dso_local local_unnamed_addr global %struct.TYPE_11__ zeroinitializer, align 8
@ADDR_PREFIX = dso_local local_unnamed_addr global i64 0, align 8
@Reg64 = dso_local local_unnamed_addr global i32 0, align 4
@CODE_16BIT = dso_local local_unnamed_addr global i64 0, align 8
@Reg16 = dso_local local_unnamed_addr global i32 0, align 4
@Acc = dso_local local_unnamed_addr global i32 0, align 4
@Disp = dso_local local_unnamed_addr global i32 0, align 4
@BaseIndex = dso_local local_unnamed_addr global i32 0, align 4
@RegRex = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [49 x i8] c"`%s' is not a valid %s bit base/index expression\00", align 1
@flag_code_names = dso_local local_unnamed_addr global ptr null, align 8
@ADDR_PREFIX_OPCODE = dso_local local_unnamed_addr global i64 0, align 8
@Disp16 = dso_local local_unnamed_addr global i32 0, align 4
@Disp32 = dso_local local_unnamed_addr global i32 0, align 4
@this_operand = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @i386_index_check], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @i386_index_check(ptr noundef %0) #0 {
%2 = load ptr, ptr @current_templates, align 8, !tbaa !5
%3 = load ptr, ptr %2, align 8, !tbaa !9
%4 = load i32, ptr %3, align 4, !tbaa !11
%5 = load i32, ptr @CpuSVME, align 4, !tbaa !14
%6 = and i32 %5, %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %69, label %8
8: ; preds = %1
%9 = getelementptr inbounds %struct.TYPE_12__, ptr %2, i64 0, i32 1
%10 = load ptr, ptr %9, align 8, !tbaa !15
%11 = getelementptr inbounds %struct.TYPE_7__, ptr %10, i64 -1
%12 = load ptr, ptr %11, align 8, !tbaa !16
%13 = load i64, ptr %12, align 8, !tbaa !18
%14 = load i64, ptr @AnyMem, align 8, !tbaa !18
%15 = icmp eq i64 %13, %14
br i1 %15, label %16, label %69
16: ; preds = %8
%17 = getelementptr inbounds %struct.TYPE_8__, ptr %3, i64 0, i32 1
%18 = load i32, ptr %17, align 4, !tbaa !20
%19 = tail call i64 @strcmp(i32 noundef %18, ptr noundef nonnull @.str) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %23
21: ; preds = %16
%22 = load i32, ptr @Reg32, align 4, !tbaa !14
br label %48
23: ; preds = %16
%24 = load i64, ptr @flag_code, align 8, !tbaa !18
%25 = load i64, ptr @CODE_64BIT, align 8, !tbaa !18
%26 = icmp eq i64 %24, %25
br i1 %26, label %27, label %36
27: ; preds = %23
%28 = load ptr, ptr @i, align 8, !tbaa !21
%29 = load i64, ptr @ADDR_PREFIX, align 8, !tbaa !18
%30 = getelementptr inbounds i64, ptr %28, i64 %29
%31 = load i64, ptr %30, align 8, !tbaa !18
%32 = icmp eq i64 %31, 0
%33 = load i32, ptr @Reg64, align 4
%34 = load i32, ptr @Reg32, align 4
%35 = select i1 %32, i32 %33, i32 %34
br label %48
36: ; preds = %23
%37 = load i64, ptr @CODE_16BIT, align 8, !tbaa !18
%38 = icmp eq i64 %24, %37
%39 = load ptr, ptr @i, align 8, !tbaa !21
%40 = load i64, ptr @ADDR_PREFIX, align 8, !tbaa !18
%41 = getelementptr inbounds i64, ptr %39, i64 %40
%42 = load i64, ptr %41, align 8, !tbaa !18
%43 = icmp ne i64 %42, 0
%44 = xor i1 %38, %43
%45 = load i32, ptr @Reg16, align 4
%46 = load i32, ptr @Reg32, align 4
%47 = select i1 %44, i32 %45, i32 %46
br label %48
48: ; preds = %27, %36, %21
%49 = phi i32 [ %22, %21 ], [ %35, %27 ], [ %47, %36 ]
%50 = load ptr, ptr getelementptr inbounds (%struct.TYPE_11__, ptr @i, i64 0, i32 5), align 8, !tbaa !23
%51 = icmp eq ptr %50, null
br i1 %51, label %165, label %52
52: ; preds = %48
%53 = load i32, ptr %50, align 4, !tbaa !24
%54 = load i32, ptr @Acc, align 4, !tbaa !14
%55 = and i32 %54, %53
%56 = icmp eq i32 %55, 0
br i1 %56, label %165, label %57
57: ; preds = %52
%58 = and i32 %53, %49
%59 = icmp eq i32 %58, 0
%60 = load ptr, ptr getelementptr inbounds (%struct.TYPE_11__, ptr @i, i64 0, i32 4), align 8
%61 = icmp ne ptr %60, null
%62 = select i1 %59, i1 true, i1 %61
br i1 %62, label %165, label %63
63: ; preds = %57
%64 = load ptr, ptr getelementptr inbounds (%struct.TYPE_11__, ptr @i, i64 0, i32 1), align 8, !tbaa !26
%65 = load i32, ptr %64, align 4, !tbaa !14
%66 = load i32, ptr @Disp, align 4, !tbaa !14
%67 = and i32 %66, %65
%68 = icmp eq i32 %67, 0
br i1 %68, label %172, label %165
69: ; preds = %8, %1
%70 = load i64, ptr @flag_code, align 8, !tbaa !18
%71 = load i64, ptr @CODE_64BIT, align 8, !tbaa !18
%72 = icmp eq i64 %70, %71
%73 = load ptr, ptr getelementptr inbounds (%struct.TYPE_11__, ptr @i, i64 0, i32 5), align 8
%74 = icmp eq ptr %73, null
br i1 %72, label %75, label %103
75: ; preds = %69
%76 = load ptr, ptr @i, align 8, !tbaa !21
%77 = load i64, ptr @ADDR_PREFIX, align 8, !tbaa !18
%78 = getelementptr inbounds i64, ptr %76, i64 %77
%79 = load i64, ptr %78, align 8, !tbaa !18
%80 = icmp eq i64 %79, 0
%81 = load i32, ptr @Reg64, align 4
%82 = load i32, ptr @Reg32, align 4
%83 = select i1 %80, i32 %81, i32 %82
br i1 %74, label %94, label %84
84: ; preds = %75
%85 = load i32, ptr %73, align 4, !tbaa !24
%86 = and i32 %85, %83
%87 = icmp eq i32 %86, 0
br i1 %87, label %88, label %94
88: ; preds = %84
%89 = load i32, ptr @BaseIndex, align 4, !tbaa !14
%90 = icmp ne i32 %85, %89
%91 = load ptr, ptr getelementptr inbounds (%struct.TYPE_11__, ptr @i, i64 0, i32 4), align 8
%92 = icmp ne ptr %91, null
%93 = select i1 %90, i1 true, i1 %92
br i1 %93, label %165, label %172
94: ; preds = %84, %75
%95 = load ptr, ptr getelementptr inbounds (%struct.TYPE_11__, ptr @i, i64 0, i32 4), align 8, !tbaa !27
%96 = icmp eq ptr %95, null
br i1 %96, label %172, label %97
97: ; preds = %94
%98 = load i32, ptr %95, align 4, !tbaa !28
%99 = load i32, ptr @BaseIndex, align 4, !tbaa !14
%100 = or i32 %99, %83
%101 = and i32 %100, %98
%102 = icmp eq i32 %101, %100
br i1 %102, label %172, label %165
103: ; preds = %69
%104 = load i64, ptr @CODE_16BIT, align 8, !tbaa !18
%105 = icmp eq i64 %70, %104
%106 = load ptr, ptr @i, align 8, !tbaa !21
%107 = load i64, ptr @ADDR_PREFIX, align 8, !tbaa !18
%108 = getelementptr inbounds i64, ptr %106, i64 %107
%109 = load i64, ptr %108, align 8, !tbaa !18
%110 = icmp ne i64 %109, 0
%111 = xor i1 %105, %110
br i1 %111, label %112, label %145
112: ; preds = %103
br i1 %74, label %122, label %113
113: ; preds = %112
%114 = load i32, ptr %73, align 4, !tbaa !24
%115 = load i32, ptr @Reg16, align 4, !tbaa !14
%116 = load i32, ptr @BaseIndex, align 4, !tbaa !14
%117 = or i32 %116, %115
%118 = load i32, ptr @RegRex, align 4, !tbaa !14
%119 = or i32 %117, %118
%120 = and i32 %119, %114
%121 = icmp eq i32 %120, %117
br i1 %121, label %122, label %165
122: ; preds = %113, %112
%123 = load ptr, ptr getelementptr inbounds (%struct.TYPE_11__, ptr @i, i64 0, i32 4), align 8, !tbaa !27
%124 = icmp eq ptr %123, null
br i1 %124, label %172, label %125
125: ; preds = %122
%126 = load i32, ptr %123, align 4, !tbaa !28
%127 = load i32, ptr @Reg16, align 4, !tbaa !14
%128 = load i32, ptr @BaseIndex, align 4, !tbaa !14
%129 = or i32 %128, %127
%130 = and i32 %129, %126
%131 = icmp eq i32 %130, %129
%132 = icmp ne ptr %73, null
%133 = and i1 %132, %131
br i1 %133, label %134, label %165
134: ; preds = %125
%135 = getelementptr inbounds %struct.TYPE_9__, ptr %73, i64 0, i32 1
%136 = load i32, ptr %135, align 4, !tbaa !30
%137 = icmp slt i32 %136, 6
br i1 %137, label %138, label %165
138: ; preds = %134
%139 = getelementptr inbounds %struct.TYPE_10__, ptr %123, i64 0, i32 1
%140 = load i32, ptr %139, align 4, !tbaa !31
%141 = icmp sgt i32 %140, 5
%142 = load i64, ptr getelementptr inbounds (%struct.TYPE_11__, ptr @i, i64 0, i32 2), align 8
%143 = icmp eq i64 %142, 0
%144 = select i1 %141, i1 %143, i1 false
br i1 %144, label %172, label %165
145: ; preds = %103
br i1 %74, label %153, label %146
146: ; preds = %145
%147 = load i32, ptr %73, align 4, !tbaa !24
%148 = load i32, ptr @Reg32, align 4, !tbaa !14
%149 = load i32, ptr @RegRex, align 4, !tbaa !14
%150 = or i32 %149, %148
%151 = and i32 %150, %147
%152 = icmp eq i32 %151, %148
br i1 %152, label %153, label %165
153: ; preds = %146, %145
%154 = load ptr, ptr getelementptr inbounds (%struct.TYPE_11__, ptr @i, i64 0, i32 4), align 8, !tbaa !27
%155 = icmp eq ptr %154, null
br i1 %155, label %172, label %156
156: ; preds = %153
%157 = load i32, ptr %154, align 4, !tbaa !28
%158 = load i32, ptr @Reg32, align 4, !tbaa !14
%159 = load i32, ptr @BaseIndex, align 4, !tbaa !14
%160 = or i32 %159, %158
%161 = load i32, ptr @RegRex, align 4, !tbaa !14
%162 = or i32 %160, %161
%163 = and i32 %162, %157
%164 = icmp eq i32 %163, %160
br i1 %164, label %172, label %165
165: ; preds = %146, %156, %113, %125, %134, %138, %88, %97, %48, %52, %57, %63
%166 = tail call i32 @_(ptr noundef nonnull @.str.1) #2
%167 = load ptr, ptr @flag_code_names, align 8, !tbaa !5
%168 = load i64, ptr @flag_code, align 8, !tbaa !18
%169 = getelementptr inbounds i32, ptr %167, i64 %168
%170 = load i32, ptr %169, align 4, !tbaa !14
%171 = tail call i32 (i32, ptr, ...) @as_bad(i32 noundef %166, ptr noundef %0, i32 noundef %170) #2
br label %172
172: ; preds = %88, %94, %97, %63, %153, %156, %122, %138, %165
%173 = phi i32 [ 0, %165 ], [ 1, %138 ], [ 1, %122 ], [ 1, %156 ], [ 1, %153 ], [ 1, %63 ], [ 1, %97 ], [ 1, %94 ], [ 1, %88 ]
ret i32 %173
}
declare i64 @strcmp(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @as_bad(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @_(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_12__", !6, i64 0, !6, i64 8}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_8__", !13, i64 0, !13, i64 4}
!13 = !{!"int", !7, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!10, !6, i64 8}
!16 = !{!17, !6, i64 0}
!17 = !{!"TYPE_7__", !6, i64 0}
!18 = !{!19, !19, i64 0}
!19 = !{!"long", !7, i64 0}
!20 = !{!12, !13, i64 4}
!21 = !{!22, !6, i64 0}
!22 = !{!"TYPE_11__", !6, i64 0, !6, i64 8, !19, i64 16, !13, i64 24, !6, i64 32, !6, i64 40}
!23 = !{!22, !6, i64 40}
!24 = !{!25, !13, i64 0}
!25 = !{!"TYPE_9__", !13, i64 0, !13, i64 4}
!26 = !{!22, !6, i64 8}
!27 = !{!22, !6, i64 32}
!28 = !{!29, !13, i64 0}
!29 = !{!"TYPE_10__", !13, i64 0, !13, i64 4}
!30 = !{!25, !13, i64 4}
!31 = !{!29, !13, i64 4}
| ; ModuleID = 'AnghaBench/freebsd/contrib/binutils/gas/config/extr_tc-i386.c_i386_index_check.c'
source_filename = "AnghaBench/freebsd/contrib/binutils/gas/config/extr_tc-i386.c_i386_index_check.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_11__ = type { ptr, ptr, i64, i32, ptr, ptr }
@current_templates = common local_unnamed_addr global ptr null, align 8
@CpuSVME = common local_unnamed_addr global i32 0, align 4
@AnyMem = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [7 x i8] c"skinit\00", align 1
@Reg32 = common local_unnamed_addr global i32 0, align 4
@flag_code = common local_unnamed_addr global i64 0, align 8
@CODE_64BIT = common local_unnamed_addr global i64 0, align 8
@i = common local_unnamed_addr global %struct.TYPE_11__ zeroinitializer, align 8
@ADDR_PREFIX = common local_unnamed_addr global i64 0, align 8
@Reg64 = common local_unnamed_addr global i32 0, align 4
@CODE_16BIT = common local_unnamed_addr global i64 0, align 8
@Reg16 = common local_unnamed_addr global i32 0, align 4
@Acc = common local_unnamed_addr global i32 0, align 4
@Disp = common local_unnamed_addr global i32 0, align 4
@BaseIndex = common local_unnamed_addr global i32 0, align 4
@RegRex = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [49 x i8] c"`%s' is not a valid %s bit base/index expression\00", align 1
@flag_code_names = common local_unnamed_addr global ptr null, align 8
@ADDR_PREFIX_OPCODE = common local_unnamed_addr global i64 0, align 8
@Disp16 = common local_unnamed_addr global i32 0, align 4
@Disp32 = common local_unnamed_addr global i32 0, align 4
@this_operand = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @i386_index_check], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @i386_index_check(ptr noundef %0) #0 {
%2 = load ptr, ptr @current_templates, align 8, !tbaa !6
%3 = load ptr, ptr %2, align 8, !tbaa !10
%4 = load i32, ptr %3, align 4, !tbaa !12
%5 = load i32, ptr @CpuSVME, align 4, !tbaa !15
%6 = and i32 %5, %4
%7 = icmp eq i32 %6, 0
br i1 %7, label %69, label %8
8: ; preds = %1
%9 = getelementptr inbounds i8, ptr %2, i64 8
%10 = load ptr, ptr %9, align 8, !tbaa !16
%11 = getelementptr inbounds i8, ptr %10, i64 -8
%12 = load ptr, ptr %11, align 8, !tbaa !17
%13 = load i64, ptr %12, align 8, !tbaa !19
%14 = load i64, ptr @AnyMem, align 8, !tbaa !19
%15 = icmp eq i64 %13, %14
br i1 %15, label %16, label %69
16: ; preds = %8
%17 = getelementptr inbounds i8, ptr %3, i64 4
%18 = load i32, ptr %17, align 4, !tbaa !21
%19 = tail call i64 @strcmp(i32 noundef %18, ptr noundef nonnull @.str) #2
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %23
21: ; preds = %16
%22 = load i32, ptr @Reg32, align 4, !tbaa !15
br label %48
23: ; preds = %16
%24 = load i64, ptr @flag_code, align 8, !tbaa !19
%25 = load i64, ptr @CODE_64BIT, align 8, !tbaa !19
%26 = icmp eq i64 %24, %25
br i1 %26, label %27, label %36
27: ; preds = %23
%28 = load ptr, ptr @i, align 8, !tbaa !22
%29 = load i64, ptr @ADDR_PREFIX, align 8, !tbaa !19
%30 = getelementptr inbounds i64, ptr %28, i64 %29
%31 = load i64, ptr %30, align 8, !tbaa !19
%32 = icmp eq i64 %31, 0
%33 = load i32, ptr @Reg64, align 4
%34 = load i32, ptr @Reg32, align 4
%35 = select i1 %32, i32 %33, i32 %34
br label %48
36: ; preds = %23
%37 = load i64, ptr @CODE_16BIT, align 8, !tbaa !19
%38 = icmp eq i64 %24, %37
%39 = load ptr, ptr @i, align 8, !tbaa !22
%40 = load i64, ptr @ADDR_PREFIX, align 8, !tbaa !19
%41 = getelementptr inbounds i64, ptr %39, i64 %40
%42 = load i64, ptr %41, align 8, !tbaa !19
%43 = icmp ne i64 %42, 0
%44 = xor i1 %38, %43
%45 = load i32, ptr @Reg16, align 4
%46 = load i32, ptr @Reg32, align 4
%47 = select i1 %44, i32 %45, i32 %46
br label %48
48: ; preds = %27, %36, %21
%49 = phi i32 [ %22, %21 ], [ %35, %27 ], [ %47, %36 ]
%50 = load ptr, ptr getelementptr inbounds (i8, ptr @i, i64 40), align 8, !tbaa !24
%51 = icmp eq ptr %50, null
br i1 %51, label %165, label %52
52: ; preds = %48
%53 = load i32, ptr %50, align 4, !tbaa !25
%54 = load i32, ptr @Acc, align 4, !tbaa !15
%55 = and i32 %54, %53
%56 = icmp eq i32 %55, 0
br i1 %56, label %165, label %57
57: ; preds = %52
%58 = and i32 %53, %49
%59 = icmp eq i32 %58, 0
%60 = load ptr, ptr getelementptr inbounds (i8, ptr @i, i64 32), align 8
%61 = icmp ne ptr %60, null
%62 = select i1 %59, i1 true, i1 %61
br i1 %62, label %165, label %63
63: ; preds = %57
%64 = load ptr, ptr getelementptr inbounds (i8, ptr @i, i64 8), align 8, !tbaa !27
%65 = load i32, ptr %64, align 4, !tbaa !15
%66 = load i32, ptr @Disp, align 4, !tbaa !15
%67 = and i32 %66, %65
%68 = icmp eq i32 %67, 0
br i1 %68, label %172, label %165
69: ; preds = %8, %1
%70 = load i64, ptr @flag_code, align 8, !tbaa !19
%71 = load i64, ptr @CODE_64BIT, align 8, !tbaa !19
%72 = icmp eq i64 %70, %71
%73 = load ptr, ptr getelementptr inbounds (i8, ptr @i, i64 40), align 8
%74 = icmp eq ptr %73, null
br i1 %72, label %75, label %103
75: ; preds = %69
%76 = load ptr, ptr @i, align 8, !tbaa !22
%77 = load i64, ptr @ADDR_PREFIX, align 8, !tbaa !19
%78 = getelementptr inbounds i64, ptr %76, i64 %77
%79 = load i64, ptr %78, align 8, !tbaa !19
%80 = icmp eq i64 %79, 0
%81 = load i32, ptr @Reg64, align 4
%82 = load i32, ptr @Reg32, align 4
%83 = select i1 %80, i32 %81, i32 %82
br i1 %74, label %94, label %84
84: ; preds = %75
%85 = load i32, ptr %73, align 4, !tbaa !25
%86 = and i32 %85, %83
%87 = icmp eq i32 %86, 0
br i1 %87, label %88, label %94
88: ; preds = %84
%89 = load i32, ptr @BaseIndex, align 4, !tbaa !15
%90 = icmp ne i32 %85, %89
%91 = load ptr, ptr getelementptr inbounds (i8, ptr @i, i64 32), align 8
%92 = icmp ne ptr %91, null
%93 = select i1 %90, i1 true, i1 %92
br i1 %93, label %165, label %172
94: ; preds = %84, %75
%95 = load ptr, ptr getelementptr inbounds (i8, ptr @i, i64 32), align 8, !tbaa !28
%96 = icmp eq ptr %95, null
br i1 %96, label %172, label %97
97: ; preds = %94
%98 = load i32, ptr %95, align 4, !tbaa !29
%99 = load i32, ptr @BaseIndex, align 4, !tbaa !15
%100 = or i32 %99, %83
%101 = and i32 %100, %98
%102 = icmp eq i32 %101, %100
br i1 %102, label %172, label %165
103: ; preds = %69
%104 = load i64, ptr @CODE_16BIT, align 8, !tbaa !19
%105 = icmp eq i64 %70, %104
%106 = load ptr, ptr @i, align 8, !tbaa !22
%107 = load i64, ptr @ADDR_PREFIX, align 8, !tbaa !19
%108 = getelementptr inbounds i64, ptr %106, i64 %107
%109 = load i64, ptr %108, align 8, !tbaa !19
%110 = icmp ne i64 %109, 0
%111 = xor i1 %105, %110
br i1 %111, label %112, label %145
112: ; preds = %103
br i1 %74, label %122, label %113
113: ; preds = %112
%114 = load i32, ptr %73, align 4, !tbaa !25
%115 = load i32, ptr @Reg16, align 4, !tbaa !15
%116 = load i32, ptr @BaseIndex, align 4, !tbaa !15
%117 = or i32 %116, %115
%118 = load i32, ptr @RegRex, align 4, !tbaa !15
%119 = or i32 %117, %118
%120 = and i32 %119, %114
%121 = icmp eq i32 %120, %117
br i1 %121, label %122, label %165
122: ; preds = %113, %112
%123 = load ptr, ptr getelementptr inbounds (i8, ptr @i, i64 32), align 8, !tbaa !28
%124 = icmp eq ptr %123, null
br i1 %124, label %172, label %125
125: ; preds = %122
%126 = load i32, ptr %123, align 4, !tbaa !29
%127 = load i32, ptr @Reg16, align 4, !tbaa !15
%128 = load i32, ptr @BaseIndex, align 4, !tbaa !15
%129 = or i32 %128, %127
%130 = and i32 %129, %126
%131 = icmp eq i32 %130, %129
%132 = icmp ne ptr %73, null
%133 = and i1 %132, %131
br i1 %133, label %134, label %165
134: ; preds = %125
%135 = getelementptr inbounds i8, ptr %73, i64 4
%136 = load i32, ptr %135, align 4, !tbaa !31
%137 = icmp slt i32 %136, 6
br i1 %137, label %138, label %165
138: ; preds = %134
%139 = getelementptr inbounds i8, ptr %123, i64 4
%140 = load i32, ptr %139, align 4, !tbaa !32
%141 = icmp sgt i32 %140, 5
%142 = load i64, ptr getelementptr inbounds (i8, ptr @i, i64 16), align 8
%143 = icmp eq i64 %142, 0
%144 = select i1 %141, i1 %143, i1 false
br i1 %144, label %172, label %165
145: ; preds = %103
br i1 %74, label %153, label %146
146: ; preds = %145
%147 = load i32, ptr %73, align 4, !tbaa !25
%148 = load i32, ptr @Reg32, align 4, !tbaa !15
%149 = load i32, ptr @RegRex, align 4, !tbaa !15
%150 = or i32 %149, %148
%151 = and i32 %150, %147
%152 = icmp eq i32 %151, %148
br i1 %152, label %153, label %165
153: ; preds = %146, %145
%154 = load ptr, ptr getelementptr inbounds (i8, ptr @i, i64 32), align 8, !tbaa !28
%155 = icmp eq ptr %154, null
br i1 %155, label %172, label %156
156: ; preds = %153
%157 = load i32, ptr %154, align 4, !tbaa !29
%158 = load i32, ptr @Reg32, align 4, !tbaa !15
%159 = load i32, ptr @BaseIndex, align 4, !tbaa !15
%160 = or i32 %159, %158
%161 = load i32, ptr @RegRex, align 4, !tbaa !15
%162 = or i32 %160, %161
%163 = and i32 %162, %157
%164 = icmp eq i32 %163, %160
br i1 %164, label %172, label %165
165: ; preds = %146, %156, %113, %125, %134, %138, %88, %97, %48, %52, %57, %63
%166 = tail call i32 @_(ptr noundef nonnull @.str.1) #2
%167 = load ptr, ptr @flag_code_names, align 8, !tbaa !6
%168 = load i64, ptr @flag_code, align 8, !tbaa !19
%169 = getelementptr inbounds i32, ptr %167, i64 %168
%170 = load i32, ptr %169, align 4, !tbaa !15
%171 = tail call i32 (i32, ptr, ...) @as_bad(i32 noundef %166, ptr noundef %0, i32 noundef %170) #2
br label %172
172: ; preds = %88, %94, %97, %63, %153, %156, %122, %138, %165
%173 = phi i32 [ 0, %165 ], [ 1, %138 ], [ 1, %122 ], [ 1, %156 ], [ 1, %153 ], [ 1, %63 ], [ 1, %97 ], [ 1, %94 ], [ 1, %88 ]
ret i32 %173
}
declare i64 @strcmp(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @as_bad(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
declare i32 @_(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_12__", !7, i64 0, !7, i64 8}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_8__", !14, i64 0, !14, i64 4}
!14 = !{!"int", !8, i64 0}
!15 = !{!14, !14, i64 0}
!16 = !{!11, !7, i64 8}
!17 = !{!18, !7, i64 0}
!18 = !{!"TYPE_7__", !7, i64 0}
!19 = !{!20, !20, i64 0}
!20 = !{!"long", !8, i64 0}
!21 = !{!13, !14, i64 4}
!22 = !{!23, !7, i64 0}
!23 = !{!"TYPE_11__", !7, i64 0, !7, i64 8, !20, i64 16, !14, i64 24, !7, i64 32, !7, i64 40}
!24 = !{!23, !7, i64 40}
!25 = !{!26, !14, i64 0}
!26 = !{!"TYPE_9__", !14, i64 0, !14, i64 4}
!27 = !{!23, !7, i64 8}
!28 = !{!23, !7, i64 32}
!29 = !{!30, !14, i64 0}
!30 = !{!"TYPE_10__", !14, i64 0, !14, i64 4}
!31 = !{!26, !14, i64 4}
!32 = !{!30, !14, i64 4}
| freebsd_contrib_binutils_gas_config_extr_tc-i386.c_i386_index_check |
; ModuleID = 'AnghaBench/linux/sound/soc/codecs/extr_arizona.c_arizona_dai_set_sysclk.c'
source_filename = "AnghaBench/linux/sound/soc/codecs/extr_arizona.c_arizona_dai_set_sysclk.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.snd_soc_dapm_route = type { ptr, i32 }
%struct.snd_soc_dai = type { i32, ptr, i64, ptr }
%struct.arizona_dai_priv = type { i32 }
%struct.TYPE_6__ = type { %struct.TYPE_5__, %struct.TYPE_4__ }
%struct.TYPE_5__ = type { i32 }
%struct.TYPE_4__ = type { i32 }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [37 x i8] c"Can't change clock on active DAI %d\0A\00", align 1
@EBUSY = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [21 x i8] c"Setting AIF%d to %s\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @arizona_dai_set_sysclk], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @arizona_dai_set_sysclk(ptr nocapture noundef readonly %0, i32 noundef %1, i32 %2, i32 %3) #0 {
%5 = alloca [2 x %struct.snd_soc_dapm_route], align 16
%6 = getelementptr inbounds %struct.snd_soc_dai, ptr %0, i64 0, i32 3
%7 = load ptr, ptr %6, align 8, !tbaa !5
%8 = tail call ptr @snd_soc_component_get_dapm(ptr noundef %7) #3
%9 = tail call ptr @snd_soc_component_get_drvdata(ptr noundef %7) #3
%10 = load ptr, ptr %9, align 8, !tbaa !12
%11 = load i32, ptr %0, align 8, !tbaa !14
%12 = sext i32 %11 to i64
%13 = getelementptr %struct.arizona_dai_priv, ptr %10, i64 %12
%14 = getelementptr %struct.arizona_dai_priv, ptr %13, i64 -1
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %5) #3
%15 = and i32 %1, -2
%16 = icmp eq i32 %15, 128
br i1 %16, label %20, label %17
17: ; preds = %4
%18 = load i32, ptr @EINVAL, align 4, !tbaa !15
%19 = sub nsw i32 0, %18
br label %56
20: ; preds = %4
%21 = load i32, ptr %14, align 4, !tbaa !16
%22 = icmp eq i32 %21, %1
br i1 %22, label %56, label %23
23: ; preds = %20
%24 = getelementptr inbounds %struct.snd_soc_dai, ptr %0, i64 0, i32 2
%25 = load i64, ptr %24, align 8, !tbaa !18
%26 = icmp eq i64 %25, 0
%27 = load i32, ptr %7, align 4, !tbaa !19
br i1 %26, label %32, label %28
28: ; preds = %23
%29 = tail call i32 @dev_err(i32 noundef %27, ptr noundef nonnull @.str, i32 noundef %11) #3
%30 = load i32, ptr @EBUSY, align 4, !tbaa !15
%31 = sub nsw i32 0, %30
br label %56
32: ; preds = %23
%33 = add nsw i32 %11, 1
%34 = tail call ptr @arizona_dai_clk_str(i32 noundef %1) #3
%35 = tail call i32 @dev_dbg(i32 noundef %27, ptr noundef nonnull @.str.1, i32 noundef %33, ptr noundef %34) #3
%36 = call i32 @memset(ptr noundef nonnull %5, i32 noundef 0, i32 noundef 32) #3
%37 = getelementptr inbounds %struct.snd_soc_dai, ptr %0, i64 0, i32 1
%38 = load ptr, ptr %37, align 8, !tbaa !21
%39 = getelementptr inbounds %struct.TYPE_6__, ptr %38, i64 0, i32 1
%40 = load i32, ptr %39, align 4, !tbaa !22
%41 = getelementptr inbounds %struct.snd_soc_dapm_route, ptr %5, i64 0, i32 1
store i32 %40, ptr %41, align 8, !tbaa !26
%42 = load i32, ptr %38, align 4, !tbaa !28
%43 = getelementptr inbounds [2 x %struct.snd_soc_dapm_route], ptr %5, i64 0, i64 1
%44 = getelementptr inbounds [2 x %struct.snd_soc_dapm_route], ptr %5, i64 0, i64 1, i32 1
store i32 %42, ptr %44, align 8, !tbaa !26
%45 = load i32, ptr %14, align 4, !tbaa !16
%46 = call ptr @arizona_dai_clk_str(i32 noundef %45) #3
store ptr %46, ptr %5, align 16, !tbaa !29
%47 = load i32, ptr %14, align 4, !tbaa !16
%48 = call ptr @arizona_dai_clk_str(i32 noundef %47) #3
store ptr %48, ptr %43, align 16, !tbaa !29
%49 = call i32 @ARRAY_SIZE(ptr noundef nonnull %5) #3
%50 = call i32 @snd_soc_dapm_del_routes(ptr noundef %8, ptr noundef nonnull %5, i32 noundef %49) #3
%51 = call ptr @arizona_dai_clk_str(i32 noundef %1) #3
store ptr %51, ptr %5, align 16, !tbaa !29
%52 = call ptr @arizona_dai_clk_str(i32 noundef %1) #3
store ptr %52, ptr %43, align 16, !tbaa !29
%53 = call i32 @ARRAY_SIZE(ptr noundef nonnull %5) #3
%54 = call i32 @snd_soc_dapm_add_routes(ptr noundef %8, ptr noundef nonnull %5, i32 noundef %53) #3
store i32 %1, ptr %14, align 4, !tbaa !16
%55 = call i32 @snd_soc_dapm_sync(ptr noundef %8) #3
br label %56
56: ; preds = %20, %32, %28, %17
%57 = phi i32 [ %19, %17 ], [ %31, %28 ], [ %55, %32 ], [ 0, %20 ]
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %5) #3
ret i32 %57
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @snd_soc_component_get_dapm(ptr noundef) local_unnamed_addr #2
declare ptr @snd_soc_component_get_drvdata(ptr noundef) local_unnamed_addr #2
declare i32 @dev_err(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dev_dbg(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @arizona_dai_clk_str(i32 noundef) local_unnamed_addr #2
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @snd_soc_dapm_del_routes(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #2
declare i32 @snd_soc_dapm_add_routes(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @snd_soc_dapm_sync(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 24}
!6 = !{!"snd_soc_dai", !7, i64 0, !10, i64 8, !11, i64 16, !10, i64 24}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!"long", !8, i64 0}
!12 = !{!13, !10, i64 0}
!13 = !{!"arizona_priv", !10, i64 0}
!14 = !{!6, !7, i64 0}
!15 = !{!7, !7, i64 0}
!16 = !{!17, !7, i64 0}
!17 = !{!"arizona_dai_priv", !7, i64 0}
!18 = !{!6, !11, i64 16}
!19 = !{!20, !7, i64 0}
!20 = !{!"snd_soc_component", !7, i64 0}
!21 = !{!6, !10, i64 8}
!22 = !{!23, !7, i64 4}
!23 = !{!"TYPE_6__", !24, i64 0, !25, i64 4}
!24 = !{!"TYPE_5__", !7, i64 0}
!25 = !{!"TYPE_4__", !7, i64 0}
!26 = !{!27, !7, i64 8}
!27 = !{!"snd_soc_dapm_route", !10, i64 0, !7, i64 8}
!28 = !{!23, !7, i64 0}
!29 = !{!27, !10, i64 0}
| ; ModuleID = 'AnghaBench/linux/sound/soc/codecs/extr_arizona.c_arizona_dai_set_sysclk.c'
source_filename = "AnghaBench/linux/sound/soc/codecs/extr_arizona.c_arizona_dai_set_sysclk.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.snd_soc_dapm_route = type { ptr, i32 }
%struct.arizona_dai_priv = type { i32 }
@EINVAL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [37 x i8] c"Can't change clock on active DAI %d\0A\00", align 1
@EBUSY = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [21 x i8] c"Setting AIF%d to %s\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @arizona_dai_set_sysclk], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @arizona_dai_set_sysclk(ptr nocapture noundef readonly %0, i32 noundef %1, i32 %2, i32 %3) #0 {
%5 = alloca [2 x %struct.snd_soc_dapm_route], align 8
%6 = getelementptr inbounds i8, ptr %0, i64 24
%7 = load ptr, ptr %6, align 8, !tbaa !6
%8 = tail call ptr @snd_soc_component_get_dapm(ptr noundef %7) #3
%9 = tail call ptr @snd_soc_component_get_drvdata(ptr noundef %7) #3
%10 = load ptr, ptr %9, align 8, !tbaa !13
%11 = load i32, ptr %0, align 8, !tbaa !15
%12 = sext i32 %11 to i64
%13 = getelementptr %struct.arizona_dai_priv, ptr %10, i64 %12
%14 = getelementptr i8, ptr %13, i64 -4
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %5) #3
%15 = and i32 %1, -2
%16 = icmp eq i32 %15, 128
br i1 %16, label %20, label %17
17: ; preds = %4
%18 = load i32, ptr @EINVAL, align 4, !tbaa !16
%19 = sub nsw i32 0, %18
br label %56
20: ; preds = %4
%21 = load i32, ptr %14, align 4, !tbaa !17
%22 = icmp eq i32 %21, %1
br i1 %22, label %56, label %23
23: ; preds = %20
%24 = getelementptr inbounds i8, ptr %0, i64 16
%25 = load i64, ptr %24, align 8, !tbaa !19
%26 = icmp eq i64 %25, 0
%27 = load i32, ptr %7, align 4, !tbaa !20
br i1 %26, label %32, label %28
28: ; preds = %23
%29 = tail call i32 @dev_err(i32 noundef %27, ptr noundef nonnull @.str, i32 noundef %11) #3
%30 = load i32, ptr @EBUSY, align 4, !tbaa !16
%31 = sub nsw i32 0, %30
br label %56
32: ; preds = %23
%33 = add nsw i32 %11, 1
%34 = tail call ptr @arizona_dai_clk_str(i32 noundef %1) #3
%35 = tail call i32 @dev_dbg(i32 noundef %27, ptr noundef nonnull @.str.1, i32 noundef %33, ptr noundef %34) #3
%36 = call i32 @memset(ptr noundef nonnull %5, i32 noundef 0, i32 noundef 32) #3
%37 = getelementptr inbounds i8, ptr %0, i64 8
%38 = load ptr, ptr %37, align 8, !tbaa !22
%39 = getelementptr inbounds i8, ptr %38, i64 4
%40 = load i32, ptr %39, align 4, !tbaa !23
%41 = getelementptr inbounds i8, ptr %5, i64 8
store i32 %40, ptr %41, align 8, !tbaa !27
%42 = load i32, ptr %38, align 4, !tbaa !29
%43 = getelementptr inbounds i8, ptr %5, i64 16
%44 = getelementptr inbounds i8, ptr %5, i64 24
store i32 %42, ptr %44, align 8, !tbaa !27
%45 = load i32, ptr %14, align 4, !tbaa !17
%46 = call ptr @arizona_dai_clk_str(i32 noundef %45) #3
store ptr %46, ptr %5, align 8, !tbaa !30
%47 = load i32, ptr %14, align 4, !tbaa !17
%48 = call ptr @arizona_dai_clk_str(i32 noundef %47) #3
store ptr %48, ptr %43, align 8, !tbaa !30
%49 = call i32 @ARRAY_SIZE(ptr noundef nonnull %5) #3
%50 = call i32 @snd_soc_dapm_del_routes(ptr noundef %8, ptr noundef nonnull %5, i32 noundef %49) #3
%51 = call ptr @arizona_dai_clk_str(i32 noundef %1) #3
store ptr %51, ptr %5, align 8, !tbaa !30
%52 = call ptr @arizona_dai_clk_str(i32 noundef %1) #3
store ptr %52, ptr %43, align 8, !tbaa !30
%53 = call i32 @ARRAY_SIZE(ptr noundef nonnull %5) #3
%54 = call i32 @snd_soc_dapm_add_routes(ptr noundef %8, ptr noundef nonnull %5, i32 noundef %53) #3
store i32 %1, ptr %14, align 4, !tbaa !17
%55 = call i32 @snd_soc_dapm_sync(ptr noundef %8) #3
br label %56
56: ; preds = %20, %32, %28, %17
%57 = phi i32 [ %19, %17 ], [ %31, %28 ], [ %55, %32 ], [ 0, %20 ]
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %5) #3
ret i32 %57
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @snd_soc_component_get_dapm(ptr noundef) local_unnamed_addr #2
declare ptr @snd_soc_component_get_drvdata(ptr noundef) local_unnamed_addr #2
declare i32 @dev_err(i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @dev_dbg(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare ptr @arizona_dai_clk_str(i32 noundef) local_unnamed_addr #2
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @snd_soc_dapm_del_routes(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #2
declare i32 @snd_soc_dapm_add_routes(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @snd_soc_dapm_sync(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 24}
!7 = !{!"snd_soc_dai", !8, i64 0, !11, i64 8, !12, i64 16, !11, i64 24}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!"long", !9, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"arizona_priv", !11, i64 0}
!15 = !{!7, !8, i64 0}
!16 = !{!8, !8, i64 0}
!17 = !{!18, !8, i64 0}
!18 = !{!"arizona_dai_priv", !8, i64 0}
!19 = !{!7, !12, i64 16}
!20 = !{!21, !8, i64 0}
!21 = !{!"snd_soc_component", !8, i64 0}
!22 = !{!7, !11, i64 8}
!23 = !{!24, !8, i64 4}
!24 = !{!"TYPE_6__", !25, i64 0, !26, i64 4}
!25 = !{!"TYPE_5__", !8, i64 0}
!26 = !{!"TYPE_4__", !8, i64 0}
!27 = !{!28, !8, i64 8}
!28 = !{!"snd_soc_dapm_route", !11, i64 0, !8, i64 8}
!29 = !{!24, !8, i64 0}
!30 = !{!28, !11, i64 0}
| linux_sound_soc_codecs_extr_arizona.c_arizona_dai_set_sysclk |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/emulex/benet/extr_be_cmds.c_be_cmd_rxq_create.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/emulex/benet/extr_be_cmds.c_be_cmd_rxq_create.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.be_queue_info = type { i32, i32, %struct.be_dma_mem }
%struct.be_dma_mem = type { i32 }
%struct.be_cmd_req_eth_rx_create = type { i32, ptr, ptr, ptr, i32, i64, ptr, i32 }
%struct.be_cmd_resp_eth_rx_create = type { i32, i32 }
@EBUSY = dso_local local_unnamed_addr global i32 0, align 4
@CMD_SUBSYSTEM_ETH = dso_local local_unnamed_addr global i32 0, align 4
@OPCODE_ETH_RX_CREATE = dso_local local_unnamed_addr global i32 0, align 4
@BE_MAX_JUMBO_FRAME_SIZE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @be_cmd_rxq_create(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, ptr nocapture noundef writeonly %6) local_unnamed_addr #0 {
%8 = tail call i32 @mutex_lock(ptr noundef %0) #2
%9 = tail call ptr @wrb_from_mccq(ptr noundef %0) #2
%10 = icmp eq ptr %9, null
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, ptr @EBUSY, align 4, !tbaa !5
%13 = sub nsw i32 0, %12
br label %46
14: ; preds = %7
%15 = getelementptr inbounds %struct.be_queue_info, ptr %1, i64 0, i32 2
%16 = tail call ptr @embedded_payload(ptr noundef nonnull %9) #2
%17 = getelementptr inbounds %struct.be_cmd_req_eth_rx_create, ptr %16, i64 0, i32 7
%18 = load i32, ptr @CMD_SUBSYSTEM_ETH, align 4, !tbaa !5
%19 = load i32, ptr @OPCODE_ETH_RX_CREATE, align 4, !tbaa !5
%20 = tail call i32 @be_wrb_cmd_hdr_prepare(ptr noundef nonnull %17, i32 noundef %18, i32 noundef %19, i32 noundef 64, ptr noundef nonnull %9, ptr noundef null) #2
%21 = tail call ptr @cpu_to_le16(i32 noundef %2) #2
%22 = getelementptr inbounds %struct.be_cmd_req_eth_rx_create, ptr %16, i64 0, i32 6
store ptr %21, ptr %22, align 8, !tbaa !9
%23 = tail call i64 @fls(i32 noundef %3) #2
%24 = add nsw i64 %23, -1
%25 = getelementptr inbounds %struct.be_cmd_req_eth_rx_create, ptr %16, i64 0, i32 5
store i64 %24, ptr %25, align 8, !tbaa !13
store i32 2, ptr %16, align 8, !tbaa !14
%26 = getelementptr inbounds %struct.be_cmd_req_eth_rx_create, ptr %16, i64 0, i32 4
%27 = load i32, ptr %26, align 8, !tbaa !15
%28 = tail call i32 @ARRAY_SIZE(i32 noundef %27) #2
%29 = tail call i32 @be_cmd_page_addrs_prepare(i32 noundef %27, i32 noundef %28, ptr noundef nonnull %15) #2
%30 = tail call ptr @cpu_to_le32(i32 noundef %4) #2
%31 = getelementptr inbounds %struct.be_cmd_req_eth_rx_create, ptr %16, i64 0, i32 3
store ptr %30, ptr %31, align 8, !tbaa !16
%32 = load i32, ptr @BE_MAX_JUMBO_FRAME_SIZE, align 4, !tbaa !5
%33 = tail call ptr @cpu_to_le16(i32 noundef %32) #2
%34 = getelementptr inbounds %struct.be_cmd_req_eth_rx_create, ptr %16, i64 0, i32 2
store ptr %33, ptr %34, align 8, !tbaa !17
%35 = tail call ptr @cpu_to_le32(i32 noundef %5) #2
%36 = getelementptr inbounds %struct.be_cmd_req_eth_rx_create, ptr %16, i64 0, i32 1
store ptr %35, ptr %36, align 8, !tbaa !18
%37 = tail call i32 @be_mcc_notify_wait(ptr noundef %0) #2
%38 = icmp eq i32 %37, 0
br i1 %38, label %39, label %46
39: ; preds = %14
%40 = tail call ptr @embedded_payload(ptr noundef nonnull %9) #2
%41 = getelementptr inbounds %struct.be_cmd_resp_eth_rx_create, ptr %40, i64 0, i32 1
%42 = load i32, ptr %41, align 4, !tbaa !19
%43 = tail call i32 @le16_to_cpu(i32 noundef %42) #2
%44 = getelementptr inbounds %struct.be_queue_info, ptr %1, i64 0, i32 1
store i32 %43, ptr %44, align 4, !tbaa !21
store i32 1, ptr %1, align 4, !tbaa !24
%45 = load i32, ptr %40, align 4, !tbaa !25
store i32 %45, ptr %6, align 4, !tbaa !5
br label %46
46: ; preds = %14, %39, %11
%47 = phi i32 [ %37, %14 ], [ 0, %39 ], [ %13, %11 ]
%48 = tail call i32 @mutex_unlock(ptr noundef %0) #2
ret i32 %47
}
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare ptr @wrb_from_mccq(ptr noundef) local_unnamed_addr #1
declare ptr @embedded_payload(ptr noundef) local_unnamed_addr #1
declare i32 @be_wrb_cmd_hdr_prepare(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @cpu_to_le16(i32 noundef) local_unnamed_addr #1
declare i64 @fls(i32 noundef) local_unnamed_addr #1
declare i32 @be_cmd_page_addrs_prepare(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(i32 noundef) local_unnamed_addr #1
declare ptr @cpu_to_le32(i32 noundef) local_unnamed_addr #1
declare i32 @be_mcc_notify_wait(ptr noundef) local_unnamed_addr #1
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 48}
!10 = !{!"be_cmd_req_eth_rx_create", !6, i64 0, !11, i64 8, !11, i64 16, !11, i64 24, !6, i64 32, !12, i64 40, !11, i64 48, !6, i64 56}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!"long", !7, i64 0}
!13 = !{!10, !12, i64 40}
!14 = !{!10, !6, i64 0}
!15 = !{!10, !6, i64 32}
!16 = !{!10, !11, i64 24}
!17 = !{!10, !11, i64 16}
!18 = !{!10, !11, i64 8}
!19 = !{!20, !6, i64 4}
!20 = !{!"be_cmd_resp_eth_rx_create", !6, i64 0, !6, i64 4}
!21 = !{!22, !6, i64 4}
!22 = !{!"be_queue_info", !6, i64 0, !6, i64 4, !23, i64 8}
!23 = !{!"be_dma_mem", !6, i64 0}
!24 = !{!22, !6, i64 0}
!25 = !{!20, !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/emulex/benet/extr_be_cmds.c_be_cmd_rxq_create.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/emulex/benet/extr_be_cmds.c_be_cmd_rxq_create.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EBUSY = common local_unnamed_addr global i32 0, align 4
@CMD_SUBSYSTEM_ETH = common local_unnamed_addr global i32 0, align 4
@OPCODE_ETH_RX_CREATE = common local_unnamed_addr global i32 0, align 4
@BE_MAX_JUMBO_FRAME_SIZE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @be_cmd_rxq_create(ptr noundef %0, ptr noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, i32 noundef %5, ptr nocapture noundef writeonly %6) local_unnamed_addr #0 {
%8 = tail call i32 @mutex_lock(ptr noundef %0) #2
%9 = tail call ptr @wrb_from_mccq(ptr noundef %0) #2
%10 = icmp eq ptr %9, null
br i1 %10, label %11, label %14
11: ; preds = %7
%12 = load i32, ptr @EBUSY, align 4, !tbaa !6
%13 = sub nsw i32 0, %12
br label %46
14: ; preds = %7
%15 = getelementptr inbounds i8, ptr %1, i64 8
%16 = tail call ptr @embedded_payload(ptr noundef nonnull %9) #2
%17 = getelementptr inbounds i8, ptr %16, i64 56
%18 = load i32, ptr @CMD_SUBSYSTEM_ETH, align 4, !tbaa !6
%19 = load i32, ptr @OPCODE_ETH_RX_CREATE, align 4, !tbaa !6
%20 = tail call i32 @be_wrb_cmd_hdr_prepare(ptr noundef nonnull %17, i32 noundef %18, i32 noundef %19, i32 noundef 64, ptr noundef nonnull %9, ptr noundef null) #2
%21 = tail call ptr @cpu_to_le16(i32 noundef %2) #2
%22 = getelementptr inbounds i8, ptr %16, i64 48
store ptr %21, ptr %22, align 8, !tbaa !10
%23 = tail call i64 @fls(i32 noundef %3) #2
%24 = add nsw i64 %23, -1
%25 = getelementptr inbounds i8, ptr %16, i64 40
store i64 %24, ptr %25, align 8, !tbaa !14
store i32 2, ptr %16, align 8, !tbaa !15
%26 = getelementptr inbounds i8, ptr %16, i64 32
%27 = load i32, ptr %26, align 8, !tbaa !16
%28 = tail call i32 @ARRAY_SIZE(i32 noundef %27) #2
%29 = tail call i32 @be_cmd_page_addrs_prepare(i32 noundef %27, i32 noundef %28, ptr noundef nonnull %15) #2
%30 = tail call ptr @cpu_to_le32(i32 noundef %4) #2
%31 = getelementptr inbounds i8, ptr %16, i64 24
store ptr %30, ptr %31, align 8, !tbaa !17
%32 = load i32, ptr @BE_MAX_JUMBO_FRAME_SIZE, align 4, !tbaa !6
%33 = tail call ptr @cpu_to_le16(i32 noundef %32) #2
%34 = getelementptr inbounds i8, ptr %16, i64 16
store ptr %33, ptr %34, align 8, !tbaa !18
%35 = tail call ptr @cpu_to_le32(i32 noundef %5) #2
%36 = getelementptr inbounds i8, ptr %16, i64 8
store ptr %35, ptr %36, align 8, !tbaa !19
%37 = tail call i32 @be_mcc_notify_wait(ptr noundef %0) #2
%38 = icmp eq i32 %37, 0
br i1 %38, label %39, label %46
39: ; preds = %14
%40 = tail call ptr @embedded_payload(ptr noundef nonnull %9) #2
%41 = getelementptr inbounds i8, ptr %40, i64 4
%42 = load i32, ptr %41, align 4, !tbaa !20
%43 = tail call i32 @le16_to_cpu(i32 noundef %42) #2
%44 = getelementptr inbounds i8, ptr %1, i64 4
store i32 %43, ptr %44, align 4, !tbaa !22
store i32 1, ptr %1, align 4, !tbaa !25
%45 = load i32, ptr %40, align 4, !tbaa !26
store i32 %45, ptr %6, align 4, !tbaa !6
br label %46
46: ; preds = %14, %39, %11
%47 = phi i32 [ %37, %14 ], [ 0, %39 ], [ %13, %11 ]
%48 = tail call i32 @mutex_unlock(ptr noundef %0) #2
ret i32 %47
}
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare ptr @wrb_from_mccq(ptr noundef) local_unnamed_addr #1
declare ptr @embedded_payload(ptr noundef) local_unnamed_addr #1
declare i32 @be_wrb_cmd_hdr_prepare(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @cpu_to_le16(i32 noundef) local_unnamed_addr #1
declare i64 @fls(i32 noundef) local_unnamed_addr #1
declare i32 @be_cmd_page_addrs_prepare(i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ARRAY_SIZE(i32 noundef) local_unnamed_addr #1
declare ptr @cpu_to_le32(i32 noundef) local_unnamed_addr #1
declare i32 @be_mcc_notify_wait(ptr noundef) local_unnamed_addr #1
declare i32 @le16_to_cpu(i32 noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 48}
!11 = !{!"be_cmd_req_eth_rx_create", !7, i64 0, !12, i64 8, !12, i64 16, !12, i64 24, !7, i64 32, !13, i64 40, !12, i64 48, !7, i64 56}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!"long", !8, i64 0}
!14 = !{!11, !13, i64 40}
!15 = !{!11, !7, i64 0}
!16 = !{!11, !7, i64 32}
!17 = !{!11, !12, i64 24}
!18 = !{!11, !12, i64 16}
!19 = !{!11, !12, i64 8}
!20 = !{!21, !7, i64 4}
!21 = !{!"be_cmd_resp_eth_rx_create", !7, i64 0, !7, i64 4}
!22 = !{!23, !7, i64 4}
!23 = !{!"be_queue_info", !7, i64 0, !7, i64 4, !24, i64 8}
!24 = !{!"be_dma_mem", !7, i64 0}
!25 = !{!23, !7, i64 0}
!26 = !{!21, !7, i64 0}
| linux_drivers_net_ethernet_emulex_benet_extr_be_cmds.c_be_cmd_rxq_create |
; ModuleID = 'AnghaBench/freebsd/usr.sbin/ppp/extr_ipcp.c_addr2mask.c'
source_filename = "AnghaBench/freebsd/usr.sbin/ppp/extr_ipcp.c_addr2mask.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@IN_CLASSA_NET = dso_local local_unnamed_addr global i32 0, align 4
@IN_CLASSB_NET = dso_local local_unnamed_addr global i32 0, align 4
@IN_CLASSC_NET = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @addr2mask(i32 %0) local_unnamed_addr #0 {
%2 = tail call i32 @ntohl(i32 noundef %0)
%3 = tail call i64 @IN_CLASSA(i32 noundef %2) #3
%4 = icmp eq i64 %3, 0
br i1 %4, label %7, label %5
5: ; preds = %1
%6 = load i32, ptr @IN_CLASSA_NET, align 4, !tbaa !5
br label %13
7: ; preds = %1
%8 = tail call i64 @IN_CLASSB(i32 noundef %2) #3
%9 = icmp eq i64 %8, 0
%10 = load i32, ptr @IN_CLASSB_NET, align 4
%11 = load i32, ptr @IN_CLASSC_NET, align 4
%12 = select i1 %9, i32 %11, i32 %10
br label %13
13: ; preds = %7, %5
%14 = phi i32 [ %6, %5 ], [ %12, %7 ]
%15 = tail call i32 @htonl(i32 noundef %14)
ret i32 %15
}
; Function Attrs: nofree nosync nounwind memory(none)
declare i32 @ntohl(i32 noundef) local_unnamed_addr #1
declare i64 @IN_CLASSA(i32 noundef) local_unnamed_addr #2
declare i64 @IN_CLASSB(i32 noundef) local_unnamed_addr #2
; Function Attrs: nofree nosync nounwind memory(none)
declare i32 @htonl(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nofree nosync nounwind memory(none) "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/usr.sbin/ppp/extr_ipcp.c_addr2mask.c'
source_filename = "AnghaBench/freebsd/usr.sbin/ppp/extr_ipcp.c_addr2mask.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@IN_CLASSA_NET = common local_unnamed_addr global i32 0, align 4
@IN_CLASSB_NET = common local_unnamed_addr global i32 0, align 4
@IN_CLASSC_NET = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @addr2mask(i64 %0) local_unnamed_addr #0 {
%2 = trunc i64 %0 to i32
%3 = tail call i32 @ntohl(i32 noundef %2)
%4 = tail call i64 @IN_CLASSA(i32 noundef %3) #3
%5 = icmp eq i64 %4, 0
br i1 %5, label %8, label %6
6: ; preds = %1
%7 = load i32, ptr @IN_CLASSA_NET, align 4, !tbaa !6
br label %14
8: ; preds = %1
%9 = tail call i64 @IN_CLASSB(i32 noundef %3) #3
%10 = icmp eq i64 %9, 0
%11 = load i32, ptr @IN_CLASSB_NET, align 4
%12 = load i32, ptr @IN_CLASSC_NET, align 4
%13 = select i1 %10, i32 %12, i32 %11
br label %14
14: ; preds = %8, %6
%15 = phi i32 [ %7, %6 ], [ %13, %8 ]
%16 = tail call i32 @htonl(i32 noundef %15)
ret i32 %16
}
; Function Attrs: nofree nosync nounwind memory(none)
declare i32 @ntohl(i32 noundef) local_unnamed_addr #1
declare i64 @IN_CLASSA(i32 noundef) local_unnamed_addr #2
declare i64 @IN_CLASSB(i32 noundef) local_unnamed_addr #2
; Function Attrs: nofree nosync nounwind memory(none)
declare i32 @htonl(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nofree nosync nounwind memory(none) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_usr.sbin_ppp_extr_ipcp.c_addr2mask |
; ModuleID = 'AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_cmpi_32_di.c'
source_filename = "AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_cmpi_32_di.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@FLAG_N = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_Z = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_V = dso_local local_unnamed_addr global i32 0, align 4
@FLAG_C = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @m68k_op_cmpi_32_di], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @m68k_op_cmpi_32_di() #0 {
%1 = tail call i64 (...) @OPER_I_32() #2
%2 = tail call i64 (...) @OPER_AY_DI_32() #2
%3 = sub nsw i64 %2, %1
%4 = tail call i32 @NFLAG_32(i64 noundef %3) #2
store i32 %4, ptr @FLAG_N, align 4, !tbaa !5
%5 = tail call i32 @MASK_OUT_ABOVE_32(i64 noundef %3) #2
store i32 %5, ptr @FLAG_Z, align 4, !tbaa !5
%6 = tail call i32 @VFLAG_SUB_32(i64 noundef %1, i64 noundef %2, i64 noundef %3) #2
store i32 %6, ptr @FLAG_V, align 4, !tbaa !5
%7 = tail call i32 @CFLAG_SUB_32(i64 noundef %1, i64 noundef %2, i64 noundef %3) #2
store i32 %7, ptr @FLAG_C, align 4, !tbaa !5
ret void
}
declare i64 @OPER_I_32(...) local_unnamed_addr #1
declare i64 @OPER_AY_DI_32(...) local_unnamed_addr #1
declare i32 @NFLAG_32(i64 noundef) local_unnamed_addr #1
declare i32 @MASK_OUT_ABOVE_32(i64 noundef) local_unnamed_addr #1
declare i32 @VFLAG_SUB_32(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @CFLAG_SUB_32(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_cmpi_32_di.c'
source_filename = "AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/genplusgx_source/m68k/extr_m68kops.h_m68k_op_cmpi_32_di.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FLAG_N = common local_unnamed_addr global i32 0, align 4
@FLAG_Z = common local_unnamed_addr global i32 0, align 4
@FLAG_V = common local_unnamed_addr global i32 0, align 4
@FLAG_C = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @m68k_op_cmpi_32_di], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @m68k_op_cmpi_32_di() #0 {
%1 = tail call i64 @OPER_I_32() #2
%2 = tail call i64 @OPER_AY_DI_32() #2
%3 = sub nsw i64 %2, %1
%4 = tail call i32 @NFLAG_32(i64 noundef %3) #2
store i32 %4, ptr @FLAG_N, align 4, !tbaa !6
%5 = tail call i32 @MASK_OUT_ABOVE_32(i64 noundef %3) #2
store i32 %5, ptr @FLAG_Z, align 4, !tbaa !6
%6 = tail call i32 @VFLAG_SUB_32(i64 noundef %1, i64 noundef %2, i64 noundef %3) #2
store i32 %6, ptr @FLAG_V, align 4, !tbaa !6
%7 = tail call i32 @CFLAG_SUB_32(i64 noundef %1, i64 noundef %2, i64 noundef %3) #2
store i32 %7, ptr @FLAG_C, align 4, !tbaa !6
ret void
}
declare i64 @OPER_I_32(...) local_unnamed_addr #1
declare i64 @OPER_AY_DI_32(...) local_unnamed_addr #1
declare i32 @NFLAG_32(i64 noundef) local_unnamed_addr #1
declare i32 @MASK_OUT_ABOVE_32(i64 noundef) local_unnamed_addr #1
declare i32 @VFLAG_SUB_32(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @CFLAG_SUB_32(i64 noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| Provenance_Cores_Genesis-Plus-GX_PVGenesis_Genesis_GenesisCore_genplusgx_source_m68k_extr_m68kops.h_m68k_op_cmpi_32_di |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gt/uc/extr_selftest_guc.c_igt_guc_doorbells.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gt/uc/extr_selftest_guc.c_igt_guc_doorbells.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.drm_i915_private = type { %struct.TYPE_16__, i32, %struct.TYPE_15__ }
%struct.TYPE_16__ = type { i32 }
%struct.TYPE_15__ = type { %struct.TYPE_14__ }
%struct.TYPE_14__ = type { %struct.intel_guc }
%struct.intel_guc = type { i32 }
%struct.TYPE_17__ = type { i64, i64 }
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@ATTEMPTS = dso_local local_unnamed_addr global i32 0, align 4
@GUC_CLIENT_PRIORITY_NUM = dso_local local_unnamed_addr global i32 0, align 4
@clients = dso_local local_unnamed_addr global ptr null, align 8
@.str.1 = private unnamed_addr constant [20 x i8] c"[%d] No guc client\0A\00", align 1
@ENOSPC = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [23 x i8] c"[%d] unexpected error\0A\00", align 1
@.str.3 = private unnamed_addr constant [32 x i8] c"[%d] non-db related alloc fail\0A\00", align 1
@GUC_NUM_DOORBELLS = dso_local local_unnamed_addr global i64 0, align 8
@.str.4 = private unnamed_addr constant [45 x i8] c"[%d] more clients than doorbells (%d >= %d)\0A\00", align 1
@.str.5 = private unnamed_addr constant [40 x i8] c"[%d] client_alloc sanity check failed!\0A\00", align 1
@.str.6 = private unnamed_addr constant [34 x i8] c"[%d] Failed to create a doorbell\0A\00", align 1
@.str.7 = private unnamed_addr constant [37 x i8] c"[%d] doorbell id changed (%d != %d)\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @igt_guc_doorbells], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @igt_guc_doorbells(ptr noundef %0) #0 {
%2 = tail call i32 @HAS_GT_UC(ptr noundef %0) #2
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @GEM_BUG_ON(i32 noundef %4) #2
%6 = tail call i32 @mutex_lock(ptr noundef %0) #2
%7 = getelementptr inbounds %struct.drm_i915_private, ptr %0, i64 0, i32 1
%8 = tail call i32 @intel_runtime_pm_get(ptr noundef nonnull %7) #2
%9 = getelementptr inbounds %struct.drm_i915_private, ptr %0, i64 0, i32 2
%10 = tail call i32 @check_all_doorbells(ptr noundef nonnull %9) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %137
12: ; preds = %1
%13 = load i32, ptr @ATTEMPTS, align 4, !tbaa !5
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %137
15: ; preds = %12, %104
%16 = phi i64 [ %105, %104 ], [ 0, %12 ]
%17 = load i32, ptr @GUC_CLIENT_PRIORITY_NUM, align 4, !tbaa !5
%18 = trunc i64 %16 to i32
%19 = srem i32 %18, %17
%20 = tail call ptr @guc_client_alloc(ptr noundef nonnull %9, i32 noundef %19) #2
%21 = load ptr, ptr @clients, align 8, !tbaa !9
%22 = getelementptr inbounds ptr, ptr %21, i64 %16
store ptr %20, ptr %22, align 8, !tbaa !9
%23 = load ptr, ptr @clients, align 8, !tbaa !9
%24 = getelementptr inbounds ptr, ptr %23, i64 %16
%25 = load ptr, ptr %24, align 8, !tbaa !9
%26 = icmp eq ptr %25, null
br i1 %26, label %27, label %31
27: ; preds = %15
%28 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.1, i32 noundef %18) #2
%29 = load i32, ptr @EINVAL, align 4, !tbaa !5
%30 = sub nsw i32 0, %29
br label %109
31: ; preds = %15
%32 = tail call i64 @IS_ERR(ptr noundef nonnull %25) #2
%33 = icmp eq i64 %32, 0
%34 = load ptr, ptr @clients, align 8, !tbaa !9
%35 = getelementptr inbounds ptr, ptr %34, i64 %16
%36 = load ptr, ptr %35, align 8, !tbaa !9
br i1 %33, label %57, label %37
37: ; preds = %31
%38 = tail call i32 @PTR_ERR(ptr noundef %36) #2
%39 = load i32, ptr @ENOSPC, align 4, !tbaa !5
%40 = sub nsw i32 0, %39
%41 = icmp eq i32 %38, %40
br i1 %41, label %48, label %42
42: ; preds = %37
%43 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.2, i32 noundef %18) #2
%44 = load ptr, ptr @clients, align 8, !tbaa !9
%45 = getelementptr inbounds ptr, ptr %44, i64 %16
%46 = load ptr, ptr %45, align 8, !tbaa !9
%47 = tail call i32 @PTR_ERR(ptr noundef %46) #2
br label %109
48: ; preds = %37
%49 = load i32, ptr @GUC_CLIENT_PRIORITY_NUM, align 4, !tbaa !5
%50 = srem i32 %18, %49
%51 = tail call i64 @available_dbs(ptr noundef nonnull %9, i32 noundef %50) #2
%52 = icmp eq i64 %51, 0
br i1 %52, label %104, label %53
53: ; preds = %48
%54 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.3, i32 noundef %18) #2
%55 = load i32, ptr @EINVAL, align 4, !tbaa !5
%56 = sub nsw i32 0, %55
br label %109
57: ; preds = %31
%58 = load i64, ptr %36, align 8, !tbaa !11
%59 = load i64, ptr @GUC_NUM_DOORBELLS, align 8, !tbaa !14
%60 = icmp slt i64 %58, %59
br i1 %60, label %65, label %61
61: ; preds = %57
%62 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.4, i32 noundef %18, i64 noundef %58, i64 noundef %59) #2
%63 = load i32, ptr @EINVAL, align 4, !tbaa !5
%64 = sub nsw i32 0, %63
br label %109
65: ; preds = %57
%66 = load i32, ptr @GUC_CLIENT_PRIORITY_NUM, align 4, !tbaa !5
%67 = srem i32 %18, %66
%68 = tail call i32 @validate_client(ptr noundef nonnull %36, i32 noundef %67) #2
%69 = icmp eq i32 %68, 0
br i1 %69, label %74, label %70
70: ; preds = %65
%71 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.5, i32 noundef %18) #2
%72 = load i32, ptr @EINVAL, align 4, !tbaa !5
%73 = sub nsw i32 0, %72
br label %109
74: ; preds = %65
%75 = load ptr, ptr @clients, align 8, !tbaa !9
%76 = getelementptr inbounds ptr, ptr %75, i64 %16
%77 = load ptr, ptr %76, align 8, !tbaa !9
%78 = getelementptr inbounds %struct.TYPE_17__, ptr %77, i64 0, i32 1
%79 = load i64, ptr %78, align 8, !tbaa !15
%80 = tail call i32 @__guc_client_enable(ptr noundef %77) #2
%81 = icmp eq i32 %80, 0
br i1 %81, label %84, label %82
82: ; preds = %74
%83 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.6, i32 noundef %18) #2
br label %109
84: ; preds = %74
%85 = load ptr, ptr @clients, align 8, !tbaa !9
%86 = getelementptr inbounds ptr, ptr %85, i64 %16
%87 = load ptr, ptr %86, align 8, !tbaa !9
%88 = getelementptr inbounds %struct.TYPE_17__, ptr %87, i64 0, i32 1
%89 = load i64, ptr %88, align 8, !tbaa !15
%90 = icmp eq i64 %79, %89
br i1 %90, label %95, label %91
91: ; preds = %84
%92 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, i32 noundef %18, i64 noundef %79, i64 noundef %89) #2
%93 = load i32, ptr @EINVAL, align 4, !tbaa !5
%94 = sub nsw i32 0, %93
br label %109
95: ; preds = %84
%96 = tail call i32 @check_all_doorbells(ptr noundef nonnull %9) #2
%97 = icmp eq i32 %96, 0
br i1 %97, label %98, label %109
98: ; preds = %95
%99 = load ptr, ptr @clients, align 8, !tbaa !9
%100 = getelementptr inbounds ptr, ptr %99, i64 %16
%101 = load ptr, ptr %100, align 8, !tbaa !9
%102 = tail call i32 @ring_doorbell_nop(ptr noundef %101) #2
%103 = icmp eq i32 %102, 0
br i1 %103, label %104, label %109
104: ; preds = %98, %48
%105 = add nuw nsw i64 %16, 1
%106 = load i32, ptr @ATTEMPTS, align 4, !tbaa !5
%107 = sext i32 %106 to i64
%108 = icmp slt i64 %105, %107
br i1 %108, label %15, label %112, !llvm.loop !16
109: ; preds = %98, %95, %27, %42, %53, %61, %70, %82, %91
%110 = phi i32 [ %30, %27 ], [ %94, %91 ], [ %80, %82 ], [ %73, %70 ], [ %64, %61 ], [ %56, %53 ], [ %47, %42 ], [ %102, %98 ], [ %96, %95 ]
%111 = load i32, ptr @ATTEMPTS, align 4, !tbaa !5
br label %112
112: ; preds = %104, %109
%113 = phi i32 [ %111, %109 ], [ %106, %104 ]
%114 = phi i32 [ %110, %109 ], [ 0, %104 ]
%115 = icmp sgt i32 %113, 0
br i1 %115, label %116, label %137
116: ; preds = %112, %132
%117 = phi i64 [ %133, %132 ], [ 0, %112 ]
%118 = load ptr, ptr @clients, align 8, !tbaa !9
%119 = getelementptr inbounds ptr, ptr %118, i64 %117
%120 = load ptr, ptr %119, align 8, !tbaa !9
%121 = tail call i32 @IS_ERR_OR_NULL(ptr noundef %120) #2
%122 = icmp eq i32 %121, 0
br i1 %122, label %123, label %132
123: ; preds = %116
%124 = load ptr, ptr @clients, align 8, !tbaa !9
%125 = getelementptr inbounds ptr, ptr %124, i64 %117
%126 = load ptr, ptr %125, align 8, !tbaa !9
%127 = tail call i32 @__guc_client_disable(ptr noundef %126) #2
%128 = load ptr, ptr @clients, align 8, !tbaa !9
%129 = getelementptr inbounds ptr, ptr %128, i64 %117
%130 = load ptr, ptr %129, align 8, !tbaa !9
%131 = tail call i32 @guc_client_free(ptr noundef %130) #2
br label %132
132: ; preds = %116, %123
%133 = add nuw nsw i64 %117, 1
%134 = load i32, ptr @ATTEMPTS, align 4, !tbaa !5
%135 = sext i32 %134 to i64
%136 = icmp slt i64 %133, %135
br i1 %136, label %116, label %137, !llvm.loop !18
137: ; preds = %132, %12, %112, %1
%138 = phi i32 [ %10, %1 ], [ %114, %112 ], [ 0, %12 ], [ %114, %132 ]
%139 = tail call i32 @intel_runtime_pm_put(ptr noundef nonnull %7, i32 noundef %8) #2
%140 = tail call i32 @mutex_unlock(ptr noundef %0) #2
ret i32 %138
}
declare i32 @GEM_BUG_ON(i32 noundef) local_unnamed_addr #1
declare i32 @HAS_GT_UC(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @intel_runtime_pm_get(ptr noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef, ...) local_unnamed_addr #1
declare i32 @check_all_doorbells(ptr noundef) local_unnamed_addr #1
declare ptr @guc_client_alloc(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i64 @available_dbs(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @validate_client(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__guc_client_enable(ptr noundef) local_unnamed_addr #1
declare i32 @ring_doorbell_nop(ptr noundef) local_unnamed_addr #1
declare i32 @IS_ERR_OR_NULL(ptr noundef) local_unnamed_addr #1
declare i32 @__guc_client_disable(ptr noundef) local_unnamed_addr #1
declare i32 @guc_client_free(ptr noundef) local_unnamed_addr #1
declare i32 @intel_runtime_pm_put(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_17__", !13, i64 0, !13, i64 8}
!13 = !{!"long", !7, i64 0}
!14 = !{!13, !13, i64 0}
!15 = !{!12, !13, i64 8}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = distinct !{!18, !17}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/i915/gt/uc/extr_selftest_guc.c_igt_guc_doorbells.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/i915/gt/uc/extr_selftest_guc.c_igt_guc_doorbells.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@EINVAL = common local_unnamed_addr global i32 0, align 4
@ATTEMPTS = common local_unnamed_addr global i32 0, align 4
@GUC_CLIENT_PRIORITY_NUM = common local_unnamed_addr global i32 0, align 4
@clients = common local_unnamed_addr global ptr null, align 8
@.str.1 = private unnamed_addr constant [20 x i8] c"[%d] No guc client\0A\00", align 1
@ENOSPC = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [23 x i8] c"[%d] unexpected error\0A\00", align 1
@.str.3 = private unnamed_addr constant [32 x i8] c"[%d] non-db related alloc fail\0A\00", align 1
@GUC_NUM_DOORBELLS = common local_unnamed_addr global i64 0, align 8
@.str.4 = private unnamed_addr constant [45 x i8] c"[%d] more clients than doorbells (%d >= %d)\0A\00", align 1
@.str.5 = private unnamed_addr constant [40 x i8] c"[%d] client_alloc sanity check failed!\0A\00", align 1
@.str.6 = private unnamed_addr constant [34 x i8] c"[%d] Failed to create a doorbell\0A\00", align 1
@.str.7 = private unnamed_addr constant [37 x i8] c"[%d] doorbell id changed (%d != %d)\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @igt_guc_doorbells], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @igt_guc_doorbells(ptr noundef %0) #0 {
%2 = tail call i32 @HAS_GT_UC(ptr noundef %0) #2
%3 = icmp eq i32 %2, 0
%4 = zext i1 %3 to i32
%5 = tail call i32 @GEM_BUG_ON(i32 noundef %4) #2
%6 = tail call i32 @mutex_lock(ptr noundef %0) #2
%7 = getelementptr inbounds i8, ptr %0, i64 4
%8 = tail call i32 @intel_runtime_pm_get(ptr noundef nonnull %7) #2
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = tail call i32 @check_all_doorbells(ptr noundef nonnull %9) #2
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %137
12: ; preds = %1
%13 = load i32, ptr @ATTEMPTS, align 4, !tbaa !6
%14 = icmp sgt i32 %13, 0
br i1 %14, label %15, label %137
15: ; preds = %12, %104
%16 = phi i64 [ %105, %104 ], [ 0, %12 ]
%17 = load i32, ptr @GUC_CLIENT_PRIORITY_NUM, align 4, !tbaa !6
%18 = trunc nuw nsw i64 %16 to i32
%19 = srem i32 %18, %17
%20 = tail call ptr @guc_client_alloc(ptr noundef nonnull %9, i32 noundef %19) #2
%21 = load ptr, ptr @clients, align 8, !tbaa !10
%22 = getelementptr inbounds ptr, ptr %21, i64 %16
store ptr %20, ptr %22, align 8, !tbaa !10
%23 = load ptr, ptr @clients, align 8, !tbaa !10
%24 = getelementptr inbounds ptr, ptr %23, i64 %16
%25 = load ptr, ptr %24, align 8, !tbaa !10
%26 = icmp eq ptr %25, null
br i1 %26, label %27, label %31
27: ; preds = %15
%28 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.1, i32 noundef %18) #2
%29 = load i32, ptr @EINVAL, align 4, !tbaa !6
%30 = sub nsw i32 0, %29
br label %109
31: ; preds = %15
%32 = tail call i64 @IS_ERR(ptr noundef nonnull %25) #2
%33 = icmp eq i64 %32, 0
%34 = load ptr, ptr @clients, align 8, !tbaa !10
%35 = getelementptr inbounds ptr, ptr %34, i64 %16
%36 = load ptr, ptr %35, align 8, !tbaa !10
br i1 %33, label %57, label %37
37: ; preds = %31
%38 = tail call i32 @PTR_ERR(ptr noundef %36) #2
%39 = load i32, ptr @ENOSPC, align 4, !tbaa !6
%40 = sub nsw i32 0, %39
%41 = icmp eq i32 %38, %40
br i1 %41, label %48, label %42
42: ; preds = %37
%43 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.2, i32 noundef %18) #2
%44 = load ptr, ptr @clients, align 8, !tbaa !10
%45 = getelementptr inbounds ptr, ptr %44, i64 %16
%46 = load ptr, ptr %45, align 8, !tbaa !10
%47 = tail call i32 @PTR_ERR(ptr noundef %46) #2
br label %109
48: ; preds = %37
%49 = load i32, ptr @GUC_CLIENT_PRIORITY_NUM, align 4, !tbaa !6
%50 = srem i32 %18, %49
%51 = tail call i64 @available_dbs(ptr noundef nonnull %9, i32 noundef %50) #2
%52 = icmp eq i64 %51, 0
br i1 %52, label %104, label %53
53: ; preds = %48
%54 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.3, i32 noundef %18) #2
%55 = load i32, ptr @EINVAL, align 4, !tbaa !6
%56 = sub nsw i32 0, %55
br label %109
57: ; preds = %31
%58 = load i64, ptr %36, align 8, !tbaa !12
%59 = load i64, ptr @GUC_NUM_DOORBELLS, align 8, !tbaa !15
%60 = icmp slt i64 %58, %59
br i1 %60, label %65, label %61
61: ; preds = %57
%62 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.4, i32 noundef %18, i64 noundef %58, i64 noundef %59) #2
%63 = load i32, ptr @EINVAL, align 4, !tbaa !6
%64 = sub nsw i32 0, %63
br label %109
65: ; preds = %57
%66 = load i32, ptr @GUC_CLIENT_PRIORITY_NUM, align 4, !tbaa !6
%67 = srem i32 %18, %66
%68 = tail call i32 @validate_client(ptr noundef nonnull %36, i32 noundef %67) #2
%69 = icmp eq i32 %68, 0
br i1 %69, label %74, label %70
70: ; preds = %65
%71 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.5, i32 noundef %18) #2
%72 = load i32, ptr @EINVAL, align 4, !tbaa !6
%73 = sub nsw i32 0, %72
br label %109
74: ; preds = %65
%75 = load ptr, ptr @clients, align 8, !tbaa !10
%76 = getelementptr inbounds ptr, ptr %75, i64 %16
%77 = load ptr, ptr %76, align 8, !tbaa !10
%78 = getelementptr inbounds i8, ptr %77, i64 8
%79 = load i64, ptr %78, align 8, !tbaa !16
%80 = tail call i32 @__guc_client_enable(ptr noundef %77) #2
%81 = icmp eq i32 %80, 0
br i1 %81, label %84, label %82
82: ; preds = %74
%83 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.6, i32 noundef %18) #2
br label %109
84: ; preds = %74
%85 = load ptr, ptr @clients, align 8, !tbaa !10
%86 = getelementptr inbounds ptr, ptr %85, i64 %16
%87 = load ptr, ptr %86, align 8, !tbaa !10
%88 = getelementptr inbounds i8, ptr %87, i64 8
%89 = load i64, ptr %88, align 8, !tbaa !16
%90 = icmp eq i64 %79, %89
br i1 %90, label %95, label %91
91: ; preds = %84
%92 = tail call i32 (ptr, ...) @pr_err(ptr noundef nonnull @.str.7, i32 noundef %18, i64 noundef %79, i64 noundef %89) #2
%93 = load i32, ptr @EINVAL, align 4, !tbaa !6
%94 = sub nsw i32 0, %93
br label %109
95: ; preds = %84
%96 = tail call i32 @check_all_doorbells(ptr noundef nonnull %9) #2
%97 = icmp eq i32 %96, 0
br i1 %97, label %98, label %109
98: ; preds = %95
%99 = load ptr, ptr @clients, align 8, !tbaa !10
%100 = getelementptr inbounds ptr, ptr %99, i64 %16
%101 = load ptr, ptr %100, align 8, !tbaa !10
%102 = tail call i32 @ring_doorbell_nop(ptr noundef %101) #2
%103 = icmp eq i32 %102, 0
br i1 %103, label %104, label %109
104: ; preds = %98, %48
%105 = add nuw nsw i64 %16, 1
%106 = load i32, ptr @ATTEMPTS, align 4, !tbaa !6
%107 = sext i32 %106 to i64
%108 = icmp slt i64 %105, %107
br i1 %108, label %15, label %112, !llvm.loop !17
109: ; preds = %98, %95, %27, %42, %53, %61, %70, %82, %91
%110 = phi i32 [ %30, %27 ], [ %94, %91 ], [ %80, %82 ], [ %73, %70 ], [ %64, %61 ], [ %56, %53 ], [ %47, %42 ], [ %102, %98 ], [ %96, %95 ]
%111 = load i32, ptr @ATTEMPTS, align 4, !tbaa !6
br label %112
112: ; preds = %104, %109
%113 = phi i32 [ %111, %109 ], [ %106, %104 ]
%114 = phi i32 [ %110, %109 ], [ 0, %104 ]
%115 = icmp sgt i32 %113, 0
br i1 %115, label %116, label %137
116: ; preds = %112, %132
%117 = phi i64 [ %133, %132 ], [ 0, %112 ]
%118 = load ptr, ptr @clients, align 8, !tbaa !10
%119 = getelementptr inbounds ptr, ptr %118, i64 %117
%120 = load ptr, ptr %119, align 8, !tbaa !10
%121 = tail call i32 @IS_ERR_OR_NULL(ptr noundef %120) #2
%122 = icmp eq i32 %121, 0
br i1 %122, label %123, label %132
123: ; preds = %116
%124 = load ptr, ptr @clients, align 8, !tbaa !10
%125 = getelementptr inbounds ptr, ptr %124, i64 %117
%126 = load ptr, ptr %125, align 8, !tbaa !10
%127 = tail call i32 @__guc_client_disable(ptr noundef %126) #2
%128 = load ptr, ptr @clients, align 8, !tbaa !10
%129 = getelementptr inbounds ptr, ptr %128, i64 %117
%130 = load ptr, ptr %129, align 8, !tbaa !10
%131 = tail call i32 @guc_client_free(ptr noundef %130) #2
br label %132
132: ; preds = %116, %123
%133 = add nuw nsw i64 %117, 1
%134 = load i32, ptr @ATTEMPTS, align 4, !tbaa !6
%135 = sext i32 %134 to i64
%136 = icmp slt i64 %133, %135
br i1 %136, label %116, label %137, !llvm.loop !19
137: ; preds = %132, %12, %112, %1
%138 = phi i32 [ %10, %1 ], [ %114, %112 ], [ 0, %12 ], [ %114, %132 ]
%139 = tail call i32 @intel_runtime_pm_put(ptr noundef nonnull %7, i32 noundef %8) #2
%140 = tail call i32 @mutex_unlock(ptr noundef %0) #2
ret i32 %138
}
declare i32 @GEM_BUG_ON(i32 noundef) local_unnamed_addr #1
declare i32 @HAS_GT_UC(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_lock(ptr noundef) local_unnamed_addr #1
declare i32 @intel_runtime_pm_get(ptr noundef) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef, ...) local_unnamed_addr #1
declare i32 @check_all_doorbells(ptr noundef) local_unnamed_addr #1
declare ptr @guc_client_alloc(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @IS_ERR(ptr noundef) local_unnamed_addr #1
declare i32 @PTR_ERR(ptr noundef) local_unnamed_addr #1
declare i64 @available_dbs(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @validate_client(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @__guc_client_enable(ptr noundef) local_unnamed_addr #1
declare i32 @ring_doorbell_nop(ptr noundef) local_unnamed_addr #1
declare i32 @IS_ERR_OR_NULL(ptr noundef) local_unnamed_addr #1
declare i32 @__guc_client_disable(ptr noundef) local_unnamed_addr #1
declare i32 @guc_client_free(ptr noundef) local_unnamed_addr #1
declare i32 @intel_runtime_pm_put(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mutex_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !14, i64 0}
!13 = !{!"TYPE_17__", !14, i64 0, !14, i64 8}
!14 = !{!"long", !8, i64 0}
!15 = !{!14, !14, i64 0}
!16 = !{!13, !14, i64 8}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}
| linux_drivers_gpu_drm_i915_gt_uc_extr_selftest_guc.c_igt_guc_doorbells |
; ModuleID = 'AnghaBench/linux/sound/soc/pxa/extr_corgi.c_corgi_get_jack.c'
source_filename = "AnghaBench/linux/sound/soc/pxa/extr_corgi.c_corgi_get_jack.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@corgi_jack_func = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @corgi_get_jack], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable
define internal noundef i32 @corgi_get_jack(ptr nocapture readnone %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr @corgi_jack_func, align 4, !tbaa !5
%4 = load ptr, ptr %1, align 8, !tbaa !9
store i32 %3, ptr %4, align 4, !tbaa !5
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !13, i64 0}
!10 = !{!"snd_ctl_elem_value", !11, i64 0}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"TYPE_3__", !13, i64 0}
!13 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/sound/soc/pxa/extr_corgi.c_corgi_get_jack.c'
source_filename = "AnghaBench/linux/sound/soc/pxa/extr_corgi.c_corgi_get_jack.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@corgi_jack_func = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @corgi_get_jack], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync)
define internal noundef i32 @corgi_get_jack(ptr nocapture readnone %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr @corgi_jack_func, align 4, !tbaa !6
%4 = load ptr, ptr %1, align 8, !tbaa !10
store i32 %3, ptr %4, align 4, !tbaa !6
ret i32 0
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !14, i64 0}
!11 = !{!"snd_ctl_elem_value", !12, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"TYPE_3__", !14, i64 0}
!14 = !{!"any pointer", !8, i64 0}
| linux_sound_soc_pxa_extr_corgi.c_corgi_get_jack |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/kernel/cpu/mcheck/extr_mce.c_drain_mcelog_buffer.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/kernel/cpu/mcheck/extr_mce.c_drain_mcelog_buffer.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, ptr }
%struct.mce = type { i32 }
@mcelog = dso_local global %struct.TYPE_2__ zeroinitializer, align 8
@jiffies = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [45 x i8] c"MCE: skipping error being logged currently!\0A\00", align 1
@x86_mce_decoder_chain = dso_local global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @drain_mcelog_buffer], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @drain_mcelog_buffer() #0 {
%1 = load i32, ptr @mcelog, align 8, !tbaa !5
%2 = tail call i32 @rcu_dereference(i32 noundef %1) #2
br label %3
3: ; preds = %41, %0
%4 = phi i32 [ 0, %0 ], [ %5, %41 ]
%5 = phi i32 [ %2, %0 ], [ %47, %41 ]
%6 = icmp ult i32 %4, %5
%7 = zext i32 %4 to i64
br i1 %6, label %8, label %41
8: ; preds = %3
%9 = zext i32 %5 to i64
br label %10
10: ; preds = %8, %36
%11 = phi i64 [ %7, %8 ], [ %39, %36 ]
%12 = load i64, ptr @jiffies, align 8, !tbaa !11
%13 = load ptr, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @mcelog, i64 0, i32 1), align 8, !tbaa !13
%14 = getelementptr inbounds %struct.mce, ptr %13, i64 %11
%15 = load i32, ptr %14, align 4, !tbaa !14
br label %16
16: ; preds = %20, %10
%17 = phi i32 [ %30, %20 ], [ %15, %10 ]
%18 = phi i32 [ %28, %20 ], [ 1, %10 ]
%19 = icmp eq i32 %17, 0
br i1 %19, label %20, label %36
20: ; preds = %16
%21 = load i64, ptr @jiffies, align 8, !tbaa !11
%22 = shl i32 %18, 1
%23 = zext i32 %22 to i64
%24 = add i64 %12, %23
%25 = tail call i64 @time_after_eq(i64 noundef %21, i64 noundef %24) #2
%26 = icmp ne i64 %25, 0
%27 = zext i1 %26 to i32
%28 = add i32 %18, %27
%29 = tail call i32 (...) @cpu_relax() #2
%30 = load i32, ptr %14, align 4, !tbaa !14
%31 = icmp eq i32 %30, 0
%32 = icmp ugt i32 %28, 3
%33 = select i1 %31, i1 %32, i1 false
br i1 %33, label %34, label %16, !llvm.loop !16
34: ; preds = %20
%35 = tail call i32 @pr_err(ptr noundef nonnull @.str) #2
br label %36
36: ; preds = %16, %34
%37 = tail call i32 (...) @smp_rmb() #2
%38 = tail call i32 @atomic_notifier_call_chain(ptr noundef nonnull @x86_mce_decoder_chain, i32 noundef 0, ptr noundef nonnull %14) #2
%39 = add nuw nsw i64 %11, 1
%40 = icmp eq i64 %39, %9
br i1 %40, label %41, label %10, !llvm.loop !18
41: ; preds = %36, %3
%42 = load ptr, ptr getelementptr inbounds (%struct.TYPE_2__, ptr @mcelog, i64 0, i32 1), align 8, !tbaa !13
%43 = getelementptr inbounds %struct.mce, ptr %42, i64 %7
%44 = sub i32 %5, %4
%45 = shl i32 %44, 2
%46 = tail call i32 @memset(ptr noundef %43, i32 noundef 0, i32 noundef %45) #2
%47 = tail call i32 @cmpxchg(ptr noundef nonnull @mcelog, i32 noundef %5, i32 noundef 0) #2
%48 = icmp eq i32 %47, %5
br i1 %48, label %49, label %3, !llvm.loop !19
49: ; preds = %41
ret void
}
declare i32 @rcu_dereference(i32 noundef) local_unnamed_addr #1
declare i64 @time_after_eq(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @cpu_relax(...) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef) local_unnamed_addr #1
declare i32 @smp_rmb(...) local_unnamed_addr #1
declare i32 @atomic_notifier_call_chain(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cmpxchg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_2__", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!6, !10, i64 8}
!14 = !{!15, !7, i64 0}
!15 = !{!"mce", !7, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = distinct !{!18, !17}
!19 = distinct !{!19, !17}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/x86/kernel/cpu/mcheck/extr_mce.c_drain_mcelog_buffer.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/x86/kernel/cpu/mcheck/extr_mce.c_drain_mcelog_buffer.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_2__ = type { i32, ptr }
%struct.mce = type { i32 }
@mcelog = common global %struct.TYPE_2__ zeroinitializer, align 8
@jiffies = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [45 x i8] c"MCE: skipping error being logged currently!\0A\00", align 1
@x86_mce_decoder_chain = common global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @drain_mcelog_buffer], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @drain_mcelog_buffer() #0 {
%1 = load i32, ptr @mcelog, align 8, !tbaa !6
%2 = tail call i32 @rcu_dereference(i32 noundef %1) #2
br label %3
3: ; preds = %41, %0
%4 = phi i32 [ 0, %0 ], [ %5, %41 ]
%5 = phi i32 [ %2, %0 ], [ %47, %41 ]
%6 = icmp ult i32 %4, %5
%7 = zext i32 %4 to i64
br i1 %6, label %8, label %41
8: ; preds = %3
%9 = zext i32 %5 to i64
br label %10
10: ; preds = %8, %36
%11 = phi i64 [ %7, %8 ], [ %39, %36 ]
%12 = load i64, ptr @jiffies, align 8, !tbaa !12
%13 = load ptr, ptr getelementptr inbounds (i8, ptr @mcelog, i64 8), align 8, !tbaa !14
%14 = getelementptr inbounds %struct.mce, ptr %13, i64 %11
%15 = load i32, ptr %14, align 4, !tbaa !15
br label %16
16: ; preds = %20, %10
%17 = phi i32 [ %30, %20 ], [ %15, %10 ]
%18 = phi i32 [ %28, %20 ], [ 1, %10 ]
%19 = icmp eq i32 %17, 0
br i1 %19, label %20, label %36
20: ; preds = %16
%21 = load i64, ptr @jiffies, align 8, !tbaa !12
%22 = shl i32 %18, 1
%23 = zext i32 %22 to i64
%24 = add i64 %12, %23
%25 = tail call i64 @time_after_eq(i64 noundef %21, i64 noundef %24) #2
%26 = icmp ne i64 %25, 0
%27 = zext i1 %26 to i32
%28 = add i32 %18, %27
%29 = tail call i32 @cpu_relax() #2
%30 = load i32, ptr %14, align 4, !tbaa !15
%31 = icmp eq i32 %30, 0
%32 = icmp ugt i32 %28, 3
%33 = select i1 %31, i1 %32, i1 false
br i1 %33, label %34, label %16, !llvm.loop !17
34: ; preds = %20
%35 = tail call i32 @pr_err(ptr noundef nonnull @.str) #2
br label %36
36: ; preds = %16, %34
%37 = tail call i32 @smp_rmb() #2
%38 = tail call i32 @atomic_notifier_call_chain(ptr noundef nonnull @x86_mce_decoder_chain, i32 noundef 0, ptr noundef nonnull %14) #2
%39 = add nuw nsw i64 %11, 1
%40 = icmp eq i64 %39, %9
br i1 %40, label %41, label %10, !llvm.loop !19
41: ; preds = %36, %3
%42 = load ptr, ptr getelementptr inbounds (i8, ptr @mcelog, i64 8), align 8, !tbaa !14
%43 = getelementptr inbounds %struct.mce, ptr %42, i64 %7
%44 = sub i32 %5, %4
%45 = shl i32 %44, 2
%46 = tail call i32 @memset(ptr noundef %43, i32 noundef 0, i32 noundef %45) #2
%47 = tail call i32 @cmpxchg(ptr noundef nonnull @mcelog, i32 noundef %5, i32 noundef 0) #2
%48 = icmp eq i32 %47, %5
br i1 %48, label %49, label %3, !llvm.loop !20
49: ; preds = %41
ret void
}
declare i32 @rcu_dereference(i32 noundef) local_unnamed_addr #1
declare i64 @time_after_eq(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @cpu_relax(...) local_unnamed_addr #1
declare i32 @pr_err(ptr noundef) local_unnamed_addr #1
declare i32 @smp_rmb(...) local_unnamed_addr #1
declare i32 @atomic_notifier_call_chain(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @cmpxchg(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !9, i64 0}
!14 = !{!7, !11, i64 8}
!15 = !{!16, !8, i64 0}
!16 = !{!"mce", !8, i64 0}
!17 = distinct !{!17, !18}
!18 = !{!"llvm.loop.mustprogress"}
!19 = distinct !{!19, !18}
!20 = distinct !{!20, !18}
| fastsocket_kernel_arch_x86_kernel_cpu_mcheck_extr_mce.c_drain_mcelog_buffer |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/extr_pcie.c_brcmf_pcie_quick_check_isr.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/extr_pcie.c_brcmf_pcie_quick_check_isr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@BRCMF_PCIE_PCIE2REG_MAILBOXINT = dso_local local_unnamed_addr global i32 0, align 4
@PCIE = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [7 x i8] c"Enter\0A\00", align 1
@IRQ_WAKE_THREAD = dso_local local_unnamed_addr global i32 0, align 4
@IRQ_NONE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @brcmf_pcie_quick_check_isr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @brcmf_pcie_quick_check_isr(i32 %0, ptr noundef %1) #0 {
%3 = load i32, ptr @BRCMF_PCIE_PCIE2REG_MAILBOXINT, align 4, !tbaa !5
%4 = tail call i64 @brcmf_pcie_read_reg32(ptr noundef %1, i32 noundef %3) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = tail call i32 @brcmf_pcie_intr_disable(ptr noundef %1) #2
%8 = load i32, ptr @PCIE, align 4, !tbaa !5
%9 = tail call i32 @brcmf_dbg(i32 noundef %8, ptr noundef nonnull @.str) #2
br label %10
10: ; preds = %2, %6
%11 = phi ptr [ @IRQ_WAKE_THREAD, %6 ], [ @IRQ_NONE, %2 ]
%12 = load i32, ptr %11, align 4, !tbaa !5
ret i32 %12
}
declare i64 @brcmf_pcie_read_reg32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @brcmf_pcie_intr_disable(ptr noundef) local_unnamed_addr #1
declare i32 @brcmf_dbg(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/extr_pcie.c_brcmf_pcie_quick_check_isr.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/broadcom/brcm80211/brcmfmac/extr_pcie.c_brcmf_pcie_quick_check_isr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BRCMF_PCIE_PCIE2REG_MAILBOXINT = common local_unnamed_addr global i32 0, align 4
@PCIE = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [7 x i8] c"Enter\0A\00", align 1
@IRQ_WAKE_THREAD = common local_unnamed_addr global i32 0, align 4
@IRQ_NONE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @brcmf_pcie_quick_check_isr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @brcmf_pcie_quick_check_isr(i32 %0, ptr noundef %1) #0 {
%3 = load i32, ptr @BRCMF_PCIE_PCIE2REG_MAILBOXINT, align 4, !tbaa !6
%4 = tail call i64 @brcmf_pcie_read_reg32(ptr noundef %1, i32 noundef %3) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = tail call i32 @brcmf_pcie_intr_disable(ptr noundef %1) #2
%8 = load i32, ptr @PCIE, align 4, !tbaa !6
%9 = tail call i32 @brcmf_dbg(i32 noundef %8, ptr noundef nonnull @.str) #2
br label %10
10: ; preds = %2, %6
%11 = phi ptr [ @IRQ_WAKE_THREAD, %6 ], [ @IRQ_NONE, %2 ]
%12 = load i32, ptr %11, align 4, !tbaa !6
ret i32 %12
}
declare i64 @brcmf_pcie_read_reg32(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @brcmf_pcie_intr_disable(ptr noundef) local_unnamed_addr #1
declare i32 @brcmf_dbg(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| linux_drivers_net_wireless_broadcom_brcm80211_brcmfmac_extr_pcie.c_brcmf_pcie_quick_check_isr |
; ModuleID = 'AnghaBench/linux/drivers/net/wireless/rsi/extr_rsi_common.h_rsi_set_event.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/rsi/extr_rsi_common.h_rsi_set_event.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.rsi_event = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @rsi_set_event], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal void @rsi_set_event(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.rsi_event, ptr %0, i64 0, i32 1
%3 = tail call i32 @atomic_set(ptr noundef nonnull %2, i32 noundef 0) #2
%4 = tail call i32 @wake_up_interruptible(ptr noundef %0) #2
ret void
}
declare i32 @atomic_set(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wake_up_interruptible(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/net/wireless/rsi/extr_rsi_common.h_rsi_set_event.c'
source_filename = "AnghaBench/linux/drivers/net/wireless/rsi/extr_rsi_common.h_rsi_set_event.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @rsi_set_event], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal void @rsi_set_event(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 4
%3 = tail call i32 @atomic_set(ptr noundef nonnull %2, i32 noundef 0) #2
%4 = tail call i32 @wake_up_interruptible(ptr noundef %0) #2
ret void
}
declare i32 @atomic_set(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wake_up_interruptible(ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_net_wireless_rsi_extr_rsi_common.h_rsi_set_event |
; ModuleID = 'AnghaBench/linux/drivers/md/extr_raid5-cache.c_r5c_journal_mode_store.c'
source_filename = "AnghaBench/linux/drivers/md/extr_raid5-cache.c_r5c_journal_mode_store.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@r5c_journal_mode_str = dso_local local_unnamed_addr global ptr null, align 8
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @r5c_journal_mode_store], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @r5c_journal_mode_store(ptr noundef %0, ptr noundef %1, i64 noundef %2) #0 {
%4 = load ptr, ptr @r5c_journal_mode_str, align 8, !tbaa !5
%5 = tail call i32 @ARRAY_SIZE(ptr noundef %4) #2
%6 = icmp ult i64 %2, 2
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i32, ptr @EINVAL, align 4, !tbaa !9
%9 = sub nsw i32 0, %8
br label %50
10: ; preds = %3
%11 = getelementptr i8, ptr %1, i64 %2
%12 = getelementptr i8, ptr %11, i64 -1
%13 = load i8, ptr %12, align 1, !tbaa !11
%14 = icmp eq i8 %13, 10
%15 = sext i1 %14 to i64
%16 = add i64 %15, %2
%17 = icmp eq i32 %5, 0
br i1 %17, label %39, label %18
18: ; preds = %10
%19 = add i32 %5, -1
%20 = sext i32 %19 to i64
br label %21
21: ; preds = %18, %34
%22 = phi i64 [ %20, %18 ], [ %35, %34 ]
%23 = load ptr, ptr @r5c_journal_mode_str, align 8, !tbaa !5
%24 = getelementptr inbounds i32, ptr %23, i64 %22
%25 = load i32, ptr %24, align 4, !tbaa !9
%26 = tail call i64 @strlen(i32 noundef %25) #2
%27 = icmp eq i64 %26, %16
br i1 %27, label %28, label %34
28: ; preds = %21
%29 = load ptr, ptr @r5c_journal_mode_str, align 8, !tbaa !5
%30 = getelementptr inbounds i32, ptr %29, i64 %22
%31 = load i32, ptr %30, align 4, !tbaa !9
%32 = tail call i32 @strncmp(ptr noundef %1, i32 noundef %31, i64 noundef %16) #2
%33 = icmp eq i32 %32, 0
br i1 %33, label %37, label %34
34: ; preds = %28, %21
%35 = add nsw i64 %22, -1
%36 = icmp eq i64 %22, 0
br i1 %36, label %39, label %21, !llvm.loop !12
37: ; preds = %28
%38 = trunc i64 %22 to i32
br label %39
39: ; preds = %34, %37, %10
%40 = phi i32 [ -1, %10 ], [ %38, %37 ], [ -1, %34 ]
%41 = tail call i32 @mddev_lock(ptr noundef %0) #2
%42 = icmp eq i32 %41, 0
br i1 %42, label %43, label %50
43: ; preds = %39
%44 = tail call i32 @r5c_journal_mode_set(ptr noundef %0, i32 noundef %40) #2
%45 = tail call i32 @mddev_unlock(ptr noundef %0) #2
%46 = icmp eq i32 %44, 0
%47 = zext i32 %44 to i64
%48 = select i1 %46, i64 %2, i64 %47
%49 = trunc i64 %48 to i32
br label %50
50: ; preds = %39, %43, %7
%51 = phi i32 [ %9, %7 ], [ %49, %43 ], [ %41, %39 ]
ret i32 %51
}
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i64 @strlen(i32 noundef) local_unnamed_addr #1
declare i32 @strncmp(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @mddev_lock(ptr noundef) local_unnamed_addr #1
declare i32 @r5c_journal_mode_set(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mddev_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/md/extr_raid5-cache.c_r5c_journal_mode_store.c'
source_filename = "AnghaBench/linux/drivers/md/extr_raid5-cache.c_r5c_journal_mode_store.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@r5c_journal_mode_str = common local_unnamed_addr global ptr null, align 8
@EINVAL = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @r5c_journal_mode_store], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @r5c_journal_mode_store(ptr noundef %0, ptr noundef %1, i64 noundef %2) #0 {
%4 = load ptr, ptr @r5c_journal_mode_str, align 8, !tbaa !6
%5 = tail call i32 @ARRAY_SIZE(ptr noundef %4) #2
%6 = icmp ult i64 %2, 2
br i1 %6, label %7, label %10
7: ; preds = %3
%8 = load i32, ptr @EINVAL, align 4, !tbaa !10
%9 = sub nsw i32 0, %8
br label %50
10: ; preds = %3
%11 = getelementptr i8, ptr %1, i64 %2
%12 = getelementptr i8, ptr %11, i64 -1
%13 = load i8, ptr %12, align 1, !tbaa !12
%14 = icmp eq i8 %13, 10
%15 = sext i1 %14 to i64
%16 = add i64 %15, %2
%17 = icmp eq i32 %5, 0
br i1 %17, label %39, label %18
18: ; preds = %10
%19 = add i32 %5, -1
%20 = sext i32 %19 to i64
br label %21
21: ; preds = %18, %34
%22 = phi i64 [ %20, %18 ], [ %35, %34 ]
%23 = load ptr, ptr @r5c_journal_mode_str, align 8, !tbaa !6
%24 = getelementptr inbounds i32, ptr %23, i64 %22
%25 = load i32, ptr %24, align 4, !tbaa !10
%26 = tail call i64 @strlen(i32 noundef %25) #2
%27 = icmp eq i64 %26, %16
br i1 %27, label %28, label %34
28: ; preds = %21
%29 = load ptr, ptr @r5c_journal_mode_str, align 8, !tbaa !6
%30 = getelementptr inbounds i32, ptr %29, i64 %22
%31 = load i32, ptr %30, align 4, !tbaa !10
%32 = tail call i32 @strncmp(ptr noundef %1, i32 noundef %31, i64 noundef %16) #2
%33 = icmp eq i32 %32, 0
br i1 %33, label %37, label %34
34: ; preds = %28, %21
%35 = add nsw i64 %22, -1
%36 = icmp eq i64 %22, 0
br i1 %36, label %39, label %21, !llvm.loop !13
37: ; preds = %28
%38 = trunc nsw i64 %22 to i32
br label %39
39: ; preds = %34, %37, %10
%40 = phi i32 [ -1, %10 ], [ %38, %37 ], [ -1, %34 ]
%41 = tail call i32 @mddev_lock(ptr noundef %0) #2
%42 = icmp eq i32 %41, 0
br i1 %42, label %43, label %50
43: ; preds = %39
%44 = tail call i32 @r5c_journal_mode_set(ptr noundef %0, i32 noundef %40) #2
%45 = tail call i32 @mddev_unlock(ptr noundef %0) #2
%46 = icmp eq i32 %44, 0
%47 = zext i32 %44 to i64
%48 = select i1 %46, i64 %2, i64 %47
%49 = trunc i64 %48 to i32
br label %50
50: ; preds = %39, %43, %7
%51 = phi i32 [ %9, %7 ], [ %49, %43 ], [ %41, %39 ]
ret i32 %51
}
declare i32 @ARRAY_SIZE(ptr noundef) local_unnamed_addr #1
declare i64 @strlen(i32 noundef) local_unnamed_addr #1
declare i32 @strncmp(ptr noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @mddev_lock(ptr noundef) local_unnamed_addr #1
declare i32 @r5c_journal_mode_set(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @mddev_unlock(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!8, !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| linux_drivers_md_extr_raid5-cache.c_r5c_journal_mode_store |
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/ap/extr_wpa_auth.c_wpa_send_eapol.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/ap/extr_wpa_auth.c_wpa_send_eapol.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.wpa_state_machine = type { i32, i32, i32 }
%struct.TYPE_2__ = type { i64, i64 }
@WPA_KEY_INFO_KEY_TYPE = dso_local local_unnamed_addr global i32 0, align 4
@eapol_key_timeout_first = dso_local local_unnamed_addr global i32 0, align 4
@eapol_key_timeout_first_group = dso_local local_unnamed_addr global i32 0, align 4
@eapol_key_timeout_subseq = dso_local local_unnamed_addr global i32 0, align 4
@WPA_KEY_INFO_MIC = dso_local local_unnamed_addr global i32 0, align 4
@eapol_key_timeout_no_retrans = dso_local local_unnamed_addr global i32 0, align 4
@MSG_DEBUG = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [55 x i8] c"WPA: Use EAPOL-Key timeout of %u ms (retry counter %u)\00", align 1
@wpa_send_eapol_timeout = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @wpa_send_eapol], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @wpa_send_eapol(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, i64 noundef %6, i32 noundef %7, i32 noundef %8) #0 {
%10 = icmp eq ptr %1, null
br i1 %10, label %58, label %11
11: ; preds = %9
%12 = load i32, ptr @WPA_KEY_INFO_KEY_TYPE, align 4, !tbaa !5
%13 = and i32 %12, %2
%14 = tail call i32 @__wpa_send_eapol(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, i64 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef 0) #2
%15 = icmp ne i32 %13, 0
%16 = getelementptr inbounds %struct.wpa_state_machine, ptr %1, i64 0, i32 1
%17 = select i1 %15, ptr %1, ptr %16
%18 = load i32, ptr %17, align 4, !tbaa !5
%19 = icmp eq i32 %18, 1
br i1 %19, label %20, label %28
20: ; preds = %11
%21 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 1
%22 = load i64, ptr %21, align 8, !tbaa !9
%23 = icmp eq i64 %22, 0
br i1 %23, label %28, label %24
24: ; preds = %20
%25 = load i32, ptr @eapol_key_timeout_first, align 4
%26 = load i32, ptr @eapol_key_timeout_first_group, align 4
%27 = select i1 %15, i32 %25, i32 %26
br label %30
28: ; preds = %20, %11
%29 = load i32, ptr @eapol_key_timeout_subseq, align 4, !tbaa !5
br label %30
30: ; preds = %28, %24
%31 = phi i32 [ %27, %24 ], [ %29, %28 ]
%32 = load i64, ptr %0, align 8, !tbaa !13
%33 = icmp eq i64 %32, 0
br i1 %33, label %41, label %34
34: ; preds = %30
br i1 %15, label %35, label %39
35: ; preds = %34
%36 = load i32, ptr @WPA_KEY_INFO_MIC, align 4, !tbaa !5
%37 = and i32 %36, %2
%38 = icmp eq i32 %37, 0
br i1 %38, label %41, label %39
39: ; preds = %35, %34
%40 = load i32, ptr @eapol_key_timeout_no_retrans, align 4, !tbaa !5
br label %41
41: ; preds = %39, %35, %30
%42 = phi i32 [ %40, %39 ], [ %31, %35 ], [ %31, %30 ]
%43 = and i1 %15, %19
br i1 %43, label %44, label %50
44: ; preds = %41
%45 = load i32, ptr @WPA_KEY_INFO_MIC, align 4, !tbaa !5
%46 = and i32 %45, %2
%47 = icmp eq i32 %46, 0
br i1 %47, label %48, label %50
48: ; preds = %44
%49 = getelementptr inbounds %struct.wpa_state_machine, ptr %1, i64 0, i32 2
store i32 1, ptr %49, align 4, !tbaa !14
br label %50
50: ; preds = %48, %44, %41
%51 = load i32, ptr @MSG_DEBUG, align 4, !tbaa !5
%52 = tail call i32 @wpa_printf(i32 noundef %51, ptr noundef nonnull @.str, i32 noundef %42, i32 noundef %18) #2
%53 = sdiv i32 %42, 1000
%54 = srem i32 %42, 1000
%55 = mul nsw i32 %54, 1000
%56 = load i32, ptr @wpa_send_eapol_timeout, align 4, !tbaa !5
%57 = tail call i32 @eloop_register_timeout(i32 noundef %53, i32 noundef %55, i32 noundef %56, ptr noundef nonnull %0, ptr noundef nonnull %1) #2
br label %58
58: ; preds = %9, %50
ret void
}
declare i32 @__wpa_send_eapol(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wpa_printf(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @eloop_register_timeout(i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !12, i64 8}
!10 = !{!"wpa_authenticator", !11, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0, !12, i64 8}
!12 = !{!"long", !7, i64 0}
!13 = !{!10, !12, i64 0}
!14 = !{!15, !6, i64 8}
!15 = !{!"wpa_state_machine", !6, i64 0, !6, i64 4, !6, i64 8}
| ; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/ap/extr_wpa_auth.c_wpa_send_eapol.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/ap/extr_wpa_auth.c_wpa_send_eapol.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@WPA_KEY_INFO_KEY_TYPE = common local_unnamed_addr global i32 0, align 4
@eapol_key_timeout_first = common local_unnamed_addr global i32 0, align 4
@eapol_key_timeout_first_group = common local_unnamed_addr global i32 0, align 4
@eapol_key_timeout_subseq = common local_unnamed_addr global i32 0, align 4
@WPA_KEY_INFO_MIC = common local_unnamed_addr global i32 0, align 4
@eapol_key_timeout_no_retrans = common local_unnamed_addr global i32 0, align 4
@MSG_DEBUG = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [55 x i8] c"WPA: Use EAPOL-Key timeout of %u ms (retry counter %u)\00", align 1
@wpa_send_eapol_timeout = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @wpa_send_eapol], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @wpa_send_eapol(ptr noundef %0, ptr noundef %1, i32 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, i64 noundef %6, i32 noundef %7, i32 noundef %8) #0 {
%10 = icmp eq ptr %1, null
br i1 %10, label %60, label %11
11: ; preds = %9
%12 = load i32, ptr @WPA_KEY_INFO_KEY_TYPE, align 4, !tbaa !6
%13 = and i32 %12, %2
%14 = tail call i32 @__wpa_send_eapol(ptr noundef %0, ptr noundef nonnull %1, i32 noundef %2, ptr noundef %3, ptr noundef %4, ptr noundef %5, i64 noundef %6, i32 noundef %7, i32 noundef %8, i32 noundef 0) #2
%15 = icmp ne i32 %13, 0
%16 = select i1 %15, i64 0, i64 4
%17 = getelementptr inbounds i8, ptr %1, i64 %16
%18 = load i32, ptr %17, align 4, !tbaa !6
%19 = icmp eq i32 %18, 1
br i1 %19, label %20, label %28
20: ; preds = %11
%21 = getelementptr inbounds i8, ptr %0, i64 8
%22 = load i64, ptr %21, align 8, !tbaa !10
%23 = icmp eq i64 %22, 0
br i1 %23, label %28, label %24
24: ; preds = %20
%25 = load i32, ptr @eapol_key_timeout_first, align 4
%26 = load i32, ptr @eapol_key_timeout_first_group, align 4
%27 = select i1 %15, i32 %25, i32 %26
br label %30
28: ; preds = %20, %11
%29 = load i32, ptr @eapol_key_timeout_subseq, align 4, !tbaa !6
br label %30
30: ; preds = %28, %24
%31 = phi i32 [ %27, %24 ], [ %29, %28 ]
%32 = load i64, ptr %0, align 8, !tbaa !14
%33 = icmp eq i64 %32, 0
br i1 %33, label %41, label %34
34: ; preds = %30
br i1 %15, label %35, label %39
35: ; preds = %34
%36 = load i32, ptr @WPA_KEY_INFO_MIC, align 4, !tbaa !6
%37 = and i32 %36, %2
%38 = icmp eq i32 %37, 0
br i1 %38, label %41, label %39
39: ; preds = %35, %34
%40 = load i32, ptr @eapol_key_timeout_no_retrans, align 4, !tbaa !6
br label %41
41: ; preds = %39, %35, %30
%42 = phi i32 [ %40, %39 ], [ %31, %35 ], [ %31, %30 ]
%43 = and i1 %15, %19
br i1 %43, label %44, label %50
44: ; preds = %41
%45 = load i32, ptr @WPA_KEY_INFO_MIC, align 4, !tbaa !6
%46 = and i32 %45, %2
%47 = icmp eq i32 %46, 0
br i1 %47, label %48, label %50
48: ; preds = %44
%49 = getelementptr inbounds i8, ptr %1, i64 8
store i32 1, ptr %49, align 4, !tbaa !15
br label %50
50: ; preds = %48, %44, %41
%51 = load i32, ptr @MSG_DEBUG, align 4, !tbaa !6
%52 = tail call i32 @wpa_printf(i32 noundef %51, ptr noundef nonnull @.str, i32 noundef %42, i32 noundef %18) #2
%53 = freeze i32 %42
%54 = sdiv i32 %53, 1000
%55 = mul i32 %54, 1000
%56 = sub i32 %53, %55
%57 = mul nsw i32 %56, 1000
%58 = load i32, ptr @wpa_send_eapol_timeout, align 4, !tbaa !6
%59 = tail call i32 @eloop_register_timeout(i32 noundef %54, i32 noundef %57, i32 noundef %58, ptr noundef nonnull %0, ptr noundef nonnull %1) #2
br label %60
60: ; preds = %9, %50
ret void
}
declare i32 @__wpa_send_eapol(ptr noundef, ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef, i64 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wpa_printf(i32 noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @eloop_register_timeout(i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 8}
!11 = !{!"wpa_authenticator", !12, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0, !13, i64 8}
!13 = !{!"long", !8, i64 0}
!14 = !{!11, !13, i64 0}
!15 = !{!16, !7, i64 8}
!16 = !{!"wpa_state_machine", !7, i64 0, !7, i64 4, !7, i64 8}
| freebsd_contrib_wpa_src_ap_extr_wpa_auth.c_wpa_send_eapol |
; ModuleID = 'AnghaBench/linux/drivers/staging/rtl8723bs/core/extr_rtw_wlan_util.c_update_IOT_info.c'
source_filename = "AnghaBench/linux/drivers/staging/rtl8723bs/core/extr_rtw_wlan_util.c_update_IOT_info.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mlme_ext_info = type { i32, i32, i32 }
@DYNAMIC_BB_DYNAMIC_TXPWR = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @update_IOT_info(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !5
switch i32 %2, label %16 [
i32 130, label %3
i32 129, label %6
i32 128, label %12
]
3: ; preds = %1
%4 = getelementptr inbounds %struct.mlme_ext_info, ptr %0, i64 0, i32 1
store i32 1, ptr %4, align 4, !tbaa !10
%5 = getelementptr inbounds %struct.mlme_ext_info, ptr %0, i64 0, i32 2
store i32 0, ptr %5, align 4, !tbaa !11
br label %19
6: ; preds = %1
%7 = getelementptr inbounds %struct.mlme_ext_info, ptr %0, i64 0, i32 1
store i32 0, ptr %7, align 4, !tbaa !10
%8 = getelementptr inbounds %struct.mlme_ext_info, ptr %0, i64 0, i32 2
store i32 1, ptr %8, align 4, !tbaa !11
%9 = load i32, ptr @DYNAMIC_BB_DYNAMIC_TXPWR, align 4, !tbaa !12
%10 = xor i32 %9, -1
%11 = tail call i32 @Switch_DM_Func(ptr noundef nonnull %0, i32 noundef %10, i32 noundef 0) #2
br label %19
12: ; preds = %1
%13 = load i32, ptr @DYNAMIC_BB_DYNAMIC_TXPWR, align 4, !tbaa !12
%14 = xor i32 %13, -1
%15 = tail call i32 @Switch_DM_Func(ptr noundef nonnull %0, i32 noundef %14, i32 noundef 0) #2
br label %19
16: ; preds = %1
%17 = getelementptr inbounds %struct.mlme_ext_info, ptr %0, i64 0, i32 1
store i32 0, ptr %17, align 4, !tbaa !10
%18 = getelementptr inbounds %struct.mlme_ext_info, ptr %0, i64 0, i32 2
store i32 1, ptr %18, align 4, !tbaa !11
br label %19
19: ; preds = %16, %12, %6, %3
ret void
}
declare i32 @Switch_DM_Func(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"mlme_ext_info", !7, i64 0, !7, i64 4, !7, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!6, !7, i64 4}
!11 = !{!6, !7, i64 8}
!12 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/staging/rtl8723bs/core/extr_rtw_wlan_util.c_update_IOT_info.c'
source_filename = "AnghaBench/linux/drivers/staging/rtl8723bs/core/extr_rtw_wlan_util.c_update_IOT_info.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@DYNAMIC_BB_DYNAMIC_TXPWR = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @update_IOT_info(ptr noundef %0) local_unnamed_addr #0 {
%2 = load i32, ptr %0, align 4, !tbaa !6
switch i32 %2, label %14 [
i32 130, label %3
i32 129, label %5
i32 128, label %10
]
3: ; preds = %1
%4 = getelementptr inbounds i8, ptr %0, i64 4
store <2 x i32> <i32 1, i32 0>, ptr %4, align 4, !tbaa !11
br label %16
5: ; preds = %1
%6 = getelementptr inbounds i8, ptr %0, i64 4
store <2 x i32> <i32 0, i32 1>, ptr %6, align 4, !tbaa !11
%7 = load i32, ptr @DYNAMIC_BB_DYNAMIC_TXPWR, align 4, !tbaa !11
%8 = xor i32 %7, -1
%9 = tail call i32 @Switch_DM_Func(ptr noundef nonnull %0, i32 noundef %8, i32 noundef 0) #2
br label %16
10: ; preds = %1
%11 = load i32, ptr @DYNAMIC_BB_DYNAMIC_TXPWR, align 4, !tbaa !11
%12 = xor i32 %11, -1
%13 = tail call i32 @Switch_DM_Func(ptr noundef nonnull %0, i32 noundef %12, i32 noundef 0) #2
br label %16
14: ; preds = %1
%15 = getelementptr inbounds i8, ptr %0, i64 4
store <2 x i32> <i32 0, i32 1>, ptr %15, align 4, !tbaa !11
br label %16
16: ; preds = %14, %10, %5, %3
ret void
}
declare i32 @Switch_DM_Func(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mlme_ext_info", !8, i64 0, !8, i64 4, !8, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| linux_drivers_staging_rtl8723bs_core_extr_rtw_wlan_util.c_update_IOT_info |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/common/extr_sa1111.c_sa1111_wake.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/common/extr_sa1111.c_sa1111_wake.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.sa1111 = type { i32, i64, i32 }
@SA1111_SKCR = dso_local local_unnamed_addr global i64 0, align 8
@SKCR_VCO_OFF = dso_local local_unnamed_addr global i64 0, align 8
@SKCR_PLL_BYPASS = dso_local local_unnamed_addr global i64 0, align 8
@SKCR_OE_EN = dso_local local_unnamed_addr global i64 0, align 8
@SKCR_RCLKEN = dso_local local_unnamed_addr global i64 0, align 8
@SKCR_RDYEN = dso_local local_unnamed_addr global i64 0, align 8
@SA1111_SKPCR = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @sa1111_wake], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @sa1111_wake(ptr noundef %0) #0 {
%2 = tail call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #2
%3 = getelementptr inbounds %struct.sa1111, ptr %0, i64 0, i32 2
%4 = load i32, ptr %3, align 8, !tbaa !5
%5 = tail call i32 @clk_enable(i32 noundef %4) #2
%6 = getelementptr inbounds %struct.sa1111, ptr %0, i64 0, i32 1
%7 = load i64, ptr %6, align 8, !tbaa !11
%8 = load i64, ptr @SA1111_SKCR, align 8, !tbaa !12
%9 = add nsw i64 %8, %7
%10 = tail call i64 @sa1111_readl(i64 noundef %9) #2
%11 = load i64, ptr @SKCR_VCO_OFF, align 8, !tbaa !12
%12 = xor i64 %11, -1
%13 = and i64 %10, %12
%14 = load i64, ptr %6, align 8, !tbaa !11
%15 = load i64, ptr @SA1111_SKCR, align 8, !tbaa !12
%16 = add nsw i64 %15, %14
%17 = tail call i32 @sa1111_writel(i64 noundef %13, i64 noundef %16) #2
%18 = load i64, ptr @SKCR_PLL_BYPASS, align 8, !tbaa !12
%19 = load i64, ptr @SKCR_OE_EN, align 8, !tbaa !12
%20 = or i64 %18, %19
%21 = or i64 %20, %13
%22 = load i64, ptr %6, align 8, !tbaa !11
%23 = load i64, ptr @SA1111_SKCR, align 8, !tbaa !12
%24 = add nsw i64 %23, %22
%25 = tail call i32 @sa1111_writel(i64 noundef %21, i64 noundef %24) #2
%26 = tail call i32 @udelay(i32 noundef 100) #2
%27 = load i64, ptr @SKCR_RCLKEN, align 8, !tbaa !12
%28 = load i64, ptr @SKCR_RDYEN, align 8, !tbaa !12
%29 = or i64 %27, %28
%30 = or i64 %29, %21
%31 = load i64, ptr %6, align 8, !tbaa !11
%32 = load i64, ptr @SA1111_SKCR, align 8, !tbaa !12
%33 = add nsw i64 %32, %31
%34 = tail call i32 @sa1111_writel(i64 noundef %30, i64 noundef %33) #2
%35 = tail call i32 @udelay(i32 noundef 1) #2
%36 = load i64, ptr %6, align 8, !tbaa !11
%37 = load i64, ptr @SA1111_SKPCR, align 8, !tbaa !12
%38 = add nsw i64 %37, %36
%39 = tail call i32 @sa1111_writel(i64 noundef 0, i64 noundef %38) #2
%40 = tail call i32 @spin_unlock_irqrestore(ptr noundef %0, i64 noundef undef) #2
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @clk_enable(i32 noundef) local_unnamed_addr #1
declare i64 @sa1111_readl(i64 noundef) local_unnamed_addr #1
declare i32 @sa1111_writel(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"sa1111", !7, i64 0, !10, i64 8, !7, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!10, !10, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/arm/common/extr_sa1111.c_sa1111_wake.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/arm/common/extr_sa1111.c_sa1111_wake.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@SA1111_SKCR = common local_unnamed_addr global i64 0, align 8
@SKCR_VCO_OFF = common local_unnamed_addr global i64 0, align 8
@SKCR_PLL_BYPASS = common local_unnamed_addr global i64 0, align 8
@SKCR_OE_EN = common local_unnamed_addr global i64 0, align 8
@SKCR_RCLKEN = common local_unnamed_addr global i64 0, align 8
@SKCR_RDYEN = common local_unnamed_addr global i64 0, align 8
@SA1111_SKPCR = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @sa1111_wake], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @sa1111_wake(ptr noundef %0) #0 {
%2 = tail call i32 @spin_lock_irqsave(ptr noundef %0, i64 noundef undef) #2
%3 = getelementptr inbounds i8, ptr %0, i64 16
%4 = load i32, ptr %3, align 8, !tbaa !6
%5 = tail call i32 @clk_enable(i32 noundef %4) #2
%6 = getelementptr inbounds i8, ptr %0, i64 8
%7 = load i64, ptr %6, align 8, !tbaa !12
%8 = load i64, ptr @SA1111_SKCR, align 8, !tbaa !13
%9 = add nsw i64 %8, %7
%10 = tail call i64 @sa1111_readl(i64 noundef %9) #2
%11 = load i64, ptr @SKCR_VCO_OFF, align 8, !tbaa !13
%12 = xor i64 %11, -1
%13 = and i64 %10, %12
%14 = load i64, ptr %6, align 8, !tbaa !12
%15 = load i64, ptr @SA1111_SKCR, align 8, !tbaa !13
%16 = add nsw i64 %15, %14
%17 = tail call i32 @sa1111_writel(i64 noundef %13, i64 noundef %16) #2
%18 = load i64, ptr @SKCR_PLL_BYPASS, align 8, !tbaa !13
%19 = load i64, ptr @SKCR_OE_EN, align 8, !tbaa !13
%20 = or i64 %18, %19
%21 = or i64 %20, %13
%22 = load i64, ptr %6, align 8, !tbaa !12
%23 = load i64, ptr @SA1111_SKCR, align 8, !tbaa !13
%24 = add nsw i64 %23, %22
%25 = tail call i32 @sa1111_writel(i64 noundef %21, i64 noundef %24) #2
%26 = tail call i32 @udelay(i32 noundef 100) #2
%27 = load i64, ptr @SKCR_RCLKEN, align 8, !tbaa !13
%28 = load i64, ptr @SKCR_RDYEN, align 8, !tbaa !13
%29 = or i64 %27, %28
%30 = or i64 %29, %21
%31 = load i64, ptr %6, align 8, !tbaa !12
%32 = load i64, ptr @SA1111_SKCR, align 8, !tbaa !13
%33 = add nsw i64 %32, %31
%34 = tail call i32 @sa1111_writel(i64 noundef %30, i64 noundef %33) #2
%35 = tail call i32 @udelay(i32 noundef 1) #2
%36 = load i64, ptr %6, align 8, !tbaa !12
%37 = load i64, ptr @SA1111_SKPCR, align 8, !tbaa !13
%38 = add nsw i64 %37, %36
%39 = tail call i32 @sa1111_writel(i64 noundef 0, i64 noundef %38) #2
%40 = tail call i32 @spin_unlock_irqrestore(ptr noundef %0, i64 noundef undef) #2
ret void
}
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @clk_enable(i32 noundef) local_unnamed_addr #1
declare i64 @sa1111_readl(i64 noundef) local_unnamed_addr #1
declare i32 @sa1111_writel(i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @udelay(i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"sa1111", !8, i64 0, !11, i64 8, !8, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!11, !11, i64 0}
| fastsocket_kernel_arch_arm_common_extr_sa1111.c_sa1111_wake |
; ModuleID = 'AnghaBench/linux/drivers/edac/extr_i5100_edac.c_i5100_init_dimm_layout.c'
source_filename = "AnghaBench/linux/drivers/edac/extr_i5100_edac.c_i5100_init_dimm_layout.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@I5100_CHANNELS = dso_local local_unnamed_addr global i32 0, align 4
@I5100_MAX_DIMM_SLOTS_PER_CHAN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @i5100_init_dimm_layout], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @i5100_init_dimm_layout(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
%4 = load ptr, ptr %1, align 8, !tbaa !5
%5 = load i32, ptr @I5100_CHANNELS, align 4, !tbaa !10
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %41
7: ; preds = %2
%8 = load i32, ptr @I5100_MAX_DIMM_SLOTS_PER_CHAN, align 4, !tbaa !10
br label %9
9: ; preds = %7, %35
%10 = phi i32 [ %5, %7 ], [ %36, %35 ]
%11 = phi i32 [ %8, %7 ], [ %37, %35 ]
%12 = phi i64 [ 0, %7 ], [ %38, %35 ]
%13 = icmp sgt i32 %11, 0
br i1 %13, label %14, label %35
14: ; preds = %9
%15 = trunc i64 %12 to i32
br label %16
16: ; preds = %14, %16
%17 = phi i64 [ 0, %14 ], [ %29, %16 ]
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%18 = trunc i64 %17 to i32
%19 = call i64 @i5100_read_spd_byte(ptr noundef nonnull %1, i32 noundef %15, i32 noundef %18, i32 noundef 5, ptr noundef nonnull %3) #3
%20 = icmp slt i64 %19, 0
%21 = load i32, ptr %3, align 4
%22 = and i32 %21, 3
%23 = add nuw nsw i32 %22, 1
%24 = select i1 %20, i32 0, i32 %23
%25 = load ptr, ptr %4, align 8, !tbaa !12
%26 = getelementptr inbounds ptr, ptr %25, i64 %12
%27 = load ptr, ptr %26, align 8, !tbaa !14
%28 = getelementptr inbounds i32, ptr %27, i64 %17
store i32 %24, ptr %28, align 4, !tbaa !10
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
%29 = add nuw nsw i64 %17, 1
%30 = load i32, ptr @I5100_MAX_DIMM_SLOTS_PER_CHAN, align 4, !tbaa !10
%31 = sext i32 %30 to i64
%32 = icmp slt i64 %29, %31
br i1 %32, label %16, label %33, !llvm.loop !15
33: ; preds = %16
%34 = load i32, ptr @I5100_CHANNELS, align 4, !tbaa !10
br label %35
35: ; preds = %33, %9
%36 = phi i32 [ %34, %33 ], [ %10, %9 ]
%37 = phi i32 [ %30, %33 ], [ %11, %9 ]
%38 = add nuw nsw i64 %12, 1
%39 = sext i32 %36 to i64
%40 = icmp slt i64 %38, %39
br i1 %40, label %9, label %41, !llvm.loop !17
41: ; preds = %35, %2
%42 = call i32 @i5100_init_dimm_csmap(ptr noundef nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @i5100_read_spd_byte(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @i5100_init_dimm_csmap(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"mem_ctl_info", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
!12 = !{!13, !7, i64 0}
!13 = !{!"i5100_priv", !7, i64 0}
!14 = !{!7, !7, i64 0}
!15 = distinct !{!15, !16}
!16 = !{!"llvm.loop.mustprogress"}
!17 = distinct !{!17, !16}
| ; ModuleID = 'AnghaBench/linux/drivers/edac/extr_i5100_edac.c_i5100_init_dimm_layout.c'
source_filename = "AnghaBench/linux/drivers/edac/extr_i5100_edac.c_i5100_init_dimm_layout.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@I5100_CHANNELS = common local_unnamed_addr global i32 0, align 4
@I5100_MAX_DIMM_SLOTS_PER_CHAN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @i5100_init_dimm_layout], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @i5100_init_dimm_layout(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = alloca i32, align 4
%4 = load ptr, ptr %1, align 8, !tbaa !6
%5 = load i32, ptr @I5100_CHANNELS, align 4, !tbaa !11
%6 = icmp sgt i32 %5, 0
br i1 %6, label %7, label %41
7: ; preds = %2
%8 = load i32, ptr @I5100_MAX_DIMM_SLOTS_PER_CHAN, align 4, !tbaa !11
br label %9
9: ; preds = %7, %35
%10 = phi i32 [ %5, %7 ], [ %36, %35 ]
%11 = phi i32 [ %8, %7 ], [ %37, %35 ]
%12 = phi i64 [ 0, %7 ], [ %38, %35 ]
%13 = icmp sgt i32 %11, 0
br i1 %13, label %14, label %35
14: ; preds = %9
%15 = trunc nuw nsw i64 %12 to i32
br label %16
16: ; preds = %14, %16
%17 = phi i64 [ 0, %14 ], [ %29, %16 ]
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%18 = trunc nuw nsw i64 %17 to i32
%19 = call i64 @i5100_read_spd_byte(ptr noundef nonnull %1, i32 noundef %15, i32 noundef %18, i32 noundef 5, ptr noundef nonnull %3) #3
%20 = icmp slt i64 %19, 0
%21 = load i32, ptr %3, align 4
%22 = and i32 %21, 3
%23 = add nuw nsw i32 %22, 1
%24 = select i1 %20, i32 0, i32 %23
%25 = load ptr, ptr %4, align 8, !tbaa !13
%26 = getelementptr inbounds ptr, ptr %25, i64 %12
%27 = load ptr, ptr %26, align 8, !tbaa !15
%28 = getelementptr inbounds i32, ptr %27, i64 %17
store i32 %24, ptr %28, align 4, !tbaa !11
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
%29 = add nuw nsw i64 %17, 1
%30 = load i32, ptr @I5100_MAX_DIMM_SLOTS_PER_CHAN, align 4, !tbaa !11
%31 = sext i32 %30 to i64
%32 = icmp slt i64 %29, %31
br i1 %32, label %16, label %33, !llvm.loop !16
33: ; preds = %16
%34 = load i32, ptr @I5100_CHANNELS, align 4, !tbaa !11
br label %35
35: ; preds = %33, %9
%36 = phi i32 [ %34, %33 ], [ %10, %9 ]
%37 = phi i32 [ %30, %33 ], [ %11, %9 ]
%38 = add nuw nsw i64 %12, 1
%39 = sext i32 %36 to i64
%40 = icmp slt i64 %38, %39
br i1 %40, label %9, label %41, !llvm.loop !18
41: ; preds = %35, %2
%42 = call i32 @i5100_init_dimm_csmap(ptr noundef nonnull %1) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i64 @i5100_read_spd_byte(ptr noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
declare i32 @i5100_init_dimm_csmap(ptr noundef) local_unnamed_addr #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"mem_ctl_info", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !9, i64 0}
!13 = !{!14, !8, i64 0}
!14 = !{!"i5100_priv", !8, i64 0}
!15 = !{!8, !8, i64 0}
!16 = distinct !{!16, !17}
!17 = !{!"llvm.loop.mustprogress"}
!18 = distinct !{!18, !17}
| linux_drivers_edac_extr_i5100_edac.c_i5100_init_dimm_layout |
; ModuleID = 'AnghaBench/freebsd/sys/dev/ath/ath_hal/ar5212/extr_ar5212_rfgain.c_ar5212GetRfgain.c'
source_filename = "AnghaBench/freebsd/sys/dev/ath/ath_hal/ar5212/extr_ar5212_rfgain.c_ar5212GetRfgain.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.ath_hal_5212 = type { i64, i32, i32, i32, %struct.TYPE_8__ }
%struct.TYPE_8__ = type { i64, i32 }
%struct.TYPE_9__ = type { i64, ptr }
@HAL_RFGAIN_INACTIVE = dso_local local_unnamed_addr global i64 0, align 8
@HAL_RFGAIN_READ_REQUESTED = dso_local local_unnamed_addr global i64 0, align 8
@AR_PHY_PAPD_PROBE = dso_local local_unnamed_addr global i32 0, align 4
@AR_PHY_PAPD_PROBE_NEXT_TX = dso_local local_unnamed_addr global i64 0, align 8
@AR_PHY_PAPD_PROBE_GAINF_S = dso_local local_unnamed_addr global i64 0, align 8
@AR_PHY_PAPD_PROBE_TYPE = dso_local local_unnamed_addr global i32 0, align 4
@AR_PHY_PAPD_PROBE_TYPE_CCK = dso_local local_unnamed_addr global i64 0, align 8
@AR5212_MAGIC = dso_local local_unnamed_addr global i64 0, align 8
@AR_PHY_CHIP_ID_REV_2 = dso_local local_unnamed_addr global i64 0, align 8
@PHY_PROBE_CCK_CORRECTION = dso_local local_unnamed_addr global i64 0, align 8
@HAL_RFGAIN_NEED_CHANGE = dso_local local_unnamed_addr global i64 0, align 8
@AH_TRUE = dso_local local_unnamed_addr global i32 0, align 4
@IQ_CAL_INACTIVE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i64 @ar5212GetRfgain(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @AH5212(ptr noundef %0) #2
%3 = getelementptr inbounds %struct.ath_hal_5212, ptr %2, i64 0, i32 4
%4 = getelementptr inbounds %struct.ath_hal_5212, ptr %2, i64 0, i32 4, i32 1
%5 = load i32, ptr %4, align 8, !tbaa !5
%6 = icmp eq i32 %5, 0
br i1 %6, label %72, label %7
7: ; preds = %1
%8 = getelementptr inbounds %struct.ath_hal_5212, ptr %2, i64 0, i32 3
%9 = load i32, ptr %8, align 8, !tbaa !11
%10 = icmp eq i32 %9, 0
br i1 %10, label %72, label %11
11: ; preds = %7
%12 = load i64, ptr %2, align 8, !tbaa !13
%13 = load i64, ptr @HAL_RFGAIN_READ_REQUESTED, align 8, !tbaa !14
%14 = icmp eq i64 %12, %13
br i1 %14, label %15, label %72
15: ; preds = %11
%16 = load i32, ptr @AR_PHY_PAPD_PROBE, align 4, !tbaa !15
%17 = tail call i64 @OS_REG_READ(ptr noundef %0, i32 noundef %16) #2
%18 = load i64, ptr @AR_PHY_PAPD_PROBE_NEXT_TX, align 8, !tbaa !14
%19 = and i64 %18, %17
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %72
21: ; preds = %15
%22 = load i64, ptr @AR_PHY_PAPD_PROBE_GAINF_S, align 8, !tbaa !14
%23 = ashr i64 %17, %22
store i64 %23, ptr %3, align 8, !tbaa !16
%24 = load i32, ptr @AR_PHY_PAPD_PROBE_TYPE, align 4, !tbaa !15
%25 = tail call i64 @MS(i64 noundef %17, i32 noundef %24) #2
%26 = load i64, ptr @AR_PHY_PAPD_PROBE_TYPE_CCK, align 8, !tbaa !14
%27 = icmp eq i64 %25, %26
br i1 %27, label %28, label %47
28: ; preds = %21
%29 = tail call ptr @AH_PRIVATE(ptr noundef %0) #2
%30 = getelementptr inbounds %struct.TYPE_9__, ptr %29, i64 0, i32 1
%31 = load ptr, ptr %30, align 8, !tbaa !17
%32 = tail call i32 @IS_RAD5112_ANY(ptr noundef %0) #2
%33 = tail call i32 @HALASSERT(i32 noundef %32) #2
%34 = load i64, ptr %0, align 8, !tbaa !20
%35 = load i64, ptr @AR5212_MAGIC, align 8, !tbaa !14
%36 = icmp eq i64 %34, %35
%37 = zext i1 %36 to i32
%38 = tail call i32 @HALASSERT(i32 noundef %37) #2
%39 = tail call ptr @AH_PRIVATE(ptr noundef nonnull %0) #2
%40 = load i64, ptr %39, align 8, !tbaa !22
%41 = load i64, ptr @AR_PHY_CHIP_ID_REV_2, align 8, !tbaa !14
%42 = icmp slt i64 %40, %41
%43 = load i64, ptr %3, align 8, !tbaa !16
%44 = select i1 %42, ptr @PHY_PROBE_CCK_CORRECTION, ptr %31
%45 = load i64, ptr %44, align 8, !tbaa !14
%46 = add nsw i64 %43, %45
store i64 %46, ptr %3, align 8, !tbaa !16
br label %47
47: ; preds = %28, %21
%48 = tail call i64 @IS_RADX112_REV2(ptr noundef %0) #2
%49 = icmp eq i64 %48, 0
br i1 %49, label %56, label %50
50: ; preds = %47
%51 = tail call i64 @ar5212GetGainFCorrection(ptr noundef %0) #2
%52 = load i64, ptr %3, align 8, !tbaa !16
%53 = icmp slt i64 %52, %51
%54 = sub nsw i64 %52, %51
%55 = select i1 %53, i64 0, i64 %54
store i64 %55, ptr %3, align 8, !tbaa !16
br label %56
56: ; preds = %50, %47
%57 = load i64, ptr @HAL_RFGAIN_INACTIVE, align 8, !tbaa !14
store i64 %57, ptr %2, align 8, !tbaa !13
%58 = tail call i32 @ar5212InvalidGainReadback(ptr noundef %0, ptr noundef nonnull %3) #2
%59 = icmp eq i32 %58, 0
br i1 %59, label %60, label %72
60: ; preds = %56
%61 = tail call i64 @ar5212IsGainAdjustNeeded(ptr noundef %0, ptr noundef nonnull %3) #2
%62 = icmp eq i64 %61, 0
br i1 %62, label %72, label %63
63: ; preds = %60
%64 = tail call i64 @ar5212AdjustGain(ptr noundef %0, ptr noundef nonnull %3) #2
%65 = icmp sgt i64 %64, 0
br i1 %65, label %66, label %72
66: ; preds = %63
%67 = load i64, ptr @HAL_RFGAIN_NEED_CHANGE, align 8, !tbaa !14
store i64 %67, ptr %2, align 8, !tbaa !13
%68 = load i32, ptr @AH_TRUE, align 4, !tbaa !15
%69 = getelementptr inbounds %struct.ath_hal_5212, ptr %2, i64 0, i32 2
store i32 %68, ptr %69, align 4, !tbaa !23
%70 = load i32, ptr @IQ_CAL_INACTIVE, align 4, !tbaa !15
%71 = getelementptr inbounds %struct.ath_hal_5212, ptr %2, i64 0, i32 1
store i32 %70, ptr %71, align 8, !tbaa !24
br label %72
72: ; preds = %11, %56, %60, %63, %66, %15, %1, %7
%73 = phi ptr [ @HAL_RFGAIN_INACTIVE, %7 ], [ @HAL_RFGAIN_INACTIVE, %1 ], [ %2, %15 ], [ %2, %66 ], [ %2, %63 ], [ %2, %60 ], [ %2, %56 ], [ %2, %11 ]
%74 = load i64, ptr %73, align 8, !tbaa !14
ret i64 %74
}
declare ptr @AH5212(ptr noundef) local_unnamed_addr #1
declare i64 @OS_REG_READ(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @MS(i64 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @AH_PRIVATE(ptr noundef) local_unnamed_addr #1
declare i32 @HALASSERT(i32 noundef) local_unnamed_addr #1
declare i32 @IS_RAD5112_ANY(ptr noundef) local_unnamed_addr #1
declare i64 @IS_RADX112_REV2(ptr noundef) local_unnamed_addr #1
declare i64 @ar5212GetGainFCorrection(ptr noundef) local_unnamed_addr #1
declare i32 @ar5212InvalidGainReadback(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @ar5212IsGainAdjustNeeded(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @ar5212AdjustGain(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"TYPE_8__", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!12, !10, i64 16}
!12 = !{!"ath_hal_5212", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !6, i64 24}
!13 = !{!12, !7, i64 0}
!14 = !{!7, !7, i64 0}
!15 = !{!10, !10, i64 0}
!16 = !{!6, !7, i64 0}
!17 = !{!18, !19, i64 8}
!18 = !{!"TYPE_9__", !7, i64 0, !19, i64 8}
!19 = !{!"any pointer", !8, i64 0}
!20 = !{!21, !7, i64 0}
!21 = !{!"ath_hal", !7, i64 0}
!22 = !{!18, !7, i64 0}
!23 = !{!12, !10, i64 12}
!24 = !{!12, !10, i64 8}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/ath/ath_hal/ar5212/extr_ar5212_rfgain.c_ar5212GetRfgain.c'
source_filename = "AnghaBench/freebsd/sys/dev/ath/ath_hal/ar5212/extr_ar5212_rfgain.c_ar5212GetRfgain.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@HAL_RFGAIN_INACTIVE = common local_unnamed_addr global i64 0, align 8
@HAL_RFGAIN_READ_REQUESTED = common local_unnamed_addr global i64 0, align 8
@AR_PHY_PAPD_PROBE = common local_unnamed_addr global i32 0, align 4
@AR_PHY_PAPD_PROBE_NEXT_TX = common local_unnamed_addr global i64 0, align 8
@AR_PHY_PAPD_PROBE_GAINF_S = common local_unnamed_addr global i64 0, align 8
@AR_PHY_PAPD_PROBE_TYPE = common local_unnamed_addr global i32 0, align 4
@AR_PHY_PAPD_PROBE_TYPE_CCK = common local_unnamed_addr global i64 0, align 8
@AR5212_MAGIC = common local_unnamed_addr global i64 0, align 8
@AR_PHY_CHIP_ID_REV_2 = common local_unnamed_addr global i64 0, align 8
@PHY_PROBE_CCK_CORRECTION = common local_unnamed_addr global i64 0, align 8
@HAL_RFGAIN_NEED_CHANGE = common local_unnamed_addr global i64 0, align 8
@AH_TRUE = common local_unnamed_addr global i32 0, align 4
@IQ_CAL_INACTIVE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i64 @ar5212GetRfgain(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call ptr @AH5212(ptr noundef %0) #2
%3 = getelementptr inbounds i8, ptr %2, i64 24
%4 = getelementptr inbounds i8, ptr %2, i64 32
%5 = load i32, ptr %4, align 8, !tbaa !6
%6 = icmp eq i32 %5, 0
br i1 %6, label %72, label %7
7: ; preds = %1
%8 = getelementptr inbounds i8, ptr %2, i64 16
%9 = load i32, ptr %8, align 8, !tbaa !12
%10 = icmp eq i32 %9, 0
br i1 %10, label %72, label %11
11: ; preds = %7
%12 = load i64, ptr %2, align 8, !tbaa !14
%13 = load i64, ptr @HAL_RFGAIN_READ_REQUESTED, align 8, !tbaa !15
%14 = icmp eq i64 %12, %13
br i1 %14, label %15, label %72
15: ; preds = %11
%16 = load i32, ptr @AR_PHY_PAPD_PROBE, align 4, !tbaa !16
%17 = tail call i64 @OS_REG_READ(ptr noundef %0, i32 noundef %16) #2
%18 = load i64, ptr @AR_PHY_PAPD_PROBE_NEXT_TX, align 8, !tbaa !15
%19 = and i64 %18, %17
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %72
21: ; preds = %15
%22 = load i64, ptr @AR_PHY_PAPD_PROBE_GAINF_S, align 8, !tbaa !15
%23 = ashr i64 %17, %22
store i64 %23, ptr %3, align 8, !tbaa !17
%24 = load i32, ptr @AR_PHY_PAPD_PROBE_TYPE, align 4, !tbaa !16
%25 = tail call i64 @MS(i64 noundef %17, i32 noundef %24) #2
%26 = load i64, ptr @AR_PHY_PAPD_PROBE_TYPE_CCK, align 8, !tbaa !15
%27 = icmp eq i64 %25, %26
br i1 %27, label %28, label %47
28: ; preds = %21
%29 = tail call ptr @AH_PRIVATE(ptr noundef %0) #2
%30 = getelementptr inbounds i8, ptr %29, i64 8
%31 = load ptr, ptr %30, align 8, !tbaa !18
%32 = tail call i32 @IS_RAD5112_ANY(ptr noundef %0) #2
%33 = tail call i32 @HALASSERT(i32 noundef %32) #2
%34 = load i64, ptr %0, align 8, !tbaa !21
%35 = load i64, ptr @AR5212_MAGIC, align 8, !tbaa !15
%36 = icmp eq i64 %34, %35
%37 = zext i1 %36 to i32
%38 = tail call i32 @HALASSERT(i32 noundef %37) #2
%39 = tail call ptr @AH_PRIVATE(ptr noundef nonnull %0) #2
%40 = load i64, ptr %39, align 8, !tbaa !23
%41 = load i64, ptr @AR_PHY_CHIP_ID_REV_2, align 8, !tbaa !15
%42 = icmp slt i64 %40, %41
%43 = load i64, ptr %3, align 8, !tbaa !17
%44 = select i1 %42, ptr @PHY_PROBE_CCK_CORRECTION, ptr %31
%45 = load i64, ptr %44, align 8, !tbaa !15
%46 = add nsw i64 %43, %45
store i64 %46, ptr %3, align 8, !tbaa !17
br label %47
47: ; preds = %28, %21
%48 = tail call i64 @IS_RADX112_REV2(ptr noundef %0) #2
%49 = icmp eq i64 %48, 0
br i1 %49, label %56, label %50
50: ; preds = %47
%51 = tail call i64 @ar5212GetGainFCorrection(ptr noundef %0) #2
%52 = load i64, ptr %3, align 8, !tbaa !17
%53 = icmp slt i64 %52, %51
%54 = sub nsw i64 %52, %51
%55 = select i1 %53, i64 0, i64 %54
store i64 %55, ptr %3, align 8, !tbaa !17
br label %56
56: ; preds = %50, %47
%57 = load i64, ptr @HAL_RFGAIN_INACTIVE, align 8, !tbaa !15
store i64 %57, ptr %2, align 8, !tbaa !14
%58 = tail call i32 @ar5212InvalidGainReadback(ptr noundef %0, ptr noundef nonnull %3) #2
%59 = icmp eq i32 %58, 0
br i1 %59, label %60, label %72
60: ; preds = %56
%61 = tail call i64 @ar5212IsGainAdjustNeeded(ptr noundef %0, ptr noundef nonnull %3) #2
%62 = icmp eq i64 %61, 0
br i1 %62, label %72, label %63
63: ; preds = %60
%64 = tail call i64 @ar5212AdjustGain(ptr noundef %0, ptr noundef nonnull %3) #2
%65 = icmp sgt i64 %64, 0
br i1 %65, label %66, label %72
66: ; preds = %63
%67 = load i64, ptr @HAL_RFGAIN_NEED_CHANGE, align 8, !tbaa !15
store i64 %67, ptr %2, align 8, !tbaa !14
%68 = load i32, ptr @AH_TRUE, align 4, !tbaa !16
%69 = getelementptr inbounds i8, ptr %2, i64 12
store i32 %68, ptr %69, align 4, !tbaa !24
%70 = load i32, ptr @IQ_CAL_INACTIVE, align 4, !tbaa !16
%71 = getelementptr inbounds i8, ptr %2, i64 8
store i32 %70, ptr %71, align 8, !tbaa !25
br label %72
72: ; preds = %11, %56, %60, %63, %66, %15, %1, %7
%73 = phi ptr [ @HAL_RFGAIN_INACTIVE, %7 ], [ @HAL_RFGAIN_INACTIVE, %1 ], [ %2, %15 ], [ %2, %66 ], [ %2, %63 ], [ %2, %60 ], [ %2, %56 ], [ %2, %11 ]
%74 = load i64, ptr %73, align 8, !tbaa !15
ret i64 %74
}
declare ptr @AH5212(ptr noundef) local_unnamed_addr #1
declare i64 @OS_REG_READ(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i64 @MS(i64 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @AH_PRIVATE(ptr noundef) local_unnamed_addr #1
declare i32 @HALASSERT(i32 noundef) local_unnamed_addr #1
declare i32 @IS_RAD5112_ANY(ptr noundef) local_unnamed_addr #1
declare i64 @IS_RADX112_REV2(ptr noundef) local_unnamed_addr #1
declare i64 @ar5212GetGainFCorrection(ptr noundef) local_unnamed_addr #1
declare i32 @ar5212InvalidGainReadback(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @ar5212IsGainAdjustNeeded(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i64 @ar5212AdjustGain(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"TYPE_8__", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!13, !11, i64 16}
!13 = !{!"ath_hal_5212", !8, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !7, i64 24}
!14 = !{!13, !8, i64 0}
!15 = !{!8, !8, i64 0}
!16 = !{!11, !11, i64 0}
!17 = !{!7, !8, i64 0}
!18 = !{!19, !20, i64 8}
!19 = !{!"TYPE_9__", !8, i64 0, !20, i64 8}
!20 = !{!"any pointer", !9, i64 0}
!21 = !{!22, !8, i64 0}
!22 = !{!"ath_hal", !8, i64 0}
!23 = !{!19, !8, i64 0}
!24 = !{!13, !11, i64 12}
!25 = !{!13, !11, i64 8}
| freebsd_sys_dev_ath_ath_hal_ar5212_extr_ar5212_rfgain.c_ar5212GetRfgain |
; ModuleID = 'AnghaBench/linux/drivers/scsi/pm8001/extr_pm80xx_hwi.c_pm80xx_set_thermal_config.c'
source_filename = "AnghaBench/linux/drivers/scsi/pm8001/extr_pm80xx_hwi.c_pm80xx_set_thermal_config.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.set_ctrl_cfg_req = type { ptr, i32 }
%struct.pm8001_hba_info = type { i32, ptr }
@OPC_INB_SET_CONTROLLER_CONFIG = dso_local local_unnamed_addr global i32 0, align 4
@THERMAL_PAGE_CODE_7H = dso_local local_unnamed_addr global i32 0, align 4
@THERMAL_PAGE_CODE_8H = dso_local local_unnamed_addr global i32 0, align 4
@THERMAL_LOG_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@THERMAL_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@LTEMPHIL = dso_local local_unnamed_addr global i32 0, align 4
@RTEMPHIL = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @pm80xx_set_thermal_config(ptr noundef %0) local_unnamed_addr #0 {
%2 = alloca %struct.set_ctrl_cfg_req, align 8
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = load i32, ptr @OPC_INB_SET_CONTROLLER_CONFIG, align 4, !tbaa !5
%5 = call i32 @memset(ptr noundef nonnull %2, i32 noundef 0, i32 noundef 16) #3
%6 = call i32 @pm8001_tag_alloc(ptr noundef %0, ptr noundef nonnull %3) #3
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %38
8: ; preds = %1
%9 = getelementptr inbounds %struct.pm8001_hba_info, ptr %0, i64 0, i32 1
%10 = load ptr, ptr %9, align 8, !tbaa !9
%11 = load i32, ptr %3, align 4, !tbaa !5
%12 = call i32 @cpu_to_le32(i32 noundef %11) #3
%13 = getelementptr inbounds %struct.set_ctrl_cfg_req, ptr %2, i64 0, i32 1
store i32 %12, ptr %13, align 8, !tbaa !12
%14 = load i32, ptr %0, align 8, !tbaa !14
%15 = call i64 @IS_SPCV_12G(i32 noundef %14) #3
%16 = icmp eq i64 %15, 0
%17 = load i32, ptr @THERMAL_PAGE_CODE_8H, align 4
%18 = load i32, ptr @THERMAL_PAGE_CODE_7H, align 4
%19 = select i1 %16, i32 %17, i32 %18
%20 = load i32, ptr @THERMAL_LOG_ENABLE, align 4, !tbaa !5
%21 = shl i32 %20, 9
%22 = load i32, ptr @THERMAL_ENABLE, align 4, !tbaa !5
%23 = shl i32 %22, 8
%24 = or i32 %21, %19
%25 = or i32 %24, %23
%26 = load ptr, ptr %2, align 8, !tbaa !15
store i32 %25, ptr %26, align 4, !tbaa !5
%27 = load i32, ptr @LTEMPHIL, align 4, !tbaa !5
%28 = shl i32 %27, 24
%29 = load i32, ptr @RTEMPHIL, align 4, !tbaa !5
%30 = shl i32 %29, 8
%31 = or i32 %30, %28
%32 = getelementptr inbounds i32, ptr %26, i64 1
store i32 %31, ptr %32, align 4, !tbaa !5
%33 = call i32 @pm8001_mpi_build_cmd(ptr noundef nonnull %0, ptr noundef %10, i32 noundef %4, ptr noundef nonnull %2, i32 noundef 0) #3
%34 = icmp eq i32 %33, 0
br i1 %34, label %38, label %35
35: ; preds = %8
%36 = load i32, ptr %3, align 4, !tbaa !5
%37 = call i32 @pm8001_tag_free(ptr noundef nonnull %0, i32 noundef %36) #3
br label %38
38: ; preds = %8, %35, %1
%39 = phi i32 [ -1, %1 ], [ %33, %35 ], [ 0, %8 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #3
ret i32 %39
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @pm8001_tag_alloc(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @cpu_to_le32(i32 noundef) local_unnamed_addr #2
declare i64 @IS_SPCV_12G(i32 noundef) local_unnamed_addr #2
declare i32 @pm8001_mpi_build_cmd(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @pm8001_tag_free(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 8}
!10 = !{!"pm8001_hba_info", !6, i64 0, !11, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !6, i64 8}
!13 = !{!"set_ctrl_cfg_req", !11, i64 0, !6, i64 8}
!14 = !{!10, !6, i64 0}
!15 = !{!13, !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/pm8001/extr_pm80xx_hwi.c_pm80xx_set_thermal_config.c'
source_filename = "AnghaBench/linux/drivers/scsi/pm8001/extr_pm80xx_hwi.c_pm80xx_set_thermal_config.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.set_ctrl_cfg_req = type { ptr, i32 }
@OPC_INB_SET_CONTROLLER_CONFIG = common local_unnamed_addr global i32 0, align 4
@THERMAL_PAGE_CODE_7H = common local_unnamed_addr global i32 0, align 4
@THERMAL_PAGE_CODE_8H = common local_unnamed_addr global i32 0, align 4
@THERMAL_LOG_ENABLE = common local_unnamed_addr global i32 0, align 4
@THERMAL_ENABLE = common local_unnamed_addr global i32 0, align 4
@LTEMPHIL = common local_unnamed_addr global i32 0, align 4
@RTEMPHIL = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @pm80xx_set_thermal_config(ptr noundef %0) local_unnamed_addr #0 {
%2 = alloca %struct.set_ctrl_cfg_req, align 8
%3 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 16, ptr nonnull %2) #3
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %3) #3
%4 = load i32, ptr @OPC_INB_SET_CONTROLLER_CONFIG, align 4, !tbaa !6
%5 = call i32 @memset(ptr noundef nonnull %2, i32 noundef 0, i32 noundef 16) #3
%6 = call i32 @pm8001_tag_alloc(ptr noundef %0, ptr noundef nonnull %3) #3
%7 = icmp eq i32 %6, 0
br i1 %7, label %8, label %38
8: ; preds = %1
%9 = getelementptr inbounds i8, ptr %0, i64 8
%10 = load ptr, ptr %9, align 8, !tbaa !10
%11 = load i32, ptr %3, align 4, !tbaa !6
%12 = call i32 @cpu_to_le32(i32 noundef %11) #3
%13 = getelementptr inbounds i8, ptr %2, i64 8
store i32 %12, ptr %13, align 8, !tbaa !13
%14 = load i32, ptr %0, align 8, !tbaa !15
%15 = call i64 @IS_SPCV_12G(i32 noundef %14) #3
%16 = icmp eq i64 %15, 0
%17 = load i32, ptr @THERMAL_PAGE_CODE_8H, align 4
%18 = load i32, ptr @THERMAL_PAGE_CODE_7H, align 4
%19 = select i1 %16, i32 %17, i32 %18
%20 = load i32, ptr @THERMAL_LOG_ENABLE, align 4, !tbaa !6
%21 = shl i32 %20, 9
%22 = load i32, ptr @THERMAL_ENABLE, align 4, !tbaa !6
%23 = shl i32 %22, 8
%24 = or i32 %21, %19
%25 = or i32 %24, %23
%26 = load ptr, ptr %2, align 8, !tbaa !16
store i32 %25, ptr %26, align 4, !tbaa !6
%27 = load i32, ptr @LTEMPHIL, align 4, !tbaa !6
%28 = shl i32 %27, 24
%29 = load i32, ptr @RTEMPHIL, align 4, !tbaa !6
%30 = shl i32 %29, 8
%31 = or i32 %30, %28
%32 = getelementptr inbounds i8, ptr %26, i64 4
store i32 %31, ptr %32, align 4, !tbaa !6
%33 = call i32 @pm8001_mpi_build_cmd(ptr noundef nonnull %0, ptr noundef %10, i32 noundef %4, ptr noundef nonnull %2, i32 noundef 0) #3
%34 = icmp eq i32 %33, 0
br i1 %34, label %38, label %35
35: ; preds = %8
%36 = load i32, ptr %3, align 4, !tbaa !6
%37 = call i32 @pm8001_tag_free(ptr noundef nonnull %0, i32 noundef %36) #3
br label %38
38: ; preds = %8, %35, %1
%39 = phi i32 [ -1, %1 ], [ %33, %35 ], [ 0, %8 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %3) #3
call void @llvm.lifetime.end.p0(i64 16, ptr nonnull %2) #3
ret i32 %39
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @memset(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @pm8001_tag_alloc(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @cpu_to_le32(i32 noundef) local_unnamed_addr #2
declare i64 @IS_SPCV_12G(i32 noundef) local_unnamed_addr #2
declare i32 @pm8001_mpi_build_cmd(ptr noundef, ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @pm8001_tag_free(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 8}
!11 = !{!"pm8001_hba_info", !7, i64 0, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 8}
!14 = !{!"set_ctrl_cfg_req", !12, i64 0, !7, i64 8}
!15 = !{!11, !7, i64 0}
!16 = !{!14, !12, i64 0}
| linux_drivers_scsi_pm8001_extr_pm80xx_hwi.c_pm80xx_set_thermal_config |
; ModuleID = 'AnghaBench/h2o/deps/mruby/src/extr_proc.c_mrb_closure_new.c'
source_filename = "AnghaBench/h2o/deps/mruby/src/extr_proc.c_mrb_closure_new.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local noundef ptr @mrb_closure_new(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @mrb_proc_new(ptr noundef %0, ptr noundef %1) #2
%4 = tail call i32 @closure_setup(ptr noundef %0, ptr noundef %3) #2
ret ptr %3
}
declare ptr @mrb_proc_new(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @closure_setup(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/h2o/deps/mruby/src/extr_proc.c_mrb_closure_new.c'
source_filename = "AnghaBench/h2o/deps/mruby/src/extr_proc.c_mrb_closure_new.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define noundef ptr @mrb_closure_new(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @mrb_proc_new(ptr noundef %0, ptr noundef %1) #2
%4 = tail call i32 @closure_setup(ptr noundef %0, ptr noundef %3) #2
ret ptr %3
}
declare ptr @mrb_proc_new(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @closure_setup(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| h2o_deps_mruby_src_extr_proc.c_mrb_closure_new |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_cz_ih.c_cz_ih_suspend.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_cz_ih.c_cz_ih_suspend.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @cz_ih_suspend], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @cz_ih_suspend(ptr noundef %0) #0 {
%2 = tail call i32 @cz_ih_hw_fini(ptr noundef %0) #2
ret i32 %2
}
declare i32 @cz_ih_hw_fini(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_cz_ih.c_cz_ih_suspend.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_cz_ih.c_cz_ih_suspend.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @cz_ih_suspend], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @cz_ih_suspend(ptr noundef %0) #0 {
%2 = tail call i32 @cz_ih_hw_fini(ptr noundef %0) #2
ret i32 %2
}
declare i32 @cz_ih_hw_fini(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_gpu_drm_amd_amdgpu_extr_cz_ih.c_cz_ih_suspend |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_i915_gem.c_i915_gem_object_finish_gtt.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_i915_gem.c_i915_gem_object_finish_gtt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i32, i32 }
@I915_GEM_DOMAIN_GTT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @i915_gem_object_finish_gtt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @i915_gem_object_finish_gtt(ptr noundef %0) #0 {
%2 = tail call i32 @i915_gem_release_mmap(ptr noundef %0) #2
%3 = load i32, ptr %0, align 4, !tbaa !5
%4 = load i32, ptr @I915_GEM_DOMAIN_GTT, align 4, !tbaa !11
%5 = and i32 %4, %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %19, label %7
7: ; preds = %1
%8 = tail call i32 (...) @mb() #2
%9 = load i32, ptr %0, align 4, !tbaa !5
%10 = getelementptr inbounds %struct.TYPE_2__, ptr %0, i64 0, i32 1
%11 = load i32, ptr %10, align 4, !tbaa !12
%12 = load i32, ptr @I915_GEM_DOMAIN_GTT, align 4, !tbaa !11
%13 = xor i32 %12, -1
%14 = and i32 %9, %13
store i32 %14, ptr %0, align 4, !tbaa !5
%15 = load i32, ptr @I915_GEM_DOMAIN_GTT, align 4, !tbaa !11
%16 = xor i32 %15, -1
%17 = and i32 %11, %16
store i32 %17, ptr %10, align 4, !tbaa !12
%18 = tail call i32 @trace_i915_gem_object_change_domain(ptr noundef nonnull %0, i32 noundef %9, i32 noundef %11) #2
br label %19
19: ; preds = %1, %7
ret void
}
declare i32 @i915_gem_release_mmap(ptr noundef) local_unnamed_addr #1
declare i32 @mb(...) local_unnamed_addr #1
declare i32 @trace_i915_gem_object_change_domain(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !8, i64 0}
!6 = !{!"drm_i915_gem_object", !7, i64 0}
!7 = !{!"TYPE_2__", !8, i64 0, !8, i64 4}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!6, !8, i64 4}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_i915_gem.c_i915_gem_object_finish_gtt.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/gpu/drm/i915/extr_i915_gem.c_i915_gem_object_finish_gtt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@I915_GEM_DOMAIN_GTT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @i915_gem_object_finish_gtt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @i915_gem_object_finish_gtt(ptr noundef %0) #0 {
%2 = tail call i32 @i915_gem_release_mmap(ptr noundef %0) #2
%3 = load i32, ptr %0, align 4, !tbaa !6
%4 = load i32, ptr @I915_GEM_DOMAIN_GTT, align 4, !tbaa !12
%5 = and i32 %4, %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %19, label %7
7: ; preds = %1
%8 = tail call i32 @mb() #2
%9 = load i32, ptr %0, align 4, !tbaa !6
%10 = getelementptr inbounds i8, ptr %0, i64 4
%11 = load i32, ptr %10, align 4, !tbaa !13
%12 = load i32, ptr @I915_GEM_DOMAIN_GTT, align 4, !tbaa !12
%13 = xor i32 %12, -1
%14 = and i32 %9, %13
store i32 %14, ptr %0, align 4, !tbaa !6
%15 = load i32, ptr @I915_GEM_DOMAIN_GTT, align 4, !tbaa !12
%16 = xor i32 %15, -1
%17 = and i32 %11, %16
store i32 %17, ptr %10, align 4, !tbaa !13
%18 = tail call i32 @trace_i915_gem_object_change_domain(ptr noundef nonnull %0, i32 noundef %9, i32 noundef %11) #2
br label %19
19: ; preds = %1, %7
ret void
}
declare i32 @i915_gem_release_mmap(ptr noundef) local_unnamed_addr #1
declare i32 @mb(...) local_unnamed_addr #1
declare i32 @trace_i915_gem_object_change_domain(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !9, i64 0}
!7 = !{!"drm_i915_gem_object", !8, i64 0}
!8 = !{!"TYPE_2__", !9, i64 0, !9, i64 4}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!9, !9, i64 0}
!13 = !{!7, !9, i64 4}
| fastsocket_kernel_drivers_gpu_drm_i915_extr_i915_gem.c_i915_gem_object_finish_gtt |
; ModuleID = 'AnghaBench/linux/fs/ramfs/extr_file-nommu.c_ramfs_nommu_setattr.c'
source_filename = "AnghaBench/linux/fs/ramfs/extr_file-nommu.c_ramfs_nommu_setattr.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.iattr = type { i32, i64 }
@ATTR_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@ATTR_MTIME = dso_local local_unnamed_addr global i32 0, align 4
@ATTR_CTIME = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ramfs_nommu_setattr], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ramfs_nommu_setattr(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @d_inode(ptr noundef %0) #2
%4 = load i32, ptr %1, align 8, !tbaa !5
%5 = tail call i32 @setattr_prepare(ptr noundef %0, ptr noundef nonnull %1) #2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %34
7: ; preds = %2
%8 = load i32, ptr %1, align 8, !tbaa !5
%9 = load i32, ptr @ATTR_SIZE, align 4, !tbaa !11
%10 = and i32 %9, %8
%11 = icmp eq i32 %10, 0
br i1 %11, label %29, label %12
12: ; preds = %7
%13 = load i64, ptr %3, align 8, !tbaa !12
%14 = getelementptr inbounds %struct.iattr, ptr %1, i64 0, i32 1
%15 = load i64, ptr %14, align 8, !tbaa !14
%16 = icmp eq i64 %15, %13
br i1 %16, label %24, label %17
17: ; preds = %12
%18 = tail call i32 @ramfs_nommu_resize(ptr noundef nonnull %3, i64 noundef %15, i64 noundef %13) #2
%19 = icmp slt i32 %18, 0
br i1 %19, label %32, label %20
20: ; preds = %17
%21 = load i32, ptr %1, align 8, !tbaa !5
%22 = load i32, ptr @ATTR_SIZE, align 4, !tbaa !11
%23 = icmp eq i32 %21, %22
br i1 %23, label %32, label %29
24: ; preds = %12
%25 = load i32, ptr @ATTR_MTIME, align 4, !tbaa !11
%26 = load i32, ptr @ATTR_CTIME, align 4, !tbaa !11
%27 = or i32 %25, %26
%28 = or i32 %27, %8
store i32 %28, ptr %1, align 8, !tbaa !5
br label %29
29: ; preds = %20, %24, %7
%30 = phi i32 [ 0, %7 ], [ %18, %20 ], [ 0, %24 ]
%31 = tail call i32 @setattr_copy(ptr noundef %3, ptr noundef nonnull %1) #2
br label %32
32: ; preds = %20, %17, %29
%33 = phi i32 [ %30, %29 ], [ %18, %17 ], [ %18, %20 ]
store i32 %4, ptr %1, align 8, !tbaa !5
br label %34
34: ; preds = %2, %32
%35 = phi i32 [ %33, %32 ], [ %5, %2 ]
ret i32 %35
}
declare ptr @d_inode(ptr noundef) local_unnamed_addr #1
declare i32 @setattr_prepare(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ramfs_nommu_resize(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @setattr_copy(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"iattr", !7, i64 0, !10, i64 8}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = !{!13, !10, i64 0}
!13 = !{!"inode", !10, i64 0}
!14 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/linux/fs/ramfs/extr_file-nommu.c_ramfs_nommu_setattr.c'
source_filename = "AnghaBench/linux/fs/ramfs/extr_file-nommu.c_ramfs_nommu_setattr.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ATTR_SIZE = common local_unnamed_addr global i32 0, align 4
@ATTR_MTIME = common local_unnamed_addr global i32 0, align 4
@ATTR_CTIME = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ramfs_nommu_setattr], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ramfs_nommu_setattr(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call ptr @d_inode(ptr noundef %0) #2
%4 = load i32, ptr %1, align 8, !tbaa !6
%5 = tail call i32 @setattr_prepare(ptr noundef %0, ptr noundef nonnull %1) #2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %34
7: ; preds = %2
%8 = load i32, ptr %1, align 8, !tbaa !6
%9 = load i32, ptr @ATTR_SIZE, align 4, !tbaa !12
%10 = and i32 %9, %8
%11 = icmp eq i32 %10, 0
br i1 %11, label %29, label %12
12: ; preds = %7
%13 = load i64, ptr %3, align 8, !tbaa !13
%14 = getelementptr inbounds i8, ptr %1, i64 8
%15 = load i64, ptr %14, align 8, !tbaa !15
%16 = icmp eq i64 %15, %13
br i1 %16, label %24, label %17
17: ; preds = %12
%18 = tail call i32 @ramfs_nommu_resize(ptr noundef nonnull %3, i64 noundef %15, i64 noundef %13) #2
%19 = icmp slt i32 %18, 0
br i1 %19, label %32, label %20
20: ; preds = %17
%21 = load i32, ptr %1, align 8, !tbaa !6
%22 = load i32, ptr @ATTR_SIZE, align 4, !tbaa !12
%23 = icmp eq i32 %21, %22
br i1 %23, label %32, label %29
24: ; preds = %12
%25 = load i32, ptr @ATTR_MTIME, align 4, !tbaa !12
%26 = load i32, ptr @ATTR_CTIME, align 4, !tbaa !12
%27 = or i32 %25, %26
%28 = or i32 %27, %8
store i32 %28, ptr %1, align 8, !tbaa !6
br label %29
29: ; preds = %20, %24, %7
%30 = phi i32 [ 0, %7 ], [ %18, %20 ], [ 0, %24 ]
%31 = tail call i32 @setattr_copy(ptr noundef %3, ptr noundef nonnull %1) #2
br label %32
32: ; preds = %17, %20, %29
%33 = phi i32 [ %30, %29 ], [ %18, %20 ], [ %18, %17 ]
store i32 %4, ptr %1, align 8, !tbaa !6
br label %34
34: ; preds = %2, %32
%35 = phi i32 [ %33, %32 ], [ %5, %2 ]
ret i32 %35
}
declare ptr @d_inode(ptr noundef) local_unnamed_addr #1
declare i32 @setattr_prepare(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ramfs_nommu_resize(ptr noundef, i64 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @setattr_copy(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"iattr", !8, i64 0, !11, i64 8}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = !{!14, !11, i64 0}
!14 = !{!"inode", !11, i64 0}
!15 = !{!7, !11, i64 8}
| linux_fs_ramfs_extr_file-nommu.c_ramfs_nommu_setattr |
; ModuleID = 'AnghaBench/obs-studio/libobs/graphics/extr_..utilcf-parser.h_cf_next_name.c'
source_filename = "AnghaBench/obs-studio/libobs/graphics/extr_..utilcf-parser.h_cf_next_name.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PARSE_EOF = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @cf_next_name], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @cf_next_name(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = tail call i32 @cf_next_valid_token(ptr noundef %0) #2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = load i32, ptr @PARSE_EOF, align 4, !tbaa !5
br label %11
9: ; preds = %4
%10 = tail call i32 @cf_get_name(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #2
br label %11
11: ; preds = %9, %7
%12 = phi i32 [ %10, %9 ], [ %8, %7 ]
ret i32 %12
}
declare i32 @cf_next_valid_token(ptr noundef) local_unnamed_addr #1
declare i32 @cf_get_name(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/obs-studio/libobs/graphics/extr_..utilcf-parser.h_cf_next_name.c'
source_filename = "AnghaBench/obs-studio/libobs/graphics/extr_..utilcf-parser.h_cf_next_name.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PARSE_EOF = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @cf_next_name], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @cf_next_name(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #0 {
%5 = tail call i32 @cf_next_valid_token(ptr noundef %0) #2
%6 = icmp eq i32 %5, 0
br i1 %6, label %7, label %9
7: ; preds = %4
%8 = load i32, ptr @PARSE_EOF, align 4, !tbaa !6
br label %11
9: ; preds = %4
%10 = tail call i32 @cf_get_name(ptr noundef %0, ptr noundef %1, ptr noundef %2, ptr noundef %3) #2
br label %11
11: ; preds = %9, %7
%12 = phi i32 [ %10, %9 ], [ %8, %7 ]
ret i32 %12
}
declare i32 @cf_next_valid_token(ptr noundef) local_unnamed_addr #1
declare i32 @cf_get_name(ptr noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| obs-studio_libobs_graphics_extr_..utilcf-parser.h_cf_next_name |
; ModuleID = 'AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_subrequest.c_ngx_http_lua_subrequest.c'
source_filename = "AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_subrequest.c_ngx_http_lua_subrequest.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_26__ = type { i64, i32, i32, i32, i32, i32, ptr, i32, i32, i64, i32, i32, i32, i32, i32, i32, ptr, ptr, i32, i32, i32, i32, ptr, ptr, i32, i32, i32, i32, i32, i32, %struct.TYPE_23__, i32, i32, i32, i32, %struct.TYPE_21__, ptr, ptr, i32 }
%struct.TYPE_23__ = type { i32, i32 }
%struct.TYPE_21__ = type { i32 }
%struct.TYPE_22__ = type { i32, i32, i32 }
%struct.TYPE_24__ = type { i32, i32 }
@NGX_LOG_ERR = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [44 x i8] c"lua subrequests cycle while processing \22%V\22\00", align 1
@NGX_ERROR = dso_local local_unnamed_addr global i32 0, align 4
@NGX_HTTP_MODULE = dso_local local_unnamed_addr global i32 0, align 4
@ngx_http_max_module = dso_local local_unnamed_addr global i32 0, align 4
@NGX_OK = dso_local local_unnamed_addr global i64 0, align 8
@ngx_http_core_module = dso_local local_unnamed_addr global i32 0, align 4
@NGX_HTTP_GET = dso_local local_unnamed_addr global i32 0, align 4
@NGX_LOG_DEBUG_HTTP = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [28 x i8] c"lua http subrequest \22%V?%V\22\00", align 1
@NGX_HTTP_SUBREQUEST_IN_MEMORY = dso_local local_unnamed_addr global i32 0, align 4
@NGX_HTTP_SUBREQUEST_WAITED = dso_local local_unnamed_addr global i32 0, align 4
@ngx_http_core_get_method = dso_local local_unnamed_addr global i32 0, align 4
@ngx_http_request_empty_handler = dso_local local_unnamed_addr global i32 0, align 4
@ngx_http_handler = dso_local local_unnamed_addr global i32 0, align 4
@NGX_HTTP_MAX_URI_CHANGES = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @ngx_http_lua_subrequest], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @ngx_http_lua_subrequest(ptr noundef %0, ptr noundef %1, ptr noundef readonly %2, ptr nocapture noundef writeonly %3, ptr noundef %4, i32 noundef %5) #0 {
%7 = getelementptr inbounds %struct.TYPE_26__, ptr %0, i64 0, i32 6
%8 = load ptr, ptr %7, align 8, !tbaa !5
%9 = load i32, ptr %8, align 4, !tbaa !14
%10 = add nsw i32 %9, -1
store i32 %10, ptr %8, align 4, !tbaa !14
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %20
12: ; preds = %6
%13 = load i32, ptr @NGX_LOG_ERR, align 4, !tbaa !16
%14 = getelementptr inbounds %struct.TYPE_26__, ptr %0, i64 0, i32 37
%15 = load ptr, ptr %14, align 8, !tbaa !17
%16 = load i32, ptr %15, align 4, !tbaa !18
%17 = tail call i32 @ngx_log_error(i32 noundef %13, i32 noundef %16, i32 noundef 0, ptr noundef nonnull @.str, ptr noundef %1) #2
%18 = load ptr, ptr %7, align 8, !tbaa !5
store i32 1, ptr %18, align 4, !tbaa !14
%19 = load i32, ptr @NGX_ERROR, align 4, !tbaa !16
br label %127
20: ; preds = %6
%21 = getelementptr inbounds %struct.TYPE_26__, ptr %0, i64 0, i32 31
%22 = load i32, ptr %21, align 8, !tbaa !20
%23 = tail call ptr @ngx_pcalloc(i32 noundef %22, i32 noundef 208) #2
%24 = icmp eq ptr %23, null
br i1 %24, label %25, label %27
25: ; preds = %20
%26 = load i32, ptr @NGX_ERROR, align 4, !tbaa !16
br label %127
27: ; preds = %20
%28 = load i32, ptr @NGX_HTTP_MODULE, align 4, !tbaa !16
%29 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 38
store i32 %28, ptr %29, align 8, !tbaa !21
%30 = getelementptr inbounds %struct.TYPE_26__, ptr %0, i64 0, i32 37
%31 = load ptr, ptr %30, align 8, !tbaa !17
%32 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 37
store ptr %31, ptr %32, align 8, !tbaa !17
%33 = load i32, ptr %21, align 8, !tbaa !20
%34 = load i32, ptr @ngx_http_max_module, align 4, !tbaa !16
%35 = shl i32 %34, 3
%36 = tail call ptr @ngx_pcalloc(i32 noundef %33, i32 noundef %35) #2
%37 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 36
store ptr %36, ptr %37, align 8, !tbaa !22
%38 = icmp eq ptr %36, null
br i1 %38, label %39, label %41
39: ; preds = %27
%40 = load i32, ptr @NGX_ERROR, align 4, !tbaa !16
br label %127
41: ; preds = %27
%42 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 35
%43 = load i32, ptr %21, align 8, !tbaa !20
%44 = tail call i64 @ngx_list_init(ptr noundef nonnull %42, i32 noundef %43, i32 noundef 20, i32 noundef 4) #2
%45 = load i64, ptr @NGX_OK, align 8, !tbaa !23
%46 = icmp eq i64 %44, %45
br i1 %46, label %49, label %47
47: ; preds = %41
%48 = load i32, ptr @NGX_ERROR, align 4, !tbaa !16
br label %127
49: ; preds = %41
%50 = load i32, ptr @ngx_http_core_module, align 4, !tbaa !16
%51 = tail call ptr @ngx_http_get_module_srv_conf(ptr noundef nonnull %0, i32 noundef %50) #2
%52 = load ptr, ptr %51, align 8, !tbaa !24
%53 = getelementptr inbounds %struct.TYPE_22__, ptr %52, i64 0, i32 2
%54 = load i32, ptr %53, align 4, !tbaa !26
%55 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 34
store i32 %54, ptr %55, align 4, !tbaa !28
%56 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 32
%57 = load <2 x i32>, ptr %52, align 4, !tbaa !16
store <2 x i32> %57, ptr %56, align 4, !tbaa !16
%58 = load i32, ptr %21, align 8, !tbaa !20
%59 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 31
store i32 %58, ptr %59, align 8, !tbaa !20
%60 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 30
store i32 -1, ptr %60, align 8, !tbaa !29
%61 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 30, i32 1
store i32 -1, ptr %61, align 4, !tbaa !30
%62 = tail call i32 @ngx_http_clear_content_length(ptr noundef nonnull %23) #2
%63 = tail call i32 @ngx_http_clear_accept_ranges(ptr noundef nonnull %23) #2
%64 = tail call i32 @ngx_http_clear_last_modified(ptr noundef nonnull %23) #2
%65 = getelementptr inbounds %struct.TYPE_26__, ptr %0, i64 0, i32 29
%66 = load i32, ptr %65, align 4, !tbaa !31
%67 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 29
store i32 %66, ptr %67, align 4, !tbaa !31
%68 = load i32, ptr @NGX_HTTP_GET, align 4, !tbaa !16
%69 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 26
store i32 %68, ptr %69, align 8, !tbaa !32
%70 = getelementptr inbounds %struct.TYPE_26__, ptr %0, i64 0, i32 24
%71 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 24
%72 = load <2 x i32>, ptr %70, align 8, !tbaa !16
store <2 x i32> %72, ptr %71, align 8, !tbaa !16
%73 = load ptr, ptr %1, align 8, !tbaa !33
%74 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 23
store ptr %73, ptr %74, align 8, !tbaa !34
%75 = icmp eq ptr %2, null
br i1 %75, label %79, label %76
76: ; preds = %49
%77 = load ptr, ptr %2, align 8, !tbaa !33
%78 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 22
store ptr %77, ptr %78, align 8, !tbaa !35
br label %79
79: ; preds = %76, %49
%80 = load i32, ptr @NGX_LOG_DEBUG_HTTP, align 4, !tbaa !16
%81 = load i32, ptr %31, align 4, !tbaa !18
%82 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 22
%83 = tail call i32 @ngx_log_debug2(i32 noundef %80, i32 noundef %81, i32 noundef 0, ptr noundef nonnull @.str.1, ptr noundef nonnull %1, ptr noundef nonnull %82) #2
%84 = load i32, ptr @NGX_HTTP_SUBREQUEST_IN_MEMORY, align 4, !tbaa !16
%85 = and i32 %84, %5
%86 = icmp ne i32 %85, 0
%87 = zext i1 %86 to i32
%88 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 2
store i32 %87, ptr %88, align 4, !tbaa !36
%89 = load i32, ptr @NGX_HTTP_SUBREQUEST_WAITED, align 4, !tbaa !16
%90 = and i32 %89, %5
%91 = icmp ne i32 %90, 0
%92 = zext i1 %91 to i32
%93 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 3
store i32 %92, ptr %93, align 8, !tbaa !37
%94 = getelementptr inbounds %struct.TYPE_26__, ptr %0, i64 0, i32 20
%95 = load i32, ptr %94, align 8, !tbaa !38
%96 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 20
store i32 %95, ptr %96, align 8, !tbaa !38
%97 = load i32, ptr @ngx_http_core_get_method, align 4, !tbaa !16
%98 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 19
store i32 %97, ptr %98, align 4, !tbaa !39
%99 = getelementptr inbounds %struct.TYPE_26__, ptr %0, i64 0, i32 18
%100 = load i32, ptr %99, align 8, !tbaa !40
%101 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 18
store i32 %100, ptr %101, align 8, !tbaa !40
%102 = tail call i32 @ngx_http_set_exten(ptr noundef nonnull %23) #2
%103 = load ptr, ptr %7, align 8, !tbaa !5
%104 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 6
store ptr %103, ptr %104, align 8, !tbaa !5
%105 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 17
store ptr %0, ptr %105, align 8, !tbaa !41
%106 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 16
store ptr %4, ptr %106, align 8, !tbaa !42
%107 = load i32, ptr @ngx_http_request_empty_handler, align 4, !tbaa !16
%108 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 15
store i32 %107, ptr %108, align 4, !tbaa !43
%109 = load i32, ptr @ngx_http_handler, align 4, !tbaa !16
%110 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 14
store i32 %109, ptr %110, align 8, !tbaa !44
%111 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 4
store i32 1, ptr %111, align 4, !tbaa !45
%112 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 5
store i32 1, ptr %112, align 8, !tbaa !46
%113 = getelementptr inbounds %struct.TYPE_26__, ptr %0, i64 0, i32 10
%114 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 10
%115 = load <4 x i32>, ptr %113, align 8, !tbaa !16
store <4 x i32> %115, ptr %114, align 8, !tbaa !16
%116 = load i64, ptr @NGX_HTTP_MAX_URI_CHANGES, align 8, !tbaa !23
%117 = add nsw i64 %116, 1
%118 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 9
store i64 %117, ptr %118, align 8, !tbaa !47
%119 = tail call ptr (...) @ngx_timeofday() #2
%120 = getelementptr inbounds %struct.TYPE_26__, ptr %23, i64 0, i32 7
%121 = load <2 x i32>, ptr %119, align 4, !tbaa !16
store <2 x i32> %121, ptr %120, align 8, !tbaa !16
%122 = load ptr, ptr %7, align 8, !tbaa !5
%123 = getelementptr inbounds %struct.TYPE_24__, ptr %122, i64 0, i32 1
%124 = load i32, ptr %123, align 4, !tbaa !48
%125 = add nsw i32 %124, 1
store i32 %125, ptr %123, align 4, !tbaa !48
store ptr %23, ptr %3, align 8, !tbaa !33
%126 = tail call i32 @ngx_http_post_request(ptr noundef nonnull %23, ptr noundef null) #2
br label %127
127: ; preds = %79, %47, %39, %25, %12
%128 = phi i32 [ %19, %12 ], [ %26, %25 ], [ %40, %39 ], [ %48, %47 ], [ %126, %79 ]
ret i32 %128
}
declare i32 @ngx_log_error(i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @ngx_pcalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @ngx_list_init(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @ngx_http_get_module_srv_conf(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ngx_http_clear_content_length(ptr noundef) local_unnamed_addr #1
declare i32 @ngx_http_clear_accept_ranges(ptr noundef) local_unnamed_addr #1
declare i32 @ngx_http_clear_last_modified(ptr noundef) local_unnamed_addr #1
declare i32 @ngx_log_debug2(i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ngx_http_set_exten(ptr noundef) local_unnamed_addr #1
declare ptr @ngx_timeofday(...) local_unnamed_addr #1
declare i32 @ngx_http_post_request(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 32}
!6 = !{!"TYPE_26__", !7, i64 0, !10, i64 8, !10, i64 12, !10, i64 16, !10, i64 20, !10, i64 24, !11, i64 32, !10, i64 40, !10, i64 44, !7, i64 48, !10, i64 56, !10, i64 60, !10, i64 64, !10, i64 68, !10, i64 72, !10, i64 76, !11, i64 80, !11, i64 88, !10, i64 96, !10, i64 100, !10, i64 104, !10, i64 108, !11, i64 112, !11, i64 120, !10, i64 128, !10, i64 132, !10, i64 136, !10, i64 140, !10, i64 144, !10, i64 148, !12, i64 152, !10, i64 160, !10, i64 164, !10, i64 168, !10, i64 172, !13, i64 176, !11, i64 184, !11, i64 192, !10, i64 200}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!"TYPE_23__", !10, i64 0, !10, i64 4}
!13 = !{!"TYPE_21__", !10, i64 0}
!14 = !{!15, !10, i64 0}
!15 = !{!"TYPE_24__", !10, i64 0, !10, i64 4}
!16 = !{!10, !10, i64 0}
!17 = !{!6, !11, i64 192}
!18 = !{!19, !10, i64 0}
!19 = !{!"TYPE_28__", !10, i64 0}
!20 = !{!6, !10, i64 160}
!21 = !{!6, !10, i64 200}
!22 = !{!6, !11, i64 184}
!23 = !{!7, !7, i64 0}
!24 = !{!25, !11, i64 0}
!25 = !{!"TYPE_27__", !11, i64 0}
!26 = !{!27, !10, i64 8}
!27 = !{!"TYPE_22__", !10, i64 0, !10, i64 4, !10, i64 8}
!28 = !{!6, !10, i64 172}
!29 = !{!6, !10, i64 152}
!30 = !{!6, !10, i64 156}
!31 = !{!6, !10, i64 148}
!32 = !{!6, !10, i64 136}
!33 = !{!11, !11, i64 0}
!34 = !{!6, !11, i64 120}
!35 = !{!6, !11, i64 112}
!36 = !{!6, !10, i64 12}
!37 = !{!6, !10, i64 16}
!38 = !{!6, !10, i64 104}
!39 = !{!6, !10, i64 100}
!40 = !{!6, !10, i64 96}
!41 = !{!6, !11, i64 88}
!42 = !{!6, !11, i64 80}
!43 = !{!6, !10, i64 76}
!44 = !{!6, !10, i64 72}
!45 = !{!6, !10, i64 20}
!46 = !{!6, !10, i64 24}
!47 = !{!6, !7, i64 48}
!48 = !{!15, !10, i64 4}
| ; ModuleID = 'AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_subrequest.c_ngx_http_lua_subrequest.c'
source_filename = "AnghaBench/tengine/modules/ngx_http_lua_module/src/extr_ngx_http_lua_subrequest.c_ngx_http_lua_subrequest.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NGX_LOG_ERR = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [44 x i8] c"lua subrequests cycle while processing \22%V\22\00", align 1
@NGX_ERROR = common local_unnamed_addr global i32 0, align 4
@NGX_HTTP_MODULE = common local_unnamed_addr global i32 0, align 4
@ngx_http_max_module = common local_unnamed_addr global i32 0, align 4
@NGX_OK = common local_unnamed_addr global i64 0, align 8
@ngx_http_core_module = common local_unnamed_addr global i32 0, align 4
@NGX_HTTP_GET = common local_unnamed_addr global i32 0, align 4
@NGX_LOG_DEBUG_HTTP = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [28 x i8] c"lua http subrequest \22%V?%V\22\00", align 1
@NGX_HTTP_SUBREQUEST_IN_MEMORY = common local_unnamed_addr global i32 0, align 4
@NGX_HTTP_SUBREQUEST_WAITED = common local_unnamed_addr global i32 0, align 4
@ngx_http_core_get_method = common local_unnamed_addr global i32 0, align 4
@ngx_http_request_empty_handler = common local_unnamed_addr global i32 0, align 4
@ngx_http_handler = common local_unnamed_addr global i32 0, align 4
@NGX_HTTP_MAX_URI_CHANGES = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @ngx_http_lua_subrequest], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @ngx_http_lua_subrequest(ptr noundef %0, ptr noundef %1, ptr noundef readonly %2, ptr nocapture noundef writeonly %3, ptr noundef %4, i32 noundef %5) #0 {
%7 = getelementptr inbounds i8, ptr %0, i64 32
%8 = load ptr, ptr %7, align 8, !tbaa !6
%9 = load i32, ptr %8, align 4, !tbaa !15
%10 = add nsw i32 %9, -1
store i32 %10, ptr %8, align 4, !tbaa !15
%11 = icmp eq i32 %10, 0
br i1 %11, label %12, label %20
12: ; preds = %6
%13 = load i32, ptr @NGX_LOG_ERR, align 4, !tbaa !17
%14 = getelementptr inbounds i8, ptr %0, i64 192
%15 = load ptr, ptr %14, align 8, !tbaa !18
%16 = load i32, ptr %15, align 4, !tbaa !19
%17 = tail call i32 @ngx_log_error(i32 noundef %13, i32 noundef %16, i32 noundef 0, ptr noundef nonnull @.str, ptr noundef %1) #2
%18 = load ptr, ptr %7, align 8, !tbaa !6
store i32 1, ptr %18, align 4, !tbaa !15
%19 = load i32, ptr @NGX_ERROR, align 4, !tbaa !17
br label %133
20: ; preds = %6
%21 = getelementptr inbounds i8, ptr %0, i64 160
%22 = load i32, ptr %21, align 8, !tbaa !21
%23 = tail call ptr @ngx_pcalloc(i32 noundef %22, i32 noundef 208) #2
%24 = icmp eq ptr %23, null
br i1 %24, label %25, label %27
25: ; preds = %20
%26 = load i32, ptr @NGX_ERROR, align 4, !tbaa !17
br label %133
27: ; preds = %20
%28 = load i32, ptr @NGX_HTTP_MODULE, align 4, !tbaa !17
%29 = getelementptr inbounds i8, ptr %23, i64 200
store i32 %28, ptr %29, align 8, !tbaa !22
%30 = getelementptr inbounds i8, ptr %0, i64 192
%31 = load ptr, ptr %30, align 8, !tbaa !18
%32 = getelementptr inbounds i8, ptr %23, i64 192
store ptr %31, ptr %32, align 8, !tbaa !18
%33 = load i32, ptr %21, align 8, !tbaa !21
%34 = load i32, ptr @ngx_http_max_module, align 4, !tbaa !17
%35 = shl i32 %34, 3
%36 = tail call ptr @ngx_pcalloc(i32 noundef %33, i32 noundef %35) #2
%37 = getelementptr inbounds i8, ptr %23, i64 184
store ptr %36, ptr %37, align 8, !tbaa !23
%38 = icmp eq ptr %36, null
br i1 %38, label %39, label %41
39: ; preds = %27
%40 = load i32, ptr @NGX_ERROR, align 4, !tbaa !17
br label %133
41: ; preds = %27
%42 = getelementptr inbounds i8, ptr %23, i64 176
%43 = load i32, ptr %21, align 8, !tbaa !21
%44 = tail call i64 @ngx_list_init(ptr noundef nonnull %42, i32 noundef %43, i32 noundef 20, i32 noundef 4) #2
%45 = load i64, ptr @NGX_OK, align 8, !tbaa !24
%46 = icmp eq i64 %44, %45
br i1 %46, label %49, label %47
47: ; preds = %41
%48 = load i32, ptr @NGX_ERROR, align 4, !tbaa !17
br label %133
49: ; preds = %41
%50 = load i32, ptr @ngx_http_core_module, align 4, !tbaa !17
%51 = tail call ptr @ngx_http_get_module_srv_conf(ptr noundef nonnull %0, i32 noundef %50) #2
%52 = load ptr, ptr %51, align 8, !tbaa !25
%53 = getelementptr inbounds i8, ptr %52, i64 8
%54 = load i32, ptr %53, align 4, !tbaa !27
%55 = getelementptr inbounds i8, ptr %23, i64 172
store i32 %54, ptr %55, align 4, !tbaa !29
%56 = getelementptr inbounds i8, ptr %23, i64 164
%57 = load <2 x i32>, ptr %52, align 4, !tbaa !17
store <2 x i32> %57, ptr %56, align 4, !tbaa !17
%58 = load i32, ptr %21, align 8, !tbaa !21
%59 = getelementptr inbounds i8, ptr %23, i64 160
store i32 %58, ptr %59, align 8, !tbaa !21
%60 = getelementptr inbounds i8, ptr %23, i64 152
store <2 x i32> <i32 -1, i32 -1>, ptr %60, align 8, !tbaa !17
%61 = tail call i32 @ngx_http_clear_content_length(ptr noundef nonnull %23) #2
%62 = tail call i32 @ngx_http_clear_accept_ranges(ptr noundef nonnull %23) #2
%63 = tail call i32 @ngx_http_clear_last_modified(ptr noundef nonnull %23) #2
%64 = getelementptr inbounds i8, ptr %0, i64 148
%65 = load i32, ptr %64, align 4, !tbaa !30
%66 = getelementptr inbounds i8, ptr %23, i64 148
store i32 %65, ptr %66, align 4, !tbaa !30
%67 = load i32, ptr @NGX_HTTP_GET, align 4, !tbaa !17
%68 = getelementptr inbounds i8, ptr %23, i64 136
store i32 %67, ptr %68, align 8, !tbaa !31
%69 = getelementptr inbounds i8, ptr %0, i64 128
%70 = getelementptr inbounds i8, ptr %23, i64 128
%71 = load <2 x i32>, ptr %69, align 8, !tbaa !17
store <2 x i32> %71, ptr %70, align 8, !tbaa !17
%72 = load ptr, ptr %1, align 8, !tbaa !32
%73 = getelementptr inbounds i8, ptr %23, i64 120
store ptr %72, ptr %73, align 8, !tbaa !33
%74 = icmp eq ptr %2, null
br i1 %74, label %78, label %75
75: ; preds = %49
%76 = load ptr, ptr %2, align 8, !tbaa !32
%77 = getelementptr inbounds i8, ptr %23, i64 112
store ptr %76, ptr %77, align 8, !tbaa !34
br label %78
78: ; preds = %75, %49
%79 = load i32, ptr @NGX_LOG_DEBUG_HTTP, align 4, !tbaa !17
%80 = load i32, ptr %31, align 4, !tbaa !19
%81 = getelementptr inbounds i8, ptr %23, i64 112
%82 = tail call i32 @ngx_log_debug2(i32 noundef %79, i32 noundef %80, i32 noundef 0, ptr noundef nonnull @.str.1, ptr noundef nonnull %1, ptr noundef nonnull %81) #2
%83 = load i32, ptr @NGX_HTTP_SUBREQUEST_IN_MEMORY, align 4, !tbaa !17
%84 = and i32 %83, %5
%85 = icmp ne i32 %84, 0
%86 = zext i1 %85 to i32
%87 = getelementptr inbounds i8, ptr %23, i64 12
store i32 %86, ptr %87, align 4, !tbaa !35
%88 = load i32, ptr @NGX_HTTP_SUBREQUEST_WAITED, align 4, !tbaa !17
%89 = and i32 %88, %5
%90 = icmp ne i32 %89, 0
%91 = zext i1 %90 to i32
%92 = getelementptr inbounds i8, ptr %23, i64 16
store i32 %91, ptr %92, align 8, !tbaa !36
%93 = getelementptr inbounds i8, ptr %0, i64 104
%94 = load i32, ptr %93, align 8, !tbaa !37
%95 = getelementptr inbounds i8, ptr %23, i64 104
store i32 %94, ptr %95, align 8, !tbaa !37
%96 = load i32, ptr @ngx_http_core_get_method, align 4, !tbaa !17
%97 = getelementptr inbounds i8, ptr %23, i64 100
store i32 %96, ptr %97, align 4, !tbaa !38
%98 = getelementptr inbounds i8, ptr %0, i64 96
%99 = load i32, ptr %98, align 8, !tbaa !39
%100 = getelementptr inbounds i8, ptr %23, i64 96
store i32 %99, ptr %100, align 8, !tbaa !39
%101 = tail call i32 @ngx_http_set_exten(ptr noundef nonnull %23) #2
%102 = load ptr, ptr %7, align 8, !tbaa !6
%103 = getelementptr inbounds i8, ptr %23, i64 32
store ptr %102, ptr %103, align 8, !tbaa !6
%104 = getelementptr inbounds i8, ptr %23, i64 88
store ptr %0, ptr %104, align 8, !tbaa !40
%105 = getelementptr inbounds i8, ptr %23, i64 80
store ptr %4, ptr %105, align 8, !tbaa !41
%106 = load i32, ptr @ngx_http_request_empty_handler, align 4, !tbaa !17
%107 = getelementptr inbounds i8, ptr %23, i64 76
store i32 %106, ptr %107, align 4, !tbaa !42
%108 = load i32, ptr @ngx_http_handler, align 4, !tbaa !17
%109 = getelementptr inbounds i8, ptr %23, i64 72
store i32 %108, ptr %109, align 8, !tbaa !43
%110 = getelementptr inbounds i8, ptr %0, i64 64
%111 = getelementptr inbounds i8, ptr %23, i64 20
%112 = getelementptr inbounds i8, ptr %0, i64 60
%113 = getelementptr inbounds i8, ptr %0, i64 56
%114 = getelementptr inbounds i8, ptr %23, i64 56
%115 = load <2 x i32>, ptr %110, align 8, !tbaa !17
%116 = load i32, ptr %112, align 4, !tbaa !44
store <2 x i32> <i32 1, i32 1>, ptr %111, align 4, !tbaa !17
%117 = load i32, ptr %113, align 8, !tbaa !45
%118 = insertelement <4 x i32> poison, i32 %117, i64 0
%119 = insertelement <4 x i32> %118, i32 %116, i64 1
%120 = shufflevector <2 x i32> %115, <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 poison, i32 poison>
%121 = shufflevector <4 x i32> %119, <4 x i32> %120, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
store <4 x i32> %121, ptr %114, align 8, !tbaa !17
%122 = load i64, ptr @NGX_HTTP_MAX_URI_CHANGES, align 8, !tbaa !24
%123 = add nsw i64 %122, 1
%124 = getelementptr inbounds i8, ptr %23, i64 48
store i64 %123, ptr %124, align 8, !tbaa !46
%125 = tail call ptr @ngx_timeofday() #2
%126 = getelementptr inbounds i8, ptr %23, i64 40
%127 = load <2 x i32>, ptr %125, align 4, !tbaa !17
store <2 x i32> %127, ptr %126, align 8, !tbaa !17
%128 = load ptr, ptr %7, align 8, !tbaa !6
%129 = getelementptr inbounds i8, ptr %128, i64 4
%130 = load i32, ptr %129, align 4, !tbaa !47
%131 = add nsw i32 %130, 1
store i32 %131, ptr %129, align 4, !tbaa !47
store ptr %23, ptr %3, align 8, !tbaa !32
%132 = tail call i32 @ngx_http_post_request(ptr noundef nonnull %23, ptr noundef null) #2
br label %133
133: ; preds = %78, %47, %39, %25, %12
%134 = phi i32 [ %19, %12 ], [ %26, %25 ], [ %40, %39 ], [ %48, %47 ], [ %132, %78 ]
ret i32 %134
}
declare i32 @ngx_log_error(i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare ptr @ngx_pcalloc(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @ngx_list_init(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare ptr @ngx_http_get_module_srv_conf(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ngx_http_clear_content_length(ptr noundef) local_unnamed_addr #1
declare i32 @ngx_http_clear_accept_ranges(ptr noundef) local_unnamed_addr #1
declare i32 @ngx_http_clear_last_modified(ptr noundef) local_unnamed_addr #1
declare i32 @ngx_log_debug2(i32 noundef, i32 noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @ngx_http_set_exten(ptr noundef) local_unnamed_addr #1
declare ptr @ngx_timeofday(...) local_unnamed_addr #1
declare i32 @ngx_http_post_request(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 32}
!7 = !{!"TYPE_26__", !8, i64 0, !11, i64 8, !11, i64 12, !11, i64 16, !11, i64 20, !11, i64 24, !12, i64 32, !11, i64 40, !11, i64 44, !8, i64 48, !11, i64 56, !11, i64 60, !11, i64 64, !11, i64 68, !11, i64 72, !11, i64 76, !12, i64 80, !12, i64 88, !11, i64 96, !11, i64 100, !11, i64 104, !11, i64 108, !12, i64 112, !12, i64 120, !11, i64 128, !11, i64 132, !11, i64 136, !11, i64 140, !11, i64 144, !11, i64 148, !13, i64 152, !11, i64 160, !11, i64 164, !11, i64 168, !11, i64 172, !14, i64 176, !12, i64 184, !12, i64 192, !11, i64 200}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!"any pointer", !9, i64 0}
!13 = !{!"TYPE_23__", !11, i64 0, !11, i64 4}
!14 = !{!"TYPE_21__", !11, i64 0}
!15 = !{!16, !11, i64 0}
!16 = !{!"TYPE_24__", !11, i64 0, !11, i64 4}
!17 = !{!11, !11, i64 0}
!18 = !{!7, !12, i64 192}
!19 = !{!20, !11, i64 0}
!20 = !{!"TYPE_28__", !11, i64 0}
!21 = !{!7, !11, i64 160}
!22 = !{!7, !11, i64 200}
!23 = !{!7, !12, i64 184}
!24 = !{!8, !8, i64 0}
!25 = !{!26, !12, i64 0}
!26 = !{!"TYPE_27__", !12, i64 0}
!27 = !{!28, !11, i64 8}
!28 = !{!"TYPE_22__", !11, i64 0, !11, i64 4, !11, i64 8}
!29 = !{!7, !11, i64 172}
!30 = !{!7, !11, i64 148}
!31 = !{!7, !11, i64 136}
!32 = !{!12, !12, i64 0}
!33 = !{!7, !12, i64 120}
!34 = !{!7, !12, i64 112}
!35 = !{!7, !11, i64 12}
!36 = !{!7, !11, i64 16}
!37 = !{!7, !11, i64 104}
!38 = !{!7, !11, i64 100}
!39 = !{!7, !11, i64 96}
!40 = !{!7, !12, i64 88}
!41 = !{!7, !12, i64 80}
!42 = !{!7, !11, i64 76}
!43 = !{!7, !11, i64 72}
!44 = !{!7, !11, i64 60}
!45 = !{!7, !11, i64 56}
!46 = !{!7, !8, i64 48}
!47 = !{!16, !11, i64 4}
| tengine_modules_ngx_http_lua_module_src_extr_ngx_http_lua_subrequest.c_ngx_http_lua_subrequest |
; ModuleID = 'AnghaBench/nginx/src/http/v2/extr_ngx_http_v2.c_ngx_http_v2_frame_handler.c'
source_filename = "AnghaBench/nginx/src/http/v2/extr_ngx_http_v2.c_ngx_http_v2_frame_handler.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_8__ = type { i64, ptr, ptr }
%struct.TYPE_10__ = type { i64, i64 }
%struct.TYPE_9__ = type { i32, ptr }
@NGX_AGAIN = dso_local local_unnamed_addr global i32 0, align 4
@NGX_HTTP_V2_FRAME_HEADER_SIZE = dso_local local_unnamed_addr global i64 0, align 8
@NGX_OK = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ngx_http_v2_frame_handler], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable
define internal i32 @ngx_http_v2_frame_handler(ptr nocapture noundef %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 2
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = load ptr, ptr %4, align 8, !tbaa !11
%6 = load i64, ptr %5, align 8, !tbaa !13
%7 = getelementptr inbounds %struct.TYPE_10__, ptr %5, i64 0, i32 1
%8 = load i64, ptr %7, align 8, !tbaa !15
%9 = icmp eq i64 %6, %8
br i1 %9, label %10, label %20
10: ; preds = %2
%11 = getelementptr inbounds %struct.TYPE_9__, ptr %0, i64 0, i32 1
%12 = load ptr, ptr %11, align 8, !tbaa !16
%13 = getelementptr inbounds %struct.TYPE_8__, ptr %1, i64 0, i32 1
store ptr %12, ptr %13, align 8, !tbaa !19
store ptr %1, ptr %11, align 8, !tbaa !16
%14 = load i64, ptr @NGX_HTTP_V2_FRAME_HEADER_SIZE, align 8, !tbaa !20
%15 = load i64, ptr %1, align 8, !tbaa !21
%16 = add nsw i64 %15, %14
%17 = load i32, ptr %0, align 8, !tbaa !22
%18 = trunc i64 %16 to i32
%19 = add i32 %17, %18
store i32 %19, ptr %0, align 8, !tbaa !22
br label %20
20: ; preds = %2, %10
%21 = phi ptr [ @NGX_OK, %10 ], [ @NGX_AGAIN, %2 ]
%22 = load i32, ptr %21, align 4, !tbaa !23
ret i32 %22
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 16}
!6 = !{!"TYPE_8__", !7, i64 0, !10, i64 8, !10, i64 16}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 0}
!12 = !{!"TYPE_7__", !10, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_10__", !7, i64 0, !7, i64 8}
!15 = !{!14, !7, i64 8}
!16 = !{!17, !10, i64 8}
!17 = !{!"TYPE_9__", !18, i64 0, !10, i64 8}
!18 = !{!"int", !8, i64 0}
!19 = !{!6, !10, i64 8}
!20 = !{!7, !7, i64 0}
!21 = !{!6, !7, i64 0}
!22 = !{!17, !18, i64 0}
!23 = !{!18, !18, i64 0}
| ; ModuleID = 'AnghaBench/nginx/src/http/v2/extr_ngx_http_v2.c_ngx_http_v2_frame_handler.c'
source_filename = "AnghaBench/nginx/src/http/v2/extr_ngx_http_v2.c_ngx_http_v2_frame_handler.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@NGX_AGAIN = common local_unnamed_addr global i32 0, align 4
@NGX_HTTP_V2_FRAME_HEADER_SIZE = common local_unnamed_addr global i64 0, align 8
@NGX_OK = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ngx_http_v2_frame_handler], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal i32 @ngx_http_v2_frame_handler(ptr nocapture noundef %0, ptr noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %1, i64 16
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = load ptr, ptr %4, align 8, !tbaa !12
%6 = load i64, ptr %5, align 8, !tbaa !14
%7 = getelementptr inbounds i8, ptr %5, i64 8
%8 = load i64, ptr %7, align 8, !tbaa !16
%9 = icmp eq i64 %6, %8
br i1 %9, label %10, label %20
10: ; preds = %2
%11 = getelementptr inbounds i8, ptr %0, i64 8
%12 = load ptr, ptr %11, align 8, !tbaa !17
%13 = getelementptr inbounds i8, ptr %1, i64 8
store ptr %12, ptr %13, align 8, !tbaa !20
store ptr %1, ptr %11, align 8, !tbaa !17
%14 = load i64, ptr @NGX_HTTP_V2_FRAME_HEADER_SIZE, align 8, !tbaa !21
%15 = load i64, ptr %1, align 8, !tbaa !22
%16 = add nsw i64 %15, %14
%17 = load i32, ptr %0, align 8, !tbaa !23
%18 = trunc i64 %16 to i32
%19 = add i32 %17, %18
store i32 %19, ptr %0, align 8, !tbaa !23
br label %20
20: ; preds = %2, %10
%21 = phi ptr [ @NGX_OK, %10 ], [ @NGX_AGAIN, %2 ]
%22 = load i32, ptr %21, align 4, !tbaa !24
ret i32 %22
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 16}
!7 = !{!"TYPE_8__", !8, i64 0, !11, i64 8, !11, i64 16}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"TYPE_7__", !11, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"TYPE_10__", !8, i64 0, !8, i64 8}
!16 = !{!15, !8, i64 8}
!17 = !{!18, !11, i64 8}
!18 = !{!"TYPE_9__", !19, i64 0, !11, i64 8}
!19 = !{!"int", !9, i64 0}
!20 = !{!7, !11, i64 8}
!21 = !{!8, !8, i64 0}
!22 = !{!7, !8, i64 0}
!23 = !{!18, !19, i64 0}
!24 = !{!19, !19, i64 0}
| nginx_src_http_v2_extr_ngx_http_v2.c_ngx_http_v2_frame_handler |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/pci/extr_pci.c_platform_pci_sleep_wake.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/pci/extr_pci.c_platform_pci_sleep_wake.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@pci_platform_pm = dso_local local_unnamed_addr global ptr null, align 8
@ENODEV = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @platform_pci_sleep_wake], section "llvm.metadata"
; Function Attrs: inlinehint nounwind uwtable
define internal i32 @platform_pci_sleep_wake(ptr noundef %0, i32 noundef %1) #0 {
%3 = load ptr, ptr @pci_platform_pm, align 8, !tbaa !5
%4 = icmp eq ptr %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = load ptr, ptr %3, align 8, !tbaa !9
%7 = tail call i32 %6(ptr noundef %0, i32 noundef %1) #1
br label %11
8: ; preds = %2
%9 = load i32, ptr @ENODEV, align 4, !tbaa !11
%10 = sub nsw i32 0, %9
br label %11
11: ; preds = %8, %5
%12 = phi i32 [ %7, %5 ], [ %10, %8 ]
ret i32 %12
}
attributes #0 = { inlinehint nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"TYPE_2__", !6, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/pci/extr_pci.c_platform_pci_sleep_wake.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/pci/extr_pci.c_platform_pci_sleep_wake.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@pci_platform_pm = common local_unnamed_addr global ptr null, align 8
@ENODEV = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @platform_pci_sleep_wake], section "llvm.metadata"
; Function Attrs: inlinehint nounwind ssp uwtable(sync)
define internal i32 @platform_pci_sleep_wake(ptr noundef %0, i32 noundef %1) #0 {
%3 = load ptr, ptr @pci_platform_pm, align 8, !tbaa !6
%4 = icmp eq ptr %3, null
br i1 %4, label %8, label %5
5: ; preds = %2
%6 = load ptr, ptr %3, align 8, !tbaa !10
%7 = tail call i32 %6(ptr noundef %0, i32 noundef %1) #1
br label %11
8: ; preds = %2
%9 = load i32, ptr @ENODEV, align 4, !tbaa !12
%10 = sub nsw i32 0, %9
br label %11
11: ; preds = %8, %5
%12 = phi i32 [ %7, %5 ], [ %10, %8 ]
ret i32 %12
}
attributes #0 = { inlinehint nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"TYPE_2__", !7, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !8, i64 0}
| fastsocket_kernel_drivers_pci_extr_pci.c_platform_pci_sleep_wake |
; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/cpu/musashi/extr_m68kdasm.c_d68020_chk2_cmp2_8.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/cpu/musashi/extr_m68kdasm.c_d68020_chk2_cmp2_8.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@M68020_PLUS = dso_local local_unnamed_addr global i32 0, align 4
@g_dasm_str = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [21 x i8] c"%s.b %s, %c%d; (2+)\00", align 1
@.str.1 = private unnamed_addr constant [5 x i8] c"chk2\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"cmp2\00", align 1
@g_cpu_ir = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @d68020_chk2_cmp2_8], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @d68020_chk2_cmp2_8() #0 {
%1 = load i32, ptr @M68020_PLUS, align 4, !tbaa !5
%2 = tail call i32 @LIMIT_CPU_TYPES(i32 noundef %1) #2
%3 = tail call i32 (...) @read_imm_16() #2
%4 = load i32, ptr @g_dasm_str, align 4, !tbaa !5
%5 = tail call i64 @BIT_B(i32 noundef %3) #2
%6 = icmp eq i64 %5, 0
%7 = select i1 %6, ptr @.str.2, ptr @.str.1
%8 = load i32, ptr @g_cpu_ir, align 4, !tbaa !5
%9 = tail call ptr @get_ea_mode_str_8(i32 noundef %8) #2
%10 = tail call i64 @BIT_F(i32 noundef %3) #2
%11 = icmp eq i64 %10, 0
%12 = select i1 %11, i8 68, i8 65
%13 = lshr i32 %3, 12
%14 = and i32 %13, 7
%15 = tail call i32 @sprintf(i32 noundef %4, ptr noundef nonnull @.str, ptr noundef nonnull %7, ptr noundef %9, i8 noundef signext %12, i32 noundef %14) #2
ret void
}
declare i32 @LIMIT_CPU_TYPES(i32 noundef) local_unnamed_addr #1
declare i32 @read_imm_16(...) local_unnamed_addr #1
declare i32 @sprintf(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i8 noundef signext, i32 noundef) local_unnamed_addr #1
declare i64 @BIT_B(i32 noundef) local_unnamed_addr #1
declare ptr @get_ea_mode_str_8(i32 noundef) local_unnamed_addr #1
declare i64 @BIT_F(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/PicoDrive/cpu/musashi/extr_m68kdasm.c_d68020_chk2_cmp2_8.c'
source_filename = "AnghaBench/Provenance/Cores/PicoDrive/cpu/musashi/extr_m68kdasm.c_d68020_chk2_cmp2_8.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@M68020_PLUS = common local_unnamed_addr global i32 0, align 4
@g_dasm_str = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [21 x i8] c"%s.b %s, %c%d; (2+)\00", align 1
@.str.1 = private unnamed_addr constant [5 x i8] c"chk2\00", align 1
@.str.2 = private unnamed_addr constant [5 x i8] c"cmp2\00", align 1
@g_cpu_ir = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @d68020_chk2_cmp2_8], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @d68020_chk2_cmp2_8() #0 {
%1 = load i32, ptr @M68020_PLUS, align 4, !tbaa !6
%2 = tail call i32 @LIMIT_CPU_TYPES(i32 noundef %1) #2
%3 = tail call i32 @read_imm_16() #2
%4 = load i32, ptr @g_dasm_str, align 4, !tbaa !6
%5 = tail call i64 @BIT_B(i32 noundef %3) #2
%6 = icmp eq i64 %5, 0
%7 = select i1 %6, ptr @.str.2, ptr @.str.1
%8 = load i32, ptr @g_cpu_ir, align 4, !tbaa !6
%9 = tail call ptr @get_ea_mode_str_8(i32 noundef %8) #2
%10 = tail call i64 @BIT_F(i32 noundef %3) #2
%11 = icmp eq i64 %10, 0
%12 = select i1 %11, i8 68, i8 65
%13 = lshr i32 %3, 12
%14 = and i32 %13, 7
%15 = tail call i32 @sprintf(i32 noundef %4, ptr noundef nonnull @.str, ptr noundef nonnull %7, ptr noundef %9, i8 noundef signext %12, i32 noundef %14) #2
ret void
}
declare i32 @LIMIT_CPU_TYPES(i32 noundef) local_unnamed_addr #1
declare i32 @read_imm_16(...) local_unnamed_addr #1
declare i32 @sprintf(i32 noundef, ptr noundef, ptr noundef, ptr noundef, i8 noundef signext, i32 noundef) local_unnamed_addr #1
declare i64 @BIT_B(i32 noundef) local_unnamed_addr #1
declare ptr @get_ea_mode_str_8(i32 noundef) local_unnamed_addr #1
declare i64 @BIT_F(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| Provenance_Cores_PicoDrive_cpu_musashi_extr_m68kdasm.c_d68020_chk2_cmp2_8 |
; ModuleID = 'AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_write_set_format_iso9660.c_isoent_cmp_key.c'
source_filename = "AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_write_set_format_iso9660.c_isoent_cmp_key.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @isoent_cmp_key], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @isoent_cmp_key(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = load i32, ptr %3, align 4, !tbaa !10
%5 = tail call i32 @strcmp(i32 noundef %4, ptr noundef %1) #2
ret i32 %5
}
declare i32 @strcmp(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"isoent", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !13, i64 0}
!11 = !{!"TYPE_4__", !12, i64 0}
!12 = !{!"TYPE_3__", !13, i64 0}
!13 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_write_set_format_iso9660.c_isoent_cmp_key.c'
source_filename = "AnghaBench/freebsd/contrib/libarchive/libarchive/extr_archive_write_set_format_iso9660.c_isoent_cmp_key.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @isoent_cmp_key], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @isoent_cmp_key(ptr nocapture noundef readonly %0, ptr noundef %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = load i32, ptr %3, align 4, !tbaa !11
%5 = tail call i32 @strcmp(i32 noundef %4, ptr noundef %1) #2
ret i32 %5
}
declare i32 @strcmp(i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"isoent", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !14, i64 0}
!12 = !{!"TYPE_4__", !13, i64 0}
!13 = !{!"TYPE_3__", !14, i64 0}
!14 = !{!"int", !9, i64 0}
| freebsd_contrib_libarchive_libarchive_extr_archive_write_set_format_iso9660.c_isoent_cmp_key |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/shmobile/extr_shmob_drm_crtc.c_shmob_drm_encoder_dpms.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/shmobile/extr_shmob_drm_crtc.c_shmob_drm_encoder_dpms.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @shmob_drm_encoder_dpms], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @shmob_drm_encoder_dpms(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @to_shmob_encoder(ptr noundef %0) #2
%4 = load i32, ptr %3, align 4, !tbaa !5
%5 = icmp eq i32 %4, %1
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = load ptr, ptr %0, align 8, !tbaa !10
%8 = load ptr, ptr %7, align 8, !tbaa !13
%9 = tail call i32 @shmob_drm_backlight_dpms(ptr noundef %8, i32 noundef %1) #2
store i32 %1, ptr %3, align 4, !tbaa !5
br label %10
10: ; preds = %2, %6
ret void
}
declare ptr @to_shmob_encoder(ptr noundef) local_unnamed_addr #1
declare i32 @shmob_drm_backlight_dpms(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"shmob_drm_encoder", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"drm_encoder", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"TYPE_2__", !12, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/shmobile/extr_shmob_drm_crtc.c_shmob_drm_encoder_dpms.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/shmobile/extr_shmob_drm_crtc.c_shmob_drm_encoder_dpms.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @shmob_drm_encoder_dpms], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @shmob_drm_encoder_dpms(ptr noundef %0, i32 noundef %1) #0 {
%3 = tail call ptr @to_shmob_encoder(ptr noundef %0) #2
%4 = load i32, ptr %3, align 4, !tbaa !6
%5 = icmp eq i32 %4, %1
br i1 %5, label %10, label %6
6: ; preds = %2
%7 = load ptr, ptr %0, align 8, !tbaa !11
%8 = load ptr, ptr %7, align 8, !tbaa !14
%9 = tail call i32 @shmob_drm_backlight_dpms(ptr noundef %8, i32 noundef %1) #2
store i32 %1, ptr %3, align 4, !tbaa !6
br label %10
10: ; preds = %2, %6
ret void
}
declare ptr @to_shmob_encoder(ptr noundef) local_unnamed_addr #1
declare i32 @shmob_drm_backlight_dpms(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"shmob_drm_encoder", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"drm_encoder", !13, i64 0}
!13 = !{!"any pointer", !9, i64 0}
!14 = !{!15, !13, i64 0}
!15 = !{!"TYPE_2__", !13, i64 0}
| linux_drivers_gpu_drm_shmobile_extr_shmob_drm_crtc.c_shmob_drm_encoder_dpms |
; ModuleID = 'AnghaBench/linux/fs/xfs/extr_xfs_log_cil.c_xlog_cil_committed.c'
source_filename = "AnghaBench/linux/fs/xfs/extr_xfs_log_cil.c_xlog_cil_committed.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.xfs_cil_ctx = type { i32, i32, ptr, i32, i32 }
%struct.TYPE_4__ = type { i32, ptr, i32 }
%struct.TYPE_3__ = type { i32, ptr }
@XFS_MOUNT_DISCARD = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @xlog_cil_committed], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @xlog_cil_committed(ptr noundef %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds %struct.xfs_cil_ctx, ptr %0, i64 0, i32 2
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.TYPE_4__, ptr %4, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !11
%7 = getelementptr inbounds %struct.TYPE_3__, ptr %6, i64 0, i32 1
%8 = load ptr, ptr %7, align 8, !tbaa !13
%9 = icmp eq i32 %1, 0
br i1 %9, label %20, label %10
10: ; preds = %2
%11 = tail call i32 @spin_lock(ptr noundef nonnull %4) #2
%12 = load ptr, ptr %3, align 8, !tbaa !5
%13 = getelementptr inbounds %struct.TYPE_4__, ptr %12, i64 0, i32 2
%14 = tail call i32 @wake_up_all(ptr noundef nonnull %13) #2
%15 = load ptr, ptr %3, align 8, !tbaa !5
%16 = tail call i32 @spin_unlock(ptr noundef %15) #2
%17 = load ptr, ptr %3, align 8, !tbaa !5
%18 = getelementptr inbounds %struct.TYPE_4__, ptr %17, i64 0, i32 1
%19 = load ptr, ptr %18, align 8, !tbaa !11
br label %20
20: ; preds = %10, %2
%21 = phi ptr [ %19, %10 ], [ %6, %2 ]
%22 = load i32, ptr %21, align 8, !tbaa !15
%23 = getelementptr inbounds %struct.xfs_cil_ctx, ptr %0, i64 0, i32 1
%24 = load i32, ptr %23, align 4, !tbaa !16
%25 = getelementptr inbounds %struct.xfs_cil_ctx, ptr %0, i64 0, i32 4
%26 = load i32, ptr %25, align 4, !tbaa !17
%27 = tail call i32 @xfs_trans_committed_bulk(i32 noundef %22, i32 noundef %24, i32 noundef %26, i32 noundef %1) #2
%28 = tail call i32 @xfs_extent_busy_sort(ptr noundef nonnull %0) #2
%29 = load i32, ptr %8, align 4, !tbaa !18
%30 = load i32, ptr @XFS_MOUNT_DISCARD, align 4, !tbaa !20
%31 = and i32 %30, %29
%32 = icmp ne i32 %31, 0
%33 = and i1 %9, %32
%34 = zext i1 %33 to i32
%35 = tail call i32 @xfs_extent_busy_clear(ptr noundef nonnull %8, ptr noundef nonnull %0, i32 noundef %34) #2
%36 = load ptr, ptr %3, align 8, !tbaa !5
%37 = tail call i32 @spin_lock(ptr noundef %36) #2
%38 = getelementptr inbounds %struct.xfs_cil_ctx, ptr %0, i64 0, i32 3
%39 = tail call i32 @list_del(ptr noundef nonnull %38) #2
%40 = load ptr, ptr %3, align 8, !tbaa !5
%41 = tail call i32 @spin_unlock(ptr noundef %40) #2
%42 = load i32, ptr %23, align 4, !tbaa !16
%43 = tail call i32 @xlog_cil_free_logvec(i32 noundef %42) #2
%44 = tail call i32 @list_empty(ptr noundef nonnull %0) #2
%45 = icmp eq i32 %44, 0
br i1 %45, label %46, label %48
46: ; preds = %20
%47 = tail call i32 @xlog_discard_busy_extents(ptr noundef nonnull %8, ptr noundef nonnull %0) #2
br label %50
48: ; preds = %20
%49 = tail call i32 @kmem_free(ptr noundef nonnull %0) #2
br label %50
50: ; preds = %48, %46
ret void
}
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @wake_up_all(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @xfs_trans_committed_bulk(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @xfs_extent_busy_sort(ptr noundef) local_unnamed_addr #1
declare i32 @xfs_extent_busy_clear(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @list_del(ptr noundef) local_unnamed_addr #1
declare i32 @xlog_cil_free_logvec(i32 noundef) local_unnamed_addr #1
declare i32 @list_empty(ptr noundef) local_unnamed_addr #1
declare i32 @xlog_discard_busy_extents(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kmem_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"xfs_cil_ctx", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16, !7, i64 20}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!12, !10, i64 8}
!12 = !{!"TYPE_4__", !7, i64 0, !10, i64 8, !7, i64 16}
!13 = !{!14, !10, i64 8}
!14 = !{!"TYPE_3__", !7, i64 0, !10, i64 8}
!15 = !{!14, !7, i64 0}
!16 = !{!6, !7, i64 4}
!17 = !{!6, !7, i64 20}
!18 = !{!19, !7, i64 0}
!19 = !{!"xfs_mount", !7, i64 0}
!20 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/fs/xfs/extr_xfs_log_cil.c_xlog_cil_committed.c'
source_filename = "AnghaBench/linux/fs/xfs/extr_xfs_log_cil.c_xlog_cil_committed.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@XFS_MOUNT_DISCARD = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @xlog_cil_committed], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @xlog_cil_committed(ptr noundef %0, i32 noundef %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %4, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !12
%7 = getelementptr inbounds i8, ptr %6, i64 8
%8 = load ptr, ptr %7, align 8, !tbaa !14
%9 = icmp eq i32 %1, 0
br i1 %9, label %20, label %10
10: ; preds = %2
%11 = tail call i32 @spin_lock(ptr noundef nonnull %4) #2
%12 = load ptr, ptr %3, align 8, !tbaa !6
%13 = getelementptr inbounds i8, ptr %12, i64 16
%14 = tail call i32 @wake_up_all(ptr noundef nonnull %13) #2
%15 = load ptr, ptr %3, align 8, !tbaa !6
%16 = tail call i32 @spin_unlock(ptr noundef %15) #2
%17 = load ptr, ptr %3, align 8, !tbaa !6
%18 = getelementptr inbounds i8, ptr %17, i64 8
%19 = load ptr, ptr %18, align 8, !tbaa !12
br label %20
20: ; preds = %10, %2
%21 = phi ptr [ %19, %10 ], [ %6, %2 ]
%22 = load i32, ptr %21, align 8, !tbaa !16
%23 = getelementptr inbounds i8, ptr %0, i64 4
%24 = load i32, ptr %23, align 4, !tbaa !17
%25 = getelementptr inbounds i8, ptr %0, i64 20
%26 = load i32, ptr %25, align 4, !tbaa !18
%27 = tail call i32 @xfs_trans_committed_bulk(i32 noundef %22, i32 noundef %24, i32 noundef %26, i32 noundef %1) #2
%28 = tail call i32 @xfs_extent_busy_sort(ptr noundef nonnull %0) #2
%29 = load i32, ptr %8, align 4, !tbaa !19
%30 = load i32, ptr @XFS_MOUNT_DISCARD, align 4, !tbaa !21
%31 = and i32 %30, %29
%32 = icmp ne i32 %31, 0
%33 = and i1 %9, %32
%34 = zext i1 %33 to i32
%35 = tail call i32 @xfs_extent_busy_clear(ptr noundef nonnull %8, ptr noundef nonnull %0, i32 noundef %34) #2
%36 = load ptr, ptr %3, align 8, !tbaa !6
%37 = tail call i32 @spin_lock(ptr noundef %36) #2
%38 = getelementptr inbounds i8, ptr %0, i64 16
%39 = tail call i32 @list_del(ptr noundef nonnull %38) #2
%40 = load ptr, ptr %3, align 8, !tbaa !6
%41 = tail call i32 @spin_unlock(ptr noundef %40) #2
%42 = load i32, ptr %23, align 4, !tbaa !17
%43 = tail call i32 @xlog_cil_free_logvec(i32 noundef %42) #2
%44 = tail call i32 @list_empty(ptr noundef nonnull %0) #2
%45 = icmp eq i32 %44, 0
br i1 %45, label %46, label %48
46: ; preds = %20
%47 = tail call i32 @xlog_discard_busy_extents(ptr noundef nonnull %8, ptr noundef nonnull %0) #2
br label %50
48: ; preds = %20
%49 = tail call i32 @kmem_free(ptr noundef nonnull %0) #2
br label %50
50: ; preds = %48, %46
ret void
}
declare i32 @spin_lock(ptr noundef) local_unnamed_addr #1
declare i32 @wake_up_all(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock(ptr noundef) local_unnamed_addr #1
declare i32 @xfs_trans_committed_bulk(i32 noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @xfs_extent_busy_sort(ptr noundef) local_unnamed_addr #1
declare i32 @xfs_extent_busy_clear(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @list_del(ptr noundef) local_unnamed_addr #1
declare i32 @xlog_cil_free_logvec(i32 noundef) local_unnamed_addr #1
declare i32 @list_empty(ptr noundef) local_unnamed_addr #1
declare i32 @xlog_discard_busy_extents(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @kmem_free(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"xfs_cil_ctx", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16, !8, i64 20}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!13, !11, i64 8}
!13 = !{!"TYPE_4__", !8, i64 0, !11, i64 8, !8, i64 16}
!14 = !{!15, !11, i64 8}
!15 = !{!"TYPE_3__", !8, i64 0, !11, i64 8}
!16 = !{!15, !8, i64 0}
!17 = !{!7, !8, i64 4}
!18 = !{!7, !8, i64 20}
!19 = !{!20, !8, i64 0}
!20 = !{!"xfs_mount", !8, i64 0}
!21 = !{!8, !8, i64 0}
| linux_fs_xfs_extr_xfs_log_cil.c_xlog_cil_committed |
; ModuleID = 'AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/libretro/extr_libretro.c_retro_set_controller_port_device.c'
source_filename = "AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/libretro/extr_libretro.c_retro_set_controller_port_device.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local void @retro_set_controller_port_device(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/libretro/extr_libretro.c_retro_set_controller_port_device.c'
source_filename = "AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/libretro/extr_libretro.c_retro_set_controller_port_device.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @retro_set_controller_port_device(i32 noundef %0, i32 noundef %1) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| Provenance_Cores_Genesis-Plus-GX_PVGenesis_Genesis_GenesisCore_libretro_extr_libretro.c_retro_set_controller_port_device |
; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Logging.c_ReplaceForCsv.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Logging.c_ReplaceForCsv.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local void @ReplaceForCsv(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %249, label %3
3: ; preds = %1
%4 = tail call i32 @Trim(ptr noundef nonnull %0) #2
%5 = tail call i64 @StrLen(ptr noundef nonnull %0) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %249, label %7
7: ; preds = %3
%8 = icmp ult i64 %5, 8
br i1 %8, label %238, label %9
9: ; preds = %7
%10 = icmp ult i64 %5, 32
br i1 %10, label %187, label %11
11: ; preds = %9
%12 = and i64 %5, -32
br label %13
13: ; preds = %179, %11
%14 = phi i64 [ 0, %11 ], [ %180, %179 ]
%15 = or disjoint i64 %14, 16
%16 = getelementptr inbounds i8, ptr %0, i64 %14
%17 = getelementptr inbounds i8, ptr %16, i64 16
%18 = load <16 x i8>, ptr %16, align 1, !tbaa !5
%19 = load <16 x i8>, ptr %17, align 1, !tbaa !5
%20 = icmp eq <16 x i8> %18, <i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44>
%21 = icmp eq <16 x i8> %19, <i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44>
%22 = extractelement <16 x i1> %20, i64 0
br i1 %22, label %23, label %25
23: ; preds = %13
%24 = getelementptr inbounds i8, ptr %0, i64 %14
store i8 95, ptr %24, align 1, !tbaa !5
br label %25
25: ; preds = %23, %13
%26 = extractelement <16 x i1> %20, i64 1
br i1 %26, label %27, label %30
27: ; preds = %25
%28 = or disjoint i64 %14, 1
%29 = getelementptr inbounds i8, ptr %0, i64 %28
store i8 95, ptr %29, align 1, !tbaa !5
br label %30
30: ; preds = %27, %25
%31 = extractelement <16 x i1> %20, i64 2
br i1 %31, label %32, label %35
32: ; preds = %30
%33 = or disjoint i64 %14, 2
%34 = getelementptr inbounds i8, ptr %0, i64 %33
store i8 95, ptr %34, align 1, !tbaa !5
br label %35
35: ; preds = %32, %30
%36 = extractelement <16 x i1> %20, i64 3
br i1 %36, label %37, label %40
37: ; preds = %35
%38 = or disjoint i64 %14, 3
%39 = getelementptr inbounds i8, ptr %0, i64 %38
store i8 95, ptr %39, align 1, !tbaa !5
br label %40
40: ; preds = %37, %35
%41 = extractelement <16 x i1> %20, i64 4
br i1 %41, label %42, label %45
42: ; preds = %40
%43 = or disjoint i64 %14, 4
%44 = getelementptr inbounds i8, ptr %0, i64 %43
store i8 95, ptr %44, align 1, !tbaa !5
br label %45
45: ; preds = %42, %40
%46 = extractelement <16 x i1> %20, i64 5
br i1 %46, label %47, label %50
47: ; preds = %45
%48 = or disjoint i64 %14, 5
%49 = getelementptr inbounds i8, ptr %0, i64 %48
store i8 95, ptr %49, align 1, !tbaa !5
br label %50
50: ; preds = %47, %45
%51 = extractelement <16 x i1> %20, i64 6
br i1 %51, label %52, label %55
52: ; preds = %50
%53 = or disjoint i64 %14, 6
%54 = getelementptr inbounds i8, ptr %0, i64 %53
store i8 95, ptr %54, align 1, !tbaa !5
br label %55
55: ; preds = %52, %50
%56 = extractelement <16 x i1> %20, i64 7
br i1 %56, label %57, label %60
57: ; preds = %55
%58 = or disjoint i64 %14, 7
%59 = getelementptr inbounds i8, ptr %0, i64 %58
store i8 95, ptr %59, align 1, !tbaa !5
br label %60
60: ; preds = %57, %55
%61 = extractelement <16 x i1> %20, i64 8
br i1 %61, label %62, label %65
62: ; preds = %60
%63 = or disjoint i64 %14, 8
%64 = getelementptr inbounds i8, ptr %0, i64 %63
store i8 95, ptr %64, align 1, !tbaa !5
br label %65
65: ; preds = %62, %60
%66 = extractelement <16 x i1> %20, i64 9
br i1 %66, label %67, label %70
67: ; preds = %65
%68 = or disjoint i64 %14, 9
%69 = getelementptr inbounds i8, ptr %0, i64 %68
store i8 95, ptr %69, align 1, !tbaa !5
br label %70
70: ; preds = %67, %65
%71 = extractelement <16 x i1> %20, i64 10
br i1 %71, label %72, label %75
72: ; preds = %70
%73 = or disjoint i64 %14, 10
%74 = getelementptr inbounds i8, ptr %0, i64 %73
store i8 95, ptr %74, align 1, !tbaa !5
br label %75
75: ; preds = %72, %70
%76 = extractelement <16 x i1> %20, i64 11
br i1 %76, label %77, label %80
77: ; preds = %75
%78 = or disjoint i64 %14, 11
%79 = getelementptr inbounds i8, ptr %0, i64 %78
store i8 95, ptr %79, align 1, !tbaa !5
br label %80
80: ; preds = %77, %75
%81 = extractelement <16 x i1> %20, i64 12
br i1 %81, label %82, label %85
82: ; preds = %80
%83 = or disjoint i64 %14, 12
%84 = getelementptr inbounds i8, ptr %0, i64 %83
store i8 95, ptr %84, align 1, !tbaa !5
br label %85
85: ; preds = %82, %80
%86 = extractelement <16 x i1> %20, i64 13
br i1 %86, label %87, label %90
87: ; preds = %85
%88 = or disjoint i64 %14, 13
%89 = getelementptr inbounds i8, ptr %0, i64 %88
store i8 95, ptr %89, align 1, !tbaa !5
br label %90
90: ; preds = %87, %85
%91 = extractelement <16 x i1> %20, i64 14
br i1 %91, label %92, label %95
92: ; preds = %90
%93 = or disjoint i64 %14, 14
%94 = getelementptr inbounds i8, ptr %0, i64 %93
store i8 95, ptr %94, align 1, !tbaa !5
br label %95
95: ; preds = %92, %90
%96 = extractelement <16 x i1> %20, i64 15
br i1 %96, label %97, label %100
97: ; preds = %95
%98 = or disjoint i64 %14, 15
%99 = getelementptr inbounds i8, ptr %0, i64 %98
store i8 95, ptr %99, align 1, !tbaa !5
br label %100
100: ; preds = %97, %95
%101 = extractelement <16 x i1> %21, i64 0
br i1 %101, label %102, label %104
102: ; preds = %100
%103 = getelementptr inbounds i8, ptr %0, i64 %15
store i8 95, ptr %103, align 1, !tbaa !5
br label %104
104: ; preds = %102, %100
%105 = extractelement <16 x i1> %21, i64 1
br i1 %105, label %106, label %109
106: ; preds = %104
%107 = or disjoint i64 %14, 17
%108 = getelementptr inbounds i8, ptr %0, i64 %107
store i8 95, ptr %108, align 1, !tbaa !5
br label %109
109: ; preds = %106, %104
%110 = extractelement <16 x i1> %21, i64 2
br i1 %110, label %111, label %114
111: ; preds = %109
%112 = or disjoint i64 %14, 18
%113 = getelementptr inbounds i8, ptr %0, i64 %112
store i8 95, ptr %113, align 1, !tbaa !5
br label %114
114: ; preds = %111, %109
%115 = extractelement <16 x i1> %21, i64 3
br i1 %115, label %116, label %119
116: ; preds = %114
%117 = or disjoint i64 %14, 19
%118 = getelementptr inbounds i8, ptr %0, i64 %117
store i8 95, ptr %118, align 1, !tbaa !5
br label %119
119: ; preds = %116, %114
%120 = extractelement <16 x i1> %21, i64 4
br i1 %120, label %121, label %124
121: ; preds = %119
%122 = or disjoint i64 %14, 20
%123 = getelementptr inbounds i8, ptr %0, i64 %122
store i8 95, ptr %123, align 1, !tbaa !5
br label %124
124: ; preds = %121, %119
%125 = extractelement <16 x i1> %21, i64 5
br i1 %125, label %126, label %129
126: ; preds = %124
%127 = or disjoint i64 %14, 21
%128 = getelementptr inbounds i8, ptr %0, i64 %127
store i8 95, ptr %128, align 1, !tbaa !5
br label %129
129: ; preds = %126, %124
%130 = extractelement <16 x i1> %21, i64 6
br i1 %130, label %131, label %134
131: ; preds = %129
%132 = or disjoint i64 %14, 22
%133 = getelementptr inbounds i8, ptr %0, i64 %132
store i8 95, ptr %133, align 1, !tbaa !5
br label %134
134: ; preds = %131, %129
%135 = extractelement <16 x i1> %21, i64 7
br i1 %135, label %136, label %139
136: ; preds = %134
%137 = or disjoint i64 %14, 23
%138 = getelementptr inbounds i8, ptr %0, i64 %137
store i8 95, ptr %138, align 1, !tbaa !5
br label %139
139: ; preds = %136, %134
%140 = extractelement <16 x i1> %21, i64 8
br i1 %140, label %141, label %144
141: ; preds = %139
%142 = or disjoint i64 %14, 24
%143 = getelementptr inbounds i8, ptr %0, i64 %142
store i8 95, ptr %143, align 1, !tbaa !5
br label %144
144: ; preds = %141, %139
%145 = extractelement <16 x i1> %21, i64 9
br i1 %145, label %146, label %149
146: ; preds = %144
%147 = or disjoint i64 %14, 25
%148 = getelementptr inbounds i8, ptr %0, i64 %147
store i8 95, ptr %148, align 1, !tbaa !5
br label %149
149: ; preds = %146, %144
%150 = extractelement <16 x i1> %21, i64 10
br i1 %150, label %151, label %154
151: ; preds = %149
%152 = or disjoint i64 %14, 26
%153 = getelementptr inbounds i8, ptr %0, i64 %152
store i8 95, ptr %153, align 1, !tbaa !5
br label %154
154: ; preds = %151, %149
%155 = extractelement <16 x i1> %21, i64 11
br i1 %155, label %156, label %159
156: ; preds = %154
%157 = or disjoint i64 %14, 27
%158 = getelementptr inbounds i8, ptr %0, i64 %157
store i8 95, ptr %158, align 1, !tbaa !5
br label %159
159: ; preds = %156, %154
%160 = extractelement <16 x i1> %21, i64 12
br i1 %160, label %161, label %164
161: ; preds = %159
%162 = or disjoint i64 %14, 28
%163 = getelementptr inbounds i8, ptr %0, i64 %162
store i8 95, ptr %163, align 1, !tbaa !5
br label %164
164: ; preds = %161, %159
%165 = extractelement <16 x i1> %21, i64 13
br i1 %165, label %166, label %169
166: ; preds = %164
%167 = or disjoint i64 %14, 29
%168 = getelementptr inbounds i8, ptr %0, i64 %167
store i8 95, ptr %168, align 1, !tbaa !5
br label %169
169: ; preds = %166, %164
%170 = extractelement <16 x i1> %21, i64 14
br i1 %170, label %171, label %174
171: ; preds = %169
%172 = or disjoint i64 %14, 30
%173 = getelementptr inbounds i8, ptr %0, i64 %172
store i8 95, ptr %173, align 1, !tbaa !5
br label %174
174: ; preds = %171, %169
%175 = extractelement <16 x i1> %21, i64 15
br i1 %175, label %176, label %179
176: ; preds = %174
%177 = or disjoint i64 %14, 31
%178 = getelementptr inbounds i8, ptr %0, i64 %177
store i8 95, ptr %178, align 1, !tbaa !5
br label %179
179: ; preds = %176, %174
%180 = add nuw i64 %14, 32
%181 = icmp eq i64 %180, %12
br i1 %181, label %182, label %13, !llvm.loop !8
182: ; preds = %179
%183 = icmp eq i64 %5, %12
br i1 %183, label %249, label %184
184: ; preds = %182
%185 = and i64 %5, 24
%186 = icmp eq i64 %185, 0
br i1 %186, label %238, label %187
187: ; preds = %9, %184
%188 = phi i64 [ %12, %184 ], [ 0, %9 ]
%189 = and i64 %5, -8
br label %190
190: ; preds = %233, %187
%191 = phi i64 [ %188, %187 ], [ %234, %233 ]
%192 = getelementptr inbounds i8, ptr %0, i64 %191
%193 = load <8 x i8>, ptr %192, align 1, !tbaa !5
%194 = icmp eq <8 x i8> %193, <i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44>
%195 = extractelement <8 x i1> %194, i64 0
br i1 %195, label %196, label %198
196: ; preds = %190
%197 = getelementptr inbounds i8, ptr %0, i64 %191
store i8 95, ptr %197, align 1, !tbaa !5
br label %198
198: ; preds = %196, %190
%199 = extractelement <8 x i1> %194, i64 1
br i1 %199, label %200, label %203
200: ; preds = %198
%201 = or disjoint i64 %191, 1
%202 = getelementptr inbounds i8, ptr %0, i64 %201
store i8 95, ptr %202, align 1, !tbaa !5
br label %203
203: ; preds = %200, %198
%204 = extractelement <8 x i1> %194, i64 2
br i1 %204, label %205, label %208
205: ; preds = %203
%206 = or disjoint i64 %191, 2
%207 = getelementptr inbounds i8, ptr %0, i64 %206
store i8 95, ptr %207, align 1, !tbaa !5
br label %208
208: ; preds = %205, %203
%209 = extractelement <8 x i1> %194, i64 3
br i1 %209, label %210, label %213
210: ; preds = %208
%211 = or disjoint i64 %191, 3
%212 = getelementptr inbounds i8, ptr %0, i64 %211
store i8 95, ptr %212, align 1, !tbaa !5
br label %213
213: ; preds = %210, %208
%214 = extractelement <8 x i1> %194, i64 4
br i1 %214, label %215, label %218
215: ; preds = %213
%216 = or disjoint i64 %191, 4
%217 = getelementptr inbounds i8, ptr %0, i64 %216
store i8 95, ptr %217, align 1, !tbaa !5
br label %218
218: ; preds = %215, %213
%219 = extractelement <8 x i1> %194, i64 5
br i1 %219, label %220, label %223
220: ; preds = %218
%221 = or disjoint i64 %191, 5
%222 = getelementptr inbounds i8, ptr %0, i64 %221
store i8 95, ptr %222, align 1, !tbaa !5
br label %223
223: ; preds = %220, %218
%224 = extractelement <8 x i1> %194, i64 6
br i1 %224, label %225, label %228
225: ; preds = %223
%226 = or disjoint i64 %191, 6
%227 = getelementptr inbounds i8, ptr %0, i64 %226
store i8 95, ptr %227, align 1, !tbaa !5
br label %228
228: ; preds = %225, %223
%229 = extractelement <8 x i1> %194, i64 7
br i1 %229, label %230, label %233
230: ; preds = %228
%231 = or disjoint i64 %191, 7
%232 = getelementptr inbounds i8, ptr %0, i64 %231
store i8 95, ptr %232, align 1, !tbaa !5
br label %233
233: ; preds = %230, %228
%234 = add nuw i64 %191, 8
%235 = icmp eq i64 %234, %189
br i1 %235, label %236, label %190, !llvm.loop !12
236: ; preds = %233
%237 = icmp eq i64 %5, %189
br i1 %237, label %249, label %238
238: ; preds = %7, %184, %236
%239 = phi i64 [ 0, %7 ], [ %12, %184 ], [ %189, %236 ]
br label %240
240: ; preds = %238, %246
%241 = phi i64 [ %247, %246 ], [ %239, %238 ]
%242 = getelementptr inbounds i8, ptr %0, i64 %241
%243 = load i8, ptr %242, align 1, !tbaa !5
%244 = icmp eq i8 %243, 44
br i1 %244, label %245, label %246
245: ; preds = %240
store i8 95, ptr %242, align 1, !tbaa !5
br label %246
246: ; preds = %240, %245
%247 = add nuw i64 %241, 1
%248 = icmp eq i64 %247, %5
br i1 %248, label %249, label %240, !llvm.loop !13
249: ; preds = %246, %182, %236, %3, %1
ret void
}
declare i32 @Trim(ptr noundef) local_unnamed_addr #1
declare i64 @StrLen(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C/C++ TBAA"}
!8 = distinct !{!8, !9, !10, !11}
!9 = !{!"llvm.loop.mustprogress"}
!10 = !{!"llvm.loop.isvectorized", i32 1}
!11 = !{!"llvm.loop.unroll.runtime.disable"}
!12 = distinct !{!12, !9, !10, !11}
!13 = distinct !{!13, !9, !11, !10}
| ; ModuleID = 'AnghaBench/SoftEtherVPN/src/Cedar/extr_Logging.c_ReplaceForCsv.c'
source_filename = "AnghaBench/SoftEtherVPN/src/Cedar/extr_Logging.c_ReplaceForCsv.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define void @ReplaceForCsv(ptr noundef %0) local_unnamed_addr #0 {
%2 = icmp eq ptr %0, null
br i1 %2, label %166, label %3
3: ; preds = %1
%4 = tail call i32 @Trim(ptr noundef nonnull %0) #2
%5 = tail call i64 @StrLen(ptr noundef nonnull %0) #2
%6 = icmp eq i64 %5, 0
br i1 %6, label %166, label %7
7: ; preds = %3
%8 = icmp ult i64 %5, 8
br i1 %8, label %155, label %9
9: ; preds = %7
%10 = icmp ult i64 %5, 16
br i1 %10, label %104, label %11
11: ; preds = %9
%12 = and i64 %5, -16
br label %13
13: ; preds = %96, %11
%14 = phi i64 [ 0, %11 ], [ %97, %96 ]
%15 = getelementptr inbounds i8, ptr %0, i64 %14
%16 = load <16 x i8>, ptr %15, align 1, !tbaa !6
%17 = icmp eq <16 x i8> %16, <i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44>
%18 = extractelement <16 x i1> %17, i64 0
br i1 %18, label %19, label %21
19: ; preds = %13
%20 = getelementptr inbounds i8, ptr %0, i64 %14
store i8 95, ptr %20, align 1, !tbaa !6
br label %21
21: ; preds = %19, %13
%22 = extractelement <16 x i1> %17, i64 1
br i1 %22, label %23, label %26
23: ; preds = %21
%24 = or disjoint i64 %14, 1
%25 = getelementptr inbounds i8, ptr %0, i64 %24
store i8 95, ptr %25, align 1, !tbaa !6
br label %26
26: ; preds = %23, %21
%27 = extractelement <16 x i1> %17, i64 2
br i1 %27, label %28, label %31
28: ; preds = %26
%29 = or disjoint i64 %14, 2
%30 = getelementptr inbounds i8, ptr %0, i64 %29
store i8 95, ptr %30, align 1, !tbaa !6
br label %31
31: ; preds = %28, %26
%32 = extractelement <16 x i1> %17, i64 3
br i1 %32, label %33, label %36
33: ; preds = %31
%34 = or disjoint i64 %14, 3
%35 = getelementptr inbounds i8, ptr %0, i64 %34
store i8 95, ptr %35, align 1, !tbaa !6
br label %36
36: ; preds = %33, %31
%37 = extractelement <16 x i1> %17, i64 4
br i1 %37, label %38, label %41
38: ; preds = %36
%39 = or disjoint i64 %14, 4
%40 = getelementptr inbounds i8, ptr %0, i64 %39
store i8 95, ptr %40, align 1, !tbaa !6
br label %41
41: ; preds = %38, %36
%42 = extractelement <16 x i1> %17, i64 5
br i1 %42, label %43, label %46
43: ; preds = %41
%44 = or disjoint i64 %14, 5
%45 = getelementptr inbounds i8, ptr %0, i64 %44
store i8 95, ptr %45, align 1, !tbaa !6
br label %46
46: ; preds = %43, %41
%47 = extractelement <16 x i1> %17, i64 6
br i1 %47, label %48, label %51
48: ; preds = %46
%49 = or disjoint i64 %14, 6
%50 = getelementptr inbounds i8, ptr %0, i64 %49
store i8 95, ptr %50, align 1, !tbaa !6
br label %51
51: ; preds = %48, %46
%52 = extractelement <16 x i1> %17, i64 7
br i1 %52, label %53, label %56
53: ; preds = %51
%54 = or disjoint i64 %14, 7
%55 = getelementptr inbounds i8, ptr %0, i64 %54
store i8 95, ptr %55, align 1, !tbaa !6
br label %56
56: ; preds = %53, %51
%57 = extractelement <16 x i1> %17, i64 8
br i1 %57, label %58, label %61
58: ; preds = %56
%59 = or disjoint i64 %14, 8
%60 = getelementptr inbounds i8, ptr %0, i64 %59
store i8 95, ptr %60, align 1, !tbaa !6
br label %61
61: ; preds = %58, %56
%62 = extractelement <16 x i1> %17, i64 9
br i1 %62, label %63, label %66
63: ; preds = %61
%64 = or disjoint i64 %14, 9
%65 = getelementptr inbounds i8, ptr %0, i64 %64
store i8 95, ptr %65, align 1, !tbaa !6
br label %66
66: ; preds = %63, %61
%67 = extractelement <16 x i1> %17, i64 10
br i1 %67, label %68, label %71
68: ; preds = %66
%69 = or disjoint i64 %14, 10
%70 = getelementptr inbounds i8, ptr %0, i64 %69
store i8 95, ptr %70, align 1, !tbaa !6
br label %71
71: ; preds = %68, %66
%72 = extractelement <16 x i1> %17, i64 11
br i1 %72, label %73, label %76
73: ; preds = %71
%74 = or disjoint i64 %14, 11
%75 = getelementptr inbounds i8, ptr %0, i64 %74
store i8 95, ptr %75, align 1, !tbaa !6
br label %76
76: ; preds = %73, %71
%77 = extractelement <16 x i1> %17, i64 12
br i1 %77, label %78, label %81
78: ; preds = %76
%79 = or disjoint i64 %14, 12
%80 = getelementptr inbounds i8, ptr %0, i64 %79
store i8 95, ptr %80, align 1, !tbaa !6
br label %81
81: ; preds = %78, %76
%82 = extractelement <16 x i1> %17, i64 13
br i1 %82, label %83, label %86
83: ; preds = %81
%84 = or disjoint i64 %14, 13
%85 = getelementptr inbounds i8, ptr %0, i64 %84
store i8 95, ptr %85, align 1, !tbaa !6
br label %86
86: ; preds = %83, %81
%87 = extractelement <16 x i1> %17, i64 14
br i1 %87, label %88, label %91
88: ; preds = %86
%89 = or disjoint i64 %14, 14
%90 = getelementptr inbounds i8, ptr %0, i64 %89
store i8 95, ptr %90, align 1, !tbaa !6
br label %91
91: ; preds = %88, %86
%92 = extractelement <16 x i1> %17, i64 15
br i1 %92, label %93, label %96
93: ; preds = %91
%94 = or disjoint i64 %14, 15
%95 = getelementptr inbounds i8, ptr %0, i64 %94
store i8 95, ptr %95, align 1, !tbaa !6
br label %96
96: ; preds = %93, %91
%97 = add nuw i64 %14, 16
%98 = icmp eq i64 %97, %12
br i1 %98, label %99, label %13, !llvm.loop !9
99: ; preds = %96
%100 = icmp eq i64 %5, %12
br i1 %100, label %166, label %101
101: ; preds = %99
%102 = and i64 %5, 8
%103 = icmp eq i64 %102, 0
br i1 %103, label %155, label %104
104: ; preds = %9, %101
%105 = phi i64 [ %12, %101 ], [ 0, %9 ]
%106 = and i64 %5, -8
br label %107
107: ; preds = %150, %104
%108 = phi i64 [ %105, %104 ], [ %151, %150 ]
%109 = getelementptr inbounds i8, ptr %0, i64 %108
%110 = load <8 x i8>, ptr %109, align 1, !tbaa !6
%111 = icmp eq <8 x i8> %110, <i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44, i8 44>
%112 = extractelement <8 x i1> %111, i64 0
br i1 %112, label %113, label %115
113: ; preds = %107
%114 = getelementptr inbounds i8, ptr %0, i64 %108
store i8 95, ptr %114, align 1, !tbaa !6
br label %115
115: ; preds = %113, %107
%116 = extractelement <8 x i1> %111, i64 1
br i1 %116, label %117, label %120
117: ; preds = %115
%118 = or disjoint i64 %108, 1
%119 = getelementptr inbounds i8, ptr %0, i64 %118
store i8 95, ptr %119, align 1, !tbaa !6
br label %120
120: ; preds = %117, %115
%121 = extractelement <8 x i1> %111, i64 2
br i1 %121, label %122, label %125
122: ; preds = %120
%123 = or disjoint i64 %108, 2
%124 = getelementptr inbounds i8, ptr %0, i64 %123
store i8 95, ptr %124, align 1, !tbaa !6
br label %125
125: ; preds = %122, %120
%126 = extractelement <8 x i1> %111, i64 3
br i1 %126, label %127, label %130
127: ; preds = %125
%128 = or disjoint i64 %108, 3
%129 = getelementptr inbounds i8, ptr %0, i64 %128
store i8 95, ptr %129, align 1, !tbaa !6
br label %130
130: ; preds = %127, %125
%131 = extractelement <8 x i1> %111, i64 4
br i1 %131, label %132, label %135
132: ; preds = %130
%133 = or disjoint i64 %108, 4
%134 = getelementptr inbounds i8, ptr %0, i64 %133
store i8 95, ptr %134, align 1, !tbaa !6
br label %135
135: ; preds = %132, %130
%136 = extractelement <8 x i1> %111, i64 5
br i1 %136, label %137, label %140
137: ; preds = %135
%138 = or disjoint i64 %108, 5
%139 = getelementptr inbounds i8, ptr %0, i64 %138
store i8 95, ptr %139, align 1, !tbaa !6
br label %140
140: ; preds = %137, %135
%141 = extractelement <8 x i1> %111, i64 6
br i1 %141, label %142, label %145
142: ; preds = %140
%143 = or disjoint i64 %108, 6
%144 = getelementptr inbounds i8, ptr %0, i64 %143
store i8 95, ptr %144, align 1, !tbaa !6
br label %145
145: ; preds = %142, %140
%146 = extractelement <8 x i1> %111, i64 7
br i1 %146, label %147, label %150
147: ; preds = %145
%148 = or disjoint i64 %108, 7
%149 = getelementptr inbounds i8, ptr %0, i64 %148
store i8 95, ptr %149, align 1, !tbaa !6
br label %150
150: ; preds = %147, %145
%151 = add nuw i64 %108, 8
%152 = icmp eq i64 %151, %106
br i1 %152, label %153, label %107, !llvm.loop !13
153: ; preds = %150
%154 = icmp eq i64 %5, %106
br i1 %154, label %166, label %155
155: ; preds = %153, %7, %101
%156 = phi i64 [ 0, %7 ], [ %12, %101 ], [ %106, %153 ]
br label %157
157: ; preds = %155, %163
%158 = phi i64 [ %164, %163 ], [ %156, %155 ]
%159 = getelementptr inbounds i8, ptr %0, i64 %158
%160 = load i8, ptr %159, align 1, !tbaa !6
%161 = icmp eq i8 %160, 44
br i1 %161, label %162, label %163
162: ; preds = %157
store i8 95, ptr %159, align 1, !tbaa !6
br label %163
163: ; preds = %157, %162
%164 = add nuw i64 %158, 1
%165 = icmp eq i64 %164, %5
br i1 %165, label %166, label %157, !llvm.loop !14
166: ; preds = %163, %99, %153, %3, %1
ret void
}
declare i32 @Trim(ptr noundef) local_unnamed_addr #1
declare i64 @StrLen(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10, !11, !12}
!10 = !{!"llvm.loop.mustprogress"}
!11 = !{!"llvm.loop.isvectorized", i32 1}
!12 = !{!"llvm.loop.unroll.runtime.disable"}
!13 = distinct !{!13, !10, !11, !12}
!14 = distinct !{!14, !10, !12, !11}
| SoftEtherVPN_src_Cedar_extr_Logging.c_ReplaceForCsv |
; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/ole32/extr_storage32.c_can_open.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/ole32/extr_storage32.c_can_open.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@OPEN_EXISTING = dso_local local_unnamed_addr global i32 0, align 4
@FILE_ATTRIBUTE_NORMAL = dso_local local_unnamed_addr global i32 0, align 4
@INVALID_HANDLE_VALUE = dso_local local_unnamed_addr global i64 0, align 8
@FALSE = dso_local local_unnamed_addr global i32 0, align 4
@TRUE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @can_open], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @can_open(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr @OPEN_EXISTING, align 4, !tbaa !5
%5 = load i32, ptr @FILE_ATTRIBUTE_NORMAL, align 4, !tbaa !5
%6 = tail call i64 @CreateFileW(i32 noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef null, i32 noundef %4, i32 noundef %5, ptr noundef null) #2
%7 = load i64, ptr @INVALID_HANDLE_VALUE, align 8, !tbaa !9
%8 = icmp eq i64 %6, %7
br i1 %8, label %11, label %9
9: ; preds = %3
%10 = tail call i32 @CloseHandle(i64 noundef %6) #2
br label %11
11: ; preds = %3, %9
%12 = phi ptr [ @TRUE, %9 ], [ @FALSE, %3 ]
%13 = load i32, ptr %12, align 4, !tbaa !5
ret i32 %13
}
declare i64 @CreateFileW(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @CloseHandle(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/reactos/modules/rostests/winetests/ole32/extr_storage32.c_can_open.c'
source_filename = "AnghaBench/reactos/modules/rostests/winetests/ole32/extr_storage32.c_can_open.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@OPEN_EXISTING = common local_unnamed_addr global i32 0, align 4
@FILE_ATTRIBUTE_NORMAL = common local_unnamed_addr global i32 0, align 4
@INVALID_HANDLE_VALUE = common local_unnamed_addr global i64 0, align 8
@FALSE = common local_unnamed_addr global i32 0, align 4
@TRUE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @can_open], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @can_open(i32 noundef %0, i32 noundef %1, i32 noundef %2) #0 {
%4 = load i32, ptr @OPEN_EXISTING, align 4, !tbaa !6
%5 = load i32, ptr @FILE_ATTRIBUTE_NORMAL, align 4, !tbaa !6
%6 = tail call i64 @CreateFileW(i32 noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef null, i32 noundef %4, i32 noundef %5, ptr noundef null) #2
%7 = load i64, ptr @INVALID_HANDLE_VALUE, align 8, !tbaa !10
%8 = icmp eq i64 %6, %7
br i1 %8, label %11, label %9
9: ; preds = %3
%10 = tail call i32 @CloseHandle(i64 noundef %6) #2
br label %11
11: ; preds = %3, %9
%12 = phi ptr [ @TRUE, %9 ], [ @FALSE, %3 ]
%13 = load i32, ptr %12, align 4, !tbaa !6
ret i32 %13
}
declare i64 @CreateFileW(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @CloseHandle(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
| reactos_modules_rostests_winetests_ole32_extr_storage32.c_can_open |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/mediatek/extr_mtk_drm_drv.c_compare_of.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/mediatek/extr_mtk_drm_drv.c_compare_of.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @compare_of], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define internal i32 @compare_of(ptr nocapture noundef readonly %0, ptr noundef readnone %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !5
%4 = icmp eq ptr %3, %1
%5 = zext i1 %4 to i32
ret i32 %5
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"device", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/mediatek/extr_mtk_drm_drv.c_compare_of.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/mediatek/extr_mtk_drm_drv.c_compare_of.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @compare_of], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync)
define internal range(i32 0, 2) i32 @compare_of(ptr nocapture noundef readonly %0, ptr noundef readnone %1) #0 {
%3 = load ptr, ptr %0, align 8, !tbaa !6
%4 = icmp eq ptr %3, %1
%5 = zext i1 %4 to i32
ret i32 %5
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(argmem: read) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"device", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| linux_drivers_gpu_drm_mediatek_extr_mtk_drm_drv.c_compare_of |
; ModuleID = 'AnghaBench/freebsd/contrib/atf/atf-c/detail/extr_list.c_atf_list_begin_c.c'
source_filename = "AnghaBench/freebsd/contrib/atf/atf-c/detail/extr_list.c_atf_list_begin_c.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @atf_list_begin_c(ptr noundef %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = load i32, ptr %2, align 4, !tbaa !10
%4 = tail call i32 @entry_to_citer(ptr noundef nonnull %0, i32 noundef %3) #2
ret i32 %4
}
declare i32 @entry_to_citer(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_4__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"list_entry", !12, i64 0}
!12 = !{!"int", !8, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/atf/atf-c/detail/extr_list.c_atf_list_begin_c.c'
source_filename = "AnghaBench/freebsd/contrib/atf/atf-c/detail/extr_list.c_atf_list_begin_c.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @atf_list_begin_c(ptr noundef %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = load i32, ptr %2, align 4, !tbaa !11
%4 = tail call i32 @entry_to_citer(ptr noundef nonnull %0, i32 noundef %3) #2
ret i32 %4
}
declare i32 @entry_to_citer(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_4__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"list_entry", !13, i64 0}
!13 = !{!"int", !9, i64 0}
| freebsd_contrib_atf_atf-c_detail_extr_list.c_atf_list_begin_c |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/macintosh/extr_mediabay.c_keylargo_mb_setup_bus.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/macintosh/extr_mediabay.c_keylargo_mb_setup_bus.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@KEYLARGO_MBCR = dso_local local_unnamed_addr global i32 0, align 4
@KL_MBCR_MB0_IDE_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@KEYLARGO_FCR1 = dso_local local_unnamed_addr global i32 0, align 4
@KL1_EIDE0_RESET_N = dso_local local_unnamed_addr global i32 0, align 4
@KL1_EIDE0_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@KL_MBCR_MB0_PCI_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@KL_MBCR_MB0_SOUND_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@ENODEV = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @keylargo_mb_setup_bus], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @keylargo_mb_setup_bus(ptr noundef %0, i32 noundef %1) #0 {
switch i32 %1, label %21 [
i32 130, label %3
i32 129, label %13
i32 128, label %17
]
3: ; preds = %2
%4 = load i32, ptr @KEYLARGO_MBCR, align 4, !tbaa !5
%5 = load i32, ptr @KL_MBCR_MB0_IDE_ENABLE, align 4, !tbaa !5
%6 = tail call i32 @MB_BIS(ptr noundef %0, i32 noundef %4, i32 noundef %5) #2
%7 = load i32, ptr @KEYLARGO_FCR1, align 4, !tbaa !5
%8 = load i32, ptr @KL1_EIDE0_RESET_N, align 4, !tbaa !5
%9 = tail call i32 @MB_BIC(ptr noundef %0, i32 noundef %7, i32 noundef %8) #2
%10 = load i32, ptr @KEYLARGO_FCR1, align 4, !tbaa !5
%11 = load i32, ptr @KL1_EIDE0_ENABLE, align 4, !tbaa !5
%12 = tail call i32 @MB_BIS(ptr noundef %0, i32 noundef %10, i32 noundef %11) #2
br label %24
13: ; preds = %2
%14 = load i32, ptr @KEYLARGO_MBCR, align 4, !tbaa !5
%15 = load i32, ptr @KL_MBCR_MB0_PCI_ENABLE, align 4, !tbaa !5
%16 = tail call i32 @MB_BIS(ptr noundef %0, i32 noundef %14, i32 noundef %15) #2
br label %24
17: ; preds = %2
%18 = load i32, ptr @KEYLARGO_MBCR, align 4, !tbaa !5
%19 = load i32, ptr @KL_MBCR_MB0_SOUND_ENABLE, align 4, !tbaa !5
%20 = tail call i32 @MB_BIS(ptr noundef %0, i32 noundef %18, i32 noundef %19) #2
br label %24
21: ; preds = %2
%22 = load i32, ptr @ENODEV, align 4, !tbaa !5
%23 = sub nsw i32 0, %22
br label %24
24: ; preds = %21, %17, %13, %3
%25 = phi i32 [ %23, %21 ], [ 0, %17 ], [ 0, %13 ], [ 0, %3 ]
ret i32 %25
}
declare i32 @MB_BIS(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @MB_BIC(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/macintosh/extr_mediabay.c_keylargo_mb_setup_bus.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/macintosh/extr_mediabay.c_keylargo_mb_setup_bus.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@KEYLARGO_MBCR = common local_unnamed_addr global i32 0, align 4
@KL_MBCR_MB0_IDE_ENABLE = common local_unnamed_addr global i32 0, align 4
@KEYLARGO_FCR1 = common local_unnamed_addr global i32 0, align 4
@KL1_EIDE0_RESET_N = common local_unnamed_addr global i32 0, align 4
@KL1_EIDE0_ENABLE = common local_unnamed_addr global i32 0, align 4
@KL_MBCR_MB0_PCI_ENABLE = common local_unnamed_addr global i32 0, align 4
@KL_MBCR_MB0_SOUND_ENABLE = common local_unnamed_addr global i32 0, align 4
@ENODEV = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @keylargo_mb_setup_bus], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @keylargo_mb_setup_bus(ptr noundef %0, i32 noundef %1) #0 {
switch i32 %1, label %21 [
i32 130, label %3
i32 129, label %13
i32 128, label %17
]
3: ; preds = %2
%4 = load i32, ptr @KEYLARGO_MBCR, align 4, !tbaa !6
%5 = load i32, ptr @KL_MBCR_MB0_IDE_ENABLE, align 4, !tbaa !6
%6 = tail call i32 @MB_BIS(ptr noundef %0, i32 noundef %4, i32 noundef %5) #2
%7 = load i32, ptr @KEYLARGO_FCR1, align 4, !tbaa !6
%8 = load i32, ptr @KL1_EIDE0_RESET_N, align 4, !tbaa !6
%9 = tail call i32 @MB_BIC(ptr noundef %0, i32 noundef %7, i32 noundef %8) #2
%10 = load i32, ptr @KEYLARGO_FCR1, align 4, !tbaa !6
%11 = load i32, ptr @KL1_EIDE0_ENABLE, align 4, !tbaa !6
%12 = tail call i32 @MB_BIS(ptr noundef %0, i32 noundef %10, i32 noundef %11) #2
br label %24
13: ; preds = %2
%14 = load i32, ptr @KEYLARGO_MBCR, align 4, !tbaa !6
%15 = load i32, ptr @KL_MBCR_MB0_PCI_ENABLE, align 4, !tbaa !6
%16 = tail call i32 @MB_BIS(ptr noundef %0, i32 noundef %14, i32 noundef %15) #2
br label %24
17: ; preds = %2
%18 = load i32, ptr @KEYLARGO_MBCR, align 4, !tbaa !6
%19 = load i32, ptr @KL_MBCR_MB0_SOUND_ENABLE, align 4, !tbaa !6
%20 = tail call i32 @MB_BIS(ptr noundef %0, i32 noundef %18, i32 noundef %19) #2
br label %24
21: ; preds = %2
%22 = load i32, ptr @ENODEV, align 4, !tbaa !6
%23 = sub nsw i32 0, %22
br label %24
24: ; preds = %21, %17, %13, %3
%25 = phi i32 [ %23, %21 ], [ 0, %17 ], [ 0, %13 ], [ 0, %3 ]
ret i32 %25
}
declare i32 @MB_BIS(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @MB_BIC(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_drivers_macintosh_extr_mediabay.c_keylargo_mb_setup_bus |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/zd1211rw/extr_zd_chip.c_zd_rx_rate.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/zd1211rw/extr_zd_chip.c_zd_rx_rate.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@ZD_RX_OFDM = dso_local local_unnamed_addr global i32 0, align 4
@ZD_CCK_RATE_1M = dso_local local_unnamed_addr global i32 0, align 4
@ZD_CCK_RATE_2M = dso_local local_unnamed_addr global i32 0, align 4
@ZD_CCK_RATE_5_5M = dso_local local_unnamed_addr global i32 0, align 4
@ZD_CCK_RATE_11M = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @zd_rx_rate(ptr noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = load i32, ptr %1, align 4, !tbaa !5
%4 = load i32, ptr @ZD_RX_OFDM, align 4, !tbaa !10
%5 = and i32 %4, %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = tail call i32 @zd_rate_from_ofdm_plcp_header(ptr noundef %0) #2
br label %19
9: ; preds = %2
%10 = tail call i32 @zd_cck_plcp_header_signal(ptr noundef %0) #2
switch i32 %10, label %19 [
i32 130, label %11
i32 129, label %13
i32 128, label %15
i32 131, label %17
]
11: ; preds = %9
%12 = load i32, ptr @ZD_CCK_RATE_1M, align 4, !tbaa !10
br label %19
13: ; preds = %9
%14 = load i32, ptr @ZD_CCK_RATE_2M, align 4, !tbaa !10
br label %19
15: ; preds = %9
%16 = load i32, ptr @ZD_CCK_RATE_5_5M, align 4, !tbaa !10
br label %19
17: ; preds = %9
%18 = load i32, ptr @ZD_CCK_RATE_11M, align 4, !tbaa !10
br label %19
19: ; preds = %9, %11, %13, %15, %17, %7
%20 = phi i32 [ %8, %7 ], [ %18, %17 ], [ %16, %15 ], [ %14, %13 ], [ %12, %11 ], [ 0, %9 ]
ret i32 %20
}
declare i32 @zd_rate_from_ofdm_plcp_header(ptr noundef) local_unnamed_addr #1
declare i32 @zd_cck_plcp_header_signal(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"rx_status", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/wireless/zd1211rw/extr_zd_chip.c_zd_rx_rate.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/wireless/zd1211rw/extr_zd_chip.c_zd_rx_rate.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@ZD_RX_OFDM = common local_unnamed_addr global i32 0, align 4
@ZD_CCK_RATE_1M = common local_unnamed_addr global i32 0, align 4
@ZD_CCK_RATE_2M = common local_unnamed_addr global i32 0, align 4
@ZD_CCK_RATE_5_5M = common local_unnamed_addr global i32 0, align 4
@ZD_CCK_RATE_11M = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @zd_rx_rate(ptr noundef %0, ptr nocapture noundef readonly %1) local_unnamed_addr #0 {
%3 = load i32, ptr %1, align 4, !tbaa !6
%4 = load i32, ptr @ZD_RX_OFDM, align 4, !tbaa !11
%5 = and i32 %4, %3
%6 = icmp eq i32 %5, 0
br i1 %6, label %9, label %7
7: ; preds = %2
%8 = tail call i32 @zd_rate_from_ofdm_plcp_header(ptr noundef %0) #2
br label %19
9: ; preds = %2
%10 = tail call i32 @zd_cck_plcp_header_signal(ptr noundef %0) #2
switch i32 %10, label %19 [
i32 130, label %11
i32 129, label %13
i32 128, label %15
i32 131, label %17
]
11: ; preds = %9
%12 = load i32, ptr @ZD_CCK_RATE_1M, align 4, !tbaa !11
br label %19
13: ; preds = %9
%14 = load i32, ptr @ZD_CCK_RATE_2M, align 4, !tbaa !11
br label %19
15: ; preds = %9
%16 = load i32, ptr @ZD_CCK_RATE_5_5M, align 4, !tbaa !11
br label %19
17: ; preds = %9
%18 = load i32, ptr @ZD_CCK_RATE_11M, align 4, !tbaa !11
br label %19
19: ; preds = %9, %11, %13, %15, %17, %7
%20 = phi i32 [ %8, %7 ], [ %18, %17 ], [ %16, %15 ], [ %14, %13 ], [ %12, %11 ], [ 0, %9 ]
ret i32 %20
}
declare i32 @zd_rate_from_ofdm_plcp_header(ptr noundef) local_unnamed_addr #1
declare i32 @zd_cck_plcp_header_signal(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"rx_status", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
| fastsocket_kernel_drivers_net_wireless_zd1211rw_extr_zd_chip.c_zd_rx_rate |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sun/extr_niu.c_niu_classifier_swstate_init.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/sun/extr_niu.c_niu_classifier_swstate_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.niu = type { ptr, i64, %struct.niu_classifier }
%struct.niu_classifier = type { i32, i32, i32, i64 }
%struct.TYPE_2__ = type { i32, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @niu_classifier_swstate_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @niu_classifier_swstate_init(ptr noundef %0) #0 {
%2 = getelementptr inbounds %struct.niu, ptr %0, i64 0, i32 2
%3 = getelementptr inbounds %struct.niu, ptr %0, i64 0, i32 1
%4 = load i64, ptr %3, align 8, !tbaa !5
%5 = getelementptr inbounds %struct.niu, ptr %0, i64 0, i32 2, i32 3
store i64 %4, ptr %5, align 8, !tbaa !13
%6 = load ptr, ptr %0, align 8, !tbaa !14
%7 = load i32, ptr %6, align 4, !tbaa !15
%8 = getelementptr inbounds %struct.TYPE_2__, ptr %6, i64 0, i32 1
%9 = load i32, ptr %8, align 4, !tbaa !17
%10 = sdiv i32 %7, %9
store i32 %10, ptr %2, align 8, !tbaa !18
%11 = getelementptr inbounds %struct.niu, ptr %0, i64 0, i32 2, i32 1
store i32 -1, ptr %11, align 4, !tbaa !19
%12 = getelementptr inbounds %struct.niu, ptr %0, i64 0, i32 2, i32 2
store i32 65535, ptr %12, align 8, !tbaa !20
%13 = tail call i32 @fflp_early_init(ptr noundef nonnull %0) #2
ret i32 %13
}
declare i32 @fflp_early_init(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 8}
!6 = !{!"niu", !7, i64 0, !10, i64 8, !11, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!"niu_classifier", !12, i64 0, !12, i64 4, !12, i64 8, !10, i64 16}
!12 = !{!"int", !8, i64 0}
!13 = !{!11, !10, i64 16}
!14 = !{!6, !7, i64 0}
!15 = !{!16, !12, i64 0}
!16 = !{!"TYPE_2__", !12, i64 0, !12, i64 4}
!17 = !{!16, !12, i64 4}
!18 = !{!11, !12, i64 0}
!19 = !{!11, !12, i64 4}
!20 = !{!11, !12, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sun/extr_niu.c_niu_classifier_swstate_init.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/sun/extr_niu.c_niu_classifier_swstate_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @niu_classifier_swstate_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @niu_classifier_swstate_init(ptr noundef %0) #0 {
%2 = getelementptr inbounds i8, ptr %0, i64 16
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load i64, ptr %3, align 8, !tbaa !6
%5 = getelementptr inbounds i8, ptr %0, i64 32
store i64 %4, ptr %5, align 8, !tbaa !14
%6 = load ptr, ptr %0, align 8, !tbaa !15
%7 = load i32, ptr %6, align 4, !tbaa !16
%8 = getelementptr inbounds i8, ptr %6, i64 4
%9 = load i32, ptr %8, align 4, !tbaa !18
%10 = sdiv i32 %7, %9
store i32 %10, ptr %2, align 8, !tbaa !19
%11 = getelementptr inbounds i8, ptr %0, i64 20
store <2 x i32> <i32 -1, i32 65535>, ptr %11, align 4, !tbaa !20
%12 = tail call i32 @fflp_early_init(ptr noundef nonnull %0) #2
ret i32 %12
}
declare i32 @fflp_early_init(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 8}
!7 = !{!"niu", !8, i64 0, !11, i64 8, !12, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!"niu_classifier", !13, i64 0, !13, i64 4, !13, i64 8, !11, i64 16}
!13 = !{!"int", !9, i64 0}
!14 = !{!12, !11, i64 16}
!15 = !{!7, !8, i64 0}
!16 = !{!17, !13, i64 0}
!17 = !{!"TYPE_2__", !13, i64 0, !13, i64 4}
!18 = !{!17, !13, i64 4}
!19 = !{!12, !13, i64 0}
!20 = !{!13, !13, i64 0}
| linux_drivers_net_ethernet_sun_extr_niu.c_niu_classifier_swstate_init |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/qlogic/qlcnic/extr_qlcnic_hw.c_qlcnic_fix_features.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/qlogic/qlcnic/extr_qlcnic_hw.c_qlcnic_fix_features.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@QLCNIC_ESWITCH_ENABLED = dso_local local_unnamed_addr global i32 0, align 4
@QLCNIC_APP_CHANGED_FLAGS = dso_local local_unnamed_addr global i32 0, align 4
@NETIF_F_RXCSUM = dso_local local_unnamed_addr global i32 0, align 4
@NETIF_F_IP_CSUM = dso_local local_unnamed_addr global i32 0, align 4
@NETIF_F_IPV6_CSUM = dso_local local_unnamed_addr global i32 0, align 4
@NETIF_F_TSO = dso_local local_unnamed_addr global i32 0, align 4
@NETIF_F_TSO6 = dso_local local_unnamed_addr global i32 0, align 4
@NETIF_F_LRO = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @qlcnic_fix_features(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %0) #2
%4 = tail call i64 @qlcnic_82xx_check(ptr noundef %3) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %31, label %6
6: ; preds = %2
%7 = load i32, ptr %3, align 4, !tbaa !5
%8 = load i32, ptr @QLCNIC_ESWITCH_ENABLED, align 4, !tbaa !10
%9 = and i32 %8, %7
%10 = icmp eq i32 %9, 0
br i1 %10, label %31, label %11
11: ; preds = %6
%12 = load i32, ptr @QLCNIC_APP_CHANGED_FLAGS, align 4, !tbaa !10
%13 = and i32 %12, %7
%14 = icmp eq i32 %13, 0
br i1 %14, label %17, label %15
15: ; preds = %11
%16 = tail call i32 @qlcnic_process_flags(ptr noundef nonnull %3, i32 noundef %1) #2
br label %31
17: ; preds = %11
%18 = load i32, ptr %0, align 4, !tbaa !11
%19 = xor i32 %18, %1
%20 = load i32, ptr @NETIF_F_RXCSUM, align 4, !tbaa !10
%21 = load i32, ptr @NETIF_F_IP_CSUM, align 4, !tbaa !10
%22 = or i32 %21, %20
%23 = load i32, ptr @NETIF_F_IPV6_CSUM, align 4, !tbaa !10
%24 = or i32 %22, %23
%25 = load i32, ptr @NETIF_F_TSO, align 4, !tbaa !10
%26 = or i32 %24, %25
%27 = load i32, ptr @NETIF_F_TSO6, align 4, !tbaa !10
%28 = or i32 %26, %27
%29 = and i32 %28, %19
%30 = xor i32 %29, %1
br label %31
31: ; preds = %15, %17, %6, %2
%32 = phi i32 [ %16, %15 ], [ %30, %17 ], [ %1, %6 ], [ %1, %2 ]
%33 = load i32, ptr @NETIF_F_RXCSUM, align 4, !tbaa !10
%34 = and i32 %33, %32
%35 = icmp eq i32 %34, 0
%36 = load i32, ptr @NETIF_F_LRO, align 4
%37 = xor i32 %36, -1
%38 = select i1 %35, i32 %37, i32 -1
%39 = and i32 %38, %32
ret i32 %39
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i64 @qlcnic_82xx_check(ptr noundef) local_unnamed_addr #1
declare i32 @qlcnic_process_flags(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"qlcnic_adapter", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"net_device", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/qlogic/qlcnic/extr_qlcnic_hw.c_qlcnic_fix_features.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/qlogic/qlcnic/extr_qlcnic_hw.c_qlcnic_fix_features.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@QLCNIC_ESWITCH_ENABLED = common local_unnamed_addr global i32 0, align 4
@QLCNIC_APP_CHANGED_FLAGS = common local_unnamed_addr global i32 0, align 4
@NETIF_F_RXCSUM = common local_unnamed_addr global i32 0, align 4
@NETIF_F_IP_CSUM = common local_unnamed_addr global i32 0, align 4
@NETIF_F_IPV6_CSUM = common local_unnamed_addr global i32 0, align 4
@NETIF_F_TSO = common local_unnamed_addr global i32 0, align 4
@NETIF_F_TSO6 = common local_unnamed_addr global i32 0, align 4
@NETIF_F_LRO = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @qlcnic_fix_features(ptr noundef %0, i32 noundef %1) local_unnamed_addr #0 {
%3 = tail call ptr @netdev_priv(ptr noundef %0) #2
%4 = tail call i64 @qlcnic_82xx_check(ptr noundef %3) #2
%5 = icmp eq i64 %4, 0
br i1 %5, label %31, label %6
6: ; preds = %2
%7 = load i32, ptr %3, align 4, !tbaa !6
%8 = load i32, ptr @QLCNIC_ESWITCH_ENABLED, align 4, !tbaa !11
%9 = and i32 %8, %7
%10 = icmp eq i32 %9, 0
br i1 %10, label %31, label %11
11: ; preds = %6
%12 = load i32, ptr @QLCNIC_APP_CHANGED_FLAGS, align 4, !tbaa !11
%13 = and i32 %12, %7
%14 = icmp eq i32 %13, 0
br i1 %14, label %17, label %15
15: ; preds = %11
%16 = tail call i32 @qlcnic_process_flags(ptr noundef nonnull %3, i32 noundef %1) #2
br label %31
17: ; preds = %11
%18 = load i32, ptr %0, align 4, !tbaa !12
%19 = xor i32 %18, %1
%20 = load i32, ptr @NETIF_F_RXCSUM, align 4, !tbaa !11
%21 = load i32, ptr @NETIF_F_IP_CSUM, align 4, !tbaa !11
%22 = or i32 %21, %20
%23 = load i32, ptr @NETIF_F_IPV6_CSUM, align 4, !tbaa !11
%24 = or i32 %22, %23
%25 = load i32, ptr @NETIF_F_TSO, align 4, !tbaa !11
%26 = or i32 %24, %25
%27 = load i32, ptr @NETIF_F_TSO6, align 4, !tbaa !11
%28 = or i32 %26, %27
%29 = and i32 %28, %19
%30 = xor i32 %29, %1
br label %31
31: ; preds = %15, %17, %6, %2
%32 = phi i32 [ %16, %15 ], [ %30, %17 ], [ %1, %6 ], [ %1, %2 ]
%33 = load i32, ptr @NETIF_F_RXCSUM, align 4, !tbaa !11
%34 = and i32 %33, %32
%35 = icmp eq i32 %34, 0
%36 = load i32, ptr @NETIF_F_LRO, align 4
%37 = xor i32 %36, -1
%38 = select i1 %35, i32 %37, i32 -1
%39 = and i32 %38, %32
ret i32 %39
}
declare ptr @netdev_priv(ptr noundef) local_unnamed_addr #1
declare i64 @qlcnic_82xx_check(ptr noundef) local_unnamed_addr #1
declare i32 @qlcnic_process_flags(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"qlcnic_adapter", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"net_device", !8, i64 0}
| linux_drivers_net_ethernet_qlogic_qlcnic_extr_qlcnic_hw.c_qlcnic_fix_features |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/common/extr_saa7146_hlp.c_saa7146_set_position.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/common/extr_saa7146_hlp.c_saa7146_set_position.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.saa7146_video_dma = type { i32, i64, i32, ptr, ptr, ptr }
%struct.saa7146_vv = type { i64, ptr, %struct.TYPE_7__, ptr }
%struct.TYPE_7__ = type { i64, %struct.TYPE_6__ }
%struct.TYPE_6__ = type { i32 }
%struct.TYPE_8__ = type { i32, i64 }
@V4L2_FIELD_ALTERNATE = dso_local local_unnamed_addr global i32 0, align 4
@V4L2_FIELD_TOP = dso_local local_unnamed_addr global i32 0, align 4
@V4L2_FIELD_BOTTOM = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @saa7146_set_position], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @saa7146_set_position(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5) #0 {
%7 = alloca %struct.saa7146_video_dma, align 8
%8 = load ptr, ptr %0, align 8, !tbaa !5
%9 = tail call ptr @saa7146_format_by_fourcc(ptr noundef nonnull %0, ptr noundef %5) #3
%10 = getelementptr inbounds %struct.saa7146_vv, ptr %8, i64 0, i32 3
%11 = load ptr, ptr %10, align 8, !tbaa !10
%12 = load i32, ptr %11, align 4, !tbaa !16
%13 = getelementptr inbounds %struct.saa7146_vv, ptr %8, i64 0, i32 2
%14 = getelementptr inbounds %struct.saa7146_vv, ptr %8, i64 0, i32 2, i32 1
%15 = load i32, ptr %14, align 8, !tbaa !18
%16 = load i64, ptr %13, align 8, !tbaa !19
%17 = inttoptr i64 %16 to ptr
call void @llvm.lifetime.start.p0(i64 48, ptr nonnull %7) #3
%18 = shl nsw i32 %15, 1
store i32 %18, ptr %7, align 8, !tbaa !20
%19 = load i64, ptr %8, align 8, !tbaa !22
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %34
21: ; preds = %6
%22 = mul nsw i32 %15, %2
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, ptr %17, i64 %23
%25 = sdiv i32 %12, 8
%26 = mul nsw i32 %25, %1
%27 = sext i32 %26 to i64
%28 = getelementptr inbounds i8, ptr %24, i64 %27
%29 = sext i32 %15 to i64
%30 = getelementptr inbounds i8, ptr %28, i64 %29
%31 = mul nsw i32 %15, %3
%32 = sext i32 %31 to i64
%33 = getelementptr inbounds i8, ptr %28, i64 %32
br label %50
34: ; preds = %6
%35 = add nsw i32 %3, %2
%36 = mul nsw i32 %15, %35
%37 = sext i32 %36 to i64
%38 = getelementptr inbounds i8, ptr %17, i64 %37
%39 = sdiv i32 %12, 8
%40 = mul nsw i32 %39, %1
%41 = sext i32 %40 to i64
%42 = getelementptr inbounds i8, ptr %38, i64 %41
%43 = sub nsw i32 0, %15
%44 = sext i32 %43 to i64
%45 = getelementptr inbounds i8, ptr %42, i64 %44
%46 = mul nsw i32 %15, %3
%47 = sext i32 %46 to i64
%48 = sub nsw i64 0, %47
%49 = getelementptr inbounds i8, ptr %45, i64 %48
br label %50
50: ; preds = %34, %21
%51 = phi ptr [ %28, %21 ], [ %42, %34 ]
%52 = phi ptr [ %30, %21 ], [ %45, %34 ]
%53 = phi ptr [ %33, %21 ], [ %49, %34 ]
%54 = getelementptr inbounds %struct.saa7146_video_dma, ptr %7, i64 0, i32 4
store ptr %51, ptr %54, align 8
%55 = getelementptr inbounds %struct.saa7146_video_dma, ptr %7, i64 0, i32 5
store ptr %52, ptr %55, align 8
%56 = getelementptr inbounds %struct.saa7146_video_dma, ptr %7, i64 0, i32 3
store ptr %53, ptr %56, align 8
%57 = tail call i64 @V4L2_FIELD_HAS_BOTH(i32 noundef %4) #3
%58 = icmp eq i64 %57, 0
br i1 %58, label %59, label %71
59: ; preds = %50
%60 = load i32, ptr @V4L2_FIELD_ALTERNATE, align 4, !tbaa !23
%61 = icmp eq i32 %60, %4
br i1 %61, label %62, label %63
62: ; preds = %59
store ptr %53, ptr %55, align 8, !tbaa !24
store i32 %15, ptr %7, align 8, !tbaa !20
br label %71
63: ; preds = %59
%64 = load i32, ptr @V4L2_FIELD_TOP, align 4, !tbaa !23
%65 = icmp eq i32 %64, %4
br i1 %65, label %66, label %67
66: ; preds = %63
store ptr %53, ptr %55, align 8, !tbaa !24
store i32 %15, ptr %7, align 8, !tbaa !20
br label %71
67: ; preds = %63
%68 = load i32, ptr @V4L2_FIELD_BOTTOM, align 4, !tbaa !23
%69 = icmp eq i32 %68, %4
br i1 %69, label %70, label %71
70: ; preds = %67
store ptr %51, ptr %55, align 8, !tbaa !24
store ptr %53, ptr %54, align 8, !tbaa !25
store i32 %15, ptr %7, align 8, !tbaa !20
br label %71
71: ; preds = %62, %67, %70, %66, %50
%72 = phi i32 [ %15, %62 ], [ %18, %67 ], [ %15, %70 ], [ %15, %66 ], [ %18, %50 ]
%73 = load i64, ptr %8, align 8, !tbaa !22
%74 = icmp eq i64 %73, 0
br i1 %74, label %77, label %75
75: ; preds = %71
%76 = sub nsw i32 0, %72
store i32 %76, ptr %7, align 8, !tbaa !20
br label %77
77: ; preds = %75, %71
%78 = load i32, ptr %9, align 4, !tbaa !26
%79 = getelementptr inbounds %struct.saa7146_video_dma, ptr %7, i64 0, i32 2
store i32 %78, ptr %79, align 8, !tbaa !28
%80 = getelementptr inbounds %struct.saa7146_vv, ptr %8, i64 0, i32 1
%81 = load ptr, ptr %80, align 8, !tbaa !29
%82 = load i32, ptr %81, align 8, !tbaa !30
%83 = shl i32 %82, 16
%84 = sext i32 %83 to i64
%85 = getelementptr inbounds %struct.TYPE_8__, ptr %81, i64 0, i32 1
%86 = load i64, ptr %85, align 8, !tbaa !32
%87 = add nsw i64 %86, %84
%88 = getelementptr inbounds %struct.saa7146_video_dma, ptr %7, i64 0, i32 1
store i64 %87, ptr %88, align 8, !tbaa !33
%89 = call i32 @saa7146_write_out_dma(ptr noundef nonnull %0, i32 noundef 1, ptr noundef nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 48, ptr nonnull %7) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @saa7146_format_by_fourcc(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @V4L2_FIELD_HAS_BOTH(i32 noundef) local_unnamed_addr #2
declare i32 @saa7146_write_out_dma(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"saa7146_dev", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 32}
!11 = !{!"saa7146_vv", !12, i64 0, !7, i64 8, !13, i64 16, !7, i64 32}
!12 = !{!"long", !8, i64 0}
!13 = !{!"TYPE_7__", !12, i64 0, !14, i64 8}
!14 = !{!"TYPE_6__", !15, i64 0}
!15 = !{!"int", !8, i64 0}
!16 = !{!17, !15, i64 0}
!17 = !{!"TYPE_5__", !15, i64 0}
!18 = !{!11, !15, i64 24}
!19 = !{!11, !12, i64 16}
!20 = !{!21, !15, i64 0}
!21 = !{!"saa7146_video_dma", !15, i64 0, !12, i64 8, !15, i64 16, !7, i64 24, !7, i64 32, !7, i64 40}
!22 = !{!11, !12, i64 0}
!23 = !{!15, !15, i64 0}
!24 = !{!21, !7, i64 40}
!25 = !{!21, !7, i64 32}
!26 = !{!27, !15, i64 0}
!27 = !{!"saa7146_format", !15, i64 0}
!28 = !{!21, !15, i64 16}
!29 = !{!11, !7, i64 8}
!30 = !{!31, !15, i64 0}
!31 = !{!"TYPE_8__", !15, i64 0, !12, i64 8}
!32 = !{!31, !12, i64 8}
!33 = !{!21, !12, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/media/common/extr_saa7146_hlp.c_saa7146_set_position.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/media/common/extr_saa7146_hlp.c_saa7146_set_position.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.saa7146_video_dma = type { i32, i64, i32, ptr, ptr, ptr }
@V4L2_FIELD_ALTERNATE = common local_unnamed_addr global i32 0, align 4
@V4L2_FIELD_TOP = common local_unnamed_addr global i32 0, align 4
@V4L2_FIELD_BOTTOM = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @saa7146_set_position], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @saa7146_set_position(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i32 noundef %4, ptr noundef %5) #0 {
%7 = alloca %struct.saa7146_video_dma, align 8
%8 = load ptr, ptr %0, align 8, !tbaa !6
%9 = tail call ptr @saa7146_format_by_fourcc(ptr noundef nonnull %0, ptr noundef %5) #3
%10 = getelementptr inbounds i8, ptr %8, i64 32
%11 = load ptr, ptr %10, align 8, !tbaa !11
%12 = load i32, ptr %11, align 4, !tbaa !17
%13 = getelementptr inbounds i8, ptr %8, i64 16
%14 = getelementptr inbounds i8, ptr %8, i64 24
%15 = load i32, ptr %14, align 8, !tbaa !19
%16 = load i64, ptr %13, align 8, !tbaa !20
%17 = inttoptr i64 %16 to ptr
call void @llvm.lifetime.start.p0(i64 48, ptr nonnull %7) #3
%18 = shl nsw i32 %15, 1
store i32 %18, ptr %7, align 8, !tbaa !21
%19 = load i64, ptr %8, align 8, !tbaa !23
%20 = icmp eq i64 %19, 0
br i1 %20, label %21, label %34
21: ; preds = %6
%22 = mul nsw i32 %15, %2
%23 = sext i32 %22 to i64
%24 = getelementptr inbounds i8, ptr %17, i64 %23
%25 = sdiv i32 %12, 8
%26 = mul nsw i32 %25, %1
%27 = sext i32 %26 to i64
%28 = getelementptr inbounds i8, ptr %24, i64 %27
%29 = sext i32 %15 to i64
%30 = getelementptr inbounds i8, ptr %28, i64 %29
%31 = mul nsw i32 %15, %3
%32 = sext i32 %31 to i64
%33 = getelementptr inbounds i8, ptr %28, i64 %32
br label %50
34: ; preds = %6
%35 = add nsw i32 %3, %2
%36 = mul nsw i32 %15, %35
%37 = sext i32 %36 to i64
%38 = getelementptr inbounds i8, ptr %17, i64 %37
%39 = sdiv i32 %12, 8
%40 = mul nsw i32 %39, %1
%41 = sext i32 %40 to i64
%42 = getelementptr inbounds i8, ptr %38, i64 %41
%43 = sub nsw i32 0, %15
%44 = sext i32 %43 to i64
%45 = getelementptr inbounds i8, ptr %42, i64 %44
%46 = mul nsw i32 %15, %3
%47 = sext i32 %46 to i64
%48 = sub nsw i64 0, %47
%49 = getelementptr inbounds i8, ptr %45, i64 %48
br label %50
50: ; preds = %34, %21
%51 = phi ptr [ %28, %21 ], [ %42, %34 ]
%52 = phi ptr [ %30, %21 ], [ %45, %34 ]
%53 = phi ptr [ %33, %21 ], [ %49, %34 ]
%54 = getelementptr inbounds i8, ptr %7, i64 32
store ptr %51, ptr %54, align 8
%55 = getelementptr inbounds i8, ptr %7, i64 40
store ptr %52, ptr %55, align 8
%56 = getelementptr inbounds i8, ptr %7, i64 24
store ptr %53, ptr %56, align 8
%57 = tail call i64 @V4L2_FIELD_HAS_BOTH(i32 noundef %4) #3
%58 = icmp eq i64 %57, 0
br i1 %58, label %59, label %71
59: ; preds = %50
%60 = load i32, ptr @V4L2_FIELD_ALTERNATE, align 4, !tbaa !24
%61 = icmp eq i32 %60, %4
br i1 %61, label %62, label %63
62: ; preds = %59
store ptr %53, ptr %55, align 8, !tbaa !25
store i32 %15, ptr %7, align 8, !tbaa !21
br label %71
63: ; preds = %59
%64 = load i32, ptr @V4L2_FIELD_TOP, align 4, !tbaa !24
%65 = icmp eq i32 %64, %4
br i1 %65, label %66, label %67
66: ; preds = %63
store ptr %53, ptr %55, align 8, !tbaa !25
store i32 %15, ptr %7, align 8, !tbaa !21
br label %71
67: ; preds = %63
%68 = load i32, ptr @V4L2_FIELD_BOTTOM, align 4, !tbaa !24
%69 = icmp eq i32 %68, %4
br i1 %69, label %70, label %71
70: ; preds = %67
store ptr %51, ptr %55, align 8, !tbaa !25
store ptr %53, ptr %54, align 8, !tbaa !26
store i32 %15, ptr %7, align 8, !tbaa !21
br label %71
71: ; preds = %62, %67, %70, %66, %50
%72 = phi i32 [ %15, %62 ], [ %18, %67 ], [ %15, %70 ], [ %15, %66 ], [ %18, %50 ]
%73 = load i64, ptr %8, align 8, !tbaa !23
%74 = icmp eq i64 %73, 0
br i1 %74, label %77, label %75
75: ; preds = %71
%76 = sub nsw i32 0, %72
store i32 %76, ptr %7, align 8, !tbaa !21
br label %77
77: ; preds = %75, %71
%78 = load i32, ptr %9, align 4, !tbaa !27
%79 = getelementptr inbounds i8, ptr %7, i64 16
store i32 %78, ptr %79, align 8, !tbaa !29
%80 = getelementptr inbounds i8, ptr %8, i64 8
%81 = load ptr, ptr %80, align 8, !tbaa !30
%82 = load i32, ptr %81, align 8, !tbaa !31
%83 = shl i32 %82, 16
%84 = sext i32 %83 to i64
%85 = getelementptr inbounds i8, ptr %81, i64 8
%86 = load i64, ptr %85, align 8, !tbaa !33
%87 = add nsw i64 %86, %84
%88 = getelementptr inbounds i8, ptr %7, i64 8
store i64 %87, ptr %88, align 8, !tbaa !34
%89 = call i32 @saa7146_write_out_dma(ptr noundef nonnull %0, i32 noundef 1, ptr noundef nonnull %7) #3
call void @llvm.lifetime.end.p0(i64 48, ptr nonnull %7) #3
ret void
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @saa7146_format_by_fourcc(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i64 @V4L2_FIELD_HAS_BOTH(i32 noundef) local_unnamed_addr #2
declare i32 @saa7146_write_out_dma(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"saa7146_dev", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !8, i64 32}
!12 = !{!"saa7146_vv", !13, i64 0, !8, i64 8, !14, i64 16, !8, i64 32}
!13 = !{!"long", !9, i64 0}
!14 = !{!"TYPE_7__", !13, i64 0, !15, i64 8}
!15 = !{!"TYPE_6__", !16, i64 0}
!16 = !{!"int", !9, i64 0}
!17 = !{!18, !16, i64 0}
!18 = !{!"TYPE_5__", !16, i64 0}
!19 = !{!12, !16, i64 24}
!20 = !{!12, !13, i64 16}
!21 = !{!22, !16, i64 0}
!22 = !{!"saa7146_video_dma", !16, i64 0, !13, i64 8, !16, i64 16, !8, i64 24, !8, i64 32, !8, i64 40}
!23 = !{!12, !13, i64 0}
!24 = !{!16, !16, i64 0}
!25 = !{!22, !8, i64 40}
!26 = !{!22, !8, i64 32}
!27 = !{!28, !16, i64 0}
!28 = !{!"saa7146_format", !16, i64 0}
!29 = !{!22, !16, i64 16}
!30 = !{!12, !8, i64 8}
!31 = !{!32, !16, i64 0}
!32 = !{!"TYPE_8__", !16, i64 0, !13, i64 8}
!33 = !{!32, !13, i64 8}
!34 = !{!22, !13, i64 8}
| fastsocket_kernel_drivers_media_common_extr_saa7146_hlp.c_saa7146_set_position |
; ModuleID = 'AnghaBench/exploitdb/exploits/linux/local/extr_479.c_get_dtors.c'
source_filename = "AnghaBench/exploitdb/exploits/linux/local/extr_479.c_get_dtors.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [17 x i8] c"/tmp/candyXXXXXX\00", align 1
@GET_DTORS_CMD = dso_local local_unnamed_addr global ptr null, align 8
@SHAR_PATH = dso_local local_unnamed_addr global ptr null, align 8
@stdout = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [49 x i8] c"[+]Utilities check successful, no Need Defaults\0A\00", align 1
@.str.2 = private unnamed_addr constant [33 x i8] c"[+]Using default .Dtors address\0A\00", align 1
@DEFAULT_DTORS_SHAR = dso_local local_unnamed_addr global i32 0, align 4
@DEFAULT_DTORS_UNSHAR = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [26 x i8] c"[+]Dtors address => 0x%x\0A\00", align 1
@.str.4 = private unnamed_addr constant [3 x i8] c"rb\00", align 1
@errno = dso_local local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [32 x i8] c"[+]Dtors address found => 0x%x\0A\00", align 1
@EXIT_FAILURE = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @get_dtors(ptr noundef %0) local_unnamed_addr #0 {
%2 = alloca [32 x i8], align 16
%3 = alloca ptr, align 8
%4 = alloca i32, align 4
%5 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %2) #6
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #6
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #6
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #6
store ptr null, ptr %5, align 8, !tbaa !5
%6 = call i32 @bzero(ptr noundef nonnull %2, i32 noundef 32) #6
%7 = call i32 @strlen(ptr noundef nonnull @.str) #6
%8 = call i32 @strncpy(ptr noundef nonnull %2, ptr noundef nonnull @.str, i32 noundef %7) #6
%9 = call i64 @mkstemp(ptr noundef nonnull %2) #6
%10 = call i64 @malloc(i32 noundef 800) #6
%11 = inttoptr i64 %10 to ptr
%12 = call i32 @bzero(ptr noundef %11, i32 noundef 8) #6
%13 = load ptr, ptr @GET_DTORS_CMD, align 8, !tbaa !5
%14 = call i32 @snprintf(ptr noundef %11, i32 noundef 100, ptr noundef %13, ptr noundef %0, ptr noundef nonnull %2) #6
%15 = call i32 @strlen(ptr noundef %11) #6
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, ptr %11, i64 %16
store i8 0, ptr %17, align 1, !tbaa !9
%18 = load ptr, ptr @SHAR_PATH, align 8, !tbaa !5
%19 = call i32 @system(ptr noundef %11) #6
%20 = lshr i32 %19, 8
%21 = trunc i32 %20 to i8
%22 = load i32, ptr @stdout, align 4, !tbaa !10
switch i8 %21, label %33 [
i8 0, label %23
i8 1, label %27
]
23: ; preds = %1
%24 = call i32 (i32, ptr, ...) @fprintf(i32 noundef %22, ptr noundef nonnull @.str.1) #6
%25 = call ptr @fopen(ptr noundef nonnull %2, ptr noundef nonnull @.str.4)
%26 = icmp eq ptr %25, null
br i1 %26, label %42, label %51
27: ; preds = %1
%28 = call i32 (i32, ptr, ...) @fprintf(i32 noundef %22, ptr noundef nonnull @.str.2) #6
%29 = icmp eq ptr %18, %0
%30 = load i32, ptr @DEFAULT_DTORS_SHAR, align 4
%31 = load i32, ptr @DEFAULT_DTORS_UNSHAR, align 4
%32 = select i1 %29, i32 %30, i32 %31
br label %68
33: ; preds = %1
%34 = call i32 (i32, ptr, ...) @fprintf(i32 noundef %22, ptr noundef nonnull @.str.2) #6
%35 = load i32, ptr @stdout, align 4, !tbaa !10
%36 = load i32, ptr @DEFAULT_DTORS_SHAR, align 4, !tbaa !10
%37 = call i32 (i32, ptr, ...) @fprintf(i32 noundef %35, ptr noundef nonnull @.str.3, i32 noundef %36) #6
%38 = icmp eq ptr %18, %0
%39 = load i32, ptr @DEFAULT_DTORS_SHAR, align 4
%40 = load i32, ptr @DEFAULT_DTORS_UNSHAR, align 4
%41 = select i1 %38, i32 %39, i32 %40
br label %68
42: ; preds = %23
%43 = load i32, ptr @errno, align 4, !tbaa !10
%44 = call i32 @strerror(i32 noundef %43) #6
%45 = load i32, ptr @stdout, align 4, !tbaa !10
%46 = call i32 (i32, ptr, ...) @fprintf(i32 noundef %45, ptr noundef nonnull @.str.2) #6
%47 = icmp eq ptr %18, %0
%48 = load i32, ptr @DEFAULT_DTORS_SHAR, align 4
%49 = load i32, ptr @DEFAULT_DTORS_UNSHAR, align 4
%50 = select i1 %47, i32 %48, i32 %49
br label %68
51: ; preds = %23
%52 = call i32 @getline(ptr noundef nonnull %5, ptr noundef nonnull %4, ptr noundef nonnull %25) #6
%53 = call i32 @fflush(ptr noundef nonnull %25)
%54 = load ptr, ptr %5, align 8, !tbaa !5
%55 = call i32 @strlen(ptr noundef %54) #6
%56 = sext i32 %55 to i64
%57 = getelementptr i8, ptr %54, i64 %56
%58 = getelementptr i8, ptr %57, i64 -1
store i8 0, ptr %58, align 1, !tbaa !9
%59 = load ptr, ptr %5, align 8, !tbaa !5
%60 = call i32 @strtoul(ptr noundef %59, ptr noundef nonnull %3, i32 noundef 16)
%61 = call i32 @fclose(ptr noundef nonnull %25)
%62 = load ptr, ptr %5, align 8, !tbaa !5
%63 = call i32 @free(ptr noundef %62) #6
%64 = call i32 @unlink(ptr noundef nonnull %2)
%65 = load i32, ptr @stdout, align 4, !tbaa !10
%66 = add nsw i32 %60, 4
%67 = call i32 (i32, ptr, ...) @fprintf(i32 noundef %65, ptr noundef nonnull @.str.5, i32 noundef %66) #6
br label %68
68: ; preds = %51, %42, %33, %27
%69 = phi i32 [ %41, %33 ], [ %32, %27 ], [ %50, %42 ], [ %60, %51 ]
%70 = call i32 @unlink(ptr noundef nonnull %2)
%71 = add nsw i32 %69, 4
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #6
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #6
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #6
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %2) #6
ret i32 %71
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @bzero(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @strncpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @strlen(ptr noundef) local_unnamed_addr #2
declare i64 @mkstemp(ptr noundef) local_unnamed_addr #2
declare i64 @malloc(i32 noundef) local_unnamed_addr #2
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: nofree
declare noundef i32 @system(ptr nocapture noundef readonly) local_unnamed_addr #3
declare i32 @fprintf(i32 noundef, ptr noundef, ...) local_unnamed_addr #2
; Function Attrs: nofree nounwind
declare noalias noundef ptr @fopen(ptr nocapture noundef readonly, ptr nocapture noundef readonly) local_unnamed_addr #4
declare i32 @strerror(i32 noundef) local_unnamed_addr #2
declare i32 @getline(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: nofree nounwind
declare noundef i32 @fflush(ptr nocapture noundef) local_unnamed_addr #4
; Function Attrs: mustprogress nofree nounwind willreturn
declare i32 @strtoul(ptr noundef readonly, ptr nocapture noundef, i32 noundef) local_unnamed_addr #5
; Function Attrs: nofree nounwind
declare noundef i32 @fclose(ptr nocapture noundef) local_unnamed_addr #4
declare i32 @free(ptr noundef) local_unnamed_addr #2
; Function Attrs: nofree nounwind
declare noundef i32 @unlink(ptr nocapture noundef readonly) local_unnamed_addr #4
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { nofree nounwind "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nofree nounwind willreturn "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!7, !7, i64 0}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/exploitdb/exploits/linux/local/extr_479.c_get_dtors.c'
source_filename = "AnghaBench/exploitdb/exploits/linux/local/extr_479.c_get_dtors.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [17 x i8] c"/tmp/candyXXXXXX\00", align 1
@GET_DTORS_CMD = common local_unnamed_addr global ptr null, align 8
@SHAR_PATH = common local_unnamed_addr global ptr null, align 8
@stdout = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [49 x i8] c"[+]Utilities check successful, no Need Defaults\0A\00", align 1
@.str.2 = private unnamed_addr constant [33 x i8] c"[+]Using default .Dtors address\0A\00", align 1
@DEFAULT_DTORS_SHAR = common local_unnamed_addr global i32 0, align 4
@DEFAULT_DTORS_UNSHAR = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [26 x i8] c"[+]Dtors address => 0x%x\0A\00", align 1
@.str.4 = private unnamed_addr constant [3 x i8] c"rb\00", align 1
@errno = common local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [32 x i8] c"[+]Dtors address found => 0x%x\0A\00", align 1
@EXIT_FAILURE = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -2147483644, -2147483648) i32 @get_dtors(ptr noundef %0) local_unnamed_addr #0 {
%2 = alloca [32 x i8], align 1
%3 = alloca ptr, align 8
%4 = alloca i32, align 4
%5 = alloca ptr, align 8
call void @llvm.lifetime.start.p0(i64 32, ptr nonnull %2) #6
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %3) #6
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %4) #6
call void @llvm.lifetime.start.p0(i64 8, ptr nonnull %5) #6
store ptr null, ptr %5, align 8, !tbaa !6
%6 = call i32 @bzero(ptr noundef nonnull %2, i32 noundef 32) #6
%7 = call i32 @strlen(ptr noundef nonnull @.str) #6
%8 = call i32 @strncpy(ptr noundef nonnull %2, ptr noundef nonnull @.str, i32 noundef %7) #6
%9 = call i64 @mkstemp(ptr noundef nonnull %2) #6
%10 = call i64 @malloc(i32 noundef 800) #6
%11 = inttoptr i64 %10 to ptr
%12 = call i32 @bzero(ptr noundef %11, i32 noundef 8) #6
%13 = load ptr, ptr @GET_DTORS_CMD, align 8, !tbaa !6
%14 = call i32 @snprintf(ptr noundef %11, i32 noundef 100, ptr noundef %13, ptr noundef %0, ptr noundef nonnull %2) #6
%15 = call i32 @strlen(ptr noundef %11) #6
%16 = sext i32 %15 to i64
%17 = getelementptr inbounds i8, ptr %11, i64 %16
store i8 0, ptr %17, align 1, !tbaa !10
%18 = load ptr, ptr @SHAR_PATH, align 8, !tbaa !6
%19 = call i32 @system(ptr noundef %11) #6
%20 = lshr i32 %19, 8
%21 = trunc i32 %20 to i8
%22 = load i32, ptr @stdout, align 4, !tbaa !11
switch i8 %21, label %33 [
i8 0, label %23
i8 1, label %27
]
23: ; preds = %1
%24 = call i32 (i32, ptr, ...) @fprintf(i32 noundef %22, ptr noundef nonnull @.str.1) #6
%25 = call ptr @fopen(ptr noundef nonnull %2, ptr noundef nonnull @.str.4)
%26 = icmp eq ptr %25, null
br i1 %26, label %42, label %51
27: ; preds = %1
%28 = call i32 (i32, ptr, ...) @fprintf(i32 noundef %22, ptr noundef nonnull @.str.2) #6
%29 = icmp eq ptr %18, %0
%30 = load i32, ptr @DEFAULT_DTORS_SHAR, align 4
%31 = load i32, ptr @DEFAULT_DTORS_UNSHAR, align 4
%32 = select i1 %29, i32 %30, i32 %31
br label %68
33: ; preds = %1
%34 = call i32 (i32, ptr, ...) @fprintf(i32 noundef %22, ptr noundef nonnull @.str.2) #6
%35 = load i32, ptr @stdout, align 4, !tbaa !11
%36 = load i32, ptr @DEFAULT_DTORS_SHAR, align 4, !tbaa !11
%37 = call i32 (i32, ptr, ...) @fprintf(i32 noundef %35, ptr noundef nonnull @.str.3, i32 noundef %36) #6
%38 = icmp eq ptr %18, %0
%39 = load i32, ptr @DEFAULT_DTORS_SHAR, align 4
%40 = load i32, ptr @DEFAULT_DTORS_UNSHAR, align 4
%41 = select i1 %38, i32 %39, i32 %40
br label %68
42: ; preds = %23
%43 = load i32, ptr @errno, align 4, !tbaa !11
%44 = call i32 @strerror(i32 noundef %43) #6
%45 = load i32, ptr @stdout, align 4, !tbaa !11
%46 = call i32 (i32, ptr, ...) @fprintf(i32 noundef %45, ptr noundef nonnull @.str.2) #6
%47 = icmp eq ptr %18, %0
%48 = load i32, ptr @DEFAULT_DTORS_SHAR, align 4
%49 = load i32, ptr @DEFAULT_DTORS_UNSHAR, align 4
%50 = select i1 %47, i32 %48, i32 %49
br label %68
51: ; preds = %23
%52 = call i32 @getline(ptr noundef nonnull %5, ptr noundef nonnull %4, ptr noundef nonnull %25) #6
%53 = call i32 @fflush(ptr noundef nonnull %25)
%54 = load ptr, ptr %5, align 8, !tbaa !6
%55 = call i32 @strlen(ptr noundef %54) #6
%56 = sext i32 %55 to i64
%57 = getelementptr i8, ptr %54, i64 %56
%58 = getelementptr i8, ptr %57, i64 -1
store i8 0, ptr %58, align 1, !tbaa !10
%59 = load ptr, ptr %5, align 8, !tbaa !6
%60 = call i32 @strtoul(ptr noundef %59, ptr noundef nonnull %3, i32 noundef 16)
%61 = call i32 @fclose(ptr noundef nonnull %25)
%62 = load ptr, ptr %5, align 8, !tbaa !6
%63 = call i32 @free(ptr noundef %62) #6
%64 = call i32 @unlink(ptr noundef nonnull %2)
%65 = load i32, ptr @stdout, align 4, !tbaa !11
%66 = add nsw i32 %60, 4
%67 = call i32 (i32, ptr, ...) @fprintf(i32 noundef %65, ptr noundef nonnull @.str.5, i32 noundef %66) #6
br label %68
68: ; preds = %51, %42, %33, %27
%69 = phi i32 [ %41, %33 ], [ %32, %27 ], [ %50, %42 ], [ %60, %51 ]
%70 = call i32 @unlink(ptr noundef nonnull %2)
%71 = add nsw i32 %69, 4
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %5) #6
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %4) #6
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3) #6
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %2) #6
ret i32 %71
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @bzero(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @strncpy(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @strlen(ptr noundef) local_unnamed_addr #2
declare i64 @mkstemp(ptr noundef) local_unnamed_addr #2
declare i64 @malloc(i32 noundef) local_unnamed_addr #2
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: nofree
declare noundef i32 @system(ptr nocapture noundef readonly) local_unnamed_addr #3
declare i32 @fprintf(i32 noundef, ptr noundef, ...) local_unnamed_addr #2
; Function Attrs: nofree nounwind
declare noalias noundef ptr @fopen(ptr nocapture noundef readonly, ptr nocapture noundef readonly) local_unnamed_addr #4
declare i32 @strerror(i32 noundef) local_unnamed_addr #2
declare i32 @getline(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #2
; Function Attrs: nofree nounwind
declare noundef i32 @fflush(ptr nocapture noundef) local_unnamed_addr #4
; Function Attrs: mustprogress nofree nounwind willreturn
declare i32 @strtoul(ptr noundef readonly, ptr nocapture noundef, i32 noundef) local_unnamed_addr #5
; Function Attrs: nofree nounwind
declare noundef i32 @fclose(ptr nocapture noundef) local_unnamed_addr #4
declare i32 @free(ptr noundef) local_unnamed_addr #2
; Function Attrs: nofree nounwind
declare noundef i32 @unlink(ptr nocapture noundef readonly) local_unnamed_addr #4
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nofree "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #4 = { nofree nounwind "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #5 = { mustprogress nofree nounwind willreturn "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #6 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !8, i64 0}
| exploitdb_exploits_linux_local_extr_479.c_get_dtors |
; ModuleID = 'AnghaBench/linux/drivers/crypto/bcm/extr_cipher.c_spu_ahash_rx_sg_create.c'
source_filename = "AnghaBench/linux/drivers/crypto/bcm/extr_cipher.c_spu_ahash_rx_sg_create.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { %struct.spu_hw }
%struct.spu_hw = type { ptr }
%struct.iproc_reqctx_s = type { %struct.TYPE_5__, i32, ptr }
%struct.TYPE_5__ = type { i32, i32, i32, i32 }
%struct.scatterlist = type { i32 }
@iproc_priv = dso_local local_unnamed_addr global %struct.TYPE_6__ zeroinitializer, align 8
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@SPU_RX_STATUS_LEN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @spu_ahash_rx_sg_create], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @spu_ahash_rx_sg_create(ptr nocapture noundef writeonly %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
%6 = getelementptr inbounds %struct.iproc_reqctx_s, ptr %1, i64 0, i32 2
%7 = load ptr, ptr %6, align 8, !tbaa !5
%8 = getelementptr inbounds %struct.iproc_reqctx_s, ptr %1, i64 0, i32 1
%9 = load i32, ptr %8, align 8, !tbaa !12
%10 = tail call ptr @kcalloc(i32 noundef %2, i32 noundef 4, i32 noundef %9) #2
store ptr %10, ptr %0, align 8, !tbaa !13
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %15
12: ; preds = %5
%13 = load i32, ptr @ENOMEM, align 4, !tbaa !16
%14 = sub nsw i32 0, %13
br label %41
15: ; preds = %5
%16 = tail call i32 @sg_init_table(ptr noundef nonnull %10, i32 noundef %2) #2
%17 = getelementptr inbounds %struct.scatterlist, ptr %10, i64 1
%18 = getelementptr inbounds %struct.TYPE_5__, ptr %1, i64 0, i32 3
%19 = load i32, ptr %18, align 4, !tbaa !17
%20 = load i32, ptr %7, align 4, !tbaa !18
%21 = tail call i32 @sg_set_buf(ptr noundef nonnull %10, i32 noundef %19, i32 noundef %20) #2
%22 = getelementptr inbounds %struct.scatterlist, ptr %10, i64 2
%23 = getelementptr inbounds %struct.TYPE_5__, ptr %1, i64 0, i32 2
%24 = load i32, ptr %23, align 8, !tbaa !20
%25 = tail call i32 @sg_set_buf(ptr noundef nonnull %17, i32 noundef %24, i32 noundef %3) #2
%26 = icmp eq i32 %4, 0
br i1 %26, label %32, label %27
27: ; preds = %15
%28 = getelementptr inbounds %struct.scatterlist, ptr %10, i64 3
%29 = getelementptr inbounds %struct.TYPE_5__, ptr %1, i64 0, i32 1
%30 = load i32, ptr %29, align 4, !tbaa !21
%31 = tail call i32 @sg_set_buf(ptr noundef nonnull %22, i32 noundef %30, i32 noundef %4) #2
br label %32
32: ; preds = %27, %15
%33 = phi ptr [ %28, %27 ], [ %22, %15 ]
%34 = load i32, ptr %1, align 8, !tbaa !22
%35 = load i32, ptr @SPU_RX_STATUS_LEN, align 4, !tbaa !16
%36 = tail call i32 @memset(i32 noundef %34, i32 noundef 0, i32 noundef %35) #2
%37 = load i32, ptr %1, align 8, !tbaa !22
%38 = load ptr, ptr @iproc_priv, align 8, !tbaa !23
%39 = tail call i32 (...) %38() #2
%40 = tail call i32 @sg_set_buf(ptr noundef nonnull %33, i32 noundef %37, i32 noundef %39) #2
br label %41
41: ; preds = %32, %12
%42 = phi i32 [ 0, %32 ], [ %14, %12 ]
ret i32 %42
}
declare ptr @kcalloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sg_init_table(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sg_set_buf(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memset(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !11, i64 24}
!6 = !{!"iproc_reqctx_s", !7, i64 0, !8, i64 16, !11, i64 24}
!7 = !{!"TYPE_5__", !8, i64 0, !8, i64 4, !8, i64 8, !8, i64 12}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!6, !8, i64 16}
!13 = !{!14, !11, i64 0}
!14 = !{!"brcm_message", !15, i64 0}
!15 = !{!"TYPE_4__", !11, i64 0}
!16 = !{!8, !8, i64 0}
!17 = !{!6, !8, i64 12}
!18 = !{!19, !8, i64 0}
!19 = !{!"iproc_ctx_s", !8, i64 0}
!20 = !{!6, !8, i64 8}
!21 = !{!6, !8, i64 4}
!22 = !{!6, !8, i64 0}
!23 = !{!24, !11, i64 0}
!24 = !{!"spu_hw", !11, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/crypto/bcm/extr_cipher.c_spu_ahash_rx_sg_create.c'
source_filename = "AnghaBench/linux/drivers/crypto/bcm/extr_cipher.c_spu_ahash_rx_sg_create.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_6__ = type { %struct.spu_hw }
%struct.spu_hw = type { ptr }
@iproc_priv = common local_unnamed_addr global %struct.TYPE_6__ zeroinitializer, align 8
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@SPU_RX_STATUS_LEN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @spu_ahash_rx_sg_create], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @spu_ahash_rx_sg_create(ptr nocapture noundef writeonly %0, ptr nocapture noundef readonly %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) #0 {
%6 = getelementptr inbounds i8, ptr %1, i64 24
%7 = load ptr, ptr %6, align 8, !tbaa !6
%8 = getelementptr inbounds i8, ptr %1, i64 16
%9 = load i32, ptr %8, align 8, !tbaa !13
%10 = tail call ptr @kcalloc(i32 noundef %2, i32 noundef 4, i32 noundef %9) #2
store ptr %10, ptr %0, align 8, !tbaa !14
%11 = icmp eq ptr %10, null
br i1 %11, label %12, label %15
12: ; preds = %5
%13 = load i32, ptr @ENOMEM, align 4, !tbaa !17
%14 = sub nsw i32 0, %13
br label %41
15: ; preds = %5
%16 = tail call i32 @sg_init_table(ptr noundef nonnull %10, i32 noundef %2) #2
%17 = getelementptr inbounds i8, ptr %10, i64 4
%18 = getelementptr inbounds i8, ptr %1, i64 12
%19 = load i32, ptr %18, align 4, !tbaa !18
%20 = load i32, ptr %7, align 4, !tbaa !19
%21 = tail call i32 @sg_set_buf(ptr noundef nonnull %10, i32 noundef %19, i32 noundef %20) #2
%22 = getelementptr inbounds i8, ptr %10, i64 8
%23 = getelementptr inbounds i8, ptr %1, i64 8
%24 = load i32, ptr %23, align 8, !tbaa !21
%25 = tail call i32 @sg_set_buf(ptr noundef nonnull %17, i32 noundef %24, i32 noundef %3) #2
%26 = icmp eq i32 %4, 0
br i1 %26, label %32, label %27
27: ; preds = %15
%28 = getelementptr inbounds i8, ptr %10, i64 12
%29 = getelementptr inbounds i8, ptr %1, i64 4
%30 = load i32, ptr %29, align 4, !tbaa !22
%31 = tail call i32 @sg_set_buf(ptr noundef nonnull %22, i32 noundef %30, i32 noundef %4) #2
br label %32
32: ; preds = %27, %15
%33 = phi ptr [ %28, %27 ], [ %22, %15 ]
%34 = load i32, ptr %1, align 8, !tbaa !23
%35 = load i32, ptr @SPU_RX_STATUS_LEN, align 4, !tbaa !17
%36 = tail call i32 @memset(i32 noundef %34, i32 noundef 0, i32 noundef %35) #2
%37 = load i32, ptr %1, align 8, !tbaa !23
%38 = load ptr, ptr @iproc_priv, align 8, !tbaa !24
%39 = tail call i32 %38() #2
%40 = tail call i32 @sg_set_buf(ptr noundef nonnull %33, i32 noundef %37, i32 noundef %39) #2
br label %41
41: ; preds = %32, %12
%42 = phi i32 [ 0, %32 ], [ %14, %12 ]
ret i32 %42
}
declare ptr @kcalloc(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sg_init_table(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @sg_set_buf(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @memset(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !12, i64 24}
!7 = !{!"iproc_reqctx_s", !8, i64 0, !9, i64 16, !12, i64 24}
!8 = !{!"TYPE_5__", !9, i64 0, !9, i64 4, !9, i64 8, !9, i64 12}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!7, !9, i64 16}
!14 = !{!15, !12, i64 0}
!15 = !{!"brcm_message", !16, i64 0}
!16 = !{!"TYPE_4__", !12, i64 0}
!17 = !{!9, !9, i64 0}
!18 = !{!7, !9, i64 12}
!19 = !{!20, !9, i64 0}
!20 = !{!"iproc_ctx_s", !9, i64 0}
!21 = !{!7, !9, i64 8}
!22 = !{!7, !9, i64 4}
!23 = !{!7, !9, i64 0}
!24 = !{!25, !12, i64 0}
!25 = !{!"spu_hw", !12, i64 0}
| linux_drivers_crypto_bcm_extr_cipher.c_spu_ahash_rx_sg_create |
; ModuleID = 'AnghaBench/freebsd/sys/dev/ppbus/extr_vpoio.c_vpoio_do_scsi.c'
source_filename = "AnghaBench/freebsd/sys/dev/ppbus/extr_vpoio.c_vpoio_do_scsi.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PPB_WAIT = dso_local local_unnamed_addr global i32 0, align 4
@PPB_INTR = dso_local local_unnamed_addr global i32 0, align 4
@VP0_ECONNECT = dso_local local_unnamed_addr global i32 0, align 4
@H_AUTO = dso_local local_unnamed_addr global i32 0, align 4
@H_nSELIN = dso_local local_unnamed_addr global i32 0, align 4
@H_INIT = dso_local local_unnamed_addr global i32 0, align 4
@H_STROBE = dso_local local_unnamed_addr global i32 0, align 4
@VP0_FAST_SPINTMO = dso_local local_unnamed_addr global i32 0, align 4
@VP0_ECMD_TIMEOUT = dso_local local_unnamed_addr global i32 0, align 4
@VP0_EPPDATA_TIMEOUT = dso_local local_unnamed_addr global i32 0, align 4
@VP0_LOW_SPINTMO = dso_local local_unnamed_addr global i32 0, align 4
@VP0_ESTATUS_TIMEOUT = dso_local local_unnamed_addr global i32 0, align 4
@VP0_EDATA_OVERFLOW = dso_local local_unnamed_addr global i32 0, align 4
@VP0_SECTOR_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@VP0_EOTHER = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @vpoio_do_scsi(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, ptr noundef %5, i32 noundef %6, ptr nocapture noundef writeonly %7, ptr nocapture noundef %8, ptr nocapture noundef writeonly %9) local_unnamed_addr #0 {
%11 = alloca i8, align 1
%12 = alloca i8, align 1
%13 = load i32, ptr %0, align 4, !tbaa !5
%14 = tail call i32 @device_get_parent(i32 noundef %13) #3
call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %11) #3
call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %12) #3
store i8 0, ptr %12, align 1, !tbaa !10
%15 = load i32, ptr @PPB_WAIT, align 4, !tbaa !11
%16 = load i32, ptr @PPB_INTR, align 4, !tbaa !11
%17 = or i32 %16, %15
%18 = tail call i32 @vpoio_connect(ptr noundef nonnull %0, i32 noundef %17) #3
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %121
20: ; preds = %10
%21 = tail call i32 @vpoio_in_disk_mode(ptr noundef nonnull %0) #3
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %25
23: ; preds = %20
%24 = load i32, ptr @VP0_ECONNECT, align 4, !tbaa !11
store i32 %24, ptr %9, align 4, !tbaa !11
br label %119
25: ; preds = %20
%26 = tail call i32 @vpoio_select(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %2) #3
store i32 %26, ptr %9, align 4, !tbaa !11
%27 = icmp eq i32 %26, 0
br i1 %27, label %28, label %119
28: ; preds = %25
%29 = load i32, ptr @H_AUTO, align 4, !tbaa !11
%30 = load i32, ptr @H_nSELIN, align 4, !tbaa !11
%31 = or i32 %30, %29
%32 = load i32, ptr @H_INIT, align 4, !tbaa !11
%33 = or i32 %31, %32
%34 = load i32, ptr @H_STROBE, align 4, !tbaa !11
%35 = or i32 %33, %34
%36 = tail call i32 @ppb_wctr(i32 noundef %14, i32 noundef %35) #3
%37 = icmp sgt i32 %4, 0
br i1 %37, label %39, label %38
38: ; preds = %41, %28
br label %57
39: ; preds = %28
%40 = zext nneg i32 %4 to i64
br label %44
41: ; preds = %51
%42 = add nuw nsw i64 %45, 1
%43 = icmp eq i64 %42, %40
br i1 %43, label %38, label %44, !llvm.loop !12
44: ; preds = %39, %41
%45 = phi i64 [ 0, %39 ], [ %42, %41 ]
%46 = load i32, ptr @VP0_FAST_SPINTMO, align 4, !tbaa !11
%47 = tail call signext i8 @vpoio_wait(ptr noundef nonnull %0, i32 noundef %46) #3
%48 = icmp eq i8 %47, -32
br i1 %48, label %51, label %49
49: ; preds = %44
%50 = load i32, ptr @VP0_ECMD_TIMEOUT, align 4, !tbaa !11
store i32 %50, ptr %9, align 4, !tbaa !11
br label %119
51: ; preds = %44
%52 = getelementptr inbounds i8, ptr %3, i64 %45
%53 = tail call i32 @vpoio_outstr(ptr noundef nonnull %0, ptr noundef %52, i32 noundef 1) #3
%54 = icmp eq i32 %53, 0
br i1 %54, label %41, label %55
55: ; preds = %51
%56 = load i32, ptr @VP0_EPPDATA_TIMEOUT, align 4, !tbaa !11
store i32 %56, ptr %9, align 4, !tbaa !11
br label %119
57: ; preds = %38, %92
%58 = phi i32 [ %94, %92 ], [ 0, %38 ]
store i32 %58, ptr %8, align 4, !tbaa !11
%59 = load i32, ptr @VP0_LOW_SPINTMO, align 4, !tbaa !11
%60 = tail call signext i8 @vpoio_wait(ptr noundef nonnull %0, i32 noundef %59) #3
switch i8 %60, label %63 [
i8 0, label %61
i8 -16, label %95
]
61: ; preds = %57
%62 = load i32, ptr @VP0_ESTATUS_TIMEOUT, align 4, !tbaa !11
store i32 %62, ptr %9, align 4, !tbaa !11
br label %119
63: ; preds = %57
%64 = load i32, ptr %8, align 4, !tbaa !11
%65 = icmp slt i32 %64, %6
br i1 %65, label %68, label %66
66: ; preds = %63
%67 = load i32, ptr @VP0_EDATA_OVERFLOW, align 4, !tbaa !11
store i32 %67, ptr %9, align 4, !tbaa !11
br label %119
68: ; preds = %63
%69 = tail call i64 @PPB_IN_EPP_MODE(i32 noundef %14) #3
%70 = icmp ne i64 %69, 0
%71 = icmp eq i8 %60, -64
%72 = or i1 %71, %70
br i1 %72, label %73, label %79
73: ; preds = %68
%74 = load i32, ptr %8, align 4, !tbaa !11
%75 = sub nsw i32 %6, %74
%76 = load i32, ptr @VP0_SECTOR_SIZE, align 4
%77 = icmp slt i32 %75, %76
%78 = select i1 %77, i32 1, i32 %76
br label %79
79: ; preds = %68, %73
%80 = phi i32 [ %78, %73 ], [ 1, %68 ]
%81 = load i32, ptr %8, align 4, !tbaa !11
%82 = sext i32 %81 to i64
%83 = getelementptr inbounds i8, ptr %5, i64 %82
br i1 %71, label %84, label %86
84: ; preds = %79
%85 = tail call i32 @vpoio_outstr(ptr noundef nonnull %0, ptr noundef %83, i32 noundef %80) #3
br label %88
86: ; preds = %79
%87 = tail call i32 @vpoio_instr(ptr noundef nonnull %0, ptr noundef %83, i32 noundef %80) #3
br label %88
88: ; preds = %86, %84
%89 = phi i32 [ %85, %84 ], [ %87, %86 ]
%90 = icmp eq i32 %89, 0
br i1 %90, label %92, label %91
91: ; preds = %88
store i32 %89, ptr %9, align 4, !tbaa !11
br label %119
92: ; preds = %88
%93 = load i32, ptr %8, align 4, !tbaa !11
%94 = add nsw i32 %93, %80
br label %57
95: ; preds = %57
%96 = call i32 @vpoio_instr(ptr noundef nonnull %0, ptr noundef nonnull %11, i32 noundef 1) #3
%97 = icmp eq i32 %96, 0
br i1 %97, label %100, label %98
98: ; preds = %95
%99 = load i32, ptr @VP0_EOTHER, align 4, !tbaa !11
store i32 %99, ptr %9, align 4, !tbaa !11
br label %119
100: ; preds = %95
%101 = load i32, ptr @VP0_FAST_SPINTMO, align 4, !tbaa !11
%102 = call signext i8 @vpoio_wait(ptr noundef nonnull %0, i32 noundef %101) #3
%103 = icmp eq i8 %102, -16
br i1 %103, label %104, label %114
104: ; preds = %100
%105 = call i32 @vpoio_instr(ptr noundef nonnull %0, ptr noundef nonnull %12, i32 noundef 1) #3
%106 = icmp eq i32 %105, 0
br i1 %106, label %107, label %111
107: ; preds = %104
%108 = load i8, ptr %12, align 1, !tbaa !10
%109 = sext i8 %108 to i32
%110 = shl nsw i32 %109, 8
br label %114
111: ; preds = %104
%112 = load i32, ptr @VP0_EOTHER, align 4, !tbaa !11
%113 = add nsw i32 %112, 2
store i32 %113, ptr %9, align 4, !tbaa !11
br label %119
114: ; preds = %107, %100
%115 = phi i32 [ %110, %107 ], [ 0, %100 ]
%116 = load i8, ptr %11, align 1, !tbaa !10
%117 = zext i8 %116 to i32
%118 = or disjoint i32 %115, %117
store i32 %118, ptr %7, align 4, !tbaa !11
br label %119
119: ; preds = %25, %114, %111, %98, %91, %66, %61, %55, %49, %23
%120 = call i32 @vpoio_disconnect(ptr noundef nonnull %0) #3
br label %121
121: ; preds = %10, %119
%122 = phi i32 [ 0, %119 ], [ %18, %10 ]
call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %12) #3
call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %11) #3
ret i32 %122
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @device_get_parent(i32 noundef) local_unnamed_addr #2
declare i32 @vpoio_connect(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @vpoio_in_disk_mode(ptr noundef) local_unnamed_addr #2
declare i32 @vpoio_select(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ppb_wctr(i32 noundef, i32 noundef) local_unnamed_addr #2
declare signext i8 @vpoio_wait(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @vpoio_outstr(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @PPB_IN_EPP_MODE(i32 noundef) local_unnamed_addr #2
declare i32 @vpoio_instr(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @vpoio_disconnect(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"vpoio_data", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!8, !8, i64 0}
!11 = !{!7, !7, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/freebsd/sys/dev/ppbus/extr_vpoio.c_vpoio_do_scsi.c'
source_filename = "AnghaBench/freebsd/sys/dev/ppbus/extr_vpoio.c_vpoio_do_scsi.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PPB_WAIT = common local_unnamed_addr global i32 0, align 4
@PPB_INTR = common local_unnamed_addr global i32 0, align 4
@VP0_ECONNECT = common local_unnamed_addr global i32 0, align 4
@H_AUTO = common local_unnamed_addr global i32 0, align 4
@H_nSELIN = common local_unnamed_addr global i32 0, align 4
@H_INIT = common local_unnamed_addr global i32 0, align 4
@H_STROBE = common local_unnamed_addr global i32 0, align 4
@VP0_FAST_SPINTMO = common local_unnamed_addr global i32 0, align 4
@VP0_ECMD_TIMEOUT = common local_unnamed_addr global i32 0, align 4
@VP0_EPPDATA_TIMEOUT = common local_unnamed_addr global i32 0, align 4
@VP0_LOW_SPINTMO = common local_unnamed_addr global i32 0, align 4
@VP0_ESTATUS_TIMEOUT = common local_unnamed_addr global i32 0, align 4
@VP0_EDATA_OVERFLOW = common local_unnamed_addr global i32 0, align 4
@VP0_SECTOR_SIZE = common local_unnamed_addr global i32 0, align 4
@VP0_EOTHER = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @vpoio_do_scsi(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3, i32 noundef %4, ptr noundef %5, i32 noundef %6, ptr nocapture noundef writeonly %7, ptr nocapture noundef %8, ptr nocapture noundef writeonly %9) local_unnamed_addr #0 {
%11 = alloca i8, align 1
%12 = alloca i8, align 1
%13 = load i32, ptr %0, align 4, !tbaa !6
%14 = tail call i32 @device_get_parent(i32 noundef %13) #3
call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %11) #3
call void @llvm.lifetime.start.p0(i64 1, ptr nonnull %12) #3
store i8 0, ptr %12, align 1, !tbaa !11
%15 = load i32, ptr @PPB_WAIT, align 4, !tbaa !12
%16 = load i32, ptr @PPB_INTR, align 4, !tbaa !12
%17 = or i32 %16, %15
%18 = tail call i32 @vpoio_connect(ptr noundef nonnull %0, i32 noundef %17) #3
%19 = icmp eq i32 %18, 0
br i1 %19, label %20, label %121
20: ; preds = %10
%21 = tail call i32 @vpoio_in_disk_mode(ptr noundef nonnull %0) #3
%22 = icmp eq i32 %21, 0
br i1 %22, label %23, label %25
23: ; preds = %20
%24 = load i32, ptr @VP0_ECONNECT, align 4, !tbaa !12
store i32 %24, ptr %9, align 4, !tbaa !12
br label %119
25: ; preds = %20
%26 = tail call i32 @vpoio_select(ptr noundef nonnull %0, i32 noundef %1, i32 noundef %2) #3
store i32 %26, ptr %9, align 4, !tbaa !12
%27 = icmp eq i32 %26, 0
br i1 %27, label %28, label %119
28: ; preds = %25
%29 = load i32, ptr @H_AUTO, align 4, !tbaa !12
%30 = load i32, ptr @H_nSELIN, align 4, !tbaa !12
%31 = or i32 %30, %29
%32 = load i32, ptr @H_INIT, align 4, !tbaa !12
%33 = or i32 %31, %32
%34 = load i32, ptr @H_STROBE, align 4, !tbaa !12
%35 = or i32 %33, %34
%36 = tail call i32 @ppb_wctr(i32 noundef %14, i32 noundef %35) #3
%37 = icmp sgt i32 %4, 0
br i1 %37, label %39, label %38
38: ; preds = %41, %28
br label %57
39: ; preds = %28
%40 = zext nneg i32 %4 to i64
br label %44
41: ; preds = %51
%42 = add nuw nsw i64 %45, 1
%43 = icmp eq i64 %42, %40
br i1 %43, label %38, label %44, !llvm.loop !13
44: ; preds = %39, %41
%45 = phi i64 [ 0, %39 ], [ %42, %41 ]
%46 = load i32, ptr @VP0_FAST_SPINTMO, align 4, !tbaa !12
%47 = tail call signext i8 @vpoio_wait(ptr noundef nonnull %0, i32 noundef %46) #3
%48 = icmp eq i8 %47, -32
br i1 %48, label %51, label %49
49: ; preds = %44
%50 = load i32, ptr @VP0_ECMD_TIMEOUT, align 4, !tbaa !12
store i32 %50, ptr %9, align 4, !tbaa !12
br label %119
51: ; preds = %44
%52 = getelementptr inbounds i8, ptr %3, i64 %45
%53 = tail call i32 @vpoio_outstr(ptr noundef nonnull %0, ptr noundef %52, i32 noundef 1) #3
%54 = icmp eq i32 %53, 0
br i1 %54, label %41, label %55
55: ; preds = %51
%56 = load i32, ptr @VP0_EPPDATA_TIMEOUT, align 4, !tbaa !12
store i32 %56, ptr %9, align 4, !tbaa !12
br label %119
57: ; preds = %38, %92
%58 = phi i32 [ %94, %92 ], [ 0, %38 ]
store i32 %58, ptr %8, align 4, !tbaa !12
%59 = load i32, ptr @VP0_LOW_SPINTMO, align 4, !tbaa !12
%60 = tail call signext i8 @vpoio_wait(ptr noundef nonnull %0, i32 noundef %59) #3
switch i8 %60, label %63 [
i8 0, label %61
i8 -16, label %95
]
61: ; preds = %57
%62 = load i32, ptr @VP0_ESTATUS_TIMEOUT, align 4, !tbaa !12
store i32 %62, ptr %9, align 4, !tbaa !12
br label %119
63: ; preds = %57
%64 = load i32, ptr %8, align 4, !tbaa !12
%65 = icmp slt i32 %64, %6
br i1 %65, label %68, label %66
66: ; preds = %63
%67 = load i32, ptr @VP0_EDATA_OVERFLOW, align 4, !tbaa !12
store i32 %67, ptr %9, align 4, !tbaa !12
br label %119
68: ; preds = %63
%69 = tail call i64 @PPB_IN_EPP_MODE(i32 noundef %14) #3
%70 = icmp ne i64 %69, 0
%71 = icmp eq i8 %60, -64
%72 = or i1 %71, %70
br i1 %72, label %73, label %79
73: ; preds = %68
%74 = load i32, ptr %8, align 4, !tbaa !12
%75 = sub nsw i32 %6, %74
%76 = load i32, ptr @VP0_SECTOR_SIZE, align 4
%77 = icmp slt i32 %75, %76
%78 = select i1 %77, i32 1, i32 %76
br label %79
79: ; preds = %68, %73
%80 = phi i32 [ %78, %73 ], [ 1, %68 ]
%81 = load i32, ptr %8, align 4, !tbaa !12
%82 = sext i32 %81 to i64
%83 = getelementptr inbounds i8, ptr %5, i64 %82
br i1 %71, label %84, label %86
84: ; preds = %79
%85 = tail call i32 @vpoio_outstr(ptr noundef nonnull %0, ptr noundef %83, i32 noundef %80) #3
br label %88
86: ; preds = %79
%87 = tail call i32 @vpoio_instr(ptr noundef nonnull %0, ptr noundef %83, i32 noundef %80) #3
br label %88
88: ; preds = %86, %84
%89 = phi i32 [ %85, %84 ], [ %87, %86 ]
%90 = icmp eq i32 %89, 0
br i1 %90, label %92, label %91
91: ; preds = %88
store i32 %89, ptr %9, align 4, !tbaa !12
br label %119
92: ; preds = %88
%93 = load i32, ptr %8, align 4, !tbaa !12
%94 = add nsw i32 %93, %80
br label %57
95: ; preds = %57
%96 = call i32 @vpoio_instr(ptr noundef nonnull %0, ptr noundef nonnull %11, i32 noundef 1) #3
%97 = icmp eq i32 %96, 0
br i1 %97, label %100, label %98
98: ; preds = %95
%99 = load i32, ptr @VP0_EOTHER, align 4, !tbaa !12
store i32 %99, ptr %9, align 4, !tbaa !12
br label %119
100: ; preds = %95
%101 = load i32, ptr @VP0_FAST_SPINTMO, align 4, !tbaa !12
%102 = call signext i8 @vpoio_wait(ptr noundef nonnull %0, i32 noundef %101) #3
%103 = icmp eq i8 %102, -16
br i1 %103, label %104, label %114
104: ; preds = %100
%105 = call i32 @vpoio_instr(ptr noundef nonnull %0, ptr noundef nonnull %12, i32 noundef 1) #3
%106 = icmp eq i32 %105, 0
br i1 %106, label %107, label %111
107: ; preds = %104
%108 = load i8, ptr %12, align 1, !tbaa !11
%109 = sext i8 %108 to i32
%110 = shl nsw i32 %109, 8
br label %114
111: ; preds = %104
%112 = load i32, ptr @VP0_EOTHER, align 4, !tbaa !12
%113 = add nsw i32 %112, 2
store i32 %113, ptr %9, align 4, !tbaa !12
br label %119
114: ; preds = %107, %100
%115 = phi i32 [ %110, %107 ], [ 0, %100 ]
%116 = load i8, ptr %11, align 1, !tbaa !11
%117 = zext i8 %116 to i32
%118 = or disjoint i32 %115, %117
store i32 %118, ptr %7, align 4, !tbaa !12
br label %119
119: ; preds = %25, %114, %111, %98, %91, %66, %61, %55, %49, %23
%120 = call i32 @vpoio_disconnect(ptr noundef nonnull %0) #3
br label %121
121: ; preds = %10, %119
%122 = phi i32 [ 0, %119 ], [ %18, %10 ]
call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %12) #3
call void @llvm.lifetime.end.p0(i64 1, ptr nonnull %11) #3
ret i32 %122
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @device_get_parent(i32 noundef) local_unnamed_addr #2
declare i32 @vpoio_connect(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @vpoio_in_disk_mode(ptr noundef) local_unnamed_addr #2
declare i32 @vpoio_select(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @ppb_wctr(i32 noundef, i32 noundef) local_unnamed_addr #2
declare signext i8 @vpoio_wait(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @vpoio_outstr(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @PPB_IN_EPP_MODE(i32 noundef) local_unnamed_addr #2
declare i32 @vpoio_instr(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @vpoio_disconnect(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"vpoio_data", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!9, !9, i64 0}
!12 = !{!8, !8, i64 0}
!13 = distinct !{!13, !14}
!14 = !{!"llvm.loop.mustprogress"}
| freebsd_sys_dev_ppbus_extr_vpoio.c_vpoio_do_scsi |
; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/ac97/extr_ac97_patch.c_snd_ac97_ad1986_miclisel_put.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/ac97/extr_ac97_patch.c_snd_ac97_ad1986_miclisel_put.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.snd_ac97 = type { ptr, %struct.TYPE_10__ }
%struct.TYPE_10__ = type { %struct.TYPE_9__ }
%struct.TYPE_9__ = type { i8 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @snd_ac97_ad1986_miclisel_put], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @snd_ac97_ad1986_miclisel_put(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call ptr @snd_kcontrol_chip(ptr noundef %0) #2
%4 = load ptr, ptr %1, align 8, !tbaa !5
%5 = load i64, ptr %4, align 8, !tbaa !12
%6 = icmp ne i64 %5, 0
%7 = getelementptr inbounds %struct.snd_ac97, ptr %3, i64 0, i32 1
%8 = load i8, ptr %7, align 8, !tbaa !14
%9 = zext i1 %6 to i8
%10 = icmp eq i8 %8, %9
br i1 %10, label %17, label %11
11: ; preds = %2
store i8 %9, ptr %7, align 8, !tbaa !14
%12 = load ptr, ptr %3, align 8, !tbaa !18
%13 = load ptr, ptr %12, align 8, !tbaa !19
%14 = icmp eq ptr %13, null
br i1 %14, label %17, label %15
15: ; preds = %11
%16 = tail call i32 %13(ptr noundef nonnull %3) #2
br label %17
17: ; preds = %2, %11, %15
%18 = phi i32 [ 1, %15 ], [ 1, %11 ], [ 0, %2 ]
ret i32 %18
}
declare ptr @snd_kcontrol_chip(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !9, i64 0}
!6 = !{!"snd_ctl_elem_value", !7, i64 0}
!7 = !{!"TYPE_8__", !8, i64 0}
!8 = !{!"TYPE_7__", !9, i64 0}
!9 = !{!"any pointer", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!13, !13, i64 0}
!13 = !{!"long", !10, i64 0}
!14 = !{!15, !10, i64 8}
!15 = !{!"snd_ac97", !9, i64 0, !16, i64 8}
!16 = !{!"TYPE_10__", !17, i64 0}
!17 = !{!"TYPE_9__", !10, i64 0}
!18 = !{!15, !9, i64 0}
!19 = !{!20, !9, i64 0}
!20 = !{!"TYPE_6__", !9, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/sound/pci/ac97/extr_ac97_patch.c_snd_ac97_ad1986_miclisel_put.c'
source_filename = "AnghaBench/fastsocket/kernel/sound/pci/ac97/extr_ac97_patch.c_snd_ac97_ad1986_miclisel_put.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @snd_ac97_ad1986_miclisel_put], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @snd_ac97_ad1986_miclisel_put(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call ptr @snd_kcontrol_chip(ptr noundef %0) #2
%4 = load ptr, ptr %1, align 8, !tbaa !6
%5 = load i64, ptr %4, align 8, !tbaa !13
%6 = icmp ne i64 %5, 0
%7 = getelementptr inbounds i8, ptr %3, i64 8
%8 = load i8, ptr %7, align 8, !tbaa !15
%9 = zext i1 %6 to i8
%10 = icmp eq i8 %8, %9
br i1 %10, label %17, label %11
11: ; preds = %2
store i8 %9, ptr %7, align 8, !tbaa !15
%12 = load ptr, ptr %3, align 8, !tbaa !19
%13 = load ptr, ptr %12, align 8, !tbaa !20
%14 = icmp eq ptr %13, null
br i1 %14, label %17, label %15
15: ; preds = %11
%16 = tail call i32 %13(ptr noundef nonnull %3) #2
br label %17
17: ; preds = %2, %11, %15
%18 = phi i32 [ 1, %15 ], [ 1, %11 ], [ 0, %2 ]
ret i32 %18
}
declare ptr @snd_kcontrol_chip(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !10, i64 0}
!7 = !{!"snd_ctl_elem_value", !8, i64 0}
!8 = !{!"TYPE_8__", !9, i64 0}
!9 = !{!"TYPE_7__", !10, i64 0}
!10 = !{!"any pointer", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C/C++ TBAA"}
!13 = !{!14, !14, i64 0}
!14 = !{!"long", !11, i64 0}
!15 = !{!16, !11, i64 8}
!16 = !{!"snd_ac97", !10, i64 0, !17, i64 8}
!17 = !{!"TYPE_10__", !18, i64 0}
!18 = !{!"TYPE_9__", !11, i64 0}
!19 = !{!16, !10, i64 0}
!20 = !{!21, !10, i64 0}
!21 = !{!"TYPE_6__", !10, i64 0}
| fastsocket_kernel_sound_pci_ac97_extr_ac97_patch.c_snd_ac97_ad1986_miclisel_put |
; ModuleID = 'AnghaBench/linux/drivers/scsi/aic7xxx/extr_aic79xx_core.c_ahd_fetch_devinfo.c'
source_filename = "AnghaBench/linux/drivers/scsi/aic7xxx/extr_aic79xx_core.c_ahd_fetch_devinfo.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@AHD_MODE_SCSI = dso_local local_unnamed_addr global i32 0, align 4
@SSTAT0 = dso_local local_unnamed_addr global i32 0, align 4
@TARGET = dso_local local_unnamed_addr global i32 0, align 4
@ROLE_TARGET = dso_local local_unnamed_addr global i64 0, align 8
@ROLE_INITIATOR = dso_local local_unnamed_addr global i64 0, align 8
@SEQ_FLAGS = dso_local local_unnamed_addr global i32 0, align 4
@CMDPHASE_PENDING = dso_local local_unnamed_addr global i32 0, align 4
@TARGIDIN = dso_local local_unnamed_addr global i32 0, align 4
@OID = dso_local local_unnamed_addr global i32 0, align 4
@TOWNID = dso_local local_unnamed_addr global i32 0, align 4
@IOWNID = dso_local local_unnamed_addr global i32 0, align 4
@SAVED_SCSIID = dso_local local_unnamed_addr global i32 0, align 4
@SAVED_LUN = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @ahd_fetch_devinfo], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @ahd_fetch_devinfo(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @ahd_save_modes(ptr noundef %0) #2
%4 = load i32, ptr @AHD_MODE_SCSI, align 4, !tbaa !5
%5 = tail call i32 @ahd_set_modes(ptr noundef %0, i32 noundef %4, i32 noundef %4) #2
%6 = load i32, ptr @SSTAT0, align 4, !tbaa !5
%7 = tail call i32 @ahd_inb(ptr noundef %0, i32 noundef %6) #2
%8 = load i32, ptr @TARGET, align 4, !tbaa !5
%9 = and i32 %8, %7
%10 = icmp eq i32 %9, 0
%11 = load i64, ptr @ROLE_INITIATOR, align 8
%12 = load i64, ptr @ROLE_TARGET, align 8
%13 = select i1 %10, i64 %11, i64 %12
%14 = icmp eq i64 %13, %12
br i1 %14, label %15, label %28
15: ; preds = %2
%16 = load i32, ptr @SEQ_FLAGS, align 4, !tbaa !5
%17 = tail call i32 @ahd_inb(ptr noundef %0, i32 noundef %16) #2
%18 = load i32, ptr @CMDPHASE_PENDING, align 4, !tbaa !5
%19 = and i32 %18, %17
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %23
21: ; preds = %15
%22 = load i64, ptr @ROLE_TARGET, align 8, !tbaa !9
br label %28
23: ; preds = %15
%24 = load i32, ptr @TARGIDIN, align 4, !tbaa !5
%25 = tail call i32 @ahd_inb(ptr noundef %0, i32 noundef %24) #2
%26 = load i32, ptr @OID, align 4, !tbaa !5
%27 = and i32 %26, %25
br label %37
28: ; preds = %21, %2
%29 = phi i64 [ %22, %21 ], [ %12, %2 ]
%30 = icmp eq i64 %13, %29
br i1 %30, label %31, label %34
31: ; preds = %28
%32 = load i32, ptr @TOWNID, align 4, !tbaa !5
%33 = tail call i32 @ahd_inb(ptr noundef %0, i32 noundef %32) #2
br label %37
34: ; preds = %28
%35 = load i32, ptr @IOWNID, align 4, !tbaa !5
%36 = tail call i32 @ahd_inb(ptr noundef %0, i32 noundef %35) #2
br label %37
37: ; preds = %31, %34, %23
%38 = phi i32 [ %27, %23 ], [ %33, %31 ], [ %36, %34 ]
%39 = load i32, ptr @SAVED_SCSIID, align 4, !tbaa !5
%40 = tail call i32 @ahd_inb(ptr noundef %0, i32 noundef %39) #2
%41 = tail call i32 @SCSIID_TARGET(ptr noundef %0, i32 noundef %40) #2
%42 = load i32, ptr @SAVED_LUN, align 4, !tbaa !5
%43 = tail call i32 @ahd_inb(ptr noundef %0, i32 noundef %42) #2
%44 = tail call i32 @SCSIID_CHANNEL(ptr noundef %0, i32 noundef %40) #2
%45 = tail call i32 @ahd_compile_devinfo(ptr noundef %1, i32 noundef %38, i32 noundef %41, i32 noundef %43, i32 noundef %44, i64 noundef %13) #2
%46 = tail call i32 @ahd_restore_modes(ptr noundef %0, i32 noundef %3) #2
ret void
}
declare i32 @ahd_save_modes(ptr noundef) local_unnamed_addr #1
declare i32 @ahd_set_modes(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_inb(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_compile_devinfo(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @SCSIID_TARGET(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SCSIID_CHANNEL(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_restore_modes(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/aic7xxx/extr_aic79xx_core.c_ahd_fetch_devinfo.c'
source_filename = "AnghaBench/linux/drivers/scsi/aic7xxx/extr_aic79xx_core.c_ahd_fetch_devinfo.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AHD_MODE_SCSI = common local_unnamed_addr global i32 0, align 4
@SSTAT0 = common local_unnamed_addr global i32 0, align 4
@TARGET = common local_unnamed_addr global i32 0, align 4
@ROLE_TARGET = common local_unnamed_addr global i64 0, align 8
@ROLE_INITIATOR = common local_unnamed_addr global i64 0, align 8
@SEQ_FLAGS = common local_unnamed_addr global i32 0, align 4
@CMDPHASE_PENDING = common local_unnamed_addr global i32 0, align 4
@TARGIDIN = common local_unnamed_addr global i32 0, align 4
@OID = common local_unnamed_addr global i32 0, align 4
@TOWNID = common local_unnamed_addr global i32 0, align 4
@IOWNID = common local_unnamed_addr global i32 0, align 4
@SAVED_SCSIID = common local_unnamed_addr global i32 0, align 4
@SAVED_LUN = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @ahd_fetch_devinfo], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @ahd_fetch_devinfo(ptr noundef %0, ptr noundef %1) #0 {
%3 = tail call i32 @ahd_save_modes(ptr noundef %0) #2
%4 = load i32, ptr @AHD_MODE_SCSI, align 4, !tbaa !6
%5 = tail call i32 @ahd_set_modes(ptr noundef %0, i32 noundef %4, i32 noundef %4) #2
%6 = load i32, ptr @SSTAT0, align 4, !tbaa !6
%7 = tail call i32 @ahd_inb(ptr noundef %0, i32 noundef %6) #2
%8 = load i32, ptr @TARGET, align 4, !tbaa !6
%9 = and i32 %8, %7
%10 = icmp eq i32 %9, 0
%11 = load i64, ptr @ROLE_INITIATOR, align 8
%12 = load i64, ptr @ROLE_TARGET, align 8
%13 = select i1 %10, i64 %11, i64 %12
%14 = icmp eq i64 %13, %12
br i1 %14, label %15, label %28
15: ; preds = %2
%16 = load i32, ptr @SEQ_FLAGS, align 4, !tbaa !6
%17 = tail call i32 @ahd_inb(ptr noundef %0, i32 noundef %16) #2
%18 = load i32, ptr @CMDPHASE_PENDING, align 4, !tbaa !6
%19 = and i32 %18, %17
%20 = icmp eq i32 %19, 0
br i1 %20, label %21, label %23
21: ; preds = %15
%22 = load i64, ptr @ROLE_TARGET, align 8, !tbaa !10
br label %28
23: ; preds = %15
%24 = load i32, ptr @TARGIDIN, align 4, !tbaa !6
%25 = tail call i32 @ahd_inb(ptr noundef %0, i32 noundef %24) #2
%26 = load i32, ptr @OID, align 4, !tbaa !6
%27 = and i32 %26, %25
br label %37
28: ; preds = %21, %2
%29 = phi i64 [ %22, %21 ], [ %12, %2 ]
%30 = icmp eq i64 %13, %29
br i1 %30, label %31, label %34
31: ; preds = %28
%32 = load i32, ptr @TOWNID, align 4, !tbaa !6
%33 = tail call i32 @ahd_inb(ptr noundef %0, i32 noundef %32) #2
br label %37
34: ; preds = %28
%35 = load i32, ptr @IOWNID, align 4, !tbaa !6
%36 = tail call i32 @ahd_inb(ptr noundef %0, i32 noundef %35) #2
br label %37
37: ; preds = %31, %34, %23
%38 = phi i32 [ %27, %23 ], [ %33, %31 ], [ %36, %34 ]
%39 = load i32, ptr @SAVED_SCSIID, align 4, !tbaa !6
%40 = tail call i32 @ahd_inb(ptr noundef %0, i32 noundef %39) #2
%41 = tail call i32 @SCSIID_TARGET(ptr noundef %0, i32 noundef %40) #2
%42 = load i32, ptr @SAVED_LUN, align 4, !tbaa !6
%43 = tail call i32 @ahd_inb(ptr noundef %0, i32 noundef %42) #2
%44 = tail call i32 @SCSIID_CHANNEL(ptr noundef %0, i32 noundef %40) #2
%45 = tail call i32 @ahd_compile_devinfo(ptr noundef %1, i32 noundef %38, i32 noundef %41, i32 noundef %43, i32 noundef %44, i64 noundef %13) #2
%46 = tail call i32 @ahd_restore_modes(ptr noundef %0, i32 noundef %3) #2
ret void
}
declare i32 @ahd_save_modes(ptr noundef) local_unnamed_addr #1
declare i32 @ahd_set_modes(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_inb(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_compile_devinfo(ptr noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @SCSIID_TARGET(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @SCSIID_CHANNEL(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @ahd_restore_modes(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
| linux_drivers_scsi_aic7xxx_extr_aic79xx_core.c_ahd_fetch_devinfo |
; ModuleID = 'AnghaBench/netdata/libnetdata/socket/extr_socket.c_sock_enlarge_in.c'
source_filename = "AnghaBench/netdata/libnetdata/socket/extr_socket.c_sock_enlarge_in.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@LARGE_SOCK_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@SOL_SOCKET = dso_local local_unnamed_addr global i32 0, align 4
@SO_RCVBUF = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [37 x i8] c"Failed to set SO_RCVBUF on socket %d\00", align 1
; Function Attrs: nounwind uwtable
define dso_local i32 @sock_enlarge_in(i32 noundef %0) local_unnamed_addr #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load i32, ptr @LARGE_SOCK_SIZE, align 4, !tbaa !5
store i32 %3, ptr %2, align 4, !tbaa !5
%4 = load i32, ptr @SOL_SOCKET, align 4, !tbaa !5
%5 = load i32, ptr @SO_RCVBUF, align 4, !tbaa !5
%6 = call i32 @setsockopt(i32 noundef %0, i32 noundef %4, i32 noundef %5, ptr noundef nonnull %2, i32 noundef 4) #3
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @error(ptr noundef nonnull @.str, i32 noundef %0) #3
br label %10
10: ; preds = %8, %1
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %6
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @setsockopt(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @error(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/netdata/libnetdata/socket/extr_socket.c_sock_enlarge_in.c'
source_filename = "AnghaBench/netdata/libnetdata/socket/extr_socket.c_sock_enlarge_in.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@LARGE_SOCK_SIZE = common local_unnamed_addr global i32 0, align 4
@SOL_SOCKET = common local_unnamed_addr global i32 0, align 4
@SO_RCVBUF = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [37 x i8] c"Failed to set SO_RCVBUF on socket %d\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @sock_enlarge_in(i32 noundef %0) local_unnamed_addr #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load i32, ptr @LARGE_SOCK_SIZE, align 4, !tbaa !6
store i32 %3, ptr %2, align 4, !tbaa !6
%4 = load i32, ptr @SOL_SOCKET, align 4, !tbaa !6
%5 = load i32, ptr @SO_RCVBUF, align 4, !tbaa !6
%6 = call i32 @setsockopt(i32 noundef %0, i32 noundef %4, i32 noundef %5, ptr noundef nonnull %2, i32 noundef 4) #3
%7 = icmp eq i32 %6, -1
br i1 %7, label %8, label %10
8: ; preds = %1
%9 = call i32 @error(ptr noundef nonnull @.str, i32 noundef %0) #3
br label %10
10: ; preds = %8, %1
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %6
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare i32 @setsockopt(i32 noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @error(ptr noundef, i32 noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| netdata_libnetdata_socket_extr_socket.c_sock_enlarge_in |
; ModuleID = 'AnghaBench/linux/drivers/input/serio/extr_serio.c_serio_destroy_port.c'
source_filename = "AnghaBench/linux/drivers/input/serio/extr_serio.c_serio_destroy_port.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.serio = type { i32, i32, ptr, i32, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @serio_destroy_port], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @serio_destroy_port(ptr noundef %0) #0 {
%2 = tail call ptr @serio_get_pending_child(ptr noundef %0) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %10, label %4
4: ; preds = %1, %4
%5 = phi ptr [ %8, %4 ], [ %2, %1 ]
%6 = tail call i32 @serio_remove_pending_events(ptr noundef nonnull %5) #2
%7 = tail call i32 @put_device(ptr noundef nonnull %5) #2
%8 = tail call ptr @serio_get_pending_child(ptr noundef %0) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %10, label %4, !llvm.loop !5
10: ; preds = %4, %1
%11 = getelementptr inbounds %struct.serio, ptr %0, i64 0, i32 4
%12 = load ptr, ptr %11, align 8, !tbaa !7
%13 = icmp eq ptr %12, null
br i1 %13, label %16, label %14
14: ; preds = %10
%15 = tail call i32 %12(ptr noundef nonnull %0) #2
br label %16
16: ; preds = %14, %10
%17 = getelementptr inbounds %struct.serio, ptr %0, i64 0, i32 2
%18 = load ptr, ptr %17, align 8, !tbaa !13
%19 = icmp eq ptr %18, null
br i1 %19, label %26, label %20
20: ; preds = %16
%21 = tail call i32 @serio_pause_rx(ptr noundef nonnull %18) #2
%22 = getelementptr inbounds %struct.serio, ptr %0, i64 0, i32 3
%23 = tail call i32 @list_del_init(ptr noundef nonnull %22) #2
%24 = load ptr, ptr %17, align 8, !tbaa !13
%25 = tail call i32 @serio_continue_rx(ptr noundef %24) #2
store ptr null, ptr %17, align 8, !tbaa !13
br label %26
26: ; preds = %20, %16
%27 = tail call i64 @device_is_registered(ptr noundef nonnull %0) #2
%28 = icmp eq i64 %27, 0
br i1 %28, label %31, label %29
29: ; preds = %26
%30 = tail call i32 @device_del(ptr noundef nonnull %0) #2
br label %31
31: ; preds = %29, %26
%32 = getelementptr inbounds %struct.serio, ptr %0, i64 0, i32 1
%33 = tail call i32 @list_del_init(ptr noundef nonnull %32) #2
%34 = tail call i32 @serio_remove_pending_events(ptr noundef nonnull %0) #2
%35 = tail call i32 @put_device(ptr noundef nonnull %0) #2
ret void
}
declare ptr @serio_get_pending_child(ptr noundef) local_unnamed_addr #1
declare i32 @serio_remove_pending_events(ptr noundef) local_unnamed_addr #1
declare i32 @put_device(ptr noundef) local_unnamed_addr #1
declare i32 @serio_pause_rx(ptr noundef) local_unnamed_addr #1
declare i32 @list_del_init(ptr noundef) local_unnamed_addr #1
declare i32 @serio_continue_rx(ptr noundef) local_unnamed_addr #1
declare i64 @device_is_registered(ptr noundef) local_unnamed_addr #1
declare i32 @device_del(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = distinct !{!5, !6}
!6 = !{!"llvm.loop.mustprogress"}
!7 = !{!8, !12, i64 24}
!8 = !{!"serio", !9, i64 0, !9, i64 4, !12, i64 8, !9, i64 16, !12, i64 24}
!9 = !{!"int", !10, i64 0}
!10 = !{!"omnipotent char", !11, i64 0}
!11 = !{!"Simple C/C++ TBAA"}
!12 = !{!"any pointer", !10, i64 0}
!13 = !{!8, !12, i64 8}
| ; ModuleID = 'AnghaBench/linux/drivers/input/serio/extr_serio.c_serio_destroy_port.c'
source_filename = "AnghaBench/linux/drivers/input/serio/extr_serio.c_serio_destroy_port.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @serio_destroy_port], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @serio_destroy_port(ptr noundef %0) #0 {
%2 = tail call ptr @serio_get_pending_child(ptr noundef %0) #2
%3 = icmp eq ptr %2, null
br i1 %3, label %10, label %4
4: ; preds = %1, %4
%5 = phi ptr [ %8, %4 ], [ %2, %1 ]
%6 = tail call i32 @serio_remove_pending_events(ptr noundef nonnull %5) #2
%7 = tail call i32 @put_device(ptr noundef nonnull %5) #2
%8 = tail call ptr @serio_get_pending_child(ptr noundef %0) #2
%9 = icmp eq ptr %8, null
br i1 %9, label %10, label %4, !llvm.loop !6
10: ; preds = %4, %1
%11 = getelementptr inbounds i8, ptr %0, i64 24
%12 = load ptr, ptr %11, align 8, !tbaa !8
%13 = icmp eq ptr %12, null
br i1 %13, label %16, label %14
14: ; preds = %10
%15 = tail call i32 %12(ptr noundef nonnull %0) #2
br label %16
16: ; preds = %14, %10
%17 = getelementptr inbounds i8, ptr %0, i64 8
%18 = load ptr, ptr %17, align 8, !tbaa !14
%19 = icmp eq ptr %18, null
br i1 %19, label %26, label %20
20: ; preds = %16
%21 = tail call i32 @serio_pause_rx(ptr noundef nonnull %18) #2
%22 = getelementptr inbounds i8, ptr %0, i64 16
%23 = tail call i32 @list_del_init(ptr noundef nonnull %22) #2
%24 = load ptr, ptr %17, align 8, !tbaa !14
%25 = tail call i32 @serio_continue_rx(ptr noundef %24) #2
store ptr null, ptr %17, align 8, !tbaa !14
br label %26
26: ; preds = %20, %16
%27 = tail call i64 @device_is_registered(ptr noundef nonnull %0) #2
%28 = icmp eq i64 %27, 0
br i1 %28, label %31, label %29
29: ; preds = %26
%30 = tail call i32 @device_del(ptr noundef nonnull %0) #2
br label %31
31: ; preds = %29, %26
%32 = getelementptr inbounds i8, ptr %0, i64 4
%33 = tail call i32 @list_del_init(ptr noundef nonnull %32) #2
%34 = tail call i32 @serio_remove_pending_events(ptr noundef nonnull %0) #2
%35 = tail call i32 @put_device(ptr noundef nonnull %0) #2
ret void
}
declare ptr @serio_get_pending_child(ptr noundef) local_unnamed_addr #1
declare i32 @serio_remove_pending_events(ptr noundef) local_unnamed_addr #1
declare i32 @put_device(ptr noundef) local_unnamed_addr #1
declare i32 @serio_pause_rx(ptr noundef) local_unnamed_addr #1
declare i32 @list_del_init(ptr noundef) local_unnamed_addr #1
declare i32 @serio_continue_rx(ptr noundef) local_unnamed_addr #1
declare i64 @device_is_registered(ptr noundef) local_unnamed_addr #1
declare i32 @device_del(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = distinct !{!6, !7}
!7 = !{!"llvm.loop.mustprogress"}
!8 = !{!9, !13, i64 24}
!9 = !{!"serio", !10, i64 0, !10, i64 4, !13, i64 8, !10, i64 16, !13, i64 24}
!10 = !{!"int", !11, i64 0}
!11 = !{!"omnipotent char", !12, i64 0}
!12 = !{!"Simple C/C++ TBAA"}
!13 = !{!"any pointer", !11, i64 0}
!14 = !{!9, !13, i64 8}
| linux_drivers_input_serio_extr_serio.c_serio_destroy_port |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/atm/extr_horizon.c_setup_idle_tx_channel.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/atm/extr_horizon.c_setup_idle_tx_channel.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_12__ = type { i32, i32, i32, i32 }
%struct.TYPE_14__ = type { i32, ptr, i32 }
%struct.TYPE_13__ = type { i32, i64, i64, i64, i64, i32 }
@DBG_FLOW = dso_local local_unnamed_addr global i32 0, align 4
@DBG_TX = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"setup_idle_tx_channel %p\00", align 1
@TX_STATUS_OFF = dso_local local_unnamed_addr global i32 0, align 4
@IDLE_CHANNELS_MASK = dso_local local_unnamed_addr global i16 0, align 2
@DBG_WARN = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [28 x i8] c"waiting for idle TX channel\00", align 1
@DBG_ERR = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [37 x i8] c"spun out waiting for idle TX channel\00", align 1
@EBUSY = dso_local local_unnamed_addr global i16 0, align 2
@TX_CHANS = dso_local local_unnamed_addr global i32 0, align 4
@memmap = dso_local local_unnamed_addr global ptr null, align 8
@RATE_TYPE_ACCESS = dso_local local_unnamed_addr global i32 0, align 4
@PCR_TIMER_ACCESS = dso_local local_unnamed_addr global i32 0, align 4
@BUFFER_PTR_MASK = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [31 x i8] c"TX buffer pointers are broken!\00", align 1
@.str.4 = private unnamed_addr constant [38 x i8] c"TX buffer pointers are: rd %x, wr %x.\00", align 1
@DBG_QOS = dso_local local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [17 x i8] c"tx_channel: aal0\00", align 1
@CHANNEL_TYPE_RAW_CELLS = dso_local local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [18 x i8] c"tx_channel: aal34\00", align 1
@CHANNEL_TYPE_AAL3_4 = dso_local local_unnamed_addr global i32 0, align 4
@CHANNEL_TYPE_AAL5 = dso_local local_unnamed_addr global i32 0, align 4
@INITIAL_CRC = dso_local local_unnamed_addr global i32 0, align 4
@BUCKET_CAPACITY_ACCESS = dso_local local_unnamed_addr global i32 0, align 4
@BUCKET_FULLNESS_ACCESS = dso_local local_unnamed_addr global i32 0, align 4
@SCR_TIMER_ACCESS = dso_local local_unnamed_addr global i32 0, align 4
@VBR_RATE_TYPE = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @setup_idle_tx_channel], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal signext i16 @setup_idle_tx_channel(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr @DBG_FLOW, align 4, !tbaa !5
%4 = load i32, ptr @DBG_TX, align 4, !tbaa !5
%5 = or i32 %4, %3
%6 = tail call i32 (i32, ptr, ...) @PRINTD(i32 noundef %5, ptr noundef nonnull @.str, ptr noundef %0) #2
br label %7
7: ; preds = %14, %2
%8 = phi i32 [ 0, %2 ], [ %19, %14 ]
%9 = load i32, ptr @TX_STATUS_OFF, align 4, !tbaa !5
%10 = tail call zeroext i16 @rd_regw(ptr noundef %0, i32 noundef %9) #2
%11 = load i16, ptr @IDLE_CHANNELS_MASK, align 2, !tbaa !9
%12 = and i16 %11, %10
%13 = icmp eq i16 %12, 0
br i1 %13, label %14, label %28
14: ; preds = %7
%15 = load i32, ptr @DBG_TX, align 4, !tbaa !5
%16 = load i32, ptr @DBG_WARN, align 4, !tbaa !5
%17 = or i32 %16, %15
%18 = tail call i32 (i32, ptr, ...) @PRINTD(i32 noundef %17, ptr noundef nonnull @.str.1) #2
%19 = add nuw nsw i32 %8, 1
%20 = icmp eq i32 %19, 101
br i1 %20, label %21, label %7, !llvm.loop !11
21: ; preds = %14
%22 = load i32, ptr @DBG_TX, align 4, !tbaa !5
%23 = load i32, ptr @DBG_ERR, align 4, !tbaa !5
%24 = or i32 %23, %22
%25 = tail call i32 (i32, ptr, ...) @PRINTD(i32 noundef %24, ptr noundef nonnull @.str.2) #2
%26 = load i16, ptr @EBUSY, align 2, !tbaa !9
%27 = sub i16 0, %26
br label %109
28: ; preds = %7
%29 = load i32, ptr %0, align 8, !tbaa !13
%30 = zext i16 %12 to i32
%31 = load i32, ptr @TX_CHANS, align 4, !tbaa !5
br label %32
32: ; preds = %28, %32
%33 = phi i32 [ %29, %28 ], [ %39, %32 ]
%34 = shl nuw i32 1, %33
%35 = and i32 %34, %30
%36 = icmp eq i32 %35, 0
%37 = add nsw i32 %33, 1
%38 = icmp eq i32 %37, %31
%39 = select i1 %38, i32 0, i32 %37
br i1 %36, label %32, label %40
40: ; preds = %32
%41 = trunc i32 %33 to i16
store i32 %39, ptr %0, align 8, !tbaa !13
%42 = load ptr, ptr @memmap, align 8, !tbaa !16
%43 = load ptr, ptr %42, align 8, !tbaa !17
%44 = sext i16 %41 to i64
%45 = getelementptr inbounds %struct.TYPE_12__, ptr %43, i64 %44
%46 = load i32, ptr %1, align 8, !tbaa !19
%47 = getelementptr inbounds %struct.TYPE_14__, ptr %0, i64 0, i32 2
%48 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %47, i64 noundef undef) #2
%49 = getelementptr inbounds %struct.TYPE_14__, ptr %0, i64 0, i32 1
%50 = load ptr, ptr %49, align 8, !tbaa !22
%51 = getelementptr inbounds i32, ptr %50, i64 %44
store i32 %46, ptr %51, align 4, !tbaa !5
%52 = load i32, ptr @RATE_TYPE_ACCESS, align 4, !tbaa !5
%53 = getelementptr inbounds %struct.TYPE_13__, ptr %1, i64 0, i32 1
%54 = load i64, ptr %53, align 8, !tbaa !23
%55 = tail call i32 @update_tx_channel_config(ptr noundef nonnull %0, i16 noundef signext %41, i32 noundef %52, i64 noundef %54) #2
%56 = load i32, ptr @PCR_TIMER_ACCESS, align 4, !tbaa !5
%57 = getelementptr inbounds %struct.TYPE_13__, ptr %1, i64 0, i32 2
%58 = load i64, ptr %57, align 8, !tbaa !24
%59 = tail call i32 @update_tx_channel_config(ptr noundef nonnull %0, i16 noundef signext %41, i32 noundef %56, i64 noundef %58) #2
%60 = getelementptr inbounds %struct.TYPE_12__, ptr %43, i64 %44, i32 2
%61 = tail call i32 @rd_mem(ptr noundef nonnull %0, ptr noundef nonnull %60) #2
%62 = load i32, ptr @BUFFER_PTR_MASK, align 4, !tbaa !5
%63 = and i32 %62, %61
%64 = getelementptr inbounds %struct.TYPE_12__, ptr %43, i64 %44, i32 1
%65 = tail call i32 @rd_mem(ptr noundef nonnull %0, ptr noundef nonnull %64) #2
%66 = load i32, ptr @BUFFER_PTR_MASK, align 4, !tbaa !5
%67 = and i32 %66, %65
%68 = icmp eq i32 %63, %67
br i1 %68, label %74, label %69
69: ; preds = %40
%70 = load i32, ptr @DBG_TX, align 4, !tbaa !5
%71 = load i32, ptr @DBG_ERR, align 4, !tbaa !5
%72 = or i32 %71, %70
%73 = tail call i32 (i32, ptr, ...) @PRINTD(i32 noundef %72, ptr noundef nonnull @.str.3) #2
br label %74
74: ; preds = %69, %40
%75 = load i32, ptr @DBG_TX, align 4, !tbaa !5
%76 = tail call i32 (i32, ptr, ...) @PRINTD(i32 noundef %75, ptr noundef nonnull @.str.4, i32 noundef %63, i32 noundef %67) #2
%77 = getelementptr inbounds %struct.TYPE_13__, ptr %1, i64 0, i32 5
%78 = load i32, ptr %77, align 8, !tbaa !25
switch i32 %78, label %102 [
i32 130, label %79
i32 129, label %87
i32 128, label %95
]
79: ; preds = %74
%80 = load i32, ptr @DBG_QOS, align 4, !tbaa !5
%81 = load i32, ptr @DBG_TX, align 4, !tbaa !5
%82 = or i32 %81, %80
%83 = tail call i32 (i32, ptr, ...) @PRINTD(i32 noundef %82, ptr noundef nonnull @.str.5) #2
%84 = load i32, ptr @CHANNEL_TYPE_RAW_CELLS, align 4, !tbaa !5
%85 = or i32 %84, %63
%86 = or i32 %84, %67
br label %102
87: ; preds = %74
%88 = load i32, ptr @DBG_QOS, align 4, !tbaa !5
%89 = load i32, ptr @DBG_TX, align 4, !tbaa !5
%90 = or i32 %89, %88
%91 = tail call i32 (i32, ptr, ...) @PRINTD(i32 noundef %90, ptr noundef nonnull @.str.6) #2
%92 = load i32, ptr @CHANNEL_TYPE_AAL3_4, align 4, !tbaa !5
%93 = or i32 %92, %63
%94 = or i32 %92, %67
br label %102
95: ; preds = %74
%96 = load i32, ptr @CHANNEL_TYPE_AAL5, align 4, !tbaa !5
%97 = or i32 %96, %63
%98 = or i32 %96, %67
%99 = getelementptr inbounds %struct.TYPE_12__, ptr %43, i64 %44, i32 3
%100 = load i32, ptr @INITIAL_CRC, align 4, !tbaa !5
%101 = tail call i32 @wr_mem(ptr noundef nonnull %0, ptr noundef nonnull %99, i32 noundef %100) #2
br label %102
102: ; preds = %74, %95, %87, %79
%103 = phi i32 [ %63, %74 ], [ %97, %95 ], [ %93, %87 ], [ %85, %79 ]
%104 = phi i32 [ %67, %74 ], [ %98, %95 ], [ %94, %87 ], [ %86, %79 ]
%105 = tail call i32 @wr_mem(ptr noundef nonnull %0, ptr noundef nonnull %60, i32 noundef %103) #2
%106 = tail call i32 @wr_mem(ptr noundef nonnull %0, ptr noundef nonnull %64, i32 noundef %104) #2
%107 = tail call i32 @wr_mem(ptr noundef nonnull %0, ptr noundef %45, i32 noundef %46) #2
%108 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %47, i64 noundef undef) #2
br label %109
109: ; preds = %102, %21
%110 = phi i16 [ %27, %21 ], [ %41, %102 ]
ret i16 %110
}
declare i32 @PRINTD(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
declare zeroext i16 @rd_regw(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @update_tx_channel_config(ptr noundef, i16 noundef signext, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @rd_mem(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @wr_mem(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"short", !7, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
!13 = !{!14, !6, i64 0}
!14 = !{!"TYPE_14__", !6, i64 0, !15, i64 8, !6, i64 16}
!15 = !{!"any pointer", !7, i64 0}
!16 = !{!15, !15, i64 0}
!17 = !{!18, !15, i64 0}
!18 = !{!"TYPE_11__", !15, i64 0}
!19 = !{!20, !6, i64 0}
!20 = !{!"TYPE_13__", !6, i64 0, !21, i64 8, !21, i64 16, !21, i64 24, !21, i64 32, !6, i64 40}
!21 = !{!"long", !7, i64 0}
!22 = !{!14, !15, i64 8}
!23 = !{!20, !21, i64 8}
!24 = !{!20, !21, i64 16}
!25 = !{!20, !6, i64 40}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/atm/extr_horizon.c_setup_idle_tx_channel.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/atm/extr_horizon.c_setup_idle_tx_channel.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_12__ = type { i32, i32, i32, i32 }
@DBG_FLOW = common local_unnamed_addr global i32 0, align 4
@DBG_TX = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [25 x i8] c"setup_idle_tx_channel %p\00", align 1
@TX_STATUS_OFF = common local_unnamed_addr global i32 0, align 4
@IDLE_CHANNELS_MASK = common local_unnamed_addr global i16 0, align 2
@DBG_WARN = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [28 x i8] c"waiting for idle TX channel\00", align 1
@DBG_ERR = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [37 x i8] c"spun out waiting for idle TX channel\00", align 1
@EBUSY = common local_unnamed_addr global i16 0, align 2
@TX_CHANS = common local_unnamed_addr global i32 0, align 4
@memmap = common local_unnamed_addr global ptr null, align 8
@RATE_TYPE_ACCESS = common local_unnamed_addr global i32 0, align 4
@PCR_TIMER_ACCESS = common local_unnamed_addr global i32 0, align 4
@BUFFER_PTR_MASK = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [31 x i8] c"TX buffer pointers are broken!\00", align 1
@.str.4 = private unnamed_addr constant [38 x i8] c"TX buffer pointers are: rd %x, wr %x.\00", align 1
@DBG_QOS = common local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [17 x i8] c"tx_channel: aal0\00", align 1
@CHANNEL_TYPE_RAW_CELLS = common local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [18 x i8] c"tx_channel: aal34\00", align 1
@CHANNEL_TYPE_AAL3_4 = common local_unnamed_addr global i32 0, align 4
@CHANNEL_TYPE_AAL5 = common local_unnamed_addr global i32 0, align 4
@INITIAL_CRC = common local_unnamed_addr global i32 0, align 4
@BUCKET_CAPACITY_ACCESS = common local_unnamed_addr global i32 0, align 4
@BUCKET_FULLNESS_ACCESS = common local_unnamed_addr global i32 0, align 4
@SCR_TIMER_ACCESS = common local_unnamed_addr global i32 0, align 4
@VBR_RATE_TYPE = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @setup_idle_tx_channel], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal signext i16 @setup_idle_tx_channel(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = load i32, ptr @DBG_FLOW, align 4, !tbaa !6
%4 = load i32, ptr @DBG_TX, align 4, !tbaa !6
%5 = or i32 %4, %3
%6 = tail call i32 (i32, ptr, ...) @PRINTD(i32 noundef %5, ptr noundef nonnull @.str, ptr noundef %0) #2
br label %7
7: ; preds = %14, %2
%8 = phi i32 [ 0, %2 ], [ %19, %14 ]
%9 = load i32, ptr @TX_STATUS_OFF, align 4, !tbaa !6
%10 = tail call zeroext i16 @rd_regw(ptr noundef %0, i32 noundef %9) #2
%11 = load i16, ptr @IDLE_CHANNELS_MASK, align 2, !tbaa !10
%12 = and i16 %11, %10
%13 = icmp eq i16 %12, 0
br i1 %13, label %14, label %28
14: ; preds = %7
%15 = load i32, ptr @DBG_TX, align 4, !tbaa !6
%16 = load i32, ptr @DBG_WARN, align 4, !tbaa !6
%17 = or i32 %16, %15
%18 = tail call i32 (i32, ptr, ...) @PRINTD(i32 noundef %17, ptr noundef nonnull @.str.1) #2
%19 = add nuw nsw i32 %8, 1
%20 = icmp eq i32 %19, 101
br i1 %20, label %21, label %7, !llvm.loop !12
21: ; preds = %14
%22 = load i32, ptr @DBG_TX, align 4, !tbaa !6
%23 = load i32, ptr @DBG_ERR, align 4, !tbaa !6
%24 = or i32 %23, %22
%25 = tail call i32 (i32, ptr, ...) @PRINTD(i32 noundef %24, ptr noundef nonnull @.str.2) #2
%26 = load i16, ptr @EBUSY, align 2, !tbaa !10
%27 = sub i16 0, %26
br label %109
28: ; preds = %7
%29 = load i32, ptr %0, align 8, !tbaa !14
%30 = zext i16 %12 to i32
%31 = load i32, ptr @TX_CHANS, align 4, !tbaa !6
br label %32
32: ; preds = %28, %32
%33 = phi i32 [ %29, %28 ], [ %39, %32 ]
%34 = shl nuw i32 1, %33
%35 = and i32 %34, %30
%36 = icmp eq i32 %35, 0
%37 = add nsw i32 %33, 1
%38 = icmp eq i32 %37, %31
%39 = select i1 %38, i32 0, i32 %37
br i1 %36, label %32, label %40
40: ; preds = %32
%41 = trunc i32 %33 to i16
store i32 %39, ptr %0, align 8, !tbaa !14
%42 = load ptr, ptr @memmap, align 8, !tbaa !17
%43 = load ptr, ptr %42, align 8, !tbaa !18
%44 = sext i16 %41 to i64
%45 = getelementptr inbounds %struct.TYPE_12__, ptr %43, i64 %44
%46 = load i32, ptr %1, align 8, !tbaa !20
%47 = getelementptr inbounds i8, ptr %0, i64 16
%48 = tail call i32 @spin_lock_irqsave(ptr noundef nonnull %47, i64 noundef undef) #2
%49 = getelementptr inbounds i8, ptr %0, i64 8
%50 = load ptr, ptr %49, align 8, !tbaa !23
%51 = getelementptr inbounds i32, ptr %50, i64 %44
store i32 %46, ptr %51, align 4, !tbaa !6
%52 = load i32, ptr @RATE_TYPE_ACCESS, align 4, !tbaa !6
%53 = getelementptr inbounds i8, ptr %1, i64 8
%54 = load i64, ptr %53, align 8, !tbaa !24
%55 = tail call i32 @update_tx_channel_config(ptr noundef nonnull %0, i16 noundef signext %41, i32 noundef %52, i64 noundef %54) #2
%56 = load i32, ptr @PCR_TIMER_ACCESS, align 4, !tbaa !6
%57 = getelementptr inbounds i8, ptr %1, i64 16
%58 = load i64, ptr %57, align 8, !tbaa !25
%59 = tail call i32 @update_tx_channel_config(ptr noundef nonnull %0, i16 noundef signext %41, i32 noundef %56, i64 noundef %58) #2
%60 = getelementptr inbounds i8, ptr %45, i64 8
%61 = tail call i32 @rd_mem(ptr noundef nonnull %0, ptr noundef nonnull %60) #2
%62 = load i32, ptr @BUFFER_PTR_MASK, align 4, !tbaa !6
%63 = and i32 %62, %61
%64 = getelementptr inbounds i8, ptr %45, i64 4
%65 = tail call i32 @rd_mem(ptr noundef nonnull %0, ptr noundef nonnull %64) #2
%66 = load i32, ptr @BUFFER_PTR_MASK, align 4, !tbaa !6
%67 = and i32 %66, %65
%68 = icmp eq i32 %63, %67
br i1 %68, label %74, label %69
69: ; preds = %40
%70 = load i32, ptr @DBG_TX, align 4, !tbaa !6
%71 = load i32, ptr @DBG_ERR, align 4, !tbaa !6
%72 = or i32 %71, %70
%73 = tail call i32 (i32, ptr, ...) @PRINTD(i32 noundef %72, ptr noundef nonnull @.str.3) #2
br label %74
74: ; preds = %69, %40
%75 = load i32, ptr @DBG_TX, align 4, !tbaa !6
%76 = tail call i32 (i32, ptr, ...) @PRINTD(i32 noundef %75, ptr noundef nonnull @.str.4, i32 noundef %63, i32 noundef %67) #2
%77 = getelementptr inbounds i8, ptr %1, i64 40
%78 = load i32, ptr %77, align 8, !tbaa !26
switch i32 %78, label %102 [
i32 130, label %79
i32 129, label %87
i32 128, label %95
]
79: ; preds = %74
%80 = load i32, ptr @DBG_QOS, align 4, !tbaa !6
%81 = load i32, ptr @DBG_TX, align 4, !tbaa !6
%82 = or i32 %81, %80
%83 = tail call i32 (i32, ptr, ...) @PRINTD(i32 noundef %82, ptr noundef nonnull @.str.5) #2
%84 = load i32, ptr @CHANNEL_TYPE_RAW_CELLS, align 4, !tbaa !6
%85 = or i32 %84, %63
%86 = or i32 %84, %67
br label %102
87: ; preds = %74
%88 = load i32, ptr @DBG_QOS, align 4, !tbaa !6
%89 = load i32, ptr @DBG_TX, align 4, !tbaa !6
%90 = or i32 %89, %88
%91 = tail call i32 (i32, ptr, ...) @PRINTD(i32 noundef %90, ptr noundef nonnull @.str.6) #2
%92 = load i32, ptr @CHANNEL_TYPE_AAL3_4, align 4, !tbaa !6
%93 = or i32 %92, %63
%94 = or i32 %92, %67
br label %102
95: ; preds = %74
%96 = load i32, ptr @CHANNEL_TYPE_AAL5, align 4, !tbaa !6
%97 = or i32 %96, %63
%98 = or i32 %96, %67
%99 = getelementptr inbounds i8, ptr %45, i64 12
%100 = load i32, ptr @INITIAL_CRC, align 4, !tbaa !6
%101 = tail call i32 @wr_mem(ptr noundef nonnull %0, ptr noundef nonnull %99, i32 noundef %100) #2
br label %102
102: ; preds = %74, %95, %87, %79
%103 = phi i32 [ %63, %74 ], [ %97, %95 ], [ %93, %87 ], [ %85, %79 ]
%104 = phi i32 [ %67, %74 ], [ %98, %95 ], [ %94, %87 ], [ %86, %79 ]
%105 = tail call i32 @wr_mem(ptr noundef nonnull %0, ptr noundef nonnull %60, i32 noundef %103) #2
%106 = tail call i32 @wr_mem(ptr noundef nonnull %0, ptr noundef nonnull %64, i32 noundef %104) #2
%107 = tail call i32 @wr_mem(ptr noundef nonnull %0, ptr noundef %45, i32 noundef %46) #2
%108 = tail call i32 @spin_unlock_irqrestore(ptr noundef nonnull %47, i64 noundef undef) #2
br label %109
109: ; preds = %102, %21
%110 = phi i16 [ %27, %21 ], [ %41, %102 ]
ret i16 %110
}
declare i32 @PRINTD(i32 noundef, ptr noundef, ...) local_unnamed_addr #1
declare zeroext i16 @rd_regw(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_lock_irqsave(ptr noundef, i64 noundef) local_unnamed_addr #1
declare i32 @update_tx_channel_config(ptr noundef, i16 noundef signext, i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @rd_mem(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @wr_mem(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irqrestore(ptr noundef, i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"short", !8, i64 0}
!12 = distinct !{!12, !13}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!15, !7, i64 0}
!15 = !{!"TYPE_14__", !7, i64 0, !16, i64 8, !7, i64 16}
!16 = !{!"any pointer", !8, i64 0}
!17 = !{!16, !16, i64 0}
!18 = !{!19, !16, i64 0}
!19 = !{!"TYPE_11__", !16, i64 0}
!20 = !{!21, !7, i64 0}
!21 = !{!"TYPE_13__", !7, i64 0, !22, i64 8, !22, i64 16, !22, i64 24, !22, i64 32, !7, i64 40}
!22 = !{!"long", !8, i64 0}
!23 = !{!15, !16, i64 8}
!24 = !{!21, !22, i64 8}
!25 = !{!21, !22, i64 16}
!26 = !{!21, !7, i64 40}
| fastsocket_kernel_drivers_atm_extr_horizon.c_setup_idle_tx_channel |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/aquantia/atlantic/hw_atl/extr_hw_atl_utils_fw2x.c_aq_fw2x_set_power.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/aquantia/atlantic/hw_atl/extr_hw_atl_utils_fw2x.c_aq_fw2x_set_power.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@AQ_NIC_WOL_ENABLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @aq_fw2x_set_power], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @aq_fw2x_set_power(ptr noundef %0, i32 %1, ptr noundef %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !5
%5 = load i32, ptr %4, align 4, !tbaa !10
%6 = load i32, ptr @AQ_NIC_WOL_ENABLED, align 4, !tbaa !13
%7 = and i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %3
%10 = tail call i32 @aq_fw2x_set_sleep_proxy(ptr noundef nonnull %0, ptr noundef %2) #2
%11 = icmp slt i32 %10, 0
br i1 %11, label %14, label %12
12: ; preds = %9
%13 = tail call i32 @aq_fw2x_set_wol_params(ptr noundef nonnull %0, ptr noundef %2) #2
br label %14
14: ; preds = %3, %12, %9
%15 = phi i32 [ %10, %9 ], [ %13, %12 ], [ 0, %3 ]
ret i32 %15
}
declare i32 @aq_fw2x_set_sleep_proxy(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @aq_fw2x_set_wol_params(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"aq_hw_s", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_2__", !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!12, !12, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/aquantia/atlantic/hw_atl/extr_hw_atl_utils_fw2x.c_aq_fw2x_set_power.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/aquantia/atlantic/hw_atl/extr_hw_atl_utils_fw2x.c_aq_fw2x_set_power.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@AQ_NIC_WOL_ENABLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @aq_fw2x_set_power], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @aq_fw2x_set_power(ptr noundef %0, i32 %1, ptr noundef %2) #0 {
%4 = load ptr, ptr %0, align 8, !tbaa !6
%5 = load i32, ptr %4, align 4, !tbaa !11
%6 = load i32, ptr @AQ_NIC_WOL_ENABLED, align 4, !tbaa !14
%7 = and i32 %6, %5
%8 = icmp eq i32 %7, 0
br i1 %8, label %14, label %9
9: ; preds = %3
%10 = tail call i32 @aq_fw2x_set_sleep_proxy(ptr noundef nonnull %0, ptr noundef %2) #2
%11 = icmp slt i32 %10, 0
br i1 %11, label %14, label %12
12: ; preds = %9
%13 = tail call i32 @aq_fw2x_set_wol_params(ptr noundef nonnull %0, ptr noundef %2) #2
br label %14
14: ; preds = %3, %12, %9
%15 = phi i32 [ %10, %9 ], [ %13, %12 ], [ 0, %3 ]
ret i32 %15
}
declare i32 @aq_fw2x_set_sleep_proxy(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @aq_fw2x_set_wol_params(ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"aq_hw_s", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_2__", !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!13, !13, i64 0}
| linux_drivers_net_ethernet_aquantia_atlantic_hw_atl_extr_hw_atl_utils_fw2x.c_aq_fw2x_set_power |
; ModuleID = 'AnghaBench/fastsocket/kernel/arch/powerpc/kernel/extr_cacheinfo.c_shared_cpu_map_show.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/powerpc/kernel/extr_cacheinfo.c_shared_cpu_map_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PAGE_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @shared_cpu_map_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @shared_cpu_map_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @kobj_to_cache_index_dir(ptr noundef %0) #2
%5 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !5
%6 = icmp sgt i32 %5, 3
br i1 %6, label %7, label %16
7: ; preds = %3
%8 = add nsw i32 %5, -2
%9 = load ptr, ptr %4, align 8, !tbaa !9
%10 = tail call i32 @cpumask_scnprintf(ptr noundef %2, i32 noundef %8, ptr noundef %9) #2
%11 = add nsw i32 %10, 1
%12 = sext i32 %10 to i64
%13 = getelementptr inbounds i8, ptr %2, i64 %12
store i8 10, ptr %13, align 1, !tbaa !12
%14 = sext i32 %11 to i64
%15 = getelementptr inbounds i8, ptr %2, i64 %14
store i8 0, ptr %15, align 1, !tbaa !12
br label %16
16: ; preds = %7, %3
%17 = phi i32 [ %11, %7 ], [ 0, %3 ]
ret i32 %17
}
declare ptr @kobj_to_cache_index_dir(ptr noundef) local_unnamed_addr #1
declare i32 @cpumask_scnprintf(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"cache_index_dir", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/arch/powerpc/kernel/extr_cacheinfo.c_shared_cpu_map_show.c'
source_filename = "AnghaBench/fastsocket/kernel/arch/powerpc/kernel/extr_cacheinfo.c_shared_cpu_map_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PAGE_SIZE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @shared_cpu_map_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @shared_cpu_map_show(ptr noundef %0, ptr nocapture readnone %1, ptr noundef %2) #0 {
%4 = tail call ptr @kobj_to_cache_index_dir(ptr noundef %0) #2
%5 = load i32, ptr @PAGE_SIZE, align 4, !tbaa !6
%6 = icmp sgt i32 %5, 3
br i1 %6, label %7, label %16
7: ; preds = %3
%8 = add nsw i32 %5, -2
%9 = load ptr, ptr %4, align 8, !tbaa !10
%10 = tail call i32 @cpumask_scnprintf(ptr noundef %2, i32 noundef %8, ptr noundef %9) #2
%11 = add nsw i32 %10, 1
%12 = sext i32 %10 to i64
%13 = getelementptr inbounds i8, ptr %2, i64 %12
store i8 10, ptr %13, align 1, !tbaa !13
%14 = sext i32 %11 to i64
%15 = getelementptr inbounds i8, ptr %2, i64 %14
store i8 0, ptr %15, align 1, !tbaa !13
br label %16
16: ; preds = %7, %3
%17 = phi i32 [ %11, %7 ], [ 0, %3 ]
ret i32 %17
}
declare ptr @kobj_to_cache_index_dir(ptr noundef) local_unnamed_addr #1
declare i32 @cpumask_scnprintf(ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"cache_index_dir", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!8, !8, i64 0}
| fastsocket_kernel_arch_powerpc_kernel_extr_cacheinfo.c_shared_cpu_map_show |
; ModuleID = 'AnghaBench/radare2/libr/anal/extr_esil2reil.c_reil_mem_inceq8.c'
source_filename = "AnghaBench/radare2/libr/anal/extr_esil2reil.c_reil_mem_inceq8.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @reil_mem_inceq8], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @reil_mem_inceq8(ptr noundef %0) #0 {
%2 = tail call i32 @reil_mem_inceq_n(ptr noundef %0, i32 noundef 8) #2
ret i32 %2
}
declare i32 @reil_mem_inceq_n(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/radare2/libr/anal/extr_esil2reil.c_reil_mem_inceq8.c'
source_filename = "AnghaBench/radare2/libr/anal/extr_esil2reil.c_reil_mem_inceq8.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @reil_mem_inceq8], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @reil_mem_inceq8(ptr noundef %0) #0 {
%2 = tail call i32 @reil_mem_inceq_n(ptr noundef %0, i32 noundef 8) #2
ret i32 %2
}
declare i32 @reil_mem_inceq_n(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| radare2_libr_anal_extr_esil2reil.c_reil_mem_inceq8 |
; ModuleID = 'AnghaBench/hashcat/src/extr_backend.c_hc_clEnqueueWriteBuffer.c'
source_filename = "AnghaBench/hashcat/src/extr_backend.c_hc_clEnqueueWriteBuffer.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@CL_SUCCESS = dso_local local_unnamed_addr constant i64 0, align 8
@.str = private unnamed_addr constant [27 x i8] c"clEnqueueWriteBuffer(): %s\00", align 1
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @hc_clEnqueueWriteBuffer(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i64 noundef %4, i64 noundef %5, ptr noundef %6, i32 noundef %7, ptr noundef %8, ptr noundef %9) local_unnamed_addr #0 {
%11 = load ptr, ptr %0, align 8, !tbaa !5
%12 = load i64, ptr %11, align 8, !tbaa !10
%13 = inttoptr i64 %12 to ptr
%14 = load ptr, ptr %13, align 8, !tbaa !13
%15 = tail call i64 %14(i32 noundef %1, i32 noundef %2, i32 noundef %3, i64 noundef %4, i64 noundef %5, ptr noundef %6, i32 noundef %7, ptr noundef %8, ptr noundef %9) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %20, label %17
17: ; preds = %10
%18 = tail call i32 @val2cstr_cl(i64 noundef %15) #2
%19 = tail call i32 @event_log_error(ptr noundef nonnull %0, ptr noundef nonnull @.str, i32 noundef %18) #2
br label %20
20: ; preds = %10, %17
%21 = phi i32 [ -1, %17 ], [ 0, %10 ]
ret i32 %21
}
declare i32 @event_log_error(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @val2cstr_cl(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"TYPE_6__", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_7__", !12, i64 0}
!12 = !{!"long", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_8__", !7, i64 0}
| ; ModuleID = 'AnghaBench/hashcat/src/extr_backend.c_hc_clEnqueueWriteBuffer.c'
source_filename = "AnghaBench/hashcat/src/extr_backend.c_hc_clEnqueueWriteBuffer.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@CL_SUCCESS = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [27 x i8] c"clEnqueueWriteBuffer(): %s\00", align 1
; Function Attrs: nounwind ssp uwtable(sync)
define range(i32 -1, 1) i32 @hc_clEnqueueWriteBuffer(ptr noundef %0, i32 noundef %1, i32 noundef %2, i32 noundef %3, i64 noundef %4, i64 noundef %5, ptr noundef %6, i32 noundef %7, ptr noundef %8, ptr noundef %9) local_unnamed_addr #0 {
%11 = load ptr, ptr %0, align 8, !tbaa !6
%12 = load i64, ptr %11, align 8, !tbaa !11
%13 = inttoptr i64 %12 to ptr
%14 = load ptr, ptr %13, align 8, !tbaa !14
%15 = tail call i64 %14(i32 noundef %1, i32 noundef %2, i32 noundef %3, i64 noundef %4, i64 noundef %5, ptr noundef %6, i32 noundef %7, ptr noundef %8, ptr noundef %9) #2
%16 = load i64, ptr @CL_SUCCESS, align 8, !tbaa !16
%17 = icmp eq i64 %15, %16
br i1 %17, label %21, label %18
18: ; preds = %10
%19 = tail call i32 @val2cstr_cl(i64 noundef %15) #2
%20 = tail call i32 @event_log_error(ptr noundef nonnull %0, ptr noundef nonnull @.str, i32 noundef %19) #2
br label %21
21: ; preds = %10, %18
%22 = phi i32 [ -1, %18 ], [ 0, %10 ]
ret i32 %22
}
declare i32 @event_log_error(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @val2cstr_cl(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"TYPE_6__", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!12, !13, i64 0}
!12 = !{!"TYPE_7__", !13, i64 0}
!13 = !{!"long", !9, i64 0}
!14 = !{!15, !8, i64 0}
!15 = !{!"TYPE_8__", !8, i64 0}
!16 = !{!13, !13, i64 0}
| hashcat_src_extr_backend.c_hc_clEnqueueWriteBuffer |
; ModuleID = 'AnghaBench/linux/drivers/pcmcia/extr_vrc4171_card.c_pccard_set_socket.c'
source_filename = "AnghaBench/linux/drivers/pcmcia/extr_vrc4171_card.c_pccard_set_socket.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_3__ = type { i32, i32, i32, i64, i32 }
%struct.vrc4171_socket = type { i32, i32, i32 }
@CARD_MAX_SLOTS = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@vrc4171_sockets = dso_local local_unnamed_addr global ptr null, align 8
@CARD_VOLTAGE_SELECT = dso_local local_unnamed_addr global i32 0, align 4
@POWER_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@VPP_GET_VCC = dso_local local_unnamed_addr global i32 0, align 4
@SS_OUTPUT_ENA = dso_local local_unnamed_addr global i32 0, align 4
@I365_PWR_OUT = dso_local local_unnamed_addr global i32 0, align 4
@I365_POWER = dso_local local_unnamed_addr global i32 0, align 4
@SS_IOCARD = dso_local local_unnamed_addr global i32 0, align 4
@I365_PC_IOCARD = dso_local local_unnamed_addr global i32 0, align 4
@SS_RESET = dso_local local_unnamed_addr global i32 0, align 4
@I365_PC_RESET = dso_local local_unnamed_addr global i32 0, align 4
@I365_INTCTL = dso_local local_unnamed_addr global i32 0, align 4
@I365_CSCINT = dso_local local_unnamed_addr global i32 0, align 4
@I365_CSC = dso_local local_unnamed_addr global i32 0, align 4
@SS_STSCHG = dso_local local_unnamed_addr global i32 0, align 4
@I365_CSC_STSCHG = dso_local local_unnamed_addr global i32 0, align 4
@SS_BATDEAD = dso_local local_unnamed_addr global i32 0, align 4
@I365_CSC_BVD1 = dso_local local_unnamed_addr global i32 0, align 4
@SS_BATWARN = dso_local local_unnamed_addr global i32 0, align 4
@I365_CSC_BVD2 = dso_local local_unnamed_addr global i32 0, align 4
@SS_READY = dso_local local_unnamed_addr global i32 0, align 4
@I365_CSC_READY = dso_local local_unnamed_addr global i32 0, align 4
@SS_DETECT = dso_local local_unnamed_addr global i32 0, align 4
@I365_CSC_DETECT = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @pccard_set_socket], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @pccard_set_socket(ptr noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %16, label %4
4: ; preds = %2
%5 = load i32, ptr %0, align 4, !tbaa !5
%6 = load i32, ptr @CARD_MAX_SLOTS, align 4, !tbaa !10
%7 = icmp ult i32 %5, %6
br i1 %7, label %8, label %16
8: ; preds = %4
%9 = load i32, ptr %1, align 8, !tbaa !11
%10 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 1
%11 = load i32, ptr %10, align 4, !tbaa !14
%12 = icmp eq i32 %9, %11
%13 = icmp eq i32 %9, 0
%14 = or i1 %13, %12
br i1 %14, label %15, label %16
15: ; preds = %8
switch i32 %11, label %16 [
i32 50, label %19
i32 33, label %19
i32 0, label %19
]
16: ; preds = %15, %8, %4, %2
%17 = load i32, ptr @EINVAL, align 4, !tbaa !10
%18 = sub nsw i32 0, %17
br label %124
19: ; preds = %15, %15, %15
%20 = load ptr, ptr @vrc4171_sockets, align 8, !tbaa !15
%21 = zext i32 %5 to i64
%22 = getelementptr inbounds %struct.vrc4171_socket, ptr %20, i64 %21, i32 2
%23 = tail call i32 @spin_lock_irq(ptr noundef nonnull %22) #2
%24 = load i32, ptr %10, align 4, !tbaa !14
%25 = tail call i32 @set_Vcc_value(i32 noundef %24) #2
%26 = load i32, ptr @CARD_VOLTAGE_SELECT, align 4, !tbaa !10
%27 = tail call i32 @exca_write_byte(i32 noundef %5, i32 noundef %26, i32 noundef %25) #2
%28 = load i32, ptr @POWER_ENABLE, align 4, !tbaa !10
%29 = load i32, ptr %1, align 8, !tbaa !11
%30 = load i32, ptr %10, align 4, !tbaa !14
%31 = icmp eq i32 %29, %30
%32 = load i32, ptr @VPP_GET_VCC, align 4
%33 = select i1 %31, i32 %32, i32 0
%34 = or i32 %33, %28
%35 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 2
%36 = load i32, ptr %35, align 8, !tbaa !17
%37 = load i32, ptr @SS_OUTPUT_ENA, align 4, !tbaa !10
%38 = and i32 %37, %36
%39 = icmp eq i32 %38, 0
%40 = load i32, ptr @I365_PWR_OUT, align 4
%41 = select i1 %39, i32 0, i32 %40
%42 = or i32 %34, %41
%43 = load i32, ptr @I365_POWER, align 4, !tbaa !10
%44 = tail call i32 @exca_write_byte(i32 noundef %5, i32 noundef %43, i32 noundef %42) #2
%45 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 3
%46 = load i64, ptr %45, align 8, !tbaa !18
%47 = icmp eq i64 %46, 0
br i1 %47, label %51, label %48
48: ; preds = %19
%49 = getelementptr inbounds %struct.vrc4171_socket, ptr %20, i64 %21
%50 = load i32, ptr %49, align 4, !tbaa !19
br label %51
51: ; preds = %48, %19
%52 = phi i32 [ %50, %48 ], [ 0, %19 ]
%53 = load i32, ptr %35, align 8, !tbaa !17
%54 = load i32, ptr @SS_IOCARD, align 4, !tbaa !10
%55 = and i32 %54, %53
%56 = icmp eq i32 %55, 0
%57 = load i32, ptr @I365_PC_IOCARD, align 4
%58 = select i1 %56, i32 0, i32 %57
%59 = or i32 %58, %52
%60 = load i32, ptr @SS_RESET, align 4, !tbaa !10
%61 = and i32 %60, %53
%62 = icmp eq i32 %61, 0
%63 = load i32, ptr @I365_PC_RESET, align 4, !tbaa !10
%64 = xor i32 %63, -1
%65 = and i32 %59, %64
%66 = or i32 %63, %59
%67 = select i1 %62, i32 %66, i32 %65
%68 = load i32, ptr @I365_INTCTL, align 4, !tbaa !10
%69 = tail call i32 @exca_write_byte(i32 noundef %5, i32 noundef %68, i32 noundef %67) #2
%70 = load i32, ptr @I365_CSCINT, align 4, !tbaa !10
%71 = tail call i32 @exca_write_byte(i32 noundef %5, i32 noundef %70, i32 noundef 0) #2
%72 = load i32, ptr @I365_CSC, align 4, !tbaa !10
%73 = tail call i32 @exca_read_byte(i32 noundef %5, i32 noundef %72) #2
%74 = getelementptr inbounds %struct.TYPE_3__, ptr %1, i64 0, i32 4
%75 = load i32, ptr %74, align 8, !tbaa !21
%76 = icmp eq i32 %75, 0
br i1 %76, label %81, label %77
77: ; preds = %51
%78 = getelementptr inbounds %struct.vrc4171_socket, ptr %20, i64 %21, i32 1
%79 = load i32, ptr %78, align 4, !tbaa !22
%80 = shl i32 %79, 8
br label %81
81: ; preds = %77, %51
%82 = phi i32 [ %80, %77 ], [ 0, %51 ]
%83 = load i32, ptr %35, align 8, !tbaa !17
%84 = load i32, ptr @SS_IOCARD, align 4, !tbaa !10
%85 = and i32 %84, %83
%86 = icmp eq i32 %85, 0
br i1 %86, label %94, label %87
87: ; preds = %81
%88 = load i32, ptr @SS_STSCHG, align 4, !tbaa !10
%89 = and i32 %88, %75
%90 = icmp eq i32 %89, 0
br i1 %90, label %107, label %91
91: ; preds = %87
%92 = load i32, ptr @I365_CSC_STSCHG, align 4, !tbaa !10
%93 = or i32 %92, %82
br label %107
94: ; preds = %81
%95 = load i32, ptr @SS_BATDEAD, align 4, !tbaa !10
%96 = and i32 %95, %75
%97 = icmp eq i32 %96, 0
%98 = load i32, ptr @I365_CSC_BVD1, align 4
%99 = select i1 %97, i32 0, i32 %98
%100 = or i32 %99, %82
%101 = load i32, ptr @SS_BATWARN, align 4, !tbaa !10
%102 = and i32 %101, %75
%103 = icmp eq i32 %102, 0
br i1 %103, label %107, label %104
104: ; preds = %94
%105 = load i32, ptr @I365_CSC_BVD2, align 4, !tbaa !10
%106 = or i32 %105, %100
br label %107
107: ; preds = %94, %104, %87, %91
%108 = phi i32 [ %93, %91 ], [ %82, %87 ], [ %106, %104 ], [ %100, %94 ]
%109 = load i32, ptr @SS_READY, align 4, !tbaa !10
%110 = and i32 %109, %75
%111 = icmp eq i32 %110, 0
%112 = load i32, ptr @I365_CSC_READY, align 4
%113 = select i1 %111, i32 0, i32 %112
%114 = or i32 %113, %108
%115 = load i32, ptr @SS_DETECT, align 4, !tbaa !10
%116 = and i32 %115, %75
%117 = icmp eq i32 %116, 0
%118 = load i32, ptr @I365_CSC_DETECT, align 4
%119 = select i1 %117, i32 0, i32 %118
%120 = or i32 %114, %119
%121 = load i32, ptr @I365_CSCINT, align 4, !tbaa !10
%122 = tail call i32 @exca_write_byte(i32 noundef %5, i32 noundef %121, i32 noundef %120) #2
%123 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %22) #2
br label %124
124: ; preds = %107, %16
%125 = phi i32 [ %18, %16 ], [ 0, %107 ]
ret i32 %125
}
declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @set_Vcc_value(i32 noundef) local_unnamed_addr #1
declare i32 @exca_write_byte(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @exca_read_byte(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"pcmcia_socket", !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!7, !7, i64 0}
!11 = !{!12, !7, i64 0}
!12 = !{!"TYPE_3__", !7, i64 0, !7, i64 4, !7, i64 8, !13, i64 16, !7, i64 24}
!13 = !{!"long", !8, i64 0}
!14 = !{!12, !7, i64 4}
!15 = !{!16, !16, i64 0}
!16 = !{!"any pointer", !8, i64 0}
!17 = !{!12, !7, i64 8}
!18 = !{!12, !13, i64 16}
!19 = !{!20, !7, i64 0}
!20 = !{!"vrc4171_socket", !7, i64 0, !7, i64 4, !7, i64 8}
!21 = !{!12, !7, i64 24}
!22 = !{!20, !7, i64 4}
| ; ModuleID = 'AnghaBench/linux/drivers/pcmcia/extr_vrc4171_card.c_pccard_set_socket.c'
source_filename = "AnghaBench/linux/drivers/pcmcia/extr_vrc4171_card.c_pccard_set_socket.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.vrc4171_socket = type { i32, i32, i32 }
@CARD_MAX_SLOTS = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@vrc4171_sockets = common local_unnamed_addr global ptr null, align 8
@CARD_VOLTAGE_SELECT = common local_unnamed_addr global i32 0, align 4
@POWER_ENABLE = common local_unnamed_addr global i32 0, align 4
@VPP_GET_VCC = common local_unnamed_addr global i32 0, align 4
@SS_OUTPUT_ENA = common local_unnamed_addr global i32 0, align 4
@I365_PWR_OUT = common local_unnamed_addr global i32 0, align 4
@I365_POWER = common local_unnamed_addr global i32 0, align 4
@SS_IOCARD = common local_unnamed_addr global i32 0, align 4
@I365_PC_IOCARD = common local_unnamed_addr global i32 0, align 4
@SS_RESET = common local_unnamed_addr global i32 0, align 4
@I365_PC_RESET = common local_unnamed_addr global i32 0, align 4
@I365_INTCTL = common local_unnamed_addr global i32 0, align 4
@I365_CSCINT = common local_unnamed_addr global i32 0, align 4
@I365_CSC = common local_unnamed_addr global i32 0, align 4
@SS_STSCHG = common local_unnamed_addr global i32 0, align 4
@I365_CSC_STSCHG = common local_unnamed_addr global i32 0, align 4
@SS_BATDEAD = common local_unnamed_addr global i32 0, align 4
@I365_CSC_BVD1 = common local_unnamed_addr global i32 0, align 4
@SS_BATWARN = common local_unnamed_addr global i32 0, align 4
@I365_CSC_BVD2 = common local_unnamed_addr global i32 0, align 4
@SS_READY = common local_unnamed_addr global i32 0, align 4
@I365_CSC_READY = common local_unnamed_addr global i32 0, align 4
@SS_DETECT = common local_unnamed_addr global i32 0, align 4
@I365_CSC_DETECT = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @pccard_set_socket], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 -2147483647, -2147483648) i32 @pccard_set_socket(ptr noundef readonly %0, ptr nocapture noundef readonly %1) #0 {
%3 = icmp eq ptr %0, null
br i1 %3, label %16, label %4
4: ; preds = %2
%5 = load i32, ptr %0, align 4, !tbaa !6
%6 = load i32, ptr @CARD_MAX_SLOTS, align 4, !tbaa !11
%7 = icmp ult i32 %5, %6
br i1 %7, label %8, label %16
8: ; preds = %4
%9 = load i32, ptr %1, align 8, !tbaa !12
%10 = getelementptr inbounds i8, ptr %1, i64 4
%11 = load i32, ptr %10, align 4, !tbaa !15
%12 = icmp eq i32 %9, %11
%13 = icmp eq i32 %9, 0
%14 = or i1 %13, %12
br i1 %14, label %15, label %16
15: ; preds = %8
switch i32 %11, label %16 [
i32 50, label %19
i32 33, label %19
i32 0, label %19
]
16: ; preds = %15, %8, %4, %2
%17 = load i32, ptr @EINVAL, align 4, !tbaa !11
%18 = sub nsw i32 0, %17
br label %124
19: ; preds = %15, %15, %15
%20 = load ptr, ptr @vrc4171_sockets, align 8, !tbaa !16
%21 = zext i32 %5 to i64
%22 = getelementptr inbounds %struct.vrc4171_socket, ptr %20, i64 %21
%23 = getelementptr inbounds i8, ptr %22, i64 8
%24 = tail call i32 @spin_lock_irq(ptr noundef nonnull %23) #2
%25 = load i32, ptr %10, align 4, !tbaa !15
%26 = tail call i32 @set_Vcc_value(i32 noundef %25) #2
%27 = load i32, ptr @CARD_VOLTAGE_SELECT, align 4, !tbaa !11
%28 = tail call i32 @exca_write_byte(i32 noundef %5, i32 noundef %27, i32 noundef %26) #2
%29 = load i32, ptr @POWER_ENABLE, align 4, !tbaa !11
%30 = load i32, ptr %1, align 8, !tbaa !12
%31 = load i32, ptr %10, align 4, !tbaa !15
%32 = icmp eq i32 %30, %31
%33 = load i32, ptr @VPP_GET_VCC, align 4
%34 = select i1 %32, i32 %33, i32 0
%35 = or i32 %34, %29
%36 = getelementptr inbounds i8, ptr %1, i64 8
%37 = load i32, ptr %36, align 8, !tbaa !18
%38 = load i32, ptr @SS_OUTPUT_ENA, align 4, !tbaa !11
%39 = and i32 %38, %37
%40 = icmp eq i32 %39, 0
%41 = load i32, ptr @I365_PWR_OUT, align 4
%42 = select i1 %40, i32 0, i32 %41
%43 = or i32 %35, %42
%44 = load i32, ptr @I365_POWER, align 4, !tbaa !11
%45 = tail call i32 @exca_write_byte(i32 noundef %5, i32 noundef %44, i32 noundef %43) #2
%46 = getelementptr inbounds i8, ptr %1, i64 16
%47 = load i64, ptr %46, align 8, !tbaa !19
%48 = icmp eq i64 %47, 0
br i1 %48, label %51, label %49
49: ; preds = %19
%50 = load i32, ptr %22, align 4, !tbaa !20
br label %51
51: ; preds = %49, %19
%52 = phi i32 [ %50, %49 ], [ 0, %19 ]
%53 = load i32, ptr %36, align 8, !tbaa !18
%54 = load i32, ptr @SS_IOCARD, align 4, !tbaa !11
%55 = and i32 %54, %53
%56 = icmp eq i32 %55, 0
%57 = load i32, ptr @I365_PC_IOCARD, align 4
%58 = select i1 %56, i32 0, i32 %57
%59 = or i32 %58, %52
%60 = load i32, ptr @SS_RESET, align 4, !tbaa !11
%61 = and i32 %60, %53
%62 = icmp eq i32 %61, 0
%63 = load i32, ptr @I365_PC_RESET, align 4, !tbaa !11
%64 = xor i32 %63, -1
%65 = and i32 %59, %64
%66 = or i32 %63, %59
%67 = select i1 %62, i32 %66, i32 %65
%68 = load i32, ptr @I365_INTCTL, align 4, !tbaa !11
%69 = tail call i32 @exca_write_byte(i32 noundef %5, i32 noundef %68, i32 noundef %67) #2
%70 = load i32, ptr @I365_CSCINT, align 4, !tbaa !11
%71 = tail call i32 @exca_write_byte(i32 noundef %5, i32 noundef %70, i32 noundef 0) #2
%72 = load i32, ptr @I365_CSC, align 4, !tbaa !11
%73 = tail call i32 @exca_read_byte(i32 noundef %5, i32 noundef %72) #2
%74 = getelementptr inbounds i8, ptr %1, i64 24
%75 = load i32, ptr %74, align 8, !tbaa !22
%76 = icmp eq i32 %75, 0
br i1 %76, label %81, label %77
77: ; preds = %51
%78 = getelementptr inbounds i8, ptr %22, i64 4
%79 = load i32, ptr %78, align 4, !tbaa !23
%80 = shl i32 %79, 8
br label %81
81: ; preds = %77, %51
%82 = phi i32 [ %80, %77 ], [ 0, %51 ]
%83 = load i32, ptr %36, align 8, !tbaa !18
%84 = load i32, ptr @SS_IOCARD, align 4, !tbaa !11
%85 = and i32 %84, %83
%86 = icmp eq i32 %85, 0
br i1 %86, label %94, label %87
87: ; preds = %81
%88 = load i32, ptr @SS_STSCHG, align 4, !tbaa !11
%89 = and i32 %88, %75
%90 = icmp eq i32 %89, 0
br i1 %90, label %107, label %91
91: ; preds = %87
%92 = load i32, ptr @I365_CSC_STSCHG, align 4, !tbaa !11
%93 = or i32 %92, %82
br label %107
94: ; preds = %81
%95 = load i32, ptr @SS_BATDEAD, align 4, !tbaa !11
%96 = and i32 %95, %75
%97 = icmp eq i32 %96, 0
%98 = load i32, ptr @I365_CSC_BVD1, align 4
%99 = select i1 %97, i32 0, i32 %98
%100 = or i32 %99, %82
%101 = load i32, ptr @SS_BATWARN, align 4, !tbaa !11
%102 = and i32 %101, %75
%103 = icmp eq i32 %102, 0
br i1 %103, label %107, label %104
104: ; preds = %94
%105 = load i32, ptr @I365_CSC_BVD2, align 4, !tbaa !11
%106 = or i32 %105, %100
br label %107
107: ; preds = %94, %104, %87, %91
%108 = phi i32 [ %93, %91 ], [ %82, %87 ], [ %106, %104 ], [ %100, %94 ]
%109 = load i32, ptr @SS_READY, align 4, !tbaa !11
%110 = and i32 %109, %75
%111 = icmp eq i32 %110, 0
%112 = load i32, ptr @I365_CSC_READY, align 4
%113 = select i1 %111, i32 0, i32 %112
%114 = or i32 %113, %108
%115 = load i32, ptr @SS_DETECT, align 4, !tbaa !11
%116 = and i32 %115, %75
%117 = icmp eq i32 %116, 0
%118 = load i32, ptr @I365_CSC_DETECT, align 4
%119 = select i1 %117, i32 0, i32 %118
%120 = or i32 %114, %119
%121 = load i32, ptr @I365_CSCINT, align 4, !tbaa !11
%122 = tail call i32 @exca_write_byte(i32 noundef %5, i32 noundef %121, i32 noundef %120) #2
%123 = tail call i32 @spin_unlock_irq(ptr noundef nonnull %23) #2
br label %124
124: ; preds = %107, %16
%125 = phi i32 [ %18, %16 ], [ 0, %107 ]
ret i32 %125
}
declare i32 @spin_lock_irq(ptr noundef) local_unnamed_addr #1
declare i32 @set_Vcc_value(i32 noundef) local_unnamed_addr #1
declare i32 @exca_write_byte(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @exca_read_byte(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @spin_unlock_irq(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"pcmcia_socket", !8, i64 0}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!8, !8, i64 0}
!12 = !{!13, !8, i64 0}
!13 = !{!"TYPE_3__", !8, i64 0, !8, i64 4, !8, i64 8, !14, i64 16, !8, i64 24}
!14 = !{!"long", !9, i64 0}
!15 = !{!13, !8, i64 4}
!16 = !{!17, !17, i64 0}
!17 = !{!"any pointer", !9, i64 0}
!18 = !{!13, !8, i64 8}
!19 = !{!13, !14, i64 16}
!20 = !{!21, !8, i64 0}
!21 = !{!"vrc4171_socket", !8, i64 0, !8, i64 4, !8, i64 8}
!22 = !{!13, !8, i64 24}
!23 = !{!21, !8, i64 4}
| linux_drivers_pcmcia_extr_vrc4171_card.c_pccard_set_socket |
; ModuleID = 'AnghaBench/fastsocket/kernel/fs/lockd/extr_svcproc.c_nlmsvc_proc_lock_msg.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/lockd/extr_svcproc.c_nlmsvc_proc_lock_msg.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [29 x i8] c"lockd: LOCK_MSG called\0A\00", align 1
@NLMPROC_LOCK_RES = dso_local local_unnamed_addr global i32 0, align 4
@nlmsvc_proc_lock = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @nlmsvc_proc_lock_msg], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @nlmsvc_proc_lock_msg(ptr noundef %0, ptr noundef %1, ptr nocapture readnone %2) #0 {
%4 = tail call i32 @dprintk(ptr noundef nonnull @.str) #2
%5 = load i32, ptr @NLMPROC_LOCK_RES, align 4, !tbaa !5
%6 = load i32, ptr @nlmsvc_proc_lock, align 4, !tbaa !5
%7 = tail call i32 @nlmsvc_callback(ptr noundef %0, i32 noundef %5, ptr noundef %1, i32 noundef %6) #2
ret i32 %7
}
declare i32 @dprintk(ptr noundef) local_unnamed_addr #1
declare i32 @nlmsvc_callback(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/fs/lockd/extr_svcproc.c_nlmsvc_proc_lock_msg.c'
source_filename = "AnghaBench/fastsocket/kernel/fs/lockd/extr_svcproc.c_nlmsvc_proc_lock_msg.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [29 x i8] c"lockd: LOCK_MSG called\0A\00", align 1
@NLMPROC_LOCK_RES = common local_unnamed_addr global i32 0, align 4
@nlmsvc_proc_lock = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @nlmsvc_proc_lock_msg], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @nlmsvc_proc_lock_msg(ptr noundef %0, ptr noundef %1, ptr nocapture readnone %2) #0 {
%4 = tail call i32 @dprintk(ptr noundef nonnull @.str) #2
%5 = load i32, ptr @NLMPROC_LOCK_RES, align 4, !tbaa !6
%6 = load i32, ptr @nlmsvc_proc_lock, align 4, !tbaa !6
%7 = tail call i32 @nlmsvc_callback(ptr noundef %0, i32 noundef %5, ptr noundef %1, i32 noundef %6) #2
ret i32 %7
}
declare i32 @dprintk(ptr noundef) local_unnamed_addr #1
declare i32 @nlmsvc_callback(ptr noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| fastsocket_kernel_fs_lockd_extr_svcproc.c_nlmsvc_proc_lock_msg |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/bnx2x/extr_bnx2x_main.c_bnx2x_eeh_nic_unload.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/bnx2x/extr_bnx2x_main.c_bnx2x_eeh_nic_unload.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.bnx2x = type { i32, i32, i32, i32, i32, i32, i32, i32 }
@BNX2X_STATE_CLOSING_WAIT4_HALT = dso_local local_unnamed_addr global i32 0, align 4
@BNX2X_RX_MODE_NONE = dso_local local_unnamed_addr global i32 0, align 4
@CNIC_CTL_STOP_CMD = dso_local local_unnamed_addr global i32 0, align 4
@STATS_STATE_DISABLED = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @bnx2x_eeh_nic_unload], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @bnx2x_eeh_nic_unload(ptr noundef %0) #0 {
%2 = load i32, ptr @BNX2X_STATE_CLOSING_WAIT4_HALT, align 4, !tbaa !5
%3 = getelementptr inbounds %struct.bnx2x, ptr %0, i64 0, i32 7
store i32 %2, ptr %3, align 4, !tbaa !9
%4 = load i32, ptr @BNX2X_RX_MODE_NONE, align 4, !tbaa !5
%5 = getelementptr inbounds %struct.bnx2x, ptr %0, i64 0, i32 6
store i32 %4, ptr %5, align 4, !tbaa !11
%6 = tail call i64 @CNIC_LOADED(ptr noundef %0) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = load i32, ptr @CNIC_CTL_STOP_CMD, align 4, !tbaa !5
%10 = tail call i32 @bnx2x_cnic_notify(ptr noundef nonnull %0, i32 noundef %9) #2
br label %11
11: ; preds = %8, %1
%12 = tail call i32 @bnx2x_tx_disable(ptr noundef nonnull %0) #2
%13 = tail call i32 @bnx2x_del_all_napi(ptr noundef nonnull %0) #2
%14 = tail call i64 @CNIC_LOADED(ptr noundef nonnull %0) #2
%15 = icmp eq i64 %14, 0
br i1 %15, label %18, label %16
16: ; preds = %11
%17 = tail call i32 @bnx2x_del_all_napi_cnic(ptr noundef nonnull %0) #2
br label %18
18: ; preds = %16, %11
%19 = load i32, ptr %0, align 4, !tbaa !12
%20 = tail call i32 @netdev_reset_tc(i32 noundef %19) #2
%21 = getelementptr inbounds %struct.bnx2x, ptr %0, i64 0, i32 5
%22 = tail call i32 @del_timer_sync(ptr noundef nonnull %21) #2
%23 = getelementptr inbounds %struct.bnx2x, ptr %0, i64 0, i32 4
%24 = tail call i32 @cancel_delayed_work(ptr noundef nonnull %23) #2
%25 = getelementptr inbounds %struct.bnx2x, ptr %0, i64 0, i32 3
%26 = tail call i32 @cancel_delayed_work(ptr noundef nonnull %25) #2
%27 = getelementptr inbounds %struct.bnx2x, ptr %0, i64 0, i32 1
%28 = tail call i32 @spin_lock_bh(ptr noundef nonnull %27) #2
%29 = load i32, ptr @STATS_STATE_DISABLED, align 4, !tbaa !5
%30 = getelementptr inbounds %struct.bnx2x, ptr %0, i64 0, i32 2
store i32 %29, ptr %30, align 4, !tbaa !13
%31 = tail call i32 @spin_unlock_bh(ptr noundef nonnull %27) #2
%32 = tail call i32 @bnx2x_save_statistics(ptr noundef nonnull %0) #2
%33 = load i32, ptr %0, align 4, !tbaa !12
%34 = tail call i32 @netif_carrier_off(i32 noundef %33) #2
ret i32 0
}
declare i64 @CNIC_LOADED(ptr noundef) local_unnamed_addr #1
declare i32 @bnx2x_cnic_notify(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bnx2x_tx_disable(ptr noundef) local_unnamed_addr #1
declare i32 @bnx2x_del_all_napi(ptr noundef) local_unnamed_addr #1
declare i32 @bnx2x_del_all_napi_cnic(ptr noundef) local_unnamed_addr #1
declare i32 @netdev_reset_tc(i32 noundef) local_unnamed_addr #1
declare i32 @del_timer_sync(ptr noundef) local_unnamed_addr #1
declare i32 @cancel_delayed_work(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_bh(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_bh(ptr noundef) local_unnamed_addr #1
declare i32 @bnx2x_save_statistics(ptr noundef) local_unnamed_addr #1
declare i32 @netif_carrier_off(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 28}
!10 = !{!"bnx2x", !6, i64 0, !6, i64 4, !6, i64 8, !6, i64 12, !6, i64 16, !6, i64 20, !6, i64 24, !6, i64 28}
!11 = !{!10, !6, i64 24}
!12 = !{!10, !6, i64 0}
!13 = !{!10, !6, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/net/bnx2x/extr_bnx2x_main.c_bnx2x_eeh_nic_unload.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/net/bnx2x/extr_bnx2x_main.c_bnx2x_eeh_nic_unload.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@BNX2X_STATE_CLOSING_WAIT4_HALT = common local_unnamed_addr global i32 0, align 4
@BNX2X_RX_MODE_NONE = common local_unnamed_addr global i32 0, align 4
@CNIC_CTL_STOP_CMD = common local_unnamed_addr global i32 0, align 4
@STATS_STATE_DISABLED = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @bnx2x_eeh_nic_unload], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @bnx2x_eeh_nic_unload(ptr noundef %0) #0 {
%2 = load i32, ptr @BNX2X_STATE_CLOSING_WAIT4_HALT, align 4, !tbaa !6
%3 = getelementptr inbounds i8, ptr %0, i64 28
store i32 %2, ptr %3, align 4, !tbaa !10
%4 = load i32, ptr @BNX2X_RX_MODE_NONE, align 4, !tbaa !6
%5 = getelementptr inbounds i8, ptr %0, i64 24
store i32 %4, ptr %5, align 4, !tbaa !12
%6 = tail call i64 @CNIC_LOADED(ptr noundef %0) #2
%7 = icmp eq i64 %6, 0
br i1 %7, label %11, label %8
8: ; preds = %1
%9 = load i32, ptr @CNIC_CTL_STOP_CMD, align 4, !tbaa !6
%10 = tail call i32 @bnx2x_cnic_notify(ptr noundef nonnull %0, i32 noundef %9) #2
br label %11
11: ; preds = %8, %1
%12 = tail call i32 @bnx2x_tx_disable(ptr noundef nonnull %0) #2
%13 = tail call i32 @bnx2x_del_all_napi(ptr noundef nonnull %0) #2
%14 = tail call i64 @CNIC_LOADED(ptr noundef nonnull %0) #2
%15 = icmp eq i64 %14, 0
br i1 %15, label %18, label %16
16: ; preds = %11
%17 = tail call i32 @bnx2x_del_all_napi_cnic(ptr noundef nonnull %0) #2
br label %18
18: ; preds = %16, %11
%19 = load i32, ptr %0, align 4, !tbaa !13
%20 = tail call i32 @netdev_reset_tc(i32 noundef %19) #2
%21 = getelementptr inbounds i8, ptr %0, i64 20
%22 = tail call i32 @del_timer_sync(ptr noundef nonnull %21) #2
%23 = getelementptr inbounds i8, ptr %0, i64 16
%24 = tail call i32 @cancel_delayed_work(ptr noundef nonnull %23) #2
%25 = getelementptr inbounds i8, ptr %0, i64 12
%26 = tail call i32 @cancel_delayed_work(ptr noundef nonnull %25) #2
%27 = getelementptr inbounds i8, ptr %0, i64 4
%28 = tail call i32 @spin_lock_bh(ptr noundef nonnull %27) #2
%29 = load i32, ptr @STATS_STATE_DISABLED, align 4, !tbaa !6
%30 = getelementptr inbounds i8, ptr %0, i64 8
store i32 %29, ptr %30, align 4, !tbaa !14
%31 = tail call i32 @spin_unlock_bh(ptr noundef nonnull %27) #2
%32 = tail call i32 @bnx2x_save_statistics(ptr noundef nonnull %0) #2
%33 = load i32, ptr %0, align 4, !tbaa !13
%34 = tail call i32 @netif_carrier_off(i32 noundef %33) #2
ret i32 0
}
declare i64 @CNIC_LOADED(ptr noundef) local_unnamed_addr #1
declare i32 @bnx2x_cnic_notify(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @bnx2x_tx_disable(ptr noundef) local_unnamed_addr #1
declare i32 @bnx2x_del_all_napi(ptr noundef) local_unnamed_addr #1
declare i32 @bnx2x_del_all_napi_cnic(ptr noundef) local_unnamed_addr #1
declare i32 @netdev_reset_tc(i32 noundef) local_unnamed_addr #1
declare i32 @del_timer_sync(ptr noundef) local_unnamed_addr #1
declare i32 @cancel_delayed_work(ptr noundef) local_unnamed_addr #1
declare i32 @spin_lock_bh(ptr noundef) local_unnamed_addr #1
declare i32 @spin_unlock_bh(ptr noundef) local_unnamed_addr #1
declare i32 @bnx2x_save_statistics(ptr noundef) local_unnamed_addr #1
declare i32 @netif_carrier_off(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 28}
!11 = !{!"bnx2x", !7, i64 0, !7, i64 4, !7, i64 8, !7, i64 12, !7, i64 16, !7, i64 20, !7, i64 24, !7, i64 28}
!12 = !{!11, !7, i64 24}
!13 = !{!11, !7, i64 0}
!14 = !{!11, !7, i64 8}
| fastsocket_kernel_drivers_net_bnx2x_extr_bnx2x_main.c_bnx2x_eeh_nic_unload |
; ModuleID = 'AnghaBench/freebsd/sys/contrib/alpine-hal/eth/extr_al_hal_eth_main.c_al_eth_wol_disable.c'
source_filename = "AnghaBench/freebsd/sys/contrib/alpine-hal/eth/extr_al_hal_eth_main.c_al_eth_wol_disable.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local noundef i32 @al_eth_wol_disable(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
%3 = tail call i32 @al_reg_write32(ptr noundef %2, i32 noundef 0) #2
ret i32 0
}
declare i32 @al_reg_write32(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"al_hal_eth_adapter", !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/sys/contrib/alpine-hal/eth/extr_al_hal_eth_main.c_al_eth_wol_disable.c'
source_filename = "AnghaBench/freebsd/sys/contrib/alpine-hal/eth/extr_al_hal_eth_main.c_al_eth_wol_disable.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define noundef i32 @al_eth_wol_disable(ptr nocapture noundef readonly %0) local_unnamed_addr #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
%3 = tail call i32 @al_reg_write32(ptr noundef %2, i32 noundef 0) #2
ret i32 0
}
declare i32 @al_reg_write32(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"al_hal_eth_adapter", !8, i64 0}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_contrib_alpine-hal_eth_extr_al_hal_eth_main.c_al_eth_wol_disable |
; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_gfx_v9_0.c_gfx_v9_0_ngg_init.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_gfx_v9_0.c_gfx_v9_0_ngg_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, ptr, i64, i64 }
%struct.amdgpu_device = type { %struct.TYPE_6__, i32, %struct.TYPE_4__ }
%struct.TYPE_6__ = type { %struct.TYPE_5__ }
%struct.TYPE_4__ = type { i32 }
@amdgpu_ngg = dso_local local_unnamed_addr global i32 0, align 4
@GC = dso_local local_unnamed_addr global i32 0, align 4
@mmGDS_VMID0_BASE = dso_local local_unnamed_addr global i32 0, align 4
@mmGDS_VMID0_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@NGG_PRIM = dso_local local_unnamed_addr global i64 0, align 8
@amdgpu_prim_buf_per_se = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [35 x i8] c"Failed to create Primitive Buffer\0A\00", align 1
@NGG_POS = dso_local local_unnamed_addr global i64 0, align 8
@amdgpu_pos_buf_per_se = dso_local local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [34 x i8] c"Failed to create Position Buffer\0A\00", align 1
@NGG_CNTL = dso_local local_unnamed_addr global i64 0, align 8
@amdgpu_cntl_sb_buf_per_se = dso_local local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [42 x i8] c"Failed to create Control Sideband Buffer\0A\00", align 1
@amdgpu_param_buf_per_se = dso_local local_unnamed_addr global i64 0, align 8
@NGG_PARAM = dso_local local_unnamed_addr global i64 0, align 8
@.str.3 = private unnamed_addr constant [34 x i8] c"Failed to create Parameter Cache\0A\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @gfx_v9_0_ngg_init], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @gfx_v9_0_ngg_init(ptr noundef %0) #0 {
%2 = load i32, ptr @amdgpu_ngg, align 4, !tbaa !5
%3 = icmp eq i32 %2, 0
br i1 %3, label %61, label %4
4: ; preds = %1
%5 = load i32, ptr %0, align 8, !tbaa !9
%6 = icmp eq i32 %5, 1
br i1 %6, label %61, label %7
7: ; preds = %4
%8 = tail call i64 @ALIGN(i32 noundef 20, i32 noundef 64) #2
%9 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 3
store i64 %8, ptr %9, align 8, !tbaa !16
%10 = getelementptr inbounds %struct.amdgpu_device, ptr %0, i64 0, i32 2
%11 = load i32, ptr %10, align 4, !tbaa !17
%12 = trunc i64 %8 to i32
%13 = sub i32 %11, %12
store i32 %13, ptr %10, align 4, !tbaa !17
%14 = load i32, ptr @GC, align 4, !tbaa !5
%15 = load i32, ptr @mmGDS_VMID0_BASE, align 4, !tbaa !5
%16 = tail call i64 @RREG32_SOC15(i32 noundef %14, i32 noundef 0, i32 noundef %15) #2
%17 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 2
store i64 %16, ptr %17, align 8, !tbaa !18
%18 = load i32, ptr @GC, align 4, !tbaa !5
%19 = load i32, ptr @mmGDS_VMID0_SIZE, align 4, !tbaa !5
%20 = tail call i64 @RREG32_SOC15(i32 noundef %18, i32 noundef 0, i32 noundef %19) #2
%21 = load i64, ptr %17, align 8, !tbaa !18
%22 = add nsw i64 %21, %20
store i64 %22, ptr %17, align 8, !tbaa !18
%23 = getelementptr inbounds %struct.TYPE_5__, ptr %0, i64 0, i32 1
%24 = load ptr, ptr %23, align 8, !tbaa !19
%25 = load i64, ptr @NGG_PRIM, align 8, !tbaa !20
%26 = getelementptr inbounds i32, ptr %24, i64 %25
%27 = load i64, ptr @amdgpu_prim_buf_per_se, align 8, !tbaa !20
%28 = tail call i32 @gfx_v9_0_ngg_create_buf(ptr noundef nonnull %0, ptr noundef %26, i64 noundef %27, i32 noundef 65536) #2
%29 = icmp eq i32 %28, 0
br i1 %29, label %30, label %54
30: ; preds = %7
%31 = load ptr, ptr %23, align 8, !tbaa !19
%32 = load i64, ptr @NGG_POS, align 8, !tbaa !20
%33 = getelementptr inbounds i32, ptr %31, i64 %32
%34 = load i64, ptr @amdgpu_pos_buf_per_se, align 8, !tbaa !20
%35 = tail call i32 @gfx_v9_0_ngg_create_buf(ptr noundef nonnull %0, ptr noundef %33, i64 noundef %34, i32 noundef 262144) #2
%36 = icmp eq i32 %35, 0
br i1 %36, label %37, label %54
37: ; preds = %30
%38 = load ptr, ptr %23, align 8, !tbaa !19
%39 = load i64, ptr @NGG_CNTL, align 8, !tbaa !20
%40 = getelementptr inbounds i32, ptr %38, i64 %39
%41 = load i64, ptr @amdgpu_cntl_sb_buf_per_se, align 8, !tbaa !20
%42 = tail call i32 @gfx_v9_0_ngg_create_buf(ptr noundef nonnull %0, ptr noundef %40, i64 noundef %41, i32 noundef 256) #2
%43 = icmp eq i32 %42, 0
br i1 %43, label %44, label %54
44: ; preds = %37
%45 = load i64, ptr @amdgpu_param_buf_per_se, align 8, !tbaa !20
%46 = icmp slt i64 %45, 1
br i1 %46, label %53, label %47
47: ; preds = %44
%48 = load ptr, ptr %23, align 8, !tbaa !19
%49 = load i64, ptr @NGG_PARAM, align 8, !tbaa !20
%50 = getelementptr inbounds i32, ptr %48, i64 %49
%51 = tail call i32 @gfx_v9_0_ngg_create_buf(ptr noundef nonnull %0, ptr noundef %50, i64 noundef %45, i32 noundef 524288) #2
%52 = icmp eq i32 %51, 0
br i1 %52, label %53, label %54
53: ; preds = %47, %44
store i32 1, ptr %0, align 8, !tbaa !9
br label %61
54: ; preds = %47, %37, %30, %7
%55 = phi ptr [ @.str, %7 ], [ @.str.1, %30 ], [ @.str.2, %37 ], [ @.str.3, %47 ]
%56 = phi i32 [ %28, %7 ], [ %35, %30 ], [ %42, %37 ], [ %51, %47 ]
%57 = getelementptr inbounds %struct.amdgpu_device, ptr %0, i64 0, i32 1
%58 = load i32, ptr %57, align 8, !tbaa !21
%59 = tail call i32 @dev_err(i32 noundef %58, ptr noundef nonnull %55) #2
%60 = tail call i32 @gfx_v9_0_ngg_fini(ptr noundef nonnull %0) #2
br label %61
61: ; preds = %1, %4, %54, %53
%62 = phi i32 [ %56, %54 ], [ 0, %53 ], [ 0, %4 ], [ 0, %1 ]
ret i32 %62
}
declare i64 @ALIGN(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @RREG32_SOC15(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @gfx_v9_0_ngg_create_buf(ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @gfx_v9_0_ngg_fini(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"amdgpu_device", !11, i64 0, !6, i64 32, !15, i64 36}
!11 = !{!"TYPE_6__", !12, i64 0}
!12 = !{!"TYPE_5__", !6, i64 0, !13, i64 8, !14, i64 16, !14, i64 24}
!13 = !{!"any pointer", !7, i64 0}
!14 = !{!"long", !7, i64 0}
!15 = !{!"TYPE_4__", !6, i64 0}
!16 = !{!10, !14, i64 24}
!17 = !{!10, !6, i64 36}
!18 = !{!10, !14, i64 16}
!19 = !{!10, !13, i64 8}
!20 = !{!14, !14, i64 0}
!21 = !{!10, !6, i64 32}
| ; ModuleID = 'AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_gfx_v9_0.c_gfx_v9_0_ngg_init.c'
source_filename = "AnghaBench/linux/drivers/gpu/drm/amd/amdgpu/extr_gfx_v9_0.c_gfx_v9_0_ngg_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@amdgpu_ngg = common local_unnamed_addr global i32 0, align 4
@GC = common local_unnamed_addr global i32 0, align 4
@mmGDS_VMID0_BASE = common local_unnamed_addr global i32 0, align 4
@mmGDS_VMID0_SIZE = common local_unnamed_addr global i32 0, align 4
@NGG_PRIM = common local_unnamed_addr global i64 0, align 8
@amdgpu_prim_buf_per_se = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [35 x i8] c"Failed to create Primitive Buffer\0A\00", align 1
@NGG_POS = common local_unnamed_addr global i64 0, align 8
@amdgpu_pos_buf_per_se = common local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [34 x i8] c"Failed to create Position Buffer\0A\00", align 1
@NGG_CNTL = common local_unnamed_addr global i64 0, align 8
@amdgpu_cntl_sb_buf_per_se = common local_unnamed_addr global i64 0, align 8
@.str.2 = private unnamed_addr constant [42 x i8] c"Failed to create Control Sideband Buffer\0A\00", align 1
@amdgpu_param_buf_per_se = common local_unnamed_addr global i64 0, align 8
@NGG_PARAM = common local_unnamed_addr global i64 0, align 8
@.str.3 = private unnamed_addr constant [34 x i8] c"Failed to create Parameter Cache\0A\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @gfx_v9_0_ngg_init], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @gfx_v9_0_ngg_init(ptr noundef %0) #0 {
%2 = load i32, ptr @amdgpu_ngg, align 4, !tbaa !6
%3 = icmp eq i32 %2, 0
br i1 %3, label %61, label %4
4: ; preds = %1
%5 = load i32, ptr %0, align 8, !tbaa !10
%6 = icmp eq i32 %5, 1
br i1 %6, label %61, label %7
7: ; preds = %4
%8 = tail call i64 @ALIGN(i32 noundef 20, i32 noundef 64) #2
%9 = getelementptr inbounds i8, ptr %0, i64 24
store i64 %8, ptr %9, align 8, !tbaa !17
%10 = getelementptr inbounds i8, ptr %0, i64 36
%11 = load i32, ptr %10, align 4, !tbaa !18
%12 = trunc i64 %8 to i32
%13 = sub i32 %11, %12
store i32 %13, ptr %10, align 4, !tbaa !18
%14 = load i32, ptr @GC, align 4, !tbaa !6
%15 = load i32, ptr @mmGDS_VMID0_BASE, align 4, !tbaa !6
%16 = tail call i64 @RREG32_SOC15(i32 noundef %14, i32 noundef 0, i32 noundef %15) #2
%17 = getelementptr inbounds i8, ptr %0, i64 16
store i64 %16, ptr %17, align 8, !tbaa !19
%18 = load i32, ptr @GC, align 4, !tbaa !6
%19 = load i32, ptr @mmGDS_VMID0_SIZE, align 4, !tbaa !6
%20 = tail call i64 @RREG32_SOC15(i32 noundef %18, i32 noundef 0, i32 noundef %19) #2
%21 = load i64, ptr %17, align 8, !tbaa !19
%22 = add nsw i64 %21, %20
store i64 %22, ptr %17, align 8, !tbaa !19
%23 = getelementptr inbounds i8, ptr %0, i64 8
%24 = load ptr, ptr %23, align 8, !tbaa !20
%25 = load i64, ptr @NGG_PRIM, align 8, !tbaa !21
%26 = getelementptr inbounds i32, ptr %24, i64 %25
%27 = load i64, ptr @amdgpu_prim_buf_per_se, align 8, !tbaa !21
%28 = tail call i32 @gfx_v9_0_ngg_create_buf(ptr noundef nonnull %0, ptr noundef %26, i64 noundef %27, i32 noundef 65536) #2
%29 = icmp eq i32 %28, 0
br i1 %29, label %30, label %54
30: ; preds = %7
%31 = load ptr, ptr %23, align 8, !tbaa !20
%32 = load i64, ptr @NGG_POS, align 8, !tbaa !21
%33 = getelementptr inbounds i32, ptr %31, i64 %32
%34 = load i64, ptr @amdgpu_pos_buf_per_se, align 8, !tbaa !21
%35 = tail call i32 @gfx_v9_0_ngg_create_buf(ptr noundef nonnull %0, ptr noundef %33, i64 noundef %34, i32 noundef 262144) #2
%36 = icmp eq i32 %35, 0
br i1 %36, label %37, label %54
37: ; preds = %30
%38 = load ptr, ptr %23, align 8, !tbaa !20
%39 = load i64, ptr @NGG_CNTL, align 8, !tbaa !21
%40 = getelementptr inbounds i32, ptr %38, i64 %39
%41 = load i64, ptr @amdgpu_cntl_sb_buf_per_se, align 8, !tbaa !21
%42 = tail call i32 @gfx_v9_0_ngg_create_buf(ptr noundef nonnull %0, ptr noundef %40, i64 noundef %41, i32 noundef 256) #2
%43 = icmp eq i32 %42, 0
br i1 %43, label %44, label %54
44: ; preds = %37
%45 = load i64, ptr @amdgpu_param_buf_per_se, align 8, !tbaa !21
%46 = icmp slt i64 %45, 1
br i1 %46, label %53, label %47
47: ; preds = %44
%48 = load ptr, ptr %23, align 8, !tbaa !20
%49 = load i64, ptr @NGG_PARAM, align 8, !tbaa !21
%50 = getelementptr inbounds i32, ptr %48, i64 %49
%51 = tail call i32 @gfx_v9_0_ngg_create_buf(ptr noundef nonnull %0, ptr noundef %50, i64 noundef %45, i32 noundef 524288) #2
%52 = icmp eq i32 %51, 0
br i1 %52, label %53, label %54
53: ; preds = %47, %44
store i32 1, ptr %0, align 8, !tbaa !10
br label %61
54: ; preds = %47, %37, %30, %7
%55 = phi ptr [ @.str, %7 ], [ @.str.1, %30 ], [ @.str.2, %37 ], [ @.str.3, %47 ]
%56 = phi i32 [ %28, %7 ], [ %35, %30 ], [ %42, %37 ], [ %51, %47 ]
%57 = getelementptr inbounds i8, ptr %0, i64 32
%58 = load i32, ptr %57, align 8, !tbaa !22
%59 = tail call i32 @dev_err(i32 noundef %58, ptr noundef nonnull %55) #2
%60 = tail call i32 @gfx_v9_0_ngg_fini(ptr noundef nonnull %0) #2
br label %61
61: ; preds = %1, %4, %54, %53
%62 = phi i32 [ %56, %54 ], [ 0, %53 ], [ 0, %4 ], [ 0, %1 ]
ret i32 %62
}
declare i64 @ALIGN(i32 noundef, i32 noundef) local_unnamed_addr #1
declare i64 @RREG32_SOC15(i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @gfx_v9_0_ngg_create_buf(ptr noundef, ptr noundef, i64 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @dev_err(i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @gfx_v9_0_ngg_fini(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"amdgpu_device", !12, i64 0, !7, i64 32, !16, i64 36}
!12 = !{!"TYPE_6__", !13, i64 0}
!13 = !{!"TYPE_5__", !7, i64 0, !14, i64 8, !15, i64 16, !15, i64 24}
!14 = !{!"any pointer", !8, i64 0}
!15 = !{!"long", !8, i64 0}
!16 = !{!"TYPE_4__", !7, i64 0}
!17 = !{!11, !15, i64 24}
!18 = !{!11, !7, i64 36}
!19 = !{!11, !15, i64 16}
!20 = !{!11, !14, i64 8}
!21 = !{!15, !15, i64 0}
!22 = !{!11, !7, i64 32}
| linux_drivers_gpu_drm_amd_amdgpu_extr_gfx_v9_0.c_gfx_v9_0_ngg_init |
; ModuleID = 'AnghaBench/linux/drivers/media/usb/au0828/extr_au0828.h_au0828_usb_v4l2_media_release.c'
source_filename = "AnghaBench/linux/drivers/media/usb/au0828/extr_au0828.h_au0828_usb_v4l2_media_release.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @au0828_usb_v4l2_media_release], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @au0828_usb_v4l2_media_release(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/drivers/media/usb/au0828/extr_au0828.h_au0828_usb_v4l2_media_release.c'
source_filename = "AnghaBench/linux/drivers/media/usb/au0828/extr_au0828.h_au0828_usb_v4l2_media_release.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @au0828_usb_v4l2_media_release], section "llvm.metadata"
; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @au0828_usb_v4l2_media_release(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_drivers_media_usb_au0828_extr_au0828.h_au0828_usb_v4l2_media_release |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sfc/extr_siena.c_siena_probe_nic.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/sfc/extr_siena.c_siena_probe_nic.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.efx_nic = type { ptr, %struct.TYPE_5__, %struct.TYPE_4__, i32, i32, i64, ptr, ptr }
%struct.TYPE_5__ = type { i32, i32 }
%struct.TYPE_4__ = type { i32 }
@GFP_KERNEL = dso_local local_unnamed_addr global i32 0, align 4
@ENOMEM = dso_local local_unnamed_addr global i32 0, align 4
@probe = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [26 x i8] c"Siena FPGA not supported\0A\00", align 1
@ENODEV = dso_local local_unnamed_addr global i32 0, align 4
@EFX_MAX_CHANNELS = dso_local local_unnamed_addr global ptr null, align 8
@FR_AZ_CS_DEBUG = dso_local local_unnamed_addr global i32 0, align 4
@FRF_CZ_CS_PORT_NUM = dso_local local_unnamed_addr global i32 0, align 4
@RESET_TYPE_ALL = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [21 x i8] c"failed to reset NIC\0A\00", align 1
@.str.2 = private unnamed_addr constant [37 x i8] c"INT_KER at %llx (virt %p phys %llx)\0A\00", align 1
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [43 x i8] c"NVRAM is invalid therefore using defaults\0A\00", align 1
@PHY_TYPE_NONE = dso_local local_unnamed_addr global i32 0, align 4
@MDIO_PRTAD_NONE = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @siena_probe_nic], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @siena_probe_nic(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%4 = tail call ptr @kzalloc(i32 noundef 8, i32 noundef %3) #3
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, ptr @ENOMEM, align 4, !tbaa !5
%8 = sub nsw i32 0, %7
br label %90
9: ; preds = %1
store ptr %0, ptr %4, align 8, !tbaa !9
store ptr %4, ptr %0, align 8, !tbaa !12
%10 = tail call i64 @efx_farch_fpga_ver(ptr noundef nonnull %0) #3
%11 = icmp eq i64 %10, 0
br i1 %11, label %19, label %12
12: ; preds = %9
%13 = load i32, ptr @probe, align 4, !tbaa !5
%14 = getelementptr inbounds %struct.efx_nic, ptr %0, i64 0, i32 4
%15 = load i32, ptr %14, align 8, !tbaa !17
%16 = tail call i32 @netif_err(ptr noundef nonnull %0, i32 noundef %13, i32 noundef %15, ptr noundef nonnull @.str) #3
%17 = load i32, ptr @ENODEV, align 4, !tbaa !5
%18 = sub nsw i32 0, %17
br label %86
19: ; preds = %9
%20 = load ptr, ptr @EFX_MAX_CHANNELS, align 8, !tbaa !18
%21 = getelementptr inbounds %struct.efx_nic, ptr %0, i64 0, i32 7
store ptr %20, ptr %21, align 8, !tbaa !19
%22 = getelementptr inbounds %struct.efx_nic, ptr %0, i64 0, i32 6
store ptr %20, ptr %22, align 8, !tbaa !20
%23 = load i32, ptr @FR_AZ_CS_DEBUG, align 4, !tbaa !5
%24 = call i32 @efx_reado(ptr noundef nonnull %0, ptr noundef nonnull %2, i32 noundef %23) #3
%25 = load i32, ptr %2, align 4, !tbaa !5
%26 = load i32, ptr @FRF_CZ_CS_PORT_NUM, align 4, !tbaa !5
%27 = call i64 @EFX_OWORD_FIELD(i32 noundef %25, i32 noundef %26) #3
%28 = add nsw i64 %27, -1
%29 = getelementptr inbounds %struct.efx_nic, ptr %0, i64 0, i32 5
store i64 %28, ptr %29, align 8, !tbaa !21
%30 = call i32 @efx_mcdi_init(ptr noundef nonnull %0) #3
%31 = icmp eq i32 %30, 0
br i1 %31, label %32, label %86
32: ; preds = %19
%33 = load i32, ptr @RESET_TYPE_ALL, align 4, !tbaa !5
%34 = call i32 @efx_mcdi_reset(ptr noundef nonnull %0, i32 noundef %33) #3
%35 = icmp eq i32 %34, 0
br i1 %35, label %41, label %36
36: ; preds = %32
%37 = load i32, ptr @probe, align 4, !tbaa !5
%38 = getelementptr inbounds %struct.efx_nic, ptr %0, i64 0, i32 4
%39 = load i32, ptr %38, align 8, !tbaa !17
%40 = call i32 @netif_err(ptr noundef nonnull %0, i32 noundef %37, i32 noundef %39, ptr noundef nonnull @.str.1) #3
br label %82
41: ; preds = %32
%42 = call i32 @siena_init_wol(ptr noundef nonnull %0) #3
%43 = getelementptr inbounds %struct.efx_nic, ptr %0, i64 0, i32 1
%44 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !5
%45 = call i32 @efx_nic_alloc_buffer(ptr noundef nonnull %0, ptr noundef nonnull %43, i32 noundef 4, i32 noundef %44) #3
%46 = icmp eq i32 %45, 0
br i1 %46, label %47, label %82
47: ; preds = %41
%48 = load i32, ptr %43, align 8, !tbaa !22
%49 = and i32 %48, 15
%50 = call i32 @BUG_ON(i32 noundef %49) #3
%51 = load i32, ptr @probe, align 4, !tbaa !5
%52 = getelementptr inbounds %struct.efx_nic, ptr %0, i64 0, i32 4
%53 = load i32, ptr %52, align 8, !tbaa !17
%54 = load i32, ptr %43, align 8, !tbaa !22
%55 = sext i32 %54 to i64
%56 = getelementptr inbounds %struct.efx_nic, ptr %0, i64 0, i32 1, i32 1
%57 = load i32, ptr %56, align 4, !tbaa !23
%58 = call i64 @virt_to_phys(i32 noundef %57) #3
%59 = call i32 @netif_dbg(ptr noundef nonnull %0, i32 noundef %51, i32 noundef %53, ptr noundef nonnull @.str.2, i64 noundef %55, i32 noundef %57, i64 noundef %58) #3
%60 = call i32 @siena_probe_nvconfig(ptr noundef nonnull %0) #3
%61 = load i32, ptr @EINVAL, align 4, !tbaa !5
%62 = sub nsw i32 0, %61
%63 = icmp eq i32 %60, %62
br i1 %63, label %64, label %72
64: ; preds = %47
%65 = load i32, ptr @probe, align 4, !tbaa !5
%66 = load i32, ptr %52, align 8, !tbaa !17
%67 = call i32 @netif_err(ptr noundef nonnull %0, i32 noundef %65, i32 noundef %66, ptr noundef nonnull @.str.3) #3
%68 = load i32, ptr @PHY_TYPE_NONE, align 4, !tbaa !5
%69 = getelementptr inbounds %struct.efx_nic, ptr %0, i64 0, i32 3
store i32 %68, ptr %69, align 4, !tbaa !24
%70 = load i32, ptr @MDIO_PRTAD_NONE, align 4, !tbaa !5
%71 = getelementptr inbounds %struct.efx_nic, ptr %0, i64 0, i32 2
store i32 %70, ptr %71, align 8, !tbaa !25
br label %74
72: ; preds = %47
%73 = icmp eq i32 %60, 0
br i1 %73, label %74, label %79
74: ; preds = %72, %64
%75 = call i32 @efx_mcdi_mon_probe(ptr noundef nonnull %0) #3
%76 = icmp eq i32 %75, 0
br i1 %76, label %77, label %79
77: ; preds = %74
%78 = call i32 @efx_ptp_defer_probe_with_channel(ptr noundef nonnull %0) #3
br label %90
79: ; preds = %74, %72
%80 = phi i32 [ %75, %74 ], [ %60, %72 ]
%81 = call i32 @efx_nic_free_buffer(ptr noundef nonnull %0, ptr noundef nonnull %43) #3
br label %82
82: ; preds = %79, %41, %36
%83 = phi i32 [ %34, %36 ], [ %45, %41 ], [ %80, %79 ]
%84 = call i32 @efx_mcdi_detach(ptr noundef nonnull %0) #3
%85 = call i32 @efx_mcdi_fini(ptr noundef nonnull %0) #3
br label %86
86: ; preds = %19, %82, %12
%87 = phi i32 [ %18, %12 ], [ %30, %19 ], [ %83, %82 ]
%88 = load ptr, ptr %0, align 8, !tbaa !12
%89 = call i32 @kfree(ptr noundef %88) #3
br label %90
90: ; preds = %86, %77, %6
%91 = phi i32 [ %87, %86 ], [ 0, %77 ], [ %8, %6 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %91
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @efx_farch_fpga_ver(ptr noundef) local_unnamed_addr #2
declare i32 @netif_err(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @efx_reado(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @EFX_OWORD_FIELD(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @efx_mcdi_init(ptr noundef) local_unnamed_addr #2
declare i32 @efx_mcdi_reset(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @siena_init_wol(ptr noundef) local_unnamed_addr #2
declare i32 @efx_nic_alloc_buffer(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #2
declare i32 @netif_dbg(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i64 noundef, i32 noundef, i64 noundef) local_unnamed_addr #2
declare i64 @virt_to_phys(i32 noundef) local_unnamed_addr #2
declare i32 @siena_probe_nvconfig(ptr noundef) local_unnamed_addr #2
declare i32 @efx_mcdi_mon_probe(ptr noundef) local_unnamed_addr #2
declare i32 @efx_ptp_defer_probe_with_channel(ptr noundef) local_unnamed_addr #2
declare i32 @efx_nic_free_buffer(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @efx_mcdi_detach(ptr noundef) local_unnamed_addr #2
declare i32 @efx_mcdi_fini(ptr noundef) local_unnamed_addr #2
declare i32 @kfree(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"siena_nic_data", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !11, i64 0}
!13 = !{!"efx_nic", !11, i64 0, !14, i64 8, !15, i64 16, !6, i64 20, !6, i64 24, !16, i64 32, !11, i64 40, !11, i64 48}
!14 = !{!"TYPE_5__", !6, i64 0, !6, i64 4}
!15 = !{!"TYPE_4__", !6, i64 0}
!16 = !{!"long", !7, i64 0}
!17 = !{!13, !6, i64 24}
!18 = !{!11, !11, i64 0}
!19 = !{!13, !11, i64 48}
!20 = !{!13, !11, i64 40}
!21 = !{!13, !16, i64 32}
!22 = !{!13, !6, i64 8}
!23 = !{!13, !6, i64 12}
!24 = !{!13, !6, i64 20}
!25 = !{!13, !6, i64 16}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/sfc/extr_siena.c_siena_probe_nic.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/sfc/extr_siena.c_siena_probe_nic.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@GFP_KERNEL = common local_unnamed_addr global i32 0, align 4
@ENOMEM = common local_unnamed_addr global i32 0, align 4
@probe = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [26 x i8] c"Siena FPGA not supported\0A\00", align 1
@ENODEV = common local_unnamed_addr global i32 0, align 4
@EFX_MAX_CHANNELS = common local_unnamed_addr global ptr null, align 8
@FR_AZ_CS_DEBUG = common local_unnamed_addr global i32 0, align 4
@FRF_CZ_CS_PORT_NUM = common local_unnamed_addr global i32 0, align 4
@RESET_TYPE_ALL = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [21 x i8] c"failed to reset NIC\0A\00", align 1
@.str.2 = private unnamed_addr constant [37 x i8] c"INT_KER at %llx (virt %p phys %llx)\0A\00", align 1
@EINVAL = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [43 x i8] c"NVRAM is invalid therefore using defaults\0A\00", align 1
@PHY_TYPE_NONE = common local_unnamed_addr global i32 0, align 4
@MDIO_PRTAD_NONE = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @siena_probe_nic], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @siena_probe_nic(ptr noundef %0) #0 {
%2 = alloca i32, align 4
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %2) #3
%3 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%4 = tail call ptr @kzalloc(i32 noundef 8, i32 noundef %3) #3
%5 = icmp eq ptr %4, null
br i1 %5, label %6, label %9
6: ; preds = %1
%7 = load i32, ptr @ENOMEM, align 4, !tbaa !6
%8 = sub nsw i32 0, %7
br label %90
9: ; preds = %1
store ptr %0, ptr %4, align 8, !tbaa !10
store ptr %4, ptr %0, align 8, !tbaa !13
%10 = tail call i64 @efx_farch_fpga_ver(ptr noundef nonnull %0) #3
%11 = icmp eq i64 %10, 0
br i1 %11, label %19, label %12
12: ; preds = %9
%13 = load i32, ptr @probe, align 4, !tbaa !6
%14 = getelementptr inbounds i8, ptr %0, i64 24
%15 = load i32, ptr %14, align 8, !tbaa !18
%16 = tail call i32 @netif_err(ptr noundef nonnull %0, i32 noundef %13, i32 noundef %15, ptr noundef nonnull @.str) #3
%17 = load i32, ptr @ENODEV, align 4, !tbaa !6
%18 = sub nsw i32 0, %17
br label %86
19: ; preds = %9
%20 = load ptr, ptr @EFX_MAX_CHANNELS, align 8, !tbaa !19
%21 = getelementptr inbounds i8, ptr %0, i64 48
store ptr %20, ptr %21, align 8, !tbaa !20
%22 = getelementptr inbounds i8, ptr %0, i64 40
store ptr %20, ptr %22, align 8, !tbaa !21
%23 = load i32, ptr @FR_AZ_CS_DEBUG, align 4, !tbaa !6
%24 = call i32 @efx_reado(ptr noundef nonnull %0, ptr noundef nonnull %2, i32 noundef %23) #3
%25 = load i32, ptr %2, align 4, !tbaa !6
%26 = load i32, ptr @FRF_CZ_CS_PORT_NUM, align 4, !tbaa !6
%27 = call i64 @EFX_OWORD_FIELD(i32 noundef %25, i32 noundef %26) #3
%28 = add nsw i64 %27, -1
%29 = getelementptr inbounds i8, ptr %0, i64 32
store i64 %28, ptr %29, align 8, !tbaa !22
%30 = call i32 @efx_mcdi_init(ptr noundef nonnull %0) #3
%31 = icmp eq i32 %30, 0
br i1 %31, label %32, label %86
32: ; preds = %19
%33 = load i32, ptr @RESET_TYPE_ALL, align 4, !tbaa !6
%34 = call i32 @efx_mcdi_reset(ptr noundef nonnull %0, i32 noundef %33) #3
%35 = icmp eq i32 %34, 0
br i1 %35, label %41, label %36
36: ; preds = %32
%37 = load i32, ptr @probe, align 4, !tbaa !6
%38 = getelementptr inbounds i8, ptr %0, i64 24
%39 = load i32, ptr %38, align 8, !tbaa !18
%40 = call i32 @netif_err(ptr noundef nonnull %0, i32 noundef %37, i32 noundef %39, ptr noundef nonnull @.str.1) #3
br label %82
41: ; preds = %32
%42 = call i32 @siena_init_wol(ptr noundef nonnull %0) #3
%43 = getelementptr inbounds i8, ptr %0, i64 8
%44 = load i32, ptr @GFP_KERNEL, align 4, !tbaa !6
%45 = call i32 @efx_nic_alloc_buffer(ptr noundef nonnull %0, ptr noundef nonnull %43, i32 noundef 4, i32 noundef %44) #3
%46 = icmp eq i32 %45, 0
br i1 %46, label %47, label %82
47: ; preds = %41
%48 = load i32, ptr %43, align 8, !tbaa !23
%49 = and i32 %48, 15
%50 = call i32 @BUG_ON(i32 noundef %49) #3
%51 = load i32, ptr @probe, align 4, !tbaa !6
%52 = getelementptr inbounds i8, ptr %0, i64 24
%53 = load i32, ptr %52, align 8, !tbaa !18
%54 = load i32, ptr %43, align 8, !tbaa !23
%55 = sext i32 %54 to i64
%56 = getelementptr inbounds i8, ptr %0, i64 12
%57 = load i32, ptr %56, align 4, !tbaa !24
%58 = call i64 @virt_to_phys(i32 noundef %57) #3
%59 = call i32 @netif_dbg(ptr noundef nonnull %0, i32 noundef %51, i32 noundef %53, ptr noundef nonnull @.str.2, i64 noundef %55, i32 noundef %57, i64 noundef %58) #3
%60 = call i32 @siena_probe_nvconfig(ptr noundef nonnull %0) #3
%61 = load i32, ptr @EINVAL, align 4, !tbaa !6
%62 = sub nsw i32 0, %61
%63 = icmp eq i32 %60, %62
br i1 %63, label %64, label %72
64: ; preds = %47
%65 = load i32, ptr @probe, align 4, !tbaa !6
%66 = load i32, ptr %52, align 8, !tbaa !18
%67 = call i32 @netif_err(ptr noundef nonnull %0, i32 noundef %65, i32 noundef %66, ptr noundef nonnull @.str.3) #3
%68 = load i32, ptr @PHY_TYPE_NONE, align 4, !tbaa !6
%69 = getelementptr inbounds i8, ptr %0, i64 20
store i32 %68, ptr %69, align 4, !tbaa !25
%70 = load i32, ptr @MDIO_PRTAD_NONE, align 4, !tbaa !6
%71 = getelementptr inbounds i8, ptr %0, i64 16
store i32 %70, ptr %71, align 8, !tbaa !26
br label %74
72: ; preds = %47
%73 = icmp eq i32 %60, 0
br i1 %73, label %74, label %79
74: ; preds = %72, %64
%75 = call i32 @efx_mcdi_mon_probe(ptr noundef nonnull %0) #3
%76 = icmp eq i32 %75, 0
br i1 %76, label %77, label %79
77: ; preds = %74
%78 = call i32 @efx_ptp_defer_probe_with_channel(ptr noundef nonnull %0) #3
br label %90
79: ; preds = %74, %72
%80 = phi i32 [ %75, %74 ], [ %60, %72 ]
%81 = call i32 @efx_nic_free_buffer(ptr noundef nonnull %0, ptr noundef nonnull %43) #3
br label %82
82: ; preds = %79, %41, %36
%83 = phi i32 [ %34, %36 ], [ %45, %41 ], [ %80, %79 ]
%84 = call i32 @efx_mcdi_detach(ptr noundef nonnull %0) #3
%85 = call i32 @efx_mcdi_fini(ptr noundef nonnull %0) #3
br label %86
86: ; preds = %19, %82, %12
%87 = phi i32 [ %18, %12 ], [ %30, %19 ], [ %83, %82 ]
%88 = load ptr, ptr %0, align 8, !tbaa !13
%89 = call i32 @kfree(ptr noundef %88) #3
br label %90
90: ; preds = %86, %77, %6
%91 = phi i32 [ %87, %86 ], [ 0, %77 ], [ %8, %6 ]
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %2) #3
ret i32 %91
}
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #1
declare ptr @kzalloc(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i64 @efx_farch_fpga_ver(ptr noundef) local_unnamed_addr #2
declare i32 @netif_err(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #2
declare i32 @efx_reado(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #2
declare i64 @EFX_OWORD_FIELD(i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @efx_mcdi_init(ptr noundef) local_unnamed_addr #2
declare i32 @efx_mcdi_reset(ptr noundef, i32 noundef) local_unnamed_addr #2
declare i32 @siena_init_wol(ptr noundef) local_unnamed_addr #2
declare i32 @efx_nic_alloc_buffer(ptr noundef, ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #2
declare i32 @BUG_ON(i32 noundef) local_unnamed_addr #2
declare i32 @netif_dbg(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i64 noundef, i32 noundef, i64 noundef) local_unnamed_addr #2
declare i64 @virt_to_phys(i32 noundef) local_unnamed_addr #2
declare i32 @siena_probe_nvconfig(ptr noundef) local_unnamed_addr #2
declare i32 @efx_mcdi_mon_probe(ptr noundef) local_unnamed_addr #2
declare i32 @efx_ptp_defer_probe_with_channel(ptr noundef) local_unnamed_addr #2
declare i32 @efx_nic_free_buffer(ptr noundef, ptr noundef) local_unnamed_addr #2
declare i32 @efx_mcdi_detach(ptr noundef) local_unnamed_addr #2
declare i32 @efx_mcdi_fini(ptr noundef) local_unnamed_addr #2
declare i32 @kfree(ptr noundef) local_unnamed_addr #2
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) }
attributes #2 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"siena_nic_data", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !12, i64 0}
!14 = !{!"efx_nic", !12, i64 0, !15, i64 8, !16, i64 16, !7, i64 20, !7, i64 24, !17, i64 32, !12, i64 40, !12, i64 48}
!15 = !{!"TYPE_5__", !7, i64 0, !7, i64 4}
!16 = !{!"TYPE_4__", !7, i64 0}
!17 = !{!"long", !8, i64 0}
!18 = !{!14, !7, i64 24}
!19 = !{!12, !12, i64 0}
!20 = !{!14, !12, i64 48}
!21 = !{!14, !12, i64 40}
!22 = !{!14, !17, i64 32}
!23 = !{!14, !7, i64 8}
!24 = !{!14, !7, i64 12}
!25 = !{!14, !7, i64 20}
!26 = !{!14, !7, i64 16}
| linux_drivers_net_ethernet_sfc_extr_siena.c_siena_probe_nic |
; ModuleID = 'AnghaBench/linux/drivers/misc/extr_enclosure.c_enclosure_component_alloc.c'
source_filename = "AnghaBench/linux/drivers/misc/extr_enclosure.c_enclosure_component_alloc.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.enclosure_device = type { i32, i32, ptr }
%struct.enclosure_component = type { i32, i32, %struct.device }
%struct.device = type { i32, i32, i32 }
@COMPONENT_NAME_SIZE = dso_local local_unnamed_addr global i32 0, align 4
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [3 x i8] c"%s\00", align 1
@.str.1 = private unnamed_addr constant [6 x i8] c"%s-%i\00", align 1
@.str.2 = private unnamed_addr constant [3 x i8] c"%u\00", align 1
@enclosure_component_release = dso_local local_unnamed_addr global i32 0, align 4
@enclosure_component_groups = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local ptr @enclosure_component_alloc(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = load i32, ptr @COMPONENT_NAME_SIZE, align 4, !tbaa !5
%6 = zext i32 %5 to i64
%7 = alloca i8, i64 %6, align 16
%8 = load i32, ptr %0, align 8, !tbaa !9
%9 = icmp ugt i32 %8, %1
br i1 %9, label %14, label %10
10: ; preds = %4
%11 = load i32, ptr @EINVAL, align 4, !tbaa !5
%12 = sub nsw i32 0, %11
%13 = tail call ptr @ERR_PTR(i32 noundef %12) #2
br label %55
14: ; preds = %4
%15 = getelementptr inbounds %struct.enclosure_device, ptr %0, i64 0, i32 2
%16 = load ptr, ptr %15, align 8, !tbaa !12
%17 = zext i32 %1 to i64
%18 = getelementptr inbounds %struct.enclosure_component, ptr %16, i64 %17
%19 = load i32, ptr %18, align 4, !tbaa !13
%20 = icmp eq i32 %19, -1
br i1 %20, label %25, label %21
21: ; preds = %14
%22 = load i32, ptr @EINVAL, align 4, !tbaa !5
%23 = sub nsw i32 0, %22
%24 = tail call ptr @ERR_PTR(i32 noundef %23) #2
br label %55
25: ; preds = %14
%26 = getelementptr inbounds %struct.enclosure_component, ptr %16, i64 %17, i32 1
store i32 %2, ptr %26, align 4, !tbaa !16
store i32 %1, ptr %18, align 4, !tbaa !13
%27 = getelementptr inbounds %struct.enclosure_component, ptr %16, i64 %17, i32 2
%28 = getelementptr inbounds %struct.enclosure_device, ptr %0, i64 0, i32 1
%29 = tail call i32 @get_device(ptr noundef nonnull %28) #2
%30 = getelementptr inbounds %struct.enclosure_component, ptr %16, i64 %17, i32 2, i32 2
store i32 %29, ptr %30, align 4, !tbaa !17
%31 = icmp eq ptr %3, null
br i1 %31, label %49, label %32
32: ; preds = %25
%33 = load i8, ptr %3, align 1, !tbaa !18
%34 = icmp eq i8 %33, 0
br i1 %34, label %49, label %35
35: ; preds = %32
%36 = load i32, ptr @COMPONENT_NAME_SIZE, align 4, !tbaa !5
%37 = call i32 (ptr, i32, ptr, ptr, ...) @snprintf(ptr noundef nonnull %7, i32 noundef %36, ptr noundef nonnull @.str, ptr noundef nonnull %3) #2
%38 = call i64 @enclosure_component_find_by_name(ptr noundef nonnull %0, ptr noundef nonnull %7) #2
%39 = icmp eq i64 %38, 0
br i1 %39, label %47, label %40
40: ; preds = %35, %40
%41 = phi i32 [ %43, %40 ], [ 1, %35 ]
%42 = load i32, ptr @COMPONENT_NAME_SIZE, align 4, !tbaa !5
%43 = add nuw nsw i32 %41, 1
%44 = call i32 (ptr, i32, ptr, ptr, ...) @snprintf(ptr noundef nonnull %7, i32 noundef %42, ptr noundef nonnull @.str.1, ptr noundef nonnull %3, i32 noundef %41) #2
%45 = call i64 @enclosure_component_find_by_name(ptr noundef nonnull %0, ptr noundef nonnull %7) #2
%46 = icmp eq i64 %45, 0
br i1 %46, label %47, label %40, !llvm.loop !19
47: ; preds = %40, %35
%48 = call i32 (ptr, ptr, ...) @dev_set_name(ptr noundef nonnull %27, ptr noundef nonnull @.str, ptr noundef nonnull %7) #2
br label %51
49: ; preds = %32, %25
%50 = tail call i32 (ptr, ptr, ...) @dev_set_name(ptr noundef nonnull %27, ptr noundef nonnull @.str.2, i32 noundef %1) #2
br label %51
51: ; preds = %49, %47
%52 = load i32, ptr @enclosure_component_release, align 4, !tbaa !5
%53 = getelementptr inbounds %struct.enclosure_component, ptr %16, i64 %17, i32 2, i32 1
store i32 %52, ptr %53, align 4, !tbaa !21
%54 = load i32, ptr @enclosure_component_groups, align 4, !tbaa !5
store i32 %54, ptr %27, align 4, !tbaa !22
br label %55
55: ; preds = %51, %21, %10
%56 = phi ptr [ %13, %10 ], [ %24, %21 ], [ %18, %51 ]
ret ptr %56
}
declare ptr @ERR_PTR(i32 noundef) local_unnamed_addr #1
declare i32 @get_device(ptr noundef) local_unnamed_addr #1
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i64 @enclosure_component_find_by_name(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_set_name(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"enclosure_device", !6, i64 0, !6, i64 4, !11, i64 8}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!10, !11, i64 8}
!13 = !{!14, !6, i64 0}
!14 = !{!"enclosure_component", !6, i64 0, !6, i64 4, !15, i64 8}
!15 = !{!"device", !6, i64 0, !6, i64 4, !6, i64 8}
!16 = !{!14, !6, i64 4}
!17 = !{!15, !6, i64 8}
!18 = !{!7, !7, i64 0}
!19 = distinct !{!19, !20}
!20 = !{!"llvm.loop.mustprogress"}
!21 = !{!15, !6, i64 4}
!22 = !{!15, !6, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/misc/extr_enclosure.c_enclosure_component_alloc.c'
source_filename = "AnghaBench/linux/drivers/misc/extr_enclosure.c_enclosure_component_alloc.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.enclosure_component = type { i32, i32, %struct.device }
%struct.device = type { i32, i32, i32 }
@COMPONENT_NAME_SIZE = common local_unnamed_addr global i32 0, align 4
@EINVAL = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [3 x i8] c"%s\00", align 1
@.str.1 = private unnamed_addr constant [6 x i8] c"%s-%i\00", align 1
@.str.2 = private unnamed_addr constant [3 x i8] c"%u\00", align 1
@enclosure_component_release = common local_unnamed_addr global i32 0, align 4
@enclosure_component_groups = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @enclosure_component_alloc(ptr noundef %0, i32 noundef %1, i32 noundef %2, ptr noundef %3) local_unnamed_addr #0 {
%5 = load i32, ptr @COMPONENT_NAME_SIZE, align 4, !tbaa !6
%6 = zext i32 %5 to i64
%7 = alloca i8, i64 %6, align 1
%8 = load i32, ptr %0, align 8, !tbaa !10
%9 = icmp ugt i32 %8, %1
br i1 %9, label %14, label %10
10: ; preds = %4
%11 = load i32, ptr @EINVAL, align 4, !tbaa !6
%12 = sub nsw i32 0, %11
%13 = tail call ptr @ERR_PTR(i32 noundef %12) #2
br label %55
14: ; preds = %4
%15 = getelementptr inbounds i8, ptr %0, i64 8
%16 = load ptr, ptr %15, align 8, !tbaa !13
%17 = zext i32 %1 to i64
%18 = getelementptr inbounds %struct.enclosure_component, ptr %16, i64 %17
%19 = load i32, ptr %18, align 4, !tbaa !14
%20 = icmp eq i32 %19, -1
br i1 %20, label %25, label %21
21: ; preds = %14
%22 = load i32, ptr @EINVAL, align 4, !tbaa !6
%23 = sub nsw i32 0, %22
%24 = tail call ptr @ERR_PTR(i32 noundef %23) #2
br label %55
25: ; preds = %14
%26 = getelementptr inbounds i8, ptr %18, i64 4
store i32 %2, ptr %26, align 4, !tbaa !17
store i32 %1, ptr %18, align 4, !tbaa !14
%27 = getelementptr inbounds i8, ptr %18, i64 8
%28 = getelementptr inbounds i8, ptr %0, i64 4
%29 = tail call i32 @get_device(ptr noundef nonnull %28) #2
%30 = getelementptr inbounds i8, ptr %18, i64 16
store i32 %29, ptr %30, align 4, !tbaa !18
%31 = icmp eq ptr %3, null
br i1 %31, label %49, label %32
32: ; preds = %25
%33 = load i8, ptr %3, align 1, !tbaa !19
%34 = icmp eq i8 %33, 0
br i1 %34, label %49, label %35
35: ; preds = %32
%36 = load i32, ptr @COMPONENT_NAME_SIZE, align 4, !tbaa !6
%37 = call i32 (ptr, i32, ptr, ptr, ...) @snprintf(ptr noundef nonnull %7, i32 noundef %36, ptr noundef nonnull @.str, ptr noundef nonnull %3) #2
%38 = call i64 @enclosure_component_find_by_name(ptr noundef nonnull %0, ptr noundef nonnull %7) #2
%39 = icmp eq i64 %38, 0
br i1 %39, label %47, label %40
40: ; preds = %35, %40
%41 = phi i32 [ %43, %40 ], [ 1, %35 ]
%42 = load i32, ptr @COMPONENT_NAME_SIZE, align 4, !tbaa !6
%43 = add nuw nsw i32 %41, 1
%44 = call i32 (ptr, i32, ptr, ptr, ...) @snprintf(ptr noundef nonnull %7, i32 noundef %42, ptr noundef nonnull @.str.1, ptr noundef nonnull %3, i32 noundef %41) #2
%45 = call i64 @enclosure_component_find_by_name(ptr noundef nonnull %0, ptr noundef nonnull %7) #2
%46 = icmp eq i64 %45, 0
br i1 %46, label %47, label %40, !llvm.loop !20
47: ; preds = %40, %35
%48 = call i32 (ptr, ptr, ...) @dev_set_name(ptr noundef nonnull %27, ptr noundef nonnull @.str, ptr noundef nonnull %7) #2
br label %51
49: ; preds = %32, %25
%50 = tail call i32 (ptr, ptr, ...) @dev_set_name(ptr noundef nonnull %27, ptr noundef nonnull @.str.2, i32 noundef %1) #2
br label %51
51: ; preds = %49, %47
%52 = load i32, ptr @enclosure_component_release, align 4, !tbaa !6
%53 = getelementptr inbounds i8, ptr %18, i64 12
store i32 %52, ptr %53, align 4, !tbaa !22
%54 = load i32, ptr @enclosure_component_groups, align 4, !tbaa !6
store i32 %54, ptr %27, align 4, !tbaa !23
br label %55
55: ; preds = %51, %21, %10
%56 = phi ptr [ %13, %10 ], [ %24, %21 ], [ %18, %51 ]
ret ptr %56
}
declare ptr @ERR_PTR(i32 noundef) local_unnamed_addr #1
declare i32 @get_device(ptr noundef) local_unnamed_addr #1
declare i32 @snprintf(ptr noundef, i32 noundef, ptr noundef, ptr noundef, ...) local_unnamed_addr #1
declare i64 @enclosure_component_find_by_name(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @dev_set_name(ptr noundef, ptr noundef, ...) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"enclosure_device", !7, i64 0, !7, i64 4, !12, i64 8}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!11, !12, i64 8}
!14 = !{!15, !7, i64 0}
!15 = !{!"enclosure_component", !7, i64 0, !7, i64 4, !16, i64 8}
!16 = !{!"device", !7, i64 0, !7, i64 4, !7, i64 8}
!17 = !{!15, !7, i64 4}
!18 = !{!16, !7, i64 8}
!19 = !{!8, !8, i64 0}
!20 = distinct !{!20, !21}
!21 = !{!"llvm.loop.mustprogress"}
!22 = !{!16, !7, i64 4}
!23 = !{!16, !7, i64 0}
| linux_drivers_misc_extr_enclosure.c_enclosure_component_alloc |
; ModuleID = 'AnghaBench/rofi/source/extr_view.c_rofi_view_set_window_title.c'
source_filename = "AnghaBench/rofi/source/extr_view.c_rofi_view_set_window_title.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_6__ = type { i32 }
%struct.TYPE_5__ = type { i32, %struct.TYPE_4__ }
%struct.TYPE_4__ = type { i32, i32 }
@xcb = dso_local local_unnamed_addr global ptr null, align 8
@XCB_PROP_MODE_REPLACE = dso_local local_unnamed_addr global i32 0, align 4
@CacheState = dso_local local_unnamed_addr global %struct.TYPE_6__ zeroinitializer, align 4
@XCB_ATOM_WM_NAME = dso_local local_unnamed_addr global i32 0, align 4
@XCB_ATOM_STRING = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @rofi_view_set_window_title(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @strlen(ptr noundef %0) #2
%3 = load ptr, ptr @xcb, align 8, !tbaa !5
%4 = load i32, ptr %3, align 4, !tbaa !9
%5 = load i32, ptr @XCB_PROP_MODE_REPLACE, align 4, !tbaa !13
%6 = load i32, ptr @CacheState, align 4, !tbaa !14
%7 = getelementptr inbounds %struct.TYPE_5__, ptr %3, i64 0, i32 1
%8 = getelementptr inbounds %struct.TYPE_5__, ptr %3, i64 0, i32 1, i32 1
%9 = load i32, ptr %8, align 4, !tbaa !16
%10 = load i32, ptr %7, align 4, !tbaa !17
%11 = tail call i32 @xcb_change_property(i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %9, i32 noundef %10, i32 noundef 8, i32 noundef %2, ptr noundef %0) #2
%12 = load ptr, ptr @xcb, align 8, !tbaa !5
%13 = load i32, ptr %12, align 4, !tbaa !9
%14 = load i32, ptr @XCB_PROP_MODE_REPLACE, align 4, !tbaa !13
%15 = load i32, ptr @CacheState, align 4, !tbaa !14
%16 = load i32, ptr @XCB_ATOM_WM_NAME, align 4, !tbaa !13
%17 = load i32, ptr @XCB_ATOM_STRING, align 4, !tbaa !13
%18 = tail call i32 @xcb_change_property(i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef %16, i32 noundef %17, i32 noundef 8, i32 noundef %2, ptr noundef %0) #2
ret void
}
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
declare i32 @xcb_change_property(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_5__", !11, i64 0, !12, i64 4}
!11 = !{!"int", !7, i64 0}
!12 = !{!"TYPE_4__", !11, i64 0, !11, i64 4}
!13 = !{!11, !11, i64 0}
!14 = !{!15, !11, i64 0}
!15 = !{!"TYPE_6__", !11, i64 0}
!16 = !{!10, !11, i64 8}
!17 = !{!10, !11, i64 4}
| ; ModuleID = 'AnghaBench/rofi/source/extr_view.c_rofi_view_set_window_title.c'
source_filename = "AnghaBench/rofi/source/extr_view.c_rofi_view_set_window_title.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_6__ = type { i32 }
@xcb = common local_unnamed_addr global ptr null, align 8
@XCB_PROP_MODE_REPLACE = common local_unnamed_addr global i32 0, align 4
@CacheState = common local_unnamed_addr global %struct.TYPE_6__ zeroinitializer, align 4
@XCB_ATOM_WM_NAME = common local_unnamed_addr global i32 0, align 4
@XCB_ATOM_STRING = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @rofi_view_set_window_title(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @strlen(ptr noundef %0) #2
%3 = load ptr, ptr @xcb, align 8, !tbaa !6
%4 = load i32, ptr %3, align 4, !tbaa !10
%5 = load i32, ptr @XCB_PROP_MODE_REPLACE, align 4, !tbaa !14
%6 = load i32, ptr @CacheState, align 4, !tbaa !15
%7 = getelementptr inbounds i8, ptr %3, i64 4
%8 = getelementptr inbounds i8, ptr %3, i64 8
%9 = load i32, ptr %8, align 4, !tbaa !17
%10 = load i32, ptr %7, align 4, !tbaa !18
%11 = tail call i32 @xcb_change_property(i32 noundef %4, i32 noundef %5, i32 noundef %6, i32 noundef %9, i32 noundef %10, i32 noundef 8, i32 noundef %2, ptr noundef %0) #2
%12 = load ptr, ptr @xcb, align 8, !tbaa !6
%13 = load i32, ptr %12, align 4, !tbaa !10
%14 = load i32, ptr @XCB_PROP_MODE_REPLACE, align 4, !tbaa !14
%15 = load i32, ptr @CacheState, align 4, !tbaa !15
%16 = load i32, ptr @XCB_ATOM_WM_NAME, align 4, !tbaa !14
%17 = load i32, ptr @XCB_ATOM_STRING, align 4, !tbaa !14
%18 = tail call i32 @xcb_change_property(i32 noundef %13, i32 noundef %14, i32 noundef %15, i32 noundef %16, i32 noundef %17, i32 noundef 8, i32 noundef %2, ptr noundef %0) #2
ret void
}
declare i32 @strlen(ptr noundef) local_unnamed_addr #1
declare i32 @xcb_change_property(i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_5__", !12, i64 0, !13, i64 4}
!12 = !{!"int", !8, i64 0}
!13 = !{!"TYPE_4__", !12, i64 0, !12, i64 4}
!14 = !{!12, !12, i64 0}
!15 = !{!16, !12, i64 0}
!16 = !{!"TYPE_6__", !12, i64 0}
!17 = !{!11, !12, i64 8}
!18 = !{!11, !12, i64 4}
| rofi_source_extr_view.c_rofi_view_set_window_title |
; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/addi-data/extr_hwdrv_apci1500.c_i_APCI1500_ConfigCounterTimerWatchdog.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/addi-data/extr_hwdrv_apci1500.c_i_APCI1500_ConfigCounterTimerWatchdog.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_2__ = type { i64, i64, i32 }
@current = dso_local local_unnamed_addr global i32 0, align 4
@devpriv = dso_local local_unnamed_addr global ptr null, align 8
@APCI1500_CLK_SELECT = dso_local local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [54 x i8] c"\0AThe option for input clock selection does not exist\0A\00", align 1
@EINVAL = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_COUNTER = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_TIMER = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [43 x i8] c"\0AThis choice is not a timer nor a counter\0A\00", align 1
@APCI1500_CONTINUOUS = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_SINGLE = dso_local local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [56 x i8] c"\0AThis option for single/continuous mode does not exist\0A\00", align 1
@APCI1500_ENABLE = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_DISABLE = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR1_MODE_SPECIFICATION = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_Z8536_CONTROL_REGISTER = dso_local local_unnamed_addr global i64 0, align 8
@APCI1500_RW_CPT_TMR1_TIME_CST_LOW = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR1_TIME_CST_HIGH = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_RW_MASTER_CONFIGURATION_CONTROL = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR1_CMD_STATUS = dso_local local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [52 x i8] c"\0AError in selection of interrupt enable or disable\0A\00", align 1
@.str.4 = private unnamed_addr constant [37 x i8] c"\0AError in selection of reload value\0A\00", align 1
@i_TimerCounterWatchdogInterrupt = dso_local local_unnamed_addr global i32 0, align 4
@i_TimerCounter1Init = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_SOFTWARE_TRIGGER = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_HARDWARE_TRIGGER = dso_local local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [62 x i8] c"\0AThis choice for software or hardware trigger does not exist\0A\00", align 1
@APCI1500_SOFTWARE_GATE = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_HARDWARE_GATE = dso_local local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [59 x i8] c"\0AThis choice for software or hardware gate does not exist\0A\00", align 1
@APCI1500_RW_CPT_TMR2_MODE_SPECIFICATION = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR2_TIME_CST_LOW = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR2_TIME_CST_HIGH = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR2_CMD_STATUS = dso_local local_unnamed_addr global i32 0, align 4
@i_TimerCounter2Init = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_WATCHDOG = dso_local local_unnamed_addr global i32 0, align 4
@.str.7 = private unnamed_addr constant [46 x i8] c"\0AThis choice is not a watchdog nor a counter\0A\00", align 1
@APCI1500_RW_CPT_TMR3_MODE_SPECIFICATION = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR3_TIME_CST_LOW = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR3_TIME_CST_HIGH = dso_local local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR3_CMD_STATUS = dso_local local_unnamed_addr global i32 0, align 4
@i_WatchdogCounter3Init = dso_local local_unnamed_addr global i32 0, align 4
@.str.8 = private unnamed_addr constant [51 x i8] c"\0AThe specified counter\09imer option does not exist\0A\00", align 1
@i_CounterLogic = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @i_APCI1500_ConfigCounterTimerWatchdog(ptr nocapture noundef readnone %0, ptr nocapture noundef readnone %1, ptr nocapture noundef readonly %2, ptr nocapture noundef %3) local_unnamed_addr #0 {
%5 = load i32, ptr @current, align 4, !tbaa !5
%6 = load ptr, ptr @devpriv, align 8, !tbaa !9
%7 = getelementptr inbounds %struct.TYPE_2__, ptr %6, i64 0, i32 2
store i32 %5, ptr %7, align 8, !tbaa !11
%8 = load i32, ptr %3, align 4, !tbaa !5
switch i32 %8, label %15 [
i32 0, label %9
i32 1, label %9
i32 2, label %9
i32 3, label %19
]
9: ; preds = %4, %4, %4
%10 = getelementptr inbounds %struct.TYPE_2__, ptr %6, i64 0, i32 1
%11 = load i64, ptr %10, align 8, !tbaa !14
%12 = load i64, ptr @APCI1500_CLK_SELECT, align 8, !tbaa !15
%13 = add nsw i64 %12, %11
%14 = tail call i32 @outw(i32 noundef %8, i64 noundef %13) #2
br label %19
15: ; preds = %4
%16 = tail call i32 @printk(ptr noundef nonnull @.str) #2
%17 = load i32, ptr @EINVAL, align 4, !tbaa !5
%18 = sub nsw i32 0, %17
br label %445
19: ; preds = %4, %9
%20 = getelementptr inbounds i32, ptr %3, i64 1
%21 = load i32, ptr %20, align 4, !tbaa !5
switch i32 %21, label %439 [
i32 130, label %22
i32 129, label %147
i32 128, label %294
]
22: ; preds = %19
%23 = getelementptr inbounds i32, ptr %3, i64 2
%24 = load i32, ptr %23, align 4, !tbaa !5
switch i32 %24, label %26 [
i32 0, label %30
i32 1, label %25
]
25: ; preds = %22
br label %30
26: ; preds = %22
%27 = tail call i32 @printk(ptr noundef nonnull @.str.1) #2
%28 = load i32, ptr @EINVAL, align 4, !tbaa !5
%29 = sub nsw i32 0, %28
br label %445
30: ; preds = %22, %25
%31 = phi ptr [ @APCI1500_TIMER, %25 ], [ @APCI1500_COUNTER, %22 ]
%32 = load i32, ptr %31, align 4, !tbaa !5
store i32 %32, ptr %23, align 4, !tbaa !5
%33 = getelementptr inbounds i32, ptr %3, i64 4
%34 = load i32, ptr %33, align 4, !tbaa !5
switch i32 %34, label %36 [
i32 0, label %40
i32 1, label %35
]
35: ; preds = %30
br label %40
36: ; preds = %30
%37 = tail call i32 @printk(ptr noundef nonnull @.str.2) #2
%38 = load i32, ptr @EINVAL, align 4, !tbaa !5
%39 = sub nsw i32 0, %38
br label %445
40: ; preds = %30, %35
%41 = phi ptr [ @APCI1500_SINGLE, %35 ], [ @APCI1500_CONTINUOUS, %30 ]
%42 = load i32, ptr %41, align 4, !tbaa !5
store i32 %42, ptr %33, align 4, !tbaa !5
%43 = or i32 %32, %42
%44 = or i32 %43, 7
%45 = getelementptr inbounds i32, ptr %3, i64 3
%46 = load i32, ptr %45, align 4, !tbaa !5
%47 = icmp ult i32 %46, 65536
br i1 %47, label %48, label %143
48: ; preds = %40
%49 = getelementptr inbounds i32, ptr %3, i64 7
%50 = load i32, ptr %49, align 4, !tbaa !5
%51 = load i32, ptr @APCI1500_ENABLE, align 4, !tbaa !5
%52 = icmp eq i32 %50, %51
%53 = load i32, ptr @APCI1500_DISABLE, align 4
%54 = icmp eq i32 %50, %53
%55 = select i1 %52, i1 true, i1 %54
br i1 %55, label %56, label %139
56: ; preds = %48
%57 = load i32, ptr @APCI1500_RW_CPT_TMR1_MODE_SPECIFICATION, align 4, !tbaa !5
%58 = load ptr, ptr @devpriv, align 8, !tbaa !9
%59 = load i64, ptr %58, align 8, !tbaa !16
%60 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%61 = add nsw i64 %60, %59
%62 = tail call i32 @outb(i32 noundef %57, i64 noundef %61) #2
%63 = load ptr, ptr @devpriv, align 8, !tbaa !9
%64 = load i64, ptr %63, align 8, !tbaa !16
%65 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%66 = add nsw i64 %65, %64
%67 = tail call i32 @outb(i32 noundef %44, i64 noundef %66) #2
%68 = load i32, ptr @APCI1500_RW_CPT_TMR1_TIME_CST_LOW, align 4, !tbaa !5
%69 = load ptr, ptr @devpriv, align 8, !tbaa !9
%70 = load i64, ptr %69, align 8, !tbaa !16
%71 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%72 = add nsw i64 %71, %70
%73 = tail call i32 @outb(i32 noundef %68, i64 noundef %72) #2
%74 = load i32, ptr %45, align 4, !tbaa !5
%75 = load ptr, ptr @devpriv, align 8, !tbaa !9
%76 = load i64, ptr %75, align 8, !tbaa !16
%77 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%78 = add nsw i64 %77, %76
%79 = tail call i32 @outb(i32 noundef %74, i64 noundef %78) #2
%80 = load i32, ptr @APCI1500_RW_CPT_TMR1_TIME_CST_HIGH, align 4, !tbaa !5
%81 = load ptr, ptr @devpriv, align 8, !tbaa !9
%82 = load i64, ptr %81, align 8, !tbaa !16
%83 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%84 = add nsw i64 %83, %82
%85 = tail call i32 @outb(i32 noundef %80, i64 noundef %84) #2
%86 = load i32, ptr %45, align 4, !tbaa !5
%87 = lshr i32 %86, 8
store i32 %87, ptr %45, align 4, !tbaa !5
%88 = load ptr, ptr @devpriv, align 8, !tbaa !9
%89 = load i64, ptr %88, align 8, !tbaa !16
%90 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%91 = add nsw i64 %90, %89
%92 = tail call i32 @outb(i32 noundef %87, i64 noundef %91) #2
%93 = load i32, ptr @APCI1500_RW_MASTER_CONFIGURATION_CONTROL, align 4, !tbaa !5
%94 = load ptr, ptr @devpriv, align 8, !tbaa !9
%95 = load i64, ptr %94, align 8, !tbaa !16
%96 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%97 = add nsw i64 %96, %95
%98 = tail call i32 @outb(i32 noundef %93, i64 noundef %97) #2
%99 = load ptr, ptr @devpriv, align 8, !tbaa !9
%100 = load i64, ptr %99, align 8, !tbaa !16
%101 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%102 = add nsw i64 %101, %100
%103 = tail call i32 @inb(i64 noundef %102) #2
%104 = or i32 %103, 64
%105 = load i32, ptr @APCI1500_RW_MASTER_CONFIGURATION_CONTROL, align 4, !tbaa !5
%106 = load ptr, ptr @devpriv, align 8, !tbaa !9
%107 = load i64, ptr %106, align 8, !tbaa !16
%108 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%109 = add nsw i64 %108, %107
%110 = tail call i32 @outb(i32 noundef %105, i64 noundef %109) #2
%111 = load ptr, ptr @devpriv, align 8, !tbaa !9
%112 = load i64, ptr %111, align 8, !tbaa !16
%113 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%114 = add nsw i64 %113, %112
%115 = tail call i32 @outb(i32 noundef %104, i64 noundef %114) #2
%116 = load i32, ptr @APCI1500_RW_CPT_TMR1_CMD_STATUS, align 4, !tbaa !5
%117 = load ptr, ptr @devpriv, align 8, !tbaa !9
%118 = load i64, ptr %117, align 8, !tbaa !16
%119 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%120 = add nsw i64 %119, %118
%121 = tail call i32 @outb(i32 noundef %116, i64 noundef %120) #2
%122 = load ptr, ptr @devpriv, align 8, !tbaa !9
%123 = load i64, ptr %122, align 8, !tbaa !16
%124 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%125 = add nsw i64 %124, %123
%126 = tail call i32 @outb(i32 noundef 0, i64 noundef %125) #2
%127 = load i32, ptr @APCI1500_RW_CPT_TMR1_CMD_STATUS, align 4, !tbaa !5
%128 = load ptr, ptr @devpriv, align 8, !tbaa !9
%129 = load i64, ptr %128, align 8, !tbaa !16
%130 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%131 = add nsw i64 %130, %129
%132 = tail call i32 @outb(i32 noundef %127, i64 noundef %131) #2
%133 = load ptr, ptr @devpriv, align 8, !tbaa !9
%134 = load i64, ptr %133, align 8, !tbaa !16
%135 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%136 = add nsw i64 %135, %134
%137 = tail call i32 @outb(i32 noundef 2, i64 noundef %136) #2
%138 = load i32, ptr %49, align 4, !tbaa !5
store i32 %138, ptr @i_TimerCounterWatchdogInterrupt, align 4, !tbaa !5
store i32 1, ptr @i_TimerCounter1Init, align 4, !tbaa !5
br label %441
139: ; preds = %48
%140 = tail call i32 @printk(ptr noundef nonnull @.str.3) #2
%141 = load i32, ptr @EINVAL, align 4, !tbaa !5
%142 = sub nsw i32 0, %141
br label %445
143: ; preds = %40
%144 = tail call i32 @printk(ptr noundef nonnull @.str.4) #2
%145 = load i32, ptr @EINVAL, align 4, !tbaa !5
%146 = sub nsw i32 0, %145
br label %445
147: ; preds = %19
%148 = getelementptr inbounds i32, ptr %3, i64 2
%149 = load i32, ptr %148, align 4, !tbaa !5
switch i32 %149, label %151 [
i32 0, label %155
i32 1, label %150
]
150: ; preds = %147
br label %155
151: ; preds = %147
%152 = tail call i32 @printk(ptr noundef nonnull @.str.1) #2
%153 = load i32, ptr @EINVAL, align 4, !tbaa !5
%154 = sub nsw i32 0, %153
br label %445
155: ; preds = %147, %150
%156 = phi ptr [ @APCI1500_TIMER, %150 ], [ @APCI1500_COUNTER, %147 ]
%157 = load i32, ptr %156, align 4, !tbaa !5
store i32 %157, ptr %148, align 4, !tbaa !5
%158 = getelementptr inbounds i32, ptr %3, i64 4
%159 = load i32, ptr %158, align 4, !tbaa !5
switch i32 %159, label %161 [
i32 0, label %165
i32 1, label %160
]
160: ; preds = %155
br label %165
161: ; preds = %155
%162 = tail call i32 @printk(ptr noundef nonnull @.str.2) #2
%163 = load i32, ptr @EINVAL, align 4, !tbaa !5
%164 = sub nsw i32 0, %163
br label %445
165: ; preds = %155, %160
%166 = phi ptr [ @APCI1500_SINGLE, %160 ], [ @APCI1500_CONTINUOUS, %155 ]
%167 = load i32, ptr %166, align 4, !tbaa !5
store i32 %167, ptr %158, align 4, !tbaa !5
%168 = getelementptr inbounds i32, ptr %3, i64 5
%169 = load i32, ptr %168, align 4, !tbaa !5
switch i32 %169, label %171 [
i32 0, label %175
i32 1, label %170
]
170: ; preds = %165
br label %175
171: ; preds = %165
%172 = tail call i32 @printk(ptr noundef nonnull @.str.5) #2
%173 = load i32, ptr @EINVAL, align 4, !tbaa !5
%174 = sub nsw i32 0, %173
br label %445
175: ; preds = %165, %170
%176 = phi ptr [ @APCI1500_HARDWARE_TRIGGER, %170 ], [ @APCI1500_SOFTWARE_TRIGGER, %165 ]
%177 = load i32, ptr %176, align 4, !tbaa !5
store i32 %177, ptr %168, align 4, !tbaa !5
%178 = getelementptr inbounds i32, ptr %3, i64 6
%179 = load i32, ptr %178, align 4, !tbaa !5
switch i32 %179, label %181 [
i32 0, label %185
i32 1, label %180
]
180: ; preds = %175
br label %185
181: ; preds = %175
%182 = tail call i32 @printk(ptr noundef nonnull @.str.6) #2
%183 = load i32, ptr @EINVAL, align 4, !tbaa !5
%184 = sub nsw i32 0, %183
br label %445
185: ; preds = %175, %180
%186 = phi ptr [ @APCI1500_HARDWARE_GATE, %180 ], [ @APCI1500_SOFTWARE_GATE, %175 ]
%187 = load i32, ptr %186, align 4, !tbaa !5
store i32 %187, ptr %178, align 4, !tbaa !5
%188 = or i32 %157, %167
%189 = or i32 %188, %177
%190 = or i32 %189, %187
%191 = or i32 %190, 7
%192 = getelementptr inbounds i32, ptr %3, i64 3
%193 = load i32, ptr %192, align 4, !tbaa !5
%194 = icmp ult i32 %193, 65536
br i1 %194, label %195, label %290
195: ; preds = %185
%196 = getelementptr inbounds i32, ptr %3, i64 7
%197 = load i32, ptr %196, align 4, !tbaa !5
%198 = load i32, ptr @APCI1500_ENABLE, align 4, !tbaa !5
%199 = icmp eq i32 %197, %198
%200 = load i32, ptr @APCI1500_DISABLE, align 4
%201 = icmp eq i32 %197, %200
%202 = select i1 %199, i1 true, i1 %201
br i1 %202, label %203, label %286
203: ; preds = %195
%204 = load i32, ptr @APCI1500_RW_CPT_TMR2_MODE_SPECIFICATION, align 4, !tbaa !5
%205 = load ptr, ptr @devpriv, align 8, !tbaa !9
%206 = load i64, ptr %205, align 8, !tbaa !16
%207 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%208 = add nsw i64 %207, %206
%209 = tail call i32 @outb(i32 noundef %204, i64 noundef %208) #2
%210 = load ptr, ptr @devpriv, align 8, !tbaa !9
%211 = load i64, ptr %210, align 8, !tbaa !16
%212 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%213 = add nsw i64 %212, %211
%214 = tail call i32 @outb(i32 noundef %191, i64 noundef %213) #2
%215 = load i32, ptr @APCI1500_RW_CPT_TMR2_TIME_CST_LOW, align 4, !tbaa !5
%216 = load ptr, ptr @devpriv, align 8, !tbaa !9
%217 = load i64, ptr %216, align 8, !tbaa !16
%218 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%219 = add nsw i64 %218, %217
%220 = tail call i32 @outb(i32 noundef %215, i64 noundef %219) #2
%221 = load i32, ptr %192, align 4, !tbaa !5
%222 = load ptr, ptr @devpriv, align 8, !tbaa !9
%223 = load i64, ptr %222, align 8, !tbaa !16
%224 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%225 = add nsw i64 %224, %223
%226 = tail call i32 @outb(i32 noundef %221, i64 noundef %225) #2
%227 = load i32, ptr @APCI1500_RW_CPT_TMR2_TIME_CST_HIGH, align 4, !tbaa !5
%228 = load ptr, ptr @devpriv, align 8, !tbaa !9
%229 = load i64, ptr %228, align 8, !tbaa !16
%230 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%231 = add nsw i64 %230, %229
%232 = tail call i32 @outb(i32 noundef %227, i64 noundef %231) #2
%233 = load i32, ptr %192, align 4, !tbaa !5
%234 = lshr i32 %233, 8
store i32 %234, ptr %192, align 4, !tbaa !5
%235 = load ptr, ptr @devpriv, align 8, !tbaa !9
%236 = load i64, ptr %235, align 8, !tbaa !16
%237 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%238 = add nsw i64 %237, %236
%239 = tail call i32 @outb(i32 noundef %234, i64 noundef %238) #2
%240 = load i32, ptr @APCI1500_RW_MASTER_CONFIGURATION_CONTROL, align 4, !tbaa !5
%241 = load ptr, ptr @devpriv, align 8, !tbaa !9
%242 = load i64, ptr %241, align 8, !tbaa !16
%243 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%244 = add nsw i64 %243, %242
%245 = tail call i32 @outb(i32 noundef %240, i64 noundef %244) #2
%246 = load ptr, ptr @devpriv, align 8, !tbaa !9
%247 = load i64, ptr %246, align 8, !tbaa !16
%248 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%249 = add nsw i64 %248, %247
%250 = tail call i32 @inb(i64 noundef %249) #2
%251 = or i32 %250, 32
%252 = load i32, ptr @APCI1500_RW_MASTER_CONFIGURATION_CONTROL, align 4, !tbaa !5
%253 = load ptr, ptr @devpriv, align 8, !tbaa !9
%254 = load i64, ptr %253, align 8, !tbaa !16
%255 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%256 = add nsw i64 %255, %254
%257 = tail call i32 @outb(i32 noundef %252, i64 noundef %256) #2
%258 = load ptr, ptr @devpriv, align 8, !tbaa !9
%259 = load i64, ptr %258, align 8, !tbaa !16
%260 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%261 = add nsw i64 %260, %259
%262 = tail call i32 @outb(i32 noundef %251, i64 noundef %261) #2
%263 = load i32, ptr @APCI1500_RW_CPT_TMR2_CMD_STATUS, align 4, !tbaa !5
%264 = load ptr, ptr @devpriv, align 8, !tbaa !9
%265 = load i64, ptr %264, align 8, !tbaa !16
%266 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%267 = add nsw i64 %266, %265
%268 = tail call i32 @outb(i32 noundef %263, i64 noundef %267) #2
%269 = load ptr, ptr @devpriv, align 8, !tbaa !9
%270 = load i64, ptr %269, align 8, !tbaa !16
%271 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%272 = add nsw i64 %271, %270
%273 = tail call i32 @outb(i32 noundef 0, i64 noundef %272) #2
%274 = load i32, ptr @APCI1500_RW_CPT_TMR2_CMD_STATUS, align 4, !tbaa !5
%275 = load ptr, ptr @devpriv, align 8, !tbaa !9
%276 = load i64, ptr %275, align 8, !tbaa !16
%277 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%278 = add nsw i64 %277, %276
%279 = tail call i32 @outb(i32 noundef %274, i64 noundef %278) #2
%280 = load ptr, ptr @devpriv, align 8, !tbaa !9
%281 = load i64, ptr %280, align 8, !tbaa !16
%282 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%283 = add nsw i64 %282, %281
%284 = tail call i32 @outb(i32 noundef 2, i64 noundef %283) #2
%285 = load i32, ptr %196, align 4, !tbaa !5
store i32 %285, ptr @i_TimerCounterWatchdogInterrupt, align 4, !tbaa !5
store i32 1, ptr @i_TimerCounter2Init, align 4, !tbaa !5
br label %441
286: ; preds = %195
%287 = tail call i32 @printk(ptr noundef nonnull @.str.3) #2
%288 = load i32, ptr @EINVAL, align 4, !tbaa !5
%289 = sub nsw i32 0, %288
br label %445
290: ; preds = %185
%291 = tail call i32 @printk(ptr noundef nonnull @.str.4) #2
%292 = load i32, ptr @EINVAL, align 4, !tbaa !5
%293 = sub nsw i32 0, %292
br label %445
294: ; preds = %19
%295 = getelementptr inbounds i32, ptr %3, i64 2
%296 = load i32, ptr %295, align 4, !tbaa !5
switch i32 %296, label %298 [
i32 0, label %302
i32 1, label %297
]
297: ; preds = %294
br label %302
298: ; preds = %294
%299 = tail call i32 @printk(ptr noundef nonnull @.str.7) #2
%300 = load i32, ptr @EINVAL, align 4, !tbaa !5
%301 = sub nsw i32 0, %300
br label %445
302: ; preds = %294, %297
%303 = phi ptr [ @APCI1500_WATCHDOG, %297 ], [ @APCI1500_COUNTER, %294 ]
%304 = load i32, ptr %303, align 4, !tbaa !5
store i32 %304, ptr %295, align 4, !tbaa !5
%305 = getelementptr inbounds i32, ptr %3, i64 4
%306 = load i32, ptr %305, align 4, !tbaa !5
switch i32 %306, label %308 [
i32 0, label %312
i32 1, label %307
]
307: ; preds = %302
br label %312
308: ; preds = %302
%309 = tail call i32 @printk(ptr noundef nonnull @.str.2) #2
%310 = load i32, ptr @EINVAL, align 4, !tbaa !5
%311 = sub nsw i32 0, %310
br label %445
312: ; preds = %302, %307
%313 = phi ptr [ @APCI1500_SINGLE, %307 ], [ @APCI1500_CONTINUOUS, %302 ]
%314 = load i32, ptr %313, align 4, !tbaa !5
store i32 %314, ptr %305, align 4, !tbaa !5
%315 = getelementptr inbounds i32, ptr %3, i64 6
%316 = load i32, ptr %315, align 4, !tbaa !5
switch i32 %316, label %318 [
i32 0, label %322
i32 1, label %317
]
317: ; preds = %312
br label %322
318: ; preds = %312
%319 = tail call i32 @printk(ptr noundef nonnull @.str.6) #2
%320 = load i32, ptr @EINVAL, align 4, !tbaa !5
%321 = sub nsw i32 0, %320
br label %445
322: ; preds = %312, %317
%323 = phi ptr [ @APCI1500_HARDWARE_GATE, %317 ], [ @APCI1500_SOFTWARE_GATE, %312 ]
%324 = load i32, ptr %323, align 4, !tbaa !5
store i32 %324, ptr %315, align 4, !tbaa !5
%325 = load i32, ptr @APCI1500_WATCHDOG, align 4, !tbaa !5
%326 = icmp eq i32 %304, %325
%327 = or i32 %304, %314
%328 = or i32 %327, 84
%329 = or i32 %327, %324
%330 = or i32 %329, 7
%331 = select i1 %326, i32 %328, i32 %330
%332 = getelementptr inbounds i32, ptr %3, i64 3
%333 = load i32, ptr %332, align 4, !tbaa !5
%334 = icmp ult i32 %333, 65536
br i1 %334, label %335, label %433
335: ; preds = %322
%336 = getelementptr inbounds i32, ptr %3, i64 7
%337 = load i32, ptr %336, align 4, !tbaa !5
%338 = load i32, ptr @APCI1500_ENABLE, align 4, !tbaa !5
%339 = icmp eq i32 %337, %338
%340 = load i32, ptr @APCI1500_DISABLE, align 4
%341 = icmp eq i32 %337, %340
%342 = select i1 %339, i1 true, i1 %341
br i1 %342, label %343, label %429
343: ; preds = %335
%344 = load i32, ptr @APCI1500_RW_CPT_TMR3_MODE_SPECIFICATION, align 4, !tbaa !5
%345 = load ptr, ptr @devpriv, align 8, !tbaa !9
%346 = load i64, ptr %345, align 8, !tbaa !16
%347 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%348 = add nsw i64 %347, %346
%349 = tail call i32 @outb(i32 noundef %344, i64 noundef %348) #2
%350 = load ptr, ptr @devpriv, align 8, !tbaa !9
%351 = load i64, ptr %350, align 8, !tbaa !16
%352 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%353 = add nsw i64 %352, %351
%354 = tail call i32 @outb(i32 noundef %331, i64 noundef %353) #2
%355 = load i32, ptr @APCI1500_RW_CPT_TMR3_TIME_CST_LOW, align 4, !tbaa !5
%356 = load ptr, ptr @devpriv, align 8, !tbaa !9
%357 = load i64, ptr %356, align 8, !tbaa !16
%358 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%359 = add nsw i64 %358, %357
%360 = tail call i32 @outb(i32 noundef %355, i64 noundef %359) #2
%361 = load i32, ptr %332, align 4, !tbaa !5
%362 = load ptr, ptr @devpriv, align 8, !tbaa !9
%363 = load i64, ptr %362, align 8, !tbaa !16
%364 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%365 = add nsw i64 %364, %363
%366 = tail call i32 @outb(i32 noundef %361, i64 noundef %365) #2
%367 = load i32, ptr @APCI1500_RW_CPT_TMR3_TIME_CST_HIGH, align 4, !tbaa !5
%368 = load ptr, ptr @devpriv, align 8, !tbaa !9
%369 = load i64, ptr %368, align 8, !tbaa !16
%370 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%371 = add nsw i64 %370, %369
%372 = tail call i32 @outb(i32 noundef %367, i64 noundef %371) #2
%373 = load i32, ptr %332, align 4, !tbaa !5
%374 = lshr i32 %373, 8
store i32 %374, ptr %332, align 4, !tbaa !5
%375 = load ptr, ptr @devpriv, align 8, !tbaa !9
%376 = load i64, ptr %375, align 8, !tbaa !16
%377 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%378 = add nsw i64 %377, %376
%379 = tail call i32 @outb(i32 noundef %374, i64 noundef %378) #2
%380 = load i32, ptr @APCI1500_RW_MASTER_CONFIGURATION_CONTROL, align 4, !tbaa !5
%381 = load ptr, ptr @devpriv, align 8, !tbaa !9
%382 = load i64, ptr %381, align 8, !tbaa !16
%383 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%384 = add nsw i64 %383, %382
%385 = tail call i32 @outb(i32 noundef %380, i64 noundef %384) #2
%386 = load ptr, ptr @devpriv, align 8, !tbaa !9
%387 = load i64, ptr %386, align 8, !tbaa !16
%388 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%389 = add nsw i64 %388, %387
%390 = tail call i32 @inb(i64 noundef %389) #2
%391 = or i32 %390, 16
%392 = load i32, ptr @APCI1500_RW_MASTER_CONFIGURATION_CONTROL, align 4, !tbaa !5
%393 = load ptr, ptr @devpriv, align 8, !tbaa !9
%394 = load i64, ptr %393, align 8, !tbaa !16
%395 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%396 = add nsw i64 %395, %394
%397 = tail call i32 @outb(i32 noundef %392, i64 noundef %396) #2
%398 = load ptr, ptr @devpriv, align 8, !tbaa !9
%399 = load i64, ptr %398, align 8, !tbaa !16
%400 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%401 = add nsw i64 %400, %399
%402 = tail call i32 @outb(i32 noundef %391, i64 noundef %401) #2
%403 = load i32, ptr %295, align 4, !tbaa !5
%404 = load i32, ptr @APCI1500_COUNTER, align 4, !tbaa !5
%405 = icmp eq i32 %403, %404
br i1 %405, label %406, label %437
406: ; preds = %343
%407 = load i32, ptr @APCI1500_RW_CPT_TMR3_CMD_STATUS, align 4, !tbaa !5
%408 = load ptr, ptr @devpriv, align 8, !tbaa !9
%409 = load i64, ptr %408, align 8, !tbaa !16
%410 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%411 = add nsw i64 %410, %409
%412 = tail call i32 @outb(i32 noundef %407, i64 noundef %411) #2
%413 = load ptr, ptr @devpriv, align 8, !tbaa !9
%414 = load i64, ptr %413, align 8, !tbaa !16
%415 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%416 = add nsw i64 %415, %414
%417 = tail call i32 @outb(i32 noundef 0, i64 noundef %416) #2
%418 = load i32, ptr @APCI1500_RW_CPT_TMR3_CMD_STATUS, align 4, !tbaa !5
%419 = load ptr, ptr @devpriv, align 8, !tbaa !9
%420 = load i64, ptr %419, align 8, !tbaa !16
%421 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%422 = add nsw i64 %421, %420
%423 = tail call i32 @outb(i32 noundef %418, i64 noundef %422) #2
%424 = load ptr, ptr @devpriv, align 8, !tbaa !9
%425 = load i64, ptr %424, align 8, !tbaa !16
%426 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !15
%427 = add nsw i64 %426, %425
%428 = tail call i32 @outb(i32 noundef 2, i64 noundef %427) #2
br label %437
429: ; preds = %335
%430 = tail call i32 @printk(ptr noundef nonnull @.str.3) #2
%431 = load i32, ptr @EINVAL, align 4, !tbaa !5
%432 = sub nsw i32 0, %431
br label %445
433: ; preds = %322
%434 = tail call i32 @printk(ptr noundef nonnull @.str.4) #2
%435 = load i32, ptr @EINVAL, align 4, !tbaa !5
%436 = sub nsw i32 0, %435
br label %445
437: ; preds = %406, %343
%438 = load i32, ptr %336, align 4, !tbaa !5
store i32 %438, ptr @i_TimerCounterWatchdogInterrupt, align 4, !tbaa !5
store i32 1, ptr @i_WatchdogCounter3Init, align 4, !tbaa !5
br label %441
439: ; preds = %19
%440 = tail call i32 @printk(ptr noundef nonnull @.str.8) #2
br label %441
441: ; preds = %439, %437, %203, %56
%442 = getelementptr inbounds i32, ptr %3, i64 2
%443 = load i32, ptr %442, align 4, !tbaa !5
store i32 %443, ptr @i_CounterLogic, align 4, !tbaa !5
%444 = load i32, ptr %2, align 4, !tbaa !17
br label %445
445: ; preds = %441, %433, %429, %318, %308, %298, %290, %286, %181, %171, %161, %151, %143, %139, %36, %26, %15
%446 = phi i32 [ %444, %441 ], [ %301, %298 ], [ %311, %308 ], [ %321, %318 ], [ %432, %429 ], [ %436, %433 ], [ %154, %151 ], [ %164, %161 ], [ %174, %171 ], [ %184, %181 ], [ %289, %286 ], [ %293, %290 ], [ %29, %26 ], [ %39, %36 ], [ %142, %139 ], [ %146, %143 ], [ %18, %15 ]
ret i32 %446
}
declare i32 @outw(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @printk(ptr noundef) local_unnamed_addr #1
declare i32 @outb(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @inb(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
!11 = !{!12, !6, i64 16}
!12 = !{!"TYPE_2__", !13, i64 0, !13, i64 8, !6, i64 16}
!13 = !{!"long", !7, i64 0}
!14 = !{!12, !13, i64 8}
!15 = !{!13, !13, i64 0}
!16 = !{!12, !13, i64 0}
!17 = !{!18, !6, i64 0}
!18 = !{!"comedi_insn", !6, i64 0}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/addi-data/extr_hwdrv_apci1500.c_i_APCI1500_ConfigCounterTimerWatchdog.c'
source_filename = "AnghaBench/fastsocket/kernel/drivers/staging/comedi/drivers/addi-data/extr_hwdrv_apci1500.c_i_APCI1500_ConfigCounterTimerWatchdog.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@current = common local_unnamed_addr global i32 0, align 4
@devpriv = common local_unnamed_addr global ptr null, align 8
@APCI1500_CLK_SELECT = common local_unnamed_addr global i64 0, align 8
@.str = private unnamed_addr constant [54 x i8] c"\0AThe option for input clock selection does not exist\0A\00", align 1
@EINVAL = common local_unnamed_addr global i32 0, align 4
@APCI1500_COUNTER = common local_unnamed_addr global i32 0, align 4
@APCI1500_TIMER = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [43 x i8] c"\0AThis choice is not a timer nor a counter\0A\00", align 1
@APCI1500_CONTINUOUS = common local_unnamed_addr global i32 0, align 4
@APCI1500_SINGLE = common local_unnamed_addr global i32 0, align 4
@.str.2 = private unnamed_addr constant [56 x i8] c"\0AThis option for single/continuous mode does not exist\0A\00", align 1
@APCI1500_ENABLE = common local_unnamed_addr global i32 0, align 4
@APCI1500_DISABLE = common local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR1_MODE_SPECIFICATION = common local_unnamed_addr global i32 0, align 4
@APCI1500_Z8536_CONTROL_REGISTER = common local_unnamed_addr global i64 0, align 8
@APCI1500_RW_CPT_TMR1_TIME_CST_LOW = common local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR1_TIME_CST_HIGH = common local_unnamed_addr global i32 0, align 4
@APCI1500_RW_MASTER_CONFIGURATION_CONTROL = common local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR1_CMD_STATUS = common local_unnamed_addr global i32 0, align 4
@.str.3 = private unnamed_addr constant [52 x i8] c"\0AError in selection of interrupt enable or disable\0A\00", align 1
@.str.4 = private unnamed_addr constant [37 x i8] c"\0AError in selection of reload value\0A\00", align 1
@i_TimerCounterWatchdogInterrupt = common local_unnamed_addr global i32 0, align 4
@i_TimerCounter1Init = common local_unnamed_addr global i32 0, align 4
@APCI1500_SOFTWARE_TRIGGER = common local_unnamed_addr global i32 0, align 4
@APCI1500_HARDWARE_TRIGGER = common local_unnamed_addr global i32 0, align 4
@.str.5 = private unnamed_addr constant [62 x i8] c"\0AThis choice for software or hardware trigger does not exist\0A\00", align 1
@APCI1500_SOFTWARE_GATE = common local_unnamed_addr global i32 0, align 4
@APCI1500_HARDWARE_GATE = common local_unnamed_addr global i32 0, align 4
@.str.6 = private unnamed_addr constant [59 x i8] c"\0AThis choice for software or hardware gate does not exist\0A\00", align 1
@APCI1500_RW_CPT_TMR2_MODE_SPECIFICATION = common local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR2_TIME_CST_LOW = common local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR2_TIME_CST_HIGH = common local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR2_CMD_STATUS = common local_unnamed_addr global i32 0, align 4
@i_TimerCounter2Init = common local_unnamed_addr global i32 0, align 4
@APCI1500_WATCHDOG = common local_unnamed_addr global i32 0, align 4
@.str.7 = private unnamed_addr constant [46 x i8] c"\0AThis choice is not a watchdog nor a counter\0A\00", align 1
@APCI1500_RW_CPT_TMR3_MODE_SPECIFICATION = common local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR3_TIME_CST_LOW = common local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR3_TIME_CST_HIGH = common local_unnamed_addr global i32 0, align 4
@APCI1500_RW_CPT_TMR3_CMD_STATUS = common local_unnamed_addr global i32 0, align 4
@i_WatchdogCounter3Init = common local_unnamed_addr global i32 0, align 4
@.str.8 = private unnamed_addr constant [51 x i8] c"\0AThe specified counter\09imer option does not exist\0A\00", align 1
@i_CounterLogic = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @i_APCI1500_ConfigCounterTimerWatchdog(ptr nocapture noundef readnone %0, ptr nocapture noundef readnone %1, ptr nocapture noundef readonly %2, ptr nocapture noundef %3) local_unnamed_addr #0 {
%5 = load i32, ptr @current, align 4, !tbaa !6
%6 = load ptr, ptr @devpriv, align 8, !tbaa !10
%7 = getelementptr inbounds i8, ptr %6, i64 16
store i32 %5, ptr %7, align 8, !tbaa !12
%8 = load i32, ptr %3, align 4, !tbaa !6
switch i32 %8, label %15 [
i32 0, label %9
i32 1, label %9
i32 2, label %9
i32 3, label %19
]
9: ; preds = %4, %4, %4
%10 = getelementptr inbounds i8, ptr %6, i64 8
%11 = load i64, ptr %10, align 8, !tbaa !15
%12 = load i64, ptr @APCI1500_CLK_SELECT, align 8, !tbaa !16
%13 = add nsw i64 %12, %11
%14 = tail call i32 @outw(i32 noundef %8, i64 noundef %13) #2
br label %19
15: ; preds = %4
%16 = tail call i32 @printk(ptr noundef nonnull @.str) #2
%17 = load i32, ptr @EINVAL, align 4, !tbaa !6
%18 = sub nsw i32 0, %17
br label %445
19: ; preds = %4, %9
%20 = getelementptr inbounds i8, ptr %3, i64 4
%21 = load i32, ptr %20, align 4, !tbaa !6
switch i32 %21, label %439 [
i32 130, label %22
i32 129, label %147
i32 128, label %294
]
22: ; preds = %19
%23 = getelementptr inbounds i8, ptr %3, i64 8
%24 = load i32, ptr %23, align 4, !tbaa !6
switch i32 %24, label %26 [
i32 0, label %30
i32 1, label %25
]
25: ; preds = %22
br label %30
26: ; preds = %22
%27 = tail call i32 @printk(ptr noundef nonnull @.str.1) #2
%28 = load i32, ptr @EINVAL, align 4, !tbaa !6
%29 = sub nsw i32 0, %28
br label %445
30: ; preds = %22, %25
%31 = phi ptr [ @APCI1500_TIMER, %25 ], [ @APCI1500_COUNTER, %22 ]
%32 = load i32, ptr %31, align 4, !tbaa !6
store i32 %32, ptr %23, align 4, !tbaa !6
%33 = getelementptr inbounds i8, ptr %3, i64 16
%34 = load i32, ptr %33, align 4, !tbaa !6
switch i32 %34, label %36 [
i32 0, label %40
i32 1, label %35
]
35: ; preds = %30
br label %40
36: ; preds = %30
%37 = tail call i32 @printk(ptr noundef nonnull @.str.2) #2
%38 = load i32, ptr @EINVAL, align 4, !tbaa !6
%39 = sub nsw i32 0, %38
br label %445
40: ; preds = %30, %35
%41 = phi ptr [ @APCI1500_SINGLE, %35 ], [ @APCI1500_CONTINUOUS, %30 ]
%42 = load i32, ptr %41, align 4, !tbaa !6
store i32 %42, ptr %33, align 4, !tbaa !6
%43 = or i32 %32, %42
%44 = or i32 %43, 7
%45 = getelementptr inbounds i8, ptr %3, i64 12
%46 = load i32, ptr %45, align 4, !tbaa !6
%47 = icmp ult i32 %46, 65536
br i1 %47, label %48, label %143
48: ; preds = %40
%49 = getelementptr inbounds i8, ptr %3, i64 28
%50 = load i32, ptr %49, align 4, !tbaa !6
%51 = load i32, ptr @APCI1500_ENABLE, align 4, !tbaa !6
%52 = icmp eq i32 %50, %51
%53 = load i32, ptr @APCI1500_DISABLE, align 4
%54 = icmp eq i32 %50, %53
%55 = select i1 %52, i1 true, i1 %54
br i1 %55, label %56, label %139
56: ; preds = %48
%57 = load i32, ptr @APCI1500_RW_CPT_TMR1_MODE_SPECIFICATION, align 4, !tbaa !6
%58 = load ptr, ptr @devpriv, align 8, !tbaa !10
%59 = load i64, ptr %58, align 8, !tbaa !17
%60 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%61 = add nsw i64 %60, %59
%62 = tail call i32 @outb(i32 noundef %57, i64 noundef %61) #2
%63 = load ptr, ptr @devpriv, align 8, !tbaa !10
%64 = load i64, ptr %63, align 8, !tbaa !17
%65 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%66 = add nsw i64 %65, %64
%67 = tail call i32 @outb(i32 noundef %44, i64 noundef %66) #2
%68 = load i32, ptr @APCI1500_RW_CPT_TMR1_TIME_CST_LOW, align 4, !tbaa !6
%69 = load ptr, ptr @devpriv, align 8, !tbaa !10
%70 = load i64, ptr %69, align 8, !tbaa !17
%71 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%72 = add nsw i64 %71, %70
%73 = tail call i32 @outb(i32 noundef %68, i64 noundef %72) #2
%74 = load i32, ptr %45, align 4, !tbaa !6
%75 = load ptr, ptr @devpriv, align 8, !tbaa !10
%76 = load i64, ptr %75, align 8, !tbaa !17
%77 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%78 = add nsw i64 %77, %76
%79 = tail call i32 @outb(i32 noundef %74, i64 noundef %78) #2
%80 = load i32, ptr @APCI1500_RW_CPT_TMR1_TIME_CST_HIGH, align 4, !tbaa !6
%81 = load ptr, ptr @devpriv, align 8, !tbaa !10
%82 = load i64, ptr %81, align 8, !tbaa !17
%83 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%84 = add nsw i64 %83, %82
%85 = tail call i32 @outb(i32 noundef %80, i64 noundef %84) #2
%86 = load i32, ptr %45, align 4, !tbaa !6
%87 = lshr i32 %86, 8
store i32 %87, ptr %45, align 4, !tbaa !6
%88 = load ptr, ptr @devpriv, align 8, !tbaa !10
%89 = load i64, ptr %88, align 8, !tbaa !17
%90 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%91 = add nsw i64 %90, %89
%92 = tail call i32 @outb(i32 noundef %87, i64 noundef %91) #2
%93 = load i32, ptr @APCI1500_RW_MASTER_CONFIGURATION_CONTROL, align 4, !tbaa !6
%94 = load ptr, ptr @devpriv, align 8, !tbaa !10
%95 = load i64, ptr %94, align 8, !tbaa !17
%96 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%97 = add nsw i64 %96, %95
%98 = tail call i32 @outb(i32 noundef %93, i64 noundef %97) #2
%99 = load ptr, ptr @devpriv, align 8, !tbaa !10
%100 = load i64, ptr %99, align 8, !tbaa !17
%101 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%102 = add nsw i64 %101, %100
%103 = tail call i32 @inb(i64 noundef %102) #2
%104 = or i32 %103, 64
%105 = load i32, ptr @APCI1500_RW_MASTER_CONFIGURATION_CONTROL, align 4, !tbaa !6
%106 = load ptr, ptr @devpriv, align 8, !tbaa !10
%107 = load i64, ptr %106, align 8, !tbaa !17
%108 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%109 = add nsw i64 %108, %107
%110 = tail call i32 @outb(i32 noundef %105, i64 noundef %109) #2
%111 = load ptr, ptr @devpriv, align 8, !tbaa !10
%112 = load i64, ptr %111, align 8, !tbaa !17
%113 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%114 = add nsw i64 %113, %112
%115 = tail call i32 @outb(i32 noundef %104, i64 noundef %114) #2
%116 = load i32, ptr @APCI1500_RW_CPT_TMR1_CMD_STATUS, align 4, !tbaa !6
%117 = load ptr, ptr @devpriv, align 8, !tbaa !10
%118 = load i64, ptr %117, align 8, !tbaa !17
%119 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%120 = add nsw i64 %119, %118
%121 = tail call i32 @outb(i32 noundef %116, i64 noundef %120) #2
%122 = load ptr, ptr @devpriv, align 8, !tbaa !10
%123 = load i64, ptr %122, align 8, !tbaa !17
%124 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%125 = add nsw i64 %124, %123
%126 = tail call i32 @outb(i32 noundef 0, i64 noundef %125) #2
%127 = load i32, ptr @APCI1500_RW_CPT_TMR1_CMD_STATUS, align 4, !tbaa !6
%128 = load ptr, ptr @devpriv, align 8, !tbaa !10
%129 = load i64, ptr %128, align 8, !tbaa !17
%130 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%131 = add nsw i64 %130, %129
%132 = tail call i32 @outb(i32 noundef %127, i64 noundef %131) #2
%133 = load ptr, ptr @devpriv, align 8, !tbaa !10
%134 = load i64, ptr %133, align 8, !tbaa !17
%135 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%136 = add nsw i64 %135, %134
%137 = tail call i32 @outb(i32 noundef 2, i64 noundef %136) #2
%138 = load i32, ptr %49, align 4, !tbaa !6
store i32 %138, ptr @i_TimerCounterWatchdogInterrupt, align 4, !tbaa !6
store i32 1, ptr @i_TimerCounter1Init, align 4, !tbaa !6
br label %441
139: ; preds = %48
%140 = tail call i32 @printk(ptr noundef nonnull @.str.3) #2
%141 = load i32, ptr @EINVAL, align 4, !tbaa !6
%142 = sub nsw i32 0, %141
br label %445
143: ; preds = %40
%144 = tail call i32 @printk(ptr noundef nonnull @.str.4) #2
%145 = load i32, ptr @EINVAL, align 4, !tbaa !6
%146 = sub nsw i32 0, %145
br label %445
147: ; preds = %19
%148 = getelementptr inbounds i8, ptr %3, i64 8
%149 = load i32, ptr %148, align 4, !tbaa !6
switch i32 %149, label %151 [
i32 0, label %155
i32 1, label %150
]
150: ; preds = %147
br label %155
151: ; preds = %147
%152 = tail call i32 @printk(ptr noundef nonnull @.str.1) #2
%153 = load i32, ptr @EINVAL, align 4, !tbaa !6
%154 = sub nsw i32 0, %153
br label %445
155: ; preds = %147, %150
%156 = phi ptr [ @APCI1500_TIMER, %150 ], [ @APCI1500_COUNTER, %147 ]
%157 = load i32, ptr %156, align 4, !tbaa !6
store i32 %157, ptr %148, align 4, !tbaa !6
%158 = getelementptr inbounds i8, ptr %3, i64 16
%159 = load i32, ptr %158, align 4, !tbaa !6
switch i32 %159, label %161 [
i32 0, label %165
i32 1, label %160
]
160: ; preds = %155
br label %165
161: ; preds = %155
%162 = tail call i32 @printk(ptr noundef nonnull @.str.2) #2
%163 = load i32, ptr @EINVAL, align 4, !tbaa !6
%164 = sub nsw i32 0, %163
br label %445
165: ; preds = %155, %160
%166 = phi ptr [ @APCI1500_SINGLE, %160 ], [ @APCI1500_CONTINUOUS, %155 ]
%167 = load i32, ptr %166, align 4, !tbaa !6
store i32 %167, ptr %158, align 4, !tbaa !6
%168 = getelementptr inbounds i8, ptr %3, i64 20
%169 = load i32, ptr %168, align 4, !tbaa !6
switch i32 %169, label %171 [
i32 0, label %175
i32 1, label %170
]
170: ; preds = %165
br label %175
171: ; preds = %165
%172 = tail call i32 @printk(ptr noundef nonnull @.str.5) #2
%173 = load i32, ptr @EINVAL, align 4, !tbaa !6
%174 = sub nsw i32 0, %173
br label %445
175: ; preds = %165, %170
%176 = phi ptr [ @APCI1500_HARDWARE_TRIGGER, %170 ], [ @APCI1500_SOFTWARE_TRIGGER, %165 ]
%177 = load i32, ptr %176, align 4, !tbaa !6
store i32 %177, ptr %168, align 4, !tbaa !6
%178 = getelementptr inbounds i8, ptr %3, i64 24
%179 = load i32, ptr %178, align 4, !tbaa !6
switch i32 %179, label %181 [
i32 0, label %185
i32 1, label %180
]
180: ; preds = %175
br label %185
181: ; preds = %175
%182 = tail call i32 @printk(ptr noundef nonnull @.str.6) #2
%183 = load i32, ptr @EINVAL, align 4, !tbaa !6
%184 = sub nsw i32 0, %183
br label %445
185: ; preds = %175, %180
%186 = phi ptr [ @APCI1500_HARDWARE_GATE, %180 ], [ @APCI1500_SOFTWARE_GATE, %175 ]
%187 = load i32, ptr %186, align 4, !tbaa !6
store i32 %187, ptr %178, align 4, !tbaa !6
%188 = or i32 %157, %167
%189 = or i32 %188, %177
%190 = or i32 %189, %187
%191 = or i32 %190, 7
%192 = getelementptr inbounds i8, ptr %3, i64 12
%193 = load i32, ptr %192, align 4, !tbaa !6
%194 = icmp ult i32 %193, 65536
br i1 %194, label %195, label %290
195: ; preds = %185
%196 = getelementptr inbounds i8, ptr %3, i64 28
%197 = load i32, ptr %196, align 4, !tbaa !6
%198 = load i32, ptr @APCI1500_ENABLE, align 4, !tbaa !6
%199 = icmp eq i32 %197, %198
%200 = load i32, ptr @APCI1500_DISABLE, align 4
%201 = icmp eq i32 %197, %200
%202 = select i1 %199, i1 true, i1 %201
br i1 %202, label %203, label %286
203: ; preds = %195
%204 = load i32, ptr @APCI1500_RW_CPT_TMR2_MODE_SPECIFICATION, align 4, !tbaa !6
%205 = load ptr, ptr @devpriv, align 8, !tbaa !10
%206 = load i64, ptr %205, align 8, !tbaa !17
%207 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%208 = add nsw i64 %207, %206
%209 = tail call i32 @outb(i32 noundef %204, i64 noundef %208) #2
%210 = load ptr, ptr @devpriv, align 8, !tbaa !10
%211 = load i64, ptr %210, align 8, !tbaa !17
%212 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%213 = add nsw i64 %212, %211
%214 = tail call i32 @outb(i32 noundef %191, i64 noundef %213) #2
%215 = load i32, ptr @APCI1500_RW_CPT_TMR2_TIME_CST_LOW, align 4, !tbaa !6
%216 = load ptr, ptr @devpriv, align 8, !tbaa !10
%217 = load i64, ptr %216, align 8, !tbaa !17
%218 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%219 = add nsw i64 %218, %217
%220 = tail call i32 @outb(i32 noundef %215, i64 noundef %219) #2
%221 = load i32, ptr %192, align 4, !tbaa !6
%222 = load ptr, ptr @devpriv, align 8, !tbaa !10
%223 = load i64, ptr %222, align 8, !tbaa !17
%224 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%225 = add nsw i64 %224, %223
%226 = tail call i32 @outb(i32 noundef %221, i64 noundef %225) #2
%227 = load i32, ptr @APCI1500_RW_CPT_TMR2_TIME_CST_HIGH, align 4, !tbaa !6
%228 = load ptr, ptr @devpriv, align 8, !tbaa !10
%229 = load i64, ptr %228, align 8, !tbaa !17
%230 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%231 = add nsw i64 %230, %229
%232 = tail call i32 @outb(i32 noundef %227, i64 noundef %231) #2
%233 = load i32, ptr %192, align 4, !tbaa !6
%234 = lshr i32 %233, 8
store i32 %234, ptr %192, align 4, !tbaa !6
%235 = load ptr, ptr @devpriv, align 8, !tbaa !10
%236 = load i64, ptr %235, align 8, !tbaa !17
%237 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%238 = add nsw i64 %237, %236
%239 = tail call i32 @outb(i32 noundef %234, i64 noundef %238) #2
%240 = load i32, ptr @APCI1500_RW_MASTER_CONFIGURATION_CONTROL, align 4, !tbaa !6
%241 = load ptr, ptr @devpriv, align 8, !tbaa !10
%242 = load i64, ptr %241, align 8, !tbaa !17
%243 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%244 = add nsw i64 %243, %242
%245 = tail call i32 @outb(i32 noundef %240, i64 noundef %244) #2
%246 = load ptr, ptr @devpriv, align 8, !tbaa !10
%247 = load i64, ptr %246, align 8, !tbaa !17
%248 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%249 = add nsw i64 %248, %247
%250 = tail call i32 @inb(i64 noundef %249) #2
%251 = or i32 %250, 32
%252 = load i32, ptr @APCI1500_RW_MASTER_CONFIGURATION_CONTROL, align 4, !tbaa !6
%253 = load ptr, ptr @devpriv, align 8, !tbaa !10
%254 = load i64, ptr %253, align 8, !tbaa !17
%255 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%256 = add nsw i64 %255, %254
%257 = tail call i32 @outb(i32 noundef %252, i64 noundef %256) #2
%258 = load ptr, ptr @devpriv, align 8, !tbaa !10
%259 = load i64, ptr %258, align 8, !tbaa !17
%260 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%261 = add nsw i64 %260, %259
%262 = tail call i32 @outb(i32 noundef %251, i64 noundef %261) #2
%263 = load i32, ptr @APCI1500_RW_CPT_TMR2_CMD_STATUS, align 4, !tbaa !6
%264 = load ptr, ptr @devpriv, align 8, !tbaa !10
%265 = load i64, ptr %264, align 8, !tbaa !17
%266 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%267 = add nsw i64 %266, %265
%268 = tail call i32 @outb(i32 noundef %263, i64 noundef %267) #2
%269 = load ptr, ptr @devpriv, align 8, !tbaa !10
%270 = load i64, ptr %269, align 8, !tbaa !17
%271 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%272 = add nsw i64 %271, %270
%273 = tail call i32 @outb(i32 noundef 0, i64 noundef %272) #2
%274 = load i32, ptr @APCI1500_RW_CPT_TMR2_CMD_STATUS, align 4, !tbaa !6
%275 = load ptr, ptr @devpriv, align 8, !tbaa !10
%276 = load i64, ptr %275, align 8, !tbaa !17
%277 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%278 = add nsw i64 %277, %276
%279 = tail call i32 @outb(i32 noundef %274, i64 noundef %278) #2
%280 = load ptr, ptr @devpriv, align 8, !tbaa !10
%281 = load i64, ptr %280, align 8, !tbaa !17
%282 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%283 = add nsw i64 %282, %281
%284 = tail call i32 @outb(i32 noundef 2, i64 noundef %283) #2
%285 = load i32, ptr %196, align 4, !tbaa !6
store i32 %285, ptr @i_TimerCounterWatchdogInterrupt, align 4, !tbaa !6
store i32 1, ptr @i_TimerCounter2Init, align 4, !tbaa !6
br label %441
286: ; preds = %195
%287 = tail call i32 @printk(ptr noundef nonnull @.str.3) #2
%288 = load i32, ptr @EINVAL, align 4, !tbaa !6
%289 = sub nsw i32 0, %288
br label %445
290: ; preds = %185
%291 = tail call i32 @printk(ptr noundef nonnull @.str.4) #2
%292 = load i32, ptr @EINVAL, align 4, !tbaa !6
%293 = sub nsw i32 0, %292
br label %445
294: ; preds = %19
%295 = getelementptr inbounds i8, ptr %3, i64 8
%296 = load i32, ptr %295, align 4, !tbaa !6
switch i32 %296, label %298 [
i32 0, label %302
i32 1, label %297
]
297: ; preds = %294
br label %302
298: ; preds = %294
%299 = tail call i32 @printk(ptr noundef nonnull @.str.7) #2
%300 = load i32, ptr @EINVAL, align 4, !tbaa !6
%301 = sub nsw i32 0, %300
br label %445
302: ; preds = %294, %297
%303 = phi ptr [ @APCI1500_WATCHDOG, %297 ], [ @APCI1500_COUNTER, %294 ]
%304 = load i32, ptr %303, align 4, !tbaa !6
store i32 %304, ptr %295, align 4, !tbaa !6
%305 = getelementptr inbounds i8, ptr %3, i64 16
%306 = load i32, ptr %305, align 4, !tbaa !6
switch i32 %306, label %308 [
i32 0, label %312
i32 1, label %307
]
307: ; preds = %302
br label %312
308: ; preds = %302
%309 = tail call i32 @printk(ptr noundef nonnull @.str.2) #2
%310 = load i32, ptr @EINVAL, align 4, !tbaa !6
%311 = sub nsw i32 0, %310
br label %445
312: ; preds = %302, %307
%313 = phi ptr [ @APCI1500_SINGLE, %307 ], [ @APCI1500_CONTINUOUS, %302 ]
%314 = load i32, ptr %313, align 4, !tbaa !6
store i32 %314, ptr %305, align 4, !tbaa !6
%315 = getelementptr inbounds i8, ptr %3, i64 24
%316 = load i32, ptr %315, align 4, !tbaa !6
switch i32 %316, label %318 [
i32 0, label %322
i32 1, label %317
]
317: ; preds = %312
br label %322
318: ; preds = %312
%319 = tail call i32 @printk(ptr noundef nonnull @.str.6) #2
%320 = load i32, ptr @EINVAL, align 4, !tbaa !6
%321 = sub nsw i32 0, %320
br label %445
322: ; preds = %312, %317
%323 = phi ptr [ @APCI1500_HARDWARE_GATE, %317 ], [ @APCI1500_SOFTWARE_GATE, %312 ]
%324 = load i32, ptr %323, align 4, !tbaa !6
store i32 %324, ptr %315, align 4, !tbaa !6
%325 = load i32, ptr @APCI1500_WATCHDOG, align 4, !tbaa !6
%326 = icmp eq i32 %304, %325
%327 = or i32 %304, %314
%328 = or i32 %327, 84
%329 = or i32 %327, %324
%330 = or i32 %329, 7
%331 = select i1 %326, i32 %328, i32 %330
%332 = getelementptr inbounds i8, ptr %3, i64 12
%333 = load i32, ptr %332, align 4, !tbaa !6
%334 = icmp ult i32 %333, 65536
br i1 %334, label %335, label %433
335: ; preds = %322
%336 = getelementptr inbounds i8, ptr %3, i64 28
%337 = load i32, ptr %336, align 4, !tbaa !6
%338 = load i32, ptr @APCI1500_ENABLE, align 4, !tbaa !6
%339 = icmp eq i32 %337, %338
%340 = load i32, ptr @APCI1500_DISABLE, align 4
%341 = icmp eq i32 %337, %340
%342 = select i1 %339, i1 true, i1 %341
br i1 %342, label %343, label %429
343: ; preds = %335
%344 = load i32, ptr @APCI1500_RW_CPT_TMR3_MODE_SPECIFICATION, align 4, !tbaa !6
%345 = load ptr, ptr @devpriv, align 8, !tbaa !10
%346 = load i64, ptr %345, align 8, !tbaa !17
%347 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%348 = add nsw i64 %347, %346
%349 = tail call i32 @outb(i32 noundef %344, i64 noundef %348) #2
%350 = load ptr, ptr @devpriv, align 8, !tbaa !10
%351 = load i64, ptr %350, align 8, !tbaa !17
%352 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%353 = add nsw i64 %352, %351
%354 = tail call i32 @outb(i32 noundef %331, i64 noundef %353) #2
%355 = load i32, ptr @APCI1500_RW_CPT_TMR3_TIME_CST_LOW, align 4, !tbaa !6
%356 = load ptr, ptr @devpriv, align 8, !tbaa !10
%357 = load i64, ptr %356, align 8, !tbaa !17
%358 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%359 = add nsw i64 %358, %357
%360 = tail call i32 @outb(i32 noundef %355, i64 noundef %359) #2
%361 = load i32, ptr %332, align 4, !tbaa !6
%362 = load ptr, ptr @devpriv, align 8, !tbaa !10
%363 = load i64, ptr %362, align 8, !tbaa !17
%364 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%365 = add nsw i64 %364, %363
%366 = tail call i32 @outb(i32 noundef %361, i64 noundef %365) #2
%367 = load i32, ptr @APCI1500_RW_CPT_TMR3_TIME_CST_HIGH, align 4, !tbaa !6
%368 = load ptr, ptr @devpriv, align 8, !tbaa !10
%369 = load i64, ptr %368, align 8, !tbaa !17
%370 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%371 = add nsw i64 %370, %369
%372 = tail call i32 @outb(i32 noundef %367, i64 noundef %371) #2
%373 = load i32, ptr %332, align 4, !tbaa !6
%374 = lshr i32 %373, 8
store i32 %374, ptr %332, align 4, !tbaa !6
%375 = load ptr, ptr @devpriv, align 8, !tbaa !10
%376 = load i64, ptr %375, align 8, !tbaa !17
%377 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%378 = add nsw i64 %377, %376
%379 = tail call i32 @outb(i32 noundef %374, i64 noundef %378) #2
%380 = load i32, ptr @APCI1500_RW_MASTER_CONFIGURATION_CONTROL, align 4, !tbaa !6
%381 = load ptr, ptr @devpriv, align 8, !tbaa !10
%382 = load i64, ptr %381, align 8, !tbaa !17
%383 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%384 = add nsw i64 %383, %382
%385 = tail call i32 @outb(i32 noundef %380, i64 noundef %384) #2
%386 = load ptr, ptr @devpriv, align 8, !tbaa !10
%387 = load i64, ptr %386, align 8, !tbaa !17
%388 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%389 = add nsw i64 %388, %387
%390 = tail call i32 @inb(i64 noundef %389) #2
%391 = or i32 %390, 16
%392 = load i32, ptr @APCI1500_RW_MASTER_CONFIGURATION_CONTROL, align 4, !tbaa !6
%393 = load ptr, ptr @devpriv, align 8, !tbaa !10
%394 = load i64, ptr %393, align 8, !tbaa !17
%395 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%396 = add nsw i64 %395, %394
%397 = tail call i32 @outb(i32 noundef %392, i64 noundef %396) #2
%398 = load ptr, ptr @devpriv, align 8, !tbaa !10
%399 = load i64, ptr %398, align 8, !tbaa !17
%400 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%401 = add nsw i64 %400, %399
%402 = tail call i32 @outb(i32 noundef %391, i64 noundef %401) #2
%403 = load i32, ptr %295, align 4, !tbaa !6
%404 = load i32, ptr @APCI1500_COUNTER, align 4, !tbaa !6
%405 = icmp eq i32 %403, %404
br i1 %405, label %406, label %437
406: ; preds = %343
%407 = load i32, ptr @APCI1500_RW_CPT_TMR3_CMD_STATUS, align 4, !tbaa !6
%408 = load ptr, ptr @devpriv, align 8, !tbaa !10
%409 = load i64, ptr %408, align 8, !tbaa !17
%410 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%411 = add nsw i64 %410, %409
%412 = tail call i32 @outb(i32 noundef %407, i64 noundef %411) #2
%413 = load ptr, ptr @devpriv, align 8, !tbaa !10
%414 = load i64, ptr %413, align 8, !tbaa !17
%415 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%416 = add nsw i64 %415, %414
%417 = tail call i32 @outb(i32 noundef 0, i64 noundef %416) #2
%418 = load i32, ptr @APCI1500_RW_CPT_TMR3_CMD_STATUS, align 4, !tbaa !6
%419 = load ptr, ptr @devpriv, align 8, !tbaa !10
%420 = load i64, ptr %419, align 8, !tbaa !17
%421 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%422 = add nsw i64 %421, %420
%423 = tail call i32 @outb(i32 noundef %418, i64 noundef %422) #2
%424 = load ptr, ptr @devpriv, align 8, !tbaa !10
%425 = load i64, ptr %424, align 8, !tbaa !17
%426 = load i64, ptr @APCI1500_Z8536_CONTROL_REGISTER, align 8, !tbaa !16
%427 = add nsw i64 %426, %425
%428 = tail call i32 @outb(i32 noundef 2, i64 noundef %427) #2
br label %437
429: ; preds = %335
%430 = tail call i32 @printk(ptr noundef nonnull @.str.3) #2
%431 = load i32, ptr @EINVAL, align 4, !tbaa !6
%432 = sub nsw i32 0, %431
br label %445
433: ; preds = %322
%434 = tail call i32 @printk(ptr noundef nonnull @.str.4) #2
%435 = load i32, ptr @EINVAL, align 4, !tbaa !6
%436 = sub nsw i32 0, %435
br label %445
437: ; preds = %406, %343
%438 = load i32, ptr %336, align 4, !tbaa !6
store i32 %438, ptr @i_TimerCounterWatchdogInterrupt, align 4, !tbaa !6
store i32 1, ptr @i_WatchdogCounter3Init, align 4, !tbaa !6
br label %441
439: ; preds = %19
%440 = tail call i32 @printk(ptr noundef nonnull @.str.8) #2
br label %441
441: ; preds = %439, %437, %203, %56
%442 = getelementptr inbounds i8, ptr %3, i64 8
%443 = load i32, ptr %442, align 4, !tbaa !6
store i32 %443, ptr @i_CounterLogic, align 4, !tbaa !6
%444 = load i32, ptr %2, align 4, !tbaa !18
br label %445
445: ; preds = %441, %433, %429, %318, %308, %298, %290, %286, %181, %171, %161, %151, %143, %139, %36, %26, %15
%446 = phi i32 [ %444, %441 ], [ %301, %298 ], [ %311, %308 ], [ %321, %318 ], [ %432, %429 ], [ %436, %433 ], [ %154, %151 ], [ %164, %161 ], [ %174, %171 ], [ %184, %181 ], [ %289, %286 ], [ %293, %290 ], [ %29, %26 ], [ %39, %36 ], [ %142, %139 ], [ %146, %143 ], [ %18, %15 ]
ret i32 %446
}
declare i32 @outw(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @printk(ptr noundef) local_unnamed_addr #1
declare i32 @outb(i32 noundef, i64 noundef) local_unnamed_addr #1
declare i32 @inb(i64 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
!12 = !{!13, !7, i64 16}
!13 = !{!"TYPE_2__", !14, i64 0, !14, i64 8, !7, i64 16}
!14 = !{!"long", !8, i64 0}
!15 = !{!13, !14, i64 8}
!16 = !{!14, !14, i64 0}
!17 = !{!13, !14, i64 0}
!18 = !{!19, !7, i64 0}
!19 = !{!"comedi_insn", !7, i64 0}
| fastsocket_kernel_drivers_staging_comedi_drivers_addi-data_extr_hwdrv_apci1500.c_i_APCI1500_ConfigCounterTimerWatchdog |
; ModuleID = 'AnghaBench/postgres/src/backend/nodes/extr_equalfuncs.c__equalOnConflictClause.c'
source_filename = "AnghaBench/postgres/src/backend/nodes/extr_equalfuncs.c__equalOnConflictClause.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@action = dso_local local_unnamed_addr global i32 0, align 4
@infer = dso_local local_unnamed_addr global i32 0, align 4
@targetList = dso_local local_unnamed_addr global i32 0, align 4
@whereClause = dso_local local_unnamed_addr global i32 0, align 4
@location = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @_equalOnConflictClause], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @_equalOnConflictClause(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
%3 = load i32, ptr @action, align 4, !tbaa !5
%4 = tail call i32 @COMPARE_SCALAR_FIELD(i32 noundef %3) #2
%5 = load i32, ptr @infer, align 4, !tbaa !5
%6 = tail call i32 @COMPARE_NODE_FIELD(i32 noundef %5) #2
%7 = load i32, ptr @targetList, align 4, !tbaa !5
%8 = tail call i32 @COMPARE_NODE_FIELD(i32 noundef %7) #2
%9 = load i32, ptr @whereClause, align 4, !tbaa !5
%10 = tail call i32 @COMPARE_NODE_FIELD(i32 noundef %9) #2
%11 = load i32, ptr @location, align 4, !tbaa !5
%12 = tail call i32 @COMPARE_LOCATION_FIELD(i32 noundef %11) #2
ret i32 1
}
declare i32 @COMPARE_SCALAR_FIELD(i32 noundef) local_unnamed_addr #1
declare i32 @COMPARE_NODE_FIELD(i32 noundef) local_unnamed_addr #1
declare i32 @COMPARE_LOCATION_FIELD(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/postgres/src/backend/nodes/extr_equalfuncs.c__equalOnConflictClause.c'
source_filename = "AnghaBench/postgres/src/backend/nodes/extr_equalfuncs.c__equalOnConflictClause.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@action = common local_unnamed_addr global i32 0, align 4
@infer = common local_unnamed_addr global i32 0, align 4
@targetList = common local_unnamed_addr global i32 0, align 4
@whereClause = common local_unnamed_addr global i32 0, align 4
@location = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @_equalOnConflictClause], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @_equalOnConflictClause(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
%3 = load i32, ptr @action, align 4, !tbaa !6
%4 = tail call i32 @COMPARE_SCALAR_FIELD(i32 noundef %3) #2
%5 = load i32, ptr @infer, align 4, !tbaa !6
%6 = tail call i32 @COMPARE_NODE_FIELD(i32 noundef %5) #2
%7 = load i32, ptr @targetList, align 4, !tbaa !6
%8 = tail call i32 @COMPARE_NODE_FIELD(i32 noundef %7) #2
%9 = load i32, ptr @whereClause, align 4, !tbaa !6
%10 = tail call i32 @COMPARE_NODE_FIELD(i32 noundef %9) #2
%11 = load i32, ptr @location, align 4, !tbaa !6
%12 = tail call i32 @COMPARE_LOCATION_FIELD(i32 noundef %11) #2
ret i32 1
}
declare i32 @COMPARE_SCALAR_FIELD(i32 noundef) local_unnamed_addr #1
declare i32 @COMPARE_NODE_FIELD(i32 noundef) local_unnamed_addr #1
declare i32 @COMPARE_LOCATION_FIELD(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| postgres_src_backend_nodes_extr_equalfuncs.c__equalOnConflictClause |
; ModuleID = 'AnghaBench/postgres/src/backend/postmaster/extr_pgstat.c_pgstat_recv_bgwriter.c'
source_filename = "AnghaBench/postgres/src/backend/postmaster/extr_pgstat.c_pgstat_recv_bgwriter.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_5__ = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
%struct.TYPE_4__ = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64 }
@globalStats = dso_local local_unnamed_addr global %struct.TYPE_5__ zeroinitializer, align 16
@llvm.compiler.used = appending global [1 x ptr] [ptr @pgstat_recv_bgwriter], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: read, inaccessiblemem: none) uwtable
define internal void @pgstat_recv_bgwriter(ptr nocapture noundef readonly %0, i32 %1) #0 {
%3 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 8
%4 = load <2 x i64>, ptr %3, align 8, !tbaa !5
%5 = load <2 x i32>, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @globalStats, i64 0, i32 8), align 16, !tbaa !9
%6 = trunc <2 x i64> %4 to <2 x i32>
%7 = add <2 x i32> %5, %6
store <2 x i32> %7, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @globalStats, i64 0, i32 8), align 16, !tbaa !9
%8 = getelementptr inbounds %struct.TYPE_4__, ptr %0, i64 0, i32 4
%9 = load <4 x i64>, ptr %8, align 8, !tbaa !5
%10 = load <4 x i32>, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @globalStats, i64 0, i32 4), align 16, !tbaa !9
%11 = trunc <4 x i64> %9 to <4 x i32>
%12 = add <4 x i32> %10, %11
store <4 x i32> %12, ptr getelementptr inbounds (%struct.TYPE_5__, ptr @globalStats, i64 0, i32 4), align 16, !tbaa !9
%13 = load <4 x i64>, ptr %0, align 8, !tbaa !5
%14 = load <4 x i32>, ptr @globalStats, align 16, !tbaa !9
%15 = trunc <4 x i64> %13 to <4 x i32>
%16 = add <4 x i32> %14, %15
store <4 x i32> %16, ptr @globalStats, align 16, !tbaa !9
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, argmem: read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"int", !7, i64 0}
| ; ModuleID = 'AnghaBench/postgres/src/backend/postmaster/extr_pgstat.c_pgstat_recv_bgwriter.c'
source_filename = "AnghaBench/postgres/src/backend/postmaster/extr_pgstat.c_pgstat_recv_bgwriter.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
%struct.TYPE_5__ = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32 }
@globalStats = common local_unnamed_addr global %struct.TYPE_5__ zeroinitializer, align 4
@llvm.used = appending global [1 x ptr] [ptr @pgstat_recv_bgwriter], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: read, inaccessiblemem: none) uwtable(sync)
define internal void @pgstat_recv_bgwriter(ptr nocapture noundef readonly %0, i32 %1) #0 {
%3 = getelementptr inbounds i8, ptr %0, i64 64
%4 = load <2 x i64>, ptr %3, align 8, !tbaa !6
%5 = load <2 x i32>, ptr getelementptr inbounds (i8, ptr @globalStats, i64 32), align 4, !tbaa !10
%6 = trunc <2 x i64> %4 to <2 x i32>
%7 = add <2 x i32> %5, %6
store <2 x i32> %7, ptr getelementptr inbounds (i8, ptr @globalStats, i64 32), align 4, !tbaa !10
%8 = getelementptr inbounds i8, ptr %0, i64 32
%9 = load <4 x i64>, ptr %8, align 8, !tbaa !6
%10 = load <4 x i32>, ptr getelementptr inbounds (i8, ptr @globalStats, i64 16), align 4, !tbaa !10
%11 = trunc <4 x i64> %9 to <4 x i32>
%12 = add <4 x i32> %10, %11
store <4 x i32> %12, ptr getelementptr inbounds (i8, ptr @globalStats, i64 16), align 4, !tbaa !10
%13 = load <4 x i64>, ptr %0, align 8, !tbaa !6
%14 = load <4 x i32>, ptr @globalStats, align 4, !tbaa !10
%15 = trunc <4 x i64> %13 to <4 x i32>
%16 = add <4 x i32> %14, %15
store <4 x i32> %16, ptr @globalStats, align 4, !tbaa !10
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(readwrite, argmem: read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
| postgres_src_backend_postmaster_extr_pgstat.c_pgstat_recv_bgwriter |
; ModuleID = 'AnghaBench/postgres/src/backend/nodes/extr_equalfuncs.c__equalImportForeignSchemaStmt.c'
source_filename = "AnghaBench/postgres/src/backend/nodes/extr_equalfuncs.c__equalImportForeignSchemaStmt.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@server_name = dso_local local_unnamed_addr global i32 0, align 4
@remote_schema = dso_local local_unnamed_addr global i32 0, align 4
@local_schema = dso_local local_unnamed_addr global i32 0, align 4
@list_type = dso_local local_unnamed_addr global i32 0, align 4
@table_list = dso_local local_unnamed_addr global i32 0, align 4
@options = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @_equalImportForeignSchemaStmt], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @_equalImportForeignSchemaStmt(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
%3 = load i32, ptr @server_name, align 4, !tbaa !5
%4 = tail call i32 @COMPARE_STRING_FIELD(i32 noundef %3) #2
%5 = load i32, ptr @remote_schema, align 4, !tbaa !5
%6 = tail call i32 @COMPARE_STRING_FIELD(i32 noundef %5) #2
%7 = load i32, ptr @local_schema, align 4, !tbaa !5
%8 = tail call i32 @COMPARE_STRING_FIELD(i32 noundef %7) #2
%9 = load i32, ptr @list_type, align 4, !tbaa !5
%10 = tail call i32 @COMPARE_SCALAR_FIELD(i32 noundef %9) #2
%11 = load i32, ptr @table_list, align 4, !tbaa !5
%12 = tail call i32 @COMPARE_NODE_FIELD(i32 noundef %11) #2
%13 = load i32, ptr @options, align 4, !tbaa !5
%14 = tail call i32 @COMPARE_NODE_FIELD(i32 noundef %13) #2
ret i32 1
}
declare i32 @COMPARE_STRING_FIELD(i32 noundef) local_unnamed_addr #1
declare i32 @COMPARE_SCALAR_FIELD(i32 noundef) local_unnamed_addr #1
declare i32 @COMPARE_NODE_FIELD(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/postgres/src/backend/nodes/extr_equalfuncs.c__equalImportForeignSchemaStmt.c'
source_filename = "AnghaBench/postgres/src/backend/nodes/extr_equalfuncs.c__equalImportForeignSchemaStmt.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@server_name = common local_unnamed_addr global i32 0, align 4
@remote_schema = common local_unnamed_addr global i32 0, align 4
@local_schema = common local_unnamed_addr global i32 0, align 4
@list_type = common local_unnamed_addr global i32 0, align 4
@table_list = common local_unnamed_addr global i32 0, align 4
@options = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @_equalImportForeignSchemaStmt], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal noundef i32 @_equalImportForeignSchemaStmt(ptr nocapture readnone %0, ptr nocapture readnone %1) #0 {
%3 = load i32, ptr @server_name, align 4, !tbaa !6
%4 = tail call i32 @COMPARE_STRING_FIELD(i32 noundef %3) #2
%5 = load i32, ptr @remote_schema, align 4, !tbaa !6
%6 = tail call i32 @COMPARE_STRING_FIELD(i32 noundef %5) #2
%7 = load i32, ptr @local_schema, align 4, !tbaa !6
%8 = tail call i32 @COMPARE_STRING_FIELD(i32 noundef %7) #2
%9 = load i32, ptr @list_type, align 4, !tbaa !6
%10 = tail call i32 @COMPARE_SCALAR_FIELD(i32 noundef %9) #2
%11 = load i32, ptr @table_list, align 4, !tbaa !6
%12 = tail call i32 @COMPARE_NODE_FIELD(i32 noundef %11) #2
%13 = load i32, ptr @options, align 4, !tbaa !6
%14 = tail call i32 @COMPARE_NODE_FIELD(i32 noundef %13) #2
ret i32 1
}
declare i32 @COMPARE_STRING_FIELD(i32 noundef) local_unnamed_addr #1
declare i32 @COMPARE_SCALAR_FIELD(i32 noundef) local_unnamed_addr #1
declare i32 @COMPARE_NODE_FIELD(i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| postgres_src_backend_nodes_extr_equalfuncs.c__equalImportForeignSchemaStmt |
; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/interface/mmal/util/extr_mmal_list.c_mmal_list_pop_back.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/interface/mmal/util/extr_mmal_list.c_mmal_list_pop_back.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.TYPE_7__ = type { ptr, ptr, i32 }
%struct.TYPE_8__ = type { ptr, ptr }
; Function Attrs: nounwind uwtable
define dso_local ptr @mmal_list_pop_back(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @mmal_list_lock(ptr noundef %0) #3
%3 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 1
%4 = load ptr, ptr %3, align 8, !tbaa !5
%5 = icmp eq ptr %4, null
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = getelementptr inbounds %struct.TYPE_7__, ptr %0, i64 0, i32 2
%8 = load i32, ptr %7, align 8, !tbaa !11
%9 = add nsw i32 %8, -1
store i32 %9, ptr %7, align 8, !tbaa !11
%10 = getelementptr inbounds %struct.TYPE_8__, ptr %4, i64 0, i32 1
%11 = load ptr, ptr %10, align 8, !tbaa !12
store ptr %11, ptr %3, align 8, !tbaa !5
%12 = icmp eq ptr %11, null
%13 = select i1 %12, ptr %0, ptr %11
store ptr null, ptr %13, align 8, !tbaa !14
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %4, i8 0, i64 16, i1 false)
br label %14
14: ; preds = %6, %1
%15 = tail call i32 @mmal_list_unlock(ptr noundef nonnull %0) #3
ret ptr %4
}
declare i32 @mmal_list_lock(ptr noundef) local_unnamed_addr #1
declare i32 @mmal_list_unlock(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 8}
!6 = !{!"TYPE_7__", !7, i64 0, !7, i64 8, !10, i64 16}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!6, !10, i64 16}
!12 = !{!13, !7, i64 8}
!13 = !{!"TYPE_8__", !7, i64 0, !7, i64 8}
!14 = !{!7, !7, i64 0}
| ; ModuleID = 'AnghaBench/RetroArch/gfx/include/userland/interface/mmal/util/extr_mmal_list.c_mmal_list_pop_back.c'
source_filename = "AnghaBench/RetroArch/gfx/include/userland/interface/mmal/util/extr_mmal_list.c_mmal_list_pop_back.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define ptr @mmal_list_pop_back(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @mmal_list_lock(ptr noundef %0) #3
%3 = getelementptr inbounds i8, ptr %0, i64 8
%4 = load ptr, ptr %3, align 8, !tbaa !6
%5 = icmp eq ptr %4, null
br i1 %5, label %14, label %6
6: ; preds = %1
%7 = getelementptr inbounds i8, ptr %0, i64 16
%8 = load i32, ptr %7, align 8, !tbaa !12
%9 = add nsw i32 %8, -1
store i32 %9, ptr %7, align 8, !tbaa !12
%10 = getelementptr inbounds i8, ptr %4, i64 8
%11 = load ptr, ptr %10, align 8, !tbaa !13
store ptr %11, ptr %3, align 8, !tbaa !6
%12 = icmp eq ptr %11, null
%13 = select i1 %12, ptr %0, ptr %11
store ptr null, ptr %13, align 8, !tbaa !15
tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %4, i8 0, i64 16, i1 false)
br label %14
14: ; preds = %6, %1
%15 = tail call i32 @mmal_list_unlock(ptr noundef nonnull %0) #3
ret ptr %4
}
declare i32 @mmal_list_lock(ptr noundef) local_unnamed_addr #1
declare i32 @mmal_list_unlock(ptr noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write)
declare void @llvm.memset.p0.i64(ptr nocapture writeonly, i8, i64, i1 immarg) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nounwind willreturn memory(argmem: write) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 8}
!7 = !{!"TYPE_7__", !8, i64 0, !8, i64 8, !11, i64 16}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!7, !11, i64 16}
!13 = !{!14, !8, i64 8}
!14 = !{!"TYPE_8__", !8, i64 0, !8, i64 8}
!15 = !{!8, !8, i64 0}
| RetroArch_gfx_include_userland_interface_mmal_util_extr_mmal_list.c_mmal_list_pop_back |
; ModuleID = 'AnghaBench/linux/virt/kvm/extr_kvm_main.c_kvm_vcpu_eligible_for_directed_yield.c'
source_filename = "AnghaBench/linux/virt/kvm/extr_kvm_main.c_kvm_vcpu_eligible_for_directed_yield.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @kvm_vcpu_eligible_for_directed_yield], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal noundef i32 @kvm_vcpu_eligible_for_directed_yield(ptr nocapture readnone %0) #0 {
ret i32 1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/virt/kvm/extr_kvm_main.c_kvm_vcpu_eligible_for_directed_yield.c'
source_filename = "AnghaBench/linux/virt/kvm/extr_kvm_main.c_kvm_vcpu_eligible_for_directed_yield.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @kvm_vcpu_eligible_for_directed_yield], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal noundef i32 @kvm_vcpu_eligible_for_directed_yield(ptr nocapture readnone %0) #0 {
ret i32 1
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_virt_kvm_extr_kvm_main.c_kvm_vcpu_eligible_for_directed_yield |
; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_router.c_mlxsw_sp_rif_subport_setup.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_router.c_mlxsw_sp_rif_subport_setup.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.mlxsw_sp_rif_subport = type { i32, i32, i64, i32, i32 }
%struct.mlxsw_sp_rif_params = type { i32, i32, i64, i32 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @mlxsw_sp_rif_subport_setup], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal void @mlxsw_sp_rif_subport_setup(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call ptr @mlxsw_sp_rif_subport_rif(ptr noundef %0) #2
%4 = getelementptr inbounds %struct.mlxsw_sp_rif_subport, ptr %3, i64 0, i32 4
%5 = tail call i32 @refcount_set(ptr noundef nonnull %4, i32 noundef 1) #2
%6 = getelementptr inbounds %struct.mlxsw_sp_rif_params, ptr %1, i64 0, i32 3
%7 = load i32, ptr %6, align 8, !tbaa !5
%8 = getelementptr inbounds %struct.mlxsw_sp_rif_subport, ptr %3, i64 0, i32 3
store i32 %7, ptr %8, align 8, !tbaa !11
%9 = getelementptr inbounds %struct.mlxsw_sp_rif_params, ptr %1, i64 0, i32 2
%10 = load i64, ptr %9, align 8, !tbaa !13
%11 = getelementptr inbounds %struct.mlxsw_sp_rif_subport, ptr %3, i64 0, i32 2
store i64 %10, ptr %11, align 8, !tbaa !14
%12 = icmp eq i64 %10, 0
br i1 %12, label %17, label %13
13: ; preds = %2
%14 = getelementptr inbounds %struct.mlxsw_sp_rif_params, ptr %1, i64 0, i32 1
%15 = load i32, ptr %14, align 4, !tbaa !15
%16 = getelementptr inbounds %struct.mlxsw_sp_rif_subport, ptr %3, i64 0, i32 1
store i32 %15, ptr %16, align 4, !tbaa !16
br label %19
17: ; preds = %2
%18 = load i32, ptr %1, align 8, !tbaa !17
store i32 %18, ptr %3, align 8, !tbaa !18
br label %19
19: ; preds = %17, %13
ret void
}
declare ptr @mlxsw_sp_rif_subport_rif(ptr noundef) local_unnamed_addr #1
declare i32 @refcount_set(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 16}
!6 = !{!"mlxsw_sp_rif_params", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!12, !7, i64 16}
!12 = !{!"mlxsw_sp_rif_subport", !7, i64 0, !7, i64 4, !10, i64 8, !7, i64 16, !7, i64 20}
!13 = !{!6, !10, i64 8}
!14 = !{!12, !10, i64 8}
!15 = !{!6, !7, i64 4}
!16 = !{!12, !7, i64 4}
!17 = !{!6, !7, i64 0}
!18 = !{!12, !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_router.c_mlxsw_sp_rif_subport_setup.c'
source_filename = "AnghaBench/linux/drivers/net/ethernet/mellanox/mlxsw/extr_spectrum_router.c_mlxsw_sp_rif_subport_setup.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @mlxsw_sp_rif_subport_setup], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal void @mlxsw_sp_rif_subport_setup(ptr noundef %0, ptr nocapture noundef readonly %1) #0 {
%3 = tail call ptr @mlxsw_sp_rif_subport_rif(ptr noundef %0) #2
%4 = getelementptr inbounds i8, ptr %3, i64 20
%5 = tail call i32 @refcount_set(ptr noundef nonnull %4, i32 noundef 1) #2
%6 = getelementptr inbounds i8, ptr %1, i64 16
%7 = load i32, ptr %6, align 8, !tbaa !6
%8 = getelementptr inbounds i8, ptr %3, i64 16
store i32 %7, ptr %8, align 8, !tbaa !12
%9 = getelementptr inbounds i8, ptr %1, i64 8
%10 = load i64, ptr %9, align 8, !tbaa !14
%11 = getelementptr inbounds i8, ptr %3, i64 8
store i64 %10, ptr %11, align 8, !tbaa !15
%12 = icmp eq i64 %10, 0
br i1 %12, label %17, label %13
13: ; preds = %2
%14 = getelementptr inbounds i8, ptr %1, i64 4
%15 = load i32, ptr %14, align 4, !tbaa !16
%16 = getelementptr inbounds i8, ptr %3, i64 4
store i32 %15, ptr %16, align 4, !tbaa !17
br label %19
17: ; preds = %2
%18 = load i32, ptr %1, align 8, !tbaa !18
store i32 %18, ptr %3, align 8, !tbaa !19
br label %19
19: ; preds = %17, %13
ret void
}
declare ptr @mlxsw_sp_rif_subport_rif(ptr noundef) local_unnamed_addr #1
declare i32 @refcount_set(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 16}
!7 = !{!"mlxsw_sp_rif_params", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16}
!8 = !{!"int", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!13, !8, i64 16}
!13 = !{!"mlxsw_sp_rif_subport", !8, i64 0, !8, i64 4, !11, i64 8, !8, i64 16, !8, i64 20}
!14 = !{!7, !11, i64 8}
!15 = !{!13, !11, i64 8}
!16 = !{!7, !8, i64 4}
!17 = !{!13, !8, i64 4}
!18 = !{!7, !8, i64 0}
!19 = !{!13, !8, i64 0}
| linux_drivers_net_ethernet_mellanox_mlxsw_extr_spectrum_router.c_mlxsw_sp_rif_subport_setup |
; ModuleID = 'AnghaBench/Craft/deps/sqlite/extr_sqlite3.c_sqlite3_value_int.c'
source_filename = "AnghaBench/Craft/deps/sqlite/extr_sqlite3.c_sqlite3_value_int.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: nounwind uwtable
define dso_local i32 @sqlite3_value_int(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i64 @sqlite3VdbeIntValue(ptr noundef %0) #2
%3 = trunc i64 %2 to i32
ret i32 %3
}
declare i64 @sqlite3VdbeIntValue(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/Craft/deps/sqlite/extr_sqlite3.c_sqlite3_value_int.c'
source_filename = "AnghaBench/Craft/deps/sqlite/extr_sqlite3.c_sqlite3_value_int.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @sqlite3_value_int(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i64 @sqlite3VdbeIntValue(ptr noundef %0) #2
%3 = trunc i64 %2 to i32
ret i32 %3
}
declare i64 @sqlite3VdbeIntValue(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| Craft_deps_sqlite_extr_sqlite3.c_sqlite3_value_int |
; ModuleID = 'AnghaBench/toxcore/toxcore/extr_Messenger.c_m_addfriend_norequest.c'
source_filename = "AnghaBench/toxcore/toxcore/extr_Messenger.c_m_addfriend_norequest.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@FAERR_ALREADYSENT = dso_local local_unnamed_addr global i32 0, align 4
@FAERR_BADCHECKSUM = dso_local local_unnamed_addr global i32 0, align 4
@FAERR_OWNKEY = dso_local local_unnamed_addr global i32 0, align 4
@FRIEND_CONFIRMED = dso_local local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local i32 @m_addfriend_norequest(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @getfriend_id(ptr noundef %0, ptr noundef %1) #2
%4 = icmp eq i32 %3, -1
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = load i32, ptr @FAERR_ALREADYSENT, align 4, !tbaa !5
br label %22
7: ; preds = %2
%8 = tail call i32 @public_key_valid(ptr noundef %1) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = load i32, ptr @FAERR_BADCHECKSUM, align 4, !tbaa !5
br label %22
12: ; preds = %7
%13 = load ptr, ptr %0, align 8, !tbaa !9
%14 = load i32, ptr %13, align 4, !tbaa !12
%15 = tail call i64 @id_equal(ptr noundef %1, i32 noundef %14) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %19, label %17
17: ; preds = %12
%18 = load i32, ptr @FAERR_OWNKEY, align 4, !tbaa !5
br label %22
19: ; preds = %12
%20 = load i32, ptr @FRIEND_CONFIRMED, align 4, !tbaa !5
%21 = tail call i32 @init_new_friend(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %20) #2
br label %22
22: ; preds = %19, %17, %10, %5
%23 = phi i32 [ %6, %5 ], [ %18, %17 ], [ %21, %19 ], [ %11, %10 ]
ret i32 %23
}
declare i32 @getfriend_id(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @public_key_valid(ptr noundef) local_unnamed_addr #1
declare i64 @id_equal(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @init_new_friend(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !11, i64 0}
!10 = !{!"TYPE_7__", !11, i64 0}
!11 = !{!"any pointer", !7, i64 0}
!12 = !{!13, !6, i64 0}
!13 = !{!"TYPE_6__", !6, i64 0}
| ; ModuleID = 'AnghaBench/toxcore/toxcore/extr_Messenger.c_m_addfriend_norequest.c'
source_filename = "AnghaBench/toxcore/toxcore/extr_Messenger.c_m_addfriend_norequest.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@FAERR_ALREADYSENT = common local_unnamed_addr global i32 0, align 4
@FAERR_BADCHECKSUM = common local_unnamed_addr global i32 0, align 4
@FAERR_OWNKEY = common local_unnamed_addr global i32 0, align 4
@FRIEND_CONFIRMED = common local_unnamed_addr global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define i32 @m_addfriend_norequest(ptr noundef %0, ptr noundef %1) local_unnamed_addr #0 {
%3 = tail call i32 @getfriend_id(ptr noundef %0, ptr noundef %1) #2
%4 = icmp eq i32 %3, -1
br i1 %4, label %7, label %5
5: ; preds = %2
%6 = load i32, ptr @FAERR_ALREADYSENT, align 4, !tbaa !6
br label %22
7: ; preds = %2
%8 = tail call i32 @public_key_valid(ptr noundef %1) #2
%9 = icmp eq i32 %8, 0
br i1 %9, label %10, label %12
10: ; preds = %7
%11 = load i32, ptr @FAERR_BADCHECKSUM, align 4, !tbaa !6
br label %22
12: ; preds = %7
%13 = load ptr, ptr %0, align 8, !tbaa !10
%14 = load i32, ptr %13, align 4, !tbaa !13
%15 = tail call i64 @id_equal(ptr noundef %1, i32 noundef %14) #2
%16 = icmp eq i64 %15, 0
br i1 %16, label %19, label %17
17: ; preds = %12
%18 = load i32, ptr @FAERR_OWNKEY, align 4, !tbaa !6
br label %22
19: ; preds = %12
%20 = load i32, ptr @FRIEND_CONFIRMED, align 4, !tbaa !6
%21 = tail call i32 @init_new_friend(ptr noundef nonnull %0, ptr noundef %1, i32 noundef %20) #2
br label %22
22: ; preds = %19, %17, %10, %5
%23 = phi i32 [ %6, %5 ], [ %18, %17 ], [ %21, %19 ], [ %11, %10 ]
ret i32 %23
}
declare i32 @getfriend_id(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @public_key_valid(ptr noundef) local_unnamed_addr #1
declare i64 @id_equal(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @init_new_friend(ptr noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !12, i64 0}
!11 = !{!"TYPE_7__", !12, i64 0}
!12 = !{!"any pointer", !8, i64 0}
!13 = !{!14, !7, i64 0}
!14 = !{!"TYPE_6__", !7, i64 0}
| toxcore_toxcore_extr_Messenger.c_m_addfriend_norequest |
; ModuleID = 'AnghaBench/xLua/build/luajit-2.1.0b2/src/host/extr_minilua.c_luaB_unpack.c'
source_filename = "AnghaBench/xLua/build/luajit-2.1.0b2/src/host/extr_minilua.c_luaB_unpack.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@luaL_checkint = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [27 x i8] c"too many results to unpack\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @luaB_unpack], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @luaB_unpack(ptr noundef %0) #0 {
%2 = tail call i32 @luaL_checktype(ptr noundef %0, i32 noundef 1, i32 noundef 5) #2
%3 = tail call i32 @luaL_optint(ptr noundef %0, i32 noundef 2, i32 noundef 1) #2
%4 = load i32, ptr @luaL_checkint, align 4, !tbaa !5
%5 = tail call i32 @luaL_getn(ptr noundef %0, i32 noundef 1) #2
%6 = tail call i32 @luaL_opt(ptr noundef %0, i32 noundef %4, i32 noundef 3, i32 noundef %5) #2
%7 = icmp sgt i32 %3, %6
br i1 %7, label %25, label %8
8: ; preds = %1
%9 = sub nsw i32 %6, %3
%10 = add nsw i32 %9, 1
%11 = icmp slt i32 %9, 0
br i1 %11, label %15, label %12
12: ; preds = %8
%13 = tail call i32 @lua_checkstack(ptr noundef %0, i32 noundef %10) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %12, %8
%16 = tail call i32 @luaL_error(ptr noundef %0, ptr noundef nonnull @.str) #2
br label %25
17: ; preds = %12
%18 = tail call i32 @lua_rawgeti(ptr noundef %0, i32 noundef 1, i32 noundef %3) #2
%19 = icmp slt i32 %3, %6
br i1 %19, label %20, label %25
20: ; preds = %17, %20
%21 = phi i32 [ %22, %20 ], [ %3, %17 ]
%22 = add nsw i32 %21, 1
%23 = tail call i32 @lua_rawgeti(ptr noundef %0, i32 noundef 1, i32 noundef %22) #2
%24 = icmp eq i32 %22, %6
br i1 %24, label %25, label %20, !llvm.loop !9
25: ; preds = %20, %17, %1, %15
%26 = phi i32 [ %16, %15 ], [ 0, %1 ], [ %10, %17 ], [ %10, %20 ]
ret i32 %26
}
declare i32 @luaL_checktype(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @luaL_optint(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @luaL_opt(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @luaL_getn(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_checkstack(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @luaL_error(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @lua_rawgeti(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = distinct !{!9, !10}
!10 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/xLua/build/luajit-2.1.0b2/src/host/extr_minilua.c_luaB_unpack.c'
source_filename = "AnghaBench/xLua/build/luajit-2.1.0b2/src/host/extr_minilua.c_luaB_unpack.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@luaL_checkint = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [27 x i8] c"too many results to unpack\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @luaB_unpack], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @luaB_unpack(ptr noundef %0) #0 {
%2 = tail call i32 @luaL_checktype(ptr noundef %0, i32 noundef 1, i32 noundef 5) #2
%3 = tail call i32 @luaL_optint(ptr noundef %0, i32 noundef 2, i32 noundef 1) #2
%4 = load i32, ptr @luaL_checkint, align 4, !tbaa !6
%5 = tail call i32 @luaL_getn(ptr noundef %0, i32 noundef 1) #2
%6 = tail call i32 @luaL_opt(ptr noundef %0, i32 noundef %4, i32 noundef 3, i32 noundef %5) #2
%7 = icmp sgt i32 %3, %6
br i1 %7, label %25, label %8
8: ; preds = %1
%9 = sub nsw i32 %6, %3
%10 = add nsw i32 %9, 1
%11 = icmp slt i32 %9, 0
br i1 %11, label %15, label %12
12: ; preds = %8
%13 = tail call i32 @lua_checkstack(ptr noundef %0, i32 noundef %10) #2
%14 = icmp eq i32 %13, 0
br i1 %14, label %15, label %17
15: ; preds = %12, %8
%16 = tail call i32 @luaL_error(ptr noundef %0, ptr noundef nonnull @.str) #2
br label %25
17: ; preds = %12
%18 = tail call i32 @lua_rawgeti(ptr noundef %0, i32 noundef 1, i32 noundef %3) #2
%19 = icmp slt i32 %3, %6
br i1 %19, label %20, label %25
20: ; preds = %17, %20
%21 = phi i32 [ %22, %20 ], [ %3, %17 ]
%22 = add nsw i32 %21, 1
%23 = tail call i32 @lua_rawgeti(ptr noundef %0, i32 noundef 1, i32 noundef %22) #2
%24 = icmp eq i32 %22, %6
br i1 %24, label %25, label %20, !llvm.loop !10
25: ; preds = %20, %17, %1, %15
%26 = phi i32 [ %16, %15 ], [ 0, %1 ], [ %10, %17 ], [ %10, %20 ]
ret i32 %26
}
declare i32 @luaL_checktype(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @luaL_optint(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @luaL_opt(ptr noundef, i32 noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
declare i32 @luaL_getn(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @lua_checkstack(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @luaL_error(ptr noundef, ptr noundef) local_unnamed_addr #1
declare i32 @lua_rawgeti(ptr noundef, i32 noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = distinct !{!10, !11}
!11 = !{!"llvm.loop.mustprogress"}
| xLua_build_luajit-2.1.0b2_src_host_extr_minilua.c_luaB_unpack |
; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_wc/extr_props.c_ensure_prop_is_regular_kind.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_wc/extr_props.c_ensure_prop_is_regular_kind.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@svn_prop_entry_kind = dso_local local_unnamed_addr global i32 0, align 4
@SVN_ERR_BAD_PROP_KIND = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [35 x i8] c"Property '%s' is an entry property\00", align 1
@svn_prop_wc_kind = dso_local local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [55 x i8] c"Property '%s' is a WC property, not a regular property\00", align 1
@SVN_NO_ERROR = dso_local local_unnamed_addr global ptr null, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @ensure_prop_is_regular_kind], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal ptr @ensure_prop_is_regular_kind(ptr noundef %0) #0 {
%2 = tail call i32 @svn_property_kind2(ptr noundef %0) #2
%3 = load i32, ptr @svn_prop_entry_kind, align 4, !tbaa !5
%4 = icmp eq i32 %2, %3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, ptr @SVN_ERR_BAD_PROP_KIND, align 4, !tbaa !5
%7 = tail call i32 @_(ptr noundef nonnull @.str) #2
%8 = tail call ptr @svn_error_createf(i32 noundef %6, ptr noundef null, i32 noundef %7, ptr noundef %0) #2
br label %18
9: ; preds = %1
%10 = load i32, ptr @svn_prop_wc_kind, align 4, !tbaa !5
%11 = icmp eq i32 %2, %10
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = load i32, ptr @SVN_ERR_BAD_PROP_KIND, align 4, !tbaa !5
%14 = tail call i32 @_(ptr noundef nonnull @.str.1) #2
%15 = tail call ptr @svn_error_createf(i32 noundef %13, ptr noundef null, i32 noundef %14, ptr noundef %0) #2
br label %18
16: ; preds = %9
%17 = load ptr, ptr @SVN_NO_ERROR, align 8, !tbaa !9
br label %18
18: ; preds = %16, %12, %5
%19 = phi ptr [ %8, %5 ], [ %15, %12 ], [ %17, %16 ]
ret ptr %19
}
declare i32 @svn_property_kind2(ptr noundef) local_unnamed_addr #1
declare ptr @svn_error_createf(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @_(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"any pointer", !7, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/subversion/subversion/libsvn_wc/extr_props.c_ensure_prop_is_regular_kind.c'
source_filename = "AnghaBench/freebsd/contrib/subversion/subversion/libsvn_wc/extr_props.c_ensure_prop_is_regular_kind.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@svn_prop_entry_kind = common local_unnamed_addr global i32 0, align 4
@SVN_ERR_BAD_PROP_KIND = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [35 x i8] c"Property '%s' is an entry property\00", align 1
@svn_prop_wc_kind = common local_unnamed_addr global i32 0, align 4
@.str.1 = private unnamed_addr constant [55 x i8] c"Property '%s' is a WC property, not a regular property\00", align 1
@SVN_NO_ERROR = common local_unnamed_addr global ptr null, align 8
@llvm.used = appending global [1 x ptr] [ptr @ensure_prop_is_regular_kind], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal ptr @ensure_prop_is_regular_kind(ptr noundef %0) #0 {
%2 = tail call i32 @svn_property_kind2(ptr noundef %0) #2
%3 = load i32, ptr @svn_prop_entry_kind, align 4, !tbaa !6
%4 = icmp eq i32 %2, %3
br i1 %4, label %5, label %9
5: ; preds = %1
%6 = load i32, ptr @SVN_ERR_BAD_PROP_KIND, align 4, !tbaa !6
%7 = tail call i32 @_(ptr noundef nonnull @.str) #2
%8 = tail call ptr @svn_error_createf(i32 noundef %6, ptr noundef null, i32 noundef %7, ptr noundef %0) #2
br label %18
9: ; preds = %1
%10 = load i32, ptr @svn_prop_wc_kind, align 4, !tbaa !6
%11 = icmp eq i32 %2, %10
br i1 %11, label %12, label %16
12: ; preds = %9
%13 = load i32, ptr @SVN_ERR_BAD_PROP_KIND, align 4, !tbaa !6
%14 = tail call i32 @_(ptr noundef nonnull @.str.1) #2
%15 = tail call ptr @svn_error_createf(i32 noundef %13, ptr noundef null, i32 noundef %14, ptr noundef %0) #2
br label %18
16: ; preds = %9
%17 = load ptr, ptr @SVN_NO_ERROR, align 8, !tbaa !10
br label %18
18: ; preds = %16, %12, %5
%19 = phi ptr [ %8, %5 ], [ %15, %12 ], [ %17, %16 ]
ret ptr %19
}
declare i32 @svn_property_kind2(ptr noundef) local_unnamed_addr #1
declare ptr @svn_error_createf(i32 noundef, ptr noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i32 @_(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
| freebsd_contrib_subversion_subversion_libsvn_wc_extr_props.c_ensure_prop_is_regular_kind |
; ModuleID = 'AnghaBench/fastsocket/kernel/scripts/mod/extr_sumversion.c_md4_init.c'
source_filename = "AnghaBench/fastsocket/kernel/scripts/mod/extr_sumversion.c_md4_init.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.md4_ctx = type { ptr, i64 }
@llvm.compiler.used = appending global [1 x ptr] [ptr @md4_init], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable
define internal void @md4_init(ptr nocapture noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !5
store <4 x i32> <i32 1732584193, i32 -271733879, i32 -1732584194, i32 271733878>, ptr %2, align 4, !tbaa !11
%3 = getelementptr inbounds %struct.md4_ctx, ptr %0, i64 0, i32 1
store i64 0, ptr %3, align 8, !tbaa !13
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"md4_ctx", !7, i64 0, !10, i64 8}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"long", !8, i64 0}
!11 = !{!12, !12, i64 0}
!12 = !{!"int", !8, i64 0}
!13 = !{!6, !10, i64 8}
| ; ModuleID = 'AnghaBench/fastsocket/kernel/scripts/mod/extr_sumversion.c_md4_init.c'
source_filename = "AnghaBench/fastsocket/kernel/scripts/mod/extr_sumversion.c_md4_init.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @md4_init], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable(sync)
define internal void @md4_init(ptr nocapture noundef %0) #0 {
%2 = load ptr, ptr %0, align 8, !tbaa !6
store <4 x i32> <i32 1732584193, i32 -271733879, i32 -1732584194, i32 271733878>, ptr %2, align 4, !tbaa !12
%3 = getelementptr inbounds i8, ptr %0, i64 8
store i64 0, ptr %3, align 8, !tbaa !14
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(write, argmem: readwrite, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"md4_ctx", !8, i64 0, !11, i64 8}
!8 = !{!"any pointer", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"long", !9, i64 0}
!12 = !{!13, !13, i64 0}
!13 = !{!"int", !9, i64 0}
!14 = !{!7, !11, i64 8}
| fastsocket_kernel_scripts_mod_extr_sumversion.c_md4_init |
; ModuleID = 'AnghaBench/linux/net/bluetooth/hidp/extr_core.c_hidp_close.c'
source_filename = "AnghaBench/linux/net/bluetooth/hidp/extr_core.c_hidp_close.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@llvm.compiler.used = appending global [1 x ptr] [ptr @hidp_close], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define internal void @hidp_close(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/linux/net/bluetooth/hidp/extr_core.c_hidp_close.c'
source_filename = "AnghaBench/linux/net/bluetooth/hidp/extr_core.c_hidp_close.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @hidp_close], section "llvm.metadata"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define internal void @hidp_close(ptr nocapture readnone %0) #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| linux_net_bluetooth_hidp_extr_core.c_hidp_close |
; ModuleID = 'AnghaBench/linux/drivers/scsi/hisi_sas/extr_hisi_sas_v2_hw.c_get_wideport_bitmap_v2_hw.c'
source_filename = "AnghaBench/linux/drivers/scsi/hisi_sas/extr_hisi_sas_v2_hw.c_get_wideport_bitmap_v2_hw.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@PHY_PORT_NUM_MA = dso_local local_unnamed_addr global i32 0, align 4
@PHY_STATE = dso_local local_unnamed_addr global i32 0, align 4
@PORT_STATE = dso_local local_unnamed_addr global i32 0, align 4
@PORT_STATE_PHY8_PORT_NUM_MSK = dso_local local_unnamed_addr global i32 0, align 4
@PORT_STATE_PHY8_PORT_NUM_OFF = dso_local local_unnamed_addr global i32 0, align 4
@llvm.compiler.used = appending global [1 x ptr] [ptr @get_wideport_bitmap_v2_hw], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @get_wideport_bitmap_v2_hw(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @PHY_PORT_NUM_MA, align 4, !tbaa !5
%4 = tail call i32 @hisi_sas_read32(ptr noundef %0, i32 noundef %3) #2
%5 = load i32, ptr @PHY_STATE, align 4, !tbaa !5
%6 = tail call i32 @hisi_sas_read32(ptr noundef %0, i32 noundef %5) #2
%7 = load i32, ptr %0, align 4, !tbaa !9
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %113
9: ; preds = %2
%10 = and i32 %6, 1
%11 = icmp eq i32 %10, 0
%12 = and i32 %4, 15
%13 = icmp eq i32 %12, %1
%14 = zext i1 %13 to i32
%15 = select i1 %11, i32 0, i32 %14
%16 = icmp eq i32 %7, 1
br i1 %16, label %97, label %17, !llvm.loop !11
17: ; preds = %9
%18 = and i32 %6, 2
%19 = icmp eq i32 %18, 0
br i1 %19, label %26, label %20
20: ; preds = %17
%21 = lshr i32 %4, 4
%22 = and i32 %21, 15
%23 = icmp eq i32 %22, %1
%24 = select i1 %23, i32 2, i32 0
%25 = or disjoint i32 %24, %15
br label %26
26: ; preds = %20, %17
%27 = phi i32 [ %15, %17 ], [ %25, %20 ]
%28 = icmp eq i32 %7, 2
br i1 %28, label %97, label %29, !llvm.loop !11
29: ; preds = %26
%30 = and i32 %6, 4
%31 = icmp eq i32 %30, 0
br i1 %31, label %38, label %32
32: ; preds = %29
%33 = lshr i32 %4, 8
%34 = and i32 %33, 15
%35 = icmp eq i32 %34, %1
%36 = select i1 %35, i32 4, i32 0
%37 = or i32 %36, %27
br label %38
38: ; preds = %32, %29
%39 = phi i32 [ %27, %29 ], [ %37, %32 ]
%40 = icmp eq i32 %7, 3
br i1 %40, label %97, label %41, !llvm.loop !11
41: ; preds = %38
%42 = and i32 %6, 8
%43 = icmp eq i32 %42, 0
br i1 %43, label %50, label %44
44: ; preds = %41
%45 = lshr i32 %4, 12
%46 = and i32 %45, 15
%47 = icmp eq i32 %46, %1
%48 = select i1 %47, i32 8, i32 0
%49 = or i32 %48, %39
br label %50
50: ; preds = %44, %41
%51 = phi i32 [ %39, %41 ], [ %49, %44 ]
%52 = icmp eq i32 %7, 4
br i1 %52, label %97, label %53, !llvm.loop !11
53: ; preds = %50
%54 = and i32 %6, 16
%55 = icmp eq i32 %54, 0
br i1 %55, label %62, label %56
56: ; preds = %53
%57 = lshr i32 %4, 16
%58 = and i32 %57, 15
%59 = icmp eq i32 %58, %1
%60 = select i1 %59, i32 16, i32 0
%61 = or i32 %60, %51
br label %62
62: ; preds = %56, %53
%63 = phi i32 [ %51, %53 ], [ %61, %56 ]
%64 = icmp eq i32 %7, 5
br i1 %64, label %97, label %65, !llvm.loop !11
65: ; preds = %62
%66 = and i32 %6, 32
%67 = icmp eq i32 %66, 0
br i1 %67, label %74, label %68
68: ; preds = %65
%69 = lshr i32 %4, 20
%70 = and i32 %69, 15
%71 = icmp eq i32 %70, %1
%72 = select i1 %71, i32 32, i32 0
%73 = or i32 %72, %63
br label %74
74: ; preds = %68, %65
%75 = phi i32 [ %63, %65 ], [ %73, %68 ]
%76 = icmp eq i32 %7, 6
br i1 %76, label %97, label %77, !llvm.loop !11
77: ; preds = %74
%78 = and i32 %6, 64
%79 = icmp eq i32 %78, 0
br i1 %79, label %86, label %80
80: ; preds = %77
%81 = lshr i32 %4, 24
%82 = and i32 %81, 15
%83 = icmp eq i32 %82, %1
%84 = select i1 %83, i32 64, i32 0
%85 = or i32 %84, %75
br label %86
86: ; preds = %80, %77
%87 = phi i32 [ %75, %77 ], [ %85, %80 ]
%88 = icmp eq i32 %7, 7
br i1 %88, label %97, label %89, !llvm.loop !11
89: ; preds = %86
%90 = and i32 %6, 128
%91 = icmp eq i32 %90, 0
%92 = lshr i32 %4, 28
%93 = icmp eq i32 %92, %1
%94 = select i1 %93, i32 128, i32 0
%95 = or i32 %94, %87
%96 = select i1 %91, i32 %87, i32 %95
br label %97
97: ; preds = %89, %86, %74, %62, %50, %38, %26, %9
%98 = phi i32 [ %15, %9 ], [ %27, %26 ], [ %39, %38 ], [ %51, %50 ], [ %63, %62 ], [ %75, %74 ], [ %87, %86 ], [ %96, %89 ]
%99 = icmp eq i32 %7, 9
br i1 %99, label %100, label %113
100: ; preds = %97
%101 = load i32, ptr @PORT_STATE, align 4, !tbaa !5
%102 = tail call i32 @hisi_sas_read32(ptr noundef nonnull %0, i32 noundef %101) #2
%103 = and i32 %6, 256
%104 = icmp eq i32 %103, 0
br i1 %104, label %113, label %105
105: ; preds = %100
%106 = load i32, ptr @PORT_STATE_PHY8_PORT_NUM_MSK, align 4, !tbaa !5
%107 = and i32 %106, %102
%108 = load i32, ptr @PORT_STATE_PHY8_PORT_NUM_OFF, align 4, !tbaa !5
%109 = ashr i32 %107, %108
%110 = icmp eq i32 %109, %1
%111 = or i32 %98, 512
%112 = select i1 %110, i32 %111, i32 %98
br label %113
113: ; preds = %2, %105, %100, %97
%114 = phi i32 [ %98, %97 ], [ %98, %100 ], [ %112, %105 ], [ 0, %2 ]
ret i32 %114
}
declare i32 @hisi_sas_read32(ptr noundef, i32 noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"int", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !6, i64 0}
!10 = !{!"hisi_hba", !6, i64 0}
!11 = distinct !{!11, !12}
!12 = !{!"llvm.loop.mustprogress"}
| ; ModuleID = 'AnghaBench/linux/drivers/scsi/hisi_sas/extr_hisi_sas_v2_hw.c_get_wideport_bitmap_v2_hw.c'
source_filename = "AnghaBench/linux/drivers/scsi/hisi_sas/extr_hisi_sas_v2_hw.c_get_wideport_bitmap_v2_hw.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@PHY_PORT_NUM_MA = common local_unnamed_addr global i32 0, align 4
@PHY_STATE = common local_unnamed_addr global i32 0, align 4
@PORT_STATE = common local_unnamed_addr global i32 0, align 4
@PORT_STATE_PHY8_PORT_NUM_MSK = common local_unnamed_addr global i32 0, align 4
@PORT_STATE_PHY8_PORT_NUM_OFF = common local_unnamed_addr global i32 0, align 4
@llvm.used = appending global [1 x ptr] [ptr @get_wideport_bitmap_v2_hw], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @get_wideport_bitmap_v2_hw(ptr noundef %0, i32 noundef %1) #0 {
%3 = load i32, ptr @PHY_PORT_NUM_MA, align 4, !tbaa !6
%4 = tail call i32 @hisi_sas_read32(ptr noundef %0, i32 noundef %3) #3
%5 = load i32, ptr @PHY_STATE, align 4, !tbaa !6
%6 = tail call i32 @hisi_sas_read32(ptr noundef %0, i32 noundef %5) #3
%7 = load i32, ptr %0, align 4, !tbaa !10
%8 = icmp sgt i32 %7, 0
br i1 %8, label %9, label %63
9: ; preds = %2
%10 = tail call i32 @llvm.smin.i32(i32 %7, i32 8)
%11 = add nsw i32 %10, -1
%12 = insertelement <4 x i32> poison, i32 %11, i64 0
%13 = shufflevector <4 x i32> %12, <4 x i32> poison, <4 x i32> zeroinitializer
%14 = insertelement <4 x i32> poison, i32 %6, i64 0
%15 = shufflevector <4 x i32> %14, <4 x i32> poison, <4 x i32> zeroinitializer
%16 = insertelement <4 x i32> poison, i32 %4, i64 0
%17 = shufflevector <4 x i32> %16, <4 x i32> poison, <4 x i32> zeroinitializer
%18 = insertelement <4 x i32> poison, i32 %1, i64 0
%19 = shufflevector <4 x i32> %18, <4 x i32> poison, <4 x i32> zeroinitializer
%20 = add nuw nsw i32 %10, 3
%21 = and i32 %20, 28
%22 = icmp uge <4 x i32> %13, <i32 0, i32 1, i32 2, i32 3>
%23 = and <4 x i32> %15, <i32 1, i32 2, i32 4, i32 8>
%24 = icmp ne <4 x i32> %23, zeroinitializer
%25 = select <4 x i1> %22, <4 x i1> %24, <4 x i1> zeroinitializer
%26 = ashr <4 x i32> %17, <i32 0, i32 4, i32 8, i32 12>
%27 = and <4 x i32> %26, <i32 15, i32 15, i32 15, i32 15>
%28 = icmp eq <4 x i32> %27, %19
%29 = select <4 x i1> %25, <4 x i1> %28, <4 x i1> zeroinitializer
%30 = select <4 x i1> %29, <4 x i32> <i32 1, i32 2, i32 4, i32 8>, <4 x i32> zeroinitializer
%31 = icmp eq i32 %21, 4
br i1 %31, label %43, label %32, !llvm.loop !12
32: ; preds = %9
%33 = icmp ugt <4 x i32> %13, <i32 3, i32 4, i32 5, i32 6>
%34 = and <4 x i32> %15, <i32 16, i32 32, i32 64, i32 128>
%35 = icmp ne <4 x i32> %34, zeroinitializer
%36 = select <4 x i1> %33, <4 x i1> %35, <4 x i1> zeroinitializer
%37 = ashr <4 x i32> %17, <i32 16, i32 20, i32 24, i32 28>
%38 = and <4 x i32> %37, <i32 15, i32 15, i32 15, i32 15>
%39 = icmp eq <4 x i32> %38, %19
%40 = select <4 x i1> %36, <4 x i1> %39, <4 x i1> zeroinitializer
%41 = select <4 x i1> %40, <4 x i32> <i32 16, i32 32, i32 64, i32 128>, <4 x i32> zeroinitializer
%42 = or disjoint <4 x i32> %30, %41
br label %43
43: ; preds = %32, %9
%44 = phi <4 x i32> [ zeroinitializer, %9 ], [ %30, %32 ]
%45 = phi <4 x i1> [ %22, %9 ], [ %33, %32 ]
%46 = phi <4 x i32> [ %30, %9 ], [ %42, %32 ]
%47 = select <4 x i1> %45, <4 x i32> %46, <4 x i32> %44
%48 = tail call i32 @llvm.vector.reduce.or.v4i32(<4 x i32> %47)
%49 = icmp eq i32 %7, 9
br i1 %49, label %50, label %63
50: ; preds = %43
%51 = load i32, ptr @PORT_STATE, align 4, !tbaa !6
%52 = tail call i32 @hisi_sas_read32(ptr noundef nonnull %0, i32 noundef %51) #3
%53 = and i32 %6, 256
%54 = icmp eq i32 %53, 0
br i1 %54, label %63, label %55
55: ; preds = %50
%56 = load i32, ptr @PORT_STATE_PHY8_PORT_NUM_MSK, align 4, !tbaa !6
%57 = and i32 %56, %52
%58 = load i32, ptr @PORT_STATE_PHY8_PORT_NUM_OFF, align 4, !tbaa !6
%59 = ashr i32 %57, %58
%60 = icmp eq i32 %59, %1
%61 = or i32 %48, 512
%62 = select i1 %60, i32 %61, i32 %48
br label %63
63: ; preds = %2, %55, %50, %43
%64 = phi i32 [ %48, %43 ], [ %48, %50 ], [ %62, %55 ], [ 0, %2 ]
ret i32 %64
}
declare i32 @hisi_sas_read32(ptr noundef, i32 noundef) local_unnamed_addr #1
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #2
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.vector.reduce.or.v4i32(<4 x i32>) #2
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #3 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !7, i64 0}
!11 = !{!"hisi_hba", !7, i64 0}
!12 = distinct !{!12, !13, !14, !15}
!13 = !{!"llvm.loop.mustprogress"}
!14 = !{!"llvm.loop.isvectorized", i32 1}
!15 = !{!"llvm.loop.unroll.runtime.disable"}
| linux_drivers_scsi_hisi_sas_extr_hisi_sas_v2_hw.c_get_wideport_bitmap_v2_hw |
; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_arc.c_dnlc_reduce_cache.c'
source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_arc.c_dnlc_reduce_cache.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@arc_dnlc_evicts_lock = dso_local global i32 0, align 4
@arc_dnlc_evicts_arg = dso_local local_unnamed_addr global i64 0, align 8
@arc_dnlc_evicts_cv = dso_local global i32 0, align 4
; Function Attrs: nounwind uwtable
define dso_local void @dnlc_reduce_cache(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @mutex_enter(ptr noundef nonnull @arc_dnlc_evicts_lock) #2
%3 = load i64, ptr @arc_dnlc_evicts_arg, align 8, !tbaa !5
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = ptrtoint ptr %0 to i64
store i64 %6, ptr @arc_dnlc_evicts_arg, align 8, !tbaa !5
%7 = tail call i32 @cv_broadcast(ptr noundef nonnull @arc_dnlc_evicts_cv) #2
br label %8
8: ; preds = %5, %1
%9 = tail call i32 @mutex_exit(ptr noundef nonnull @arc_dnlc_evicts_lock) #2
ret void
}
declare i32 @mutex_enter(ptr noundef) local_unnamed_addr #1
declare i32 @cv_broadcast(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_exit(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"long", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
| ; ModuleID = 'AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_arc.c_dnlc_reduce_cache.c'
source_filename = "AnghaBench/freebsd/sys/cddl/contrib/opensolaris/uts/common/fs/zfs/extr_arc.c_dnlc_reduce_cache.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@arc_dnlc_evicts_lock = common global i32 0, align 4
@arc_dnlc_evicts_arg = common local_unnamed_addr global i64 0, align 8
@arc_dnlc_evicts_cv = common global i32 0, align 4
; Function Attrs: nounwind ssp uwtable(sync)
define void @dnlc_reduce_cache(ptr noundef %0) local_unnamed_addr #0 {
%2 = tail call i32 @mutex_enter(ptr noundef nonnull @arc_dnlc_evicts_lock) #2
%3 = load i64, ptr @arc_dnlc_evicts_arg, align 8, !tbaa !6
%4 = icmp eq i64 %3, 0
br i1 %4, label %5, label %8
5: ; preds = %1
%6 = ptrtoint ptr %0 to i64
store i64 %6, ptr @arc_dnlc_evicts_arg, align 8, !tbaa !6
%7 = tail call i32 @cv_broadcast(ptr noundef nonnull @arc_dnlc_evicts_cv) #2
br label %8
8: ; preds = %5, %1
%9 = tail call i32 @mutex_exit(ptr noundef nonnull @arc_dnlc_evicts_lock) #2
ret void
}
declare i32 @mutex_enter(ptr noundef) local_unnamed_addr #1
declare i32 @cv_broadcast(ptr noundef) local_unnamed_addr #1
declare i32 @mutex_exit(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
| freebsd_sys_cddl_contrib_opensolaris_uts_common_fs_zfs_extr_arc.c_dnlc_reduce_cache |
; ModuleID = 'AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/libretro/extr_libretro.c_retro_set_audio_sample.c'
source_filename = "AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/libretro/extr_libretro.c_retro_set_audio_sample.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable
define dso_local void @retro_set_audio_sample(i32 noundef %0) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
| ; ModuleID = 'AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/libretro/extr_libretro.c_retro_set_audio_sample.c'
source_filename = "AnghaBench/Provenance/Cores/Genesis-Plus-GX/PVGenesis/Genesis/GenesisCore/libretro/extr_libretro.c_retro_set_audio_sample.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
; Function Attrs: mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync)
define void @retro_set_audio_sample(i32 noundef %0) local_unnamed_addr #0 {
ret void
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind ssp willreturn memory(none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
| Provenance_Cores_Genesis-Plus-GX_PVGenesis_Genesis_GenesisCore_libretro_extr_libretro.c_retro_set_audio_sample |
; ModuleID = 'AnghaBench/freebsd/sys/kern/extr_subr_msgbuf.c_msgbuf_cksum.c'
source_filename = "AnghaBench/freebsd/sys/kern/extr_subr_msgbuf.c_msgbuf_cksum.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.msgbuf = type { i64, ptr }
@llvm.compiler.used = appending global [1 x ptr] [ptr @msgbuf_cksum], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable
define internal i64 @msgbuf_cksum(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !5
%3 = icmp eq i64 %2, 0
br i1 %3, label %37, label %4
4: ; preds = %1
%5 = getelementptr inbounds %struct.msgbuf, ptr %0, i64 0, i32 1
%6 = load ptr, ptr %5, align 8, !tbaa !11
%7 = icmp ult i64 %2, 4
br i1 %7, label %26, label %8
8: ; preds = %4
%9 = and i64 %2, -4
br label %10
10: ; preds = %10, %8
%11 = phi i64 [ 0, %8 ], [ %20, %10 ]
%12 = phi <2 x i64> [ zeroinitializer, %8 ], [ %18, %10 ]
%13 = phi <2 x i64> [ zeroinitializer, %8 ], [ %19, %10 ]
%14 = getelementptr inbounds i64, ptr %6, i64 %11
%15 = getelementptr inbounds i64, ptr %14, i64 2
%16 = load <2 x i64>, ptr %14, align 8, !tbaa !12
%17 = load <2 x i64>, ptr %15, align 8, !tbaa !12
%18 = add <2 x i64> %16, %12
%19 = add <2 x i64> %17, %13
%20 = add nuw i64 %11, 4
%21 = icmp eq i64 %20, %9
br i1 %21, label %22, label %10, !llvm.loop !13
22: ; preds = %10
%23 = add <2 x i64> %19, %18
%24 = tail call i64 @llvm.vector.reduce.add.v2i64(<2 x i64> %23)
%25 = icmp eq i64 %2, %9
br i1 %25, label %37, label %26
26: ; preds = %4, %22
%27 = phi i64 [ 0, %4 ], [ %24, %22 ]
%28 = phi i64 [ 0, %4 ], [ %9, %22 ]
br label %29
29: ; preds = %26, %29
%30 = phi i64 [ %34, %29 ], [ %27, %26 ]
%31 = phi i64 [ %35, %29 ], [ %28, %26 ]
%32 = getelementptr inbounds i64, ptr %6, i64 %31
%33 = load i64, ptr %32, align 8, !tbaa !12
%34 = add i64 %33, %30
%35 = add nuw i64 %31, 1
%36 = icmp eq i64 %35, %2
br i1 %36, label %37, label %29, !llvm.loop !17
37: ; preds = %29, %22, %1
%38 = phi i64 [ 0, %1 ], [ %24, %22 ], [ %34, %29 ]
ret i64 %38
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.vector.reduce.add.v2i64(<2 x i64>) #1
attributes #0 = { nofree norecurse nosync nounwind memory(read, inaccessiblemem: none) uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !7, i64 0}
!6 = !{!"msgbuf", !7, i64 0, !10, i64 8}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"any pointer", !8, i64 0}
!11 = !{!6, !10, i64 8}
!12 = !{!7, !7, i64 0}
!13 = distinct !{!13, !14, !15, !16}
!14 = !{!"llvm.loop.mustprogress"}
!15 = !{!"llvm.loop.isvectorized", i32 1}
!16 = !{!"llvm.loop.unroll.runtime.disable"}
!17 = distinct !{!17, !14, !16, !15}
| ; ModuleID = 'AnghaBench/freebsd/sys/kern/extr_subr_msgbuf.c_msgbuf_cksum.c'
source_filename = "AnghaBench/freebsd/sys/kern/extr_subr_msgbuf.c_msgbuf_cksum.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@llvm.used = appending global [1 x ptr] [ptr @msgbuf_cksum], section "llvm.metadata"
; Function Attrs: nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync)
define internal i64 @msgbuf_cksum(ptr nocapture noundef readonly %0) #0 {
%2 = load i64, ptr %0, align 8, !tbaa !6
%3 = icmp eq i64 %2, 0
br i1 %3, label %47, label %4
4: ; preds = %1
%5 = getelementptr inbounds i8, ptr %0, i64 8
%6 = load ptr, ptr %5, align 8, !tbaa !12
%7 = icmp ult i64 %2, 8
br i1 %7, label %36, label %8
8: ; preds = %4
%9 = and i64 %2, -8
br label %10
10: ; preds = %10, %8
%11 = phi i64 [ 0, %8 ], [ %28, %10 ]
%12 = phi <2 x i64> [ zeroinitializer, %8 ], [ %24, %10 ]
%13 = phi <2 x i64> [ zeroinitializer, %8 ], [ %25, %10 ]
%14 = phi <2 x i64> [ zeroinitializer, %8 ], [ %26, %10 ]
%15 = phi <2 x i64> [ zeroinitializer, %8 ], [ %27, %10 ]
%16 = getelementptr inbounds i64, ptr %6, i64 %11
%17 = getelementptr inbounds i8, ptr %16, i64 16
%18 = getelementptr inbounds i8, ptr %16, i64 32
%19 = getelementptr inbounds i8, ptr %16, i64 48
%20 = load <2 x i64>, ptr %16, align 8, !tbaa !13
%21 = load <2 x i64>, ptr %17, align 8, !tbaa !13
%22 = load <2 x i64>, ptr %18, align 8, !tbaa !13
%23 = load <2 x i64>, ptr %19, align 8, !tbaa !13
%24 = add <2 x i64> %20, %12
%25 = add <2 x i64> %21, %13
%26 = add <2 x i64> %22, %14
%27 = add <2 x i64> %23, %15
%28 = add nuw i64 %11, 8
%29 = icmp eq i64 %28, %9
br i1 %29, label %30, label %10, !llvm.loop !14
30: ; preds = %10
%31 = add <2 x i64> %25, %24
%32 = add <2 x i64> %26, %31
%33 = add <2 x i64> %27, %32
%34 = tail call i64 @llvm.vector.reduce.add.v2i64(<2 x i64> %33)
%35 = icmp eq i64 %2, %9
br i1 %35, label %47, label %36
36: ; preds = %30, %4
%37 = phi i64 [ 0, %4 ], [ %34, %30 ]
%38 = phi i64 [ 0, %4 ], [ %9, %30 ]
br label %39
39: ; preds = %36, %39
%40 = phi i64 [ %44, %39 ], [ %37, %36 ]
%41 = phi i64 [ %45, %39 ], [ %38, %36 ]
%42 = getelementptr inbounds i64, ptr %6, i64 %41
%43 = load i64, ptr %42, align 8, !tbaa !13
%44 = add i64 %43, %40
%45 = add nuw i64 %41, 1
%46 = icmp eq i64 %45, %2
br i1 %46, label %47, label %39, !llvm.loop !18
47: ; preds = %39, %30, %1
%48 = phi i64 [ 0, %1 ], [ %34, %30 ], [ %44, %39 ]
ret i64 %48
}
; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.vector.reduce.add.v2i64(<2 x i64>) #1
attributes #0 = { nofree norecurse nosync nounwind ssp memory(read, inaccessiblemem: none) uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !8, i64 0}
!7 = !{!"msgbuf", !8, i64 0, !11, i64 8}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"any pointer", !9, i64 0}
!12 = !{!7, !11, i64 8}
!13 = !{!8, !8, i64 0}
!14 = distinct !{!14, !15, !16, !17}
!15 = !{!"llvm.loop.mustprogress"}
!16 = !{!"llvm.loop.isvectorized", i32 1}
!17 = !{!"llvm.loop.unroll.runtime.disable"}
!18 = distinct !{!18, !15, !17, !16}
| freebsd_sys_kern_extr_subr_msgbuf.c_msgbuf_cksum |
; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/ap/extr_wpa_auth.c_wpa_receive_error_report.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/ap/extr_wpa_auth.c_wpa_receive_error_report.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
%struct.wpa_state_machine = type { i64, i32, i32 }
%struct.wpa_authenticator = type { i32, %struct.TYPE_2__ }
%struct.TYPE_2__ = type { i64 }
@LOGGER_INFO = dso_local local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [79 x i8] c"received EAPOL-Key Error Request (STA detected Michael MIC failure (group=%d))\00", align 1
@WPA_CIPHER_TKIP = dso_local local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [65 x i8] c"ignore Michael MIC failure report since group cipher is not TKIP\00", align 1
@.str.2 = private unnamed_addr constant [68 x i8] c"ignore Michael MIC failure report since pairwise cipher is not TKIP\00", align 1
@llvm.compiler.used = appending global [1 x ptr] [ptr @wpa_receive_error_report], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal noundef i32 @wpa_receive_error_report(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = getelementptr inbounds %struct.wpa_state_machine, ptr %1, i64 0, i32 2
%5 = load i32, ptr %4, align 4, !tbaa !5
%6 = load i32, ptr @LOGGER_INFO, align 4, !tbaa !11
%7 = tail call i32 @wpa_auth_vlogger(ptr noundef %0, i32 noundef %5, i32 noundef %6, ptr noundef nonnull @.str, i32 noundef %2) #2
%8 = icmp eq i32 %2, 0
br i1 %8, label %18, label %9
9: ; preds = %3
%10 = getelementptr inbounds %struct.wpa_authenticator, ptr %0, i64 0, i32 1
%11 = load i64, ptr %10, align 8, !tbaa !12
%12 = load i64, ptr @WPA_CIPHER_TKIP, align 8, !tbaa !15
%13 = icmp eq i64 %11, %12
br i1 %13, label %26, label %14
14: ; preds = %9
%15 = load i32, ptr %4, align 4, !tbaa !5
%16 = load i32, ptr @LOGGER_INFO, align 4, !tbaa !11
%17 = tail call i32 @wpa_auth_logger(ptr noundef nonnull %0, i32 noundef %15, i32 noundef %16, ptr noundef nonnull @.str.1) #2
br label %36
18: ; preds = %3
%19 = load i64, ptr %1, align 8, !tbaa !16
%20 = load i64, ptr @WPA_CIPHER_TKIP, align 8, !tbaa !15
%21 = icmp eq i64 %19, %20
br i1 %21, label %26, label %22
22: ; preds = %18
%23 = load i32, ptr %4, align 4, !tbaa !5
%24 = load i32, ptr @LOGGER_INFO, align 4, !tbaa !11
%25 = tail call i32 @wpa_auth_logger(ptr noundef %0, i32 noundef %23, i32 noundef %24, ptr noundef nonnull @.str.2) #2
br label %36
26: ; preds = %9, %18
%27 = load i32, ptr %4, align 4, !tbaa !5
%28 = tail call i64 @wpa_auth_mic_failure_report(ptr noundef %0, i32 noundef %27) #2
%29 = icmp sgt i64 %28, 0
br i1 %29, label %38, label %30
30: ; preds = %26
%31 = getelementptr inbounds %struct.wpa_state_machine, ptr %1, i64 0, i32 1
%32 = load i32, ptr %31, align 8, !tbaa !17
%33 = add nsw i32 %32, 1
store i32 %33, ptr %31, align 8, !tbaa !17
%34 = load i32, ptr %0, align 8, !tbaa !18
%35 = add nsw i32 %34, 1
store i32 %35, ptr %0, align 8, !tbaa !18
br label %36
36: ; preds = %22, %30, %14
%37 = tail call i32 @wpa_request_new_ptk(ptr noundef nonnull %1) #2
br label %38
38: ; preds = %26, %36
%39 = phi i32 [ 0, %36 ], [ 1, %26 ]
ret i32 %39
}
declare i32 @wpa_auth_vlogger(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wpa_auth_logger(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @wpa_auth_mic_failure_report(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wpa_request_new_ptk(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !10, i64 12}
!6 = !{!"wpa_state_machine", !7, i64 0, !10, i64 8, !10, i64 12}
!7 = !{!"long", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!"int", !8, i64 0}
!11 = !{!10, !10, i64 0}
!12 = !{!13, !7, i64 8}
!13 = !{!"wpa_authenticator", !10, i64 0, !14, i64 8}
!14 = !{!"TYPE_2__", !7, i64 0}
!15 = !{!7, !7, i64 0}
!16 = !{!6, !7, i64 0}
!17 = !{!6, !10, i64 8}
!18 = !{!13, !10, i64 0}
| ; ModuleID = 'AnghaBench/freebsd/contrib/wpa/src/ap/extr_wpa_auth.c_wpa_receive_error_report.c'
source_filename = "AnghaBench/freebsd/contrib/wpa/src/ap/extr_wpa_auth.c_wpa_receive_error_report.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@LOGGER_INFO = common local_unnamed_addr global i32 0, align 4
@.str = private unnamed_addr constant [79 x i8] c"received EAPOL-Key Error Request (STA detected Michael MIC failure (group=%d))\00", align 1
@WPA_CIPHER_TKIP = common local_unnamed_addr global i64 0, align 8
@.str.1 = private unnamed_addr constant [65 x i8] c"ignore Michael MIC failure report since group cipher is not TKIP\00", align 1
@.str.2 = private unnamed_addr constant [68 x i8] c"ignore Michael MIC failure report since pairwise cipher is not TKIP\00", align 1
@llvm.used = appending global [1 x ptr] [ptr @wpa_receive_error_report], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal range(i32 0, 2) i32 @wpa_receive_error_report(ptr noundef %0, ptr noundef %1, i32 noundef %2) #0 {
%4 = getelementptr inbounds i8, ptr %1, i64 12
%5 = load i32, ptr %4, align 4, !tbaa !6
%6 = load i32, ptr @LOGGER_INFO, align 4, !tbaa !12
%7 = tail call i32 @wpa_auth_vlogger(ptr noundef %0, i32 noundef %5, i32 noundef %6, ptr noundef nonnull @.str, i32 noundef %2) #2
%8 = icmp eq i32 %2, 0
br i1 %8, label %18, label %9
9: ; preds = %3
%10 = getelementptr inbounds i8, ptr %0, i64 8
%11 = load i64, ptr %10, align 8, !tbaa !13
%12 = load i64, ptr @WPA_CIPHER_TKIP, align 8, !tbaa !16
%13 = icmp eq i64 %11, %12
br i1 %13, label %26, label %14
14: ; preds = %9
%15 = load i32, ptr %4, align 4, !tbaa !6
%16 = load i32, ptr @LOGGER_INFO, align 4, !tbaa !12
%17 = tail call i32 @wpa_auth_logger(ptr noundef nonnull %0, i32 noundef %15, i32 noundef %16, ptr noundef nonnull @.str.1) #2
br label %36
18: ; preds = %3
%19 = load i64, ptr %1, align 8, !tbaa !17
%20 = load i64, ptr @WPA_CIPHER_TKIP, align 8, !tbaa !16
%21 = icmp eq i64 %19, %20
br i1 %21, label %26, label %22
22: ; preds = %18
%23 = load i32, ptr %4, align 4, !tbaa !6
%24 = load i32, ptr @LOGGER_INFO, align 4, !tbaa !12
%25 = tail call i32 @wpa_auth_logger(ptr noundef %0, i32 noundef %23, i32 noundef %24, ptr noundef nonnull @.str.2) #2
br label %36
26: ; preds = %9, %18
%27 = load i32, ptr %4, align 4, !tbaa !6
%28 = tail call i64 @wpa_auth_mic_failure_report(ptr noundef %0, i32 noundef %27) #2
%29 = icmp sgt i64 %28, 0
br i1 %29, label %38, label %30
30: ; preds = %26
%31 = getelementptr inbounds i8, ptr %1, i64 8
%32 = load i32, ptr %31, align 8, !tbaa !18
%33 = add nsw i32 %32, 1
store i32 %33, ptr %31, align 8, !tbaa !18
%34 = load i32, ptr %0, align 8, !tbaa !19
%35 = add nsw i32 %34, 1
store i32 %35, ptr %0, align 8, !tbaa !19
br label %36
36: ; preds = %22, %30, %14
%37 = tail call i32 @wpa_request_new_ptk(ptr noundef nonnull %1) #2
br label %38
38: ; preds = %26, %36
%39 = phi i32 [ 0, %36 ], [ 1, %26 ]
ret i32 %39
}
declare i32 @wpa_auth_vlogger(ptr noundef, i32 noundef, i32 noundef, ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wpa_auth_logger(ptr noundef, i32 noundef, i32 noundef, ptr noundef) local_unnamed_addr #1
declare i64 @wpa_auth_mic_failure_report(ptr noundef, i32 noundef) local_unnamed_addr #1
declare i32 @wpa_request_new_ptk(ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !11, i64 12}
!7 = !{!"wpa_state_machine", !8, i64 0, !11, i64 8, !11, i64 12}
!8 = !{!"long", !9, i64 0}
!9 = !{!"omnipotent char", !10, i64 0}
!10 = !{!"Simple C/C++ TBAA"}
!11 = !{!"int", !9, i64 0}
!12 = !{!11, !11, i64 0}
!13 = !{!14, !8, i64 8}
!14 = !{!"wpa_authenticator", !11, i64 0, !15, i64 8}
!15 = !{!"TYPE_2__", !8, i64 0}
!16 = !{!8, !8, i64 0}
!17 = !{!7, !8, i64 0}
!18 = !{!7, !11, i64 8}
!19 = !{!14, !11, i64 0}
| freebsd_contrib_wpa_src_ap_extr_wpa_auth.c_wpa_receive_error_report |
; ModuleID = 'AnghaBench/linux/fs/ocfs2/cluster/extr_heartbeat.c_o2hb_heartbeat_group_mode_show.c'
source_filename = "AnghaBench/linux/fs/ocfs2/cluster/extr_heartbeat.c_o2hb_heartbeat_group_mode_show.c"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"
@.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1
@o2hb_heartbeat_mode_desc = dso_local local_unnamed_addr global ptr null, align 8
@o2hb_heartbeat_mode = dso_local local_unnamed_addr global i64 0, align 8
@llvm.compiler.used = appending global [1 x ptr] [ptr @o2hb_heartbeat_group_mode_show], section "llvm.metadata"
; Function Attrs: nounwind uwtable
define internal i32 @o2hb_heartbeat_group_mode_show(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = load ptr, ptr @o2hb_heartbeat_mode_desc, align 8, !tbaa !5
%4 = load i64, ptr @o2hb_heartbeat_mode, align 8, !tbaa !9
%5 = getelementptr inbounds ptr, ptr %3, i64 %4
%6 = load ptr, ptr %5, align 8, !tbaa !5
%7 = tail call i32 @sprintf(ptr noundef %1, ptr noundef nonnull @.str, ptr noundef %6) #2
ret i32 %7
}
declare i32 @sprintf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind uwtable "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3}
!llvm.ident = !{!4}
!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{!"clang version 18.1.8 (https://github.com/llvm/llvm-project.git 3b5b5c1ec4a3095ab096dd780e84d7ab81f3d7ff)"}
!5 = !{!6, !6, i64 0}
!6 = !{!"any pointer", !7, i64 0}
!7 = !{!"omnipotent char", !8, i64 0}
!8 = !{!"Simple C/C++ TBAA"}
!9 = !{!10, !10, i64 0}
!10 = !{!"long", !7, i64 0}
| ; ModuleID = 'AnghaBench/linux/fs/ocfs2/cluster/extr_heartbeat.c_o2hb_heartbeat_group_mode_show.c'
source_filename = "AnghaBench/linux/fs/ocfs2/cluster/extr_heartbeat.c_o2hb_heartbeat_group_mode_show.c"
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
target triple = "arm64-apple-macosx15.0.0"
@.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1
@o2hb_heartbeat_mode_desc = common local_unnamed_addr global ptr null, align 8
@o2hb_heartbeat_mode = common local_unnamed_addr global i64 0, align 8
@llvm.used = appending global [1 x ptr] [ptr @o2hb_heartbeat_group_mode_show], section "llvm.metadata"
; Function Attrs: nounwind ssp uwtable(sync)
define internal i32 @o2hb_heartbeat_group_mode_show(ptr nocapture readnone %0, ptr noundef %1) #0 {
%3 = load ptr, ptr @o2hb_heartbeat_mode_desc, align 8, !tbaa !6
%4 = load i64, ptr @o2hb_heartbeat_mode, align 8, !tbaa !10
%5 = getelementptr inbounds ptr, ptr %3, i64 %4
%6 = load ptr, ptr %5, align 8, !tbaa !6
%7 = tail call i32 @sprintf(ptr noundef %1, ptr noundef nonnull @.str, ptr noundef %6) #2
ret i32 %7
}
declare i32 @sprintf(ptr noundef, ptr noundef, ptr noundef) local_unnamed_addr #1
attributes #0 = { nounwind ssp uwtable(sync) "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #1 = { "frame-pointer"="non-leaf" "no-trapping-math"="true" "probe-stack"="__chkstk_darwin" "stack-protector-buffer-size"="8" "target-cpu"="apple-m1" "target-features"="+aes,+altnzcv,+bti,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fptoint,+fullfp16,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+sha3,+specrestrict,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8a,+zcm,+zcz" }
attributes #2 = { nounwind }
!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!0 = !{i32 2, !"SDK Version", [2 x i32] [i32 15, i32 5]}
!1 = !{i32 1, !"wchar_size", i32 4}
!2 = !{i32 8, !"PIC Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 1}
!4 = !{i32 7, !"frame-pointer", i32 1}
!5 = !{!"Apple clang version 17.0.0 (clang-1700.0.13.5)"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C/C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"long", !8, i64 0}
| linux_fs_ocfs2_cluster_extr_heartbeat.c_o2hb_heartbeat_group_mode_show |
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