docstring stringlengths 22 576 | signature stringlengths 9 317 | prompt stringlengths 57 886 | code stringlengths 20 1.36k | repository stringclasses 49
values | language stringclasses 2
values | license stringclasses 9
values | stars int64 15 21.3k |
|---|---|---|---|---|---|---|---|
/* ADC Set the Sample Time for All Channels.
The sampling time can be selected in ADC clock cycles, same for all channels. */ | void adc_set_sample_time_on_all_channels(uint32_t adc, uint8_t time) | /* ADC Set the Sample Time for All Channels.
The sampling time can be selected in ADC clock cycles, same for all channels. */
void adc_set_sample_time_on_all_channels(uint32_t adc, uint8_t time) | {
uint8_t i;
uint32_t reg32 = 0;
for (i = 0; i <= 9; i++) {
reg32 |= (time << (i * 3));
}
ADC_SMPR0(adc) = reg32;
ADC_SMPR1(adc) = reg32;
ADC_SMPR2(adc) = reg32;
ADC_SMPR3(adc) = reg32;
} | insane-adding-machines/unicore-mx | C++ | GNU General Public License v3.0 | 50 |
/* checks whether the I/O compensation cell ready flag is set or not */ | FlagStatus syscfg_flag_get(void) | /* checks whether the I/O compensation cell ready flag is set or not */
FlagStatus syscfg_flag_get(void) | {
if(((uint32_t)RESET) != (SYSCFG_CPSCTL & SYSCFG_CPSCTL_CPS_RDY)) {
return SET;
} else {
return RESET;
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* This function disables USB HS PHY PLL clock. */ | void CLOCK_DisableUsbhs0PhyPllClock(void) | /* This function disables USB HS PHY PLL clock. */
void CLOCK_DisableUsbhs0PhyPllClock(void) | {
USBPHY1->PLL_SIC_CLR = (USBPHY_PLL_SIC_PLL_EN_USB_CLKS_MASK);
USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* On Sun, Dec 08, 2002 at 02:43:36AM -0500, Pete Zaitcev wrote: */ | static void sunzilog_shutdown(struct uart_port *port) | /* On Sun, Dec 08, 2002 at 02:43:36AM -0500, Pete Zaitcev wrote: */
static void sunzilog_shutdown(struct uart_port *port) | {
struct uart_sunzilog_port *up = UART_ZILOG(port);
struct zilog_channel __iomem *channel;
unsigned long flags;
if (ZS_IS_CONS(up))
return;
spin_lock_irqsave(&port->lock, flags);
channel = ZILOG_CHANNEL_FROM_PORT(port);
up->curregs[R3] &= ~RxENAB;
up->curregs[R5] &= ~TxENAB;
up->curregs[R1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
up->curregs[R5] &= ~SND_BRK;
sunzilog_maybe_update_regs(up, channel);
spin_unlock_irqrestore(&port->lock, flags);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Kick starter for devices that did not complete the startup/shutdown procedure or were sleeping because of a pending state. dasd_kick_device will schedule a call do do_kick_device to the kernel event daemon. */ | static void do_kick_device(struct work_struct *) | /* Kick starter for devices that did not complete the startup/shutdown procedure or were sleeping because of a pending state. dasd_kick_device will schedule a call do do_kick_device to the kernel event daemon. */
static void do_kick_device(struct work_struct *) | {
struct dasd_device *device = container_of(work, struct dasd_device, kick_work);
dasd_change_state(device);
dasd_schedule_device_bh(device);
dasd_put_device(device);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* If any reserved bits in Address are set, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */ | UINT32 EFIAPI PciSegmentBitFieldAndThenOr32(IN UINT64 Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 AndData, IN UINT32 OrData) | /* If any reserved bits in Address are set, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */
UINT32 EFIAPI PciSegmentBitFieldAndThenOr32(IN UINT64 Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 AndData, IN UINT32 OrData) | {
UINTN Count;
PCI_SEGMENT_INFO *SegmentInfo;
SegmentInfo = GetPciSegmentInfo (&Count);
return MmioBitFieldAndThenOr32 (PciSegmentLibGetEcamAddress (Address, SegmentInfo, Count), StartBit, EndBit, AndData, OrData);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* omap_write_buf_dma_pref - write buffer to NAND controller @mtd: MTD device structure @buf: data buffer @len: number of bytes to write */ | static void omap_write_buf_dma_pref(struct mtd_info *mtd, const u_char *buf, int len) | /* omap_write_buf_dma_pref - write buffer to NAND controller @mtd: MTD device structure @buf: data buffer @len: number of bytes to write */
static void omap_write_buf_dma_pref(struct mtd_info *mtd, const u_char *buf, int len) | {
if (len <= mtd->oobsize)
omap_write_buf_pref(mtd, buf, len);
else
omap_nand_dma_transfer(mtd, buf, len, 0x1);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* fc_seq_send_last() - Send a sequence that is the last in the exchange @sp: */ | static void fc_seq_send_last(struct fc_seq *sp, struct fc_frame *fp, enum fc_rctl rctl, enum fc_fh_type fh_type) | /* fc_seq_send_last() - Send a sequence that is the last in the exchange @sp: */
static void fc_seq_send_last(struct fc_seq *sp, struct fc_frame *fp, enum fc_rctl rctl, enum fc_fh_type fh_type) | {
u32 f_ctl;
struct fc_exch *ep = fc_seq_exch(sp);
f_ctl = FC_FC_LAST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT;
f_ctl |= ep->f_ctl;
fc_fill_fc_hdr(fp, rctl, ep->did, ep->sid, fh_type, f_ctl, 0);
fc_seq_send(ep->lp, sp, fp);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* This function retrieves the WiFi interface's IP mask. */ | WIFI_Status_t WIFI_GetIP_Mask(uint8_t *mask) | /* This function retrieves the WiFi interface's IP mask. */
WIFI_Status_t WIFI_GetIP_Mask(uint8_t *mask) | {
WIFI_Status_t ret = WIFI_STATUS_ERROR;
if (ES_WIFI_IsConnected(&EsWifiObj) == 1)
{
memcpy(mask, EsWifiObj.NetSettings.IP_Mask, 4);
ret = WIFI_STATUS_OK;
}
return ret;
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* eap_peer_tls_status - Get TLS status @sm: Pointer to EAP state machine allocated with eap_peer_sm_init() @data: Data for TLS processing @buf: Buffer for status information @buflen: Maximum buffer length @verbose: Whether to include verbose status information Returns: Number of bytes written to buf. */ | int eap_peer_tls_status(struct eap_sm *sm, struct eap_ssl_data *data, char *buf, size_t buflen, int verbose) | /* eap_peer_tls_status - Get TLS status @sm: Pointer to EAP state machine allocated with eap_peer_sm_init() @data: Data for TLS processing @buf: Buffer for status information @buflen: Maximum buffer length @verbose: Whether to include verbose status information Returns: Number of bytes written to buf. */
int eap_peer_tls_status(struct eap_sm *sm, struct eap_ssl_data *data, char *buf, size_t buflen, int verbose) | {
char name[128];
int len = 0, ret;
if (tls_get_cipher(data->ssl_ctx, data->conn, name, sizeof(name)) == 0)
{
ret = sprintf(buf + len,
"EAP TLS cipher=%s\n", name);
if (ret < 0 || (size_t) ret >= buflen - len)
return len;
len += ret;
}
return len;
} | retro-esp32/RetroESP32 | C++ | Creative Commons Attribution Share Alike 4.0 International | 581 |
/* Shift keys one index left/right inside a single btree block. */ | STATIC void xfs_btree_shift_keys(struct xfs_btree_cur *cur, union xfs_btree_key *key, int dir, int numkeys) | /* Shift keys one index left/right inside a single btree block. */
STATIC void xfs_btree_shift_keys(struct xfs_btree_cur *cur, union xfs_btree_key *key, int dir, int numkeys) | {
char *dst_key;
ASSERT(numkeys >= 0);
ASSERT(dir == 1 || dir == -1);
dst_key = (char *)key + (dir * cur->bc_ops->key_len);
memmove(dst_key, key, numkeys * cur->bc_ops->key_len);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Sends the current thread sleeping and sets a reference variable. */ | msg_t osalThreadSuspendS(thread_reference_t *trp) | /* Sends the current thread sleeping and sets a reference variable. */
msg_t osalThreadSuspendS(thread_reference_t *trp) | {
thread_t thd;
osalDbgCheck(trp != NULL);
*trp = &thd;
thd.handle = tx_thread_identify();
thd.message = MSG_WAIT;
while (thd.message == MSG_WAIT)
{
tx_thread_suspend(thd.handle);
tx_thread_relinquish();
}
return thd.message;
} | nanoframework/nf-interpreter | C++ | MIT License | 293 |
/* If this interface is not supported, then return FALSE. */ | BOOLEAN EFIAPI Sha512HashAll(IN CONST VOID *Data, IN UINTN DataSize, OUT UINT8 *HashValue) | /* If this interface is not supported, then return FALSE. */
BOOLEAN EFIAPI Sha512HashAll(IN CONST VOID *Data, IN UINTN DataSize, OUT UINT8 *HashValue) | {
CALL_CRYPTO_SERVICE (Sha512HashAll, (Data, DataSize, HashValue), FALSE);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Fills each ADC_InitStruct member with its default value. */ | void ADC_StructInit(ADC_InitTypeDef *ADC_InitStruct) | /* Fills each ADC_InitStruct member with its default value. */
void ADC_StructInit(ADC_InitTypeDef *ADC_InitStruct) | {
ADC_InitStruct->ADC_Mode = ADC_Mode_Independent;
ADC_InitStruct->ADC_ScanConvMode = DISABLE;
ADC_InitStruct->ADC_ContinuousConvMode = DISABLE;
ADC_InitStruct->ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
ADC_InitStruct->ADC_DataAlign = ADC_DataAlign_Right;
ADC_InitStruct->ADC_NbrOfChannel = 1;
} | gcallipo/RadioDSP-Stm32f103 | C++ | Common Creative - Attribution 3.0 | 51 |
/* Report an EEH error to each device driver, collect up and merge the device driver responses. Cumulative response passed back in "userdata". */ | static int eeh_report_error(struct pci_dev *dev, void *userdata) | /* Report an EEH error to each device driver, collect up and merge the device driver responses. Cumulative response passed back in "userdata". */
static int eeh_report_error(struct pci_dev *dev, void *userdata) | {
enum pci_ers_result rc, *res = userdata;
struct pci_driver *driver = dev->driver;
dev->error_state = pci_channel_io_frozen;
if (!driver)
return 0;
eeh_disable_irq(dev);
if (!driver->err_handler ||
!driver->err_handler->error_detected)
return 0;
rc = driver->err_handler->error_detected (dev, pci_channel_io_frozen);
if (rc == PCI_ERS_RESULT_NEED_RESET) *res = rc;
if (*res == PCI_ERS_RESULT_NONE) *res = rc;
return 0;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Checks whether the specified ADC interrupt has occurred or not. */ | it_status_t ald_adc_get_it_status(ald_adc_handle_t *hperh, ald_adc_it_t it) | /* Checks whether the specified ADC interrupt has occurred or not. */
it_status_t ald_adc_get_it_status(ald_adc_handle_t *hperh, ald_adc_it_t it) | {
assert_param(IS_ADC_TYPE(hperh->perh));
assert_param(IS_ADC_IT_TYPE(it));
if (READ_BIT(hperh->perh->CON0, it))
return SET;
return RESET;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Not strictly speaking an "up_ref" as a STACK doesn't have a reference count but it has the same effect by duping the STACK and upping the ref of each X509 structure. */ | STACK_OF(X509) | /* Not strictly speaking an "up_ref" as a STACK doesn't have a reference count but it has the same effect by duping the STACK and upping the ref of each X509 structure. */
STACK_OF(X509) | {
STACK_OF(X509) *ret;
size_t i;
ret = sk_X509_dup(chain);
for (i = 0; i < sk_X509_num(ret); i++) {
X509_up_ref(sk_X509_value(ret, i));
}
return ret;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Check if cursor state changed (down or move) */ | int TOUCH_StateChanged(void) | /* Check if cursor state changed (down or move) */
int TOUCH_StateChanged(void) | {
int result = 0;
int diff, a, b;
if (newpos.pen && !current_pos.pen) result = 1;
a = current_pos.x;
b = newpos.x;
diff = a - b;
if (abs(diff) > (int) touch_ignore_move) result = 1;
a = current_pos.y;
b = newpos.y;
diff = a - b;
if (abs(diff) > (int) touch_ignore_move) result = 1;
return result;
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* Returns 1 if UDC should be enabled, 0 otherwise */ | static int should_enable_udc(struct pxa_udc *udc) | /* Returns 1 if UDC should be enabled, 0 otherwise */
static int should_enable_udc(struct pxa_udc *udc) | {
int put_on;
put_on = ((udc->pullup_on) && (udc->driver));
put_on &= ((udc->vbus_sensed) || (!udc->transceiver));
return put_on;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Command response callback function for sd_ble_opt_set BLE command.
Callback for decoding the output parameters and the command response return code. */ | static uint32_t opt_set_rsp_dec(const uint8_t *p_buffer, uint16_t length) | /* Command response callback function for sd_ble_opt_set BLE command.
Callback for decoding the output parameters and the command response return code. */
static uint32_t opt_set_rsp_dec(const uint8_t *p_buffer, uint16_t length) | {
uint32_t result_code;
const uint32_t err_code = ble_opt_set_rsp_dec(p_buffer,
length,
&result_code);
APP_ERROR_CHECK(err_code);
return result_code;
} | labapart/polymcu | C++ | null | 201 |
/* Reverses the effect of usb_ehci_hcd_omap_probe(), first invoking the HCD's stop() method. It is always called from a thread context, normally "rmmod", "apmd", or something similar. */ | static int ehci_hcd_omap_remove(struct platform_device *pdev) | /* Reverses the effect of usb_ehci_hcd_omap_probe(), first invoking the HCD's stop() method. It is always called from a thread context, normally "rmmod", "apmd", or something similar. */
static int ehci_hcd_omap_remove(struct platform_device *pdev) | {
struct ehci_hcd_omap *omap = platform_get_drvdata(pdev);
struct usb_hcd *hcd = ehci_to_hcd(omap->ehci);
usb_remove_hcd(hcd);
omap_stop_ehc(omap, hcd);
iounmap(hcd->regs);
iounmap(omap->tll_base);
iounmap(omap->uhh_base);
usb_put_hcd(hcd);
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* UART MSP De-Initialization This function frees the hardware resources used in this example: */ | void HAL_UART_MspDeInit(UART_HandleTypeDef *huart) | /* UART MSP De-Initialization This function frees the hardware resources used in this example: */
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart) | {
USARTx_FORCE_RESET();
USARTx_RELEASE_RESET();
HAL_GPIO_DeInit(USARTx_TX_GPIO_PORT, USARTx_TX_PIN);
HAL_GPIO_DeInit(USARTx_RX_GPIO_PORT, USARTx_RX_PIN);
if(huart->hdmarx != 0)
{
HAL_DMA_DeInit(huart->hdmarx);
}
if(huart->hdmatx != 0)
{
HAL_DMA_DeInit(huart->hdmatx);
}
HAL_NVIC_DisableIRQ(USARTx_DMA_TX_IRQn);
HAL_NVIC_DisableIRQ(USARTx_DMA_RX_IRQn);
} | STMicroelectronics/STM32CubeF4 | C++ | Other | 789 |
/* Traverse all ephemeron tables propagating marks from keys to values. Repeat until it converges, that is, nothing new is marked. 'dir' inverts the direction of the traversals, trying to speed up convergence on chains in the same table. */ | static void convergeephemerons(global_State *g) | /* Traverse all ephemeron tables propagating marks from keys to values. Repeat until it converges, that is, nothing new is marked. 'dir' inverts the direction of the traversals, trying to speed up convergence on chains in the same table. */
static void convergeephemerons(global_State *g) | {
GCObject *w;
GCObject *next = g->ephemeron;
g->ephemeron = NULL;
changed = 0;
while ((w = next) != NULL) {
Table *h = gco2t(w);
next = h->gclist;
nw2black(h);
if (traverseephemeron(g, h, dir)) {
propagateall(g);
changed = 1;
}
}
dir = !dir;
} while (changed);
} | Nicholas3388/LuaNode | C++ | Other | 1,055 |
/* unregisters all bnx2i adapter instances with the cnic driver while holding the global resource lock */ | void bnx2i_unreg_dev_all(void) | /* unregisters all bnx2i adapter instances with the cnic driver while holding the global resource lock */
void bnx2i_unreg_dev_all(void) | {
struct bnx2i_hba *hba, *temp;
mutex_lock(&bnx2i_dev_lock);
list_for_each_entry_safe(hba, temp, &adapter_list, link)
bnx2i_unreg_one_device(hba);
mutex_unlock(&bnx2i_dev_lock);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Sends data over the connected socket. Use after successful curl_easy_perform() with CURLOPT_CONNECT_ONLY option. */ | CURLcode curl_easy_send(struct Curl_easy *data, const void *buffer, size_t buflen, size_t *n) | /* Sends data over the connected socket. Use after successful curl_easy_perform() with CURLOPT_CONNECT_ONLY option. */
CURLcode curl_easy_send(struct Curl_easy *data, const void *buffer, size_t buflen, size_t *n) | {
curl_socket_t sfd;
CURLcode result;
ssize_t n1;
struct connectdata *c = NULL;
if(Curl_is_in_callback(data))
return CURLE_RECURSIVE_API_CALL;
result = easy_connection(data, &sfd, &c);
if(result)
return result;
*n = 0;
result = Curl_write(c, sfd, buffer, buflen, &n1);
if(n1 == -1)
return CURLE_SEND_ERROR;
if(!result && !n1)
return CURLE_AGAIN;
*n = (size_t)n1;
return result;
} | alibaba/AliOS-Things | C++ | Apache License 2.0 | 4,536 |
/* Check whether the CPU supports the Security extensions */ | BOOLEAN EFIAPI ArmHasSecurityExtensions(VOID) | /* Check whether the CPU supports the Security extensions */
BOOLEAN EFIAPI ArmHasSecurityExtensions(VOID) | {
return ((ArmReadIdPfr1 () & ARM_PFR1_SEC) != 0);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Disable the Capture of the PWM module.
The */ | void PWMCAPDisable(unsigned long ulBase, unsigned long ulChannel) | /* Disable the Capture of the PWM module.
The */
void PWMCAPDisable(unsigned long ulBase, unsigned long ulChannel) | {
unsigned long ulChannelTemp;
ulChannelTemp = (ulBase == PWMA_BASE) ? ulChannel : (ulChannel - 4);
xASSERT((ulBase == PWMA_BASE));
xASSERT(((ulChannelTemp >= 0) || (ulChannelTemp <= 3)));
xHWREG(ulBase + PWM_CCR0 + (ulChannelTemp >> 1)*4) &=
~(PWM_CCR0_CAPCH0EN << ((ulChannel % 2) ? 16 : 0));
xHWREG(ulBase + PWM_PCR) &= ~(PWM_PCR_CH0EN << (ulChannelTemp << 3));
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* This stuff for eXecute-In-Place. phys is optional and may be set to NULL. */ | int mtd_point(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, void **virt, resource_size_t *phys) | /* This stuff for eXecute-In-Place. phys is optional and may be set to NULL. */
int mtd_point(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, void **virt, resource_size_t *phys) | {
*retlen = 0;
*virt = NULL;
if (phys)
*phys = 0;
if (!mtd->_point)
return -EOPNOTSUPP;
if (from < 0 || from > mtd->size || len > mtd->size - from)
return -EINVAL;
if (!len)
return 0;
return mtd->_point(mtd, from, len, retlen, virt, phys);
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* Quiesce all I2O controllers which are connected to the system. */ | static void i2o_iop_quiesce_all(void) | /* Quiesce all I2O controllers which are connected to the system. */
static void i2o_iop_quiesce_all(void) | {
struct i2o_controller *c, *tmp;
list_for_each_entry_safe(c, tmp, &i2o_controllers, list) {
if (!c->no_quiesce)
i2o_iop_quiesce(c);
}
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* In any case the ibm,associativity-reference-points should give the correct depth for a normal NUMA system. */ | static int __init find_min_common_depth(void) | /* In any case the ibm,associativity-reference-points should give the correct depth for a normal NUMA system. */
static int __init find_min_common_depth(void) | {
int depth;
const unsigned int *ref_points;
struct device_node *rtas_root;
unsigned int len;
rtas_root = of_find_node_by_path("/rtas");
if (!rtas_root)
return -1;
ref_points = of_get_property(rtas_root,
"ibm,associativity-reference-points", &len);
if ((len >= 2 * sizeof(unsigned int)) && ref_points) {
depth = ref_points[1];
} else {
dbg("NUMA: ibm,associativity-reference-points not found.\n");
depth = -1;
}
of_node_put(rtas_root);
return depth;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Set the specified data holding register value for DAC channel1. */ | void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data) | /* Set the specified data holding register value for DAC channel1. */
void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data) | {
__IO uint32_t tmp = 0;
assert_param(IS_DAC_ALIGN(DAC_Align));
assert_param(IS_DAC_DATA(Data));
tmp = (uint32_t)DAC_BASE;
tmp += DHR12R1_OFFSET + DAC_Align;
*(__IO uint32_t *) tmp = Data;
} | gcallipo/RadioDSP-Stm32f103 | C++ | Common Creative - Attribution 3.0 | 51 |
/* Returns CRStatement at position itemnr, if itemnr > number of rules - 1, it will return NULL. */ | CRStatement* cr_statement_at_media_get_from_list(CRStatement *a_this, int itemnr) | /* Returns CRStatement at position itemnr, if itemnr > number of rules - 1, it will return NULL. */
CRStatement* cr_statement_at_media_get_from_list(CRStatement *a_this, int itemnr) | {
g_return_val_if_fail (a_this
&& a_this->type == AT_MEDIA_RULE_STMT
&& a_this->kind.media_rule, NULL);
return cr_statement_get_from_list (a_this->kind.media_rule->rulesets,
itemnr);
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Setting this flag to TRUE for a channel you have already closed can cause problems. */ | void g_io_channel_set_close_on_unref(GIOChannel *channel, gboolean do_close) | /* Setting this flag to TRUE for a channel you have already closed can cause problems. */
void g_io_channel_set_close_on_unref(GIOChannel *channel, gboolean do_close) | {
g_return_if_fail (channel != NULL);
channel->close_on_unref = do_close;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Output an literal byte as an 8 or 9 bit code */ | void literal(uchar c) | /* Output an literal byte as an 8 or 9 bit code */
void literal(uchar c) | {
outBits(c, 8);
} else if (c <= 143) {
outBitsRev(0x30 + c, 8);
} else {
outBits(1, 1);
outBitsRev(0x90 - 144 + c, 8);
}
} | nodemcu/nodemcu-firmware | C++ | MIT License | 7,566 |
/* ISR handler for a specific vector index in the interrupt vector table for linking the actual interrupts vectors to the one in the user program's vector table. */ | void Vector34_handler(void) | /* ISR handler for a specific vector index in the interrupt vector table for linking the actual interrupts vectors to the one in the user program's vector table. */
void Vector34_handler(void) | {
asm
{
LDX(VCT_USER_PROGRAM_VECTOR_TABLE_STARTADDR + (34 * 2))
JMP 0,X
}
} | feaser/openblt | C++ | GNU General Public License v3.0 | 601 |
/* Starts a new thread with priority "prio" that will begin its execution in the function "thread()". The "arg" argument will be passed as an argument to the thread() function. The id of the new thread is returned. Both the id and the priority are system dependent. */ | sys_thread_t sys_thread_new(char *name, void(*thread)(void *arg), void *arg, int stacksize, int prio) | /* Starts a new thread with priority "prio" that will begin its execution in the function "thread()". The "arg" argument will be passed as an argument to the thread() function. The id of the new thread is returned. Both the id and the priority are system dependent. */
sys_thread_t sys_thread_new(char *name, void(*thread)(void *arg), void *arg, int stacksize, int prio) | {
xTaskHandle CreatedTask;
int result;
if ( s_nextthread < SYS_THREAD_MAX )
{
result = xTaskCreate( thread, ( signed portCHAR * ) name, stacksize, arg, prio, &CreatedTask );
s_timeoutlist[s_nextthread++].pid = CreatedTask;
if(result == pdPASS)
{
return CreatedTask;
}
else
{
return NULL;
}
}
else
{
return NULL;
}
} | apopple/Pandaboard-FreeRTOS | C++ | null | 25 |
/* clear the specified DAC interrupt flag (DAC DMA underrun interrupt flag) */ | void dac_interrupt_flag_clear(uint32_t dac_periph) | /* clear the specified DAC interrupt flag (DAC DMA underrun interrupt flag) */
void dac_interrupt_flag_clear(uint32_t dac_periph) | {
if(DAC0 == dac_periph) {
DAC_STAT |= DAC_STAT_DDUDR0;
} else {
DAC_STAT |= DAC_STAT_DDUDR1;
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Initialize GPIO pin(s) as analog input. Must be called separately for each port. Does not initialize the ADC itself. Must be initialized separately. */ | void analog_gpio_init(GPIO_TypeDef *GPIOx, uint32_t pin_mask) | /* Initialize GPIO pin(s) as analog input. Must be called separately for each port. Does not initialize the ADC itself. Must be initialized separately. */
void analog_gpio_init(GPIO_TypeDef *GPIOx, uint32_t pin_mask) | {};
GPIO_InitStruct.Pin = pin_mask;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOx, &GPIO_InitStruct);
} | prusa3d/Prusa-Firmware-Buddy | C++ | Other | 1,019 |
/* If there are not scheduled events this function returns 0; otherwise it returns 1 and *next_event_time is set to the start time of the next event. */ | int ble_ll_sched_next_time(uint32_t *next_event_time) | /* If there are not scheduled events this function returns 0; otherwise it returns 1 and *next_event_time is set to the start time of the next event. */
int ble_ll_sched_next_time(uint32_t *next_event_time) | {
int rc;
os_sr_t sr;
struct ble_ll_sched_item *first;
rc = 0;
OS_ENTER_CRITICAL(sr);
first = TAILQ_FIRST(&g_ble_ll_sched_q);
if (first) {
*next_event_time = first->start_time;
rc = 1;
}
OS_EXIT_CRITICAL(sr);
return rc;
} | arendst/Tasmota | C++ | GNU General Public License v3.0 | 21,318 |
/* DMAMUX Set DMA Request NBREQ To Forward.
Set number of request to forward (minus 1) to the dma controller after a synchronization event. This must be configured with synchronization and event generation disabled. */ | void dmamux_set_dma_request_sync_nbreq(uint32_t dmamux, uint8_t channel, uint8_t nbreq) | /* DMAMUX Set DMA Request NBREQ To Forward.
Set number of request to forward (minus 1) to the dma controller after a synchronization event. This must be configured with synchronization and event generation disabled. */
void dmamux_set_dma_request_sync_nbreq(uint32_t dmamux, uint8_t channel, uint8_t nbreq) | {
uint32_t reg32 = DMAMUX_CxCR(dmamux, channel);
reg32 &= ~(DMAMUX_CxCR_NBREQ_MASK << DMAMUX_CxCR_NBREQ_SHIFT);
reg32 |= ((nbreq & DMAMUX_CxCR_NBREQ_MASK) << DMAMUX_CxCR_NBREQ_SHIFT);
DMAMUX_CxCR(dmamux, channel) = reg32;
} | libopencm3/libopencm3 | C++ | GNU General Public License v3.0 | 2,931 |
/* ADC Set the Sample Time for All Channels.
The sampling time can be selected in ADC clock cycles from 1.5 to 239.5, same for all channels. */ | void adc_set_sample_time_on_all_channels(uint32_t adc, uint8_t time) | /* ADC Set the Sample Time for All Channels.
The sampling time can be selected in ADC clock cycles from 1.5 to 239.5, same for all channels. */
void adc_set_sample_time_on_all_channels(uint32_t adc, uint8_t time) | {
ADC_SMPR(adc) = time & ADC_SMPR_SMP;
} | insane-adding-machines/unicore-mx | C++ | GNU General Public License v3.0 | 50 |
/* Hash a DN (from a trust anchor) into the provided buffer. This uses the DN hash implementation and context structure from the X.509 engine context. */ | static void hash_dn(br_x509_minimal_context *ctx, const void *dn, size_t len, unsigned char *out) | /* Hash a DN (from a trust anchor) into the provided buffer. This uses the DN hash implementation and context structure from the X.509 engine context. */
static void hash_dn(br_x509_minimal_context *ctx, const void *dn, size_t len, unsigned char *out) | {
ctx->dn_hash_impl->init(&ctx->dn_hash.vtable);
ctx->dn_hash_impl->update(&ctx->dn_hash.vtable, dn, len);
ctx->dn_hash_impl->out(&ctx->dn_hash.vtable, out);
} | RavenSystem/esp-homekit-devices | C++ | Other | 2,577 |
/* Enables or disables the specified NAND Memory Bank. */ | void XFMC_EnableNand(XFMC_Bank23_Module *Bank, FunctionalState Cmd) | /* Enables or disables the specified NAND Memory Bank. */
void XFMC_EnableNand(XFMC_Bank23_Module *Bank, FunctionalState Cmd) | {
assert_param(IS_XFMC_NAND_BANK(Bank));
assert_param(IS_FUNCTIONAL_STATE(Cmd));
if (Cmd != DISABLE)
{
Bank->CTRLx |= XFMC_NAND_BANK_ENABLE;
}
else
{
Bank->CTRLx &= ~XFMC_NAND_BANK_ENABLE;
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Check if the exact Entry find is present */ | Iperf_ListEntry* Iperf_present(iperf_sockaddr *find, Iperf_ListEntry *root) | /* Check if the exact Entry find is present */
Iperf_ListEntry* Iperf_present(iperf_sockaddr *find, Iperf_ListEntry *root) | {
if ( SockAddr_are_Equal( (sockaddr*)itr, (sockaddr*)find ) ) {
return itr;
}
itr = itr->next;
}
return NULL;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Wait for the last Manual ADC conversion done. */ | void ADC_WaitForManual(void) | /* Wait for the last Manual ADC conversion done. */
void ADC_WaitForManual(void) | {
while (ANA->ADCCTRL & ANA_ADCCTRL_MTRIG)
{
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* If the conversion results in an overflow or an underflow condition, then Result is set to UINT8_ERROR and RETURN_BUFFER_TOO_SMALL is returned. */ | RETURN_STATUS EFIAPI SafeInt16ToUint8(IN INT16 Operand, OUT UINT8 *Result) | /* If the conversion results in an overflow or an underflow condition, then Result is set to UINT8_ERROR and RETURN_BUFFER_TOO_SMALL is returned. */
RETURN_STATUS EFIAPI SafeInt16ToUint8(IN INT16 Operand, OUT UINT8 *Result) | {
RETURN_STATUS Status;
if (Result == NULL) {
return RETURN_INVALID_PARAMETER;
}
if ((Operand >= 0) && (Operand <= MAX_UINT8)) {
*Result = (UINT8)Operand;
Status = RETURN_SUCCESS;
} else {
*Result = UINT8_ERROR;
Status = RETURN_BUFFER_TOO_SMALL;
}
return Status;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Get the setup packet data buffer.
This function gets the data buffer for setup packet. */ | usb_status_t USB_DeviceGetClassReceiveBuffer(usb_device_handle handle, usb_setup_struct_t *setup, uint32_t *length, uint8_t **buffer) | /* Get the setup packet data buffer.
This function gets the data buffer for setup packet. */
usb_status_t USB_DeviceGetClassReceiveBuffer(usb_device_handle handle, usb_setup_struct_t *setup, uint32_t *length, uint8_t **buffer) | {
static uint8_t setupOut[8];
if ((NULL == buffer) || ((*length) > sizeof(setupOut)))
{
return kStatus_USB_InvalidRequest;
}
*buffer = setupOut;
return kStatus_USB_Success;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* This function aims to reset the status register to 0, please make sure the operation is appropriate. */ | void flash_reset_status(flash_t *obj) | /* This function aims to reset the status register to 0, please make sure the operation is appropriate. */
void flash_reset_status(flash_t *obj) | {
flash_set_status(obj, 0);
return;
} | alibaba/AliOS-Things | C++ | Apache License 2.0 | 4,536 |
/* Write extra bytes of information from a spare area, using the given scheme. */ | void nand_flash_spare_scheme_write_extra(const struct nand_flash_spare_scheme *scheme, uint8_t *spare, const void *extra, uint8_t size, uint8_t offset) | /* Write extra bytes of information from a spare area, using the given scheme. */
void nand_flash_spare_scheme_write_extra(const struct nand_flash_spare_scheme *scheme, uint8_t *spare, const void *extra, uint8_t size, uint8_t offset) | {
Assert((size + offset) < scheme->extra_byte_number);
uint32_t i;
for (i = 0; i < size; i++) {
spare[scheme->extra_bytes_positions[i + offset]]
= ((uint8_t *) extra)[i];
}
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* Enables generator and fault interrupts for a PWM module. */ | void PWMIntEnable(uint32_t ui32Base, uint32_t ui32GenFault) | /* Enables generator and fault interrupts for a PWM module. */
void PWMIntEnable(uint32_t ui32Base, uint32_t ui32GenFault) | {
ASSERT((ui32Base == PWM0_BASE) || (ui32Base == PWM1_BASE));
ASSERT((ui32GenFault & ~(PWM_INT_GEN_0 | PWM_INT_GEN_1 | PWM_INT_GEN_2 |
PWM_INT_GEN_3 | PWM_INT_FAULT0 | PWM_INT_FAULT1 |
PWM_INT_FAULT2 | PWM_INT_FAULT3)) == 0);
HWREG(ui32Base + PWM_O_INTEN) |= ui32GenFault;
} | feaser/openblt | C++ | GNU General Public License v3.0 | 601 |
/* param workMode The work mode of 24MHz crystal oscillator, please refer to clock_24MOsc_mode_t for details. */ | void CLOCK_OSC_SetOsc24MWorkMode(clock_24MOsc_mode_t workMode) | /* param workMode The work mode of 24MHz crystal oscillator, please refer to clock_24MOsc_mode_t for details. */
void CLOCK_OSC_SetOsc24MWorkMode(clock_24MOsc_mode_t workMode) | {
uint32_t tmp32;
tmp32 = ANADIG_OSC->OSC_24M_CTRL;
tmp32 &= ~(ANADIG_OSC_OSC_24M_CTRL_LP_EN_MASK | ANADIG_OSC_OSC_24M_CTRL_BYPASS_EN_MASK);
tmp32 |= (((uint32_t)workMode << ANADIG_OSC_OSC_24M_CTRL_BYPASS_EN_SHIFT) &
(ANADIG_OSC_OSC_24M_CTRL_LP_EN_MASK | ANADIG_OSC_OSC_24M_CTRL_BYPASS_EN_MASK));
ANADIG_OSC->OSC_24M_CTRL = tmp32;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Fetch a rational item from the file at offset off and return the value as a floating point number. */ | static float TIFFFetchRational(TIFF *, TIFFDirEntry *) | /* Fetch a rational item from the file at offset off and return the value as a floating point number. */
static float TIFFFetchRational(TIFF *, TIFFDirEntry *) | {
uint32 l[2];
float v;
return (!TIFFFetchData(tif, dir, (char *)l) ||
!cvtRational(tif, dir, l[0], l[1], &v) ? 1.0f : v);
} | alibaba/AliOS-Things | C++ | Apache License 2.0 | 4,536 |
/* This function implements postorder TNC traversal. The LNC is ignored. Returns the next element or NULL if @znode is already the last one. */ | struct ubifs_znode* ubifs_tnc_postorder_next(struct ubifs_znode *znode) | /* This function implements postorder TNC traversal. The LNC is ignored. Returns the next element or NULL if @znode is already the last one. */
struct ubifs_znode* ubifs_tnc_postorder_next(struct ubifs_znode *znode) | {
struct ubifs_znode *zn;
ubifs_assert(znode);
if (unlikely(!znode->parent))
return NULL;
zn = ubifs_tnc_find_child(znode->parent, znode->iip + 1);
if (!zn)
return znode->parent;
return ubifs_tnc_postorder_first(zn);
} | EmcraftSystems/u-boot | C++ | Other | 181 |
/* snp_start_tx - Start transmitter @port: Port to operate on */ | static void snp_start_tx(struct uart_port *port) | /* snp_start_tx - Start transmitter @port: Port to operate on */
static void snp_start_tx(struct uart_port *port) | {
if (sal_console_port.sc_ops->sal_wakeup_transmit)
sal_console_port.sc_ops->sal_wakeup_transmit(&sal_console_port,
TRANSMIT_BUFFERED);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* We never have any address translations to worry about, so this is just alloc/free. */ | void* dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp) | /* We never have any address translations to worry about, so this is just alloc/free. */
void* dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp) | {
void *ret;
gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
if (dev == NULL || (*dev->dma_mask < 0xffffffff))
gfp |= GFP_DMA;
ret = (void *)__get_free_pages(gfp, get_order(size));
if (ret != NULL) {
memset(ret, 0, size);
*dma_handle = virt_to_phys(ret);
}
return ret;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Returns: 0: transport successfully loaded -ENOENT: transport module not available */ | int xprt_load_transport(const char *transport_name) | /* Returns: 0: transport successfully loaded -ENOENT: transport module not available */
int xprt_load_transport(const char *transport_name) | {
struct xprt_class *t;
char module_name[sizeof t->name + 5];
int result;
result = 0;
spin_lock(&xprt_list_lock);
list_for_each_entry(t, &xprt_list, list) {
if (strcmp(t->name, transport_name) == 0) {
spin_unlock(&xprt_list_lock);
goto out;
}
}
spin_unlock(&xprt_list_lock);
strcpy(module_name, "xprt");
strncat(module_name, transport_name, sizeof t->name);
result = request_module(module_name);
out:
return result;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* If Sha512Context is NULL, then return FALSE. If NewSha512Context is NULL, then return FALSE. If this interface is not supported, then return FALSE. */ | BOOLEAN EFIAPI CryptoServiceSha512Duplicate(IN CONST VOID *Sha512Context, OUT VOID *NewSha512Context) | /* If Sha512Context is NULL, then return FALSE. If NewSha512Context is NULL, then return FALSE. If this interface is not supported, then return FALSE. */
BOOLEAN EFIAPI CryptoServiceSha512Duplicate(IN CONST VOID *Sha512Context, OUT VOID *NewSha512Context) | {
return CALL_BASECRYPTLIB (Sha512.Services.Duplicate, Sha512Duplicate, (Sha512Context, NewSha512Context), FALSE);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* This internal API fills the pressure oversampling settings provided by the user in the data buffer so as to write in the sensor. */ | static void fill_osr_press_settings(uint8_t *reg_data, const struct bme280_settings *settings) | /* This internal API fills the pressure oversampling settings provided by the user in the data buffer so as to write in the sensor. */
static void fill_osr_press_settings(uint8_t *reg_data, const struct bme280_settings *settings) | {
*reg_data = BME280_SET_BITS(*reg_data, BME280_CTRL_PRESS, settings->osr_p);
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* crc32init_be() - allocate and initialize BE table data */ | static void crc32init_be(void) | /* crc32init_be() - allocate and initialize BE table data */
static void crc32init_be(void) | {
unsigned i, j;
uint32_t crc = 0x80000000;
crc32table_be[0] = 0;
for (i = 1; i < BE_TABLE_SIZE; i <<= 1) {
crc = (crc << 1) ^ ((crc & 0x80000000) ? CRCPOLY_BE : 0);
for (j = 0; j < i; j++)
crc32table_be[i + j] = crc ^ crc32table_be[j];
}
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Get BurstCount by reading the burstCount field of a TIS register in the time of default TIS_TIMEOUT_D. */ | EFI_STATUS EFIAPI TisPcReadBurstCount(IN TIS_PC_REGISTERS_PTR TisReg, OUT UINT16 *BurstCount) | /* Get BurstCount by reading the burstCount field of a TIS register in the time of default TIS_TIMEOUT_D. */
EFI_STATUS EFIAPI TisPcReadBurstCount(IN TIS_PC_REGISTERS_PTR TisReg, OUT UINT16 *BurstCount) | {
UINT32 WaitTime;
UINT8 DataByte0;
UINT8 DataByte1;
if ((BurstCount == NULL) || (TisReg == NULL)) {
return EFI_INVALID_PARAMETER;
}
WaitTime = 0;
do {
DataByte0 = MmioRead8 ((UINTN)&TisReg->BurstCount);
DataByte1 = MmioRead8 ((UINTN)&TisReg->BurstCount + 1);
*BurstCount = (UINT16)((DataByte1 << 8) + DataByte0);
if (*BurstCount != 0) {
return EFI_SUCCESS;
}
MicroSecondDelay (30);
WaitTime += 30;
} while (WaitTime < TIS_TIMEOUT_D);
return EFI_TIMEOUT;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* @handle: handle of the loaded image @systable: system table */ | static int setup(const efi_handle_t handle, const struct efi_system_table *systable) | /* @handle: handle of the loaded image @systable: system table */
static int setup(const efi_handle_t handle, const struct efi_system_table *systable) | {
efi_status_t ret;
boottime = systable->boottime;
notification_context.status = EFI_SUCCESS;
notification_context.timer_ticks = 0;
ret = boottime->create_event(EVT_TIMER | EVT_NOTIFY_SIGNAL,
TPL_CALLBACK, notify,
(void *)¬ification_context,
&event_notify);
if (ret != EFI_SUCCESS) {
efi_st_error("could not create event\n");
return EFI_ST_FAILURE;
}
ret = boottime->create_event(EVT_TIMER | EVT_NOTIFY_WAIT,
TPL_CALLBACK, notify, NULL, &event_wait);
if (ret != EFI_SUCCESS) {
efi_st_error("could not create event\n");
return EFI_ST_FAILURE;
}
return EFI_ST_SUCCESS;
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* retval #kStatus_Success Slave transfers were successfully started. retval #kStatus_LPI2C_Busy Slave transfers have already been started on this handle. */ | status_t LPI2C_SlaveTransferNonBlocking(LPI2C_Type *base, lpi2c_slave_handle_t *handle, uint32_t eventMask) | /* retval #kStatus_Success Slave transfers were successfully started. retval #kStatus_LPI2C_Busy Slave transfers have already been started on this handle. */
status_t LPI2C_SlaveTransferNonBlocking(LPI2C_Type *base, lpi2c_slave_handle_t *handle, uint32_t eventMask) | {
uint32_t status;
assert(handle);
if (handle->isBusy)
{
return kStatus_LPI2C_Busy;
}
status = LPI2C_SlaveGetStatusFlags(base);
if ((status & kLPI2C_SlaveBusBusyFlag) && (!(status & kLPI2C_SlaveBusyFlag)))
{
return kStatus_LPI2C_Busy;
}
LPI2C_SlaveDisableInterrupts(base, kSlaveIrqFlags);
memset(&handle->transfer, 0, sizeof(handle->transfer));
handle->isBusy = true;
handle->eventMask = eventMask | kLPI2C_SlaveTransmitEvent | kLPI2C_SlaveReceiveEvent;
base->STAR = 0;
LPI2C_SlaveClearStatusFlags(base, kSlaveClearFlags);
LPI2C_SlaveEnableInterrupts(base, kSlaveIrqFlags);
return kStatus_Success;
} | nanoframework/nf-interpreter | C++ | MIT License | 293 |
/* Converts the ascii character of the string from uppercase to lowercase. This is a internal function. */ | VOID EFIAPI AsciiHiiToLower(IN CHAR8 *ConfigString) | /* Converts the ascii character of the string from uppercase to lowercase. This is a internal function. */
VOID EFIAPI AsciiHiiToLower(IN CHAR8 *ConfigString) | {
ASSERT (ConfigString != NULL);
for ( ; *ConfigString != '\0'; ConfigString++) {
if ((*ConfigString >= 'A') && (*ConfigString <= 'Z')) {
*ConfigString = (CHAR8)(*ConfigString - 'A' + 'a');
}
}
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Initialize Key Convention Table by using default keyboard layout. */ | EFI_STATUS InstallDefaultKeyboardLayout(IN OUT USB_KB_DEV *UsbKeyboardDevice) | /* Initialize Key Convention Table by using default keyboard layout. */
EFI_STATUS InstallDefaultKeyboardLayout(IN OUT USB_KB_DEV *UsbKeyboardDevice) | {
EFI_STATUS Status;
EFI_HII_DATABASE_PROTOCOL *HiiDatabase;
EFI_HII_HANDLE HiiHandle;
Status = gBS->LocateProtocol (
&gEfiHiiDatabaseProtocolGuid,
NULL,
(VOID **)&HiiDatabase
);
if (EFI_ERROR (Status)) {
return Status;
}
HiiHandle = HiiAddPackages (
&gUsbKeyboardLayoutPackageGuid,
UsbKeyboardDevice->ControllerHandle,
&mUsbKeyboardLayoutBin,
NULL
);
if (HiiHandle == NULL) {
return EFI_OUT_OF_RESOURCES;
}
Status = HiiDatabase->SetKeyboardLayout (HiiDatabase, &gUsbKeyboardLayoutKeyGuid);
return Status;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Enables or disables the Low Speed APB (APB1) peripheral clock. */ | void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) | /* Enables or disables the Low Speed APB (APB1) peripheral clock. */
void RCC_APB1PeriphClockCmd(uint32_t RCC_APB1Periph, FunctionalState NewState) | {
assert_param(IS_RCC_APB1_PERIPH(RCC_APB1Periph));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
RCC->APB1ENR |= RCC_APB1Periph;
}
else
{
RCC->APB1ENR &= ~RCC_APB1Periph;
}
} | apopple/Pandaboard-FreeRTOS | C++ | null | 25 |
/* Create a key for thread-specific data.
See IEEE 1003.1 */ | int pthread_key_create(pthread_key_t *key, void(*destructor)(void *)) | /* Create a key for thread-specific data.
See IEEE 1003.1 */
int pthread_key_create(pthread_key_t *key, void(*destructor)(void *)) | {
pthread_key_obj *new_key;
*key = PTHREAD_KEY_INITIALIZER;
new_key = to_posix_key(key);
if (new_key == NULL) {
return ENOMEM;
}
sys_slist_init(&(new_key->key_data_l));
new_key->destructor = destructor;
LOG_DBG("Initialized key %p (%x)", new_key, *key);
return 0;
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* Return MTRR alignment requirement for base address and size. */ | UINT32 CheckMtrrAlignment(IN UINT64 BaseAddress, IN UINT64 Size) | /* Return MTRR alignment requirement for base address and size. */
UINT32 CheckMtrrAlignment(IN UINT64 BaseAddress, IN UINT64 Size) | {
UINT32 ShiftedBase;
UINT32 ShiftedSize;
ShiftedBase = (UINT32)RShiftU64 (BaseAddress, 12);
ShiftedSize = (UINT32)RShiftU64 (Size, 12);
return ShiftedBase % ShiftedSize;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* All attempts to jump straight from board_init_f() to board_init_r() have failed, hence this special 'bootstrap' function. */ | void ram_bootstrap(void *) | /* All attempts to jump straight from board_init_f() to board_init_r() have failed, hence this special 'bootstrap' function. */
void ram_bootstrap(void *) | {
static gd_t gd_data;
__asm__ __volatile__("": : :"memory");
board_init_r(&gd_data, (ulong)ram_start);
} | EmcraftSystems/u-boot | C++ | Other | 181 |
/* param base Pointer to FLEXIO_I2C_Type structure. param mask Interrupt source. */ | void FLEXIO_I2C_MasterDisableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask) | /* param base Pointer to FLEXIO_I2C_Type structure. param mask Interrupt source. */
void FLEXIO_I2C_MasterDisableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask) | {
if (mask & kFLEXIO_I2C_TxEmptyInterruptEnable)
{
FLEXIO_DisableShifterStatusInterrupts(base->flexioBase, 1U << base->shifterIndex[0]);
}
if (mask & kFLEXIO_I2C_RxFullInterruptEnable)
{
FLEXIO_DisableShifterStatusInterrupts(base->flexioBase, 1U << base->shifterIndex[1]);
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* This function is the entry point of MM Status Code Driver. */ | EFI_STATUS StatusCodeHandlerCommonEntry(VOID) | /* This function is the entry point of MM Status Code Driver. */
EFI_STATUS StatusCodeHandlerCommonEntry(VOID) | {
EFI_STATUS Status;
Status = gMmst->MmLocateProtocol (
&gEfiMmRscHandlerProtocolGuid,
NULL,
(VOID **)&mRscHandlerProtocol
);
ASSERT_EFI_ERROR (Status);
InitializationDispatcherWorker ();
if (PcdGetBool (PcdStatusCodeUseSerial)) {
mRscHandlerProtocol->Register (SerialStatusCodeReportWorker);
}
if (PcdGetBool (PcdStatusCodeUseMemory)) {
mRscHandlerProtocol->Register (MemoryStatusCodeReportWorker);
}
return EFI_SUCCESS;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* param base MCAN peripheral base address. param sourceClock_Hz Source Clock in Hz. param baudRate_Bps Baud Rate in Bps. return kStatus_Success - Set CAN baud rate (only has Nominal phase) successfully. */ | status_t MCAN_SetBaudRate(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t baudRate_Bps) | /* param base MCAN peripheral base address. param sourceClock_Hz Source Clock in Hz. param baudRate_Bps Baud Rate in Bps. return kStatus_Success - Set CAN baud rate (only has Nominal phase) successfully. */
status_t MCAN_SetBaudRate(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t baudRate_Bps) | {
mcan_timing_config_t timingCfg;
if (MCAN_CalculateImprovedTimingValues(baudRate_Bps, sourceClock_Hz, &timingCfg))
{
base->CCCR |= CAN_CCCR_INIT_MASK;
while (0U == (base->CCCR & CAN_CCCR_INIT_MASK))
{
}
base->CCCR |= CAN_CCCR_CCE_MASK;
MCAN_SetArbitrationTimingConfig(base, &timingCfg);
MCAN_EnterNormalMode(base);
return kStatus_Success;
}
else
{
return kStatus_Fail;
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* This function is executed in case of error occurrence. */ | void Error_Handler(void) | /* This function is executed in case of error occurrence. */
void Error_Handler(void) | {
BSP_LED_On(LED5);
while(1)
{
}
} | STMicroelectronics/STM32CubeF4 | C++ | Other | 789 |
/* Toggles the LED at a fixed time interval. */ | void LedToggle(void) | /* Toggles the LED at a fixed time interval. */
void LedToggle(void) | {
static unsigned char led_toggle_state = 0;
static unsigned long timer_counter_last = 0;
unsigned long timer_counter_now;
timer_counter_now = TimerGet();
if ( (timer_counter_now - timer_counter_last) < LED_TOGGLE_MS)
{
return;
}
if (led_toggle_state == 0)
{
led_toggle_state = 1;
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, GPIO_PIN_SET);
}
else
{
led_toggle_state = 0;
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_5, GPIO_PIN_RESET);
}
timer_counter_last = timer_counter_now;
} | feaser/openblt | C++ | GNU General Public License v3.0 | 601 |
/* Sets the UART hardware flow control mode to be used. */ | void UARTFlowControlSet(uint32_t ui32Base, uint32_t ui32Mode) | /* Sets the UART hardware flow control mode to be used. */
void UARTFlowControlSet(uint32_t ui32Base, uint32_t ui32Mode) | {
ASSERT(_UARTBaseValid(ui32Base));
ASSERT((ui32Mode & ~(UART_FLOWCONTROL_TX | UART_FLOWCONTROL_RX)) == 0);
HWREG(ui32Base + UART_O_CTL) = ((HWREG(ui32Base + UART_O_CTL) &
~(UART_FLOWCONTROL_TX |
UART_FLOWCONTROL_RX)) | ui32Mode);
} | feaser/openblt | C++ | GNU General Public License v3.0 | 601 |
/* Brief This function handles RCC interrupt request and switch the system clock to HSE. Retval None */ | void RCC_IRQHandler(void) | /* Brief This function handles RCC interrupt request and switch the system clock to HSE. Retval None */
void RCC_IRQHandler(void) | {
if (LL_RCC_IsActiveFlag_HSERDY() != 0)
{
LL_RCC_ClearFlag_HSERDY();
HSEReady_Callback();
}
} | STMicroelectronics/STM32CubeF4 | C++ | Other | 789 |
/* If an error would be returned, then the function will ASSERT(). */ | RETURN_STATUS EFIAPI AsciiValueToStringS(IN OUT CHAR8 *Buffer, IN UINTN BufferSize, IN UINTN Flags, IN INT64 Value, IN UINTN Width) | /* If an error would be returned, then the function will ASSERT(). */
RETURN_STATUS EFIAPI AsciiValueToStringS(IN OUT CHAR8 *Buffer, IN UINTN BufferSize, IN UINTN Flags, IN INT64 Value, IN UINTN Width) | {
return mPrint2SProtocol->AsciiValueToStringS (Buffer, BufferSize, Flags, Value, Width);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Set the slave select pins of the specified SPI port.
The */ | void SPISSSet(unsigned long ulBase, unsigned long ulSlaveSel) | /* Set the slave select pins of the specified SPI port.
The */
void SPISSSet(unsigned long ulBase, unsigned long ulSlaveSel) | {
xASSERT(ulBase == SPI0_BASE);
xASSERT((ulSlaveSel == SPI_SS_NONE) || (ulSlaveSel == SPI_SS0));
xHWREG(ulBase + SPI_SSR) &= ~0x00000001;
xHWREG(ulBase + SPI_SSR) |= ulSlaveSel;
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* Initialize DMA repeat mode config structure. Fill each pstcDmaInit with default value. */ | int32_t DMA_RepeatStructInit(stc_dma_repeat_init_t *pstcDmaRepeatInit) | /* Initialize DMA repeat mode config structure. Fill each pstcDmaInit with default value. */
int32_t DMA_RepeatStructInit(stc_dma_repeat_init_t *pstcDmaRepeatInit) | {
int32_t i32Ret = LL_OK;
if (NULL == pstcDmaRepeatInit) {
i32Ret = LL_ERR_INVD_PARAM;
} else {
pstcDmaRepeatInit->u32Mode = DMA_RPT_NONE;
pstcDmaRepeatInit->u32SrcCount = 0x00UL;
pstcDmaRepeatInit->u32DestCount = 0x00UL;
}
return i32Ret;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Check whether the start address of buffer is within any of the SMRAM ranges. */ | BOOLEAN EFIAPI BufferInSmram(IN VOID *Buffer) | /* Check whether the start address of buffer is within any of the SMRAM ranges. */
BOOLEAN EFIAPI BufferInSmram(IN VOID *Buffer) | {
UINTN Index;
for (Index = 0; Index < mSmmCoreMemoryAllocLibSmramRangeCount; Index++) {
if (((EFI_PHYSICAL_ADDRESS)(UINTN)Buffer >= mSmmCoreMemoryAllocLibSmramRanges[Index].CpuStart) &&
((EFI_PHYSICAL_ADDRESS)(UINTN)Buffer < (mSmmCoreMemoryAllocLibSmramRanges[Index].CpuStart + mSmmCoreMemoryAllocLibSmramRanges[Index].PhysicalSize)))
{
return TRUE;
}
}
return FALSE;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* param base TEMPMON base pointer return current temperature with degrees Celsius. */ | float TEMPMON_GetCurrentTemperature(TEMPMON_Type *base) | /* param base TEMPMON base pointer return current temperature with degrees Celsius. */
float TEMPMON_GetCurrentTemperature(TEMPMON_Type *base) | {
assert(NULL != base);
uint32_t nmeas;
float tmeas;
while (0U == (base->TEMPSENSE0 & TEMPMON_TEMPSENSE0_FINISHED_MASK))
{
}
nmeas = (base->TEMPSENSE0 & TEMPMON_TEMPSENSE0_TEMP_CNT_MASK) >> TEMPMON_TEMPSENSE0_TEMP_CNT_SHIFT;
tmeas = (float)s_hotTemp - (((float)nmeas - (float)s_hotCount) * (s_hotT_ROOM / (float)s_roomC_hotC));
return tmeas;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Fills the given LCD buffer with a particular color. Only works in 24-bits packed mode for now. */ | void LCDD_Fill(void *pBuffer, unsigned int color) | /* Fills the given LCD buffer with a particular color. Only works in 24-bits packed mode for now. */
void LCDD_Fill(void *pBuffer, unsigned int color) | {
unsigned int i;
unsigned short color16 = RGB24ToRGB16(color);
LCD_SetCursor((void *)BOARD_LCD_BASE, 0, 0);
LCD_WriteRAM_Prepare((void *)BOARD_LCD_BASE);
for (i = 0; i < (BOARD_LCD_WIDTH * BOARD_LCD_HEIGHT); i++) {
LCD_WriteRAM((void *)BOARD_LCD_BASE, color16);
}
} | apopple/Pandaboard-FreeRTOS | C++ | null | 25 |
/* Sets the seed for the global random number generator, which is used by the g_random_* functions, to @seed. */ | void g_random_set_seed(guint32 seed) | /* Sets the seed for the global random number generator, which is used by the g_random_* functions, to @seed. */
void g_random_set_seed(guint32 seed) | {
G_LOCK (global_random);
g_rand_set_seed (get_global_random (), seed);
G_UNLOCK (global_random);
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* If the conversion results in an overflow or an underflow condition, then Result is set to CHAR8_ERROR and RETURN_BUFFER_TOO_SMALL is returned. */ | RETURN_STATUS EFIAPI SafeUint8ToChar8(IN UINT8 Operand, OUT CHAR8 *Result) | /* If the conversion results in an overflow or an underflow condition, then Result is set to CHAR8_ERROR and RETURN_BUFFER_TOO_SMALL is returned. */
RETURN_STATUS EFIAPI SafeUint8ToChar8(IN UINT8 Operand, OUT CHAR8 *Result) | {
RETURN_STATUS Status;
if (Result == NULL) {
return RETURN_INVALID_PARAMETER;
}
if (Operand <= MAX_INT8) {
*Result = (CHAR8)Operand;
Status = RETURN_SUCCESS;
} else {
*Result = CHAR8_ERROR;
Status = RETURN_BUFFER_TOO_SMALL;
}
return Status;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* param base CSI peripheral base address. param mask The interrupts to disable, pass in as OR'ed value of ref _csi_interrupt_enable. */ | void CSI_DisableInterrupts(CSI_Type *base, uint32_t mask) | /* param base CSI peripheral base address. param mask The interrupts to disable, pass in as OR'ed value of ref _csi_interrupt_enable. */
void CSI_DisableInterrupts(CSI_Type *base, uint32_t mask) | {
CSI_REG_CR1(base) &= ~(mask & CSI_CR1_INT_EN_MASK);
CSI_REG_CR3(base) &= ~(mask & CSI_CR3_INT_EN_MASK);
CSI_REG_CR18(base) &= ~((mask & CSI_CR18_INT_EN_MASK) >> 6U);
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* The system picks an ephemeral port and choose an address set equivalent to binding with a wildcard address. One of those addresses will be the primary address for the association. This automatically enables the multihoming capability of SCTP. */ | static int sctp_autobind(struct sock *sk) | /* The system picks an ephemeral port and choose an address set equivalent to binding with a wildcard address. One of those addresses will be the primary address for the association. This automatically enables the multihoming capability of SCTP. */
static int sctp_autobind(struct sock *sk) | {
union sctp_addr autoaddr;
struct sctp_af *af;
__be16 port;
af = sctp_sk(sk)->pf->af;
port = htons(inet_sk(sk)->inet_num);
af->inaddr_any(&autoaddr, port);
return sctp_do_bind(sk, &autoaddr, af->sockaddr_len);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* allocate several continuous blocks of free memory from PSRAM. */ | void* Psram_reserve_calloc(int num, int size) | /* allocate several continuous blocks of free memory from PSRAM. */
void* Psram_reserve_calloc(int num, int size) | {
void *mem;
if ((mem = Psram_reserve_malloc(num * size)))
memset(mem, 0, num * size);
return mem;
} | alibaba/AliOS-Things | C++ | Apache License 2.0 | 4,536 |
/* This register is only modifiable by task running at secure-privilege level. */ | status_t PUF_SetCtxMask(PUF_CTRL_Type *base, uint32_t appCtxMask) | /* This register is only modifiable by task running at secure-privilege level. */
status_t PUF_SetCtxMask(PUF_CTRL_Type *base, uint32_t appCtxMask) | {
base->APP_CTX_MASK = appCtxMask;
return kStatus_Success;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* If the system is going to use the SA-1111 DMA engines, set up the memory bus request/grant pins. */ | void __devinit sa1110_mb_enable(void) | /* If the system is going to use the SA-1111 DMA engines, set up the memory bus request/grant pins. */
void __devinit sa1110_mb_enable(void) | {
unsigned long flags;
local_irq_save(flags);
PGSR &= ~GPIO_MBGNT;
GPCR = GPIO_MBGNT;
GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT;
GAFR |= (GPIO_MBGNT | GPIO_MBREQ);
TUCR |= TUCR_MR;
local_irq_restore(flags);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Determines whether the UART transmitter is busy or not. */ | xtBoolean UARTBusy(unsigned long ulBase) | /* Determines whether the UART transmitter is busy or not. */
xtBoolean UARTBusy(unsigned long ulBase) | {
xASSERT(UARTBaseValid(ulBase));
return xfalse;
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* RETURNS: Pointer to the allocated pcpu_alloc_info on success, NULL on failure. */ | struct pcpu_alloc_info* __init pcpu_alloc_alloc_info(int nr_groups, int nr_units) | /* RETURNS: Pointer to the allocated pcpu_alloc_info on success, NULL on failure. */
struct pcpu_alloc_info* __init pcpu_alloc_alloc_info(int nr_groups, int nr_units) | {
struct pcpu_alloc_info *ai;
size_t base_size, ai_size;
void *ptr;
int unit;
base_size = ALIGN(sizeof(*ai) + nr_groups * sizeof(ai->groups[0]),
__alignof__(ai->groups[0].cpu_map[0]));
ai_size = base_size + nr_units * sizeof(ai->groups[0].cpu_map[0]);
ptr = alloc_bootmem_nopanic(PFN_ALIGN(ai_size));
if (!ptr)
return NULL;
ai = ptr;
ptr += base_size;
ai->groups[0].cpu_map = ptr;
for (unit = 0; unit < nr_units; unit++)
ai->groups[0].cpu_map[unit] = NR_CPUS;
ai->nr_groups = nr_groups;
ai->__ai_size = PFN_ALIGN(ai_size);
return ai;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Deselect given device on the SPI bus.
Calls board chip deselect. */ | void usart_spi_deselect_device(USART_t *usart, struct usart_spi_device *device) | /* Deselect given device on the SPI bus.
Calls board chip deselect. */
void usart_spi_deselect_device(USART_t *usart, struct usart_spi_device *device) | {
ioport_set_pin_high(device->id);
} | memfault/zero-to-main | C++ | null | 200 |
/* If the conversion results in an overflow or an underflow condition, then Result is set to UINTN_ERROR and RETURN_BUFFER_TOO_SMALL is returned. */ | RETURN_STATUS EFIAPI SafeInt32ToUintn(IN INT32 Operand, OUT UINTN *Result) | /* If the conversion results in an overflow or an underflow condition, then Result is set to UINTN_ERROR and RETURN_BUFFER_TOO_SMALL is returned. */
RETURN_STATUS EFIAPI SafeInt32ToUintn(IN INT32 Operand, OUT UINTN *Result) | {
if (sizeof (UINTN) == sizeof (UINT32)) {
return SafeInt32ToUint32 (Operand, (UINT32 *)Result);
}
return SafeInt32ToUint64 (Operand, (UINT64 *)Result);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Deinitializes the PWR peripheral registers to their default reset values. */ | void PWR_DeInit(void) | /* Deinitializes the PWR peripheral registers to their default reset values. */
void PWR_DeInit(void) | {
exRCC_APB1PeriphReset(RCC_APB1ENR_PWR);
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Routine to get the next Handle, when you are searching for register protocol notifies. */ | IHANDLE* MmGetNextLocateByRegisterNotify(IN OUT LOCATE_POSITION *Position, OUT VOID **Interface) | /* Routine to get the next Handle, when you are searching for register protocol notifies. */
IHANDLE* MmGetNextLocateByRegisterNotify(IN OUT LOCATE_POSITION *Position, OUT VOID **Interface) | {
IHANDLE *Handle;
PROTOCOL_NOTIFY *ProtNotify;
PROTOCOL_INTERFACE *Prot;
LIST_ENTRY *Link;
Handle = NULL;
*Interface = NULL;
ProtNotify = Position->SearchKey;
if (ProtNotify != NULL) {
ASSERT (ProtNotify->Signature == PROTOCOL_NOTIFY_SIGNATURE);
Position->SearchKey = NULL;
Link = ProtNotify->Position->ForwardLink;
if (Link != &ProtNotify->Protocol->Protocols) {
Prot = CR (Link, PROTOCOL_INTERFACE, ByProtocol, PROTOCOL_INTERFACE_SIGNATURE);
Handle = Prot->Handle;
*Interface = Prot->Interface;
}
}
return Handle;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Sets the value of the RTC sub second match register. */ | void HibernateRTCSSMatchSet(uint32_t ui32Match, uint32_t ui32Value) | /* Sets the value of the RTC sub second match register. */
void HibernateRTCSSMatchSet(uint32_t ui32Match, uint32_t ui32Value) | {
ASSERT(ui32Match == 0);
HWREG(HIB_RTCSS) = ui32Value << HIB_RTCSS_RTCSSM_S;
_HibernateWriteComplete();
} | feaser/openblt | C++ | GNU General Public License v3.0 | 601 |
/* If 16-bit MMIO register operations are not supported, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */ | UINT16 EFIAPI S3MmioBitFieldAndThenOr16(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData, IN UINT16 OrData) | /* If 16-bit MMIO register operations are not supported, then ASSERT(). If StartBit is greater than 15, then ASSERT(). If EndBit is greater than 15, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */
UINT16 EFIAPI S3MmioBitFieldAndThenOr16(IN UINTN Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT16 AndData, IN UINT16 OrData) | {
return InternalSaveMmioWrite16ValueToBootScript (Address, MmioBitFieldAndThenOr16 (Address, StartBit, EndBit, AndData, OrData));
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Sets the interrupt trigger polarity.
Sets whether the interrupt is triggered by a high or low level/edge. */ | void gpio_int_pol(uint16_t gpios, enum gpio_pol pol) | /* Sets the interrupt trigger polarity.
Sets whether the interrupt is triggered by a high or low level/edge. */
void gpio_int_pol(uint16_t gpios, enum gpio_pol pol) | {
if (pol) {
GPIO_INTPOLARITY_A |= gpios;
} else {
GPIO_INTPOLARITY_A &= ~gpios;
}
} | libopencm3/libopencm3 | C++ | GNU General Public License v3.0 | 2,931 |
/* Stop the PWM of the PWM module. This function is to stop the PWM of the PWM module. */ | void xPWMStop(unsigned long ulBase, unsigned long ulChannel) | /* Stop the PWM of the PWM module. This function is to stop the PWM of the PWM module. */
void xPWMStop(unsigned long ulBase, unsigned long ulChannel) | {
(void) ulChannel;
xASSERT(ulBase == xPWM1_BASE);
xASSERT( (ulChannel == xPWM_CHANNEL0) ||
(ulChannel == xPWM_CHANNEL1) ||
(ulChannel == xPWM_CHANNEL2) ||
(ulChannel == xPWM_CHANNEL3) ||
(ulChannel == xPWM_CHANNEL4) ||
(ulChannel == xPWM_CHANNEL5) ||
(ulChannel == xPWM_CHANNEL6) );
xHWREG(ulBase + PWM_TCR) = TCR_PWM_EN;
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* Try to post the "msg" to the mailbox */ | err_t sys_mbox_trypost(sys_mbox_t *mbox, void *msg) | /* Try to post the "msg" to the mailbox */
err_t sys_mbox_trypost(sys_mbox_t *mbox, void *msg) | {
if (rt_mb_send(*mbox, (rt_uint32_t)msg) == RT_EOK)
return ERR_OK;
return ERR_MEM;
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* Retrieves the descriptor ring associated with a device. */ | int dma_get_device_descriptor_ring(DMA_Device_t device, DMA_DescriptorRing_t *ring) | /* Retrieves the descriptor ring associated with a device. */
int dma_get_device_descriptor_ring(DMA_Device_t device, DMA_DescriptorRing_t *ring) | {
DMA_DeviceAttribute_t *devAttr;
memset(ring, 0, sizeof(*ring));
if (!IsDeviceValid(device)) {
return -ENODEV;
}
devAttr = &DMA_gDeviceAttribute[device];
*ring = devAttr->ring;
return 0;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
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