docstring
stringlengths 22
576
| signature
stringlengths 9
317
| prompt
stringlengths 57
886
| code
stringlengths 20
1.36k
| repository
stringclasses 49
values | language
stringclasses 2
values | license
stringclasses 9
values | stars
int64 15
21.3k
|
|---|---|---|---|---|---|---|---|
/* Switch master clock source selection to PLLA clock. */
|
uint32_t pmc_switch_mck_to_pllack(uint32_t ul_pres)
|
/* Switch master clock source selection to PLLA clock. */
uint32_t pmc_switch_mck_to_pllack(uint32_t ul_pres)
|
{
uint32_t ul_timeout;
PMC->PMC_MCKR = (PMC->PMC_MCKR & (~PMC_MCKR_PRES_Msk)) | ul_pres;
for (ul_timeout = PMC_TIMEOUT; !(PMC->PMC_SR & PMC_SR_MCKRDY);
--ul_timeout) {
if (ul_timeout == 0) {
return 1;
}
}
PMC->PMC_MCKR = (PMC->PMC_MCKR & (~PMC_MCKR_CSS_Msk)) |
PMC_MCKR_CSS_PLLA_CLK;
for (ul_timeout = PMC_TIMEOUT; !(PMC->PMC_SR & PMC_SR_MCKRDY);
--ul_timeout) {
if (ul_timeout == 0) {
return 1;
}
}
return 0;
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* LSM hook implementation that checks and/or returns the xfrm sid for the incoming packet. */
|
int selinux_xfrm_decode_session(struct sk_buff *skb, u32 *sid, int ckall)
|
/* LSM hook implementation that checks and/or returns the xfrm sid for the incoming packet. */
int selinux_xfrm_decode_session(struct sk_buff *skb, u32 *sid, int ckall)
|
{
struct sec_path *sp;
*sid = SECSID_NULL;
if (skb == NULL)
return 0;
sp = skb->sp;
if (sp) {
int i, sid_set = 0;
for (i = sp->len-1; i >= 0; i--) {
struct xfrm_state *x = sp->xvec[i];
if (selinux_authorizable_xfrm(x)) {
struct xfrm_sec_ctx *ctx = x->security;
if (!sid_set) {
*sid = ctx->ctx_sid;
sid_set = 1;
if (!ckall)
break;
} else if (*sid != ctx->ctx_sid)
return -EINVAL;
}
}
}
return 0;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Read from a single register. NOTE: The memory and FIFO read/write registers cannot be accessed. */
|
int mpu_read_reg(unsigned char reg, unsigned char *data)
|
/* Read from a single register. NOTE: The memory and FIFO read/write registers cannot be accessed. */
int mpu_read_reg(unsigned char reg, unsigned char *data)
|
{
if (reg == st.reg->fifo_r_w || reg == st.reg->mem_r_w)
return -1;
if (reg >= st.hw->num_reg)
return -1;
return i2c_read(st.hw->addr, reg, 1, data);
}
|
Luos-io/luos_engine
|
C++
|
MIT License
| 496
|
/* Function: void mqe_free(MsgQueue_t *msgq, struct msgqueue_entry *mq) Purpose : free a message queue entry Params : msgq - message queue to free entry from mq - message queue entry to free */
|
static void mqe_free(MsgQueue_t *msgq, struct msgqueue_entry *mq)
|
/* Function: void mqe_free(MsgQueue_t *msgq, struct msgqueue_entry *mq) Purpose : free a message queue entry Params : msgq - message queue to free entry from mq - message queue entry to free */
static void mqe_free(MsgQueue_t *msgq, struct msgqueue_entry *mq)
|
{
if (mq) {
mq->next = msgq->free;
msgq->free = mq;
}
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Called when compression is completed to free memory previously allocated. */
|
VOID FreeMemory()
|
/* Called when compression is completed to free memory previously allocated. */
VOID FreeMemory()
|
{
if (mText) {
free (mText);
}
if (mLevel) {
free (mLevel);
}
if (mChildCount) {
free (mChildCount);
}
if (mPosition) {
free (mPosition);
}
if (mParent) {
free (mParent);
}
if (mPrev) {
free (mPrev);
}
if (mNext) {
free (mNext);
}
if (mBuf) {
free (mBuf);
}
return;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Returns the new gain, which may be lower than the old gain. */
|
static int ad1843_set_gain(lithium_t *lith, const ad1843_gain_t *gp, int newval)
|
/* Returns the new gain, which may be lower than the old gain. */
static int ad1843_set_gain(lithium_t *lith, const ad1843_gain_t *gp, int newval)
|
{
unsigned short mask = (1 << gp->lfield->nbits) - 1;
int lg = newval >> 0 & 0xFF;
int rg = newval >> 8;
if (lg < 0 || lg > 100 || rg < 0 || rg > 100)
return -EINVAL;
lg = (lg * mask + (mask >> 1)) / 100;
rg = (rg * mask + (mask >> 1)) / 100;
if (gp->negative) {
lg = mask - lg;
rg = mask - rg;
}
ad1843_write_multi(lith, 2, gp->lfield, lg, gp->rfield, rg);
return ad1843_get_gain(lith, gp);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Returns the firmware usable variable MTRR count for the CPU. */
|
UINT32 EFIAPI GetFirmwareVariableMtrrCount(VOID)
|
/* Returns the firmware usable variable MTRR count for the CPU. */
UINT32 EFIAPI GetFirmwareVariableMtrrCount(VOID)
|
{
if (!IsMtrrSupported ()) {
return 0;
}
return GetFirmwareVariableMtrrCountWorker ();
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Unloads the Ixxat VCI DLL and resets the API function pointers. */
|
static void IxxatVciLibUnloadDll(void)
|
/* Unloads the Ixxat VCI DLL and resets the API function pointers. */
static void IxxatVciLibUnloadDll(void)
|
{
ixxatVciLibFuncVciEnumDeviceOpenPtr = NULL;
ixxatVciLibFuncVciEnumDeviceClosePtr = NULL;
ixxatVciLibFuncVciEnumDeviceNextPtr = NULL;
if (ixxatVciDllHandle != NULL)
{
(void)FreeLibrary(ixxatVciDllHandle);
ixxatVciDllHandle = NULL;
}
}
|
feaser/openblt
|
C++
|
GNU General Public License v3.0
| 601
|
/* To further complicate matters, due to the way the expansion bus controller handles 32 bit reads, the byte stream ABCD is stored on the flash as: D15 D0 + */
|
static u16 flash_read16(void __iomem *addr)
|
/* To further complicate matters, due to the way the expansion bus controller handles 32 bit reads, the byte stream ABCD is stored on the flash as: D15 D0 + */
static u16 flash_read16(void __iomem *addr)
|
{
return be16_to_cpu(__raw_readw((void __iomem *)((unsigned long)addr ^ 0x2)));
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Retrieve the status of the control bits on a serial device. */
|
RETURN_STATUS EFIAPI SerialPortGetControl(OUT UINT32 *Control)
|
/* Retrieve the status of the control bits on a serial device. */
RETURN_STATUS EFIAPI SerialPortGetControl(OUT UINT32 *Control)
|
{
*Control = 0;
if (!SerialPortPoll ()) {
*Control = EFI_SERIAL_INPUT_BUFFER_EMPTY;
}
return RETURN_SUCCESS;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Set the baud rate.
This routine set the given baud rate for the UART. */
|
static void baudrate_set(const struct device *dev)
|
/* Set the baud rate.
This routine set the given baud rate for the UART. */
static void baudrate_set(const struct device *dev)
|
{
const struct uart_cmsdk_apb_config * const dev_cfg = dev->config;
struct uart_cmsdk_apb_dev_data *const dev_data = dev->data;
if ((dev_data->baud_rate != 0U) && (dev_cfg->sys_clk_freq != 0U)) {
dev_cfg->uart->bauddiv = (dev_cfg->sys_clk_freq / dev_data->baud_rate);
}
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* Sets the pulse width for the specified PWM output. */
|
void PWMPulseWidthSet(unsigned long ulBase, unsigned long ulPWMOut, unsigned long ulWidth)
|
/* Sets the pulse width for the specified PWM output. */
void PWMPulseWidthSet(unsigned long ulBase, unsigned long ulPWMOut, unsigned long ulWidth)
|
{
unsigned long ulGenBase, ulReg;
ASSERT(ulBase == PWM_BASE);
ASSERT(PWMOutValid(ulPWMOut));
ulGenBase = PWM_OUT_BADDR(ulBase, ulPWMOut);
if(HWREG(ulGenBase + PWM_O_X_CTL) & PWM_X_CTL_MODE)
{
ulWidth /= 2;
}
ulReg = HWREG(ulGenBase + PWM_O_X_LOAD);
ASSERT(ulWidth < ulReg);
ulReg = ulReg - ulWidth;
if(PWM_IS_OUTPUT_ODD(ulPWMOut))
{
HWREG(ulGenBase + PWM_O_X_CMPB) = ulReg;
}
else
{
HWREG(ulGenBase + PWM_O_X_CMPA) = ulReg;
}
}
|
watterott/WebRadio
|
C++
| null | 71
|
/* Read a register on MDIO bus (access to the PHY) This function is looping until PHY gets ready */
|
static unsigned long ulReadMDIO(volatile avr32_macb_t *macb, unsigned short usAddress)
|
/* Read a register on MDIO bus (access to the PHY) This function is looping until PHY gets ready */
static unsigned long ulReadMDIO(volatile avr32_macb_t *macb, unsigned short usAddress)
|
{
unsigned long value, status;
macb->ncr |= AVR32_MACB_NCR_MPE_MASK;
macb->man = (AVR32_MACB_SOF_MASK & (0x01<<AVR32_MACB_SOF_OFFSET))
| (2 << AVR32_MACB_CODE_OFFSET)
| (2 << AVR32_MACB_RW_OFFSET)
| ((ETHERNET_CONF_PHY_ADDR & 0x1f) << AVR32_MACB_PHYA_OFFSET)
| (usAddress << AVR32_MACB_REGA_OFFSET);
do {
status = macb->nsr;
} while (!(status & AVR32_MACB_NSR_IDLE_MASK));
value = macb->man & 0x0000ffff;
macb->ncr &= ~AVR32_MACB_NCR_MPE_MASK;
return (value);
}
|
apopple/Pandaboard-FreeRTOS
|
C++
| null | 25
|
/* Check if Receive data register not empty (it means that Received data is ready to be read in the SWPMI_RDR register) @rmtoll ISR RXNE LL_SWPMI_IsActiveFlag_RXNE. */
|
uint32_t LL_SWPMI_IsActiveFlag_RXNE(SWPMI_TypeDef *SWPMIx)
|
/* Check if Receive data register not empty (it means that Received data is ready to be read in the SWPMI_RDR register) @rmtoll ISR RXNE LL_SWPMI_IsActiveFlag_RXNE. */
uint32_t LL_SWPMI_IsActiveFlag_RXNE(SWPMI_TypeDef *SWPMIx)
|
{
return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXNE) == (SWPMI_ISR_RXNE)) ? 1UL : 0UL);
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* DPM callback to allow PE to enter ERROR_RECOVERY state. */
|
void USBPD_DPM_EnterErrorRecovery(uint8_t PortNum)
|
/* DPM callback to allow PE to enter ERROR_RECOVERY state. */
void USBPD_DPM_EnterErrorRecovery(uint8_t PortNum)
|
{
DPM_TurnOffPower(PortNum, DPM_Params[PortNum].PE_PowerRole);
USBPD_CAD_EnterErrorRecovery(PortNum);
}
|
st-one/X-CUBE-USB-PD
|
C++
| null | 110
|
/* This function may only be called from the entry point function of the driver, on the error path. */
|
VOID SmbaseReleasePostSmmPen(IN UINT32 PenAddress, IN CONST EFI_BOOT_SERVICES *BootServices)
|
/* This function may only be called from the entry point function of the driver, on the error path. */
VOID SmbaseReleasePostSmmPen(IN UINT32 PenAddress, IN CONST EFI_BOOT_SERVICES *BootServices)
|
{
BootServices->FreePages (PenAddress, 1);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Assert reset on every peripheral but L4WD0. Watchdog must be kept intact to prevent glitches and/or hangs. */
|
void socfpga_per_reset_all(void)
|
/* Assert reset on every peripheral but L4WD0. Watchdog must be kept intact to prevent glitches and/or hangs. */
void socfpga_per_reset_all(void)
|
{
const u32 l4wd0 = 1 << RSTMGR_RESET(SOCFPGA_RESET(L4WD0));
writel(~(l4wd0 | RSTMGR_PER0MODRST_OCP_MASK),
&reset_manager_base->per0modrst);
writel(~l4wd0, &reset_manager_base->per0modrst);
writel(0xffffffff, &reset_manager_base->per1modrst);
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* Configures the TIMx event to be generate by software. */
|
void TIM_GenerateEvent(TIM_TypeDef *TIMx, uint16_t TIM_EventSource)
|
/* Configures the TIMx event to be generate by software. */
void TIM_GenerateEvent(TIM_TypeDef *TIMx, uint16_t TIM_EventSource)
|
{
assert_param(IS_TIM_ALL_PERIPH(TIMx));
assert_param(IS_TIM_EVENT_SOURCE(TIM_EventSource));
assert_param(IS_TIM_PERIPH_EVENT((TIMx), (TIM_EventSource)));
TIMx->EGR = TIM_EventSource;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Converts a character representation of a hex to real value. */
|
static uint8_t ctoh(char c)
|
/* Converts a character representation of a hex to real value. */
static uint8_t ctoh(char c)
|
{
return (c & 0x10) ? c & 0xf : (c & 0xf) + 9;
}
|
ARMmbed/DAPLink
|
C++
|
Apache License 2.0
| 2,140
|
/* This call does not setup the clocks, which is left to the s3c6400_setup_clocks() call which may be needed by the cpufreq or resume code to re-set the clocks if the bootloader has changed them. */
|
void __init s3c6400_register_clocks(unsigned armclk_divlimit)
|
/* This call does not setup the clocks, which is left to the s3c6400_setup_clocks() call which may be needed by the cpufreq or resume code to re-set the clocks if the bootloader has changed them. */
void __init s3c6400_register_clocks(unsigned armclk_divlimit)
|
{
struct clk *clkp;
int ret;
int ptr;
armclk_mask = armclk_divlimit;
for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) {
clkp = clks[ptr];
ret = s3c24xx_register_clock(clkp);
if (ret < 0) {
printk(KERN_ERR "Failed to register clock %s (%d)\n",
clkp->name, ret);
}
}
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* This function is called with hbalock held to get next iocb in txq of the given ring. If there is any iocb in the txq, the function returns first iocb in the list after removing the iocb from the list, else it returns NULL. */
|
static struct lpfc_iocbq* lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
|
/* This function is called with hbalock held to get next iocb in txq of the given ring. If there is any iocb in the txq, the function returns first iocb in the list after removing the iocb from the list, else it returns NULL. */
static struct lpfc_iocbq* lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
|
{
struct lpfc_iocbq *cmd_iocb;
list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
if (cmd_iocb != NULL)
pring->txq_cnt--;
return cmd_iocb;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* This function retrieves the user readable name of a driver in the form of a Unicode string. If the driver specified by This has a user readable name in the language specified by Language, then a pointer to the driver name is returned in DriverName, and EFI_SUCCESS is returned. If the driver specified by This does not support the language specified by Language, then EFI_UNSUPPORTED is returned. */
|
EFI_STATUS EFIAPI DhcpComponentNameGetDriverName(IN EFI_COMPONENT_NAME_PROTOCOL *This, IN CHAR8 *Language, OUT CHAR16 **DriverName)
|
/* This function retrieves the user readable name of a driver in the form of a Unicode string. If the driver specified by This has a user readable name in the language specified by Language, then a pointer to the driver name is returned in DriverName, and EFI_SUCCESS is returned. If the driver specified by This does not support the language specified by Language, then EFI_UNSUPPORTED is returned. */
EFI_STATUS EFIAPI DhcpComponentNameGetDriverName(IN EFI_COMPONENT_NAME_PROTOCOL *This, IN CHAR8 *Language, OUT CHAR16 **DriverName)
|
{
return LookupUnicodeString2 (
Language,
This->SupportedLanguages,
mDhcpDriverNameTable,
DriverName,
(BOOLEAN)(This == &gDhcp4ComponentName)
);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* The function is used to configure a receive message object. */
|
int32_t CAN_SetRxMsgAndMsk(CAN_T *tCAN, uint32_t u32MsgNum, uint32_t u32IDType, uint32_t u32ID, uint32_t u32IDMask)
|
/* The function is used to configure a receive message object. */
int32_t CAN_SetRxMsgAndMsk(CAN_T *tCAN, uint32_t u32MsgNum, uint32_t u32IDType, uint32_t u32ID, uint32_t u32IDMask)
|
{
int32_t rev = (int32_t)TRUE;
uint32_t u32TimeOutCount = 0ul;
while (CAN_SetRxMsgObjAndMsk(tCAN, (uint8_t)u32MsgNum, (uint8_t)u32IDType, u32ID, u32IDMask, (uint8_t)TRUE) == (int32_t)FALSE)
{
if (++u32TimeOutCount >= RETRY_COUNTS)
{
rev = (int32_t)FALSE;
break;
}
else
{
}
}
return rev;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* This function will set default network interface device. */
|
void netdev_set_default(struct netdev *netdev)
|
/* This function will set default network interface device. */
void netdev_set_default(struct netdev *netdev)
|
{
if (netdev)
{
netdev_default = netdev;
if (netdev->ops->set_default)
{
netdev->ops->set_default(netdev);
}
LOG_D("Setting default network interface device name(%s) successfully.", netdev->name);
}
}
|
pikasTech/PikaPython
|
C++
|
MIT License
| 1,403
|
/* Returns the json type of this json value. */
|
EDKII_JSON_TYPE EFIAPI JsonGetType(IN EDKII_JSON_VALUE JsonValue)
|
/* Returns the json type of this json value. */
EDKII_JSON_TYPE EFIAPI JsonGetType(IN EDKII_JSON_VALUE JsonValue)
|
{
return (EDKII_JSON_TYPE)(((json_t *)JsonValue)->type);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* UART MSP De-Initialization This function freeze the hardware resources used in this example. */
|
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
|
/* UART MSP De-Initialization This function freeze the hardware resources used in this example. */
void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
|
{
if(huart->Instance==USART6)
{
__HAL_RCC_USART6_CLK_DISABLE();
HAL_GPIO_DeInit(GPIOC, GPIO_PIN_7|GPIO_PIN_6);
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Returns: 0, Otherwise, VXGE_HW_ERR_WRONG_IRQ if the msix index is out of range status. See also: */
|
void vxge_hw_vpath_msix_clear(struct __vxge_hw_vpath_handle *vp, int msix_id)
|
/* Returns: 0, Otherwise, VXGE_HW_ERR_WRONG_IRQ if the msix index is out of range status. See also: */
void vxge_hw_vpath_msix_clear(struct __vxge_hw_vpath_handle *vp, int msix_id)
|
{
struct __vxge_hw_device *hldev = vp->vpath->hldev;
if (hldev->config.intr_mode ==
VXGE_HW_INTR_MODE_MSIX_ONE_SHOT) {
__vxge_hw_pio_mem_write32_upper(
(u32)vxge_bVALn(vxge_mBIT(hldev->first_vp_id +
(msix_id/4)), 0, 32),
&hldev->common_reg->
clr_msix_one_shot_vec[msix_id%4]);
} else {
__vxge_hw_pio_mem_write32_upper(
(u32)vxge_bVALn(vxge_mBIT(hldev->first_vp_id +
(msix_id/4)), 0, 32),
&hldev->common_reg->
clear_msix_mask_vect[msix_id%4]);
}
return;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Converts all the characters in a Null-terminated string to upper case characters. */
|
VOID EFIAPI EngStrUpr(IN EFI_UNICODE_COLLATION_PROTOCOL *This, IN OUT CHAR16 *Str)
|
/* Converts all the characters in a Null-terminated string to upper case characters. */
VOID EFIAPI EngStrUpr(IN EFI_UNICODE_COLLATION_PROTOCOL *This, IN OUT CHAR16 *Str)
|
{
while (*Str != 0) {
*Str = TO_UPPER (*Str);
Str += 1;
}
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* This function performs DA8xx platform specific initialization for usb0. */
|
int musb_platform_init(void)
|
/* This function performs DA8xx platform specific initialization for usb0. */
int musb_platform_init(void)
|
{
u32 revision;
lpsc_on(33);
enable_vbus();
writel(0x1, &da8xx_usb_regs->control);
udelay(5000);
if (phy_on() == 0)
return -1;
revision = readl(&da8xx_usb_regs->revision);
if (revision == 0)
return -1;
writel((DA8XX_USB_USBINT_MASK | DA8XX_USB_TXINT_MASK |
DA8XX_USB_RXINT_MASK), &da8xx_usb_regs->intmsk_set);
return 0;
}
|
EmcraftSystems/u-boot
|
C++
|
Other
| 181
|
/* Allocates space for the protocol to maintain information about writes. Since writes must be completed in a fault-tolerant manner and multiple writes require more resources to be successful, this function enables the protocol to ensure that enough space exists to track information about upcoming writes. */
|
EFI_STATUS EFIAPI FtwAllocate(IN EFI_FAULT_TOLERANT_WRITE_PROTOCOL *This, IN EFI_GUID *CallerId, IN UINTN PrivateDataSize, IN UINTN NumberOfWrites)
|
/* Allocates space for the protocol to maintain information about writes. Since writes must be completed in a fault-tolerant manner and multiple writes require more resources to be successful, this function enables the protocol to ensure that enough space exists to track information about upcoming writes. */
EFI_STATUS EFIAPI FtwAllocate(IN EFI_FAULT_TOLERANT_WRITE_PROTOCOL *This, IN EFI_GUID *CallerId, IN UINTN PrivateDataSize, IN UINTN NumberOfWrites)
|
{
EFI_STATUS Status;
UINTN PayloadSize;
EFI_MM_COMMUNICATE_HEADER *SmmCommunicateHeader;
SMM_FTW_ALLOCATE_HEADER *SmmFtwAllocateHeader;
PayloadSize = sizeof (SMM_FTW_ALLOCATE_HEADER);
InitCommunicateBuffer ((VOID **)&SmmCommunicateHeader, (VOID **)&SmmFtwAllocateHeader, PayloadSize, FTW_FUNCTION_ALLOCATE);
CopyGuid (&SmmFtwAllocateHeader->CallerId, CallerId);
SmmFtwAllocateHeader->PrivateDataSize = PrivateDataSize;
SmmFtwAllocateHeader->NumberOfWrites = NumberOfWrites;
Status = SendCommunicateBuffer (SmmCommunicateHeader, PayloadSize);
if (!EFI_ERROR (Status)) {
mPrivateDataSize = PrivateDataSize;
}
FreePool (SmmCommunicateHeader);
return Status;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Convenience routines for allocating quantization and Huffman tables. (Would jutils.c be a more reasonable place to put these?) */
|
jpeg_alloc_quant_table(j_common_ptr cinfo)
|
/* Convenience routines for allocating quantization and Huffman tables. (Would jutils.c be a more reasonable place to put these?) */
jpeg_alloc_quant_table(j_common_ptr cinfo)
|
{
JQUANT_TBL* tbl;
tbl = (JQUANT_TBL*)
(*cinfo->mem->alloc_small) (cinfo, JPOOL_PERMANENT, SIZEOF(JQUANT_TBL));
tbl->sent_table = FALSE;
return tbl;
}
|
nanoframework/nf-interpreter
|
C++
|
MIT License
| 293
|
/* Disable Large Receive Offload (LRO) on a net device. Must be called under RTNL. This is needed if received packets may be forwarded to another interface. */
|
void dev_disable_lro(struct net_device *dev)
|
/* Disable Large Receive Offload (LRO) on a net device. Must be called under RTNL. This is needed if received packets may be forwarded to another interface. */
void dev_disable_lro(struct net_device *dev)
|
{
if (dev->ethtool_ops && dev->ethtool_ops->get_flags &&
dev->ethtool_ops->set_flags) {
u32 flags = dev->ethtool_ops->get_flags(dev);
if (flags & ETH_FLAG_LRO) {
flags &= ~ETH_FLAG_LRO;
dev->ethtool_ops->set_flags(dev, flags);
}
}
WARN_ON(dev->features & NETIF_F_LRO);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Read the ETH DMA Buffer Unavailable Missed Frame Counter value. */
|
uint32_t ETH_ReadBufferUnavailableMissedFrameCounter(void)
|
/* Read the ETH DMA Buffer Unavailable Missed Frame Counter value. */
uint32_t ETH_ReadBufferUnavailableMissedFrameCounter(void)
|
{
return (uint32_t)(ETH->DMAMFABOCNT_B.MISFCNT);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Power off RC3K during rtc power domain off. */
|
BL_Err_Type ATTR_CLOCK_SECTION HBN_Power_Off_RC32K(void)
|
/* Power off RC3K during rtc power domain off. */
BL_Err_Type ATTR_CLOCK_SECTION HBN_Power_Off_RC32K(void)
|
{
uint32_t tmpVal;
tmpVal = BL_RD_REG(HBN_BASE, HBN_GLB);
tmpVal = BL_CLR_REG_BIT(tmpVal, HBN_PU_RC32K);
BL_WR_REG(HBN_BASE, HBN_GLB, tmpVal);
return SUCCESS;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Fill out sockaddr structure with values from abstract address object. */
|
int nl_addr_fill_sockaddr(struct nl_addr *addr, struct sockaddr *sa, socklen_t *salen)
|
/* Fill out sockaddr structure with values from abstract address object. */
int nl_addr_fill_sockaddr(struct nl_addr *addr, struct sockaddr *sa, socklen_t *salen)
|
{
switch (addr->a_family) {
case AF_INET: {
struct sockaddr_in *sai = (struct sockaddr_in *) sa;
if (*salen < sizeof(*sai))
return -NLE_INVAL;
sai->sin_family = addr->a_family;
memcpy(&sai->sin_addr, addr->a_addr, 4);
*salen = sizeof(*sai);
}
break;
case AF_INET6: {
struct sockaddr_in6 *sa6 = (struct sockaddr_in6 *) sa;
if (*salen < sizeof(*sa6))
return -NLE_INVAL;
sa6->sin6_family = addr->a_family;
memcpy(&sa6->sin6_addr, addr->a_addr, 16);
*salen = sizeof(*sa6);
}
break;
default:
return -NLE_INVAL;
}
return 0;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* If 16-bit MMIO register operations are not supported, then ASSERT(). */
|
UINT16 EFIAPI S3MmioAndThenOr16(IN UINTN Address, IN UINT16 AndData, IN UINT16 OrData)
|
/* If 16-bit MMIO register operations are not supported, then ASSERT(). */
UINT16 EFIAPI S3MmioAndThenOr16(IN UINTN Address, IN UINT16 AndData, IN UINT16 OrData)
|
{
return InternalSaveMmioWrite16ValueToBootScript (Address, MmioAndThenOr16 (Address, AndData, OrData));
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Note that as the notification code holds the regulator lock, we have to schedule an update of the supply voltage rather than getting it directly. */
|
static int sht15_invalidate_voltage(struct notifier_block *nb, unsigned long event, void *ignored)
|
/* Note that as the notification code holds the regulator lock, we have to schedule an update of the supply voltage rather than getting it directly. */
static int sht15_invalidate_voltage(struct notifier_block *nb, unsigned long event, void *ignored)
|
{
struct sht15_data *data = container_of(nb, struct sht15_data, nb);
if (event == REGULATOR_EVENT_VOLTAGE_CHANGE)
data->supply_uV_valid = false;
schedule_work(&data->update_supply_work);
return NOTIFY_OK;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* About: Purpose Implementation of the USBGetDescriptorRequest class. Returns the type of the descriptor requested by the host given the corresponding GET_DESCRIPTOR request. */
|
unsigned char USBGetDescriptorRequest_GetDescriptorType(const USBGenericRequest *request)
|
/* About: Purpose Implementation of the USBGetDescriptorRequest class. Returns the type of the descriptor requested by the host given the corresponding GET_DESCRIPTOR request. */
unsigned char USBGetDescriptorRequest_GetDescriptorType(const USBGenericRequest *request)
|
{
return (USBGenericRequest_GetValue(request) >> 8) & 0xFF;
}
|
opentx/opentx
|
C++
|
GNU General Public License v2.0
| 2,025
|
/* SPI_TFT_Init Initialize SPI interface to TFT-LCD SSD2119 controller. */
|
void SPI_TFT_Init(void)
|
/* SPI_TFT_Init Initialize SPI interface to TFT-LCD SSD2119 controller. */
void SPI_TFT_Init(void)
|
{
CMU_ClockEnable(cmuClock_HFPER, true);
CMU_ClockEnable(cmuClock_USART1, true);
CMU_ClockEnable(cmuClock_GPIO, true);
GPIO_PinModeSet(gpioPortD, 0, gpioModePushPull, 0);
GPIO_PinModeSet(gpioPortD, 1, gpioModeInput, 0);
GPIO_PinModeSet(gpioPortD, 2, gpioModePushPull, 0);
GPIO_PinModeSet(gpioPortD, 3, gpioModePushPull, 1);
USART_Reset(USART1);
USART_InitSync(USART1, &inittft);
USART1->ROUTE =
USART_ROUTE_TXPEN |
USART_ROUTE_RXPEN |
USART_ROUTE_CLKPEN |
USART_ROUTE_LOCATION_LOC1;
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* Returns the PEC value for the specified I2C. */
|
uint8_t I2C_GetPec(I2C_Module *I2Cx)
|
/* Returns the PEC value for the specified I2C. */
uint8_t I2C_GetPec(I2C_Module *I2Cx)
|
{
assert_param(IS_I2C_PERIPH(I2Cx));
return ((I2Cx->STS2) >> 8);
}
|
pikasTech/PikaPython
|
C++
|
MIT License
| 1,403
|
/* kstrdup - allocate space for and copy an existing string @s: the string to duplicate @gfp: the GFP mask used in the kmalloc() call when allocating memory */
|
char* kstrdup(const char *s, gfp_t gfp)
|
/* kstrdup - allocate space for and copy an existing string @s: the string to duplicate @gfp: the GFP mask used in the kmalloc() call when allocating memory */
char* kstrdup(const char *s, gfp_t gfp)
|
{
size_t len;
char *buf;
if (!s)
return NULL;
len = strlen(s) + 1;
buf = kmalloc_track_caller(len, gfp);
if (buf)
memcpy(buf, s, len);
return buf;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). */
|
UINT16 EFIAPI PciAndThenOr16(IN UINTN Address, IN UINT16 AndData, IN UINT16 OrData)
|
/* If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 16-bit boundary, then ASSERT(). */
UINT16 EFIAPI PciAndThenOr16(IN UINTN Address, IN UINT16 AndData, IN UINT16 OrData)
|
{
return mRunningOnQ35 ?
PciExpressAndThenOr16 (Address, AndData, OrData) :
PciCf8AndThenOr16 (Address, AndData, OrData);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Detects if MONITOR/MWAIT feature supported on current processor. */
|
BOOLEAN EFIAPI MonitorMwaitSupport(IN UINTN ProcessorNumber, IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, IN VOID *ConfigData OPTIONAL)
|
/* Detects if MONITOR/MWAIT feature supported on current processor. */
BOOLEAN EFIAPI MonitorMwaitSupport(IN UINTN ProcessorNumber, IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, IN VOID *ConfigData OPTIONAL)
|
{
return (CpuInfo->CpuIdVersionInfoEcx.Bits.MONITOR == 1);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Gets the PEC value for the specified I2C */
|
unsigned char I2CPECGet(unsigned long ulBase)
|
/* Gets the PEC value for the specified I2C */
unsigned char I2CPECGet(unsigned long ulBase)
|
{
xASSERT((ulBase == I2C1_BASE) || (ulBase == I2C2_BASE));
return ((xHWREG(ulBase + I2C_SR2) & I2C_SR2_PEC_M) >> 8);
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* Port MUST be disabled by ssp_disable before making any config changes. */
|
int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed)
|
/* Port MUST be disabled by ssp_disable before making any config changes. */
int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed)
|
{
struct ssp_device *ssp = dev->ssp;
dev->mode = mode;
dev->flags = flags;
dev->psp_flags = psp_flags;
dev->speed = speed;
__raw_writel((dev->speed | dev->mode), ssp->mmio_base + SSCR0);
__raw_writel(dev->flags, ssp->mmio_base + SSCR1);
__raw_writel(dev->psp_flags, ssp->mmio_base + SSPSP);
return 0;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* param base SPC peripheral base address. param config Pointer to the structure in type of spc_vdd_core_glitch_detector_config_t. */
|
void SPC_ConfigVddCoreGlitchDetector(SPC_Type *base, const spc_vdd_core_glitch_detector_config_t *config)
|
/* param base SPC peripheral base address. param config Pointer to the structure in type of spc_vdd_core_glitch_detector_config_t. */
void SPC_ConfigVddCoreGlitchDetector(SPC_Type *base, const spc_vdd_core_glitch_detector_config_t *config)
|
{
assert(config != NULL);
uint32_t reg;
reg = (base->VDD_CORE_GLITCH_DETECT_SC) &
~(SPC_VDD_CORE_GLITCH_DETECT_SC_CNT_SELECT_MASK | SPC_VDD_CORE_GLITCH_DETECT_SC_TIMEOUT_MASK |
SPC_VDD_CORE_GLITCH_DETECT_SC_RE_MASK | SPC_VDD_CORE_GLITCH_DETECT_SC_IE_MASK);
reg |= SPC_VDD_CORE_GLITCH_DETECT_SC_CNT_SELECT(config->rippleCounterSelect) |
SPC_VDD_CORE_GLITCH_DETECT_SC_TIMEOUT(config->resetTimeoutValue) |
SPC_VDD_CORE_GLITCH_DETECT_SC_RE(config->enableReset) |
SPC_VDD_CORE_GLITCH_DETECT_SC_IE(config->enableInterrupt);
base->VDD_CORE_GLITCH_DETECT_SC = reg;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Returns 0 on success or -1 with the statistic lock released if the room in the socket buffer was not sufficient. */
|
int gnet_stats_copy_rate_est(struct gnet_dump *d, const struct gnet_stats_basic_packed *b, struct gnet_stats_rate_est *r)
|
/* Returns 0 on success or -1 with the statistic lock released if the room in the socket buffer was not sufficient. */
int gnet_stats_copy_rate_est(struct gnet_dump *d, const struct gnet_stats_basic_packed *b, struct gnet_stats_rate_est *r)
|
{
if (b && !gen_estimator_active(b, r))
return 0;
if (d->compat_tc_stats) {
d->tc_stats.bps = r->bps;
d->tc_stats.pps = r->pps;
}
if (d->tail)
return gnet_stats_copy(d, TCA_STATS_RATE_EST, r, sizeof(*r));
return 0;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Returns: The matched object or NULL on path lookup failures. */
|
static Object* object_resolve_link(Object *obj, const char *name, const char *path, Error **errp)
|
/* Returns: The matched object or NULL on path lookup failures. */
static Object* object_resolve_link(Object *obj, const char *name, const char *path, Error **errp)
|
{
const char *type;
gchar *target_type;
bool ambiguous = false;
Object *target;
type = object_property_get_type(obj, name, NULL);
target_type = g_strndup(&type[5], strlen(type) - 6);
target = object_resolve_path_type(path, target_type, &ambiguous);
if (ambiguous) {
error_set(errp, QERR_AMBIGUOUS_PATH, path);
} else if (!target) {
target = object_resolve_path(path, &ambiguous);
if (target || ambiguous) {
error_set(errp, QERR_INVALID_PARAMETER_TYPE, name, target_type);
} else {
error_set(errp, QERR_DEVICE_NOT_FOUND, path);
}
target = NULL;
}
g_free(target_type);
return target;
}
|
ve3wwg/teensy3_qemu
|
C++
|
Other
| 15
|
/* Converts the number of bytes in power of two and returns the power. */
|
uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes)
|
/* Converts the number of bytes in power of two and returns the power. */
uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes)
|
{
uint8_t count = 0;
while (NumberOfBytes != 1) {
NumberOfBytes >>= 1;
count++;
}
return (count);
}
|
MaJerle/stm32f429
|
C++
| null | 2,036
|
/* i2c_pxa_master_complete - complete the message and wake up. */
|
static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret)
|
/* i2c_pxa_master_complete - complete the message and wake up. */
static void i2c_pxa_master_complete(struct pxa_i2c *i2c, int ret)
|
{
i2c->msg_ptr = 0;
i2c->msg = NULL;
i2c->msg_idx ++;
i2c->msg_num = 0;
if (ret)
i2c->msg_idx = ret;
if (!i2c->use_pio)
wake_up(&i2c->wait);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* This function is to display the IPv6 address. */
|
VOID HttpBootShowIp6Addr(IN EFI_IPv6_ADDRESS *Ip)
|
/* This function is to display the IPv6 address. */
VOID HttpBootShowIp6Addr(IN EFI_IPv6_ADDRESS *Ip)
|
{
UINTN Index;
for (Index = 0; Index < 16; Index++) {
if (Ip->Addr[Index] != 0) {
AsciiPrint ("%x", Ip->Addr[Index]);
}
Index++;
if (Index > 15) {
return;
}
if (((Ip->Addr[Index] & 0xf0) == 0) && (Ip->Addr[Index - 1] != 0)) {
AsciiPrint ("0");
}
AsciiPrint ("%x", Ip->Addr[Index]);
if (Index < 15) {
AsciiPrint (":");
}
}
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). */
|
UINT32 EFIAPI PciExpressAnd32(IN UINTN Address, IN UINT32 AndData)
|
/* If Address > 0x0FFFFFFF, then ASSERT(). If Address is not aligned on a 32-bit boundary, then ASSERT(). */
UINT32 EFIAPI PciExpressAnd32(IN UINTN Address, IN UINT32 AndData)
|
{
ASSERT_INVALID_PCI_ADDRESS (Address);
return MmioAnd32 ((UINTN)GetPciExpressBaseAddress () + Address, AndData);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* bfin_set_vlev - Update VLEV field in VR_CTL Reg. Avoid BYPASS sequence */
|
static void bfin_set_vlev(unsigned int vlev)
|
/* bfin_set_vlev - Update VLEV field in VR_CTL Reg. Avoid BYPASS sequence */
static void bfin_set_vlev(unsigned int vlev)
|
{
unsigned pll_lcnt;
pll_lcnt = bfin_read_PLL_LOCKCNT();
bfin_write_PLL_LOCKCNT(1);
bfin_write_VR_CTL((bfin_read_VR_CTL() & ~VLEV) | vlev);
bfin_write_PLL_LOCKCNT(pll_lcnt);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Enable or Disable High Pass Filter on CLick. */
|
void LSM303DLHC_AccFilterClickCmd(uint8_t HighPassFilterClickState)
|
/* Enable or Disable High Pass Filter on CLick. */
void LSM303DLHC_AccFilterClickCmd(uint8_t HighPassFilterClickState)
|
{
uint8_t tmpreg = 0x00;
tmpreg = COMPASSACCELERO_IO_Read(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG2_A);
tmpreg &= ~(LSM303DLHC_HPF_CLICK_ENABLE);
tmpreg |= HighPassFilterClickState;
COMPASSACCELERO_IO_Write(ACC_I2C_ADDRESS, LSM303DLHC_CTRL_REG2_A, tmpreg);
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* A simple wrapper function that allows you to free a pbuf from interrupt context. */
|
err_t pbuf_free_callback(struct pbuf *p)
|
/* A simple wrapper function that allows you to free a pbuf from interrupt context. */
err_t pbuf_free_callback(struct pbuf *p)
|
{
return tcpip_callback_with_block(pbuf_free_int, p, 0);
}
|
apopple/Pandaboard-FreeRTOS
|
C++
| null | 25
|
/* Opens a pipe of the Low Level Driver. */
|
USBH_StatusTypeDef USBH_LL_OpenPipe(USBH_HandleTypeDef *phost, uint8_t pipe, uint8_t epnum, uint8_t dev_address, uint8_t speed, uint8_t ep_type, uint16_t mps)
|
/* Opens a pipe of the Low Level Driver. */
USBH_StatusTypeDef USBH_LL_OpenPipe(USBH_HandleTypeDef *phost, uint8_t pipe, uint8_t epnum, uint8_t dev_address, uint8_t speed, uint8_t ep_type, uint16_t mps)
|
{
HAL_HCD_HC_Init(phost->pData,
pipe,
epnum,
dev_address,
speed,
ep_type,
mps);
return USBH_OK;
}
|
STMicroelectronics/STM32CubeF4
|
C++
|
Other
| 789
|
/* Check if a date is valid.
Checks that number of seconds, minutes and hours is a valid value. Checks that number of days does not exceed number of days in current month. Checks that number of months is a valid value, and checks that year is between 1970 (epoch year) and 2106 (overflow year). */
|
bool calendar_is_date_valid(struct calendar_date *date)
|
/* Check if a date is valid.
Checks that number of seconds, minutes and hours is a valid value. Checks that number of days does not exceed number of days in current month. Checks that number of months is a valid value, and checks that year is between 1970 (epoch year) and 2106 (overflow year). */
bool calendar_is_date_valid(struct calendar_date *date)
|
{
if ((date->second >= 60) || (date->minute >= 60) || (date->hour >= 24)) {
return false;
}
if ((date->month >= 12) || (date->date >=31)) {
return false;
}
if (date->date >= month[calendar_leapyear(date->year)][date->month]) {
return false;
}
if ((date->year < EPOCH_YEAR) || (date->year >= 2106)) {
return false;
} else {
return true;
}
}
|
memfault/zero-to-main
|
C++
| null | 200
|
/* Note: This is in section 7.5.3.2 of the IEEE 802.15.4-2006 document, with the reason described in 7.3.3.2. */
|
static int fake_disassoc_req(struct net_device *dev, struct ieee802154_addr *addr, u8 reason)
|
/* Note: This is in section 7.5.3.2 of the IEEE 802.15.4-2006 document, with the reason described in 7.3.3.2. */
static int fake_disassoc_req(struct net_device *dev, struct ieee802154_addr *addr, u8 reason)
|
{
return ieee802154_nl_disassoc_confirm(dev, IEEE802154_SUCCESS);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Return codes 0 - successful other values - error */
|
static int lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
|
/* Return codes 0 - successful other values - error */
static int lpfc_setup_driver_resource_phase1(struct lpfc_hba *phba)
|
{
atomic_set(&phba->fast_event_count, 0);
spin_lock_init(&phba->hbalock);
spin_lock_init(&phba->ndlp_lock);
INIT_LIST_HEAD(&phba->port_list);
INIT_LIST_HEAD(&phba->work_list);
init_waitqueue_head(&phba->wait_4_mlo_m_q);
init_waitqueue_head(&phba->work_waitq);
spin_lock_init(&phba->scsi_buf_list_lock);
INIT_LIST_HEAD(&phba->lpfc_scsi_buf_list);
INIT_LIST_HEAD(&phba->fabric_iocb_list);
INIT_LIST_HEAD(&phba->elsbuf);
INIT_LIST_HEAD(&phba->fcf_conn_rec_list);
return 0;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Set the parent for the jack input device in the device tree. This function is only valid prior to registration of the jack. If no parent is configured then the parent device will be the sound card. */
|
void snd_jack_set_parent(struct snd_jack *jack, struct device *parent)
|
/* Set the parent for the jack input device in the device tree. This function is only valid prior to registration of the jack. If no parent is configured then the parent device will be the sound card. */
void snd_jack_set_parent(struct snd_jack *jack, struct device *parent)
|
{
WARN_ON(jack->registered);
jack->input_dev->dev.parent = parent;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Called from irq_create_of_mapping() only. Note: We have only 1 entry to translate. */
|
static int beatic_pic_host_xlate(struct irq_host *h, struct device_node *ct, const u32 *intspec, unsigned int intsize, irq_hw_number_t *out_hwirq, unsigned int *out_flags)
|
/* Called from irq_create_of_mapping() only. Note: We have only 1 entry to translate. */
static int beatic_pic_host_xlate(struct irq_host *h, struct device_node *ct, const u32 *intspec, unsigned int intsize, irq_hw_number_t *out_hwirq, unsigned int *out_flags)
|
{
const u64 *intspec2 = (const u64 *)intspec;
*out_hwirq = *intspec2;
*out_flags |= IRQ_TYPE_LEVEL_LOW;
return 0;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* This function get the scheduling parameter attributes in the attr argument. */
|
int pthread_attr_getschedparam(pthread_attr_t const *attr, struct sched_param *param)
|
/* This function get the scheduling parameter attributes in the attr argument. */
int pthread_attr_getschedparam(pthread_attr_t const *attr, struct sched_param *param)
|
{
RT_ASSERT(attr != RT_NULL);
RT_ASSERT(param != RT_NULL);
param->sched_priority = attr->schedparam.sched_priority;
return 0;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Routines to disable and re-enable the D-cache and I-cache at run time. These are necessary because the L2 cache can only be enabled or disabled while the L1 Dcache and Icache are both disabled. */
|
static int __init flush_and_disable_dcache(void)
|
/* Routines to disable and re-enable the D-cache and I-cache at run time. These are necessary because the L2 cache can only be enabled or disabled while the L1 Dcache and Icache are both disabled. */
static int __init flush_and_disable_dcache(void)
|
{
u32 cr;
cr = get_cr();
if (cr & CR_C) {
unsigned long flags;
raw_local_irq_save(flags);
flush_cache_all();
set_cr(cr & ~CR_C);
raw_local_irq_restore(flags);
return 1;
}
return 0;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* This routine prepares the mailbox command for dumping HBA's config region. */
|
void lpfc_dump_mem(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb, uint16_t offset, uint16_t region_id)
|
/* This routine prepares the mailbox command for dumping HBA's config region. */
void lpfc_dump_mem(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb, uint16_t offset, uint16_t region_id)
|
{
MAILBOX_t *mb;
void *ctx;
mb = &pmb->u.mb;
ctx = pmb->context2;
memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
mb->mbxCommand = MBX_DUMP_MEMORY;
mb->un.varDmp.cv = 1;
mb->un.varDmp.type = DMP_NV_PARAMS;
mb->un.varDmp.entry_index = offset;
mb->un.varDmp.region_id = region_id;
mb->un.varDmp.word_cnt = (DMP_RSP_SIZE / sizeof (uint32_t));
mb->un.varDmp.co = 0;
mb->un.varDmp.resp_offset = 0;
pmb->context2 = ctx;
mb->mbxOwner = OWN_HOST;
return;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* param base ADC_ETC peripheral base address. param triggerGroup Trigger group index. param config Pointer to "adc_etc_trigger_config_t" structure. */
|
void ADC_ETC_SetTriggerConfig(ADC_ETC_Type *base, uint32_t triggerGroup, const adc_etc_trigger_config_t *config)
|
/* param base ADC_ETC peripheral base address. param triggerGroup Trigger group index. param config Pointer to "adc_etc_trigger_config_t" structure. */
void ADC_ETC_SetTriggerConfig(ADC_ETC_Type *base, uint32_t triggerGroup, const adc_etc_trigger_config_t *config)
|
{
assert(triggerGroup < ADC_ETC_TRIGn_CTRL_COUNT);
assert(ADC_ETC_TRIGn_COUNTER_COUNT > triggerGroup);
uint32_t tmp32;
tmp32 = ADC_ETC_TRIGn_CTRL_TRIG_CHAIN(config->triggerChainLength) |
ADC_ETC_TRIGn_CTRL_TRIG_PRIORITY(config->triggerPriority);
if (config->enableSyncMode)
{
tmp32 |= ADC_ETC_TRIGn_CTRL_SYNC_MODE_MASK;
}
if (config->enableSWTriggerMode)
{
tmp32 |= ADC_ETC_TRIGn_CTRL_TRIG_MODE_MASK;
}
base->TRIG[triggerGroup].TRIGn_CTRL = tmp32;
tmp32 = ADC_ETC_TRIGn_COUNTER_INIT_DELAY(config->initialDelay) |
ADC_ETC_TRIGn_COUNTER_SAMPLE_INTERVAL(config->sampleIntervalDelay);
base->TRIG[triggerGroup].TRIGn_COUNTER = tmp32;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Example of User callback in charge of consuming received data. */
|
void UserDataTreatment(uint8_t *DataBuffer, uint32_t Size)
|
/* Example of User callback in charge of consuming received data. */
void UserDataTreatment(uint8_t *DataBuffer, uint32_t Size)
|
{
PrintInfo(aTextInfoSwap1, sizeof(aTextInfoSwap1));
PrintInfo(DataBuffer, Size);
PrintInfo(aTextInfoSwap2, sizeof(aTextInfoSwap2));
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
}
|
STMicroelectronics/STM32CubeF4
|
C++
|
Other
| 789
|
/* Doesn't attempt to pass an error out to MTRR users because it's quite complicated in some cases and probably not worth it because the best error handling is to ignore it. */
|
void mtrr_wrmsr(unsigned msr, unsigned a, unsigned b)
|
/* Doesn't attempt to pass an error out to MTRR users because it's quite complicated in some cases and probably not worth it because the best error handling is to ignore it. */
void mtrr_wrmsr(unsigned msr, unsigned a, unsigned b)
|
{
if (wrmsr_safe(msr, a, b) < 0) {
printk(KERN_ERR
"MTRR: CPU %u: Writing MSR %x to %x:%x failed\n",
smp_processor_id(), msr, a, b);
}
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* param base Pointer to the FLEXIO_SPI_Type structure. param direction Shift direction of MSB first or LSB first. param buffer The data bytes to send. param size The number of data bytes to send. */
|
void FLEXIO_SPI_WriteBlocking(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, const uint8_t *buffer, size_t size)
|
/* param base Pointer to the FLEXIO_SPI_Type structure. param direction Shift direction of MSB first or LSB first. param buffer The data bytes to send. param size The number of data bytes to send. */
void FLEXIO_SPI_WriteBlocking(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, const uint8_t *buffer, size_t size)
|
{
assert(buffer);
assert(size);
while (size--)
{
while (!(FLEXIO_SPI_GetStatusFlags(base) & kFLEXIO_SPI_TxBufferEmptyFlag))
{
}
FLEXIO_SPI_WriteData(base, direction, *buffer++);
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* On Assabet, we must probe for the Neponset board */
|
static void __init map_sa1100_gpio_regs(void)
|
/* On Assabet, we must probe for the Neponset board */
static void __init map_sa1100_gpio_regs(void)
|
{
unsigned long phys = __PREG(GPLR) & PMD_MASK;
unsigned long virt = io_p2v(phys);
int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
pmd_t *pmd;
pmd = pmd_offset(pgd_offset_k(virt), virt);
*pmd = __pmd(phys | prot);
flush_pmd_entry(pmd);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* MemoryAllocationHob should also be created for Mailbox and Ovmf work area. */
|
VOID EFIAPI PlatformTdxPublishRamRegions(VOID)
|
/* MemoryAllocationHob should also be created for Mailbox and Ovmf work area. */
VOID EFIAPI PlatformTdxPublishRamRegions(VOID)
|
{
if (!TdIsEnabled ()) {
return;
}
TransferTdxHobList ();
BuildMemoryAllocationHob (
FixedPcdGet32 (PcdOvmfSecGhcbBackupBase),
FixedPcdGet32 (PcdOvmfSecGhcbBackupSize),
EfiACPIMemoryNVS
);
if (FixedPcdGet32 (PcdOvmfWorkAreaSize) != 0) {
BuildMemoryAllocationHob (
(EFI_PHYSICAL_ADDRESS)(UINTN)FixedPcdGet32 (PcdOvmfWorkAreaBase),
(UINT64)(UINTN)FixedPcdGet32 (PcdOvmfWorkAreaSize),
EfiBootServicesData
);
}
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Configures the CRC calculation length for the selected SPI. */
|
void SPI_CRCLengthConfig(SPI_TypeDef *SPIx, uint16_t SPI_CRCLength)
|
/* Configures the CRC calculation length for the selected SPI. */
void SPI_CRCLengthConfig(SPI_TypeDef *SPIx, uint16_t SPI_CRCLength)
|
{
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_SPI_CRC_LENGTH(SPI_CRCLength));
SPIx->CR1 &= (uint16_t)~((uint16_t)SPI_CR1_CRCL);
SPIx->CR1 |= SPI_CRCLength;
}
|
ajhc/demo-cortex-m3
|
C++
| null | 38
|
/* Override auto irq 2 & 6 and use them as general chain for external interrupts, we link the CIA interrupt sources into this chain. */
|
static void auto_enable_irq(unsigned int irq)
|
/* Override auto irq 2 & 6 and use them as general chain for external interrupts, we link the CIA interrupt sources into this chain. */
static void auto_enable_irq(unsigned int irq)
|
{
switch (irq) {
case IRQ_AUTO_2:
amiga_custom.intena = IF_SETCLR | IF_PORTS;
break;
case IRQ_AUTO_6:
amiga_custom.intena = IF_SETCLR | IF_EXTER;
break;
}
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* TEI interrupt processing for UART mode. The TEI interrupt fires after the last byte is transmitted on the TX pin. The user callback function is called with the UART_EVENT_TX_COMPLETE event code (if it is registered in */
|
void sci_uart_tei_isr(void)
|
/* TEI interrupt processing for UART mode. The TEI interrupt fires after the last byte is transmitted on the TX pin. The user callback function is called with the UART_EVENT_TX_COMPLETE event code (if it is registered in */
void sci_uart_tei_isr(void)
|
{
FSP_CONTEXT_SAVE
IRQn_Type irq = R_FSP_CurrentIrqGet();
sci_uart_instance_ctrl_t * p_ctrl = (sci_uart_instance_ctrl_t *) R_FSP_IsrContextGet(irq);
p_ctrl->p_reg->SCR &= (uint8_t) ~(SCI_SCR_TIE_MASK | SCI_SCR_TEIE_MASK);
r_sci_negate_de_pin(p_ctrl);
if (NULL != p_ctrl->p_callback)
{
r_sci_uart_call_callback(p_ctrl, 0U, UART_EVENT_TX_COMPLETE);
}
R_BSP_IrqStatusClear(irq);
FSP_CONTEXT_RESTORE
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* The Hamming Weight of a number is the total number of bits set in it. */
|
unsigned int hweight32(unsigned int w)
|
/* The Hamming Weight of a number is the total number of bits set in it. */
unsigned int hweight32(unsigned int w)
|
{
unsigned int res = w - ((w >> 1) & 0x55555555);
res = (res & 0x33333333) + ((res >> 2) & 0x33333333);
res = (res + (res >> 4)) & 0x0F0F0F0F;
res = res + (res >> 8);
return (res + (res >> 16)) & 0x000000FF;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Enable the Capture input of the PWM module.
The */
|
void PWMCAPInputEnable(unsigned long ulBase, unsigned long ulChannel)
|
/* Enable the Capture input of the PWM module.
The */
void PWMCAPInputEnable(unsigned long ulBase, unsigned long ulChannel)
|
{
unsigned long ulChannelTemp;
ulChannelTemp = ulChannel;
xASSERT((ulBase == PWMA_BASE) || (ulBase == PWMB_BASE));
xASSERT(((ulChannelTemp >= 0) || (ulChannelTemp <= 5)));
xHWREG(ulBase + PWM_CAPINEN) |= (1 << (ulChannelTemp));
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* If Buffer is NULL, then ASSERT(). If Size is NULL, then ASSERT(). */
|
EFI_STATUS EFIAPI GetSectionFromFfs(IN EFI_SECTION_TYPE SectionType, IN UINTN SectionInstance, OUT VOID **Buffer, OUT UINTN *Size)
|
/* If Buffer is NULL, then ASSERT(). If Size is NULL, then ASSERT(). */
EFI_STATUS EFIAPI GetSectionFromFfs(IN EFI_SECTION_TYPE SectionType, IN UINTN SectionInstance, OUT VOID **Buffer, OUT UINTN *Size)
|
{
return InternalGetSectionFromFv (
InternalImageHandleToFvHandle (gImageHandle),
&gEfiCallerIdGuid,
SectionType,
SectionInstance,
Buffer,
Size
);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* This function gets the command execution status from device. BOT transfer is composed of three phases: Command, Data, and Status. This is the Status phase. */
|
EFI_STATUS BotStatusPhase(IN EFI_PEI_SERVICES **PeiServices, IN PEI_BOT_DEVICE *PeiBotDev, OUT UINT8 *TransferStatus, IN UINT16 Timeout)
|
/* This function gets the command execution status from device. BOT transfer is composed of three phases: Command, Data, and Status. This is the Status phase. */
EFI_STATUS BotStatusPhase(IN EFI_PEI_SERVICES **PeiServices, IN PEI_BOT_DEVICE *PeiBotDev, OUT UINT8 *TransferStatus, IN UINT16 Timeout)
|
{
CSW Csw;
EFI_STATUS Status;
PEI_USB_IO_PPI *UsbIoPpi;
UINT8 EndpointAddr;
UINTN DataSize;
UsbIoPpi = PeiBotDev->UsbIoPpi;
ZeroMem (&Csw, sizeof (CSW));
EndpointAddr = (PeiBotDev->BulkInEndpoint)->EndpointAddress;
DataSize = sizeof (CSW);
Status = UsbIoPpi->UsbBulkTransfer (
PeiServices,
UsbIoPpi,
EndpointAddr,
&Csw,
&DataSize,
Timeout
);
if (EFI_ERROR (Status)) {
return Status;
}
if (Csw.Signature == CSWSIG) {
*TransferStatus = Csw.Status;
} else {
return EFI_DEVICE_ERROR;
}
return EFI_SUCCESS;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* step11 of enumeration - Reception of the full Get device descriptor */
|
static void main_usb_enum_step11(void)
|
/* step11 of enumeration - Reception of the full Get device descriptor */
static void main_usb_enum_step11(void)
|
{
main_usb_wait_setup_packet();
main_device_desc.bDescriptorType = USB_DT_DEVICE;
main_device_desc.bMaxPacketSize0 = (speed==0)?8:64;
main_usb_send_in((uint8_t*)&main_device_desc, sizeof(main_device_desc));
main_usb_wait_out(NULL,0);
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* If the requested operation results in an overflow or an underflow condition, then Result is set to UINT16_ERROR and RETURN_BUFFER_TOO_SMALL is returned. */
|
RETURN_STATUS EFIAPI SafeUint16Sub(IN UINT16 Minuend, IN UINT16 Subtrahend, OUT UINT16 *Result)
|
/* If the requested operation results in an overflow or an underflow condition, then Result is set to UINT16_ERROR and RETURN_BUFFER_TOO_SMALL is returned. */
RETURN_STATUS EFIAPI SafeUint16Sub(IN UINT16 Minuend, IN UINT16 Subtrahend, OUT UINT16 *Result)
|
{
RETURN_STATUS Status;
if (Result == NULL) {
return RETURN_INVALID_PARAMETER;
}
if (Minuend >= Subtrahend) {
*Result = (UINT16)(Minuend - Subtrahend);
Status = RETURN_SUCCESS;
} else {
*Result = UINT16_ERROR;
Status = RETURN_BUFFER_TOO_SMALL;
}
return Status;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Checks if a netmask is valid (starting with ones, then only zeros) */
|
u8_t ip4_addr_netmask_valid(u32_t netmask)
|
/* Checks if a netmask is valid (starting with ones, then only zeros) */
u8_t ip4_addr_netmask_valid(u32_t netmask)
|
{
u32_t mask;
u32_t nm_hostorder = lwip_htonl(netmask);
for (mask = 1UL << 31 ; mask != 0; mask >>= 1) {
if ((nm_hostorder & mask) == 0) {
break;
}
}
for (; mask != 0; mask >>= 1) {
if ((nm_hostorder & mask) != 0) {
return 0;
}
}
return 1;
}
|
apopple/Pandaboard-FreeRTOS
|
C++
| null | 25
|
/* Returns: (transfer full): a #GFileInfo, or NULL on error. */
|
GFileInfo* g_file_input_stream_query_info(GFileInputStream *stream, const char *attributes, GCancellable *cancellable, GError **error)
|
/* Returns: (transfer full): a #GFileInfo, or NULL on error. */
GFileInfo* g_file_input_stream_query_info(GFileInputStream *stream, const char *attributes, GCancellable *cancellable, GError **error)
|
{
GFileInputStreamClass *class;
GInputStream *input_stream;
GFileInfo *info;
g_return_val_if_fail (G_IS_FILE_INPUT_STREAM (stream), NULL);
input_stream = G_INPUT_STREAM (stream);
if (!g_input_stream_set_pending (input_stream, error))
return NULL;
info = NULL;
if (cancellable)
g_cancellable_push_current (cancellable);
class = G_FILE_INPUT_STREAM_GET_CLASS (stream);
if (class->query_info)
info = class->query_info (stream, attributes, cancellable, error);
else
g_set_error_literal (error, G_IO_ERROR, G_IO_ERROR_NOT_SUPPORTED,
_("Stream doesn't support query_info"));
if (cancellable)
g_cancellable_pop_current (cancellable);
g_input_stream_clear_pending (input_stream);
return info;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* USART Clock initialization function.
Enables register interface and peripheral clock */
|
void TARGET_IO_CLOCK_init()
|
/* USART Clock initialization function.
Enables register interface and peripheral clock */
void TARGET_IO_CLOCK_init()
|
{
hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_CORE, CONF_GCLK_SERCOM3_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_SLOW, CONF_GCLK_SERCOM3_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
hri_mclk_set_APBBMASK_SERCOM3_bit(MCLK);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* This function must be called before any other functions is used. It will initialize the driver. */
|
static void LeafLightLibFuncInitializeLibrary(void)
|
/* This function must be called before any other functions is used. It will initialize the driver. */
static void LeafLightLibFuncInitializeLibrary(void)
|
{
assert(leafLightLibFuncInitializeLibraryPtr != NULL);
assert(leafLightDllHandle != NULL);
if ((leafLightLibFuncInitializeLibraryPtr != NULL) && (leafLightDllHandle != NULL))
{
leafLightLibFuncInitializeLibraryPtr();
}
}
|
feaser/openblt
|
C++
|
GNU General Public License v3.0
| 601
|
/* Scrolls multiple rows of pixels, yStart to yEnd, one column to the left.
The column that is scrolled out of the left side of the LCD will be displayed the right side of the LCD. y = 0 is at the top-left of the LCD screen. */
|
void halLcdHScroll(int yStart, int yEnd)
|
/* Scrolls multiple rows of pixels, yStart to yEnd, one column to the left.
The column that is scrolled out of the left side of the LCD will be displayed the right side of the LCD. y = 0 is at the top-left of the LCD screen. */
void halLcdHScroll(int yStart, int yEnd)
|
{
int i ;
for (i = yStart; i < yEnd+1; i++)
halLcdScrollRow(i);
}
|
apopple/Pandaboard-FreeRTOS
|
C++
| null | 25
|
/* Forcibly disable the regulator output voltage or current. NOTE: this */
|
int regulator_force_disable(struct regulator *regulator)
|
/* Forcibly disable the regulator output voltage or current. NOTE: this */
int regulator_force_disable(struct regulator *regulator)
|
{
int ret;
mutex_lock(®ulator->rdev->mutex);
regulator->uA_load = 0;
ret = _regulator_force_disable(regulator->rdev);
mutex_unlock(®ulator->rdev->mutex);
return ret;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Set the directions an object can be dragged in */
|
void lv_obj_set_drag_dir(lv_obj_t *obj, lv_drag_dir_t drag_dir)
|
/* Set the directions an object can be dragged in */
void lv_obj_set_drag_dir(lv_obj_t *obj, lv_drag_dir_t drag_dir)
|
{
obj->drag_dir = drag_dir;
if(obj->drag_dir != 0) lv_obj_set_drag(obj, true);
}
|
alibaba/AliOS-Things
|
C++
|
Apache License 2.0
| 4,536
|
/* This routine is called by the kernel to write a single character to the tty device. If the kernel uses this routine, it must call the flush_chars() routine (if defined) when it is done stuffing characters into the driver. */
|
static int sclp_vt220_put_char(struct tty_struct *tty, unsigned char ch)
|
/* This routine is called by the kernel to write a single character to the tty device. If the kernel uses this routine, it must call the flush_chars() routine (if defined) when it is done stuffing characters into the driver. */
static int sclp_vt220_put_char(struct tty_struct *tty, unsigned char ch)
|
{
return __sclp_vt220_write(&ch, 1, 0, 0, 1);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* It is hooked before NF_IP_PRI_NAT_SRC at the NF_INET_POST_ROUTING chain, and is used for VS/NAT. It detects packets for VS/NAT connections and sends the packets immediately. This can avoid that iptable_nat mangles the packets for VS/NAT. */
|
static unsigned int ip_vs_post_routing(unsigned int hooknum, struct sk_buff *skb, const struct net_device *in, const struct net_device *out, int(*okfn)(struct sk_buff *))
|
/* It is hooked before NF_IP_PRI_NAT_SRC at the NF_INET_POST_ROUTING chain, and is used for VS/NAT. It detects packets for VS/NAT connections and sends the packets immediately. This can avoid that iptable_nat mangles the packets for VS/NAT. */
static unsigned int ip_vs_post_routing(unsigned int hooknum, struct sk_buff *skb, const struct net_device *in, const struct net_device *out, int(*okfn)(struct sk_buff *))
|
{
if (!skb->ipvs_property)
return NF_ACCEPT;
return NF_STOP;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* An extra deinit hook that enables the RuntimeDxe library instance to register VirtualAddress change callbacks. Among other things. */
|
EFI_STATUS VariablePolicyExtraDeinit(VOID)
|
/* An extra deinit hook that enables the RuntimeDxe library instance to register VirtualAddress change callbacks. Among other things. */
EFI_STATUS VariablePolicyExtraDeinit(VOID)
|
{
EFI_STATUS Status;
Status = EFI_SUCCESS;
if (mIsVirtualAddrConverted) {
Status = gBS->CloseEvent (mVariablePolicyLibVirtualAddressChangeEvent);
} else {
Status = EFI_SUCCESS;
}
return Status;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* master send target length data use interrupt mode. */
|
int32_t spi_master_write_stream(spi_t *obj, char *tx_buffer, uint32_t length)
|
/* master send target length data use interrupt mode. */
int32_t spi_master_write_stream(spi_t *obj, char *tx_buffer, uint32_t length)
|
{
uint8_t spi_idx = obj->spi_idx &0x0F;
PHAL_SSI_ADAPTOR ssi_adapter = &ssi_adapter_g[spi_idx];
int32_t ret;
if (obj->state & SPI_STATE_TX_BUSY) {
DBG_PRINTF(MODULE_SPI, LEVEL_WARN, "spim int tx: state(0x%x) is not ready\r\n",
obj->state);
return HAL_BUSY;
}
obj->state |= SPI_STATE_TX_BUSY;
if ((ret=ssi_int_write(ssi_adapter, (u8 *) tx_buffer, length)) != _TRUE) {
obj->state &= ~SPI_STATE_TX_BUSY;
}
return (ret == _TRUE) ? HAL_OK : HAL_BUSY;
}
|
alibaba/AliOS-Things
|
C++
|
Apache License 2.0
| 4,536
|
/* lock the FMC bank1 operation this function can be used for GD32F10x_XD and GD32F10x_CL with flash more than 512KB. */
|
void fmc_bank1_lock(void)
|
/* lock the FMC bank1 operation this function can be used for GD32F10x_XD and GD32F10x_CL with flash more than 512KB. */
void fmc_bank1_lock(void)
|
{
FMC_CTL1 |= FMC_CTL1_LK;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Retrieves the entry point to the PE/COFF image specified by Pe32Data and returns this entry point in EntryPoint. If the entry point could not be retrieved from the PE/COFF image, then return RETURN_INVALID_PARAMETER. Otherwise return RETURN_SUCCESS. If Pe32Data is NULL, then ASSERT(). If EntryPoint is NULL, then ASSERT(). */
|
RETURN_STATUS EFIAPI PeCoffLoaderGetEntryPoint(IN VOID *Pe32Data, IN OUT VOID **EntryPoint)
|
/* Retrieves the entry point to the PE/COFF image specified by Pe32Data and returns this entry point in EntryPoint. If the entry point could not be retrieved from the PE/COFF image, then return RETURN_INVALID_PARAMETER. Otherwise return RETURN_SUCCESS. If Pe32Data is NULL, then ASSERT(). If EntryPoint is NULL, then ASSERT(). */
RETURN_STATUS EFIAPI PeCoffLoaderGetEntryPoint(IN VOID *Pe32Data, IN OUT VOID **EntryPoint)
|
{
EMU_THUNK_PPI *ThunkPpi;
EFI_STATUS Status;
EMU_THUNK_PROTOCOL *Thunk;
Status = PeiServicesLocatePpi (
&gEmuThunkPpiGuid,
0,
NULL,
(VOID **)&ThunkPpi
);
ASSERT_EFI_ERROR (Status);
Thunk = (EMU_THUNK_PROTOCOL *)ThunkPpi->Thunk ();
return Thunk->PeCoffGetEntryPoint (Pe32Data, EntryPoint);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Adds a sap to the LLC's station sap list. */
|
static void llc_add_sap(struct llc_sap *sap)
|
/* Adds a sap to the LLC's station sap list. */
static void llc_add_sap(struct llc_sap *sap)
|
{
list_add_tail(&sap->node, &llc_sap_list);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Read a value of size @size from offset @offset within the configuration space of the device identified by the bus, device & function numbers in @bdf on the PCI bus @bus. */
|
static int pci_generic_ecam_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size)
|
/* Read a value of size @size from offset @offset within the configuration space of the device identified by the bus, device & function numbers in @bdf on the PCI bus @bus. */
static int pci_generic_ecam_read_config(struct udevice *bus, pci_dev_t bdf, uint offset, ulong *valuep, enum pci_size_t size)
|
{
return pci_generic_mmap_read_config(bus, pci_generic_ecam_conf_address,
bdf, offset, valuep, size);
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* Update the global current fid / vid values from the status msr. Returns 1 on error. */
|
static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
|
/* Update the global current fid / vid values from the status msr. Returns 1 on error. */
static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
|
{
u32 lo, hi;
u32 i = 0;
if (cpu_family == CPU_HW_PSTATE) {
rdmsr(MSR_PSTATE_STATUS, lo, hi);
i = lo & HW_PSTATE_MASK;
data->currpstate = i;
if ((boot_cpu_data.x86 == 0x11) && (i >= data->numps))
data->currpstate = HW_PSTATE_0;
return 0;
}
do {
if (i++ > 10000) {
dprintk("detected change pending stuck\n");
return 1;
}
rdmsr(MSR_FIDVID_STATUS, lo, hi);
} while (lo & MSR_S_LO_CHANGE_PENDING);
data->currvid = hi & MSR_S_HI_CURRENT_VID;
data->currfid = lo & MSR_S_LO_CURRENT_FID;
return 0;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* XXX It's not clear to me how this is safely serialized with socket destruction. Maybe it should bail if it sees SOCK_DEAD. */
|
void rds_send_drop_acked(struct rds_connection *conn, u64 ack, is_acked_func is_acked)
|
/* XXX It's not clear to me how this is safely serialized with socket destruction. Maybe it should bail if it sees SOCK_DEAD. */
void rds_send_drop_acked(struct rds_connection *conn, u64 ack, is_acked_func is_acked)
|
{
struct rds_message *rm, *tmp;
unsigned long flags;
LIST_HEAD(list);
spin_lock_irqsave(&conn->c_lock, flags);
list_for_each_entry_safe(rm, tmp, &conn->c_retrans, m_conn_item) {
if (!rds_send_is_acked(rm, ack, is_acked))
break;
list_move(&rm->m_conn_item, &list);
clear_bit(RDS_MSG_ON_CONN, &rm->m_flags);
}
if (!list_empty(&list))
smp_mb__after_clear_bit();
spin_unlock_irqrestore(&conn->c_lock, flags);
rds_send_remove_from_sock(&list, RDS_RDMA_SUCCESS);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Called by main module to notify the LL that the device is no longer available for use. */
|
void gigaset_isdn_stop(struct cardstate *cs)
|
/* Called by main module to notify the LL that the device is no longer available for use. */
void gigaset_isdn_stop(struct cardstate *cs)
|
{
struct gigaset_capi_ctr *iif = cs->iif;
capi_ctr_down(&iif->ctr);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* If DateTime1 is NULL, then return -2. If DateTime2 is NULL, then return -2. If DateTime1 == DateTime2, then return 0 If DateTime1 > DateTime2, then return 1 If DateTime1 < DateTime2, then return -1 */
|
INT32 EFIAPI CryptoServiceX509CompareDateTime(IN CONST VOID *DateTime1, IN CONST VOID *DateTime2)
|
/* If DateTime1 is NULL, then return -2. If DateTime2 is NULL, then return -2. If DateTime1 == DateTime2, then return 0 If DateTime1 > DateTime2, then return 1 If DateTime1 < DateTime2, then return -1 */
INT32 EFIAPI CryptoServiceX509CompareDateTime(IN CONST VOID *DateTime1, IN CONST VOID *DateTime2)
|
{
return CALL_BASECRYPTLIB (X509.Services.CompareDateTime, X509CompareDateTime, (DateTime1, DateTime2), FALSE);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Set a default value for the SPI delay time configuration structure. */
|
int32_t SPI_DelayStructInit(stc_spi_delay_t *pstcDelayConfig)
|
/* Set a default value for the SPI delay time configuration structure. */
int32_t SPI_DelayStructInit(stc_spi_delay_t *pstcDelayConfig)
|
{
int32_t i32Ret = LL_ERR_INVD_PARAM;
if (NULL != pstcDelayConfig) {
pstcDelayConfig->u32IntervalDelay = SPI_INTERVAL_TIME_1SCK;
pstcDelayConfig->u32ReleaseDelay = SPI_RELEASE_TIME_1SCK;
pstcDelayConfig->u32SetupDelay = SPI_SETUP_TIME_1SCK;
i32Ret = LL_OK;
}
return i32Ret;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Turns on creation and storage of HAL type results. */
|
inv_error_t inv_enable_hal_outputs(void)
|
/* Turns on creation and storage of HAL type results. */
inv_error_t inv_enable_hal_outputs(void)
|
{
inv_error_t result;
inv_init_hal_outputs();
result = inv_register_mpl_start_notification(inv_start_hal_outputs);
return result;
}
|
Luos-io/luos_engine
|
C++
|
MIT License
| 496
|
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