docstring
stringlengths 22
576
| signature
stringlengths 9
317
| prompt
stringlengths 57
886
| code
stringlengths 20
1.36k
| repository
stringclasses 49
values | language
stringclasses 2
values | license
stringclasses 9
values | stars
int64 15
21.3k
|
|---|---|---|---|---|---|---|---|
/* Returns: 0 on success (all glocks acquired), errno on failure (no glocks acquired) */
|
int gfs2_glock_nq_m(unsigned int num_gh, struct gfs2_holder *ghs)
|
/* Returns: 0 on success (all glocks acquired), errno on failure (no glocks acquired) */
int gfs2_glock_nq_m(unsigned int num_gh, struct gfs2_holder *ghs)
|
{
struct gfs2_holder *tmp[4];
struct gfs2_holder **pph = tmp;
int error = 0;
switch(num_gh) {
case 0:
return 0;
case 1:
ghs->gh_flags &= ~(LM_FLAG_TRY | GL_ASYNC);
return gfs2_glock_nq(ghs);
default:
if (num_gh <= 4)
break;
pph = kmalloc(num_gh * sizeof(struct gfs2_holder *), GFP_NOFS);
if (!pph)
return -ENOMEM;
}
error = nq_m_sync(num_gh, ghs, pph);
if (pph != tmp)
kfree(pph);
return error;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Some registers can be accessed through the bit field clear and bit field set to avoid a read modify write cycle. Register bit field Set */
|
static void nolock_reg_bfset(struct enc28j60_net *priv, u8 addr, u8 mask)
|
/* Some registers can be accessed through the bit field clear and bit field set to avoid a read modify write cycle. Register bit field Set */
static void nolock_reg_bfset(struct enc28j60_net *priv, u8 addr, u8 mask)
|
{
enc28j60_set_bank(priv, addr);
spi_write_op(priv, ENC28J60_BIT_FIELD_SET, addr, mask);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Given an inode, search for an open context with the desired characteristics */
|
struct nfs_open_context* nfs_find_open_context(struct inode *inode, struct rpc_cred *cred, fmode_t mode)
|
/* Given an inode, search for an open context with the desired characteristics */
struct nfs_open_context* nfs_find_open_context(struct inode *inode, struct rpc_cred *cred, fmode_t mode)
|
{
struct nfs_inode *nfsi = NFS_I(inode);
struct nfs_open_context *pos, *ctx = NULL;
spin_lock(&inode->i_lock);
list_for_each_entry(pos, &nfsi->open_files, list) {
if (cred != NULL && pos->cred != cred)
continue;
if ((pos->mode & mode) == mode) {
ctx = get_nfs_open_context(pos);
break;
}
}
spin_unlock(&inode->i_lock);
return ctx;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* This function checks if a given frequency range in kHz is valid for the hardware supported by the driver. */
|
static int elanfreq_verify(struct cpufreq_policy *policy)
|
/* This function checks if a given frequency range in kHz is valid for the hardware supported by the driver. */
static int elanfreq_verify(struct cpufreq_policy *policy)
|
{
return cpufreq_frequency_table_verify(policy, &elanfreq_table[0]);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Returns CR_OK upon successfull completion, an error code otherwise. */
|
enum CRStatus cr_simple_sel_dump(CRSimpleSel *a_this, FILE *a_fp)
|
/* Returns CR_OK upon successfull completion, an error code otherwise. */
enum CRStatus cr_simple_sel_dump(CRSimpleSel *a_this, FILE *a_fp)
|
{
guchar *tmp_str = NULL;
g_return_val_if_fail (a_fp, CR_BAD_PARAM_ERROR);
if (a_this) {
tmp_str = cr_simple_sel_to_string (a_this);
if (tmp_str) {
fprintf (a_fp, "%s", tmp_str);
g_free (tmp_str);
tmp_str = NULL;
}
}
return CR_OK;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* This function is useless; it's fine to call g_timer_start() on an already-started timer to reset the start time, so g_timer_reset() serves no purpose. */
|
void g_timer_reset(GTimer *timer)
|
/* This function is useless; it's fine to call g_timer_start() on an already-started timer to reset the start time, so g_timer_reset() serves no purpose. */
void g_timer_reset(GTimer *timer)
|
{
g_return_if_fail (timer != NULL);
timer->start = g_get_monotonic_time ();
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Enter FlexCAN Freeze Mode.
This function makes the FlexCAN work under Freeze Mode. */
|
static void FLEXCAN_EnterFreezeMode(CAN_Type *base)
|
/* Enter FlexCAN Freeze Mode.
This function makes the FlexCAN work under Freeze Mode. */
static void FLEXCAN_EnterFreezeMode(CAN_Type *base)
|
{
base->MCR |= CAN_MCR_FRZ_MASK;
base->MCR |= CAN_MCR_HALT_MASK;
while (!(base->MCR & CAN_MCR_FRZACK_MASK))
{
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Registers an interrupt handler for the timer interrupt. */
|
void TimerIntRegister(unsigned long ulBase, unsigned long ulTimer, void(*pfnHandler)(void))
|
/* Registers an interrupt handler for the timer interrupt. */
void TimerIntRegister(unsigned long ulBase, unsigned long ulTimer, void(*pfnHandler)(void))
|
{
ASSERT(TimerBaseValid(ulBase));
ASSERT((ulTimer == TIMER_A) || (ulTimer == TIMER_B) ||
(ulTimer == TIMER_BOTH));
ulBase = ((ulBase == TIMERA0_BASE) ? INT_TIMERA0A :
((ulBase == TIMERA1_BASE) ? INT_TIMERA1A :
((ulBase == TIMERA2_BASE) ? INT_TIMERA2A : INT_TIMERA3A)));
if(ulTimer & TIMER_A)
{
IntRegister(ulBase, pfnHandler);
IntEnable(ulBase);
}
if(ulTimer & TIMER_B)
{
IntRegister(ulBase + 1, pfnHandler);
IntEnable(ulBase + 1);
}
}
|
micropython/micropython
|
C++
|
Other
| 18,334
|
/* Enter each coroutine that was previously marked for restart by qemu_co_queue_next() or qemu_co_queue_restart_all(). This function is invoked by the core coroutine code when the current coroutine yields or terminates. */
|
void qemu_co_queue_run_restart(Coroutine *co)
|
/* Enter each coroutine that was previously marked for restart by qemu_co_queue_next() or qemu_co_queue_restart_all(). This function is invoked by the core coroutine code when the current coroutine yields or terminates. */
void qemu_co_queue_run_restart(Coroutine *co)
|
{
Coroutine *next;
trace_qemu_co_queue_run_restart(co);
while ((next = QTAILQ_FIRST(&co->co_queue_wakeup))) {
QTAILQ_REMOVE(&co->co_queue_wakeup, next, co_queue_next);
qemu_coroutine_enter(next, NULL);
}
}
|
ve3wwg/teensy3_qemu
|
C
|
Other
| 15
|
/* Frees a option list. If it contains strings, the strings are freed as well. */
|
void free_option_parameters(QEMUOptionParameter *list)
|
/* Frees a option list. If it contains strings, the strings are freed as well. */
void free_option_parameters(QEMUOptionParameter *list)
|
{
QEMUOptionParameter *cur = list;
while (cur && cur->name) {
if (cur->type == OPT_STRING) {
g_free(cur->value.s);
}
cur++;
}
g_free(list);
}
|
ve3wwg/teensy3_qemu
|
C++
|
Other
| 15
|
/* Decrement the link count on an inode & log the change. If this causes the link count to go to zero, initiate the logging activity required to truncate a file. */
|
int xfs_droplink(xfs_trans_t *tp, xfs_inode_t *ip)
|
/* Decrement the link count on an inode & log the change. If this causes the link count to go to zero, initiate the logging activity required to truncate a file. */
int xfs_droplink(xfs_trans_t *tp, xfs_inode_t *ip)
|
{
int error;
xfs_ichgtime(ip, XFS_ICHGTIME_CHG);
ASSERT (ip->i_d.di_nlink > 0);
ip->i_d.di_nlink--;
drop_nlink(VFS_I(ip));
xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE);
error = 0;
if (ip->i_d.di_nlink == 0) {
error = xfs_iunlink(tp, ip);
}
return error;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* This element is encoded exactly as the Frequency List information element, except that it has a fixed length instead of a variable length and does not contain a length indicator and that it shall not be encoded in bitmap 0 format. */
|
static guint16 de_rr_freq_short_list(tvbuff_t *tvb, proto_tree *tree, packet_info *pinfo, guint32 offset, guint len _U_, gchar *add_string _U_, int string_len _U_)
|
/* This element is encoded exactly as the Frequency List information element, except that it has a fixed length instead of a variable length and does not contain a length indicator and that it shall not be encoded in bitmap 0 format. */
static guint16 de_rr_freq_short_list(tvbuff_t *tvb, proto_tree *tree, packet_info *pinfo, guint32 offset, guint len _U_, gchar *add_string _U_, int string_len _U_)
|
{
return dissect_arfcn_list(tvb, tree, pinfo, offset, 9, add_string, string_len);
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* returns state of I2C SCL and SDA lines. b = SCL, b = SDA Call soc specific routine to read GPIO pad input. Why? We can get the pins from our PINCTRL info but we do not know which pin is I2C clock and which pin is I2C data. There's no ordering in PINCTRL DT unless we impose an order. */
|
static uint32_t get_lines(const struct device *dev)
|
/* returns state of I2C SCL and SDA lines. b = SCL, b = SDA Call soc specific routine to read GPIO pad input. Why? We can get the pins from our PINCTRL info but we do not know which pin is I2C clock and which pin is I2C data. There's no ordering in PINCTRL DT unless we impose an order. */
static uint32_t get_lines(const struct device *dev)
|
{
const struct i2c_xec_config *cfg =
(const struct i2c_xec_config *const) (dev->config);
struct i2c_smb_regs *regs = (struct i2c_smb_regs *)cfg->base_addr;
uint8_t port = regs->CFG & MCHP_I2C_SMB_CFG_PORT_SEL_MASK;
uint32_t lines = 0u;
soc_i2c_port_lines_get(port, &lines);
return lines;
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* This function moves an active device into down state. A NETDEV_GOING_DOWN is sent to the netdev notifier chain. The device is then deactivated and finally a NETDEV_DOWN is sent to the notifier chain. */
|
int dev_close(struct net_device *dev)
|
/* This function moves an active device into down state. A NETDEV_GOING_DOWN is sent to the netdev notifier chain. The device is then deactivated and finally a NETDEV_DOWN is sent to the notifier chain. */
int dev_close(struct net_device *dev)
|
{
const struct net_device_ops *ops = dev->netdev_ops;
ASSERT_RTNL();
might_sleep();
if (!(dev->flags & IFF_UP))
return 0;
call_netdevice_notifiers(NETDEV_GOING_DOWN, dev);
clear_bit(__LINK_STATE_START, &dev->state);
smp_mb__after_clear_bit();
dev_deactivate(dev);
if (ops->ndo_stop)
ops->ndo_stop(dev);
dev->flags &= ~IFF_UP;
call_netdevice_notifiers(NETDEV_DOWN, dev);
net_dmaengine_put();
return 0;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Control Endpoint Process when overflow condition has occurred. */
|
static void udd_ctrl_overflow(void *pointer)
|
/* Control Endpoint Process when overflow condition has occurred. */
static void udd_ctrl_overflow(void *pointer)
|
{
struct usb_endpoint_callback_parameter *ep_callback_para = (struct usb_endpoint_callback_parameter*)pointer;
if (UDD_EPCTRL_DATA_IN == udd_ep_control_state) {
udd_ep_control_state = UDD_EPCTRL_HANDSHAKE_WAIT_OUT_ZLP;
} else if (UDD_EPCTRL_HANDSHAKE_WAIT_IN_ZLP == udd_ep_control_state) {
usb_device_endpoint_set_halt(&usb_device, ep_callback_para->endpoint_address);
}
}
|
memfault/zero-to-main
|
C++
| null | 200
|
/* In order to read a register from the EEPROM, we need to shift 'count' bits in from the EEPROM. Bits are "shifted in" by raising the clock input to the EEPROM (setting the SK bit), and then reading the value of the data out "DO" bit. During this "shifting in" process the data in "DI" bit should always be clear. */
|
static u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count)
|
/* In order to read a register from the EEPROM, we need to shift 'count' bits in from the EEPROM. Bits are "shifted in" by raising the clock input to the EEPROM (setting the SK bit), and then reading the value of the data out "DO" bit. During this "shifting in" process the data in "DI" bit should always be clear. */
static u16 e1000_shift_in_eec_bits(struct e1000_hw *hw, u16 count)
|
{
u32 eecd;
u32 i;
u16 data;
eecd = er32(EECD);
eecd &= ~(E1000_EECD_DO | E1000_EECD_DI);
data = 0;
for (i = 0; i < count; i++) {
data <<= 1;
e1000_raise_eec_clk(hw, &eecd);
eecd = er32(EECD);
eecd &= ~E1000_EECD_DI;
if (eecd & E1000_EECD_DO)
data |= 1;
e1000_lower_eec_clk(hw, &eecd);
}
return data;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Report if there is any pending messages in the queue. */
|
bool mxt_is_message_pending(struct mxt_device *device)
|
/* Report if there is any pending messages in the queue. */
bool mxt_is_message_pending(struct mxt_device *device)
|
{
if (ioport_get_pin_level(device->chgpin) == false) {
return true;
} else {
return false;
}
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* Get the current state of a button on a joystick */
|
Uint8 SDL_JoystickGetButton(SDL_Joystick *joystick, int button)
|
/* Get the current state of a button on a joystick */
Uint8 SDL_JoystickGetButton(SDL_Joystick *joystick, int button)
|
{
Uint8 state;
if ( ! ValidJoystick(&joystick) ) {
return(0);
}
if ( button < joystick->nbuttons ) {
state = joystick->buttons[button];
} else {
SDL_SetError("Joystick only has %d buttons",joystick->nbuttons);
state = 0;
}
return(state);
}
|
DC-SWAT/DreamShell
|
C++
| null | 404
|
/* param base SSARC_LP peripheral base address. param groupID The index of the group. Range from 0 to 15. param mode. Software trigger mode. Please refer to ssarc_software_trigger_mode_t for details. */
|
void SSARC_TriggerSoftwareRequest(SSARC_LP_Type *base, uint8_t groupID, ssarc_software_trigger_mode_t mode)
|
/* param base SSARC_LP peripheral base address. param groupID The index of the group. Range from 0 to 15. param mode. Software trigger mode. Please refer to ssarc_software_trigger_mode_t for details. */
void SSARC_TriggerSoftwareRequest(SSARC_LP_Type *base, uint8_t groupID, ssarc_software_trigger_mode_t mode)
|
{
assert(groupID < SSARC_LP_DESC_CTRL0_COUNT);
base->GROUPS[groupID].DESC_CTRL1 |= (uint32_t)mode;
while (((base->GROUPS[groupID].DESC_CTRL1) & (uint32_t)mode) != 0UL)
{
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Restores the current floating point/SSE/SSE2 state from the buffer specified by Buffer. Buffer must be aligned on a 16-byte boundary. This function is only available on IA-32 and x64. */
|
VOID EFIAPI InternalX86FxRestore(IN CONST IA32_FX_BUFFER *Buffer)
|
/* Restores the current floating point/SSE/SSE2 state from the buffer specified by Buffer. Buffer must be aligned on a 16-byte boundary. This function is only available on IA-32 and x64. */
VOID EFIAPI InternalX86FxRestore(IN CONST IA32_FX_BUFFER *Buffer)
|
{
_asm {
mov eax, Buffer
fxrstor [eax]
}
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* This is defined the same way as the libc and compiler builtin ffs routines, therefore differs in spirit from the above ffz (man ffs). */
|
int ls1b_ffs(int x)
|
/* This is defined the same way as the libc and compiler builtin ffs routines, therefore differs in spirit from the above ffz (man ffs). */
int ls1b_ffs(int x)
|
{
int r = 1;
if (!x)
return 0;
if (!(x & 0xffff)) {
x >>= 16;
r += 16;
}
if (!(x & 0xff)) {
x >>= 8;
r += 8;
}
if (!(x & 0xf)) {
x >>= 4;
r += 4;
}
if (!(x & 3)) {
x >>= 2;
r += 2;
}
if (!(x & 1)) {
x >>= 1;
r += 1;
}
return r;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* If any reserved bits in Address are set, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */
|
UINT32 EFIAPI PciSegmentBitFieldOr32(IN UINT64 Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 OrData)
|
/* If any reserved bits in Address are set, then ASSERT(). If StartBit is greater than 31, then ASSERT(). If EndBit is greater than 31, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */
UINT32 EFIAPI PciSegmentBitFieldOr32(IN UINT64 Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT32 OrData)
|
{
return PciSegmentWrite32 (
Address,
BitFieldOr32 (PciSegmentRead32 (Address), StartBit, EndBit, OrData)
);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Build a memory descriptor according to an entry. */
|
VOID BuildMemoryDescriptor(IN OUT EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Descriptor, IN EFI_GCD_MAP_ENTRY *Entry)
|
/* Build a memory descriptor according to an entry. */
VOID BuildMemoryDescriptor(IN OUT EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Descriptor, IN EFI_GCD_MAP_ENTRY *Entry)
|
{
Descriptor->BaseAddress = Entry->BaseAddress;
Descriptor->Length = Entry->EndAddress - Entry->BaseAddress + 1;
Descriptor->Capabilities = Entry->Capabilities;
Descriptor->Attributes = Entry->Attributes;
Descriptor->GcdMemoryType = Entry->GcdMemoryType;
Descriptor->ImageHandle = Entry->ImageHandle;
Descriptor->DeviceHandle = Entry->DeviceHandle;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* This function will examines, changes, or examines and changes the signal mask of the calling thread.
SIG_SETMASK The set of blocked signals is set to the argument set. */
|
int sigprocmask(int how, const sigset_t *set, sigset_t *oset)
|
/* This function will examines, changes, or examines and changes the signal mask of the calling thread.
SIG_SETMASK The set of blocked signals is set to the argument set. */
int sigprocmask(int how, const sigset_t *set, sigset_t *oset)
|
{
rt_base_t level;
rt_thread_t tid;
tid = rt_thread_self();
level = rt_hw_interrupt_disable();
if (oset) *oset = tid->sig_mask;
if (set)
{
switch(how)
{
case SIG_BLOCK:
tid->sig_mask |= *set;
break;
case SIG_UNBLOCK:
tid->sig_mask &= ~*set;
break;
case SIG_SETMASK:
tid->sig_mask = *set;
break;
default:
break;
}
}
rt_hw_interrupt_enable(level);
return 0;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* USART Set Stop Bit(s).
The stop bits are specified as 0.5, 1, 1.5 or 2. */
|
void usart_set_stopbits(uint32_t usart, uint32_t stopbits)
|
/* USART Set Stop Bit(s).
The stop bits are specified as 0.5, 1, 1.5 or 2. */
void usart_set_stopbits(uint32_t usart, uint32_t stopbits)
|
{
uint32_t reg32;
reg32 = USART_CR2(usart);
reg32 = (reg32 & ~USART_CR2_STOPBITS_MASK) | stopbits;
USART_CR2(usart) = reg32;
}
|
insane-adding-machines/unicore-mx
|
C++
|
GNU General Public License v3.0
| 50
|
/* Returns third word of the unique device identifier (UID based on 96 bits) */
|
u32 Get_ChipsetUIDw2(void)
|
/* Returns third word of the unique device identifier (UID based on 96 bits) */
u32 Get_ChipsetUIDw2(void)
|
{
return(READ_REG(*((vu32*)(UID_BASE + 8U))));
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* See mss_uart.h for details of how to use this function. */
|
void MSS_UART_enable_afclear(mss_uart_instance_t *this_uart)
|
/* See mss_uart.h for details of how to use this function. */
void MSS_UART_enable_afclear(mss_uart_instance_t *this_uart)
|
{
ASSERT((this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1));
if((this_uart == &g_mss_uart0) || (this_uart == &g_mss_uart1))
{
set_bit_reg8(&this_uart->hw_reg->MM2,EAFC);
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Simple character classification routines, corresponding to POSIX class names and ASCII encoding. */
|
STATIC BOOLEAN IsAlnum(IN CHAR8 Chr)
|
/* Simple character classification routines, corresponding to POSIX class names and ASCII encoding. */
STATIC BOOLEAN IsAlnum(IN CHAR8 Chr)
|
{
return (('0' <= Chr && Chr <= '9') ||
('A' <= Chr && Chr <= 'Z') ||
('a' <= Chr && Chr <= 'z')
);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* This function returns next sequence number to use, which is just the current global sequence counter value. It also increases the global sequence counter. */
|
static unsigned long long next_sqnum(struct ubi_device *ubi)
|
/* This function returns next sequence number to use, which is just the current global sequence counter value. It also increases the global sequence counter. */
static unsigned long long next_sqnum(struct ubi_device *ubi)
|
{
unsigned long long sqnum;
spin_lock(&ubi->ltree_lock);
sqnum = ubi->global_sqnum++;
spin_unlock(&ubi->ltree_lock);
return sqnum;
}
|
EmcraftSystems/u-boot
|
C++
|
Other
| 181
|
/* priv->iw_mode is set in add_interface, but add_interface is never called for monitor mode. The only way mac80211 informs us about monitor mode is through configuring filters (call to configure_filter). */
|
bool iwl_is_monitor_mode(struct iwl_priv *priv)
|
/* priv->iw_mode is set in add_interface, but add_interface is never called for monitor mode. The only way mac80211 informs us about monitor mode is through configuring filters (call to configure_filter). */
bool iwl_is_monitor_mode(struct iwl_priv *priv)
|
{
return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* One notified function to cleanup the allocated DMA buffers at EndOfPei. */
|
EFI_STATUS EFIAPI AhciPeimEndOfPei(IN EFI_PEI_SERVICES **PeiServices, IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor, IN VOID *Ppi)
|
/* One notified function to cleanup the allocated DMA buffers at EndOfPei. */
EFI_STATUS EFIAPI AhciPeimEndOfPei(IN EFI_PEI_SERVICES **PeiServices, IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor, IN VOID *Ppi)
|
{
PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;
Private = GET_AHCI_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY (NotifyDescriptor);
AhciFreeDmaResource (Private);
return EFI_SUCCESS;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Disables the I2C slave block. This will disable operation of the I2C slave block. */
|
void xI2CSlaveDisable(unsigned long ulBase)
|
/* Disables the I2C slave block. This will disable operation of the I2C slave block. */
void xI2CSlaveDisable(unsigned long ulBase)
|
{
xASSERT((ulBase == I2C0_BASE) || (ulBase == I2C1_BASE));
xHWREG(ulBase + I2C_CON) &= ~I2C_CON_ENS1;
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* This function will clear the display. All pixels in the display will be turned off. */
|
void OSRAMClear(void)
|
/* This function will clear the display. All pixels in the display will be turned off. */
void OSRAMClear(void)
|
{
static const unsigned char pucRow1[] =
{
0xb0, 0x80, 0x04, 0x80, 0x12, 0x40
};
static const unsigned char pucRow2[] =
{
0xb1, 0x80, 0x04, 0x80, 0x12, 0x40
};
unsigned long ulIdx;
OSRAMWriteFirst(0x80);
OSRAMWriteArray(pucRow1, sizeof(pucRow1));
for(ulIdx = 0; ulIdx < 95; ulIdx++)
{
OSRAMWriteByte(0x00);
}
OSRAMWriteFinal(0x00);
OSRAMWriteFirst(0x80);
OSRAMWriteArray(pucRow2, sizeof(pucRow2));
for(ulIdx = 0; ulIdx < 95; ulIdx++)
{
OSRAMWriteByte(0x00);
}
OSRAMWriteFinal(0x00);
}
|
apopple/Pandaboard-FreeRTOS
|
C++
| null | 25
|
/* If StartAddress > 0x0FFFFFFF, then ASSERT(). If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). If Size > 0 and Buffer is NULL, then ASSERT(). */
|
UINTN EFIAPI PciReadBuffer(IN UINTN StartAddress, IN UINTN Size, OUT VOID *Buffer)
|
/* If StartAddress > 0x0FFFFFFF, then ASSERT(). If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT(). If Size > 0 and Buffer is NULL, then ASSERT(). */
UINTN EFIAPI PciReadBuffer(IN UINTN StartAddress, IN UINTN Size, OUT VOID *Buffer)
|
{
return PciCf8ReadBuffer (StartAddress, Size, Buffer);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* DPM callback used to know user choice about Data Role Swap. */
|
USBPD_StatusTypeDef USBPD_DPM_EvaluateDataRoleSwap(uint8_t PortNum)
|
/* DPM callback used to know user choice about Data Role Swap. */
USBPD_StatusTypeDef USBPD_DPM_EvaluateDataRoleSwap(uint8_t PortNum)
|
{
USBPD_StatusTypeDef status = USBPD_REJECT;
if (USBPD_TRUE == DPM_USER_Settings[PortNum].PE_DataSwap)
{
status = USBPD_ACCEPT;
}
return status;
}
|
st-one/X-CUBE-USB-PD
|
C++
| null | 110
|
/* iwl_sta_tx_modify_enable_tid - Enable Tx for this TID in station table */
|
void iwl_sta_tx_modify_enable_tid(struct iwl_priv *priv, int sta_id, int tid)
|
/* iwl_sta_tx_modify_enable_tid - Enable Tx for this TID in station table */
void iwl_sta_tx_modify_enable_tid(struct iwl_priv *priv, int sta_id, int tid)
|
{
unsigned long flags;
spin_lock_irqsave(&priv->sta_lock, flags);
priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
spin_unlock_irqrestore(&priv->sta_lock, flags);
iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Allocates the number bytes specified by AllocationSize of a certain pool type and returns a pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the request, then NULL is returned. */
|
VOID* InternalVarCheckAllocatePool(IN EFI_MEMORY_TYPE MemoryType, IN UINTN AllocationSize)
|
/* Allocates the number bytes specified by AllocationSize of a certain pool type and returns a pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the request, then NULL is returned. */
VOID* InternalVarCheckAllocatePool(IN EFI_MEMORY_TYPE MemoryType, IN UINTN AllocationSize)
|
{
EFI_STATUS Status;
VOID *Memory;
Status = gBS->AllocatePool (MemoryType, AllocationSize, &Memory);
if (EFI_ERROR (Status)) {
Memory = NULL;
}
return Memory;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Get the current state of a GPIO input pin */
|
static int lpc178x_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
|
/* Get the current state of a GPIO input pin */
static int lpc178x_gpio_get_value(struct gpio_chip *chip, unsigned gpio)
|
{
return (LPC178X_GPIO(LPC178X_GPIO_GETPORT(gpio))->fiopin >>
LPC178X_GPIO_GETPIN(gpio)) & 1;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Although the QE can control the modem control lines (e.g. CTS), this driver currently doesn't support that, so we always return Carrier Detect, Data Set Ready, and Clear To Send. */
|
static unsigned int qe_uart_get_mctrl(struct uart_port *port)
|
/* Although the QE can control the modem control lines (e.g. CTS), this driver currently doesn't support that, so we always return Carrier Detect, Data Set Ready, and Clear To Send. */
static unsigned int qe_uart_get_mctrl(struct uart_port *port)
|
{
return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Enables the specified DAC channel DMA request. When enabled DMA1 is generated when an external trigger (EINT Line9, TMR2, TMR3, TMR6 or TMR15 but not a software trigger) occurs. */
|
void DAC_EnableDMA(DAC_CHANNEL_T channel)
|
/* Enables the specified DAC channel DMA request. When enabled DMA1 is generated when an external trigger (EINT Line9, TMR2, TMR3, TMR6 or TMR15 but not a software trigger) occurs. */
void DAC_EnableDMA(DAC_CHANNEL_T channel)
|
{
if (channel == DAC_CHANNEL_1)
{
DAC->CTRL_B.DMAENCH1 = SET;
}
else
{
DAC->CTRL_B.DMAENCH2 = SET;
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Perform hardware setup to enable ticks from timer 1, */
|
static void prvSetupTimerInterrupt(void)
|
/* Perform hardware setup to enable ticks from timer 1, */
static void prvSetupTimerInterrupt(void)
|
{
const uint16_t usReloadValue = ( uint16_t ) ( ( ( configPER_CLOCK_HZ / configTICK_RATE_HZ ) / 32UL ) - 1UL );
TMCSR0_CNTE = 0;
TMCSR0_CSL = 0x2;
TMCSR0_MOD = 0;
TMCSR0_RELD = 1;
TMCSR0_UF = 0;
TMRLR0 = usReloadValue;
TMCSR0_INTE = 1;
TMCSR0_CNTE = 1;
TMCSR0_TRG = 1;
PORTEN = 0x3;
}
|
labapart/polymcu
|
C++
| null | 201
|
/* If the caller has registered a client discovery callback, this allow him to receive the full content of the discovery log through this callback (as normally he will receive only new discoveries). */
|
void irlmp_discovery_request(int nslots)
|
/* If the caller has registered a client discovery callback, this allow him to receive the full content of the discovery log through this callback (as normally he will receive only new discoveries). */
void irlmp_discovery_request(int nslots)
|
{
irlmp_discovery_confirm(irlmp->cachelog, DISCOVERY_LOG);
if (!sysctl_discovery) {
if (nslots == DISCOVERY_DEFAULT_SLOTS)
nslots = sysctl_discovery_slots;
irlmp_do_discovery(nslots);
}
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* This function flushes cache over qTD pair for particular endpoint. */
|
static void ci_flush_qtd(int ep_num)
|
/* This function flushes cache over qTD pair for particular endpoint. */
static void ci_flush_qtd(int ep_num)
|
{
struct ept_queue_item *item = ci_get_qtd(ep_num, 0);
const unsigned long start = (unsigned long)item;
const unsigned long end = start + 2 * ILIST_ENT_SZ;
flush_dcache_range(start, end);
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* param base DCP peripheral base address param handle Handle used for the request. param algo Underlaying algorithm to use for hash computation. param input Input data param inputSize Size of input data in bytes param output Output hash data param outputSize Output parameter storing the size of the output hash in bytes return Status of the one call hash operation. */
|
status_t DCP_HASH(DCP_Type *base, dcp_handle_t *handle, dcp_hash_algo_t algo, const uint8_t *input, size_t inputSize, uint8_t *output, size_t *outputSize)
|
/* param base DCP peripheral base address param handle Handle used for the request. param algo Underlaying algorithm to use for hash computation. param input Input data param inputSize Size of input data in bytes param output Output hash data param outputSize Output parameter storing the size of the output hash in bytes return Status of the one call hash operation. */
status_t DCP_HASH(DCP_Type *base, dcp_handle_t *handle, dcp_hash_algo_t algo, const uint8_t *input, size_t inputSize, uint8_t *output, size_t *outputSize)
|
{
dcp_hash_ctx_t hashCtx = {0};
status_t status;
status = DCP_HASH_Init(base, handle, &hashCtx, algo);
if (status != kStatus_Success)
{
return status;
}
status = DCP_HASH_Update(base, &hashCtx, input, inputSize);
if (status != kStatus_Success)
{
return status;
}
status = DCP_HASH_Finish(base, &hashCtx, output, outputSize);
return status;
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* TIM MSP Initialization This function configures the hardware resources used in this example: */
|
void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim)
|
/* TIM MSP Initialization This function configures the hardware resources used in this example: */
void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim)
|
{
GPIO_InitTypeDef GPIO_InitStruct;
TIMx_CLK_ENABLE();
TIMx_CHANNEL_GPIO_PORT();
GPIO_InitStruct.Pin = GPIO_PIN_CHANNEL2;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF_TIMx;
HAL_GPIO_Init(GPIO_PORT, &GPIO_InitStruct);
HAL_NVIC_SetPriority(TIMx_IRQn, 0, 1);
HAL_NVIC_EnableIRQ(TIMx_IRQn);
}
|
STMicroelectronics/STM32CubeF4
|
C++
|
Other
| 789
|
/* Return TRUE of FALSE to indicate whether or not we've reached the end of the file we're parsing. */
|
BOOLEAN SFPIsEOF(VOID)
|
/* Return TRUE of FALSE to indicate whether or not we've reached the end of the file we're parsing. */
BOOLEAN SFPIsEOF(VOID)
|
{
SkipWhiteSpace (&mGlobals.SourceFile);
return EndOfFile (&mGlobals.SourceFile);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* ZigBee ZCL Occupancy Sensing cluster dissector for wireshark. */
|
static int dissect_zbee_zcl_occ_sen(tvbuff_t *tvb _U_, packet_info *pinfo _U_, proto_tree *tree _U_, void *data _U_)
|
/* ZigBee ZCL Occupancy Sensing cluster dissector for wireshark. */
static int dissect_zbee_zcl_occ_sen(tvbuff_t *tvb _U_, packet_info *pinfo _U_, proto_tree *tree _U_, void *data _U_)
|
{
return tvb_captured_length(tvb);
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Initializes SLCD Automated Character configurations struct to defaults.
Initailizes SLCD Automated Character configuration struct to predefined safe default settings. */
|
void slcd_automated_char_get_config_default(struct slcd_automated_char_config *config)
|
/* Initializes SLCD Automated Character configurations struct to defaults.
Initailizes SLCD Automated Character configuration struct to predefined safe default settings. */
void slcd_automated_char_get_config_default(struct slcd_automated_char_config *config)
|
{
Assert(config);
config->order = SLCD_AUTOMATED_CHAR_START_FROM_BOTTOM_RIGHT;
config->fc = SLCD_FRAME_COUNTER_0;
config->mode = SLCD_AUTOMATED_CHAR_SEQ;
config->seg_line_num = 0;
config->start_seg_line = 0;
config->row_digit_num = 1;
config->digit_num = 0;
config->scrolling_step = 1;
config->com_line_num = 1;
config->data_mask = 0;
}
|
memfault/zero-to-main
|
C++
| null | 200
|
/* Manages the sleep mode following the USBHS state. */
|
static void uhd_sleep_mode(enum uhd_usbhs_state_enum new_state)
|
/* Manages the sleep mode following the USBHS state. */
static void uhd_sleep_mode(enum uhd_usbhs_state_enum new_state)
|
{
enum sleepmgr_mode sleep_mode[] = {
SLEEPMGR_BACKUP,
SLEEPMGR_WAIT_FAST,
SLEEPMGR_SLEEP_WFI,
SLEEPMGR_SLEEP_WFI,
SLEEPMGR_WAIT_FAST,
SLEEPMGR_SLEEP_WFI,
};
static enum uhd_usbhs_state_enum uhd_state = UHD_STATE_OFF;
if (uhd_state == new_state) {
return;
}
if (new_state != UHD_STATE_OFF) {
sleepmgr_lock_mode(sleep_mode[new_state]);
}
if (uhd_state != UHD_STATE_OFF) {
sleepmgr_unlock_mode(sleep_mode[uhd_state]);
}
uhd_state = new_state;
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* Description: If the PCI slot is frozen, hold off all I/O activity; then, as soon as the slot is available again, initiate an adapter reset. */
|
static int ipr_reset_freeze(struct ipr_cmnd *ipr_cmd)
|
/* Description: If the PCI slot is frozen, hold off all I/O activity; then, as soon as the slot is available again, initiate an adapter reset. */
static int ipr_reset_freeze(struct ipr_cmnd *ipr_cmd)
|
{
ipr_cmd->ioa_cfg->allow_interrupts = 0;
list_add_tail(&ipr_cmd->queue, &ipr_cmd->ioa_cfg->pending_q);
ipr_cmd->done = ipr_reset_ioa_job;
return IPR_RC_JOB_RETURN;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* This function checks and sets those values and skb->ip_summed: if this returns false you should drop the packet. */
|
bool skb_partial_csum_set(struct sk_buff *skb, u16 start, u16 off)
|
/* This function checks and sets those values and skb->ip_summed: if this returns false you should drop the packet. */
bool skb_partial_csum_set(struct sk_buff *skb, u16 start, u16 off)
|
{
if (unlikely(start > skb_headlen(skb)) ||
unlikely((int)start + off > skb_headlen(skb) - 2)) {
if (net_ratelimit())
printk(KERN_WARNING
"bad partial csum: csum=%u/%u len=%u\n",
start, off, skb_headlen(skb));
return false;
}
skb->ip_summed = CHECKSUM_PARTIAL;
skb->csum_start = skb_headroom(skb) + start;
skb->csum_offset = off;
return true;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* The guest has exited. See if we can fix it or if we need userspace assistance. */
|
static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
|
/* The guest has exited. See if we can fix it or if we need userspace assistance. */
static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
|
{
u32 exit_reason = kvm_get_exit_reason(vcpu);
vcpu->arch.last_exit = exit_reason;
if (exit_reason < kvm_vti_max_exit_handlers
&& kvm_vti_exit_handlers[exit_reason])
return kvm_vti_exit_handlers[exit_reason](vcpu, kvm_run);
else {
kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
kvm_run->hw.hardware_exit_reason = exit_reason;
}
return 0;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* The pthread_cancel(), pthread_setcancelstate(), and pthread_setcanceltype() functions are defined to be async-cancel safe. */
|
int pthread_setcancelstate(int state, int *oldstate)
|
/* The pthread_cancel(), pthread_setcancelstate(), and pthread_setcanceltype() functions are defined to be async-cancel safe. */
int pthread_setcancelstate(int state, int *oldstate)
|
{
_pthread_data_t *ptd;
if (rt_thread_self() == NULL) return EINVAL;
ptd = (_pthread_data_t *)rt_thread_self()->pthread_data;
RT_ASSERT(ptd != RT_NULL);
if ((state == PTHREAD_CANCEL_ENABLE) || (state == PTHREAD_CANCEL_DISABLE))
{
if (oldstate)
*oldstate = ptd->cancelstate;
ptd->cancelstate = state;
return 0;
}
return EINVAL;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Returns a offset of first node which includes the given property name and value. */
|
INT32 EFIAPI FdtNodeOffsetByPropValue(IN CONST VOID *Fdt, IN INT32 StartOffset, IN CONST CHAR8 *PropertyName, IN CONST VOID *PropertyValue, IN INT32 PropertyLength)
|
/* Returns a offset of first node which includes the given property name and value. */
INT32 EFIAPI FdtNodeOffsetByPropValue(IN CONST VOID *Fdt, IN INT32 StartOffset, IN CONST CHAR8 *PropertyName, IN CONST VOID *PropertyValue, IN INT32 PropertyLength)
|
{
return fdt_node_offset_by_prop_value (Fdt, StartOffset, PropertyName, PropertyValue, PropertyLength);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Verify that when not using auto-negotitation that MDI/MDIx is correctly set, which is forced to MDI mode only. */
|
s32 igb_validate_mdi_setting(struct e1000_hw *hw)
|
/* Verify that when not using auto-negotitation that MDI/MDIx is correctly set, which is forced to MDI mode only. */
s32 igb_validate_mdi_setting(struct e1000_hw *hw)
|
{
s32 ret_val = 0;
if (!hw->mac.autoneg && (hw->phy.mdix == 0 || hw->phy.mdix == 3)) {
hw_dbg("Invalid MDI setting detected\n");
hw->phy.mdix = 1;
ret_val = -E1000_ERR_CONFIG;
goto out;
}
out:
return ret_val;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Fabric is being deleted, awaiting vport delete completions. */
|
static void bfa_fcs_fabric_sm_deleting(struct bfa_fcs_fabric_s *fabric, enum bfa_fcs_fabric_event event)
|
/* Fabric is being deleted, awaiting vport delete completions. */
static void bfa_fcs_fabric_sm_deleting(struct bfa_fcs_fabric_s *fabric, enum bfa_fcs_fabric_event event)
|
{
bfa_trc(fabric->fcs, fabric->bport.port_cfg.pwwn);
bfa_trc(fabric->fcs, event);
switch (event) {
case BFA_FCS_FABRIC_SM_DELCOMP:
bfa_sm_set_state(fabric, bfa_fcs_fabric_sm_uninit);
bfa_fcs_modexit_comp(fabric->fcs);
break;
case BFA_FCS_FABRIC_SM_LINK_UP:
break;
case BFA_FCS_FABRIC_SM_LINK_DOWN:
bfa_fcs_fabric_notify_offline(fabric);
break;
default:
bfa_sm_fault(fabric->fcs, event);
}
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* SYSCTRL IIR3 Bus&Function Clock Disable and Reset Assert. */
|
void LL_SYSCTRL_IIR3_ClkDisRstAssert(void)
|
/* SYSCTRL IIR3 Bus&Function Clock Disable and Reset Assert. */
void LL_SYSCTRL_IIR3_ClkDisRstAssert(void)
|
{
__LL_SYSCTRL_CTRLReg_Unlock(SYSCTRL);
__LL_SYSCTRL_IIR3BusClk_Dis(SYSCTRL);
__LL_SYSCTRL_IIR3FunClk_Dis(SYSCTRL);
__LL_SYSCTRL_IIR3SoftRst_Assert(SYSCTRL);
__LL_SYSCTRL_Reg_Lock(SYSCTRL);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* If the conversion results in an overflow or an underflow condition, then Result is set to UINT8_ERROR and RETURN_BUFFER_TOO_SMALL is returned. */
|
RETURN_STATUS EFIAPI SafeUint32ToUint8(IN UINT32 Operand, OUT UINT8 *Result)
|
/* If the conversion results in an overflow or an underflow condition, then Result is set to UINT8_ERROR and RETURN_BUFFER_TOO_SMALL is returned. */
RETURN_STATUS EFIAPI SafeUint32ToUint8(IN UINT32 Operand, OUT UINT8 *Result)
|
{
RETURN_STATUS Status;
if (Result == NULL) {
return RETURN_INVALID_PARAMETER;
}
if (Operand <= MAX_UINT8) {
*Result = (UINT8)Operand;
Status = RETURN_SUCCESS;
} else {
*Result = UINT8_ERROR;
Status = RETURN_BUFFER_TOO_SMALL;
}
return Status;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* generate the binary format of the rc5 frame */
|
static uint16_t rc5_bin_frame_generation(uint8_t rc5_address, uint8_t rc5_instruction, rc5_ctrl_enum rc5_ctrl)
|
/* generate the binary format of the rc5 frame */
static uint16_t rc5_bin_frame_generation(uint8_t rc5_address, uint8_t rc5_instruction, rc5_ctrl_enum rc5_ctrl)
|
{
uint16_t star1 = 0x2000;
uint16_t star2 = 0x1000;
uint16_t addr = 0;
while(0x00 == send_operation_completed);
if(64 <= rc5_instruction){
star2 = 0;
rc5_instruction &= 0x003F;
}
else{
star2 = 0x1000;
}
send_operation_ready = 0;
rc5_frame_manchester_format = 0;
rc5_frame_binary_format = 0;
addr = ((uint16_t)(rc5_address))<<6;
rc5_frame_binary_format = (star1) | (star2) | (rc5_ctrl) | (addr) | (rc5_instruction);
return(rc5_frame_binary_format);
}
|
liuxuming/trochili
|
C++
|
Apache License 2.0
| 132
|
/* SPI3 interrupt handler. Clear the SPI interrupt flag and execute the callback function.
The */
|
void xSPISSSet(unsigned long ulBase, unsigned long ulSSMode, unsigned long ulSlaveSel)
|
/* SPI3 interrupt handler. Clear the SPI interrupt flag and execute the callback function.
The */
void xSPISSSet(unsigned long ulBase, unsigned long ulSSMode, unsigned long ulSlaveSel)
|
{
xASSERT((ulBase == SPI0_BASE) || (ulBase == SPI1_BASE)||
(ulBase == SPI2_BASE)||(ulBase == SPI3_BASE) );
xASSERT((ulSlaveSel == SPI_SS_NONE) || (ulSlaveSel == SPI_SS0) ||
(ulSlaveSel == SPI_SS1) || (ulSlaveSel == SPI_SS0_SS1));
xHWREG(ulBase + SPI_SSR) |= ulSSMode;
xHWREG(ulBase + SPI_SSR) |= SPI_SSR_SSR;
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* tipc_disc_init_msg - initialize a link setup message @type: message type (request or response) @req_links: number of links associated with message @dest_domain: network domain of node(s) which should respond to message @b_ptr: ptr to bearer issuing message */
|
static struct sk_buff* tipc_disc_init_msg(u32 type, u32 req_links, u32 dest_domain, struct bearer *b_ptr)
|
/* tipc_disc_init_msg - initialize a link setup message @type: message type (request or response) @req_links: number of links associated with message @dest_domain: network domain of node(s) which should respond to message @b_ptr: ptr to bearer issuing message */
static struct sk_buff* tipc_disc_init_msg(u32 type, u32 req_links, u32 dest_domain, struct bearer *b_ptr)
|
{
struct sk_buff *buf = buf_acquire(DSC_H_SIZE);
struct tipc_msg *msg;
if (buf) {
msg = buf_msg(buf);
msg_init(msg, LINK_CONFIG, type, DSC_H_SIZE, dest_domain);
msg_set_non_seq(msg, 1);
msg_set_req_links(msg, req_links);
msg_set_dest_domain(msg, dest_domain);
msg_set_bc_netid(msg, tipc_net_id);
msg_set_media_addr(msg, &b_ptr->publ.addr);
}
return buf;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Use the VMGEXIT instruction to handle a MONITOR event. */
|
STATIC UINT64 MonitorExit(IN OUT GHCB *Ghcb, IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, IN CC_INSTRUCTION_DATA *InstructionData)
|
/* Use the VMGEXIT instruction to handle a MONITOR event. */
STATIC UINT64 MonitorExit(IN OUT GHCB *Ghcb, IN OUT EFI_SYSTEM_CONTEXT_X64 *Regs, IN CC_INSTRUCTION_DATA *InstructionData)
|
{
CcDecodeModRm (Regs, InstructionData);
Ghcb->SaveArea.Rax = Regs->Rax;
CcExitVmgSetOffsetValid (Ghcb, GhcbRax);
Ghcb->SaveArea.Rcx = Regs->Rcx;
CcExitVmgSetOffsetValid (Ghcb, GhcbRcx);
Ghcb->SaveArea.Rdx = Regs->Rdx;
CcExitVmgSetOffsetValid (Ghcb, GhcbRdx);
return CcExitVmgExit (Ghcb, SVM_EXIT_MONITOR, 0, 0);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* The SAX callback must call mxmlRetain() for any nodes that need to be kept for later use. Otherwise, nodes are deleted when the parent node is closed or after each data, comment, CDATA, or directive node. */
|
mxml_node_t* mxmlSAXLoadFile(mxml_node_t *top, FILE *fp, mxml_load_cb_t cb, mxml_sax_cb_t sax_cb, void *sax_data)
|
/* The SAX callback must call mxmlRetain() for any nodes that need to be kept for later use. Otherwise, nodes are deleted when the parent node is closed or after each data, comment, CDATA, or directive node. */
mxml_node_t* mxmlSAXLoadFile(mxml_node_t *top, FILE *fp, mxml_load_cb_t cb, mxml_sax_cb_t sax_cb, void *sax_data)
|
{
return (mxml_load_data(top, fp, cb, mxml_file_getc, sax_cb, sax_data));
}
|
DC-SWAT/DreamShell
|
C++
| null | 404
|
/* Called by rport module to when rports are deleted. */
|
void bfa_fcs_port_del_rport(struct bfa_fcs_port_s *port, struct bfa_fcs_rport_s *rport)
|
/* Called by rport module to when rports are deleted. */
void bfa_fcs_port_del_rport(struct bfa_fcs_port_s *port, struct bfa_fcs_rport_s *rport)
|
{
bfa_assert(bfa_q_is_on_q(&port->rport_q, rport));
list_del(&rport->qe);
port->num_rports--;
bfa_sm_send_event(port, BFA_FCS_PORT_SM_DELRPORT);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Set specified flag to 1 on a UFS device. */
|
EFI_STATUS UfsSetFlag(IN UFS_PASS_THRU_PRIVATE_DATA *Private, IN UINT8 FlagId)
|
/* Set specified flag to 1 on a UFS device. */
EFI_STATUS UfsSetFlag(IN UFS_PASS_THRU_PRIVATE_DATA *Private, IN UINT8 FlagId)
|
{
EFI_STATUS Status;
UINT8 Value;
Value = 1;
Status = UfsRwFlags (Private, FALSE, FlagId, &Value);
return Status;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Completes the Map() operation and releases any corresponding resources. */
|
EFI_STATUS IoMmuUnmap(IN VOID *Mapping)
|
/* Completes the Map() operation and releases any corresponding resources. */
EFI_STATUS IoMmuUnmap(IN VOID *Mapping)
|
{
EFI_STATUS Status;
if (mIoMmu != NULL) {
Status = mIoMmu->SetAttribute (mIoMmu, Mapping, 0);
Status = mIoMmu->Unmap (mIoMmu, Mapping);
} else {
Status = EFI_SUCCESS;
}
return Status;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Selects the clock source to output on MCO pin (PA8) and the corresponding prescsaler. */
|
void RCC_MCOConfig(uint8_t RCC_MCOSource, uint32_t RCC_MCOPrescaler)
|
/* Selects the clock source to output on MCO pin (PA8) and the corresponding prescsaler. */
void RCC_MCOConfig(uint8_t RCC_MCOSource, uint32_t RCC_MCOPrescaler)
|
{
uint32_t tmpreg = 0;
assert_param(IS_RCC_MCO_SOURCE(RCC_MCOSource));
assert_param(IS_RCC_MCO_PRESCALER(RCC_MCOPrescaler));
tmpreg = RCC->CFGR;
tmpreg &= ~(RCC_CFGR_MCO_PRE | RCC_CFGR_MCO | RCC_CFGR_PLLNODIV);
tmpreg |= (RCC_MCOPrescaler | ((uint32_t)RCC_MCOSource<<24));
RCC->CFGR = tmpreg;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Enables or disables the specified ETHERNET MAC interrupts. */
|
void ETH_EnableMacInt(uint32_t ETH_MAC_IT, FunctionalState Cmd)
|
/* Enables or disables the specified ETHERNET MAC interrupts. */
void ETH_EnableMacInt(uint32_t ETH_MAC_IT, FunctionalState Cmd)
|
{
assert_param(IS_ETH_MAC_INT(ETH_MAC_IT));
assert_param(IS_FUNCTIONAL_STATE(Cmd));
if (Cmd != DISABLE)
{
ETH->MACINTMSK &= (~(uint32_t)ETH_MAC_IT);
}
else
{
ETH->MACINTMSK |= ETH_MAC_IT;
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* This function will provide the caller with the specified block device's media information. If the media changes, calling this function will update the media information accordingly. */
|
EFI_STATUS EFIAPI NvmeBlockIoPeimGetMediaInfo(IN EFI_PEI_SERVICES **PeiServices, IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This, IN UINTN DeviceIndex, OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo)
|
/* This function will provide the caller with the specified block device's media information. If the media changes, calling this function will update the media information accordingly. */
EFI_STATUS EFIAPI NvmeBlockIoPeimGetMediaInfo(IN EFI_PEI_SERVICES **PeiServices, IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This, IN UINTN DeviceIndex, OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo)
|
{
PEI_NVME_CONTROLLER_PRIVATE_DATA *Private;
if ((This == NULL) || (MediaInfo == NULL)) {
return EFI_INVALID_PARAMETER;
}
Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_BLKIO (This);
if ((DeviceIndex == 0) || (DeviceIndex > Private->ActiveNamespaceNum)) {
return EFI_INVALID_PARAMETER;
}
MediaInfo->DeviceType = (EFI_PEI_BLOCK_DEVICE_TYPE)EDKII_PEI_BLOCK_DEVICE_TYPE_NVME;
MediaInfo->MediaPresent = TRUE;
MediaInfo->LastBlock = (UINTN)Private->NamespaceInfo[DeviceIndex-1].Media.LastBlock;
MediaInfo->BlockSize = Private->NamespaceInfo[DeviceIndex-1].Media.BlockSize;
return EFI_SUCCESS;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* SMARTCARD MSP Initialization This function configures the hardware resources used in this example: */
|
void HAL_SMARTCARD_MspInit(SMARTCARD_HandleTypeDef *hsc)
|
/* SMARTCARD MSP Initialization This function configures the hardware resources used in this example: */
void HAL_SMARTCARD_MspInit(SMARTCARD_HandleTypeDef *hsc)
|
{
GPIO_InitTypeDef GPIO_InitStruct;
SC_USART_TX_CLK_ENABLE();
SC_USART_CK_CLK_ENABLE();
SC_USART_CLK_ENABLE();
GPIO_InitStruct.Pin = SC_USART_CK_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Alternate = SC_USART_CK_AF;
HAL_GPIO_Init(SC_USART_CK_GPIO_PORT, &GPIO_InitStruct);
GPIO_InitStruct.Pin = SC_USART_TX_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
HAL_GPIO_Init(SC_USART_TX_GPIO_PORT, &GPIO_InitStruct);
HAL_NVIC_SetPriority(SC_USART_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(SC_USART_IRQn);
}
|
STMicroelectronics/STM32CubeF4
|
C++
|
Other
| 789
|
/* Handle an out of memory condition To be improved... */
|
static void xmlBufMemoryError(xmlBufPtr buf, const char *extra)
|
/* Handle an out of memory condition To be improved... */
static void xmlBufMemoryError(xmlBufPtr buf, const char *extra)
|
{
__xmlSimpleError(XML_FROM_BUFFER, XML_ERR_NO_MEMORY, NULL, NULL, extra);
if ((buf) && (buf->error == 0))
buf->error = XML_ERR_NO_MEMORY;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* NOTE: This call will fail if the architectural ResetSystem underpinnings are not initialized. For DXE, you can add gEfiResetArchProtocolGuid to your DEPEX. */
|
VOID EFIAPI ResetSystemWithSubtype(IN EFI_RESET_TYPE ResetType, IN CONST GUID *ResetSubtype)
|
/* NOTE: This call will fail if the architectural ResetSystem underpinnings are not initialized. For DXE, you can add gEfiResetArchProtocolGuid to your DEPEX. */
VOID EFIAPI ResetSystemWithSubtype(IN EFI_RESET_TYPE ResetType, IN CONST GUID *ResetSubtype)
|
{
RESET_UTILITY_GUID_SPECIFIC_RESET_DATA ResetData;
ResetData.NullTerminator = CHAR_NULL;
CopyGuid (
(GUID *)((UINT8 *)&ResetData + OFFSET_OF (RESET_UTILITY_GUID_SPECIFIC_RESET_DATA, ResetSubtype)),
ResetSubtype
);
ResetSystem (ResetType, EFI_SUCCESS, sizeof (ResetData), &ResetData);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* This is the entry point for the bootloader application and is called by the reset interrupt vector after the C-startup routines executed. */
|
void main(void)
|
/* This is the entry point for the bootloader application and is called by the reset interrupt vector after the C-startup routines executed. */
void main(void)
|
{
Init();
SharedParamsInit();
NetInit();
BootComInit();
SharedParamsWriteByIndex(0, 0);
while (1)
{
LedToggle();
NetTask();
BootComCheckActivationRequest();
}
}
|
feaser/openblt
|
C++
|
GNU General Public License v3.0
| 601
|
/* removes all content from buffers of low level driver */
|
static void sclp_tty_flush_buffer(struct tty_struct *tty)
|
/* removes all content from buffers of low level driver */
static void sclp_tty_flush_buffer(struct tty_struct *tty)
|
{
if (sclp_tty_chars_count > 0) {
sclp_tty_write_string(sclp_tty_chars, sclp_tty_chars_count, 0);
sclp_tty_chars_count = 0;
}
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Get the peripheral clock speed for the I2C device at base specified. */
|
uint32_t rcc_get_i2c_clk_freq(uint32_t i2c __attribute__((unused)))
|
/* Get the peripheral clock speed for the I2C device at base specified. */
uint32_t rcc_get_i2c_clk_freq(uint32_t i2c __attribute__((unused)))
|
{
if (i2c == I2C1_BASE) {
return rcc_usart_i2c_clksel_freq(rcc_apb1_frequency, RCC_DCKCFGR2_I2C1SEL_SHIFT);
} else if (i2c == I2C2_BASE) {
return rcc_usart_i2c_clksel_freq(rcc_apb1_frequency, RCC_DCKCFGR2_I2C2SEL_SHIFT);
} else if (i2c == I2C3_BASE) {
return rcc_usart_i2c_clksel_freq(rcc_apb1_frequency, RCC_DCKCFGR2_I2C3SEL_SHIFT);
} else {
return rcc_usart_i2c_clksel_freq(rcc_apb1_frequency, RCC_DCKCFGR2_I2C4SEL_SHIFT);
}
}
|
libopencm3/libopencm3
|
C++
|
GNU General Public License v3.0
| 2,931
|
/* Return a pool allocated copy of the DTB image that is appropriate for booting the current platform via DT. */
|
EFI_STATUS EFIAPI DtPlatformLoadDtb(OUT VOID **Dtb, OUT UINTN *DtbSize)
|
/* Return a pool allocated copy of the DTB image that is appropriate for booting the current platform via DT. */
EFI_STATUS EFIAPI DtPlatformLoadDtb(OUT VOID **Dtb, OUT UINTN *DtbSize)
|
{
EFI_STATUS Status;
VOID *OrigDtb;
VOID *CopyDtb;
UINTN OrigDtbSize;
Status = GetSectionFromAnyFv (
&gDtPlatformDefaultDtbFileGuid,
EFI_SECTION_RAW,
0,
&OrigDtb,
&OrigDtbSize
);
if (EFI_ERROR (Status)) {
return EFI_NOT_FOUND;
}
CopyDtb = AllocateCopyPool (OrigDtbSize, OrigDtb);
if (CopyDtb == NULL) {
return EFI_OUT_OF_RESOURCES;
}
*Dtb = CopyDtb;
*DtbSize = OrigDtbSize;
return EFI_SUCCESS;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Finds amount of memory required to form a descriptor ring. */
|
uint32_t dmacHw_descriptorLen(uint32_t descCnt)
|
/* Finds amount of memory required to form a descriptor ring. */
uint32_t dmacHw_descriptorLen(uint32_t descCnt)
|
{
return (descCnt * sizeof(dmacHw_DESC_t)) + sizeof(dmacHw_DESC_RING_t) +
sizeof(uint32_t);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Enable The Timer counter as a timer capture. */
|
void TimerCaptureEnable(unsigned long ulBase)
|
/* Enable The Timer counter as a timer capture. */
void TimerCaptureEnable(unsigned long ulBase)
|
{
xASSERT((ulBase == TIMER1_BASE) || (ulBase == TIMER0_BASE));
xHWREG(ulBase + TIMER_O_TEXCON) |= TIMER_TEXCON_TEXEN;
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* aac_sa_disable_interrupt - disable interrupt @dev: Which adapter to enable. */
|
static void aac_sa_disable_interrupt(struct aac_dev *dev)
|
/* aac_sa_disable_interrupt - disable interrupt @dev: Which adapter to enable. */
static void aac_sa_disable_interrupt(struct aac_dev *dev)
|
{
sa_writew(dev, SaDbCSR.PRISETIRQMASK, 0xffff);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Used by both sas_end_device_alloc() and sas_expander_alloc() to initialise the common rphy component of each. */
|
static void sas_rphy_initialize(struct sas_rphy *rphy)
|
/* Used by both sas_end_device_alloc() and sas_expander_alloc() to initialise the common rphy component of each. */
static void sas_rphy_initialize(struct sas_rphy *rphy)
|
{
INIT_LIST_HEAD(&rphy->list);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* xwrite() is the same a write(), but it automatically restarts write() operations with a recoverable error (EAGAIN and EINTR). xwrite() DOES NOT GUARANTEE that "len" bytes is written even if the operation is successful. */
|
static ssize_t xwrite(int fd, const void *buf, size_t len)
|
/* xwrite() is the same a write(), but it automatically restarts write() operations with a recoverable error (EAGAIN and EINTR). xwrite() DOES NOT GUARANTEE that "len" bytes is written even if the operation is successful. */
static ssize_t xwrite(int fd, const void *buf, size_t len)
|
{
ssize_t nr;
while (1) {
nr = write(fd, buf, len);
if ((nr < 0) && (errno == EAGAIN || errno == EINTR))
continue;
return nr;
}
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Randomizes a number (non-blocking). Can fail if a clock error or seed error is detected. Consult the Reference Manual, but "try again", potentially after resetting the peripheral */
|
bool rng_get_random(uint32_t *rand_nr)
|
/* Randomizes a number (non-blocking). Can fail if a clock error or seed error is detected. Consult the Reference Manual, but "try again", potentially after resetting the peripheral */
bool rng_get_random(uint32_t *rand_nr)
|
{
if (RNG_SR & (RNG_SR_CECS | RNG_SR_SECS)) {
return false;
}
if (!(RNG_SR & RNG_SR_DRDY)) {
return false;
}
*rand_nr = RNG_DR;
return true;
}
|
libopencm3/libopencm3
|
C++
|
GNU General Public License v3.0
| 2,931
|
/* Mask DRDY on pin (both XL & Gyro) until filter settling ends (XL and Gyro independently masked).. */
|
int32_t lsm6dso_filter_settling_mask_set(lsm6dso_ctx_t *ctx, uint8_t val)
|
/* Mask DRDY on pin (both XL & Gyro) until filter settling ends (XL and Gyro independently masked).. */
int32_t lsm6dso_filter_settling_mask_set(lsm6dso_ctx_t *ctx, uint8_t val)
|
{
lsm6dso_ctrl4_c_t reg;
int32_t ret;
ret = lsm6dso_read_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
if (ret == 0) {
reg.drdy_mask = val;
ret = lsm6dso_write_reg(ctx, LSM6DSO_CTRL4_C, (uint8_t*)®, 1);
}
return ret;
}
|
alexander-g-dean/ESF
|
C++
| null | 41
|
/* param handle codec handle. param channel audio codec play channel, can be a value or combine value of _codec_play_channel. param isMute true is mute, false is unmute. return kStatus_Success is success, else configure failed. */
|
status_t HAL_CODEC_SetMute(void *handle, uint32_t playChannel, bool isMute)
|
/* param handle codec handle. param channel audio codec play channel, can be a value or combine value of _codec_play_channel. param isMute true is mute, false is unmute. return kStatus_Success is success, else configure failed. */
status_t HAL_CODEC_SetMute(void *handle, uint32_t playChannel, bool isMute)
|
{
assert(handle != NULL);
uint32_t i = 0U;
status_t ret = kStatus_Success;
for (i = 0U; i < kCS42888_AOUT8; i++)
{
if ((playChannel & (1U << i)) == 0U)
{
continue;
}
ret = CS42888_SetChannelMute((cs42888_handle_t *)((uint32_t)(((codec_handle_t *)handle)->codecDevHandle)),
i + 1U, isMute);
if (ret != kStatus_Success)
{
return ret;
}
}
return kStatus_Success;
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* Log an early allocated block and populate the stack trace. */
|
static void early_alloc(struct early_log *log)
|
/* Log an early allocated block and populate the stack trace. */
static void early_alloc(struct early_log *log)
|
{
struct kmemleak_object *object;
unsigned long flags;
int i;
if (!atomic_read(&kmemleak_enabled) || !log->ptr || IS_ERR(log->ptr))
return;
rcu_read_lock();
object = create_object((unsigned long)log->ptr, log->size,
log->min_count, GFP_ATOMIC);
if (!object)
goto out;
spin_lock_irqsave(&object->lock, flags);
for (i = 0; i < log->trace_len; i++)
object->trace[i] = log->trace[i];
object->trace_len = log->trace_len;
spin_unlock_irqrestore(&object->lock, flags);
out:
rcu_read_unlock();
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* USBD_MTP_Itf_GetFreeSpaceInBytes Get free space in bytes in SD card. */
|
static uint64_t USBD_MTP_Itf_GetFreeSpaceInBytes(void)
|
/* USBD_MTP_Itf_GetFreeSpaceInBytes Get free space in bytes in SD card. */
static uint64_t USBD_MTP_Itf_GetFreeSpaceInBytes(void)
|
{
uint64_t f_space_inbytes = 0U;
return f_space_inbytes;
}
|
STMicroelectronics/STM32CubeF4
|
C++
|
Other
| 789
|
/* This function may be called from IRQ context. */
|
void disable_irq_nosync(unsigned int irq)
|
/* This function may be called from IRQ context. */
void disable_irq_nosync(unsigned int irq)
|
{
struct irq_desc *desc = irq_to_desc(irq);
unsigned long flags;
if (!desc)
return;
chip_bus_lock(irq, desc);
raw_spin_lock_irqsave(&desc->lock, flags);
__disable_irq(desc, irq, false);
raw_spin_unlock_irqrestore(&desc->lock, flags);
chip_bus_sync_unlock(irq, desc);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Clear the PWM interrupt flag of the PWM module.
The */
|
void PWMIntFlagClear(unsigned long ulBase, unsigned long ulChannel, unsigned long ulIntType)
|
/* Clear the PWM interrupt flag of the PWM module.
The */
void PWMIntFlagClear(unsigned long ulBase, unsigned long ulChannel, unsigned long ulIntType)
|
{
unsigned long ulChannelTemp;
ulChannelTemp = (ulBase == PWMA_BASE) ? ulChannel : (ulChannel - 4);
xASSERT((ulBase == PWMA_BASE) || (ulBase == PWMB_BASE));
xASSERT(((ulChannelTemp >= 0) || (ulChannelTemp <= 3)));
if (ulIntType & PWM_INT_PWM)
{
xHWREG(ulBase + PWM_PIIR) |= (PWM_PIER_PWMIE0 << ulChannelTemp);
}
if (ulIntType & PWM_INT_DUTY)
{
xHWREG(ulBase + PWM_PIIR) |= (PWM_PIER_PWMDIE0 << ulChannelTemp);
}
if (ulIntType & PWM_INT_CAP_BOTH)
{
xHWREG(ulBase + PWM_CCR0 + (ulChannelTemp << 1)) |=
(PWM_CCR0_CAPIF0 << ((ulChannel % 2) ? 16 : 0)) ;
}
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* Free pages [@page_start and @page_end) in @pages for all units. The pages were allocated for @chunk. */
|
static void pcpu_free_pages(struct pcpu_chunk *chunk, struct page **pages, unsigned long *populated, int page_start, int page_end)
|
/* Free pages [@page_start and @page_end) in @pages for all units. The pages were allocated for @chunk. */
static void pcpu_free_pages(struct pcpu_chunk *chunk, struct page **pages, unsigned long *populated, int page_start, int page_end)
|
{
unsigned int cpu;
int i;
for_each_possible_cpu(cpu) {
for (i = page_start; i < page_end; i++) {
struct page *page = pages[pcpu_page_idx(cpu, i)];
if (page)
__free_page(page);
}
}
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Clears one or more latched fault triggers for a given PWM generator. */
|
void PWMGenFaultClear(unsigned long ulBase, unsigned long ulGen, unsigned long ulGroup, unsigned long ulFaultTriggers)
|
/* Clears one or more latched fault triggers for a given PWM generator. */
void PWMGenFaultClear(unsigned long ulBase, unsigned long ulGen, unsigned long ulGroup, unsigned long ulFaultTriggers)
|
{
ASSERT(HWREG(SYSCTL_DC5) & SYSCTL_DC5_PWMEFLT);
ASSERT(ulBase == PWM_BASE);
ASSERT(PWMGenValid(ulGen));
ASSERT((ulGroup == PWM_FAULT_GROUP_0) || (ulGroup == PWM_FAULT_GROUP_1));
ASSERT((ulFaultTriggers & ~(PWM_FAULT_FAULT0 | PWM_FAULT_FAULT1 |
PWM_FAULT_FAULT2 | PWM_FAULT_FAULT3)) == 0);
if(ulGroup == PWM_FAULT_GROUP_0)
{
HWREG(PWM_GEN_EXT_BADDR(ulBase, ulGen) + PWM_O_X_FLTSTAT0) =
ulFaultTriggers;
}
else
{
HWREG(PWM_GEN_EXT_BADDR(ulBase, ulGen) + PWM_O_X_FLTSTAT1) =
ulFaultTriggers;
}
}
|
watterott/WebRadio
|
C++
| null | 71
|
/* Checks whether the specified RCC flag is set or not. */
|
FlagStatus RCC_GetFlagStatus(RCC_FLAG_TypeDef flag)
|
/* Checks whether the specified RCC flag is set or not. */
FlagStatus RCC_GetFlagStatus(RCC_FLAG_TypeDef flag)
|
{
return ((((flag >> 5) == CR_REG_INDEX) ? RCC->CR : (((flag >> 5) == BDCR_REG_INDEX) ? RCC->BDCR : RCC->CSR)) &
(1 << (flag & 0x1F)))
? SET : RESET;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* special ep0 version of the above. no UBCR0 or double buffering; status handshaking is magic. most device protocols don't need control-OUT. CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other protocols do use them. */
|
static int read_ep0_fifo(struct pxa25x_ep *ep, struct pxa25x_request *req)
|
/* special ep0 version of the above. no UBCR0 or double buffering; status handshaking is magic. most device protocols don't need control-OUT. CDC vendor commands (and RNDIS), mass storage CB/CBI, and some other protocols do use them. */
static int read_ep0_fifo(struct pxa25x_ep *ep, struct pxa25x_request *req)
|
{
u8 *buf, byte;
unsigned bufferspace;
buf = req->req.buf + req->req.actual;
bufferspace = req->req.length - req->req.actual;
while (readl(&ep->dev->regs->udccs[0]) & UDCCS0_RNE) {
byte = (u8)readb(&ep->dev->regs->uddr0);
if (unlikely(bufferspace == 0)) {
if (req->req.status != -EOVERFLOW)
printf("%s overflow\n", ep->ep.name);
req->req.status = -EOVERFLOW;
} else {
*buf++ = byte;
req->req.actual++;
bufferspace--;
}
}
writel(UDCCS0_OPR | UDCCS0_IPR, &ep->dev->regs->udccs[0]);
if (req->req.actual >= req->req.length)
return 1;
return 0;
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* Returns the most recent received data by the SAI block x peripheral. */
|
uint32_t SAI_ReceiveData(SAI_Block_TypeDef *SAI_Block_x)
|
/* Returns the most recent received data by the SAI block x peripheral. */
uint32_t SAI_ReceiveData(SAI_Block_TypeDef *SAI_Block_x)
|
{
assert_param(IS_SAI_BLOCK_PERIPH(SAI_Block_x));
return SAI_Block_x->DR;
}
|
MaJerle/stm32f429
|
C++
| null | 2,036
|
/* handling directory dnode tree - adding, deleteing & searching for dirents */
|
static loff_t get_pos(struct dnode *d, struct hpfs_dirent *fde)
|
/* handling directory dnode tree - adding, deleteing & searching for dirents */
static loff_t get_pos(struct dnode *d, struct hpfs_dirent *fde)
|
{
struct hpfs_dirent *de;
struct hpfs_dirent *de_end = dnode_end_de(d);
int i = 1;
for (de = dnode_first_de(d); de < de_end; de = de_next_de(de)) {
if (de == fde) return ((loff_t) d->self << 4) | (loff_t)i;
i++;
}
printk("HPFS: get_pos: not_found\n");
return ((loff_t)d->self << 4) | (loff_t)1;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Reads the IT status register from the ST25DV. */
|
int32_t BSP_NFCTAG_ReadITSTStatus_Dyn(uint32_t Instance, uint8_t *const pITStatus)
|
/* Reads the IT status register from the ST25DV. */
int32_t BSP_NFCTAG_ReadITSTStatus_Dyn(uint32_t Instance, uint8_t *const pITStatus)
|
{
UNUSED(Instance);
return ST25DV_ReadITSTStatus_Dyn(&NfcTagObj, pITStatus);
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* Control Endpoint translate the data in buffer into Device Request Struct. */
|
static void udd_ctrl_fetch_ram(void)
|
/* Control Endpoint translate the data in buffer into Device Request Struct. */
static void udd_ctrl_fetch_ram(void)
|
{
udd_g_ctrlreq.req.bmRequestType = udd_ctrl_buffer[0];
udd_g_ctrlreq.req.bRequest = udd_ctrl_buffer[1];
udd_g_ctrlreq.req.wValue = ((uint16_t)(udd_ctrl_buffer[3]) << 8) + udd_ctrl_buffer[2];
udd_g_ctrlreq.req.wIndex = ((uint16_t)(udd_ctrl_buffer[5]) << 8) + udd_ctrl_buffer[4];
udd_g_ctrlreq.req.wLength = ((uint16_t)(udd_ctrl_buffer[7]) << 8) + udd_ctrl_buffer[6];
}
|
memfault/zero-to-main
|
C++
| null | 200
|
/* The active part of our cycle counter is only 32-bits wide, and we're treating the difference between two marks as signed. On a 1GHz box, that's about 2 seconds. */
|
void __delay(unsigned long loops)
|
/* The active part of our cycle counter is only 32-bits wide, and we're treating the difference between two marks as signed. On a 1GHz box, that's about 2 seconds. */
void __delay(unsigned long loops)
|
{
long long dummy;
__asm__ __volatile__("gettr tr0, %1\n\t"
"pta $+4, tr0\n\t"
"addi %0, -1, %0\n\t"
"bne %0, r63, tr0\n\t"
"ptabs %1, tr0\n\t":"=r"(loops),
"=r"(dummy)
:"0"(loops));
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Set up a temporary Event Vector Table, so if something bad happens before the kernel is fully started, it doesn't vector off into somewhere we don't know */
|
asmlinkage void __init init_early_exception_vectors(void)
|
/* Set up a temporary Event Vector Table, so if something bad happens before the kernel is fully started, it doesn't vector off into somewhere we don't know */
asmlinkage void __init init_early_exception_vectors(void)
|
{
u32 evt;
SSYNC();
mark_shadow_error();
early_shadow_puts(linux_banner);
early_shadow_stamp();
if (CPUID != bfin_cpuid()) {
early_shadow_puts("Running on wrong machine type, expected");
early_shadow_reg(CPUID, 16);
early_shadow_puts(", but running on");
early_shadow_reg(bfin_cpuid(), 16);
early_shadow_puts("\n");
}
for (evt = EVT2; evt <= EVT15; evt += 4)
bfin_write32(evt, early_trap);
CSYNC();
asm("\tRETI = %0; RETX = %0; RETN = %0;\n"
: : "p"(early_trap));
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Add a new entry to the Event Log. */
|
EFI_STATUS TpmCommLogEvent(IN OUT UINT8 **EventLogPtr, IN OUT UINTN *LogSize, IN UINTN MaxSize, IN TCG_PCR_EVENT_HDR *NewEventHdr, IN UINT8 *NewEventData)
|
/* Add a new entry to the Event Log. */
EFI_STATUS TpmCommLogEvent(IN OUT UINT8 **EventLogPtr, IN OUT UINTN *LogSize, IN UINTN MaxSize, IN TCG_PCR_EVENT_HDR *NewEventHdr, IN UINT8 *NewEventData)
|
{
UINTN NewLogSize;
if ((UINTN)NewEventHdr->EventSize > MAX_UINTN - sizeof (*NewEventHdr)) {
return EFI_OUT_OF_RESOURCES;
}
NewLogSize = sizeof (*NewEventHdr) + NewEventHdr->EventSize;
if (NewLogSize > MaxSize - *LogSize) {
return EFI_OUT_OF_RESOURCES;
}
*EventLogPtr += *LogSize;
*LogSize += NewLogSize;
CopyMem (*EventLogPtr, NewEventHdr, sizeof (*NewEventHdr));
CopyMem (
*EventLogPtr + sizeof (*NewEventHdr),
NewEventData,
NewEventHdr->EventSize
);
return EFI_SUCCESS;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Clear the SPI interrupt flag of the specified SPI port. */
|
void SPIIntFlagClear(unsigned long ulBase, unsigned long ulIntFlags)
|
/* Clear the SPI interrupt flag of the specified SPI port. */
void SPIIntFlagClear(unsigned long ulBase, unsigned long ulIntFlags)
|
{
xASSERT((ulBase == SPI0_BASE) || (ulBase == SPI1_BASE)||
(ulBase == SPI2_BASE) || (ulBase == SPI3_BASE));
xHWREG(ulBase + SPI_STATUS) |= ulIntFlags;
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
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