docstring stringlengths 22 576 | signature stringlengths 9 317 | prompt stringlengths 57 886 | code stringlengths 20 1.36k | repository stringclasses 49
values | language stringclasses 2
values | license stringclasses 9
values | stars int64 15 21.3k |
|---|---|---|---|---|---|---|---|
/* Calculate the prefix length of the IPv4 subnet mask. */ | UINT8 GetSubnetMaskPrefixLength(IN EFI_IPv4_ADDRESS *SubnetMask) | /* Calculate the prefix length of the IPv4 subnet mask. */
UINT8 GetSubnetMaskPrefixLength(IN EFI_IPv4_ADDRESS *SubnetMask) | {
UINT8 Len;
UINT32 ReverseMask;
ReverseMask = SwapBytes32 (*(UINT32 *)&SubnetMask[0]);
ReverseMask = ~ReverseMask;
if ((ReverseMask & (ReverseMask + 1)) != 0) {
return 0;
}
Len = 0;
while (ReverseMask != 0) {
ReverseMask = ReverseMask >> 1;
Len++;
}
return (UINT8)(32 - Len);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Checks whether the CAN interrupt has occurred or not. */ | static INTStatus CheckINTStatus(uint32_t CAN_Reg, uint32_t Int_Bit) | /* Checks whether the CAN interrupt has occurred or not. */
static INTStatus CheckINTStatus(uint32_t CAN_Reg, uint32_t Int_Bit) | {
INTStatus pendingbitstatus = RESET;
if ((CAN_Reg & Int_Bit) != (uint32_t)RESET)
{
pendingbitstatus = SET;
}
else
{
pendingbitstatus = RESET;
}
return pendingbitstatus;
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* Checks if a bus off or bus heavy situation occurred. */ | static bool LeafLightIsBusError(void) | /* Checks if a bus off or bus heavy situation occurred. */
static bool LeafLightIsBusError(void) | {
bool result = false;
uint32_t statusFlags;
if (leafLightCanHandle >= 0)
{
if (LeafLightLibFuncReadStatus(leafLightCanHandle, &statusFlags) == canOK)
{
if ((statusFlags & (canSTAT_BUS_OFF | canSTAT_ERROR_PASSIVE)) != 0)
{
result = true;
}
}
}
return result;
} | feaser/openblt | C++ | GNU General Public License v3.0 | 601 |
/* get a big endian word (32bits) from a pointer
Caller should ensure parameters are valid. */ | uint32_t BytesGetBe32(const void *ptr) | /* get a big endian word (32bits) from a pointer
Caller should ensure parameters are valid. */
uint32_t BytesGetBe32(const void *ptr) | {
const uint8_t *p = (const uint8_t *)ptr;
return (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3];
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Dumps an @import rule statement to a file. */ | void cr_statement_dump_import_rule(CRStatement *a_this, FILE *a_fp, gulong a_indent) | /* Dumps an @import rule statement to a file. */
void cr_statement_dump_import_rule(CRStatement *a_this, FILE *a_fp, gulong a_indent) | {
gchar *str = NULL ;
g_return_if_fail (a_this
&& a_this->type == AT_IMPORT_RULE_STMT
&& a_fp
&& a_this->kind.import_rule);
str = cr_statement_import_rule_to_string (a_this, a_indent) ;
if (str) {
fprintf (a_fp, str) ;
g_free (str) ;
str = NULL ;
}
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Decrements the ref count of the current instance of #CRTerm. If the ref count reaches zero, the instance is destroyed. */ | gboolean cr_term_unref(CRTerm *a_this) | /* Decrements the ref count of the current instance of #CRTerm. If the ref count reaches zero, the instance is destroyed. */
gboolean cr_term_unref(CRTerm *a_this) | {
g_return_val_if_fail (a_this, FALSE);
if (a_this->ref_count) {
a_this->ref_count--;
}
if (a_this->ref_count == 0) {
cr_term_destroy (a_this);
return TRUE;
}
return FALSE;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Initialize the memory management pool for the host controller. */ | USBHC_MEM_POOL* UsbHcInitMemPool(IN EFI_PCI_IO_PROTOCOL *PciIo, IN BOOLEAN Check4G, IN UINT32 Which4G) | /* Initialize the memory management pool for the host controller. */
USBHC_MEM_POOL* UsbHcInitMemPool(IN EFI_PCI_IO_PROTOCOL *PciIo, IN BOOLEAN Check4G, IN UINT32 Which4G) | {
USBHC_MEM_POOL *Pool;
Pool = AllocatePool (sizeof (USBHC_MEM_POOL));
if (Pool == NULL) {
return Pool;
}
Pool->PciIo = PciIo;
Pool->Check4G = Check4G;
Pool->Which4G = Which4G;
Pool->Head = UsbHcAllocMemBlock (Pool, USBHC_MEM_DEFAULT_PAGES);
if (Pool->Head == NULL) {
gBS->FreePool (Pool);
Pool = NULL;
}
return Pool;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* This file will be overwritten when reconfiguring your Atmel Start project. Please copy examples or other code you want to keep to a separate file to avoid losing it when reconfiguring. Example of using ADC_0 to generate waveform. */ | void ADC_0_example(void) | /* This file will be overwritten when reconfiguring your Atmel Start project. Please copy examples or other code you want to keep to a separate file to avoid losing it when reconfiguring. Example of using ADC_0 to generate waveform. */
void ADC_0_example(void) | {
uint8_t buffer[2];
adc_sync_enable_channel(&ADC_0, 0);
while (1) {
adc_sync_read_channel(&ADC_0, 0, buffer, 2);
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* If Address > 0x0FFFFFFF, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). */ | RETURN_STATUS EFIAPI PciCf8RegisterForRuntimeAccess(IN UINTN Address) | /* If Address > 0x0FFFFFFF, then ASSERT(). If the register specified by Address >= 0x100, then ASSERT(). */
RETURN_STATUS EFIAPI PciCf8RegisterForRuntimeAccess(IN UINTN Address) | {
ASSERT_INVALID_PCI_ADDRESS (Address, 0);
return RETURN_SUCCESS;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Enables or disables the RTC registers write protection. */ | void RTC_WriteProtectionCmd(FunctionalState NewState) | /* Enables or disables the RTC registers write protection. */
void RTC_WriteProtectionCmd(FunctionalState NewState) | {
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
RTC->WPR = 0xFF;
}
else
{
RTC->WPR = 0xCA;
RTC->WPR = 0x53;
}
} | MaJerle/stm32f429 | C++ | null | 2,036 |
/* This interrupt indicates that one or more host channels has a pending interrupt. There are multiple conditions that can cause each host channel interrupt. This function determines which conditions have occurred for each host channel interrupt and handles them appropriately. */ | static void dwc2_hc_intr(struct dwc2_hsotg *hsotg) | /* This interrupt indicates that one or more host channels has a pending interrupt. There are multiple conditions that can cause each host channel interrupt. This function determines which conditions have occurred for each host channel interrupt and handles them appropriately. */
static void dwc2_hc_intr(struct dwc2_hsotg *hsotg) | {
u32 haint;
int i;
haint = readl(hsotg->regs + HAINT);
if (dbg_perio()) {
dev_vdbg(hsotg->dev, "%s()\n", __func__);
dev_vdbg(hsotg->dev, "HAINT=%08x\n", haint);
}
for (i = 0; i < hsotg->core_params->host_channels; i++) {
if (haint & (1 << i))
dwc2_hc_n_intr(hsotg, i);
}
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* This function returns TRUE if the device path specified by DevicePath is multi-instance. Otherwise, FALSE is returned. If DevicePath is NULL or invalid, then FALSE is returned. */ | BOOLEAN EFIAPI IsDevicePathMultiInstance(IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath) | /* This function returns TRUE if the device path specified by DevicePath is multi-instance. Otherwise, FALSE is returned. If DevicePath is NULL or invalid, then FALSE is returned. */
BOOLEAN EFIAPI IsDevicePathMultiInstance(IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath) | {
return UefiDevicePathLibIsDevicePathMultiInstance (DevicePath);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* This function initiates TX and RX DMA transfers by enabling DMA channels. */ | void StartTransfers(void) | /* This function initiates TX and RX DMA transfers by enabling DMA channels. */
void StartTransfers(void) | {
LL_USART_EnableDMAReq_RX(USART2);
LL_USART_EnableDMAReq_TX(USART2);
LL_DMA_EnableStream(DMA1, LL_DMA_STREAM_7);
LL_DMA_EnableStream(DMA1, LL_DMA_STREAM_6);
} | STMicroelectronics/STM32CubeF4 | C++ | Other | 789 |
/* param base ENET peripheral base address. param phyAddr The PHY address. param phyReg The PHY register. Range from 0 ~ 31. param operation The write operation. param data The data written to PHY. */ | void ENET_StartSMIWrite(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, enet_mii_write_t operation, uint32_t data) | /* param base ENET peripheral base address. param phyAddr The PHY address. param phyReg The PHY register. Range from 0 ~ 31. param operation The write operation. param data The data written to PHY. */
void ENET_StartSMIWrite(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, enet_mii_write_t operation, uint32_t data) | {
uint32_t mmfr = 0;
mmfr = ENET_MMFR_ST(1) | ENET_MMFR_OP(operation) | ENET_MMFR_PA(phyAddr) | ENET_MMFR_RA(phyReg) | ENET_MMFR_TA(2) |
(data & 0xFFFF);
base->MMFR = mmfr;
} | nanoframework/nf-interpreter | C++ | MIT License | 293 |
/* Configure PTRB register, data in this address will be read out to do the CRYPT calculation. */ | void CRYPT_AddressBConfig(uint16_t AddrB) | /* Configure PTRB register, data in this address will be read out to do the CRYPT calculation. */
void CRYPT_AddressBConfig(uint16_t AddrB) | {
assert_parameters(IS_CRYPT_ADDR(AddrB));
CRYPT->PTRB = AddrB & CRYPT_PTRB_PTRB;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Disable/enable reset for various peripherals and signal sources. */ | void RMU_ResetControl(RMU_Reset_TypeDef reset, bool enable) | /* Disable/enable reset for various peripherals and signal sources. */
void RMU_ResetControl(RMU_Reset_TypeDef reset, bool enable) | {
BITBAND_Peripheral(&(RMU->CTRL), (uint32_t)reset, (uint32_t)enable);
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Allocates the number bytes specified by AllocationSize of type EfiBootServicesData, clears the buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the request, then NULL is returned. */ | VOID* EFIAPI AllocateZeroPool(IN UINTN AllocationSize) | /* Allocates the number bytes specified by AllocationSize of type EfiBootServicesData, clears the buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the request, then NULL is returned. */
VOID* EFIAPI AllocateZeroPool(IN UINTN AllocationSize) | {
return InternalAllocateZeroPool (EfiBootServicesData, AllocationSize);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Forces the TIMx output 1 waveform to active or inactive level. */ | void TIM_ForcedOC1Config(TIM_TypeDef *TIMx, uint16_t TIM_ForcedAction) | /* Forces the TIMx output 1 waveform to active or inactive level. */
void TIM_ForcedOC1Config(TIM_TypeDef *TIMx, uint16_t TIM_ForcedAction) | {
uint16_t tmpccmr1 = 0;
assert_param(IS_TIM_LIST1_PERIPH(TIMx));
assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
tmpccmr1 = TIMx->CCMR1;
tmpccmr1 &= (uint16_t)~TIM_CCMR1_OC1M;
tmpccmr1 |= TIM_ForcedAction;
TIMx->CCMR1 = tmpccmr1;
} | MaJerle/stm32f429 | C++ | null | 2,036 |
/* RTC interrupt handler. Clear the RTC interrupt flag and execute the callback function. */ | void RTC_IRQHandler(void) | /* RTC interrupt handler. Clear the RTC interrupt flag and execute the callback function. */
void RTC_IRQHandler(void) | {
unsigned long ulEventFlags;
ulEventFlags = (xHWREG(RTC_RIIR) & (RTC_RIIR_TIF | RTC_RIIR_AIF));
xHWREG(RTC_RIIR) = ulEventFlags;
if(g_pfnRTCHandlerCallbacks[0] != 0)
{
g_pfnRTCHandlerCallbacks[0](0, 0, ulEventFlags, 0);
}
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* Initialize a memory queue to be empty and valid.
where H is the pointer to Head link-element (oldest element). where T is the pointer to Tail link-element (newest element). where I means the initial link-element, whose mem pointer is DontCare. where A means the A'th link-element, whose mem pointer is b. */ | memq_link_t* memq_init(memq_link_t *link, memq_link_t **head, memq_link_t **tail) | /* Initialize a memory queue to be empty and valid.
where H is the pointer to Head link-element (oldest element). where T is the pointer to Tail link-element (newest element). where I means the initial link-element, whose mem pointer is DontCare. where A means the A'th link-element, whose mem pointer is b. */
memq_link_t* memq_init(memq_link_t *link, memq_link_t **head, memq_link_t **tail) | {
*head = *tail = link;
return link;
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* Dispatch the queue of DPCs. ALL DPCs that have been queued with a DpcTpl value greater than or equal to the current TPL are invoked in the order that they were queued. DPCs with higher DpcTpl values are invoked before DPCs with lower DpcTpl values. */ | EFI_STATUS EFIAPI DpcDispatchDpc(IN EFI_DPC_PROTOCOL *This) | /* Dispatch the queue of DPCs. ALL DPCs that have been queued with a DpcTpl value greater than or equal to the current TPL are invoked in the order that they were queued. DPCs with higher DpcTpl values are invoked before DPCs with lower DpcTpl values. */
EFI_STATUS EFIAPI DpcDispatchDpc(IN EFI_DPC_PROTOCOL *This) | {
EFI_STATUS ReturnStatus;
EFI_TPL OriginalTpl;
EFI_TPL Tpl;
DPC_ENTRY *DpcEntry;
ReturnStatus = EFI_NOT_FOUND;
OriginalTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
if (mDpcQueueDepth > 0) {
for (Tpl = TPL_HIGH_LEVEL; Tpl >= OriginalTpl; Tpl--) {
while (!IsListEmpty (&mDpcQueue[Tpl])) {
DpcEntry = (DPC_ENTRY *)(GetFirstNode (&mDpcQueue[Tpl]));
RemoveEntryList (&DpcEntry->ListEntry);
mDpcQueueDepth--;
gBS->RestoreTPL (Tpl);
(DpcEntry->DpcProcedure)(DpcEntry->DpcContext);
ReturnStatus = EFI_SUCCESS;
gBS->RaiseTPL (TPL_HIGH_LEVEL);
InsertTailList (&mDpcEntryFreeList, &DpcEntry->ListEntry);
}
}
}
gBS->RestoreTPL (OriginalTpl);
return ReturnStatus;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Enables Frame bursting (Only in Half Duplex Mode). When enabled, GMAC allows frame bursting in GMII Half Duplex mode. Reserved in 10/100 and Full-Duplex configurations. */ | void synopGMAC_frame_burst_enable(synopGMACdevice *gmacdev) | /* Enables Frame bursting (Only in Half Duplex Mode). When enabled, GMAC allows frame bursting in GMII Half Duplex mode. Reserved in 10/100 and Full-Duplex configurations. */
void synopGMAC_frame_burst_enable(synopGMACdevice *gmacdev) | {
synopGMACSetBits(gmacdev->MacBase, GmacConfig, GmacFrameBurst);
return;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Wait for HT24Cxx Standby state.
A Stop condition at the end of a Write command triggers the internal Write cycle. */ | void HT24CxxWaitEepromStandbyState(void) | /* Wait for HT24Cxx Standby state.
A Stop condition at the end of a Write command triggers the internal Write cycle. */
void HT24CxxWaitEepromStandbyState(void) | {
xSysCtlDelay(40000);
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* Get the resource associated with BAR number 'BarIndex'. */ | STATIC EFI_STATUS GetBarResource(IN NON_DISCOVERABLE_PCI_DEVICE *Dev, IN UINT8 BarIndex, OUT EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR **Descriptor) | /* Get the resource associated with BAR number 'BarIndex'. */
STATIC EFI_STATUS GetBarResource(IN NON_DISCOVERABLE_PCI_DEVICE *Dev, IN UINT8 BarIndex, OUT EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR **Descriptor) | {
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Desc;
if (BarIndex < Dev->BarOffset) {
return EFI_NOT_FOUND;
}
BarIndex -= (UINT8)Dev->BarOffset;
if (BarIndex >= Dev->BarCount) {
return EFI_UNSUPPORTED;
}
for (Desc = Dev->Device->Resources;
Desc->Desc != ACPI_END_TAG_DESCRIPTOR;
Desc = (VOID *)((UINT8 *)Desc + Desc->Len + 3))
{
if (BarIndex == 0) {
*Descriptor = Desc;
return EFI_SUCCESS;
}
BarIndex -= 1;
}
return EFI_NOT_FOUND;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Frees the SG list from the I2O block request. */ | static void i2o_block_sglist_free(struct i2o_block_request *ireq) | /* Frees the SG list from the I2O block request. */
static void i2o_block_sglist_free(struct i2o_block_request *ireq) | {
enum dma_data_direction direction;
if (rq_data_dir(ireq->req) == READ)
direction = PCI_DMA_FROMDEVICE;
else
direction = PCI_DMA_TODEVICE;
dma_unmap_sg(ireq->dev, ireq->sg_table, ireq->sg_nents, direction);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Calculates the watchdog counter value (wdogcmp0) and scaler (wdogscale) to be installed in the watchdog timer. */ | static int wdt_sifive_convtime(uint32_t timeout, int clk, int *scaler) | /* Calculates the watchdog counter value (wdogcmp0) and scaler (wdogscale) to be installed in the watchdog timer. */
static int wdt_sifive_convtime(uint32_t timeout, int clk, int *scaler) | {
uint64_t cnt;
int i;
cnt = (uint64_t)timeout * clk / 1000;
for (i = 0; i < 16; i++) {
if (cnt <= WDOGCMP_MAX) {
break;
}
cnt >>= 1;
}
if (i == 16) {
LOG_ERR("Invalid timeout value allowed range");
*scaler = WDOGCFG_SCALE_MAX;
return WDOGCMP_MAX;
}
*scaler = i;
return cnt;
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* Commits any cached data to physical non-volatile memory.
Commits the internal SRAM caches to physical non-volatile memory, to ensure that any outstanding cached data is preserved. This function should be called prior to a system reset or shutdown to prevent data loss. */ | enum status_code rww_eeprom_emulator_commit_page_buffer(void) | /* Commits any cached data to physical non-volatile memory.
Commits the internal SRAM caches to physical non-volatile memory, to ensure that any outstanding cached data is preserved. This function should be called prior to a system reset or shutdown to prevent data loss. */
enum status_code rww_eeprom_emulator_commit_page_buffer(void) | {
enum status_code error_code = STATUS_OK;
if (_eeprom_instance.cache_active == false) {
return STATUS_OK;
}
uint8_t cached_logical_page = _eeprom_instance.cache.header.logical_page;
_rww_eeprom_emulator_nvm_commit_cache(
_eeprom_instance.page_map[cached_logical_page]);
barrier();
_eeprom_instance.cache_active = false;
return error_code;
} | memfault/zero-to-main | C++ | null | 200 |
/* rpavscsi_send_crq: - Send a CRQ @hostdata: the adapter @word1: the first 64 bits of the data @word2: the second 64 bits of the data */ | static int rpavscsi_send_crq(struct ibmvscsi_host_data *hostdata, u64 word1, u64 word2) | /* rpavscsi_send_crq: - Send a CRQ @hostdata: the adapter @word1: the first 64 bits of the data @word2: the second 64 bits of the data */
static int rpavscsi_send_crq(struct ibmvscsi_host_data *hostdata, u64 word1, u64 word2) | {
struct vio_dev *vdev = to_vio_dev(hostdata->dev);
return plpar_hcall_norets(H_SEND_CRQ, vdev->unit_address, word1, word2);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* This function is called with no lock held. This function uses the r_ctl and type of the received sequence to find the correct callback function to call to process the sequence. */ | static int lpfc_complete_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, struct lpfc_iocbq *saveq, uint32_t fch_r_ctl, uint32_t fch_type) | /* This function is called with no lock held. This function uses the r_ctl and type of the received sequence to find the correct callback function to call to process the sequence. */
static int lpfc_complete_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring, struct lpfc_iocbq *saveq, uint32_t fch_r_ctl, uint32_t fch_type) | {
int i;
if (pring->prt[0].profile) {
if (pring->prt[0].lpfc_sli_rcv_unsol_event)
(pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
saveq);
return 1;
}
for (i = 0; i < pring->num_mask; i++) {
if ((pring->prt[i].rctl == fch_r_ctl) &&
(pring->prt[i].type == fch_type)) {
if (pring->prt[i].lpfc_sli_rcv_unsol_event)
(pring->prt[i].lpfc_sli_rcv_unsol_event)
(phba, pring, saveq);
return 1;
}
}
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* MAC_ADDRESS_HIGH = 0x????5544 MAC_ADDRESS_LOW = 0x33221100 Where 00-55 are bytes 0-5 of the MAC. */ | static ssize_t cxacru_sysfs_show_mac_address(struct device *dev, struct device_attribute *attr, char *buf) | /* MAC_ADDRESS_HIGH = 0x????5544 MAC_ADDRESS_LOW = 0x33221100 Where 00-55 are bytes 0-5 of the MAC. */
static ssize_t cxacru_sysfs_show_mac_address(struct device *dev, struct device_attribute *attr, char *buf) | {
struct usb_interface *intf = to_usb_interface(dev);
struct usbatm_data *usbatm_instance = usb_get_intfdata(intf);
struct atm_dev *atm_dev = usbatm_instance->atm_dev;
return snprintf(buf, PAGE_SIZE, "%pM\n", atm_dev->esi);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Check whether pointer 'o' points to some value in the stack frame of the current function. Because 'o' may not point to a value in this stack, we cannot compare it with the region boundaries (undefined behaviour in ISO C). */ | static int isinstack(CallInfo *ci, const TValue *o) | /* Check whether pointer 'o' points to some value in the stack frame of the current function. Because 'o' may not point to a value in this stack, we cannot compare it with the region boundaries (undefined behaviour in ISO C). */
static int isinstack(CallInfo *ci, const TValue *o) | {
if (o == s2v(pos))
return 1;
}
return 0;
} | Nicholas3388/LuaNode | C++ | Other | 1,055 |
/* FF: this function returns TRUE if the first 12 bytes in tvb looks like two valid ethernet addresses. FALSE otherwise. */ | static gboolean looks_like_plain_eth(tvbuff_t *tvb _U_) | /* FF: this function returns TRUE if the first 12 bytes in tvb looks like two valid ethernet addresses. FALSE otherwise. */
static gboolean looks_like_plain_eth(tvbuff_t *tvb _U_) | {
const gchar *manuf_name_da;
const gchar *manuf_name_sa;
if (tvb_reported_length_remaining(tvb, 0) < 14) {
return FALSE;
}
manuf_name_da = tvb_get_manuf_name_if_known(tvb, 0);
manuf_name_sa = tvb_get_manuf_name_if_known(tvb, 6);
if (manuf_name_da && manuf_name_sa) {
return TRUE;
}
return FALSE;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Use by IOMMU support to "guess" the right size IOPdir. Formula is something like memsize/(num_iommu * entry_size). */ | int count_parisc_driver(struct parisc_driver *driver) | /* Use by IOMMU support to "guess" the right size IOPdir. Formula is something like memsize/(num_iommu * entry_size). */
int count_parisc_driver(struct parisc_driver *driver) | {
struct match_count m = {
.driver = driver,
.count = 0,
};
for_each_padev(match_and_count, &m);
return m.count;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Number of unread sensor data(TAG + 6 bytes) stored in FIFO.. */ | int32_t lsm6dso_fifo_data_level_get(lsm6dso_ctx_t *ctx, uint16_t *val) | /* Number of unread sensor data(TAG + 6 bytes) stored in FIFO.. */
int32_t lsm6dso_fifo_data_level_get(lsm6dso_ctx_t *ctx, uint16_t *val) | {
lsm6dso_fifo_status1_t fifo_status1;
lsm6dso_fifo_status2_t fifo_status2;
int32_t ret;
ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS1,
(uint8_t*)&fifo_status1, 1);
if (ret == 0) {
ret = lsm6dso_read_reg(ctx, LSM6DSO_FIFO_STATUS2,
(uint8_t*)&fifo_status2, 1);
*val = ((uint16_t)fifo_status2.diff_fifo << 8) +
(uint16_t)fifo_status1.diff_fifo;
}
return ret;
} | alexander-g-dean/ESF | C++ | null | 41 |
/* Enables or disables the DMA Tx Desc time stamp. */ | void ETH_EnableDmaTxDescTimeStamp(ETH_DMADescType *DMATxDesc, FunctionalState Cmd) | /* Enables or disables the DMA Tx Desc time stamp. */
void ETH_EnableDmaTxDescTimeStamp(ETH_DMADescType *DMATxDesc, FunctionalState Cmd) | {
assert_param(IS_FUNCTIONAL_STATE(Cmd));
if (Cmd != DISABLE)
{
DMATxDesc->CtrlOrBufSize |= ETH_DMA_TX_DESC_TTSE;
}
else
{
DMATxDesc->CtrlOrBufSize &= (~(uint32_t)ETH_DMA_TX_DESC_TTSE);
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Temporary logical link Identity (TLLI) Rest of element coded as the value part of the TLLI information element in 3GPP TS 44.018, not including 3GPP TS 44.018 IEI. Temporary Mobile Subscriber Identity (TMSI) Trace Reference */ | static guint16 de_bssgp_trace_ref(tvbuff_t *tvb, proto_tree *tree, packet_info *pinfo _U_, guint32 offset, guint len _U_, gchar *add_string _U_, int string_len _U_) | /* Temporary logical link Identity (TLLI) Rest of element coded as the value part of the TLLI information element in 3GPP TS 44.018, not including 3GPP TS 44.018 IEI. Temporary Mobile Subscriber Identity (TMSI) Trace Reference */
static guint16 de_bssgp_trace_ref(tvbuff_t *tvb, proto_tree *tree, packet_info *pinfo _U_, guint32 offset, guint len _U_, gchar *add_string _U_, int string_len _U_) | {
guint32 curr_offset;
curr_offset = offset;
proto_tree_add_item(tree, hf_bssgp_trace_ref, tvb, curr_offset, 2, ENC_BIG_ENDIAN);
curr_offset+=2;
return(curr_offset-offset);
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* protection_queue_destroy - destroy the protection queue. @ubi: UBI device description object */ | static void protection_queue_destroy(struct ubi_device *ubi) | /* protection_queue_destroy - destroy the protection queue. @ubi: UBI device description object */
static void protection_queue_destroy(struct ubi_device *ubi) | {
int i;
struct ubi_wl_entry *e, *tmp;
for (i = 0; i < UBI_PROT_QUEUE_LEN; ++i) {
list_for_each_entry_safe(e, tmp, &ubi->pq[i], u.list) {
list_del(&e->u.list);
wl_entry_destroy(ubi, e);
}
}
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* UnconfirmedTextMessage-Request ::= SEQUENCE { textMessageSourceDevice BACnetObjectIdentifier, messageClass CHOICE { numeric Unsigned, character CharacterString } OPTIONAL, messagePriority ENUMERATED { normal (0), urgent (1) }, message CharacterString } */ | static guint fUnconfirmedTextMessageRequest(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, guint offset) | /* UnconfirmedTextMessage-Request ::= SEQUENCE { textMessageSourceDevice BACnetObjectIdentifier, messageClass CHOICE { numeric Unsigned, character CharacterString } OPTIONAL, messagePriority ENUMERATED { normal (0), urgent (1) }, message CharacterString } */
static guint fUnconfirmedTextMessageRequest(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, guint offset) | {
return fConfirmedTextMessageRequest(tvb, pinfo, tree, offset);
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Turn a config register offset into the right address in either PCI space or MMIO space to access the control register in question Thankfully this is a configuration operation, so isn't performance critical. */ | static unsigned long siimage_selreg(ide_hwif_t *hwif, int r) | /* Turn a config register offset into the right address in either PCI space or MMIO space to access the control register in question Thankfully this is a configuration operation, so isn't performance critical. */
static unsigned long siimage_selreg(ide_hwif_t *hwif, int r) | {
unsigned long base = (unsigned long)hwif->hwif_data;
base += 0xA0 + r;
if (hwif->host_flags & IDE_HFLAG_MMIO)
base += hwif->channel << 6;
else
base += hwif->channel << 4;
return base;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* If The cached PEI Services Table pointer is NULL, then ASSERT(). If the permanent memory is allocated failed, then ASSERT(). */ | VOID EFIAPI MigratePeiServicesTablePointer(VOID) | /* If The cached PEI Services Table pointer is NULL, then ASSERT(). If the permanent memory is allocated failed, then ASSERT(). */
VOID EFIAPI MigratePeiServicesTablePointer(VOID) | {
EFI_STATUS Status;
IA32_DESCRIPTOR Idtr;
EFI_PHYSICAL_ADDRESS IdtBase;
CONST EFI_PEI_SERVICES **PeiServices;
AsmReadIdtr (&Idtr);
PeiServices = (CONST EFI_PEI_SERVICES **)(*(UINTN *)(Idtr.Base - sizeof (UINTN)));
ASSERT (PeiServices != NULL);
Status = (*PeiServices)->AllocatePages (
PeiServices,
EfiBootServicesCode,
EFI_SIZE_TO_PAGES (Idtr.Limit + 1 + sizeof (UINTN)),
&IdtBase
);
ASSERT_EFI_ERROR (Status);
CopyMem ((VOID *)(UINTN)IdtBase, (VOID *)(Idtr.Base - sizeof (UINTN)), Idtr.Limit + 1 + sizeof (UINTN));
Idtr.Base = (UINTN)IdtBase + sizeof (UINTN);
AsmWriteIdtr (&Idtr);
return;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* VmbusOnDeviceRemove - Callback when the root bus device is removed */ | static int VmbusOnDeviceRemove(struct hv_device *dev) | /* VmbusOnDeviceRemove - Callback when the root bus device is removed */
static int VmbusOnDeviceRemove(struct hv_device *dev) | {
int ret = 0;
DPRINT_ENTER(VMBUS);
VmbusChannelReleaseUnattachedChannels();
VmbusDisconnect();
on_each_cpu(HvSynicCleanup, NULL, 1);
DPRINT_EXIT(VMBUS);
return ret;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Delay a given number of microseconds.
This is a busy wait delay not using energy modes to conserve power. */ | Ecode_t USTIMER_DelayIntSafe(uint32_t usec) | /* Delay a given number of microseconds.
This is a busy wait delay not using energy modes to conserve power. */
Ecode_t USTIMER_DelayIntSafe(uint32_t usec) | {
uint64_t totalTicks;
totalTicks = ( ( (uint64_t)freq * usec ) + 500000 ) / 1000000;
while ( totalTicks > 65000 )
{
DelayTicksPolled( 65000 );
totalTicks -= 65000;
}
DelayTicksPolled( (uint16_t)totalTicks );
return ECODE_EMDRV_USTIMER_OK;
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* Remove a RIO device from the system. If it has an associated driver, then run the driver remove() method. Then update the reference count. */ | static int rio_device_remove(struct device *dev) | /* Remove a RIO device from the system. If it has an associated driver, then run the driver remove() method. Then update the reference count. */
static int rio_device_remove(struct device *dev) | {
struct rio_dev *rdev = to_rio_dev(dev);
struct rio_driver *rdrv = rdev->driver;
if (rdrv) {
if (rdrv->remove)
rdrv->remove(rdev);
rdev->driver = NULL;
}
rio_dev_put(rdev);
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* For Td guest TDVMCALL_MMIO is invoked to read MMIO registers. */ | UINT16 EFIAPI MmioRead16(IN UINTN Address) | /* For Td guest TDVMCALL_MMIO is invoked to read MMIO registers. */
UINT16 EFIAPI MmioRead16(IN UINTN Address) | {
UINT16 Value;
BOOLEAN Flag;
ASSERT ((Address & 1) == 0);
Flag = FilterBeforeMmIoRead (FilterWidth16, Address, &Value);
if (Flag) {
MemoryFence ();
if (IsTdxGuest ()) {
Value = TdMmioRead16 (Address);
} else {
Value = *(volatile UINT16 *)Address;
}
MemoryFence ();
}
FilterAfterMmIoRead (FilterWidth16, Address, &Value);
return Value;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Configures one or more pin(s) of a PIO controller as outputs, with the given default value. Optionally, the multi-drive feature can be enabled on the pin(s). */ | static void PIO_SetOutput(AT91S_PIO *pio, unsigned int mask, unsigned char defaultValue, unsigned char enableMultiDrive, unsigned char enablePullUp) | /* Configures one or more pin(s) of a PIO controller as outputs, with the given default value. Optionally, the multi-drive feature can be enabled on the pin(s). */
static void PIO_SetOutput(AT91S_PIO *pio, unsigned int mask, unsigned char defaultValue, unsigned char enableMultiDrive, unsigned char enablePullUp) | {
pio->PIO_IDR = mask;
if (enablePullUp) {
pio->PIO_PPUER = mask;
}
else {
pio->PIO_PPUDR = mask;
}
if (enableMultiDrive) {
pio->PIO_MDER = mask;
}
else {
pio->PIO_MDDR = mask;
}
if (defaultValue) {
pio->PIO_SODR = mask;
}
else {
pio->PIO_CODR = mask;
}
pio->PIO_OER = mask;
pio->PIO_PER = mask;
} | apopple/Pandaboard-FreeRTOS | C++ | null | 25 |
/* If Sm3Context is NULL, then return FALSE. If NewSm3Context is NULL, then return FALSE. If this interface is not supported, then return FALSE. */ | BOOLEAN EFIAPI CryptoServiceSm3Duplicate(IN CONST VOID *Sm3Context, OUT VOID *NewSm3Context) | /* If Sm3Context is NULL, then return FALSE. If NewSm3Context is NULL, then return FALSE. If this interface is not supported, then return FALSE. */
BOOLEAN EFIAPI CryptoServiceSm3Duplicate(IN CONST VOID *Sm3Context, OUT VOID *NewSm3Context) | {
return CALL_BASECRYPTLIB (Sm3.Services.Duplicate, Sm3Duplicate, (Sm3Context, NewSm3Context), FALSE);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Before you start, select your target, on the right of the "Load" button */ | int main(void) | /* Before you start, select your target, on the right of the "Load" button */
int main(void) | {
if (TM_DELAY_Time() > 1000) {
TM_DELAY_SetTime(0);
if (TM_AM2301_Read(&data) == TM_AM2301_OK) {
sprintf(str, "Humidity: %2.1f %%\nTemperature: %2.1f C", (float)data.Hum / 10, (float)data.Temp / 10);
TM_ILI9341_Puts(10, 100, str, &TM_Font_11x18, ILI9341_COLOR_BLACK, ILI9341_COLOR_ORANGE);
}
}
}
} | MaJerle/stm32f429 | C++ | null | 2,036 |
/* Called to do the PIO mode setup. Our timing registers are shared but we want to set the PIO timing by default. */ | static void ninja32_set_piomode(struct ata_port *ap, struct ata_device *adev) | /* Called to do the PIO mode setup. Our timing registers are shared but we want to set the PIO timing by default. */
static void ninja32_set_piomode(struct ata_port *ap, struct ata_device *adev) | {
static u16 pio_timing[5] = {
0xd6, 0x85, 0x44, 0x33, 0x13
};
iowrite8(pio_timing[adev->pio_mode - XFER_PIO_0],
ap->ioaddr.bmdma_addr + 0x1f);
ap->private_data = adev;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Waits for a data word from the SDHost read buffer */ | void SDHostDataRead(unsigned long ulBase, unsigned long *pulData) | /* Waits for a data word from the SDHost read buffer */
void SDHostDataRead(unsigned long ulBase, unsigned long *pulData) | {
while( !(HWREG(ulBase + MMCHS_O_PSTATE) & (1<<11)) )
{
}
*pulData = HWREG(ulBase + MMCHS_O_DATA);
} | micropython/micropython | C++ | Other | 18,334 |
/* Call with an @inode created by rpc_mkpipe() to queue an upcall. A userspace process may then later read the upcall by performing a read on an open file for this inode. It is up to the caller to initialize the fields of @msg (other than @msg->list) appropriately. */ | int rpc_queue_upcall(struct inode *inode, struct rpc_pipe_msg *msg) | /* Call with an @inode created by rpc_mkpipe() to queue an upcall. A userspace process may then later read the upcall by performing a read on an open file for this inode. It is up to the caller to initialize the fields of @msg (other than @msg->list) appropriately. */
int rpc_queue_upcall(struct inode *inode, struct rpc_pipe_msg *msg) | {
struct rpc_inode *rpci = RPC_I(inode);
int res = -EPIPE;
spin_lock(&inode->i_lock);
if (rpci->ops == NULL)
goto out;
if (rpci->nreaders) {
list_add_tail(&msg->list, &rpci->pipe);
rpci->pipelen += msg->len;
res = 0;
} else if (rpci->flags & RPC_PIPE_WAIT_FOR_OPEN) {
if (list_empty(&rpci->pipe))
queue_delayed_work(rpciod_workqueue,
&rpci->queue_timeout,
RPC_UPCALL_TIMEOUT);
list_add_tail(&msg->list, &rpci->pipe);
rpci->pipelen += msg->len;
res = 0;
}
out:
spin_unlock(&inode->i_lock);
wake_up(&rpci->waitq);
return res;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* open a file and send fd on success return -errno on error */ | static int do_open(struct iovec *iovec) | /* open a file and send fd on success return -errno on error */
static int do_open(struct iovec *iovec) | {
int flags, ret;
V9fsString path;
v9fs_string_init(&path);
ret = proxy_unmarshal(iovec, PROXY_HDR_SZ, "sd", &path, &flags);
if (ret < 0) {
goto err_out;
}
ret = open(path.data, flags);
if (ret < 0) {
ret = -errno;
}
err_out:
v9fs_string_free(&path);
return ret;
} | ve3wwg/teensy3_qemu | C++ | Other | 15 |
/* This function will create an usb function object. */ | ufunction_t rt_usbd_function_new(udevice_t device, udev_desc_t dev_desc, ufunction_ops_t ops) | /* This function will create an usb function object. */
ufunction_t rt_usbd_function_new(udevice_t device, udev_desc_t dev_desc, ufunction_ops_t ops) | {
ufunction_t func;
LOG_D("rt_usbd_function_new");
RT_ASSERT(device != RT_NULL);
RT_ASSERT(dev_desc != RT_NULL);
func = (ufunction_t)rt_malloc(sizeof(struct ufunction));
if(func == RT_NULL)
{
rt_kprintf("alloc memory failed\n");
return RT_NULL;
}
func->dev_desc = dev_desc;
func->ops = ops;
func->device = device;
func->enabled = RT_FALSE;
rt_list_init(&func->intf_list);
return func;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* This behavior would have to be changed is we ever exported a public variant of this function. */ | cairo_bool_t _cairo_surface_get_extents(cairo_surface_t *surface, cairo_rectangle_int_t *extents) | /* This behavior would have to be changed is we ever exported a public variant of this function. */
cairo_bool_t _cairo_surface_get_extents(cairo_surface_t *surface, cairo_rectangle_int_t *extents) | {
cairo_bool_t bounded;
if (unlikely (surface->status))
goto zero_extents;
if (unlikely (surface->finished)) {
_cairo_surface_set_error(surface, CAIRO_STATUS_SURFACE_FINISHED);
goto zero_extents;
}
bounded = FALSE;
if (surface->backend->get_extents != NULL)
bounded = surface->backend->get_extents (surface, extents);
if (! bounded)
_cairo_unbounded_rectangle_init (extents);
return bounded;
zero_extents:
extents->x = extents->y = 0;
extents->width = extents->height = 0;
return TRUE;
} | xboot/xboot | C++ | MIT License | 779 |
/* Some i82365-based systems send multiple SS_DETECT events during card insertion, and the "card present" status bit seems to bounce. This will probably be true with GPIO-based card detection systems after the product has aged. */ | static void socket_detect_change(struct pcmcia_socket *skt) | /* Some i82365-based systems send multiple SS_DETECT events during card insertion, and the "card present" status bit seems to bounce. This will probably be true with GPIO-based card detection systems after the product has aged. */
static void socket_detect_change(struct pcmcia_socket *skt) | {
if (!(skt->state & SOCKET_SUSPEND)) {
int status;
if (!(skt->state & SOCKET_PRESENT))
msleep(20);
skt->ops->get_status(skt, &status);
if ((skt->state & SOCKET_PRESENT) &&
!(status & SS_DETECT))
socket_remove(skt);
if (!(skt->state & SOCKET_PRESENT) &&
(status & SS_DETECT))
socket_insert(skt);
}
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* s e t u p S u b j e c t T o T y p e */ | returnValue QProblemB_setupSubjectToType(QProblemB *_THIS) | /* s e t u p S u b j e c t T o T y p e */
returnValue QProblemB_setupSubjectToType(QProblemB *_THIS) | {
return QProblemB_setupSubjectToTypeNew( _THIS,_THIS->lb,_THIS->ub );
} | DanielMartensson/EmbeddedLapack | C++ | MIT License | 129 |
/* nilfs_ifile_new - create inode file @sbi: nilfs_sb_info struct @inode_size: size of an inode */ | struct inode* nilfs_ifile_new(struct nilfs_sb_info *sbi, size_t inode_size) | /* nilfs_ifile_new - create inode file @sbi: nilfs_sb_info struct @inode_size: size of an inode */
struct inode* nilfs_ifile_new(struct nilfs_sb_info *sbi, size_t inode_size) | {
struct inode *ifile;
int err;
ifile = nilfs_mdt_new(sbi->s_nilfs, sbi->s_super, NILFS_IFILE_INO,
sizeof(struct nilfs_ifile_info));
if (ifile) {
err = nilfs_palloc_init_blockgroup(ifile, inode_size);
if (unlikely(err)) {
nilfs_mdt_destroy(ifile);
return NULL;
}
nilfs_palloc_setup_cache(ifile,
&NILFS_IFILE_I(ifile)->palloc_cache);
}
return ifile;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* This service abstracts the capability to do a hash operation on a data buffer. */ | EFI_STATUS EFIAPI TcgDxeHashAll(IN EFI_TCG_PROTOCOL *This, IN UINT8 *HashData, IN UINT64 HashDataLen, IN TCG_ALGORITHM_ID AlgorithmId, IN OUT UINT64 *HashedDataLen, IN OUT UINT8 **HashedDataResult) | /* This service abstracts the capability to do a hash operation on a data buffer. */
EFI_STATUS EFIAPI TcgDxeHashAll(IN EFI_TCG_PROTOCOL *This, IN UINT8 *HashData, IN UINT64 HashDataLen, IN TCG_ALGORITHM_ID AlgorithmId, IN OUT UINT64 *HashedDataLen, IN OUT UINT8 **HashedDataResult) | {
if ((HashedDataLen == NULL) || (HashedDataResult == NULL)) {
return EFI_INVALID_PARAMETER;
}
switch (AlgorithmId) {
case TPM_ALG_SHA:
if (*HashedDataLen == 0) {
*HashedDataLen = sizeof (TPM_DIGEST);
*HashedDataResult = AllocatePool ((UINTN)*HashedDataLen);
if (*HashedDataResult == NULL) {
return EFI_OUT_OF_RESOURCES;
}
}
if (*HashedDataLen < sizeof (TPM_DIGEST)) {
*HashedDataLen = sizeof (TPM_DIGEST);
return EFI_BUFFER_TOO_SMALL;
}
*HashedDataLen = sizeof (TPM_DIGEST);
if (*HashedDataResult == NULL) {
*HashedDataResult = AllocatePool ((UINTN)*HashedDataLen);
}
return TpmCommHashAll (
HashData,
(UINTN)HashDataLen,
(TPM_DIGEST *)*HashedDataResult
);
default:
return EFI_UNSUPPORTED;
}
} | tianocore/edk2 | C++ | Other | 4,240 |
/* The default callback function for the system generated packet. It will free the packet. */ | VOID Ip6SysPacketSent(NET_BUF *Packet, EFI_STATUS IoStatus, UINT32 LinkFlag, VOID *Context) | /* The default callback function for the system generated packet. It will free the packet. */
VOID Ip6SysPacketSent(NET_BUF *Packet, EFI_STATUS IoStatus, UINT32 LinkFlag, VOID *Context) | {
NetbufFree (Packet);
Packet = NULL;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* param base DMA peripheral base address. param channel DMA channel number. param trigger trigger configuration. */ | void DMA_ConfigureChannelTrigger(DMA_Type *base, uint32_t channel, dma_channel_trigger_t *trigger) | /* param base DMA peripheral base address. param channel DMA channel number. param trigger trigger configuration. */
void DMA_ConfigureChannelTrigger(DMA_Type *base, uint32_t channel, dma_channel_trigger_t *trigger) | {
assert((channel < (uint32_t)FSL_FEATURE_DMA_NUMBER_OF_CHANNELSn(base)) && (NULL != trigger));
uint32_t tmpReg = (DMA_CHANNEL_CFG_HWTRIGEN_MASK | DMA_CHANNEL_CFG_TRIGPOL_MASK | DMA_CHANNEL_CFG_TRIGTYPE_MASK |
DMA_CHANNEL_CFG_TRIGBURST_MASK | DMA_CHANNEL_CFG_BURSTPOWER_MASK |
DMA_CHANNEL_CFG_SRCBURSTWRAP_MASK | DMA_CHANNEL_CFG_DSTBURSTWRAP_MASK);
tmpReg = base->CHANNEL[channel].CFG & (~tmpReg);
tmpReg |= (uint32_t)(trigger->type) | (uint32_t)(trigger->burst) | (uint32_t)(trigger->wrap);
base->CHANNEL[channel].CFG = tmpReg;
} | ARMmbed/DAPLink | C++ | Apache License 2.0 | 2,140 |
/* Unregisters the driver from the system and deallocates the driver structure @drv and all structures referenced from it. All devices should be shut down before calling this. */ | void gigaset_freedriver(struct gigaset_driver *drv) | /* Unregisters the driver from the system and deallocates the driver structure @drv and all structures referenced from it. All devices should be shut down before calling this. */
void gigaset_freedriver(struct gigaset_driver *drv) | {
unsigned long flags;
spin_lock_irqsave(&driver_lock, flags);
list_del(&drv->list);
spin_unlock_irqrestore(&driver_lock, flags);
gigaset_if_freedriver(drv);
kfree(drv->cs);
kfree(drv);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* param base SPDIF base pointer param handle Pointer to the spdif_handle_t structure which stores the transfer state. param xfer Pointer to the spdif_transfer_t structure. retval kStatus_Success Successfully started the data receive. retval kStatus_SPDIF_RxBusy Previous receive still not finished. retval kStatus_InvalidArgument The input parameter is invalid. */ | status_t SPDIF_TransferReceiveNonBlocking(SPDIF_Type *base, spdif_handle_t *handle, spdif_transfer_t *xfer) | /* param base SPDIF base pointer param handle Pointer to the spdif_handle_t structure which stores the transfer state. param xfer Pointer to the spdif_transfer_t structure. retval kStatus_Success Successfully started the data receive. retval kStatus_SPDIF_RxBusy Previous receive still not finished. retval kStatus_InvalidArgument The input parameter is invalid. */
status_t SPDIF_TransferReceiveNonBlocking(SPDIF_Type *base, spdif_handle_t *handle, spdif_transfer_t *xfer) | {
assert(handle);
if (handle->spdifQueue[handle->queueUser].data)
{
return kStatus_SPDIF_QueueFull;
}
handle->transferSize[handle->queueUser] = xfer->dataSize;
handle->spdifQueue[handle->queueUser].data = xfer->data;
handle->spdifQueue[handle->queueUser].dataSize = xfer->dataSize;
handle->spdifQueue[handle->queueUser].udata = xfer->udata;
handle->spdifQueue[handle->queueUser].qdata = xfer->qdata;
handle->queueUser = (handle->queueUser + 1) % SPDIF_XFER_QUEUE_SIZE;
handle->state = kSPDIF_Busy;
SPDIF_EnableInterrupts(base, kSPDIF_UChannelReceiveRegisterFull | kSPDIF_QChannelReceiveRegisterFull |
kSPDIF_RxFIFOFull | kSPDIF_RxControlChannelChange);
SPDIF_RxEnable(base, true);
return kStatus_Success;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Rport has sent LOGO. Awaiting FC-4 offline completion callback. */ | static void bfa_fcs_rport_sm_fc4_logorcv(struct bfa_fcs_rport_s *rport, enum rport_event event) | /* Rport has sent LOGO. Awaiting FC-4 offline completion callback. */
static void bfa_fcs_rport_sm_fc4_logorcv(struct bfa_fcs_rport_s *rport, enum rport_event event) | {
bfa_trc(rport->fcs, rport->pwwn);
bfa_trc(rport->fcs, rport->pid);
bfa_trc(rport->fcs, event);
switch (event) {
case RPSM_EVENT_FC4_OFFLINE:
bfa_sm_set_state(rport, bfa_fcs_rport_sm_hcb_logorcv);
bfa_rport_offline(rport->bfa_rport);
break;
case RPSM_EVENT_DELETE:
bfa_sm_set_state(rport, bfa_fcs_rport_sm_fc4_logosend);
break;
case RPSM_EVENT_LOGO_RCVD:
case RPSM_EVENT_ADDRESS_CHANGE:
break;
default:
bfa_assert(0);
}
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* param handle codec handle. return kStatus_Success is success, else de-initial failed. */ | status_t HAL_CODEC_Deinit(void *handle) | /* param handle codec handle. return kStatus_Success is success, else de-initial failed. */
status_t HAL_CODEC_Deinit(void *handle) | {
assert(handle != NULL);
return WM8960_Deinit((wm8960_handle_t *)((uint32_t)(((codec_handle_t *)handle)->codecDevHandle)));
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* Get Word0 of the unique device identifier (UID based on 96 bits) */ | uint32_t LL_GetUID_Word0(void) | /* Get Word0 of the unique device identifier (UID based on 96 bits) */
uint32_t LL_GetUID_Word0(void) | {
return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS)));
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* Generate an audit message from the contents of @buf, which is owned by @tsk with @loginuid. @buf->mutex must be locked. */ | static void tty_audit_buf_push(struct task_struct *tsk, uid_t loginuid, unsigned int sessionid, struct tty_audit_buf *buf) | /* Generate an audit message from the contents of @buf, which is owned by @tsk with @loginuid. @buf->mutex must be locked. */
static void tty_audit_buf_push(struct task_struct *tsk, uid_t loginuid, unsigned int sessionid, struct tty_audit_buf *buf) | {
if (buf->valid == 0)
return;
if (audit_enabled == 0)
return;
tty_audit_log("tty", tsk, loginuid, sessionid, buf->major, buf->minor,
buf->data, buf->valid);
buf->valid = 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* We want to get here as soon as possible, and get the receiver setup. We use the existing buffer. */ | static void sa1100_irda_rx_dma_start(struct sa1100_irda *si) | /* We want to get here as soon as possible, and get the receiver setup. We use the existing buffer. */
static void sa1100_irda_rx_dma_start(struct sa1100_irda *si) | {
if (!si->rxskb) {
printk(KERN_ERR "sa1100_ir: rx buffer went missing\n");
return;
}
Ser2HSCR0 = si->hscr0 | HSCR0_HSSP;
sa1100_clear_dma(si->rxdma);
sa1100_start_dma(si->rxdma, si->rxbuf_dma, HPSIR_MAX_RXLEN);
Ser2HSCR0 = si->hscr0 | HSCR0_HSSP | HSCR0_RXE;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* More than 4 boards in one computer is not possible, as the card can only use 4 different interrupts. */ | static int __init specialix_init_module(void) | /* More than 4 boards in one computer is not possible, as the card can only use 4 different interrupts. */
static int __init specialix_init_module(void) | {
int i;
func_enter();
if (iobase[0] || iobase[1] || iobase[2] || iobase[3]) {
for (i = 0; i < SX_NBOARD; i++) {
sx_board[i].base = iobase[i];
sx_board[i].irq = irq[i];
sx_board[i].count = 0;
}
}
func_exit();
return specialix_init();
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Enables the oscillator clock for frequency error counter. */ | void CRS_EnableFrequencyErrorCounter(void) | /* Enables the oscillator clock for frequency error counter. */
void CRS_EnableFrequencyErrorCounter(void) | {
CRS->CTRL_B.CNTEN = SET;
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* Attempt to clear the private state associated with a page when an error occurs that requires the cached contents of an inode to be written back or destroyed */ | static int nfs_launder_page(struct page *page) | /* Attempt to clear the private state associated with a page when an error occurs that requires the cached contents of an inode to be written back or destroyed */
static int nfs_launder_page(struct page *page) | {
struct inode *inode = page->mapping->host;
struct nfs_inode *nfsi = NFS_I(inode);
dfprintk(PAGECACHE, "NFS: launder_page(%ld, %llu)\n",
inode->i_ino, (long long)page_offset(page));
nfs_fscache_wait_on_page_write(nfsi, page);
return nfs_wb_page(inode, page);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Return a ptr to the next read wr in the SWSQ or NULL. */ | static void advance_oldest_read(struct t3_wq *wq) | /* Return a ptr to the next read wr in the SWSQ or NULL. */
static void advance_oldest_read(struct t3_wq *wq) | {
u32 rptr = wq->oldest_read - wq->sq + 1;
u32 wptr = Q_PTR2IDX(wq->sq_wptr, wq->sq_size_log2);
while (Q_PTR2IDX(rptr, wq->sq_size_log2) != wptr) {
wq->oldest_read = wq->sq + Q_PTR2IDX(rptr, wq->sq_size_log2);
if (wq->oldest_read->opcode == T3_READ_REQ)
return;
rptr++;
}
wq->oldest_read = NULL;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Checks whether the specified USART flag is set or not. */ | FlagStatus USART_GetFlagStatus(USART_TypeDef *USARTx, uint16_t USART_FLAG) | /* Checks whether the specified USART flag is set or not. */
FlagStatus USART_GetFlagStatus(USART_TypeDef *USARTx, uint16_t USART_FLAG) | {
FlagStatus bitstatus = RESET;
assert_param(IS_USART_ALL_PERIPH(USARTx));
assert_param(IS_USART_FLAG(USART_FLAG));
if (USART_FLAG == USART_FLAG_CTS)
{
assert_param(IS_USART_123_PERIPH(USARTx));
}
if ((USARTx->SR & USART_FLAG) != (uint16_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* Calculate a clock divider for the USART synchronous master modes to generate a baudrate as close as possible to the baudrate set point. */ | static uint32_t usart_set_sync_master_baudrate(Usart *p_usart, uint32_t baudrate, uint32_t ul_mck) | /* Calculate a clock divider for the USART synchronous master modes to generate a baudrate as close as possible to the baudrate set point. */
static uint32_t usart_set_sync_master_baudrate(Usart *p_usart, uint32_t baudrate, uint32_t ul_mck) | {
uint32_t cd;
cd = (ul_mck + baudrate / 2) / baudrate;
if (cd < MIN_CD_VALUE || cd > MAX_CD_VALUE) {
return 1;
}
p_usart->US_BRGR = cd << US_BRGR_CD_Pos;
p_usart->US_MR = (p_usart->US_MR & ~US_MR_USCLKS_Msk) |
US_MR_USCLKS_MCK | US_MR_SYNC;
return 0;
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* Enqueue a shared copy of the packet to the IP6 child if the packet is acceptable to it. Here the data of the packet is shared, but the net buffer isn't. */ | EFI_STATUS Ip6InstanceEnquePacket(IN IP6_PROTOCOL *IpInstance, IN EFI_IP6_HEADER *Head, IN NET_BUF *Packet) | /* Enqueue a shared copy of the packet to the IP6 child if the packet is acceptable to it. Here the data of the packet is shared, but the net buffer isn't. */
EFI_STATUS Ip6InstanceEnquePacket(IN IP6_PROTOCOL *IpInstance, IN EFI_IP6_HEADER *Head, IN NET_BUF *Packet) | {
IP6_CLIP_INFO *Info;
NET_BUF *Clone;
if (IpInstance->State != IP6_STATE_CONFIGED) {
return EFI_NOT_STARTED;
}
if (!Ip6InstanceFrameAcceptable (IpInstance, Head, Packet)) {
return EFI_INVALID_PARAMETER;
}
Clone = NetbufClone (Packet);
if (Clone == NULL) {
return EFI_OUT_OF_RESOURCES;
}
Info = IP6_GET_CLIP_INFO (Clone);
Info->Life = IP6_US_TO_SEC (IpInstance->ConfigData.ReceiveTimeout);
InsertTailList (&IpInstance->Received, &Clone->List);
return EFI_SUCCESS;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* @discussion This function tells the engine to start kicking off command to GPU side, it will return immediately after firing off GPU. */ | BOOL ElmFlush() | /* @discussion This function tells the engine to start kicking off command to GPU side, it will return immediately after firing off GPU. */
BOOL ElmFlush() | {
vg_lite_flush();
return TRUE;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Handles an incoming ATT error response for the specified read-multiple-characteristics proc. */ | static void ble_gattc_read_mult_err(struct ble_gattc_proc *proc, int status, uint16_t att_handle) | /* Handles an incoming ATT error response for the specified read-multiple-characteristics proc. */
static void ble_gattc_read_mult_err(struct ble_gattc_proc *proc, int status, uint16_t att_handle) | {
ble_gattc_dbg_assert_proc_not_inserted(proc);
ble_gattc_read_mult_cb(proc, status, att_handle, NULL);
} | Nicholas3388/LuaNode | C++ | Other | 1,055 |
/* The serial device will only work properly if it has been muxed to the serial pins by firmware. Check whether that happened here. */ | static bool bcm283x_is_serial_muxed(void) | /* The serial device will only work properly if it has been muxed to the serial pins by firmware. Check whether that happened here. */
static bool bcm283x_is_serial_muxed(void) | {
int serial_gpio = 15;
struct udevice *dev;
if (uclass_first_device(UCLASS_PINCTRL, &dev) || !dev)
return false;
if (pinctrl_get_gpio_mux(dev, 0, serial_gpio) != BCM2835_GPIO_ALT0)
return false;
return true;
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* param base FlexCAN peripheral base pointer. param pRxFrame Pointer to CAN message frame structure for reception. retval kStatus_Success - Read Message from Rx FIFO successfully. retval kStatus_Fail - Rx FIFO is not enabled. */ | status_t FLEXCAN_TransferReceiveFifoBlocking(CAN_Type *base, flexcan_frame_t *pRxFrame) | /* param base FlexCAN peripheral base pointer. param pRxFrame Pointer to CAN message frame structure for reception. retval kStatus_Success - Read Message from Rx FIFO successfully. retval kStatus_Fail - Rx FIFO is not enabled. */
status_t FLEXCAN_TransferReceiveFifoBlocking(CAN_Type *base, flexcan_frame_t *pRxFrame) | {
status_t rxFifoStatus;
while (0U == FLEXCAN_GetMbStatusFlags(base, (uint32_t)kFLEXCAN_RxFifoFrameAvlFlag))
{
}
rxFifoStatus = FLEXCAN_ReadRxFifo(base, pRxFrame);
FLEXCAN_ClearMbStatusFlags(base, (uint32_t)kFLEXCAN_RxFifoFrameAvlFlag);
return rxFifoStatus;
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* The UpdateDnsCache() function is used to add/delete/modify DNS cache entry. DNS cache can be normally dynamically updated after the DNS resolve succeeds. This function provided capability to manually add/delete/modify the DNS cache. */ | EFI_STATUS EFIAPI Dns4UpdateDnsCache(IN EFI_DNS4_PROTOCOL *This, IN BOOLEAN DeleteFlag, IN BOOLEAN Override, IN EFI_DNS4_CACHE_ENTRY DnsCacheEntry) | /* The UpdateDnsCache() function is used to add/delete/modify DNS cache entry. DNS cache can be normally dynamically updated after the DNS resolve succeeds. This function provided capability to manually add/delete/modify the DNS cache. */
EFI_STATUS EFIAPI Dns4UpdateDnsCache(IN EFI_DNS4_PROTOCOL *This, IN BOOLEAN DeleteFlag, IN BOOLEAN Override, IN EFI_DNS4_CACHE_ENTRY DnsCacheEntry) | {
EFI_STATUS Status;
EFI_TPL OldTpl;
Status = EFI_SUCCESS;
if ((DnsCacheEntry.HostName == NULL) || (DnsCacheEntry.IpAddress == NULL) || (DnsCacheEntry.Timeout == 0)) {
return EFI_INVALID_PARAMETER;
}
OldTpl = gBS->RaiseTPL (TPL_CALLBACK);
Status = UpdateDns4Cache (&mDriverData->Dns4CacheList, DeleteFlag, Override, DnsCacheEntry);
gBS->RestoreTPL (OldTpl);
return Status;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Read a register in the Embedded Utilities Memory Block address space. Input: regNum - register number + utility base address. Example, the base address of EPIC is 0x40000, the register number being passed is 0x40000+the address of the target register. (See epic.h for register addresses). Output: The 32 bit little endian value of the register. */ | unsigned int mpc824x_eummbar_read(unsigned int regNum) | /* Read a register in the Embedded Utilities Memory Block address space. Input: regNum - register number + utility base address. Example, the base address of EPIC is 0x40000, the register number being passed is 0x40000+the address of the target register. (See epic.h for register addresses). Output: The 32 bit little endian value of the register. */
unsigned int mpc824x_eummbar_read(unsigned int regNum) | {
unsigned int temp;
temp = *(volatile unsigned int *) (EUMBBAR_VAL + regNum);
temp = PCISWAP (temp);
return temp;
} | EmcraftSystems/u-boot | C++ | Other | 181 |
/* Compare two strings for equality. The string pointed to by 'Buffer' may or may not be null-terminated, so only compare up to the length of Str. */ | STATIC UINTN t_strcmp(CHAR8 *Buffer, CHAR8 *Str) | /* Compare two strings for equality. The string pointed to by 'Buffer' may or may not be null-terminated, so only compare up to the length of Str. */
STATIC UINTN t_strcmp(CHAR8 *Buffer, CHAR8 *Str) | {
UINTN Len;
Len = 0;
while (*Str && (*Str == *Buffer)) {
Buffer++;
Str++;
Len++;
}
if (*Str) {
return 0;
}
return Len;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Returns: (skip): TRUE if the call succeded, FALSE if @error is set. */ | gboolean _g_freedesktop_dbus_call_name_has_owner_finish(_GFreedesktopDBus *proxy, gboolean *out_has_owner, GAsyncResult *res, GError **error) | /* Returns: (skip): TRUE if the call succeded, FALSE if @error is set. */
gboolean _g_freedesktop_dbus_call_name_has_owner_finish(_GFreedesktopDBus *proxy, gboolean *out_has_owner, GAsyncResult *res, GError **error) | {
GVariant *_ret;
_ret = g_dbus_proxy_call_finish (G_DBUS_PROXY (proxy), res, error);
if (_ret == NULL)
goto _out;
g_variant_get (_ret,
"(b)",
out_has_owner);
g_variant_unref (_ret);
_out:
return _ret != NULL;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* Converts a buffer from be32 to cpu byte ordering. Length is in bytes. */ | static void sbp2util_be32_to_cpu_buffer(void *buffer, int length) | /* Converts a buffer from be32 to cpu byte ordering. Length is in bytes. */
static void sbp2util_be32_to_cpu_buffer(void *buffer, int length) | {
u32 *temp = buffer;
for (length = (length >> 2); length--; )
temp[length] = be32_to_cpu(temp[length]);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* This function will fill a formatted string to buffer */ | rt_int32_t rt_vsprintf(char *buf, const char *format, va_list arg_ptr) | /* This function will fill a formatted string to buffer */
rt_int32_t rt_vsprintf(char *buf, const char *format, va_list arg_ptr) | {
return rt_vsnprintf(buf, (rt_size_t) - 1, format, arg_ptr);
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* Reads N bytes from the mailbox registers, starting at the specified I2C address. */ | int32_t BSP_NFCTAG_ReadMailboxRegister(uint32_t Instance, uint8_t *const pData, const uint16_t TarAddr, const uint16_t NbByte) | /* Reads N bytes from the mailbox registers, starting at the specified I2C address. */
int32_t BSP_NFCTAG_ReadMailboxRegister(uint32_t Instance, uint8_t *const pData, const uint16_t TarAddr, const uint16_t NbByte) | {
UNUSED(Instance);
return ST25DV_ReadMailboxRegister(&NfcTagObj, pData, TarAddr, NbByte);
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* Checks if any payload checksum error in the frame just transmitted. This serves as indication that error occureed in the payload checksum insertion. The sent out frame doesnot carry any payload checksum inserted by the hardware. */ | bool synopGMAC_is_tx_payload_checksum_error(synopGMACdevice *gmacdev, u32 status) | /* Checks if any payload checksum error in the frame just transmitted. This serves as indication that error occureed in the payload checksum insertion. The sent out frame doesnot carry any payload checksum inserted by the hardware. */
bool synopGMAC_is_tx_payload_checksum_error(synopGMACdevice *gmacdev, u32 status) | {
return((status & DescTxPayChkError) == DescTxPayChkError);
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Function to compare two sets of bonding data to check if they belong to the same device. */ | bool is_duplicate_bonding_data(pm_peer_data_bonding_t const *p_bonding_data1, pm_peer_data_bonding_t const *p_bonding_data2) | /* Function to compare two sets of bonding data to check if they belong to the same device. */
bool is_duplicate_bonding_data(pm_peer_data_bonding_t const *p_bonding_data1, pm_peer_data_bonding_t const *p_bonding_data2) | {
bool valid_irk = is_valid_irk(&p_bonding_data1->peer_id.id_info);
bool duplicate_irk = valid_irk &&
(memcmp(p_bonding_data1->peer_id.id_info.irk,
p_bonding_data2->peer_id.id_info.irk,
BLE_GAP_SEC_KEY_LEN) == 0
);
bool duplicate_addr = addr_compare(&p_bonding_data1->peer_id.id_addr_info,
&p_bonding_data2->peer_id.id_addr_info
);
return duplicate_irk || duplicate_addr;
} | labapart/polymcu | C++ | null | 201 |
/* param base I2C base pointer. param handle pointer to i2c_slave_handle_t structure. param count Number of bytes transferred so far by the non-blocking transaction. retval kStatus_InvalidArgument count is Invalid. retval kStatus_Success Successfully return the count. */ | status_t I2C_SlaveTransferGetCount(I2C_Type *base, i2c_slave_handle_t *handle, size_t *count) | /* param base I2C base pointer. param handle pointer to i2c_slave_handle_t structure. param count Number of bytes transferred so far by the non-blocking transaction. retval kStatus_InvalidArgument count is Invalid. retval kStatus_Success Successfully return the count. */
status_t I2C_SlaveTransferGetCount(I2C_Type *base, i2c_slave_handle_t *handle, size_t *count) | {
assert(handle != NULL);
if (NULL == count)
{
return kStatus_InvalidArgument;
}
if (!handle->isBusy)
{
*count = 0;
return kStatus_NoTransferInProgress;
}
*count = handle->transfer.transferredCount;
return kStatus_Success;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Disable WDT Module. This function is used to Disable WDT module and Stop counter. */ | void WDTDisable(void) | /* Disable WDT Module. This function is used to Disable WDT module and Stop counter. */
void WDTDisable(void) | {
xHWREG(WDT_BASE + WDT_MOD) &= ~WDMOD_EN;
xHWREG(WDT_BASE + WDT_FEED) = (unsigned long) 0xAA;
xHWREG(WDT_BASE + WDT_FEED) = (unsigned long) 0x55;
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* Selects the clock input for the Hibernation module. */ | void HibernateClockSelect(unsigned long ulClockInput) | /* Selects the clock input for the Hibernation module. */
void HibernateClockSelect(unsigned long ulClockInput) | {
ASSERT((ulClockInput == HIBERNATE_CLOCK_SEL_RAW) ||
(ulClockInput == HIBERNATE_CLOCK_SEL_DIV128));
HWREG(HIB_CTL) = ulClockInput | (HWREG(HIB_CTL) & ~HIB_CTL_CLKSEL);
HibernateWriteComplete();
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Write a proper sized command to the correct address */ | static void flash_write_cmd(flash_info_t *info, int sect, uchar offset, uchar cmd) | /* Write a proper sized command to the correct address */
static void flash_write_cmd(flash_info_t *info, int sect, uchar offset, uchar cmd) | {
volatile cfiptr_t addr;
cfiword_t cword;
addr.cp = flash_make_addr(info, sect, offset);
flash_make_cmd(info, cmd, &cword);
switch (info->portwidth) {
case FLASH_CFI_8BIT:
*addr.cp = cword.c;
break;
case FLASH_CFI_16BIT:
*addr.wp = cword.w;
break;
case FLASH_CFI_32BIT:
*addr.lp = cword.l;
break;
}
} | EmcraftSystems/u-boot | C++ | Other | 181 |
/* this routine is only used when we are not talking to another IB 1.2-compliant device that we think can do DDR. (This includes all existing switch chips as of Oct 2007.) 1.2-compliant devices go directly to DDR prior to reaching INIT */ | static void try_auto_neg(struct ipath_devdata *dd) | /* this routine is only used when we are not talking to another IB 1.2-compliant device that we think can do DDR. (This includes all existing switch chips as of Oct 2007.) 1.2-compliant devices go directly to DDR prior to reaching INIT */
static void try_auto_neg(struct ipath_devdata *dd) | {
ipath_write_kreg(dd, IPATH_KREG_OFFSET(IBNCModeCtrl),
0x3b9dc07);
dd->ipath_flags |= IPATH_IB_AUTONEG_INPROG;
ipath_autoneg_send(dd, 0);
set_speed_fast(dd, IPATH_IB_DDR);
ipath_toggle_rclkrls(dd);
schedule_delayed_work(&dd->ipath_autoneg_work,
msecs_to_jiffies(2));
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* ib_query_port() returns the attributes of a port through the @port_attr pointer. */ | int ib_query_port(struct ib_device *device, u8 port_num, struct ib_port_attr *port_attr) | /* ib_query_port() returns the attributes of a port through the @port_attr pointer. */
int ib_query_port(struct ib_device *device, u8 port_num, struct ib_port_attr *port_attr) | {
if (port_num < start_port(device) || port_num > end_port(device))
return -EINVAL;
return device->query_port(device, port_num, port_attr);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* This function determines when frame which is sent, isn't last frame of transmit window, if it isn't then this function return zero else return one. Returns 0 if frame isn't last frame, 1 otherwise. */ | int llc_conn_ev_qlfy_last_frame_eq_0(struct sock *sk, struct sk_buff *skb) | /* This function determines when frame which is sent, isn't last frame of transmit window, if it isn't then this function return zero else return one. Returns 0 if frame isn't last frame, 1 otherwise. */
int llc_conn_ev_qlfy_last_frame_eq_0(struct sock *sk, struct sk_buff *skb) | {
return skb_queue_len(&llc_sk(sk)->pdu_unack_q) + 1 == llc_sk(sk)->k;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* \This function will force the processor enter sleep mode,after operating the action,some clocks will be closed except "Internal 10 kHz low speed
oscillator clock". */ | void PWRCtlStandby(void) | /* \This function will force the processor enter sleep mode,after operating the action,some clocks will be closed except "Internal 10 kHz low speed
oscillator clock". */
void PWRCtlStandby(void) | {
xSysCtlClockSet(12000000, xSYSCTL_XTAL_12MHZ | xSYSCTL_OSC_MAIN);
xSysCtlSleep();
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* ISR handler for a specific vector index in the interrupt vector table for linking the actual interrupts vectors to the one in the user program's vector table. */ | void Vector62_handler(void) | /* ISR handler for a specific vector index in the interrupt vector table for linking the actual interrupts vectors to the one in the user program's vector table. */
void Vector62_handler(void) | {
asm
{
LDX(VCT_USER_PROGRAM_VECTOR_TABLE_STARTADDR + (62 * 2))
JMP 0,X
}
} | feaser/openblt | C++ | GNU General Public License v3.0 | 601 |
/* Perform a signature comparison with the mmio address io_addr. This address should have been obtained by ioremap. Returns 1 on a match. */ | int check_signature(const volatile void __iomem *io_addr, const unsigned char *signature, int length) | /* Perform a signature comparison with the mmio address io_addr. This address should have been obtained by ioremap. Returns 1 on a match. */
int check_signature(const volatile void __iomem *io_addr, const unsigned char *signature, int length) | {
while (length--) {
if (readb(io_addr) != *signature)
return 0;
io_addr++;
signature++;
}
return 1;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* param base AIPSTZ peripheral base pointer param master Masters for AIPSTZ. param privilegeConfig Configuration is ORed from aipstz_master_privilege_level_t. */ | void AIPSTZ_SetMasterPriviledgeLevel(AIPSTZ_Type *base, aipstz_master_t master, uint32_t privilegeConfig) | /* param base AIPSTZ peripheral base pointer param master Masters for AIPSTZ. param privilegeConfig Configuration is ORed from aipstz_master_privilege_level_t. */
void AIPSTZ_SetMasterPriviledgeLevel(AIPSTZ_Type *base, aipstz_master_t master, uint32_t privilegeConfig) | {
uint32_t mask = ((uint32_t)master >> 8) - 1;
uint32_t shift = (uint32_t)master & 0xFF;
base->MPR = (base->MPR & (~(mask << shift))) | (privilegeConfig << shift);
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Disables the jitter when the ADC is clocked by PCLK div2 or div4. */ | void ADC_DisableJitter(ADC_JITTER_T jitter) | /* Disables the jitter when the ADC is clocked by PCLK div2 or div4. */
void ADC_DisableJitter(ADC_JITTER_T jitter) | {
ADC->CFG2_B.CLKCFG &= (uint32_t)~jitter;
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* Performs an atomic decrement of the 32-bit unsigned integer specified by Value and returns the decrement value. The decrement operation must be performed using MP safe mechanisms. The state of the return value is not guaranteed to be MP safe. */ | UINT32 EFIAPI InternalSyncDecrement(IN volatile UINT32 *Value) | /* Performs an atomic decrement of the 32-bit unsigned integer specified by Value and returns the decrement value. The decrement operation must be performed using MP safe mechanisms. The state of the return value is not guaranteed to be MP safe. */
UINT32 EFIAPI InternalSyncDecrement(IN volatile UINT32 *Value) | {
return _InterlockedDecrement ((long *)(Value));
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Get this device number in the simulation, as it is known in the overall simulation. In general this is the device number you want */ | unsigned int bsim_args_get_global_device_nbr(void) | /* Get this device number in the simulation, as it is known in the overall simulation. In general this is the device number you want */
unsigned int bsim_args_get_global_device_nbr(void) | {
return global_args.global_device_nbr;
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
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