docstring stringlengths 22 576 | signature stringlengths 9 317 | prompt stringlengths 57 886 | code stringlengths 20 1.36k | repository stringclasses 49
values | language stringclasses 2
values | license stringclasses 9
values | stars int64 15 21.3k |
|---|---|---|---|---|---|---|---|
/* w(c, s1) = -1 w(c, s2) = 0 w(c, s3) = 1 */ | static int wakeup_preempt_entity(struct sched_entity *curr, struct sched_entity *se) | /* w(c, s1) = -1 w(c, s2) = 0 w(c, s3) = 1 */
static int wakeup_preempt_entity(struct sched_entity *curr, struct sched_entity *se) | {
s64 gran, vdiff = curr->vruntime - se->vruntime;
if (vdiff <= 0)
return -1;
gran = wakeup_gran(curr, se);
if (vdiff > gran)
return 1;
return 0;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Writes timer registers in posted and non-posted mode. The posted mode bit is encoded in reg. Note that in posted mode the write pending bit must be checked. Otherwise a write on a register which has a pending write will be lost. */ | static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, u32 value) | /* Writes timer registers in posted and non-posted mode. The posted mode bit is encoded in reg. Note that in posted mode the write pending bit must be checked. Otherwise a write on a register which has a pending write will be lost. */
static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, u32 value) | {
if (timer->posted)
while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
& (reg >> WPSHIFT))
cpu_relax();
writel(value, timer->io_base + (reg & 0xff));
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Forces or releases Low Speed APB (APB2) peripheral reset. */ | void RCC_APB2PeriphReset(u32 apb2_periph) | /* Forces or releases Low Speed APB (APB2) peripheral reset. */
void RCC_APB2PeriphReset(u32 apb2_periph) | {
RCC->APB2RSTR |= apb2_periph;
RCC->APB2RSTR &= ~apb2_periph;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Ring the door bell to notify XHCI there is a transaction to be executed through URB. */ | EFI_STATUS RingIntTransferDoorBell(IN USB_XHCI_INSTANCE *Xhc, IN URB *Urb) | /* Ring the door bell to notify XHCI there is a transaction to be executed through URB. */
EFI_STATUS RingIntTransferDoorBell(IN USB_XHCI_INSTANCE *Xhc, IN URB *Urb) | {
UINT8 SlotId;
UINT8 Dci;
SlotId = XhcBusDevAddrToSlotId (Xhc, Urb->Ep.BusAddr);
Dci = XhcEndpointToDci (Urb->Ep.EpAddr, (UINT8)(Urb->Ep.Direction));
XhcRingDoorBell (Xhc, SlotId, Dci);
return EFI_SUCCESS;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* The cooperative scheduler is being used so all we have to do is periodically increment the tick. This can just be a normal ISR and the "saveall" attribute is not required. */ | void vTickISR(void) | /* The cooperative scheduler is being used so all we have to do is periodically increment the tick. This can just be a normal ISR and the "saveall" attribute is not required. */
void vTickISR(void) | {
vTaskIncrementTick();
TSR1 &= ~0x01;
} | apopple/Pandaboard-FreeRTOS | C++ | null | 25 |
/* Return the interface name for the netif matching index or NULL if not found/on error */ | char* netif_index_to_name(u8_t idx, char *name) | /* Return the interface name for the netif matching index or NULL if not found/on error */
char* netif_index_to_name(u8_t idx, char *name) | {
struct netif *netif = netif_get_by_index(idx);
if (netif != NULL) {
name[0] = netif->name[0];
name[1] = netif->name[1];
lwip_itoa(&name[2], NETIF_NAMESIZE - 2, netif_index_to_num(idx));
return name;
}
return NULL;
} | ua1arn/hftrx | C++ | null | 69 |
/* This API is used to configure the offset enable bits in the sensor. */ | static int8_t configure_offset_enable(const struct bmi160_foc_conf *foc_conf, struct bmi160_dev const *dev) | /* This API is used to configure the offset enable bits in the sensor. */
static int8_t configure_offset_enable(const struct bmi160_foc_conf *foc_conf, struct bmi160_dev const *dev) | {
int8_t rslt;
uint8_t data;
rslt = null_ptr_check(dev);
if (rslt != BMI160_OK)
{
rslt = BMI160_E_NULL_PTR;
}
else
{
rslt = bmi160_get_regs(BMI160_OFFSET_CONF_ADDR, &data, 1, dev);
if (rslt == BMI160_OK)
{
data = BMI160_SET_BITS(data, BMI160_GYRO_OFFSET_EN, foc_conf->gyro_off_en);
data = BMI160_SET_BITS(data, BMI160_ACCEL_OFFSET_EN, foc_conf->acc_off_en);
rslt = bmi160_set_regs(BMI160_OFFSET_CONF_ADDR, &data, 1, dev);
}
}
return rslt;
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* Enable Output in Break.
Enables the output in the Break feature of an advanced timer. This does not enable the break functionality itself but only sets the Master Output Enable in the Break and Deadtime Register. */ | void timer_enable_break_main_output(uint32_t timer_peripheral) | /* Enable Output in Break.
Enables the output in the Break feature of an advanced timer. This does not enable the break functionality itself but only sets the Master Output Enable in the Break and Deadtime Register. */
void timer_enable_break_main_output(uint32_t timer_peripheral) | {
TIM_BDTR(timer_peripheral) |= TIM_BDTR_MOE;
} | libopencm3/libopencm3 | C++ | GNU General Public License v3.0 | 2,931 |
/* Retrieve ordinal number of the given SERCOM USART hardware instance. */ | uint8_t _usart_async_get_hardware_index(const struct _usart_async_device *const device) | /* Retrieve ordinal number of the given SERCOM USART hardware instance. */
uint8_t _usart_async_get_hardware_index(const struct _usart_async_device *const device) | {
return _sercom_get_hardware_index(device->hw);
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* Event handler for the USB device Start Of Frame event. */ | void EVENT_USB_Device_StartOfFrame(void) | /* Event handler for the USB device Start Of Frame event. */
void EVENT_USB_Device_StartOfFrame(void) | {
HID_Device_MillisecondElapsed(&Mouse_HID_Interface);
} | prusa3d/Prusa-Firmware-Buddy | C++ | Other | 1,019 |
/* function returns old entry number in directory item in real node using new entry number in virtual item in virtual node */ | static int old_entry_num(int is_affected, int virtual_entry_num, int pos_in_item, int mode) | /* function returns old entry number in directory item in real node using new entry number in virtual item in virtual node */
static int old_entry_num(int is_affected, int virtual_entry_num, int pos_in_item, int mode) | {
if (mode == M_INSERT || mode == M_DELETE)
return virtual_entry_num;
if (!is_affected)
return virtual_entry_num;
if (virtual_entry_num < pos_in_item)
return virtual_entry_num;
if (mode == M_CUT)
return virtual_entry_num + 1;
RFALSE(mode != M_PASTE || virtual_entry_num == 0,
"vs-8015: old_entry_num: mode must be M_PASTE (mode = \'%c\'",
mode);
return virtual_entry_num - 1;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Set priority of a riscv PLIC-specific interrupt line.
This routine set the priority of a RISCV PLIC-specific interrupt line. riscv_plic_irq_set_prio is called by riscv arch_irq_priority_set to set the priority of an interrupt whenever CONFIG_RISCV_HAS_PLIC variable is set. */ | void riscv_plic_set_priority(uint32_t irq, uint32_t priority) | /* Set priority of a riscv PLIC-specific interrupt line.
This routine set the priority of a RISCV PLIC-specific interrupt line. riscv_plic_irq_set_prio is called by riscv arch_irq_priority_set to set the priority of an interrupt whenever CONFIG_RISCV_HAS_PLIC variable is set. */
void riscv_plic_set_priority(uint32_t irq, uint32_t priority) | {
const struct device *dev = get_plic_dev_from_irq(irq);
const struct plic_config *config = dev->config;
const uint32_t local_irq = irq_from_level_2(irq);
mem_addr_t prio_addr = config->prio + (local_irq * sizeof(uint32_t));
if (priority > config->max_prio)
priority = config->max_prio;
sys_write32(priority, prio_addr);
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* The idle thread. There's no useful work to be done, so just try to conserve power and have a low exit latency (ie sit in a loop waiting for somebody to say that they'd like to reschedule) */ | void cpu_idle(void) | /* The idle thread. There's no useful work to be done, so just try to conserve power and have a low exit latency (ie sit in a loop waiting for somebody to say that they'd like to reschedule) */
void cpu_idle(void) | {
current_thread_info()->status |= TS_POLLING;
boot_init_stack_canary();
while (1) {
tick_nohz_stop_sched_tick(1);
while (!need_resched()) {
rmb();
if (cpu_is_offline(smp_processor_id()))
play_dead();
local_irq_disable();
enter_idle();
stop_critical_timings();
pm_idle();
start_critical_timings();
__exit_idle();
}
tick_nohz_restart_sched_tick();
preempt_enable_no_resched();
schedule();
preempt_disable();
}
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* this function is a POSIX compliant version, which will return current location in directory stream. */ | long telldir(DIR *d) | /* this function is a POSIX compliant version, which will return current location in directory stream. */
long telldir(DIR *d) | {
struct dfs_file *fd;
long result;
fd = fd_get(d->fd);
if (fd == NULL)
{
rt_set_errno(-EBADF);
return 0;
}
result = fd->pos - d->num + d->cur;
return result;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* param base Pointer to FLEXIO_I2C_Type structure. param mask Interrupt source. Currently only one interrupt request source: arg kFLEXIO_I2C_TransferCompleteInterruptEnable */ | void FLEXIO_I2C_MasterEnableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask) | /* param base Pointer to FLEXIO_I2C_Type structure. param mask Interrupt source. Currently only one interrupt request source: arg kFLEXIO_I2C_TransferCompleteInterruptEnable */
void FLEXIO_I2C_MasterEnableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask) | {
if ((mask & (uint32_t)kFLEXIO_I2C_TxEmptyInterruptEnable) != 0U)
{
FLEXIO_EnableShifterStatusInterrupts(base->flexioBase, 1UL << base->shifterIndex[0]);
}
if ((mask & (uint32_t)kFLEXIO_I2C_RxFullInterruptEnable) != 0U)
{
FLEXIO_EnableShifterStatusInterrupts(base->flexioBase, 1UL << base->shifterIndex[1]);
}
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* Returns the interrupt number for a specified USB module. */ | static uint32_t _USBIntNumberGet(uint32_t ui32Base) | /* Returns the interrupt number for a specified USB module. */
static uint32_t _USBIntNumberGet(uint32_t ui32Base) | {
uint32_t ui32Int;
ui32Int = INT_USB0;
return (ui32Int);
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Return: true if station in half n mode and AP supports 40 bw */ | bool IsHTHalfNmode40Bandwidth(struct ieee80211_device *ieee) | /* Return: true if station in half n mode and AP supports 40 bw */
bool IsHTHalfNmode40Bandwidth(struct ieee80211_device *ieee) | {
bool retValue = false;
PRT_HIGH_THROUGHPUT pHTInfo = ieee->pHTInfo;
if(pHTInfo->bCurrentHTSupport == false )
retValue = false;
else if(pHTInfo->bRegBW40MHz == false)
retValue = false;
else if(!ieee->GetHalfNmodeSupportByAPsHandler(ieee->dev))
retValue = false;
else if(((PHT_CAPABILITY_ELE)(pHTInfo->PeerHTCapBuf))->ChlWidth)
retValue = true;
else
retValue = false;
return retValue;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Returns the bt_data structure that is currently being read.
If the structure has been fully read, the function iterates to the next */ | static const struct bt_data* ad_stream_current_ltv_update(struct ad_stream *stream) | /* Returns the bt_data structure that is currently being read.
If the structure has been fully read, the function iterates to the next */
static const struct bt_data* ad_stream_current_ltv_update(struct ad_stream *stream) | {
const struct bt_data *current_ltv = &stream->ad[stream->ad_index].data[stream->data_index];
const bool done_reading_ltv = (stream->current_ltv_offset == current_ltv->data_len + 2);
if (done_reading_ltv) {
stream->current_ltv_offset = 0;
if (stream->data_index + 1 == stream->ad[stream->ad_index].len) {
stream->data_index = 0;
stream->ad_index++;
} else {
stream->data_index++;
}
}
if (stream->ad_index == stream->ad_len) {
return NULL;
} else {
return &stream->ad[stream->ad_index].data[stream->data_index];
}
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* To check if FtwRecord is the first record of FtwHeader. */ | EFI_STATUS GetPreviousRecordOfWrites(IN EFI_FAULT_TOLERANT_WRITE_HEADER *FtwHeader, IN OUT EFI_FAULT_TOLERANT_WRITE_RECORD **FtwRecord) | /* To check if FtwRecord is the first record of FtwHeader. */
EFI_STATUS GetPreviousRecordOfWrites(IN EFI_FAULT_TOLERANT_WRITE_HEADER *FtwHeader, IN OUT EFI_FAULT_TOLERANT_WRITE_RECORD **FtwRecord) | {
UINT8 *Ptr;
if (IsFirstRecordOfWrites (FtwHeader, *FtwRecord)) {
*FtwRecord = NULL;
return EFI_ACCESS_DENIED;
}
Ptr = (UINT8 *)(*FtwRecord);
Ptr -= FTW_RECORD_SIZE (FtwHeader->PrivateDataSize);
*FtwRecord = (EFI_FAULT_TOLERANT_WRITE_RECORD *)Ptr;
return EFI_SUCCESS;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* This API configure the necessary setting of high-g interrupt. */ | static int8_t config_high_g_int_settg(const struct bmi160_acc_high_g_int_cfg *high_g_int_cfg, const struct bmi160_dev *dev) | /* This API configure the necessary setting of high-g interrupt. */
static int8_t config_high_g_int_settg(const struct bmi160_acc_high_g_int_cfg *high_g_int_cfg, const struct bmi160_dev *dev) | {
int8_t rslt;
uint8_t temp = 0;
uint8_t data_array[3] = { 0, 0, 0 };
rslt = bmi160_get_regs(BMI160_INT_LOWHIGH_2_ADDR, &data_array[0], 1, dev);
if (rslt == BMI160_OK)
{
temp = data_array[0] & ~BMI160_HIGH_G_HYST_MASK;
data_array[0] = temp | ((high_g_int_cfg->high_hy << 6) & BMI160_HIGH_G_HYST_MASK);
data_array[1] = high_g_int_cfg->high_dur;
data_array[2] = high_g_int_cfg->high_thres;
rslt = bmi160_set_regs(BMI160_INT_LOWHIGH_2_ADDR, data_array, 3, dev);
}
return rslt;
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* 9. Network name See subclause 10.5.3.5a in 3GPP TS 24.008 . 9. Nonce */ | static guint16 de_emm_nonce(tvbuff_t *tvb, proto_tree *tree, packet_info *pinfo _U_, guint32 offset, guint len _U_, gchar *add_string _U_, int string_len _U_) | /* 9. Network name See subclause 10.5.3.5a in 3GPP TS 24.008 . 9. Nonce */
static guint16 de_emm_nonce(tvbuff_t *tvb, proto_tree *tree, packet_info *pinfo _U_, guint32 offset, guint len _U_, gchar *add_string _U_, int string_len _U_) | {
guint32 curr_offset;
curr_offset = offset;
proto_tree_add_item(tree, hf_nas_eps_emm_nonce, tvb, curr_offset, 4, ENC_BIG_ENDIAN);
curr_offset+=4;
return(curr_offset-offset);
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* This function handles USB-On-The-Go FS global interrupt requests. */ | void OTG_HS_IRQHandler(void) | /* This function handles USB-On-The-Go FS global interrupt requests. */
void OTG_HS_IRQHandler(void) | {
HAL_HCD_IRQHandler(&hhcd);
} | STMicroelectronics/STM32CubeF4 | C++ | Other | 789 |
/* Copy a buffer from user memory area to packet memory area (PMA) */ | void USB_CopyUserToPMABuf(uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) | /* Copy a buffer from user memory area to packet memory area (PMA) */
void USB_CopyUserToPMABuf(uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes) | {
uint32_t n = (wNBytes + 1) >> 1;
uint32_t i, temp1, temp2;
uint16_t* pdwVal;
pdwVal = (uint16_t*)(wPMABufAddr * 2 + PMAAddr);
for (i = n; i != 0; i--)
{
temp1 = (uint16_t)*pbUsrBuf;
pbUsrBuf++;
temp2 = temp1 | (uint16_t)*pbUsrBuf << 8;
*pdwVal++ = temp2;
pdwVal++;
pbUsrBuf++;
EpInDataPtrTmp = pbUsrBuf;
}
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* callback function for A2DP source audio data stream */ | static int32_t bt_app_a2d_data_cb(uint8_t *data, int32_t len) | /* callback function for A2DP source audio data stream */
static int32_t bt_app_a2d_data_cb(uint8_t *data, int32_t len) | {
if (len < 0 || data == NULL) {
return 0;
}
int val = rand() % (1 << 16);
for (int i = 0; i < (len >> 1); i++) {
data[(i << 1)] = val & 0xff;
data[(i << 1) + 1] = (val >> 8) & 0xff;
}
return len;
} | retro-esp32/RetroESP32 | C++ | Creative Commons Attribution Share Alike 4.0 International | 581 |
/* Returns 0 on success or -1 with the statistic lock released if the room in the socket buffer was not sufficient. */ | int gnet_stats_finish_copy(struct gnet_dump *d) | /* Returns 0 on success or -1 with the statistic lock released if the room in the socket buffer was not sufficient. */
int gnet_stats_finish_copy(struct gnet_dump *d) | {
if (d->tail)
d->tail->nla_len = skb_tail_pointer(d->skb) - (u8 *)d->tail;
if (d->compat_tc_stats)
if (gnet_stats_copy(d, d->compat_tc_stats, &d->tc_stats,
sizeof(d->tc_stats)) < 0)
return -1;
if (d->compat_xstats && d->xstats) {
if (gnet_stats_copy(d, d->compat_xstats, d->xstats,
d->xstats_len) < 0)
return -1;
}
spin_unlock_bh(d->lock);
return 0;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* This function also performs a RAW dump of the ACPI table and validates the checksum. */ | VOID EFIAPI ParseAcpiRsdp(IN BOOLEAN Trace, IN UINT8 *Ptr, IN UINT32 AcpiTableLength, IN UINT8 AcpiTableRevision) | /* This function also performs a RAW dump of the ACPI table and validates the checksum. */
VOID EFIAPI ParseAcpiRsdp(IN BOOLEAN Trace, IN UINT8 *Ptr, IN UINT32 AcpiTableLength, IN UINT8 AcpiTableRevision) | {
if (Trace) {
DumpRaw (Ptr, AcpiTableLength);
VerifyChecksum (TRUE, Ptr, AcpiTableLength);
}
ParseAcpi (
Trace,
0,
"RSDP",
Ptr,
AcpiTableLength,
PARSER_PARAMS (RsdpParser)
);
if (XsdtAddress == NULL) {
IncrementErrorCount ();
Print (
L"ERROR: Insufficient table length. AcpiTableLength = %d." \
L"RSDP parsing aborted.\n",
AcpiTableLength
);
return;
}
if ((*XsdtAddress) == 0) {
IncrementErrorCount ();
Print (L"ERROR: XSDT Pointer is not set. RSDP parsing aborted.\n");
return;
}
ProcessAcpiTable ((UINT8 *)(UINTN)(*XsdtAddress));
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Toggles the state of a port pin that is configured as an output.
Toggles the current output level of a port pin. */ | void port_pin_toggle_output_level(const uint8_t gpio_pin) | /* Toggles the state of a port pin that is configured as an output.
Toggles the current output level of a port pin. */
void port_pin_toggle_output_level(const uint8_t gpio_pin) | {
PortGroup *const port_base = port_get_group_from_gpio_pin(gpio_pin);
uint32_t pin_mask = (1UL << (gpio_pin % 32));
port_base->OUTTGL.reg = pin_mask;
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* handle waking up a waiter on the semaphore */ | asmregparm struct rw_semaphore* rwsem_wake(struct rw_semaphore *sem) | /* handle waking up a waiter on the semaphore */
asmregparm struct rw_semaphore* rwsem_wake(struct rw_semaphore *sem) | {
unsigned long flags;
spin_lock_irqsave(&sem->wait_lock, flags);
if (!list_empty(&sem->wait_list))
sem = __rwsem_do_wake(sem, 0);
spin_unlock_irqrestore(&sem->wait_lock, flags);
return sem;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Then, 4 bytes of little endian (stuffed) FCS follow, then two trailing EOF bytes of 0x7E. */ | static __u8* stuff_fir(__u8 *p, __u8 c) | /* Then, 4 bytes of little endian (stuffed) FCS follow, then two trailing EOF bytes of 0x7E. */
static __u8* stuff_fir(__u8 *p, __u8 c) | {
switch(c) {
case 0x7d:
case 0x7e:
case 0x7f:
*p++ = 0x7d;
c ^= IRDA_TRANS;
default:
*p++ = c;
}
return p;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Read the next lmb list entry from the ibm,dynamic-memory property and return the information in the provided */ | static void read_drconf_cell(struct of_drconf_cell *drmem, const u32 **cellp) | /* Read the next lmb list entry from the ibm,dynamic-memory property and return the information in the provided */
static void read_drconf_cell(struct of_drconf_cell *drmem, const u32 **cellp) | {
const u32 *cp;
drmem->base_addr = read_n_cells(n_mem_addr_cells, cellp);
cp = *cellp;
drmem->drc_index = cp[0];
drmem->reserved = cp[1];
drmem->aa_index = cp[2];
drmem->flags = cp[3];
*cellp = cp + 4;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Finds the first unused PBA in a zone Returns the absolute PBA of an unused PBA, or 0 if none found. */ | static u16 alauda_find_unused_pba(struct alauda_media_info *info, unsigned int zone) | /* Finds the first unused PBA in a zone Returns the absolute PBA of an unused PBA, or 0 if none found. */
static u16 alauda_find_unused_pba(struct alauda_media_info *info, unsigned int zone) | {
u16 *pba_to_lba = info->pba_to_lba[zone];
unsigned int i;
for (i = 0; i < info->zonesize; i++)
if (pba_to_lba[i] == UNDEF)
return (zone << info->zoneshift) + i;
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* returns 0 on mask match, ULPI_ERROR on time out. */ | static int ulpi_wait(struct ulpi_viewport *ulpi_vp, u32 mask) | /* returns 0 on mask match, ULPI_ERROR on time out. */
static int ulpi_wait(struct ulpi_viewport *ulpi_vp, u32 mask) | {
int timeout = CONFIG_USB_ULPI_TIMEOUT;
while (--timeout) {
if ((readl(ulpi_vp->viewport_addr) & mask) == 0)
return 0;
udelay(1);
}
return ULPI_ERROR;
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* Process input UART command and forward to SPI. */ | static sint8 serial_bridge(void) | /* Process input UART command and forward to SPI. */
static sint8 serial_bridge(void) | {
sint8 ret;
uint8_t *usart_data;
uint32_t usart_size;
tstrWifiInitParam param;
memset(¶m, 0, sizeof(param));
param.pfAppWifiCb = NULL;
ret = os_m2m_wifi_init(¶m);
if (ret != M2M_SUCCESS) {
puts("Failed to put the Initialize the Chip!\n");
return M2M_ERR_INIT;
}
usart_stream_reset();
while (1) {
if (usart_stream_read(&usart_data, &usart_size) != 0) {
continue;
}
usart_frame_parse(usart_data, usart_size);
}
return 0;
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* bond_vlan_rx_add_vid - Propagates adding an id to slaves @bond_dev: bonding net device that got called @vid: vlan id being added */ | static void bond_vlan_rx_add_vid(struct net_device *bond_dev, uint16_t vid) | /* bond_vlan_rx_add_vid - Propagates adding an id to slaves @bond_dev: bonding net device that got called @vid: vlan id being added */
static void bond_vlan_rx_add_vid(struct net_device *bond_dev, uint16_t vid) | {
struct bonding *bond = netdev_priv(bond_dev);
struct slave *slave;
int i, res;
bond_for_each_slave(bond, slave, i) {
struct net_device *slave_dev = slave->dev;
const struct net_device_ops *slave_ops = slave_dev->netdev_ops;
if ((slave_dev->features & NETIF_F_HW_VLAN_FILTER) &&
slave_ops->ndo_vlan_rx_add_vid) {
slave_ops->ndo_vlan_rx_add_vid(slave_dev, vid);
}
}
res = bond_add_vlan(bond, vid);
if (res) {
pr_err("%s: Error: Failed to add vlan id %d\n",
bond_dev->name, vid);
}
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Configure new channel.
This is the alternative API, which requires the caller to store the mask of used channels. */ | uint8_t ppi_add_channel(uint32_t *chan_map, uint32_t eep, uint32_t tep, bool enable) | /* Configure new channel.
This is the alternative API, which requires the caller to store the mask of used channels. */
uint8_t ppi_add_channel(uint32_t *chan_map, uint32_t eep, uint32_t tep, bool enable) | {
uint8_t i;
uint32_t chan_bit;
for (i = 0, chan_bit = 1; i <= PPI_MAX_PROG_CHANNEL; ++i, chan_bit <<= 1) {
if (!(chan_bit & *chan_map)) {
*chan_map |= chan_bit;
break;
}
}
if (i > PPI_MAX_PROG_CHANNEL) {
return 0xff;
}
ppi_configure_channel(i, eep, tep);
if (enable) {
ppi_enable_channels(chan_bit);
}
return i;
} | libopencm3/libopencm3 | C++ | GNU General Public License v3.0 | 2,931 |
/* This is called in the context of udc_ep_enqueue() and must not block. The driver can immediately claim the buffer if the queue is empty, but usually it is offloaded to a thread or workqueue to handle transfers in a single location. Please refer to existing driver implementations for examples. */ | static int udc_skeleton_ep_enqueue(const struct device *dev, struct udc_ep_config *const cfg, struct net_buf *buf) | /* This is called in the context of udc_ep_enqueue() and must not block. The driver can immediately claim the buffer if the queue is empty, but usually it is offloaded to a thread or workqueue to handle transfers in a single location. Please refer to existing driver implementations for examples. */
static int udc_skeleton_ep_enqueue(const struct device *dev, struct udc_ep_config *const cfg, struct net_buf *buf) | {
LOG_DBG("%p enqueue %p", dev, buf);
udc_buf_put(cfg, buf);
if (cfg->stat.halted) {
LOG_DBG("ep 0x%02x halted", cfg->addr);
return 0;
}
return 0;
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* return pointer to next free buffer descriptor from core pool */ | struct smscore_buffer_t* smscore_getbuffer(struct smscore_device_t *coredev) | /* return pointer to next free buffer descriptor from core pool */
struct smscore_buffer_t* smscore_getbuffer(struct smscore_device_t *coredev) | {
struct smscore_buffer_t *cb = NULL;
unsigned long flags;
DEFINE_WAIT(wait);
spin_lock_irqsave(&coredev->bufferslock, flags);
prepare_to_wait(&coredev->buffer_mng_waitq, &wait, TASK_INTERRUPTIBLE);
if (list_empty(&coredev->buffers))
schedule();
finish_wait(&coredev->buffer_mng_waitq, &wait);
cb = (struct smscore_buffer_t *) coredev->buffers.next;
list_del(&cb->entry);
spin_unlock_irqrestore(&coredev->bufferslock, flags);
return cb;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* XXX rcc - this one really has to do something. Probably needs to stamp in a new field in the incore inode. */ | STATIC void xfs_inode_item_committing(xfs_inode_log_item_t *iip, xfs_lsn_t lsn) | /* XXX rcc - this one really has to do something. Probably needs to stamp in a new field in the incore inode. */
STATIC void xfs_inode_item_committing(xfs_inode_log_item_t *iip, xfs_lsn_t lsn) | {
iip->ili_last_lsn = lsn;
return;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* brief Return Frequency of FRO 12MHz return Frequency of FRO 12MHz */ | uint32_t CLOCK_GetFro12MFreq(void) | /* brief Return Frequency of FRO 12MHz return Frequency of FRO 12MHz */
uint32_t CLOCK_GetFro12MFreq(void) | {
return ((ANACTRL->FRO192M_CTRL & ANACTRL_FRO192M_CTRL_ENA_12MHZCLK_MASK) != 0UL) ? 12000000U : 0U;
} | ARMmbed/DAPLink | C++ | Apache License 2.0 | 2,140 |
/* Enable/disable the FIFO mode of the specified SPI port.
The */ | void SPIFIFOModeSet(unsigned long ulBase, xtBoolean xtEnable, unsigned long ulInterval) | /* Enable/disable the FIFO mode of the specified SPI port.
The */
void SPIFIFOModeSet(unsigned long ulBase, xtBoolean xtEnable, unsigned long ulInterval) | {
xASSERT((ulBase == SPI0_BASE) || (ulBase == SPI1_BASE)||
(ulBase == SPI2_BASE)||(ulBase == SPI3_BASE) );
xASSERT((ulInterval == 0) ||((ulInterval >= 2) && (ulInterval <= 15)));
if (xtEnable)
{
xHWREG(ulBase + SPI_CNTRL) &= ~SPI_CNTRL_SP_CYCLE_M;
xHWREG(ulBase + SPI_CNTRL) |= (ulInterval << SPI_CNTRL_SP_CYCLE_S);
}
else
{
}
} | coocox/cox | C++ | Berkeley Software Distribution (BSD) | 104 |
/* Get the geometry associated with a dm device */ | int dm_get_geometry(struct mapped_device *md, struct hd_geometry *geo) | /* Get the geometry associated with a dm device */
int dm_get_geometry(struct mapped_device *md, struct hd_geometry *geo) | {
*geo = md->geometry;
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* The returned result is provided in malloced storage and thus must be free'd by the caller. */ | STATIC XENSTORE_STATUS XenStoreSingle(IN CONST XENSTORE_TRANSACTION *Transaction, IN enum xsd_sockmsg_type RequestType, IN CONST CHAR8 *Body, OUT UINT32 *LenPtr OPTIONAL, OUT VOID **Result OPTIONAL) | /* The returned result is provided in malloced storage and thus must be free'd by the caller. */
STATIC XENSTORE_STATUS XenStoreSingle(IN CONST XENSTORE_TRANSACTION *Transaction, IN enum xsd_sockmsg_type RequestType, IN CONST CHAR8 *Body, OUT UINT32 *LenPtr OPTIONAL, OUT VOID **Result OPTIONAL) | {
WRITE_REQUEST WriteRequest;
WriteRequest.Data = (VOID *)Body;
WriteRequest.Len = (UINT32)AsciiStrSize (Body);
return XenStoreTalkv (
Transaction,
RequestType,
&WriteRequest,
1,
LenPtr,
Result
);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Sets the frame size for I2S LR clock */ | static void i2s_set_lr_framesize(struct i2s_reg *i2s_reg, unsigned int rfs) | /* Sets the frame size for I2S LR clock */
static void i2s_set_lr_framesize(struct i2s_reg *i2s_reg, unsigned int rfs) | {
unsigned int mod = readl(&i2s_reg->mod);
mod &= ~MOD_RCLK_MASK;
switch (rfs) {
case 768:
mod |= MOD_RCLK_768FS;
break;
case 512:
mod |= MOD_RCLK_512FS;
break;
case 384:
mod |= MOD_RCLK_384FS;
break;
default:
mod |= MOD_RCLK_256FS;
break;
}
writel(mod, &i2s_reg->mod);
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* Clears the SPIx CRC Error (CRCERR) interrupt pending bit. */ | void SPI_I2S_ClearITPendingBit(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT) | /* Clears the SPIx CRC Error (CRCERR) interrupt pending bit. */
void SPI_I2S_ClearITPendingBit(SPI_TypeDef *SPIx, uint8_t SPI_I2S_IT) | {
uint16_t itpos = 0;
assert_param(IS_SPI_ALL_PERIPH(SPIx));
assert_param(IS_SPI_I2S_CLEAR_IT(SPI_I2S_IT));
itpos = 0x01 << (SPI_I2S_IT & 0x0F);
SPIx->SR = (uint16_t)~itpos;
} | gcallipo/RadioDSP-Stm32f103 | C++ | Common Creative - Attribution 3.0 | 51 |
/* vx_set_analog_output_level - set the output attenuation level @codec: the output codec, 0 or 1. (1 for VXP440 only) @left: left output level, 0 = mute @right: right output level */ | static void vx_set_analog_output_level(struct vx_core *chip, int codec, int left, int right) | /* vx_set_analog_output_level - set the output attenuation level @codec: the output codec, 0 or 1. (1 for VXP440 only) @left: left output level, 0 = mute @right: right output level */
static void vx_set_analog_output_level(struct vx_core *chip, int codec, int left, int right) | {
left = chip->hw->output_level_max - left;
right = chip->hw->output_level_max - right;
if (chip->ops->akm_write) {
chip->ops->akm_write(chip, XX_CODEC_LEVEL_LEFT_REGISTER, left);
chip->ops->akm_write(chip, XX_CODEC_LEVEL_RIGHT_REGISTER, right);
} else {
vx_set_codec_reg(chip, codec, XX_CODEC_LEVEL_LEFT_REGISTER, left);
vx_set_codec_reg(chip, codec, XX_CODEC_LEVEL_RIGHT_REGISTER, right);
}
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* We support sending out multiple chunks at the same time. Not all of them need to get signaled in the completion queue. */ | static int qemu_rdma_write_flush(QEMUFile *f, RDMAContext *rdma) | /* We support sending out multiple chunks at the same time. Not all of them need to get signaled in the completion queue. */
static int qemu_rdma_write_flush(QEMUFile *f, RDMAContext *rdma) | {
int ret;
if (!rdma->current_length) {
return 0;
}
ret = qemu_rdma_write_one(f, rdma,
rdma->current_index, rdma->current_addr, rdma->current_length);
if (ret < 0) {
return ret;
}
if (ret == 0) {
rdma->nb_sent++;
DDDPRINTF("sent total: %d\n", rdma->nb_sent);
}
rdma->current_length = 0;
rdma->current_addr = 0;
return 0;
} | ve3wwg/teensy3_qemu | C | Other | 15 |
/* Reset DAC to same state as after a HW reset. */ | void DAC_Reset(DAC_TypeDef *dac) | /* Reset DAC to same state as after a HW reset. */
void DAC_Reset(DAC_TypeDef *dac) | {
dac->CH0CTRL = _DAC_CH0CTRL_RESETVALUE;
dac->CH1CTRL = _DAC_CH1CTRL_RESETVALUE;
dac->CTRL = _DAC_CTRL_RESETVALUE;
dac->IEN = _DAC_IEN_RESETVALUE;
dac->IFC = _DAC_IFC_MASK;
dac->CAL = DEVINFO->DAC0CAL0;
dac->BIASPROG = _DAC_BIASPROG_RESETVALUE;
} | feaser/openblt | C++ | GNU General Public License v3.0 | 601 |
/* Function for checking the checksum bytes of the UID stored in internal area.
This function calculates the block check character (BCC) bytes based on the parsed serial number and compares them with bytes read from the Type 2 Tag. */ | static bool type_2_tag_is_bcc_correct(type_2_tag_serial_number_t *p_sn) | /* Function for checking the checksum bytes of the UID stored in internal area.
This function calculates the block check character (BCC) bytes based on the parsed serial number and compares them with bytes read from the Type 2 Tag. */
static bool type_2_tag_is_bcc_correct(type_2_tag_serial_number_t *p_sn) | {
uint8_t bcc1 = (uint8_t)T2T_UID_BCC_CASCADE_BYTE ^
(uint8_t)p_sn->manufacturer_id ^
(uint8_t)((p_sn->serial_number_part_1 >> 8) & 0xFF) ^
(uint8_t)(p_sn->serial_number_part_1 & 0xFF);
uint8_t bcc2 = (uint8_t)((p_sn->serial_number_part_2 >> 24) & 0xFF) ^
(uint8_t)((p_sn->serial_number_part_2 >> 16) & 0xFF) ^
(uint8_t)((p_sn->serial_number_part_2 >> 8) & 0xFF) ^
(uint8_t)( p_sn->serial_number_part_2 & 0xFF);
return (bcc1 == p_sn->check_byte_0) && (bcc2 == p_sn->check_byte_1);
} | labapart/polymcu | C++ | null | 201 |
/* HDMI phy registers access through internal I2C bus. */ | static int hdmi_phy_i2c_write(uint16_t data, uint8_t addr) | /* HDMI phy registers access through internal I2C bus. */
static int hdmi_phy_i2c_write(uint16_t data, uint8_t addr) | {
HW_HDMI_IH_I2CMPHY_STAT0.U = 0xFF;
HW_HDMI_PHY_I2CM_ADDRESS_ADDR.U = addr;
HW_HDMI_PHY_I2CM_DATAO_1_ADDR.U = (uint8_t) (data >> 8);
HW_HDMI_PHY_I2CM_DATAO_0_ADDR.U = (uint8_t) data;
HW_HDMI_PHY_I2CM_OPERATION_ADDR.B.WRITE = 1;
return hdmi_phy_wait_i2c_done(1000);
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Check if Tx or Rx IRQ is pending. */ | static int cdc_acm_irq_is_pending(const struct device *dev) | /* Check if Tx or Rx IRQ is pending. */
static int cdc_acm_irq_is_pending(const struct device *dev) | {
struct cdc_acm_dev_data_t * const dev_data = dev->data;
if (dev_data->tx_ready && dev_data->tx_irq_ena) {
return 1;
} else if (dev_data->rx_ready && dev_data->rx_irq_ena) {
return 1;
} else {
return 0;
}
} | zephyrproject-rtos/zephyr | C++ | Apache License 2.0 | 9,573 |
/* Set up the context for a new address space. */ | int init_new_context(struct task_struct *t, struct mm_struct *mm) | /* Set up the context for a new address space. */
int init_new_context(struct task_struct *t, struct mm_struct *mm) | {
pr_hard("initing context for mm @%p\n", mm);
mm->context.id = MMU_NO_CONTEXT;
mm->context.active = 0;
return 0;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* From here on down is the code for translating the numerous ioctl commands from the old API to the new API. */ | static int get_v4l_control(struct file *file, int cid, v4l2_kioctl drv) | /* From here on down is the code for translating the numerous ioctl commands from the old API to the new API. */
static int get_v4l_control(struct file *file, int cid, v4l2_kioctl drv) | {
struct v4l2_queryctrl qctrl2;
struct v4l2_control ctrl2;
int err;
qctrl2.id = cid;
err = drv(file, VIDIOC_QUERYCTRL, &qctrl2);
if (err < 0)
dprintk("VIDIOC_QUERYCTRL: %d\n", err);
if (err == 0 && !(qctrl2.flags & V4L2_CTRL_FLAG_DISABLED)) {
ctrl2.id = qctrl2.id;
err = drv(file, VIDIOC_G_CTRL, &ctrl2);
if (err < 0) {
dprintk("VIDIOC_G_CTRL: %d\n", err);
return 0;
}
return DIV_ROUND_CLOSEST((ctrl2.value-qctrl2.minimum) * 65535,
qctrl2.maximum - qctrl2.minimum);
}
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Enables or disables write access to Prescaler and Reload registers. */ | void IWDG_WriteAccessCmd(IWDG_WriteAccess_TypeDef IWDG_WriteAccess) | /* Enables or disables write access to Prescaler and Reload registers. */
void IWDG_WriteAccessCmd(IWDG_WriteAccess_TypeDef IWDG_WriteAccess) | {
assert_param(IS_IWDG_WRITE_ACCESS_MODE(IWDG_WriteAccess));
IWDG->KR = IWDG_WriteAccess;
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* parse descriptor buffer and return the pointer starting the given descriptor type. */ | void* snd_usb_find_desc(void *descstart, int desclen, void *after, u8 dtype) | /* parse descriptor buffer and return the pointer starting the given descriptor type. */
void* snd_usb_find_desc(void *descstart, int desclen, void *after, u8 dtype) | {
u8 *p, *end, *next;
p = descstart;
end = p + desclen;
for (; p < end;) {
if (p[0] < 2)
return NULL;
next = p + p[0];
if (next > end)
return NULL;
if (p[1] == dtype && (!after || (void *)p > after)) {
return p;
}
p = next;
}
return NULL;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Returns an iterator pointing to the next key-value pair in object after iter, or NULL if the whole object has been iterated through. */ | VOID* EFIAPI JsonObjectIteratorNext(IN EDKII_JSON_VALUE JsonValue, IN VOID *Iterator) | /* Returns an iterator pointing to the next key-value pair in object after iter, or NULL if the whole object has been iterated through. */
VOID* EFIAPI JsonObjectIteratorNext(IN EDKII_JSON_VALUE JsonValue, IN VOID *Iterator) | {
return json_object_iter_next (JsonValue, Iterator);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Returns: a newly allocated string, with all the lower case characters in @str converted to upper case, with semantics that exactly match g_ascii_toupper(). (Note that this is unlike the old g_strup(), which modified the string in place.) */ | gchar* g_ascii_strup(const gchar *str, gssize len) | /* Returns: a newly allocated string, with all the lower case characters in @str converted to upper case, with semantics that exactly match g_ascii_toupper(). (Note that this is unlike the old g_strup(), which modified the string in place.) */
gchar* g_ascii_strup(const gchar *str, gssize len) | {
gchar *result, *s;
g_return_val_if_fail (str != NULL, NULL);
if (len < 0)
len = strlen (str);
result = g_strndup (str, len);
for (s = result; *s; s++)
*s = g_ascii_toupper (*s);
return result;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* If the conversion results in an overflow or an underflow condition, then Result is set to UINT16_ERROR and RETURN_BUFFER_TOO_SMALL is returned. */ | RETURN_STATUS EFIAPI SafeInt64ToUint16(IN INT64 Operand, OUT UINT16 *Result) | /* If the conversion results in an overflow or an underflow condition, then Result is set to UINT16_ERROR and RETURN_BUFFER_TOO_SMALL is returned. */
RETURN_STATUS EFIAPI SafeInt64ToUint16(IN INT64 Operand, OUT UINT16 *Result) | {
RETURN_STATUS Status;
if (Result == NULL) {
return RETURN_INVALID_PARAMETER;
}
if ((Operand >= 0) && (Operand <= MAX_UINT16)) {
*Result = (UINT16)Operand;
Status = RETURN_SUCCESS;
} else {
*Result = UINT16_ERROR;
Status = RETURN_BUFFER_TOO_SMALL;
}
return Status;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Return value: CAIRO_STATUS_SUCCESS if successful or CAIRO_STATUS_NO_MEMORY if insufficient memory is available for the operation. */ | cairo_status_t _cairo_array_append(cairo_array_t *array, const void *element) | /* Return value: CAIRO_STATUS_SUCCESS if successful or CAIRO_STATUS_NO_MEMORY if insufficient memory is available for the operation. */
cairo_status_t _cairo_array_append(cairo_array_t *array, const void *element) | {
return _cairo_array_append_multiple (array, element, 1);
} | xboot/xboot | C++ | MIT License | 779 |
/* This function returns TRUE if the device path specified by DevicePath is multi-instance. Otherwise, FALSE is returned. If DevicePath is NULL or invalid, then FALSE is returned. */ | BOOLEAN IsDevicePathMultiInstance(CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath) | /* This function returns TRUE if the device path specified by DevicePath is multi-instance. Otherwise, FALSE is returned. If DevicePath is NULL or invalid, then FALSE is returned. */
BOOLEAN IsDevicePathMultiInstance(CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath) | {
return UefiDevicePathLibIsDevicePathMultiInstance (DevicePath);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* This will destroy all data allocated by this entry. */ | void qdict_del(QDict *qdict, const char *key) | /* This will destroy all data allocated by this entry. */
void qdict_del(QDict *qdict, const char *key) | {
QDictEntry *entry;
entry = qdict_find(qdict, key, tdb_hash(key) % QDICT_BUCKET_MAX);
if (entry) {
QLIST_REMOVE(entry, next);
qentry_destroy(entry);
qdict->size--;
}
} | ve3wwg/teensy3_qemu | C++ | Other | 15 |
/* Clear AON Sleep Timer module instance interrupt.
This flag will be cleared automatically once the IRQ has been seen on the sleep clock. */ | void aon_sleep_timer_clear_interrupt(void) | /* Clear AON Sleep Timer module instance interrupt.
This flag will be cleared automatically once the IRQ has been seen on the sleep clock. */
void aon_sleep_timer_clear_interrupt(void) | {
AON_SLEEP_TIMER0->CONTROL.reg |= AON_SLEEP_TIMER_CONTROL_IRQ_CLEAR;
} | remotemcu/remcu-chip-sdks | C++ | null | 436 |
/* configure TIMER channel control shadow register update control */ | void timer_channel_control_shadow_update_config(uint32_t timer_periph, uint8_t ccuctl) | /* configure TIMER channel control shadow register update control */
void timer_channel_control_shadow_update_config(uint32_t timer_periph, uint8_t ccuctl) | {
if(TIMER_UPDATECTL_CCU == ccuctl){
TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_CCUC);
}else if(TIMER_UPDATECTL_CCUTRI == ccuctl){
TIMER_CTL1(timer_periph) |= (uint32_t)TIMER_CTL1_CCUC;
}else{
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Set the destination address mode of the specified dma channel. */ | en_result_t Dma_SetDestinationIncMode(en_dma_channel_t enCh, en_address_mode_t enMode) | /* Set the destination address mode of the specified dma channel. */
en_result_t Dma_SetDestinationIncMode(en_dma_channel_t enCh, en_address_mode_t enMode) | {
ASSERT(IS_VALID_CH(enCh));
ASSERT(IS_VALID_ADDR_MODE(enMode));
if((!IS_VALID_CH(enCh)) || (!IS_VALID_ADDR_MODE(enMode)))
{
return ErrorInvalidParameter;
}
if(enCh == DmaCh0)
{
M0P_DMAC->CONFB0_f.FD = enMode;
}
else{
M0P_DMAC->CONFB1_f.FD = enMode; }
return Ok;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Executes a MONITOR instruction with the register state specified by Eax, Ecx and Edx. Returns Eax. This function is only available on IA-32 and x64. */ | UINTN EFIAPI AsmMonitor(IN UINTN RegisterEax, IN UINTN RegisterEcx, IN UINTN RegisterEdx) | /* Executes a MONITOR instruction with the register state specified by Eax, Ecx and Edx. Returns Eax. This function is only available on IA-32 and x64. */
UINTN EFIAPI AsmMonitor(IN UINTN RegisterEax, IN UINTN RegisterEcx, IN UINTN RegisterEdx) | {
_asm {
mov eax, RegisterEax
mov ecx, RegisterEcx
mov edx, RegisterEdx
_emit 0x0f
_emit 0x01
_emit 0xc8
}
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Determine if the CPU supports the Local APIC Base Address MSR. */ | BOOLEAN LocalApicBaseAddressMsrSupported(VOID) | /* Determine if the CPU supports the Local APIC Base Address MSR. */
BOOLEAN LocalApicBaseAddressMsrSupported(VOID) | {
UINT32 RegEax;
UINTN FamilyId;
AsmCpuid (1, &RegEax, NULL, NULL, NULL);
FamilyId = BitFieldRead32 (RegEax, 8, 11);
if ((FamilyId == 0x04) || (FamilyId == 0x05)) {
return FALSE;
}
return TRUE;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Reads an msr value (of 'msr_index') into 'pdata'. Returns 0 on success, non-0 otherwise. Assumes vcpu_load() was already called. */ | int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata) | /* Reads an msr value (of 'msr_index') into 'pdata'. Returns 0 on success, non-0 otherwise. Assumes vcpu_load() was already called. */
int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata) | {
return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Enables or disables ADC lower threshold detect function. */ | void ADC_LowerTHDCmd(uint32_t THDChannel, uint32_t NewState) | /* Enables or disables ADC lower threshold detect function. */
void ADC_LowerTHDCmd(uint32_t THDChannel, uint32_t NewState) | {
assert_parameters(IS_ADC_THDCHANNEL(THDChannel));
assert_parameters(IS_FUNCTIONAL_STATE(NewState));
if (NewState == DISABLE)
{
ANA->ADCCTRL1 &= ~(ANA_ADCCTRL1_LOWER_THD0_EN << (THDChannel*2));
}
else
{
ANA->ADCCTRL1 |= (ANA_ADCCTRL1_LOWER_THD0_EN << (THDChannel*2));
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Execute READ CAPACITY(10) SCSI command on a specific UFS device. */ | EFI_STATUS UfsPeimReadCapacity(IN UFS_PEIM_HC_PRIVATE_DATA *Private, IN UINTN Lun, OUT VOID *DataBuffer, OUT UINT32 *DataLength, OUT VOID *SenseData OPTIONAL, OUT UINT8 *SenseDataLength) | /* Execute READ CAPACITY(10) SCSI command on a specific UFS device. */
EFI_STATUS UfsPeimReadCapacity(IN UFS_PEIM_HC_PRIVATE_DATA *Private, IN UINTN Lun, OUT VOID *DataBuffer, OUT UINT32 *DataLength, OUT VOID *SenseData OPTIONAL, OUT UINT8 *SenseDataLength) | {
UFS_SCSI_REQUEST_PACKET Packet;
UINT8 Cdb[UFS_SCSI_OP_LENGTH_TEN];
EFI_STATUS Status;
ZeroMem (&Packet, sizeof (UFS_SCSI_REQUEST_PACKET));
ZeroMem (Cdb, sizeof (Cdb));
Cdb[0] = EFI_SCSI_OP_READ_CAPACITY;
Packet.Timeout = UFS_TIMEOUT;
Packet.Cdb = Cdb;
Packet.CdbLength = sizeof (Cdb);
Packet.InDataBuffer = DataBuffer;
Packet.InTransferLength = *DataLength;
Packet.DataDirection = UfsDataIn;
Packet.SenseData = SenseData;
Packet.SenseDataLength = *SenseDataLength;
Status = UfsExecScsiCmds (Private, (UINT8)Lun, &Packet);
if (*SenseDataLength != 0) {
*SenseDataLength = Packet.SenseDataLength;
}
if (!EFI_ERROR (Status)) {
*DataLength = Packet.InTransferLength;
}
return Status;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* adjust mtu, can't be called while device is running */ | static int bcm_enet_change_mtu(struct net_device *dev, int new_mtu) | /* adjust mtu, can't be called while device is running */
static int bcm_enet_change_mtu(struct net_device *dev, int new_mtu) | {
int ret;
if (netif_running(dev))
return -EBUSY;
ret = compute_hw_mtu(netdev_priv(dev), new_mtu);
if (ret)
return ret;
dev->mtu = new_mtu;
return 0;
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* SPI Set the Clock Polarity to Low when Idle. */ | void spi_set_clock_polarity_0(uint32_t spi) | /* SPI Set the Clock Polarity to Low when Idle. */
void spi_set_clock_polarity_0(uint32_t spi) | {
SPI_CR1(spi) &= ~SPI_CR1_CPOL;
} | insane-adding-machines/unicore-mx | C++ | GNU General Public License v3.0 | 50 |
/* Gets the selected ADC Software start injected conversion Status. */ | FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef *ADCx) | /* Gets the selected ADC Software start injected conversion Status. */
FlagStatus ADC_GetSoftwareStartInjectedConvCmdStatus(ADC_TypeDef *ADCx) | {
FlagStatus bitstatus = RESET;
assert_param(IS_ADC_ALL_PERIPH(ADCx));
if ((ADCx->CR2 & CR2_JSWSTART_Set) != (uint32_t)RESET)
{
bitstatus = SET;
}
else
{
bitstatus = RESET;
}
return bitstatus;
} | gcallipo/RadioDSP-Stm32f103 | C++ | Common Creative - Attribution 3.0 | 51 |
/* Given a wmem scope, a pointer, and a length, treat the string of bytes referred to by the pointer and length as an ISO 8859/1 string, and return a pointer to a UTF-8 string, allocated using the wmem scope. */ | guint8* get_8859_1_string(wmem_allocator_t *scope, const guint8 *ptr, gint length) | /* Given a wmem scope, a pointer, and a length, treat the string of bytes referred to by the pointer and length as an ISO 8859/1 string, and return a pointer to a UTF-8 string, allocated using the wmem scope. */
guint8* get_8859_1_string(wmem_allocator_t *scope, const guint8 *ptr, gint length) | {
wmem_strbuf_t *str;
str = wmem_strbuf_sized_new(scope, length+1, 0);
while (length > 0) {
guint8 ch = *ptr;
if (ch < 0x80)
wmem_strbuf_append_c(str, ch);
else {
wmem_strbuf_append_unichar(str, ch);
}
ptr++;
length--;
}
return (guint8 *) wmem_strbuf_finalize(str);
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* GetAlarmSummary-ACK ::= SEQUENCE OF SEQUENCE { objectIdentifier BACnetObjectIdentifer, alarmState BACnetEventState, acknowledgedTransitions BACnetEventTransitionBits } */ | static guint fGetAlarmSummaryAck(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, guint offset) | /* GetAlarmSummary-ACK ::= SEQUENCE OF SEQUENCE { objectIdentifier BACnetObjectIdentifer, alarmState BACnetEventState, acknowledgedTransitions BACnetEventTransitionBits } */
static guint fGetAlarmSummaryAck(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree, guint offset) | {
guint lastoffset = 0;
while (tvb_reported_length_remaining(tvb, offset) > 0) {
lastoffset = offset;
offset = fApplicationTypes(tvb, pinfo, tree, offset, "Object Identifier: ");
offset = fApplicationTypesEnumeratedSplit(tvb, pinfo, tree, offset,
"alarm State: ", BACnetEventState, 64);
offset = fApplicationTypesEnumerated(tvb, pinfo, tree, offset,
"acknowledged Transitions: ", BACnetEventTransitionBits);
if (offset == lastoffset) break;
}
return offset;
} | seemoo-lab/nexmon | C++ | GNU General Public License v3.0 | 2,330 |
/* If Address is not aligned on a 64-bit boundary, zero will be returned. */ | UINT64 EFIAPI HpetRead(IN UINTN Offset) | /* If Address is not aligned on a 64-bit boundary, zero will be returned. */
UINT64 EFIAPI HpetRead(IN UINTN Offset) | {
UINTN Address;
UINT64 Value;
Address = HPET_BASE_ADDRESS + Offset;
if ((Address & 7) == 0) {
return 0;
}
MemoryFence ();
Value = *(volatile UINT64 *)Address;
MemoryFence ();
return Value;
} | tianocore/edk2 | C++ | Other | 4,240 |
/* @regs: HDA registers @group_nid: Group node ID to check */ | static uint find_beep_node_in_group(struct hda_regs *regs, uint group_nid) | /* @regs: HDA registers @group_nid: Group node ID to check */
static uint find_beep_node_in_group(struct hda_regs *regs, uint group_nid) | {
uint node_count = 0;
uint current_nid = 0;
uint response;
uint end_nid;
int ret;
ret = get_subnode_info(regs, group_nid, &node_count, ¤t_nid);
if (ret < 0)
return 0;
end_nid = current_nid + node_count;
while (current_nid < end_nid) {
ret = exec_verb(regs,
hda_verb(current_nid, HDA_VERB_GET_PARAMS,
GET_PARAMS_AUDIO_WIDGET_CAPS),
&response);
if (ret < 0) {
printf("Audio: Error reading widget caps\n");
return 0;
}
if ((response & AUDIO_WIDGET_TYPE_M) >> AUDIO_WIDGET_TYPE_S ==
AUDIO_WIDGET_TYPE_BEEP)
return current_nid;
current_nid++;
}
return 0;
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* This internal function checks if a Unicode character is a decimal character. The valid hexadecimal character is L'0' to L'9', L'a' to L'f', or L'A' to L'F'. */ | BOOLEAN EFIAPI InternalIsHexaDecimalDigitCharacter(IN CHAR16 Char) | /* This internal function checks if a Unicode character is a decimal character. The valid hexadecimal character is L'0' to L'9', L'a' to L'f', or L'A' to L'F'. */
BOOLEAN EFIAPI InternalIsHexaDecimalDigitCharacter(IN CHAR16 Char) | {
return (BOOLEAN)(InternalIsDecimalDigitCharacter (Char) ||
(Char >= L'A' && Char <= L'F') ||
(Char >= L'a' && Char <= L'f'));
} | tianocore/edk2 | C++ | Other | 4,240 |
/* The ->payload, ->tot_len and ->len fields are adjusted. */ | u8_t pbuf_add_header(struct pbuf *p, size_t header_size_increment) | /* The ->payload, ->tot_len and ->len fields are adjusted. */
u8_t pbuf_add_header(struct pbuf *p, size_t header_size_increment) | {
return pbuf_add_header_impl(p, header_size_increment, 0);
} | ua1arn/hftrx | C++ | null | 69 |
/* Selects the trigger for the internal counter of batching events between XL and gyro.. */ | int32_t lsm6dso_fifo_cnt_event_batch_get(stmdev_ctx_t *ctx, lsm6dso_trig_counter_bdr_t *val) | /* Selects the trigger for the internal counter of batching events between XL and gyro.. */
int32_t lsm6dso_fifo_cnt_event_batch_get(stmdev_ctx_t *ctx, lsm6dso_trig_counter_bdr_t *val) | {
lsm6dso_counter_bdr_reg1_t reg;
int32_t ret;
ret = lsm6dso_read_reg(ctx, LSM6DSO_COUNTER_BDR_REG1, (uint8_t *)®,
1);
switch (reg.trig_counter_bdr) {
case LSM6DSO_XL_BATCH_EVENT:
*val = LSM6DSO_XL_BATCH_EVENT;
break;
case LSM6DSO_GYRO_BATCH_EVENT:
*val = LSM6DSO_GYRO_BATCH_EVENT;
break;
default:
*val = LSM6DSO_XL_BATCH_EVENT;
break;
}
return ret;
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* Enables or disables the I2C general call mode. */ | void I2C_GeneralCallCmd(I2C_TypeDef *I2Cx, FunctionalState NewState) | /* Enables or disables the I2C general call mode. */
void I2C_GeneralCallCmd(I2C_TypeDef *I2Cx, FunctionalState NewState) | {
assert_param(IS_I2C_ALL_PERIPH(I2Cx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
I2Cx->CR1 |= I2C_CR1_GCEN;
}
else
{
I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_GCEN);
}
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* If any reserved bits in Address are set, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */ | UINT8 EFIAPI PciSegmentBitFieldWrite8(IN UINT64 Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 Value) | /* If any reserved bits in Address are set, then ASSERT(). If StartBit is greater than 7, then ASSERT(). If EndBit is greater than 7, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */
UINT8 EFIAPI PciSegmentBitFieldWrite8(IN UINT64 Address, IN UINTN StartBit, IN UINTN EndBit, IN UINT8 Value) | {
return PciSegmentWrite8 (
Address,
BitFieldWrite8 (PciSegmentRead8 (Address), StartBit, EndBit, Value)
);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* Some interrupt flags need to be cleared for the controller to continue switching to sleep mode from the FD normal mode. */ | int32_t can_ctrl_clear_int(struct can_ctrl_dev *dev) | /* Some interrupt flags need to be cleared for the controller to continue switching to sleep mode from the FD normal mode. */
int32_t can_ctrl_clear_int(struct can_ctrl_dev *dev) | {
int32_t ret;
uint32_t temp = 0;
ret = can_ctrl_sfr_word_read(dev, CAN_CTRL_REG_INT, &temp);
if(ret != 0)
return ret;
temp &= ~INT_IVMIF_MODE(WORD_MASK);
temp &= ~INT_WAKIF_MODE(WORD_MASK);
temp &= ~INT_CERRIF_MODE(WORD_MASK);
temp &= ~INT_SERRIF_MODE(WORD_MASK);
temp &= ~INT_MODIF_MODE(WORD_MASK);
temp &= ~INT_TBCIF_MODE(WORD_MASK);
return can_ctrl_sfr_word_write(dev, CAN_CTRL_REG_INT, temp);
} | analogdevicesinc/EVAL-ADICUP3029 | C++ | Other | 36 |
/* Set "auto commit" property of the connection. If 'true', then rollback current transaction. If 'false', then start a new transaction. */ | static int conn_setautocommit(lua_State *L) | /* Set "auto commit" property of the connection. If 'true', then rollback current transaction. If 'false', then start a new transaction. */
static int conn_setautocommit(lua_State *L) | {
conn_data *conn = getconnection(L);
if (lua_toboolean(L, 2))
{
conn->auto_commit = 1;
sqlite_exec(conn->sql_conn, "ROLLBACK", NULL, NULL, NULL);
}
else
{
char *errmsg;
int res;
conn->auto_commit = 0;
res = sqlite_exec(conn->sql_conn, "BEGIN", NULL, NULL, &errmsg);
if (res != SQLITE_OK)
{
lua_pushliteral(L, LUASQL_PREFIX);
lua_pushstring(L, errmsg);
sqlite_freemem(errmsg);
lua_concat(L, 2);
lua_error(L);
}
}
lua_pushboolean(L, 1);
return 1;
} | DC-SWAT/DreamShell | C++ | null | 404 |
/* Function called when RNG IT is triggered with DRDY flag set. */ | void RNG_DataReady_Callback(void) | /* Function called when RNG IT is triggered with DRDY flag set. */
void RNG_DataReady_Callback(void) | {
LL_RNG_DisableIT(RNG);
aRandom32bit[ubIndex] = LL_RNG_ReadRandData32(RNG);
ubIsNbGenerated = 1;
} | STMicroelectronics/STM32CubeF4 | C++ | Other | 789 |
/* This only gets called when it is the last close */ | static void ftdi_close(struct usb_serial_port *port) | /* This only gets called when it is the last close */
static void ftdi_close(struct usb_serial_port *port) | {
struct ftdi_private *priv = usb_get_serial_port_data(port);
dbg("%s", __func__);
usb_kill_urb(port->read_urb);
kref_put(&priv->kref, ftdi_sio_priv_release);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Returns zero on success, a negative error code otherwise. */ | int mtd_ooblayout_set_databytes(struct mtd_info *mtd, const u8 *databuf, u8 *oobbuf, int start, int nbytes) | /* Returns zero on success, a negative error code otherwise. */
int mtd_ooblayout_set_databytes(struct mtd_info *mtd, const u8 *databuf, u8 *oobbuf, int start, int nbytes) | {
return mtd_ooblayout_set_bytes(mtd, databuf, oobbuf, start, nbytes,
mtd_ooblayout_free);
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* Initialize the DAC peripheral according to the specified parameters in the stc_dac_init_t. */ | int32_t DAC_Init(CM_DAC_TypeDef *DACx, uint16_t u16Ch, const stc_dac_init_t *pstcDacInit) | /* Initialize the DAC peripheral according to the specified parameters in the stc_dac_init_t. */
int32_t DAC_Init(CM_DAC_TypeDef *DACx, uint16_t u16Ch, const stc_dac_init_t *pstcDacInit) | {
int32_t i32Ret = LL_ERR_INVD_PARAM;
if (pstcDacInit != NULL) {
DDL_ASSERT(IS_VALID_UNIT(DACx));
DDL_ASSERT(IS_VALID_CH(u16Ch));
DDL_ASSERT(IS_FUNCTIONAL_STATE(pstcDacInit->enOutput));
DDL_ASSERT(IS_VALID_DATA_SRC(pstcDacInit->u16Src));
DAC_SetDataSrc(DACx, u16Ch, pstcDacInit->u16Src);
DAC_OutputCmd(DACx, u16Ch, pstcDacInit->enOutput);
i32Ret = LL_OK;
}
return i32Ret;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* this function will return the mounted path for specified device. */ | const char* dfs_filesystem_get_mounted_path(struct rt_device *device) | /* this function will return the mounted path for specified device. */
const char* dfs_filesystem_get_mounted_path(struct rt_device *device) | {
const char *path = NULL;
struct dfs_filesystem *iter;
dfs_lock();
for (iter = &filesystem_table[0];
iter < &filesystem_table[DFS_FILESYSTEMS_MAX]; iter++)
{
if (iter->ops == NULL) continue;
else if (iter->dev_id == device)
{
path = iter->path;
break;
}
}
dfs_unlock();
return path;
} | pikasTech/PikaPython | C++ | MIT License | 1,403 |
/* Receive one byte from an SPI device using USART in SPI mode. */ | void usart_spi_read_single(Usart *p_usart, uint8_t *data) | /* Receive one byte from an SPI device using USART in SPI mode. */
void usart_spi_read_single(Usart *p_usart, uint8_t *data) | {
uint32_t temp_data = 0;
usart_putchar(p_usart, CONFIG_USART_SPI_DUMMY);
usart_getchar(p_usart, &temp_data);
*data = (uint8_t)temp_data;
} | memfault/zero-to-main | C++ | null | 200 |
/* Returns zero in case of success and a negative error code in case of failure. */ | int mtd_device_parse_register(struct mtd_info *mtd, const char *const *types, struct mtd_part_parser_data *parser_data, const struct mtd_partition *parts, int nr_parts) | /* Returns zero in case of success and a negative error code in case of failure. */
int mtd_device_parse_register(struct mtd_info *mtd, const char *const *types, struct mtd_part_parser_data *parser_data, const struct mtd_partition *parts, int nr_parts) | {
int err;
struct mtd_partition *real_parts;
err = parse_mtd_partitions(mtd, types, &real_parts, parser_data);
if (err <= 0 && nr_parts && parts) {
real_parts = kmemdup(parts, sizeof(*parts) * nr_parts,
GFP_KERNEL);
if (!real_parts)
err = -ENOMEM;
else
err = nr_parts;
}
if (err > 0) {
err = add_mtd_partitions(mtd, real_parts, err);
kfree(real_parts);
} else if (err == 0) {
err = add_mtd_device(mtd);
if (err == 1)
err = -ENODEV;
}
return err;
} | 4ms/stm32mp1-baremetal | C++ | Other | 137 |
/* atl2_irq_disable - Mask off interrupt generation on the NIC @adapter: board private structure */ | static void atl2_irq_disable(struct atl2_adapter *adapter) | /* atl2_irq_disable - Mask off interrupt generation on the NIC @adapter: board private structure */
static void atl2_irq_disable(struct atl2_adapter *adapter) | {
ATL2_WRITE_REG(&adapter->hw, REG_IMR, 0);
ATL2_WRITE_FLUSH(&adapter->hw);
synchronize_irq(adapter->pdev->irq);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* This function will output a string to the correct StdOut. */ | EFI_STATUS InternalPrintTo(IN CONST CHAR16 *String) | /* This function will output a string to the correct StdOut. */
EFI_STATUS InternalPrintTo(IN CONST CHAR16 *String) | {
UINTN Size;
Size = StrSize (String) - sizeof (CHAR16);
if (Size == 0) {
return (EFI_SUCCESS);
}
if (gEfiShellParametersProtocol != NULL) {
return (gEfiShellProtocol->WriteFile (gEfiShellParametersProtocol->StdOut, &Size, (VOID *)String));
}
if (mEfiShellInterface != NULL) {
if (mEfiShellInterface->RedirArgc == 0) {
Size /= 2;
}
return (mEfiShellInterface->StdOut->Write (mEfiShellInterface->StdOut, &Size, (VOID *)String));
}
ASSERT (FALSE);
return (EFI_UNSUPPORTED);
} | tianocore/edk2 | C++ | Other | 4,240 |
/* The Dma Control register is programmed with the value given. The bits to be set are bit wise or'ed and sent as the second argument to this function. */ | s32 synopGMAC_dma_control_init(synopGMACdevice *gmacdev, u32 init_value) | /* The Dma Control register is programmed with the value given. The bits to be set are bit wise or'ed and sent as the second argument to this function. */
s32 synopGMAC_dma_control_init(synopGMACdevice *gmacdev, u32 init_value) | {
synopGMACWriteReg(gmacdev->DmaBase, DmaControl, init_value);
return 0;
} | RT-Thread/rt-thread | C++ | Apache License 2.0 | 9,535 |
/* Performs a software reset of the specified SPI module */ | void SPIReset(unsigned long ulBase) | /* Performs a software reset of the specified SPI module */
void SPIReset(unsigned long ulBase) | {
HWREG(ulBase + MCSPI_O_SYSCONFIG) |= MCSPI_SYSCONFIG_SOFTRESET;
while(!(HWREG(ulBase + MCSPI_O_SYSSTATUS)& MCSPI_SYSSTATUS_RESETDONE))
{
}
} | micropython/micropython | C++ | Other | 18,334 |
/* get the next mount in the propagation tree. @m: the mount seen last @origin: the original mount from where the tree walk initiated */ | static struct vfsmount* propagation_next(struct vfsmount *m, struct vfsmount *origin) | /* get the next mount in the propagation tree. @m: the mount seen last @origin: the original mount from where the tree walk initiated */
static struct vfsmount* propagation_next(struct vfsmount *m, struct vfsmount *origin) | {
if (!IS_MNT_NEW(m) && !list_empty(&m->mnt_slave_list))
return first_slave(m);
while (1) {
struct vfsmount *next;
struct vfsmount *master = m->mnt_master;
if (master == origin->mnt_master) {
next = next_peer(m);
return ((next == origin) ? NULL : next);
} else if (m->mnt_slave.next != &master->mnt_slave_list)
return next_slave(m);
m = master;
}
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Negotiate the window size. This is a type 1 parameter and will be negotiated independently for each station */ | static int irlap_param_window_size(void *instance, irda_param_t *param, int get) | /* Negotiate the window size. This is a type 1 parameter and will be negotiated independently for each station */
static int irlap_param_window_size(void *instance, irda_param_t *param, int get) | {
struct irlap_cb *self = (struct irlap_cb *) instance;
IRDA_ASSERT(self != NULL, return -1;);
IRDA_ASSERT(self->magic == LAP_MAGIC, return -1;);
if (get)
param->pv.i = self->qos_rx.window_size.bits;
else
self->qos_tx.window_size.bits = (__u8) param->pv.i;
return 0;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* xfs_filestream_uninit() is called at xfs termination time to destroy the memory zone that was used for filestream data structure allocation. */ | void xfs_filestream_uninit(void) | /* xfs_filestream_uninit() is called at xfs termination time to destroy the memory zone that was used for filestream data structure allocation. */
void xfs_filestream_uninit(void) | {
kmem_zone_destroy(item_zone);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* We block accesses to device mc filters with netif_tx_lock. Delete a device level multicast */ | int dev_mc_delete(struct net_device *dev, void *addr, int alen, int glbl) | /* We block accesses to device mc filters with netif_tx_lock. Delete a device level multicast */
int dev_mc_delete(struct net_device *dev, void *addr, int alen, int glbl) | {
int err;
netif_addr_lock_bh(dev);
err = __dev_addr_delete(&dev->mc_list, &dev->mc_count,
addr, alen, glbl);
if (!err) {
__dev_set_rx_mode(dev);
}
netif_addr_unlock_bh(dev);
return err;
} | EmcraftSystems/linux-emcraft | C++ | Other | 266 |
/* Handle the change of state of the backend to Closing. We must delete our device-layer structures now, to ensure that writes are flushed through to the backend. Once is this done, we can switch to Closed in acknowledgement. */ | static void blkfront_closing(struct xenbus_device *dev) | /* Handle the change of state of the backend to Closing. We must delete our device-layer structures now, to ensure that writes are flushed through to the backend. Once is this done, we can switch to Closed in acknowledgement. */
static void blkfront_closing(struct xenbus_device *dev) | {
struct blkfront_info *info = dev_get_drvdata(&dev->dev);
unsigned long flags;
dev_dbg(&dev->dev, "blkfront_closing: %s removed\n", dev->nodename);
if (info->rq == NULL)
goto out;
spin_lock_irqsave(&blkif_io_lock, flags);
blk_stop_queue(info->rq);
gnttab_cancel_free_callback(&info->callback);
spin_unlock_irqrestore(&blkif_io_lock, flags);
flush_scheduled_work();
blk_cleanup_queue(info->rq);
info->rq = NULL;
del_gendisk(info->gd);
out:
xenbus_frontend_closed(dev);
} | robutest/uclinux | C++ | GPL-2.0 | 60 |
/* Writes N bytes to the specified mailbox register. */ | int32_t ST25DV_WriteMailboxRegister(ST25DV_Object_t *pObj, const uint8_t *const pData, const uint16_t TarAddr, const uint16_t NbByte) | /* Writes N bytes to the specified mailbox register. */
int32_t ST25DV_WriteMailboxRegister(ST25DV_Object_t *pObj, const uint8_t *const pData, const uint16_t TarAddr, const uint16_t NbByte) | {
int32_t status = ST25DV_ERROR;
if( (TarAddr >= ST25DV_GPO_DYN_REG) && (TarAddr <= ST25DV_MBLEN_DYN_REG) )
{
status = pObj->IO.Write( ST25DV_ADDR_DATA_I2C, TarAddr,pData, NbByte);
}
return status;
} | eclipse-threadx/getting-started | C++ | Other | 310 |
/* Function for the GAP initialization.
This function will set up all the necessary GAP (Generic Access Profile) parameters of the device. It also sets the permissions and appearance. */ | static void gap_params_init(void) | /* Function for the GAP initialization.
This function will set up all the necessary GAP (Generic Access Profile) parameters of the device. It also sets the permissions and appearance. */
static void gap_params_init(void) | {
uint32_t err_code;
ble_gap_conn_params_t gap_conn_params;
ble_gap_conn_sec_mode_t sec_mode;
BLE_GAP_CONN_SEC_MODE_SET_OPEN(&sec_mode);
err_code = sd_ble_gap_device_name_set(&sec_mode,
(const uint8_t *) DEVICE_NAME,
strlen(DEVICE_NAME));
APP_ERROR_CHECK(err_code);
memset(&gap_conn_params, 0, sizeof(gap_conn_params));
gap_conn_params.min_conn_interval = MIN_CONN_INTERVAL;
gap_conn_params.max_conn_interval = MAX_CONN_INTERVAL;
gap_conn_params.slave_latency = SLAVE_LATENCY;
gap_conn_params.conn_sup_timeout = CONN_SUP_TIMEOUT;
err_code = sd_ble_gap_ppcp_set(&gap_conn_params);
APP_ERROR_CHECK(err_code);
} | labapart/polymcu | C++ | null | 201 |
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