docstring
stringlengths 22
576
| signature
stringlengths 9
317
| prompt
stringlengths 57
886
| code
stringlengths 20
1.36k
| repository
stringclasses 49
values | language
stringclasses 2
values | license
stringclasses 9
values | stars
int64 15
21.3k
|
|---|---|---|---|---|---|---|---|
/* We enforce only one user at a time here with the open/close. Also clear the previous interrupt data on an open, and clean up things on a close. */
|
static int gen_rtc_open(struct inode *inode, struct file *file)
|
/* We enforce only one user at a time here with the open/close. Also clear the previous interrupt data on an open, and clean up things on a close. */
static int gen_rtc_open(struct inode *inode, struct file *file)
|
{
lock_kernel();
if (gen_rtc_status & RTC_IS_OPEN) {
unlock_kernel();
return -EBUSY;
}
gen_rtc_status |= RTC_IS_OPEN;
gen_rtc_irq_data = 0;
irq_active = 0;
unlock_kernel();
return 0;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Get a buffer for the bitmap or summary file block specified. The buffer is returned read and locked. */
|
STATIC int xfs_rtbuf_get(xfs_mount_t *mp, xfs_trans_t *tp, xfs_rtblock_t block, int issum, xfs_buf_t **bpp)
|
/* Get a buffer for the bitmap or summary file block specified. The buffer is returned read and locked. */
STATIC int xfs_rtbuf_get(xfs_mount_t *mp, xfs_trans_t *tp, xfs_rtblock_t block, int issum, xfs_buf_t **bpp)
|
{
xfs_buf_t *bp;
xfs_daddr_t d;
int error;
xfs_fsblock_t fsb;
xfs_inode_t *ip;
ip = issum ? mp->m_rsumip : mp->m_rbmip;
error = xfs_bmapi_single(tp, ip, XFS_DATA_FORK, &fsb, block);
if (error) {
return error;
}
ASSERT(fsb != NULLFSBLOCK);
d = XFS_FSB_TO_DADDR(mp, fsb);
error = xfs_trans_read_buf(mp, tp, mp->m_ddev_targp, d,
mp->m_bsize, 0, &bp);
if (error) {
return error;
}
ASSERT(bp && !XFS_BUF_GETERROR(bp));
*bpp = bp;
return 0;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Reads and returns the current value of CR3. This function is only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on X64. */
|
UINTN EFIAPI AsmReadCr3(VOID)
|
/* Reads and returns the current value of CR3. This function is only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on X64. */
UINTN EFIAPI AsmReadCr3(VOID)
|
{
UINTN Data;
__asm__ __volatile__ (
"movl %%cr3, %0"
: "=r" (Data)
);
return Data;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* param pfd Which PFD clock to enable. param pfdFrac The PFD FRAC value. note It is recommended that PFD settings are kept between 12-35. */
|
void CLOCK_InitUsb1Pfd(clock_pfd_t pfd, uint8_t pfdFrac)
|
/* param pfd Which PFD clock to enable. param pfdFrac The PFD FRAC value. note It is recommended that PFD settings are kept between 12-35. */
void CLOCK_InitUsb1Pfd(clock_pfd_t pfd, uint8_t pfdFrac)
|
{
uint32_t pfdIndex = (uint32_t)pfd;
uint32_t pfd480;
pfd480 = CCM_ANALOG->PFD_480 &
~((CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK | CCM_ANALOG_PFD_480_PFD0_FRAC_MASK) << (8 * pfdIndex));
CCM_ANALOG->PFD_480 = pfd480 | (CCM_ANALOG_PFD_480_PFD0_CLKGATE_MASK << (8 * pfdIndex));
CCM_ANALOG->PFD_480 = pfd480 | (CCM_ANALOG_PFD_480_PFD0_FRAC(pfdFrac) << (8 * pfdIndex));
}
|
nanoframework/nf-interpreter
|
C++
|
MIT License
| 293
|
/* We do not support this, because we assume that all clock rates are fixed. */
|
int clk_set_rate(struct clk *clk, unsigned long rate)
|
/* We do not support this, because we assume that all clock rates are fixed. */
int clk_set_rate(struct clk *clk, unsigned long rate)
|
{
int ret;
if (clk->clk_set_rate)
ret = clk->clk_set_rate(clk, rate);
else
ret = -EINVAL;
return ret;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Print the decimal signed BYTE to instruction content. */
|
UINTN EdbPrintData8s(IN UINT8 Data8)
|
/* Print the decimal signed BYTE to instruction content. */
UINTN EdbPrintData8s(IN UINT8 Data8)
|
{
BOOLEAN Sign;
Sign = (BOOLEAN)(Data8 >> 7);
EDBSPrintWithOffset (
mInstructionString.Content,
EDB_INSTRUCTION_CONTENT_MAX_SIZE,
mInstructionContentOffset,
L"%s%d",
Sign ? L"-" : L"+",
(UINTN)(Data8 & 0x7F)
);
mInstructionContentOffset = mInstructionContentOffset + 1 + EdbGetBitWidth (Data8 & 0x7F);
return mInstructionContentOffset;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Used to statically setup interrupts in the early boot process. */
|
int setup_irq(unsigned int irq, struct irqaction *act)
|
/* Used to statically setup interrupts in the early boot process. */
int setup_irq(unsigned int irq, struct irqaction *act)
|
{
struct irq_desc *desc = irq_to_desc(irq);
return __setup_irq(irq, desc, act);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Reset context type (Direct calls are not recommended) */
|
void rt_hwcrypto_ctx_reset(struct rt_hwcrypto_ctx *ctx)
|
/* Reset context type (Direct calls are not recommended) */
void rt_hwcrypto_ctx_reset(struct rt_hwcrypto_ctx *ctx)
|
{
if (ctx && ctx->device->ops->reset)
{
ctx->device->ops->reset(ctx);
}
}
|
pikasTech/PikaPython
|
C++
|
MIT License
| 1,403
|
/* This function writes the PDF Catalog structure to output. */
|
tsize_t t2p_write_pdf_catalog(T2P *, TIFF *)
|
/* This function writes the PDF Catalog structure to output. */
tsize_t t2p_write_pdf_catalog(T2P *, TIFF *)
|
{
tsize_t written = 0;
char buffer[32];
int buflen = 0;
written += t2pWriteFile(output,
(tdata_t)"<< \n/Type /Catalog \n/Pages ",
27);
buflen = snprintf(buffer, sizeof(buffer), "%lu", (unsigned long)t2p->pdf_pages);
check_snprintf_ret(t2p, buflen, buffer);
written += t2pWriteFile(output, (tdata_t) buffer,
TIFFmin((size_t)buflen, sizeof(buffer) - 1));
written += t2pWriteFile(output, (tdata_t) " 0 R \n", 6);
if(t2p->pdf_fitwindow){
written += t2pWriteFile(output,
(tdata_t) "/ViewerPreferences <</FitWindow true>>\n",
39);
}
written += t2pWriteFile(output, (tdata_t)">>\n", 3);
return(written);
}
|
alibaba/AliOS-Things
|
C++
|
Apache License 2.0
| 4,536
|
/* This function retrieves the user readable name of a driver in the form of a Unicode string. If the driver specified by This has a user readable name in the language specified by Language, then a pointer to the driver name is returned in DriverName, and EFI_SUCCESS is returned. If the driver specified by This does not support the language specified by Language, then EFI_UNSUPPORTED is returned. */
|
EFI_STATUS EFIAPI UsbMouseComponentNameGetDriverName(IN EFI_COMPONENT_NAME_PROTOCOL *This, IN CHAR8 *Language, OUT CHAR16 **DriverName)
|
/* This function retrieves the user readable name of a driver in the form of a Unicode string. If the driver specified by This has a user readable name in the language specified by Language, then a pointer to the driver name is returned in DriverName, and EFI_SUCCESS is returned. If the driver specified by This does not support the language specified by Language, then EFI_UNSUPPORTED is returned. */
EFI_STATUS EFIAPI UsbMouseComponentNameGetDriverName(IN EFI_COMPONENT_NAME_PROTOCOL *This, IN CHAR8 *Language, OUT CHAR16 **DriverName)
|
{
return LookupUnicodeString2 (
Language,
This->SupportedLanguages,
mUsbMouseDriverNameTable,
DriverName,
(BOOLEAN)(This == &gUsbMouseComponentName)
);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Reset a lv_task. It will be called the previously set period milliseconds later. */
|
void lv_task_reset(lv_task_t *lv_task_p)
|
/* Reset a lv_task. It will be called the previously set period milliseconds later. */
void lv_task_reset(lv_task_t *lv_task_p)
|
{
lv_task_p->last_run = lv_tick_get();
}
|
RavenSystem/esp-homekit-devices
|
C++
|
Other
| 2,577
|
/* Find the CacheEntry, using ProtocolAddress or HardwareAddress or both, as the keyword, in the DeniedCacheTable. */
|
ARP_CACHE_ENTRY* ArpFindDeniedCacheEntry(IN ARP_SERVICE_DATA *ArpService, IN NET_ARP_ADDRESS *ProtocolAddress OPTIONAL, IN NET_ARP_ADDRESS *HardwareAddress OPTIONAL)
|
/* Find the CacheEntry, using ProtocolAddress or HardwareAddress or both, as the keyword, in the DeniedCacheTable. */
ARP_CACHE_ENTRY* ArpFindDeniedCacheEntry(IN ARP_SERVICE_DATA *ArpService, IN NET_ARP_ADDRESS *ProtocolAddress OPTIONAL, IN NET_ARP_ADDRESS *HardwareAddress OPTIONAL)
|
{
ARP_CACHE_ENTRY *CacheEntry;
ASSERT ((ProtocolAddress != NULL) || (HardwareAddress != NULL));
NET_CHECK_SIGNATURE (ArpService, ARP_SERVICE_DATA_SIGNATURE);
CacheEntry = NULL;
if ((ProtocolAddress != NULL) && (ProtocolAddress->AddressPtr != NULL)) {
CacheEntry = ArpFindNextCacheEntryInTable (
&ArpService->DeniedCacheTable,
NULL,
ByProtoAddress,
ProtocolAddress,
NULL
);
if (CacheEntry != NULL) {
return CacheEntry;
}
}
if ((HardwareAddress != NULL) && (HardwareAddress->AddressPtr != NULL)) {
CacheEntry = ArpFindNextCacheEntryInTable (
&ArpService->DeniedCacheTable,
NULL,
ByHwAddress,
NULL,
HardwareAddress
);
}
return CacheEntry;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* This function is used configure the Power Level. */
|
void XSdPs_ConfigPower(XSdPs *InstancePtr)
|
/* This function is used configure the Power Level. */
void XSdPs_ConfigPower(XSdPs *InstancePtr)
|
{
u8 PowerLevel;
if ((InstancePtr->Host_Caps & XSDPS_CAP_VOLT_3V3_MASK) != 0U) {
PowerLevel = XSDPS_PC_BUS_VSEL_3V3_MASK;
} else if ((InstancePtr->Host_Caps & XSDPS_CAP_VOLT_3V0_MASK) != 0U) {
PowerLevel = XSDPS_PC_BUS_VSEL_3V0_MASK;
} else if ((InstancePtr->Host_Caps & XSDPS_CAP_VOLT_1V8_MASK) != 0U) {
PowerLevel = XSDPS_PC_BUS_VSEL_1V8_MASK;
} else {
PowerLevel = 0U;
}
XSdPs_WriteReg8(InstancePtr->Config.BaseAddress,
XSDPS_POWER_CTRL_OFFSET,
PowerLevel | XSDPS_PC_BUS_PWR_MASK);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Configure the lookup table (LUT) unit of GLOC. */
|
void gloc_lut_set_config(struct gloc_dev_inst *const dev_inst, uint32_t lut_id, struct gloc_lut_config *const config)
|
/* Configure the lookup table (LUT) unit of GLOC. */
void gloc_lut_set_config(struct gloc_dev_inst *const dev_inst, uint32_t lut_id, struct gloc_lut_config *const config)
|
{
if (config->filter) {
dev_inst->hw_dev->GLOC_LUT[lut_id].GLOC_CR = GLOC_CR_FILTEN |
GLOC_CR_AEN(config->input_mask);
} else {
dev_inst->hw_dev->GLOC_LUT[lut_id].GLOC_CR =
GLOC_CR_AEN(config->input_mask);
}
dev_inst->hw_dev->GLOC_LUT[lut_id].GLOC_TRUTH = config->truth_table_value;
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* The queries the low order bit of the status register, which indicates whether the current configuration or readback operation has completed. */
|
static bool buffer_icap_busy(void __iomem *base_address)
|
/* The queries the low order bit of the status register, which indicates whether the current configuration or readback operation has completed. */
static bool buffer_icap_busy(void __iomem *base_address)
|
{
u32 status = in_be32(base_address + XHI_STATUS_REG_OFFSET);
return (status & 1) == XHI_NOT_FINISHED;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* param base FlexCAN peripheral base address. param mask Rx Fifo Global Mask value. */
|
void FLEXCAN_SetRxFifoGlobalMask(CAN_Type *base, uint32_t mask)
|
/* param base FlexCAN peripheral base address. param mask Rx Fifo Global Mask value. */
void FLEXCAN_SetRxFifoGlobalMask(CAN_Type *base, uint32_t mask)
|
{
FLEXCAN_EnterFreezeMode(base);
base->RXFGMASK = mask;
FLEXCAN_ExitFreezeMode(base);
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* free buffer used from application by toggling the SW_BUF byte */
|
void user_buffer_free(uint8_t ep_num, uint8_t dir)
|
/* free buffer used from application by toggling the SW_BUF byte */
void user_buffer_free(uint8_t ep_num, uint8_t dir)
|
{
if ((uint8_t)DBUF_EP_OUT == dir) {
USBD_TX_DTG_TOGGLE(ep_num);
} else if ((uint8_t)DBUF_EP_IN == dir) {
USBD_RX_DTG_TOGGLE(ep_num);
} else {
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* my_useragent: returns allocated string with default user agent */
|
static char* my_useragent(void)
|
/* my_useragent: returns allocated string with default user agent */
static char* my_useragent(void)
|
{
return strdup(CURL_NAME "/" CURL_VERSION);
}
|
alibaba/AliOS-Things
|
C++
|
Apache License 2.0
| 4,536
|
/* Writes the current value of MM1. This function is only available on IA32 and x64. */
|
VOID EFIAPI AsmWriteMm1(IN UINT64 Value)
|
/* Writes the current value of MM1. This function is only available on IA32 and x64. */
VOID EFIAPI AsmWriteMm1(IN UINT64 Value)
|
{
_asm {
movq mm1, qword ptr [Value]
emms
}
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* This function maps from the Bxxxx defines in asm/termbits.h into real baud rates. */
|
static int cflag_to_baud(unsigned int cflag)
|
/* This function maps from the Bxxxx defines in asm/termbits.h into real baud rates. */
static int cflag_to_baud(unsigned int cflag)
|
{
static int baud_table[] = {
0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400,
4800, 9600, 19200, 38400 };
static int ext_baud_table[] = {
0, 57600, 115200, 230400, 460800, 921600, 1843200, 6250000,
0, 0, 0, 0, 0, 0, 0, 0 };
if (cflag & CBAUDEX)
return ext_baud_table[(cflag & CBAUD) & ~CBAUDEX];
else
return baud_table[cflag & CBAUD];
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Initializes MCU, drivers and middleware in the project */
|
void atmel_start_init(void)
|
/* Initializes MCU, drivers and middleware in the project */
void atmel_start_init(void)
|
{
system_init();
ethernet_phys_init();
stdio_redirect_init();
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* Configure the I2C Peripheral used to communicate with IO_Expanders. */
|
static void IOE_I2C_Config(void)
|
/* Configure the I2C Peripheral used to communicate with IO_Expanders. */
static void IOE_I2C_Config(void)
|
{
I2C_InitTypeDef I2C_InitStructure;
I2C_InitStructure.I2C_Mode = I2C_Mode_I2C;
I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2;
I2C_InitStructure.I2C_OwnAddress1 = 0x00;
I2C_InitStructure.I2C_Ack = I2C_Ack_Enable;
I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
I2C_InitStructure.I2C_ClockSpeed = IOE_I2C_SPEED;
I2C_Init(IOE_I2C, &I2C_InitStructure);
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* Locking Note: The lport lock is expected to be held before calling this function. */
|
static void fc_lport_set_port_id(struct fc_lport *lport, u32 port_id, struct fc_frame *fp)
|
/* Locking Note: The lport lock is expected to be held before calling this function. */
static void fc_lport_set_port_id(struct fc_lport *lport, u32 port_id, struct fc_frame *fp)
|
{
if (port_id)
printk(KERN_INFO "host%d: Assigned Port ID %6x\n",
lport->host->host_no, port_id);
fc_host_port_id(lport->host) = port_id;
if (lport->tt.lport_set_port_id)
lport->tt.lport_set_port_id(lport, port_id, fp);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Interrupt service routine for the digital regulator brownout.
Determines which digital regulator is in brownout, then calls the installed brownout handler routine. */
|
void pmu_digital_brownout_isr(void)
|
/* Interrupt service routine for the digital regulator brownout.
Determines which digital regulator is in brownout, then calls the installed brownout handler routine. */
void pmu_digital_brownout_isr(void)
|
{
if (s_pmu.ldoArm.isInBrownout())
{
s_pmu.ldoArm.getBrownoutHandler()(kPMURegulator_ArmCore);
}
if (s_pmu.ldoGraphics.isInBrownout())
{
s_pmu.ldoGraphics.getBrownoutHandler()(kPMURegulator_Graphics);
}
if (s_pmu.ldoSoC.isInBrownout())
{
s_pmu.ldoSoC.getBrownoutHandler()(kPMURegulator_SoC);
}
HW_PMU_MISC1_SET(BM_PMU_MISC1_IRQ_DIG_BO);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* If any events of physical ConIn devices are signaled, signal the ConIn spliter event. This will cause the calling code to call ConSplitterTextInReadKeyStroke (). */
|
VOID EFIAPI ConSplitterTextInWaitForKey(IN EFI_EVENT Event, IN VOID *Context)
|
/* If any events of physical ConIn devices are signaled, signal the ConIn spliter event. This will cause the calling code to call ConSplitterTextInReadKeyStroke (). */
VOID EFIAPI ConSplitterTextInWaitForKey(IN EFI_EVENT Event, IN VOID *Context)
|
{
EFI_STATUS Status;
TEXT_IN_SPLITTER_PRIVATE_DATA *Private;
UINTN Index;
Private = (TEXT_IN_SPLITTER_PRIVATE_DATA *)Context;
if (Private->KeyEventSignalState) {
gBS->SignalEvent (Event);
return;
}
for (Index = 0; Index < Private->CurrentNumberOfConsoles; Index++) {
Status = gBS->CheckEvent (Private->TextInList[Index]->WaitForKey);
if (!EFI_ERROR (Status)) {
gBS->SignalEvent (Event);
Private->KeyEventSignalState = TRUE;
}
}
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Init the DMA channel Interrupt Callback function.
param of pfnCallback */
|
void DMAChannelIntCallbackInit(unsigned long ulChannelID, xtEventCallback pfnCallback)
|
/* Init the DMA channel Interrupt Callback function.
param of pfnCallback */
void DMAChannelIntCallbackInit(unsigned long ulChannelID, xtEventCallback pfnCallback)
|
{
int i;
xASSERT(xDMAChannelIDValid(ulChannelID));
for(i = 0; g_psDMAChannelAssignTable[i].ulChannelID !=
xDMA_CHANNEL_NOT_EXIST;
i++)
{
if(g_psDMAChannelAssignTable[i].ulChannelID == ulChannelID)
{
g_psDMAChannelAssignTable[i].pfnDMAChannelHandlerCallback =
pfnCallback;
break;
}
}
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* Deallocates a mailbox. If there are messages still present in the mailbox when the mailbox is deallocated, it is an indication of a programming error in lwIP and the developer should be notified. */
|
void sys_mbox_free(sys_mbox_t mbox)
|
/* Deallocates a mailbox. If there are messages still present in the mailbox when the mailbox is deallocated, it is an indication of a programming error in lwIP and the developer should be notified. */
void sys_mbox_free(sys_mbox_t mbox)
|
{
if( uxQueueMessagesWaiting( mbox ) )
{
__asm volatile ( "NOP" );
}
vQueueDelete( mbox );
}
|
apopple/Pandaboard-FreeRTOS
|
C++
| null | 25
|
/* Move request from internal lists to the request queue dispatch list. */
|
static void cfq_dispatch_insert(struct request_queue *, struct request *)
|
/* Move request from internal lists to the request queue dispatch list. */
static void cfq_dispatch_insert(struct request_queue *, struct request *)
|
{
struct cfq_data *cfqd = q->elevator->elevator_data;
struct cfq_queue *cfqq = RQ_CFQQ(rq);
cfq_log_cfqq(cfqd, cfqq, "dispatch_insert");
cfqq->next_rq = cfq_find_next_rq(cfqd, cfqq, rq);
cfq_remove_request(rq);
cfqq->dispatched++;
elv_dispatch_sort(q, rq);
if (cfq_cfqq_sync(cfqq))
cfqd->sync_flight++;
cfqq->nr_sectors += blk_rq_sectors(rq);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Match the received packet with the instance receive filters. */
|
BOOLEAN MnpMatchPacket(IN MNP_INSTANCE_DATA *Instance, IN EFI_MANAGED_NETWORK_RECEIVE_DATA *RxData, IN MNP_GROUP_ADDRESS *GroupAddress OPTIONAL, IN UINT8 PktAttr)
|
/* Match the received packet with the instance receive filters. */
BOOLEAN MnpMatchPacket(IN MNP_INSTANCE_DATA *Instance, IN EFI_MANAGED_NETWORK_RECEIVE_DATA *RxData, IN MNP_GROUP_ADDRESS *GroupAddress OPTIONAL, IN UINT8 PktAttr)
|
{
EFI_MANAGED_NETWORK_CONFIG_DATA *ConfigData;
LIST_ENTRY *Entry;
MNP_GROUP_CONTROL_BLOCK *GroupCtrlBlk;
NET_CHECK_SIGNATURE (Instance, MNP_INSTANCE_DATA_SIGNATURE);
ConfigData = &Instance->ConfigData;
if ((ConfigData->ProtocolTypeFilter != 0) && (ConfigData->ProtocolTypeFilter != RxData->ProtocolType)) {
return FALSE;
}
if (ConfigData->EnablePromiscuousReceive) {
return TRUE;
}
if ((Instance->ReceiveFilter & PktAttr) != 0) {
return TRUE;
}
if (ConfigData->EnableMulticastReceive && RxData->MulticastFlag) {
ASSERT (GroupAddress != NULL);
NET_LIST_FOR_EACH (Entry, &Instance->GroupCtrlBlkList) {
GroupCtrlBlk = NET_LIST_USER_STRUCT (Entry, MNP_GROUP_CONTROL_BLOCK, CtrlBlkEntry);
if (GroupCtrlBlk->GroupAddress == GroupAddress) {
return TRUE;
}
}
}
return FALSE;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Write to TX register using non-blocking method.
This function writes data to the TX register directly, upper layer must make sure the TX register is empty or TX FIFO has empty room before calling this function. */
|
static void LPUART_WriteNonBlocking(LPUART_Type *base, const uint8_t *data, size_t length)
|
/* Write to TX register using non-blocking method.
This function writes data to the TX register directly, upper layer must make sure the TX register is empty or TX FIFO has empty room before calling this function. */
static void LPUART_WriteNonBlocking(LPUART_Type *base, const uint8_t *data, size_t length)
|
{
assert(data);
size_t i;
for (i = 0; i < length; i++)
{
base->DATA = data[i];
}
}
|
nanoframework/nf-interpreter
|
C++
|
MIT License
| 293
|
/* Deinitializes the i2c peripheral registers to their default reset values. */
|
void I2C_DeInit(I2C_TypeDef *i2c)
|
/* Deinitializes the i2c peripheral registers to their default reset values. */
void I2C_DeInit(I2C_TypeDef *i2c)
|
{
switch (*(vu32*)&i2c) {
case (u32)I2C1:
exRCC_APB1PeriphReset(RCC_APB1ENR_I2C1);
break;
case (u32)I2C2:
exRCC_APB1PeriphReset(RCC_APB1ENR_I2C2);
break;
default:
break;
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* register the tsi108 ethernet controllers with the multi-ethernet system */
|
int tsi108_eth_initialize(bd_t *bis)
|
/* register the tsi108 ethernet controllers with the multi-ethernet system */
int tsi108_eth_initialize(bd_t *bis)
|
{
struct eth_device *dev;
int index;
for (index = 0; index < CONFIG_TSI108_ETH_NUM_PORTS; index++) {
dev = (struct eth_device *)malloc(sizeof(struct eth_device));
sprintf (dev->name, "TSI108_eth%d", index);
dev->iobase = ETH_BASE + (index * ETH_PORT_OFFSET);
dev->priv = (void *)(phy_address[index]);
dev->init = tsi108_eth_probe;
dev->halt = tsi108_eth_halt;
dev->send = tsi108_eth_send;
dev->recv = tsi108_eth_recv;
eth_register(dev);
}
return index;
}
|
EmcraftSystems/u-boot
|
C++
|
Other
| 181
|
/* Convert a single character to number. It assumes the input Char is in the scope of L'0' ~ L'9' and L'A' ~ L'F' */
|
UINTN BmCharToUint(IN CHAR16 Char)
|
/* Convert a single character to number. It assumes the input Char is in the scope of L'0' ~ L'9' and L'A' ~ L'F' */
UINTN BmCharToUint(IN CHAR16 Char)
|
{
if ((Char >= L'0') && (Char <= L'9')) {
return (Char - L'0');
}
if ((Char >= L'A') && (Char <= L'F')) {
return (Char - L'A' + 0xA);
}
return (UINTN)-1;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Register a nofault code region which performs a cross-partition PIO read. If the PIO read times out, the MCA handler will consume the error and return to a kernel-provided instruction to indicate an error. This PIO read exists because it is guaranteed to timeout if the destination is down (amo operations do not timeout on at least some CPUs on Shubs <= v1.2, which unfortunately we have to work around). */
|
static enum xp_retval xp_register_nofault_code_sn2(void)
|
/* Register a nofault code region which performs a cross-partition PIO read. If the PIO read times out, the MCA handler will consume the error and return to a kernel-provided instruction to indicate an error. This PIO read exists because it is guaranteed to timeout if the destination is down (amo operations do not timeout on at least some CPUs on Shubs <= v1.2, which unfortunately we have to work around). */
static enum xp_retval xp_register_nofault_code_sn2(void)
|
{
int ret;
u64 func_addr;
u64 err_func_addr;
func_addr = *(u64 *)xp_nofault_PIOR;
err_func_addr = *(u64 *)xp_error_PIOR;
ret = sn_register_nofault_code(func_addr, err_func_addr, err_func_addr,
1, 1);
if (ret != 0) {
dev_err(xp, "can't register nofault code, error=%d\n", ret);
return xpSalError;
}
if (is_shub1())
xp_nofault_PIOR_target = SH1_IPI_ACCESS;
else if (is_shub2())
xp_nofault_PIOR_target = SH2_IPI_ACCESS0;
return xpSuccess;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Calculates the checksum of the header of a file. The header is a zero byte checksum, so zero means header is good */
|
STATIC UINT8 CalculateHeaderChecksum(IN EFI_FFS_FILE_HEADER *FileHeader)
|
/* Calculates the checksum of the header of a file. The header is a zero byte checksum, so zero means header is good */
STATIC UINT8 CalculateHeaderChecksum(IN EFI_FFS_FILE_HEADER *FileHeader)
|
{
UINT8 *Ptr;
UINTN Index;
UINT8 Sum;
Sum = 0;
Ptr = (UINT8 *)FileHeader;
for (Index = 0; Index < sizeof (EFI_FFS_FILE_HEADER) - 3; Index += 4) {
Sum = (UINT8)(Sum + Ptr[Index]);
Sum = (UINT8)(Sum + Ptr[Index+1]);
Sum = (UINT8)(Sum + Ptr[Index+2]);
Sum = (UINT8)(Sum + Ptr[Index+3]);
}
for ( ; Index < sizeof (EFI_FFS_FILE_HEADER); Index++) {
Sum = (UINT8)(Sum + Ptr[Index]);
}
Sum = (UINT8)(Sum - FileHeader->State);
Sum = (UINT8)(Sum - FileHeader->IntegrityCheck.Checksum.File);
return Sum;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* @handle: handle of the loaded image @systable: system table */
|
static int setup(const efi_handle_t handle, const struct efi_system_table *systable)
|
/* @handle: handle of the loaded image @systable: system table */
static int setup(const efi_handle_t handle, const struct efi_system_table *systable)
|
{
efi_status_t ret;
handle_image = handle;
boottime = systable->boottime;
decompress(&image);
ret = boottime->install_protocol_interface
(&handle_volume, &guid_device_path, EFI_NATIVE_INTERFACE,
&dp_volume);
if (ret != EFI_SUCCESS) {
efi_st_error("Failed to install device path\n");
return EFI_ST_FAILURE;
}
ret = boottime->install_protocol_interface
(&handle_volume, &guid_simple_file_system_protocol,
EFI_NATIVE_INTERFACE, &file_system);
if (ret != EFI_SUCCESS) {
efi_st_error("Failed to install simple file system protocol\n");
return EFI_ST_FAILURE;
}
return EFI_ST_SUCCESS;
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* Retrieves the current module status.
Checks the status of the module and returns it as a bitmask of status flags. */
|
uint32_t dac_get_status(struct dac_module *const module_inst)
|
/* Retrieves the current module status.
Checks the status of the module and returns it as a bitmask of status flags. */
uint32_t dac_get_status(struct dac_module *const module_inst)
|
{
Assert(module_inst);
Assert(module_inst->hw);
Dac *const dac_module = module_inst->hw;
uint8_t intflags = dac_module->INTFLAG.reg;
uint32_t status_flags = 0;
if (intflags & DAC_INTFLAG_EMPTY0) {
status_flags |= DAC_STATUS_CHANNEL_0_EMPTY;
}
if (intflags & DAC_INTFLAG_EMPTY1) {
status_flags |= DAC_STATUS_CHANNEL_1_EMPTY;
}
if (intflags & DAC_INTFLAG_UNDERRUN0) {
status_flags |= DAC_STATUS_CHANNEL_0_UNDERRUN;
}
if (intflags & DAC_INTFLAG_UNDERRUN1) {
status_flags |= DAC_STATUS_CHANNEL_1_UNDERRUN;
}
return status_flags;
}
|
memfault/zero-to-main
|
C++
| null | 200
|
/* Packet the command parameter into a byte buffer. */
|
void SDParamPack(unsigned char *pucParam, unsigned long ulValue)
|
/* Packet the command parameter into a byte buffer. */
void SDParamPack(unsigned char *pucParam, unsigned long ulValue)
|
{
xASSERT(pucParam);
pucParam[3] = (unsigned char)(ulValue >> 24);
pucParam[2] = (unsigned char)(ulValue >> 16);
pucParam[1] = (unsigned char)(ulValue >> 8);
pucParam[0] = (unsigned char)(ulValue);
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* 6.. FMS Delete Variable List (Confirmed Service Id = 8) 6..1. Request Message Parameters */
|
static void dissect_ff_msg_fms_del_variable_list_req(tvbuff_t *tvb, gint offset, guint32 length, packet_info *pinfo, proto_tree *tree)
|
/* 6.. FMS Delete Variable List (Confirmed Service Id = 8) 6..1. Request Message Parameters */
static void dissect_ff_msg_fms_del_variable_list_req(tvbuff_t *tvb, gint offset, guint32 length, packet_info *pinfo, proto_tree *tree)
|
{
proto_tree *sub_tree;
col_set_str(pinfo->cinfo, COL_INFO, "FMS Delete Variable List Request");
if (!tree) {
return;
}
sub_tree = proto_tree_add_subtree(tree, tvb, offset, length,
ett_ff_fms_del_variable_list_req, NULL, "FMS Delete Variable List Request");
proto_tree_add_item(sub_tree,
hf_ff_fms_del_variable_list_req_idx, tvb, offset, 4, ENC_BIG_ENDIAN);
offset += 4;
length -= 4;
if (length) {
proto_tree_add_item(sub_tree, hf_ff_unknown_data, tvb, offset, length, ENC_NA);
}
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Exceptions for specific devices. Usually work-arounds for fatal design flaws. */
|
static void __devinit pci_fixup_i450nx(struct pci_dev *d)
|
/* Exceptions for specific devices. Usually work-arounds for fatal design flaws. */
static void __devinit pci_fixup_i450nx(struct pci_dev *d)
|
{
int pxb, reg;
u8 busno, suba, subb;
dev_warn(&d->dev, "Searching for i450NX host bridges\n");
reg = 0xd0;
for(pxb = 0; pxb < 2; pxb++) {
pci_read_config_byte(d, reg++, &busno);
pci_read_config_byte(d, reg++, &suba);
pci_read_config_byte(d, reg++, &subb);
dev_dbg(&d->dev, "i450NX PXB %d: %02x/%02x/%02x\n", pxb, busno,
suba, subb);
if (busno)
pci_scan_bus_with_sysdata(busno);
if (suba < subb)
pci_scan_bus_with_sysdata(suba+1);
}
pcibios_last_bus = -1;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* cs5536_init_one @dev: PCI device @id: Entry in match table */
|
static int cs5536_init_one(struct pci_dev *dev, const struct pci_device_id *id)
|
/* cs5536_init_one @dev: PCI device @id: Entry in match table */
static int cs5536_init_one(struct pci_dev *dev, const struct pci_device_id *id)
|
{
u32 cfg;
if (use_msr)
printk(KERN_INFO DRV_NAME ": Using MSR regs instead of PCI\n");
cs5536_read(dev, CFG, &cfg);
if ((cfg & IDE_CFG_CHANEN) == 0) {
printk(KERN_ERR DRV_NAME ": disabled by BIOS\n");
return -ENODEV;
}
return ide_pci_init_one(dev, &cs5536_info, NULL);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Calculates the checksum for some buffer on a specified length. The checksum calculated is returned. */
|
static u8 e1000_calculate_checksum(u8 *buffer, u32 length)
|
/* Calculates the checksum for some buffer on a specified length. The checksum calculated is returned. */
static u8 e1000_calculate_checksum(u8 *buffer, u32 length)
|
{
u32 i;
u8 sum = 0;
if (!buffer)
return 0;
for (i = 0; i < length; i++)
sum += buffer[i];
return (u8) (0 - sum);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* returns the minimum of the length of @s and */
|
size_t strnlen(const char *s, size_t n)
|
/* returns the minimum of the length of @s and */
size_t strnlen(const char *s, size_t n)
|
{
return __strnend(s, n) - s;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* This routine is called to prepare the SLI3 device for PCI slot recover. It aborts and stops all the on-going I/Os on the pci device. */
|
static void lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
|
/* This routine is called to prepare the SLI3 device for PCI slot recover. It aborts and stops all the on-going I/Os on the pci device. */
static void lpfc_sli_prep_dev_for_recover(struct lpfc_hba *phba)
|
{
lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
"2723 PCI channel I/O abort preparing for recovery\n");
lpfc_offline_prep(phba);
spin_lock_irq(&phba->hbalock);
phba->sli.sli_flag &= ~LPFC_SLI_ACTIVE;
spin_unlock_irq(&phba->hbalock);
lpfc_offline(phba);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* The HW models will call this function to "boot" the CPU == spawn the Zephyr init thread, which will then spawn anything it wants, and run until the CPU is set back to idle again */
|
void posix_boot_cpu(void)
|
/* The HW models will call this function to "boot" the CPU == spawn the Zephyr init thread, which will then spawn anything it wants, and run until the CPU is set back to idle again */
void posix_boot_cpu(void)
|
{
nce_st = nce_init();
posix_arch_init();
nce_boot_cpu(nce_st, z_cstart);
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* Disables the IOSLAVE module.
This function disables the IOSLAVE module using the IFCEN bitfield in the IOSLAVE_CFG register. */
|
void am_hal_ios_disable(uint32_t ui32Module)
|
/* Disables the IOSLAVE module.
This function disables the IOSLAVE module using the IFCEN bitfield in the IOSLAVE_CFG register. */
void am_hal_ios_disable(uint32_t ui32Module)
|
{
AM_REGn(IOSLAVE, ui32Module, CFG) &= ~(AM_REG_IOSLAVE_CFG_IFCEN(1));
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* USART check if Received Data Available.
Check if data buffer holds a valid received data word. */
|
bool usart_is_recv_ready(uint32_t usart)
|
/* USART check if Received Data Available.
Check if data buffer holds a valid received data word. */
bool usart_is_recv_ready(uint32_t usart)
|
{
return ((USART_ISR(usart) & USART_ISR_RXNE));
}
|
insane-adding-machines/unicore-mx
|
C++
|
GNU General Public License v3.0
| 50
|
/* This function sets the input device of finsh shell. */
|
void finsh_set_device(const char *device_name)
|
/* This function sets the input device of finsh shell. */
void finsh_set_device(const char *device_name)
|
{
rt_device_t dev = RT_NULL;
RT_ASSERT(shell != RT_NULL);
dev = rt_device_find(device_name);
if (dev == RT_NULL)
{
rt_kprintf("finsh: can not find device: %s\n", device_name);
return;
}
if (dev == shell->device) return;
if (rt_device_open(dev, RT_DEVICE_OFLAG_RDWR | RT_DEVICE_FLAG_INT_RX) == RT_EOK)
{
if (shell->device != RT_NULL)
{
rt_device_close(shell->device);
rt_device_set_rx_indicate(dev, RT_NULL);
}
shell->device = dev;
rt_device_set_rx_indicate(dev, finsh_rx_ind);
}
}
|
armink/FreeModbus_Slave-Master-RTT-STM32
|
C++
|
Other
| 1,477
|
/* I2C access to the PT2258 volume controller on GPIO 6/7 (Revolution 5.1) */
|
static void revo_i2c_start(struct snd_i2c_bus *bus)
|
/* I2C access to the PT2258 volume controller on GPIO 6/7 (Revolution 5.1) */
static void revo_i2c_start(struct snd_i2c_bus *bus)
|
{
struct snd_ice1712 *ice = bus->private_data;
snd_ice1712_save_gpio_status(ice);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Returns the appropriate pci_driver structure or NULL if there is no registered driver for the device. */
|
struct pci_driver* pci_dev_driver(const struct pci_dev *dev)
|
/* Returns the appropriate pci_driver structure or NULL if there is no registered driver for the device. */
struct pci_driver* pci_dev_driver(const struct pci_dev *dev)
|
{
if (dev->driver)
return dev->driver;
else {
int i;
for(i=0; i<=PCI_ROM_RESOURCE; i++)
if (dev->resource[i].flags & IORESOURCE_BUSY)
return &pci_compat_driver;
}
return NULL;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* We go over all the allocation fields, for each allocation field we know which zones are impacted. We iterate over all the zones impacted and call a function that will set the correct MAS bits in each zone. */
|
void uwb_drp_ie_to_bm(struct uwb_mas_bm *bm, const struct uwb_ie_drp *drp_ie)
|
/* We go over all the allocation fields, for each allocation field we know which zones are impacted. We iterate over all the zones impacted and call a function that will set the correct MAS bits in each zone. */
void uwb_drp_ie_to_bm(struct uwb_mas_bm *bm, const struct uwb_ie_drp *drp_ie)
|
{
int numallocs = (drp_ie->hdr.length - 4) / 4;
const struct uwb_drp_alloc *alloc;
int cnt;
u16 zone_bm, mas_bm;
u8 zone;
u16 zone_mask;
bitmap_zero(bm->bm, UWB_NUM_MAS);
for (cnt = 0; cnt < numallocs; cnt++) {
alloc = &drp_ie->allocs[cnt];
zone_bm = le16_to_cpu(alloc->zone_bm);
mas_bm = le16_to_cpu(alloc->mas_bm);
for (zone = 0; zone < UWB_NUM_ZONES; zone++) {
zone_mask = 1 << zone;
if (zone_bm & zone_mask)
uwb_drp_ie_single_zone_to_bm(bm, zone, mas_bm);
}
}
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Examine the status of the next Rx FIFO to see if it contains new data. */
|
static unsigned long prvCheckRxFifoStatus(void)
|
/* Examine the status of the next Rx FIFO to see if it contains new data. */
static unsigned long prvCheckRxFifoStatus(void)
|
{
unsigned long ulReturn = 0;
if( ( xCurrentRxDesc->status & ACT ) != 0 )
{
}
else if( ( xCurrentRxDesc->status & FE ) != 0 )
{
xCurrentRxDesc->status &= ~( FP1 | FP0 | FE );
xCurrentRxDesc->status &= ~( RMAF | RRF | RTLF | RTSF | PRE | CERF );
xCurrentRxDesc->status |= ACT;
xCurrentRxDesc = xCurrentRxDesc->next;
if( EDMAC.EDRRR.LONG == 0x00000000UL )
{
EDMAC.EDRRR.LONG = 0x00000001UL;
} }
else
{
if( (xCurrentRxDesc->status & FP0) == FP0 )
{
ulReturn = xCurrentRxDesc->size;
}
else
{
prvResetEverything();
}
}
return ulReturn;
}
|
apopple/Pandaboard-FreeRTOS
|
C++
| null | 25
|
/* NOTICE: PCI2 is not supported. There is only one physical PCI slot on the board. */
|
void pci_init_board(void)
|
/* NOTICE: PCI2 is not supported. There is only one physical PCI slot on the board. */
void pci_init_board(void)
|
{
volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
struct pci_region *reg[] = { pci1_regions };
clk->occr = 0xff000000;
udelay(2000);
pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
udelay(2000);
mpc83xx_pci_init(1, reg);
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* 0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Type | Length | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | | */
|
static void dissect_pmip6_opt_lla(const mip6_opt *optp _U_, tvbuff_t *tvb, int offset, guint optlen, packet_info *pinfo _U_, proto_tree *opt_tree, proto_item *hdr_item _U_)
|
/* 0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Type | Length | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | | */
static void dissect_pmip6_opt_lla(const mip6_opt *optp _U_, tvbuff_t *tvb, int offset, guint optlen, packet_info *pinfo _U_, proto_tree *opt_tree, proto_item *hdr_item _U_)
|
{
proto_tree *field_tree;
if (opt_tree) {
field_tree = proto_tree_add_subtree(opt_tree, tvb, offset, optlen, *optp->subtree_index, NULL, optp->name);
proto_tree_add_item(field_tree, hf_pmip6_opt_lila_lla, tvb, offset + 2, 16, ENC_NA);
}
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Initialize the memory management pool for the host controller. */
|
USBHC_MEM_POOL* UsbHcInitMemPool(IN PEI_USB2_HC_DEV *Ehc, IN BOOLEAN Check4G, IN UINT32 Which4G)
|
/* Initialize the memory management pool for the host controller. */
USBHC_MEM_POOL* UsbHcInitMemPool(IN PEI_USB2_HC_DEV *Ehc, IN BOOLEAN Check4G, IN UINT32 Which4G)
|
{
USBHC_MEM_POOL *Pool;
UINTN PageNumber;
EFI_STATUS Status;
EFI_PHYSICAL_ADDRESS TempPtr;
PageNumber = sizeof (USBHC_MEM_POOL)/PAGESIZE +1;
Status = PeiServicesAllocatePages (
EfiBootServicesCode,
PageNumber,
&TempPtr
);
if (EFI_ERROR (Status)) {
return NULL;
}
ZeroMem ((VOID *)(UINTN)TempPtr, PageNumber*EFI_PAGE_SIZE);
Pool = (USBHC_MEM_POOL *)((UINTN)TempPtr);
Pool->Check4G = Check4G;
Pool->Which4G = Which4G;
Pool->Head = UsbHcAllocMemBlock (Ehc, Pool, USBHC_MEM_DEFAULT_PAGES);
if (Pool->Head == NULL) {
Pool = NULL;
}
return Pool;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* param base PDM base pointer param handle PDM eDMA handle pointer. */
|
void PDM_TransferAbortReceiveEDMA(PDM_Type *base, pdm_edma_handle_t *handle)
|
/* param base PDM base pointer param handle PDM eDMA handle pointer. */
void PDM_TransferAbortReceiveEDMA(PDM_Type *base, pdm_edma_handle_t *handle)
|
{
assert(handle != NULL);
EDMA_AbortTransfer(handle->dmaHandle);
PDM_EnableDMA(base, false);
PDM_Enable(base, false);
handle->tcdUsedNum--;
handle->state = (uint32_t)kPDM_Idle;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Clear interrupt pending bit from the given (unique) source (AT91C_ID_xxx). */
|
void NVIC_ClrPending(unsigned int source)
|
/* Clear interrupt pending bit from the given (unique) source (AT91C_ID_xxx). */
void NVIC_ClrPending(unsigned int source)
|
{
NVIC_ClearPendingIRQ((IRQn_Type)source);
}
|
apopple/Pandaboard-FreeRTOS
|
C++
| null | 25
|
/* This function swaps the bytes in a 32-bit unsigned value to switch the value from little endian to big endian or vice versa. The byte swapped value is returned. */
|
UINT32 EFIAPI SwapBytes32(IN UINT32 Value)
|
/* This function swaps the bytes in a 32-bit unsigned value to switch the value from little endian to big endian or vice versa. The byte swapped value is returned. */
UINT32 EFIAPI SwapBytes32(IN UINT32 Value)
|
{
UINT32 LowerBytes;
UINT32 HigherBytes;
LowerBytes = (UINT32)SwapBytes16 ((UINT16)Value);
HigherBytes = (UINT32)SwapBytes16 ((UINT16)(Value >> 16));
return (LowerBytes << 16 | HigherBytes);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* This code sets the size of variable data. */
|
VOID SetDataSizeOfVariable(IN VARIABLE_HEADER *Variable, IN UINTN DataSize, IN BOOLEAN AuthFormat)
|
/* This code sets the size of variable data. */
VOID SetDataSizeOfVariable(IN VARIABLE_HEADER *Variable, IN UINTN DataSize, IN BOOLEAN AuthFormat)
|
{
AUTHENTICATED_VARIABLE_HEADER *AuthVariable;
AuthVariable = (AUTHENTICATED_VARIABLE_HEADER *)Variable;
if (AuthFormat) {
AuthVariable->DataSize = (UINT32)DataSize;
} else {
Variable->DataSize = (UINT32)DataSize;
}
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Generic tsf based hw timer which configures weight registers to time slice between wlan and bt traffic */
|
static void ath_btcoex_no_stomp_timer(void *arg)
|
/* Generic tsf based hw timer which configures weight registers to time slice between wlan and bt traffic */
static void ath_btcoex_no_stomp_timer(void *arg)
|
{
struct ath_softc *sc = (struct ath_softc *)arg;
struct ath_hw *ah = sc->sc_ah;
struct ath_btcoex *btcoex = &sc->btcoex;
ath_print(ath9k_hw_common(ah), ATH_DBG_BTCOEX,
"no stomp timer running \n");
spin_lock_bh(&btcoex->btcoex_lock);
if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_LOW)
ath9k_btcoex_bt_stomp(sc, ATH_BTCOEX_STOMP_NONE);
else if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_ALL)
ath9k_btcoex_bt_stomp(sc, ATH_BTCOEX_STOMP_LOW);
spin_unlock_bh(&btcoex->btcoex_lock);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* v9fs_vfs_unlink - VFS unlink hook to delete an inode @i: inode that is being unlinked @d: dentry that is being unlinked */
|
static int v9fs_vfs_unlink(struct inode *i, struct dentry *d)
|
/* v9fs_vfs_unlink - VFS unlink hook to delete an inode @i: inode that is being unlinked @d: dentry that is being unlinked */
static int v9fs_vfs_unlink(struct inode *i, struct dentry *d)
|
{
return v9fs_remove(i, d, 0);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Event handler for the CCID_PC_to_RDR_GetSlotStatus. This message is sent to the device whenever an application at the host wants to the get the current slot status */
|
uint8_t CALLBACK_CCID_GetSlotStatus(USB_ClassInfo_CCID_Device_t *const CCIDInterfaceInfo, const uint8_t slot, uint8_t *const error)
|
/* Event handler for the CCID_PC_to_RDR_GetSlotStatus. This message is sent to the device whenever an application at the host wants to the get the current slot status */
uint8_t CALLBACK_CCID_GetSlotStatus(USB_ClassInfo_CCID_Device_t *const CCIDInterfaceInfo, const uint8_t slot, uint8_t *const error)
|
{
if (slot < CCID_Interface.Config.TotalSlots)
{
*error = CCID_ERROR_NO_ERROR;
return CCID_COMMANDSTATUS_PROCESSEDWITHOUTERROR | CCID_ICCSTATUS_PRESENTANDACTIVE;
}
else
{
*error = CCID_ERROR_SLOT_NOT_FOUND;
return CCID_COMMANDSTATUS_FAILED | CCID_ICCSTATUS_NOICCPRESENT;
}
}
|
prusa3d/Prusa-Firmware-Buddy
|
C++
|
Other
| 1,019
|
/* Report an error when trying to write a file. "err" is assumed to be a UNIX-style errno. */
|
void report_write_failure(const char *filename, int err)
|
/* Report an error when trying to write a file. "err" is assumed to be a UNIX-style errno. */
void report_write_failure(const char *filename, int err)
|
{
(*report_write_failure_func)(filename, err);
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* @dev: The Linux PCI device structure for the device to map @slot: The slot number for this device on */
|
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
/* @dev: The Linux PCI device structure for the device to map @slot: The slot number for this device on */
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
{
if (octeon_pcibios_map_irq)
return octeon_pcibios_map_irq(dev, slot, pin);
else
panic("octeon_pcibios_map_irq not set.");
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Sets the size of the internal buffer of @stream to @size, or to the size of the contents of the buffer. The buffer can never be resized smaller than its current contents. */
|
void g_buffered_input_stream_set_buffer_size(GBufferedInputStream *stream, gsize size)
|
/* Sets the size of the internal buffer of @stream to @size, or to the size of the contents of the buffer. The buffer can never be resized smaller than its current contents. */
void g_buffered_input_stream_set_buffer_size(GBufferedInputStream *stream, gsize size)
|
{
GBufferedInputStreamPrivate *priv;
gsize in_buffer;
guint8 *buffer;
g_return_if_fail (G_IS_BUFFERED_INPUT_STREAM (stream));
priv = stream->priv;
if (priv->len == size)
return;
if (priv->buffer)
{
in_buffer = priv->end - priv->pos;
size = MAX (size, in_buffer);
buffer = g_malloc (size);
memcpy (buffer, priv->buffer + priv->pos, in_buffer);
priv->len = size;
priv->pos = 0;
priv->end = in_buffer;
g_free (priv->buffer);
priv->buffer = buffer;
}
else
{
priv->len = size;
priv->pos = 0;
priv->end = 0;
priv->buffer = g_malloc (size);
}
g_object_notify (G_OBJECT (stream), "buffer-size");
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Packs unsigned 16 bit value to the buffer at the offset requested. */
|
static int pack_uint16(uint16_t val, struct buf_ctx *buf)
|
/* Packs unsigned 16 bit value to the buffer at the offset requested. */
static int pack_uint16(uint16_t val, struct buf_ctx *buf)
|
{
if ((buf->end - buf->cur) < sizeof(uint16_t)) {
return -ENOMEM;
}
NET_DBG(">> val:%04x cur:%p, end:%p", val, (void *)buf->cur, (void *)buf->end);
*(buf->cur++) = (val >> 8) & 0xFF;
*(buf->cur++) = val & 0xFF;
return 0;
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* Generate 3-axis quaternions from the DMP. In this driver, the 3-axis and 6-axis DMP quaternion features are mutually exclusive. */
|
int dmp_enable_lp_quat(unsigned char enable)
|
/* Generate 3-axis quaternions from the DMP. In this driver, the 3-axis and 6-axis DMP quaternion features are mutually exclusive. */
int dmp_enable_lp_quat(unsigned char enable)
|
{
unsigned char regs[4];
if (enable) {
regs[0] = DINBC0;
regs[1] = DINBC2;
regs[2] = DINBC4;
regs[3] = DINBC6;
}
else
memset(regs, 0x8B, 4);
mpu_write_mem(CFG_LP_QUAT, 4, regs);
return mpu_reset_fifo();
}
|
Luos-io/luos_engine
|
C++
|
MIT License
| 496
|
/* Check whether a channel is a programmable channel and can be used by an application. */
|
__STATIC_INLINE bool is_programmable_app_channel(nrf_ppi_channel_t channel)
|
/* Check whether a channel is a programmable channel and can be used by an application. */
__STATIC_INLINE bool is_programmable_app_channel(nrf_ppi_channel_t channel)
|
{
return ((NRF_PPI_PROG_APP_CHANNELS_MASK & nrf_drv_ppi_channel_to_mask(channel)) != 0);
}
|
labapart/polymcu
|
C++
| null | 201
|
/* Shift right Big Number. Please note, all "out" Big number arguments should be properly initialized by calling to BigNumInit() or BigNumFromBin() functions. */
|
BOOLEAN EFIAPI BigNumRShift(IN CONST VOID *Bn, IN UINTN N, OUT VOID *BnRes)
|
/* Shift right Big Number. Please note, all "out" Big number arguments should be properly initialized by calling to BigNumInit() or BigNumFromBin() functions. */
BOOLEAN EFIAPI BigNumRShift(IN CONST VOID *Bn, IN UINTN N, OUT VOID *BnRes)
|
{
return (BOOLEAN)BN_rshift (BnRes, Bn, (INT32)N);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* nand_block_markbad - Mark block at the given offset as bad @mtd: MTD device structure @ofs: offset relative to mtd start */
|
static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
|
/* nand_block_markbad - Mark block at the given offset as bad @mtd: MTD device structure @ofs: offset relative to mtd start */
static int nand_block_markbad(struct mtd_info *mtd, loff_t ofs)
|
{
int ret;
ret = nand_block_isbad(mtd, ofs);
if (ret) {
if (ret > 0)
return 0;
return ret;
}
return nand_block_markbad_lowlevel(mtd, ofs);
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* Returns the bus address inside the shared area according to the virtual address. */
|
static dma_addr_t sep_shared_virt_to_bus(struct sep_device *sep, void *virt_address)
|
/* Returns the bus address inside the shared area according to the virtual address. */
static dma_addr_t sep_shared_virt_to_bus(struct sep_device *sep, void *virt_address)
|
{
dma_addr_t pa = sep->shared_bus + (virt_address - sep->shared_addr);
edbg("sep: virt to bus b %08llx v %p\n",
(unsigned long long)pa, virt_address);
return pa;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Destroy the Dhcp6 child in IP6_CONFIG_INSTANCE and release the resources. */
|
EFI_STATUS Ip6ConfigDestroyDhcp6(IN OUT IP6_CONFIG_INSTANCE *Instance)
|
/* Destroy the Dhcp6 child in IP6_CONFIG_INSTANCE and release the resources. */
EFI_STATUS Ip6ConfigDestroyDhcp6(IN OUT IP6_CONFIG_INSTANCE *Instance)
|
{
IP6_SERVICE *IpSb;
EFI_STATUS Status;
EFI_DHCP6_PROTOCOL *Dhcp6;
Dhcp6 = Instance->Dhcp6;
ASSERT (Dhcp6 != NULL);
Dhcp6->Stop (Dhcp6);
Dhcp6->Configure (Dhcp6, NULL);
Instance->Dhcp6 = NULL;
IpSb = IP6_SERVICE_FROM_IP6_CONFIG_INSTANCE (Instance);
Status = gBS->CloseProtocol (
Instance->Dhcp6Handle,
&gEfiDhcp6ProtocolGuid,
IpSb->Image,
IpSb->Controller
);
if (EFI_ERROR (Status)) {
return Status;
}
Status = NetLibDestroyServiceChild (
IpSb->Controller,
IpSb->Image,
&gEfiDhcp6ServiceBindingProtocolGuid,
Instance->Dhcp6Handle
);
Instance->Dhcp6Handle = NULL;
return Status;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Return value: NULL: when can't find a table matching the key ERR_PTR(error): error value virt table address: when a matched table is found */
|
struct sfi_table_header* __ref sfi_check_table(u64 pa, struct sfi_table_key *key)
|
/* Return value: NULL: when can't find a table matching the key ERR_PTR(error): error value virt table address: when a matched table is found */
struct sfi_table_header* __ref sfi_check_table(u64 pa, struct sfi_table_key *key)
|
{
struct sfi_table_header *th;
void *ret = NULL;
th = sfi_map_table(pa);
if (!th)
return ERR_PTR(-ENOMEM);
if (!key->sig) {
sfi_print_table_header(pa, th);
if (sfi_verify_table(th))
ret = ERR_PTR(-EINVAL);
} else {
if (!sfi_table_check_key(th, key))
return th;
}
sfi_unmap_table(th);
return ret;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Evaluate if the result is a non-zero value. */
|
BOOLEAN IsHiiValueTrue(IN EFI_HII_VALUE *Result)
|
/* Evaluate if the result is a non-zero value. */
BOOLEAN IsHiiValueTrue(IN EFI_HII_VALUE *Result)
|
{
switch (Result->Type) {
case EFI_IFR_TYPE_BOOLEAN:
return Result->Value.b;
case EFI_IFR_TYPE_NUM_SIZE_8:
return (BOOLEAN)(Result->Value.u8 != 0);
case EFI_IFR_TYPE_NUM_SIZE_16:
return (BOOLEAN)(Result->Value.u16 != 0);
case EFI_IFR_TYPE_NUM_SIZE_32:
return (BOOLEAN)(Result->Value.u32 != 0);
case EFI_IFR_TYPE_NUM_SIZE_64:
return (BOOLEAN)(Result->Value.u64 != 0);
default:
return FALSE;
}
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Do inverse transform on 4x4 part of block */
|
static void vc1_inv_trans_4x4_dc_c(uint8_t *dest, int linesize, DCTELEM *block)
|
/* Do inverse transform on 4x4 part of block */
static void vc1_inv_trans_4x4_dc_c(uint8_t *dest, int linesize, DCTELEM *block)
|
{
int i;
int dc = block[0];
const uint8_t *cm = ff_cropTbl + MAX_NEG_CROP;
dc = (17 * dc + 4) >> 3;
dc = (17 * dc + 64) >> 7;
for(i = 0; i < 4; i++){
dest[0] = cm[dest[0]+dc];
dest[1] = cm[dest[1]+dc];
dest[2] = cm[dest[2]+dc];
dest[3] = cm[dest[3]+dc];
dest += linesize;
}
}
|
DC-SWAT/DreamShell
|
C++
| null | 404
|
/* Program channel register to stop transfer.
Ensures the channel is not doing any transfer after calling this function */
|
void dmacHw_stopTransfer(dmacHw_HANDLE_t handle)
|
/* Program channel register to stop transfer.
Ensures the channel is not doing any transfer after calling this function */
void dmacHw_stopTransfer(dmacHw_HANDLE_t handle)
|
{
dmacHw_CBLK_t *pCblk;
pCblk = dmacHw_HANDLE_TO_CBLK(handle);
dmacHw_DMA_STOP(pCblk->module, pCblk->channel);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* sys_ccu_dram - Set the freq of the dram @freq: freq want to set */
|
void __startup sys_ccu_dram(uint32_t freq)
|
/* sys_ccu_dram - Set the freq of the dram @freq: freq want to set */
void __startup sys_ccu_dram(uint32_t freq)
|
{
uint32_t val, n, m;
pll_get_factors(freq, &n, &m);
write32(GCTL_BASE + GX6605S_PLL_DDR_BASE, (1 << 14)|(n << 8)| m);
val = read32(GCTL_BASE + GX6605S_PLL_DDR_BASE);
val &= ~BIT(14);
write32(GCTL_BASE + GX6605S_PLL_DDR_BASE, val);
val = read32(GCTL_BASE + GX6605S_SOURCE_SEL0);
val |= GX6605S_SOURCE_SEL0_DRAMC;
write32(GCTL_BASE + GX6605S_SOURCE_SEL0, val);
}
|
xboot/xboot
|
C++
|
MIT License
| 779
|
/* Converts a text device path node to BMC device path structure. */
|
EFI_DEVICE_PATH_PROTOCOL* DevPathFromTextBmc(CHAR16 *TextDeviceNode)
|
/* Converts a text device path node to BMC device path structure. */
EFI_DEVICE_PATH_PROTOCOL* DevPathFromTextBmc(CHAR16 *TextDeviceNode)
|
{
CHAR16 *InterfaceTypeStr;
CHAR16 *BaseAddressStr;
BMC_DEVICE_PATH *BmcDp;
InterfaceTypeStr = GetNextParamStr (&TextDeviceNode);
BaseAddressStr = GetNextParamStr (&TextDeviceNode);
BmcDp = (BMC_DEVICE_PATH *) CreateDeviceNode (
HARDWARE_DEVICE_PATH,
HW_BMC_DP,
(UINT16) sizeof (BMC_DEVICE_PATH)
);
BmcDp->InterfaceType = (UINT8) Strtoi (InterfaceTypeStr);
WriteUnaligned64 (
(UINT64 *) (&BmcDp->BaseAddress),
StrHexToUint64 (BaseAddressStr)
);
return (EFI_DEVICE_PATH_PROTOCOL *) BmcDp;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Wait for User push-button press to start transfer. */
|
void WaitForUserButtonPress(void)
|
/* Wait for User push-button press to start transfer. */
void WaitForUserButtonPress(void)
|
{
while (ubButtonPress == 0)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(LED_BLINK_FAST);
}
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
|
STMicroelectronics/STM32CubeF4
|
C++
|
Other
| 789
|
/* If you're going to modify this, keep in mind that while the flash caches of the pro and app cpu are separate, the psram cache is */
|
void IRAM_ATTR spi_flash_op_block_func(void *arg)
|
/* If you're going to modify this, keep in mind that while the flash caches of the pro and app cpu are separate, the psram cache is */
void IRAM_ATTR spi_flash_op_block_func(void *arg)
|
{
vTaskSuspendAll();
esp_intr_noniram_disable();
uint32_t cpuid = (uint32_t) arg;
s_flash_op_complete = false;
s_flash_op_can_start = true;
while (!s_flash_op_complete) {
}
spi_flash_restore_cache(cpuid, s_flash_op_cache_state[cpuid]);
esp_intr_noniram_enable();
xTaskResumeAll();
}
|
retro-esp32/RetroESP32
|
C++
|
Creative Commons Attribution Share Alike 4.0 International
| 581
|
/* Call this to stop the system keeping track of this URB */
|
void usb_unanchor_urb(struct urb *urb)
|
/* Call this to stop the system keeping track of this URB */
void usb_unanchor_urb(struct urb *urb)
|
{
unsigned long flags;
struct usb_anchor *anchor;
if (!urb)
return;
anchor = urb->anchor;
if (!anchor)
return;
spin_lock_irqsave(&anchor->lock, flags);
if (unlikely(anchor != urb->anchor)) {
spin_unlock_irqrestore(&anchor->lock, flags);
return;
}
urb->anchor = NULL;
list_del(&urb->anchor_list);
spin_unlock_irqrestore(&anchor->lock, flags);
usb_put_urb(urb);
if (list_empty(&anchor->urb_list))
wake_up(&anchor->wait);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* DXE Core will disable interrupts and turn off the timer and disable interrupts after all the event handlers have run. */
|
STATIC VOID EFIAPI GicV2ExitBootServicesEvent(IN EFI_EVENT Event, IN VOID *Context)
|
/* DXE Core will disable interrupts and turn off the timer and disable interrupts after all the event handlers have run. */
STATIC VOID EFIAPI GicV2ExitBootServicesEvent(IN EFI_EVENT Event, IN VOID *Context)
|
{
UINTN Index;
UINTN GicInterrupt;
for (Index = 0; Index < mGicNumInterrupts; Index++) {
GicV2DisableInterruptSource (&gHardwareInterruptV2Protocol, Index);
}
do {
GicInterrupt = ArmGicV2AcknowledgeInterrupt (mGicInterruptInterfaceBase);
if ((GicInterrupt & ARM_GIC_ICCIAR_ACKINTID) < mGicNumInterrupts) {
GicV2EndOfInterrupt (&gHardwareInterruptV2Protocol, GicInterrupt);
}
} while (!ARM_GIC_IS_SPECIAL_INTERRUPTS (GicInterrupt));
ArmGicV2DisableInterruptInterface (mGicInterruptInterfaceBase);
ArmGicDisableDistributor (mGicDistributorBase);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* DMA Stream Set Initial Target Memory.
Ensure that the stream is disabled otherwise the setting will not be changed. */
|
void dma_set_initial_target(uint32_t dma, uint8_t stream, uint8_t memory)
|
/* DMA Stream Set Initial Target Memory.
Ensure that the stream is disabled otherwise the setting will not be changed. */
void dma_set_initial_target(uint32_t dma, uint8_t stream, uint8_t memory)
|
{
uint32_t reg32 = (DMA_SCR(dma, stream) & ~DMA_SxCR_CT);
if (memory == 1) {
reg32 |= DMA_SxCR_CT;
}
DMA_SCR(dma, stream) = reg32;
}
|
insane-adding-machines/unicore-mx
|
C++
|
GNU General Public License v3.0
| 50
|
/* IDL typedef struct { IDL long element_5; IDL byte *element_6; IDL } TYPE_3; */
|
static int dissect_browser_TYPE_3_data(tvbuff_t *tvb, int offset, packet_info *pinfo, proto_tree *tree, dcerpc_info *di, guint8 *drep)
|
/* IDL typedef struct { IDL long element_5; IDL byte *element_6; IDL } TYPE_3; */
static int dissect_browser_TYPE_3_data(tvbuff_t *tvb, int offset, packet_info *pinfo, proto_tree *tree, dcerpc_info *di, guint8 *drep)
|
{
guint32 len;
if(di->conformant_run){
offset =dissect_ndr_ucarray(tvb, offset, pinfo, tree, di, drep, NULL);
return offset;
}
offset = dissect_ndr_uint32(tvb, offset, pinfo, tree, di, drep,
hf_browser_unknown_long, &len);
proto_tree_add_item(tree, hf_browser_unknown_bytes, tvb, offset, len,
ENC_NA);
offset += len;
return offset;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Enable I2C master module of the specified I2C port.
The */
|
void xI2CMasterEnable(unsigned long ulBase)
|
/* Enable I2C master module of the specified I2C port.
The */
void xI2CMasterEnable(unsigned long ulBase)
|
{
xASSERT((ulBase == I2C0_BASE) || (ulBase == I2C1_BASE));
xHWREG(ulBase + I2C_CON) |= I2C_CON_ENS1;
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* Disable the debounce function of the specified GPIO pin(s).
The pin(s) are specified using a bit-packed byte, where each bit that is set identifies the pin to be accessed, and where bit 0 of the byte represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on. */
|
void GPIOPinDebounceDisable(unsigned long ulPort, unsigned long ulPins)
|
/* Disable the debounce function of the specified GPIO pin(s).
The pin(s) are specified using a bit-packed byte, where each bit that is set identifies the pin to be accessed, and where bit 0 of the byte represents GPIO port pin 0, bit 1 represents GPIO port pin 1, and so on. */
void GPIOPinDebounceDisable(unsigned long ulPort, unsigned long ulPins)
|
{
xASSERT(GPIOBaseValid(ulPort));
xHWREG(ulPort + GPIO_DBEN) &= ~ulPins;
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* Set the fields of structure stc_sdioc_init_t to default values. */
|
int32_t SDIOC_StructInit(stc_sdioc_init_t *pstcSdiocInit)
|
/* Set the fields of structure stc_sdioc_init_t to default values. */
int32_t SDIOC_StructInit(stc_sdioc_init_t *pstcSdiocInit)
|
{
int32_t i32Ret = LL_OK;
if (NULL == pstcSdiocInit) {
i32Ret = LL_ERR_INVD_PARAM;
} else {
pstcSdiocInit->u32Mode = SDIOC_MD_SD;
pstcSdiocInit->u8CardDetect = SDIOC_CARD_DETECT_CD_PIN_LVL;
pstcSdiocInit->u8SpeedMode = SDIOC_SPEED_MD_NORMAL;
pstcSdiocInit->u8BusWidth = SDIOC_BUS_WIDTH_1BIT;
pstcSdiocInit->u16ClockDiv = SDIOC_CLK_DIV1;
}
return i32Ret;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Configure ADC Module. This function configures ADC convert mode(single/continue scan mode) and triggle mode(soft/hardware triggler). */
|
void xADCConfigure(unsigned long ulBase, unsigned long ulMode, unsigned long ulTrigger)
|
/* Configure ADC Module. This function configures ADC convert mode(single/continue scan mode) and triggle mode(soft/hardware triggler). */
void xADCConfigure(unsigned long ulBase, unsigned long ulMode, unsigned long ulTrigger)
|
{
xASSERT(ulBase == xADC0_BASE);
_ADC_Mode = ulMode;
_ADC_Triggler = ulTrigger;
_ADC_Status = 1;
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* The journal lock should not be held on entry. */
|
void journal_lock_updates(journal_t *journal)
|
/* The journal lock should not be held on entry. */
void journal_lock_updates(journal_t *journal)
|
{
DEFINE_WAIT(wait);
spin_lock(&journal->j_state_lock);
++journal->j_barrier_count;
while (1) {
transaction_t *transaction = journal->j_running_transaction;
if (!transaction)
break;
spin_lock(&transaction->t_handle_lock);
if (!transaction->t_updates) {
spin_unlock(&transaction->t_handle_lock);
break;
}
prepare_to_wait(&journal->j_wait_updates, &wait,
TASK_UNINTERRUPTIBLE);
spin_unlock(&transaction->t_handle_lock);
spin_unlock(&journal->j_state_lock);
schedule();
finish_wait(&journal->j_wait_updates, &wait);
spin_lock(&journal->j_state_lock);
}
spin_unlock(&journal->j_state_lock);
mutex_lock(&journal->j_barrier);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Only allow a user to send credentials, that they could set with setu(g)id. */
|
static __inline__ int scm_check_creds(struct ucred *creds)
|
/* Only allow a user to send credentials, that they could set with setu(g)id. */
static __inline__ int scm_check_creds(struct ucred *creds)
|
{
const struct cred *cred = current_cred();
if ((creds->pid == task_tgid_vnr(current) || capable(CAP_SYS_ADMIN)) &&
((creds->uid == cred->uid || creds->uid == cred->euid ||
creds->uid == cred->suid) || capable(CAP_SETUID)) &&
((creds->gid == cred->gid || creds->gid == cred->egid ||
creds->gid == cred->sgid) || capable(CAP_SETGID))) {
return 0;
}
return -EPERM;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Register device numbers dev..(dev+range-1) range must be nonzero The hash chain is sorted on range, so that subranges can override. */
|
void blk_register_region(dev_t devt, unsigned long range, struct module *module, struct kobject *(*probe)(dev_t, int *, void *), int(*lock)(dev_t, void *), void *data)
|
/* Register device numbers dev..(dev+range-1) range must be nonzero The hash chain is sorted on range, so that subranges can override. */
void blk_register_region(dev_t devt, unsigned long range, struct module *module, struct kobject *(*probe)(dev_t, int *, void *), int(*lock)(dev_t, void *), void *data)
|
{
kobj_map(bdev_map, devt, range, module, probe, lock, data);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* If the new channel update rate is lower than the average speed of human typing give out a warning that the CLI might not get all the letters if the typing is too fast. */
|
static void cn0414_adc_odr_cli_warning(struct cn0414_dev *dev, uint32_t rate_index)
|
/* If the new channel update rate is lower than the average speed of human typing give out a warning that the CLI might not get all the letters if the typing is too fast. */
static void cn0414_adc_odr_cli_warning(struct cn0414_dev *dev, uint32_t rate_index)
|
{
if(rate_index >= 19) {
usr_uart_write_string(dev->uart_descriptor,
(uint8_t*)"The CLI will be slower at this rate and lower.\n");
usr_uart_write_string(dev->uart_descriptor,
(uint8_t*)"To see what the CLI managed to get so far press <TAB>.\n");
}
}
|
analogdevicesinc/EVAL-ADICUP3029
|
C++
|
Other
| 36
|
/* It might delay handling of MAC interrupts which could compromise the Wifi handling, so keep any handlers as quick as possible. */
|
static IRAM void mactimer_handler()
|
/* It might delay handling of MAC interrupts which could compromise the Wifi handling, so keep any handlers as quick as possible. */
static IRAM void mactimer_handler()
|
{
while (timer_list) {
if (((int64_t)timer_list->trigger_usec - (int64_t)mactime_get_count()) > 0) {
break;
}
mactimer_t *timer = timer_list;
timer_list = timer->next;
timer->next = NULL;
timer->callback(timer->timer_arg);
}
if (timer_list) {
mactime_set_trigger(timer_list->trigger_usec);
}
}
|
RavenSystem/esp-homekit-devices
|
C++
|
Other
| 2,577
|
/* Close all upvalues and to-be-closed variables up to the given stack level. */
|
void luaF_close(lua_State *L, StkId level, int status, int yy)
|
/* Close all upvalues and to-be-closed variables up to the given stack level. */
void luaF_close(lua_State *L, StkId level, int status, int yy)
|
{
StkId tbc = L->tbclist;
poptbclist(L);
prepcallclosemth(L, tbc, status, yy);
level = restorestack(L, levelrel);
}
}
|
Nicholas3388/LuaNode
|
C++
|
Other
| 1,055
|
/* If 64-bit operations are not supported, then ASSERT(). If StartBit is greater than 63, then ASSERT(). If EndBit is greater than 63, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */
|
UINT64 EFIAPI BitFieldAnd64(IN UINT64 Operand, IN UINTN StartBit, IN UINTN EndBit, IN UINT64 AndData)
|
/* If 64-bit operations are not supported, then ASSERT(). If StartBit is greater than 63, then ASSERT(). If EndBit is greater than 63, then ASSERT(). If EndBit is less than StartBit, then ASSERT(). If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT(). */
UINT64 EFIAPI BitFieldAnd64(IN UINT64 Operand, IN UINTN StartBit, IN UINTN EndBit, IN UINT64 AndData)
|
{
UINT64 Value1;
UINT64 Value2;
ASSERT (EndBit < 64);
ASSERT (StartBit <= EndBit);
ASSERT (RShiftU64 (AndData, EndBit - StartBit) == (RShiftU64 (AndData, EndBit - StartBit) & 1));
Value1 = LShiftU64 (~AndData, StartBit);
Value2 = LShiftU64 ((UINT64)-2, EndBit);
return Operand & ~(Value1 & ~Value2);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* called when all pixels up to row y are complete */
|
static void vp3_draw_horiz_band(Vp3DecodeContext *s, int y)
|
/* called when all pixels up to row y are complete */
static void vp3_draw_horiz_band(Vp3DecodeContext *s, int y)
|
{
int h, cy;
int offset[4];
if(s->avctx->draw_horiz_band==NULL)
return;
h= y - s->last_slice_end;
y -= h;
if (!s->flipped_image) {
if (y == 0)
h -= s->height - s->avctx->height;
y = s->height - y - h;
}
cy = y >> 1;
offset[0] = s->current_frame.linesize[0]*y;
offset[1] = s->current_frame.linesize[1]*cy;
offset[2] = s->current_frame.linesize[2]*cy;
offset[3] = 0;
emms_c();
s->avctx->draw_horiz_band(s->avctx, &s->current_frame, offset, y, 3, h);
s->last_slice_end= y + h;
}
|
DC-SWAT/DreamShell
|
C++
| null | 404
|
/* param base GPC CPU module base address. param irqId ID of the IRQ, accessible range is 0-255. param enable Enable the IRQ request or not. */
|
void GPC_CM_EnableIrqWakeup(GPC_CPU_MODE_CTRL_Type *base, uint32_t irqId, bool enable)
|
/* param base GPC CPU module base address. param irqId ID of the IRQ, accessible range is 0-255. param enable Enable the IRQ request or not. */
void GPC_CM_EnableIrqWakeup(GPC_CPU_MODE_CTRL_Type *base, uint32_t irqId, bool enable)
|
{
assert(irqId < (GPC_CPU_MODE_CTRL_CM_IRQ_WAKEUP_MASK_COUNT * 32UL));
uint32_t irqGroup = irqId / 32UL;
uint32_t irqMask = irqId % 32UL;
if (true == enable)
{
base->CM_IRQ_WAKEUP_MASK[irqGroup] &= ~(1UL << irqMask);
}
else
{
base->CM_IRQ_WAKEUP_MASK[irqGroup] |= (1UL << irqMask);
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* param base MCAN peripheral base address. param idx The MCAN Rx Buffer index. param pRxFrame Pointer to CAN message frame structure for reception. retval kStatus_Success - Read Message from Rx Buffer successfully. */
|
status_t MCAN_ReadRxBuffer(CAN_Type *base, uint8_t idx, mcan_rx_buffer_frame_t *pRxFrame)
|
/* param base MCAN peripheral base address. param idx The MCAN Rx Buffer index. param pRxFrame Pointer to CAN message frame structure for reception. retval kStatus_Success - Read Message from Rx Buffer successfully. */
status_t MCAN_ReadRxBuffer(CAN_Type *base, uint8_t idx, mcan_rx_buffer_frame_t *pRxFrame)
|
{
assert(NULL != pRxFrame);
mcan_rx_buffer_frame_t *elementAddress = NULL;
uint32_t u4PayloadLength = (uint32_t)(pRxFrame->size) + 8U;
elementAddress = (mcan_rx_buffer_frame_t *)(MCAN_GetMsgRAMBase(base) + MCAN_GetRxBufferElementAddress(base, idx));
(void)memcpy((void *)pRxFrame, (void *)elementAddress, u4PayloadLength);
return kStatus_Success;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* The sequence number and current window are not cleared (see qset_reset()). */
|
void qset_clear(struct whc *whc, struct whc_qset *qset)
|
/* The sequence number and current window are not cleared (see qset_reset()). */
void qset_clear(struct whc *whc, struct whc_qset *qset)
|
{
qset->td_start = qset->td_end = qset->ntds = 0;
qset->qh.link = cpu_to_le32(QH_LINK_NTDS(8) | QH_LINK_T);
qset->qh.status = qset->qh.status & QH_STATUS_SEQ_MASK;
qset->qh.err_count = 0;
qset->qh.scratch[0] = 0;
qset->qh.scratch[1] = 0;
qset->qh.scratch[2] = 0;
memset(&qset->qh.overlay, 0, sizeof(qset->qh.overlay));
init_completion(&qset->remove_complete);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Gets the type of parity currently being used. */
|
uint32_t UARTParityModeGet(uint32_t ui32Base)
|
/* Gets the type of parity currently being used. */
uint32_t UARTParityModeGet(uint32_t ui32Base)
|
{
ASSERT(_UARTBaseValid(ui32Base));
return (HWREG(ui32Base + UART_O_LCRH) &
(UART_LCRH_SPS | UART_LCRH_EPS | UART_LCRH_PEN));
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
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