docstring
stringlengths 22
576
| signature
stringlengths 9
317
| prompt
stringlengths 57
886
| code
stringlengths 20
1.36k
| repository
stringclasses 49
values | language
stringclasses 2
values | license
stringclasses 9
values | stars
int64 15
21.3k
|
|---|---|---|---|---|---|---|---|
/* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */
|
__sum16 ip_compute_csum(const void *buff, int len)
|
/* this routine is used for miscellaneous IP-like checksums, mainly in icmp.c */
__sum16 ip_compute_csum(const void *buff, int len)
|
{
return (__force __sum16)~from64to16(do_csum(buff,len));
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Initialize state for all static devices.
The state object is always zero-initialized, but this may not be sufficient. */
|
void z_device_state_init(void)
|
/* Initialize state for all static devices.
The state object is always zero-initialized, but this may not be sufficient. */
void z_device_state_init(void)
|
{
STRUCT_SECTION_FOREACH(device, dev) {
k_object_init(dev);
}
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* Enable the PWM output of the PWM module.
The */
|
void xPWMOutputEnable(unsigned long ulBase, unsigned long ulChannel)
|
/* Enable the PWM output of the PWM module.
The */
void xPWMOutputEnable(unsigned long ulBase, unsigned long ulChannel)
|
{
xASSERT(ulBase == PWMA_BASE);
xASSERT(((ulChannel >= 0) || (ulChannel <= 1)));
xHWREG(ulBase + PWM_POE) |= (PWM_POE_PWM0 << (ulChannel));
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* Un-Register the Service F and all its Characteristics... */
|
void service_f_1_remove(void)
|
/* Un-Register the Service F and all its Characteristics... */
void service_f_1_remove(void)
|
{
bt_gatt_service_unregister(&service_f_1_svc);
}
|
zephyrproject-rtos/zephyr
|
C++
|
Apache License 2.0
| 9,573
|
/* Request the MAC address stored on the OTP (one time programmable) memory of the device. (the function is Blocking until response received) */
|
NMI_API sint8 m2m_wifi_get_otp_mac_address(uint8 *pu8MacAddr, uint8 *pu8IsValid)
|
/* Request the MAC address stored on the OTP (one time programmable) memory of the device. (the function is Blocking until response received) */
NMI_API sint8 m2m_wifi_get_otp_mac_address(uint8 *pu8MacAddr, uint8 *pu8IsValid)
|
{
sint8 ret = M2M_SUCCESS;
uint8* pu8MacAddrBuf = guCtrlStruct.au8MacAddress;
ret = hif_chip_wake();
if(ret == M2M_SUCCESS)
{
ret = nmi_get_otp_mac_address(pu8MacAddrBuf, pu8IsValid);
if(ret == M2M_SUCCESS)
{
ret = hif_chip_sleep();
m2m_memcpy(pu8MacAddr, pu8MacAddrBuf, 6);
}
}
return ret;
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* Indicates whether the host's parent task is currently running. */
|
int ble_hs_is_parent_task(void)
|
/* Indicates whether the host's parent task is currently running. */
int ble_hs_is_parent_task(void)
|
{
return !ble_npl_os_started() ||
ble_npl_get_current_task_id() == ble_hs_parent_task;
}
|
Nicholas3388/LuaNode
|
C++
|
Other
| 1,055
|
/* pgrsStartNow() - sets start time pgrsSetDownloadSize(x) - known expected download size pgrsSetUploadSize(x) - known expected upload size pgrsSetDownloadCounter() - amount of data currently downloaded pgrsSetUploadCounter() - amount of data currently uploaded pgrsUpdate() - show progress pgrsDone() - transfer complete */
|
int Curl_pgrsDone(struct connectdata *conn)
|
/* pgrsStartNow() - sets start time pgrsSetDownloadSize(x) - known expected download size pgrsSetUploadSize(x) - known expected upload size pgrsSetDownloadCounter() - amount of data currently downloaded pgrsSetUploadCounter() - amount of data currently uploaded pgrsUpdate() - show progress pgrsDone() - transfer complete */
int Curl_pgrsDone(struct connectdata *conn)
|
{
int rc;
struct Curl_easy *data = conn->data;
data->progress.lastshow = 0;
rc = Curl_pgrsUpdate(conn);
if(rc)
return rc;
if(!(data->progress.flags & PGRS_HIDE) &&
!data->progress.callback)
fprintf(data->set.err, "\n");
data->progress.speeder_c = 0;
return 0;
}
|
alibaba/AliOS-Things
|
C++
|
Apache License 2.0
| 4,536
|
/* Inode writeback creation completion callback. Only invoked for just created inodes, which do not have pages attached, like dirs and empty files. */
|
static int pohmelfs_write_inode_complete(struct page **pages, unsigned int page_num, void *private, int err)
|
/* Inode writeback creation completion callback. Only invoked for just created inodes, which do not have pages attached, like dirs and empty files. */
static int pohmelfs_write_inode_complete(struct page **pages, unsigned int page_num, void *private, int err)
|
{
struct inode *inode = private;
struct pohmelfs_inode *pi = POHMELFS_I(inode);
if (inode) {
if (err) {
mark_inode_dirty(inode);
clear_bit(NETFS_INODE_REMOTE_SYNCED, &pi->state);
} else {
set_bit(NETFS_INODE_REMOTE_SYNCED, &pi->state);
}
pohmelfs_put_inode(pi);
}
return err;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Sets the RF Sleep configuration.
Needs the I2C Password presentation to be effective. */
|
int32_t BSP_NFCTAG_SetRFSleep(uint32_t Instance)
|
/* Sets the RF Sleep configuration.
Needs the I2C Password presentation to be effective. */
int32_t BSP_NFCTAG_SetRFSleep(uint32_t Instance)
|
{
UNUSED(Instance);
return ST25DV_SetRFSleep(&NfcTagObj);
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* get_board_rev() - setup to pass kernel board revision information Returns: bit Maximum cpu clock rate supported by onboard SoC 0000b - 300 MHz 0001b - 372 MHz 0010b - 408 MHz 0011b - 456 MHz */
|
u32 get_board_rev(void)
|
/* get_board_rev() - setup to pass kernel board revision information Returns: bit Maximum cpu clock rate supported by onboard SoC 0000b - 300 MHz 0001b - 372 MHz 0010b - 408 MHz 0011b - 456 MHz */
u32 get_board_rev(void)
|
{
char *s;
u32 maxcpuclk = CONFIG_DA850_EVM_MAX_CPU_CLK;
u32 rev = 0;
s = env_get("maxcpuclk");
if (s)
maxcpuclk = simple_strtoul(s, NULL, 10);
if (maxcpuclk >= 456000000)
rev = 3;
else if (maxcpuclk >= 408000000)
rev = 2;
else if (maxcpuclk >= 372000000)
rev = 1;
return rev;
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* Check if it's a Device Path pointing to BootManagerMenuApp. */
|
BOOLEAN IsBootManagerMenuAppFilePath(EFI_DEVICE_PATH_PROTOCOL *DevicePath)
|
/* Check if it's a Device Path pointing to BootManagerMenuApp. */
BOOLEAN IsBootManagerMenuAppFilePath(EFI_DEVICE_PATH_PROTOCOL *DevicePath)
|
{
EFI_HANDLE FvHandle;
VOID *NameGuid;
EFI_STATUS Status;
Status = gBS->LocateDevicePath (&gEfiFirmwareVolume2ProtocolGuid, &DevicePath, &FvHandle);
if (!EFI_ERROR (Status)) {
NameGuid = EfiGetNameGuidFromFwVolDevicePathNode ((CONST MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *)DevicePath);
if (NameGuid != NULL) {
return CompareGuid (NameGuid, &mBootMenuFile);
}
}
return FALSE;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Forces bclink to push out any unsent packets, until all packets are gone or congestion reoccurs. No locks set when function called */
|
void tipc_bcbearer_push(void)
|
/* Forces bclink to push out any unsent packets, until all packets are gone or congestion reoccurs. No locks set when function called */
void tipc_bcbearer_push(void)
|
{
struct bearer *b_ptr;
spin_lock_bh(&bc_lock);
b_ptr = &bcbearer->bearer;
if (b_ptr->publ.blocked) {
b_ptr->publ.blocked = 0;
tipc_bearer_lock_push(b_ptr);
}
spin_unlock_bh(&bc_lock);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Return: 0 if all went fine, else return appropriate error. */
|
static int ti_sci_cmd_dev_is_trans(const struct ti_sci_handle *handle, u32 id, bool *curr_state)
|
/* Return: 0 if all went fine, else return appropriate error. */
static int ti_sci_cmd_dev_is_trans(const struct ti_sci_handle *handle, u32 id, bool *curr_state)
|
{
int ret;
u8 state;
if (!curr_state)
return -EINVAL;
ret = ti_sci_get_device_state(handle, id, NULL, NULL, NULL, &state);
if (ret)
return ret;
*curr_state = (state == MSG_DEVICE_HW_STATE_TRANS);
return 0;
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* This function is to enable/disable BIOS Write Protect in SMM phase. */
|
VOID CpuSmmDisableBiosWriteProtect(IN BOOLEAN EnableSmmSts)
|
/* This function is to enable/disable BIOS Write Protect in SMM phase. */
VOID CpuSmmDisableBiosWriteProtect(IN BOOLEAN EnableSmmSts)
|
{
UINT32 Data32;
if (EnableSmmSts) {
Data32 = MmioRead32 ((UINTN)(0xFED30880)) | (UINT32)(BIT0);
AsmWriteMsr32 (0x000001FE, Data32);
} else {
Data32 = MmioRead32 ((UINTN)(0xFED30880)) & (UINT32)(~BIT0);
AsmWriteMsr32 (0x000001FE, Data32);
}
Data32 = MmioRead32 (0xFED30880);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Initializes Enhanced Intel SpeedStep feature to specific state. */
|
RETURN_STATUS EFIAPI EistInitialize(IN UINTN ProcessorNumber, IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, IN VOID *ConfigData OPTIONAL, IN BOOLEAN State)
|
/* Initializes Enhanced Intel SpeedStep feature to specific state. */
RETURN_STATUS EFIAPI EistInitialize(IN UINTN ProcessorNumber, IN REGISTER_CPU_FEATURE_INFORMATION *CpuInfo, IN VOID *ConfigData OPTIONAL, IN BOOLEAN State)
|
{
if (IS_ATOM_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
IS_CORE_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel) ||
IS_CORE2_PROCESSOR (CpuInfo->DisplayFamily, CpuInfo->DisplayModel))
{
if (CpuInfo->ProcessorInfo.Location.Thread != 0) {
return RETURN_SUCCESS;
}
}
CPU_REGISTER_TABLE_WRITE_FIELD (
ProcessorNumber,
Msr,
MSR_IA32_MISC_ENABLE,
MSR_IA32_MISC_ENABLE_REGISTER,
Bits.EIST,
(State) ? 1 : 0
);
return RETURN_SUCCESS;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Enable Break.
Enables the break function of an advanced timer. */
|
void timer_enable_break(uint32_t timer_peripheral)
|
/* Enable Break.
Enables the break function of an advanced timer. */
void timer_enable_break(uint32_t timer_peripheral)
|
{
TIM_BDTR(timer_peripheral) |= TIM_BDTR_BKE;
}
|
libopencm3/libopencm3
|
C++
|
GNU General Public License v3.0
| 2,931
|
/* Returns the current status for an integrated USB DMA channel. */
|
uint32_t USBDMAChannelStatus(uint32_t ui32Base, uint32_t ui32Channel)
|
/* Returns the current status for an integrated USB DMA channel. */
uint32_t USBDMAChannelStatus(uint32_t ui32Base, uint32_t ui32Channel)
|
{
ASSERT(ui32Base == USB0_BASE);
ASSERT(ui32Channel < 8);
return(HWREG(ui32Base + USB_O_DMACTL0 + (0x10 * ui32Channel)) &
USB_DMACTL0_ERR);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Configures the adc any channels conversion Max rank number. */
|
void ADC_ANY_NUM_Config(ADC_TypeDef *adc, u8 num)
|
/* Configures the adc any channels conversion Max rank number. */
void ADC_ANY_NUM_Config(ADC_TypeDef *adc, u8 num)
|
{
if(num > 15) num = 15;
adc->ANYCFG = num;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over again. */
|
static cycle_t sb1250_hpt_read(struct clocksource *cs)
|
/* The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over again. */
static cycle_t sb1250_hpt_read(struct clocksource *cs)
|
{
unsigned int count;
count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT))));
return SB1250_HPT_VALUE - count;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Return the 160-bit message digest into the user's array */
|
void ICACHE_FLASH_ATTR SHA1_Final(uint8_t *digest, SHA1_CTX *ctx)
|
/* Return the 160-bit message digest into the user's array */
void ICACHE_FLASH_ATTR SHA1_Final(uint8_t *digest, SHA1_CTX *ctx)
|
{
int i;
SHA1PadMessage(ctx);
memset(ctx->Message_Block, 0, 64);
ctx->Length_Low = 0;
ctx->Length_High = 0;
for (i = 0; i < SHA1_SIZE; i++)
{
digest[i] = ctx->Intermediate_Hash[i>>2] >> 8 * ( 3 - ( i & 0x03 ) );
}
}
|
eerimoq/simba
|
C++
|
Other
| 337
|
/* Except that rounding up to 8 works, and rounding up to 4 doesn't. */
|
static fs16 * befs_bt_keylen_index(befs_btree_node *node)
|
/* Except that rounding up to 8 works, and rounding up to 4 doesn't. */
static fs16 * befs_bt_keylen_index(befs_btree_node *node)
|
{
const int keylen_align = 8;
unsigned long int off =
(sizeof (befs_btree_nodehead) + node->head.all_key_length);
ulong tmp = off % keylen_align;
if (tmp)
off += keylen_align - tmp;
return (fs16 *) ((void *) node->od_node + off);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Additional PHY intialization. After being reset in mpc5xxx_fec_init_phy(), PHY goes into FX mode. To take it out of the FX mode and switch into desired TX operation, one needs to clear the FX_SEL bit of Mode Control Register. */
|
void reset_phy(void)
|
/* Additional PHY intialization. After being reset in mpc5xxx_fec_init_phy(), PHY goes into FX mode. To take it out of the FX mode and switch into desired TX operation, one needs to clear the FX_SEL bit of Mode Control Register. */
void reset_phy(void)
|
{
unsigned short mode_control;
miiphy_read("FEC ETHERNET", CONFIG_PHY_ADDR, 0x15, &mode_control);
miiphy_write("FEC ETHERNET", CONFIG_PHY_ADDR, 0x15,
mode_control & 0xfffe);
return;
}
|
EmcraftSystems/u-boot
|
C++
|
Other
| 181
|
/* Check the status of the Tx buffer of the specified SPI port. */
|
xtBoolean SPIIsTxFull(unsigned long ulBase)
|
/* Check the status of the Tx buffer of the specified SPI port. */
xtBoolean SPIIsTxFull(unsigned long ulBase)
|
{
xASSERT(ulBase == SPI0_BASE);
return ((xHWREG(ulBase + SPI_CNTRL) & SPI_CNTRL_TX_FULL)? xtrue : xfalse);
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* Get the duty cycle value of the specified channel. */
|
float pwmout_read(pwmout_t *obj)
|
/* Get the duty cycle value of the specified channel. */
float pwmout_read(pwmout_t *obj)
|
{
float value = 0;
if (obj->period > 0) {
value = (float)obj->pulse / (float)obj->period;
}
return ((value > 1.0) ? (1.0) : (value));
}
|
alibaba/AliOS-Things
|
C++
|
Apache License 2.0
| 4,536
|
/* First part of subpacket decoding: decode raw stream bytes and read gain info. */
|
static void decode_bytes_and_gain(COOKContext *q, COOKSubpacket *p, const uint8_t *inbuffer, cook_gains *gains_ptr)
|
/* First part of subpacket decoding: decode raw stream bytes and read gain info. */
static void decode_bytes_and_gain(COOKContext *q, COOKSubpacket *p, const uint8_t *inbuffer, cook_gains *gains_ptr)
|
{
int offset;
offset = decode_bytes(inbuffer, q->decoded_bytes_buffer,
p->bits_per_subpacket/8);
init_get_bits(&q->gb, q->decoded_bytes_buffer + offset,
p->bits_per_subpacket);
decode_gain_info(&q->gb, gains_ptr->now);
FFSWAP(int *, gains_ptr->now, gains_ptr->previous);
}
|
DC-SWAT/DreamShell
|
C++
| null | 404
|
/* ZigBee Device Profile dissector for the extended simple */
|
void dissect_zbee_zdp_req_ext_simple_desc(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
|
/* ZigBee Device Profile dissector for the extended simple */
void dissect_zbee_zdp_req_ext_simple_desc(tvbuff_t *tvb, packet_info *pinfo, proto_tree *tree)
|
{
guint offset = 0;
guint16 device;
guint8 endpt;
device = zbee_parse_uint(tree, hf_zbee_zdp_device, tvb, &offset, (int)sizeof(guint16), NULL);
endpt = zbee_parse_uint(tree, hf_zbee_zdp_endpoint, tvb, &offset, (int)sizeof(guint8), NULL); zbee_parse_uint(tree, hf_zbee_zdp_index, tvb, &offset, (int)sizeof(guint8), NULL);
zbee_append_info(tree, pinfo, ", Device: 0x%04x, Endpoint: %d", device, endpt);
zdp_dump_excess(tvb, offset, pinfo, tree);
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Configures the alternate function of a GPIO pin. */
|
void GPIOPinConfigure(unsigned long ulPinConfig)
|
/* Configures the alternate function of a GPIO pin. */
void GPIOPinConfigure(unsigned long ulPinConfig)
|
{
unsigned long ulBase, ulShift;
ASSERT(((ulPinConfig >> 16) & 0xff) < 9);
ASSERT(((ulPinConfig >> 8) & 0xe3) == 0);
ulBase = (ulPinConfig >> 16) & 0xff;
if(HWREG(SYSCTL_GPIOHBCTL) & (1 << ulBase))
{
ulBase = g_pulGPIOBaseAddrs[(ulBase << 1) + 1];
}
else
{
ulBase = g_pulGPIOBaseAddrs[ulBase << 1];
}
ulShift = (ulPinConfig >> 8) & 0xff;
HWREG(ulBase + GPIO_O_PCTL) = ((HWREG(ulBase + GPIO_O_PCTL) &
~(0xf << ulShift)) |
((ulPinConfig & 0xf) << ulShift));
}
|
feaser/openblt
|
C++
|
GNU General Public License v3.0
| 601
|
/* Data TLB Fault @ Data TLB vector Refer to SDM Vol2 Table 5-6 & 8-1 */
|
void alt_itlb(struct kvm_vcpu *vcpu, u64 vadr)
|
/* Data TLB Fault @ Data TLB vector Refer to SDM Vol2 Table 5-6 & 8-1 */
void alt_itlb(struct kvm_vcpu *vcpu, u64 vadr)
|
{
set_ifa_itir_iha(vcpu, vadr, 1, 1, 0);
inject_guest_interruption(vcpu, IA64_ALT_INST_TLB_VECTOR);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Increments the ref count of the current instance of #CRSelector. */
|
void cr_selector_ref(CRSelector *a_this)
|
/* Increments the ref count of the current instance of #CRSelector. */
void cr_selector_ref(CRSelector *a_this)
|
{
g_return_if_fail (a_this);
a_this->ref_count++;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Checks whether the descriptor is empty. If the buffer1 and buffer2 lengths are zero in ring mode descriptor is empty. In chain mode buffer2 length is 0 but buffer2 itself contains the next descriptor address. */
|
bool synopGMAC_is_desc_empty(DmaDesc *desc)
|
/* Checks whether the descriptor is empty. If the buffer1 and buffer2 lengths are zero in ring mode descriptor is empty. In chain mode buffer2 length is 0 but buffer2 itself contains the next descriptor address. */
bool synopGMAC_is_desc_empty(DmaDesc *desc)
|
{
return (((desc->length & DescSize1Mask) == 0) && ((desc->length & DescSize2Mask) == 0));
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* param handle codec handle. param mclk master clock frequency in HZ. param sampleRate sample rate in HZ. param bitWidth bit width. return kStatus_Success is success, else configure failed. */
|
status_t CODEC_SetFormat(codec_handle_t *handle, uint32_t mclk, uint32_t sampleRate, uint32_t bitWidth)
|
/* param handle codec handle. param mclk master clock frequency in HZ. param sampleRate sample rate in HZ. param bitWidth bit width. return kStatus_Success is success, else configure failed. */
status_t CODEC_SetFormat(codec_handle_t *handle, uint32_t mclk, uint32_t sampleRate, uint32_t bitWidth)
|
{
assert((handle != NULL) && (handle->codecConfig != NULL));
return HAL_CODEC_SetFormat(handle, mclk, sampleRate, bitWidth);
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* The bootstrap kernel entry code has set these up. Save them for a given CPU */
|
void __cpuinit smp_store_cpu_info(int id)
|
/* The bootstrap kernel entry code has set these up. Save them for a given CPU */
void __cpuinit smp_store_cpu_info(int id)
|
{
struct cpuinfo_x86 *c = &cpu_data(id);
copy_cpuinfo_x86(c, &boot_cpu_data);
c->cpu_index = id;
if (id != 0)
identify_secondary_cpu(c);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* This routine is used to determine a human-readable string identifying a R_CTL opcode. */
|
static const char* fc_exch_name_lookup(unsigned int op, char **table, unsigned int max_index)
|
/* This routine is used to determine a human-readable string identifying a R_CTL opcode. */
static const char* fc_exch_name_lookup(unsigned int op, char **table, unsigned int max_index)
|
{
const char *name = NULL;
if (op < max_index)
name = table[op];
if (!name)
name = "unknown";
return name;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* omap_write_buf8 - write buffer to NAND controller @mtd: MTD device structure @buf: data buffer @len: number of bytes to write */
|
static void omap_write_buf8(struct mtd_info *mtd, const u_char *buf, int len)
|
/* omap_write_buf8 - write buffer to NAND controller @mtd: MTD device structure @buf: data buffer @len: number of bytes to write */
static void omap_write_buf8(struct mtd_info *mtd, const u_char *buf, int len)
|
{
struct omap_nand_info *info = container_of(mtd,
struct omap_nand_info, mtd);
u_char *p = (u_char *)buf;
while (len--) {
iowrite8(*p++, info->nand.IO_ADDR_W);
while (GPMC_BUF_EMPTY == (readl(info->gpmc_baseaddr +
GPMC_STATUS) & GPMC_BUF_FULL));
}
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Write one line into specify log file, which instance is file_instanse. Append a LOG_LINE_SEPARATOR after log context to separate logs */
|
int write_log_line(const int file_instanse, const char *buf, const bool keep_open)
|
/* Write one line into specify log file, which instance is file_instanse. Append a LOG_LINE_SEPARATOR after log context to separate logs */
int write_log_line(const int file_instanse, const char *buf, const bool keep_open)
|
{
int rtn = -EINVAL;
if (file_instanse >= 0 && buf != NULL) {
int rc = -1;
rtn = aos_write(file_instanse, buf, strlen(buf));
if (rtn > 0) {
rc = aos_write(file_instanse, LOG_LINE_END_STR, 1);
if (1 == rc) {
rtn++;
} else {
rtn = rc;
}
aos_sync(file_instanse);
} else {
SESSION_FS_INFO("write fail rc %d\n", rtn);
}
if (!keep_open) {
aos_close(file_instanse);
}
}
return rtn;
}
|
alibaba/AliOS-Things
|
C++
|
Apache License 2.0
| 4,536
|
/* Set a default value for OTS initialization structure. */
|
int32_t OTS_StructInit(stc_ots_init_t *pstcOTSInit)
|
/* Set a default value for OTS initialization structure. */
int32_t OTS_StructInit(stc_ots_init_t *pstcOTSInit)
|
{
int32_t i32Ret = LL_ERR_INVD_PARAM;
if (pstcOTSInit != NULL) {
pstcOTSInit->u16ClockSrc = OTS_CLK_HRC;
pstcOTSInit->f32SlopeK = 0.0F;
pstcOTSInit->f32OffsetM = 0.0F;
pstcOTSInit->u16AutoOffEn = OTS_AUTO_OFF_ENABLE;
pstcOTSInit->stcParaCond.u16ClockFreq = 8U;
pstcOTSInit->stcParaCond.u8T1 = OTS_PARAM_TEMP_COND_T25;
pstcOTSInit->stcParaCond.u8T2 = OTS_PARAM_TEMP_COND_T125;
i32Ret = LL_OK;
}
return i32Ret;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Enables or disables the High sink open drain buffer of the IRTIM peripheral. */
|
void IRTIM_HighSinkODCmd(FunctionalState NewState)
|
/* Enables or disables the High sink open drain buffer of the IRTIM peripheral. */
void IRTIM_HighSinkODCmd(FunctionalState NewState)
|
{
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState == DISABLE)
{
IRTIM->CR &= (uint8_t)(~IRTIM_CR_HSEN) ;
}
else
{
IRTIM->CR |= IRTIM_CR_HSEN ;
}
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* Forces the TIMx output 6 waveform to active or inactive level. */
|
void TIM_ForcedOC6Config(TIM_TypeDef *TIMx, uint16_t TIM_ForcedAction)
|
/* Forces the TIMx output 6 waveform to active or inactive level. */
void TIM_ForcedOC6Config(TIM_TypeDef *TIMx, uint16_t TIM_ForcedAction)
|
{
uint32_t tmpccmr3 = 0;
assert_param(IS_TIM_LIST4_PERIPH(TIMx));
assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
tmpccmr3 = TIMx->CCMR3;
tmpccmr3 &= (uint32_t)~TIM_CCMR3_OC6M;
tmpccmr3 |= ((uint32_t)TIM_ForcedAction << 8);
TIMx->CCMR3 = tmpccmr3;
}
|
avem-labs/Avem
|
C++
|
MIT License
| 1,752
|
/* Set direction of IO pins in 'mask' to corresponding value in 'data' 0 = output, 1 = input */
|
int pca953x_set_dir(uint8_t chip, uint mask, uint data)
|
/* Set direction of IO pins in 'mask' to corresponding value in 'data' 0 = output, 1 = input */
int pca953x_set_dir(uint8_t chip, uint mask, uint data)
|
{
return pca953x_reg_write(chip, PCA953X_CONF, mask, data);
}
|
EmcraftSystems/u-boot
|
C++
|
Other
| 181
|
/* Update disk head position estimator based on IRQ completion info. */
|
static void update_head_pos(int disk, r1bio_t *r1_bio)
|
/* Update disk head position estimator based on IRQ completion info. */
static void update_head_pos(int disk, r1bio_t *r1_bio)
|
{
conf_t *conf = r1_bio->mddev->private;
conf->mirrors[disk].head_position =
r1_bio->sector + (r1_bio->sectors);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* 6.. FMS Download Segment (Confirmed Service Id = 10) 6..1. Request Message Parameters */
|
static void dissect_ff_msg_fms_download_segment_req(tvbuff_t *tvb, gint offset, guint32 length, packet_info *pinfo, proto_tree *tree)
|
/* 6.. FMS Download Segment (Confirmed Service Id = 10) 6..1. Request Message Parameters */
static void dissect_ff_msg_fms_download_segment_req(tvbuff_t *tvb, gint offset, guint32 length, packet_info *pinfo, proto_tree *tree)
|
{
proto_tree *sub_tree;
col_set_str(pinfo->cinfo, COL_INFO, "FMS Download Segment Request");
if (!tree) {
return;
}
sub_tree = proto_tree_add_subtree(tree, tvb, offset, length,
ett_ff_fms_download_seg_req, NULL, "FMS Download Segment Request");
proto_tree_add_item(sub_tree,
hf_ff_fms_download_seg_req_idx, tvb, offset, 4, ENC_BIG_ENDIAN);
offset += 4;
length -= 4;
if (length) {
proto_tree_add_item(sub_tree, hf_ff_unknown_data, tvb, offset, length, ENC_NA);
}
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* BBT marker is in the first page, no OOB. */
|
static int scan_read_raw_data(struct mtd_info *mtd, uint8_t *buf, loff_t offs, struct nand_bbt_descr *td)
|
/* BBT marker is in the first page, no OOB. */
static int scan_read_raw_data(struct mtd_info *mtd, uint8_t *buf, loff_t offs, struct nand_bbt_descr *td)
|
{
size_t retlen;
size_t len;
len = td->len;
if (td->options & NAND_BBT_VERSION)
len++;
return mtd->read(mtd, offs, len, &retlen, buf);
}
|
EmcraftSystems/u-boot
|
C++
|
Other
| 181
|
/* UART MSP Initialization This function configures the hardware resources used in this example: */
|
void HAL_UART_MspInit(UART_HandleTypeDef *huart)
|
/* UART MSP Initialization This function configures the hardware resources used in this example: */
void HAL_UART_MspInit(UART_HandleTypeDef *huart)
|
{
GPIO_InitTypeDef GPIO_InitStruct;
USARTx_TX_GPIO_CLK_ENABLE();
USARTx_RX_GPIO_CLK_ENABLE();
USARTx_CLK_ENABLE();
GPIO_InitStruct.Pin = USARTx_TX_PIN;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
GPIO_InitStruct.Alternate = USARTx_TX_AF;
HAL_GPIO_Init(USARTx_TX_GPIO_PORT, &GPIO_InitStruct);
GPIO_InitStruct.Pin = USARTx_RX_PIN;
GPIO_InitStruct.Alternate = USARTx_RX_AF;
HAL_GPIO_Init(USARTx_RX_GPIO_PORT, &GPIO_InitStruct);
HAL_NVIC_SetPriority(USARTx_IRQn, 0, 1);
HAL_NVIC_EnableIRQ(USARTx_IRQn);
}
|
STMicroelectronics/STM32CubeF4
|
C++
|
Other
| 789
|
/* sscanf - Unformat a buffer into a list of arguments @buf: input buffer @fmt: formatting of buffer ...: resulting arguments */
|
LIBC_ROM_TEXT_SECTION _LONG_CALL_ int _sscanf(const char *buf, const char *fmt,...)
|
/* sscanf - Unformat a buffer into a list of arguments @buf: input buffer @fmt: formatting of buffer ...: resulting arguments */
LIBC_ROM_TEXT_SECTION _LONG_CALL_ int _sscanf(const char *buf, const char *fmt,...)
|
{
va_list args;
int i;
va_start(args, fmt);
i = _vsscanf(buf, fmt, args);
va_end(args);
return i;
}
|
alibaba/AliOS-Things
|
C++
|
Apache License 2.0
| 4,536
|
/* Renders the contents of the pixel buffer on the LCD. */
|
void ssd1306Refresh(void)
|
/* Renders the contents of the pixel buffer on the LCD. */
void ssd1306Refresh(void)
|
{
uint16_t i;
ssd1306SendCommand(SSD1306_SETLOWCOLUMN | 0x0);
ssd1306SendCommand(SSD1306_SETHIGHCOLUMN | 0x0);
ssd1306SendCommand(SSD1306_SETSTARTLINE | 0x0);
for (i=0; i < sizeof(_ssd1306buffer); i++)
{
ssd1306SendData(_ssd1306buffer[i]);
}
}
|
microbuilder/LPC11U_LPC13U_CodeBase
|
C++
|
Other
| 54
|
/* Return the first urb_link in a list with a distinguished head "hd", or NULL if the list is empty. This will also work as a predicate, returning NULL if empty, and non-NULL otherwise. */
|
urb_link* first_urb_link(urb_link *hd)
|
/* Return the first urb_link in a list with a distinguished head "hd", or NULL if the list is empty. This will also work as a predicate, returning NULL if empty, and non-NULL otherwise. */
urb_link* first_urb_link(urb_link *hd)
|
{
urb_link *nx;
if (NULL != hd && NULL != (nx = hd->next) && nx != hd) {
return (nx);
}
return (NULL);
}
|
EmcraftSystems/u-boot
|
C++
|
Other
| 181
|
/* Retrieve the SMM Fault Tolerent Write protocol interface. */
|
EFI_STATUS GetFtwProtocol(OUT VOID **FtwProtocol)
|
/* Retrieve the SMM Fault Tolerent Write protocol interface. */
EFI_STATUS GetFtwProtocol(OUT VOID **FtwProtocol)
|
{
EFI_STATUS Status;
Status = gMmst->MmLocateProtocol (
&gEfiSmmFaultTolerantWriteProtocolGuid,
NULL,
FtwProtocol
);
return Status;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Uses a critical section to determine if there is any space in a queue. */
|
static BaseType_t prvIsQueueFull(const Queue_t *pxQueue)
|
/* Uses a critical section to determine if there is any space in a queue. */
static BaseType_t prvIsQueueFull(const Queue_t *pxQueue)
|
{
BaseType_t xReturn;
taskENTER_CRITICAL();
{
if( pxQueue->uxMessagesWaiting == pxQueue->uxLength )
{
xReturn = pdTRUE;
}
else
{
xReturn = pdFALSE;
}
}
taskEXIT_CRITICAL();
return xReturn;
}
|
prusa3d/Prusa-Firmware-Buddy
|
C++
|
Other
| 1,019
|
/* This function is the implementation of SPI0 handler named in startup code.
It passes the instance to the shared SPI IRQ handler. */
|
void SPI0_IRQHandler(void)
|
/* This function is the implementation of SPI0 handler named in startup code.
It passes the instance to the shared SPI IRQ handler. */
void SPI0_IRQHandler(void)
|
{
SPI_DRV_IRQHandler(SPI0_IDX);
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* We cannot use this descriptor for other operations because the block driver may be on waiting response from the server. */
|
static int get_sheep_fd(BDRVSheepdogState *s)
|
/* We cannot use this descriptor for other operations because the block driver may be on waiting response from the server. */
static int get_sheep_fd(BDRVSheepdogState *s)
|
{
int fd;
fd = connect_to_sdog(s);
if (fd < 0) {
return fd;
}
qemu_aio_set_fd_handler(fd, co_read_response, NULL, s);
return fd;
}
|
ve3wwg/teensy3_qemu
|
C++
|
Other
| 15
|
/* Write the GPIO bit data(status) for bit.
@method GPIO_WriteBit */
|
void GPIO_WriteBit(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin, BitAction BitVal)
|
/* Write the GPIO bit data(status) for bit.
@method GPIO_WriteBit */
void GPIO_WriteBit(GPIO_TypeDef GPIOx, GPIO_Pin_TypeDef GPIO_Pin, BitAction BitVal)
|
{
_ASSERT(IS_GPIO_PORT(GPIOx));
_ASSERT(IS_GPIO_PIN_SINGLE(GPIO_Pin));
if (BitVal == Bit_SET)
GPIO_SetBit(GPIOx, GPIO_Pin);
else if (BitVal == Bit_RESET)
GPIO_ResetBit(GPIOx, GPIO_Pin);
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Selects the clock source to output on MCO1 pin(PA8). */
|
void RCC_MCO1Config(uint32_t RCC_MCO1Source, uint32_t RCC_MCO1Div)
|
/* Selects the clock source to output on MCO1 pin(PA8). */
void RCC_MCO1Config(uint32_t RCC_MCO1Source, uint32_t RCC_MCO1Div)
|
{
uint32_t tmpreg = 0;
assert_param(IS_RCC_MCO1SOURCE(RCC_MCO1Source));
assert_param(IS_RCC_MCO1DIV(RCC_MCO1Div));
tmpreg = RCC->CFGR;
tmpreg &= CFGR_MCO1_RESET_MASK;
tmpreg |= RCC_MCO1Source | RCC_MCO1Div;
RCC->CFGR = tmpreg;
}
|
MaJerle/stm32f429
|
C++
| null | 2,036
|
/* This function is used to read data from the MsgQ. */
|
OsiReturnVal_e osi_MsgQRead(OsiMsgQ_t *pMsgQ, void *pMsg, OsiTime_t Timeout)
|
/* This function is used to read data from the MsgQ. */
OsiReturnVal_e osi_MsgQRead(OsiMsgQ_t *pMsgQ, void *pMsg, OsiTime_t Timeout)
|
{
if( pdTRUE == xQueueReceive((QueueHandle_t)*pMsgQ,pMsg,Timeout) )
{
return OSI_OK;
}
else
{
return OSI_OPERATION_FAILED;
}
}
|
micropython/micropython
|
C++
|
Other
| 18,334
|
/* TIM_PWM MSP De-Initialization This function freeze the hardware resources used in this example. */
|
void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim_pwm)
|
/* TIM_PWM MSP De-Initialization This function freeze the hardware resources used in this example. */
void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim_pwm)
|
{
if(htim_pwm->Instance==TIM3)
{
__HAL_RCC_TIM3_CLK_DISABLE();
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* f l i p F i x e d */
|
returnValue Bounds_flipFixed(Bounds *_THIS, int number)
|
/* f l i p F i x e d */
returnValue Bounds_flipFixed(Bounds *_THIS, int number)
|
{
if ( ( number < 0 ) || ( number >= _THIS->n ) )
return THROWERROR( RET_INDEX_OUT_OF_BOUNDS );
if ( _THIS->status != 0 )
switch (_THIS->status[number])
{
case ST_LOWER: _THIS->status[number] = ST_UPPER; break;
case ST_UPPER: _THIS->status[number] = ST_LOWER; break;
default: return THROWERROR( RET_MOVING_BOUND_FAILED );
}
return SUCCESSFUL_RETURN;
}
|
DanielMartensson/EmbeddedLapack
|
C++
|
MIT License
| 129
|
/* This API gets the interrupt mode which is set in the sensor. */
|
uint16_t bma4_get_interrupt_mode(uint8_t *mode, struct bma4_dev *dev)
|
/* This API gets the interrupt mode which is set in the sensor. */
uint16_t bma4_get_interrupt_mode(uint8_t *mode, struct bma4_dev *dev)
|
{
uint16_t rslt = 0;
uint8_t data = 0;
if (dev == NULL) {
rslt |= BMA4_E_NULL_PTR;
} else {
rslt |= bma4_read_regs(BMA4_INTR_LATCH_ADDR, &data, 1, dev);
*mode = data;
}
return rslt;
}
|
arendst/Tasmota
|
C++
|
GNU General Public License v3.0
| 21,318
|
/* Sets the flow control high/low threshold (watermark) registers. If flow control XON frame transmission is enabled, then set XON frame tansmission as well. */
|
static s32 igb_set_fc_watermarks(struct e1000_hw *hw)
|
/* Sets the flow control high/low threshold (watermark) registers. If flow control XON frame transmission is enabled, then set XON frame tansmission as well. */
static s32 igb_set_fc_watermarks(struct e1000_hw *hw)
|
{
s32 ret_val = 0;
u32 fcrtl = 0, fcrth = 0;
if (hw->fc.current_mode & e1000_fc_tx_pause) {
fcrtl = hw->fc.low_water;
if (hw->fc.send_xon)
fcrtl |= E1000_FCRTL_XONE;
fcrth = hw->fc.high_water;
}
wr32(E1000_FCRTL, fcrtl);
wr32(E1000_FCRTH, fcrth);
return ret_val;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Write to TX register using non-blocking method.
This function writes data to the TX register directly, upper layer must make sure the TX register is empty or TX FIFO has empty room before calling this function. */
|
static void LPUART_WriteNonBlocking(LPUART_Type *base, const uint8_t *data, size_t length)
|
/* Write to TX register using non-blocking method.
This function writes data to the TX register directly, upper layer must make sure the TX register is empty or TX FIFO has empty room before calling this function. */
static void LPUART_WriteNonBlocking(LPUART_Type *base, const uint8_t *data, size_t length)
|
{
assert(NULL != data);
size_t i;
for (i = 0; i < length; i++)
{
base->DATA = data[i];
}
}
|
eclipse-threadx/getting-started
|
C++
|
Other
| 310
|
/* Discover whether the current connection is in the error state. */
|
int ossl_statem_in_error(const SSL *ssl)
|
/* Discover whether the current connection is in the error state. */
int ossl_statem_in_error(const SSL *ssl)
|
{
SSL_ASSERT1(ssl);
if (ssl->statem.state == MSG_FLOW_ERROR)
return 1;
return 0;
}
|
retro-esp32/RetroESP32
|
C++
|
Creative Commons Attribution Share Alike 4.0 International
| 581
|
/* This function returns zero in case of success, %-EBADF if the volume is damaged because of an interrupted update, %-EBADMSG if the logical eraseblock is already mapped, and other negative error codes in case of other failures. */
|
int ubi_leb_map(struct ubi_volume_desc *desc, int lnum)
|
/* This function returns zero in case of success, %-EBADF if the volume is damaged because of an interrupted update, %-EBADMSG if the logical eraseblock is already mapped, and other negative error codes in case of other failures. */
int ubi_leb_map(struct ubi_volume_desc *desc, int lnum)
|
{
struct ubi_volume *vol = desc->vol;
struct ubi_device *ubi = vol->ubi;
dbg_gen("unmap LEB %d:%d", vol->vol_id, lnum);
if (desc->mode == UBI_READONLY || vol->vol_type == UBI_STATIC_VOLUME)
return -EROFS;
if (lnum < 0 || lnum >= vol->reserved_pebs)
return -EINVAL;
if (vol->upd_marker)
return -EBADF;
if (vol->eba_tbl[lnum] >= 0)
return -EBADMSG;
return ubi_eba_write_leb(ubi, vol, lnum, NULL, 0, 0);
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* Decode the integer value of an environment variable and return it. */
|
ulong env_get_ulong(const char *name, int base, ulong default_val)
|
/* Decode the integer value of an environment variable and return it. */
ulong env_get_ulong(const char *name, int base, ulong default_val)
|
{
const char *str = env_get(name);
return str ? simple_strtoul(str, NULL, base) : default_val;
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* DeInitializes peripherals used by the I2C EEPROM driver. */
|
void sEE_I2C_LowLevel_DeInit(void)
|
/* DeInitializes peripherals used by the I2C EEPROM driver. */
void sEE_I2C_LowLevel_DeInit(void)
|
{
GPIO_InitTypeDef GPIO_InitStructure;
I2C_Cmd(sEE_I2C, DISABLE);
I2C_DeInit(sEE_I2C);
RCC_APB1PeriphClockCmd(sEE_I2C_CLK, DISABLE);
GPIO_InitStructure.GPIO_Pin = sEE_I2C_SCL_PIN;
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
GPIO_Init(sEE_I2C_SCL_GPIO_PORT, &GPIO_InitStructure);
GPIO_InitStructure.GPIO_Pin = sEE_I2C_SDA_PIN;
GPIO_Init(sEE_I2C_SDA_GPIO_PORT, &GPIO_InitStructure);
}
|
avem-labs/Avem
|
C++
|
MIT License
| 1,752
|
/* The function is used to Set RC adjustment value. */
|
void SysCtlRCAdjValueSet(unsigned long ulAdjValue)
|
/* The function is used to Set RC adjustment value. */
void SysCtlRCAdjValueSet(unsigned long ulAdjValue)
|
{
SysCtlKeyAddrUnlock();
xHWREG(GCR_RCADJ) = ulAdjValue;
SysCtlKeyAddrLock();
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* xircom_remove is called on module-unload or on device-eject. it unregisters the irq, io-region and network device. Interrupts and such are already stopped in the "ifconfig ethX down" code. */
|
static void __devexit xircom_remove(struct pci_dev *pdev)
|
/* xircom_remove is called on module-unload or on device-eject. it unregisters the irq, io-region and network device. Interrupts and such are already stopped in the "ifconfig ethX down" code. */
static void __devexit xircom_remove(struct pci_dev *pdev)
|
{
struct net_device *dev = pci_get_drvdata(pdev);
struct xircom_private *card = netdev_priv(dev);
enter("xircom_remove");
pci_free_consistent(pdev,8192,card->rx_buffer,card->rx_dma_handle);
pci_free_consistent(pdev,8192,card->tx_buffer,card->tx_dma_handle);
release_region(dev->base_addr, 128);
unregister_netdev(dev);
free_netdev(dev);
pci_set_drvdata(pdev, NULL);
leave("xircom_remove");
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Return 0 for adapter mode, non-zero for host (monarch) mode. */
|
int is_pci_host(struct pci_controller *hose)
|
/* Return 0 for adapter mode, non-zero for host (monarch) mode. */
int is_pci_host(struct pci_controller *hose)
|
{
char *s;
if (!is_monarch()) {
pci_write_config_word(PCIDEVID_405GP,
PCI_SUBSYSTEM_ID,
CONFIG_SYS_PCI_SUBSYS_ID_NONMONARCH);
pci_write_config_word(PCIDEVID_405GP,
PCI_CLASS_SUB_CODE,
CONFIG_SYS_PCI_CLASSCODE_NONMONARCH);
}
s = getenv("pciscan");
if (s == NULL) {
if (is_monarch()) {
wait_for_pci_ready();
return 1;
} else {
return 0;
}
} else {
if (!strcmp(s, "yes"))
return 1;
}
return 0;
}
|
EmcraftSystems/u-boot
|
C++
|
Other
| 181
|
/* brief Return Frequency of External Clock return Frequency of External Clock. If no external clock is used returns 0. */
|
static uint32_t CLOCK_GetExtClkFreq(void)
|
/* brief Return Frequency of External Clock return Frequency of External Clock. If no external clock is used returns 0. */
static uint32_t CLOCK_GetExtClkFreq(void)
|
{
return ((SCG0->SOSCCSR & SCG_SOSCCSR_SOSCVLD_MASK) != 0UL) ? s_Ext_Clk_Freq : 0U;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Starting is done in two stages to allow the application time to configure the event queue to use after system initialization but before the host starts. */
|
static void ble_hs_event_start_stage1(struct ble_npl_event *ev)
|
/* Starting is done in two stages to allow the application time to configure the event queue to use after system initialization but before the host starts. */
static void ble_hs_event_start_stage1(struct ble_npl_event *ev)
|
{
ble_hs_sched_start_stage2();
}
|
Nicholas3388/LuaNode
|
C++
|
Other
| 1,055
|
/* Writes multiple words of data into the SHA/MD5 data registers. */
|
static void _SHAMD5DataWriteMultiple(uint32_t ui32Base, uint32_t *pui32DataSrc, uint32_t ui32DataLength)
|
/* Writes multiple words of data into the SHA/MD5 data registers. */
static void _SHAMD5DataWriteMultiple(uint32_t ui32Base, uint32_t *pui32DataSrc, uint32_t ui32DataLength)
|
{
uint32_t ui32Idx, ui32Count;
ASSERT(ui32Base == SHAMD5_BASE);
ui32Count = ui32DataLength / 64;
for(ui32Idx = 0; ui32Idx < ui32Count; ui32Idx++)
{
SHAMD5DataWrite(ui32Base, pui32DataSrc);
pui32DataSrc += 16;
}
ui32Count = ui32DataLength % 64;
if(ui32Count)
{
while((HWREG(ui32Base + SHAMD5_O_IRQSTATUS) &
SHAMD5_INT_INPUT_READY) == 0)
{
}
for(ui32Idx = 0; ui32Idx < ui32Count; ui32Idx += 4)
{
HWREG(ui32Base + SHAMD5_O_DATA_0_IN + ui32Idx) = *pui32DataSrc++;
}
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Update the DC servo calibration on gain changes */
|
static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
|
/* Update the DC servo calibration on gain changes */
static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
|
{
struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
int ret;
ret = snd_soc_put_volsw_2r(kcontrol, ucontrol);
if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1)
& (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA))
snd_soc_update_bits(codec,
WM8993_DC_SERVO_0,
WM8993_DCS_TRIG_SINGLE_0 |
WM8993_DCS_TRIG_SINGLE_1,
WM8993_DCS_TRIG_SINGLE_0 |
WM8993_DCS_TRIG_SINGLE_1);
return ret;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it and redistribute it freely, subject to the following restrictions: */
|
static void normalize_locale_str(char *dst, char *str, size_t buflen)
|
/* Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it and redistribute it freely, subject to the following restrictions: */
static void normalize_locale_str(char *dst, char *str, size_t buflen)
|
{
char *ptr;
ptr = SDL_strchr(str, '.');
if (ptr != NULL) {
*ptr = '\0';
}
ptr = SDL_strchr(str, '@');
if (ptr != NULL) {
*ptr = '\0';
}
if ((str[0] == 'C') && (str[1] == '\0')) {
return;
}
if (*str) {
if (*dst) {
SDL_strlcat(dst, ",", buflen);
}
SDL_strlcat(dst, str, buflen);
}
}
|
alibaba/AliOS-Things
|
C++
|
Apache License 2.0
| 4,536
|
/* Calling this function when you have not acquired the with g_async_queue_lock() leads to undefined behaviour. */
|
void g_async_queue_unlock(GAsyncQueue *queue)
|
/* Calling this function when you have not acquired the with g_async_queue_lock() leads to undefined behaviour. */
void g_async_queue_unlock(GAsyncQueue *queue)
|
{
g_return_if_fail (queue);
g_mutex_unlock (&queue->mutex);
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Update the current command vector. The CLI has a vector of function pointers that can be called as commands using the physical layer as an input. Load this vector pointer. */
|
void cli_load_command_vector(struct cli_desc *dev, cmd_func *command_vector)
|
/* Update the current command vector. The CLI has a vector of function pointers that can be called as commands using the physical layer as an input. Load this vector pointer. */
void cli_load_command_vector(struct cli_desc *dev, cmd_func *command_vector)
|
{
dev->v_cmd_fun = command_vector;
}
|
analogdevicesinc/EVAL-ADICUP3029
|
C++
|
Other
| 36
|
/* Called when more output buffer space is available for this socket. We try not to wake our writers until they can make "significant" progress, otherwise we'll waste resources thrashing kernel_sendmsg with a bunch of small requests. */
|
static void xs_udp_write_space(struct sock *sk)
|
/* Called when more output buffer space is available for this socket. We try not to wake our writers until they can make "significant" progress, otherwise we'll waste resources thrashing kernel_sendmsg with a bunch of small requests. */
static void xs_udp_write_space(struct sock *sk)
|
{
read_lock(&sk->sk_callback_lock);
if (sock_writeable(sk))
xs_write_space(sk);
read_unlock(&sk->sk_callback_lock);
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* Performs an atomic compare exchange operation on the 64-bit unsigned integer specified by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue, then Value is returned. The compare exchange operation must be performed using MP safe mechanisms. */
|
UINT64 EFIAPI InternalSyncCompareExchange64(IN volatile UINT64 *Value, IN UINT64 CompareValue, IN UINT64 ExchangeValue)
|
/* Performs an atomic compare exchange operation on the 64-bit unsigned integer specified by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue, then Value is returned. The compare exchange operation must be performed using MP safe mechanisms. */
UINT64 EFIAPI InternalSyncCompareExchange64(IN volatile UINT64 *Value, IN UINT64 CompareValue, IN UINT64 ExchangeValue)
|
{
return _InterlockedCompareExchange64 (Value, ExchangeValue, CompareValue);
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* The open entry point is called when a network interface is made active by the system (IFF_UP). At this point all resources needed for transmit and receive operations are allocated, the interrupt handler is registered with the OS, the watchdog timer is started, and the stack is notified that the interface is ready. */
|
static int atl1_open(struct net_device *netdev)
|
/* The open entry point is called when a network interface is made active by the system (IFF_UP). At this point all resources needed for transmit and receive operations are allocated, the interrupt handler is registered with the OS, the watchdog timer is started, and the stack is notified that the interface is ready. */
static int atl1_open(struct net_device *netdev)
|
{
struct atl1_adapter *adapter = netdev_priv(netdev);
int err;
netif_carrier_off(netdev);
err = atl1_setup_ring_resources(adapter);
if (err)
return err;
err = atl1_up(adapter);
if (err)
goto err_up;
return 0;
err_up:
atl1_reset(adapter);
return err;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Configure the GPIO pin to output and set it to high/low depending on val */
|
int kinetis_gpio_set_out(struct kinetis_gpio_dsc *dsc, int val)
|
/* Configure the GPIO pin to output and set it to high/low depending on val */
int kinetis_gpio_set_out(struct kinetis_gpio_dsc *dsc, int val)
|
{
int rv;
rv = kinetis_validate_gpio(dsc);
if (rv != 0)
goto out;
kinetis_gpio_config(dsc, KINETIS_GPIO_CONFIG_MUX(1));
KINETIS_GPIO(dsc->port)->pddr |= (1 << dsc->pin);
if (val)
KINETIS_GPIO(dsc->port)->psor |= (1 << dsc->pin);
else
KINETIS_GPIO(dsc->port)->pcor |= (1 << dsc->pin);
rv = 0;
out:
return rv;
}
|
EmcraftSystems/u-boot
|
C++
|
Other
| 181
|
/* Update an L2T entry that was previously used for the same next hop as neigh. Must be called with softirqs disabled. */
|
static void reuse_entry(struct l2t_entry *e, struct neighbour *neigh)
|
/* Update an L2T entry that was previously used for the same next hop as neigh. Must be called with softirqs disabled. */
static void reuse_entry(struct l2t_entry *e, struct neighbour *neigh)
|
{
unsigned int nud_state;
spin_lock(&e->lock);
if (neigh != e->neigh)
neigh_replace(e, neigh);
nud_state = neigh->nud_state;
if (memcmp(e->dmac, neigh->ha, sizeof(e->dmac)) ||
!(nud_state & NUD_VALID))
e->state = L2T_STATE_RESOLVING;
else if (nud_state & NUD_CONNECTED)
e->state = L2T_STATE_VALID;
else
e->state = L2T_STATE_STALE;
spin_unlock(&e->lock);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* Each &struct drbd_tl_epoch has a circular double linked list of requests attached. */
|
static int tl_init(struct drbd_conf *mdev)
|
/* Each &struct drbd_tl_epoch has a circular double linked list of requests attached. */
static int tl_init(struct drbd_conf *mdev)
|
{
struct drbd_tl_epoch *b;
b = kmalloc(sizeof(struct drbd_tl_epoch), GFP_KERNEL);
if (!b)
return 0;
INIT_LIST_HEAD(&b->requests);
INIT_LIST_HEAD(&b->w.list);
b->next = NULL;
b->br_number = 4711;
b->n_req = 0;
b->w.cb = NULL;
mdev->oldest_tle = b;
mdev->newest_tle = b;
INIT_LIST_HEAD(&mdev->out_of_sequence_requests);
mdev->tl_hash = NULL;
mdev->tl_hash_s = 0;
return 1;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* yaffs_bg_gc() Garbage collects. Intended to be called from a background thread. Returns non-zero if at least half the free chunks are erased. */
|
int yaffs_bg_gc(struct yaffs_dev *dev, unsigned urgency)
|
/* yaffs_bg_gc() Garbage collects. Intended to be called from a background thread. Returns non-zero if at least half the free chunks are erased. */
int yaffs_bg_gc(struct yaffs_dev *dev, unsigned urgency)
|
{
int erased_chunks = dev->n_erased_blocks * dev->param.chunks_per_block;
yaffs_trace(YAFFS_TRACE_BACKGROUND, "Background gc %u", urgency);
yaffs_check_gc(dev, 1);
return erased_chunks > dev->n_free_chunks / 2;
}
|
4ms/stm32mp1-baremetal
|
C++
|
Other
| 137
|
/* Gets the TC module capture value.
Retrieves the capture value in the indicated TC module capture channel. */
|
uint32_t tc_get_capture_value(const struct tc_module *const module_inst, const enum tc_compare_capture_channel channel_index)
|
/* Gets the TC module capture value.
Retrieves the capture value in the indicated TC module capture channel. */
uint32_t tc_get_capture_value(const struct tc_module *const module_inst, const enum tc_compare_capture_channel channel_index)
|
{
Assert(module_inst);
Assert(module_inst->hw);
Tc *const tc_module = module_inst->hw;
while (tc_is_syncing(module_inst)) {
}
switch (module_inst->counter_size) {
case TC_COUNTER_SIZE_8BIT:
if (channel_index <
NUMBER_OF_COMPARE_CAPTURE_CHANNELS) {
return tc_module->COUNT8.CC[channel_index].reg;
}
case TC_COUNTER_SIZE_16BIT:
if (channel_index <
NUMBER_OF_COMPARE_CAPTURE_CHANNELS) {
return tc_module->COUNT16.CC[channel_index].reg;
}
case TC_COUNTER_SIZE_32BIT:
if (channel_index <
NUMBER_OF_COMPARE_CAPTURE_CHANNELS) {
return tc_module->COUNT32.CC[channel_index].reg;
}
}
Assert(false);
return 0;
}
|
memfault/zero-to-main
|
C++
| null | 200
|
/* Disable Transmit underrun error interrupt @rmtoll IER TXUNRIE LL_SWPMI_DisableIT_TXUNR. */
|
void LL_SWPMI_DisableIT_TXUNR(SWPMI_TypeDef *SWPMIx)
|
/* Disable Transmit underrun error interrupt @rmtoll IER TXUNRIE LL_SWPMI_DisableIT_TXUNR. */
void LL_SWPMI_DisableIT_TXUNR(SWPMI_TypeDef *SWPMIx)
|
{
CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TXUNRIE);
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* Normally, the status interrupt is cleared by reading the controller status using */
|
void CANIntClear(unsigned long ulBase, unsigned long ulIntClr)
|
/* Normally, the status interrupt is cleared by reading the controller status using */
void CANIntClear(unsigned long ulBase, unsigned long ulIntClr)
|
{
ASSERT(CANBaseValid(ulBase));
ASSERT((ulIntClr == CAN_INT_INTID_STATUS) ||
((ulIntClr>=1) && (ulIntClr <=32)));
if(ulIntClr == CAN_INT_INTID_STATUS)
{
CANRegRead(ulBase + CAN_O_STS);
}
else
{
while(CANRegRead(ulBase + CAN_O_IF1CRQ) & CAN_IF1CRQ_BUSY)
{
}
CANRegWrite(ulBase + CAN_O_IF1CMSK, CAN_IF1CMSK_CLRINTPND);
CANRegWrite(ulBase + CAN_O_IF1CRQ, ulIntClr & CAN_IF1CRQ_MNUM_M);
while(CANRegRead(ulBase + CAN_O_IF1CRQ) & CAN_IF1CRQ_BUSY)
{
}
}
}
|
watterott/WebRadio
|
C++
| null | 71
|
/* SMB2_CREATE_APP_INSTANCE_ID 2 - structure size - 20 2 - reserved 16 - application guid */
|
static void dissect_smb2_APP_INSTANCE_buffer_request(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree, smb2_info_t *si _U_)
|
/* SMB2_CREATE_APP_INSTANCE_ID 2 - structure size - 20 2 - reserved 16 - application guid */
static void dissect_smb2_APP_INSTANCE_buffer_request(tvbuff_t *tvb, packet_info *pinfo _U_, proto_tree *tree, smb2_info_t *si _U_)
|
{
int offset = 0;
proto_item *item;
proto_item *sub_tree;
item = proto_tree_get_parent(tree);
proto_item_append_text(item, ": CREATE APP INSTANCE ID");
sub_tree = proto_tree_add_subtree(tree, tvb, offset, -1, ett_smb2_APP_INSTANCE_buffer, NULL, "APP INSTANCE ID");
proto_tree_add_item(sub_tree, hf_smb2_APP_INSTANCE_buffer_struct_size,
tvb, offset, 2, ENC_LITTLE_ENDIAN);
offset += 2;
proto_tree_add_item(sub_tree, hf_smb2_APP_INSTANCE_buffer_reserved,
tvb, offset, 2, ENC_LITTLE_ENDIAN);
offset += 2;
proto_tree_add_item(sub_tree, hf_smb2_APP_INSTANCE_buffer_app_guid, tvb, offset, 16, ENC_LITTLE_ENDIAN);
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* XXX Eventually check for collisions. They should NEVER happen. If problems seem to show up, it would be a good start to track them down. */
|
static void __init reserve_mem(u64 base, u64 size)
|
/* XXX Eventually check for collisions. They should NEVER happen. If problems seem to show up, it would be a good start to track them down. */
static void __init reserve_mem(u64 base, u64 size)
|
{
u64 top = base + size;
unsigned long cnt = RELOC(mem_reserve_cnt);
if (size == 0)
return;
base = _ALIGN_DOWN(base, PAGE_SIZE);
top = _ALIGN_UP(top, PAGE_SIZE);
size = top - base;
if (cnt >= (MEM_RESERVE_MAP_SIZE - 1))
prom_panic("Memory reserve map exhausted !\n");
RELOC(mem_reserve_map)[cnt].base = base;
RELOC(mem_reserve_map)[cnt].size = size;
RELOC(mem_reserve_cnt) = cnt + 1;
}
|
EmcraftSystems/linux-emcraft
|
C++
|
Other
| 266
|
/* This function computes and returns the width of the Unicode character specified by UnicodeChar. */
|
UINTN EFIAPI GetGlyphWidth(IN CHAR16 UnicodeChar)
|
/* This function computes and returns the width of the Unicode character specified by UnicodeChar. */
UINTN EFIAPI GetGlyphWidth(IN CHAR16 UnicodeChar)
|
{
UINTN Index;
UINTN Low;
UINTN High;
CONST UNICODE_WIDTH_ENTRY *Item;
Item = NULL;
Low = 0;
High = (sizeof (mUnicodeWidthTable)) / (sizeof (UNICODE_WIDTH_ENTRY)) - 1;
while (Low <= High) {
Index = (Low + High) >> 1;
Item = &(mUnicodeWidthTable[Index]);
if (Index == 0) {
if (UnicodeChar <= Item->WChar) {
break;
}
return 0;
}
if (UnicodeChar > Item->WChar) {
Low = Index + 1;
} else if (UnicodeChar <= mUnicodeWidthTable[Index - 1].WChar) {
High = Index - 1;
} else {
break;
}
}
if (Low <= High) {
return Item->Width;
}
return 0;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* The Bus Mode register is programmed with the value given. The bits to be set are bit wise or'ed and sent as the second argument to this function. */
|
s32 synopGMAC_dma_bus_mode_init(synopGMACdevice *gmacdev, u32 init_value)
|
/* The Bus Mode register is programmed with the value given. The bits to be set are bit wise or'ed and sent as the second argument to this function. */
s32 synopGMAC_dma_bus_mode_init(synopGMACdevice *gmacdev, u32 init_value)
|
{
synopGMACWriteReg(gmacdev -> DmaBase, DmaBusMode, init_value);
return 0;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Release a Mutex that was obtained with osMutexWait. */
|
osStatus osMutexRelease(osMutexId mutex_id)
|
/* Release a Mutex that was obtained with osMutexWait. */
osStatus osMutexRelease(osMutexId mutex_id)
|
{
return osErrorISR;
}
return __svcMutexRelease(mutex_id);
}
|
labapart/polymcu
|
C++
| null | 201
|
/* Enables or disables the ADCx conversion through external trigger. */
|
void ADC_ExternalTrigConvCmd(ADC_TypeDef *ADCx, FunctionalState NewState)
|
/* Enables or disables the ADCx conversion through external trigger. */
void ADC_ExternalTrigConvCmd(ADC_TypeDef *ADCx, FunctionalState NewState)
|
{
assert_param(IS_ADC_ALL_PERIPH(ADCx));
assert_param(IS_FUNCTIONAL_STATE(NewState));
if (NewState != DISABLE)
{
ADCx->CR2 |= ADC_CR2_EXTTRIG;
}
else
{
ADCx->CR2 &= (uint32_t) (~ADC_CR2_EXTTRIG);
}
}
|
avem-labs/Avem
|
C++
|
MIT License
| 1,752
|
/* nfs_copy_dname - copy dentry name to data structure @dentry: pointer to dentry @data: */
|
static int nfs_copy_dname(struct dentry *dentry, struct nfs_unlinkdata *data)
|
/* nfs_copy_dname - copy dentry name to data structure @dentry: pointer to dentry @data: */
static int nfs_copy_dname(struct dentry *dentry, struct nfs_unlinkdata *data)
|
{
char *str;
int len = dentry->d_name.len;
str = kmemdup(dentry->d_name.name, NAME_ALLOC_LEN(len), GFP_KERNEL);
if (!str)
return -ENOMEM;
data->args.name.len = len;
data->args.name.name = str;
return 0;
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* This function creates a sync object.
The sync object is used for synchronization between different thread or ISR and a thread. */
|
OsiReturnVal_e osi_SyncObjCreate(OsiSyncObj_t *pSyncObj)
|
/* This function creates a sync object.
The sync object is used for synchronization between different thread or ISR and a thread. */
OsiReturnVal_e osi_SyncObjCreate(OsiSyncObj_t *pSyncObj)
|
{
SemaphoreHandle_t *pl_SyncObj = (SemaphoreHandle_t *)pSyncObj;
*pl_SyncObj = xSemaphoreCreateBinary();
ASSERT (*pSyncObj != NULL);
return OSI_OK;
}
|
micropython/micropython
|
C++
|
Other
| 18,334
|
/* Sets a general-purpose fuse byte with the appropriate erase and write operations. */
|
void flashcalw_set_gp_fuse_byte(uint32_t gp_fuse_byte, uint8_t value)
|
/* Sets a general-purpose fuse byte with the appropriate erase and write operations. */
void flashcalw_set_gp_fuse_byte(uint32_t gp_fuse_byte, uint8_t value)
|
{
uint32_t error_status;
switch (value) {
case 0xFF:
flashcalw_erase_gp_fuse_byte(gp_fuse_byte, false);
break;
case 0x00:
flashcalw_write_gp_fuse_byte(gp_fuse_byte, 0x00);
break;
default:
flashcalw_erase_gp_fuse_byte(gp_fuse_byte, false);
error_status = flashcalw_error_status;
flashcalw_write_gp_fuse_byte(gp_fuse_byte, value);
flashcalw_error_status |= error_status;
break;
}
}
|
remotemcu/remcu-chip-sdks
|
C++
| null | 436
|
/* Get the PWM duty of the PWM module.
The */
|
unsigned long PWMDutyGet(unsigned long ulBase, unsigned long ulChannel)
|
/* Get the PWM duty of the PWM module.
The */
unsigned long PWMDutyGet(unsigned long ulBase, unsigned long ulChannel)
|
{
unsigned long ulChannelTemp;
unsigned long ulCMRData;
unsigned long ulCNRData;
ulChannelTemp = (ulBase == PWMA_BASE) ? ulChannel : (ulChannel - 4);
xASSERT(ulBase == PWMA_BASE);
xASSERT(((ulChannelTemp >= 0) || (ulChannelTemp <= 3)));
ulCNRData = (xHWREG(ulBase + PWM_CNR0 +(ulChannelTemp * 12)));
ulCMRData = (xHWREG(ulBase + PWM_CMR0 +(ulChannelTemp * 12)));
ulChannelTemp = (ulCMRData + 1) * 100 / (ulCNRData + 1);
return ulChannelTemp;
}
|
coocox/cox
|
C++
|
Berkeley Software Distribution (BSD)
| 104
|
/* Returns: (skip): TRUE if the call succeded, FALSE if @error is set. */
|
gboolean _g_freedesktop_dbus_call_get_connection_unix_process_id_sync(_GFreedesktopDBus *proxy, const gchar *arg_name, guint *out_pid, GCancellable *cancellable, GError **error)
|
/* Returns: (skip): TRUE if the call succeded, FALSE if @error is set. */
gboolean _g_freedesktop_dbus_call_get_connection_unix_process_id_sync(_GFreedesktopDBus *proxy, const gchar *arg_name, guint *out_pid, GCancellable *cancellable, GError **error)
|
{
GVariant *_ret;
_ret = g_dbus_proxy_call_sync (G_DBUS_PROXY (proxy),
"GetConnectionUnixProcessID",
g_variant_new ("(s)",
arg_name),
G_DBUS_CALL_FLAGS_NONE,
-1,
cancellable,
error);
if (_ret == NULL)
goto _out;
g_variant_get (_ret,
"(u)",
out_pid);
g_variant_unref (_ret);
_out:
return _ret != NULL;
}
|
seemoo-lab/nexmon
|
C++
|
GNU General Public License v3.0
| 2,330
|
/* Set the OFile's cluster info in its directory entry. */
|
STATIC VOID FatSetDirEntCluster(IN FAT_OFILE *OFile)
|
/* Set the OFile's cluster info in its directory entry. */
STATIC VOID FatSetDirEntCluster(IN FAT_OFILE *OFile)
|
{
UINTN Cluster;
FAT_DIRENT *DirEnt;
DirEnt = OFile->DirEnt;
Cluster = OFile->FileCluster;
DirEnt->Entry.FileClusterHigh = (UINT16)(Cluster >> 16);
DirEnt->Entry.FileCluster = (UINT16)Cluster;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Initializes the CRYP MSP. This function configures the hardware resources used in this example: */
|
void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
|
/* Initializes the CRYP MSP. This function configures the hardware resources used in this example: */
void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
|
{
__HAL_RCC_CRYP_CLK_ENABLE();
}
|
STMicroelectronics/STM32CubeF4
|
C++
|
Other
| 789
|
/* NOTE: We don't do any reference count tracking because it is not needed. The lifecycle of the work_struct is tied to the usb_interface. Before destroying the interface we cancel the work_struct, so the fact that work_struct is queued and or running means the interface (and thus, the device) exist and are referenced. */
|
void usb_queue_reset_device(struct usb_interface *iface)
|
/* NOTE: We don't do any reference count tracking because it is not needed. The lifecycle of the work_struct is tied to the usb_interface. Before destroying the interface we cancel the work_struct, so the fact that work_struct is queued and or running means the interface (and thus, the device) exist and are referenced. */
void usb_queue_reset_device(struct usb_interface *iface)
|
{
schedule_work(&iface->reset_ws);
}
|
robutest/uclinux
|
C++
|
GPL-2.0
| 60
|
/* UART MSP Initialization This function configures the hardware resources used in this example. */
|
void HAL_UART_MspInit(UART_HandleTypeDef *huart)
|
/* UART MSP Initialization This function configures the hardware resources used in this example. */
void HAL_UART_MspInit(UART_HandleTypeDef *huart)
|
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(huart->Instance==USART1)
{
__HAL_RCC_USART1_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
GPIO_InitStruct.Pin = STLINK_RX_Pin|STLINK_TX_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
}
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Enable the interrupt in the SYSTICK.
This function enables the interupt in the systick timer. */
|
void am_hal_systick_int_enable(void)
|
/* Enable the interrupt in the SYSTICK.
This function enables the interupt in the systick timer. */
void am_hal_systick_int_enable(void)
|
{
AM_REG(SYSTICK, SYSTCSR) |= AM_REG_SYSTICK_SYSTCSR_TICKINT_M;
}
|
RT-Thread/rt-thread
|
C++
|
Apache License 2.0
| 9,535
|
/* Print the decimal signed QWORD to instruction content. */
|
UINTN EdbPrintData64s(IN UINT64 Data64)
|
/* Print the decimal signed QWORD to instruction content. */
UINTN EdbPrintData64s(IN UINT64 Data64)
|
{
BOOLEAN Sign;
INT64 Data64s;
Sign = (BOOLEAN)RShiftU64 (Data64, 63);
Data64s = (INT64)RShiftU64 (LShiftU64 (Data64, 1), 1);
EDBSPrintWithOffset (
mInstructionString.Content,
EDB_INSTRUCTION_CONTENT_MAX_SIZE,
mInstructionContentOffset,
L"%s%ld",
Sign ? L"-" : L"+",
(UINT64)Data64s
);
mInstructionContentOffset = mInstructionContentOffset + 1 + EdbGetBitWidth (Data64s);
return mInstructionContentOffset;
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
/* Get the max SmbiosHandle that could be use. */
|
VOID EFIAPI GetMaxSmbiosHandle(IN CONST EFI_SMBIOS_PROTOCOL *This, IN OUT EFI_SMBIOS_HANDLE *MaxHandle)
|
/* Get the max SmbiosHandle that could be use. */
VOID EFIAPI GetMaxSmbiosHandle(IN CONST EFI_SMBIOS_PROTOCOL *This, IN OUT EFI_SMBIOS_HANDLE *MaxHandle)
|
{
if ((This->MajorVersion == 2) && (This->MinorVersion == 0)) {
*MaxHandle = 0xFFFE;
} else {
*MaxHandle = 0xFEFF;
}
}
|
tianocore/edk2
|
C++
|
Other
| 4,240
|
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