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stringclasses 1
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stringlengths 131
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generate cpp file from given test case python file
|
cmt('Version info: $Revision: 1 $ $Author: rio1rt $ $Date: 2024/01/25 15:35:15 GMT $')
sav('VDD', 0.0, sim_ignore=True)
sav('VDDIO', 0.0, sim_ignore=True)
dly(1e-3)
sav('VDD', 1.8, v_range=2.0, i_comp=40e-3)
sav('VDDIO', 3.0, v_range=4.0, i_comp=40e-3)
dly(3e-3)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_01_power_cycle_V1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double v_VDDIO, v_VDD;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
v_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
v_VDD = Primary.getLevelSpec().getSpecValue("VDD");
rdi.dc().pin("All_AVI64").disconnect().execute();
rdi.hwRelay().pin("ALL_PS1600").setOff("ALL").execute();
rdi.hwRelay().pin("SPI_Pins").setOn("AC").setOff("DC,PPMU").execute();
rdi.util().pin("K1_K2").setOn().execute();
rdi.util().pin("K6,K7").setOff().execute();
// rdi.dc().pin("VDD_AVI64").vForce(v_VDD).iMeasRange(40 mA).execute();
// rdi.dc().pin("VDDIO_AVI64").vForce(v_VDDIO).iMeasRange(40 mA).execute();
RDI_BEGIN(mode);
rdi.burstId("T01_01_power_cycle_V1_PAT_id");
rdi.dc("T01_01_power_cycle_V1DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("VDD").vForce(0.0)
.insertSub(i_comment_line0[0]).pin("VDDIO").vForce(0.0)
.insertSub(i_comment_line0[1]).pin("VDD").vForce(v_VDD).iRange(40 mA)
.insertSub(i_comment_line0[1]).pin("VDDIO").vForce(v_VDDIO).iRange(40 mA)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_01_power_cycle_V1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_01_power_cycle_V1", T01_01_power_cycle_V1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
rac('CHIP_ID', 0x0000, 0x0000) # Dummy read to init SPI protocol
dly(50e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_02_IF_setup_SPI_V1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T01_02_IF_setup_SPI_V1_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_02_IF_setup_SPI_V1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_02_IF_setup_SPI_V1", T01_02_IF_setup_SPI_V1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:10:23 GMT $')
bw('CSB', 1) # Pre-condition inputs: CSB high to keep I2C enabled
bw('SCX', 1) # Pre-condition inputs: SCX high I2C clock
bw('SDX', 1) # Pre-condition inputs: SDX high I2C data
bw('SDO', 0) # Pre-condition inputs: SDO low to use I2C device ID 0x68
dly(10e-6)
sav('VDD', 0.0, sim_ignore=True)
sav('VDDIO', 0.0, sim_ignore=True)
dly(1e-3)
sav('VDD', 1.8, v_range=2.0, i_comp=40e-3)
sav('VDDIO', 3.0, v_range=4.0, i_comp=40e-3)
dly(3e-3)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_03_IF_setup_I2C_devID68_R1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double v_VDDIO, v_VDD;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
v_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
v_VDD = Primary.getLevelSpec().getSpecValue("VDD");
RDI_BEGIN(mode);
rdi.burstId("T01_03_IF_setup_I2C_devID68_R1_PAT_id");
rdi.dc("T01_03_IF_setup_I2C_devID68_R1DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("VDD").vForce(0.0)
.insertSub(i_comment_line0[0]).pin("VDDIO").vForce(0.0)
.insertSub(i_comment_line0[1]).pin("VDD").vForce(v_VDD).iRange(40 mA)
.insertSub(i_comment_line0[1]).pin("VDDIO").vForce(v_VDDIO).iRange(40 mA)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_03_IF_setup_I2C_devID68_R1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_03_IF_setup_I2C_devID68_R1", T01_03_IF_setup_I2C_devID68_R1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:21:04 GMT $')
bw('CSB', 1) # Pre-condition inputs: CSB high to keep I2C enabled
bw('SCX', 1) # Pre-condition inputs: SCX high I2C clock
bw('SDX', 1) # Pre-condition inputs: SDX high I2C data
bw('SDO', 1) # Pre-condition inputs: SDO low to use I2C device ID 0x69
dly(10e-6)
sav('VDD', 0.0, sim_ignore=True)
sav('VDDIO', 0.0, sim_ignore=True)
dly(1e-3)
sav('VDD', 1.8, v_range=2.0, i_comp=40e-3)
sav('VDDIO', 3.0, v_range=4.0, i_comp=40e-3)
dly(3e-3)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_04_IF_setup_I2C_devID69_R1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double v_VDDIO, v_VDD;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
v_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
v_VDD = Primary.getLevelSpec().getSpecValue("VDD");
RDI_BEGIN(mode);
rdi.burstId("T01_04_IF_setup_I2C_devID69_R1_PAT_id");
rdi.dc("T01_04_IF_setup_I2C_devID69_R1DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("VDD").vForce(0.0)
.insertSub(i_comment_line0[0]).pin("VDDIO").vForce(0.0)
.insertSub(i_comment_line0[1]).pin("VDD").vForce(v_VDD).iRange(40 mA)
.insertSub(i_comment_line0[1]).pin("VDDIO").vForce(v_VDDIO).iRange(40 mA)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_04_IF_setup_I2C_devID69_R1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_04_IF_setup_I2C_devID69_R1", T01_04_IF_setup_I2C_devID69_R1);
|
generate cpp file from given test case python file
|
# Warning, AA workaround applied, pri.sec pad drive strength set to 1
cmt('Version info: $Revision: bai430aa_rel/4 $ $Author: hmf1rt $ $Date: 2024/09/25 12:30:22 GMT $')
wr('EXT_MODE', 0x0000) # User page
wac('IO_PAD_STRENGTH', 0x0049) # Set pad drive strength to 1 for prim/sec IF
rac('CHIP_ID', 0x00af, 0x00ff) # Check chip access
wac('PWR_CONF', 0x0000) # Keep advanced power save off (default is 0x0)
dly(10e-6)
wr('CMD', 0xBB3A) # 1st command for enabling the extended mode
wr('CMD', 0x2C62) # 2nd command for enabling the extended mode
wr('CMD', 0xA576) # 1st command for enabling the super privilege mode
wr('CMD', 0x34D6) # 2nd command for enabling the super privilege mode
dly(200e-6)
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
dly(400e-6)
rac('ERR_REG', 0x0000) # Check error register
wac('EXT_MODE', 0xc00d) # Enable super privilege mode; switch to ANA register page
rac('STATUS_PMOD0', 0x0003, 0x0003) # Check ACC AFE PMU status
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_10_set_device_config_STC_ACC_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
ARRAY_LL IO_PAD_STRENGTH_rtv(xNSitES);
const int Wri_Bit_Length = 33;
const int Wri_Bit_Position = 415;
int IO_PAD_STRENGTH = 1;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T01_10_set_device_config_STC_ACC_V2_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
// FOR_EACH_SITE_BEGIN();
// IO_PAD_STRENGTH_rtv[CURRENT_SITE_NUMBER()-1] = extend_Pmode_Herschel(IO_PAD_STRENGTH, 2);
// FOR_EACH_SITE_END();
// rdi.runTimeVal("IO_PAD_STRENGTH_rtv", IO_PAD_STRENGTH_rtv);
//
// RDI_BEGIN(mode);
// rdi.burstId("id2");
// rdi.digCap("pad_drv_digcap").vecVarOnly().pin("SDO").capMode(TA::SER).samples(16*1).bitPerWord(16).execute();
// rdi.smartVec().label("T08_99_Pad_Drive_setting_R1").pin("SDX").writeData("IO_PAD_STRENGTH_rtv", Wri_Bit_Length, Wri_Bit_Position).execute();
// RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_10_set_device_config_STC_ACC_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
// int Func_result2 = rdi.id("id2").getBurstPassFail();
// FuncPrint("Func_result2", Func_result2);
//
// ARRAY_I Vec=rdi.id("pad_drv_digcap").getVector();
// FuncPrint("IO_PAD_STRENGTH_RD", reverse_ras_result(Vec[0])&0x7);
// FuncPrint("IO_PAD_STRENGTH", IO_PAD_STRENGTH);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_10_set_device_config_STC_ACC_V2", T01_10_set_device_config_STC_ACC_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: rio1rt $ $Date: 2024/03/14 13:05:55 GMT $')
rac('CHIP_ID', 0x00af, 0x00ff) # Check chip access
wac('PWR_CONF', 0x0000) # Keep advanced power save off (default is 0x0)
dly(10e-6)
wr('CMD', 0xBB3A) # 1st command for enabling the extended mode
wr('CMD', 0x2C62) # 2nd command for enabling the extended mode
wr('CMD', 0xA576) # 1st command for enabling the super privilege mode
wr('CMD', 0x34D6) # 2nd command for enabling the super privilege mode
dly(10e-6)
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
wac('GYR_CONF', 0xe25c) # Enable GYR in HPM; set GFS=4K; set ODR=1600; set BW=200
dly(50e-3)
rac('ERR_REG', 0x0000) # Check error register
wac('EXT_MODE', 0xc00d) # Enable super privilege mode; switch to ANA register page
rac('STATUS_PMOD0', 0x0003, 0x0003) # Check ACC AFE PMU status
rac('STATUS_PMOD1', 0x003c, 0x003c) # Check GYR drive and rate PMU status
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_11_set_device_config_STC_COMBO_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T01_11_set_device_config_STC_COMBO_V2_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_11_set_device_config_STC_COMBO_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_11_set_device_config_STC_COMBO_V2", T01_11_set_device_config_STC_COMBO_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/3 $ $Author: hmf1rt $ $Date: 2024/08/06 09:19:58 GMT $')
wac('EXT_MODE', 0xc006) # Switch to the FCU register page
wac('OCP_MASK', 0x1000) # Set masking register
wr('FILTER_CONF',0x1000) # Bypass GYR notch filter
rac('FILTER_CONF',0x1000, 0x1000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('OCP_MASK', 0x0040) # Set masking register
wr('FCU_TEST_CONF',0x0040) # Disable gyro self-test
rac('FCU_TEST_CONF',0x0040) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00d) # Switch to ANA/PMU register page
wac('GYR_TEST_AA_AI', 0x0003) # Power down AA/AI
wac('EXT_MODE', 0xc00e) # Switch to AFE register page
wac('OCP_MASK', 0x0030) # Set masking register
wr('DRV_ST_TRM', 0x0020) # Disable GYR startup BITE
rac('DRV_ST_TRM', 0x0020, 0x0020) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x0004) # Set masking register
wr('GYR_TEST_EN', 0x0004) # Enable VCO free-running frequency
rac('GYR_TEST_EN', 0x0004, 0x0004) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc000) # Switch to USR register page
wac('GYR_CONF', 0xe25e) # Enable GYR in HPM; set GFS=4K; set ODR=6400; set BW=200
dly(5e-3) # Delay for PMU power-up; no data ready (~10ms)
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
rac('STATUS_PMOD1', 0x003c, 0x003c) # Check GYR drive and rate PMU status
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_20_switch_on_GYR_wo_drive_V3: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T01_20_switch_on_GYR_wo_drive_V3_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
// rdi.func().label("T11_21_VCO_reference_measurement_V2_AVC2_PY2").execute();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_20_switch_on_GYR_wo_drive_V3_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_20_switch_on_GYR_wo_drive_V3", T01_20_switch_on_GYR_wo_drive_V3);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:21:04 GMT $')
wac('EXT_MODE', 0xc000) # Switch to USR register page
wac('GYR_CONF', 0x0058) # Disable GYR; set default configuration
dly(100e-6)
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x0004) # Set masking register
wr('GYR_TEST_EN', 0x0000) # Disable VCO free-running frequency
rac('GYR_TEST_EN', 0x0000, 0x0004) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00e) # Switch to AFE register page
wac('OCP_MASK', 0x0020) # Set masking register
wr('DRV_ST_TRM', 0x0000) # Enable GYR startup BITE
rac('DRV_ST_TRM', 0x0000, 0x0020) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00d) # Switch to ANA/PMU register page
wac('GYR_TEST_AA_AI', 0x0000) # Enable power up of AA/AI
wac('EXT_MODE', 0xc006) # Switch to the FCU register page
wac('OCP_MASK', 0x0040) # Set masking register
wr('FCU_TEST_CONF',0x0000) # Enable gyro self-test
rac('FCU_TEST_CONF',0x0000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('OCP_MASK', 0x1000) # Set masking register
wr('FILTER_CONF',0x0000) # Disable GYR notch filter bypass
rac('FILTER_CONF',0x0000, 0x1000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00d) # Switch to ANA/PMU register page
rac('STATUS_PMOD1', 0x0000, 0x003c) # Check GYR drive and rate PMU status
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_21_switch_off_GYR_wo_drive_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T01_21_switch_off_GYR_wo_drive_V2_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_21_switch_off_GYR_wo_drive_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_21_switch_off_GYR_wo_drive_V2", T01_21_switch_off_GYR_wo_drive_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 3 $ $Author: luz3sgh $ $Date: 2024/05/20 08:35:37 GMT $')
wac('EXT_MODE',0xc000) # User page
wac('ACC_CONF', 0x004e) # e24c->004e, odr to max 6.4K, bandwidth change to auto, Disable ACC
wac('EXT_MODE',0xc00e) # AFE(acc afe) page
wac('ACC_TRM_CTRL',0x01af) # Default value for gmboost, slow chopper, settling count
wac('ACC_TEST_CTRL',0x00c7) # Disable sensor drive, disconnect MEMS, enable all 3 channels
wac('EXT_MODE',0xc00b) # AFE(acc_dp) page
wac('ACC_COMP_CONF', 0x0003) # Disable offset and gain correction
wac('EXT_MODE',0xc000) # User page
wac('FILTER_CONF', 0x0000) # Bypass IIR, reset value 0303
wac('ACC_CONF', 0xe04e) # Enable ACC in HPM; set AFS=32g; set ODR=3200; set BW=AUTO
dly(400e-6) # wait for the internal clock (25kHz), multiple clocks in the PMU
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_24_enable_ACC_high_odr_mode_V3: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T01_24_enable_ACC_high_odr_mode_V3_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_24_enable_ACC_high_odr_mode_V3_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_24_enable_ACC_high_odr_mode_V3", T01_24_enable_ACC_high_odr_mode_V3);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: luz3sgh $ $Date: 2024/06/11 07:02:03 GMT $')
wac('EXT_MODE',0xc000) # AFE(acc afe) page
wac('ACC_CONF', 0x004e) # Disable ACC
# Restore to default value
wac('EXT_MODE',0xc00e) # AFE(acc afe) page
wac('ACC_TEST_CTRL',0x0007) # Restore default
wac('EXT_MODE',0xc00b) # AFE(acc_dp) page
wac('ACC_COMP_CONF', 0x0000) # Restore default
wac('EXT_MODE',0xc000) # User page
wac('FILTER_CONF', 0x0303) # Restore default
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
dly(500e-6) # as in T01_10_set_device_config_STC, +100microseconds for rac(),wac()
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_25_disable_ACC_high_odr_mode_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("01_25_disable_ACC_high_odr_mode_V2_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("01_25_disable_ACC_high_odr_mode_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_25_disable_ACC_high_odr_mode_V2", T01_25_disable_ACC_high_odr_mode_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:21:04 GMT $')
wac('EXT_MODE', 0xc006) # Switch to the FCU register page
wac('OCP_MASK', 0x1000) # Set masking register
wr('FILTER_CONF',0x1000) # Bypass GYR notch filter
rac('FILTER_CONF',0x1000, 0x1000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('OCP_MASK', 0x0040) # Set masking register
wr('FCU_TEST_CONF',0x0040) # Disable gyro self-test
rac('FCU_TEST_CONF',0x0040) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00d) # Switch to ANA/PMU register page
wac('GYR_TEST_AA_AI', 0x0003) # Power down AA/AI
wac('OCP_MASK', 0x1000) # Set masking register
wr('ANA_TRM_CAP_PROG_DRV', 0x1000) # Enable realignment of GYR clk to FOSC
rac('ANA_TRM_CAP_PROG_DRV', 0x1000, 0x1000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00e) # Switch to AFE register page
wac('OCP_MASK', 0x0030) # Set masking register
wr('DRV_ST_TRM', 0x0020) # Disable GYR startup BITE
rac('DRV_ST_TRM', 0x0020, 0x0020) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x0004) # Set masking register
wr('GYR_TEST_EN', 0x0004) # Enable VCO free-running frequency
rac('GYR_TEST_EN', 0x0004, 0x0004) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc000) # Switch to USR register page
wac('GYR_CONF', 0xe25e) # Enable GYR in HPM; set GFS=4K; set ODR=6400; set BW=200
dly(5e-3) # Delay for PMU power-up; no data ready (~10ms)
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
rac('STATUS_PMOD1', 0x003c, 0x003c) # Check GYR drive and rate PMU status
|
/*****************************************************
* T01_30_switch_on_GYR_wo_drive_econ_V3, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_30_switch_on_GYR_wo_drive_econ_V3: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T01_30_switch_on_GYR_wo_drive_econ}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 3 > <Author: hmf1rt > <Date: 2024/04/25 08:09:21 GMT >}
valid comment[ 1] @ avcline 3973: {Test End: T01_30_switch_on_GYR_wo_drive_econ}
*/
// rdi.util().pin("K1_K2,K6,K7").setOn().execute();
// rdi.dc().pin("VDD_AVI64").vForce(0).iMeasRange(40 mA).execute();
// rdi.dc().pin("VDDIO_AVI64").vForce(0).iMeasRange(40 mA).execute();
// RDI_BEGIN(mode);
// rdi.dc().pin("VDDIO_AVI64").vForce(0).execute();
// rdi.dc().pin("VDD_AVI64").vForce(0).execute();
// rdi.wait(1 ms);
// rdi.dc().pin("VDDIO_AVI64").vForce(3).execute();
// rdi.dc().pin("VDD_AVI64").vForce(1.8).execute();
// rdi.wait(1 ms);
// rdi.func().label("T01_02_IF_setup_SPI_V1_AVC1_PY1").execute();
// rdi.func().label("T01_10_set_device_config_STC_ACC_R1").execute();
// rdi.func().label(s_splited_pat_name[0]).execute();
// RDI_END();
//
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.func().label(s_splited_pat_name[0]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
FuncPrint("i_funcRes0", i_funcRes0[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
//rdi.func().label("T11_20_VCO_reference_trimming_V2_AVC2_PY2").execute();
ON_FIRST_INVOCATION_END();
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_30_switch_on_GYR_wo_drive_econ_V3", T01_30_switch_on_GYR_wo_drive_econ_V3);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:21:04 GMT $')
wac('EXT_MODE', 0xc000) # Switch to USR register page
wac('GYR_CONF', 0x0058) # Disable GYR; set default configuration
dly(100e-6)
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x0004) # Set masking register
wr('GYR_TEST_EN', 0x0000) # Disable VCO free-running frequency
rac('GYR_TEST_EN', 0x0000, 0x0004) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00e) # Switch to AFE register page
wac('OCP_MASK', 0x0020) # Set masking register
wr('DRV_ST_TRM', 0x0000) # Enable GYR startup BITE
rac('DRV_ST_TRM', 0x0000, 0x0020) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00d) # Switch to ANA/PMU register page
wac('OCP_MASK', 0x1000) # Set masking register
wr('ANA_TRM_CAP_PROG_DRV', 0x0000) # Disable realignment of GYR clk to FOSC
rac('ANA_TRM_CAP_PROG_DRV', 0x0000, 0x1000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('GYR_TEST_AA_AI', 0x0000) # Enable power up of AA/AI
wac('EXT_MODE', 0xc006) # Switch to the FCU register page
wac('OCP_MASK', 0x0040) # Set masking register
wr('FCU_TEST_CONF',0x0000) # Enable gyro self-test
rac('FCU_TEST_CONF',0x0000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('OCP_MASK', 0x1000) # Set masking register
wr('FILTER_CONF',0x0000) # Disable GYR notch filter bypass
rac('FILTER_CONF',0x0000, 0x1000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00d) # Switch to ANA/PMU register page
rac('STATUS_PMOD1', 0x0000, 0x003c) # Check GYR drive and rate PMU status
|
/*****************************************************
* T01_31_switch_off_GYR_wo_drive_econ_V4, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_31_switch_off_GYR_wo_drive_econ_V4: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T01_31_switch_off_GYR_wo_drive_econ}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 4 > <Author: hmf1rt > <Date: 2024/04/25 15:29:47 GMT >}
valid comment[ 1] @ avcline 3973: {Test End: T01_31_switch_off_GYR_wo_drive_econ}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.func().label(s_splited_pat_name[0]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
FuncPrint("i_funcRes0", i_funcRes0[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_31_switch_off_GYR_wo_drive_econ_V4", T01_31_switch_off_GYR_wo_drive_econ_V4);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: luz3sgh $ $Date: 2024/04/12 06:49:43 GMT $')
cmt("py $Revision: 2 $")
wac("EXT_MODE", 0xc009) # change to page 9,IO
bw("ASCX", 1) # Set pad ASCX to "1"
#IO page
wac('OCP_MASK', 0x0018) # Set masking register
wr('IO_TEST_IF', 0x0018) # Enable external clock; select ASCX as clk source
dly(10.064e-6) # Delay to fit the 74ns grid
ubw('ASCX')
clk("ASCX", 1/148e-9) # Start to apply ext clk (6.757 MHz) on DTM3
dly(20.128e-6) # Delay to fit the 74ns grid
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
rac("IO_TEST_IF", 0x0018, 0x0018) # Check register setting
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_02_enable_external_clock_on_ascx_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T02_02_enable_external_clock_on_ascx_V2_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T02_02_enable_external_clock_on_ascx_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_02_enable_external_clock_on_ascx_V2", T02_02_enable_external_clock_on_ascx_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# Part1- VDDA bypass
# - swith off ACC
# - switch off VDDA_LDO
# - disable pullup on ANAIO 2
# - set ext. voltage
# - enable bypass--connect VDDA to OCSB Pad
# Part2- VDDDC bypass
# - set INT1 to 1.15V
# - enable bypass--connect VDDDC to INT1 pad
# - switch off VDD_DC LDO
# - set INT1 to 1.1V
#############################################################################################################
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 19:45:00 GMT $')
# Part1,vdda bypass
# switch off ACC
wac('EXT_MODE', 0xc000) # Switch to USR page
wac('ACC_CONF',0x024c) # Disable ACC
# power down VDDA_LDO (to prevent power request in other test items)
wac('EXT_MODE', 0xc00d) # Switch to PMU page
wac("OCP_MASK", 0x000a)
wr("PMU_TEST_OWR",0x0008) # bit3 acc_vdda_owr_en 1, bit 1, owr_vdda_acc_en 0
rac("PMU_TEST_OWR",0x0008,0x000a)
wr("OCP_MASK", 0x0000)
rac("OCP_MASK", 0xffff)
# set vdda ext. voltage
sav("OCSB", 1.5, v_range=2.0, i_comp=10e-3)
dly(100.048e-6)
# enable bypass
wac("EXT_MODE", 0xc00d) # change to page D, ANA/PMU page ++
wac("OCP_MASK", 0x0001) # Set masking register
wr("ANA_TEST_PWR",0x0001) # vdda_ext_en to 1, VDDA to OCSB
rac("ANA_TEST_PWR", 0x0001, 0x0001) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
# Part2, vddd_dc bypass
sav('INT1', 1.15, v_range=2.0, i_comp=10e-3)
dly(100.048e-6)
wac('OCP_MASK', 0x0042) # Set masking register
wr('ANA_TEST_PWR', 0x0002) # Bypass VDDD_DC to external pad
rac('ANA_TEST_PWR', 0x0002,0x0042) # Bypass VDDD_DC to external pad
dly(10.064e-6)
wr('ANA_TEST_PWR', 0x0042) # Disable VDDD_DC LDO; keep external pad bypass
rac('ANA_TEST_PWR', 0x0042,0x0042) # Disable VDDD_DC LDO; keep external pad bypass
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Set vddd_dc ext. voltage
sav('INT1', 1.1, v_range=2.0, i_comp=10e-3)
dly(100.048e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_10_enable_VDDD_DC_and_VDDA_external_bypass_ECon_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
double d_V_INT1, d_V_OCSB;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
d_V_INT1 = Primary.getLevelSpec().getSpecValue("INT1");
d_V_OCSB = Primary.getLevelSpec().getSpecValue("OCSB");
RDI_BEGIN(mode);
rdi.burstId("T02_10_enable_VDDD_DC_and_VDDA_external_bypass_ECon_V2_PAT_id");
rdi.dc("T02_10_enable_VDDD_DC_and_VDDA_external_bypass_ECon_V2DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("OCSB").vForce(d_V_OCSB)
.insertSub(i_comment_line0[1]).pin("INT1").vForce(1.15)
.insertSub(i_comment_line0[2]).pin("INT1").vForce(d_V_INT1)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T02_10_enable_VDDD_DC_and_VDDA_external_bypass_ECon_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_10_enable_VDDD_DC_and_VDDA_external_bypass_ECon_V2", T02_10_enable_VDDD_DC_and_VDDA_external_bypass_ECon_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 19:45:00 GMT $')
# Part1 disable vdddc bypass
sav('INT1', 1.15) # Increase supply voltage to 1.15V on pad INT1
dly(100.048e-6)
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x0042) # Set masking register
wr('ANA_TEST_PWR', 0x0002) # Enable VDDD_DC_LDO; keep external bypass
rac('ANA_TEST_PWR', 0x0002, 0x0042) # Check register setting
dly(100.048e-6)
wr('ANA_TEST_PWR', 0x0000) # Disable VDDD_DC extnernal bypass
rac('ANA_TEST_PWR', 0x0000, 0x0042) # Check register setting
dly(100.048e-6)
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
uav('INT1') # Unset voltage stimuli on INT1
dly(100.048e-6)
# Part2 disable vdda bypass
# disable bypass VDDA_LDO with ext voltage
wac("OCP_MASK", 0x0001) # Set masking register
wr("ANA_TEST_PWR",0x0000) # vdda_ext_en to 0, disconnect VDDA to OCSB
rac("ANA_TEST_PWR", 0x0000, 0x0001) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
# unset ext voltage
uav("OCSB")
dly(100.048e-6)
# disable VDDA_LDO power overwrite
wac('EXT_MODE',0xc00d) # to PMU page
wac("OCP_MASK", 0x000a)
wr("PMU_TEST_OWR",0x0000) # bit3 acc_vdda_owr_en 0, bit 1, owr_vdda_acc_en 0
rac("PMU_TEST_OWR",0x0000,0x000a)
wr("OCP_MASK", 0x0000)
rac("OCP_MASK", 0xffff)
# switch on ACC
wac('EXT_MODE', 0xc000)
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
dly(3000.256e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_11_disable_VDDD_DC_and_VDDA_external_bypass_ECon_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T02_11_disable_VDDD_DC_and_VDDA_external_bypass_ECon_V2_PAT_id");
rdi.dc("T02_11_disable_VDDD_DC_and_VDDA_external_bypass_ECon_V2DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("INT1").vForce(1.15)
.insertSub(i_comment_line0[1]).pin("INT1").relay(TA::ppmuRly_offALL)
.insertSub(i_comment_line0[2]).pin("OCSB").relay(TA::ppmuRly_offALL)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T02_11_disable_VDDD_DC_and_VDDA_external_bypass_ECon_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_11_disable_VDDD_DC_and_VDDA_external_bypass_ECon_V2", T02_11_disable_VDDD_DC_and_VDDA_external_bypass_ECon_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# - swith off ACC
# - switch off VDDA_LDO
# - disable pullup on ANAIO 2
# - set ext. voltage
# - enable bypass--connect VDDA to external Pad
#############################################################################################################
cmt('Version info: $Revision: 3 $ $Author: hmf1rt $ $Date: 2024/04/19 12:11:59 GMT $')
# switch off ACC
wac('EXT_MODE', 0xc000) # Switch to USR page
wac('ACC_CONF',0x024c) # Disable ACC
# power down VDDA_LDO (to prevent power request in other test items)
wac('EXT_MODE', 0xc00d) # Switch to PMU page
wac("OCP_MASK", 0x000a)
wr("PMU_TEST_OWR",0x0008) # bit3 acc_vdda_owr_en 1, bit 1, owr_vdda_acc_en 0
rac("PMU_TEST_OWR",0x0008,0x000a)
wr("OCP_MASK", 0x0000)
rac("OCP_MASK", 0xffff)
# set ext. voltage
sav("OCSB", 1.5, v_range=2.0, i_comp=10e-3)
dly(100e-6)
# enable bypass
wac("EXT_MODE", 0xc00d) # change to page D, ANA/PMU page ++
wac("OCP_MASK", 0x0001) # Set masking register
wr("ANA_TEST_PWR",0x0001) # vdda_ext_en to 1, VDDA to OCSB
rac("ANA_TEST_PWR", 0x0001, 0x0001) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_14_enable_vdda_external_bypass_V3: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T02_14_enable_vdda_external_bypass_V3_PAT_id");
rdi.dc("T02_14_enable_vdda_external_bypass_V3DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("OCSB").vForce(1.5)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T02_14_enable_vdda_external_bypass_V3_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_14_enable_vdda_external_bypass_V3", T02_14_enable_vdda_external_bypass_V3);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# - disable bypass VDDA_LDO with ext. voltage
# - unset ext. voltage
# - enable pullup on ANAIO2
# - disable VDDA pwr overwrite
# - switch on ACC
#############################################################################################################
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/08/07 15:17:16 GMT $')
# disable bypass VDDA_LDO with ext voltage
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac("OCP_MASK", 0x0001) # Set masking register
wr("ANA_TEST_PWR",0x0000) # vdda_ext_en to 0, disconnect VDDA to OCSB
rac("ANA_TEST_PWR", 0x0000, 0x0001) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
# unset ext voltage
uav("OCSB")
dly(100e-6)
# disable VDDA_LDO power overwrite
wac('EXT_MODE',0xc00d) # to PMU page
wac("OCP_MASK", 0x000a)
wr("PMU_TEST_OWR",0x0000) # bit3 acc_vdda_owr_en 0, bit 1, owr_vdda_acc_en 0
rac("PMU_TEST_OWR",0x0000,0x000a)
wr("OCP_MASK", 0x0000)
rac("OCP_MASK", 0xffff)
# switch on ACC
wac('EXT_MODE', 0xc000)
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
dly(3e-3)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_15_disable_vdda_external_bypass_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T02_15_disable_vdda_external_bypass_V2_PAT_id");
rdi.dc("T02_15_disable_vdda_external_bypass_V2DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("OCSB").relay(TA::ppmuRly_offALL)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T02_15_disable_vdda_external_bypass_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_15_disable_vdda_external_bypass_V2", T02_15_disable_vdda_external_bypass_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# - swith off ACC
# - switch off VDDA_LDO
# - disable pullup on ANAIO 2
# - set ext. voltage
# - enable bypass--connect VDDA to external Pad
#############################################################################################################
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/04/19 12:28:38 GMT $')
# switch off ACC
wac('EXT_MODE', 0xc000) # Switch to USR page
wac('ACC_CONF',0x024c) # Disable ACC
# power down VDDA_LDO (to prevent power request in other test items)
wac('EXT_MODE', 0xc00d) # Switch to PMU page
wac("OCP_MASK", 0x000a)
wr("PMU_TEST_OWR",0x0008) # bit3 acc_vdda_owr_en 1, bit 1, owr_vdda_acc_en 0
rac("PMU_TEST_OWR",0x0008,0x000a)
wr("OCP_MASK", 0x0000)
rac("OCP_MASK", 0xffff)
# set ext. voltage
sav("OCSB", 1.5, v_range=2.0, i_comp=10e-3)
dly(100e-6)
# enable bypass
wac("EXT_MODE", 0xc00d) # change to page D, ANA/PMU page ++
wac("OCP_MASK", 0x0001) # Set masking register
wr("ANA_TEST_PWR",0x0001) # vdda_ext_en to 1, VDDA to OCSB
rac("ANA_TEST_PWR", 0x0001, 0x0001) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
|
/*****************************************************
* T02_16_enable_vdda_external_bypass_econ_V1, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_16_enable_vdda_external_bypass_econ_V1: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static int i_funcRes0[xNSitES];
double d_V_OCSB;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
d_V_OCSB = Primary.getLevelSpec().getSpecValue("OCSB");
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T02_16_enable_vdda_external_bypass_econ}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 1 > <Author: hmf1rt > <Date: 2024/04/19 12:28:38 GMT >}
valid comment[ 1] @ avcline 1162: {sav('OCSB', 1.5, 2, 0.01, False, False)}
valid comment[ 2] @ avcline 1940: {Test End: T02_16_enable_vdda_external_bypass_econ}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][1]).pin("OCSB").vForce(d_V_OCSB)//{sav('OCSB', 1.5, 2, 0.01, False, False)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
//Add calc code if necessary
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_16_enable_vdda_external_bypass_econ_V1", T02_16_enable_vdda_external_bypass_econ_V1);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# - disable bypass VDDA_LDO with ext. voltage
# - unset ext. voltage
# - enable pullup on ANAIO2
# - disable VDDA pwr overwrite
# - switch on ACC
#############################################################################################################
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/08/07 15:17:16 GMT $')
# disable bypass VDDA_LDO with ext voltage
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac("OCP_MASK", 0x0001) # Set masking register
wr("ANA_TEST_PWR",0x0000) # vdda_ext_en to 0, disconnect VDDA to OCSB
rac("ANA_TEST_PWR", 0x0000, 0x0001) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
# unset ext voltage
uav("OCSB")
dly(100e-6)
# disable VDDA_LDO power overwrite
wac('EXT_MODE',0xc00d) # to PMU page
wac("OCP_MASK", 0x000a)
wr("PMU_TEST_OWR",0x0000) # bit3 acc_vdda_owr_en 0, bit 1, owr_vdda_acc_en 0
rac("PMU_TEST_OWR",0x0000,0x000a)
wr("OCP_MASK", 0x0000)
rac("OCP_MASK", 0xffff)
# switch on ACC
wac('EXT_MODE', 0xc000)
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
dly(3e-3)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_17_disable_vdda_external_bypass_econ_R1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T02_17_disable_vdda_external_bypass_econ_R1_PAT_id");
rdi.dc("T02_17_disable_vdda_external_bypass_econ_R1DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("OCSB").relay(TA::ppmuRly_offALL)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T02_17_disable_vdda_external_bypass_econ_R1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_17_disable_vdda_external_bypass_econ_R1", T02_17_disable_vdda_external_bypass_econ_R1);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# Part1- VDDA bypass
# - swith off ACC
# - switch off VDDA_LDO
# - disable pullup on ANAIO 2
# - set ext. voltage
# - enable bypass--connect VDDA to OCSB Pad
# Part2- VDDDC bypass
# - set INT1 to 1.15V
# - enable bypass--connect VDDDC to INT1 pad
# - switch off VDD_DC LDO
# - set INT1 to 1.1V
# - enable ACC in HPM
#############################################################################################################
cmt('Version info: $Revision: 4 $ $Author: hmf1rt $ $Date: 2024/04/23 14:41:28 GMT $')
# Part1,vdda bypass
# switch off ACC
wac('EXT_MODE', 0xc000) # Switch to USR page
wac('ACC_CONF',0x024c) # Disable ACC
# power down VDDA_LDO (to prevent power request in other test items)
wac('EXT_MODE', 0xc00d) # Switch to PMU page
wac("OCP_MASK", 0x000a)
wr("PMU_TEST_OWR",0x0008) # bit3 acc_vdda_owr_en 1, bit 1, owr_vdda_acc_en 0
rac("PMU_TEST_OWR",0x0008,0x000a)
wr("OCP_MASK", 0x0000)
rac("OCP_MASK", 0xffff)
# set vdda ext. voltage
sav("OCSB", 1.5, v_range=2.0, i_comp=10e-3)
dly(100e-6)
# enable bypass
wac("EXT_MODE", 0xc00d) # change to page D, ANA/PMU page ++
wac("OCP_MASK", 0x0001) # Set masking register
wr("ANA_TEST_PWR",0x0001) # vdda_ext_en to 1, VDDA to OCSB
rac("ANA_TEST_PWR", 0x0001, 0x0001) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
# Part2, vddd_dc bypass
sav('INT1', 1.15, v_range=2.0, i_comp=10e-3)
dly(100e-6)
wac('OCP_MASK', 0x0042) # Set masking register
wr('ANA_TEST_PWR', 0x0002) # Bypass VDDD_DC to external pad
rac('ANA_TEST_PWR', 0x0002,0x0042) # Bypass VDDD_DC to external pad
dly(10e-6)
wr('ANA_TEST_PWR', 0x0042) # Disable VDDD_DC LDO; keep external pad bypass
rac('ANA_TEST_PWR', 0x0042,0x0042) # Disable VDDD_DC LDO; keep external pad bypass
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Set vddd_dc ext. voltage
sav('INT1', 1.1, v_range=2.0, i_comp=10e-3)
dly(100e-6)
# switch on ACC
wac('EXT_MODE', 0xc000) # Switch to USR page
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM
dly(400e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_18_enable_vddd_dc_and_vdda_external_bypass_V4: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
double d_V_INT1, d_V_OCSB;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
d_V_INT1 = Primary.getLevelSpec().getSpecValue("INT1");
d_V_OCSB = Primary.getLevelSpec().getSpecValue("OCSB");
RDI_BEGIN(mode);
rdi.burstId("T02_18_enable_vddd_dc_and_vdda_external_bypass_V4_PAT_id");
rdi.dc("T02_18_enable_vddd_dc_and_vdda_external_bypass_V4DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("OCSB").vForce(d_V_OCSB)
.insertSub(i_comment_line0[1]).pin("INT1").vForce(1.15)
.insertSub(i_comment_line0[2]).pin("INT1").vForce(d_V_INT1)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T02_18_enable_vddd_dc_and_vdda_external_bypass_V4_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_18_enable_vddd_dc_and_vdda_external_bypass_V4", T02_18_enable_vddd_dc_and_vdda_external_bypass_V4);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 3 $ $Author: hmf1rt $ $Date: 2024/04/23 14:41:28 GMT $')
# switch off ACC
wac('EXT_MODE', 0xc000) # Switch to USR page
wac('ACC_CONF',0x024c) # Disable ACC
# Part1 disable vdddc bypass
sav('INT1', 1.15) # Increase supply voltage to 1.15V on pad INT1
dly(100e-6)
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x0042) # Set masking register
wr('ANA_TEST_PWR', 0x0002) # Enable VDDD_DC_LDO; keep external bypass
rac('ANA_TEST_PWR', 0x0002, 0x0042) # Check register setting
dly(100e-6)
wr('ANA_TEST_PWR', 0x0000) # Disable VDDD_DC extnernal bypass
rac('ANA_TEST_PWR', 0x0000, 0x0042) # Check register setting
dly(100e-6)
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
uav('INT1') # Unset voltage stimuli on INT1
dly(100e-6)
# Part2 disable vdda bypass
# disable bypass VDDA_LDO with ext voltage
wac("OCP_MASK", 0x0001) # Set masking register
wr("ANA_TEST_PWR",0x0000) # vdda_ext_en to 0, disconnect VDDA to OCSB
rac("ANA_TEST_PWR", 0x0000, 0x0001) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
# unset ext voltage
uav("OCSB")
dly(100e-6)
# disable VDDA_LDO power overwrite
wac('EXT_MODE',0xc00d) # to PMU page
wac("OCP_MASK", 0x000a)
wr("PMU_TEST_OWR",0x0000) # bit3 acc_vdda_owr_en 0, bit 1, owr_vdda_acc_en 0
rac("PMU_TEST_OWR",0x0000,0x000a)
wr("OCP_MASK", 0x0000)
rac("OCP_MASK", 0xffff)
# switch on ACC
wac('EXT_MODE', 0xc000)
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
dly(400e-6)
|
/*****************************************************
* T02_19_disable_vddd_dc_and_vdda_external_bypass_V3, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_19_disable_vddd_dc_and_vdda_external_bypass_V3: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T02_19_disable_vddd_dc_and_vdda_external_bypass}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 3 > <Author: hmf1rt > <Date: 2024/04/23 14:41:28 GMT >}
valid comment[ 1] @ avcline 394: {sav('INT1', 1.15, 2, 0.01, False, False)}
valid comment[ 2] @ avcline 1384: {uav('INT1', False)}
valid comment[ 3] @ avcline 1970: {uav('OCSB', False)}
valid comment[ 4] @ avcline 3140: {Test End: T02_19_disable_vddd_dc_and_vdda_external_bypass}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][1]).pin("INT1").vForce(1.15 V)//{sav('INT1', 1.15, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][2]).pin("INT1").relay(TA::ppmuRly_offALL)////{uav('INT1', False)}
.insertSub(i_comment_line[0][3]).pin("OCSB").relay(TA::ppmuRly_offALL)////{uav('OCSB', False)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
//Add calc code if necessary
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_19_disable_vddd_dc_and_vdda_external_bypass_V3", T02_19_disable_vddd_dc_and_vdda_external_bypass_V3);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: supply VDDG externally via IO_OCSB_LOWRES pin
#############################################################################################################
from test_sub_functions import *
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 19:45:00 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_ADDR', 0x0003) # Enable ATM loop back test
wac('TM_PIN', 0x1100) # Set ATM ANAIO 4,3 => highZ
wac('TM_CONF', 0x0000) # Disable TBs
wac('EXT_MODE', 0xc00d) # Switch to PMU page
wac("PMU_TEST_OWR",0x0030) # enable VDDT (required for Gyro BG and Bias)
wac("EXT_MODE", 0xc00d) # change to page D, ANA/PMU page ++
wac("OCP_MASK", 0x0010) # Set masking register
wr("ANA_TEST_PWR",0x0010) # vddg_ext_en to 1: connecting VDDG to IO_OCSB_LOWRES
rac("ANA_TEST_PWR", 0x0010, 0x0010) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
dly(100e-6)
sav('OCSB', 1.5) # Set voltage on OCSB
|
/*****************************************************
* T02_21_enable_vddg_external_bypass_V2, description file version Notfound, avc file version Notfound
* First Editor : jsh5sgh
* Code generated with autocoding tool V2.9.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_21_enable_vddg_external_bypass_V2: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T02_21_enable_vddg_external_bypass}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 19:45:00 GMT >}
valid comment[ 1] @ avcline 1940: {sav('OCSB', 1.5, 2, 0.01, False, False)}
valid comment[ 1] @ avcline 1940: {Test End: T02_21_enable_vddg_external_bypass}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][1]).pin("OCSB").vForce(1.5 V)//{sav('OCSB', 1.5, 2, 0.01, False, False)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
//Add calc code if necessary
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T02_21_enable_vddg_external_bypass_V2", T02_21_enable_vddg_external_bypass_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# Description: SCAN test
# Preamble: T03_10_scan_entry, T03_11_scan_reset
#############################################################################################################
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
cmt('Execute the scan pattern file: T03_01_scan_test_V1.stil')
cmt('The pattern timing is included in this file')
cmt('This test item is a functional fail if any of the compare vectors in the scan patttern fails')
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T03_01_scan_test: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
static double v_VDDIO, v_VDD;
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
// v_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
// v_VDD = Primary.getLevelSpec().getSpecValue("VDD");
//
// rdi.dc().pin("VDD").vForce(v_VDD).iRange(40 mA).execute();
// rdi.hwRelay().pin("INT1,INT2").setOff("ALL").execute();
rdi.dc().pin("VDDIO").vForce(1.8).iRange(40 mA).execute();
// rdi.dc().pin("SCX").vForce(1.8).iRange(40 mA).execute();
// Primary.getLevelSpec().change("VDDIO", 1.8);
RDI_BEGIN(mode);
rdi.burstId("T03_01_scan_test_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
// rdi.emapLocation(TA::RAM);
// RDI_BEGIN();
// rdi.emap("a").label(s_label_name).pin("SDO")
// .failCount()
// // .pfMap()
//// .FFC()
// .failCyc()
// .execute();
// .pin("pC").failCyc(5).execute();
// rdi.emap("b").label(s_label_name).pin("MISO").FFC().execute();
// RDI_END();
rdi.util().pin("K4,K8").setOff().execute();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T03_01_scan_test_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
// int fcount=rdi.id("a").getFailCount("SDO");
//
// ARRAY_LL FailCycles = rdi.id("a").getFailCyc("SDO");
//
// cout << "FailCycles=" << FailCycles <<endl;
// FuncPrint("Fail Count SDO", fcount);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T03_01_scan_test", T03_01_scan_test);
|
generate cpp file from given test case python file
|
#############################################################################################################
# Description: IDDQ test
# Preamble: T03_10_scan_entry, T03_11_scan_reset
#############################################################################################################
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
cmt('Execute the IDDQ pattern file: T03_01_scan_test_V1.stil')
cmt('After each IDDQ vector n in range 01..29, indicated in the pattern file with "iddq capture", execute following sequence')
# ---sequence start---
dly(10e-6)
gac('IDDQ_VDD_LV_n', 'VDD', i_range=100e-6)
gac('IDDQ_VDDIO_LV_n', 'VDDIO', i_range=10e-6)
gac('IDDQ_VDDD_DC_LV_n', 'INT1', i_range=1e-3)
cmt('Apply a high voltage supply INT1=1.68V for 1 ms')
sav('INT1', 1.68, v_range=4.0, i_comp=1e-3) # TODO: stress voltage TBD
dly(1e-3)
sav('INT1', 1.1, v_range=4.0, i_comp=1e-3) # Change supply voltage here in char flow
dly(10e-6)
gac('IDDQ_VDD_HV_n', 'VDD', i_range=100e-6)
gac('IDDQ_VDDIO_HV_n', 'VDDIO', i_range=10e-6)
gac('IDDQ_VDDD_DC_HV_n', 'INT1', i_range=1e-3)
cmt('Calculate DELTA_IDDQ_VDD_n = IDDQ_VDD_HV_n - IDDQ_VDD_LV_n')
cmt('Calculate DELTA_IDDQ_VDDIO_n = IDDQ_VDDIO_HV_n - IDDQ_VDDIO_LV_n')
cmt('Calculate DELTA_IDDQ_VDDD_DC_n = IDDQ_VDDD_DC_HV_n - IDDQ_VDDD_DC_LV_n')
# ---sequence end---
cmt('This test item is a functional fail if any of the compare vectors in the IDDQ patttern fails')
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T03_02_IDDQ_test: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double IDDQ_VDD_LV[xNSitES][30];
static double IDDQ_VDDIO_LV[xNSitES][30];
static double IDDQ_VDDD_DC_LV[xNSitES][30];
static double IDDQ_VDD_HV[xNSitES][30];
static double IDDQ_VDDIO_HV[xNSitES][30];
static double IDDQ_VDDD_DC_HV[xNSitES][30];
static double DELTA_IDDQ_VDD[xNSitES][30];
static double DELTA_IDDQ_VDDIO[xNSitES][30];
static double DELTA_IDDQ_VDDD_DC[xNSitES][30];
const int NUM_STEPS = 30;
RDI_INIT();
double d_V_VDD, d_V_VDDIO, d_V_INT1;
const double stress_voltage = 1.68; // V
ON_FIRST_INVOCATION_BEGIN();
GET_TESTSUITE_NAME(test_name);
d_V_VDD = Primary.getLevelSpec().getSpecValue("VDD");
d_V_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
d_V_INT1 = Primary.getLevelSpec().getSpecValue("INT1");
i_comment_line0 = search_comment_line(s_label_name,"IddqTestPoint"); //key word: "IddqTestPoint"
print_key_comment(s_label_name, i_comment_line0, printFlag);
rdi.enableOre(oreFlag);
rdi.oreFile("./ORE_Files/rdi_ore_T03_02_IDDQ_TEST.xml");
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.dc("t0302_iddq_test_ID").label(s_label_name).cont();
for(int i=0;i<NUM_STEPS ;i++)
{
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("VDD").vForce(d_V_VDD).iRange(10 uA).iMeas().measWait(1 ms).valueMode(TA::BADC).average(64).cont();//IDDQ_VDD_LV
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("VDDIO").vForce(d_V_VDDIO).iRange(10 uA).iMeas().measWait(1 ms).valueMode(TA::BADC).average(256).postWait(1.2 ms).cont();//IDDQ_VDDIO_LV
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("INT1").vForce(d_V_INT1).iRange(0.1 mA).iMeas().measWait(1 ms).valueMode(TA::BADC).average(64).cont();//IDDQ_VDDD_DC_LV
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("INT1").vForce(stress_voltage).iRange(40 mA).postWait(1 ms).cont();
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("INT1").vForce(d_V_INT1).iRange(40 mA).postWait(10 us).cont();//1.3V.cont();
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("VDD").vForce(d_V_VDD).iRange(10 uA).iMeas().measWait(1 ms).valueMode(TA::BADC).average(64).cont();//IDDQ_VDD_HV
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("VDDIO").vForce(d_V_VDDIO).iRange(10 uA).iMeas().measWait(1 ms).valueMode(TA::BADC).average(256).postWait(1.2 ms).cont();//IDDQ_VDDIO_HV
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("INT1").vForce(d_V_INT1).iMeas().iRange(0.1 mA).measWait(1 ms).valueMode(TA::BADC).average(64).cont();//IDDQ_VDDD_DC_HV
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("VDD").vForce(d_V_VDD V).iRange(40 mA).cont();
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("VDDIO").vForce(d_V_VDDIO V).iRange(40 mA).cont();
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("INT1").vForce(d_V_INT1 V).iRange(40 mA).cont();
}
rdi.dc("t0302_iddq_test_ID").execute();
// rdi.hwRelay().pin("INT1").setOff("ALL").execute();
RDI_END();
rdi.util().pin("K4").setOff().execute();
// rdi.dc().pin("VDD").vForce(3 V).execute();
ON_FIRST_INVOCATION_END();
int Func_result = /*rdi.id("burst_id").getBurstPassFail() */ rdi.id("burst_id1").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
ARRAY_D JSUB_results_VDD;
JSUB_results_VDD = rdi.id("t0302_iddq_test_ID").getMultiValue("VDD");
ARRAY_D JSUB_results_VDDIO;
JSUB_results_VDDIO = rdi.id("t0302_iddq_test_ID").getMultiValue("VDDIO");
ARRAY_D JSUB_results_INT1;
JSUB_results_INT1 = rdi.id("t0302_iddq_test_ID").getMultiValue("INT1");
for (int i=0; i<NUM_STEPS; i++)
{
IDDQ_VDD_LV[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_VDD[i*2];
IDDQ_VDD_HV[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_VDD[i*2+1];
IDDQ_VDDIO_LV[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_VDDIO[i*2];
IDDQ_VDDIO_HV[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_VDDIO[i*2+1];
IDDQ_VDDD_DC_LV[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_INT1[i*2];
IDDQ_VDDD_DC_HV[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_INT1[i*2+1];
DELTA_IDDQ_VDD[CURRENT_SITE_NUMBER()-1][i] = IDDQ_VDD_LV[CURRENT_SITE_NUMBER()-1][i] - IDDQ_VDD_HV[CURRENT_SITE_NUMBER()-1][i];
DELTA_IDDQ_VDDIO[CURRENT_SITE_NUMBER()-1][i] = IDDQ_VDDIO_LV[CURRENT_SITE_NUMBER()-1][i] - IDDQ_VDDIO_HV[CURRENT_SITE_NUMBER()-1][i];
DELTA_IDDQ_VDDD_DC[CURRENT_SITE_NUMBER()-1][i] = IDDQ_VDDD_DC_LV[CURRENT_SITE_NUMBER()-1][i] - IDDQ_VDDD_DC_HV[CURRENT_SITE_NUMBER()-1][i];
}
for (int i=0; i<NUM_STEPS; i++)
{
FuncPrint("IDDQ_VDD_LV_"+rdi.itos(i), IDDQ_VDD_LV[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("IDDQ_VDD_HV_"+rdi.itos(i), IDDQ_VDD_HV[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i=0; i<NUM_STEPS; i++)
{
FuncPrint("IDDQ_VDDIO_LV_"+rdi.itos(i+1), IDDQ_VDDIO_LV[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("IDDQ_VDDIO_HV_"+rdi.itos(i+1), IDDQ_VDDIO_HV[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i=0; i<NUM_STEPS; i++)
{
FuncPrint("IDDQ_VDDD_DC_LV_"+rdi.itos(i+1), IDDQ_VDDD_DC_LV[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("IDDQ_VDDD_DC_HV_"+rdi.itos(i+1), IDDQ_VDDD_DC_HV[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i=0; i<NUM_STEPS; i++)
{
FuncPrint("DELTA_IDDQ_VDD_"+rdi.itos(i+1), DELTA_IDDQ_VDD[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("DELTA_IDDQ_VDDIO_"+rdi.itos(i+1), DELTA_IDDQ_VDDIO[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("DELTA_IDDQ_VDDD_DC_"+rdi.itos(i+1), DELTA_IDDQ_VDDD_DC[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i=0; i<10; i++)
{
TestLog("IDDQ_VDD_LV_0"+rdi.itos(i), IDDQ_VDD_LV[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDDIO_LV_0"+rdi.itos(i), IDDQ_VDDIO_LV[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDDD_DC_LV_0"+rdi.itos(i), IDDQ_VDDD_DC_LV[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDD_DELTA_0"+rdi.itos(i), DELTA_IDDQ_VDD[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDDIO_DELTA_0"+rdi.itos(i), DELTA_IDDQ_VDDIO[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDDD_DC_DELTA_0"+rdi.itos(i), DELTA_IDDQ_VDDD_DC[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i=10; i<NUM_STEPS; i++)
{
TestLog("IDDQ_VDD_LV_"+rdi.itos(i), IDDQ_VDD_LV[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDDIO_LV_"+rdi.itos(i), IDDQ_VDDIO_LV[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDDD_DC_LV_"+rdi.itos(i), IDDQ_VDDD_DC_LV[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDD_DELTA_"+rdi.itos(i), DELTA_IDDQ_VDD[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDDIO_DELTA_"+rdi.itos(i), DELTA_IDDQ_VDDIO[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDDD_DC_DELTA_"+rdi.itos(i), DELTA_IDDQ_VDDD_DC[CURRENT_SITE_NUMBER()-1][i]);
}
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T03_02_IDDQ_test", T03_02_IDDQ_test);
|
generate cpp file from given test case python file
|
#############################################################################################################
# Description: transitional SCAN test
# Preamble: T03_10_scan_entry, T03_11_scan_reset
#############################################################################################################
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
cmt('Execute the scan pattern file: T03_03_scan_test_transitional_V1.stil')
cmt('The pattern timing is included in this file')
cmt('This test item is a functional fail if any of the compare vectors in the scan patttern fails')
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: JSH5SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T03_03_scan_test_transitional: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
// Auto_Code_Variable_define
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T03_03_scan_test_transitional_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
// Auto_Code_Execution_Part
ON_FIRST_INVOCATION_END();
// Auto_Code_Retrieve_Data
int Func_result = rdi.id("T03_03_scan_test_transitional_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
// Auto_Code_Judge_and_log
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T03_03_scan_test_transitional", T03_03_scan_test_transitional);
|
generate cpp file from given test case python file
|
from test_sub_functions import *
CRC = get_rom_crc()
cmt('Version info: $Revision: 3 $ $Author: rio1rt $ $Date: 2024/06/11 10:33:47 GMT $')
# Setup prerequisites for MBIST
wac('EXT_MODE',0xc00d) # Switch to PMU register page
wcb('force_ds_pwr_on', 0x1) # Force DS power
wac('EXT_MODE',0xc000) # Switch to USR register page
wcb('mem_conf_ram', 0x0) # Assign 4kB RAM to MCU
# Configure interrupt
wac('IO_INT_CTRL', 0x0005) # Enable INT1 as output and active high
wac('INT_MAP_MCU', 0x4000) # Map command execution interrupt to INT1
wac('INT_CONF', 0x0001) # Use latched interrupt mode for INT1
# Execute MBIST FW
wr('MCU_GP_1', 0x007b) # MCU boot ASIC test; select MBIST
wr('MCU_GP_STATUS', 0x0001) # Sync GP register
wcb('mcu_mode', 0x3) # Power on MCU
dly(2e-3)
rac('MCU_GP_0', 0x0003, 0x0003) # Check MBIST is running
ras('MCU_GP_0_WITHINMBIST','MCU_GP_0') # log real value
calc('FEAT_ENG_STATE_WITHINMBIST', 'MCU_GP_0_WITHINMBIST', '&', '0x0003')
log('FEAT_ENG_STATE_WITHINMBIST') # Expect 0x3
dly(120e-3)
# Check MBIST result
bc('INT1', 1) # Check FW ready interrupt
cmt('TOI, please log INT1 status as STATUS_INT1, set function to fail if not logic one')
log('STATUS_INT1') # Expect 0x1
rac('MCU_GP_0', 0x017B) # Check MBIST test result
ras('MCU_GP_0_AFTERMBIST','MCU_GP_0') # log real value, expect 0x017B
log('MCU_GP_0_AFTERMBIST')
cmt(f'Reading ROM-CRC: 0x{CRC:04X}')
rac('MCU_SW_STATUS3', CRC) # Check ROM CRC
ras('ROM_CRC_AFTERMBIST','MCU_SW_STATUS3') # log real value
log('ROM_CRC_AFTERMBIST') # Expect CRC
# Clean-up
wcb('mcu_mode', 0x0) # Power off MCU
wac('IO_INT_CTRL', 0x0000) # Reset IO configuration
wac('INT_MAP_MCU', 0x0000) # Reset interrupt mapping
wac('INT_CONF', 0x0000) # Reset interrupt configuration
wcb('mem_conf_ram', 0x2) # Set RAM config to default
wac('EXT_MODE',0xc00d) # Switch to PMU register page
wcb('force_ds_pwr_on', 0x0) # Disable DS power force
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T03_05_MBIST_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
static int MCU_GP_0_WITHINMBIST[xNSitES];
static int MCU_GP_0_AFTERMBIST[xNSitES];
static int ROM_CRC_AFTERMBIST[xNSitES];
static int FEAT_ENG_STATE_WITHINMBIST[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T03_05_MBIST_V2_PAT_id");
rdi.digCap("T03_05_MBIST_V2_Digcap_id").label(s_label_name).pin("SDO").capMode(TA::SER).samples(16*3).bitPerWord(16).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
ARRAY_I Vec=rdi.id("T03_05_MBIST_V2_Digcap_id").getVector();
MCU_GP_0_WITHINMBIST[CURRENT_SITE_NUMBER()-1] = reverse_ras_result(Vec[0]);
MCU_GP_0_AFTERMBIST[CURRENT_SITE_NUMBER()-1] = reverse_ras_result(Vec[1]);
ROM_CRC_AFTERMBIST[CURRENT_SITE_NUMBER()-1] = reverse_ras_result(Vec[2]);
FEAT_ENG_STATE_WITHINMBIST[CURRENT_SITE_NUMBER()-1] = MCU_GP_0_WITHINMBIST[CURRENT_SITE_NUMBER()-1] & 0x0003;
int Func_result = rdi.id("T03_05_MBIST_V2_PAT_id").getBurstPassFail();
int STATUS_INT1 = rdi.getBurstPassFail("INT1");
FuncPrint("Func_result", Func_result);
FuncPrint("FEAT_ENG_STATE_WITHINMBIST", FEAT_ENG_STATE_WITHINMBIST[CURRENT_SITE_NUMBER()-1]);
FuncPrint("MCU_GP_0_AFTERMBIST", MCU_GP_0_AFTERMBIST[CURRENT_SITE_NUMBER()-1]);
FuncPrint("ROM_CRC_AFTERMBIST", ROM_CRC_AFTERMBIST[CURRENT_SITE_NUMBER()-1]);
FuncPrint("STATUS_INT1", STATUS_INT1);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("FEAT_ENG_STATE_WITHINMBIST", FEAT_ENG_STATE_WITHINMBIST[CURRENT_SITE_NUMBER()-1]);
TestLog("MCU_GP_0_AFTERMBIST", MCU_GP_0_AFTERMBIST[CURRENT_SITE_NUMBER()-1]);
TestLog("ROM_CRC_AFTERMBIST", ROM_CRC_AFTERMBIST[CURRENT_SITE_NUMBER()-1]);
TestLog("STATUS_INT1", STATUS_INT1);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T03_05_MBIST_V2", T03_05_MBIST_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 21:19:50 GMT $')
wac('EXT_MODE', 0xc000) # Switch to USR register page
rac('REV_ID', 0x0000, 0x00ff) # Read and check revision id
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T03_08_check_revision_ID_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T03_08_check_revision_ID_V2_PAT_id");
// for (int i=0; i<100; i++)
// {
rdi.func().label(s_label_name).execute();
// }
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T03_08_check_revision_ID_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T03_08_check_revision_ID_V2", T03_08_check_revision_ID_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:22:20 GMT $')
wr('CMD', 0xBB3A) # 1st command for enabling the extended mode
wr('CMD', 0x2C62) # 2nd command for enabling the extended mode
wr('CMD', 0xA576) # 1st command for enabling the super privilege mode
wr('CMD', 0x34D6) # 2nd command for enabling the super privilege mode
dly(10e-6)
dly(100e-6)
sav('INT1', 1.1) # Apply a voltage of 1.1V on pad INT1 (VDDD_DC/DS)
sav('OCSB', 1.1) # Apply a voltage of 1.1V on pad OCSB (VDDD_MEM)
dly(100e-6)
bw('ASCX', 0) # Pre-condition inputs: scan_clk = Low
bw('ASDX', 0) # Pre-condition inputs: scan_in2 = Low
wr('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('ANA_TEST_PWR', 0x0002) # Bypass VDDD_DC to external pad
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wr('TEST_SCAN', 0x0006) # Enable ext supply for scan; set compressed mode
dly(100e-6)
wr('TEST_SCAN', 0x000e) # Enter compressed scan mode
dly(10e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T03_09_scan_entry_compressed_V1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double v_INT1, v_OCSB;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
v_INT1 = Primary.getLevelSpec().getSpecValue("INT1");
v_OCSB = Primary.getLevelSpec().getSpecValue("OCSB");
rdi.util().pin("K4").setOn().execute();
RDI_BEGIN(mode);
rdi.burstId("T03_09_scan_entry_compressed_V1_PAT_id");
rdi.dc("T03_09_scan_entry_compressed_V1DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("INT1").vForce(v_INT1)
.insertSub(i_comment_line0[0]).pin("OCSB").vForce(v_OCSB)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T03_09_scan_entry_compressed_V1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T03_09_scan_entry_compressed_V1", T03_09_scan_entry_compressed_V1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 4 $ $Author: hmf1rt $ $Date: 2024/06/12 11:58:00 GMT $')
wr('CMD', 0xBB3A) # 1st command for enabling the extended mode
wr('CMD', 0x2C62) # 2nd command for enabling the extended mode
wr('CMD', 0xA576) # 1st command for enabling the super privilege mode
wr('CMD', 0x34D6) # 2nd command for enabling the super privilege mode
dly(10e-6)
dly(100e-6)
sav('INT1', 1.1) # Apply a voltage of 1.1V on pad INT1 (VDDD_DC/DS)
sav('OCSB', 1.1) # Apply a voltage of 1.1V on pad OCSB (VDDD_MEM)
dly(100e-6)
bw('ASCX', 0) # Pre-condition inputs: scan_clk = Low
bw('ASDX', 0) # Pre-condition inputs: scan_in2 = Low
wr('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('ANA_TEST_PWR', 0x0002) # Bypass VDDD_DC to external pad
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wr('TEST_SCAN', 0x0002) # Enable ext supply for scan mode
dly(100e-6)
wr('TEST_SCAN', 0x000a) # Enter scan mode
dly(10e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T03_10_scan_entry_V3: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double v_INT1, v_OCSB;
// Auto_Code_Variable_define
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
v_INT1 = Primary.getLevelSpec().getSpecValue("INT1");
v_OCSB = Primary.getLevelSpec().getSpecValue("OCSB");
// rdi.util().pin("K4").setOn().execute();
// rdi.util().pin("K8").setOn().execute();
// rdi.dc().pin("INT1_AVI64").vForce(0.8).iClamp(2 mA).iMeasRange(10 mA).execute();
RDI_BEGIN(mode);
rdi.burstId("T03_10_scan_entry_V3_PAT_id");
rdi.dc("T03_10_scan_entry_V3DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("INT1").vForce(v_INT1)
.insertSub(i_comment_line0[0]).pin("OCSB").vForce(v_OCSB)
.execute();
RDI_END();
// Auto_Code_Execution_Part
ON_FIRST_INVOCATION_END();
// Auto_Code_Retrieve_Data
int Func_result = rdi.id("T03_10_scan_entry_V3_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
// Auto_Code_Judge_and_log
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T03_10_scan_entry_V3", T03_10_scan_entry_V3);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
# Execute scan reset sequence
dly(5e-6)
bw('CSB', 0)
bw('SCX', 1)
dly(5e-6)
bw('SCX', 0)
dly(5e-6)
bw('SCX', 1)
dly(5e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T03_11_scan_reset_V1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T03_11_scan_reset_V1_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T03_11_scan_reset_V1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T03_11_scan_reset_V1", T03_11_scan_reset_V1);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: SPI4 communication at max speed 10 MHz
# - Entry condition STC_ACC
# - Execute single write, single read, burst write, burst read
#############################################################################################################
cmt('Version info: $Revision: 4 $ $Author: luz3sgh $ $Date: 2024/05/06 05:53:19 GMT $')
cmt('Use signal and timing conventions compliant with SPI4 mode 0')
cmt('Use the following parameters: F_sck = 10.0 MHz')
wac('EXT_MODE', 0xc007) # Switch to MCU register page
# single write single read
wr('MCU_SW_STATUS0', 0x55aa) # Write signature to register
rac('MCU_SW_STATUS0', 0x55aa) # Read signature from register
wr('MCU_SW_STATUS1', 0x81cc) # Write signature to register
rac('MCU_SW_STATUS1', 0x81cc) # Read signature from register
wr('MCU_SW_STATUS2', 0xf00f) # Write signature to register
rac('MCU_SW_STATUS2', 0xf00f) # Read signature from register
wr('MCU_SW_STATUS3', 0xaa55) # Write signature to register
rac('MCU_SW_STATUS3', 0xaa55) # Read signature from register
# burst read
brac('MCU_SW_STATUS0', [0x55aa,0x81cc,0xf00f,0xaa55]) # Burst read and compare
# burst write burst read
bwr('MCU_SW_STATUS0', [0xaa55,0xcc81,0x0ff0,0x55aa]) # Burst write
brac('MCU_SW_STATUS0', [0xaa55,0xcc81,0x0ff0,0x55aa]) # Burst read and compare
# register reset
wac('MCU_SW_STATUS0', 0x0000) # Reset register value
wac('MCU_SW_STATUS1', 0x0000) # Reset register value
wac('MCU_SW_STATUS2', 0x0000) # Reset register value
wac('MCU_SW_STATUS3', 0x0000) # Reset register value
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T04_01_SPI4_test_V4: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T04_01_SPI4_test_V4_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T04_01_SPI4_test_V4_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T04_01_SPI4_test_V4", T04_01_SPI4_test_V4);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# - SPI4 mode 0, 10.0MHz
#############################################################################################################
cmt('Version info: $Revision: 2 $ $Author: luz3sgh $ $Date: 2024/05/06 05:53:19 GMT $')
def register_set():
wac('MCU_SW_STATUS0', 0xaa55) # Write signature to register
wac('MCU_SW_STATUS1', 0x82cc) # Write signature to register
wac('MCU_SW_STATUS2', 0xd0ee) # Write signature to register
wac('MCU_SW_STATUS3', 0xf00f) # Write signature to register
brac('MCU_SW_STATUS0', [0xaa55, 0x82cc, 0xd0ee, 0xf00f]) # Burst read access and compare
wac('MCU_SW_STATUS0', 0x0f01) # Write signature to register
wac('MCU_SW_STATUS1', 0x1800) # Write signature to register
brac('MCU_SW_STATUS0', [0x0f01, 0x1800])# Burst read access and compare
def register_reset():
wac('MCU_SW_STATUS0', 0x0000) # Write reset to register
wac('MCU_SW_STATUS1', 0x0000) # Write reset to register
wac('MCU_SW_STATUS2', 0x0000) # Write reset to register
wac('MCU_SW_STATUS3', 0x0000) # Write reset to register
wac('EXT_MODE', 0xc007) # Switch to MCU register page
# -- CSB Setup Time SPI4 mode 0 --
# Test CSB Setup Time in SPI4 mode 0 (CPOL = 0 and CPHA = 0)
# Use signal and timing conventions compliant with SPI4 mode 0 according test spec
# Execute the 2 sequences "register_reset" + "register_set"
# If pattern pass: In "register_set" shift all falling edges of CSB signal to the right
# relative to SCX rising edges in 1 ns steps and repeat "register_reset"+"register_set"
# If pattern fail: Record the time T_SPI4_SETUP_CSB_M0 at which "register_set" passed
# for the last time
cmt('Start sequence "register_reset"')
register_reset()
cmt('Stop sequence "register_reset"')
cmt('Start sequence "register_set"')
register_set()
cmt('Stop sequence "register_set"')
dly(100e-6)
# -- CSB Hold Time SPI4 mode 0 --
# Test CSB Hold Time in SPI4 mode 0 (CPOL = 0 and CPHA = 0)
# Use signal and timing conventions compliant with SPI4 mode 0 according test spec
# Execute the 2 sequences "register_reset" + "register_set"
# If pattern pass: In "register_set" shift all rising edges of CSB signal to the left
# relative to SCX rising edges in 1 ns steps and repeat "register_reset"+"register_set"
# If pattern fail: Record the time T_SPI4_HOLD_CSB_M0 at which "register_set" passed
# for the last time
cmt('Start sequence "register_reset"')
register_reset()
cmt('Stop sequence "register_reset"')
cmt('Start sequence "register_set"')
register_set()
cmt('Stop sequence "register_set"')
dly(100e-6)
# -- SDX Setup Time SPI4 mode 0 --
# Test SDX Setup Time in SPI4 mode 0 (CPOL = 0 and CPHA = 0)
# Use signal and timing conventions compliant with SPI4 mode 0 according test spec
# Execute the 2 sequences "register_reset" + "register_set"
# If pattern pass: In "register_set" shift all edges of SDX signal to the right
# relative to SCX edges in 1 ns steps and repeat "register_reset"+"register_set"
# If pattern fail: Record the time T_SPI4_SETUP_SDX_M0 at which "register_set" passed
# for the last time
cmt('Start sequence "register_reset"')
register_reset()
cmt('Stop sequence "register_reset"')
cmt('Start sequence "register_set"')
register_set()
cmt('Stop sequence "register_set"')
dly(100e-6)
# -- SDX Hold Time SPI4 mode 0 --
# Test SDX Hold Time in SPI4 mode 0 (CPOL = 0 and CPHA = 0)
# Use signal and timing conventions compliant with SPI4 mode 0 according test spec
# Execute the 2 sequences "register_reset" + "register_set"
# If pattern pass: In "register_set" shift all edges of SDX signal to the left
# relative to SCX edges in 1 ns steps and repeat "register_reset"+"register_set"
# If pattern fail: Record the time T_SPI4_HOLD_SDX_M0 at which "register_set" passed
# for the last time
cmt('Start sequence "register_reset"')
register_reset()
cmt('Stop sequence "register_reset"')
cmt('Start sequence "register_set"')
register_set()
cmt('Stop sequence "register_set"')
dly(100e-6)
# -- SDO Delay Time SPI4 mode 0 --
# Test SDO Delay Time in SPI4 mode 0 (CPOL = 0 and CPHA = 0)
# Use signal and timing conventions compliant with SPI4 mode 0 according test spec
# Set default SDO strobe point in ATE
# Execute the sequence "register_set"
# If pattern pass: In "register_set" shift all SDO strobe points to the left
# relative to SCX falling edges in 1 ns steps and repeat "register_set"
# If pattern fail: Record the time T_SPI4_DELAY_SDO_M0 at which "register_set" passed
# for the last time
cmt('Start sequence "register_set"')
register_set()
cmt('Stop sequence "register_set"')
dly(100e-6)
# -- SCX Frequency SPI4 mode 0 --
# Test SCX frequency in SPI4 mode 0 (CPOL = 0 and CPHA = 0)
# Use signal and timing conventions compliant with SPI4 mode 0 according test spec
# Execute the 2 sequences "register_reset" + "register_set"
# If pattern pass: In "register_set" decrease T_LOW and T_HIGH for signal SCX and the
# timing of signal SDX and the strobe points related to signal SDO by 1.0 ns each and
# repeat "register_reset"+"register_set"
# If pattern fail: Record the frequency F_SPI4_SCX_M0 = 1/(T_LOW + T_HIGH)
# at which "register_set" passed for the last time
cmt('Start sequence "register_reset"')
register_reset()
cmt('Stop sequence "register_reset"')
cmt('Start sequence "register_set"')
register_set()
cmt('Stop sequence "register_set"')
dly(100e-6)
# clean-up
wac('MCU_SW_STATUS0', 0x0000) # Write reset to register
wac('MCU_SW_STATUS1', 0x0000) # Write reset to register
wac('MCU_SW_STATUS2', 0x0000) # Write reset to register
wac('MCU_SW_STATUS3', 0x0000) # Write reset to register
|
#include "testmethod.hpp"
//for test method API interfaces (any system include should be added above this line)
#include "mapi.hpp"
#include "../Common.hpp"
//for MTP test method API interfaces
using namespace std;
/**
* Test method class.
*
* For each testsuite using this test method, one object of this
* class is created.
*/
class T04_02_SPI4_Char_M0: public testmethod::TestMethod {
protected:
int mSPI_mode; //M0 - M3
int mSPI3_flag; //0 for SPI4, 1 for SPI3
int i_funcRes[xNSitES];
double d_T_SETUP_CSB_M0[xNSitES];
double d_T_HOLD_CSB_M0[xNSitES];
double d_T_SETUP_SDI_M0[xNSitES];
double d_T_HOLD_SDI_M0[xNSitES];
double d_T_DELAY_SDO_M0[xNSitES];
double d_F_SCK_M0[xNSitES];
// double d_T_LOW_SCX_M0[xNSitES];
// double d_T_HIGH_SCX_M0[xNSitES];
double d_T_SCK_M0[xNSitES];
string mMOSIpin;
string mMISOpin;
/**
*Initialize the parameter interface to the testflow.
*This method is called just once after a testsuite is created.
*/
virtual void initialize()
{
//Add your initialization code here
//Note: Test Method API should not be used in this method!
addParameter("SPI_mode",
"int",
&mSPI_mode,
testmethod::TM_PARAMETER_INPUT)
.setDefault("0");
addParameter("SPI3_flag",
"int",
&mSPI3_flag,
testmethod::TM_PARAMETER_INPUT)
.setDefault("0");
addParameter("MOSIpin",
"string",
&mMOSIpin,
testmethod::TM_PARAMETER_INPUT)
.setDefault("SDX");
addParameter("MISOpin",
"string",
&mMISOpin,
testmethod::TM_PARAMETER_INPUT)
.setDefault("SDO");
}
/**
*This test is invoked per site.
*/
virtual void run()
{
string pat_name[2][4] = {{"T04_02_SPI4_Char_M0", "", "", "T04_12_SPI4_Char_M3"},
{"T04_04_SPI3_Char_M0", "", "", "T04_14_SPI3_Char_M3"}};
const string s_Label_Init = pat_name[mSPI3_flag][mSPI_mode]+"_Init";
const string s_Label_Set = pat_name[mSPI3_flag][mSPI_mode]+"_Set";
const string s_Label_Reset = pat_name[mSPI3_flag][mSPI_mode]+"_Reset";
static int i_func_results[xNSitES][8];
// int i_func_results[xNSitES][8];
static double d_TransitionTime1[xNSitES], d_TransitionTime2[xNSitES], d_TransitionTime3[xNSitES], d_TransitionTime4[xNSitES], d_TransitionTime5[xNSitES], d_TransitionTime6[xNSitES], d_TransitionTime7[xNSitES];
// static double d_TransitionTime1[xNSitES], d_TransitionTime2[xNSitES], d_TransitionTime3[xNSitES], d_TransitionTime4[xNSitES], d_TransitionTime5[xNSitES];
SEARCH_FUNC_TASK TASK_spec1, TASK_spec2, TASK_spec3, TASK_spec4, TASK_spec5, TASK_spec6, TASK_spec7, TASK_spec8;
int i_PassFail;
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(d_T_SETUP_CSB_M0, -999.0, xNSitES);
Func_Init_Var(d_T_HOLD_CSB_M0, -999.0, xNSitES);
Func_Init_Var(d_T_SETUP_SDI_M0, -999.0, xNSitES);
Func_Init_Var(d_T_HOLD_SDI_M0, -999.0, xNSitES);
Func_Init_Var(d_T_DELAY_SDO_M0, -999.0, xNSitES);
Func_Init_Var(d_F_SCK_M0, -999.0, xNSitES);
// Func_Init_Var(d_T_LOW_SCX_M0, -999.0, xNSitES);
// Func_Init_Var(d_T_HIGH_SCX_M0, -999.0, xNSitES);
Func_Init_Var(d_T_SCK_M0, -999.0, xNSitES);
Func_Init_Var((int**)i_func_results, -999, xNSitES, 10);
Func_Init_Var(d_TransitionTime1, -999.0, xNSitES);
Func_Init_Var(d_TransitionTime2, -999.0, xNSitES);
Func_Init_Var(d_TransitionTime3, -999.0, xNSitES);
Func_Init_Var(d_TransitionTime4, -999.0, xNSitES);
Func_Init_Var(d_TransitionTime5, -999.0, xNSitES);
Func_Init_Var(d_TransitionTime6, -999.0, xNSitES);
Func_Init_Var(d_TransitionTime7, -999.0, xNSitES);
Primary.label(s_Label_Init);
FLUSH();
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_func_results[curSite][0] = GET_FUNCTIONAL_RESULT();
Func_Print(i_func_results[curSite][0], "i_func_results[0]");
FOR_EACH_SITE_END();
Primary.timing(TIMING_SPEC(44,1));
FLUSH(TM::APRM);
Primary.label(s_Label_Reset);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_func_results[curSite][1] = GET_FUNCTIONAL_RESULT();
Func_Print(i_func_results[curSite][1], "i_func_results[1]");
FOR_EACH_SITE_END();
//*************************CSB Setup Time SPI4 mode 0*************************
Primary.label(s_Label_Set);
FLUSH();
// TASK_spec1.pin("CSB").spec("delay1",TM::TIM).method(TM::Binary).start(0).stop(82).resolution(0.5);
TASK_spec1.pin("CSB").spec("delay1",TM::TIM).method(TM::Linear).start(0).stop(90).stepWidth(0.1);
TASK_spec1.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec1.getPassFail("CSB");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime1[curSite] = TASK_spec1.getPassValue("CSB");
d_T_SETUP_CSB_M0[curSite] = 50 - d_TransitionTime1[curSite]; //unit s
Func_Print(d_TransitionTime1[curSite], "Org TransitionTime1");
Func_Print(d_T_SETUP_CSB_M0[curSite], "d_T_SETUP_CSB_M0");
}
FOR_EACH_SITE_END();
//*************************CSB Hold Time SPI4 mode 0*************************
Primary.label(s_Label_Reset);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_func_results[curSite][2] = GET_FUNCTIONAL_RESULT();
Func_Print(i_func_results[curSite][2], "i_func_results[2]");
FOR_EACH_SITE_END();
Primary.label(s_Label_Set);
FLUSH();
// TASK_spec2.pin("CSB").spec("delay2",TM::TIM).method(TM::Binary).start(0).stop(-70).resolution(0.5);
TASK_spec2.pin("CSB").spec("delay2",TM::TIM).method(TM::Linear).start(0).stop(-90).stepWidth(0.1);
TASK_spec2.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec2.getPassFail("CSB");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime2[curSite] = TASK_spec2.getPassValue("CSB");
d_T_HOLD_CSB_M0[curSite] = ( 50 + d_TransitionTime2[curSite]) ; //unit s
Func_Print(d_TransitionTime2[curSite], "Org TransitionTime2");
Func_Print(d_T_HOLD_CSB_M0[curSite], "d_T_HOLD_CSB_M0");
}
FOR_EACH_SITE_END();
//*************************SDI Setup Time SPI4 mode 0*************************
Primary.label(s_Label_Reset);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_func_results[curSite][3] = GET_FUNCTIONAL_RESULT();
Func_Print(i_func_results[curSite][3], "i_func_results[3]");
FOR_EACH_SITE_END();
Primary.label(s_Label_Set);
FLUSH();
// TASK_spec3.pin(mMOSIpin).spec("delay3",TM::TIM).method(TM::Binary).start(0).stop(82).resolution(0.5);
TASK_spec3.pin(mMOSIpin).spec("delay3",TM::TIM).method(TM::Linear).start(0).stop(80).stepWidth(0.1);
TASK_spec3.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec3.getPassFail(mMOSIpin);
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime3[curSite] = TASK_spec3.getPassValue(mMOSIpin);
d_T_SETUP_SDI_M0[curSite] = ( 50 - d_TransitionTime3[curSite]) ; //unit s
Func_Print(d_TransitionTime3[curSite], "Org TransitionTime3");
Func_Print(d_T_SETUP_SDI_M0[curSite], "d_T_SETUP_SDI_M0");
}
FOR_EACH_SITE_END();
//*************************SDI Hold Time SPI4 mode 0*************************
Primary.label(s_Label_Reset);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_func_results[curSite][4] = GET_FUNCTIONAL_RESULT();
Func_Print(i_func_results[curSite][4], "i_func_results[4]");
FOR_EACH_SITE_END();
Primary.label(s_Label_Set);
FLUSH();
// TASK_spec4.pin(mMOSIpin).spec("delay3",TM::TIM).method(TM::Binary).start(0).stop(-82).resolution(0.5);
TASK_spec4.pin(mMOSIpin).spec("delay3",TM::TIM).method(TM::Linear).start(0).stop(-90).stepWidth(0.1);
TASK_spec4.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec4.getPassFail(mMOSIpin);
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime4[curSite] = TASK_spec4.getPassValue(mMOSIpin);
d_T_HOLD_SDI_M0[curSite] = ( 50 + d_TransitionTime4[curSite]) ; //unit s
Func_Print(d_TransitionTime4[curSite], "Org TransitionTime4");
Func_Print(d_T_HOLD_SDI_M0[curSite], "d_T_HOLD_SDI_M0");
}
FOR_EACH_SITE_END();
//*************************SDO Delay Time SPI4 mode 0*************************
Primary.label(s_Label_Reset);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_func_results[curSite][5] = GET_FUNCTIONAL_RESULT();
Func_Print(i_func_results[curSite][5], "i_func_results[5]");
FOR_EACH_SITE_END();
// Primary.label(s_Label_Set_Sdo_Dly);
Primary.label(s_Label_Set);
FLUSH();
// TASK_spec5.pin(mMISOpin).spec("delay5",TM::TIM).method(TM::Binary).start(0).stop(-82).resolution(0.5);
TASK_spec5.pin(mMISOpin).spec("delay5",TM::TIM).method(TM::Linear).start(-80).stop(20).stepWidth(0.1);
TASK_spec5.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec5.getPassFail(mMISOpin);
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime5[curSite] = TASK_spec5.getPassValue(mMISOpin);
d_T_DELAY_SDO_M0[curSite] = (0.8*100 + d_TransitionTime5[curSite]) ; //unit s
Func_Print(d_TransitionTime5[curSite], "Org TransitionTime5");
Func_Print(d_T_DELAY_SDO_M0[curSite], "d_T_DELAY_SDO_M0");
}
FOR_EACH_SITE_END();
//*************************T_HIGH_SCK_MIN SPI4 mode 0*************************
// Primary.label(s_Label_Reset);
// FUNCTIONAL_TEST();
// FOR_EACH_SITE_BEGIN();
// i_func_results[curSite][6] = GET_FUNCTIONAL_RESULT();
// Func_Print(i_func_results[curSite][6], "i_func_results[6]");
// FOR_EACH_SITE_END();
//
// Primary.label(s_Label_Set);
//// Primary.label("T_10_25_SPI4_Timing_Char_M0_register_set_t_high");
// FLUSH();
//// TASK_spec6.spec("per_ns",TM::TIM).method(TM::Binary).start(20).stop(82).resolution(1);
// TASK_spec6.pin("SCX").spec("delay6",TM::TIM).method(TM::Linear).start(1).stop(40).stepWidth(1);
// TASK_spec6.execute();
//
// FOR_EACH_SITE_BEGIN();
// i_PassFail = TASK_spec6.getPassFail("SCX");
// //if find the transition point, get value
// if(i_PassFail)
// {
//
// d_TransitionTime6[curSite] = TASK_spec6.getPassValue("SCX");
// d_T_HIGH_SCX_M0[curSite] = (41 - d_TransitionTime6[curSite]) ; //unit s
//
// Func_Print(d_TransitionTime6[curSite], "Org TransitionTime6");
// Func_Print(d_T_HIGH_SCX_M0[curSite], "d_T_HIGH_SCX_M0");
//
//
// }
// FOR_EACH_SITE_END();
//*************************T_LOW_SCK_MIN SPI4 mode 0*************************
// Primary.label(s_Label_Reset);
// FUNCTIONAL_TEST();
// FOR_EACH_SITE_BEGIN();
// i_func_results[curSite][7] = GET_FUNCTIONAL_RESULT();
// Func_Print(i_func_results[curSite][7], "i_func_results[7]");
// FOR_EACH_SITE_END();
//
// Primary.label(s_Label_Set);
//// Primary.label("T_10_25_SPI4_Timing_Char_M0_register_set_t_low");
// FLUSH();
//// TASK_spec6.spec("per_ns",TM::TIM).method(TM::Binary).start(20).stop(82).resolution(1);
// TASK_spec7.pin("SCX").spec("delay6",TM::TIM).method(TM::Linear).start(-1).stop(-40).stepWidth(1);
// TASK_spec7.execute();
//
// FOR_EACH_SITE_BEGIN();
// i_PassFail = TASK_spec7.getPassFail("SCX");
// //if find the transition point, get value
// if(i_PassFail)
// {
//
// d_TransitionTime7[curSite] = TASK_spec7.getPassValue("SCX");
// d_T_LOW_SCX_M0[curSite] = (41 + d_TransitionTime7[curSite]) ; //unit s
//
// Func_Print(d_TransitionTime7[curSite], "Org TransitionTime7");
// Func_Print(d_T_LOW_SCX_M0[curSite], "d_T_LOW_SCX_M0");
//
//
// }
// FOR_EACH_SITE_END();
//*************************SCK Frequency SPI4 mode 0*************************
Primary.label(s_Label_Reset);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_func_results[curSite][8] = GET_FUNCTIONAL_RESULT();
Func_Print(i_func_results[curSite][8], "i_func_results[8]");
FOR_EACH_SITE_END();
Primary.label(s_Label_Set);
Primary.timing(TIMING_SPEC(45,1));
FLUSH(TM::APRM);
// TASK_spec6.spec("per_ns",TM::TIM).method(TM::Binary).start(20).stop(82).resolution(1);
TASK_spec8.spec("f_scx",TM::TIM).method(TM::Linear).start(10).stop(90).stepWidth(1);
TASK_spec8.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec8.getPassFail();
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime7[curSite] = TASK_spec8.getPassValue();
d_F_SCK_M0[curSite] = d_TransitionTime7[curSite]*1e6; //Hz
// d_F_SCK_M0[curSite] = 1000000000/TASK_spec8.getPassValue();
// d_T_SCK_M0[curSite] = TASK_spec8.getPassValue();
Func_Print(d_TransitionTime7[curSite], "Org TransitionTime7");
Func_Print(d_F_SCK_M0[curSite], "d_F_SCK_M0");
// Func_Print(d_T_SCK_M0[curSite], "d_T_SCK_M0");
}
FOR_EACH_SITE_END();
FOR_EACH_SITE_BEGIN();
i_funcRes[curSite] = i_func_results[curSite][0] & i_func_results[curSite][1] & i_func_results[curSite][2] &
i_func_results[curSite][3] & i_func_results[curSite][4] & i_func_results[curSite][5] &
i_func_results[curSite][8];
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
string spi;
if (mSPI3_flag)
spi = "3";
else
spi = "4";
Func_Print(i_funcRes[curSite], "i_funcRes");
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
TestLog("T_SPI"+spi+"_SETUP_CSB_M"+rdi.itos(mSPI_mode), d_T_SETUP_CSB_M0[curSite]*1e-9);
TestLog("T_SPI"+spi+"_HOLD_CSB_M"+rdi.itos(mSPI_mode), d_T_HOLD_CSB_M0[curSite]*1e-9);
TestLog("T_SPI"+spi+"_SETUP_SDX_M"+rdi.itos(mSPI_mode), d_T_SETUP_SDI_M0[curSite]*1e-9);
TestLog("T_SPI"+spi+"_HOLD_SDX_M"+rdi.itos(mSPI_mode), d_T_HOLD_SDI_M0[curSite]*1e-9);
TestLog("T_SPI"+spi+"_DELAY_"+mMISOpin+"_M"+rdi.itos(mSPI_mode), d_T_DELAY_SDO_M0[curSite]*1e-9);
// TestLog("T_HIGH_SCX_SPI"+spi+"m0", d_T_HIGH_SCX_M0[curSite]*1e-9);
// TestLog("T_LOW_SCX_SPI"+spi+"m0", d_T_LOW_SCX_M0[curSite]*1e-9);
TestLog("F_SPI"+spi+"_SCX_M"+rdi.itos(mSPI_mode), d_F_SCK_M0[curSite]);
return;
}
/**
*This function will be invoked once the specified parameter's value is changed.
*@param parameterIdentifier
*/
virtual void postParameterChange(const string& parameterIdentifier)
{
//Add your code
//Note: Test Method API should not be used in this method!
return;
}
/**
*This function will be invoked once the Select Test Method Dialog is opened.
*/
virtual const string getComment() const
{
string comment = " please add your comment for this method.";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T04_02_SPI4_Char_M0", T04_02_SPI4_Char_M0);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: SPI3 communication at max speed 10 MHz
# - Entry condition STC_ACC
# - Execute single write, single read, burst write, burst read
#############################################################################################################
cmt('Version info: $Revision: 4 $ $Author: luz3sgh $ $Date: 2024/05/06 06:30:36 GMT $')
cmt('Use signal and timing conventions compliant with SPI3 mode 0')
cmt('Use the following parameters: F_sck = 10.0 MHz')
wac('EXT_MODE', 0xc007) # Switch to MCU register page
# single write single read
wr('MCU_SW_STATUS0', 0x55aa) # Write signature to register
rac('MCU_SW_STATUS0', 0x55aa) # Read signature from register
wr('MCU_SW_STATUS1', 0x81cc) # Write signature to register
rac('MCU_SW_STATUS1', 0x81cc) # Read signature from register
wr('MCU_SW_STATUS2', 0xf00f) # Write signature to register
rac('MCU_SW_STATUS2', 0xf00f) # Read signature from register
wr('MCU_SW_STATUS3', 0xaa55) # Write signature to register
rac('MCU_SW_STATUS3', 0xaa55) # Read signature from register
# burst read
brac('MCU_SW_STATUS0', [0x55aa,0x81cc,0xf00f,0xaa55]) # Burst read and compare
# burst write burst read
bwr('MCU_SW_STATUS0', [0xaa55,0xcc81,0x0ff0,0x55aa]) # Burst write
brac('MCU_SW_STATUS0', [0xaa55,0xcc81,0x0ff0,0x55aa]) # Burst read and compare
# register reset
wac('MCU_SW_STATUS0', 0x0000) # Reset register value
wac('MCU_SW_STATUS1', 0x0000) # Reset register value
wac('MCU_SW_STATUS2', 0x0000) # Reset register value
wac('MCU_SW_STATUS3', 0x0000) # Reset register value
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T04_03_SPI3_test_V4: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T04_03_SPI3_test_V4_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T04_03_SPI3_test_V4_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T04_03_SPI3_test_V4", T04_03_SPI3_test_V4);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: I2C delay trimming
# steps: 1.Enable I2C delay test
# 2.Measure SCX rise, fall delay refernce, within loop
# 3.Measure SCX rise, fall delay, within loop
# 4.Find best index
#############################################################################################################
cmt('Version info: $Revision: 3 $ $Author: luz3sgh $ $Date: 2024/05/20 08:10:02 GMT $')
wac('EXT_MODE',0xc00f) # Test PAGE
wac('TEST_I2C_DEL',0x0001) # Enable bit for I2C delay test
wac('EXT_MODE',0xc009) # IO PAGE
for n in range(8):
cmt(f'Set I2C delay trimming to {n} in given range')
wac('OCP_MASK', 0xe000) # Mask setting for IO_PAD_TRM<15:13>
wr('IO_PAD_TRM', n*2**13) # Set I2C delay trimming
rac('IO_PAD_TRM', n*2**13, 0xe000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00f) # Switch to TST register page
# Reference measurement SCX RISE
wr('DTB3', 0x002c) # scl_dl_topad on both ASDX & OOSDO
dly(2e-6)
bw('CSB', 0)
bw('SCX', 0)
dly(2e-6)
bw('SCX', 1)
cmt('Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF')
cmt('Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF')
dly(1e-6)
cmt(f'Calc T_DLY_RISE_REF_{n} = T_RISE_ASDX_REF - T_RISE_OSDO_REF')
# Reference measurement SCX FALL
dly(2e-6)
bw('SCX', 0)
cmt('Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF')
cmt('Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF')
dly(1e-6)
cmt(f'Calc T_DLY_FALL_REF_{n} = T_FALL_ASDX_REF - T_FALL_OSDO_REF')
bw('CSB', 1)
dly(2e-6)
# Delay measurement SCX RISE
wr('DTB3', 0x0027) # sck_dl_frompad@ASDX, sck_dl_topad@OSDO
dly(2e-6)
bw('CSB', 0)
bw('SCX', 0)
dly(2e-6)
bw('SCX', 1)
cmt('Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS')
cmt('Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS')
dly(1e-6)
cmt(f'Calc T_DLY_RISE_MEAS_{n} = T_RISE_ASDX_MEAS - T_RISE_OSDO_MEAS')
log(f'T_DLY_RISE_MEAS_{n}')
# Delay measurement SCX FALL
dly(2e-6)
bw('SCX', 0)
cmt('Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS')
cmt('Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS')
dly(1e-6)
cmt(f'Calc T_DLY_FALL_MEAS_{n} = T_FALL_ASDX_MEAS - T_FALL_OSDO_MEAS')
log(f'T_DLY_FALL_MEAS_{n}')
bw('CSB', 1)
dly(2e-6)
wac('DTB3', 0x0000) # Disable DTB3X
cmt(f'Caculate T_DLY_RISE_{n} = T_DLY_RISE_MEAS_{n} - T_DLY_RISE_REF_{n}')
cmt(f'Caculate T_DLY_FALL_{n} = T_DLY_FALL_MEAS_{n} - T_DLY_FALL_REF_{n}')
wac('EXT_MODE', 0xc009) # !!!Back to IO page for next loop
cmt('Select index n = N_OPT_I2C with T_DLY_RISE_N_OPT_I2C <= target value')
cmt('and with min. difference of T_DLY_RISE_N_OPT_I2C to target value')
calc('N_OPT_I2C',2) # Warning, placeholder !! Only for simulation
log('T_DLY_RISE_N_OPT_I2C')
log('N_OPT_I2C')
calc('N_IO_PAD_TRM_WR','N_OPT_I2C','<<',13)
wac('OCP_MASK', 0xe000) # Mask setting for IO_PAD_TRM<15:13>
wri('IO_PAD_TRM', 'N_IO_PAD_TRM_WR')
ras('N_IO_PAD_TRM_RD','IO_PAD_TRM')
calc('N_OPT_I2C_RD','N_IO_PAD_TRM_RD','>>',13)
cmt('The test item is a functional fail if (N_OPT_I2C_RD != N_OPT_I2C')
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Clean
wac('EXT_MODE',0xc00f) # Test PAGE
wac('TEST_I2C_DEL',0x0000)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T04_06_i2c_delay_trimming_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
INT split_pat_flag;
GET_USER_FLAG("split_pat_flag", &split_pat_flag);
vector<string> s_splited_pat_name;
const int split_count = 2; // Alarm:: split_count need manual confirm.
s_splited_pat_name.resize(split_count);
vector<int> i_comment_line[split_count];
static int N_IO_PAD_TRM_RD[xNSitES], N_OPT_I2C[xNSitES], N_IO_PAD_TRM_WR[xNSitES], N_OPT_I2C_RD[xNSitES];
// Auto_Code_Variable_define
ARRAY_LL N_IO_PAD_TRM_WR_rtv;
const int Wri_Bit_Length = 33;
const int Wri_Bit_Position = 31;
double main_port_period, ASDX_port_period, OSDO_port_period;
const int Cap_Cyc_Main_Port = 6;
const int Cap_Cyc_Offset = 0;
static double T_RISE_OSDO_REF[xNSitES][8], T_RISE_ASDX_REF[xNSitES][8], T_FALL_OSDO_REF[xNSitES][8], T_FALL_ASDX_REF[xNSitES][8];
static double T_RISE_OSDO_MEAS[xNSitES][8], T_RISE_ASDX_MEAS[xNSitES][8], T_FALL_OSDO_MEAS[xNSitES][8], T_FALL_ASDX_MEAS[xNSitES][8];
static double T_DLY_RISE_REF[xNSitES][8], T_DLY_FALL_REF[xNSitES][8], T_DLY_RISE_MEAS[xNSitES][8], T_DLY_FALL_MEAS[xNSitES][8];
static double T_DLY_RISE[xNSitES][8], T_DLY_FALL[xNSitES][8];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
rdi.enableOre(oreFlag);
rdi.oreFile("./ORE_Files/rdi_ore_T04_06_I2C_DELAY_TRIMMING.xml");
GET_TESTSUITE_NAME(test_name);
N_IO_PAD_TRM_WR_rtv.resize(xNSitES);
if (split_pat_flag)
{
split_pattern(s_label_name,"wri",split_pat_flag,s_splited_pat_name);
}
else
{
for (int i = 0; i<split_count; i++)
{
s_splited_pat_name[i] = s_label_name + "_part" + rdi.itos(i);
i_comment_line[i] = search_comment_line(s_splited_pat_name[i]);
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
// Set the period carefully, main port period must be integer multiple of the capture port.
main_port_period = Primary.getSpecification().getSpecValue("per_ns@Non_OSDO_ASDX_Port");
ASDX_port_period = Primary.getSpecification().getSpecValue("per_ns@ASDX_Port");
OSDO_port_period = Primary.getSpecification().getSpecValue("per_ns@OSDO_Port");
FuncPrint("main_port_period", main_port_period);
FuncPrint("ASDX_port_period", ASDX_port_period);
FuncPrint("OSDO_port_period", OSDO_port_period);
int Port_factor_ASDX = int(main_port_period / ASDX_port_period);
int Port_factor_OSDO = int(main_port_period / OSDO_port_period);
FuncPrint("Port_factor_ASDX", Port_factor_ASDX);
FuncPrint("Port_factor_OSDO", Port_factor_OSDO);
// key comment[0]is || TCMT 1478," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
// key comment[1]is || TCMT 1518," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
// key comment[2]is || TCMT 1693," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[3]is || TCMT 1733," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[4]is || TCMT 3060," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
// key comment[5]is || TCMT 3100," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
// key comment[6]is || TCMT 3275," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[7]is || TCMT 3315," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[8]is || TCMT 4642," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
// key comment[9]is || TCMT 4682," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
// key comment[10]is || TCMT 4857," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[11]is || TCMT 4897," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[12]is || TCMT 6224," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
// key comment[13]is || TCMT 6264," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
// key comment[14]is || TCMT 6439," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[15]is || TCMT 6479," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[16]is || TCMT 7806," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
// key comment[17]is || TCMT 7846," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
// key comment[18]is || TCMT 8021," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[19]is || TCMT 8061," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[20]is || TCMT 9388," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
// key comment[21]is || TCMT 9428," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
// key comment[22]is || TCMT 9603," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[23]is || TCMT 9643," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[24]is || TCMT 10970," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
// key comment[25]is || TCMT 11010," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
// key comment[26]is || TCMT 11185," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[27]is || TCMT 11225," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[28]is || TCMT 12552," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
// key comment[29]is || TCMT 12592," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
// key comment[30]is || TCMT 12767," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[31]is || TCMT 12807," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
rdi.dc().pin("VDDIO").vForce(1.8 V).execute();
Primary.getLevelSpec().change("VDDIO",1.8);
FLUSH(TM::APRM);
RDI_BEGIN(mode);
rdi.burstId("T04_06_i2c_delay_trimming_V2_PAT_id0");
rdi.port("Non_OSDO_ASDX_Port").func().label(s_splited_pat_name[0]).execute();
rdi.port("ASDX_Port").waitCycle((i_comment_line[0][0]+Cap_Cyc_Offset)*Port_factor_ASDX);
for (int i = 0; i<32; i++)
{
rdi.port("ASDX_Port").digCap("Result_ASDX"+rdi.itos(i)).pin("ASDX").samples(8*Port_factor_ASDX*Cap_Cyc_Main_Port).bitPerWord(1).execute();
if (i!=31)
{
rdi.port("ASDX_Port").waitCycle((i_comment_line[0][i+1]-i_comment_line[0][i]-Cap_Cyc_Main_Port)*Port_factor_ASDX);
}
}
rdi.port("OSDO_Port").waitCycle((i_comment_line[0][0]+Cap_Cyc_Offset)*Port_factor_OSDO);
for (int i = 0; i<32; i++)
{
rdi.port("OSDO_Port").digCap("Result_OSDO"+rdi.itos(i)).pin("OSDO").samples(8*Port_factor_OSDO*Cap_Cyc_Main_Port).bitPerWord(1).execute();
if (i!=31)
{
rdi.port("OSDO_Port").waitCycle((i_comment_line[0][i+1]-i_comment_line[0][i]-Cap_Cyc_Main_Port)*Port_factor_OSDO);
}
}
RDI_END();
FOR_EACH_SITE_BEGIN();
ARRAY_I vec_RISE_REF, vec_FALL_REF, vec_RISE_MEAS, vec_FALL_MEAS;
for (int i = 0; i<8; i++)
{
vec_RISE_REF = rdi.id("Result_ASDX"+rdi.itos(i*4+0)).getVector("ASDX");
vec_FALL_REF = rdi.id("Result_ASDX"+rdi.itos(i*4+1)).getVector("ASDX");
vec_RISE_MEAS = rdi.id("Result_ASDX"+rdi.itos(i*4+2)).getVector("ASDX");
vec_FALL_MEAS = rdi.id("Result_ASDX"+rdi.itos(i*4+3)).getVector("ASDX");
T_RISE_ASDX_REF[CURRENT_SITE_NUMBER()-1][i] = 1.00 * Find_first_Switch_point_index(vec_RISE_REF,0.5,"Rise",0,8*Port_factor_ASDX*Cap_Cyc_Main_Port-1) * ASDX_port_period / 8;
T_FALL_ASDX_REF[CURRENT_SITE_NUMBER()-1][i] = 1.00 * Find_first_Switch_point_index(vec_FALL_REF,0.5,"Fall",0,8*Port_factor_ASDX*Cap_Cyc_Main_Port-1) * ASDX_port_period / 8;
T_RISE_ASDX_MEAS[CURRENT_SITE_NUMBER()-1][i] = 1.00 * Find_first_Switch_point_index(vec_RISE_MEAS,0.5,"Rise",0,8*Port_factor_ASDX*Cap_Cyc_Main_Port-1) * ASDX_port_period / 8;
T_FALL_ASDX_MEAS[CURRENT_SITE_NUMBER()-1][i] = 1.00 * Find_first_Switch_point_index(vec_FALL_MEAS,0.5,"Fall",0,8*Port_factor_ASDX*Cap_Cyc_Main_Port-1) * ASDX_port_period / 8;
if(printFlag)
{
cout << "PIN ASDX, Trim index = " << rdi.itos(i) << "||vec_RISE_REF=" << vec_RISE_REF << endl;
cout << "PIN ASDX, Trim index = " << rdi.itos(i) << "||vec_FALL_REF=" << vec_FALL_REF << endl;
cout << "PIN ASDX, Trim index = " << rdi.itos(i) << "||vec_RISE_MEAS=" << vec_RISE_MEAS << endl;
cout << "PIN ASDX, Trim index = " << rdi.itos(i) << "||vec_FALL_MEAS=" << vec_FALL_MEAS << endl;
}
vec_RISE_REF = rdi.id("Result_OSDO"+rdi.itos(i*4+0)).getVector("OSDO");
vec_FALL_REF = rdi.id("Result_OSDO"+rdi.itos(i*4+1)).getVector("OSDO");
vec_RISE_MEAS = rdi.id("Result_OSDO"+rdi.itos(i*4+2)).getVector("OSDO");
vec_FALL_MEAS = rdi.id("Result_OSDO"+rdi.itos(i*4+3)).getVector("OSDO");
T_RISE_OSDO_REF[CURRENT_SITE_NUMBER()-1][i] = 1.00 * Find_first_Switch_point_index(vec_RISE_REF,0.5,"Rise",0,8*Port_factor_OSDO*Cap_Cyc_Main_Port-1) * OSDO_port_period / 8;
T_FALL_OSDO_REF[CURRENT_SITE_NUMBER()-1][i] = 1.00 * Find_first_Switch_point_index(vec_FALL_REF,0.5,"Fall",0,8*Port_factor_OSDO*Cap_Cyc_Main_Port-1) * OSDO_port_period / 8;
T_RISE_OSDO_MEAS[CURRENT_SITE_NUMBER()-1][i] = 1.00 * Find_first_Switch_point_index(vec_RISE_MEAS,0.5,"Rise",0,8*Port_factor_OSDO*Cap_Cyc_Main_Port-1) * OSDO_port_period / 8;
T_FALL_OSDO_MEAS[CURRENT_SITE_NUMBER()-1][i] = 1.00 * Find_first_Switch_point_index(vec_FALL_MEAS,0.5,"Fall",0,8*Port_factor_OSDO*Cap_Cyc_Main_Port-1) * OSDO_port_period / 8;
if(printFlag)
{
cout << "PIN OSDO, Trim index = " << rdi.itos(i) << "||vec_RISE_REF=" << vec_RISE_REF << endl;
cout << "PIN OSDO, Trim index = " << rdi.itos(i) << "||vec_FALL_REF=" << vec_FALL_REF << endl;
cout << "PIN OSDO, Trim index = " << rdi.itos(i) << "||vec_RISE_MEAS=" << vec_RISE_MEAS << endl;
cout << "PIN OSDO, Trim index = " << rdi.itos(i) << "||vec_FALL_MEAS=" << vec_FALL_MEAS << endl;
}
}
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_RISE_ASDX_REF"+rdi.itos(i), T_RISE_ASDX_REF[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_FALL_ASDX_REF"+rdi.itos(i), T_FALL_ASDX_REF[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_RISE_ASDX_MEAS"+rdi.itos(i), T_RISE_ASDX_MEAS[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_FALL_ASDX_MEAS"+rdi.itos(i), T_FALL_ASDX_MEAS[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_RISE_OSDO_REF"+rdi.itos(i), T_RISE_OSDO_REF[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_FALL_OSDO_REF"+rdi.itos(i), T_FALL_OSDO_REF[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_RISE_OSDO_MEAS"+rdi.itos(i), T_RISE_OSDO_MEAS[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_FALL_OSDO_MEAS"+rdi.itos(i), T_FALL_OSDO_MEAS[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++)
{
T_DLY_RISE_REF[CURRENT_SITE_NUMBER()-1][i] = T_RISE_ASDX_REF[CURRENT_SITE_NUMBER()-1][i] - T_RISE_OSDO_REF[CURRENT_SITE_NUMBER()-1][i];
T_DLY_FALL_REF[CURRENT_SITE_NUMBER()-1][i] = T_FALL_ASDX_REF[CURRENT_SITE_NUMBER()-1][i] - T_FALL_OSDO_REF[CURRENT_SITE_NUMBER()-1][i];
T_DLY_RISE_MEAS[CURRENT_SITE_NUMBER()-1][i] = T_RISE_ASDX_MEAS[CURRENT_SITE_NUMBER()-1][i] - T_RISE_OSDO_MEAS[CURRENT_SITE_NUMBER()-1][i];
T_DLY_FALL_MEAS[CURRENT_SITE_NUMBER()-1][i] = T_FALL_ASDX_MEAS[CURRENT_SITE_NUMBER()-1][i] - T_FALL_OSDO_MEAS[CURRENT_SITE_NUMBER()-1][i];
T_DLY_RISE[CURRENT_SITE_NUMBER()-1][i] = T_DLY_RISE_MEAS[CURRENT_SITE_NUMBER()-1][i] - T_DLY_RISE_REF[CURRENT_SITE_NUMBER()-1][i];
T_DLY_FALL[CURRENT_SITE_NUMBER()-1][i] = T_DLY_FALL_MEAS[CURRENT_SITE_NUMBER()-1][i] - T_DLY_FALL_REF[CURRENT_SITE_NUMBER()-1][i];
}
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_DLY_RISE_REF"+rdi.itos(i), T_DLY_RISE_REF[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_DLY_FALL_REF"+rdi.itos(i), T_DLY_FALL_REF[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_DLY_RISE_MEAS"+rdi.itos(i), T_DLY_RISE_MEAS[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_DLY_FALL_MEAS"+rdi.itos(i), T_DLY_FALL_MEAS[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_DLY_RISE"+rdi.itos(i), T_DLY_RISE[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_DLY_FALL"+rdi.itos(i), T_DLY_FALL[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
N_OPT_I2C[CURRENT_SITE_NUMBER()-1] = i_Func_Optimal_Trim_Val(T_DLY_RISE[CURRENT_SITE_NUMBER()-1], Target_T0406, 8, "smaller");
N_IO_PAD_TRM_WR[CURRENT_SITE_NUMBER()-1] = N_OPT_I2C[CURRENT_SITE_NUMBER()-1] << 13;
FuncPrint("N_OPT_I2C", N_OPT_I2C[CURRENT_SITE_NUMBER()-1]);
FuncPrint("N_IO_PAD_TRM_WR", N_IO_PAD_TRM_WR[CURRENT_SITE_NUMBER()-1]);
N_IO_PAD_TRM_WR_rtv[CURRENT_SITE_NUMBER()-1] = extend_Pmode_Herschel(N_IO_PAD_TRM_WR[CURRENT_SITE_NUMBER()-1], 2);
FuncPrint("N_IO_PAD_TRM_WR_rtv", N_IO_PAD_TRM_WR_rtv[CURRENT_SITE_NUMBER()-1]);
// N_OPT_I2C_RD[CURRENT_SITE_NUMBER()-1] = N_IO_PAD_TRM_RD[CURRENT_SITE_NUMBER()-1] >> 13;
// cmt('Select index n = N_OPT_I2C with T_DLY_RISE_N_OPT_I2C <= target value')
// cmt('and with min. difference of T_DLY_RISE_N_OPT_I2C to target value')
// calc('N_OPT_I2C',2) # Warning, placeholder !! Only for simulation
// calc('N_IO_PAD_TRM_WR','N_OPT_I2C','<<',13)
// wac('OCP_MASK', 0xe000) # Mask setting for IO_PAD_TRM<15:13>
// wri('IO_PAD_TRM', 'N_IO_PAD_TRM_WR')
// ras('N_IO_PAD_TRM_RD','IO_PAD_TRM')
// calc('N_OPT_I2C_RD','N_IO_PAD_TRM_RD','>>',13)
// cmt('The test item is a functional fail if (N_OPT_I2C_RD != N_OPT_I2C')
FOR_EACH_SITE_END();
// double try_array1[5] = {5, 3.5, 0.5, 1.5, 2.49};
// cout << "i_Func_Optimal_Pos_Trim_Val=" << i_Func_Optimal_Pos_Trim_Val(try_array1, 2, 5) << "||||" << try_array1[i_Func_Optimal_Pos_Trim_Val(try_array1, 2, 5)] << endl;
// cout << "i_Func_Optimal_Neg_Trim_Val=" << i_Func_Optimal_Neg_Trim_Val(try_array1, 2, 5) << "||||" << try_array1[i_Func_Optimal_Neg_Trim_Val(try_array1, 2, 5)] << endl;
// cout << "i_Func_Optimal_Trim_Val=" << i_Func_Optimal_Trim_Val(try_array1, 2, 5) << "||||" << try_array1[i_Func_Optimal_Trim_Val(try_array1, 2, 5)] << endl;
rdi.runTimeVal("N_IO_PAD_TRM_WR_rtv", N_IO_PAD_TRM_WR_rtv);
TIMING_SPEC spi_std(1, 1);
Primary.timing(spi_std);
Primary.timing(1);
RDI_BEGIN(mode);
rdi.burstId("T04_06_i2c_delay_trimming_V2_PAT_id1");
rdi.digCap("T04_06_i2c_delay_trimming_V2_Digcap_id").vecVarOnly().pin("SDO").capMode(TA::SER).samples(16*1).bitPerWord(16).execute();
rdi.smartVec().label(s_splited_pat_name[1]).pin("SDX").writeData("N_IO_PAD_TRM_WR_rtv", Wri_Bit_Length, Wri_Bit_Position).execute();
RDI_END();
rdi.dc().pin("VDDIO").vForce(3 V).execute();
Primary.getLevelSpec().change("VDDIO",3);
FLUSH(TM::APRM);
}
ON_FIRST_INVOCATION_END();
ARRAY_I Vec=rdi.id("T04_06_i2c_delay_trimming_V2_Digcap_id").getVector();
N_IO_PAD_TRM_RD[CURRENT_SITE_NUMBER()-1] = reverse_ras_result(Vec[0]);
FuncPrint("N_IO_PAD_TRM_RD", N_IO_PAD_TRM_RD[CURRENT_SITE_NUMBER()-1]);
int Func_result0 = rdi.id("T04_06_i2c_delay_trimming_V2_PAT_id0").getBurstPassFail();
int Func_result1 = rdi.id("T04_06_i2c_delay_trimming_V2_PAT_id1").getBurstPassFail();
FuncPrint("Func_result0", Func_result0);
FuncPrint("Func_result1", Func_result1);
int Func_result = 1 * Func_result0 * Func_result1;
if ((N_IO_PAD_TRM_RD[CURRENT_SITE_NUMBER()-1] >> 13 ) != N_OPT_I2C[CURRENT_SITE_NUMBER()-1]) Func_result=99;
FuncPrint("Func_result", Func_result);
for (int i = 0; i<8; i++) TestLog("T_DLY_RISE_MEAS_"+rdi.itos(i), T_DLY_RISE[CURRENT_SITE_NUMBER()-1][i]*1e-9);
for (int i = 0; i<8; i++) TestLog("T_DLY_FALL_MEAS_"+rdi.itos(i), T_DLY_FALL[CURRENT_SITE_NUMBER()-1][i]*1e-9);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("N_OPT_I2C", N_OPT_I2C[CURRENT_SITE_NUMBER()-1]);
TestLog("T_DLY_RISE_N_OPT_I2C", T_DLY_RISE[CURRENT_SITE_NUMBER()-1][N_OPT_I2C[CURRENT_SITE_NUMBER()-1]]*1e-9);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T04_06_i2c_delay_trimming_V2", T04_06_i2c_delay_trimming_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: I2C delay Char
# steps: 1.Enable I2C delay test
# 2.Measure SCX rise, fall delay refernce, within loop
# 3.Measure SCX rise, fall delay, within loop
#############################################################################################################
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 21:13:42 GMT $')
wac('EXT_MODE',0xc00f) # Test PAGE
wac('TEST_I2C_DEL',0x0001) # Enable bit for I2C delay test
wac('EXT_MODE',0xc009) # IO PAGE
ras('REG_VALUE', 'IO_PAD_TRM') # Store the current value
for n in range(8):
cmt(f'Set I2C delay trimming to {n} in given range')
wac('OCP_MASK', 0xe000) # Mask setting for IO_PAD_TRM<15:13>
wr('IO_PAD_TRM', n*2**13) # Set I2C delay trimming
rac('IO_PAD_TRM', n*2**13, 0xe000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00f) # Switch to TST register page
# Reference measurement SCX RISE
wr('DTB3', 0x002c) # scl_dl_topad on both ASDX & OOSDO
dly(2e-6)
bw('CSB', 0)
bw('SCX', 0)
dly(2e-6)
bw('SCX', 1)
cmt('Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF')
cmt('Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF')
dly(1e-6)
cmt(f'Calc T_DLY_RISE_REF_{n} = T_RISE_ASDX_REF - T_RISE_OSDO_REF')
# Reference measurement SCX FALL
dly(2e-6)
bw('SCX', 0)
cmt('Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF')
cmt('Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF')
dly(1e-6)
cmt(f'Calc T_DLY_FALL_REF_{n} = T_FALL_ASDX_REF - T_FALL_OSDO_REF')
bw('CSB', 1)
dly(2e-6)
# Delay measurement SCX RISE
wr('DTB3', 0x0027) # sck_dl_frompad@ASDX, sck_dl_topad@OSDO
dly(2e-6)
bw('CSB', 0)
bw('SCX', 0)
dly(2e-6)
bw('SCX', 1)
cmt('Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS')
cmt('Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS')
dly(1e-6)
cmt(f'Calc T_DLY_RISE_MEAS_{n} = T_RISE_ASDX_MEAS - T_RISE_OSDO_MEAS')
# Delay measurement SCX FALL
dly(2e-6)
bw('SCX', 0)
cmt('Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS')
cmt('Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS')
dly(1e-6)
cmt(f'Calc T_DLY_FALL_MEAS_{n} = T_FALL_ASDX_MEAS - T_FALL_OSDO_MEAS')
bw('CSB', 1)
dly(2e-6)
wac('DTB3', 0x0000) # Disable DTB3X
cmt(f'Caculate T_DLY_RISE_C_{n} = T_DLY_RISE_MEAS_{n} - T_DLY_RISE_REF_{n}')
cmt(f'Caculate T_DLY_FALL_C_{n} = T_DLY_FALL_MEAS_{n} - T_DLY_FALL_REF_{n}')
log(f'T_DLY_RISE_C_{n}')
log(f'T_DLY_FALL_C_{n}')
wac('EXT_MODE', 0xc009) # !!!Back to IO page for next loop
wac('OCP_MASK', 0xe000) # Mask setting for IO_PAD_TRM<15:13>
wri('IO_PAD_TRM', 'REG_VALUE')
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Clean
wac('EXT_MODE',0xc00f) # Test PAGE
wac('TEST_I2C_DEL',0x0000)
|
/*****************************************************
* T04_07_I2C_Delay_Char_V2, description file version Notfound, avc file version Notfound
* First Editor : jsh5sgh
* Code generated with autocoding tool V2.9.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T04_07_I2C_Delay_Char_V2: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 3;
vector<int> i_comment_line[i_split_count];
ARRAY_I aI_Captured_0;
static int i_REG_VALUE[xNSitES];
static int i_WRITE_BACK[xNSitES];
static int i_vec_Num1[32] = {0};
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES], i_funcRes2[xNSitES];
static int i_pat_p0_len = 689;
double main_port_period, ASDX_port_period, OSDO_port_period;
static double T_DLY_RISE_REF[xNSitES][8], T_DLY_FALL_REF[xNSitES][8], T_DLY_RISE_MEAS[xNSitES][8], T_DLY_FALL_MEAS[xNSitES][8];
static double T_DLY_RISE_C[xNSitES][8], T_DLY_FALL_C[xNSitES][8];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(i_REG_VALUE, 9, xNSitES);
Func_Init_Var(i_REG_VALUE, 9, xNSitES);
//!"CTmsg: cut pattern to 2 parts @ oriAVCvecline [13563]
//!"CTmsg: cut pattern to 2 parts @ binarypatline [13553]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
// Set the period carefully, main port period must be integer multiple of the capture port.
main_port_period = Primary.getSpecification().getSpecValue("per_ns@Non_OSDO_ASDX_Port");
ASDX_port_period = Primary.getSpecification().getSpecValue("per_ns@ASDX_Port");
OSDO_port_period = Primary.getSpecification().getSpecValue("per_ns@OSDO_Port");
FuncPrint("main_port_period", main_port_period);
FuncPrint("ASDX_port_period", ASDX_port_period);
FuncPrint("OSDO_port_period", OSDO_port_period);
int Port_factor_ASDX = int(main_port_period / ASDX_port_period);
int Port_factor_OSDO = int(main_port_period / OSDO_port_period);
FuncPrint("Port_factor_ASDX", Port_factor_ASDX);
FuncPrint("Port_factor_OSDO", Port_factor_OSDO);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T04_07_I2C_Delay_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 21:13:42 GMT >}
valid comment[ 1] @ avcline 586: {ras('REG_VALUE', 'IO_PAD_TRM')}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.port("Non_OSDO_ASDX_Port").digCap("digcapid_0").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(1*16).execute();
rdi.port("Non_OSDO_ASDX_Port").func().label(s_splited_pat_name[0]).execute();
rdi.port("ASDX_Port").waitCycle(i_pat_p0_len*Port_factor_ASDX);
rdi.port("OSDO_Port").waitCycle(i_pat_p0_len*Port_factor_ASDX);
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
aI_Captured_0[0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[0]);
i_REG_VALUE[curSite] = aI_Captured_0[0];
FuncPrint("REG_VALUE",i_REG_VALUE[curSite]);
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
===========Pattern T04_07_I2C_Delay_Char_V2_AVC2_PY2_part1=============
key comment[0]is || TCMT 0," cut_here search_here {cmt: Set I2C delay trimming to 0 in given range} {wac('OCP_MASK', 0xe000, 0)}"
key comment[1]is || TCMT 902," search_here {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
key comment[2]is || TCMT 915," search_here {cmt: Calc T_DLY_RISE_REF_0 = T_RISE_ASDX_REF - T_RISE_OSDO_REF} {dly(2e-06, 0)}"
key comment[3]is || TCMT 942," search_here {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
key comment[4]is || TCMT 956," search_here {cmt: Calc T_DLY_FALL_REF_0 = T_FALL_ASDX_REF - T_FALL_OSDO_REF} {bw('CSB', 1)} {dly(2e-06, 0)}"
key comment[5]is || TCMT 1117," search_here {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
key comment[6]is || TCMT 1130," search_here {cmt: Calc T_DLY_RISE_MEAS_0 = T_RISE_ASDX_MEAS - T_RISE_OSDO_MEAS} {dly(2e-06, 0)}"
key comment[7]is || TCMT 1157," search_here {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
key comment[8]is || TCMT 1171," search_here {cmt: Calc T_DLY_FALL_MEAS_0 = T_FALL_ASDX_MEAS - T_FALL_OSDO_MEAS} {bw('CSB', 1)} {dly(2e-06, 0)}"
key comment[9]is || TCMT 1390," search_here {cmt: Caculate T_DLY_RISE_C_0 = T_DLY_RISE_MEAS_0 - T_DLY_RISE_REF_0} {cmt: Caculate T_DLY_FALL_C_0 = T_DLY_FALL_MEAS_0 - T_DLY_FALL_REF_0} {log('T_DLY_RISE_C_0', '', '', 0, 0)}"
key comment[10]is || TCMT 1391," search_here {log('T_DLY_FALL_C_0', '', '', 0, 0)}"
key comment[11]is || TCMT 1584," search_here {cmt: Set I2C delay trimming to 1 in given range} {wac('OCP_MASK', 0xe000, 0)}"
key comment[12]is || TCMT 2486," search_here {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
key comment[13]is || TCMT 2499," search_here {cmt: Calc T_DLY_RISE_REF_1 = T_RISE_ASDX_REF - T_RISE_OSDO_REF} {dly(2e-06, 0)}"
key comment[14]is || TCMT 2526," search_here {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
key comment[15]is || TCMT 2540," search_here {cmt: Calc T_DLY_FALL_REF_1 = T_FALL_ASDX_REF - T_FALL_OSDO_REF} {bw('CSB', 1)} {dly(2e-06, 0)}"
key comment[16]is || TCMT 2701," search_here {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
key comment[17]is || TCMT 2714," search_here {cmt: Calc T_DLY_RISE_MEAS_1 = T_RISE_ASDX_MEAS - T_RISE_OSDO_MEAS} {dly(2e-06, 0)}"
key comment[18]is || TCMT 2741," search_here {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
key comment[19]is || TCMT 2755," search_here {cmt: Calc T_DLY_FALL_MEAS_1 = T_FALL_ASDX_MEAS - T_FALL_OSDO_MEAS} {bw('CSB', 1)} {dly(2e-06, 0)}"
key comment[20]is || TCMT 2974," search_here {cmt: Caculate T_DLY_RISE_C_1 = T_DLY_RISE_MEAS_1 - T_DLY_RISE_REF_1} {cmt: Caculate T_DLY_FALL_C_1 = T_DLY_FALL_MEAS_1 - T_DLY_FALL_REF_1} {log('T_DLY_RISE_C_1', '', '', 0, 0)}"
key comment[21]is || TCMT 2975," search_here {log('T_DLY_FALL_C_1', '', '', 0, 0)}"
key comment[22]is || TCMT 3168," search_here {cmt: Set I2C delay trimming to 2 in given range} {wac('OCP_MASK', 0xe000, 0)}"
key comment[23]is || TCMT 4070," search_here {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
key comment[24]is || TCMT 4083," search_here {cmt: Calc T_DLY_RISE_REF_2 = T_RISE_ASDX_REF - T_RISE_OSDO_REF} {dly(2e-06, 0)}"
key comment[25]is || TCMT 4110," search_here {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
key comment[26]is || TCMT 4124," search_here {cmt: Calc T_DLY_FALL_REF_2 = T_FALL_ASDX_REF - T_FALL_OSDO_REF} {bw('CSB', 1)} {dly(2e-06, 0)}"
key comment[27]is || TCMT 4285," search_here {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
key comment[28]is || TCMT 4298," search_here {cmt: Calc T_DLY_RISE_MEAS_2 = T_RISE_ASDX_MEAS - T_RISE_OSDO_MEAS} {dly(2e-06, 0)}"
key comment[29]is || TCMT 4325," search_here {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
key comment[30]is || TCMT 4339," search_here {cmt: Calc T_DLY_FALL_MEAS_2 = T_FALL_ASDX_MEAS - T_FALL_OSDO_MEAS} {bw('CSB', 1)} {dly(2e-06, 0)}"
key comment[31]is || TCMT 4558," search_here {cmt: Caculate T_DLY_RISE_C_2 = T_DLY_RISE_MEAS_2 - T_DLY_RISE_REF_2} {cmt: Caculate T_DLY_FALL_C_2 = T_DLY_FALL_MEAS_2 - T_DLY_FALL_REF_2} {log('T_DLY_RISE_C_2', '', '', 0, 0)}"
key comment[32]is || TCMT 4559," search_here {log('T_DLY_FALL_C_2', '', '', 0, 0)}"
key comment[33]is || TCMT 4752," search_here {cmt: Set I2C delay trimming to 3 in given range} {wac('OCP_MASK', 0xe000, 0)}"
key comment[34]is || TCMT 5654," search_here {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
key comment[35]is || TCMT 5667," search_here {cmt: Calc T_DLY_RISE_REF_3 = T_RISE_ASDX_REF - T_RISE_OSDO_REF} {dly(2e-06, 0)}"
key comment[36]is || TCMT 5694," search_here {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
key comment[37]is || TCMT 5708," search_here {cmt: Calc T_DLY_FALL_REF_3 = T_FALL_ASDX_REF - T_FALL_OSDO_REF} {bw('CSB', 1)} {dly(2e-06, 0)}"
key comment[38]is || TCMT 5869," search_here {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
key comment[39]is || TCMT 5882," search_here {cmt: Calc T_DLY_RISE_MEAS_3 = T_RISE_ASDX_MEAS - T_RISE_OSDO_MEAS} {dly(2e-06, 0)}"
key comment[40]is || TCMT 5909," search_here {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
key comment[41]is || TCMT 5923," search_here {cmt: Calc T_DLY_FALL_MEAS_3 = T_FALL_ASDX_MEAS - T_FALL_OSDO_MEAS} {bw('CSB', 1)} {dly(2e-06, 0)}"
key comment[42]is || TCMT 6142," search_here {cmt: Caculate T_DLY_RISE_C_3 = T_DLY_RISE_MEAS_3 - T_DLY_RISE_REF_3} {cmt: Caculate T_DLY_FALL_C_3 = T_DLY_FALL_MEAS_3 - T_DLY_FALL_REF_3} {log('T_DLY_RISE_C_3', '', '', 0, 0)}"
key comment[43]is || TCMT 6143," search_here {log('T_DLY_FALL_C_3', '', '', 0, 0)}"
key comment[44]is || TCMT 6336," search_here {cmt: Set I2C delay trimming to 4 in given range} {wac('OCP_MASK', 0xe000, 0)}"
key comment[45]is || TCMT 7238," search_here {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
key comment[46]is || TCMT 7251," search_here {cmt: Calc T_DLY_RISE_REF_4 = T_RISE_ASDX_REF - T_RISE_OSDO_REF} {dly(2e-06, 0)}"
key comment[47]is || TCMT 7278," search_here {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
key comment[48]is || TCMT 7292," search_here {cmt: Calc T_DLY_FALL_REF_4 = T_FALL_ASDX_REF - T_FALL_OSDO_REF} {bw('CSB', 1)} {dly(2e-06, 0)}"
key comment[49]is || TCMT 7453," search_here {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
key comment[50]is || TCMT 7466," search_here {cmt: Calc T_DLY_RISE_MEAS_4 = T_RISE_ASDX_MEAS - T_RISE_OSDO_MEAS} {dly(2e-06, 0)}"
key comment[51]is || TCMT 7493," search_here {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
key comment[52]is || TCMT 7507," search_here {cmt: Calc T_DLY_FALL_MEAS_4 = T_FALL_ASDX_MEAS - T_FALL_OSDO_MEAS} {bw('CSB', 1)} {dly(2e-06, 0)}"
key comment[53]is || TCMT 7726," search_here {cmt: Caculate T_DLY_RISE_C_4 = T_DLY_RISE_MEAS_4 - T_DLY_RISE_REF_4} {cmt: Caculate T_DLY_FALL_C_4 = T_DLY_FALL_MEAS_4 - T_DLY_FALL_REF_4} {log('T_DLY_RISE_C_4', '', '', 0, 0)}"
key comment[54]is || TCMT 7727," search_here {log('T_DLY_FALL_C_4', '', '', 0, 0)}"
key comment[55]is || TCMT 7920," search_here {cmt: Set I2C delay trimming to 5 in given range} {wac('OCP_MASK', 0xe000, 0)}"
key comment[56]is || TCMT 8822," search_here {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
key comment[57]is || TCMT 8835," search_here {cmt: Calc T_DLY_RISE_REF_5 = T_RISE_ASDX_REF - T_RISE_OSDO_REF} {dly(2e-06, 0)}"
key comment[58]is || TCMT 8862," search_here {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
key comment[59]is || TCMT 8876," search_here {cmt: Calc T_DLY_FALL_REF_5 = T_FALL_ASDX_REF - T_FALL_OSDO_REF} {bw('CSB', 1)} {dly(2e-06, 0)}"
key comment[60]is || TCMT 9037," search_here {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
key comment[61]is || TCMT 9050," search_here {cmt: Calc T_DLY_RISE_MEAS_5 = T_RISE_ASDX_MEAS - T_RISE_OSDO_MEAS} {dly(2e-06, 0)}"
key comment[62]is || TCMT 9077," search_here {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
key comment[63]is || TCMT 9091," search_here {cmt: Calc T_DLY_FALL_MEAS_5 = T_FALL_ASDX_MEAS - T_FALL_OSDO_MEAS} {bw('CSB', 1)} {dly(2e-06, 0)}"
key comment[64]is || TCMT 9310," search_here {cmt: Caculate T_DLY_RISE_C_5 = T_DLY_RISE_MEAS_5 - T_DLY_RISE_REF_5} {cmt: Caculate T_DLY_FALL_C_5 = T_DLY_FALL_MEAS_5 - T_DLY_FALL_REF_5} {log('T_DLY_RISE_C_5', '', '', 0, 0)}"
key comment[65]is || TCMT 9311," search_here {log('T_DLY_FALL_C_5', '', '', 0, 0)}"
key comment[66]is || TCMT 9504," search_here {cmt: Set I2C delay trimming to 6 in given range} {wac('OCP_MASK', 0xe000, 0)}"
key comment[67]is || TCMT 10406," search_here {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
key comment[68]is || TCMT 10419," search_here {cmt: Calc T_DLY_RISE_REF_6 = T_RISE_ASDX_REF - T_RISE_OSDO_REF} {dly(2e-06, 0)}"
key comment[69]is || TCMT 10446," search_here {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
key comment[70]is || TCMT 10460," search_here {cmt: Calc T_DLY_FALL_REF_6 = T_FALL_ASDX_REF - T_FALL_OSDO_REF} {bw('CSB', 1)} {dly(2e-06, 0)}"
key comment[71]is || TCMT 10621," search_here {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
key comment[72]is || TCMT 10634," search_here {cmt: Calc T_DLY_RISE_MEAS_6 = T_RISE_ASDX_MEAS - T_RISE_OSDO_MEAS} {dly(2e-06, 0)}"
key comment[73]is || TCMT 10661," search_here {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
key comment[74]is || TCMT 10675," search_here {cmt: Calc T_DLY_FALL_MEAS_6 = T_FALL_ASDX_MEAS - T_FALL_OSDO_MEAS} {bw('CSB', 1)} {dly(2e-06, 0)}"
key comment[75]is || TCMT 10894," search_here {cmt: Caculate T_DLY_RISE_C_6 = T_DLY_RISE_MEAS_6 - T_DLY_RISE_REF_6} {cmt: Caculate T_DLY_FALL_C_6 = T_DLY_FALL_MEAS_6 - T_DLY_FALL_REF_6} {log('T_DLY_RISE_C_6', '', '', 0, 0)}"
key comment[76]is || TCMT 10895," search_here {log('T_DLY_FALL_C_6', '', '', 0, 0)}"
key comment[77]is || TCMT 11088," search_here {cmt: Set I2C delay trimming to 7 in given range} {wac('OCP_MASK', 0xe000, 0)}"
key comment[78]is || TCMT 11990," search_here {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
key comment[79]is || TCMT 12003," search_here {cmt: Calc T_DLY_RISE_REF_7 = T_RISE_ASDX_REF - T_RISE_OSDO_REF} {dly(2e-06, 0)}"
key comment[80]is || TCMT 12030," search_here {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
key comment[81]is || TCMT 12044," search_here {cmt: Calc T_DLY_FALL_REF_7 = T_FALL_ASDX_REF - T_FALL_OSDO_REF} {bw('CSB', 1)} {dly(2e-06, 0)}"
key comment[82]is || TCMT 12205," search_here {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
key comment[83]is || TCMT 12218," search_here {cmt: Calc T_DLY_RISE_MEAS_7 = T_RISE_ASDX_MEAS - T_RISE_OSDO_MEAS} {dly(2e-06, 0)}"
key comment[84]is || TCMT 12245," search_here {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
key comment[85]is || TCMT 12259," search_here {cmt: Calc T_DLY_FALL_MEAS_7 = T_FALL_ASDX_MEAS - T_FALL_OSDO_MEAS} {bw('CSB', 1)} {dly(2e-06, 0)}"
key comment[86]is || TCMT 12478," search_here {cmt: Caculate T_DLY_RISE_C_7 = T_DLY_RISE_MEAS_7 - T_DLY_RISE_REF_7} {cmt: Caculate T_DLY_FALL_C_7 = T_DLY_FALL_MEAS_7 - T_DLY_FALL_REF_7} {log('T_DLY_RISE_C_7', '', '', 0, 0)}"
key comment[87]is || TCMT 12479," search_here {log('T_DLY_FALL_C_7', '', '', 0, 0)}"
*/
int index[4*8];
int i_cnt=0;
for(int i=0; i<8; i++) {
for(int j=0; j<4; j++) {
index[i_cnt] = i*11 + j*2 + 1;
i_cnt++;
}
}
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.port("Non_OSDO_ASDX_Port").func().label(s_splited_pat_name[1]).startVec(0).stopVec(i_comment_line[1][index[0]]-1).execute();
rdi.portSync();
for(int i=0; i<31; i++)
{
rdi.port("ASDX_Port").digCap("T04_07_ASDX"+rdi.itos(i)).pin("ASDX").capMode(TA::SER).samples(800).bitPerWord(1).execute();
rdi.port("OSDO_Port").digCap("T04_07_OSDO"+rdi.itos(i)).pin("OSDO").capMode(TA::SER).samples(800).bitPerWord(1).execute();
rdi.port("Non_OSDO_ASDX_Port").func().label(s_splited_pat_name[1]).startVec(i_comment_line[1][index[i]]).stopVec(i_comment_line[1][index[i+1]]-1).execute();
rdi.portSync();
}
rdi.port("ASDX_Port").digCap("T04_07_ASDX"+rdi.itos(31)).pin("ASDX").capMode(TA::SER).samples(800).bitPerWord(1).execute();
rdi.port("OSDO_Port").digCap("T04_07_OSDO"+rdi.itos(31)).pin("OSDO").capMode(TA::SER).samples(800).bitPerWord(1).execute();
rdi.port("Non_OSDO_ASDX_Port").func().label(s_splited_pat_name[1]).startVec(i_comment_line[1][index[31]]-1).execute();
rdi.portSync();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
for(int i=0; i<8; i++)
{
double d_ASDX_RISE, d_ASDX_FALL;
double d_OSDO_RISE, d_OSDO_FALL;
ARRAY_I aI_Data_ASDX, aI_Data_OSDO;
aI_Data_ASDX = rdi.id("T04_07_ASDX"+rdi.itos(4*i+0)).getVector("ASDX");
aI_Data_OSDO = rdi.id("T04_07_OSDO"+rdi.itos(4*i+0)).getVector("OSDO");
d_ASDX_RISE = ASDX_port_period/8 * (Find_first_Switch_point_index(aI_Data_ASDX, 0.5)) * 1e-9; //second
d_OSDO_RISE = OSDO_port_period/8 * (Find_first_Switch_point_index(aI_Data_OSDO, 0.5)) * 1e-9; //second
FuncPrint("T_RISE_ASDX_REF"+rdi.itos(i), d_ASDX_RISE);
FuncPrint("T_RISE_OSDO_REF"+rdi.itos(i), d_OSDO_RISE);
T_DLY_RISE_REF[curSite][i] = d_ASDX_RISE - d_OSDO_RISE;
FuncPrint("T_DLY_RISE_REF_"+rdi.itos(i), T_DLY_RISE_REF[curSite][i]);
aI_Data_ASDX = rdi.id("T04_07_ASDX"+rdi.itos(4*i+1)).getVector("ASDX");
aI_Data_OSDO = rdi.id("T04_07_OSDO"+rdi.itos(4*i+1)).getVector("OSDO");
d_ASDX_FALL = ASDX_port_period/8 * (Find_first_Switch_point_index(aI_Data_ASDX, 0.5)) * 1e-9; //second
d_OSDO_FALL = OSDO_port_period/8 * (Find_first_Switch_point_index(aI_Data_OSDO, 0.5)) * 1e-9; //second
FuncPrint("T_FALL_ASDX_REF"+rdi.itos(i), d_ASDX_FALL);
FuncPrint("T_FALL_OSDO_REF"+rdi.itos(i), d_OSDO_FALL);
T_DLY_FALL_REF[curSite][i] = d_ASDX_FALL - d_OSDO_FALL;
FuncPrint("T_DLY_FALL_REF_"+rdi.itos(i), T_DLY_FALL_REF[curSite][i]);
aI_Data_ASDX = rdi.id("T04_07_ASDX"+rdi.itos(4*i+2)).getVector("ASDX");
aI_Data_OSDO = rdi.id("T04_07_OSDO"+rdi.itos(4*i+2)).getVector("OSDO");
d_ASDX_RISE = ASDX_port_period/8 * (Find_first_Switch_point_index(aI_Data_ASDX, 0.5)) * 1e-9; //second
d_OSDO_RISE = OSDO_port_period/8 * (Find_first_Switch_point_index(aI_Data_OSDO, 0.5)) * 1e-9; //second
FuncPrint("T_RISE_ASDX_MEAS"+rdi.itos(i), d_ASDX_RISE);
FuncPrint("T_RISE_OSDO_MEAS"+rdi.itos(i), d_OSDO_RISE);
T_DLY_RISE_MEAS[curSite][i] = d_ASDX_RISE - d_OSDO_RISE;
FuncPrint("T_DLY_RISE_MEAS_"+rdi.itos(i), T_DLY_RISE_MEAS[curSite][i]);
aI_Data_ASDX = rdi.id("T04_07_ASDX"+rdi.itos(4*i+3)).getVector("ASDX");
aI_Data_OSDO = rdi.id("T04_07_OSDO"+rdi.itos(4*i+3)).getVector("OSDO");
d_ASDX_FALL = ASDX_port_period/8 * (Find_first_Switch_point_index(aI_Data_ASDX, 0.5)) * 1e-9; //second
d_OSDO_FALL = OSDO_port_period/8 * (Find_first_Switch_point_index(aI_Data_OSDO, 0.5)) * 1e-9; //second
FuncPrint("T_FALL_ASDX_MEAS"+rdi.itos(i), d_ASDX_FALL);
FuncPrint("T_FALL_OSDO_MEAS"+rdi.itos(i), d_OSDO_FALL);
T_DLY_FALL_MEAS[curSite][i] = d_ASDX_FALL - d_OSDO_FALL;
FuncPrint("T_DLY_FALL_MEAS_"+rdi.itos(i), T_DLY_FALL_MEAS[curSite][i]);
T_DLY_RISE_C[curSite][i] = T_DLY_RISE_MEAS[curSite][i] - T_DLY_RISE_REF[curSite][i];
FuncPrint("T_DLY_RISE_C_"+rdi.itos(i), T_DLY_RISE_C[curSite][i]);
T_DLY_FALL_C[curSite][i] = T_DLY_FALL_MEAS[curSite][i] - T_DLY_FALL_REF[curSite][i];
FuncPrint("T_DLY_FALL_C_"+rdi.itos(i), T_DLY_FALL_C[curSite][i]);
}
FOR_EACH_SITE_END();
/* Ori key coments in subpat2 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 13563: {wri('IO_PAD_TRM', 'REG_VALUE')}
valid comment[ 1] @ avcline 14218: {Test End: T04_07_I2C_Delay_Char}
*/
TIMING_SPEC spi_std(1, 1);
Primary.timing(spi_std);
Primary.timing(1);
static int i_vec_iposition1[32] = {
31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,
48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63
};
for (int i = 0; i < 32; i++)
{
i_vec_Num1[i] = i_vec_iposition1[i];
}
FOR_EACH_SITE_BEGIN();
i_WRITE_BACK[curSite] = Switch_High_Low_Bits_16Bits(i_REG_VALUE[curSite]);
Func_Vector_Dynamic_Write(s_splited_pat_name[2], "SDX", i_vec_Num1, 32, i_WRITE_BACK[curSite], 0, 2); //Notes. TEI check per project
FOR_EACH_SITE_END();
RDI_BEGIN(mode);
rdi.burstId("burst_id2");
rdi.func().label(s_splited_pat_name[2]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes2[curSite] = rdi.id("burst_id2").getBurstPassFail();
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite] && i_funcRes2[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
for(int i=0; i<8; i++) {
TestLog("T_DLY_RISE_C_"+rdi.itos(i), T_DLY_RISE_C[curSite][i]);
TestLog("T_DLY_FALL_C_"+rdi.itos(i), T_DLY_FALL_C[curSite][i]);
}
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T04_07_I2C_Delay_Char_V2", T04_07_I2C_Delay_Char_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 3 $ $Author: luz3sgh $ $Date: 2024/05/06 05:53:19 GMT $')
# Use signal and timing conventions compliant with I2C fast mode plus acc. test spec (i2c_std)
# Enable active load into SDX pad during compare cycles
# The ATE threshold voltage shall be 70% of VDDIO for the detection of logic 1
# and 30% of VDDIO for logic 0')
# The I2C device ID is set to 0x68 for pattern generation of this test excetp VD_ACK_RISE measrement.
# For VD_ACK_RISE, salve ID in pattern is set to 0x69 by TEA.
ubw('SDO') # Release SDO pad
dly(10e-6)
rac('CHIP_ID', 0x00af, 0x00ff) # Check chip access
wac('PWR_CONF', 0x0000) # Keep advanced power save off (default is 0x0)
dly(10e-6)
wr('CMD', 0xBB3A) # 1st command for enabling the extended mode
wr('CMD', 0x2C62) # 2nd command for enabling the extended mode
wr('CMD', 0xA576) # 1st command for enabling the super privilege mode
wr('CMD', 0x34D6) # 2nd command for enabling the super privilege mode
dly(10e-6)
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
dly(400e-6)
rac('ERR_REG', 0x0000) # Check error register
wac('EXT_MODE', 0xc00d) # Enable super privilege mode; switch to ANA register page
rac('STATUS_PMOD0', 0x0003, 0x0003) # Check ACC AFE PMU status
wac('EXT_MODE', 0xc007) # Switch to MCU register page
# -- Hold time start condition HD_STA --
cmt('Execute following sequence until exit condition is reached')
cmt('--Sequence Start--')
wr('MCU_SW_STATUS0', 0x0000) # Clear register
wr('MCU_SW_STATUS0', 0x006a) # Write signature to register; change signal timing here
rac('MCU_SW_STATUS0', 0x006a) # Check register with nominal signal timing
# If previous rd operation pass: In the previous wr operation shift the falling edge of
# SDX write transition in steps of 5 ns and repeat the entire sequence
# If previous rd operation fail: Record T_I2C_HD_STA at which the previous rd operation
# passed for the last time and exit the sequence
cmt('--Sequence Stop--')
dly(10e-6)
# -- Data setup time SU_DAT --
cmt('Execute following sequence until exit condition is reached')
cmt('--Sequence Start--')
wr('MCU_SW_STATUS0', 0x0000) # Clear register
wr('MCU_SW_STATUS0', 0x006a) # Write signature to register; change signal timing here
rac('MCU_SW_STATUS0', 0x006a) # Check register with nominal signal timing
# If previous rd operation pass: In the previous wr operation shorten the pulse duration
# 5 ns of the register data write phase and repeat the entire sequence
# If previous rd operation fail: Record T_I2C_SU_DAT at which the previous rd operation
# passed for the last time and exit the sequence
cmt('--Sequence Stop--')
dly(10e-6)
# -- Data hold time HD_DAT --
cmt('Execute following sequence until exit condition is reached')
cmt('--Sequence Start--')
wr('MCU_SW_STATUS0', 0x0000) # Clear register
wr('MCU_SW_STATUS0', 0x006a) # Write signature to register; change signal timing here
rac('MCU_SW_STATUS0', 0x006a) # Check register with nominal signal timing
# If previous rd operation pass: In the previous wr operation shorten the pulse duration
# 5 ns of the register data write phase and repeat the entire sequence
# If previous rd operation fail: Record T_I2C_HD_DAT at which the previous rd operation
# passed for the last time and exit the sequence
cmt('--Sequence Stop--')
dly(10e-6)
# -- Data valid time VD_DAT --
# Hardware setup for this measurement: Adjust 30% to 70% rise time of open drain low to
# high transition to match timing requirements shown in the figure at end of this test
# description. This timing is valid for the logic 1 output of the DUT and must be
# independent of temperature
wr('MCU_SW_STATUS0', 0x006a) # Write signature to register
rac('MCU_SW_STATUS0', 0x006a) # Read out register; check timing here
# During the read out in the previous rd operation measure the times T_I2C_VD_DAT_RISE
# and T_I2C_VD_DAT_FALL when the slave transmits data to the master
dly(10e-6)
# -- Data valid acknowledge time for low state VD_ACK_FALL --
wr('MCU_SW_STATUS0', 0x006a) # Write signature to register; check timing here
# During the previous write operation measure the time T_I2C_VD_ACK_FALL
dly(10e-6)
# -- Data valid acknowledge time for high state VD_ACK_RISE --
cmt('Use wrong I2C slave address 0x69 in following test')
dly(10e-6)
wr('MCU_SW_STATUS0', 0x006a) # Write operation with 0x69 as slave id in pattern
# During the previous write operation measure the time T_I2C_VD_ACK_RISE
dly(10e-6)
# -- Setup time for repeated start condition SU_STA --
wr('MCU_SW_STATUS0', 0x006a) # Write signature to register
cmt('Execute following sequence until exit condition is reached')
cmt('--Sequence Start--')
rac('MCU_SW_STATUS0', 0x006a) # Read out register; change signal timing here
# If previous rd operation pass: In the previous rd operation shift the rising edge of
# SCX signal for the repeated strt conditing 5 ns to the right and repeat the sequence
# If previous rd operation fail: Record T_I2C_SU_STA at which the previous rd operation
# passed for the last time and exit the sequence
cmt('--Sequence Stop--')
dly(10e-6)
# -- Bus free time between stop and start condition T_BUF --
wac('MCU_SW_STATUS0', 0x0015) # Write signature to register
wac('MCU_SW_STATUS1', 0x002a) # Write signature to register
cmt('Set variable T_I2C_BUF = 2000 ns')
cmt('Execute following sequence until exit condition is reached')
cmt('--Sequence Start--')
# For following 2 read operations substitute I2C idle timing after the I2C operation,
# extracted from patttern simulation, by the timing given in the test description here
rac('MCU_SW_STATUS0', 0x0015) # Read signature from register
cmt('DLY = T_I2C_BUF')
rac('MCU_SW_STATUS1', 0x002a) # Read signature from register
dly(2e-6)
# If previous rd operation pass: Decrease T_I2C_BUF by 50 ns and repeat the sequence
# If previous rd operation fail: Record T_I2C_BUF at which the previous rd operation
# passed for the last time and exit the sequence
cmt('--Sequence Stop--')
dly(10e-6)
# -- High period of SCX clock T_HIGH --
cmt('Execute following sequence until exit condition is reached')
cmt('--Sequence Start--')
wr('MCU_SW_STATUS0', 0x0000) # Clear register
wr('MCU_SW_STATUS0', 0x006a) # Write signature to register; change signal timing here
rac('MCU_SW_STATUS0', 0x006a) # Check register with nominal signal timing
# If previous rd operation pass: In the previous wr operation decr T_I2C_HIGH by 5 ns
# If previous rd operation fail: Record T_I2C_HIGH at which the previous rd operation
# passed for the last time and exit the sequence
cmt('--Sequence Stop--')
dly(10e-6)
# -- Low period of SCX clock T_LOW --
cmt('Execute following sequence until exit condition is reached')
cmt('--Sequence Start--')
wr('MCU_SW_STATUS0', 0x0000) # Clear register
wr('MCU_SW_STATUS0', 0x0023) # Write signature to register; change signal timing here
rac('MCU_SW_STATUS0', 0x0023) # Check register with nominal signal timing
# If previous rd operation pass: In the previous wr operation decr T_I2C_LOW by 5 ns
# If previous rd operation fail: Record T_I2C_LOW at which the previous rd operation
# passed for the last time and exit the sequence
cmt('--Sequence Stop--')
dly(10e-6)
# -- SDX negative spike suppression time T_SP_SDX_NEG --
cmt('Set variable T_I2C_SP_SDX_NEG = 0 ns')
cmt('Execute following sequence until exit condition is reached')
cmt('--Sequence Start--')
wr('MCU_SW_STATUS0', 0x00f0) # Write signature to register; change signal timing here
rac('MCU_SW_STATUS0', 0x00f0) # Read out register
# If previous rd operation pass: Incr T_I2C_SP_SDX_NEG by 1 ns in previous wr operation
# and repeat the entire sequence
# If previous rd operation fail: Record T_I2C_SP_SDX_NEG at which the previous rd
# operation passed for the last time and exit the sequence
cmt('--Sequence Stop--')
dly(10e-6)
# -- SDX positive spike suppression time T_SP_SDX_POS --
cmt('Set variable T_I2C_SP_SDX_POS = 0 ns')
cmt('Execute following sequence until exit condition is reached')
cmt('--Sequence Start--')
wr('MCU_SW_STATUS0', 0x00f0) # Write signature to register; change signal timing here
rac('MCU_SW_STATUS0', 0x00f0) # Read out register
# If previous rd operation pass: Incr T_I2C_SP_SDX_POS by 1 ns in previous wr operation
# and repeat the entire sequence
# If previous rd operation fail: Record T_I2C_SP_SDX_POS at which the previous rd
# operation passed for the last time and exit the sequence
cmt('--Sequence Stop--')
dly(10e-6)
# -- SCX negative spike suppression time T_SP_SCX_NEG --
cmt('Set variable T_I2C_SP_SCX_NEG = 0 ns')
cmt('Execute following sequence until exit condition is reached')
cmt('--Sequence Start--')
wr('MCU_SW_STATUS0', 0x00f0) # Write signature to register; change signal timing here
rac('MCU_SW_STATUS0', 0x00f0) # Read out register
# If previous rd operation pass: Incr T_I2C_SP_SCX_NEG by 1 ns in previous wr operation
# and repeat the entire sequence
# If previous rd operation fail: Record T_I2C_SP_SCX_NEG at which the previous rd
# operation passed for the last time and exit the sequence
cmt('--Sequence Stop--')
dly(10e-6)
# -- SCX positive spike suppression time T_SP_SCX_POS --
cmt('Set variable T_I2C_SP_SCX_POS = 0 ns')
cmt('Execute following sequence until exit condition is reached')
cmt('--Sequence Start--')
wr('MCU_SW_STATUS0', 0x00f0) # Write signature to register; change signal timing here
rac('MCU_SW_STATUS0', 0x00f0) # Read out register
# If previous rd operation pass: Incr T_I2C_SP_SCX_POS by 1 ns in previous wr operation
# and repeat the entire sequence
# If previous rd operation fail: Record T_I2C_SP_SCX_POS at which the previous rd
# operation passed for the last time and exit the sequence
cmt('--Sequence Stop--')
dly(10e-6)
# -- Setup time for stop condition SU_STO --
cmt('Execute following sequence until exit condition is reached')
cmt('--Sequence Start--')
wr('MCU_SW_STATUS0', 0x0000) # Clear register
wr('MCU_SW_STATUS0', 0x006a) # Write signature to register; change signal timing here
rac('MCU_SW_STATUS0', 0x006a) # Check register with nominal signal timing
# If previous rd operation pass: In the previous wr operation decrease T_I2C_SU_STO by
# 5 ns and repeat the entire sequence
# If previous rd operation fail: Record T_I2C_SU_STO at which the previous rd operation
# passed for the last time and exit the sequence
cmt('--Sequence Stop--')
dly(10e-6)
#Clean-up
wac('MCU_SW_STATUS0', 0x0000) # Reset register setting
wac('MCU_SW_STATUS1', 0x0000) # Reset register setting
|
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
/**
* Test method class.
*
* For each testsuite using this test method, one object of this
* class is created.
*/
class T04_08_I2C_characterization_V1: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
double d_I2C_T_HD_STA[xNSitES];
double d_I2C_T_SU_DAT[xNSitES];
double d_I2C_T_HD_DAT[xNSitES];
double d_I2C_T_SU_STA[xNSitES];
double d_I2C_T_SU_STO[xNSitES];
double d_I2C_T_BUF[xNSitES];
double d_I2C_T_LOW[xNSitES];
double d_I2C_T_HIGH[xNSitES];
double d_I2C_T_SP_SDX_NEG[xNSitES];
double d_I2C_T_SP_SDX_POS[xNSitES];
double d_I2C_T_SP_SCX_NEG[xNSitES];
double d_I2C_T_SP_SCX_POS[xNSitES];
double d_I2C_T_VD_DAT_RISE[xNSitES];
double d_I2C_T_VD_DAT_FALL[xNSitES];
double d_I2C_T_VD_ACK_RISE[xNSitES];
double d_I2C_T_VD_ACK_FALL[xNSitES];
/**
*Initialize the parameter interface to the testflow.
*This method is called just once after a testsuite is created.
*/
virtual void initialize()
{
//Add your initialization code here
//Note: Test Method API should not be used in this method!
}
/**
*This test is invoked per site.
*/
virtual void run()
{
//Add your test code here.
const string s_Label_Init = "T04_08_I2C_characterization_V3_AVC3_PY3_Init";
const string s_Label_Seq1 = "T04_08_i2c_timing_V1_seq1";
const string s_Label_Seq2 = "T04_08_i2c_timing_V1_seq2";
const string s_Label_Seq3 = "T04_08_i2c_timing_V1_seq3";
const string s_Label_Seq4 = "T04_08_i2c_timing_V1_seq4";
const string s_Label_Seq5 = "T04_08_i2c_timing_V1_seq5";
const string s_Label_Seq6 = "T04_08_i2c_timing_V1_seq6";
const string s_Label_Cleanup = "T04_08_i2c_timing_V1_cleanup";
const string s_Label_Wac1 = "T04_08_i2c_timing_V1_wac1";
const string s_Label_Wac2 = "T04_08_i2c_timing_V1_wac2";
SEARCH_FUNC_TASK TASK_spec1, TASK_spec2, TASK_spec3, TASK_spec4, TASK_spec5, TASK_spec6, TASK_spec7, TASK_spec8,
TASK_spec9, TASK_spec10, TASK_spec11, TASK_spec12, TASK_spec13, TASK_spec14, TASK_spec15, TASK_spec16, TASK_spec17;
int i_PassFail;
TIMING_SPEC spec_i2c_sp_scl(41,1);
TIMING_SPEC spec_i2c_char(40,1);
TIMING_SPEC spec_i2c_timing(3,1); //TODO check if match with current timing
ON_FIRST_INVOCATION_BEGIN();
int i_funcRes1[xNSitES], i_funcRes2[xNSitES], i_funcRes3[xNSitES], i_funcRes4[xNSitES], i_funcRes5[xNSitES]
, i_funcRes6[xNSitES], i_funcRes7[xNSitES], i_funcRes8[xNSitES], i_funcRes9[xNSitES], i_funcRes10[xNSitES]
, i_funcRes11[xNSitES], i_funcRes12[xNSitES], i_funcRes13[xNSitES], i_funcRes14[xNSitES], i_funcRes15[xNSitES]
, i_funcRes16[xNSitES], i_funcRes17[xNSitES], i_funcRes18[xNSitES], i_funcRes7_1[xNSitES], i_funcRes8_1[xNSitES];
double d_TransitionTime1[xNSitES], d_TransitionTime2[xNSitES], d_TransitionTime3[xNSitES], d_TransitionTime4[xNSitES], d_TransitionTime5[xNSitES]
, d_TransitionTime6[xNSitES], d_TransitionTime7[xNSitES], d_TransitionTime8[xNSitES], d_TransitionTime9[xNSitES], d_TransitionTime10[xNSitES]
, d_TransitionTime11[xNSitES], d_TransitionTime12[xNSitES], d_TransitionTime13[xNSitES], d_TransitionTime14[xNSitES], d_TransitionTime15[xNSitES]
, d_TransitionTime16[xNSitES];
// , d_TransitionTime17[xNSitES], d_TransitionTime18[xNSitES];
Primary.timing(spec_i2c_timing);
FLUSH();
//initial, goto page0 //TODO to get Init pattern of py.
Primary.label(s_Label_Init);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes1[curSite], "i_funcRes1");
FOR_EACH_SITE_END();
Primary.timing(spec_i2c_char);
//***********************************I2C_T_HD_STA*************************************************************
Primary.label(s_Label_Seq1);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes2[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes2[curSite], "i_funcRes2");
FOR_EACH_SITE_END();
Primary.label(s_Label_Seq1+"_hd_sta");
FLUSH();
TASK_spec1.pin("SDX").spec("t_hd_sta",TM::TIM).method(TM::Binary).start(10).stop(750).resolution(1);
TASK_spec1.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec1.getPassFail("SDX");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime1[curSite] = TASK_spec1.getPassValue("SDX");
d_I2C_T_HD_STA[curSite] = (750 - d_TransitionTime1[curSite]) ; //unit s
Func_Print(d_TransitionTime1[curSite], "Org TransitionTime1");
Func_Print(d_I2C_T_HD_STA[curSite], "d_I2C_T_HD_STA");
}
FOR_EACH_SITE_END();
//***********************************I2C_T_SU_DAT*************************************************************
Primary.label(s_Label_Seq1);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes3[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes3[curSite], "i_funcRes3");
FOR_EACH_SITE_END();
Primary.label(s_Label_Seq1+"_su_dat");
FLUSH();
TASK_spec2.pin("SDX").spec("t_su_dat",TM::TIM).method(TM::Binary).start(10).stop(450).resolution(1);
TASK_spec2.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec2.getPassFail("SDX");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime2[curSite] = TASK_spec2.getPassValue("SDX");
d_I2C_T_SU_DAT[curSite] = (250 - d_TransitionTime2[curSite]) ; //unit s
Func_Print(d_TransitionTime2[curSite], "Org TransitionTime2");
Func_Print(d_I2C_T_SU_DAT[curSite], "d_I2C_T_SU_DAT");
}
FOR_EACH_SITE_END();
//***********************************I2C_T_HD_DAT*************************************************************
Primary.label(s_Label_Seq1);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes4[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes4[curSite], "i_funcRes4");
FOR_EACH_SITE_END();
Primary.label(s_Label_Seq1+"_hd_dat");
FLUSH();
TASK_spec3.pin("SDX").spec("t_hd_dat",TM::TIM).method(TM::Binary).start(0).stop(500).resolution(1);
TASK_spec3.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec3.getPassFail("SDX");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime3[curSite] = TASK_spec3.getPassValue("SDX");
d_I2C_T_HD_DAT[curSite] = (250 - d_TransitionTime3[curSite]) ; //unit s
Func_Print(d_TransitionTime3[curSite], "Org TransitionTime3");
Func_Print(d_I2C_T_HD_DAT[curSite], "d_I2C_T_HD_DAT");
}
FOR_EACH_SITE_END();
//***********************************I2C_T_VD_DAT_RISE*************************************************************
Primary.label(s_Label_Seq1);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes5[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes5[curSite], "i_funcRes5");
FOR_EACH_SITE_END();
Primary.label(s_Label_Seq1+"_vd_dat_rise");
FLUSH();
TASK_spec4.pin("SDX").spec("t_vd_dat",TM::TIM).method(TM::Binary).start(0).stop(-800).resolution(1);
TASK_spec4.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec4.getPassFail("SDX");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime4[curSite] = TASK_spec4.getPassValue("SDX");
d_I2C_T_VD_DAT_RISE[curSite] = (250 + 500 + d_TransitionTime4[curSite]) ; //unit s
Func_Print(d_TransitionTime4[curSite], "Org TransitionTime4");
Func_Print(d_I2C_T_VD_DAT_RISE[curSite], "d_I2C_T_VD_DAT_RISE");
}
FOR_EACH_SITE_END();
//***********************************I2C_T_VD_DAT_FALL*************************************************************
Primary.label(s_Label_Seq1);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes6[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes6[curSite], "i_funcRes6");
FOR_EACH_SITE_END();
Primary.label(s_Label_Seq1+"_vd_dat_fall");
FLUSH();
TASK_spec5.pin("SDX").spec("t_vd_dat",TM::TIM).method(TM::Binary).start(0).stop(-800).resolution(1);
TASK_spec5.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec5.getPassFail("SDX");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime5[curSite] = TASK_spec5.getPassValue("SDX");
d_I2C_T_VD_DAT_FALL[curSite] = (250 + 500 + d_TransitionTime5[curSite]) ; //unit s
Func_Print(d_TransitionTime5[curSite], "Org TransitionTime5");
Func_Print(d_I2C_T_VD_DAT_FALL[curSite], "d_I2C_T_VD_DAT_FALL");
}
FOR_EACH_SITE_END();
//***********************************I2C_T_VD_ACK_RISE*************************************************************
Primary.label(s_Label_Seq6);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes18[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes18[curSite], "i_funcRes18");
FOR_EACH_SITE_END();
Primary.label(s_Label_Seq6+"_vd_ack_rise");
FLUSH();
TASK_spec17.pin("SDX").spec("t_vd_dat",TM::TIM).method(TM::Binary).start(0).stop(-800).resolution(1);
TASK_spec17.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec17.getPassFail("SDX");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime16[curSite] = TASK_spec17.getPassValue("SDX");
d_I2C_T_VD_ACK_RISE[curSite] = (250 + 500 + d_TransitionTime16[curSite]) ; //unit s
Func_Print(d_TransitionTime16[curSite], "Org TransitionTime16");
Func_Print(d_I2C_T_VD_ACK_RISE[curSite], "d_I2C_T_VD_ACK_RISE");
}
FOR_EACH_SITE_END();
//***********************************I2C_T_VD_ACK_FALL*************************************************************
Primary.label(s_Label_Seq6);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes17[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes17[curSite], "i_funcRes17");
FOR_EACH_SITE_END();
Primary.label(s_Label_Seq6+"_vd_ack_fall");
FLUSH();
TASK_spec16.pin("SDX").spec("t_vd_dat",TM::TIM).method(TM::Binary).start(0).stop(-800).resolution(1);
TASK_spec16.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec16.getPassFail("SDX");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime15[curSite] = TASK_spec16.getPassValue("SDX");
d_I2C_T_VD_ACK_FALL[curSite] = (250 + 500 + d_TransitionTime15[curSite]) ; //unit s
Func_Print(d_TransitionTime15[curSite], "Org TransitionTime15");
Func_Print(d_I2C_T_VD_ACK_FALL[curSite], "d_I2C_T_VD_ACK_FALL");
}
FOR_EACH_SITE_END();
//***********************************I2C_T_SU_STA*************************************************************
Primary.label(s_Label_Wac1);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes7_1[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes7_1[curSite], "i_funcRes7_1");
FOR_EACH_SITE_END();
Primary.getTimingSpec().change("t_su_sta", 250);
FLUSH();
// Primary.label("T04_08_i2c_timing_V1_seq2_t_su_sta");
Primary.label(s_Label_Seq2+"_su_sta");
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes7[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes7[curSite], "i_funcRes7");
FOR_EACH_SITE_END();
Primary.label(s_Label_Seq2+"_su_sta");
// Primary.label("T04_08_i2c_timing_V1_seq2_t_su_sta");
FLUSH();
TASK_spec6.pin("SCX").spec("t_su_sta",TM::TIM).method(TM::Binary).start(250).stop(740).resolution(0.1);
TASK_spec6.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec6.getPassFail("SCX");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime6[curSite] = TASK_spec6.getPassValue("SCX");
d_I2C_T_SU_STA[curSite] = (500- d_TransitionTime6[curSite]) ; //unit s
Func_Print(d_TransitionTime6[curSite], "Org TransitionTime6");
Func_Print(d_I2C_T_SU_STA[curSite], "d_I2C_T_SU_STA");
}
FOR_EACH_SITE_END();
//***********************************I2C_T_BUF*************************************************************
Primary.label(s_Label_Wac2);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes8_1[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes8_1[curSite], "i_funcRes8_1");
FOR_EACH_SITE_END();
Primary.getTimingSpec().change("t_su_dat", 500);
FLUSH();
Primary.label(s_Label_Seq3+"_buf");
// Primary.label(s_Label_Seq3);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes8[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes8[curSite], "i_funcRes8");
FOR_EACH_SITE_END();
// Primary.label("T04_08_i2c_timing_V1_seq3_buf_test");
Primary.label(s_Label_Seq3+"_buf");
FLUSH();
TASK_spec7.pin("SDX").spec("t_su_dat",TM::TIM).method(TM::Linear).start(500).stop(1000).stepWidth(10);
TASK_spec7.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec7.getPassFail("SDX");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime7[curSite] = TASK_spec7.getPassValue("SDX");
d_I2C_T_BUF[curSite] = (1000 - d_TransitionTime7[curSite]) * 2 ;
Func_Print(d_TransitionTime7[curSite], "Org TransitionTime7");
Func_Print(d_I2C_T_BUF[curSite], "d_I2C_T_BUF");
}
FOR_EACH_SITE_END();
//***********************************I2C_T_HIGH*************************************************************
Primary.label(s_Label_Seq1);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes9[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes9[curSite], "i_funcRes9");
FOR_EACH_SITE_END();
Primary.label(s_Label_Seq1+"_high");
FLUSH();
TASK_spec8.pin("SCX").spec("t_high",TM::TIM).method(TM::Binary).start(0).stop(-500).resolution(1);
TASK_spec8.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec8.getPassFail("SCX");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime8[curSite] = TASK_spec8.getPassValue("SCX");
d_I2C_T_HIGH[curSite] = (500 + d_TransitionTime8[curSite]) ; //unit s
Func_Print(d_TransitionTime8[curSite], "Org TransitionTime8");
Func_Print(d_I2C_T_HIGH[curSite], "d_I2C_T_HIGH");
}
FOR_EACH_SITE_END();
//***********************************I2C_T_LOW*************************************************************
Primary.label(s_Label_Seq4);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes10[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes10[curSite], "i_funcRes10");
FOR_EACH_SITE_END();
Primary.label(s_Label_Seq4+"_low");
FLUSH();
// TASK_spec9.pin("SCX").spec("t_low",TM::TIM).method(TM::Binary).start(0).stop(500).resolution(5);
TASK_spec9.pin("SCX").spec("t_high",TM::TIM).method(TM::Binary).start(0).stop(500).resolution(1);
TASK_spec9.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec9.getPassFail("SCX");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime9[curSite] = TASK_spec9.getPassValue("SCX");
d_I2C_T_LOW[curSite] = (500 - d_TransitionTime9[curSite]) ; //unit s
Func_Print(d_TransitionTime9[curSite], "Org TransitionTime9");
Func_Print(d_I2C_T_LOW[curSite], "d_I2C_T_LOW");
}
FOR_EACH_SITE_END();
//***********************************I2C_T_SP_SDX_NEG*************************************************************
Primary.label(s_Label_Seq5);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes11[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes11[curSite], "i_funcRes11");
FOR_EACH_SITE_END();
Primary.label(s_Label_Seq5+"_sp_sda_neg");
FLUSH();
TASK_spec10.pin("SDX").spec("t_sp",TM::TIM).method(TM::Binary).start(0).stop(1000).resolution(1); //modify the time to 200ns based on shmoo data on 0526
TASK_spec10.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec10.getPassFail("SDX");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime10[curSite] = TASK_spec10.getPassValue("SDX");
d_I2C_T_SP_SDX_NEG[curSite] = (d_TransitionTime10[curSite] + 5); //unit s
Func_Print(d_TransitionTime10[curSite], "Org TransitionTime10");
Func_Print(d_I2C_T_SP_SDX_NEG[curSite], "d_I2C_T_SP_SDX_NEG");
}
FOR_EACH_SITE_END();
//***********************************I2C_T_SP_SDX_POS*************************************************************
Primary.label(s_Label_Seq5);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes12[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes12[curSite], "i_funcRes12");
FOR_EACH_SITE_END();
Primary.label(s_Label_Seq5+"_sp_sda_pos");
FLUSH();
TASK_spec11.pin("SDX").spec("t_sp",TM::TIM).method(TM::Binary).start(0).stop(1000).resolution(1); //modify the time to 200ns based on shmoo data on 0526
TASK_spec11.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec11.getPassFail("SDX");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime11[curSite] = TASK_spec11.getPassValue("SDX");
d_I2C_T_SP_SDX_POS[curSite] = (d_TransitionTime11[curSite]+5) ; //unit s
Func_Print(d_TransitionTime11[curSite], "Org TransitionTime11");
Func_Print(d_I2C_T_SP_SDX_POS[curSite], "d_I2C_T_SP_SDX_POS");
}
FOR_EACH_SITE_END();
//***********************************I2C_T_SP_SCX_NEG*************************************************************
Primary.timing(spec_i2c_sp_scl);
FLUSH();
Primary.label(s_Label_Seq5);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes13[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes13[curSite], "i_funcRes13");
FOR_EACH_SITE_END();
Primary.label(s_Label_Seq5+"_sp_scl_neg");
FLUSH();
TASK_spec12.pin("SCX").spec("t_sp_scl_neg",TM::TIM).method(TM::Linear).start(10).stop(490).stepWidth(1);//resolution(5); //modify Linear, and the time to 150ns based on shmoo data on 0526
TASK_spec12.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec12.getPassFail("SCX");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime12[curSite] = TASK_spec12.getPassValue("SCX");
d_I2C_T_SP_SCX_NEG[curSite] = (d_TransitionTime12[curSite]); //unit s
Func_Print(d_TransitionTime12[curSite], "Org TransitionTime12");
Func_Print(d_I2C_T_SP_SCX_NEG[curSite], "d_I2C_T_SP_SCX_NEG");
}
FOR_EACH_SITE_END();
//***********************************I2C_T_SP_SCX_POS*************************************************************
// TIMING_SPEC spec_i2c_sp_scl(33,1);
// Primary.timing(spec_i2c_sp_scl);
FLUSH();
Primary.label(s_Label_Seq5);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes14[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes14[curSite], "i_funcRes14");
FOR_EACH_SITE_END();
Primary.label(s_Label_Seq5+"_sp_scl_pos");
FLUSH();
TASK_spec13.pin("SCX").spec("t_sp_scl_pos",TM::TIM).method(TM::Linear).start(0).stop(500).stepWidth(1);//resolution(5); //modify Linear, and the time to 200ns based on shmoo data on 0526
TASK_spec13.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec13.getPassFail("SCX");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime13[curSite] = TASK_spec13.getPassValue("SCX");
d_I2C_T_SP_SCX_POS[curSite] = (d_TransitionTime13[curSite] ); //unit s
Func_Print(d_TransitionTime13[curSite], "Org TransitionTime13");
Func_Print(d_I2C_T_SP_SCX_POS[curSite], "d_I2C_T_SP_SCX_POS");
}
FOR_EACH_SITE_END();
//***********************************I2C_T_SU_STO*************************************************************
Primary.timing(spec_i2c_char);
FLUSH();
Primary.label(s_Label_Seq1);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes15[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes15[curSite], "i_funcRes15");
FOR_EACH_SITE_END();
Primary.label(s_Label_Seq1+"_su_sto");
FLUSH();
TASK_spec14.pin("SDX").spec("t_su_dat",TM::TIM).method(TM::Linear).start(600).stop(0).stepWidth(1);
TASK_spec14.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec14.getPassFail("SDX");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime14[curSite] = TASK_spec14.getPassValue("SDX");
d_I2C_T_SU_STO[curSite] = (d_TransitionTime14[curSite]-250); //unit s
Func_Print(d_TransitionTime14[curSite], "Org TransitionTime14");
Func_Print(d_I2C_T_SU_STO[curSite], "d_I2C_T_SU_STO");
}
FOR_EACH_SITE_END();
//clean up //TODO clean up pattern need to be get from py.
Primary.label(s_Label_Cleanup);
// Primary.label("T04_08_I2C_characterization_cleanup");
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_funcRes16[curSite] = GET_FUNCTIONAL_RESULT();
Func_Print(i_funcRes16[curSite], "i_funcRes16");
i_funcRes[curSite] = i_funcRes1[curSite] & i_funcRes2[curSite] & i_funcRes3[curSite] & i_funcRes4[curSite]
& i_funcRes5[curSite] & i_funcRes6[curSite] & i_funcRes7[curSite] & i_funcRes8[curSite]
& i_funcRes9[curSite] & i_funcRes10[curSite]& i_funcRes11[curSite]& i_funcRes12[curSite]
& i_funcRes13[curSite]& i_funcRes14[curSite]& i_funcRes15[curSite]& i_funcRes16[curSite]
& i_funcRes17[curSite]& i_funcRes18[curSite];
Func_Print(i_funcRes[curSite], "i_funcRes");
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
//test and judge
TestLog("T_I2C_HD_STA", d_I2C_T_HD_STA[curSite] * 1e-9);
TestLog("T_I2C_SU_DAT", d_I2C_T_SU_DAT[curSite] * 1e-9);
TestLog("T_I2C_HD_DAT", d_I2C_T_HD_DAT[curSite] * 1e-9);
TestLog("T_I2C_VD_DAT_RISE", d_I2C_T_VD_DAT_RISE[curSite] * 1e-9);
TestLog("T_I2C_VD_DAT_FALL", d_I2C_T_VD_DAT_FALL[curSite] * 1e-9);
TestLog("T_I2C_SU_STA", d_I2C_T_SU_STA[curSite] * 1e-9);
TestLog("T_I2C_BUF", d_I2C_T_BUF[curSite] * 1e-9);
TestLog("T_I2C_HIGH", d_I2C_T_HIGH[curSite] * 1e-9);
TestLog("T_I2C_LOW", d_I2C_T_LOW[curSite] * 1e-9);
TestLog("T_I2C_SP_SDX_NEG", d_I2C_T_SP_SDX_NEG[curSite] * 1e-9);
TestLog("T_I2C_SP_SDX_POS", d_I2C_T_SP_SDX_POS[curSite] * 1e-9);
TestLog("T_I2C_SP_SCX_NEG", d_I2C_T_SP_SCX_NEG[curSite] * 1e-9);
TestLog("T_I2C_SP_SCX_POS", d_I2C_T_SP_SCX_POS[curSite] * 1e-9);
TestLog("T_I2C_SU_STO", d_I2C_T_SU_STO[curSite] * 1e-9);
TestLog("T_I2C_VD_ACK_RISE", d_I2C_T_VD_ACK_RISE[curSite] * 1e-9);
TestLog("T_I2C_VD_ACK_FALL", d_I2C_T_VD_ACK_FALL[curSite] * 1e-9);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;
}
/**
*This function will be invoked once the specified parameter's value is changed.
*@param parameterIdentifier
*/
virtual void postParameterChange(const string& parameterIdentifier)
{
//Add your code
//Note: Test Method API should not be used in this method!
return;
}
/**
*This function will be invoked once the Select Test Method Dialog is opened.
*/
virtual const string getComment() const
{
string comment = " please add your comment for this method.";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T04_08_I2C_characterization_V1", T04_08_I2C_characterization_V1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 3 $ $Author: rio1rt $ $Date: 2024/05/03 08:07:32 GMT $')
dly(10e-6)
ubw('SDO') # Release SDO pad
dly(10e-6)
cmt('Execute I3C init pattern to enter I3C mode(included in pattern)')
scmd('do SETDASA_DIRECT_CCC i3c_seq keeping {'
'.target == BST;'
'.dev_addr == 0x42;'
'};')
dly(10e-6)
wac('EXT_MODE',0x0000)
rac('CHIP_ID', 0x00af, 0x00ff) # Check chip access
wr('FIFO_WATERMARK', 0x02a5) # Write signature to register
rac('FIFO_WATERMARK', 0x02a5) # Read signature from register
wac('FIFO_WATERMARK', 0x0000) # Clear register
wac('PWR_CONF', 0x0000) # Keep advanced power save off (default is 0x0)
dly(10e-6)
wr('CMD', 0xBB3A) # 1st command for enabling the extended mode
wr('CMD', 0x2C62) # 2nd command for enabling the extended mode
wr('CMD', 0xA576) # 1st command for enabling the super privilege mode
wr('CMD', 0x34D6) # 2nd command for enabling the super privilege mode
dly(10e-6)
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
dly(400e-6)
rac('ERR_REG', 0x0000) # Check error register
wac('EXT_MODE', 0xc00d) # Enable super privilege mode; switch to ANA register page
rac('STATUS_PMOD0', 0x0003, 0x0003) # Check ACC AFE PMU status
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T04_09_I3C_test_V3: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T04_09_I3C_test_V3_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T04_09_I3C_test_V3_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T04_09_I3C_test_V3", T04_09_I3C_test_V3);
|
generate cpp file from given test case python file
|
# Warning, AA workaround applied, TE3 not executed
cmt('Version info: $Revision: bai430aa_rel/2 $ $Author: luz3sgh $ $Date: 2024/09/26 08:47:02 GMT $')
# ---I3C Protocol check---
cmt('Check chip already in I3C state, and dev_addr assigned to 0x42)')
dly(10e-6)
wr('EXT_MODE', 0x0000) # Switch to USR mode
wr('FIFO_WATERMARK', 0x02a5) # Write signature to register
rac('FIFO_WATERMARK', 0x02a5) # Read signature from register
dly(10e-6)
# ---HDR EXIT---
cmt('Switch to HDR_DDR mode (included in pattern)')
scmd('do ENTHDR0_BROADCAST_CCC i3c_seq keeping {'
'.do_stop == FALSE;'
'};')
dly(10e-6)
cmt('Drive HDR_DDR traffic to enter HDR_DDR mode (included in pattern)')
scmd('do PRIVATE_DDR i3c_seq keeping {'
'.target == BST;'
'.do_enthdr0_seq == FALSE;'
'.do_hdr_exit == FALSE;'
'};')
dly(10e-6)
cmt('Drive HDR_DDR EXIT pattern to exist HDR_DDR mode (included in pattern)')
scmd('do START_STOP i3c_seq keeping {'
'.i3c_bus_mode == HDR_DDR;'
'.do_hdr_exit == TRUE;'
'};')
dly(10e-6)
wr('FIFO_WATERMARK', 0x025a) # Write signature to register
rac('FIFO_WATERMARK', 0x025a) # Read signature from register
dly(10e-6)
# ---TRIGGER TE0 ERROR---
cmt('Trigger TE0 error (included in pattern)')
scmd("do TE0'error_type SDR_ERROR CONTROLLER i3c_seq;")
#error_recovery is enabled by default in i3c_target eVC
dly(10e-6)
rac('FIFO_WATERMARK', 0x025a) # Check I3C target recovery
rac('ERR_REG', 0x0100) # Check I3C te0 error has been triggered
rac('ERR_REG', 0x0000) # Check reset of error register
dly(10e-6)
# ---TRIGGER TE1 ERROR---
cmt('Trigger TE1 error (included in pattern)')
scmd("do TE1'error_type SDR_ERROR CONTROLLER i3c_seq;")
#error_recovery is enabled by default in i3c_target eVC
dly(10e-6)
rac('FIFO_WATERMARK', 0x025a) # Check I3C target recovery
rac('ERR_REG', 0x0200) # Check I3C te1 error has been triggered
rac('ERR_REG', 0x0000) # Check reset of error register
dly(10e-6)
# ---TRIGGER TE2 ERROR---
cmt('Trigger TE2 error (included in pattern)')
scmd("do TE2'error_type SDR_ERROR CONTROLLER i3c_seq;")
#error_recovery is enabled by default in i3c_target eVC
dly(10e-6)
rac('FIFO_WATERMARK', 0x025a) # Check I3C target recovery
rac('ERR_REG', 0x0400) # Check I3C te2 error has been triggered
rac('ERR_REG', 0x0000) # Check reset of error register
dly(10e-6)
# ---TRIGGER TE3 ERROR---
#cmt('Trigger TE3 error (included in pattern)')
#scmd("do TE3'error_type SDR_ERROR CONTROLLER i3c_seq;")
#error_recovery is enabled by default in i3c_target eVC
#dly(10e-6)
#rac('FIFO_WATERMARK', 0x025a) # Check I3C target recovery
#rac('ERR_REG', 0x0800) # Check I3C te3 error has been triggered
#rac('ERR_REG', 0x0000) # Check reset of error register
#dly(10e-6)
# ---TRIGGER TE4 ERROR---
cmt('Trigger TE4 error (included in pattern)')
scmd("do TE4'error_type SDR_ERROR CONTROLLER i3c_seq;")
#error_recovery is enabled by default in i3c_target eVC
dly(10e-6)
rac('FIFO_WATERMARK', 0x025a) # Check I3C target recovery
rac('ERR_REG', 0x1000) # Check I3C te4 error has been triggered
rac('ERR_REG', 0x0000) # Check reset of error register
dly(10e-6)
# ---RESET DAA---
cmt('Send the RST DAA CC to reset the dynamic address (included in pattern)')
scmd('do RSTDAA_BROADCAST_CCC i3c_seq;')
dly(10e-6)
rac('FIFO_WATERMARK', 0x0000) # Read access expeced to fail and target does not ACK
wr('FIFO_WATERMARK', 0x0000) # Write access expeced to fail and target does not ACK
dly(10e-6)
cmt('Re-assign the dynamic address (included in pattern)')
scmd('do SETDASA_DIRECT_CCC i3c_seq keeping {'
'.target == BST;'
'.dev_addr == 0x42;'
'};')
cmt('Re-enable target interrupts IBI (included in pattern)')
scmd('do ENEC_DIRECT_CCC i3c_seq keeping {'
'.target == BST;'
'.enint;'
'};')
dly(10e-6)
rac('FIFO_WATERMARK', 0x025a) # Check read works after DAA re-assignment
wr('FIFO_WATERMARK', 0x0255) # Write signature to register
rac('FIFO_WATERMARK', 0x0255) # Read signature from register and check wr/rd access pass
wac('FIFO_WATERMARK', 0x0000) # Set register to reset value
dly(10e-6)
# ---IBI---
wac('INT_MAP_MCU', 0x0003) # Map interrrupt to MCU A (IBI)
wr('CMD', 0xBB3A) # 1st command for enabling the extended mode
wr('CMD', 0x2C62) # 2nd command for enabling the extended mode
wac('EXT_MODE', 0x8000) # Enter extended mode
wac('EXT_MODE', 0x8004) # Switch to HWINT register page
wr('INT_MCU_SET', 0x0001) # Trigger MCU interrupt A
# The following SCX mask signal is used in the pattern generation flow to mask SCX to '1'.
# The ASIC is driving SDX to '0'. Since the master clock is masked and not toggling, the ASIC is keeping SDX at '0'
# This mechanism is used to verify the ASIC has triggered the IBI interrupt.
bm('SCX') # Set SCX mask to mask I3C master response to IBI
dly(10e-6)
ubm('SCX') # Unset SCX mask; Note: for pattern gen SCX mask falling edge is used for the SDX bit compare
# Note: The following bit compare SDX=0 is masked out becase it will be implemented with the pattern generaton flow
# bc('SDX', 0) # Check IBI has been triggered and drives SDX to '0'
dly(10e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T04_11_I3C_feature_test_V4: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T04_11_I3C_feature_test_V4_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T04_11_I3C_feature_test_V4_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T04_11_I3C_feature_test_V4", T04_11_I3C_feature_test_V4);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: I2C communication at max speed 1 MHz
# - Use I2C device ID 0x68
# - Entry condition PU_I2C
# - Device init and unlock super privilege mode
# - Execute single write, single read, burst read
#############################################################################################################
cmt('Version info: $Revision: 5 $ $Author: luz3sgh $ $Date: 2024/05/06 07:27:57 GMT $')
cmt('Use signal and timing conventions compliant with I2C')
cmt('Enable pull-up (active load) on pad SDX')
cmt('Use the following parameters: F_sck = 1.0 MHz')
ubw('SDO') # Release SDO pad
dly(10e-6)
rac('CHIP_ID', 0x00af, 0x00ff) # Check chip access
wac('PWR_CONF', 0x0000) # Keep advanced power save off (default is 0x0)
dly(10e-6)
wr('CMD', 0xBB3A) # 1st command for enabling the extended mode
wr('CMD', 0x2C62) # 2nd command for enabling the extended mode
wr('CMD', 0xA576) # 1st command for enabling the super privilege mode
wr('CMD', 0x34D6) # 2nd command for enabling the super privilege mode
dly(10e-6)
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
dly(400e-6)
rac('ERR_REG', 0x0000) # Check error register
wac('EXT_MODE', 0xc00d) # Enable super privilege mode; switch to ANA register page
rac('STATUS_PMOD0', 0x0003, 0x0003) # Check ACC AFE PMU status
wac('EXT_MODE', 0xc007) # Switch to MCU register page
# single write single read
wr('MCU_SW_STATUS0', 0x55aa) # Write signature to register
rac('MCU_SW_STATUS0', 0x55aa) # Read signature from register
wr('MCU_SW_STATUS1', 0x81cc) # Write signature to register
rac('MCU_SW_STATUS1', 0x81cc) # Read signature from register
wr('MCU_SW_STATUS2', 0xf00f) # Write signature to register
rac('MCU_SW_STATUS2', 0xf00f) # Read signature from register
wr('MCU_SW_STATUS3', 0xaa55) # Write signature to register
rac('MCU_SW_STATUS3', 0xaa55) # Read signature from register
# burst read
brac('MCU_SW_STATUS0', [0x55aa,0x81cc,0xf00f,0xaa55]) # Burst read and compare
# register reset
wac('MCU_SW_STATUS0', 0x0000) # Reset register value
wac('MCU_SW_STATUS1', 0x0000) # Reset register value
wac('MCU_SW_STATUS2', 0x0000) # Reset register value
wac('MCU_SW_STATUS3', 0x0000) # Reset register value
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T04_16_I2C_test_devID68_V5: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T04_16_I2C_test_devID68_V5_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T04_16_I2C_test_devID68_V5_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T04_16_I2C_test_devID68_V5", T04_16_I2C_test_devID68_V5);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: I2C communication at max speed 1 MHz
# - Use I2C device ID 0x69
# - Entry condition PU_I2C
# - Device init and unlock super privilege mode
# - Execute single write, single read, burst read
#############################################################################################################
cmt('Version info: $Revision: 5 $ $Author: luz3sgh $ $Date: 2024/05/06 07:27:55 GMT $')
cmt('Use signal and timing conventions compliant with I2C')
cmt('Enable pull-up (active load) on pad SDX')
cmt('Use the following parameters: F_sck = 1.0 MHz')
ubw('SDO') # Release SDO pad
dly(10e-6)
rac('CHIP_ID', 0x00af, 0x00ff) # Check chip access
wac('PWR_CONF', 0x0000) # Keep advanced power save off (default is 0x0)
dly(10e-6)
wr('CMD', 0xBB3A) # 1st command for enabling the extended mode
wr('CMD', 0x2C62) # 2nd command for enabling the extended mode
wr('CMD', 0xA576) # 1st command for enabling the super privilege mode
wr('CMD', 0x34D6) # 2nd command for enabling the super privilege mode
dly(10e-6)
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
dly(400e-6)
rac('ERR_REG', 0x0000) # Check error register
wac('EXT_MODE', 0xc00d) # Enable super privilege mode; switch to ANA register page
rac('STATUS_PMOD0', 0x0003, 0x0003) # Check ACC AFE PMU status
wac('EXT_MODE', 0xc007) # Switch to MCU register page
# single write single read
wr('MCU_SW_STATUS0', 0x55aa) # Write signature to register
rac('MCU_SW_STATUS0', 0x55aa) # Read signature from register
wr('MCU_SW_STATUS1', 0x81cc) # Write signature to register
rac('MCU_SW_STATUS1', 0x81cc) # Read signature from register
wr('MCU_SW_STATUS2', 0xf00f) # Write signature to register
rac('MCU_SW_STATUS2', 0xf00f) # Read signature from register
wr('MCU_SW_STATUS3', 0xaa55) # Write signature to register
rac('MCU_SW_STATUS3', 0xaa55) # Read signature from register
# burst read
brac('MCU_SW_STATUS0', [0x55aa,0x81cc,0xf00f,0xaa55]) # Burst read and compare
# register reset
wac('MCU_SW_STATUS0', 0x0000) # Reset register value
wac('MCU_SW_STATUS1', 0x0000) # Reset register value
wac('MCU_SW_STATUS2', 0x0000) # Reset register value
wac('MCU_SW_STATUS3', 0x0000) # Reset register value
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T04_17_I2C_test_devID69_V5: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T04_17_I2C_test_devID69_V5_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T04_17_I2C_test_devID69_V5_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T04_17_I2C_test_devID69_V5", T04_17_I2C_test_devID69_V5);
|
generate cpp file from given test case python file
|
#############################################################################################################
# Description:
# - Enable secondary interface OIS
# - Read OIS test register via secondary interface
# - Disable secondary interface
#############################################################################################################
cmt('Version info: $Revision: 2 $ $Author: luz3sgh $ $Date: 2024/05/21 05:45:06 GMT $')
wac('EXT_MODE', 0xc009) # Switch to IO register page
wcb('disable_sec_if', 0x0) # Ensure secondary IF is not disabled (default=0x0)
wac('IO_IF_CONF', 0x0008) # Enable OIS SPI4 interface
wac('EXT_MODE', 0xc000) # Switch to USR register page
cmt('Read address 0x00 via OIS interface and compare read-out to 0xaf (included in pattern)')
scmd('var OIS_CHIP_ID : OIS_CHIP_ID vr_ad_reg;'
'read_reg {'
'.driver == driver.rsd_ois;'
'.byte_enable == 0xFF;' # Read mask
'} OIS_CHIP_ID;')
cmt('Read address 0x5a via OIS interface and compare read-out to 0xaa (included in pattern)')
scmd('var OIS_TEST_L : OIS_TEST_L vr_ad_reg;'
'read_reg {'
'.driver == driver.rsd_ois;'
'.byte_enable == 0xFF;' # Read mask
'} OIS_TEST_L;')
cmt('Read address 0x5b via OIS interface and compare read-out to 0x55 (included in pattern)')
scmd('var OIS_TEST_H : OIS_TEST_H vr_ad_reg;'
'read_reg {'
'.driver == driver.rsd_ois;'
'.byte_enable == 0xFF;' # Read mask
'} OIS_TEST_H;')
wac('EXT_MODE', 0xc009) # Switch to IO register page
wac('IO_IF_CONF', 0x0000) # Disable OIS SPI4 interface
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T04_20_OIS_test_V1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
rdi.hwRelay().pin("ASDX").setOn("AC").setOff("DC,PPMU").execute();
RDI_BEGIN(mode);
rdi.burstId("T04_20_OIS_test_V1_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T04_20_OIS_test_V1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T04_20_OIS_test_V1", T04_20_OIS_test_V1);
|
generate cpp file from given test case python file
|
#############################################################################################################
# Description:
# - Enable secondary interface OIS, SPI4 mode 0 @10MHz
# - Read OIS test register via secondary interface
# - Disable secondary interface
#############################################################################################################
cmt('Version info: $Revision: 4 $ $Author: luz3sgh $ $Date: 2024/06/24 06:54:38 GMT $')
def register_read():
CMT('Read through OIS interface from OIS_TEST_L/H using SPI4 protocol')
scmd('var OIS_TEST_L : OIS_TEST_L vr_ad_reg;'
'var OIS_TEST_H : OIS_TEST_H vr_ad_reg;'
'read_reg {'
'.driver == driver.rsd_ois;'
'.byte_enable == 0xFFFF;' # Read mask
'} OIS_TEST_L;'
'read_reg {'
'.driver == driver.rsd_ois;'
'.byte_enable == 0xFFFF;' # Read mask
'} OIS_TEST_H;')
wac('EXT_MODE', 0xc009) # Switch to IO register page
wcb('disable_sec_if', 0x0) # Ensure secondary IF is not disabled (default=0x0)
wac('IO_IF_CONF', 0x0008) # Enable OIS SPI4 interface
wac('EXT_MODE', 0xc000) # Switch to USR register page
cmt('There are two OIS read operations in register_read sequence,expect 0xAA & 0x55')
# OCSB Setup Time SPI4 mode 0
CMT('Test OCSB Setup Time in SPI4 mode 0 (CPOL = 0 and CPHA = 0)')
CMT('Use signal and timing conventions compliant with SPI4 mode 0 according test spec')
CMT('Execute the sequences "register_read"')
CMT('If pattern pass: In "register_read" shift falling edges of OCSB signal to the right')
CMT('relative to ASCX rising edges in 1 ns steps and repeat "register_read"')
CMT('If pattern fail: Record the time T_SETUP_OCSB_M0 at which "register_read" passed')
CMT('for the last time')
CMT('Start sequence "register_read"')
register_read()
CMT('Stop sequence "register_read"')
# OCSB Hold Time SPI4 mode 0
CMT('Test OCSB Hold Time in SPI4 mode 0 (CPOL = 0 and CPHA = 0)')
CMT('Use signal and timing conventions compliant with SPI4 mode 0 according test spec')
CMT('Execute the sequences "register_read"')
CMT('If pattern pass: In "register_read" shift rising edges of OCSB signal to the left')
CMT('relative to ASCX rising edges in 1 ns steps and repeat "register_read"')
CMT('If pattern fail: Record the time T_HOLD_OCSB_M0 at which "register_read" passed')
CMT('for the last time')
CMT('Start sequence "register_read"')
register_read()
CMT('Stop sequence "register_read"')
# ASDX Setup Time SPI4 mode 0
CMT('Test ASDX Setup Time in SPI4 mode 0 (CPOL = 0 and CPHA = 0)')
CMT('Use signal and timing conventions compliant with SPI4 mode 0 according test spec')
CMT('Execute the sequences "register_read"')
CMT('If pattern pass: In "register_read" shift all edges of ASDX signal to the right')
CMT('relative to ASCX edges in 1 ns steps and repeat "register_read"')
CMT('If pattern fail: Record the time T_SETUP_ASDX_M0 at which "register_read" passed')
CMT('for the last time')
CMT('Start sequence "register_read"')
register_read()
CMT('Stop sequence "register_read"')
# ASDX Hold Time SPI4 mode 0
CMT('Test ASDX Hold Time in SPI4 mode 0 (CPOL = 0 and CPHA = 0)')
CMT('Use signal and timing conventions compliant with SPI4 mode 0 according test spec')
CMT('Execute the sequences "register_read"')
CMT('If pattern pass: In "register_read" shift all edges of ASDX signal to the left')
CMT('relative to ASCX edges in 1 ns steps and repeat "register_read"')
CMT('If pattern fail: Record the time T_HOLD_ASDX_M0 at which "register_read" passed')
CMT('for the last time')
CMT('Start sequence "register_read"')
register_read()
CMT('Stop sequence "register_read"')
# OSDO Delay Time SPI4 mode 0
CMT('Test OSDO Delay Time in SPI4 mode 0 (CPOL = 0 and CPHA = 0)')
CMT('Use signal and timing conventions compliant with SPI4 mode 0 according test spec')
CMT('Set default OSDO strobe point in ATE')
CMT('Execute the sequence "register_read"')
CMT('If pattern pass: In "register_read" shift all OSDO strobe points to the left')
CMT('relative to ASCX falling edges in 1 ns steps and repeat "register_read"')
CMT('If pattern fail: Record the time T_DELAY_OSDO_M0 at which "register_read" passed')
CMT('for the last time')
CMT('Start sequence "register_read"')
register_read()
CMT('Stop sequence "register_read"')
# clean -up
wac('EXT_MODE', 0xc009) # Switch to IO register page
wac('IO_IF_CONF', 0x0000) # Disable OIS SPI4 interface
|
#include "testmethod.hpp"
//for test method API interfaces (any system include should be added above this line)
#include "mapi.hpp"
#include "../Common.hpp"
//for MTP test method API interfaces
using namespace std;
/**
* Test method class.
*
* For each testsuite using this test method, one object of this
* class is created.
*/
class T04_21_OIS_Char_M0: public testmethod::TestMethod {
protected:
int mSPI_mode;
int i_funcRes[xNSitES];
double d_T_SETUP_CSB[xNSitES];
double d_T_HOLD_CSB[xNSitES];
double d_T_SETUP_SDI[xNSitES];
double d_T_HOLD_SDI[xNSitES];
double d_T_DELAY_SDO[xNSitES];
double d_T_HOLD_SDO[xNSitES];
double d_F_SCK[xNSitES];
double d_T_LOW_SCX[xNSitES];
double d_T_HIGH_SCX[xNSitES];
string mCSBpin;
string mSCLKpin;
string mMOSIpin;
string mMISOpin;
/**
*Initialize the parameter interface to the testflow.
*This method is called just once after a testsuite is created.
*/
virtual void initialize()
{
//Add your initialization code here
//Note: Test Method API should not be used in this method!
addParameter("SPI_mode",
"int",
&mSPI_mode,
testmethod::TM_PARAMETER_INPUT)
.setDefault("0");
addParameter("CSBpin",
"string",
&mCSBpin,
testmethod::TM_PARAMETER_INPUT)
.setDefault("OCSB");
addParameter("SCLKpin",
"string",
&mSCLKpin,
testmethod::TM_PARAMETER_INPUT)
.setDefault("ASCX");
addParameter("MOSIpin",
"string",
&mMOSIpin,
testmethod::TM_PARAMETER_INPUT)
.setDefault("ASDX");
addParameter("MISOpin",
"string",
&mMISOpin,
testmethod::TM_PARAMETER_INPUT)
.setDefault("OSDO");
}
/**
*This test is invoked per site.
*/
virtual void run()
{
const string pat_name[4] = {"T04_21_OIS_Char_M0", "", "", "T04_22_OIS_Char_M3" };
const string s_Label_Init = pat_name[mSPI_mode]+"_Init";
const string s_Label_Set = pat_name[mSPI_mode]+"_register_read";
static int i_func_results[xNSitES][5];
static double d_TransitionTime1[xNSitES], d_TransitionTime2[xNSitES], d_TransitionTime3[xNSitES], d_TransitionTime4[xNSitES], d_TransitionTime5[xNSitES];
SEARCH_FUNC_TASK TASK_spec1, TASK_spec2, TASK_spec3, TASK_spec4, TASK_spec5;
int i_PassFail;
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(d_T_SETUP_CSB, -999.0, xNSitES);
Func_Init_Var(d_T_HOLD_CSB, -999.0, xNSitES);
Func_Init_Var(d_T_SETUP_SDI, -999.0, xNSitES);
Func_Init_Var(d_T_HOLD_SDI, -999.0, xNSitES);
Func_Init_Var((int**)i_func_results, -999, xNSitES, 5);
Func_Init_Var(d_TransitionTime1, -999.0, xNSitES);
Func_Init_Var(d_TransitionTime2, -999.0, xNSitES);
Func_Init_Var(d_TransitionTime3, -999.0, xNSitES);
Func_Init_Var(d_TransitionTime4, -999.0, xNSitES);
Func_Init_Var(d_TransitionTime5, -999.0, xNSitES);
Primary.label(s_Label_Init);
FLUSH();
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_func_results[curSite][0] = GET_FUNCTIONAL_RESULT();
Func_Print(i_func_results[curSite][0], "i_func_results[0]");
FOR_EACH_SITE_END();
Primary.timing(TIMING_SPEC(43,1));
FLUSH(TM::APRM);
//*************************CSB Setup Time OIS*************************
Primary.label(s_Label_Set);
FLUSH(TM::APRM);
TASK_spec1.pin(mCSBpin).spec("delay1",TM::TIM).method(TM::Linear).start(0).stop(100).stepWidth(1);
TASK_spec1.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec1.getPassFail(mCSBpin);
if(i_PassFail)
{
d_TransitionTime1[curSite] = TASK_spec1.getPassValue(mCSBpin);
d_T_SETUP_CSB[curSite] = (50 - d_TransitionTime1[curSite]) ; //unit ns
Func_Print(d_TransitionTime1[curSite], "Org TransitionTime1");
Func_Print(d_T_SETUP_CSB[curSite], "d_T_SETUP_CSB");
}
FOR_EACH_SITE_END();
//*************************CSB Hold Time OIS*************************
// Primary.getTimingSpec().change("delay5", -50);
Primary.label(s_Label_Set);
Primary.getTimingSpec().restore();
FLUSH(TM::APRM);
TASK_spec2.pin(mCSBpin).spec("delay2",TM::TIM).method(TM::Linear).start(0).stop(-100).stepWidth(1);
TASK_spec2.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec2.getPassFail(mCSBpin);
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime2[curSite] = TASK_spec2.getPassValue(mCSBpin);
d_T_HOLD_CSB[curSite] = (50 + d_TransitionTime2[curSite]) ; //unit s
Func_Print(d_TransitionTime2[curSite], "Org TransitionTime2");
Func_Print(d_T_HOLD_CSB[curSite], "d_T_HOLD_CSB");
}
FOR_EACH_SITE_END();
//*************************SDI Setup Time OIS*************************
Primary.label(s_Label_Set);
Primary.getTimingSpec().restore();
FLUSH(TM::APRM);
TASK_spec3.pin(mMOSIpin).spec("delay3",TM::TIM).method(TM::Linear).start(0).stop(100).stepWidth(1);
TASK_spec3.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec3.getPassFail(mMOSIpin);
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime3[curSite] = TASK_spec3.getPassValue(mMOSIpin);
d_T_SETUP_SDI[curSite] = (50 - d_TransitionTime3[curSite]) ; //unit s
Func_Print(d_TransitionTime3[curSite], "Org TransitionTime3");
Func_Print(d_T_SETUP_SDI[curSite], "d_T_SETUP_SDI");
}
FOR_EACH_SITE_END();
//*************************SDI Hold Time OIS*************************
Primary.label(s_Label_Set);
Primary.getTimingSpec().restore();
FLUSH();
TASK_spec4.pin(mMOSIpin).spec("delay3",TM::TIM).method(TM::Linear).start(0).stop(-100).stepWidth(1);
TASK_spec4.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec4.getPassFail(mMOSIpin);
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime4[curSite] = TASK_spec4.getPassValue(mMOSIpin);
d_T_HOLD_SDI[curSite] = (50 + d_TransitionTime4[curSite]) ; //unit s
Func_Print(d_TransitionTime4[curSite], "Org TransitionTime4");
Func_Print(d_T_HOLD_SDI[curSite], "d_T_HOLD_SDI");
}
FOR_EACH_SITE_END();
//*************************SDO Delay Time OIS*************************
Primary.getTimingSpec().restore();
Primary.label(s_Label_Set);
FLUSH();
// TASK_spec5.pin("SDO").spec("delay5",TM::TIM).method(TM::Binary).start(0).stop(-82).resolution(0.5);
TASK_spec5.pin(mMISOpin).spec("delay5",TM::TIM).method(TM::Linear).start(0).stop(-100).stepWidth(1);
TASK_spec5.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec5.getPassFail(mMISOpin);
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime5[curSite] = TASK_spec5.getPassValue(mMISOpin);
d_T_DELAY_SDO[curSite] = (0.5*100 + d_TransitionTime5[curSite]) ; //unit s
Func_Print(d_TransitionTime5[curSite], "Org TransitionTime5");
Func_Print(d_T_DELAY_SDO[curSite], "d_T_DELAY_SDO");
}
FOR_EACH_SITE_END();
FOR_EACH_SITE_BEGIN();
i_funcRes[curSite] = i_func_results[curSite][0];
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
Func_Print(i_funcRes[curSite], "i_funcRes");
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
TestLog("T_SETUP_"+mCSBpin+"_M"+rdi.itos(mSPI_mode), d_T_SETUP_CSB[curSite]*1e-9);
TestLog("T_HOLD_"+mCSBpin+"_M"+rdi.itos(mSPI_mode), d_T_HOLD_CSB[curSite]*1e-9);
TestLog("T_SETUP_"+mMOSIpin+"_M"+rdi.itos(mSPI_mode), d_T_SETUP_SDI[curSite]*1e-9);
TestLog("T_HOLD_"+mMOSIpin+"_M"+rdi.itos(mSPI_mode), d_T_HOLD_SDI[curSite]*1e-9);
TestLog("T_DELAY_"+mMISOpin+"_M"+rdi.itos(mSPI_mode), d_T_DELAY_SDO[curSite]*1e-9);
return;
}
/**
*This function will be invoked once the specified parameter's value is changed.
*@param parameterIdentifier
*/
virtual void postParameterChange(const string& parameterIdentifier)
{
//Add your code
//Note: Test Method API should not be used in this method!
return;
}
/**
*This function will be invoked once the Select Test Method Dialog is opened.
*/
virtual const string getComment() const
{
string comment = " please add your comment for this method.";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T04_21_OIS_Char_M0", T04_21_OIS_Char_M0);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: luz3sgh $ $Date: 2024/08/13 06:12:21 GMT $')
wr('EXT_MODE', 0xc000) # Switch to USR register page
wr('OCP_MASK', 0x0001) # Set masking register
wr('IO_IF_CONF', 0x0001) # Enable SPI3 mode
dly(10e-6)
rac('IO_IF_CONF', 0x0001, 0x0001) # Check setting of SPI3 mode
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T04_30_switch_SPI4_to_SPI3_V1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T04_30_switch_SPI4_to_SPI3_V1_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T04_30_switch_SPI4_to_SPI3_V1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T04_30_switch_SPI4_to_SPI3_V1", T04_30_switch_SPI4_to_SPI3_V1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
wr('EXT_MODE', 0xc000) # Switch to USR register page
wr('OCP_MASK', 0x0001) # Set masking register
wr('IO_IF_CONF', 0x0000) # Enable SPI4 mode
dly(10e-6)
rac('IO_IF_CONF', 0x0000, 0x0001) # Check setting of SPI4 mode
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T04_31_switch_SPI3_to_SPI4_V1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T04_31_switch_SPI3_to_SPI4_V1_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T04_31_switch_SPI3_to_SPI4_V1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T04_31_switch_SPI3_to_SPI4_V1", T04_31_switch_SPI3_to_SPI4_V1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 3 $ $Author: luz3sgh $ $Date: 2024/06/09 06:02:00 GMT $')
sav('VDD', 0.0)
sav('VDDIO', 0.0)
dly(1e-3)
for p in ['CSB','SCX','SDX','SDO','INT1','INT2','OCSB','ASCX','ASDX','OSDO']:
sac('{}'.format(p), 100e-6, i_range = 200e-6, v_comp_p=1.0, v_comp_n=0.0)
dly(100e-6)
gav('V_CONT_{}'.format(p), '{}'.format(p))
uac('{}'.format(p))
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: LSN3SGH, py 4
* Update: LSN3SGH, py 7--20230328
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T06_01_Continuity_test: public testmethod::TestMethod {
protected:
string OD_Pads;
string supply_Pads;
virtual void initialize()
{
addParameter("supply_Pads_string",
"PinString",
&supply_Pads,
testmethod::TM_PARAMETER_INPUT)
.setDefault("VDDIO,VDD");
addParameter("OD_Pads_string",
"PinString",
&OD_Pads,
testmethod::TM_PARAMETER_INPUT)
.setDefault("CSB,SCX,SDX,SDO,INT1,INT2,OCSB,ASCX,ASDX,OSDO");
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
string rly={"K1_K2"};
string rly_all={"K1_K2,K3,K4,K5,K6,K7,K8,K9"};
STRING_VECTOR supply_str,od_str;
supply_str=PinUtility.getDigitalPinNamesFromPinList(supply_Pads, TM::ALL_DIGITAL, TRUE, TRUE, PIN_UTILITY::DEFINITION_ORDER);
od_str=PinUtility.getDigitalPinNamesFromPinList(OD_Pads, TM::ALL_DIGITAL, TRUE, TRUE, PIN_UTILITY::DEFINITION_ORDER);
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
rdi.enableOre(oreFlag);
rdi.oreFile("./ORE_Files/rdi_ore_T06_01_Continuity_test.xml");
rdi.util().pin(rly_all).setOff().execute();
rdi.util().pin(rly).setOn().execute();
rdi.wait(2 ms);
rdi.dc().pin("All_AVI64").disconnect().execute();
RDI_BEGIN(mode);
rdi.dc().pin(OD_Pads).vForce(0 V).iRange(40 mA).execute();
rdi.dc().pin(supply_Pads).vForce(0 V).clamp(-0.1 mA, 0.1 mA).execute();
rdi.wait(20 us);
for(unsigned int i=0; i<od_str.size(); i++)
{
rdi.dc(od_str[i]).pin(od_str[i]).iForce(0.1 mA).clamp(-2 V, 2 V).vMeas().average(32).measWait(1 ms).execute();
rdi.dc().pin(od_str[i]).vForce(0 V).clamp(-0.1 mA, 0.1 mA).execute();
rdi.wait(5 ms);
}
rdi.hwRelay().pin("ALL_PS1600").setOff("ALL").execute();
RDI_END();
// rdi.dc().pin("All_AVI64").disconnect().execute();
ON_FIRST_INVOCATION_END();
ARRAY_D V_meas;
V_meas.resize(od_str.size());
for(unsigned int i=0; i<od_str.size(); i++)
{
V_meas[i] = rdi.id(od_str[i]).getValue(od_str[i]);
FuncPrint("V_CONT_"+ od_str[i], V_meas[i]);
}
for(unsigned int i=0; i<od_str.size(); i++)
{
TestLog("V_CONT_"+ od_str[i], V_meas[i]);
}
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T06_01_Continuity_test", T06_01_Continuity_test);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 3 $ $Author: luz3sgh $ $Date: 2024/06/09 06:02:00 GMT $')
sav('VDD', 0.0)
sav('VDDIO', 0.0)
dly(1e-3)
cmt("Pull current from 1 single pad")
sac('SDO', -100e-6, i_range = 200e-6, v_comp_p=1.0, v_comp_n=0.0)
dly(100e-6)
gav('V_CONT_SDO_100ua_gnd', 'SDO')
uac('SDO')
cmt("Pull current from 1 single pad + 5 extra pads")
for p in ['CSB','SCX','SDX','ASCX','ASDX','SDO']:
sac('{}'.format(p), -100e-6, i_range = 200e-6, v_comp_p=1.0, v_comp_n=0.0)
dly(100e-6)
gav('V_CONT_SDO_600ua_gnd','SDO')
uac('{}'.format(p))
#CALC
calc('i_delta','V_CONT_SDO_600ua_gnd','-','V_CONT_SDO_100ua_gnd')
calc('r_gnd','i_delta','/',"-500e-6")
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: LSN3SGH, py 4
* Update: LSN3SGH, py 7--20230328
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T06_01_Continuity_test_rgnd_measure: public testmethod::TestMethod {
protected:
string OD_Pads;
string supply_Pads;
virtual void initialize()
{
addParameter("supply_Pads_string",
"PinString",
&supply_Pads,
testmethod::TM_PARAMETER_INPUT)
.setDefault("VDDIO,VDD");
addParameter("OD_Pads_string",
"PinString",
&OD_Pads,
testmethod::TM_PARAMETER_INPUT)
.setDefault("CSB,SCX,SDX,SDO,INT1,INT2,OCSB,ASCX,ASDX,OSDO");
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
string rly={"K1_K2"};
string rly_all={"K1_K2,K3,K4,K5,K6,K7,K8,K9"};
STRING_VECTOR supply_str,od_str;
supply_str=PinUtility.getDigitalPinNamesFromPinList(supply_Pads, TM::ALL_DIGITAL, TRUE, TRUE, PIN_UTILITY::DEFINITION_ORDER);
od_str=PinUtility.getDigitalPinNamesFromPinList(OD_Pads, TM::ALL_DIGITAL, TRUE, TRUE, PIN_UTILITY::DEFINITION_ORDER);
RDI_INIT();
const double force_current1 = -10e-3;
const double force_current2 = -20e-3;
ON_FIRST_INVOCATION_BEGIN();
rdi.util().pin(rly_all).setOff().execute();
rdi.util().pin(rly).setOn().execute();
rdi.wait(2 ms);
rdi.dc().pin("All_AVI64").disconnect().execute();
rdi.hwRelay().pin("ALL_PS1600").setOff("ALL").execute();
rdi.dc().pin(supply_Pads).vForce(0 V).clamp(-40 mA, 40 mA).execute();
// RDI_BEGIN(mode);
rdi.dc("V_CONT_SDO_force1").pin("SDO").iForce(force_current1).clamp(-2 V, 2 V).vMeas().average(256).measWait(10 ms).execute();
rdi.wait(1 ms);
rdi.dc().pin("CSB,SCX,SDX,ASCX,ASDX,SDO").iForce(force_current1).execute();
rdi.dc("V_CONT_SDO_force1_X6").pin("SDO").iForce(force_current1).clamp(-2 V, 2 V).vMeas().average(256).measWait(10 ms).execute();
rdi.hwRelay().pin("ALL_PS1600").setOff("ALL").execute();
rdi.dc().pin(supply_Pads).vForce(0 V).clamp(-40 mA, 40 mA).execute();
rdi.dc("V_CONT_SDO_force2").pin("SDO").iForce(force_current2).clamp(-2 V, 2 V).vMeas().average(256).measWait(10 ms).execute();
rdi.wait(1 ms);
rdi.dc().pin("CSB,SCX,SDX,ASCX,ASDX,SDO").iForce(force_current2).execute();
rdi.dc("V_CONT_SDO_force2_X6").pin("SDO").iForce(force_current2).clamp(-2 V, 2 V).vMeas().average(256).measWait(10 ms).execute();
rdi.hwRelay().pin("ALL_PS1600").setOff("ALL").execute();
// RDI_END();
// rdi.dc().pin("All_AVI64").disconnect().execute();
ON_FIRST_INVOCATION_END();
double V_CONT_SDO_force1 = rdi.id("V_CONT_SDO_force1").getValue();
double V_CONT_SDO_force1_X6 = rdi.id("V_CONT_SDO_force1_X6").getValue();
double v_delta_force1 = V_CONT_SDO_force1_X6 - V_CONT_SDO_force1;
double r_gnd_force1 = v_delta_force1 / (force_current1 * 5);
double V_CONT_SDO_force2 = rdi.id("V_CONT_SDO_force2").getValue();
double V_CONT_SDO_force2_X6 = rdi.id("V_CONT_SDO_force2_X6").getValue();
double v_delta_force2 = V_CONT_SDO_force2_X6 - V_CONT_SDO_force2;
double r_gnd_force2 = v_delta_force2 / (force_current2 * 5);
FuncPrint("force_current1", force_current1);
FuncPrint("V_CONT_SDO_force1", V_CONT_SDO_force1);
FuncPrint("V_CONT_SDO_force1_X6", V_CONT_SDO_force1_X6);
FuncPrint("v_delta_force1", v_delta_force1);
FuncPrint("r_gnd_force1", r_gnd_force1);
FuncPrint("force_current2", force_current2);
FuncPrint("V_CONT_SDO_force2", V_CONT_SDO_force2);
FuncPrint("V_CONT_SDO_force2_X6", V_CONT_SDO_force2_X6);
FuncPrint("v_delta_force2", v_delta_force2);
FuncPrint("r_gnd_force2", r_gnd_force2);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T06_01_Continuity_test_rgnd_measure", T06_01_Continuity_test_rgnd_measure);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/2 $ $Author: luz3sgh $ $Date: 2024/08/19 06:26:50 GMT $')
wac('EXT_MODE', 0xc009) # Switch to IO register page
wac('IO_INT_CTRL', 0x0808) # int2_conf=1 int2_input_en=1 int1_input_en=1
for pad in ['CSB','SCX','SDX']: # SPI inputs
ubw('{}'.format(pad)) # dig_out_en= 0
for pad in ['CSB','SCX','SDX','INT1','INT2']:
sav('{}'.format(pad), 0.0)
dly(100e-6) # one time for all PADs
cmt('Check if parallel measurements possible')
for pad in ['CSB','SCX','SDX','INT1','INT2']:
gac('I_LEAK_PU_{}'.format(pad), '{}'.format(pad), i_range=2e-6)
log('I_LEAK_PU_{}'.format(pad))
for pad in ['CSB','SCX','SDX','INT1','INT2']:
sav('{}'.format(pad), 1.8)
dly(100e-6) # one time for all PADs
for pad in ['CSB','SCX','SDX','INT1','INT2']:
gac('I_LEAK_PD_{}'.format(pad), '{}'.format(pad), i_range=2e-6)
log('I_LEAK_PD_{}'.format(pad))
for pad in ['CSB','SCX','SDX','INT1','INT2']:
uav('{}'.format(pad))
bw('CSB',1) # dig_out_en= 1
bw('SCX',0) # dig_out_en= 1
bw('SDX',0) # dig_out_en= 1
wr('IO_IF_CONF', 0x000A) # sec_if_conf 2, ois eanbled, sec_spi_mode 1, ois spi 3 wire, pri_spi 0, spi4
dly(2e-3)
wr('IO_IF_CONF', 0x000A) # sec_if_conf 2, ois eanbled, sec_spi_mode 1, ois spi 3 wire, pri_spi 0, spi4
dly(2e-3)
rac('IO_IF_CONF', 0x000A) # sec_if_conf 2, ois eanbled, sec_spi_mode 1, ois spi 3 wire, pri_spi 0, spi4
wr('IO_TEST_IF', 0x0001) # force_mode=1 (SPI_OIS) configure ASCX, ASDX, OCSB as inputs
# read back not possible (due to force_mode=1 (SPI_OIS))
for pad in ['OCSB','ASCX','ASDX']:
sav('{}'.format(pad), 0.0)
dly(100e-6) # one time for all PADs
cmt('Check if parallel measurements possible')
for pad in ['OCSB','ASCX','ASDX']:
gac('I_LEAK_PU_{}'.format(pad), '{}'.format(pad), i_range=2e-6)
log('I_LEAK_PU_{}'.format(pad))
for pad in ['OCSB','ASCX','ASDX']:
sav('{}'.format(pad), 1.8)
dly(100e-6) # one time for all PADs
for pad in ['OCSB','ASCX','ASDX']:
gac('I_LEAK_PD_{}'.format(pad), '{}'.format(pad), i_range=2e-6)
log('I_LEAK_PD_{}'.format(pad))
for pad in ['OCSB','ASCX','ASDX']:
uav('{}'.format(pad))
wac('IO_IF_CONF', 0x0000) # reset values
wac('IO_INT_CTRL', 0x0000) # reset values
wac('IO_TEST_IF', 0x0000) # reset values
# switch to I2C
# Note: SDO is not configured as input during this measurement
# Note: There is no possibility to configure SDO as input permanently
wr('EXT_MODE', 0xc00d) # Switch to ANA register page
dly(2e-3)
rac('EXT_MODE', 0xc00d) # Switch to ANA register page
rac('STATUS_PMOD0', 0x0003, 0x0003) # Check ACC AFE PMU status
wr('CMD', 0xdeaf) # Trigger soft reset
dly(3e-3)
sav('SDO', 0.0)
dly(100e-6)
gac('I_LEAK_PU_SDO', 'SDO', i_range=2e-6)
sav('SDO', 1.8)
dly(100e-6)
gac('I_LEAK_PD_SDO', 'SDO', i_range=2e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T06_02_Input_Leakage_Test_V7: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double I_LEAK_PU_CSB[xNSitES];
static double I_LEAK_PU_SCX[xNSitES];
static double I_LEAK_PU_SDX[xNSitES];
static double I_LEAK_PU_INT1[xNSitES];
static double I_LEAK_PU_INT2[xNSitES];
static double I_LEAK_PD_CSB[xNSitES];
static double I_LEAK_PD_SCX[xNSitES];
static double I_LEAK_PD_SDX[xNSitES];
static double I_LEAK_PD_INT1[xNSitES];
static double I_LEAK_PD_INT2[xNSitES];
static double I_LEAK_PU_OCSB[xNSitES];
static double I_LEAK_PU_ASCX[xNSitES];
static double I_LEAK_PU_ASDX[xNSitES];
static double I_LEAK_PD_OCSB[xNSitES];
static double I_LEAK_PD_ASCX[xNSitES];
static double I_LEAK_PD_ASDX[xNSitES];
static double I_LEAK_PU_SDO[xNSitES];
static double I_LEAK_PD_SDO[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T06_02_Input_Leakage_Test_V7_PAT_id");
rdi.dc("T06_02_Input_Leakage_Test_V7DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("CSB,SCX,SDX,INT1,INT2").vForce(0.0)
.insertSub(i_comment_line0[1]).pin("CSB,SCX,SDX,INT1,INT2").vForce(0 V).iMeas().valueMode(TA::BADC).iRange(2e-06 A).average(16).measWait(0.1 ms) //I_LEAK_PU_CSB
.insertSub(i_comment_line0[6]).pin("CSB,SCX,SDX,INT1,INT2").vForce(1.8)
.insertSub(i_comment_line0[7]).pin("CSB,SCX,SDX,INT1,INT2").vForce(1.8 V).iMeas().valueMode(TA::BADC).iRange(2e-06 A).average(16).measWait(0.1 ms) //I_LEAK_PD_CSB
.insertSub(i_comment_line0[12]).pin("CSB,SCX,SDX,INT1,INT2").relay(TA::ppmuRly_onAC_offDCPPMU)
.insertSub(i_comment_line0[13]).pin("OCSB,ASCX,ASDX").vForce(0.0)
.insertSub(i_comment_line0[14]).pin("OCSB,ASCX,ASDX").vForce(0 V).iMeas().valueMode(TA::BADC).iRange(2e-06 A).average(16).measWait(0.1 ms) //I_LEAK_PU_OCSB
.insertSub(i_comment_line0[17]).pin("OCSB,ASCX,ASDX").vForce(1.8)
.insertSub(i_comment_line0[18]).pin("OCSB,ASCX,ASDX").vForce(1.8 V).iMeas().valueMode(TA::BADC).iRange(2e-06 A).average(16).measWait(0.1 ms) //I_LEAK_PD_OCSB
.insertSub(i_comment_line0[21]).pin("OCSB,ASCX,ASDX").relay(TA::ppmuRly_offALL)
.insertSub(i_comment_line0[22]).pin("SDO").vForce(0.0)
.insertSub(i_comment_line0[23]).pin("SDO").vForce(0 V).iMeas().valueMode(TA::BADC).iRange(2e-06 A).average(16).measWait(0.1 ms) //I_LEAK_PU_SDO
.insertSub(i_comment_line0[23]).pin("SDO").vForce(1.8)
.insertSub(i_comment_line0[24]).pin("SDO").vForce(1.8 V).iMeas().valueMode(TA::BADC).iRange(2e-06 A).average(16).measWait(0.1 ms) //I_LEAK_PD_SDO
.insertSub(i_comment_line0[24]).pin("SDO").relay(TA::ppmuRly_onAC_offDCPPMU)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
ARRAY_D JSUB_results_ASCX;
JSUB_results_ASCX = rdi.id("T06_02_Input_Leakage_Test_V7DC_id0").getMultiValue("ASCX");
ARRAY_D JSUB_results_CSB;
JSUB_results_CSB = rdi.id("T06_02_Input_Leakage_Test_V7DC_id0").getMultiValue("CSB");
ARRAY_D JSUB_results_ASDX;
JSUB_results_ASDX = rdi.id("T06_02_Input_Leakage_Test_V7DC_id0").getMultiValue("ASDX");
ARRAY_D JSUB_results_SDO;
JSUB_results_SDO = rdi.id("T06_02_Input_Leakage_Test_V7DC_id0").getMultiValue("SDO");
ARRAY_D JSUB_results_SCX;
JSUB_results_SCX = rdi.id("T06_02_Input_Leakage_Test_V7DC_id0").getMultiValue("SCX");
ARRAY_D JSUB_results_SDX;
JSUB_results_SDX = rdi.id("T06_02_Input_Leakage_Test_V7DC_id0").getMultiValue("SDX");
ARRAY_D JSUB_results_OCSB;
JSUB_results_OCSB = rdi.id("T06_02_Input_Leakage_Test_V7DC_id0").getMultiValue("OCSB");
ARRAY_D JSUB_results_INT1;
JSUB_results_INT1 = rdi.id("T06_02_Input_Leakage_Test_V7DC_id0").getMultiValue("INT1");
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T06_02_Input_Leakage_Test_V7DC_id0").getMultiValue("INT2");
I_LEAK_PU_CSB[CURRENT_SITE_NUMBER()-1] = JSUB_results_CSB[0];
I_LEAK_PU_SCX[CURRENT_SITE_NUMBER()-1] = JSUB_results_SCX[0];
I_LEAK_PU_SDX[CURRENT_SITE_NUMBER()-1] = JSUB_results_SDX[0];
I_LEAK_PU_INT1[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT1[0];
I_LEAK_PU_INT2[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[0];
I_LEAK_PD_CSB[CURRENT_SITE_NUMBER()-1] = JSUB_results_CSB[1];
I_LEAK_PD_SCX[CURRENT_SITE_NUMBER()-1] = JSUB_results_SCX[1];
I_LEAK_PD_SDX[CURRENT_SITE_NUMBER()-1] = JSUB_results_SDX[1];
I_LEAK_PD_INT1[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT1[1];
I_LEAK_PD_INT2[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[1];
I_LEAK_PU_OCSB[CURRENT_SITE_NUMBER()-1] = JSUB_results_OCSB[0];
I_LEAK_PU_ASCX[CURRENT_SITE_NUMBER()-1] = JSUB_results_ASCX[0];
I_LEAK_PU_ASDX[CURRENT_SITE_NUMBER()-1] = JSUB_results_ASDX[0];
I_LEAK_PD_OCSB[CURRENT_SITE_NUMBER()-1] = JSUB_results_OCSB[1];
I_LEAK_PD_ASCX[CURRENT_SITE_NUMBER()-1] = JSUB_results_ASCX[1];
I_LEAK_PD_ASDX[CURRENT_SITE_NUMBER()-1] = JSUB_results_ASDX[1];
I_LEAK_PU_SDO[CURRENT_SITE_NUMBER()-1] = JSUB_results_SDO[0];
I_LEAK_PD_SDO[CURRENT_SITE_NUMBER()-1] = JSUB_results_SDO[1];
int Func_result = rdi.id("T06_02_Input_Leakage_Test_V7_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
FuncPrint("I_LEAK_PU_CSB", I_LEAK_PU_CSB[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PU_SCX", I_LEAK_PU_SCX[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PU_SDX", I_LEAK_PU_SDX[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PU_INT1", I_LEAK_PU_INT1[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PU_INT2", I_LEAK_PU_INT2[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PD_CSB", I_LEAK_PD_CSB[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PD_SCX", I_LEAK_PD_SCX[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PD_SDX", I_LEAK_PD_SDX[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PD_INT1", I_LEAK_PD_INT1[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PD_INT2", I_LEAK_PD_INT2[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PU_OCSB", I_LEAK_PU_OCSB[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PU_ASCX", I_LEAK_PU_ASCX[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PU_ASDX", I_LEAK_PU_ASDX[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PD_OCSB", I_LEAK_PD_OCSB[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PD_ASCX", I_LEAK_PD_ASCX[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PD_ASDX", I_LEAK_PD_ASDX[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PU_SDO", I_LEAK_PU_SDO[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_LEAK_PD_SDO", I_LEAK_PD_SDO[CURRENT_SITE_NUMBER()-1]);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("I_LEAK_PU_CSB", I_LEAK_PU_CSB[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PU_SCX", I_LEAK_PU_SCX[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PU_SDX", I_LEAK_PU_SDX[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PU_INT1", I_LEAK_PU_INT1[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PU_INT2", I_LEAK_PU_INT2[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PD_CSB", I_LEAK_PD_CSB[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PD_SCX", I_LEAK_PD_SCX[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PD_SDX", I_LEAK_PD_SDX[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PD_INT1", I_LEAK_PD_INT1[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PD_INT2", I_LEAK_PD_INT2[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PU_OCSB", I_LEAK_PU_OCSB[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PU_ASCX", I_LEAK_PU_ASCX[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PU_ASDX", I_LEAK_PU_ASDX[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PD_OCSB", I_LEAK_PD_OCSB[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PD_ASCX", I_LEAK_PD_ASCX[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PD_ASDX", I_LEAK_PD_ASDX[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PU_SDO", I_LEAK_PU_SDO[CURRENT_SITE_NUMBER()-1]);
TestLog("I_LEAK_PD_SDO", I_LEAK_PD_SDO[CURRENT_SITE_NUMBER()-1]);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T06_02_Input_Leakage_Test_V7", T06_02_Input_Leakage_Test_V7);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 3 $ $Author: hmf1rt $ $Date: 2024/04/19 13:50:33 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_CONF', 0x0001) # Enable TB1
wac('TM_PIN', 0xf0b5) # Enable ANAIO1/2/4; TB1_OUT on ANAIO1; TB1_INP on ANAIO2; DEV_TIOP on ANAIO4
wac('TM_ADDR', 0x0003) # Enable ATM loop back test
sav('OCSB', 1.0) # Set voltage stimuli of 1V on OCSB
dly(1352*74e-9)
uclk('ASCX')
bw('ASCX', 1)
cmt('Note: the absolute votage on both INT2/ASDX is ~1V, the differential voltage is close to 0V')
cmt('TOI: The measurement needs to be done with an accuracy of +/- 1mV')
dly(100e-6)
gav('V_OFF1_ECON', 'INT2', 'ASDX', v_range=0.1)
log('V_OFF1_ECON')
dly(48e-9)
ubw('ASCX')
clk('ASCX', 1/148e-9)
uav('OCSB') # Disable voltage stimuli and set to highZ configuration
dly(1352*74e-9)
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_CONF', 0x0012) # Enable TB2 + BUS_INV
wac('TM_PIN', 0xf05b) # Enable ANAIO1/2/4; TB2_OUT on ANAIO2; TB2_INP on ANAIO1; DEV_TIOP on ANAIO3
wac('TM_ADDR', 0x0003) # Enable ATM loop back test
sav('OCSB', 1.0) # Set voltage stimuli of 1V on OCSB
dly(1352*74e-9)
uclk('ASCX')
bw('ASCX', 1)
cmt('Note: the absolute votage on both INT2/ASDX is ~1V, the differential voltage is close to 0V')
cmt('TOI: The measurement needs to be done with an accuracy of +/- 1mV')
dly(1352*74e-9)
gav('V_OFF2_ECON', 'ASDX', 'INT2', v_range=0.1)
log('V_OFF2_ECON')
ubw('ASCX')
clk('ASCX', 1/148e-9)
uav('OCSB') # Disable voltage stimuli and set to highZ configuration
dly(1352*74e-9)
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T07_01_testbuffer_offset_measurement_econ_V3: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
rdi.enableOre(oreFlag);
rdi.oreFile("./ORE_Files/rdi_ore_T07_01_TESTBUFFER_OFFSET_MEASUREMENT_ECON.xml");
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T07_01_testbuffer_offset_measurement_econ_V3_PAT_id");
rdi.dc("T07_01_testbuffer_offset_measurement_econ_V3DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("OCSB").vForce(1.0)
.insertSub(i_comment_line0[1]).pin("INT2,ASDX",TA::BADC).vMeas().average(128).measWait(1 ms) //V_OFF1_ECON
.insertSub(i_comment_line0[2]).pin("OCSB").relay(TA::ppmuRly_offALL)
.insertSub(i_comment_line0[3]).pin("OCSB").vForce(1.0)
.insertSub(i_comment_line0[4]).pin("ASDX,INT2",TA::BADC).vMeas().average(128).measWait(1 ms) //V_OFF2_ECON
.insertSub(i_comment_line0[5]).pin("OCSB").relay(TA::ppmuRly_offALL)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
ARRAY_D JSUB_results_ASDX;
JSUB_results_ASDX = rdi.id("T07_01_testbuffer_offset_measurement_econ_V3DC_id0").getMultiValue("ASDX");
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T07_01_testbuffer_offset_measurement_econ_V3DC_id0").getMultiValue("INT2");
V_OFF1_ECON[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[0] - JSUB_results_ASDX[0];
V_OFF2_ECON[CURRENT_SITE_NUMBER()-1] = JSUB_results_ASDX[1] - JSUB_results_INT2[1];
int Func_result = rdi.id("T07_01_testbuffer_offset_measurement_econ_V3_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
FuncPrint("JSUB_results_ASDX_0", JSUB_results_ASDX[0]);
FuncPrint("JSUB_results_ASDX_1", JSUB_results_ASDX[1]);
FuncPrint("JSUB_results_INT2_0", JSUB_results_INT2[0]);
FuncPrint("JSUB_results_INT2_1", JSUB_results_INT2[1]);
FuncPrint("V_OFF1_ECON", V_OFF1_ECON[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_OFF2_ECON", V_OFF2_ECON[CURRENT_SITE_NUMBER()-1]);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("V_OFF1_ECON", V_OFF1_ECON[CURRENT_SITE_NUMBER()-1]);
TestLog("V_OFF2_ECON", V_OFF2_ECON[CURRENT_SITE_NUMBER()-1]);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T07_01_testbuffer_offset_measurement_econ_V3", T07_01_testbuffer_offset_measurement_econ_V3);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:27:19 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_CONF', 0x0001) # Enable TB1
wac('TM_PIN', 0x0db5) # Enable ANAIO1/2/3; TB1_OUT on ANAIO1; TB1_INP on ANAIO2; DEV_TM on ANAIO3
wac('TM_ADDR', 0x0003) # Enable ATM loop back test
sav('ASCX', 1.0) # Set voltage stimuli of 1V on ASCX
cmt('Note: the absolute votage on both INT2/ASDX is ~1V, the differential voltage is close to 0V')
cmt('TOI: The measurement needs to be done with an accuracy of +/- 1mV')
dly(100e-6)
gav('V_OFF1_ECOFF', 'INT2', 'ASDX', v_range=0.1)
log('V_OFF1_ECOFF')
uav('ASCX') # Disable voltage stimuli and set to highZ configuration
dly(100e-6)
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_CONF', 0x0012) # Enable TB2 + BUS_INV
wac('TM_PIN', 0x0d5b) # Enable ANAIO1/2/3; TB2_OUT on ANAIO2; TB2_INP on ANAIO1; DEV_TM on ANAIO3
wac('TM_ADDR', 0x0003) # Enable ATM loop back test
sav('ASCX', 1.0) # Set voltage stimuli of 1V on ASCX
cmt('Note: the absolute votage on both INT2/ASDX is ~1V, the differential voltage is close to 0V')
cmt('TOI: The measurement needs to be done with an accuracy of +/- 1mV')
dly(100e-6)
gav('V_OFF2_ECOFF', 'ASDX', 'INT2', v_range=0.1)
log('V_OFF2_ECOFF')
uav('ASCX') # Disable voltage stimuli and set to highZ configuration
dly(100e-6)
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* T07_02_testbuffer_offset_measurement_ecoff_V2, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T07_02_testbuffer_offset_measurement_ecoff_V2: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static double d_V_OFF1_ECOFF[xNSitES];
static double d_V_OFF2_ECOFF[xNSitES];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
rdi.enableOre(oreFlag);
rdi.oreFile("./ORE_Files/rdi_ore_T07_02_TESTBUFFER_OFFSET_MEASUREMENT_ECOFF.xml");
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(d_V_OFF1_ECOFF, 9.9, xNSitES);
Func_Init_Var(d_V_OFF2_ECOFF, 9.9, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T07_02_testbuffer_offset_measurement_ecoff}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 20:27:19 GMT >}
valid comment[ 1] @ avcline 778: {sav('ASCX', 1, 2, 0.01, False, False)}
valid comment[ 1] @ avcline 778: {cmt: Note: the absolute votage on both INT2/ASDX is ~1V, the differential voltage is close to 0V}
valid comment[ 1] @ avcline 778: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 2] @ avcline 788: {gav('V_OFF1_ECOFF', 'INT2', 'ASDX', 0.1, 0.0001, True)}
valid comment[ 2] @ avcline 788: {log('V_OFF1_ECOFF', '', '', 0, 0)}
valid comment[ 3] @ avcline 789: {uav('ASCX', False)}
valid comment[ 4] @ avcline 1566: {sav('ASCX', 1, 2, 0.01, False, False)}
valid comment[ 4] @ avcline 1566: {cmt: Note: the absolute votage on both INT2/ASDX is ~1V, the differential voltage is close to 0V}
valid comment[ 4] @ avcline 1566: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 5] @ avcline 1576: {gav('V_OFF2_ECOFF', 'ASDX', 'INT2', 0.1, 0.0001, True)}
valid comment[ 5] @ avcline 1576: {log('V_OFF2_ECOFF', '', '', 0, 0)}
valid comment[ 6] @ avcline 1577: {uav('ASCX', False)}
valid comment[ 7] @ avcline 2162: {Test End: T07_02_testbuffer_offset_measurement_ecoff}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][1]).pin("ASCX").vForce(1 V)//{sav('ASCX', 1, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][2]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_OFF1_ECOFF//{gav('V_OFF1_ECOFF', 'INT2', 'ASDX', 0.1, 0.0001, True)}
.insertSub(i_comment_line[0][3]).pin("ASCX").relay(TA::ppmuRly_offALL)////{uav('ASCX', False)}
.insertSub(i_comment_line[0][4]).pin("ASCX").vForce(1 V)//{sav('ASCX', 1, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][5]).pin("ASDX,INT2", TA::BADC).vMeas().average(128).measWait(1 ms)//V_OFF2_ECOFF//{gav('V_OFF2_ECOFF', 'ASDX', 'INT2', 0.1, 0.0001, True)}
.insertSub(i_comment_line[0][6]).pin("ASCX").relay(TA::ppmuRly_offALL)////{uav('ASCX', False)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
ARRAY_D ad_jsubresults_ASDX; ad_jsubresults_ASDX.resize(2); ad_jsubresults_ASDX.init(-9.9);
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(2); ad_jsubresults_INT2.init(-9.9);
ad_jsubresults_ASDX = rdi.id("dcid_0").getMultiValue("ASDX");
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
V_OFF1_ECOFF[curSite] = ad_jsubresults_INT2[0] - ad_jsubresults_ASDX[0];
V_OFF2_ECOFF[curSite] = ad_jsubresults_ASDX[1] - ad_jsubresults_INT2[1];
FuncPrint("ad_jsubresults_INT2[0]",ad_jsubresults_INT2[0]);
FuncPrint("ad_jsubresults_ASDX[0]",ad_jsubresults_ASDX[0]);
FuncPrint("ad_jsubresults_ASDX[1]",ad_jsubresults_ASDX[1]);
FuncPrint("ad_jsubresults_INT2[1]",ad_jsubresults_INT2[1]);
FuncPrint("V_OFF1_ECOFF",V_OFF1_ECOFF[curSite]);
FuncPrint("V_OFF2_ECOFF",V_OFF2_ECOFF[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
TestLog("V_OFF1_ECOFF",V_OFF1_ECOFF[curSite]);
TestLog("V_OFF2_ECOFF",V_OFF2_ECOFF[curSite]);
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T07_02_testbuffer_offset_measurement_ecoff_V2", T07_02_testbuffer_offset_measurement_ecoff_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# Description:
# Verify that the 2 testbuffer offset measurements in the test flow have the same result
#############################################################################################################
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
cmt('Get the 2 result parameters "V_OFF1_ECON" and "V_OFF2_ECON" from test item T07.01')
cmt('Get the 2 result parameters "V_OFF1_ECOFF" and "V_OFF2_ECOFF" from test item T07.02')
cmt('Calculate V_OFF1_DELTA = V_OFF1_ECON - V_OFF1_ECOFF')
log('V_OFF1_DELTA')
cmt('Calculate V_OFF2_DELTA = V_OFF2_ECON - V_OFF2_ECOFF')
log('V_OFF2_DELTA')
|
/*****************************************************
* T07_02_testbuffer_offset_measurement_ecoff_V2, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T07_03_testbuffer_offset_validation: public testmethod::TestMethod {
protected:
// int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
double V_OFF1_DELTA = V_OFF1_ECON[CURRENT_SITE_NUMBER()-1] - V_OFF1_ECOFF[CURRENT_SITE_NUMBER()-1];
double V_OFF2_DELTA = V_OFF2_ECON[CURRENT_SITE_NUMBER()-1] - V_OFF2_ECOFF[CURRENT_SITE_NUMBER()-1];
TestLog("V_OFF1_DELTA",V_OFF1_DELTA);
TestLog("V_OFF2_DELTA",V_OFF2_DELTA);
FuncPrint("V_OFF1_DELTA",V_OFF1_DELTA);
FuncPrint("V_OFF2_DELTA",V_OFF2_DELTA);
FuncPrint("V_OFF1_ECON",V_OFF1_ECON[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_OFF1_ECOFF",V_OFF1_ECOFF[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_OFF2_ECON",V_OFF2_ECON[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_OFF2_ECOFF",V_OFF2_ECOFF[CURRENT_SITE_NUMBER()-1]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T07_03_testbuffer_offset_validation", T07_03_testbuffer_offset_validation);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:27:19 GMT $')
sav('ASCX', 0.5) # Set voltage on ASCX
dly(100e-6)
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_ADDR', 0x0003) # Enable ATM loop back test
wac('TM_PIN', 0x0db5) # Enable ANAIO1/2/3; TB1_OUT on ANAIO1; TB1_INP on ANAIO2; DEV_TM on ANAIO3
wac('TM_CONF', 0x0001) # Enable TB1
cmt('Note: the absolute voltage on both INT2/ASDX is ~0.5V .. 1.7V, the differential voltage is close to 0V')
cmt('TOI: The measurement needs to be done with an accuracy of +/- 1mV')
for n in range (0, 7, 1):
sav('ASCX', 0.5+n*0.2)
dly(100e-6)
gav('V_OFF1_C[{:02d}]'.format(n), 'INT2', 'ASDX', v_range=0.1)
log('V_OFF1_C[{:02d}]'.format(n))
wac('TM_PIN', 0x0111) # Set ATM ANAIO 4 => off, 3:1 => highZ
dly(100e-6)
#sav('ASCX', 0.5) # Set voltage on ASCX
wac('TM_PIN', 0x0d5b) # Enable ANAIO1/2/3; TB2_OUT on ANAIO2; TB2_INP on ANAIO1; DEV_TM on ANAIO3
wac('TM_CONF', 0x0012) # Enable TB2 + BUS_INV
cmt('Note: the absolute voltage on both INT2/ASDX is ~0.5V .. 1.7V, the differential voltage is close to 0V')
cmt('TOI: The measurement needs to be done with an accuracy of +/- 1mV')
for n in range (0, 7, 1):
sav('ASCX', 0.5+n*0.2)
dly(100e-6)
gav('V_OFF2_C[{:02d}]'.format(n), 'ASDX', 'INT2', v_range=0.1)
log('V_OFF2_C[{:02d}]'.format(n))
uav('ASCX') # Disable voltage stimuli and set to highZ configuration
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
dly(100e-6)
|
/*****************************************************
* T07_04_Testbuffer_Voltage_Char_V2, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH: fix some bugs.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T07_04_Testbuffer_Voltage_Char_V2: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static double d_V_OFF1_C_00[xNSitES];
static double d_V_OFF1_C_01[xNSitES];
static double d_V_OFF1_C_02[xNSitES];
static double d_V_OFF1_C_03[xNSitES];
static double d_V_OFF1_C_04[xNSitES];
static double d_V_OFF1_C_05[xNSitES];
static double d_V_OFF1_C_06[xNSitES];
static double d_V_OFF2_C_00[xNSitES];
static double d_V_OFF2_C_01[xNSitES];
static double d_V_OFF2_C_02[xNSitES];
static double d_V_OFF2_C_03[xNSitES];
static double d_V_OFF2_C_04[xNSitES];
static double d_V_OFF2_C_05[xNSitES];
static double d_V_OFF2_C_06[xNSitES];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(d_V_OFF1_C_00, 9.9, xNSitES);
Func_Init_Var(d_V_OFF1_C_01, 9.9, xNSitES);
Func_Init_Var(d_V_OFF1_C_02, 9.9, xNSitES);
Func_Init_Var(d_V_OFF1_C_03, 9.9, xNSitES);
Func_Init_Var(d_V_OFF1_C_04, 9.9, xNSitES);
Func_Init_Var(d_V_OFF1_C_05, 9.9, xNSitES);
Func_Init_Var(d_V_OFF1_C_06, 9.9, xNSitES);
Func_Init_Var(d_V_OFF2_C_00, 9.9, xNSitES);
Func_Init_Var(d_V_OFF2_C_01, 9.9, xNSitES);
Func_Init_Var(d_V_OFF2_C_02, 9.9, xNSitES);
Func_Init_Var(d_V_OFF2_C_03, 9.9, xNSitES);
Func_Init_Var(d_V_OFF2_C_04, 9.9, xNSitES);
Func_Init_Var(d_V_OFF2_C_05, 9.9, xNSitES);
Func_Init_Var(d_V_OFF2_C_06, 9.9, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T07_04_Testbuffer_Voltage_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 20:27:19 GMT >}
valid comment[ 0] @ avcline 10: {sav('ASCX', 0.5, 2, 0.01, False, False)}
valid comment[ 1] @ avcline 788: {cmt: Note: the absolute voltage on both INT2/ASDX is ~0.5V .. 1.7V, the differential voltage is close to 0V}
valid comment[ 1] @ avcline 788: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 1] @ avcline 788: {sav('ASCX', 0.5, 2, 0.01, False, False)}
valid comment[ 2] @ avcline 798: {gav('V_OFF1_C[00]', 'INT2', 'ASDX', 0.1, 0.0001, True)}
valid comment[ 2] @ avcline 798: {log('V_OFF1_C[00]', '', '', 0, 0)}
valid comment[ 3] @ avcline 799: {sav('ASCX', 0.7, 2, 0.01, False, False)}
valid comment[ 4] @ avcline 808: {gav('V_OFF1_C[01]', 'INT2', 'ASDX', 0.1, 0.0001, True)}
valid comment[ 4] @ avcline 808: {log('V_OFF1_C[01]', '', '', 0, 0)}
valid comment[ 5] @ avcline 809: {sav('ASCX', 0.9, 2, 0.01, False, False)}
valid comment[ 6] @ avcline 819: {gav('V_OFF1_C[02]', 'INT2', 'ASDX', 0.1, 0.0001, True)}
valid comment[ 6] @ avcline 819: {log('V_OFF1_C[02]', '', '', 0, 0)}
valid comment[ 7] @ avcline 820: {sav('ASCX', 1.1, 2, 0.01, False, False)}
valid comment[ 8] @ avcline 829: {gav('V_OFF1_C[03]', 'INT2', 'ASDX', 0.1, 0.0001, True)}
valid comment[ 8] @ avcline 829: {log('V_OFF1_C[03]', '', '', 0, 0)}
valid comment[ 9] @ avcline 830: {sav('ASCX', 1.3, 2, 0.01, False, False)}
valid comment[ 10] @ avcline 839: {gav('V_OFF1_C[04]', 'INT2', 'ASDX', 0.1, 0.0001, True)}
valid comment[ 10] @ avcline 839: {log('V_OFF1_C[04]', '', '', 0, 0)}
valid comment[ 11] @ avcline 840: {sav('ASCX', 1.5, 2, 0.01, False, False)}
valid comment[ 12] @ avcline 850: {gav('V_OFF1_C[05]', 'INT2', 'ASDX', 0.1, 0.0001, True)}
valid comment[ 12] @ avcline 850: {log('V_OFF1_C[05]', '', '', 0, 0)}
valid comment[ 13] @ avcline 851: {sav('ASCX', 1.7, 2, 0.01, False, False)}
valid comment[ 14] @ avcline 860: {gav('V_OFF1_C[06]', 'INT2', 'ASDX', 0.1, 0.0001, True)}
valid comment[ 14] @ avcline 860: {log('V_OFF1_C[06]', '', '', 0, 0)}
valid comment[ 15] @ avcline 1447: {cmt: Note: the absolute voltage on both INT2/ASDX is ~0.5V .. 1.7V, the differential voltage is close to 0V}
valid comment[ 15] @ avcline 1447: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 15] @ avcline 1447: {sav('ASCX', 0.5, 2, 0.01, False, False)}
valid comment[ 16] @ avcline 1457: {gav('V_OFF2_C[00]', 'ASDX', 'INT2', 0.1, 0.0001, True)}
valid comment[ 16] @ avcline 1457: {log('V_OFF2_C[00]', '', '', 0, 0)}
valid comment[ 17] @ avcline 1458: {sav('ASCX', 0.7, 2, 0.01, False, False)}
valid comment[ 18] @ avcline 1467: {gav('V_OFF2_C[01]', 'ASDX', 'INT2', 0.1, 0.0001, True)}
valid comment[ 18] @ avcline 1467: {log('V_OFF2_C[01]', '', '', 0, 0)}
valid comment[ 19] @ avcline 1468: {sav('ASCX', 0.9, 2, 0.01, False, False)}
valid comment[ 20] @ avcline 1478: {gav('V_OFF2_C[02]', 'ASDX', 'INT2', 0.1, 0.0001, True)}
valid comment[ 20] @ avcline 1478: {log('V_OFF2_C[02]', '', '', 0, 0)}
valid comment[ 21] @ avcline 1479: {sav('ASCX', 1.1, 2, 0.01, False, False)}
valid comment[ 22] @ avcline 1488: {gav('V_OFF2_C[03]', 'ASDX', 'INT2', 0.1, 0.0001, True)}
valid comment[ 22] @ avcline 1488: {log('V_OFF2_C[03]', '', '', 0, 0)}
valid comment[ 23] @ avcline 1489: {sav('ASCX', 1.3, 2, 0.01, False, False)}
valid comment[ 24] @ avcline 1498: {gav('V_OFF2_C[04]', 'ASDX', 'INT2', 0.1, 0.0001, True)}
valid comment[ 24] @ avcline 1498: {log('V_OFF2_C[04]', '', '', 0, 0)}
valid comment[ 25] @ avcline 1499: {sav('ASCX', 1.5, 2, 0.01, False, False)}
valid comment[ 26] @ avcline 1509: {gav('V_OFF2_C[05]', 'ASDX', 'INT2', 0.1, 0.0001, True)}
valid comment[ 26] @ avcline 1509: {log('V_OFF2_C[05]', '', '', 0, 0)}
valid comment[ 27] @ avcline 1510: {sav('ASCX', 1.7, 2, 0.01, False, False)}
valid comment[ 28] @ avcline 1519: {gav('V_OFF2_C[06]', 'ASDX', 'INT2', 0.1, 0.0001, True)}
valid comment[ 28] @ avcline 1519: {log('V_OFF2_C[06]', '', '', 0, 0)}
valid comment[ 29] @ avcline 1520: {uav('ASCX', False)}
valid comment[ 30] @ avcline 2106: {Test End: T07_04_Testbuffer_Voltage_Char}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][0]).pin("ASCX").vForce(0.5 V)//{sav('ASCX', 0.5, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][1]).pin("ASCX").vForce(0.5 V)//{sav('ASCX', 0.5, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][2]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_OFF1_C_00//{gav('V_OFF1_C[00]', 'INT2', 'ASDX', 0.1, 0.0001, True)}
.insertSub(i_comment_line[0][3]).pin("ASCX").vForce(0.7 V)//{sav('ASCX', 0.7, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][4]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_OFF1_C_01//{gav('V_OFF1_C[01]', 'INT2', 'ASDX', 0.1, 0.0001, True)}
.insertSub(i_comment_line[0][5]).pin("ASCX").vForce(0.9 V)//{sav('ASCX', 0.9, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][6]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_OFF1_C_02//{gav('V_OFF1_C[02]', 'INT2', 'ASDX', 0.1, 0.0001, True)}
.insertSub(i_comment_line[0][7]).pin("ASCX").vForce(1.1 V)//{sav('ASCX', 1.1, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][8]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_OFF1_C_03//{gav('V_OFF1_C[03]', 'INT2', 'ASDX', 0.1, 0.0001, True)}
.insertSub(i_comment_line[0][9]).pin("ASCX").vForce(1.3 V)//{sav('ASCX', 1.3, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][10]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_OFF1_C_04//{gav('V_OFF1_C[04]', 'INT2', 'ASDX', 0.1, 0.0001, True)}
.insertSub(i_comment_line[0][11]).pin("ASCX").vForce(1.5 V)//{sav('ASCX', 1.5, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][12]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_OFF1_C_05//{gav('V_OFF1_C[05]', 'INT2', 'ASDX', 0.1, 0.0001, True)}
.insertSub(i_comment_line[0][13]).pin("ASCX").vForce(1.7 V)//{sav('ASCX', 1.7, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][14]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_OFF1_C_06//{gav('V_OFF1_C[06]', 'INT2', 'ASDX', 0.1, 0.0001, True)}
.insertSub(i_comment_line[0][15]).pin("ASCX").vForce(0.5 V)//{sav('ASCX', 0.5, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][16]).pin("ASDX,INT2", TA::BADC).vMeas().average(128).measWait(1 ms)//V_OFF2_C_00//{gav('V_OFF2_C[00]', 'ASDX', 'INT2', 0.1, 0.0001, True)}
.insertSub(i_comment_line[0][17]).pin("ASCX").vForce(0.7 V)//{sav('ASCX', 0.7, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][18]).pin("ASDX,INT2", TA::BADC).vMeas().average(128).measWait(1 ms)//V_OFF2_C_01//{gav('V_OFF2_C[01]', 'ASDX', 'INT2', 0.1, 0.0001, True)}
.insertSub(i_comment_line[0][19]).pin("ASCX").vForce(0.9 V)//{sav('ASCX', 0.9, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][20]).pin("ASDX,INT2", TA::BADC).vMeas().average(128).measWait(1 ms)//V_OFF2_C_02//{gav('V_OFF2_C[02]', 'ASDX', 'INT2', 0.1, 0.0001, True)}
.insertSub(i_comment_line[0][21]).pin("ASCX").vForce(1.1 V)//{sav('ASCX', 1.1, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][22]).pin("ASDX,INT2", TA::BADC).vMeas().average(128).measWait(1 ms)//V_OFF2_C_03//{gav('V_OFF2_C[03]', 'ASDX', 'INT2', 0.1, 0.0001, True)}
.insertSub(i_comment_line[0][23]).pin("ASCX").vForce(1.3 V)//{sav('ASCX', 1.3, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][24]).pin("ASDX,INT2", TA::BADC).vMeas().average(128).measWait(1 ms)//V_OFF2_C_04//{gav('V_OFF2_C[04]', 'ASDX', 'INT2', 0.1, 0.0001, True)}
.insertSub(i_comment_line[0][25]).pin("ASCX").vForce(1.5 V)//{sav('ASCX', 1.5, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][26]).pin("ASDX,INT2", TA::BADC).vMeas().average(128).measWait(1 ms)//V_OFF2_C_05//{gav('V_OFF2_C[05]', 'ASDX', 'INT2', 0.1, 0.0001, True)}
.insertSub(i_comment_line[0][27]).pin("ASCX").vForce(1.7 V)//{sav('ASCX', 1.7, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][28]).pin("ASDX,INT2", TA::BADC).vMeas().average(128).measWait(1 ms)//V_OFF2_C_06//{gav('V_OFF2_C[06]', 'ASDX', 'INT2', 0.1, 0.0001, True)}
.insertSub(i_comment_line[0][29]).pin("ASCX").relay(TA::ppmuRly_offALL)////{uav('ASCX', False)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
ARRAY_D ad_jsubresults_ASDX; ad_jsubresults_ASDX.resize(14); ad_jsubresults_ASDX.init(-9.9);
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(14); ad_jsubresults_INT2.init(-9.9);
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
ad_jsubresults_ASDX = rdi.id("dcid_0").getMultiValue("ASDX");
d_V_OFF1_C_00[curSite] = ad_jsubresults_INT2[0] - ad_jsubresults_ASDX[0];
d_V_OFF1_C_01[curSite] = ad_jsubresults_INT2[1] - ad_jsubresults_ASDX[1];
d_V_OFF1_C_02[curSite] = ad_jsubresults_INT2[2] - ad_jsubresults_ASDX[2];
d_V_OFF1_C_03[curSite] = ad_jsubresults_INT2[3] - ad_jsubresults_ASDX[3];
d_V_OFF1_C_04[curSite] = ad_jsubresults_INT2[4] - ad_jsubresults_ASDX[4];
d_V_OFF1_C_05[curSite] = ad_jsubresults_INT2[5] - ad_jsubresults_ASDX[5];
d_V_OFF1_C_06[curSite] = ad_jsubresults_INT2[6] - ad_jsubresults_ASDX[6];
d_V_OFF2_C_00[curSite] = ad_jsubresults_ASDX[7] - ad_jsubresults_INT2[7];
d_V_OFF2_C_01[curSite] = ad_jsubresults_ASDX[8] - ad_jsubresults_INT2[8];
d_V_OFF2_C_02[curSite] = ad_jsubresults_ASDX[9] - ad_jsubresults_INT2[9];
d_V_OFF2_C_03[curSite] = ad_jsubresults_ASDX[10] - ad_jsubresults_INT2[10];
d_V_OFF2_C_04[curSite] = ad_jsubresults_ASDX[11] - ad_jsubresults_INT2[11];
d_V_OFF2_C_05[curSite] = ad_jsubresults_ASDX[12] - ad_jsubresults_INT2[12];
d_V_OFF2_C_06[curSite] = ad_jsubresults_ASDX[13] - ad_jsubresults_INT2[13];
FuncPrint("V_OFF1_C_00",d_V_OFF1_C_00[curSite]);
FuncPrint("V_OFF1_C_01",d_V_OFF1_C_01[curSite]);
FuncPrint("V_OFF1_C_02",d_V_OFF1_C_02[curSite]);
FuncPrint("V_OFF1_C_03",d_V_OFF1_C_03[curSite]);
FuncPrint("V_OFF1_C_04",d_V_OFF1_C_04[curSite]);
FuncPrint("V_OFF1_C_05",d_V_OFF1_C_05[curSite]);
FuncPrint("V_OFF1_C_06",d_V_OFF1_C_06[curSite]);
FuncPrint("V_OFF2_C_00",d_V_OFF2_C_00[curSite]);
FuncPrint("V_OFF2_C_01",d_V_OFF2_C_01[curSite]);
FuncPrint("V_OFF2_C_02",d_V_OFF2_C_02[curSite]);
FuncPrint("V_OFF2_C_03",d_V_OFF2_C_03[curSite]);
FuncPrint("V_OFF2_C_04",d_V_OFF2_C_04[curSite]);
FuncPrint("V_OFF2_C_05",d_V_OFF2_C_05[curSite]);
FuncPrint("V_OFF2_C_06",d_V_OFF2_C_06[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
TestLog("V_OFF1_C_00",d_V_OFF1_C_00[curSite]);
TestLog("V_OFF1_C_01",d_V_OFF1_C_01[curSite]);
TestLog("V_OFF1_C_02",d_V_OFF1_C_02[curSite]);
TestLog("V_OFF1_C_03",d_V_OFF1_C_03[curSite]);
TestLog("V_OFF1_C_04",d_V_OFF1_C_04[curSite]);
TestLog("V_OFF1_C_05",d_V_OFF1_C_05[curSite]);
TestLog("V_OFF1_C_06",d_V_OFF1_C_06[curSite]);
TestLog("V_OFF2_C_00",d_V_OFF2_C_00[curSite]);
TestLog("V_OFF2_C_01",d_V_OFF2_C_01[curSite]);
TestLog("V_OFF2_C_02",d_V_OFF2_C_02[curSite]);
TestLog("V_OFF2_C_03",d_V_OFF2_C_03[curSite]);
TestLog("V_OFF2_C_04",d_V_OFF2_C_04[curSite]);
TestLog("V_OFF2_C_05",d_V_OFF2_C_05[curSite]);
TestLog("V_OFF2_C_06",d_V_OFF2_C_06[curSite]);
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T07_04_Testbuffer_Voltage_Char_V2", T07_04_Testbuffer_Voltage_Char_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: Internal ground measure
# VSS on CTB_P
#############################################################################################################
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:27:19 GMT $')
# Config Ana pin
wac('EXT_MODE', 0xc00f) # Test page, TM_PIN
wcb('tm_int2_en',0x1)
wcb('tm_int2_sel',0x4) # TB1_INP
dly(100e-6)
# Config ATM addr & cfg
wcb('tm_cfg' , 0x8) # TM_ADDR, VSS to CTB_P
wcb('tm_addr', 0xd) # COM_TIO_PWR, Signal :TM_PWRBLOCK_EN
# Measure
dly(100e-6)
cmt('The measurement needs to be done with an accuracy of +/- 1mV')
gav('V_GND', 'INT2', v_range=0.1) # target value close to 0
log('V_GND')
# Clean
wac('TM_ADDR',0x0000) # Reset tm_addr, tm_cfg
wac('TM_PIN',0x0000) # Reset tm_<pin>_sel/en
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T07_05_internal_gnd_measurement_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double V_GND[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T07_05_internal_gnd_measurement_V2_PAT_id");
rdi.dc("T07_05_internal_gnd_measurement_V2DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("INT2",TA::BADC).vMeas().average(128).measWait(1 ms) //V_GND
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T07_05_internal_gnd_measurement_V2DC_id0").getMultiValue("INT2");
V_GND[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[0];
int Func_result = rdi.id("T07_05_internal_gnd_measurement_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
FuncPrint("V_GND", V_GND[CURRENT_SITE_NUMBER()-1]);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("V_GND", V_GND[CURRENT_SITE_NUMBER()-1]);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T07_05_internal_gnd_measurement_V2", T07_05_internal_gnd_measurement_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:22:06 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_CONF', 0x0003) # tm_se_meas=0 tm_bus_inv=0 tm_buf_pwrup=3 (tbuf_tb1_tb2_on)
# bus_inv. because the power_ana_test_multiplexor_2 provides VSS_A/VDDA
wac('TM_PIN', 0x0055) # tm_asdx_sel=2 (BUF2_OUT) tm_asdx_en=1 tm_int2_sel=2 (BUF1_OUT) tm_int2_en=1
wac('TM_ADDR', 0x0c0d) # tm_cfg=c (COM_TB2= VDDA, COM_TB1= VDDA) tm_addr=d (COM_TIO_PWR;
# enable the power_ana_test_multiplexor_2 for power supplies)
dly(100e-6)
sac('INT2', 0.0, i_range=-100e-6, sim_ignore=True)
dly(100e-6)
gav('V_BUFFER1_ZERO', 'INT2')
sac('INT2', -20e-6, i_range=-100e-6, sim_ignore=True)
dly(100e-6)
gav('V_BUFFER1_20microA', 'INT2')
uac('INT2')
calc("V_BUFFER1", "V_BUFFER1_ZERO", "-", "V_BUFFER1_20microA")
calc("R_BUFFER1", "V_BUFFER1", "/", "20e-6")
log("R_BUFFER1")
dly(100e-6)
sac('ASDX', 0.0, i_range=-100e-6, sim_ignore=True)
dly(100e-6)
gav('V_BUFFER2_ZERO', 'ASDX')
sac('ASDX', -20e-6, i_range=-100e-6, sim_ignore=True)
dly(100e-6)
gav('V_BUFFER2_20microA', 'ASDX')
uac('ASDX')
calc("V_BUFFER2", "V_BUFFER2_ZERO", "-", "V_BUFFER2_20microA")
calc("R_BUFFER2", "V_BUFFER2", "/", "20e-6")
log("R_BUFFER2")
# EXT_MODE selects the TEST register page already
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* T07_06_Testbuffer_Output_Impedance_Char_V2, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH: fix some bugs.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T07_06_Testbuffer_Output_Impedance_Char_V2: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static double d_V_BUFFER1_20microA[xNSitES];
static double d_V_BUFFER1_ZERO[xNSitES];
static double d_V_BUFFER2_20microA[xNSitES];
static double d_V_BUFFER2_ZERO[xNSitES];
static int i_funcRes0[xNSitES];
static double V_BUFFER1[xNSitES], R_BUFFER1[xNSitES];
static double V_BUFFER2[xNSitES], R_BUFFER2[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(d_V_BUFFER1_20microA, 9.9, xNSitES);
Func_Init_Var(d_V_BUFFER1_ZERO, 9.9, xNSitES);
Func_Init_Var(d_V_BUFFER2_20microA, 9.9, xNSitES);
Func_Init_Var(d_V_BUFFER2_ZERO, 9.9, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T07_06_Testbuffer_Output_Impedance_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 20:22:06 GMT >}
valid comment[ 1] @ avcline 788: {sac('INT2', 0, -0.0001, 2, 0, False, True)}
valid comment[ 2] @ avcline 797: {gav('V_BUFFER1_ZERO', 'INT2', '', 2, 0.0001, True)}
valid comment[ 2] @ avcline 797: {sac('INT2', -2e-05, -0.0001, 2, 0, False, True)}
valid comment[ 3] @ avcline 807: {gav('V_BUFFER1_20microA', 'INT2', '', 2, 0.0001, True)}
valid comment[ 3] @ avcline 807: {uac('INT2', False)}
valid comment[ 3] @ avcline 807: {calc('V_BUFFER1', 'V_BUFFER1_ZERO', '-', 'V_BUFFER1_20microA')}
valid comment[ 3] @ avcline 807: {calc('R_BUFFER1', 'V_BUFFER1', '/', '20e-6')}
valid comment[ 3] @ avcline 807: {log('R_BUFFER1', '', '', 0, 0)}
valid comment[ 4] @ avcline 817: {sac('ASDX', 0, -0.0001, 2, 0, False, True)}
valid comment[ 5] @ avcline 826: {gav('V_BUFFER2_ZERO', 'ASDX', '', 2, 0.0001, True)}
valid comment[ 5] @ avcline 826: {sac('ASDX', -2e-05, -0.0001, 2, 0, False, True)}
valid comment[ 6] @ avcline 836: {gav('V_BUFFER2_20microA', 'ASDX', '', 2, 0.0001, True)}
valid comment[ 6] @ avcline 836: {uac('ASDX', False)}
valid comment[ 6] @ avcline 836: {calc('V_BUFFER2', 'V_BUFFER2_ZERO', '-', 'V_BUFFER2_20microA')}
valid comment[ 6] @ avcline 836: {calc('R_BUFFER2', 'V_BUFFER2', '/', '20e-6')}
valid comment[ 6] @ avcline 836: {log('R_BUFFER2', '', '', 0, 0)}
valid comment[ 7] @ avcline 1413: {Test End: T07_06_Testbuffer_Output_Impedance_Char}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][1]).pin("INT2").iForce(0 uA).iRange(100 uA)//{sac('INT2', 0, -0.0001, 2, 0, False, True)}
.insertSub(i_comment_line[0][2]).pin("INT2").iForce(0 uA).vMeas().valueMode(TA::BADC).average(128).measWait(1 ms)//V_BUFFER1_ZERO//{gav('V_BUFFER1_ZERO', 'INT2', '', 2, 0.0001, True)}
// .insertSub(i_comment_line[0][2]).pin("INT2", TA::BADC).iForce(0 uA).vMeas().average(32).measWait(1 ms)//V_BUFFER1_ZERO//{gav('V_BUFFER1_ZERO', 'INT2', '', 2, 0.0001, True)}
.insertSub(i_comment_line[0][2]).pin("INT2").iForce(-20 uA).iRange(100 uA)//{sac('INT2', -2e-05, -0.0001, 2, 0, False, True)}
.insertSub(i_comment_line[0][3]).pin("INT2").iForce(-20 uA).valueMode(TA::BADC).vMeas().average(128).measWait(1 ms)//V_BUFFER1_20microA//{gav('V_BUFFER1_20microA', 'INT2', '', 2, 0.0001, True)}
// .insertSub(i_comment_line[0][3]).pin("INT2", TA::BADC).iForce(-20 uA).vMeas().average(32).measWait(1 ms)//V_BUFFER1_20microA//{gav('V_BUFFER1_20microA', 'INT2', '', 2, 0.0001, True)}
.insertSub(i_comment_line[0][3]).pin("INT2").relay(TA::ppmuRly_onAC_offDCPPMU)////{uac('INT2', False)}
.insertSub(i_comment_line[0][4]).pin("ASDX").iForce(0 uA).iRange(100 uA)//{sac('ASDX', 0, -0.0001, 2, 0, False, True)}
.insertSub(i_comment_line[0][5]).pin("ASDX").iForce(0 uA).vMeas().valueMode(TA::BADC).average(128).measWait(1 ms)//V_BUFFER2_ZERO//{gav('V_BUFFER2_ZERO', 'ASDX', '', 2, 0.0001, True)}
// .insertSub(i_comment_line[0][5]).pin("ASDX", TA::BADC).iForce(0 uA).vMeas().average(32).measWait(1 ms)//V_BUFFER2_ZERO//{gav('V_BUFFER2_ZERO', 'ASDX', '', 2, 0.0001, True)}
.insertSub(i_comment_line[0][5]).pin("ASDX").iForce(-20 uA).iRange(100 uA)//{sac('ASDX', -2e-05, -0.0001, 2, 0, False, True)}
.insertSub(i_comment_line[0][6]).pin("ASDX").iForce(-20 uA).vMeas().valueMode(TA::BADC).average(128).measWait(1 ms)//V_BUFFER2_20microA//{gav('V_BUFFER2_20microA', 'ASDX', '', 2, 0.0001, True)}
// .insertSub(i_comment_line[0][6]).pin("ASDX", TA::BADC).iForce(-20 uA).vMeas().average(32).measWait(1 ms)//V_BUFFER2_20microA//{gav('V_BUFFER2_20microA', 'ASDX', '', 2, 0.0001, True)}
.insertSub(i_comment_line[0][6]).pin("ASDX").relay(TA::ppmuRly_onAC_offDCPPMU)////{uac('ASDX', False)}
.execute();
RDI_END();
// RDI_BEGIN(mode);
// rdi.burstId("burst_id0");
// rdi.dc("dcid_0").label(s_splited_pat_name[0])
// .insertSub(i_comment_line[0][1]).pin("OSDO").iForce(0 uA).iRange(100 uA)//{sac('OSDO', 0, -0.0001, 2, 0, False, True)}
// .insertSub(i_comment_line[0][2]).pin("OSDO").iForce(0 uA).vMeas().valueMode(TA::BADC).average(512).measWait(1 ms)//V_BUFFER1_ZERO//{gav('V_BUFFER1_ZERO', 'OSDO', '', 2, 0.0001, True)}
// .insertSub(i_comment_line[0][2]).pin("OSDO").iForce(-20 uA).iRange(100 uA)//{sac('OSDO', -2e-05, -0.0001, 2, 0, False, True)}
// .insertSub(i_comment_line[0][3]).pin("OSDO").iForce(-20 uA).vMeas().valueMode(TA::BADC).average(512).measWait(1 ms)//V_BUFFER1_20microA//{gav('V_BUFFER1_20microA', 'OSDO', '', 2, 0.0001, True)}
// .insertSub(i_comment_line[0][3]).pin("OSDO").relay(TA::ppmuRly_onAC_offDCPPMU,TA::ppmuRly_offALL)////{uac('OSDO', False)}
// .insertSub(i_comment_line[0][4]).pin("ASDX").iForce(0 uA).iRange(100 uA)//{sac('ASDX', 0, -0.0001, 2, 0, False, True)}
// .insertSub(i_comment_line[0][5]).pin("ASDX").iForce(0 uA).vMeas().valueMode(TA::BADC).average(512).measWait(1 ms)//V_BUFFER2_ZERO//{gav('V_BUFFER2_ZERO', 'ASDX', '', 2, 0.0001, True)}
// .insertSub(i_comment_line[0][5]).pin("ASDX").iForce(-20 uA).iRange(100 uA)//{sac('ASDX', -2e-05, -0.0001, 2, 0, False, True)}
// .insertSub(i_comment_line[0][6]).pin("ASDX").iForce(-20 uA).vMeas().valueMode(TA::BADC).average(512).measWait(1 ms)//V_BUFFER2_20microA//{gav('V_BUFFER2_20microA', 'ASDX', '', 2, 0.0001, True)}
//// .insertSub(i_comment_line[0][6]).pin("ASDX").relay(TA::ppmuRly_onAC_offDCPPMU)////{uac('ASDX', False)}
// .execute();
// RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
ARRAY_D ad_jsubresults_ASDX; ad_jsubresults_ASDX.resize(2); ad_jsubresults_ASDX.init(-9.9);
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(2); ad_jsubresults_INT2.init(-9.9);
ad_jsubresults_ASDX = rdi.id("dcid_0").getMultiValue("ASDX");
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
d_V_BUFFER1_ZERO[curSite] = ad_jsubresults_INT2[0];
FuncPrint("V_BUFFER1_ZERO",d_V_BUFFER1_ZERO[curSite]);
d_V_BUFFER1_20microA[curSite] = ad_jsubresults_INT2[1];
FuncPrint("V_BUFFER1_20microA",d_V_BUFFER1_20microA[curSite]);
d_V_BUFFER2_ZERO[curSite] = ad_jsubresults_ASDX[0];
FuncPrint("V_BUFFER2_ZERO",d_V_BUFFER2_ZERO[curSite]);
d_V_BUFFER2_20microA[curSite] = ad_jsubresults_ASDX[1];
FuncPrint("V_BUFFER2_20microA",d_V_BUFFER2_20microA[curSite]);
V_BUFFER1[curSite] = d_V_BUFFER1_ZERO[curSite] - d_V_BUFFER1_20microA[curSite];
FuncPrint("V_BUFFER1",V_BUFFER1[curSite]);
R_BUFFER1[curSite] = V_BUFFER1[curSite] / 20e-6;
FuncPrint("R_BUFFER1",R_BUFFER1[curSite]);
V_BUFFER2[curSite] = d_V_BUFFER2_ZERO[curSite] - d_V_BUFFER2_20microA[curSite];
FuncPrint("V_BUFFER2",V_BUFFER2[curSite]);
R_BUFFER2[curSite] = V_BUFFER2[curSite] / 20e-6;
FuncPrint("R_BUFFER2",R_BUFFER2[curSite]);
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
TestLog("R_BUFFER1",R_BUFFER1[curSite]);
TestLog("R_BUFFER2",R_BUFFER2[curSite]);
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T07_06_Testbuffer_Output_Impedance_Char_V2", T07_06_Testbuffer_Output_Impedance_Char_V2);
|
generate cpp file from given test case python file
|
######################################################################################################################
# description: Write TB offset measurements to dark OTP
# Step1: Calcualtion of V_OFF1/2 measurement into integer value
# Step2: Program value in dark OTP regID 0xDA
# - Bits 0..5 used to store the TB1 offset (-32..31)
# - Bits 8..12 used to store the TB2 offset (-32..31)
######################################################################################################################
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
# Convert TB offset measurements to integer values
cmt('Get result parameter V_OFF1_ECOFF from test item T07.02 (unit V) and convert to unit mV')
calc('V_OFF1_MV', 'V_OFF1_ECOFF', '*', 1000) # Get V_OFF1_ECOFF from test item T07.02
calc('NS_OFF1', 'V_OFF1_MV', 'round') # Round TB1 offset in (mV) to nearest integer
cmt('This test item is a functional fail if NS_OFF1 > 31 or NS_OFF1 < -32')
calc('NU_OFF1', 'NS_OFF1', 'csu', 6) # Convert 6-bit signed to unsigend
dly(296e-9)
cmt('Get result parameter V_OFF2_ECOFF from test item T07.02 (unit V) and convert to unit mV')
calc('V_OFF2_MV', 'V_OFF2_ECOFF', '*', 1000) # Get V_OFF2_ECOFF from test item T07.02
calc('NS_OFF2', 'V_OFF2_MV', 'round') # Round TB2 offset in (mV) to nearest integer
cmt('This test item is a functional fail if NS_OFF2 > 31 or NS_OFF2 < -32')
calc('NU_OFF2', 'NS_OFF2', 'csu', 6) # Convert 6-bit signed to unsigend
dly(296e-9)
calc('NU_OFF2_LS', 'NU_OFF2', '<<', 8) # Left shift NU_OFF2 to bit 8
calc('NU_OFF_OTP', 'NU_OFF2_LS', '+', 'NU_OFF1')# Calc OTP program data
# Program data to OTP
wac('EXT_MODE', 0xc00d) # Switch to PMU register page
wcb('nvmotp_power_en',0x1) # Request OTP power
dly(300e-6)
wac('EXT_MODE', 0xc00f) # Switch to OTPCTRL register page
wac('OTP_PROG_EN', 0x0002) # Enable OTP program
wcb('vddp_sw', 0x1) # Connect VDDP to VDD
sav('VDD', 3.6, v_range=4.0, i_comp=40e-3)
dly(1e-3)
wri('OTP_DATA', 'NU_OFF_OTP') # Write measurement result to OTP data register
rac('OTP_STATUS', 0x0001) # Check OTP ready
wr('OTP_CMD', 0x0005) # Trigger OTP data program
dly(200e-6) # OTP spec, pgm speed 10us per bit
wac('OTP_DATA',0xda) # Set regID for dark OTP
rac('OTP_STATUS', 0x0001) # Check OTP ready
wr('OTP_CMD', 0x0006) # Trigger OTP reg_id program
dly(200e-6)
rac('OTP_STATUS', 0x0001) # Check OTP ready
sav('VDD', 1.8, v_range=4.0, i_comp=40e-3)
dly(1e-3)
wac('OTP_PROG_EN', 0x0000) # Disable OTP program
wcb('vddp_sw', 0x0) # Connect VDDP to VDDD_DC
wac('OTP_DATA', 0x0000) # Reset OTP data register
# Read data from OTP
wac('BOOT_RANGE', 0xdada) # Set register ID for dark OTP load
rac('BOOT_STATUS', 0x0001) # Check boot controller ready and error bits
wr('BOOT_CMD', 0x0001) # Trigger OTP load
dly(1.2e-3)
ras('NU_OFF_OTP_RD', 'BOOT_LAST_DATA') # Read and save OTP data
cmt('This test item is a functional fail if NU_OFF_OTP_RD != NU_OFF_OTP')
# Clean-up
wac('BOOT_RANGE', 0x0000)
wac('EXT_MODE', 0xc00d) # Switch to PMU register page
wcb('nvmotp_power_en',0x0) # Disable OTP power
dly(100e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T07_10_testbuffer_offset_dark_OTP_write_V1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
INT split_pat_flag;
GET_USER_FLAG("split_pat_flag", &split_pat_flag);
vector<string> s_splited_pat_name;
const int split_count = 5; // Alarm:: split_count need manual confirm.
s_splited_pat_name.resize(split_count);
vector<int> i_comment_line[split_count];
static int NU_OFF_OTP_RD[xNSitES];
static double V_OFF1_MV[xNSitES], V_OFF2_MV[xNSitES];
static int NS_OFF1[xNSitES], NU_OFF1[xNSitES], NS_OFF2[xNSitES], NU_OFF2[xNSitES], NU_OFF2_LS[xNSitES], NU_OFF_OTP[xNSitES];
ARRAY_LL NU_OFF_OTP_rtv(xNSitES);
const int Wri_Bit_Length = 33;
const int Wri_Bit_Position = 31;
// Auto_Code_Variable_define
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
GET_TESTSUITE_NAME(test_name);
if (split_pat_flag)
{
split_pattern(s_label_name,"wri","sav",split_pat_flag,s_splited_pat_name);
}
else
{
for (int i = 0; i<split_count; i++)
{
s_splited_pat_name[i] = s_label_name + "_part" + rdi.itos(i);
i_comment_line[i] = search_comment_line(s_splited_pat_name[i]);
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
FOR_EACH_SITE_BEGIN();
V_OFF1_MV[CURRENT_SITE_NUMBER()-1] = V_OFF1_ECOFF[CURRENT_SITE_NUMBER()-1] * 1000.000;
NS_OFF1[CURRENT_SITE_NUMBER()-1] = int(round(V_OFF1_MV[CURRENT_SITE_NUMBER()-1]));
NU_OFF1[CURRENT_SITE_NUMBER()-1] = i_Func_Signed_To_Unsigned(NS_OFF1[CURRENT_SITE_NUMBER()-1], 6);
V_OFF2_MV[CURRENT_SITE_NUMBER()-1] = V_OFF2_ECOFF[CURRENT_SITE_NUMBER()-1] * 1000;
NS_OFF2[CURRENT_SITE_NUMBER()-1] = int(round(V_OFF2_MV[CURRENT_SITE_NUMBER()-1]));
NU_OFF2[CURRENT_SITE_NUMBER()-1] = i_Func_Signed_To_Unsigned(NS_OFF2[CURRENT_SITE_NUMBER()-1], 6);
NU_OFF2_LS[CURRENT_SITE_NUMBER()-1] = NU_OFF2[CURRENT_SITE_NUMBER()-1] << 8;
NU_OFF_OTP[CURRENT_SITE_NUMBER()-1] = NU_OFF2_LS[CURRENT_SITE_NUMBER()-1] + NU_OFF1[CURRENT_SITE_NUMBER()-1];
NU_OFF_OTP_rtv[CURRENT_SITE_NUMBER()-1] = extend_Pmode_Herschel(NU_OFF_OTP[CURRENT_SITE_NUMBER()-1], 2);
FuncPrint("V_OFF1_ECOFF", V_OFF1_ECOFF[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_OFF1_MV", V_OFF1_MV[CURRENT_SITE_NUMBER()-1]);
FuncPrint("NS_OFF1", NS_OFF1[CURRENT_SITE_NUMBER()-1]);
FuncPrint("NU_OFF1", NU_OFF1[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_OFF2_ECOFF", V_OFF2_ECOFF[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_OFF2_MV", V_OFF2_MV[CURRENT_SITE_NUMBER()-1]);
FuncPrint("NS_OFF2", NS_OFF2[CURRENT_SITE_NUMBER()-1]);
FuncPrint("NU_OFF2", NU_OFF2[CURRENT_SITE_NUMBER()-1]);
FuncPrint("NU_OFF2_LS", NU_OFF2_LS[CURRENT_SITE_NUMBER()-1]);
FuncPrint("NU_OFF_OTP", NU_OFF_OTP[CURRENT_SITE_NUMBER()-1]);
FuncPrint("NU_OFF_OTP_rtv", NU_OFF_OTP_rtv[CURRENT_SITE_NUMBER()-1]);
FOR_EACH_SITE_END();
rdi.runTimeVal("NU_OFF_OTP_rtv", NU_OFF_OTP_rtv);
RDI_BEGIN(mode);
rdi.burstId("T07_10_testbuffer_offset_dark_OTP_write_V1_PAT_id0");
rdi.func().label(s_splited_pat_name[0]).execute();
rdi.dc().pin("VDD").vForce(3.6 V).iRange(40 mA).execute();
rdi.func().label(s_splited_pat_name[1]).execute();
rdi.smartVec().label(s_splited_pat_name[2]).pin("SDX").writeData("NU_OFF_OTP_rtv", Wri_Bit_Length, Wri_Bit_Position).execute();
rdi.dc().pin("VDD").vForce(1.8 V).iRange(40 mA).execute();
rdi.digCap("T07_10_testbuffer_offset_dark_OTP_write_V1_Digcap_id").vecVarOnly().pin("SDO").capMode(TA::SER).samples(16*1).bitPerWord(16).execute();
rdi.func().label(s_splited_pat_name[3]).execute();
RDI_END();
}
ON_FIRST_INVOCATION_END();
int Func_result0 = rdi.id("T07_10_testbuffer_offset_dark_OTP_write_V1_PAT_id0").getBurstPassFail();
FuncPrint("Func_result0", Func_result0);
int Func_result = 1 * Func_result0;
ARRAY_I Vec=rdi.id("T07_10_testbuffer_offset_dark_OTP_write_V1_Digcap_id").getVector();
NU_OFF_OTP_RD[CURRENT_SITE_NUMBER()-1] = reverse_ras_result(Vec[0]);
FuncPrint("NU_OFF_OTP_RD", NU_OFF_OTP_RD[CURRENT_SITE_NUMBER()-1]);
if (NU_OFF_OTP_RD[CURRENT_SITE_NUMBER()-1] != NU_OFF_OTP[CURRENT_SITE_NUMBER()-1]) Func_result=99;
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T07_10_testbuffer_offset_dark_OTP_write_V1", T07_10_testbuffer_offset_dark_OTP_write_V1);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: Internal ground measure
# VSS on CTB_P
#############################################################################################################
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:27:19 GMT $')
# Config Ana pin
wac('EXT_MODE', 0xc00f) # Test page, TM_PIN
wcb('tm_int2_en',0x1)
wcb('tm_int2_sel',0x4) # TB1_INP
dly(100e-6)
# Config ATM addr & cfg
wcb('tm_cfg' , 0x8) # TM_ADDR, VSS to CTB_P
wcb('tm_addr', 0xd) # COM_TIO_PWR, Signal :TM_PWRBLOCK_EN
# Measure
dly(100e-6)
wac('DTB1',0x0001) # INT1 connect to GND
cmt('The measurement needs to be done with an accuracy of +/- 1mV')
gav('V_GND', 'INT2', v_range=0.1) # target value close to 0
log('V_GND')
# Measure contact resistance of GND
sac('INT1',1e-3) # set V clamp, avoid damage chip
dly(100e-6)
gav('V_1ma','INT2') # Hiz mode measure
sac('INT1',0) # set V clamp
dly(100e-6)
gav('V_0ma','INT2') # Hiz mode measure
calc('V_delta','V_1ma','-','V_0ma')
calc('R_gnd','V_delta','/','1e-3')
# Clean
wac('DTB1',0x0000)
wac('TM_ADDR',0x0000) # Reset tm_addr, tm_cfg
wac('TM_PIN',0x0000) # Reset tm_<pin>_sel/en
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T07_15_r_gnd_measurement: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double V_GND[xNSitES];
static double V_10ma[xNSitES],V_40ma[xNSitES];
static double V_0ma[xNSitES],V_delta[xNSitES],R_gnd[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
rdi.dc().pin("INT1_AVI64").vMeasRange(3 V).connectState(TA::HIZ).execute();
rdi.util().pin("K8").setOn().execute();
rdi.util().pin("K4").setOff().execute();
RDI_BEGIN(mode);
rdi.burstId("T07_15_r_gnd_measurement_PAT_id");
rdi.dc("T07_15_r_gnd_measurementDC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("INT1_AVI64").vMeas().average(256).measWait(1 ms) //V_GND
.insertSub(i_comment_line0[1]).pin("INT1").iForce(10 mA)
.insertSub(i_comment_line0[2]).pin("INT1_AVI64").vMeas().average(256).measWait(1 ms) //V_10ma
.insertSub(i_comment_line0[2]).pin("INT1").iForce(40 mA)
.insertSub(i_comment_line0[2]).wait(1 ms)
.insertSub(i_comment_line0[2]).pin("INT1_AVI64").vMeas().average(256).measWait(1 ms) //V_40ma
.insertSub(i_comment_line0[2]).pin("INT1").relay(TA::ppmuRly_offALL)
.insertSub(i_comment_line0[3]).pin("INT1_AVI64").vMeas().average(256).measWait(1 ms) //V_0ma
// .insertSub(i_comment_line0[3]).pin("INT2").relay(TA::ppmuRly_offALL)
.execute();
RDI_END();
rdi.util().pin("K8").setOff().execute();
ON_FIRST_INVOCATION_END();
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T07_15_r_gnd_measurementDC_id0").getMultiValue("INT1_AVI64");
V_GND[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[0];
V_10ma[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[1];
V_40ma[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[2];
V_0ma[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[3];
V_delta[CURRENT_SITE_NUMBER()-1] = V_40ma[CURRENT_SITE_NUMBER()-1] - V_10ma[CURRENT_SITE_NUMBER()-1];
R_gnd[CURRENT_SITE_NUMBER()-1] = V_delta[CURRENT_SITE_NUMBER()-1] / (40e-3 - 10e-3);
// Auto_Code_Retrieve_Data
int Func_result = rdi.id("T07_15_r_gnd_measurement_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
FuncPrint("FUNCTIONAL_TEST", Func_result);
FuncPrint("V_GND", V_GND[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_10ma", V_10ma[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_40ma", V_40ma[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_0ma", V_0ma[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_delta", V_delta[CURRENT_SITE_NUMBER()-1]);
FuncPrint("R_gnd", R_gnd[CURRENT_SITE_NUMBER()-1]);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("V_GND", V_GND[CURRENT_SITE_NUMBER()-1]);
TestLog("V_10ma", V_10ma[CURRENT_SITE_NUMBER()-1]);
TestLog("V_40ma", V_40ma[CURRENT_SITE_NUMBER()-1]);
TestLog("V_0ma", V_0ma[CURRENT_SITE_NUMBER()-1]);
TestLog("V_delta", V_delta[CURRENT_SITE_NUMBER()-1]);
TestLog("R_gnd", R_gnd[CURRENT_SITE_NUMBER()-1]);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T07_15_r_gnd_measurement", T07_15_r_gnd_measurement);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
rac('STATUS_PMOD0', 0x0003, 0x0003) # Check ACC AFE PMU status
wr('CMD', 0xdeaf) # Trigger soft reset
dly(3e-3)
rac('CHIP_ID', 0x0000, 0x0000) # Dummy read to init SPI protocol
dly(10e-6)
rac('CHIP_ID', 0x00af, 0x00ff) # Read chip ID (proof for the reset)
rac('ACC_CONF', 0x0028) # Check reset of ACC config regiser (proof for the reset)
|
/*****************************************************
* T08_01_soft_reset, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T08_01_soft_reset: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static double v_VDDIO, v_VDD;
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T08_01_soft_reset}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 1 > <Author: hmf1rt > <Date: 2024/03/13 13:36:52 GMT >}
valid comment[ 1] @ avcline 750: {Test End: T08_01_soft_reset}
*/
v_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
v_VDD = Primary.getLevelSpec().getSpecValue("VDD");
rdi.dc().pin("VDDIO").vForce(v_VDDIO V).execute();
rdi.dc().pin("VDD").vForce(v_VDD V).execute();
// Primary.getLevelSpec().change("VDDIO",1.8);
// FLUSH(TM::APRM);
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.func().label(s_splited_pat_name[0]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
FuncPrint("i_funcRes0", i_funcRes0[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
// rdi.dc().pin("VDDIO").vForce(1.8 V).execute();
// Primary.getLevelSpec().change("VDDIO",1.8);
// FLUSH(TM::APRM);
ON_FIRST_INVOCATION_END();
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T08_01_soft_reset", T08_01_soft_reset);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# - soft reset; delay of 200us; recovery check with ras() operations of reg CHIP_ID; store the result to an array
# - recovery, when 0x00AF read back from the register (read back zero otherwise)
# - the lowest entry greater than 0x00AF marks the first entry when recovered from reset (loop index is added)
# - for ras(): (70+71)*0,5 bit cycles before/after the transfer
# (see pre_delay, post_delay in setups/spi_fast.e)
# - for ras() transfer: 8bit addr, 8bit data[4], 4x0,5 breaks (iot_delay=1) => 5x8+4x0,5=42
# (see sot_delay, eot_delay, iot_delay in setups/spi_std.e)
# - 42+70,5=112,5, spi_fast 100ns per clock cycle
# - The same procedure is applied for the ACC mode (after T01_10_set_device_config_STC_ACC)
# and for the suspend mode (after reset)
#############################################################################################################
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:24:08 GMT $')
cmt('This test must run with 10MHz')
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
rac('STATUS_PMOD0', 0x0003, 0x0003) # Check ACC AFE PMU status
wr('CMD', 0xdeaf) # Trigger soft reset
dly(200e-6) # 200us to avoid any SPI read/simulation issues after reset
for n in range(0, 170, 1):
ras('WATERMARK', 'CHIP_ID') # 112,5 cycles
calc('WATERMARK_CHIPID_ONLY', 'WATERMARK', "&", 0x00FF) #remove asic version ifno
calc('WATERMARK_IDX[{:02d}]'.format(n), 'WATERMARK_CHIPID_ONLY', "+", n)
oti('N_RECOVERY_RST_ACC', 'WATERMARK_IDX', 0x00AF, criteria='gt') # calculate the first index when back from reset
calc('T_RECOVERY',112.5e-7,'*','N_RECOVERY_RST_ACC')
calc('T_RECOVERY_ACC_C',200e-6,'+','T_RECOVERY')
log('T_RECOVERY_ACC_C')
######## same again for suspend mode
wr('CMD', 0xBB3A) # 1st command for enabling the extended mode
wr('CMD', 0x2C62) # 2nd command for enabling the extended mode
wr('CMD', 0xA576) # 1st command for enabling the super privilege mode
wr('CMD', 0x34D6) # 2nd command for enabling the super privilege mode
dly(10e-6)
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
rac('STATUS_PMOD0', 0x0000, 0x0003) # Check ACC AFE PMU status (now for suspend)
wr('CMD', 0xdeaf) # Trigger soft reset
dly(200e-6) # 200us to avoid any SPI read/simulation issues after reset
for n in range(0, 170, 1):
ras('WATERMARK', 'CHIP_ID')
calc('WATERMARK_CHIPID_ONLY', 'WATERMARK', "&", 0x00FF) #remove asic version ifno
calc('WATERMARK_IDX_SUSP[{:02d}]'.format(n), 'WATERMARK_CHIPID_ONLY', "+", n)
oti('N_RECOVERY_RST_SUSP', 'WATERMARK_IDX_SUSP', 0x00AF, criteria='gt') # calculate the first index when back from reset
calc('T_RECOVERY',112.5e-7,'*','N_RECOVERY_RST_SUSP')
calc('T_RECOVERY_SUSP_C',200e-6,'+','T_RECOVERY')
log('T_RECOVERY_SUSP_C')
|
/*****************************************************
* T08_02_Soft_Reset_Recovery_Time_R1, description file version Notfound, avc file version Notfound
* First Editor : jsh5sgh
* Code generated with autocoding tool V2.9.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH V5: description update
* JSH5SGH R1: version update.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T08_02_Soft_Reset_Recovery_Time_R1: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 4;
vector<int> i_comment_line[i_split_count];
// static int WATERMARK[xNSitES][170];
ARRAY_I aI_Captured_0, aI_Captured_2;
static int WATERMARK[xNSitES][170], WATERMARK_CHIPID_ONLY[xNSitES][170], WATERMARK_IDX[xNSitES][170], WATERMARK_IDX_SUSP[xNSitES][170];
static int N_RECOVERY_RST_ACC[xNSitES], N_RECOVERY_RST_SUSP[xNSitES];
static double T_RECOVERY[xNSitES], T_RECOVERY_ACC_C[xNSitES], T_RECOVERY_SUSP_C[xNSitES];
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES], i_funcRes2[xNSitES], i_funcRes3[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(WATERMARK[170], 9, xNSitES);
Func_Init_Var(WATERMARK[170], 9, xNSitES);
//!"CTmsg: cut pattern to 4 parts @ oriAVCvecline [17516, 18132, 35302]
//!"CTmsg: cut pattern to 4 parts @ binarypatline [17506, 18122, 35292]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T08_02_Soft_Reset_Recovery_Time}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 4 > <Author: luz3sgh > <Date: 2024/06/25 05:52:44 GMT >}
valid comment[ 0] @ avcline 10: {cmt: This test must run with 10MHz}
valid comment[ 1] @ avcline 346: {ras('WATERMARK', 'CHIP_ID')}
valid comment[ 2] @ avcline 447: {calc('WATERMARK_CHIPID_ONLY', 'WATERMARK', '&', '255')}
valid comment[ 2] @ avcline 447: {calc('WATERMARK_IDX[00]', 'WATERMARK_CHIPID_ONLY', '+', '0')}
valid comment[ 2] @ avcline 447: {ras('WATERMARK', 'CHIP_ID')}
valid comment[ 3] @ avcline 548: {calc('WATERMARK_CHIPID_ONLY', 'WATERMARK', '&', '255')}
valid comment[ 3] @ avcline 548: {calc('WATERMARK_IDX[01]', 'WATERMARK_CHIPID_ONLY', '+', '1')}
...
valid comment[170] @ avcline 17415: {ras('WATERMARK', 'CHIP_ID')}
valid comment[171] @ avcline 17516: {calc('WATERMARK_CHIPID_ONLY', 'WATERMARK', '&', '255')}
valid comment[171] @ avcline 17516: {calc('WATERMARK_IDX[169]', 'WATERMARK_CHIPID_ONLY', '+', '169')}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.digCap("digcapid_0").label(s_splited_pat_name[0]).pin("SDO").capMode(TA::SER).bitPerWord(16).samples(170*16).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
for (int i=0; i < 170; i++)
{
aI_Captured_0[i+0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[i+0]);
WATERMARK[curSite][i] = aI_Captured_0[i+0];
FuncPrint("WATERMARK" ,WATERMARK[curSite][i]);
WATERMARK_CHIPID_ONLY[curSite][i] = WATERMARK[curSite][i] & 0xFF;
FuncPrint("WATERMARK_CHIPID_ONLY" ,WATERMARK_CHIPID_ONLY[curSite][i]);
WATERMARK_IDX[curSite][i] = WATERMARK_CHIPID_ONLY[curSite][i] + i;
FuncPrint("WATERMARK_IDX" ,WATERMARK_IDX[curSite][i]);
}
N_RECOVERY_RST_ACC[curSite] = i_Func_Optimal_Trim_Val(WATERMARK_IDX[curSite], 0xAF, 170); //todo criteria='gt'
FuncPrint("N_RECOVERY_RST_ACC" ,N_RECOVERY_RST_ACC[curSite]);
T_RECOVERY[curSite] = 112.5e-7 * N_RECOVERY_RST_ACC[curSite];
FuncPrint("T_RECOVERY" ,T_RECOVERY[curSite]);
T_RECOVERY_ACC_C[curSite] = 200e-6 + T_RECOVERY[curSite];
FuncPrint("T_RECOVERY_ACC_C" ,T_RECOVERY_ACC_C[curSite]);
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 17516: {oti('N_RECOVERY_RST_ACC', 'WATERMARK_IDX', '175', 'gt')}
valid comment[ 0] @ avcline 17516: {calc('T_RECOVERY', '0.00001125', '*', 'N_RECOVERY_RST_ACC')}
valid comment[ 0] @ avcline 17516: {calc('T_RECOVERY_ACC_C', '0.0002', '+', 'T_RECOVERY')}
valid comment[ 0] @ avcline 17516: {log('T_RECOVERY_ACC_C', '', '', 0, 0)}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.func().label(s_splited_pat_name[1]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
FuncPrint("i_funcRes1", i_funcRes1[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
/* Ori key coments in subpat2 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 18132: {ras('WATERMARK', 'CHIP_ID')}
valid comment[ 1] @ avcline 18233: {calc('WATERMARK_CHIPID_ONLY', 'WATERMARK', '&', '255')}
valid comment[ 1] @ avcline 18233: {calc('WATERMARK_IDX_SUSP[00]', 'WATERMARK_CHIPID_ONLY', '+', '0')}
valid comment[ 1] @ avcline 18233: {ras('WATERMARK', 'CHIP_ID')}
valid comment[ 2] @ avcline 18334: {calc('WATERMARK_CHIPID_ONLY', 'WATERMARK', '&', '255')}
valid comment[ 2] @ avcline 18334: {calc('WATERMARK_IDX_SUSP[01]', 'WATERMARK_CHIPID_ONLY', '+', '1')}
...
valid comment[169] @ avcline 35201: {ras('WATERMARK', 'CHIP_ID')}
valid comment[170] @ avcline 35302: {calc('WATERMARK_CHIPID_ONLY', 'WATERMARK', '&', '255')}
valid comment[170] @ avcline 35302: {calc('WATERMARK_IDX_SUSP[169]', 'WATERMARK_CHIPID_ONLY', '+', '169')}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id2");
rdi.digCap("digcapid_2").label(s_splited_pat_name[2]).pin("SDO").capMode(TA::SER).bitPerWord(16).samples(170*16).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes2[curSite] = rdi.id("burst_id2").getBurstPassFail();
aI_Captured_2 = rdi.id("digcapid_2").getVector("SDO");
for (int i=0; i < 170; i++)
{
aI_Captured_2[i+0] = Switch_High_Low_Bits_16Bits(aI_Captured_2[i+0]);
WATERMARK[curSite][i] = aI_Captured_2[i+0];
FuncPrint("WATERMARK" ,WATERMARK[curSite][i]);
WATERMARK_CHIPID_ONLY[curSite][i] = WATERMARK[curSite][i] & 0xFF;
FuncPrint("WATERMARK_CHIPID_ONLY" ,WATERMARK_CHIPID_ONLY[curSite][i]);
WATERMARK_IDX_SUSP[curSite][i] = WATERMARK_CHIPID_ONLY[curSite][i] + i;
FuncPrint("WATERMARK_IDX" ,WATERMARK_IDX_SUSP[curSite][i]);
}
N_RECOVERY_RST_SUSP[curSite] = i_Func_Optimal_Trim_Val(WATERMARK_IDX_SUSP[curSite], 0xAF, 170); //todo criteria='gt'
FuncPrint("N_RECOVERY_RST_SUSP" ,N_RECOVERY_RST_SUSP[curSite]);
T_RECOVERY[curSite] = 112.5e-7 * N_RECOVERY_RST_SUSP[curSite];
FuncPrint("T_RECOVERY" ,T_RECOVERY[curSite]);
T_RECOVERY_SUSP_C[curSite] = 200e-6 + T_RECOVERY[curSite];
FuncPrint("T_RECOVERY_SUSP_C" ,T_RECOVERY_SUSP_C[curSite]);
FOR_EACH_SITE_END();
/* Ori key coments in subpat3 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 35302: {oti('N_RECOVERY_RST_SUSP', 'WATERMARK_IDX_SUSP', '175', 'gt')}
valid comment[ 0] @ avcline 35302: {calc('T_RECOVERY', '0.00001125', '*', 'N_RECOVERY_RST_SUSP')}
valid comment[ 0] @ avcline 35302: {calc('T_RECOVERY_SUSP_C', '0.0002', '+', 'T_RECOVERY')}
valid comment[ 0] @ avcline 35302: {log('T_RECOVERY_SUSP_C', '', '', 0, 0)}
valid comment[ 1] @ avcline 35304: {Test End: T08_02_Soft_Reset_Recovery_Time}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id3");
rdi.func().label(s_splited_pat_name[3]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes3[curSite] = rdi.id("burst_id3").getBurstPassFail();
FuncPrint("i_funcRes3", i_funcRes3[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
TestLog("T_RECOVERY_ACC_C" ,T_RECOVERY_ACC_C[curSite]);
TestLog("T_RECOVERY_SUSP_C" ,T_RECOVERY_SUSP_C[curSite]);
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite] && i_funcRes2[curSite] && i_funcRes3[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T08_02_Soft_Reset_Recovery_Time_R1", T08_02_Soft_Reset_Recovery_Time_R1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
rac('CHIP_ID', 0x0000, 0x0000) # Dummy read to init SPI protocol
wac('FIFO_WATERMARK', 0x02a5) # Write signature to register
sav('VDD', 1.6) # don't trigger a BOR
dly(1e-3)
rac('FIFO_WATERMARK', 0x02a5) # Check signature
sav('VDD', 1.2) # trigger a BOR
dly(1e-3)
sav('VDD', 1.7) # deactivate POR
dly(3e-3) # specified BOOT time
rac('CHIP_ID', 0x0000, 0x0000) # Dummy read to init SPI protocol
dly(10e-6)
rac('FIFO_WATERMARK', 0x0000) # Check that register reset has occurred
sav('VDD', 1.8)
dly(100e-6)
|
/*****************************************************
* T08_03_POR_BOR_VDD_test_V1, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T08_03_POR_BOR_VDD_test_V1: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T08_03_POR_BOR_VDD_test}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 1 > <Author: hmf1rt > <Date: 2024/03/13 13:36:52 GMT >}
valid comment[ 1] @ avcline 315: {sav('VDD', 1.6, 2, 0.01, False, False)}
valid comment[ 2] @ avcline 436: {sav('VDD', 1.2, 2, 0.01, False, False)}
valid comment[ 3] @ avcline 444: {sav('VDD', 1.7, 2, 0.01, False, False)}
valid comment[ 4] @ avcline 687: {sav('VDD', 1.8, 2, 0.01, False, False)}
valid comment[ 5] @ avcline 697: {Test End: T08_03_POR_BOR_VDD_test}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][1]).pin("VDD").vForce(1.6 V).iRange(40 mA)//{sav('VDD', 1.6, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][2]).pin("VDD").vForce(1.2 V).iRange(40 mA)//{sav('VDD', 1.2, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][3]).pin("VDD").vForce(1.7 V).iRange(40 mA)//{sav('VDD', 1.7, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][4]).pin("VDD").vForce(1.8 V).iRange(40 mA)//{sav('VDD', 1.8, 2, 0.01, False, False)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
//Add calc code if necessary
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T08_03_POR_BOR_VDD_test_V1", T08_03_POR_BOR_VDD_test_V1);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# - ramping down the VDD pulse and measure current on VDD (ACC on); detect the POR
# - ramping up VDD and measure current on VDD; detect the POR
# - ramping down the VDD pulse and measure current on VDD (sensors off/STANDBY); detect the POR
#############################################################################################################
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
wac('EXT_MODE', 0xc006) # Switch to FCU register page
wcb('FCU_TEST_CONF.temp_test_force_dis',0x1) # temp off
dly(3e-3) # make sure that TEMP is switched off
wac('EXT_MODE', 0xc000) # Switch to USR register page
wac('FIFO_WATERMARK', 0x02a5) # Write signature to register
# Ramp down VDD pulse from 1.70 V to 1.00 V in 10 mV steps and measure supply current
# Use optimal current measurement range covering 300 uA for full ramp down
for n in range(0, 71, 1):
cmt('Set voltage at pad VDD to {:.2f}V'.format(1.7-0.01*n))
sav("VDD", (170-n)/100.0)
dly(300e-6) # good for any probecard/tester
gac('I_VDD_BOR[{:02d}]'.format(n), 'VDD', i_range=300e-6)
dly(296e-9)
log('I_VDD_BOR[{:02d}]'.format(n))
dly(10e-6)
sav("VDD", 1.6)
dly(3e-3) # specified BOOT time
rac('CHIP_ID', 0x0000, 0x0000) # Dummy read to init SPI protocol
ras('WATERMARK', 'FIFO_WATERMARK')
calc('WATERMARK_IDX_DWN[{:02d}]'.format(n), 'WATERMARK', "+", n)
calc('V_SUPPLY_VDD_DWN[{:02d}]'.format(n), (170-n)/100.0)
wac('FIFO_WATERMARK', 0x02a5) # Write signature to register
oti('N_OPT_RESET_DWN', 'WATERMARK_IDX_DWN', 0) # the first index with a reset is calculated
gvi('V_VDD_BOR', 'V_SUPPLY_VDD_DWN', 'N_OPT_RESET_DWN')
log('V_VDD_BOR')
dly(100e-6)
# Ramp up VDD voltage from 1.00 V to 1.70 V in 10 mV steps and measure supply current
# Use optimal current measurement range covering 100 uA for full ramp up
for n in range(0, 71, 1):
cmt('Set voltage at pad VDD to {:.2f}V'.format(1.0+0.01*n))
sav("VDD", (100+n)/100.0)
dly(3e-3)
# Measure current I_VDD_POR_{n} at pad VDD
gac('I_VDD_POR[{:02d}]'.format(n), 'VDD', i_range=300e-6)
dly(296e-9)
log('I_VDD_POR[{:02d}]'.format(n))
rac('CHIP_ID', 0x0000, 0x0000) # Dummy read to init SPI protocol
wr('FIFO_WATERMARK', 0x02a5) # Write signature to register
ras('WATERMARK', 'FIFO_WATERMARK')
calc('WATERMARK_IDX_UP[{:02d}]'.format(n), 'WATERMARK', "+", n)
calc('V_SUPPLY_VDD_UP[{:02d}]'.format(n), (100+n)/100.0)
oti('N_OPT_RESET_UP', 'WATERMARK_IDX_UP', 0x02a5) # the first index with an activation is calculated
gvi('V_VDD_POR', 'V_SUPPLY_VDD_UP', 'N_OPT_RESET_UP')
log('V_VDD_POR')
dly(100e-6)
sav("VDD", 1.8) # VDD back to original voltage, T01_10 CONFIG_STC_ACC
dly(100e-6)
|
/*****************************************************
* T08_04_POR_BOR_VDD_Char_V1, description file version Notfound, avc file version Notfound
* First Editor : jsh5sgh
* Code generated with autocoding tool V2.9.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH: fix some bugs.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T08_04_POR_BOR_VDD_Char_V1: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
double V_VDD;
double V_VDDIO;
virtual void initialize()
{
}
virtual void run()
{
static int iVDD_Spec;
GET_USER_FLAG("VDD_Spec", &iVDD_Spec);
if (iVDD_Spec >1)
return;
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 5;
vector<int> i_comment_line[i_split_count];
ARRAY_I aI_Captured_0, aI_Captured_2;
static int WATERMARK[xNSitES][71], WATERMARK_IDX_DWN[xNSitES][71], WATERMARK_IDX_UP[xNSitES][71];
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES], i_funcRes2[xNSitES], i_funcRes3[xNSitES];
static int i_funcRes4[xNSitES];
static double V_SUPPLY_VDD_DWN[xNSitES][71], I_VDD_BOR[xNSitES][71];
static double V_SUPPLY_VDD_UP[xNSitES][71], I_VDD_POR[xNSitES][71];
static int N_OPT_RESET_DWN[xNSitES], N_OPT_RESET_UP[xNSitES];
static double V_VDD_BOR[xNSitES], V_VDD_POR[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
//!"CTmsg: cut pattern to 5 parts @ oriAVCvecline [32964, 32975, 55485, 55496]
//!"CTmsg: cut pattern to 5 parts @ binarypatline [32954, 32965, 55475, 55486]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
V_VDD = Primary.getLevelSpec().getSpecValue("VDD");
Func_Print(V_VDD, "V_VDD");
V_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
Func_Print(V_VDDIO, "V_VDDIO");
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T08_04_POR_BOR_VDD_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 1 > <Author: hmf1rt > <Date: 2024/03/13 13:36:52 GMT >}
valid comment[ 1] @ avcline 943: {cmt: Set voltage at pad VDD to 1.70V}
valid comment[ 1] @ avcline 943: {sav('VDD', 1.7, 2, 0.01, False, False)}
valid comment[ 2] @ avcline 952: {gac('I_VDD_BOR[00]', 'VDD', 0.0003, 0.0001, True)}
valid comment[ 3] @ avcline 956: {log('I_VDD_BOR[00]', '', '', 0, 0)}
valid comment[ 4] @ avcline 966: {sav('VDD', 1.6, 2, 0.01, False, False)}
valid comment[ 5] @ avcline 1089: {ras('WATERMARK', 'FIFO_WATERMARK')}
valid comment[ 6] @ avcline 1202: {calc('WATERMARK_IDX_DWN[00]', 'WATERMARK', '+', '0')}
valid comment[ 6] @ avcline 1202: {calc('V_SUPPLY_VDD_DWN[00]', '1.7', '', '')}
valid comment[ 7] @ avcline 1394: {cmt: Set voltage at pad VDD to 1.69V}
valid comment[ 7] @ avcline 1394: {sav('VDD', 1.69, 2, 0.01, False, False)}
valid comment[ 8] @ avcline 1403: {gac('I_VDD_BOR[01]', 'VDD', 0.0003, 0.0001, True)}
valid comment[ 9] @ avcline 1407: {log('I_VDD_BOR[01]', '', '', 0, 0)}
valid comment[ 10] @ avcline 1417: {sav('VDD', 1.6, 2, 0.01, False, False)}
valid comment[ 11] @ avcline 1540: {ras('WATERMARK', 'FIFO_WATERMARK')}
valid comment[ 12] @ avcline 1653: {calc('WATERMARK_IDX_DWN[01]', 'WATERMARK', '+', '1')}
valid comment[ 12] @ avcline 1653: {calc('V_SUPPLY_VDD_DWN[01]', '1.69', '', '')}
...
valid comment[421] @ avcline 32513: {cmt: Set voltage at pad VDD to 1.00V}
valid comment[421] @ avcline 32513: {sav('VDD', 1, 2, 0.01, False, False)}
valid comment[422] @ avcline 32522: {gac('I_VDD_BOR[70]', 'VDD', 0.0003, 0.0001, True)}
valid comment[423] @ avcline 32526: {log('I_VDD_BOR[70]', '', '', 0, 0)}
valid comment[424] @ avcline 32536: {sav('VDD', 1.6, 2, 0.01, False, False)}
valid comment[425] @ avcline 32659: {ras('WATERMARK', 'FIFO_WATERMARK')}
valid comment[426] @ avcline 32772: {calc('WATERMARK_IDX_DWN[70]', 'WATERMARK', '+', '70')}
valid comment[426] @ avcline 32772: {calc('V_SUPPLY_VDD_DWN[70]', '1.0', '', '')}
*/
string s_rdi_unit, s_rdi_burstid, s_rdi_dcid;
SWITCH_VDD(s_rdi_unit, s_rdi_burstid, s_rdi_dcid, 0);
RDI_UNIT_INIT(s_rdi_unit);
RDI_BEGIN(mode);
rdi.burstId(s_rdi_burstid);
rdi.digCap("digcapid_0").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(71*16).execute();
for(int i=0; i<71; i++) {
double v_bor = 1.70 - 0.01*i;
rdi.dc(s_rdi_dcid).label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][i*6+1]).pin("VDD").vForce(v_bor V)//{sav('VDD', 1.7, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][i*6+2]).pin("VDD").vForce(v_bor V).iMeas().iRange(1000 uA).average(32).measWait(1 ms)//{gac('I_VDD_BOR[00]', 'VDD', 0.0003, 0.0001, True)}
.insertSub(i_comment_line[0][i*6+4]).pin("VDD").vForce(1.6 V).iRange(40 mA)//{sav('VDD', 1.6, 2, 0.01, False, False)}
.cont();
}
rdi.dc(s_rdi_dcid).label(s_splited_pat_name[0]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id(s_rdi_burstid).getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
ARRAY_D ad_jsubresults_VDD; ad_jsubresults_VDD.resize(71); ad_jsubresults_VDD.init(-9.9);
ad_jsubresults_VDD = rdi.id(s_rdi_dcid).getMultiValue("VDD");
for (int i=0; i < 71; i++)
{
aI_Captured_0[i+0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[i+0]);
I_VDD_BOR[curSite][i] = ad_jsubresults_VDD[i];
FuncPrint("I_VDD_BOR" ,I_VDD_BOR[curSite][i]);
WATERMARK[curSite][i] = aI_Captured_0[i+0];
FuncPrint("WATERMARK" ,WATERMARK[curSite][i]);
WATERMARK_IDX_DWN[curSite][i] = WATERMARK[curSite][i] + i;
FuncPrint("WATERMARK_IDX_DWN" ,WATERMARK_IDX_DWN[curSite][i]);
V_SUPPLY_VDD_DWN[curSite][i] = (170-i)/100.0;
FuncPrint("V_SUPPLY_VDD_DWN" ,V_SUPPLY_VDD_DWN[curSite][i]);
}
N_OPT_RESET_DWN[curSite] = i_Func_Optimal_Trim_Val(WATERMARK_IDX_DWN[curSite], 0, 71);
FuncPrint("N_OPT_RESET_DWN" ,N_OPT_RESET_DWN[curSite]);
V_VDD_BOR[curSite] = V_SUPPLY_VDD_DWN[curSite][N_OPT_RESET_DWN[curSite]];
FuncPrint("V_VDD_BOR" ,V_VDD_BOR[curSite]);
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 32964: {oti('N_OPT_RESET_DWN', 'WATERMARK_IDX_DWN', '0', '')}
valid comment[ 0] @ avcline 32964: {log('V_VDD_BOR', '', '', 0, 0)}
valid comment[ 1] @ avcline 32975: {cmt: Set voltage at pad VDD to 1.00V}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.func().label(s_splited_pat_name[1]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
FuncPrint("i_funcRes1", i_funcRes1[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
/* Ori key coments in subpat2 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 32975: {sav('VDD', 1, 2, 0.01, False, False)}
valid comment[ 1] @ avcline 32985: {gac('I_VDD_POR[00]', 'VDD', 0.0003, 0.0001, True)}
valid comment[ 2] @ avcline 32989: {log('I_VDD_POR[00]', '', '', 0, 0)}
valid comment[ 3] @ avcline 33182: {ras('WATERMARK', 'FIFO_WATERMARK')}
valid comment[ 4] @ avcline 33295: {calc('WATERMARK_IDX_UP[00]', 'WATERMARK', '+', '0')}
valid comment[ 4] @ avcline 33295: {calc('V_SUPPLY_VDD_UP[00]', '1.0', '', '')}
valid comment[ 4] @ avcline 33295: {cmt: Set voltage at pad VDD to 1.01V}
valid comment[ 4] @ avcline 33295: {sav('VDD', 1.01, 2, 0.01, False, False)}
valid comment[ 5] @ avcline 33302: {gac('I_VDD_POR[01]', 'VDD', 0.0003, 0.0001, True)}
valid comment[ 6] @ avcline 33306: {log('I_VDD_POR[01]', '', '', 0, 0)}
valid comment[ 7] @ avcline 33499: {ras('WATERMARK', 'FIFO_WATERMARK')}
valid comment[ 8] @ avcline 33612: {calc('WATERMARK_IDX_UP[01]', 'WATERMARK', '+', '1')}
valid comment[ 8] @ avcline 33612: {calc('V_SUPPLY_VDD_UP[01]', '1.01', '', '')}
valid comment[ 8] @ avcline 33612: {cmt: Set voltage at pad VDD to 1.02V}
...
valid comment[280] @ avcline 55168: {sav('VDD', 1.7, 2, 0.01, False, False)}
valid comment[281] @ avcline 55175: {gac('I_VDD_POR[70]', 'VDD', 0.0003, 0.0001, True)}
valid comment[282] @ avcline 55179: {log('I_VDD_POR[70]', '', '', 0, 0)}
valid comment[283] @ avcline 55372: {ras('WATERMARK', 'FIFO_WATERMARK')}
valid comment[284] @ avcline 55485: {calc('WATERMARK_IDX_UP[70]', 'WATERMARK', '+', '70')}
valid comment[284] @ avcline 55485: {calc('V_SUPPLY_VDD_UP[70]', '1.7', '', '')}
*/
SWITCH_VDD(s_rdi_unit, s_rdi_burstid, s_rdi_dcid, 2);
RDI_BEGIN(mode);
rdi.burstId(s_rdi_burstid);
rdi.digCap("digcapid_2").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(71*16).execute();
for(int i=0; i<71; i++) {
double v_por = 1.00 + 0.01*i;
rdi.dc(s_rdi_dcid).label(s_splited_pat_name[2])
.insertSub(i_comment_line[2][i*4]) .pin("VDD").vForce(v_por V)//{sav('VDD', 1, 2, 0.01, False, False)}
.insertSub(i_comment_line[2][i*4+2]).pin("VDD").vForce(v_por V).iRange(100 uA).iMeas().average(128).measWait(1 ms)//{gac('I_VDD_BOR[00]', 'VDD', 0.0003, 0.0001, True)}
.cont();
}
rdi.dc(s_rdi_dcid).label(s_splited_pat_name[2]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes2[curSite] = rdi.id(s_rdi_burstid).getBurstPassFail();
aI_Captured_2 = rdi.id("digcapid_2").getVector("SDO");
ARRAY_D ad_jsubresults_VDD; ad_jsubresults_VDD.resize(71); ad_jsubresults_VDD.init(-9.9);
ad_jsubresults_VDD = rdi.id(s_rdi_dcid).getMultiValue("VDD");
for (int i=0; i < 71; i++)
{
aI_Captured_2[i+0] = Switch_High_Low_Bits_16Bits(aI_Captured_2[i+0]);
I_VDD_POR[curSite][i] = ad_jsubresults_VDD[i];
FuncPrint("I_VDD_POR" ,I_VDD_POR[curSite][i]);
WATERMARK[curSite][i] = aI_Captured_2[i+0];
FuncPrint("WATERMARK" ,WATERMARK[curSite][i]);
WATERMARK_IDX_UP[curSite][i] = WATERMARK[curSite][i] + i;
FuncPrint("WATERMARK_IDX_UP" ,WATERMARK_IDX_UP[curSite][i]);
V_SUPPLY_VDD_UP[curSite][i] = (100+i)/100.0;
FuncPrint("V_SUPPLY_VDD_UP" ,V_SUPPLY_VDD_UP[curSite][i]);
}
N_OPT_RESET_UP[curSite] = i_Func_Optimal_Trim_Val(WATERMARK_IDX_UP[curSite], 0x2a5, 71); //todo confirm if: criteria='gt'
FuncPrint("N_OPT_RESET_UP" ,N_OPT_RESET_UP[curSite]);
V_VDD_POR[curSite] = V_SUPPLY_VDD_UP[curSite][N_OPT_RESET_UP[curSite]];
FuncPrint("V_VDD_POR" ,V_VDD_POR[curSite]);
FOR_EACH_SITE_END();
/* Ori key coments in subpat3 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 55485: {oti('N_OPT_RESET_UP', 'WATERMARK_IDX_UP', '677', '')}
valid comment[ 0] @ avcline 55485: {log('V_VDD_POR', '', '', 0, 0)}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id3");
rdi.func().label(s_splited_pat_name[3]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes3[curSite] = rdi.id("burst_id3").getBurstPassFail();
FuncPrint("i_funcRes3", i_funcRes3[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
/* Ori key coments in subpat4 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 55496: {sav('VDD', 1.8, 2, 0.01, False, False)}
valid comment[ 1] @ avcline 55505: {Test End: T08_04_POR_BOR_VDD_Char}
*/
SWITCH_VDD(s_rdi_unit, s_rdi_burstid, s_rdi_dcid, 4);
RDI_BEGIN(mode);
rdi.burstId(s_rdi_burstid);
rdi.dc(s_rdi_dcid).label(s_splited_pat_name[4])
.insertSub(i_comment_line[4][0]).pin("VDD").vForce(V_VDD V).iRange(40 mA)//{sav('VDD', 1.8, 2, 0.01, False, False)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes4[curSite] = rdi.id(s_rdi_burstid).getBurstPassFail();
//Add calc code if necessary
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
for (int i=0; i < 71; i++)
{
TestLog(s_Func_Test_Name_Add_2Num("I_VDD_POR_", i), I_VDD_POR[curSite][i]);
TestLog(s_Func_Test_Name_Add_2Num("I_VDD_BOR_", i), I_VDD_BOR[curSite][i]);
}
TestLog("V_VDD_POR" ,V_VDD_POR[curSite]);
TestLog("V_VDD_BOR" ,V_VDD_BOR[curSite]);
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite] && i_funcRes2[curSite] && i_funcRes3[curSite] && i_funcRes4[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T08_04_POR_BOR_VDD_Char_V1", T08_04_POR_BOR_VDD_Char_V1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
rac('CHIP_ID', 0x0000, 0x0000) # Dummy read to init SPI protocol
wac('FIFO_WATERMARK', 0x025a) # Write signature to register
sav('VDDIO', 1.15, v_range=4.0) # some margin for the real device
dly(1e-3)
rac('FIFO_WATERMARK', 0x025a) # Check signature
sav('VDDIO', 0.8, v_range=4.0) # some margin for the real device
dly(1e-3)
sav('VDDIO', 1.15, v_range=4.0) # some margin for the real device
dly(3e-3) # specified BOOT time
rac('CHIP_ID', 0x0000, 0x0000) # Dummy read to init SPI protocol
dly(10e-6)
rac('FIFO_WATERMARK', 0x0000) # Check that register reset has occurred
sav('VDDIO', 3.0, v_range=4.0)
dly(100e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T08_05_POR_BOR_VDDIO_test_V1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double v_VDDIO, v_VDD;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
v_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
v_VDD = Primary.getLevelSpec().getSpecValue("VDD");
// ===========Pattern T08_05_POR_BOR_VDDIO_test_V1_AVC1_PY1=============
// key comment[0]is || TCMT 305," {sav('VDDIO', 1.15, 4, 0.01, False, False)} {dly(0.001, 0)}"
// key comment[1]is || TCMT 424," {sav('VDDIO', 0.8, 4, 0.01, False, False)} {dly(0.001, 0)}"
// key comment[2]is || TCMT 466," {sav('VDDIO', 1.15, 4, 0.01, False, False)} {dly(0.003, 0)}"
// key comment[3]is || TCMT 721," {sav('VDDIO', 3, 4, 0.01, False, False)} {dly(0.0001, 0)}"
// ==============================================================
rdi.dc().pin("VDDIO").vForce(v_VDDIO).execute();
rdi.func("id0").label(s_label_name).stopVec(i_comment_line0[0]-1).execute();
Primary.getLevelSpec().change("VDDIO",1.15);
FLUSH(TM::APRM);
rdi.dc().pin("VDDIO").vForce(1.02 V).execute();
rdi.func("id1").label(s_label_name).startVec(i_comment_line0[0]).stopVec(i_comment_line0[1]-1).execute();
Primary.getLevelSpec().change("VDDIO",0.8);
FLUSH(TM::APRM);
rdi.dc().pin("VDDIO").vForce(0.55 V).execute();
rdi.func("id2").label(s_label_name).startVec(i_comment_line0[1]).stopVec(i_comment_line0[2]-1).execute();
Primary.getLevelSpec().change("VDDIO",1.15);
FLUSH(TM::APRM);
rdi.dc().pin("VDDIO").vForce(1.08 V).execute();
rdi.func("id3").label(s_label_name).startVec(i_comment_line0[2]).stopVec(i_comment_line0[3]-1).execute();
Primary.getLevelSpec().change("VDDIO",3);
FLUSH(TM::APRM);
rdi.dc().pin("VDDIO").vForce(1.8 V).execute();
rdi.func("id4").label(s_label_name).startVec(i_comment_line0[3]).execute();
ON_FIRST_INVOCATION_END();
int Func_result = 1;
for (int i=0; i<5; i++)
{
Func_result = Func_result * rdi.id("id"+rdi.itos(i)).getPassFail();
}
for (int i=0; i<5; i++)
{
FuncPrint("Func_result"+rdi.itos(i), rdi.id("id"+rdi.itos(i)).getPassFail());
}
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T08_05_POR_BOR_VDDIO_test_V1", T08_05_POR_BOR_VDDIO_test_V1);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# - ramping down the VDDIO pulse and measure current on VDD (ACC on); detect the power on reset
# - ramping up VDDIO and measure current on VDD(sensors off); detect the power on reset
#############################################################################################################
cmt('Version info: $Revision: bai430aa_rel/2 $ $Author: luz3sgh $ $Date: 2024/07/24 02:06:55 GMT $')
wac('EXT_MODE', 0xc006) # Switch to FCU register page
wcb('FCU_TEST_CONF.temp_test_force_dis',0x1) # temp off
dly(3e-3) # make sure that TEMP is switched off
wac('EXT_MODE', 0xc000) # Switch to USR register page
wac('FIFO_WATERMARK', 0x02a5) # Write signature to register
# Ramp down VDDIO pulse from 1.20 V to 0.60 V in 10 mV steps and measure supply current
# Use optimal current measurement range covering 300 uA for full ramp down
for n in range(0, 61, 1):
cmt('Set voltage at pad VDDIO to {:.2f}V'.format(1.2-0.01*n))
sav("VDDIO", (120-n)/100.0, sim_ignore=True)
dly(300e-6) # good for any probecard/tester
gac('I_VDDIO_BOR[{:02d}]'.format(n), 'VDD', i_range=300e-6)
dly(296e-9)
log('I_VDDIO_BOR[{:02d}]'.format(n))
dly(10e-6)
sav("VDDIO", 1.6)
dly(3e-3) # specified BOOT time
rac('CHIP_ID', 0x0000, 0x0000) # Dummy read to init SPI protocol
ras('WATERMARK', 'FIFO_WATERMARK')
calc('WATERMARK_IDX_DWN[{:02d}]'.format(n), 'WATERMARK', "+", n)
calc('V_SUPPLY_VDDIO_DWN[{:02d}]'.format(n), (120-n)/100.0)
wac('FIFO_WATERMARK', 0x02a5) # Write signature to register
oti('N_OPT_RESET_DWN', 'WATERMARK_IDX_DWN', 0) # the first index with a reset is calculated
gvi('V_VDDIO_BOR', 'V_SUPPLY_VDDIO_DWN', 'N_OPT_RESET_DWN')
log('V_VDDIO_BOR')
dly(100e-6)
# Ramp up VDDIO voltage from 0.60 V to 1.20 V in 10 mV steps and measure supply current
# Use optimal current measurement range covering 100 uA for full ramp up
for n in range(0, 61, 1):
cmt('Set voltage at pad VDDIO to {:.2f}V'.format(0.6+0.01*n))
sav("VDDIO", (60+n)/100.0, sim_ignore=True) # force 0.6V ras() will face issue during pattern gen
dly(3e-3)
gac('I_VDDIO_POR[{:02d}]'.format(n), 'VDD', i_range=100e-6)
dly(296e-9)
log('I_VDDIO_POR[{:02d}]'.format(n))
rac('CHIP_ID', 0x0000, 0x0000) # Dummy read to init SPI protocol
wr('FIFO_WATERMARK', 0x02a5) # Write signature to register
ras('WATERMARK', 'FIFO_WATERMARK')
calc('WATERMARK_IDX_UP[{:02d}]'.format(n), 'WATERMARK', "+", n)
calc('V_SUPPLY_VDDIO_UP[{:02d}]'.format(n), (60+n)/100.0)
oti('N_OPT_RESET_UP', 'WATERMARK_IDX_UP', 0x02a5) # the first index with an activation is calculated
gvi('V_VDDIO_POR', 'V_SUPPLY_VDDIO_UP', 'N_OPT_RESET_UP')
log('V_VDDIO_POR')
dly(100e-6)
sav("VDDIO", 3.0, v_range=3.0) # VDDIO back to original voltage, T01_10 CONFIG_STC_ACC
dly(100e-6)
|
/*****************************************************
* T08_06_POR_BOR_VDDIO_Char_R1, description file version Notfound, avc file version Notfound
* First Editor : jsh5sgh
* Code generated with autocoding tool V2.9.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH V2: VDDIO force back to 3.0V
* JSH5SGH: fix some bugs.
* JSH5SGH: version update.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T08_06_POR_BOR_VDDIO_Char_R1: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
double V_VDD;
double V_VDDIO;
virtual void initialize()
{
}
virtual void run()
{
static int iVDD_Spec;
GET_USER_FLAG("VDD_Spec", &iVDD_Spec);
if (iVDD_Spec >1)
return;
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 5;
vector<int> i_comment_line[i_split_count];
ARRAY_I aI_Captured_0, aI_Captured_2;
static int WATERMARK[xNSitES][61], WATERMARK_IDX_DWN[xNSitES][61], WATERMARK_IDX_UP[xNSitES][61];
static double V_SUPPLY_VDDIO_DWN[xNSitES][61], I_VDDIO_BOR[xNSitES][61];
static double V_SUPPLY_VDDIO_UP[xNSitES][61], I_VDDIO_POR[xNSitES][61];
static int N_OPT_RESET_DWN[xNSitES], N_OPT_RESET_UP[xNSitES];
static double V_VDDIO_BOR[xNSitES], V_VDDIO_POR[xNSitES];
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES], i_funcRes2[xNSitES], i_funcRes3[xNSitES];
static int i_funcRes4[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
//!"CTmsg: cut pattern to 5 parts @ oriAVCvecline [28454, 28465, 47805, 47816]
//!"CTmsg: cut pattern to 5 parts @ binarypatline [28444, 28455, 47795, 47806]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
V_VDD = Primary.getLevelSpec().getSpecValue("VDD");
Func_Print(V_VDD, "V_VDD");
V_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
Func_Print(V_VDDIO, "V_VDDIO");
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T08_06_POR_BOR_VDDIO_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 1 > <Author: hmf1rt > <Date: 2024/03/13 13:36:52 GMT >}
valid comment[ 1] @ avcline 943: {cmt: Set voltage at pad VDDIO to 1.20V}
valid comment[ 1] @ avcline 943: {sav('VDDIO', 1.2, 2, 0.01, False, True)}
valid comment[ 2] @ avcline 952: {gac('I_VDDIO_BOR[00]', 'VDD', 0.0003, 0.0001, True)}
valid comment[ 3] @ avcline 956: {log('I_VDDIO_BOR[00]', '', '', 0, 0)}
valid comment[ 4] @ avcline 966: {sav('VDDIO', 1.6, 2, 0.01, False, False)}
valid comment[ 5] @ avcline 1089: {ras('WATERMARK', 'FIFO_WATERMARK')}
valid comment[ 6] @ avcline 1202: {calc('WATERMARK_IDX_DWN[00]', 'WATERMARK', '+', '0')}
valid comment[ 6] @ avcline 1202: {calc('V_SUPPLY_VDDIO_DWN[00]', '1.2', '', '')}
valid comment[ 7] @ avcline 1394: {cmt: Set voltage at pad VDDIO to 1.19V}
valid comment[ 7] @ avcline 1394: {sav('VDDIO', 1.19, 2, 0.01, False, True)}
valid comment[ 8] @ avcline 1403: {gac('I_VDDIO_BOR[01]', 'VDD', 0.0003, 0.0001, True)}
valid comment[ 9] @ avcline 1407: {log('I_VDDIO_BOR[01]', '', '', 0, 0)}
valid comment[ 10] @ avcline 1417: {sav('VDDIO', 1.6, 2, 0.01, False, False)}
valid comment[ 11] @ avcline 1540: {ras('WATERMARK', 'FIFO_WATERMARK')}
valid comment[ 12] @ avcline 1653: {calc('WATERMARK_IDX_DWN[01]', 'WATERMARK', '+', '1')}
valid comment[ 12] @ avcline 1653: {calc('V_SUPPLY_VDDIO_DWN[01]', '1.19', '', '')}
...
valid comment[361] @ avcline 28003: {cmt: Set voltage at pad VDDIO to 0.60V}
valid comment[361] @ avcline 28003: {sav('VDDIO', 0.6, 2, 0.01, False, True)}
valid comment[362] @ avcline 28012: {gac('I_VDDIO_BOR[60]', 'VDD', 0.0003, 0.0001, True)}
valid comment[363] @ avcline 28016: {log('I_VDDIO_BOR[60]', '', '', 0, 0)}
valid comment[364] @ avcline 28026: {sav('VDDIO', 1.6, 2, 0.01, False, False)}
valid comment[365] @ avcline 28149: {ras('WATERMARK', 'FIFO_WATERMARK')}
valid comment[366] @ avcline 28262: {calc('WATERMARK_IDX_DWN[60]', 'WATERMARK', '+', '60')}
valid comment[366] @ avcline 28262: {calc('V_SUPPLY_VDDIO_DWN[60]', '0.6', '', '')}
*/
string s_rdi_unit, s_rdi_burstid, s_rdi_dcid;
SWITCH_VDD(s_rdi_unit, s_rdi_burstid, s_rdi_dcid, 0);
RDI_UNIT_INIT(s_rdi_unit);
RDI_BEGIN(mode);
rdi.burstId(s_rdi_burstid);
rdi.digCap("digcapid_0").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(61*16).execute();
for(int i=0; i<61; i++) {
double v_vddio_bor = 1.20 - 0.01*i;
rdi.dc(s_rdi_dcid).label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][6*i+1]).pin("VDDIO").vForce(v_vddio_bor V)//{sav('VDDIO', 1.2, 2, 0.01, False, True)}
.insertSub(i_comment_line[0][6*i+2]).pin("VDD").vForce(V_VDDIO).iRange(1 mA).iMeas().average(128).measWait(1 ms)//{gac('I_VDDIO_BOR[00]', 'VDD', 0.0003, 0.0001, True)}
.insertSub(i_comment_line[0][6*i+4]).pin("VDDIO").vForce(1.6 V)//{sav('VDDIO', 1.6, 2, 0.01, False, False)}
.cont();
}
rdi.dc(s_rdi_dcid).label(s_splited_pat_name[0]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id(s_rdi_burstid).getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
ARRAY_D ad_jsubresults_VDDIO = rdi.id(s_rdi_dcid).getMultiValue("VDD");
for (int i=0; i < 61; i++)
{
aI_Captured_0[i+0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[i+0]);
I_VDDIO_BOR[curSite][i] = ad_jsubresults_VDDIO[i];
FuncPrint("I_VDDIO_BOR" ,I_VDDIO_BOR[curSite][i]);
WATERMARK[curSite][i] = aI_Captured_0[i+0];
FuncPrint("WATERMARK" ,WATERMARK[curSite][i]);
WATERMARK_IDX_DWN[curSite][i] = WATERMARK[curSite][i] + i;
FuncPrint("WATERMARK_IDX_DWN" ,WATERMARK_IDX_DWN[curSite][i]);
V_SUPPLY_VDDIO_DWN[curSite][i] = (120-i)/100.0;
FuncPrint("V_SUPPLY_VDDIO_DWN" ,V_SUPPLY_VDDIO_DWN[curSite][i]);
}
N_OPT_RESET_DWN[curSite] = i_Func_Optimal_Trim_Val(WATERMARK_IDX_DWN[curSite], 0, 61);
FuncPrint("N_OPT_RESET_DWN" ,N_OPT_RESET_DWN[curSite]);
V_VDDIO_BOR[curSite] = V_SUPPLY_VDDIO_DWN[curSite][N_OPT_RESET_DWN[curSite]];
FuncPrint("V_VDDIO_BOR" ,V_VDDIO_BOR[curSite]);
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 28454: {oti('N_OPT_RESET_DWN', 'WATERMARK_IDX_DWN', '0', '')}
valid comment[ 0] @ avcline 28454: {log('V_VDDIO_BOR', '', '', 0, 0)}
valid comment[ 1] @ avcline 28465: {cmt: Set voltage at pad VDDIO to 0.60V}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.func().label(s_splited_pat_name[1]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
FuncPrint("i_funcRes1", i_funcRes1[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
/* Ori key coments in subpat2 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 28465: {sav('VDDIO', 0.6, 2, 0.01, False, True)}
valid comment[ 1] @ avcline 28475: {gac('I_VDDIO_POR[00]', 'VDD', 0.0001, 0.0001, True)}
valid comment[ 2] @ avcline 28479: {log('I_VDDIO_POR[00]', '', '', 0, 0)}
valid comment[ 3] @ avcline 28672: {ras('WATERMARK', 'FIFO_WATERMARK')}
valid comment[ 4] @ avcline 28785: {calc('WATERMARK_IDX_UP[00]', 'WATERMARK', '+', '0')}
valid comment[ 4] @ avcline 28785: {calc('V_SUPPLY_VDDIO_UP[00]', '0.6', '', '')}
valid comment[ 4] @ avcline 28785: {cmt: Set voltage at pad VDDIO to 0.61V}
valid comment[ 4] @ avcline 28785: {sav('VDDIO', 0.61, 2, 0.01, False, True)}
valid comment[ 5] @ avcline 28792: {gac('I_VDDIO_POR[01]', 'VDD', 0.0001, 0.0001, True)}
valid comment[ 6] @ avcline 28796: {log('I_VDDIO_POR[01]', '', '', 0, 0)}
valid comment[ 7] @ avcline 28989: {ras('WATERMARK', 'FIFO_WATERMARK')}
valid comment[ 8] @ avcline 29102: {calc('WATERMARK_IDX_UP[01]', 'WATERMARK', '+', '1')}
valid comment[ 8] @ avcline 29102: {calc('V_SUPPLY_VDDIO_UP[01]', '0.61', '', '')}
...
valid comment[240] @ avcline 47488: {cmt: Set voltage at pad VDDIO to 1.20V}
valid comment[240] @ avcline 47488: {sav('VDDIO', 1.2, 2, 0.01, False, True)}
valid comment[241] @ avcline 47495: {gac('I_VDDIO_POR[60]', 'VDD', 0.0001, 0.0001, True)}
valid comment[242] @ avcline 47499: {log('I_VDDIO_POR[60]', '', '', 0, 0)}
valid comment[243] @ avcline 47692: {ras('WATERMARK', 'FIFO_WATERMARK')}
valid comment[244] @ avcline 47805: {calc('WATERMARK_IDX_UP[60]', 'WATERMARK', '+', '60')}
valid comment[244] @ avcline 47805: {calc('V_SUPPLY_VDDIO_UP[60]', '1.2', '', '')}
*/
SWITCH_VDD(s_rdi_unit, s_rdi_burstid, s_rdi_dcid, 2);
RDI_BEGIN(mode);
rdi.burstId(s_rdi_burstid);
rdi.digCap("digcapid_2").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(61*16).execute();
for(int i=0; i<61; i++) {
double v_vddio_por = 0.60 + 0.01*i;
rdi.dc(s_rdi_dcid).label(s_splited_pat_name[2])
.insertSub(i_comment_line[2][4*i+0]).pin("VDDIO").vForce(v_vddio_por V)//{sav('VDDIO', 0.6, 2, 0.01, False, True)}
.insertSub(i_comment_line[2][4*i+1]+1).pin("VDD").vForce(V_VDDIO).iRange(1000 uA).iMeas().average(128).measWait(1 ms)//{gac('I_VDDIO_POR[00]', 'VDD', 0.0001, 0.0001, True)}
.cont();
}
rdi.dc(s_rdi_dcid).label(s_splited_pat_name[2]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes2[curSite] = rdi.id(s_rdi_burstid).getBurstPassFail();
aI_Captured_2 = rdi.id("digcapid_2").getVector("SDO");
ARRAY_D ad_jsubresults_VDDIO = rdi.id(s_rdi_dcid).getMultiValue("VDD");
for (int i=0; i < 61; i++)
{
aI_Captured_2[i+0] = Switch_High_Low_Bits_16Bits(aI_Captured_2[i+0]);
I_VDDIO_POR[curSite][i] = ad_jsubresults_VDDIO[i];
FuncPrint("I_VDDIO_POR" ,I_VDDIO_POR[curSite][i]);
WATERMARK[curSite][i] = aI_Captured_2[i+0];
FuncPrint("WATERMARK" ,WATERMARK[curSite][i]);
WATERMARK_IDX_UP[curSite][i] = WATERMARK[curSite][i] + i;
FuncPrint("WATERMARK_IDX_UP" ,WATERMARK_IDX_UP[curSite][i]);
V_SUPPLY_VDDIO_UP[curSite][i] = (60+i)/100.0;
FuncPrint("V_SUPPLY_VDDIO_UP" ,V_SUPPLY_VDDIO_UP[curSite][i]);
}
N_OPT_RESET_UP[curSite] = i_Func_Optimal_Trim_Val(WATERMARK_IDX_UP[curSite], 0x2a5, 61); //todo confirm if: criteria='gt'
FuncPrint("N_OPT_RESET_UP" ,N_OPT_RESET_UP[curSite]);
V_VDDIO_POR[curSite] = V_SUPPLY_VDDIO_UP[curSite][N_OPT_RESET_UP[curSite]];
FuncPrint("V_VDDIO_POR" ,V_VDDIO_POR[curSite]);
FOR_EACH_SITE_END();
/* Ori key coments in subpat3 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 47805: {oti('N_OPT_RESET_UP', 'WATERMARK_IDX_UP', '677', '')}
valid comment[ 0] @ avcline 47805: {log('V_VDDIO_POR', '', '', 0, 0)}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id3");
rdi.func().label(s_splited_pat_name[3]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes3[curSite] = rdi.id("burst_id3").getBurstPassFail();
FuncPrint("i_funcRes3", i_funcRes3[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
/* Ori key coments in subpat4 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 47816: {sav('VDDIO', 3.0, 2, 0.01, False, False)}
valid comment[ 1] @ avcline 47825: {Test End: T08_06_POR_BOR_VDDIO_Char}
*/
SWITCH_VDD(s_rdi_unit, s_rdi_burstid, s_rdi_dcid, 4);
RDI_BEGIN(mode);
rdi.burstId(s_rdi_burstid);
rdi.dc(s_rdi_dcid).label(s_splited_pat_name[4])
.insertSub(i_comment_line[4][0]).pin("VDDIO").vForce(V_VDDIO V).iRange(40 mA)//{sav('VDDIO', TODO ?1.8, 2, 0.01, False, False)}
.insertSub(i_comment_line[4][0]).pin("VDD").vForce(V_VDD V).iRange(40 mA)//{sav('VDDIO', TODO ?1.8, 2, 0.01, False, False)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes4[curSite] = rdi.id(s_rdi_burstid).getBurstPassFail();
//Add calc code if necessary
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
for (int i=0; i < 61; i++)
{
TestLog(s_Func_Test_Name_Add_2Num("I_VDDIO_POR_", i), I_VDDIO_POR[curSite][i]);
TestLog(s_Func_Test_Name_Add_2Num("I_VDDIO_BOR_", i), I_VDDIO_BOR[curSite][i]);
}
TestLog("V_VDDIO_POR" ,V_VDDIO_POR[curSite]);
TestLog("V_VDDIO_BOR" ,V_VDDIO_BOR[curSite]);
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite] && i_funcRes2[curSite] && i_funcRes3[curSite] && i_funcRes4[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T08_06_POR_BOR_VDDIO_Char_R1", T08_06_POR_BOR_VDDIO_Char_R1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
wac('EXT_MODE', 0xc009) # Switch to IO register page
# Measure sink capability
wac('OCP_MASK', 0x000f) # Set masking register
wr('IO_INT_CTRL', 0x0004) # Enable INT1 output; Set active low, INT1 in high state
rac('IO_INT_CTRL', 0x0004, 0x000f) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
cmt('Configure tester to sink 3 mA current from pad INT1')
sac('INT1', -3e-3, i_range=-10e-3, sim_ignore=True)
dly(100e-6)
gav('V_PAD_SINK', 'INT1', v_range=4.0)
cmt('Calculate REL_V_PAD_SINK = V_PAD_SINK / VDDIO')
log('REL_V_PAD_SINK')
# Measure source capability
wac('OCP_MASK', 0x000f) # Set masking register
wr('IO_INT_CTRL', 0x0005) # Enable INT1 output; Set active high, INT1 in low state
rac('IO_INT_CTRL', 0x0005, 0x000f) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
cmt('Configure tester to source 3 mA current into pad INT1')
sac('INT1', 3e-3, i_range=10e-3, sim_ignore=True)
dly(100e-6)
gav('V_PAD_SOURCE', 'INT1', v_range=4.0)
uac('INT1')
cmt('Calculate REL_V_PAD_SOURCE = V_PAD_SOURCE / VDDIO')
log('REL_V_PAD_SOURCE')
# Clean
wac('OCP_MASK', 0x000f)
wr('IO_INT_CTRL', 0x0000)
rac('IO_INT_CTRL', 0x0000, 0x000f)
wr('OCP_MASK', 0x0000)
rac('OCP_MASK', 0xffff)
|
/*****************************************************
* T08_08_Pad_Current_Sink_Source_Capability_V1, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH: fix some bugs.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T08_08_Pad_Current_Sink_Source_Capability_V1: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
double V_VDDIO;
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static double d_V_PAD_SINK[xNSitES];
static double d_V_PAD_SOURCE[xNSitES];
static double REL_V_PAD_SINK[xNSitES], REL_V_PAD_SOURCE[xNSitES];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(d_V_PAD_SINK, 9.9, xNSitES);
Func_Init_Var(d_V_PAD_SOURCE, 9.9, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
V_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
Func_Print(V_VDDIO, "V_VDDIO");
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T08_08_Pad_Current_Sink_Source_Capability}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 1 > <Author: hmf1rt > <Date: 2024/03/13 13:36:52 GMT >}
valid comment[ 1] @ avcline 778: {cmt: Configure tester to sink 3 mA current from pad INT1}
valid comment[ 1] @ avcline 778: {sac('INT1', -0.003, -0.01, 2, 0, False, True)}
valid comment[ 2] @ avcline 788: {gav('V_PAD_SINK', 'INT1', '', 4, 0.0001, True)}
valid comment[ 2] @ avcline 788: {cmt: Calculate REL_V_PAD_SINK = V_PAD_SINK / VDDIO}
valid comment[ 2] @ avcline 788: {log('REL_V_PAD_SINK', '', '', 0, 0)}
valid comment[ 3] @ avcline 1365: {cmt: Configure tester to source 3 mA current into pad INT1}
valid comment[ 3] @ avcline 1365: {sac('INT1', 0.003, 0.01, 2, 0, False, True)}
valid comment[ 4] @ avcline 1375: {gav('V_PAD_SOURCE', 'INT1', '', 4, 0.0001, True)}
valid comment[ 4] @ avcline 1375: {uac('INT1', False)}
valid comment[ 4] @ avcline 1375: {cmt: Calculate REL_V_PAD_SOURCE = V_PAD_SOURCE / VDDIO}
valid comment[ 4] @ avcline 1375: {log('REL_V_PAD_SOURCE', '', '', 0, 0)}
valid comment[ 5] @ avcline 1952: {Test End: T08_08_Pad_Current_Sink_Source_Capability}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][1]).pin("INT1").iForce(-3 mA).iRange(40 mA)//{sac('INT1', -0.003, -0.01, 2, 0, False, True)}
.insertSub(i_comment_line[0][2]).pin("INT1").iForce(-3 mA).iRange(40 mA).valueMode(TA::BADC).vMeas().average(128).measWait(1 ms)//V_PAD_SINK//{gav('V_PAD_SINK', 'INT1', '', 4, 0.0001, True)}
.insertSub(i_comment_line[0][3]).pin("INT1").iForce(3 mA).iRange(40 mA)//{sac('INT1', 0.003, 0.01, 2, 0, False, True)}
.insertSub(i_comment_line[0][4]).pin("INT1").iForce(3 mA).iRange(40 mA).valueMode(TA::BADC).vMeas().average(128).measWait(1 ms)//V_PAD_SOURCE//{gav('V_PAD_SOURCE', 'INT1', '', 4, 0.0001, True)}
.insertSub(i_comment_line[0][4]).pin("INT1").relay(TA::ppmuRly_onAC_offDCPPMU)////{uac('INT1', False)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
ARRAY_D ad_jsubresults_INT1; ad_jsubresults_INT1.resize(2); ad_jsubresults_INT1.init(-9.9);
ad_jsubresults_INT1 = rdi.id("dcid_0").getMultiValue("INT1");
d_V_PAD_SINK[curSite] = ad_jsubresults_INT1[0];
FuncPrint("V_PAD_SINK",d_V_PAD_SINK[curSite]);
d_V_PAD_SOURCE[curSite] = ad_jsubresults_INT1[1];
FuncPrint("V_PAD_SOURCE",d_V_PAD_SOURCE[curSite]);
REL_V_PAD_SINK[curSite] = d_V_PAD_SINK[curSite] / V_VDDIO;
FuncPrint("REL_V_PAD_SINK",REL_V_PAD_SINK[curSite]);
REL_V_PAD_SOURCE[curSite] = d_V_PAD_SOURCE[curSite] / V_VDDIO;
FuncPrint("REL_V_PAD_SOURCE",REL_V_PAD_SOURCE[curSite]);
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
TestLog("REL_V_PAD_SINK", REL_V_PAD_SINK[curSite]);
TestLog("REL_V_PAD_SOURCE", REL_V_PAD_SOURCE[curSite]);
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T08_08_Pad_Current_Sink_Source_Capability_V1", T08_08_Pad_Current_Sink_Source_Capability_V1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:25:06 GMT $')
wac('EXT_MODE', 0xc009) # Switch to IO register page
wac('OCP_MASK', 0x000f) # Set masking register
wr('IO_INT_CTRL', 0x0005) # Enable INT1 output; Set active high
rac('IO_INT_CTRL', 0x0005, 0x000f) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wr('EXT_MODE', 0xc00f) # Switch to TEST page
wac('DTB1',0x0037) # Route "sdxfrompad" to INT1
cmt('Disconnect pad SDX from digital stimuli and switch to analog resource')
scmd("set_stim SDX.dig_out_en(0)")
for n in range(0, 301, 1):
cmt('Set stimuli voltage on pad SDX to V_STIM_{} = {}/300*VDDIO'.format(n,n))
sav('SDX', n/100, v_range=4.0) # Note: the sav() values are only valid for VDDIO=3V (simulated), for other suppies the sav()-ramp needs to be adapted in the pattern
dly(100e-6)
cmt('Following is a dummy delay for pattern post processing on ATE')
dly(592e-9)
gav('V_INT1_{}'.format(n), 'INT1', v_range=4.0)
cmt('Record V_PAD_UP = V_STIM_n when V_INT_n_ > 0.8*VDDIO the first time')
cmt('Calculate R_V_PAD_UP = V_PAD_UP / VDDIO')
log('R_V_PAD_UP')
for n in range(300, -1, -1):
cmt('Set stimuli voltage on pad SDX to V_STIM[{}] = {}/300*VDDIO'.format(n,n))
sav('SDX', n/100, v_range=4.0) # Note: the sav() values are only valid for VDDIO=3V (simulated), for other suppies the sav()-ramp needs to be adapted in the pattern
dly(100e-6)
cmt('Following is a dummy delay for pattern post processing on ATE')
dly(592e-9)
gav('V_INT1_{}'.format(n), 'INT1', v_range=4.0)
cmt('Record V_PAD_DN = V_STIM_n when V_INT1_n < 0.2*VDDIO the first time')
cmt('Calculate R_V_PAD_DN = V_PAD_DN / VDDIO')
log('R_V_PAD_DN')
uav('SDX')
dly(100e-6)
cmt('Calculate R_V_PAD_HYST = R_V_PAD_UP - R_V_PAD_DN')
cmt('Connect pad SDX to digital SPI driver resource')
log('R_V_PAD_HYST')
scmd("set_stim SDX.dig_out_en(1)")
wac('DTB1', 0x0000) # Disable DTB1X
wac('EXT_MODE', 0xc009) # Switch to IO register page
wac('OCP_MASK', 0x000f) # Set masking register
wr('IO_INT_CTRL', 0x0000) # Reset INT1 configuration
rac('IO_INT_CTRL', 0x0000, 0x000f) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
|
/*****************************************************
* T08_11_Pad_Input_Receiver_Char_R1, description file version Notfound, avc file version Notfound
* First Editor : jsh5sgh
* Code generated with autocoding tool V2.9.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH V2: add missing log info.
* JSH5SGH: add VDD/VDDIO swap.
* JSH5SGH R1: version update
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T08_11_Pad_Input_Receiver_Char_R1: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
double V_VDD;
double V_VDDIO;
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static int i_funcRes0[xNSitES];
static double V_PAD_UP[xNSitES], R_V_PAD_UP[xNSitES];
static double V_PAD_DN[xNSitES], R_V_PAD_DN[xNSitES];
// double V_STIM_UP[301], V_STIM_DN[301];
static double R_V_PAD_HYST[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
V_VDD = Primary.getLevelSpec().getSpecValue("VDD");
Func_Print(V_VDD, "V_VDD");
V_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
Func_Print(V_VDDIO, "V_VDDIO");
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T08_11_Pad_Input_Receiver_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 1 > <Author: hmf1rt > <Date: 2024/03/13 13:36:52 GMT >}
valid comment[ 1] @ avcline 1049: {cmt: Disconnect pad SDX from digital stimuli and switch to analog resource}
valid comment[ 1] @ avcline 1049: {cmt: Set stimuli voltage on pad SDX to V_STIM_0 = 0/300*VDDIO}
valid comment[ 1] @ avcline 1049: {sav('SDX', 0, 4, 0.01, False, False)}
valid comment[ 2] @ avcline 1059: {cmt: Following is a dummy delay for pattern post processing on ATE}
valid comment[ 3] @ avcline 1067: {gav('V_INT1_0', 'INT1', '', 4, 0.0001, True)}
valid comment[ 3] @ avcline 1067: {cmt: Set stimuli voltage on pad SDX to V_STIM_1 = 1/300*VDDIO}
valid comment[ 3] @ avcline 1067: {sav('SDX', 0.01, 4, 0.01, False, False)}
valid comment[ 4] @ avcline 1076: {cmt: Following is a dummy delay for pattern post processing on ATE}
valid comment[601] @ avcline 6255: {gav('V_INT1_299', 'INT1', '', 4, 0.0001, True)}
valid comment[601] @ avcline 6255: {cmt: Set stimuli voltage on pad SDX to V_STIM_300 = 300/300*VDDIO}
valid comment[601] @ avcline 6255: {sav('SDX', 3, 4, 0.01, False, False)}
valid comment[602] @ avcline 6264: {cmt: Following is a dummy delay for pattern post processing on ATE}
valid comment[603] @ avcline 6272: {gav('V_INT1_300', 'INT1', '', 4, 0.0001, True)}
valid comment[603] @ avcline 6272: {cmt: Record V_PAD_UP = V_STIM_n when V_INT_n_ > 0.8*VDDIO the first time}
valid comment[603] @ avcline 6272: {cmt: Calculate R_V_PAD_UP = V_PAD_UP / VDDIO}
valid comment[603] @ avcline 6272: {cmt: Set stimuli voltage on pad SDX to V_STIM[300] = 300/300*VDDIO}
valid comment[603] @ avcline 6272: {sav('SDX', 3, 4, 0.01, False, False)}
valid comment[604] @ avcline 6282: {cmt: Following is a dummy delay for pattern post processing on ATE}
valid comment[605] @ avcline 6290: {gav('V_INT1_300', 'INT1', '', 4, 0.0001, True)}
valid comment[605] @ avcline 6290: {cmt: Set stimuli voltage on pad SDX to V_STIM[299] = 299/300*VDDIO}
valid comment[605] @ avcline 6290: {sav('SDX', 2.99, 4, 0.01, False, False)}
valid comment[606] @ avcline 6299: {cmt: Following is a dummy delay for pattern post processing on ATE}
valid comment[607] @ avcline 6307: {gav('V_INT1_299', 'INT1', '', 4, 0.0001, True)}
valid comment[1203] @ avcline 11478: {cmt: Set stimuli voltage on pad SDX to V_STIM[0] = 0/300*VDDIO}
valid comment[1203] @ avcline 11478: {sav('SDX', 0, 4, 0.01, False, False)}
valid comment[1204] @ avcline 11487: {cmt: Following is a dummy delay for pattern post processing on ATE}
valid comment[1205] @ avcline 11495: {gav('V_INT1_0', 'INT1', '', 4, 0.0001, True)}
valid comment[1205] @ avcline 11495: {cmt: Record V_PAD_DN = V_STIM_n when V_INT1_n < 0.2*VDDIO the first time}
valid comment[1205] @ avcline 11495: {cmt: Calculate R_V_PAD_DN = V_PAD_DN / VDDIO}
valid comment[1205] @ avcline 11495: {uav('SDX', False)}
valid comment[1206] @ avcline 11504: {cmt: Calculate R_V_PAD_HYST = R_V_PAD_UP - R_V_PAD_DN}
valid comment[1206] @ avcline 11504: {cmt: Connect pad SDX to digital SPI driver resource}
valid comment[1207] @ avcline 12464: {Test End: T08_11_Pad_Input_Receiver_Char}
*/
string s_rdi_unit, s_rdi_burstid, s_rdi_dcid;
SWITCH_VDD(s_rdi_unit, s_rdi_burstid, s_rdi_dcid, 0);
RDI_UNIT_INIT(s_rdi_unit);
RDI_BEGIN(mode);
rdi.burstId(s_rdi_burstid);
for(int i=0; i<301; i++) {
double V_STIM_UP = 1.0 * i/300*V_VDDIO;
rdi.dc(s_rdi_dcid).label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][2*i+1]).pin("SDX").vForce(V_STIM_UP V)
.insertSub(i_comment_line[0][2*i+3]).pin("INT1",TA::BADC).vMeas().average(128).measWait(1 ms)
.cont();
}
for(int i=0; i<301; i++) {
double V_STIM_DN = 1.0 * (300-i)/300*V_VDDIO;
rdi.dc(s_rdi_dcid).label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][600+2*i+1]).pin("SDX").vForce(V_STIM_DN V)
.insertSub(i_comment_line[0][600+2*i+3]).pin("INT1",TA::BADC).vMeas().average(128).measWait(1 ms)
.cont();
}
rdi.dc(s_rdi_dcid).label(s_splited_pat_name[0]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id(s_rdi_burstid).getBurstPassFail();
ARRAY_D V_INT1; V_INT1.resize(301); V_INT1.init(-9.9);
ARRAY_D ad_jsubresults_INT1 = rdi.id(s_rdi_dcid).getMultiValue("INT1");
for(int i=0; i<301; i++) {
V_INT1[i] = ad_jsubresults_INT1[i];
// FuncPrint("V_INT1_UP_"+rdi.itos(i), V_INT1[i]);
}
int n = Find_first_L2H_Switch_point_index(V_INT1, 0.8*V_VDDIO);
FuncPrint("n", n);
V_PAD_UP[curSite] = 1.0 * n/300*V_VDDIO;
FuncPrint("V_PAD_UP", V_PAD_UP[curSite]);
R_V_PAD_UP[curSite] = V_PAD_UP[curSite] / V_VDDIO;
FuncPrint("R_V_PAD_UP", R_V_PAD_UP[curSite]);
for(int i=0; i<301; i++) {
V_INT1[i] = ad_jsubresults_INT1[i+301];
// FuncPrint("V_INT1_DN_"+rdi.itos(300-i), V_INT1[i]);
}
n = Find_first_H2L_Switch_point_index(V_INT1, 0.2*V_VDDIO);
FuncPrint("n", n);
V_PAD_DN[curSite] = 1.0 * (300-n)/300*V_VDDIO;
FuncPrint("V_PAD_DN", V_PAD_DN[curSite]);
R_V_PAD_DN[curSite] = V_PAD_DN[curSite] / V_VDDIO;
FuncPrint("R_V_PAD_DN", R_V_PAD_DN[curSite]);
R_V_PAD_HYST[curSite] = R_V_PAD_UP[curSite] - R_V_PAD_DN[curSite];
FuncPrint("R_V_PAD_HYST", R_V_PAD_HYST[curSite]);
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
TestLog("R_V_PAD_UP", R_V_PAD_UP[curSite]);
TestLog("R_V_PAD_DN", R_V_PAD_DN[curSite]);
TestLog("R_V_PAD_HYST", R_V_PAD_HYST[curSite]);
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
// TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T08_11_Pad_Input_Receiver_Char_R1", T08_11_Pad_Input_Receiver_Char_R1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:25:06 GMT $')
cmt('Test 1: set external voltage to check pad drive capability')
wac('EXT_MODE', 0xc009) # Switch to IO register page
wac('OCP_MASK',0x0007)
### Pad drive strength test: pad driving vs external voltage, Hi side vs 80% of VDDIO (VDDIO set to 3.0V (see T01_01_power_cycle)) ###
wr('IO_INT_CTRL',0x0004)
rac('IO_INT_CTRL',0x0004,0x0007) # Enable INT1 output, push-pull, active low
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('OCP_MASK',0x0007)
scmd('set_tb_global ASIC_PAD_TEST_IMPEDANCE_1(100.0);') # Set impedance of external voltage at pad INT1 (backdoor model) in DMS Testbench
scmd('set_tb_global ASIC_PAD_TEST_VOLTAGE_1(2.4);') # Apply external voltage of 2.4V at pad INT1 (backdoor model) in DMS Testbench, the pad needs to drive against the external voltage
dly(100e-6)
for n in range(8):
wr('INT_IO_PAD_STRENGTH0', n) # Set pad drive strength, if_pri_drv
rac('INT_IO_PAD_STRENGTH0',n, 0x0007)
sav('INT1', 0.96, i_comp=-40e-3, sim_ignore=True)
dly(1e-3)
cmt('Following is a dummy delay for pattern post processing on ATE')
dly(156e-9)
gac('I_INT1_SINK_DRV_{}'.format(n), 'INT1', i_range=-10e-3)
uav('INT1')
scmd('set_tb_global ASIC_PAD_TEST_VOLTAGE_1(`wrealZState);') # reset external voltage to high impedance
dly(100e-6)
scmd('set_tb_global ASIC_PAD_TEST_VOLTAGE_1(`wrealZState);') # reset external voltage to high impedance
wr('INT_IO_PAD_STRENGTH0', 0x0004) # Reset pad drive strength
rac('INT_IO_PAD_STRENGTH0', 0x0004, 0x0007) # Check register setting
### Pad drive strength test: pad driving vs external voltage, Lo side vs 20% of VDDIO (VDDIO set to 3.0V (see T01_01_power_cycle)) ###
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('IO_INT_CTRL', 0x0005) # Enable INT1 output; Set active high
wac('OCP_MASK', 0x0007) # Set masking register
scmd('set_tb_global ASIC_PAD_TEST_VOLTAGE_1(0.6);') # Apply external voltage of 0.6V at pad INT1 (backdoor model) in DMS Testbench, the pad needs to drive against the external voltage
for n in range(0, 8, 1):
wr('INT_IO_PAD_STRENGTH0', n) # Set pad drive strength
sav('INT1', 0.24, i_comp=40e-3, sim_ignore=True)
dly(1e-3)
cmt('Following is a dummy delay for pattern post processing on ATE')
dly(156e-9)
gac('I_INT1_SOURCE_DRV_{}'.format(n), 'INT1', i_range=10e-3)
uav('INT1')
scmd('set_tb_global ASIC_PAD_TEST_CURRENT_1(0.00);') # Apply 0A at pad INT1 in DMS Testbench
scmd('set_tb_global ASIC_PAD_TEST_VOLTAGE_1(`wrealZState);') # reset external voltage to high impedance
dly(100e-6)
### Reset settings at end of test
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
|
/*****************************************************
* T08_12_Pad_Drive_Char_R1, description file version Notfound, avc file version Notfound
* First Editor : jsh5sgh
* Code generated with autocoding tool V2.9.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH R1: version update.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T08_12_Pad_Drive_Char_R1: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
double V_VDD;
double V_VDDIO;
virtual void initialize()
{
}
virtual void run()
{
static int iVDD_Spec;
GET_USER_FLAG("VDD_Spec", &iVDD_Spec);
if (iVDD_Spec >1)
return;
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static double I_INT1_SINK_DRV[xNSitES][8];
static double I_INT1_SOURCE_DRV[xNSitES][8];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
V_VDD = Primary.getLevelSpec().getSpecValue("VDD");
Func_Print(V_VDD, "V_VDD");
V_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
Func_Print(V_VDDIO, "V_VDDIO");
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T08_12_Pad_Drive_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 4 > <Author: luz3sgh > <Date: 2024/07/10 01:54:44 GMT >}
valid comment[ 0] @ avcline 10: {cmt: Test 1: set external voltage to check pad drive capability}
valid comment[ 1] @ avcline 1172: {sav('INT1', 0.96, 2, -0.04, False, True)}
valid comment[ 2] @ avcline 1180: {cmt: Following is a dummy delay for pattern post processing on ATE}
valid comment[ 3] @ avcline 1182: {gac('I_INT1_SINK_DRV_0', 'INT1', -0.01, 0.0001, True)}
valid comment[ 4] @ avcline 1374: {sav('INT1', 0.96, 2, -0.04, False, True)}
valid comment[ 5] @ avcline 1382: {cmt: Following is a dummy delay for pattern post processing on ATE}
valid comment[ 6] @ avcline 1384: {gac('I_INT1_SINK_DRV_1', 'INT1', -0.01, 0.0001, True)}
...
valid comment[ 22] @ avcline 2586: {sav('INT1', 0.96, 2, -0.04, False, True)}
valid comment[ 23] @ avcline 2594: {cmt: Following is a dummy delay for pattern post processing on ATE}
valid comment[ 24] @ avcline 2596: {gac('I_INT1_SINK_DRV_7', 'INT1', -0.01, 0.0001, True)}
valid comment[ 24] @ avcline 2596: {uav('INT1', False)}
valid comment[ 25] @ avcline 3452: {sav('INT1', 0.24, 2, 0.04, False, True)}
valid comment[ 26] @ avcline 3460: {cmt: Following is a dummy delay for pattern post processing on ATE}
valid comment[ 27] @ avcline 3462: {gac('I_INT1_SOURCE_DRV_0', 'INT1', 0.01, 0.0001, True)}
valid comment[ 28] @ avcline 3541: {sav('INT1', 0.24, 2, 0.04, False, True)}
valid comment[ 29] @ avcline 3549: {cmt: Following is a dummy delay for pattern post processing on ATE}
valid comment[ 30] @ avcline 3551: {gac('I_INT1_SOURCE_DRV_1', 'INT1', 0.01, 0.0001, True)}
valid comment[ 46] @ avcline 4075: {sav('INT1', 0.24, 2, 0.04, False, True)}
valid comment[ 47] @ avcline 4083: {cmt: Following is a dummy delay for pattern post processing on ATE}
valid comment[ 48] @ avcline 4085: {gac('I_INT1_SOURCE_DRV_7', 'INT1', 0.01, 0.0001, True)}
valid comment[ 48] @ avcline 4085: {uav('INT1', False)}
valid comment[ 49] @ avcline 4286: {Test End: T08_12_Pad_Drive_Char}
*/
double v_INT1_high = 0.8 * V_VDDIO;
double v_INT1_low = 0.2 * V_VDDIO;
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
for(int i=0; i<8; i++) {
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][3*i+1]).pin("INT1").vForce(v_INT1_high V).iRange(40 mA)//{sav('INT1', 0.96, 2, -0.04, False, True)}
.insertSub(i_comment_line[0][3*i+3]).pin("INT1").vForce(v_INT1_high V).iMeas().valueMode(TA::BADC).iRange(40 mA).average(128).measWait(1 ms)
.cont();
}
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][24]).pin("INT1").relay(TA::ppmuRly_offALL)////{uav('INT1', False)}
.cont();
for(int i=0; i<8; i++) {
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][24+3*i+1]).pin("INT1").vForce(v_INT1_low V).iRange(40 mA)//{sav('INT1', 0.96, 2, -0.04, False, True)}
.insertSub(i_comment_line[0][24+3*i+3]).pin("INT1").vForce(v_INT1_low V).iMeas().valueMode(TA::BADC).iRange(40 mA).average(128).measWait(1 ms)
.cont();
}
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][48]).pin("INT1").relay(TA::ppmuRly_offALL)////{uav('INT1', False)}
.cont();
rdi.dc("dcid_0").label(s_splited_pat_name[0]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
ARRAY_D ad_jsubresults_INT1; ad_jsubresults_INT1.resize(16); ad_jsubresults_INT1.init(-9.9);
ad_jsubresults_INT1 = rdi.id("dcid_0").getMultiValue("INT1");
for(int i=0; i<8; i++) {
I_INT1_SINK_DRV[curSite][i] = ad_jsubresults_INT1[i];
FuncPrint("I_INT1_SINK_DRV_"+rdi.itos(i), I_INT1_SINK_DRV[curSite][i]);
I_INT1_SOURCE_DRV[curSite][i] = ad_jsubresults_INT1[i+8];
FuncPrint("I_INT1_SOURCE_DRV_"+rdi.itos(i), I_INT1_SOURCE_DRV[curSite][i]);
}
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
for(int i=0; i<8; i++) {
TestLog("I_INT1_SINK_DRV_"+rdi.itos(i), I_INT1_SINK_DRV[curSite][i]);
TestLog("I_INT1_SOURCE_DRV_"+rdi.itos(i), I_INT1_SOURCE_DRV[curSite][i]);
}
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T08_12_Pad_Drive_Char_R1", T08_12_Pad_Drive_Char_R1);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# - measure pull-up resistance of CSB
# -Entry condtion PU; Exit codition Extendpage enabled
#############################################################################################################
cmt('Version info: $Revision: 4 $ $Author: luz3sgh $ $Date: 2024/07/04 02:14:57 GMT $')
# CSB pull up measure, SPI protocol not enabled yet
scmd("set_stim CSB.dig_out_en(0)") # Disable digital driver on CSB
VDDIO = 3.0 # change VDDIO value base on corrsponding char flow
sav("CSB", 0.8*VDDIO, v_range=4.0) # Pull CSB to 0.8 * VDDIO
dly(100e-6)
gac("I_PU_CSB", "CSB", i_range=10e-6)
cmt("Calculate R_PU_CSB = abs(0.2*VDDIO/I_PU_CSB)")
log("R_PU_CSB")
uav("CSB")
scmd("set_stim CSB.dig_out_en(1)") # Enable digital driver on CSB
|
/*****************************************************
* T08_13_PU_Resistors_Measurement_V4, description file version Notfound, avc file version Notfound
* First Editor : jsh5sgh
* Code generated with autocoding tool V2.9.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T08_13_PU_Resistors_Measurement_V4: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
double V_VDD;
double V_VDDIO;
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static double I_PU_CSB[xNSitES];
static double R_PU_CSB[xNSitES];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
V_VDD = Primary.getLevelSpec().getSpecValue("VDD");
Func_Print(V_VDD, "V_VDD");
V_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
Func_Print(V_VDDIO, "V_VDDIO");
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T08_13_PU_Resistors_Measurement}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 4 > <Author: luz3sgh > <Date: 2024/07/04 02:14:56 GMT >}
valid comment[ 0] @ avcline 10: {sav('CSB', 2.4, 4, 0.01, False, False)}
valid comment[ 1] @ avcline 20: {gac('I_PU_CSB', 'CSB', 1e-05, 0.0001, True)}
valid comment[ 1] @ avcline 20: {cmt: Calculate R_PU_CSB = abs(0.2*VDDIO/I_PU_CSB)}
valid comment[ 1] @ avcline 20: {log('R_PU_CSB', '', '', 0, 0)}
valid comment[ 2] @ avcline 21: {uav('CSB', False)}
valid comment[ 2] @ avcline 21: {Test End: T08_13_PU_Resistors_Measurement}
*/
string s_rdi_unit, s_rdi_burstid, s_rdi_dcid;
SWITCH_VDD(s_rdi_unit, s_rdi_burstid, s_rdi_dcid, 0);
RDI_UNIT_INIT(s_rdi_unit);
RDI_BEGIN(mode);
rdi.burstId(s_rdi_burstid);
rdi.dc(s_rdi_dcid).label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][0]).pin("CSB").vForce(0.8*V_VDDIO V)//{sav('CSB', 2.4, 4, 0.01, False, False)}
.insertSub(i_comment_line[0][1]).pin("CSB").vForce(0.8*V_VDDIO V).iMeas().valueMode(TA::BADC).iRange(10 uA).average(512).measWait(1 ms)
.insertSub(i_comment_line[0][2]).pin("CSB").relay(TA::ppmuRly_offALL)////{uav('CSB', False)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id(s_rdi_burstid).getBurstPassFail();
ARRAY_D ad_jsubresults_CSB; ad_jsubresults_CSB.resize(1); ad_jsubresults_CSB.init(-9.9);
ad_jsubresults_CSB = rdi.id(s_rdi_dcid).getMultiValue("CSB");
I_PU_CSB[curSite] = ad_jsubresults_CSB[0];
FuncPrint("I_PU_CSB",I_PU_CSB[curSite]);
R_PU_CSB[curSite] = abs(0.2*V_VDDIO/I_PU_CSB[curSite]);
FuncPrint("R_PU_CSB",R_PU_CSB[curSite]);
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
TestLog("R_PU_CSB",R_PU_CSB[curSite]);
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T08_13_PU_Resistors_Measurement_V4", T08_13_PU_Resistors_Measurement_V4);
|
generate cpp file from given test case python file
|
#####################################################################
# Measure VDD/VDDIO current under different ramp up combinations
# C1 C2 C3 C4A C4B
# _ _ _ _ _ _ _ _ _ _ _ _ _ _
#VDD _ _| |_ _ _ _ _ _ _ _ _| |_ _ _|
# C1 C2 C3A C3B C4
# _ _ _ _ _ _ _ _ _ _ _ _ _ _
#VDDIO _ _ _ _ _ _ _| |_ _| |_ _| |_ _ _
#
# C5 C6
# _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
#VDD _ _| |_ _| |_ _ _| |_ _ _
# C5 C6
# _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
#VDDIO _ _| |_ _ _| |_ _| |_ _ _
#
#####################################################################
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:25:06 GMT $')
cmt("SCX, SDX keep low during entier test sequence to avoid I2C atuto detect and current leakage")
cmt("CSB keel same level as VDDIO druing entire test sequence to avoid current leakage")
cmt("TOI: make sure to adapt the CSB VIH level to the VDDIO supply setting")
# Define VDD, VDDIO supply for sim only
supply = {"VDD":1.8, "VDDIO":3.0}
# Pre-setting
#sav('VDD', value=0.0, v_range=3, i_comp=500e-6, sim_ignore=True)
sav('VDD', value=0.0, v_range=3, i_comp=500e-6)
#sav('VDDIO', value=0.0, v_range=3, i_comp=500e-6, sim_ignore=True)
sav('VDDIO', value=0.0, v_range=3, i_comp=500e-6)
sav('CSB', 0.0)
sav('SCX', 0.0)
sav('SDX', 0.0)
dly(1.000036e-3) # (4x3378 + 2) *74ns to have extra 2 vec lines in pattern
# Measure
cmt('Measure C1, ramp up VDD, keep VDDIO low')
sav('VDD', supply["VDD"], 3, 500e-6, sim_ignore=True)
sav('VDDIO', 0.0, 3, 500e-6, sim_ignore=True)
sav('CSB', 0.0)
dly(1.000036e-3)
gac('I_C1_VDD', 'VDD', 50e-6, 1e-3)
gac('I_C1_VDDIO', 'VDDIO', 50e-6, 1e-3)
cmt('Measure C2, VDD low, ramp up VDDIO')
sav('VDD', 0.0, sim_ignore=True)
dly(1.000036e-3)
sav('VDDIO',supply["VDDIO"], 3, 500e-6, sim_ignore=True)
sav('CSB', supply["VDDIO"])
dly(1.000036e-3)
gac('I_C2_VDD', 'VDD', 50e-6, 1e-3)
gac('I_C2_VDDIO', 'VDDIO',50e-6, 1e-3)
sav('VDD', 0.0, sim_ignore=True)
sav('VDDIO', 0.0, sim_ignore=True)
sav('CSB', 0.0)
dly(1.000036e-3)
cmt('Measure C3, VDDIO ramp first, then ramp VDD and power down VDD ')
sav('VDDIO',supply["VDDIO"], 3, 500e-6, sim_ignore=True)
sav('CSB', supply["VDDIO"])
dly(1.000036e-3)
cmt('Set VDD to value given in the supply voltage table')
sav('VDD',supply["VDD"],3,500e-6,sim_ignore=True)
dly(1.000036e-3)
gac('I_C3_VDD', 'VDD', 50e-6, 1e-3)
gac('I_C3A_VDDIO', 'VDDIO',50e-6, 1e-3)
dly(1.000036e-3)
sav('VDD', 0.0,sim_ignore=True)
dly(1.000036e-3)
gac('I_C3B_VDDIO', 'VDDIO',50e-6, 1e-3)
sav('VDD', 0.0,sim_ignore=True)
sav('VDDIO', 0.0,sim_ignore=True)
sav('CSB', 0.0)
dly(1.000036e-3)
cmt('Measure C4, VDD ramp first, then ramp VDDIO and power down VDD ')
sav('VDD',supply["VDD"],3,500e-6,sim_ignore=True)
dly(1.000036e-3)
cmt('Set VDDIO to value given in the supply voltage table')
sav('VDDIO',supply["VDDIO"], 3, 500e-6, sim_ignore=True)
sav('CSB', supply["VDDIO"])
dly(1.000036e-3)
gac('I_C4A_VDD', 'VDD', 50e-6, 1e-3)
gac('I_C4_VDDIO', 'VDDIO',50e-6, 1e-3)
dly(1.000036e-3)
sav('VDDIO', 0.0,sim_ignore=True)
sav('CSB', 0.0)
dly(1.000036e-3)
gac('I_C4B_VDD', 'VDD', 50e-6, 1e-3)
# C5 C6
# _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
#VDD _ _| |_ _| |_ _ _| |_ _ _
# C5 C6
# _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
#VDDIO _ _| |_ _ _| |_ _| |_ _ _
sav('VDD', 0.0,sim_ignore=True)
sav('VDDIO', 0.0,sim_ignore=True)
sav('CSB', 0.0)
dly(1.000036e-3)
cmt('Measure C5')
sav('VDD', supply["VDD"], 3, 500e-6, sim_ignore=True)
sav('VDDIO',supply["VDDIO"], 3, 500e-6, sim_ignore=True)
sav('CSB', supply["VDDIO"])
dly(1.000036e-3)
sav('VDDIO', 0.0,sim_ignore=True)
sav('CSB', 0.0)
dly(1.000036e-3)
sav('VDDIO',supply["VDDIO"], 3, 500e-6, sim_ignore=True)
sav('CSB', supply["VDDIO"])
dly(1.000036e-3)
gac('I_C5_VDD', 'VDD', 50e-6, 1e-3)
gac('I_C5_VDDIO', 'VDDIO',50e-6, 1e-3)
sav('VDD', 0.0,sim_ignore=True)
sav('VDDIO', 0.0,sim_ignore=True)
sav('CSB', 0.0)
dly(1.000036e-3)
cmt('Measure C6')
sav('VDD', supply["VDD"], 3, 500e-6, sim_ignore=True)
sav('VDDIO',supply["VDDIO"], 3, 500e-6, sim_ignore=True)
sav('CSB', supply["VDDIO"])
dly(1.000036e-3)
sav('VDD', 0.0,sim_ignore=True)
dly(1.000036e-3)
sav('VDD', supply["VDD"], 3, 500e-6, sim_ignore=True)
dly(1.000036e-3)
gac('I_C6_VDD', 'VDD', 50e-6, 1e-3)
gac('I_C6_VDDIO', 'VDDIO',50e-6, 1e-3)
sav('VDD', 0.0,sim_ignore=True)
sav('VDDIO', 0.0,sim_ignore=True)
sav('CSB', 0.0)
|
/*****************************************************
* T08_15_Power_Supply_Ramping_Test_R1, description file version Notfound, avc file version Notfound
* First Editor : jsh5sgh
* Code generated with autocoding tool V2.9.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH V2: add dummy line between RPTV and gac
* JSH5SGH R1: version update.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T08_15_Power_Supply_Ramping_Test_R1: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
double V_VDD;
double V_VDDIO;
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static double I_C1_VDD[xNSitES];
static double I_C1_VDDIO[xNSitES];
static double I_C2_VDD[xNSitES];
static double I_C2_VDDIO[xNSitES];
static double I_C3A_VDDIO[xNSitES];
static double I_C3B_VDDIO[xNSitES];
static double I_C3_VDD[xNSitES];
static double I_C4A_VDD[xNSitES];
static double I_C4B_VDD[xNSitES];
static double I_C4_VDDIO[xNSitES];
static double I_C5_VDD[xNSitES];
static double I_C5_VDDIO[xNSitES];
static double I_C6_VDD[xNSitES];
static double I_C6_VDDIO[xNSitES];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
V_VDD = Primary.getLevelSpec().getSpecValue("VDD");
Func_Print(V_VDD, "V_VDD");
V_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
Func_Print(V_VDDIO, "V_VDDIO");
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T08_15_Power_Supply_Ramping_Test}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 1 > <Author: hmf1rt > <Date: 2024/03/13 13:36:52 GMT >}
valid comment[ 0] @ avcline 10: {cmt: SCX, SDX keep low during entier test sequence to avoid I2C atuto detect and current leakage}
valid comment[ 0] @ avcline 10: {cmt: CSB keel same level as VDDIO druing entire test sequence to avoid current leakage}
valid comment[ 0] @ avcline 10: {cmt: TOI: make sure to adapt the CSB VIH level to the VDDIO supply setting}
valid comment[ 0] @ avcline 10: {sav('VDD', 0, 3, 0.0005, False, False)}
valid comment[ 0] @ avcline 10: {sav('VDDIO', 0, 3, 0.0005, False, False)}
valid comment[ 0] @ avcline 10: {sav('CSB', 0, 2, 0.01, False, False)}
valid comment[ 0] @ avcline 10: {sav('SCX', 0, 2, 0.01, False, False)}
valid comment[ 0] @ avcline 10: {sav('SDX', 0, 2, 0.01, False, False)}
valid comment[ 1] @ avcline 18: {cmt: Measure C1, ramp up VDD, keep VDDIO low}
valid comment[ 1] @ avcline 18: {sav('VDD', 1.8, 3, 0.0005, False, True)}
valid comment[ 1] @ avcline 18: {sav('VDDIO', 0, 3, 0.0005, False, True)}
valid comment[ 1] @ avcline 18: {sav('CSB', 0, 2, 0.01, False, False)}
valid comment[ 2] @ avcline 25: {gac('I_C1_VDD', 'VDD', 5e-05, 0.001, True)}
valid comment[ 2] @ avcline 25: {gac('I_C1_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
valid comment[ 2] @ avcline 25: {cmt: Measure C2, VDD low, ramp up VDDIO}
valid comment[ 2] @ avcline 25: {sav('VDD', 0, 2, 0.01, False, True)}
valid comment[ 3] @ avcline 33: {sav('VDDIO', 3, 3, 0.0005, False, True)}
valid comment[ 3] @ avcline 33: {sav('CSB', 3, 2, 0.01, False, False)}
valid comment[ 4] @ avcline 40: {gac('I_C2_VDD', 'VDD', 5e-05, 0.001, True)}
valid comment[ 4] @ avcline 40: {gac('I_C2_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
valid comment[ 4] @ avcline 40: {sav('VDD', 0, 2, 0.01, False, True)}
valid comment[ 4] @ avcline 40: {sav('VDDIO', 0, 2, 0.01, False, True)}
valid comment[ 4] @ avcline 40: {sav('CSB', 0, 2, 0.01, False, False)}
valid comment[ 5] @ avcline 48: {cmt: Measure C3, VDDIO ramp first, then ramp VDD and power down VDD }
valid comment[ 5] @ avcline 48: {sav('VDDIO', 3, 3, 0.0005, False, True)}
valid comment[ 5] @ avcline 48: {sav('CSB', 3, 2, 0.01, False, False)}
valid comment[ 6] @ avcline 55: {cmt: Set VDD to value given in the supply voltage table}
valid comment[ 6] @ avcline 55: {sav('VDD', 1.8, 3, 0.0005, False, True)}
valid comment[ 7] @ avcline 63: {gac('I_C3_VDD', 'VDD', 5e-05, 0.001, True)}
valid comment[ 7] @ avcline 63: {gac('I_C3A_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
valid comment[ 8] @ avcline 70: {sav('VDD', 0, 2, 0.01, False, True)}
valid comment[ 9] @ avcline 78: {gac('I_C3B_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
valid comment[ 9] @ avcline 78: {sav('VDD', 0, 2, 0.01, False, True)}
valid comment[ 9] @ avcline 78: {sav('VDDIO', 0, 2, 0.01, False, True)}
valid comment[ 9] @ avcline 78: {sav('CSB', 0, 2, 0.01, False, False)}
valid comment[ 10] @ avcline 85: {cmt: Measure C4, VDD ramp first, then ramp VDDIO and power down VDD }
valid comment[ 10] @ avcline 85: {sav('VDD', 1.8, 3, 0.0005, False, True)}
valid comment[ 11] @ avcline 93: {cmt: Set VDDIO to value given in the supply voltage table}
valid comment[ 11] @ avcline 93: {sav('VDDIO', 3, 3, 0.0005, False, True)}
valid comment[ 11] @ avcline 93: {sav('CSB', 3, 2, 0.01, False, False)}
valid comment[ 12] @ avcline 100: {gac('I_C4A_VDD', 'VDD', 5e-05, 0.001, True)}
valid comment[ 12] @ avcline 100: {gac('I_C4_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
valid comment[ 13] @ avcline 108: {sav('VDDIO', 0, 2, 0.01, False, True)}
valid comment[ 13] @ avcline 108: {sav('CSB', 0, 2, 0.01, False, False)}
valid comment[ 14] @ avcline 115: {gac('I_C4B_VDD', 'VDD', 5e-05, 0.001, True)}
valid comment[ 14] @ avcline 115: {sav('VDD', 0, 2, 0.01, False, True)}
valid comment[ 14] @ avcline 115: {sav('VDDIO', 0, 2, 0.01, False, True)}
valid comment[ 14] @ avcline 115: {sav('CSB', 0, 2, 0.01, False, False)}
valid comment[ 15] @ avcline 123: {cmt: Measure C5}
valid comment[ 15] @ avcline 123: {sav('VDD', 1.8, 3, 0.0005, False, True)}
valid comment[ 15] @ avcline 123: {sav('VDDIO', 3, 3, 0.0005, False, True)}
valid comment[ 15] @ avcline 123: {sav('CSB', 3, 2, 0.01, False, False)}
valid comment[ 16] @ avcline 130: {sav('VDDIO', 0, 2, 0.01, False, True)}
valid comment[ 16] @ avcline 130: {sav('CSB', 0, 2, 0.01, False, False)}
valid comment[ 17] @ avcline 138: {sav('VDDIO', 3, 3, 0.0005, False, True)}
valid comment[ 17] @ avcline 138: {sav('CSB', 3, 2, 0.01, False, False)}
valid comment[ 18] @ avcline 145: {gac('I_C5_VDD', 'VDD', 5e-05, 0.001, True)}
valid comment[ 18] @ avcline 145: {gac('I_C5_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
valid comment[ 18] @ avcline 145: {sav('VDD', 0, 2, 0.01, False, True)}
valid comment[ 18] @ avcline 145: {sav('VDDIO', 0, 2, 0.01, False, True)}
valid comment[ 18] @ avcline 145: {sav('CSB', 0, 2, 0.01, False, False)}
valid comment[ 19] @ avcline 153: {cmt: Measure C6}
valid comment[ 19] @ avcline 153: {sav('VDD', 1.8, 3, 0.0005, False, True)}
valid comment[ 19] @ avcline 153: {sav('VDDIO', 3, 3, 0.0005, False, True)}
valid comment[ 19] @ avcline 153: {sav('CSB', 3, 2, 0.01, False, False)}
valid comment[ 20] @ avcline 160: {sav('VDD', 0, 2, 0.01, False, True)}
valid comment[ 21] @ avcline 168: {sav('VDD', 1.8, 3, 0.0005, False, True)}
valid comment[ 22] @ avcline 175: {gac('I_C6_VDD', 'VDD', 5e-05, 0.001, True)}
valid comment[ 22] @ avcline 175: {gac('I_C6_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
valid comment[ 22] @ avcline 175: {sav('VDD', 0, 2, 0.01, False, True)}
valid comment[ 22] @ avcline 175: {sav('VDDIO', 0, 2, 0.01, False, True)}
valid comment[ 22] @ avcline 175: {sav('CSB', 0, 2, 0.01, False, False)}
valid comment[ 22] @ avcline 175: {Test End: T08_15_Power_Supply_Ramping_Test}
*/
string s_rdi_unit, s_rdi_burstid, s_rdi_dcid;
SWITCH_VDD(s_rdi_unit, s_rdi_burstid, s_rdi_dcid, 0);
RDI_UNIT_INIT(s_rdi_unit);
RDI_BEGIN(mode);
rdi.burstId(s_rdi_burstid);
rdi.dc(s_rdi_dcid).label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][0]).pin("VDD,VDDIO,CSB,SCX,SDX").vForce(0 V).iRange(40 mA)//{sav('VDD', 0, 3, 0.0005, False, False)}
.insertSub(i_comment_line[0][1]).pin("VDD") .vForce(V_VDD V).iRange(40 mA)//{sav('VDD', 1.8, 3, 0.0005, False, True)}
.insertSub(i_comment_line[0][1]).pin("VDDIO") .vForce(0 V).iRange(40 mA)//{sav('VDDIO', 0, 3, 0.0005, False, True)}
.insertSub(i_comment_line[0][1]).pin("CSB") .vForce(0 V).iRange(40 mA)//{sav('CSB', 0, 2, 0.01, False, False)}
//C1
.insertSub(i_comment_line[0][2]).pin("VDD") .vForce(V_VDD V).iRange(100 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDD', 'VDD', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][2]).pin("VDDIO") .vForce(0 V).iRange(10 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
//C2
.insertSub(i_comment_line[0][2]).pin("VDD") .vForce(0 V).iRange(40 mA)//{sav('VDD', 0, 2, 0.01, False, True)}
.insertSub(i_comment_line[0][3]).pin("VDDIO") .vForce(V_VDDIO V).iRange(40 mA)//{sav('VDDIO', 3, 3, 0.0005, False, True)}
.insertSub(i_comment_line[0][3]).pin("CSB") .vForce(V_VDDIO V).iRange(40 mA)//{sav('CSB', 3, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][4]).pin("VDD") .vForce(0 V).iRange(10 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDD', 'VDD', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][4]).pin("VDDIO") .vForce(V_VDDIO V).iRange(10 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][4]).pin("VDD") .vForce(0 V).iRange(40 mA)//{sav('VDD', 0, 2, 0.01, False, True)}
.insertSub(i_comment_line[0][4]).pin("VDDIO") .vForce(0 V).iRange(40 mA)//{sav('VDDIO', 0, 2, 0.01, False, True)}
.insertSub(i_comment_line[0][4]).pin("CSB") .vForce(0 V).iRange(40 mA)//{sav('CSB', 0, 2, 0.01, False, False)}
//C3
.insertSub(i_comment_line[0][5]).pin("VDDIO") .vForce(V_VDDIO V).iRange(40 mA)//{sav('VDDIO', 3, 3, 0.0005, False, True)}
.insertSub(i_comment_line[0][5]).pin("CSB") .vForce(V_VDDIO V).iRange(40 mA)//{sav('CSB', 3, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][6]).pin("VDD") .vForce(V_VDD V).iRange(40 mA)//{sav('VDD', 1.8, 3, 0.0005, False, True)}
.insertSub(i_comment_line[0][7]).pin("VDD") .vForce(V_VDD V).iRange(100 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDD', 'VDD', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][7]).pin("VDDIO") .vForce(V_VDDIO V).iRange(10 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][8]).pin("VDD") .vForce(0 V).iRange(40 mA)//{sav('VDD', 0, 2, 0.01, False, True)}
.insertSub(i_comment_line[0][9]).pin("VDDIO") .vForce(V_VDDIO V).iRange(10 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][9]).pin("VDD") .vForce(0 V).iRange(40 mA)//{sav('VDD', 0, 2, 0.01, False, True)}
.insertSub(i_comment_line[0][9]).pin("VDDIO") .vForce(0 V).iRange(40 mA)//{sav('VDDIO', 0, 2, 0.01, False, True)}
.insertSub(i_comment_line[0][9]).pin("CSB") .vForce(0 V).iRange(40 mA)//{sav('CSB', 0, 2, 0.01, False, False)}
//C4
.insertSub(i_comment_line[0][10]).pin("VDD") .vForce(V_VDD V)//{sav('VDD', 1.8, 3, 0.0005, False, True)}
.insertSub(i_comment_line[0][11]).pin("VDDIO") .vForce(V_VDDIO V)//{sav('VDDIO', 3, 3, 0.0005, False, True)}
.insertSub(i_comment_line[0][11]).pin("CSB") .vForce(V_VDDIO V)//{sav('CSB', 3, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][12]).pin("VDD") .vForce(V_VDD V).iRange(100 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDD', 'VDD', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][12]).pin("VDDIO") .vForce(V_VDDIO V).iRange(10 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][13]).pin("VDDIO") .vForce(0 V).iRange(40 mA)//{sav('VDDIO', 0, 2, 0.01, False, True)}
.insertSub(i_comment_line[0][13]).pin("CSB") .vForce(0 V).iRange(40 mA)//{sav('CSB', 0, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][14]).pin("VDD") .vForce(V_VDD V).iRange(10 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDD', 'VDD', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][14]).pin("VDD") .vForce(0 V).iRange(40 mA)//{sav('VDD', 0, 2, 0.01, False, True)}
.insertSub(i_comment_line[0][14]).pin("VDDIO") .vForce(0 V).iRange(40 mA)//{sav('VDDIO', 0, 2, 0.01, False, True)}
.insertSub(i_comment_line[0][14]).pin("CSB") .vForce(0 V).iRange(40 mA)//{sav('CSB', 0, 2, 0.01, False, False)}
//C5
.insertSub(i_comment_line[0][15]).pin("VDD") .vForce(V_VDD V).iRange(40 mA)//{sav('VDD', 1.8, 3, 0.0005, False, True)}
.insertSub(i_comment_line[0][15]).pin("VDDIO") .vForce(V_VDDIO V).iRange(40 mA)//{sav('VDDIO', 3, 3, 0.0005, False, True)}
.insertSub(i_comment_line[0][15]).pin("CSB") .vForce(V_VDDIO V).iRange(40 mA)//{sav('CSB', 3, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][16]).pin("VDDIO") .vForce(0 V).iRange(40 mA)//{sav('VDDIO', 0, 2, 0.01, False, True)}
.insertSub(i_comment_line[0][16]).pin("CSB") .vForce(0 V).iRange(40 mA)//{sav('CSB', 0, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][17]).pin("VDDIO") .vForce(V_VDDIO V).iRange(40 mA)//{sav('VDDIO', 3, 3, 0.0005, False, True)}
.insertSub(i_comment_line[0][17]).pin("CSB") .vForce(V_VDDIO V).iRange(40 mA)//{sav('CSB', 3, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][18]).pin("VDD") .vForce(V_VDD V).iRange(100 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDD', 'VDD', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][18]).pin("VDDIO") .vForce(V_VDDIO V).iRange(10 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][18]).pin("VDD") .vForce(0 V).iRange(40 mA)//{sav('VDD', 0, 2, 0.01, False, True)}
.insertSub(i_comment_line[0][18]).pin("VDDIO") .vForce(0 V).iRange(40 mA)//{sav('VDDIO', 0, 2, 0.01, False, True)}
.insertSub(i_comment_line[0][18]).pin("CSB") .vForce(0 V).iRange(40 mA)//{sav('CSB', 0, 2, 0.01, False, False)}
//c6
.insertSub(i_comment_line[0][19]).pin("VDD") .vForce(V_VDD V).iRange(40 mA)//{sav('VDD', 1.8, 3, 0.0005, False, True)}
.insertSub(i_comment_line[0][19]).pin("VDDIO") .vForce(V_VDDIO V).iRange(40 mA)//{sav('VDDIO', 3, 3, 0.0005, False, True)}
.insertSub(i_comment_line[0][19]).pin("CSB") .vForce(V_VDDIO V).iRange(40 mA)//{sav('CSB', 3, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][20]).pin("VDD") .vForce(0 V).iRange(40 mA)//{sav('VDD', 0, 2, 0.01, False, True)}
.insertSub(i_comment_line[0][21]).pin("VDD") .vForce(V_VDD V)//{sav('VDD', 1.8, 3, 0.0005, False, True)}
.insertSub(i_comment_line[0][22]).pin("VDD") .vForce(V_VDD V).iRange(100 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDD', 'VDD', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][22]).pin("VDDIO") .vForce(V_VDDIO V).iRange(10 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][22]).pin("VDD") .vForce(0 V).iRange(40 mA)
.insertSub(i_comment_line[0][22]).pin("VDDIO") .vForce(0 V).iRange(40 mA)
.insertSub(i_comment_line[0][22]).pin("CSB") .vForce(0 V).iRange(40 mA)//{sav('CSB', 0, 2, 0.01, False, False)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id(s_rdi_burstid).getBurstPassFail();
ARRAY_D ad_jsubresults_VDD; ad_jsubresults_VDD.resize(7); ad_jsubresults_VDD.init(-9.9);
ARRAY_D ad_jsubresults_VDDIO; ad_jsubresults_VDDIO.resize(7); ad_jsubresults_VDDIO.init(-9.9);
ad_jsubresults_VDD = rdi.id(s_rdi_dcid).getMultiValue("VDD");
ad_jsubresults_VDDIO = rdi.id(s_rdi_dcid).getMultiValue("VDDIO");
I_C1_VDD[curSite] = ad_jsubresults_VDD[0];
I_C2_VDD[curSite] = ad_jsubresults_VDD[1];
I_C3_VDD[curSite] = ad_jsubresults_VDD[2];
I_C4A_VDD[curSite] = ad_jsubresults_VDD[3];
I_C4B_VDD[curSite] = ad_jsubresults_VDD[4];
I_C5_VDD[curSite] = ad_jsubresults_VDD[5];
I_C6_VDD[curSite] = ad_jsubresults_VDD[6];
I_C1_VDDIO[curSite] = ad_jsubresults_VDDIO[0];
I_C2_VDDIO[curSite] = ad_jsubresults_VDDIO[1];
I_C3A_VDDIO[curSite] = ad_jsubresults_VDDIO[2];
I_C3B_VDDIO[curSite] = ad_jsubresults_VDDIO[3];
I_C4_VDDIO[curSite] = ad_jsubresults_VDDIO[4];
I_C5_VDDIO[curSite] = ad_jsubresults_VDDIO[5];
I_C6_VDDIO[curSite] = ad_jsubresults_VDDIO[6];
FuncPrint("I_C1_VDD",I_C1_VDD[curSite]);
FuncPrint("I_C1_VDDIO",I_C1_VDDIO[curSite]);
FuncPrint("I_C2_VDD",I_C2_VDD[curSite]);
FuncPrint("I_C2_VDDIO",I_C2_VDDIO[curSite]);
FuncPrint("I_C3A_VDDIO",I_C3A_VDDIO[curSite]);
FuncPrint("I_C3B_VDDIO",I_C3B_VDDIO[curSite]);
FuncPrint("I_C3_VDD",I_C3_VDD[curSite]);
FuncPrint("I_C4A_VDD",I_C4A_VDD[curSite]);
FuncPrint("I_C4B_VDD",I_C4B_VDD[curSite]);
FuncPrint("I_C4_VDDIO",I_C4_VDDIO[curSite]);
FuncPrint("I_C5_VDD",I_C5_VDD[curSite]);
FuncPrint("I_C5_VDDIO",I_C5_VDDIO[curSite]);
FuncPrint("I_C6_VDD",I_C6_VDD[curSite]);
FuncPrint("I_C6_VDDIO",I_C6_VDDIO[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
TestLog("I_C1_VDD",I_C1_VDD[curSite]);
TestLog("I_C1_VDDIO",I_C1_VDDIO[curSite]);
TestLog("I_C2_VDD",I_C2_VDD[curSite]);
TestLog("I_C2_VDDIO",I_C2_VDDIO[curSite]);
TestLog("I_C3A_VDDIO",I_C3A_VDDIO[curSite]);
TestLog("I_C3B_VDDIO",I_C3B_VDDIO[curSite]);
TestLog("I_C3_VDD",I_C3_VDD[curSite]);
TestLog("I_C4A_VDD",I_C4A_VDD[curSite]);
TestLog("I_C4B_VDD",I_C4B_VDD[curSite]);
TestLog("I_C4_VDDIO",I_C4_VDDIO[curSite]);
TestLog("I_C5_VDD",I_C5_VDD[curSite]);
TestLog("I_C5_VDDIO",I_C5_VDDIO[curSite]);
TestLog("I_C6_VDD",I_C6_VDD[curSite]);
TestLog("I_C6_VDDIO",I_C6_VDDIO[curSite]);
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T08_15_Power_Supply_Ramping_Test_R1", T08_15_Power_Supply_Ramping_Test_R1);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: Power skew test
# - assume chip in STC_ACC status
#############################################################################################################
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
supply = {"VDDmin": 1.62, "VDDtyp":1.80, "VDDmax":3.60,
"VDDIOmin":1.08,"VDDIOtyp":1.80,"VDDIOmax":3.60
}
sav('VDD', supply["VDDtyp"], v_range=4.0, i_comp=40e-3)
sav('VDDIO', supply["VDDIOtyp"], v_range=4.0, i_comp=40e-3)
dly(4e-3)
gac('I_SKEW_ACT0_VDD', 'VDD')
gac('I_SKEW_ACT0_VDDIO', 'VDDIO')
sav('VDD', supply["VDDmin"], v_range=4.0, i_comp=40e-3)
sav('VDDIO', supply["VDDIOmax"], v_range=4.0, i_comp=40e-3)
dly(4e-3)
gac('I_SKEW_ACT1_VDD', 'VDD')
gac('I_SKEW_ACT1_VDDIO', 'VDDIO')
sav('VDD', supply["VDDmax"], v_range=4.0, i_comp=40e-3)
sav('VDDIO', supply["VDDIOmin"], v_range=4.0, i_comp=40e-3)
dly(4e-3)
gac('I_SKEW_ACT2_VDD', 'VDD')
gac('I_SKEW_ACT2_VDDIO', 'VDDIO')
sav('VDD', supply["VDDtyp"], v_range=4.0, i_comp=40e-3)
sav('VDDIO', supply["VDDIOtyp"], v_range=4.0, i_comp=40e-3)
dly(1e-3)
wac('EXT_MODE', 0xc000) # Switch to USR register page
wac('ACC_CONF', 0x024C) # Switch ACC off
dly(200e-6)
wac('EXT_MODE', 0xc00d) # Switch to PMU register page
rac('STATUS_PMOD0', 0x0000, 0x0003) # Check ACC PMU status
dly(4e-3)
gac('I_SKEW_STBY0_VDD', 'VDD')
gac('I_SKEW_STBY0_VDDIO', 'VDDIO')
sav('VDD', supply["VDDmin"], v_range=4.0, i_comp=40e-3)
sav('VDDIO', supply["VDDIOmax"], v_range=4.0, i_comp=40e-3)
dly(4e-3)
gac('I_SKEW_STBY1_VDD', 'VDD')
gac('I_SKEW_STBY1_VDDIO', 'VDDIO')
sav('VDD', supply["VDDmax"], v_range=4.0, i_comp=40e-3)
sav('VDDIO', supply["VDDIOmin"], v_range=4.0, i_comp=40e-3)
dly(4e-3)
gac('I_SKEW_STBY2_VDD', 'VDD')
gac('I_SKEW_STBY2_VDDIO', 'VDDIO')
sav('VDD', supply["VDDtyp"], v_range=4.0, i_comp=40e-3)
sav('VDDIO', supply["VDDIOtyp"], v_range=4.0, i_comp=40e-3)
dly(1e-3)
wac('EXT_MODE', 0xc000) # Switch to USR register page
wac('ACC_CONF', 0xe24c) # Switch ACC on
dly(400e-6)
wac('EXT_MODE', 0xc00d) # Switch to PMU register page
rac('STATUS_PMOD0', 0x0003, 0x0003) # Check ACC AFE PMU status
|
/*****************************************************
* T08_16_Power_Skew_Test_V1, description file version Notfound, avc file version Notfound
* First Editor : jsh5sgh
* Code generated with autocoding tool V2.9.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T08_16_Power_Skew_Test_V1: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
const double VDDmin = 1.62, VDDtyp = 1.80, VDDmax = 3.60;
const double VDDIOmin = 1.08, VDDIOtyp = 1.80, VDDIOmax = 3.60;
static double I_SKEW_ACT0_VDD[xNSitES];
static double I_SKEW_ACT0_VDDIO[xNSitES];
static double I_SKEW_ACT1_VDD[xNSitES];
static double I_SKEW_ACT1_VDDIO[xNSitES];
static double I_SKEW_ACT2_VDD[xNSitES];
static double I_SKEW_ACT2_VDDIO[xNSitES];
static double I_SKEW_STBY0_VDD[xNSitES];
static double I_SKEW_STBY0_VDDIO[xNSitES];
static double I_SKEW_STBY1_VDD[xNSitES];
static double I_SKEW_STBY1_VDDIO[xNSitES];
static double I_SKEW_STBY2_VDD[xNSitES];
static double I_SKEW_STBY2_VDDIO[xNSitES];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T08_16_Power_Skew_Test}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 1 > <Author: hmf1rt > <Date: 2024/03/13 13:36:52 GMT >}
valid comment[ 0] @ avcline 10: {sav('VDD', 1.8, 4, 0.04, False, False)}
valid comment[ 0] @ avcline 10: {sav('VDDIO', 1.8, 4, 0.04, False, False)}
valid comment[ 1] @ avcline 19: {gac('I_SKEW_ACT0_VDD', 'VDD', 1e-05, 0.0001, True)}
valid comment[ 1] @ avcline 19: {gac('I_SKEW_ACT0_VDDIO', 'VDDIO', 1e-05, 0.0001, True)}
valid comment[ 1] @ avcline 19: {sav('VDD', 1.62, 4, 0.04, False, False)}
valid comment[ 1] @ avcline 19: {sav('VDDIO', 3.6, 4, 0.04, False, False)}
valid comment[ 2] @ avcline 27: {gac('I_SKEW_ACT1_VDD', 'VDD', 1e-05, 0.0001, True)}
valid comment[ 2] @ avcline 27: {gac('I_SKEW_ACT1_VDDIO', 'VDDIO', 1e-05, 0.0001, True)}
valid comment[ 2] @ avcline 27: {sav('VDD', 3.6, 4, 0.04, False, False)}
valid comment[ 2] @ avcline 27: {sav('VDDIO', 1.08, 4, 0.04, False, False)}
valid comment[ 3] @ avcline 35: {gac('I_SKEW_ACT2_VDD', 'VDD', 1e-05, 0.0001, True)}
valid comment[ 3] @ avcline 35: {gac('I_SKEW_ACT2_VDDIO', 'VDDIO', 1e-05, 0.0001, True)}
valid comment[ 3] @ avcline 35: {sav('VDD', 1.8, 4, 0.04, False, False)}
valid comment[ 3] @ avcline 35: {sav('VDDIO', 1.8, 4, 0.04, False, False)}
valid comment[ 4] @ avcline 749: {gac('I_SKEW_STBY0_VDD', 'VDD', 1e-05, 0.0001, True)}
valid comment[ 4] @ avcline 749: {gac('I_SKEW_STBY0_VDDIO', 'VDDIO', 1e-05, 0.0001, True)}
valid comment[ 4] @ avcline 749: {sav('VDD', 1.62, 4, 0.04, False, False)}
valid comment[ 4] @ avcline 749: {sav('VDDIO', 3.6, 4, 0.04, False, False)}
valid comment[ 5] @ avcline 757: {gac('I_SKEW_STBY1_VDD', 'VDD', 1e-05, 0.0001, True)}
valid comment[ 5] @ avcline 757: {gac('I_SKEW_STBY1_VDDIO', 'VDDIO', 1e-05, 0.0001, True)}
valid comment[ 5] @ avcline 757: {sav('VDD', 3.6, 4, 0.04, False, False)}
valid comment[ 5] @ avcline 757: {sav('VDDIO', 1.08, 4, 0.04, False, False)}
valid comment[ 6] @ avcline 765: {gac('I_SKEW_STBY2_VDD', 'VDD', 1e-05, 0.0001, True)}
valid comment[ 6] @ avcline 765: {gac('I_SKEW_STBY2_VDDIO', 'VDDIO', 1e-05, 0.0001, True)}
valid comment[ 6] @ avcline 765: {sav('VDD', 1.8, 4, 0.04, False, False)}
valid comment[ 6] @ avcline 765: {sav('VDDIO', 1.8, 4, 0.04, False, False)}
valid comment[ 7] @ avcline 1469: {Test End: T08_16_Power_Skew_Test}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][0]).pin("VDD").vForce(VDDtyp V)//{sav('VDD', 1.8, 4, 0.04, False, False)}
.insertSub(i_comment_line[0][0]).pin("VDDIO,CSB").vForce(VDDIOtyp V)//{sav('VDDIO', 1.8, 4, 0.04, False, False)}
.insertSub(i_comment_line[0][1]).pin("VDD").vForce(VDDtyp V).iRange(1 mA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDD', 'VDD', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][1]).pin("VDDIO").vForce(VDDIOtyp V).iRange(100 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][1]).pin("VDD").vForce(VDDmin V)//{sav('VDD', 1.62, 4, 0.04, False, False)}
.insertSub(i_comment_line[0][1]).pin("VDDIO,CSB").vForce(VDDIOmax V)//{sav('VDDIO', 3.6, 4, 0.04, False, False)}
.insertSub(i_comment_line[0][2]).pin("VDD").vForce(VDDmin V).iRange(1 mA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDD', 'VDD', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][2]).pin("VDDIO").vForce(VDDIOmax V).iRange(100 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][2]).pin("VDD").vForce(VDDmax V)//{sav('VDD', 3.6, 4, 0.04, False, False)}
.insertSub(i_comment_line[0][2]).pin("VDDIO,CSB").vForce(VDDIOmin V)//{sav('VDDIO', 1.08, 4, 0.04, False, False)}
.insertSub(i_comment_line[0][3]).pin("VDD").vForce(VDDmax V).iRange(1 mA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDD', 'VDD', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][3]).pin("VDDIO").vForce(VDDIOmin V).iRange(100 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][3]).pin("VDD").vForce(VDDtyp V)//{sav('VDD', 1.8, 4, 0.04, False, False)}
.insertSub(i_comment_line[0][3]).pin("VDDIO,CSB").vForce(VDDIOtyp V)//{sav('VDDIO', 1.8, 4, 0.04, False, False)}
.insertSub(i_comment_line[0][3]).pin("CSB").relay(TA::ppmuRly_onAC_offDCPPMU)
.insertSub(i_comment_line[0][4]).pin("VDD").vForce(VDDtyp V).iRange(1 mA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDD', 'VDD', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][4]).pin("VDDIO").vForce(VDDIOtyp V).iRange(100 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][4]).pin("VDD").vForce(VDDmin V)//{sav('VDD', 1.62, 4, 0.04, False, False)}
.insertSub(i_comment_line[0][4]).pin("VDDIO,CSB").vForce(VDDIOmax V)//{sav('VDDIO', 3.6, 4, 0.04, False, False)}
.insertSub(i_comment_line[0][5]).pin("VDD").vForce(VDDmin V).iRange(1 mA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDD', 'VDD', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][5]).pin("VDDIO").vForce(VDDIOmax V).iRange(100 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][5]).pin("VDD").vForce(VDDmax V)//{sav('VDD', 3.6, 4, 0.04, False, False)}
.insertSub(i_comment_line[0][5]).pin("VDDIO,CSB").vForce(VDDIOmin V)//{sav('VDDIO', 1.08, 4, 0.04, False, False)}
.insertSub(i_comment_line[0][6]).pin("VDD").vForce(VDDmax V).iRange(1 mA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDD', 'VDD', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][6]).pin("VDDIO").vForce(VDDIOmin V).iRange(100 uA).iMeas().valueMode(TA::BADC).average(512).measWait(1.0 ms)//{gac('I_C1_VDDIO', 'VDDIO', 5e-05, 0.001, True)}
.insertSub(i_comment_line[0][6]).pin("VDD").vForce(VDDtyp V).iRange(40 mA)//{sav('VDD', 1.8, 4, 0.04, False, False)}
.insertSub(i_comment_line[0][6]).pin("VDDIO,CSB").vForce(VDDIOtyp V).iRange(40 mA)//{sav('VDDIO', 1.8, 4, 0.04, False, False)}
.insertSub(i_comment_line[0][6]).pin("CSB").relay(TA::ppmuRly_onAC_offDCPPMU)
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
ARRAY_D ad_jsubresults_VDD; ad_jsubresults_VDD.resize(6); ad_jsubresults_VDD.init(-9.9);
ARRAY_D ad_jsubresults_VDDIO; ad_jsubresults_VDDIO.resize(6); ad_jsubresults_VDDIO.init(-9.9);
ad_jsubresults_VDD = rdi.id("dcid_0").getMultiValue("VDD");
ad_jsubresults_VDDIO = rdi.id("dcid_0").getMultiValue("VDDIO");
I_SKEW_ACT0_VDD[curSite] = ad_jsubresults_VDD[0];
I_SKEW_ACT1_VDD[curSite] = ad_jsubresults_VDD[1];
I_SKEW_ACT2_VDD[curSite] = ad_jsubresults_VDD[2];
I_SKEW_STBY0_VDD[curSite] = ad_jsubresults_VDD[3];
I_SKEW_STBY1_VDD[curSite] = ad_jsubresults_VDD[4];
I_SKEW_STBY2_VDD[curSite] = ad_jsubresults_VDD[5];
I_SKEW_ACT0_VDDIO[curSite] = ad_jsubresults_VDDIO[0];
I_SKEW_ACT1_VDDIO[curSite] = ad_jsubresults_VDDIO[1];
I_SKEW_ACT2_VDDIO[curSite] = ad_jsubresults_VDDIO[2];
I_SKEW_STBY0_VDDIO[curSite] = ad_jsubresults_VDDIO[3];
I_SKEW_STBY1_VDDIO[curSite] = ad_jsubresults_VDDIO[4];
I_SKEW_STBY2_VDDIO[curSite] = ad_jsubresults_VDDIO[5];
FuncPrint("I_SKEW_ACT0_VDD",I_SKEW_ACT0_VDD[curSite]);
FuncPrint("I_SKEW_ACT0_VDDIO",I_SKEW_ACT0_VDDIO[curSite]);
FuncPrint("I_SKEW_ACT1_VDD",I_SKEW_ACT1_VDD[curSite]);
FuncPrint("I_SKEW_ACT1_VDDIO",I_SKEW_ACT1_VDDIO[curSite]);
FuncPrint("I_SKEW_ACT2_VDD",I_SKEW_ACT2_VDD[curSite]);
FuncPrint("I_SKEW_ACT2_VDDIO",I_SKEW_ACT2_VDDIO[curSite]);
FuncPrint("I_SKEW_STBY0_VDD",I_SKEW_STBY0_VDD[curSite]);
FuncPrint("I_SKEW_STBY0_VDDIO",I_SKEW_STBY0_VDDIO[curSite]);
FuncPrint("I_SKEW_STBY1_VDD",I_SKEW_STBY1_VDD[curSite]);
FuncPrint("I_SKEW_STBY1_VDDIO",I_SKEW_STBY1_VDDIO[curSite]);
FuncPrint("I_SKEW_STBY2_VDD",I_SKEW_STBY2_VDD[curSite]);
FuncPrint("I_SKEW_STBY2_VDDIO",I_SKEW_STBY2_VDDIO[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
TestLog("I_SKEW_ACT0_VDD",I_SKEW_ACT0_VDD[curSite]);
TestLog("I_SKEW_ACT0_VDDIO",I_SKEW_ACT0_VDDIO[curSite]);
TestLog("I_SKEW_ACT1_VDD",I_SKEW_ACT1_VDD[curSite]);
TestLog("I_SKEW_ACT1_VDDIO",I_SKEW_ACT1_VDDIO[curSite]);
TestLog("I_SKEW_ACT2_VDD",I_SKEW_ACT2_VDD[curSite]);
TestLog("I_SKEW_ACT2_VDDIO",I_SKEW_ACT2_VDDIO[curSite]);
TestLog("I_SKEW_STBY0_VDD",I_SKEW_STBY0_VDD[curSite]);
TestLog("I_SKEW_STBY0_VDDIO",I_SKEW_STBY0_VDDIO[curSite]);
TestLog("I_SKEW_STBY1_VDD",I_SKEW_STBY1_VDD[curSite]);
TestLog("I_SKEW_STBY1_VDDIO",I_SKEW_STBY1_VDDIO[curSite]);
TestLog("I_SKEW_STBY2_VDD",I_SKEW_STBY2_VDD[curSite]);
TestLog("I_SKEW_STBY2_VDDIO",I_SKEW_STBY2_VDDIO[curSite]);
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T08_16_Power_Skew_Test_V1", T08_16_Power_Skew_Test_V1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 3 $ $Author: hmf1rt $ $Date: 2024/04/19 14:25:16 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_CONF', 0x0011) # Enable TB1; invert test bus
wac('TM_PIN', 0x0095) # Enable ANAIO1/2; TB1_OUT on ANAIO1; TB2_INP on ANAIO2
wac('TM_ADDR', 0x070e) # Enable reference block on ATM; Connect VREFD/VSS
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x000f) # Set masking register
for n in range (0, 16, 1):
cmt('Set trim index to value {} in range (0..15)'.format(n))
wr('ANA_TRM_PMU', n) # Set trim value
rac('ANA_TRM_PMU', n, 0x000f) # Check register setting
uclk('ASCX')
bw('ASCX', 1)
dly(1352*74e-9)
gav('V_REF_D_RAW[{:02d}]'.format(n), 'INT2', 'ASDX')
calc('V_REF_D[{:02d}]'.format(n), 'V_REF_D_RAW[{:02d}]'.format(n), '-', 'V_OFF1_ECON')
log('V_REF_D[{:02d}]'.format(n))
ubw('ASCX')
clk('ASCX', 1/148e-9)
dly(296e-9)
otv('V_OPT_VREFD', 'V_REF_D', 1.1) # Select optimum trim value
log('V_OPT_VREFD')
oti('N_OPT_VREFD', 'V_REF_D', 1.1) # Select optimum trim index
log('N_OPT_VREFD')
dly(296e-9)
wri('ANA_TRM_PMU', 'N_OPT_VREFD') # Write opt trim index N_OPT_VREFD back to DUT
ras('N_OPT_VREFD_RD', 'ANA_TRM_PMU') # Read and save register setting
cmt('The test item is a functional fail if (N_OPT_VREFD_RD & 0x000f) != N_OPT_VREFD')
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_01_standby_regulator_trimming_V3: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
INT split_pat_flag;
GET_USER_FLAG("split_pat_flag", &split_pat_flag);
vector<string> s_splited_pat_name;
const int split_count = 2; // Alarm:: split_count need manual confirm.
s_splited_pat_name.resize(split_count);
vector<int> i_comment_line[split_count];
static int N_OPT_VREFD_RD[xNSitES];
static int N_OPT_VREFD_WR[xNSitES];
static double V_REF_D_RAW[xNSitES][16];
static double V_REF_D[xNSitES][16];
static double V_OPT_VREFD[xNSitES];
ARRAY_LL N_OPT_VREFD_WR_rtv(xNSitES);
const int Wri_Bit_Length = 33;
const int Wri_Bit_Position = 31;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
GET_TESTSUITE_NAME(test_name);
if (split_pat_flag)
{
split_pattern(s_label_name,"wri",split_pat_flag,s_splited_pat_name);
}
else
{
for (int i = 0; i<split_count; i++)
{
s_splited_pat_name[i] = s_label_name + "_part" + rdi.itos(i);
i_comment_line[i] = search_comment_line(s_splited_pat_name[i]);
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
cout.precision(3);
rdi.enableOre(oreFlag);
rdi.oreFile("./ORE_Files/rdi_ore_T10_01_standby_regulator_trimming_V3.xml");
RDI_BEGIN(mode);
rdi.burstId("T10_01_standby_regulator_trimming_V3_PAT_id0");
for (int i = 0; i<16; i++)
{
rdi.dc("T10_01_standby_regulator_trimming_V3DC_id0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][i]).pin("INT2,ASDX",TA::BADC).vMeas().average(128).measWait(1 ms).cont();//V_REF_D_RAW[i]
}
rdi.dc("T10_01_standby_regulator_trimming_V3DC_id0").execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
ARRAY_D JSUB_results_ASDX;
JSUB_results_ASDX = rdi.id("T10_01_standby_regulator_trimming_V3DC_id0").getMultiValue("ASDX");
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T10_01_standby_regulator_trimming_V3DC_id0").getMultiValue("INT2");
for (int i = 0; i<16; i++)
{
V_REF_D_RAW[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_INT2[i] - JSUB_results_ASDX[i];
V_REF_D[CURRENT_SITE_NUMBER()-1][i] = V_REF_D_RAW[CURRENT_SITE_NUMBER()-1][i] - V_OFF1_ECON[CURRENT_SITE_NUMBER()-1];
}
for (int i = 0; i<16; i++)
{
FuncPrint("V_REF_D_RAW_"+rdi.itos(i), V_REF_D_RAW[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i = 0; i<16; i++)
{
FuncPrint("V_REF_D_"+rdi.itos(i), V_REF_D[CURRENT_SITE_NUMBER()-1][i]);
}
N_OPT_VREFD_WR[CURRENT_SITE_NUMBER()-1] = i_Func_Optimal_Trim_Val(V_REF_D[CURRENT_SITE_NUMBER()-1], Target_T1001, 16);
V_OPT_VREFD[CURRENT_SITE_NUMBER()-1] = V_REF_D[CURRENT_SITE_NUMBER()-1][N_OPT_VREFD_WR[CURRENT_SITE_NUMBER()-1]];
FuncPrint("N_OPT_VREFD_WR", N_OPT_VREFD_WR[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_OPT_VREFD", V_OPT_VREFD[CURRENT_SITE_NUMBER()-1]);
N_OPT_VREFD_WR_rtv[CURRENT_SITE_NUMBER()-1] = extend_Pmode_Herschel(N_OPT_VREFD_WR[CURRENT_SITE_NUMBER()-1], 2);
FuncPrint("N_OPT_VREFD_WR_rtv", N_OPT_VREFD_WR_rtv[CURRENT_SITE_NUMBER()-1]);
FOR_EACH_SITE_END();
rdi.runTimeVal("N_OPT_VREFD_WR_rtv", N_OPT_VREFD_WR_rtv);
RDI_BEGIN(mode);
rdi.burstId("T10_01_standby_regulator_trimming_V3_PAT_id1");
rdi.digCap("T10_01_standby_regulator_trimming_V3_Digcap_id").vecVarOnly().pin("SDO").capMode(TA::SER).samples(16*1).bitPerWord(16).execute();
rdi.smartVec().label(s_splited_pat_name[1]).pin("SDX").writeData("N_OPT_VREFD_WR_rtv", Wri_Bit_Length, Wri_Bit_Position).execute();
RDI_END();
}
ON_FIRST_INVOCATION_END();
ARRAY_I Vec=rdi.id("T10_01_standby_regulator_trimming_V3_Digcap_id").getVector();
N_OPT_VREFD_RD[CURRENT_SITE_NUMBER()-1] = reverse_ras_result(Vec[0]);
int Func_result0 = rdi.id("T10_01_standby_regulator_trimming_V3_PAT_id0").getBurstPassFail();
int Func_result1 = rdi.id("T10_01_standby_regulator_trimming_V3_PAT_id1").getBurstPassFail();
FuncPrint("Func_result0", Func_result0);
FuncPrint("Func_result1", Func_result1);
int Func_result = 1 * Func_result0 * Func_result1;
if ((N_OPT_VREFD_RD[CURRENT_SITE_NUMBER()-1] & 0xF) != N_OPT_VREFD_WR[CURRENT_SITE_NUMBER()-1]) Func_result=99;
FuncPrint("Func_result", Func_result);
FuncPrint("N_OPT_VREFD_RD", N_OPT_VREFD_RD[CURRENT_SITE_NUMBER()-1]);
TestLog("FUNCTIONAL_TEST", Func_result);
for (int i = 0; i<10; i++)
{
TestLog("V_REF_D_0"+rdi.itos(i), V_REF_D[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i = 10; i<16; i++)
{
TestLog("V_REF_D_"+rdi.itos(i), V_REF_D[CURRENT_SITE_NUMBER()-1][i]);
}
TestLog("V_OPT_VREFD", V_OPT_VREFD[CURRENT_SITE_NUMBER()-1]);
TestLog("N_OPT_VREFD", N_OPT_VREFD_WR[CURRENT_SITE_NUMBER()-1]);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_01_standby_regulator_trimming_V3", T10_01_standby_regulator_trimming_V3);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_CONF', 0x0011) # Enable TB1; invert test bus
wac('TM_PIN', 0x0095) # Enable ANAIO1/2; TB1_OUT on ANAIO1; TB2_INP on ANAIO2
wac('TM_ADDR', 0x070e) # Enable reference block on ATM; Connect VREFD/VSS
dly(100e-6)
gav('V_REF_D_M_RAW', 'INT2', 'ASDX')
calc('V_REF_D_M', 'V_REF_D_M_RAW', '-', 'V_OFF1_ECOFF')
log('V_REF_D_M')
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* T10_02_standby_regulator_measurement_V2, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_02_standby_regulator_measurement_V2: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static double d_V_REF_D_M[xNSitES];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// Func_Init_Var(i_funcRes, 0, xNSitES);
// Func_Init_Var(d_V_REF_D_M_RAW, 9.9, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_02_standby_regulator_measurement}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 20:34:28 GMT >}
valid comment[ 1] @ avcline 788: {gav('V_REF_D_M_RAW', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 1] @ avcline 788: {calc('V_REF_D_M', 'V_REF_D_M_RAW', '-', 'V_OFF1_ECOFF')}
valid comment[ 1] @ avcline 788: {log('V_REF_D_M', '', '', 0, 0)}
valid comment[ 2] @ avcline 1365: {Test End: T10_02_standby_regulator_measurement}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][1]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_M_RAW//{gav('V_REF_D_M_RAW', 'INT2', 'ASDX', 2, 0.0001, True)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(1); ad_jsubresults_INT2.init(-9.9);
ARRAY_D ad_jsubresults_ASDX; ad_jsubresults_ASDX.resize(1); ad_jsubresults_ASDX.init(-9.9);
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
ad_jsubresults_ASDX = rdi.id("dcid_0").getMultiValue("ASDX");
d_V_REF_D_M[curSite] = ad_jsubresults_INT2[0] - ad_jsubresults_ASDX[0] - V_OFF1_ECOFF[curSite];
FuncPrint("ad_jsubresults_ASDX", ad_jsubresults_ASDX[0]);
FuncPrint("ad_jsubresults_INT2", ad_jsubresults_INT2[0]);
FuncPrint("V_REF_D_M",d_V_REF_D_M[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("burst_id0").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("V_REF_D_M",d_V_REF_D_M[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_02_standby_regulator_measurement_V2", T10_02_standby_regulator_measurement_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_CONF', 0x0011) # Enable TB1; invert test bus
wac('TM_PIN', 0x0095) # Enable ANAIO1/2; TB1_OUT on ANAIO1; TB2_INP on ANAIO2
wac('TM_ADDR', 0x070e) # Enable reference block on ATM; Connect VREFD/VSS
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x000f) # Set masking register
ras('REG_VALUE', 'ANA_TRM_PMU') # Store the current value
for n in range (0, 16, 1):
cmt('Set trim index to value {} in range (0..15)'.format(n))
wr('ANA_TRM_PMU', n) # pc_trm_vref_dc
rac('ANA_TRM_PMU', n, 0x000f) # Check register setting
dly(100e-6)
gav('V_REF_D_C_RAW[{:02d}]'.format(n), 'INT2', 'ASDX')
calc('V_REF_D_C[{:02d}]'.format(n), 'V_REF_D_C_RAW[{:02d}]'.format(n), '-', 'V_OFF1_ECOFF')
log('V_REF_D_C[{:02d}]'.format(n))
dly(592e-9)
wri('ANA_TRM_PMU', 'REG_VALUE') # Write back the stored value
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* T10_03_Standby_Regulator_Char_V2, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH: fix some bugs.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_03_Standby_Regulator_Char_V2: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 2;
vector<int> i_comment_line[i_split_count];
static int i_REG_VALUE[xNSitES];
ARRAY_I aI_Captured_0;
static double d_V_REF_D_C_RAW[xNSitES][16];
static double V_REF_D_C[xNSitES][16];
ARRAY_D ad_V_REF_D_C_RAW;
static int i_WRITE_BACK[xNSitES];
static int i_vec_Num1[32] = {0};
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(i_REG_VALUE, 9, xNSitES);
//!"CTmsg: cut pattern to 2 parts @ oriAVCvecline [4531]
//!"CTmsg: cut pattern to 2 parts @ binarypatline [4521]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_03_Standby_Regulator_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 20:34:28 GMT >}
valid comment[ 1] @ avcline 1162: {ras('REG_VALUE', 'ANA_TRM_PMU')}
valid comment[ 2] @ avcline 1275: {cmt: Set trim index to value 0 in range (0..15)}
valid comment[ 3] @ avcline 1477: {gav('V_REF_D_C_RAW[00]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 3] @ avcline 1477: {calc('V_REF_D_C[00]', 'V_REF_D_C_RAW[00]', '-', 'V_OFF1_ECOFF')}
valid comment[ 3] @ avcline 1477: {log('V_REF_D_C[00]', '', '', 0, 0)}
valid comment[ 4] @ avcline 1478: {cmt: Set trim index to value 1 in range (0..15)}
valid comment[ 5] @ avcline 1680: {gav('V_REF_D_C_RAW[01]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 5] @ avcline 1680: {calc('V_REF_D_C[01]', 'V_REF_D_C_RAW[01]', '-', 'V_OFF1_ECOFF')}
valid comment[ 5] @ avcline 1680: {log('V_REF_D_C[01]', '', '', 0, 0)}
valid comment[ 6] @ avcline 1681: {cmt: Set trim index to value 2 in range (0..15)}
valid comment[ 7] @ avcline 1883: {gav('V_REF_D_C_RAW[02]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 7] @ avcline 1883: {calc('V_REF_D_C[02]', 'V_REF_D_C_RAW[02]', '-', 'V_OFF1_ECOFF')}
valid comment[ 7] @ avcline 1883: {log('V_REF_D_C[02]', '', '', 0, 0)}
valid comment[ 8] @ avcline 1884: {cmt: Set trim index to value 3 in range (0..15)}
valid comment[ 9] @ avcline 2086: {gav('V_REF_D_C_RAW[03]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 9] @ avcline 2086: {calc('V_REF_D_C[03]', 'V_REF_D_C_RAW[03]', '-', 'V_OFF1_ECOFF')}
valid comment[ 9] @ avcline 2086: {log('V_REF_D_C[03]', '', '', 0, 0)}
valid comment[ 10] @ avcline 2087: {cmt: Set trim index to value 4 in range (0..15)}
valid comment[ 11] @ avcline 2289: {gav('V_REF_D_C_RAW[04]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 11] @ avcline 2289: {calc('V_REF_D_C[04]', 'V_REF_D_C_RAW[04]', '-', 'V_OFF1_ECOFF')}
valid comment[ 11] @ avcline 2289: {log('V_REF_D_C[04]', '', '', 0, 0)}
valid comment[ 12] @ avcline 2290: {cmt: Set trim index to value 5 in range (0..15)}
valid comment[ 13] @ avcline 2492: {gav('V_REF_D_C_RAW[05]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 13] @ avcline 2492: {calc('V_REF_D_C[05]', 'V_REF_D_C_RAW[05]', '-', 'V_OFF1_ECOFF')}
valid comment[ 13] @ avcline 2492: {log('V_REF_D_C[05]', '', '', 0, 0)}
valid comment[ 14] @ avcline 2493: {cmt: Set trim index to value 6 in range (0..15)}
valid comment[ 15] @ avcline 2695: {gav('V_REF_D_C_RAW[06]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 15] @ avcline 2695: {calc('V_REF_D_C[06]', 'V_REF_D_C_RAW[06]', '-', 'V_OFF1_ECOFF')}
valid comment[ 15] @ avcline 2695: {log('V_REF_D_C[06]', '', '', 0, 0)}
valid comment[ 16] @ avcline 2696: {cmt: Set trim index to value 7 in range (0..15)}
valid comment[ 17] @ avcline 2898: {gav('V_REF_D_C_RAW[07]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 17] @ avcline 2898: {calc('V_REF_D_C[07]', 'V_REF_D_C_RAW[07]', '-', 'V_OFF1_ECOFF')}
valid comment[ 17] @ avcline 2898: {log('V_REF_D_C[07]', '', '', 0, 0)}
valid comment[ 18] @ avcline 2899: {cmt: Set trim index to value 8 in range (0..15)}
valid comment[ 19] @ avcline 3101: {gav('V_REF_D_C_RAW[08]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 19] @ avcline 3101: {calc('V_REF_D_C[08]', 'V_REF_D_C_RAW[08]', '-', 'V_OFF1_ECOFF')}
valid comment[ 19] @ avcline 3101: {log('V_REF_D_C[08]', '', '', 0, 0)}
valid comment[ 20] @ avcline 3102: {cmt: Set trim index to value 9 in range (0..15)}
valid comment[ 21] @ avcline 3304: {gav('V_REF_D_C_RAW[09]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 21] @ avcline 3304: {calc('V_REF_D_C[09]', 'V_REF_D_C_RAW[09]', '-', 'V_OFF1_ECOFF')}
valid comment[ 21] @ avcline 3304: {log('V_REF_D_C[09]', '', '', 0, 0)}
valid comment[ 22] @ avcline 3305: {cmt: Set trim index to value 10 in range (0..15)}
valid comment[ 23] @ avcline 3507: {gav('V_REF_D_C_RAW[10]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 23] @ avcline 3507: {calc('V_REF_D_C[10]', 'V_REF_D_C_RAW[10]', '-', 'V_OFF1_ECOFF')}
valid comment[ 23] @ avcline 3507: {log('V_REF_D_C[10]', '', '', 0, 0)}
valid comment[ 24] @ avcline 3508: {cmt: Set trim index to value 11 in range (0..15)}
valid comment[ 25] @ avcline 3710: {gav('V_REF_D_C_RAW[11]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 25] @ avcline 3710: {calc('V_REF_D_C[11]', 'V_REF_D_C_RAW[11]', '-', 'V_OFF1_ECOFF')}
valid comment[ 25] @ avcline 3710: {log('V_REF_D_C[11]', '', '', 0, 0)}
valid comment[ 26] @ avcline 3711: {cmt: Set trim index to value 12 in range (0..15)}
valid comment[ 27] @ avcline 3913: {gav('V_REF_D_C_RAW[12]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 27] @ avcline 3913: {calc('V_REF_D_C[12]', 'V_REF_D_C_RAW[12]', '-', 'V_OFF1_ECOFF')}
valid comment[ 27] @ avcline 3913: {log('V_REF_D_C[12]', '', '', 0, 0)}
valid comment[ 28] @ avcline 3914: {cmt: Set trim index to value 13 in range (0..15)}
valid comment[ 29] @ avcline 4116: {gav('V_REF_D_C_RAW[13]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 29] @ avcline 4116: {calc('V_REF_D_C[13]', 'V_REF_D_C_RAW[13]', '-', 'V_OFF1_ECOFF')}
valid comment[ 29] @ avcline 4116: {log('V_REF_D_C[13]', '', '', 0, 0)}
valid comment[ 30] @ avcline 4117: {cmt: Set trim index to value 14 in range (0..15)}
valid comment[ 31] @ avcline 4319: {gav('V_REF_D_C_RAW[14]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 31] @ avcline 4319: {calc('V_REF_D_C[14]', 'V_REF_D_C_RAW[14]', '-', 'V_OFF1_ECOFF')}
valid comment[ 31] @ avcline 4319: {log('V_REF_D_C[14]', '', '', 0, 0)}
valid comment[ 32] @ avcline 4320: {cmt: Set trim index to value 15 in range (0..15)}
valid comment[ 33] @ avcline 4522: {gav('V_REF_D_C_RAW[15]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 33] @ avcline 4522: {calc('V_REF_D_C[15]', 'V_REF_D_C_RAW[15]', '-', 'V_OFF1_ECOFF')}
valid comment[ 33] @ avcline 4522: {log('V_REF_D_C[15]', '', '', 0, 0)}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.digCap("digcapid_0").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(1*16).execute();
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][3]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_C_RAW_00//{gav('V_REF_D_C_RAW[00]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][5]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_C_RAW_01//{gav('V_REF_D_C_RAW[01]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][7]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_C_RAW_02//{gav('V_REF_D_C_RAW[02]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][9]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_C_RAW_03//{gav('V_REF_D_C_RAW[03]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][11]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_C_RAW_04//{gav('V_REF_D_C_RAW[04]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][13]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_C_RAW_05//{gav('V_REF_D_C_RAW[05]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][15]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_C_RAW_06//{gav('V_REF_D_C_RAW[06]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][17]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_C_RAW_07//{gav('V_REF_D_C_RAW[07]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][19]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_C_RAW_08//{gav('V_REF_D_C_RAW[08]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][21]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_C_RAW_09//{gav('V_REF_D_C_RAW[09]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][23]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_C_RAW_10//{gav('V_REF_D_C_RAW[10]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][25]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_C_RAW_11//{gav('V_REF_D_C_RAW[11]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][27]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_C_RAW_12//{gav('V_REF_D_C_RAW[12]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][29]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_C_RAW_13//{gav('V_REF_D_C_RAW[13]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][31]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_C_RAW_14//{gav('V_REF_D_C_RAW[14]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][33]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_C_RAW_15//{gav('V_REF_D_C_RAW[15]', 'INT2', 'ASDX', 2, 0.0001, True)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(16); ad_jsubresults_INT2.init(-9.9);
ARRAY_D ad_jsubresults_ASDX; ad_jsubresults_ASDX.resize(16); ad_jsubresults_ASDX.init(-9.9);
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
ad_jsubresults_ASDX = rdi.id("dcid_0").getMultiValue("ASDX");
aI_Captured_0[0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[0]);
i_REG_VALUE[curSite] = aI_Captured_0[0];
FuncPrint("REG_VALUE",i_REG_VALUE[curSite]);
for(int i=0; i<16; i++){
d_V_REF_D_C_RAW[curSite][i] = ad_jsubresults_INT2[0 + i] - ad_jsubresults_ASDX[0 + i];
FuncPrint("V_REF_D_C_RAW_" + rdi.itos(curSite) + "_"+ rdi.itos(i) ,d_V_REF_D_C_RAW[curSite][i]);
V_REF_D_C[curSite][i] = d_V_REF_D_C_RAW[curSite][i] - V_OFF1_ECOFF[curSite];
FuncPrint("V_REF_D_C"+rdi.itos(i) ,V_REF_D_C[curSite][i]);
}
for(int i=0; i < 16; i++){
}
//Add calc code if necessary
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 4531: {wri('ANA_TRM_PMU', 'REG_VALUE')}
valid comment[ 1] @ avcline 5570: {Test End: T10_03_Standby_Regulator_Char}
*/
static int i_vec_iposition1[32] = {
31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,
48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63
};
for (int i = 0; i < 32; i++)
{
i_vec_Num1[i] = i_vec_iposition1[i];
}
FOR_EACH_SITE_BEGIN();
i_WRITE_BACK[curSite] = Switch_High_Low_Bits_16Bits(i_REG_VALUE[curSite]);
Func_Vector_Dynamic_Write(s_splited_pat_name[1], "SDX", i_vec_Num1, 32, i_WRITE_BACK[curSite], 0, 2); //Notes. TEI check per project
//TODO pl.TEI check position & mask
FOR_EACH_SITE_END();
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.func().label(s_splited_pat_name[1]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
FuncPrint("REG_VALUE", i_REG_VALUE[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
// TestLog("REG_VALUE",i_REG_VALUE[curSite]);
for(int i=0; i < 16; i++) {
TestLog(s_Func_Test_Name_Add_2Num("V_REF_D_C_", i), V_REF_D_C[curSite][i]);
}
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T10_03_Standby_Regulator_Char_V2", T10_03_Standby_Regulator_Char_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_CONF', 0x0001) # Enable TB1
wac('TM_PIN', 0x0095) # Enable ANAIO1/2; TB1_OUT on ANAIO1; TB2_INP on ANAIO2
wac('TM_ADDR', 0x010d) # Enable power block on ATM; Connect VDDD_DC/VSS
dly(100e-6)
gav('V_DDD_DC_T_RAW', 'INT2', 'ASDX')
calc('V_DDD_DC_T', 'V_DDD_DC_T_RAW', '-', 'V_OFF1_ECOFF')
log('V_DDD_DC_T')
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_04_VDDD_DC_LDO_measurement_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double V_DDD_DC_T_RAW[xNSitES];
static double V_DDD_DC_T[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T10_04_VDDD_DC_LDO_measurement_V2_PAT_id");
rdi.dc("T10_04_VDDD_DC_LDO_measurement_V2DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms) //V_DDD_DC_T_RAW
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
ARRAY_D JSUB_results_ASDX;
JSUB_results_ASDX = rdi.id("T10_04_VDDD_DC_LDO_measurement_V2DC_id0").getMultiValue("ASDX");
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T10_04_VDDD_DC_LDO_measurement_V2DC_id0").getMultiValue("INT2");
V_DDD_DC_T_RAW[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[0] - JSUB_results_ASDX[0];
V_DDD_DC_T[CURRENT_SITE_NUMBER()-1] = V_DDD_DC_T_RAW[CURRENT_SITE_NUMBER()-1] - V_OFF1_ECOFF[CURRENT_SITE_NUMBER()-1];
FuncPrint("JSUB_results_ASDX", JSUB_results_ASDX[0]);
FuncPrint("JSUB_results_INT2", JSUB_results_INT2[0]);
FuncPrint("V_DDD_DC_T_RAW", V_DDD_DC_T_RAW[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_DDD_DC_T", V_DDD_DC_T[CURRENT_SITE_NUMBER()-1]);
int Func_result = rdi.id("T10_04_VDDD_DC_LDO_measurement_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("V_DDD_DC_T", V_DDD_DC_T[CURRENT_SITE_NUMBER()-1]);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_04_VDDD_DC_LDO_measurement_V2", T10_04_VDDD_DC_LDO_measurement_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_CONF', 0x0001) # Enable TB1
wac('TM_PIN', 0x0095) # Enable ANAIO1/2; TB1_OUT on ANAIO1; TB2_INP on ANAIO2
wac('TM_ADDR', 0x030d) # Enable power block on ATM; Connect VDDD_DS/VSS
dly(100e-6)
gav('V_DDD_DS_T_RAW', 'INT2', 'ASDX')
calc('V_DDD_DS_T', 'V_DDD_DS_T_RAW', '-', 'V_OFF1_ECOFF')
log('V_DDD_DS_T')
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* T10_05_VDDD_DS_LDO_measurement_V2, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_05_VDDD_DS_LDO_measurement_V2: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static double d_V_DDD_DS_T_RAW[xNSitES], d_V_DDD_DS_T[xNSitES];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(d_V_DDD_DS_T_RAW, 9.9, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_05_VDDD_DS_LDO_measurement}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 20:34:28 GMT >}
valid comment[ 1] @ avcline 788: {gav('V_DDD_DS_T_RAW', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 1] @ avcline 788: {calc('V_DDD_DS_T', 'V_DDD_DS_T_RAW', '-', 'V_OFF1_ECOFF')}
valid comment[ 1] @ avcline 788: {log('V_DDD_DS_T', '', '', 0, 0)}
valid comment[ 2] @ avcline 1365: {Test End: T10_05_VDDD_DS_LDO_measurement}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][1]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_T_RAW//{gav('V_DDD_DS_T_RAW', 'INT2', 'ASDX', 2, 0.0001, True)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(1); ad_jsubresults_INT2.init(-9.9);
ARRAY_D ad_jsubresults_ASDX; ad_jsubresults_ASDX.resize(1); ad_jsubresults_ASDX.init(-9.9);
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
ad_jsubresults_ASDX = rdi.id("dcid_0").getMultiValue("ASDX");
d_V_DDD_DS_T[curSite] = ad_jsubresults_INT2[0] - ad_jsubresults_ASDX[0] - V_OFF1_ECOFF[curSite];
FuncPrint("ad_jsubresults_INT2", ad_jsubresults_INT2[0]);
FuncPrint("ad_jsubresults_ASDX", ad_jsubresults_ASDX[0]);
// FuncPrint("d_V_DDD_DS_T_RAW", d_V_DDD_DS_T_RAW[CURRENT_SITE_NUMBER()-1]);
FuncPrint("d_V_DDD_DS_T", d_V_DDD_DS_T[CURRENT_SITE_NUMBER()-1]);
//Add calc code if necessary
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("burst_id0").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("V_DDD_DS_T", d_V_DDD_DS_T[CURRENT_SITE_NUMBER()-1]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_05_VDDD_DS_LDO_measurement_V2", T10_05_VDDD_DS_LDO_measurement_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/08/07 15:18:41 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_CONF', 0x0001) # Enable TB1
wac('TM_PIN', 0x0095) # Enable ANAIO1/2; TB1_OUT on ANAIO1; TB2_INP on ANAIO2
wac('TM_ADDR', 0x010d) # Enable power block on ATM; Connect VDDD_DC/VSS
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x000f) # Set masking register
ras('REG_VALUE', 'ANA_TRM_PMU') # Store the current value
for n in range (0, 16, 1):
cmt('Set trim index to value {} in range (0..15)'.format(n))
wr('ANA_TRM_PMU', n) # pc_trm_vref_dc
rac('ANA_TRM_PMU', n, 0x000f) # Check register setting
dly(100e-6)
gav('V_DDD_DC_C_RAW[{:02d}]'.format(n), 'INT2', 'ASDX')
calc('V_DDD_DC_C[{:02d}]'.format(n), 'V_DDD_DC_C_RAW[{:02d}]'.format(n), '-', 'V_OFF1_ECOFF')
log('V_DDD_DC_C[{:02d}]'.format(n))
dly(592e-9)
wri('ANA_TRM_PMU', 'REG_VALUE') # Write back the stored value
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* T10_06_VDDD_DC_LDO_Char_R1, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH: fix some bugs.
* JSH5SGH: pattern update to R1.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_06_VDDD_DC_LDO_Char_R1: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 2;
vector<int> i_comment_line[i_split_count];
static int i_REG_VALUE[xNSitES];
ARRAY_I aI_Captured_0;
static double d_V_DDD_DC_C_RAW[xNSitES][16];
static double V_DDD_DC_C[xNSitES][16];
ARRAY_D ad_V_DDD_DC_C_RAW;
static int i_WRITE_BACK[xNSitES];
static int i_vec_Num1[32] = {0};
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(i_REG_VALUE, 9, xNSitES);
//!"CTmsg: cut pattern to 2 parts @ oriAVCvecline [4531]
//!"CTmsg: cut pattern to 2 parts @ binarypatline [4521]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_06_VDDD_DC_LDO_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 20:34:28 GMT >}
valid comment[ 1] @ avcline 1162: {ras('REG_VALUE', 'ANA_TRM_PMU')}
valid comment[ 2] @ avcline 1275: {cmt: Set trim index to value 0 in range (0..15)}
valid comment[ 3] @ avcline 1477: {gav('V_DDD_DC_C_RAW[00]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 3] @ avcline 1477: {calc('V_DDD_DC_C[00]', 'V_DDD_DC_C_RAW[00]', '-', 'V_OFF1_ECOFF')}
valid comment[ 3] @ avcline 1477: {log('V_DDD_DC_C[00]', '', '', 0, 0)}
valid comment[ 4] @ avcline 1478: {cmt: Set trim index to value 1 in range (0..15)}
valid comment[ 5] @ avcline 1680: {gav('V_DDD_DC_C_RAW[01]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 5] @ avcline 1680: {calc('V_DDD_DC_C[01]', 'V_DDD_DC_C_RAW[01]', '-', 'V_OFF1_ECOFF')}
valid comment[ 5] @ avcline 1680: {log('V_DDD_DC_C[01]', '', '', 0, 0)}
valid comment[ 6] @ avcline 1681: {cmt: Set trim index to value 2 in range (0..15)}
valid comment[ 7] @ avcline 1883: {gav('V_DDD_DC_C_RAW[02]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 7] @ avcline 1883: {calc('V_DDD_DC_C[02]', 'V_DDD_DC_C_RAW[02]', '-', 'V_OFF1_ECOFF')}
valid comment[ 7] @ avcline 1883: {log('V_DDD_DC_C[02]', '', '', 0, 0)}
valid comment[ 8] @ avcline 1884: {cmt: Set trim index to value 3 in range (0..15)}
valid comment[ 9] @ avcline 2086: {gav('V_DDD_DC_C_RAW[03]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 9] @ avcline 2086: {calc('V_DDD_DC_C[03]', 'V_DDD_DC_C_RAW[03]', '-', 'V_OFF1_ECOFF')}
valid comment[ 9] @ avcline 2086: {log('V_DDD_DC_C[03]', '', '', 0, 0)}
valid comment[ 10] @ avcline 2087: {cmt: Set trim index to value 4 in range (0..15)}
valid comment[ 11] @ avcline 2289: {gav('V_DDD_DC_C_RAW[04]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 11] @ avcline 2289: {calc('V_DDD_DC_C[04]', 'V_DDD_DC_C_RAW[04]', '-', 'V_OFF1_ECOFF')}
valid comment[ 11] @ avcline 2289: {log('V_DDD_DC_C[04]', '', '', 0, 0)}
valid comment[ 12] @ avcline 2290: {cmt: Set trim index to value 5 in range (0..15)}
valid comment[ 13] @ avcline 2492: {gav('V_DDD_DC_C_RAW[05]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 13] @ avcline 2492: {calc('V_DDD_DC_C[05]', 'V_DDD_DC_C_RAW[05]', '-', 'V_OFF1_ECOFF')}
valid comment[ 13] @ avcline 2492: {log('V_DDD_DC_C[05]', '', '', 0, 0)}
valid comment[ 14] @ avcline 2493: {cmt: Set trim index to value 6 in range (0..15)}
valid comment[ 15] @ avcline 2695: {gav('V_DDD_DC_C_RAW[06]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 15] @ avcline 2695: {calc('V_DDD_DC_C[06]', 'V_DDD_DC_C_RAW[06]', '-', 'V_OFF1_ECOFF')}
valid comment[ 15] @ avcline 2695: {log('V_DDD_DC_C[06]', '', '', 0, 0)}
valid comment[ 16] @ avcline 2696: {cmt: Set trim index to value 7 in range (0..15)}
valid comment[ 17] @ avcline 2898: {gav('V_DDD_DC_C_RAW[07]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 17] @ avcline 2898: {calc('V_DDD_DC_C[07]', 'V_DDD_DC_C_RAW[07]', '-', 'V_OFF1_ECOFF')}
valid comment[ 17] @ avcline 2898: {log('V_DDD_DC_C[07]', '', '', 0, 0)}
valid comment[ 18] @ avcline 2899: {cmt: Set trim index to value 8 in range (0..15)}
valid comment[ 19] @ avcline 3101: {gav('V_DDD_DC_C_RAW[08]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 19] @ avcline 3101: {calc('V_DDD_DC_C[08]', 'V_DDD_DC_C_RAW[08]', '-', 'V_OFF1_ECOFF')}
valid comment[ 19] @ avcline 3101: {log('V_DDD_DC_C[08]', '', '', 0, 0)}
valid comment[ 20] @ avcline 3102: {cmt: Set trim index to value 9 in range (0..15)}
valid comment[ 21] @ avcline 3304: {gav('V_DDD_DC_C_RAW[09]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 21] @ avcline 3304: {calc('V_DDD_DC_C[09]', 'V_DDD_DC_C_RAW[09]', '-', 'V_OFF1_ECOFF')}
valid comment[ 21] @ avcline 3304: {log('V_DDD_DC_C[09]', '', '', 0, 0)}
valid comment[ 22] @ avcline 3305: {cmt: Set trim index to value 10 in range (0..15)}
valid comment[ 23] @ avcline 3507: {gav('V_DDD_DC_C_RAW[10]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 23] @ avcline 3507: {calc('V_DDD_DC_C[10]', 'V_DDD_DC_C_RAW[10]', '-', 'V_OFF1_ECOFF')}
valid comment[ 23] @ avcline 3507: {log('V_DDD_DC_C[10]', '', '', 0, 0)}
valid comment[ 24] @ avcline 3508: {cmt: Set trim index to value 11 in range (0..15)}
valid comment[ 25] @ avcline 3710: {gav('V_DDD_DC_C_RAW[11]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 25] @ avcline 3710: {calc('V_DDD_DC_C[11]', 'V_DDD_DC_C_RAW[11]', '-', 'V_OFF1_ECOFF')}
valid comment[ 25] @ avcline 3710: {log('V_DDD_DC_C[11]', '', '', 0, 0)}
valid comment[ 26] @ avcline 3711: {cmt: Set trim index to value 12 in range (0..15)}
valid comment[ 27] @ avcline 3913: {gav('V_DDD_DC_C_RAW[12]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 27] @ avcline 3913: {calc('V_DDD_DC_C[12]', 'V_DDD_DC_C_RAW[12]', '-', 'V_OFF1_ECOFF')}
valid comment[ 27] @ avcline 3913: {log('V_DDD_DC_C[12]', '', '', 0, 0)}
valid comment[ 28] @ avcline 3914: {cmt: Set trim index to value 13 in range (0..15)}
valid comment[ 29] @ avcline 4116: {gav('V_DDD_DC_C_RAW[13]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 29] @ avcline 4116: {calc('V_DDD_DC_C[13]', 'V_DDD_DC_C_RAW[13]', '-', 'V_OFF1_ECOFF')}
valid comment[ 29] @ avcline 4116: {log('V_DDD_DC_C[13]', '', '', 0, 0)}
valid comment[ 30] @ avcline 4117: {cmt: Set trim index to value 14 in range (0..15)}
valid comment[ 31] @ avcline 4319: {gav('V_DDD_DC_C_RAW[14]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 31] @ avcline 4319: {calc('V_DDD_DC_C[14]', 'V_DDD_DC_C_RAW[14]', '-', 'V_OFF1_ECOFF')}
valid comment[ 31] @ avcline 4319: {log('V_DDD_DC_C[14]', '', '', 0, 0)}
valid comment[ 32] @ avcline 4320: {cmt: Set trim index to value 15 in range (0..15)}
valid comment[ 33] @ avcline 4522: {gav('V_DDD_DC_C_RAW[15]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 33] @ avcline 4522: {calc('V_DDD_DC_C[15]', 'V_DDD_DC_C_RAW[15]', '-', 'V_OFF1_ECOFF')}
valid comment[ 33] @ avcline 4522: {log('V_DDD_DC_C[15]', '', '', 0, 0)}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.digCap("digcapid_0").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(1*16).execute();
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][3]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DC_C_RAW_00//{gav('V_DDD_DC_C_RAW[00]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][5]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DC_C_RAW_01//{gav('V_DDD_DC_C_RAW[01]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][7]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DC_C_RAW_02//{gav('V_DDD_DC_C_RAW[02]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][9]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DC_C_RAW_03//{gav('V_DDD_DC_C_RAW[03]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][11]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DC_C_RAW_04//{gav('V_DDD_DC_C_RAW[04]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][13]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DC_C_RAW_05//{gav('V_DDD_DC_C_RAW[05]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][15]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DC_C_RAW_06//{gav('V_DDD_DC_C_RAW[06]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][17]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DC_C_RAW_07//{gav('V_DDD_DC_C_RAW[07]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][19]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DC_C_RAW_08//{gav('V_DDD_DC_C_RAW[08]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][21]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DC_C_RAW_09//{gav('V_DDD_DC_C_RAW[09]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][23]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DC_C_RAW_10//{gav('V_DDD_DC_C_RAW[10]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][25]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DC_C_RAW_11//{gav('V_DDD_DC_C_RAW[11]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][27]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DC_C_RAW_12//{gav('V_DDD_DC_C_RAW[12]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][29]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DC_C_RAW_13//{gav('V_DDD_DC_C_RAW[13]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][31]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DC_C_RAW_14//{gav('V_DDD_DC_C_RAW[14]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][33]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DC_C_RAW_15//{gav('V_DDD_DC_C_RAW[15]', 'INT2', 'ASDX', 2, 0.0001, True)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(16); ad_jsubresults_INT2.init(-9.9);
ARRAY_D ad_jsubresults_ASDX; ad_jsubresults_ASDX.resize(16); ad_jsubresults_ASDX.init(-9.9);
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
ad_jsubresults_ASDX = rdi.id("dcid_0").getMultiValue("ASDX");
aI_Captured_0[0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[0]);
i_REG_VALUE[curSite] = aI_Captured_0[0];
FuncPrint("REG_VALUE",i_REG_VALUE[curSite]);
for(int i=0; i<16; i++){
d_V_DDD_DC_C_RAW[curSite][i] = ad_jsubresults_INT2[0 + i] - ad_jsubresults_ASDX[0 + i];
FuncPrint("V_DDD_DC_C_RAW_" + rdi.itos(curSite) + "_"+ rdi.itos(i) ,d_V_DDD_DC_C_RAW[curSite][i]);
V_DDD_DC_C[curSite][i] = d_V_DDD_DC_C_RAW[curSite][i] - V_OFF1_ECOFF[curSite];
FuncPrint("V_DDD_DC_C_"+rdi.itos(i) ,V_DDD_DC_C[curSite][i]);
}
//Add calc code if necessary
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 4531: {wri('ANA_TRM_PMU', 'REG_VALUE')}
valid comment[ 1] @ avcline 5378: {Test End: T10_06_VDDD_DC_LDO_Char}
*/
static int i_vec_iposition1[32] = {
31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,
48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63
};
for (int i = 0; i < 32; i++)
{
i_vec_Num1[i] = i_vec_iposition1[i];
}
FOR_EACH_SITE_BEGIN();
i_WRITE_BACK[curSite] = Switch_High_Low_Bits_16Bits(i_REG_VALUE[curSite]);
Func_Vector_Dynamic_Write(s_splited_pat_name[1], "SDX", i_vec_Num1, 32, i_WRITE_BACK[curSite], 0, 2); //Notes. TEI check per project
FOR_EACH_SITE_END();
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.func().label(s_splited_pat_name[1]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
FuncPrint("REG_VALUE", i_REG_VALUE[curSite]);
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
for(int i=0; i < 16; i++){
TestLog(s_Func_Test_Name_Add_2Num("V_DDD_DC_C_", i), V_DDD_DC_C[curSite][i]);
}
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T10_06_VDDD_DC_LDO_Char_R1", T10_06_VDDD_DC_LDO_Char_R1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/08/07 15:18:41 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_CONF', 0x0001) # Enable TB1
wac('TM_PIN', 0x0095) # Enable ANAIO1/2; TB1_OUT on ANAIO1; TB2_INP on ANAIO2
wac('TM_ADDR', 0x030d) # Enable power block on ATM; Connect VDDD_DS/VSS
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x000f) # Set masking register
ras('REG_VALUE', 'ANA_TRM_PMU') # Store the current value
for n in range (0, 16, 1):
cmt('Set trim index to value {} in range (0..15)'.format(n))
wr('ANA_TRM_PMU', n) # pc_trm_vref_dc
rac('ANA_TRM_PMU', n, 0x000f) # Check register setting
dly(100e-6)
gav('V_DDD_DS_C_RAW[{:02d}]'.format(n), 'INT2', 'ASDX')
calc('V_DDD_DS_C[{:02d}]'.format(n), 'V_DDD_DS_C_RAW[{:02d}]'.format(n), '-', 'V_OFF1_ECOFF')
log('V_DDD_DS_C[{:02d}]'.format(n))
dly(592e-9)
wri('ANA_TRM_PMU', 'REG_VALUE') # Write back the stored value
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* T10_07_VDDD_DS_LDO_Char_R1, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH: fix some bugs.
* JSH5SGH: pattern update to R1.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_07_VDDD_DS_LDO_Char_R1: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 2;
vector<int> i_comment_line[i_split_count];
static int i_REG_VALUE[xNSitES];
ARRAY_I aI_Captured_0;
static double d_V_DDD_DS_C_RAW[xNSitES][16];
static double V_DDD_DS_C[xNSitES][16];
ARRAY_D ad_V_DDD_DS_C_RAW;
static int i_WRITE_BACK[xNSitES];
static int i_vec_Num1[32] = {0};
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(i_REG_VALUE, 9, xNSitES);
//!"CTmsg: cut pattern to 2 parts @ oriAVCvecline [4531]
//!"CTmsg: cut pattern to 2 parts @ binarypatline [4521]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_07_VDDD_DS_LDO_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 20:34:28 GMT >}
valid comment[ 1] @ avcline 1162: {ras('REG_VALUE', 'ANA_TRM_PMU')}
valid comment[ 2] @ avcline 1275: {cmt: Set trim index to value 0 in range (0..15)}
valid comment[ 3] @ avcline 1477: {gav('V_DDD_DS_C_RAW[00]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 3] @ avcline 1477: {calc('V_DDD_DS_C[00]', 'V_DDD_DS_C_RAW[00]', '-', 'V_OFF1_ECOFF')}
valid comment[ 3] @ avcline 1477: {log('V_DDD_DS_C[00]', '', '', 0, 0)}
valid comment[ 4] @ avcline 1478: {cmt: Set trim index to value 1 in range (0..15)}
valid comment[ 5] @ avcline 1680: {gav('V_DDD_DS_C_RAW[01]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 5] @ avcline 1680: {calc('V_DDD_DS_C[01]', 'V_DDD_DS_C_RAW[01]', '-', 'V_OFF1_ECOFF')}
valid comment[ 5] @ avcline 1680: {log('V_DDD_DS_C[01]', '', '', 0, 0)}
valid comment[ 6] @ avcline 1681: {cmt: Set trim index to value 2 in range (0..15)}
valid comment[ 7] @ avcline 1883: {gav('V_DDD_DS_C_RAW[02]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 7] @ avcline 1883: {calc('V_DDD_DS_C[02]', 'V_DDD_DS_C_RAW[02]', '-', 'V_OFF1_ECOFF')}
valid comment[ 7] @ avcline 1883: {log('V_DDD_DS_C[02]', '', '', 0, 0)}
valid comment[ 8] @ avcline 1884: {cmt: Set trim index to value 3 in range (0..15)}
valid comment[ 9] @ avcline 2086: {gav('V_DDD_DS_C_RAW[03]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 9] @ avcline 2086: {calc('V_DDD_DS_C[03]', 'V_DDD_DS_C_RAW[03]', '-', 'V_OFF1_ECOFF')}
valid comment[ 9] @ avcline 2086: {log('V_DDD_DS_C[03]', '', '', 0, 0)}
valid comment[ 10] @ avcline 2087: {cmt: Set trim index to value 4 in range (0..15)}
valid comment[ 11] @ avcline 2289: {gav('V_DDD_DS_C_RAW[04]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 11] @ avcline 2289: {calc('V_DDD_DS_C[04]', 'V_DDD_DS_C_RAW[04]', '-', 'V_OFF1_ECOFF')}
valid comment[ 11] @ avcline 2289: {log('V_DDD_DS_C[04]', '', '', 0, 0)}
valid comment[ 12] @ avcline 2290: {cmt: Set trim index to value 5 in range (0..15)}
valid comment[ 13] @ avcline 2492: {gav('V_DDD_DS_C_RAW[05]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 13] @ avcline 2492: {calc('V_DDD_DS_C[05]', 'V_DDD_DS_C_RAW[05]', '-', 'V_OFF1_ECOFF')}
valid comment[ 13] @ avcline 2492: {log('V_DDD_DS_C[05]', '', '', 0, 0)}
valid comment[ 14] @ avcline 2493: {cmt: Set trim index to value 6 in range (0..15)}
valid comment[ 15] @ avcline 2695: {gav('V_DDD_DS_C_RAW[06]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 15] @ avcline 2695: {calc('V_DDD_DS_C[06]', 'V_DDD_DS_C_RAW[06]', '-', 'V_OFF1_ECOFF')}
valid comment[ 15] @ avcline 2695: {log('V_DDD_DS_C[06]', '', '', 0, 0)}
valid comment[ 16] @ avcline 2696: {cmt: Set trim index to value 7 in range (0..15)}
valid comment[ 17] @ avcline 2898: {gav('V_DDD_DS_C_RAW[07]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 17] @ avcline 2898: {calc('V_DDD_DS_C[07]', 'V_DDD_DS_C_RAW[07]', '-', 'V_OFF1_ECOFF')}
valid comment[ 17] @ avcline 2898: {log('V_DDD_DS_C[07]', '', '', 0, 0)}
valid comment[ 18] @ avcline 2899: {cmt: Set trim index to value 8 in range (0..15)}
valid comment[ 19] @ avcline 3101: {gav('V_DDD_DS_C_RAW[08]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 19] @ avcline 3101: {calc('V_DDD_DS_C[08]', 'V_DDD_DS_C_RAW[08]', '-', 'V_OFF1_ECOFF')}
valid comment[ 19] @ avcline 3101: {log('V_DDD_DS_C[08]', '', '', 0, 0)}
valid comment[ 20] @ avcline 3102: {cmt: Set trim index to value 9 in range (0..15)}
valid comment[ 21] @ avcline 3304: {gav('V_DDD_DS_C_RAW[09]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 21] @ avcline 3304: {calc('V_DDD_DS_C[09]', 'V_DDD_DS_C_RAW[09]', '-', 'V_OFF1_ECOFF')}
valid comment[ 21] @ avcline 3304: {log('V_DDD_DS_C[09]', '', '', 0, 0)}
valid comment[ 22] @ avcline 3305: {cmt: Set trim index to value 10 in range (0..15)}
valid comment[ 23] @ avcline 3507: {gav('V_DDD_DS_C_RAW[10]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 23] @ avcline 3507: {calc('V_DDD_DS_C[10]', 'V_DDD_DS_C_RAW[10]', '-', 'V_OFF1_ECOFF')}
valid comment[ 23] @ avcline 3507: {log('V_DDD_DS_C[10]', '', '', 0, 0)}
valid comment[ 24] @ avcline 3508: {cmt: Set trim index to value 11 in range (0..15)}
valid comment[ 25] @ avcline 3710: {gav('V_DDD_DS_C_RAW[11]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 25] @ avcline 3710: {calc('V_DDD_DS_C[11]', 'V_DDD_DS_C_RAW[11]', '-', 'V_OFF1_ECOFF')}
valid comment[ 25] @ avcline 3710: {log('V_DDD_DS_C[11]', '', '', 0, 0)}
valid comment[ 26] @ avcline 3711: {cmt: Set trim index to value 12 in range (0..15)}
valid comment[ 27] @ avcline 3913: {gav('V_DDD_DS_C_RAW[12]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 27] @ avcline 3913: {calc('V_DDD_DS_C[12]', 'V_DDD_DS_C_RAW[12]', '-', 'V_OFF1_ECOFF')}
valid comment[ 27] @ avcline 3913: {log('V_DDD_DS_C[12]', '', '', 0, 0)}
valid comment[ 28] @ avcline 3914: {cmt: Set trim index to value 13 in range (0..15)}
valid comment[ 29] @ avcline 4116: {gav('V_DDD_DS_C_RAW[13]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 29] @ avcline 4116: {calc('V_DDD_DS_C[13]', 'V_DDD_DS_C_RAW[13]', '-', 'V_OFF1_ECOFF')}
valid comment[ 29] @ avcline 4116: {log('V_DDD_DS_C[13]', '', '', 0, 0)}
valid comment[ 30] @ avcline 4117: {cmt: Set trim index to value 14 in range (0..15)}
valid comment[ 31] @ avcline 4319: {gav('V_DDD_DS_C_RAW[14]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 31] @ avcline 4319: {calc('V_DDD_DS_C[14]', 'V_DDD_DS_C_RAW[14]', '-', 'V_OFF1_ECOFF')}
valid comment[ 31] @ avcline 4319: {log('V_DDD_DS_C[14]', '', '', 0, 0)}
valid comment[ 32] @ avcline 4320: {cmt: Set trim index to value 15 in range (0..15)}
valid comment[ 33] @ avcline 4522: {gav('V_DDD_DS_C_RAW[15]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 33] @ avcline 4522: {calc('V_DDD_DS_C[15]', 'V_DDD_DS_C_RAW[15]', '-', 'V_OFF1_ECOFF')}
valid comment[ 33] @ avcline 4522: {log('V_DDD_DS_C[15]', '', '', 0, 0)}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.digCap("digcapid_0").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(1*16).execute();
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][3]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_C_RAW_00//{gav('V_DDD_DS_C_RAW[00]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][5]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_C_RAW_01//{gav('V_DDD_DS_C_RAW[01]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][7]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_C_RAW_02//{gav('V_DDD_DS_C_RAW[02]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][9]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_C_RAW_03//{gav('V_DDD_DS_C_RAW[03]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][11]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_C_RAW_04//{gav('V_DDD_DS_C_RAW[04]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][13]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_C_RAW_05//{gav('V_DDD_DS_C_RAW[05]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][15]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_C_RAW_06//{gav('V_DDD_DS_C_RAW[06]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][17]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_C_RAW_07//{gav('V_DDD_DS_C_RAW[07]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][19]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_C_RAW_08//{gav('V_DDD_DS_C_RAW[08]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][21]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_C_RAW_09//{gav('V_DDD_DS_C_RAW[09]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][23]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_C_RAW_10//{gav('V_DDD_DS_C_RAW[10]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][25]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_C_RAW_11//{gav('V_DDD_DS_C_RAW[11]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][27]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_C_RAW_12//{gav('V_DDD_DS_C_RAW[12]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][29]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_C_RAW_13//{gav('V_DDD_DS_C_RAW[13]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][31]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_C_RAW_14//{gav('V_DDD_DS_C_RAW[14]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][33]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_DDD_DS_C_RAW_15//{gav('V_DDD_DS_C_RAW[15]', 'INT2', 'ASDX', 2, 0.0001, True)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(16); ad_jsubresults_INT2.init(-9.9);
ARRAY_D ad_jsubresults_ASDX; ad_jsubresults_ASDX.resize(16); ad_jsubresults_ASDX.init(-9.9);
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
ad_jsubresults_ASDX = rdi.id("dcid_0").getMultiValue("ASDX");
aI_Captured_0[0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[0]);
i_REG_VALUE[curSite] = aI_Captured_0[0];
FuncPrint("REG_VALUE",i_REG_VALUE[curSite]);
for(int i=0; i<16; i++){
d_V_DDD_DS_C_RAW[curSite][i] = ad_jsubresults_INT2[0 + i] - ad_jsubresults_ASDX[0 + i];
FuncPrint("V_DDD_DS_C_RAW_" + rdi.itos(curSite) + "_"+ rdi.itos(i) ,d_V_DDD_DS_C_RAW[curSite][i]);
V_DDD_DS_C[curSite][i] = d_V_DDD_DS_C_RAW[curSite][i] - V_OFF1_ECOFF[curSite];
FuncPrint("V_DDD_DS_C_"+ rdi.itos(i) ,V_DDD_DS_C[curSite][i]);
}
//Add calc code if necessary
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 4531: {wri('ANA_TRM_PMU', 'REG_VALUE')}
valid comment[ 1] @ avcline 5378: {Test End: T10_07_VDDD_DS_LDO_Char}
*/
static int i_vec_iposition1[32] = {
31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,
48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63
};
for (int i = 0; i < 32; i++)
{
i_vec_Num1[i] = i_vec_iposition1[i];
}
FOR_EACH_SITE_BEGIN();
i_WRITE_BACK[curSite] = Switch_High_Low_Bits_16Bits(i_REG_VALUE[curSite]);
Func_Vector_Dynamic_Write(s_splited_pat_name[1], "SDX", i_vec_Num1, 32, i_WRITE_BACK[curSite], 0, 2); //Notes. TEI check per project
FOR_EACH_SITE_END();
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.func().label(s_splited_pat_name[1]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
for(int i=0; i < 16; i++){
TestLog(s_Func_Test_Name_Add_2Num("V_DDD_DS_C_", i), V_DDD_DS_C[curSite][i]);
}
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T10_07_VDDD_DS_LDO_Char_R1", T10_07_VDDD_DS_LDO_Char_R1);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: ACC bandgap trimming
# - VSS_A to ANAIO1, VERF_AA to ANAIO2 with buffer 2 enabled only
#############################################################################################################
from test_sub_functions import *
cmt('Version info: $Revision: 4 $ $Author: hmf1rt $ $Date: 2024/04/19 15:13:09 GMT $')
# Config Buffer, TM_CONF
wac('EXT_MODE', 0xc00f) # Page Test, Reg TM_CONF
wcb('tm_buf_pwrup',0x1) # Enable TB1 only
wcb('tm_bus_inv',0x1) # Invert tset bus
# Config ANAIO pad, TM_PIN
wcb('tm_int2_en',0x1)
wcb('tm_int2_sel',0x2) # TB1OUT on anaio1
wcb('tm_asdx_en',0x1)
wcb('tm_asdx_sel',0x4) # TB2IN on anaio2
# Config CTB_P/N, TM_ADDR
wcb('tm_cfg', 0x6) # CTB_P is VSS_A, CTP_N is VREF_AA
wcb('tm_addr', 0xe)
# Trim loop
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x01f0) # Set masking register
for n in range (0, 32, 1):
cmt('Set trim index to value {} in range (0..31)'.format(n))
wr('ANA_TRM_BG', n*16) # ANA_TRM_BG<8:4> pc_trm_bgp_vra
rac('ANA_TRM_BG', n*16, 0x01f0)
uclk('ASCX')
bw('ASCX', 1)
dly(1352*74e-9)
gav('V_VBG_ACC_RAW[{:02d}]'.format(n), 'INT2', 'ASDX')
calc('V_VBG_ACC[{:02d}]'.format(n), 'V_VBG_ACC_RAW[{:02d}]'.format(n), '-', 'V_OFF1_ECON')
log(f'V_VBG_ACC[{n:02}]')
ubw('ASCX')
clk('ASCX', 1/148e-9)
oti('N_OPT_VBG_ACC', 'V_VBG_ACC', 0.75) # Select optimum trim index
log('N_OPT_VBG_ACC')
otv('V_OPT_VBG_ACC', 'V_VBG_ACC', 0.75) # Select optimum trim value
log('V_OPT_VBG_ACC')
calc('N_ANA_TRM_BG_WR','N_OPT_VBG_ACC','<<',4)
wri('ANA_TRM_BG','N_ANA_TRM_BG_WR')
ras('N_ANA_TRM_BG_RD','ANA_TRM_BG')
calc('N_ANA_TRM_BG_RD_8_4','N_ANA_TRM_BG_RD','&',0x01f0)
calc('N_OPT_VBG_ACC_RD','N_ANA_TRM_BG_RD_8_4','>>',4)
log('N_OPT_VBG_ACC_RD')
cmt('The test item is a functional fail if N_OPT_VBG_ACC_RD != N_OPT_VBG_ACC')
# Clean
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_11_acc_bandgap_trimming_V4: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
INT split_pat_flag;
GET_USER_FLAG("split_pat_flag", &split_pat_flag);
vector<string> s_splited_pat_name;
const int split_count = 2; // Alarm:: split_count need manual confirm.
s_splited_pat_name.resize(split_count);
vector<int> i_comment_line[split_count];
static int N_OPT_VBG_ACC[xNSitES];
static double V_OPT_VBG_ACC[xNSitES];
static int N_ANA_TRM_BG_RD[xNSitES];
static double V_VBG_ACC_RAW[xNSitES][32];
static double V_VBG_ACC[xNSitES][32];
static int N_ANA_TRM_BG_WR[xNSitES], N_ANA_TRM_BG_RD_8_4[xNSitES], N_OPT_VBG_ACC_RD[xNSitES];
ARRAY_LL N_ANA_TRM_BG_WR_rtv(xNSitES);
const int Wri_Bit_Length = 33;
const int Wri_Bit_Position = 31;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
cout.precision(3);
rdi.enableOre(oreFlag);
rdi.oreFile("./ORE_Files/rdi_ore_T10_11_ACC_BANDGAP_TRIMMING.xml");
GET_TESTSUITE_NAME(test_name);
if (split_pat_flag)
{
split_pattern(s_label_name,"wri",split_pat_flag,s_splited_pat_name);
}
else
{
for (int i = 0; i<split_count; i++)
{
s_splited_pat_name[i] = s_label_name + "_part" + rdi.itos(i);
i_comment_line[i] = search_comment_line(s_splited_pat_name[i]);
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
RDI_BEGIN(mode);
rdi.burstId("T10_11_acc_bandgap_trimming_V4_PAT_id0");
for (int i=0; i<32; i++)
{
rdi.dc("T10_11_acc_bandgap_trimming_V4DC_id0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][i]).pin("INT2,ASDX",TA::BADC).vMeas().average(128).measWait(1 ms).cont(); //V_VBG_ACC_RAW[i]
}
rdi.dc("T10_11_acc_bandgap_trimming_V4DC_id0").execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
ARRAY_D JSUB_results_ASDX;
JSUB_results_ASDX = rdi.id("T10_11_acc_bandgap_trimming_V4DC_id0").getMultiValue("ASDX");
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T10_11_acc_bandgap_trimming_V4DC_id0").getMultiValue("INT2");
for (int i = 0; i<32; i++)
{
V_VBG_ACC_RAW[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_INT2[i] - JSUB_results_ASDX[i];
V_VBG_ACC[CURRENT_SITE_NUMBER()-1][i] = V_VBG_ACC_RAW[CURRENT_SITE_NUMBER()-1][i] - V_OFF1_ECON[CURRENT_SITE_NUMBER()-1];
}
for (int i = 0; i<32; i++)
{
FuncPrint("V_VBG_ACC_RAW_"+rdi.itos(i), V_VBG_ACC_RAW[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i = 0; i<32; i++)
{
FuncPrint("V_VBG_ACC_"+rdi.itos(i), V_VBG_ACC[CURRENT_SITE_NUMBER()-1][i]);
}
N_OPT_VBG_ACC[CURRENT_SITE_NUMBER()-1] = i_Func_Optimal_Trim_Val(V_VBG_ACC[CURRENT_SITE_NUMBER()-1], Target_T1011, 32);
V_OPT_VBG_ACC[CURRENT_SITE_NUMBER()-1] = V_VBG_ACC[CURRENT_SITE_NUMBER()-1][N_OPT_VBG_ACC[CURRENT_SITE_NUMBER()-1]];
N_ANA_TRM_BG_WR[CURRENT_SITE_NUMBER()-1] = N_OPT_VBG_ACC[CURRENT_SITE_NUMBER()-1] << 4;
FuncPrint("N_OPT_VBG_ACC", N_OPT_VBG_ACC[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_OPT_VBG_ACC", V_OPT_VBG_ACC[CURRENT_SITE_NUMBER()-1]);
FuncPrint("N_ANA_TRM_BG_WR", N_ANA_TRM_BG_WR[CURRENT_SITE_NUMBER()-1]);
N_ANA_TRM_BG_WR_rtv[CURRENT_SITE_NUMBER()-1] = extend_Pmode_Herschel(N_ANA_TRM_BG_WR[CURRENT_SITE_NUMBER()-1], 2);
FuncPrint("N_ANA_TRM_BG_WR_rtv", N_ANA_TRM_BG_WR_rtv[CURRENT_SITE_NUMBER()-1]);
FOR_EACH_SITE_END();
rdi.runTimeVal("N_ANA_TRM_BG_WR_rtv", N_ANA_TRM_BG_WR_rtv);
RDI_BEGIN(mode);
rdi.burstId("T10_11_acc_bandgap_trimming_V4_PAT_id1");
rdi.digCap("T10_11_acc_bandgap_trimming_V4_Digcap_id").vecVarOnly().pin("SDO").capMode(TA::SER).samples(16*1).bitPerWord(16).execute();
rdi.smartVec().label(s_splited_pat_name[1]).pin("SDX").writeData("N_ANA_TRM_BG_WR_rtv", Wri_Bit_Length, Wri_Bit_Position).execute();
RDI_END();
}
ON_FIRST_INVOCATION_END();
ARRAY_I Vec=rdi.id("T10_11_acc_bandgap_trimming_V4_Digcap_id").getVector();
N_ANA_TRM_BG_RD[CURRENT_SITE_NUMBER()-1] = reverse_ras_result(Vec[0]);
N_ANA_TRM_BG_RD_8_4[CURRENT_SITE_NUMBER()-1] = N_ANA_TRM_BG_RD[CURRENT_SITE_NUMBER()-1] & 0x01f0;
N_OPT_VBG_ACC_RD[CURRENT_SITE_NUMBER()-1] = N_ANA_TRM_BG_RD_8_4[CURRENT_SITE_NUMBER()-1] >> 4;
//
int Func_result0 = rdi.id("T10_11_acc_bandgap_trimming_V4_PAT_id0").getBurstPassFail();
int Func_result1 = rdi.id("T10_11_acc_bandgap_trimming_V4_PAT_id1").getBurstPassFail();
FuncPrint("Func_result0", Func_result0);
FuncPrint("Func_result1", Func_result1);
int Func_result = 1 * Func_result0 * Func_result1;
if ((N_OPT_VBG_ACC_RD[CURRENT_SITE_NUMBER()-1] & 0x1F) != N_OPT_VBG_ACC[CURRENT_SITE_NUMBER()-1]) Func_result=99;
FuncPrint("N_OPT_VBG_ACC_RD", N_OPT_VBG_ACC_RD[CURRENT_SITE_NUMBER()-1]& 0x1F);
FuncPrint("N_OPT_VBG_ACC", N_OPT_VBG_ACC[CURRENT_SITE_NUMBER()-1]);
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
for (int i = 0; i<10; i++)
{
TestLog("V_VBG_ACC_0"+rdi.itos(i), V_VBG_ACC[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i = 10; i<32; i++)
{
TestLog("V_VBG_ACC_"+rdi.itos(i), V_VBG_ACC[CURRENT_SITE_NUMBER()-1][i]);
}
TestLog("V_OPT_VBG_ACC", V_OPT_VBG_ACC[CURRENT_SITE_NUMBER()-1]);
TestLog("N_OPT_VBG_ACC_RD", N_OPT_VBG_ACC_RD[CURRENT_SITE_NUMBER()-1]);
TestLog("N_OPT_VBG_ACC", N_OPT_VBG_ACC[CURRENT_SITE_NUMBER()-1]);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_11_acc_bandgap_trimming_V4", T10_11_acc_bandgap_trimming_V4);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_CONF', 0x0011) # tm_se_meas=0 tm_bus_inv=1 tm_buf_pwrup=1 (tbuf_tb1_on)
# bus_inv. because the power_ana_test_multiplexor_refs provides VSS_A/VREF_AA
wac('TM_PIN', 0x0095) # tm_asdx_sel=4 (BUF2_INP) tm_asdx_en=1 tm_int2_sel=2 (BUF1_OUT) tm_int2_en=1
wac('TM_ADDR', 0x060e) # tm_cfg=6 (COM_TB2= VREF_AA, COM_TB1= VSS_A) tm_addr=e (tm_bus_sel=tm_addr(3:2)=3 (COM_TION/P) COM_TIO_REF;
# enable the power_ana_test_multiplexor); any tm_addr value except off/0 enables the test module
dly(100e-6)
gav('V_VBG_ACC_M_RAW', 'INT2', 'ASDX')
calc('V_VBG_ACC_M', 'V_VBG_ACC_M_RAW', '-', 'V_OFF1_ECOFF')
log('V_VBG_ACC_M')
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* T10_12_ACC_bandgap_measurement_V2, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_12_ACC_bandgap_measurement_V2: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static double d_V_VBG_ACC_M_RAW[xNSitES],d_V_VBG_ACC_M[xNSitES];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(d_V_VBG_ACC_M_RAW, 9.9, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_12_ACC_bandgap_measurement}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 20:34:28 GMT >}
valid comment[ 1] @ avcline 788: {gav('V_VBG_ACC_M_RAW', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 1] @ avcline 788: {calc('V_VBG_ACC_M', 'V_VBG_ACC_M_RAW', '-', 'V_OFF1_ECOFF')}
valid comment[ 1] @ avcline 788: {log('V_VBG_ACC_M', '', '', 0, 0)}
valid comment[ 2] @ avcline 1365: {Test End: T10_12_ACC_bandgap_measurement}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][1]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_M_RAW//{gav('V_VBG_ACC_M_RAW', 'INT2', 'ASDX', 2, 0.0001, True)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(1); ad_jsubresults_INT2.init(-9.9);
ARRAY_D ad_jsubresults_ASDX; ad_jsubresults_ASDX.resize(1); ad_jsubresults_ASDX.init(-9.9);
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
ad_jsubresults_ASDX = rdi.id("dcid_0").getMultiValue("ASDX");
d_V_VBG_ACC_M_RAW[curSite] = ad_jsubresults_INT2[0] - ad_jsubresults_ASDX[0];
d_V_VBG_ACC_M[curSite] = d_V_VBG_ACC_M_RAW[curSite] - V_OFF1_ECOFF[curSite];
FuncPrint("ad_jsubresults_INT2", ad_jsubresults_INT2[0]);
FuncPrint("ad_jsubresults_ASDX", ad_jsubresults_ASDX[0]);
FuncPrint("d_V_VBG_ACC_M_RAW",d_V_VBG_ACC_M_RAW[curSite]);
FuncPrint("V_VBG_ACC_M",d_V_VBG_ACC_M[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("burst_id0").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("V_VBG_ACC_M", d_V_VBG_ACC_M[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_12_ACC_bandgap_measurement_V2", T10_12_ACC_bandgap_measurement_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: ACC bandgap characterization
# Characterization loop derived from T10_11_acc_bandgap_trimming
# - VSS_A to ANAIO2, VREF_AA to ANAIO1 with buffer 1 enabled only
#############################################################################################################
from test_sub_functions import *
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_CONF', 0x0011) # tm_se_meas=0 tm_bus_inv=1 tm_buf_pwrup=1 (tbuf_tb1_on)
# bus_inv. because the power_ana_test_multiplexor_refs provides VSS_A/VREF_AA
wac('TM_PIN', 0x0095) # tm_asdx_sel=4 (BUF2_INP) tm_asdx_en=1 tm_int2_sel=2 (BUF1_OUT) tm_int2_en=1
wac('TM_ADDR', 0x060e) # tm_cfg=6 (COM_TB2= VREF_AA, COM_TB1= VSS_A) tm_addr=e (tm_bus_sel=tm_addr(3:2)=3 (COM_TION/P) COM_TIO_REF;
# enable the power_ana_test_multiplexor); any tm_addr value except off/0 enables the test module
# Characterization loop
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x01f0) # Set masking register
ras('REG_VALUE', 'ANA_TRM_BG') # Store the current value
for n in range (0, 32, 1):
cmt('Set trim index to value {} in range (0..31)'.format(n))
wr('ANA_TRM_BG', n*16) # ANA_TRM_BG<8:4> pc_trm_bgp_vra
rac('ANA_TRM_BG', n*16, 0x01f0)
dly(100e-6)
gav('V_VBG_ACC_C_RAW[{:02d}]'.format(n), 'INT2', 'ASDX')
calc('V_VBG_ACC_C[{:02d}]'.format(n), 'V_VBG_ACC_C_RAW[{:02d}]'.format(n), '-', 'V_OFF1_ECOFF')
log(f'V_VBG_ACC_C[{n:02}]')
dly(592e-9)
wri('ANA_TRM_BG','REG_VALUE')
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Clean
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* T10_13_ACC_Bandgap_Char_V2, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH: fix some bugs.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_13_ACC_Bandgap_Char_V2: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 2;
vector<int> i_comment_line[i_split_count];
static int i_REG_VALUE[xNSitES];
ARRAY_I aI_Captured_0;
static double d_V_VBG_ACC_C_RAW[xNSitES][32];
static double V_VBG_ACC_C[xNSitES][32];
ARRAY_D ad_V_VBG_ACC_C_RAW;
static int i_WRITE_BACK[xNSitES];
static int i_vec_Num1[32] = {0};
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(i_REG_VALUE, 9, xNSitES);
//!"CTmsg: cut pattern to 2 parts @ oriAVCvecline [7779]
//!"CTmsg: cut pattern to 2 parts @ binarypatline [7769]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_13_ACC_Bandgap_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 20:34:28 GMT >}
valid comment[ 1] @ avcline 1162: {ras('REG_VALUE', 'ANA_TRM_BG')}
valid comment[ 2] @ avcline 1275: {cmt: Set trim index to value 0 in range (0..31)}
valid comment[ 3] @ avcline 1477: {gav('V_VBG_ACC_C_RAW[00]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 3] @ avcline 1477: {calc('V_VBG_ACC_C[00]', 'V_VBG_ACC_C_RAW[00]', '-', 'V_OFF1_ECOFF')}
valid comment[ 3] @ avcline 1477: {log('V_VBG_ACC_C[00]', '', '', 0, 0)}
valid comment[ 4] @ avcline 1478: {cmt: Set trim index to value 1 in range (0..31)}
valid comment[ 5] @ avcline 1680: {gav('V_VBG_ACC_C_RAW[01]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 5] @ avcline 1680: {calc('V_VBG_ACC_C[01]', 'V_VBG_ACC_C_RAW[01]', '-', 'V_OFF1_ECOFF')}
valid comment[ 5] @ avcline 1680: {log('V_VBG_ACC_C[01]', '', '', 0, 0)}
valid comment[ 6] @ avcline 1681: {cmt: Set trim index to value 2 in range (0..31)}
valid comment[ 7] @ avcline 1883: {gav('V_VBG_ACC_C_RAW[02]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 7] @ avcline 1883: {calc('V_VBG_ACC_C[02]', 'V_VBG_ACC_C_RAW[02]', '-', 'V_OFF1_ECOFF')}
valid comment[ 7] @ avcline 1883: {log('V_VBG_ACC_C[02]', '', '', 0, 0)}
valid comment[ 8] @ avcline 1884: {cmt: Set trim index to value 3 in range (0..31)}
valid comment[ 9] @ avcline 2086: {gav('V_VBG_ACC_C_RAW[03]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 9] @ avcline 2086: {calc('V_VBG_ACC_C[03]', 'V_VBG_ACC_C_RAW[03]', '-', 'V_OFF1_ECOFF')}
valid comment[ 9] @ avcline 2086: {log('V_VBG_ACC_C[03]', '', '', 0, 0)}
valid comment[ 10] @ avcline 2087: {cmt: Set trim index to value 4 in range (0..31)}
valid comment[ 11] @ avcline 2289: {gav('V_VBG_ACC_C_RAW[04]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 11] @ avcline 2289: {calc('V_VBG_ACC_C[04]', 'V_VBG_ACC_C_RAW[04]', '-', 'V_OFF1_ECOFF')}
valid comment[ 11] @ avcline 2289: {log('V_VBG_ACC_C[04]', '', '', 0, 0)}
valid comment[ 12] @ avcline 2290: {cmt: Set trim index to value 5 in range (0..31)}
valid comment[ 13] @ avcline 2492: {gav('V_VBG_ACC_C_RAW[05]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 13] @ avcline 2492: {calc('V_VBG_ACC_C[05]', 'V_VBG_ACC_C_RAW[05]', '-', 'V_OFF1_ECOFF')}
valid comment[ 13] @ avcline 2492: {log('V_VBG_ACC_C[05]', '', '', 0, 0)}
valid comment[ 14] @ avcline 2493: {cmt: Set trim index to value 6 in range (0..31)}
valid comment[ 15] @ avcline 2695: {gav('V_VBG_ACC_C_RAW[06]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 15] @ avcline 2695: {calc('V_VBG_ACC_C[06]', 'V_VBG_ACC_C_RAW[06]', '-', 'V_OFF1_ECOFF')}
valid comment[ 15] @ avcline 2695: {log('V_VBG_ACC_C[06]', '', '', 0, 0)}
valid comment[ 16] @ avcline 2696: {cmt: Set trim index to value 7 in range (0..31)}
valid comment[ 17] @ avcline 2898: {gav('V_VBG_ACC_C_RAW[07]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 17] @ avcline 2898: {calc('V_VBG_ACC_C[07]', 'V_VBG_ACC_C_RAW[07]', '-', 'V_OFF1_ECOFF')}
valid comment[ 17] @ avcline 2898: {log('V_VBG_ACC_C[07]', '', '', 0, 0)}
valid comment[ 18] @ avcline 2899: {cmt: Set trim index to value 8 in range (0..31)}
valid comment[ 19] @ avcline 3101: {gav('V_VBG_ACC_C_RAW[08]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 19] @ avcline 3101: {calc('V_VBG_ACC_C[08]', 'V_VBG_ACC_C_RAW[08]', '-', 'V_OFF1_ECOFF')}
valid comment[ 19] @ avcline 3101: {log('V_VBG_ACC_C[08]', '', '', 0, 0)}
valid comment[ 20] @ avcline 3102: {cmt: Set trim index to value 9 in range (0..31)}
valid comment[ 21] @ avcline 3304: {gav('V_VBG_ACC_C_RAW[09]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 21] @ avcline 3304: {calc('V_VBG_ACC_C[09]', 'V_VBG_ACC_C_RAW[09]', '-', 'V_OFF1_ECOFF')}
valid comment[ 21] @ avcline 3304: {log('V_VBG_ACC_C[09]', '', '', 0, 0)}
valid comment[ 22] @ avcline 3305: {cmt: Set trim index to value 10 in range (0..31)}
valid comment[ 23] @ avcline 3507: {gav('V_VBG_ACC_C_RAW[10]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 23] @ avcline 3507: {calc('V_VBG_ACC_C[10]', 'V_VBG_ACC_C_RAW[10]', '-', 'V_OFF1_ECOFF')}
valid comment[ 23] @ avcline 3507: {log('V_VBG_ACC_C[10]', '', '', 0, 0)}
valid comment[ 24] @ avcline 3508: {cmt: Set trim index to value 11 in range (0..31)}
valid comment[ 25] @ avcline 3710: {gav('V_VBG_ACC_C_RAW[11]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 25] @ avcline 3710: {calc('V_VBG_ACC_C[11]', 'V_VBG_ACC_C_RAW[11]', '-', 'V_OFF1_ECOFF')}
valid comment[ 25] @ avcline 3710: {log('V_VBG_ACC_C[11]', '', '', 0, 0)}
valid comment[ 26] @ avcline 3711: {cmt: Set trim index to value 12 in range (0..31)}
valid comment[ 27] @ avcline 3913: {gav('V_VBG_ACC_C_RAW[12]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 27] @ avcline 3913: {calc('V_VBG_ACC_C[12]', 'V_VBG_ACC_C_RAW[12]', '-', 'V_OFF1_ECOFF')}
valid comment[ 27] @ avcline 3913: {log('V_VBG_ACC_C[12]', '', '', 0, 0)}
valid comment[ 28] @ avcline 3914: {cmt: Set trim index to value 13 in range (0..31)}
valid comment[ 29] @ avcline 4116: {gav('V_VBG_ACC_C_RAW[13]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 29] @ avcline 4116: {calc('V_VBG_ACC_C[13]', 'V_VBG_ACC_C_RAW[13]', '-', 'V_OFF1_ECOFF')}
valid comment[ 29] @ avcline 4116: {log('V_VBG_ACC_C[13]', '', '', 0, 0)}
valid comment[ 30] @ avcline 4117: {cmt: Set trim index to value 14 in range (0..31)}
valid comment[ 31] @ avcline 4319: {gav('V_VBG_ACC_C_RAW[14]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 31] @ avcline 4319: {calc('V_VBG_ACC_C[14]', 'V_VBG_ACC_C_RAW[14]', '-', 'V_OFF1_ECOFF')}
valid comment[ 31] @ avcline 4319: {log('V_VBG_ACC_C[14]', '', '', 0, 0)}
valid comment[ 32] @ avcline 4320: {cmt: Set trim index to value 15 in range (0..31)}
valid comment[ 33] @ avcline 4522: {gav('V_VBG_ACC_C_RAW[15]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 33] @ avcline 4522: {calc('V_VBG_ACC_C[15]', 'V_VBG_ACC_C_RAW[15]', '-', 'V_OFF1_ECOFF')}
valid comment[ 33] @ avcline 4522: {log('V_VBG_ACC_C[15]', '', '', 0, 0)}
valid comment[ 34] @ avcline 4523: {cmt: Set trim index to value 16 in range (0..31)}
valid comment[ 35] @ avcline 4725: {gav('V_VBG_ACC_C_RAW[16]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 35] @ avcline 4725: {calc('V_VBG_ACC_C[16]', 'V_VBG_ACC_C_RAW[16]', '-', 'V_OFF1_ECOFF')}
valid comment[ 35] @ avcline 4725: {log('V_VBG_ACC_C[16]', '', '', 0, 0)}
valid comment[ 36] @ avcline 4726: {cmt: Set trim index to value 17 in range (0..31)}
valid comment[ 37] @ avcline 4928: {gav('V_VBG_ACC_C_RAW[17]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 37] @ avcline 4928: {calc('V_VBG_ACC_C[17]', 'V_VBG_ACC_C_RAW[17]', '-', 'V_OFF1_ECOFF')}
valid comment[ 37] @ avcline 4928: {log('V_VBG_ACC_C[17]', '', '', 0, 0)}
valid comment[ 38] @ avcline 4929: {cmt: Set trim index to value 18 in range (0..31)}
valid comment[ 39] @ avcline 5131: {gav('V_VBG_ACC_C_RAW[18]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 39] @ avcline 5131: {calc('V_VBG_ACC_C[18]', 'V_VBG_ACC_C_RAW[18]', '-', 'V_OFF1_ECOFF')}
valid comment[ 39] @ avcline 5131: {log('V_VBG_ACC_C[18]', '', '', 0, 0)}
valid comment[ 40] @ avcline 5132: {cmt: Set trim index to value 19 in range (0..31)}
valid comment[ 41] @ avcline 5334: {gav('V_VBG_ACC_C_RAW[19]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 41] @ avcline 5334: {calc('V_VBG_ACC_C[19]', 'V_VBG_ACC_C_RAW[19]', '-', 'V_OFF1_ECOFF')}
valid comment[ 41] @ avcline 5334: {log('V_VBG_ACC_C[19]', '', '', 0, 0)}
valid comment[ 42] @ avcline 5335: {cmt: Set trim index to value 20 in range (0..31)}
valid comment[ 43] @ avcline 5537: {gav('V_VBG_ACC_C_RAW[20]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 43] @ avcline 5537: {calc('V_VBG_ACC_C[20]', 'V_VBG_ACC_C_RAW[20]', '-', 'V_OFF1_ECOFF')}
valid comment[ 43] @ avcline 5537: {log('V_VBG_ACC_C[20]', '', '', 0, 0)}
valid comment[ 44] @ avcline 5538: {cmt: Set trim index to value 21 in range (0..31)}
valid comment[ 45] @ avcline 5740: {gav('V_VBG_ACC_C_RAW[21]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 45] @ avcline 5740: {calc('V_VBG_ACC_C[21]', 'V_VBG_ACC_C_RAW[21]', '-', 'V_OFF1_ECOFF')}
valid comment[ 45] @ avcline 5740: {log('V_VBG_ACC_C[21]', '', '', 0, 0)}
valid comment[ 46] @ avcline 5741: {cmt: Set trim index to value 22 in range (0..31)}
valid comment[ 47] @ avcline 5943: {gav('V_VBG_ACC_C_RAW[22]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 47] @ avcline 5943: {calc('V_VBG_ACC_C[22]', 'V_VBG_ACC_C_RAW[22]', '-', 'V_OFF1_ECOFF')}
valid comment[ 47] @ avcline 5943: {log('V_VBG_ACC_C[22]', '', '', 0, 0)}
valid comment[ 48] @ avcline 5944: {cmt: Set trim index to value 23 in range (0..31)}
valid comment[ 49] @ avcline 6146: {gav('V_VBG_ACC_C_RAW[23]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 49] @ avcline 6146: {calc('V_VBG_ACC_C[23]', 'V_VBG_ACC_C_RAW[23]', '-', 'V_OFF1_ECOFF')}
valid comment[ 49] @ avcline 6146: {log('V_VBG_ACC_C[23]', '', '', 0, 0)}
valid comment[ 50] @ avcline 6147: {cmt: Set trim index to value 24 in range (0..31)}
valid comment[ 51] @ avcline 6349: {gav('V_VBG_ACC_C_RAW[24]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 51] @ avcline 6349: {calc('V_VBG_ACC_C[24]', 'V_VBG_ACC_C_RAW[24]', '-', 'V_OFF1_ECOFF')}
valid comment[ 51] @ avcline 6349: {log('V_VBG_ACC_C[24]', '', '', 0, 0)}
valid comment[ 52] @ avcline 6350: {cmt: Set trim index to value 25 in range (0..31)}
valid comment[ 53] @ avcline 6552: {gav('V_VBG_ACC_C_RAW[25]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 53] @ avcline 6552: {calc('V_VBG_ACC_C[25]', 'V_VBG_ACC_C_RAW[25]', '-', 'V_OFF1_ECOFF')}
valid comment[ 53] @ avcline 6552: {log('V_VBG_ACC_C[25]', '', '', 0, 0)}
valid comment[ 54] @ avcline 6553: {cmt: Set trim index to value 26 in range (0..31)}
valid comment[ 55] @ avcline 6755: {gav('V_VBG_ACC_C_RAW[26]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 55] @ avcline 6755: {calc('V_VBG_ACC_C[26]', 'V_VBG_ACC_C_RAW[26]', '-', 'V_OFF1_ECOFF')}
valid comment[ 55] @ avcline 6755: {log('V_VBG_ACC_C[26]', '', '', 0, 0)}
valid comment[ 56] @ avcline 6756: {cmt: Set trim index to value 27 in range (0..31)}
valid comment[ 57] @ avcline 6958: {gav('V_VBG_ACC_C_RAW[27]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 57] @ avcline 6958: {calc('V_VBG_ACC_C[27]', 'V_VBG_ACC_C_RAW[27]', '-', 'V_OFF1_ECOFF')}
valid comment[ 57] @ avcline 6958: {log('V_VBG_ACC_C[27]', '', '', 0, 0)}
valid comment[ 58] @ avcline 6959: {cmt: Set trim index to value 28 in range (0..31)}
valid comment[ 59] @ avcline 7161: {gav('V_VBG_ACC_C_RAW[28]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 59] @ avcline 7161: {calc('V_VBG_ACC_C[28]', 'V_VBG_ACC_C_RAW[28]', '-', 'V_OFF1_ECOFF')}
valid comment[ 59] @ avcline 7161: {log('V_VBG_ACC_C[28]', '', '', 0, 0)}
valid comment[ 60] @ avcline 7162: {cmt: Set trim index to value 29 in range (0..31)}
valid comment[ 61] @ avcline 7364: {gav('V_VBG_ACC_C_RAW[29]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 61] @ avcline 7364: {calc('V_VBG_ACC_C[29]', 'V_VBG_ACC_C_RAW[29]', '-', 'V_OFF1_ECOFF')}
valid comment[ 61] @ avcline 7364: {log('V_VBG_ACC_C[29]', '', '', 0, 0)}
valid comment[ 62] @ avcline 7365: {cmt: Set trim index to value 30 in range (0..31)}
valid comment[ 63] @ avcline 7567: {gav('V_VBG_ACC_C_RAW[30]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 63] @ avcline 7567: {calc('V_VBG_ACC_C[30]', 'V_VBG_ACC_C_RAW[30]', '-', 'V_OFF1_ECOFF')}
valid comment[ 63] @ avcline 7567: {log('V_VBG_ACC_C[30]', '', '', 0, 0)}
valid comment[ 64] @ avcline 7568: {cmt: Set trim index to value 31 in range (0..31)}
valid comment[ 65] @ avcline 7770: {gav('V_VBG_ACC_C_RAW[31]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 65] @ avcline 7770: {calc('V_VBG_ACC_C[31]', 'V_VBG_ACC_C_RAW[31]', '-', 'V_OFF1_ECOFF')}
valid comment[ 65] @ avcline 7770: {log('V_VBG_ACC_C[31]', '', '', 0, 0)}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.digCap("digcapid_0").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(1*16).execute();
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][3]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_00//{gav('V_VBG_ACC_C_RAW[00]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][5]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_01//{gav('V_VBG_ACC_C_RAW[01]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][7]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_02//{gav('V_VBG_ACC_C_RAW[02]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][9]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_03//{gav('V_VBG_ACC_C_RAW[03]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][11]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_04//{gav('V_VBG_ACC_C_RAW[04]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][13]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_05//{gav('V_VBG_ACC_C_RAW[05]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][15]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_06//{gav('V_VBG_ACC_C_RAW[06]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][17]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_07//{gav('V_VBG_ACC_C_RAW[07]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][19]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_08//{gav('V_VBG_ACC_C_RAW[08]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][21]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_09//{gav('V_VBG_ACC_C_RAW[09]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][23]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_10//{gav('V_VBG_ACC_C_RAW[10]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][25]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_11//{gav('V_VBG_ACC_C_RAW[11]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][27]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_12//{gav('V_VBG_ACC_C_RAW[12]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][29]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_13//{gav('V_VBG_ACC_C_RAW[13]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][31]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_14//{gav('V_VBG_ACC_C_RAW[14]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][33]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_15//{gav('V_VBG_ACC_C_RAW[15]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][35]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_16//{gav('V_VBG_ACC_C_RAW[16]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][37]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_17//{gav('V_VBG_ACC_C_RAW[17]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][39]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_18//{gav('V_VBG_ACC_C_RAW[18]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][41]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_19//{gav('V_VBG_ACC_C_RAW[19]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][43]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_20//{gav('V_VBG_ACC_C_RAW[20]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][45]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_21//{gav('V_VBG_ACC_C_RAW[21]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][47]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_22//{gav('V_VBG_ACC_C_RAW[22]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][49]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_23//{gav('V_VBG_ACC_C_RAW[23]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][51]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_24//{gav('V_VBG_ACC_C_RAW[24]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][53]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_25//{gav('V_VBG_ACC_C_RAW[25]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][55]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_26//{gav('V_VBG_ACC_C_RAW[26]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][57]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_27//{gav('V_VBG_ACC_C_RAW[27]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][59]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_28//{gav('V_VBG_ACC_C_RAW[28]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][61]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_29//{gav('V_VBG_ACC_C_RAW[29]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][63]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_30//{gav('V_VBG_ACC_C_RAW[30]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][65]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_C_RAW_31//{gav('V_VBG_ACC_C_RAW[31]', 'INT2', 'ASDX', 2, 0.0001, True)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(32); ad_jsubresults_INT2.init(-9.9);
ARRAY_D ad_jsubresults_ASDX; ad_jsubresults_ASDX.resize(32); ad_jsubresults_ASDX.init(-9.9);
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
ad_jsubresults_ASDX = rdi.id("dcid_0").getMultiValue("ASDX");
aI_Captured_0[0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[0]);
i_REG_VALUE[curSite] = aI_Captured_0[0];
FuncPrint("REG_VALUE",i_REG_VALUE[curSite]);
for(int i=0; i<32; i++){
d_V_VBG_ACC_C_RAW[curSite][i] = ad_jsubresults_INT2[0 + i] - ad_jsubresults_ASDX[0 + i];
FuncPrint("V_VBG_ACC_C_RAW_" + rdi.itos(curSite) + "_"+ rdi.itos(i) ,d_V_VBG_ACC_C_RAW[curSite][i]);
V_VBG_ACC_C[curSite][i] = d_V_VBG_ACC_C_RAW[curSite][i] - V_OFF1_ECOFF[curSite];
FuncPrint("V_VBG_ACC_C_"+ rdi.itos(i) ,V_VBG_ACC_C[curSite][i]);
}
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 7779: {wri('ANA_TRM_BG', 'REG_VALUE')}
valid comment[ 1] @ avcline 8818: {Test End: T10_13_ACC_Bandgap_Char}
*/
static int i_vec_iposition1[32] = {
31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,
48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63
};
for (int i = 0; i < 32; i++)
{
i_vec_Num1[i] = i_vec_iposition1[i];
}
FOR_EACH_SITE_BEGIN();
i_WRITE_BACK[curSite] = Switch_High_Low_Bits_16Bits(i_REG_VALUE[curSite]);
Func_Vector_Dynamic_Write(s_splited_pat_name[1], "SDX", i_vec_Num1, 32, i_WRITE_BACK[curSite], 0, 2); //Notes. TEI check per project
FOR_EACH_SITE_END();
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.func().label(s_splited_pat_name[1]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
for(int i=0; i < 32; i++){
TestLog(s_Func_Test_Name_Add_2Num("V_VBG_ACC_C_", i), V_VBG_ACC_C[curSite][i]);
}
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T10_13_ACC_Bandgap_Char_V2", T10_13_ACC_Bandgap_Char_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_CONF', 0x0011) # tm_se_meas=0 tm_bus_inv=1 tm_buf_pwrup=1 (tbuf_tb1_on)
# bus_inv. because the power_ana_test_multiplexor_2 provides VSS_A/VDDA
wac('TM_PIN', 0x0095) # tm_asdx_sel=4 (BUF2_INP) tm_asdx_en=1 tm_int2_sel=2 (BUF1_OUT) tm_int2_en=1
wac('TM_ADDR', 0x090d) # tm_cfg=9 (COM_TB2= VDDA, COM_TB1= VSS_A) tm_addr=d (COM_TIO_PWR;
# enable the power_ana_test_multiplexor_2 for power supplies); any tm_addr value except off/0 enables the test module
dly(100e-6)
gav('V_VDDAA_M_RAW', 'INT2', 'ASDX') # no check (V_OFF2_ECON)
calc('V_VDDAA', 'V_VDDAA_M_RAW', '-', 'V_OFF1_ECOFF')
log('V_VDDAA')
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_14_VDDA_LDO_measurement_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double V_VDDAA_M_RAW[xNSitES];
static double V_VDDAA[xNSitES];
// Auto_Code_Variable_define
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T10_14_VDDA_LDO_measurement_V2_PAT_id");
rdi.dc("T10_14_VDDA_LDO_measurement_V2DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms) //V_VDDAA_M_RAW
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
ARRAY_D JSUB_results_ASDX;
JSUB_results_ASDX = rdi.id("T10_14_VDDA_LDO_measurement_V2DC_id0").getMultiValue("ASDX");
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T10_14_VDDA_LDO_measurement_V2DC_id0").getMultiValue("INT2");
V_VDDAA_M_RAW[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[0] - JSUB_results_ASDX[0];
V_VDDAA[CURRENT_SITE_NUMBER()-1] = V_VDDAA_M_RAW[CURRENT_SITE_NUMBER()-1] - V_OFF1_ECOFF[CURRENT_SITE_NUMBER()-1];
FuncPrint("JSUB_results_ASDX", JSUB_results_ASDX[0]);
FuncPrint("JSUB_results_INT2", JSUB_results_INT2[0]);
FuncPrint("V_VDDAA_M_RAW", V_VDDAA_M_RAW[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_VDDAA", V_VDDAA[CURRENT_SITE_NUMBER()-1]);
int Func_result = rdi.id("T10_14_VDDA_LDO_measurement_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("V_VDDAA", V_VDDAA[CURRENT_SITE_NUMBER()-1]);
// Auto_Code_Judge_and_log
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_14_VDDA_LDO_measurement_V2", T10_14_VDDA_LDO_measurement_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: ACC bandgap characterization
# similar to T10_13_ACC_Bandgap_Char.py
# - VDDA to ANAIO1, VSS_A to ANAIO2 with buffer 1 enabled only
#############################################################################################################
from test_sub_functions import *
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_CONF', 0x0011) # tm_se_meas=0 tm_bus_inv=1 tm_buf_pwrup=1 (tbuf_tb1_on)
# bus_inv. because the power_ana_test_multiplexor_2 provides VSS_A/VDDA
wac('TM_PIN', 0x0095) # tm_asdx_sel=4 (BUF2_INP) tm_asdx_en=1 tm_int2_sel=2 (BUF1_OUT) tm_int2_en=1
wac('TM_ADDR', 0x090d) # tm_cfg=9 (COM_TB2= VDDA, COM_TB1= VSS_A) tm_addr=d (COM_TIO_PWR;
# enable the power_ana_test_multiplexor_2 for power supplies); any tm_addr value except off/0 enables the test module
# Characterization loop
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x01f0) # Set masking register
ras('REG_VALUE', 'ANA_TRM_BG') # Store the current value
for n in range (0, 32, 1):
cmt('Set trim index to value {} in range (0..31)'.format(n))
wr('ANA_TRM_BG', n*16) # ANA_TRM_BG<8:4> pc_trm_bgp_vra
rac('ANA_TRM_BG', n*16, 0x01f0)
dly(100e-6)
gav('V_VDDA_C_RAW[{:02d}]'.format(n), 'INT2', 'ASDX')
calc('V_VDDA_C[{:02d}]'.format(n), 'V_VDDA_C_RAW[{:02d}]'.format(n), '-', 'V_OFF1_ECOFF')
log(f'V_VDDA_C[{n:02}]')
dly(592e-9)
wri('ANA_TRM_BG','REG_VALUE')
# Clean
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Clean
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* T10_15_VDDA_LDO_Char_V2, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH: fix some bugs.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_15_VDDA_LDO_Char_V2: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 2;
vector<int> i_comment_line[i_split_count];
static int i_REG_VALUE[xNSitES];
ARRAY_I aI_Captured_0;
static double d_V_VDDA_C_RAW[xNSitES][32];
static double V_VDDA_C[xNSitES][32];
ARRAY_D ad_V_VDDA_C_RAW;
static int i_WRITE_BACK[xNSitES];
static int i_vec_Num1[32] = {0};
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(i_REG_VALUE, 9, xNSitES);
//!"CTmsg: cut pattern to 2 parts @ oriAVCvecline [7779]
//!"CTmsg: cut pattern to 2 parts @ binarypatline [7769]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_15_VDDA_LDO_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 20:34:28 GMT >}
valid comment[ 1] @ avcline 1162: {ras('REG_VALUE', 'ANA_TRM_BG')}
valid comment[ 2] @ avcline 1275: {cmt: Set trim index to value 0 in range (0..31)}
valid comment[ 3] @ avcline 1477: {gav('V_VDDA_C_RAW[00]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 3] @ avcline 1477: {calc('V_VDDA_C[00]', 'V_VDDA_C_RAW[00]', '-', 'V_OFF1_ECOFF')}
valid comment[ 3] @ avcline 1477: {log('V_VDDA_C[00]', '', '', 0, 0)}
valid comment[ 4] @ avcline 1478: {cmt: Set trim index to value 1 in range (0..31)}
valid comment[ 5] @ avcline 1680: {gav('V_VDDA_C_RAW[01]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 5] @ avcline 1680: {calc('V_VDDA_C[01]', 'V_VDDA_C_RAW[01]', '-', 'V_OFF1_ECOFF')}
valid comment[ 5] @ avcline 1680: {log('V_VDDA_C[01]', '', '', 0, 0)}
valid comment[ 6] @ avcline 1681: {cmt: Set trim index to value 2 in range (0..31)}
valid comment[ 7] @ avcline 1883: {gav('V_VDDA_C_RAW[02]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 7] @ avcline 1883: {calc('V_VDDA_C[02]', 'V_VDDA_C_RAW[02]', '-', 'V_OFF1_ECOFF')}
valid comment[ 7] @ avcline 1883: {log('V_VDDA_C[02]', '', '', 0, 0)}
valid comment[ 8] @ avcline 1884: {cmt: Set trim index to value 3 in range (0..31)}
valid comment[ 9] @ avcline 2086: {gav('V_VDDA_C_RAW[03]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 9] @ avcline 2086: {calc('V_VDDA_C[03]', 'V_VDDA_C_RAW[03]', '-', 'V_OFF1_ECOFF')}
valid comment[ 9] @ avcline 2086: {log('V_VDDA_C[03]', '', '', 0, 0)}
valid comment[ 10] @ avcline 2087: {cmt: Set trim index to value 4 in range (0..31)}
valid comment[ 11] @ avcline 2289: {gav('V_VDDA_C_RAW[04]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 11] @ avcline 2289: {calc('V_VDDA_C[04]', 'V_VDDA_C_RAW[04]', '-', 'V_OFF1_ECOFF')}
valid comment[ 11] @ avcline 2289: {log('V_VDDA_C[04]', '', '', 0, 0)}
valid comment[ 12] @ avcline 2290: {cmt: Set trim index to value 5 in range (0..31)}
valid comment[ 13] @ avcline 2492: {gav('V_VDDA_C_RAW[05]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 13] @ avcline 2492: {calc('V_VDDA_C[05]', 'V_VDDA_C_RAW[05]', '-', 'V_OFF1_ECOFF')}
valid comment[ 13] @ avcline 2492: {log('V_VDDA_C[05]', '', '', 0, 0)}
valid comment[ 14] @ avcline 2493: {cmt: Set trim index to value 6 in range (0..31)}
valid comment[ 15] @ avcline 2695: {gav('V_VDDA_C_RAW[06]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 15] @ avcline 2695: {calc('V_VDDA_C[06]', 'V_VDDA_C_RAW[06]', '-', 'V_OFF1_ECOFF')}
valid comment[ 15] @ avcline 2695: {log('V_VDDA_C[06]', '', '', 0, 0)}
valid comment[ 16] @ avcline 2696: {cmt: Set trim index to value 7 in range (0..31)}
valid comment[ 17] @ avcline 2898: {gav('V_VDDA_C_RAW[07]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 17] @ avcline 2898: {calc('V_VDDA_C[07]', 'V_VDDA_C_RAW[07]', '-', 'V_OFF1_ECOFF')}
valid comment[ 17] @ avcline 2898: {log('V_VDDA_C[07]', '', '', 0, 0)}
valid comment[ 18] @ avcline 2899: {cmt: Set trim index to value 8 in range (0..31)}
valid comment[ 19] @ avcline 3101: {gav('V_VDDA_C_RAW[08]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 19] @ avcline 3101: {calc('V_VDDA_C[08]', 'V_VDDA_C_RAW[08]', '-', 'V_OFF1_ECOFF')}
valid comment[ 19] @ avcline 3101: {log('V_VDDA_C[08]', '', '', 0, 0)}
valid comment[ 20] @ avcline 3102: {cmt: Set trim index to value 9 in range (0..31)}
valid comment[ 21] @ avcline 3304: {gav('V_VDDA_C_RAW[09]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 21] @ avcline 3304: {calc('V_VDDA_C[09]', 'V_VDDA_C_RAW[09]', '-', 'V_OFF1_ECOFF')}
valid comment[ 21] @ avcline 3304: {log('V_VDDA_C[09]', '', '', 0, 0)}
valid comment[ 22] @ avcline 3305: {cmt: Set trim index to value 10 in range (0..31)}
valid comment[ 23] @ avcline 3507: {gav('V_VDDA_C_RAW[10]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 23] @ avcline 3507: {calc('V_VDDA_C[10]', 'V_VDDA_C_RAW[10]', '-', 'V_OFF1_ECOFF')}
valid comment[ 23] @ avcline 3507: {log('V_VDDA_C[10]', '', '', 0, 0)}
valid comment[ 24] @ avcline 3508: {cmt: Set trim index to value 11 in range (0..31)}
valid comment[ 25] @ avcline 3710: {gav('V_VDDA_C_RAW[11]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 25] @ avcline 3710: {calc('V_VDDA_C[11]', 'V_VDDA_C_RAW[11]', '-', 'V_OFF1_ECOFF')}
valid comment[ 25] @ avcline 3710: {log('V_VDDA_C[11]', '', '', 0, 0)}
valid comment[ 26] @ avcline 3711: {cmt: Set trim index to value 12 in range (0..31)}
valid comment[ 27] @ avcline 3913: {gav('V_VDDA_C_RAW[12]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 27] @ avcline 3913: {calc('V_VDDA_C[12]', 'V_VDDA_C_RAW[12]', '-', 'V_OFF1_ECOFF')}
valid comment[ 27] @ avcline 3913: {log('V_VDDA_C[12]', '', '', 0, 0)}
valid comment[ 28] @ avcline 3914: {cmt: Set trim index to value 13 in range (0..31)}
valid comment[ 29] @ avcline 4116: {gav('V_VDDA_C_RAW[13]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 29] @ avcline 4116: {calc('V_VDDA_C[13]', 'V_VDDA_C_RAW[13]', '-', 'V_OFF1_ECOFF')}
valid comment[ 29] @ avcline 4116: {log('V_VDDA_C[13]', '', '', 0, 0)}
valid comment[ 30] @ avcline 4117: {cmt: Set trim index to value 14 in range (0..31)}
valid comment[ 31] @ avcline 4319: {gav('V_VDDA_C_RAW[14]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 31] @ avcline 4319: {calc('V_VDDA_C[14]', 'V_VDDA_C_RAW[14]', '-', 'V_OFF1_ECOFF')}
valid comment[ 31] @ avcline 4319: {log('V_VDDA_C[14]', '', '', 0, 0)}
valid comment[ 32] @ avcline 4320: {cmt: Set trim index to value 15 in range (0..31)}
valid comment[ 33] @ avcline 4522: {gav('V_VDDA_C_RAW[15]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 33] @ avcline 4522: {calc('V_VDDA_C[15]', 'V_VDDA_C_RAW[15]', '-', 'V_OFF1_ECOFF')}
valid comment[ 33] @ avcline 4522: {log('V_VDDA_C[15]', '', '', 0, 0)}
valid comment[ 34] @ avcline 4523: {cmt: Set trim index to value 16 in range (0..31)}
valid comment[ 35] @ avcline 4725: {gav('V_VDDA_C_RAW[16]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 35] @ avcline 4725: {calc('V_VDDA_C[16]', 'V_VDDA_C_RAW[16]', '-', 'V_OFF1_ECOFF')}
valid comment[ 35] @ avcline 4725: {log('V_VDDA_C[16]', '', '', 0, 0)}
valid comment[ 36] @ avcline 4726: {cmt: Set trim index to value 17 in range (0..31)}
valid comment[ 37] @ avcline 4928: {gav('V_VDDA_C_RAW[17]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 37] @ avcline 4928: {calc('V_VDDA_C[17]', 'V_VDDA_C_RAW[17]', '-', 'V_OFF1_ECOFF')}
valid comment[ 37] @ avcline 4928: {log('V_VDDA_C[17]', '', '', 0, 0)}
valid comment[ 38] @ avcline 4929: {cmt: Set trim index to value 18 in range (0..31)}
valid comment[ 39] @ avcline 5131: {gav('V_VDDA_C_RAW[18]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 39] @ avcline 5131: {calc('V_VDDA_C[18]', 'V_VDDA_C_RAW[18]', '-', 'V_OFF1_ECOFF')}
valid comment[ 39] @ avcline 5131: {log('V_VDDA_C[18]', '', '', 0, 0)}
valid comment[ 40] @ avcline 5132: {cmt: Set trim index to value 19 in range (0..31)}
valid comment[ 41] @ avcline 5334: {gav('V_VDDA_C_RAW[19]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 41] @ avcline 5334: {calc('V_VDDA_C[19]', 'V_VDDA_C_RAW[19]', '-', 'V_OFF1_ECOFF')}
valid comment[ 41] @ avcline 5334: {log('V_VDDA_C[19]', '', '', 0, 0)}
valid comment[ 42] @ avcline 5335: {cmt: Set trim index to value 20 in range (0..31)}
valid comment[ 43] @ avcline 5537: {gav('V_VDDA_C_RAW[20]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 43] @ avcline 5537: {calc('V_VDDA_C[20]', 'V_VDDA_C_RAW[20]', '-', 'V_OFF1_ECOFF')}
valid comment[ 43] @ avcline 5537: {log('V_VDDA_C[20]', '', '', 0, 0)}
valid comment[ 44] @ avcline 5538: {cmt: Set trim index to value 21 in range (0..31)}
valid comment[ 45] @ avcline 5740: {gav('V_VDDA_C_RAW[21]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 45] @ avcline 5740: {calc('V_VDDA_C[21]', 'V_VDDA_C_RAW[21]', '-', 'V_OFF1_ECOFF')}
valid comment[ 45] @ avcline 5740: {log('V_VDDA_C[21]', '', '', 0, 0)}
valid comment[ 46] @ avcline 5741: {cmt: Set trim index to value 22 in range (0..31)}
valid comment[ 47] @ avcline 5943: {gav('V_VDDA_C_RAW[22]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 47] @ avcline 5943: {calc('V_VDDA_C[22]', 'V_VDDA_C_RAW[22]', '-', 'V_OFF1_ECOFF')}
valid comment[ 47] @ avcline 5943: {log('V_VDDA_C[22]', '', '', 0, 0)}
valid comment[ 48] @ avcline 5944: {cmt: Set trim index to value 23 in range (0..31)}
valid comment[ 49] @ avcline 6146: {gav('V_VDDA_C_RAW[23]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 49] @ avcline 6146: {calc('V_VDDA_C[23]', 'V_VDDA_C_RAW[23]', '-', 'V_OFF1_ECOFF')}
valid comment[ 49] @ avcline 6146: {log('V_VDDA_C[23]', '', '', 0, 0)}
valid comment[ 50] @ avcline 6147: {cmt: Set trim index to value 24 in range (0..31)}
valid comment[ 51] @ avcline 6349: {gav('V_VDDA_C_RAW[24]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 51] @ avcline 6349: {calc('V_VDDA_C[24]', 'V_VDDA_C_RAW[24]', '-', 'V_OFF1_ECOFF')}
valid comment[ 51] @ avcline 6349: {log('V_VDDA_C[24]', '', '', 0, 0)}
valid comment[ 52] @ avcline 6350: {cmt: Set trim index to value 25 in range (0..31)}
valid comment[ 53] @ avcline 6552: {gav('V_VDDA_C_RAW[25]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 53] @ avcline 6552: {calc('V_VDDA_C[25]', 'V_VDDA_C_RAW[25]', '-', 'V_OFF1_ECOFF')}
valid comment[ 53] @ avcline 6552: {log('V_VDDA_C[25]', '', '', 0, 0)}
valid comment[ 54] @ avcline 6553: {cmt: Set trim index to value 26 in range (0..31)}
valid comment[ 55] @ avcline 6755: {gav('V_VDDA_C_RAW[26]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 55] @ avcline 6755: {calc('V_VDDA_C[26]', 'V_VDDA_C_RAW[26]', '-', 'V_OFF1_ECOFF')}
valid comment[ 55] @ avcline 6755: {log('V_VDDA_C[26]', '', '', 0, 0)}
valid comment[ 56] @ avcline 6756: {cmt: Set trim index to value 27 in range (0..31)}
valid comment[ 57] @ avcline 6958: {gav('V_VDDA_C_RAW[27]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 57] @ avcline 6958: {calc('V_VDDA_C[27]', 'V_VDDA_C_RAW[27]', '-', 'V_OFF1_ECOFF')}
valid comment[ 57] @ avcline 6958: {log('V_VDDA_C[27]', '', '', 0, 0)}
valid comment[ 58] @ avcline 6959: {cmt: Set trim index to value 28 in range (0..31)}
valid comment[ 59] @ avcline 7161: {gav('V_VDDA_C_RAW[28]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 59] @ avcline 7161: {calc('V_VDDA_C[28]', 'V_VDDA_C_RAW[28]', '-', 'V_OFF1_ECOFF')}
valid comment[ 59] @ avcline 7161: {log('V_VDDA_C[28]', '', '', 0, 0)}
valid comment[ 60] @ avcline 7162: {cmt: Set trim index to value 29 in range (0..31)}
valid comment[ 61] @ avcline 7364: {gav('V_VDDA_C_RAW[29]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 61] @ avcline 7364: {calc('V_VDDA_C[29]', 'V_VDDA_C_RAW[29]', '-', 'V_OFF1_ECOFF')}
valid comment[ 61] @ avcline 7364: {log('V_VDDA_C[29]', '', '', 0, 0)}
valid comment[ 62] @ avcline 7365: {cmt: Set trim index to value 30 in range (0..31)}
valid comment[ 63] @ avcline 7567: {gav('V_VDDA_C_RAW[30]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 63] @ avcline 7567: {calc('V_VDDA_C[30]', 'V_VDDA_C_RAW[30]', '-', 'V_OFF1_ECOFF')}
valid comment[ 63] @ avcline 7567: {log('V_VDDA_C[30]', '', '', 0, 0)}
valid comment[ 64] @ avcline 7568: {cmt: Set trim index to value 31 in range (0..31)}
valid comment[ 65] @ avcline 7770: {gav('V_VDDA_C_RAW[31]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 65] @ avcline 7770: {calc('V_VDDA_C[31]', 'V_VDDA_C_RAW[31]', '-', 'V_OFF1_ECOFF')}
valid comment[ 65] @ avcline 7770: {log('V_VDDA_C[31]', '', '', 0, 0)}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.digCap("digcapid_0").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(1*16).execute();
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][3]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_00//{gav('V_VDDA_C_RAW[00]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][5]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_01//{gav('V_VDDA_C_RAW[01]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][7]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_02//{gav('V_VDDA_C_RAW[02]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][9]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_03//{gav('V_VDDA_C_RAW[03]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][11]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_04//{gav('V_VDDA_C_RAW[04]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][13]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_05//{gav('V_VDDA_C_RAW[05]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][15]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_06//{gav('V_VDDA_C_RAW[06]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][17]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_07//{gav('V_VDDA_C_RAW[07]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][19]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_08//{gav('V_VDDA_C_RAW[08]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][21]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_09//{gav('V_VDDA_C_RAW[09]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][23]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_10//{gav('V_VDDA_C_RAW[10]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][25]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_11//{gav('V_VDDA_C_RAW[11]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][27]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_12//{gav('V_VDDA_C_RAW[12]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][29]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_13//{gav('V_VDDA_C_RAW[13]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][31]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_14//{gav('V_VDDA_C_RAW[14]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][33]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_15//{gav('V_VDDA_C_RAW[15]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][35]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_16//{gav('V_VDDA_C_RAW[16]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][37]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_17//{gav('V_VDDA_C_RAW[17]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][39]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_18//{gav('V_VDDA_C_RAW[18]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][41]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_19//{gav('V_VDDA_C_RAW[19]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][43]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_20//{gav('V_VDDA_C_RAW[20]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][45]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_21//{gav('V_VDDA_C_RAW[21]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][47]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_22//{gav('V_VDDA_C_RAW[22]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][49]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_23//{gav('V_VDDA_C_RAW[23]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][51]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_24//{gav('V_VDDA_C_RAW[24]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][53]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_25//{gav('V_VDDA_C_RAW[25]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][55]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_26//{gav('V_VDDA_C_RAW[26]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][57]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_27//{gav('V_VDDA_C_RAW[27]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][59]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_28//{gav('V_VDDA_C_RAW[28]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][61]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_29//{gav('V_VDDA_C_RAW[29]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][63]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_30//{gav('V_VDDA_C_RAW[30]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][65]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDA_C_RAW_31//{gav('V_VDDA_C_RAW[31]', 'INT2', 'ASDX', 2, 0.0001, True)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(32); ad_jsubresults_INT2.init(-9.9);
ARRAY_D ad_jsubresults_ASDX; ad_jsubresults_ASDX.resize(32); ad_jsubresults_ASDX.init(-9.9);
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
ad_jsubresults_ASDX = rdi.id("dcid_0").getMultiValue("ASDX");
aI_Captured_0[0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[0]);
i_REG_VALUE[curSite] = aI_Captured_0[0];
FuncPrint("REG_VALUE",i_REG_VALUE[curSite]);
for(int i=0; i<32; i++){
d_V_VDDA_C_RAW[curSite][i] = ad_jsubresults_INT2[0 + i] - ad_jsubresults_ASDX[0 + i];
FuncPrint("V_VDDA_C_RAW_" + rdi.itos(curSite) + "_"+ rdi.itos(i) ,d_V_VDDA_C_RAW[curSite][i]);
V_VDDA_C[curSite][i] = d_V_VDDA_C_RAW[curSite][i] - V_OFF1_ECOFF[curSite];
FuncPrint(s_Func_Test_Name_Add_2Num("V_VDDA_C_", i) ,V_VDDA_C[curSite][i]);
}
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 7779: {wri('ANA_TRM_BG', 'REG_VALUE')}
valid comment[ 1] @ avcline 8818: {Test End: T10_15_VDDA_LDO_Char}
*/
static int i_vec_iposition1[32] = {
31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,
48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63
};
for (int i = 0; i < 32; i++)
{
i_vec_Num1[i] = i_vec_iposition1[i];
}
FOR_EACH_SITE_BEGIN();
i_WRITE_BACK[curSite] = Switch_High_Low_Bits_16Bits(i_REG_VALUE[curSite]);
Func_Vector_Dynamic_Write(s_splited_pat_name[1], "SDX", i_vec_Num1, 32, i_WRITE_BACK[curSite], 0, 2); //Notes. TEI check per project
FOR_EACH_SITE_END();
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.func().label(s_splited_pat_name[1]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
for(int i=0; i < 32; i++){
TestLog(s_Func_Test_Name_Add_2Num("V_VDDA_C_", i) ,V_VDDA_C[curSite][i]);
}
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T10_15_VDDA_LDO_Char_V2", T10_15_VDDA_LDO_Char_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: ACC bias current trimming
# - ibias_acc@ANAIO2 by default, invert to anaio1
#############################################################################################################
cmt('Version info: $Revision: 3 $ $Author: hmf1rt $ $Date: 2024/04/23 15:35:23 GMT $')
# Swap tareget singal to ANAIO1
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wcb('tm_se_meas',1)
wcb('tm_bus_inv',1) # invert ibias_acc to anaio1
# Config ANAIO pad, TM_PIN
wcb('tm_int2_en',0x1)
wcb('tm_int2_sel',0x4) # TB1INP on anaio1
# Config CTB_P/N, TM_ADDR
wcb('tm_cfg', 0x1) # CTP_N is IB_ACC
wcb('tm_addr', 0xe) # COM_TIO_PWR, Signal :TM_PWRBLOCK_EN
# Trim loop
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0xf000) # Set masking register
for n in range (0, 16, 1):
cmt('Set trim index to value {} in range (0..15)'.format(n))
wr('ANA_TRM_BG', n*2**12) # ANA_TRM_BG<15:12> pc_trm_ib_acc
rac('ANA_TRM_BG', n*2**12, 0xf000)
uclk('ASCX')
bw('ASCX', 1)
dly(271*74e-9) # Delay ~20us
gac(f'I_BIAS_ACC[{n:02d}]', 'INT2', i_range=2e-6)
log(f'I_BIAS_ACC[{n:02d}]')
ubw('ASCX')
clk('ASCX', 1/148e-9)
oti('N_OPT_IBIAS_ACC', 'I_BIAS_ACC', -0.9e-6)
log('N_OPT_IBIAS_ACC')
otv('I_OPT_IBIAS_ACC', 'I_BIAS_ACC', -0.9e-6)
log('I_OPT_IBIAS_ACC')
calc('N_ANA_TRM_BG_WR','N_OPT_IBIAS_ACC','<<',12)
wri('ANA_TRM_BG','N_ANA_TRM_BG_WR')
ras('N_ANA_TRM_BG_RD','ANA_TRM_BG')
calc('N_ANA_TRM_BG_RD_15_12','N_ANA_TRM_BG_RD','&',0xf000)
calc('N_OPT_IBIAS_ACC_RD','N_ANA_TRM_BG_RD_15_12','>>',12)
cmt('The test item is a functional fail if N_OPT_IBIAS_ACC_RD != N_OPT_IBIAS_ACC')
# Clean
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Clean TM_CONF
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_16_acc_bias_current_trimming_V3: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
INT split_pat_flag;
GET_USER_FLAG("split_pat_flag", &split_pat_flag);
vector<string> s_splited_pat_name;
const int split_count = 2; // Alarm:: split_count need manual confirm.
s_splited_pat_name.resize(split_count);
vector<int> i_comment_line[split_count];
static int N_ANA_TRM_BG_RD[xNSitES];
static double I_BIAS_ACC[xNSitES][16];
static int N_OPT_IBIAS_ACC[xNSitES], N_ANA_TRM_BG_WR[xNSitES], N_ANA_TRM_BG_RD_15_12[xNSitES], N_OPT_IBIAS_ACC_RD[xNSitES];
static double I_OPT_IBIAS_ACC[xNSitES];
ARRAY_LL N_ANA_TRM_BG_WR_rtv(xNSitES);
const int Wri_Bit_Length = 33;
const int Wri_Bit_Position = 31;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
rdi.enableOre(oreFlag);
rdi.oreFile("./ORE_Files/rdi_ore_T10_16_ACC_BIAS_CURRENT_TRIMMING.xml");
GET_TESTSUITE_NAME(test_name);
if (split_pat_flag)
{
split_pattern(s_label_name,"wri",split_pat_flag,s_splited_pat_name);
}
else
{
for (int i = 0; i<split_count; i++)
{
s_splited_pat_name[i] = s_label_name + "_part" + rdi.itos(i);
i_comment_line[i] = search_comment_line(s_splited_pat_name[i]);
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
RDI_BEGIN(mode);
rdi.burstId("T10_16_acc_bias_current_trimming_V3_PAT_id0");
for (int i = 0; i<16; i++)
{
rdi.dc("T10_16_acc_bias_current_trimming_V3DC_id0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][i]).pin("INT2").vForce(0 V).iMeas().valueMode(TA::BADC).iRange(2e-06 A).average(32).measWait(1 ms).cont();//I_BIAS_ACC[i]
}
rdi.dc("T10_16_acc_bias_current_trimming_V3DC_id0").execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T10_16_acc_bias_current_trimming_V3DC_id0").getMultiValue("INT2");
for (int i = 0; i<16; i++)
{
I_BIAS_ACC[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_INT2[i];
FuncPrint("I_BIAS_ACC_"+rdi.itos(i), I_BIAS_ACC[CURRENT_SITE_NUMBER()-1][i]);
}
N_OPT_IBIAS_ACC[CURRENT_SITE_NUMBER()-1] = i_Func_Optimal_Trim_Val(I_BIAS_ACC[CURRENT_SITE_NUMBER()-1], Target_T1016, 16);
I_OPT_IBIAS_ACC[CURRENT_SITE_NUMBER()-1] = I_BIAS_ACC[CURRENT_SITE_NUMBER()-1][N_OPT_IBIAS_ACC[CURRENT_SITE_NUMBER()-1]];
FuncPrint("N_OPT_IBIAS_ACC", N_OPT_IBIAS_ACC[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_OPT_IBIAS_ACC", I_OPT_IBIAS_ACC[CURRENT_SITE_NUMBER()-1]);
N_ANA_TRM_BG_WR[CURRENT_SITE_NUMBER()-1] = N_OPT_IBIAS_ACC[CURRENT_SITE_NUMBER()-1] << 12;
FuncPrint("N_ANA_TRM_BG_WR", N_ANA_TRM_BG_WR[CURRENT_SITE_NUMBER()-1]);
N_ANA_TRM_BG_WR_rtv[CURRENT_SITE_NUMBER()-1] = extend_Pmode_Herschel(N_ANA_TRM_BG_WR[CURRENT_SITE_NUMBER()-1], 2);
FuncPrint("N_ANA_TRM_BG_WR_rtv", N_ANA_TRM_BG_WR_rtv[CURRENT_SITE_NUMBER()-1]);
FOR_EACH_SITE_END();
rdi.runTimeVal("N_ANA_TRM_BG_WR_rtv", N_ANA_TRM_BG_WR_rtv);
RDI_BEGIN(mode);
rdi.burstId("T10_16_acc_bias_current_trimming_V3_PAT_id1");
rdi.digCap("T10_16_acc_bias_current_trimming_V3_Digcap_id").vecVarOnly().pin("SDO").capMode(TA::SER).samples(16*1).bitPerWord(16).execute();
rdi.smartVec().label(s_splited_pat_name[1]).pin("SDX").writeData("N_ANA_TRM_BG_WR_rtv", Wri_Bit_Length, Wri_Bit_Position).execute();
RDI_END();
}
ON_FIRST_INVOCATION_END();
ARRAY_I Vec=rdi.id("T10_16_acc_bias_current_trimming_V3_Digcap_id").getVector();
N_ANA_TRM_BG_RD[CURRENT_SITE_NUMBER()-1] = reverse_ras_result(Vec[0]);
N_ANA_TRM_BG_RD_15_12[CURRENT_SITE_NUMBER()-1] = N_ANA_TRM_BG_RD[CURRENT_SITE_NUMBER()-1] & 61440;
N_OPT_IBIAS_ACC_RD[CURRENT_SITE_NUMBER()-1] = N_ANA_TRM_BG_RD_15_12[CURRENT_SITE_NUMBER()-1] >> 12;
int Func_result0 = rdi.id("T10_16_acc_bias_current_trimming_V3_PAT_id0").getBurstPassFail();
int Func_result1 = rdi.id("T10_16_acc_bias_current_trimming_V3_PAT_id1").getBurstPassFail();
FuncPrint("Func_result0", Func_result0);
FuncPrint("Func_result1", Func_result1);
int Func_result = 1 * Func_result0 * Func_result1;
if ((N_OPT_IBIAS_ACC_RD[CURRENT_SITE_NUMBER()-1]) != N_OPT_IBIAS_ACC[CURRENT_SITE_NUMBER()-1]) Func_result=99;
FuncPrint("FUNCTIONAL_TEST", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
for (int i = 0; i<10; i++)
{
TestLog("I_BIAS_ACC_0"+rdi.itos(i), I_BIAS_ACC[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i = 10; i<16; i++)
{
TestLog("I_BIAS_ACC_"+rdi.itos(i), I_BIAS_ACC[CURRENT_SITE_NUMBER()-1][i]);
}
TestLog("I_OPT_IBIAS_ACC", I_OPT_IBIAS_ACC[CURRENT_SITE_NUMBER()-1]);
TestLog("N_OPT_IBIAS_ACC", N_OPT_IBIAS_ACC[CURRENT_SITE_NUMBER()-1]);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_16_acc_bias_current_trimming_V3", T10_16_acc_bias_current_trimming_V3);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_CONF', 0x0110) # tm_se_meas=1 tm_bus_inv=1 (COM_TION instead of COM_TIOP for BUF1_INP)
wac('TM_PIN', 0x0009) # tm_int2_sel=4 (BUF1_INP) tm_int2_en=1
wac('TM_ADDR', 0x010e) # tm_cfg=1 (COM_TB2= IB_ACC, COM_TB1= IB_GYR) tm_addr=e (tm_bus_sel=tm_addr(3:2)=3 (COM_TION/P) COM_TIO_REF;
# enable the power_ana_test_multiplexor); any tm_addr value except off/0 enables the test module
dly(100e-6)
gac('I_BIAS_ACC_M', 'INT2', i_range=2e-6)
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_17_ACC_bias_current_measurement_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double I_BIAS_ACC_M[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T10_17_ACC_bias_current_measurement_V2_PAT_id");
rdi.dc("T10_17_ACC_bias_current_measurement_V2DC_id0").label(s_label_name)
// Alarm::vForce value had not been assigned in TOI, need manual check
.insertSub(i_comment_line0[0]).pin("INT2").vForce(0 V).iMeas().valueMode(TA::BADC).iRange(2e-06 A).average(16).measWait(1 ms) //I_BIAS_ACC_M
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T10_17_ACC_bias_current_measurement_V2DC_id0").getMultiValue("INT2");
I_BIAS_ACC_M[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[0];
FuncPrint("I_BIAS_ACC_M", I_BIAS_ACC_M[CURRENT_SITE_NUMBER()-1]);
int Func_result = rdi.id("T10_17_ACC_bias_current_measurement_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("I_BIAS_ACC_M", I_BIAS_ACC_M[CURRENT_SITE_NUMBER()-1]);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_17_ACC_bias_current_measurement_V2", T10_17_ACC_bias_current_measurement_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: ACC bias current characterization
# Characterization loop derived from T10_16_acc_bias_current_trimming
# - ibias_acc@ANAIO1
#############################################################################################################
cmt('Version info: $Revision: 3 $ $Author: luz3sgh $ $Date: 2024/07/02 01:03:26 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_CONF', 0x0110) # tm_se_meas=1 tm_bus_inv=1 (COM_TION instead of COM_TIOP for BUF1_INP)
wac('TM_PIN', 0x0009) # tm_int2_sel=4 (BUF1_INP) tm_int2_en=1
wac('TM_ADDR', 0x010e) # tm_cfg=1 (COM_TB2= IB_ACC, COM_TB1= IB_GYR) tm_addr=e (tm_bus_sel=tm_addr(3:2)=3 (COM_TION/P) COM_TIO_REF;
# enable the power_ana_test_multiplexor); any tm_addr value except off/0 enables the test module
# Characterization loop
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0xf000) # Set masking register
ras('REG_VALUE', 'ANA_TRM_BG') # Store the current value
for n in range (0, 16, 1):
cmt('Set trim index to value {} in range (0..15)'.format(n))
wr('ANA_TRM_BG', n*2**12) # ANA_TRM_BG<15:12> pc_trm_ib_acc
rac('ANA_TRM_BG', n*2**12, 0xf000)
dly(271*74e-9) # delay ~20us
gac(f'I_BIAS_ACC_C[{n:02d}]', 'INT2', i_range=2e-6)
log(f'I_BIAS_ACC_C[{n:02d}]')
dly(148e-9)
wri('ANA_TRM_BG','REG_VALUE')
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Clean
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* T10_18_ACC_Bias_Current_Char_V3, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH: fix some bugs.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_18_ACC_Bias_Current_Char_V3: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 2;
vector<int> i_comment_line[i_split_count];
static int i_REG_VALUE[xNSitES];
ARRAY_I aI_Captured_0;
static double d_I_BIAS_ACC_C[xNSitES][16];
ARRAY_D ad_I_BIAS_ACC_C;
static int i_WRITE_BACK[xNSitES];
static int i_vec_Num1[32] = {0};
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(i_REG_VALUE, 9, xNSitES);
//!"CTmsg: cut pattern to 2 parts @ oriAVCvecline [4509]
//!"CTmsg: cut pattern to 2 parts @ binarypatline [4499]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_18_ACC_Bias_Current_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 3 > <Author: luz3sgh > <Date: 2024/07/02 01:03:26 GMT >}
valid comment[ 1] @ avcline 1162: {ras('REG_VALUE', 'ANA_TRM_BG')}
valid comment[ 2] @ avcline 1275: {cmt: Set trim index to value 0 in range (0..15)}
valid comment[ 3] @ avcline 1476: {gac('I_BIAS_ACC_C[00]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 3] @ avcline 1476: {log('I_BIAS_ACC_C[00]', '', '', 0, 0)}
valid comment[ 4] @ avcline 1477: {cmt: Set trim index to value 1 in range (0..15)}
valid comment[ 5] @ avcline 1678: {gac('I_BIAS_ACC_C[01]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 5] @ avcline 1678: {log('I_BIAS_ACC_C[01]', '', '', 0, 0)}
valid comment[ 6] @ avcline 1679: {cmt: Set trim index to value 2 in range (0..15)}
valid comment[ 7] @ avcline 1880: {gac('I_BIAS_ACC_C[02]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 7] @ avcline 1880: {log('I_BIAS_ACC_C[02]', '', '', 0, 0)}
valid comment[ 8] @ avcline 1881: {cmt: Set trim index to value 3 in range (0..15)}
valid comment[ 9] @ avcline 2082: {gac('I_BIAS_ACC_C[03]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 9] @ avcline 2082: {log('I_BIAS_ACC_C[03]', '', '', 0, 0)}
valid comment[ 10] @ avcline 2083: {cmt: Set trim index to value 4 in range (0..15)}
valid comment[ 11] @ avcline 2284: {gac('I_BIAS_ACC_C[04]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 11] @ avcline 2284: {log('I_BIAS_ACC_C[04]', '', '', 0, 0)}
valid comment[ 12] @ avcline 2285: {cmt: Set trim index to value 5 in range (0..15)}
valid comment[ 13] @ avcline 2486: {gac('I_BIAS_ACC_C[05]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 13] @ avcline 2486: {log('I_BIAS_ACC_C[05]', '', '', 0, 0)}
valid comment[ 14] @ avcline 2487: {cmt: Set trim index to value 6 in range (0..15)}
valid comment[ 15] @ avcline 2688: {gac('I_BIAS_ACC_C[06]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 15] @ avcline 2688: {log('I_BIAS_ACC_C[06]', '', '', 0, 0)}
valid comment[ 16] @ avcline 2689: {cmt: Set trim index to value 7 in range (0..15)}
valid comment[ 17] @ avcline 2890: {gac('I_BIAS_ACC_C[07]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 17] @ avcline 2890: {log('I_BIAS_ACC_C[07]', '', '', 0, 0)}
valid comment[ 18] @ avcline 2891: {cmt: Set trim index to value 8 in range (0..15)}
valid comment[ 19] @ avcline 3092: {gac('I_BIAS_ACC_C[08]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 19] @ avcline 3092: {log('I_BIAS_ACC_C[08]', '', '', 0, 0)}
valid comment[ 20] @ avcline 3093: {cmt: Set trim index to value 9 in range (0..15)}
valid comment[ 21] @ avcline 3294: {gac('I_BIAS_ACC_C[09]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 21] @ avcline 3294: {log('I_BIAS_ACC_C[09]', '', '', 0, 0)}
valid comment[ 22] @ avcline 3295: {cmt: Set trim index to value 10 in range (0..15)}
valid comment[ 23] @ avcline 3496: {gac('I_BIAS_ACC_C[10]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 23] @ avcline 3496: {log('I_BIAS_ACC_C[10]', '', '', 0, 0)}
valid comment[ 24] @ avcline 3497: {cmt: Set trim index to value 11 in range (0..15)}
valid comment[ 25] @ avcline 3698: {gac('I_BIAS_ACC_C[11]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 25] @ avcline 3698: {log('I_BIAS_ACC_C[11]', '', '', 0, 0)}
valid comment[ 26] @ avcline 3699: {cmt: Set trim index to value 12 in range (0..15)}
valid comment[ 27] @ avcline 3900: {gac('I_BIAS_ACC_C[12]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 27] @ avcline 3900: {log('I_BIAS_ACC_C[12]', '', '', 0, 0)}
valid comment[ 28] @ avcline 3901: {cmt: Set trim index to value 13 in range (0..15)}
valid comment[ 29] @ avcline 4102: {gac('I_BIAS_ACC_C[13]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 29] @ avcline 4102: {log('I_BIAS_ACC_C[13]', '', '', 0, 0)}
valid comment[ 30] @ avcline 4103: {cmt: Set trim index to value 14 in range (0..15)}
valid comment[ 31] @ avcline 4304: {gac('I_BIAS_ACC_C[14]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 31] @ avcline 4304: {log('I_BIAS_ACC_C[14]', '', '', 0, 0)}
valid comment[ 32] @ avcline 4305: {cmt: Set trim index to value 15 in range (0..15)}
valid comment[ 33] @ avcline 4506: {gac('I_BIAS_ACC_C[15]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 33] @ avcline 4506: {log('I_BIAS_ACC_C[15]', '', '', 0, 0)}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.digCap("digcapid_0").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(1*16).execute();
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][3]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_C[00]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][5]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_C[01]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][7]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_C[02]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][9]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_C[03]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][11]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_C[04]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][13]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_C[05]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][15]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_C[06]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][17]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_C[07]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][19]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_C[08]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][21]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_C[09]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][23]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_C[10]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][25]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_C[11]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][27]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_C[12]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][29]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_C[13]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][31]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_C[14]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][33]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_C[15]', 'INT2', 2e-06, 0.0001, True)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(16); ad_jsubresults_INT2.init(-9.9);
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
aI_Captured_0[0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[0]);
i_REG_VALUE[curSite] = aI_Captured_0[0];
FuncPrint("REG_VALUE",i_REG_VALUE[curSite]);
for(int i=0; i<16; i++){
d_I_BIAS_ACC_C[curSite][i] = ad_jsubresults_INT2[0 + i];
FuncPrint("I_BIAS_ACC_C_" + rdi.itos(curSite) + "_"+ rdi.itos(i) ,d_I_BIAS_ACC_C[curSite][i]);
}
//Add calc code if necessary
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 4509: {wri('ANA_TRM_BG', 'REG_VALUE')}
valid comment[ 1] @ avcline 5548: {Test End: T10_18_ACC_Bias_Current_Char}
*/
static int i_vec_iposition1[32] = {
31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,
48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63
};
for (int i = 0; i < 32; i++)
{
i_vec_Num1[i] = i_vec_iposition1[i];
}
FOR_EACH_SITE_BEGIN();
i_WRITE_BACK[curSite] = Switch_High_Low_Bits_16Bits(i_REG_VALUE[curSite]);
Func_Vector_Dynamic_Write(s_splited_pat_name[1], "SDX", i_vec_Num1, 32, i_WRITE_BACK[curSite], 0, 2); //Notes. TEI check per project
FOR_EACH_SITE_END();
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.func().label(s_splited_pat_name[1]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
for(int i=0; i < 16; i++){
TestLog(s_Func_Test_Name_Add_2Num("I_BIAS_ACC_C_", i) ,d_I_BIAS_ACC_C[curSite][i]);
}
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T10_18_ACC_Bias_Current_Char_V3", T10_18_ACC_Bias_Current_Char_V3);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: GRY bandgap trimming
# Steps: 1. enable temp adc test mode
# 2. set ATM, measure VBGP1V21 refer to BGP_REFN
# 3. trim loop
#############################################################################################################
from test_sub_functions import *
cmt('Version info: $Revision: 4 $ $Author: hmf1rt $ $Date: 2024/04/24 07:06:10 GMT $')
wac('EXT_MODE', 0xc006) # Fcu page.
wcb('temp_mode',0x1) # FCU_TEST_CONF, temp always on
wcb('temp_test_odr',0x4) # FCU_TEST_CONF, set temp test ODR to 800
dly(320e-6)
# Config Buffer, TM_CONF
wac('EXT_MODE', 0xc00f) # Page Test, Reg TM_CONF
wcb('tm_buf_pwrup',0x1) # Enable TB1 only
wcb('tm_bus_inv',0x1) # Invert tset bus
# Config ANAIO pad, TM_PIN
wcb('tm_int2_en',0x1)
wcb('tm_int2_sel',0x2) # TB1OUT on anaio1
wcb('tm_asdx_en',0x1)
wcb('tm_asdx_sel',0x4) # TB2IN on anaio2
# Config CTB_P/N, TM_ADDR
wcb('tm_cfg', 0x8) # CTB_P is VBGP_REFN(local gnd), CTP_N is VBGP_1V21
wcb('tm_addr', 0xe)
# Trim loop
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x003f) # Set masking register
for n in range (0, 64, 1):
cmt('Set trim index to value {} in range (0..64)'.format(n))
wr('ANA_TRM_OSC', n) # ANA_TRM_OSC<7:0> gyr_trm_res_prog_bg
rac('ANA_TRM_OSC', n, 0x003f) # only <5:0> used for trimmming
uclk('ASCX')
bw('ASCX', 1)
dly(1352*74e-9)
cmt("TOI: The measurement needs to be done with an accuracy of +/- 1mV")
gav(f'V_BGP_G_RAW[{n:03d}]', 'INT2','ASDX')
calc(f'V_BGP_G[{n:03d}]', f'V_BGP_G_RAW[{n:03d}]','-', 'V_OFF1_ECON')
log(f'V_BGP_G[{n:03d}]')
ubw('ASCX')
clk('ASCX', 1/148e-9)
oti('N_OPT_VBGP_G', 'V_BGP_G', 1.21) # Select optimum trim index
log('N_OPT_VBGP_G')
otv('V_OPT_VBGP_G', 'V_BGP_G', 1.21) # Select optimum trim value
log('V_OPT_VBGP_G')
wri('ANA_TRM_OSC','N_OPT_VBGP_G')
ras('N_ANA_TRM_OSC_RD','ANA_TRM_OSC')
calc('N_OPT_VBGP_G_RD','N_ANA_TRM_OSC_RD','&',0x003f)
log('N_OPT_VBGP_G_RD')
cmt('The test item is a functional fail if N_OPT_VBGP_G_RD != N_OPT_VBGP_G')
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Clean
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
wac('EXT_MODE', 0xc006) # FCU page
wcb('temp_mode',0x0) # FCU_TEST_CONF
wcb('temp_test_odr',0x0) # FCU_TEST_CONF
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_21_gyr_bandgap_trimming_V4: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
INT split_pat_flag;
GET_USER_FLAG("split_pat_flag", &split_pat_flag);
vector<string> s_splited_pat_name;
const int split_count = 2; // Alarm:: split_count need manual confirm.
s_splited_pat_name.resize(split_count);
vector<int> i_comment_line[split_count];
static int N_OPT_VBGP_G_RD[xNSitES], N_OPT_VBGP_G[xNSitES];
static double V_BGP_G_RAW[xNSitES][64], V_BGP_G[xNSitES][64], V_OPT_VBGP_G[xNSitES];
ARRAY_LL N_OPT_VBGP_G_rtv(xNSitES);
const int Wri_Bit_Length = 33;
const int Wri_Bit_Position = 31;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
rdi.enableOre(oreFlag);
rdi.oreFile("./ORE_Files/rdi_ore_T10_21_GYR_BANDGAP_TRIMMING.xml");
GET_TESTSUITE_NAME(test_name);
if (split_pat_flag)
{
split_pattern(s_label_name,"wri",split_pat_flag,s_splited_pat_name);
}
else
{
for (int i = 0; i<split_count; i++)
{
s_splited_pat_name[i] = s_label_name + "_part" + rdi.itos(i);
i_comment_line[i] = search_comment_line(s_splited_pat_name[i]);
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
RDI_BEGIN(mode);
rdi.burstId("T10_21_gyr_bandgap_trimming_V4_PAT_id0");
for (int i=0; i<64; i++)
{
rdi.dc("T10_21_gyr_bandgap_trimming_V4DC_id0").label(s_splited_pat_name[0]).insertSub(i_comment_line[0][i]).pin("INT2,ASDX",TA::BADC).vMeas().average(128).measWait(1 ms).cont();
}
rdi.dc("T10_21_gyr_bandgap_trimming_V4DC_id0").execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
ARRAY_D JSUB_results_ASDX;
JSUB_results_ASDX = rdi.id("T10_21_gyr_bandgap_trimming_V4DC_id0").getMultiValue("ASDX");
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T10_21_gyr_bandgap_trimming_V4DC_id0").getMultiValue("INT2");
for (int i=0; i<64; i++)
{
V_BGP_G_RAW[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_INT2[i] - JSUB_results_ASDX[i];
V_BGP_G[CURRENT_SITE_NUMBER()-1][i] = V_BGP_G_RAW[CURRENT_SITE_NUMBER()-1][i] - V_OFF1_ECON[CURRENT_SITE_NUMBER()-1];
}
for (int i=0; i<64; i++)
{
FuncPrint("V_BGP_G_RAW_"+rdi.itos(i), V_BGP_G_RAW[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i=0; i<64; i++)
{
FuncPrint("V_BGP_G_"+rdi.itos(i), V_BGP_G[CURRENT_SITE_NUMBER()-1][i]);
}
N_OPT_VBGP_G[CURRENT_SITE_NUMBER()-1] = i_Func_Optimal_Trim_Val(V_BGP_G[CURRENT_SITE_NUMBER()-1], Target_T1021, 64);
V_OPT_VBGP_G[CURRENT_SITE_NUMBER()-1] = V_BGP_G[CURRENT_SITE_NUMBER()-1][N_OPT_VBGP_G[CURRENT_SITE_NUMBER()-1]];
FuncPrint("N_OPT_VBGP_G", N_OPT_VBGP_G[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_OPT_VBGP_G", V_OPT_VBGP_G[CURRENT_SITE_NUMBER()-1]);
N_OPT_VBGP_G_rtv[CURRENT_SITE_NUMBER()-1] = extend_Pmode_Herschel(N_OPT_VBGP_G[CURRENT_SITE_NUMBER()-1], 2);
FuncPrint("N_OPT_VBGP_G_rtv", N_OPT_VBGP_G_rtv[CURRENT_SITE_NUMBER()-1]);
FOR_EACH_SITE_END();
rdi.runTimeVal("N_OPT_VBGP_G_rtv", N_OPT_VBGP_G_rtv);
RDI_BEGIN(mode);
rdi.burstId("T10_21_gyr_bandgap_trimming_V4_PAT_id1");
rdi.digCap("T10_21_gyr_bandgap_trimming_V4_Digcap_id").vecVarOnly().pin("SDO").capMode(TA::SER).samples(16*1).bitPerWord(16).execute();
rdi.smartVec().label(s_splited_pat_name[1]).pin("SDX").writeData("N_OPT_VBGP_G_rtv", Wri_Bit_Length, Wri_Bit_Position).execute();
RDI_END();
}
ON_FIRST_INVOCATION_END();
ARRAY_I Vec=rdi.id("T10_21_gyr_bandgap_trimming_V4_Digcap_id").getVector();
N_OPT_VBGP_G_RD[CURRENT_SITE_NUMBER()-1] = reverse_ras_result(Vec[0]);
N_OPT_VBGP_G_RD[CURRENT_SITE_NUMBER()-1] = N_OPT_VBGP_G_RD[CURRENT_SITE_NUMBER()-1] & 63;
int Func_result0 = rdi.id("T10_21_gyr_bandgap_trimming_V4_PAT_id0").getBurstPassFail();
int Func_result1 = rdi.id("T10_21_gyr_bandgap_trimming_V4_PAT_id1").getBurstPassFail();
FuncPrint("Func_result0", Func_result0);
FuncPrint("Func_result1", Func_result1);
int Func_result = 1 * Func_result0 * Func_result1;
if (N_OPT_VBGP_G_RD[CURRENT_SITE_NUMBER()-1] != N_OPT_VBGP_G[CURRENT_SITE_NUMBER()-1]) Func_result=99;
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
for (int i=0; i<10; i++)
{
TestLog("V_BGP_G_0"+rdi.itos(i), V_BGP_G[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i=10; i<64; i++)
{
TestLog("V_BGP_G_"+rdi.itos(i), V_BGP_G[CURRENT_SITE_NUMBER()-1][i]);
}
TestLog("V_OPT_VBGP_G", V_OPT_VBGP_G[CURRENT_SITE_NUMBER()-1]);
TestLog("N_OPT_VBGP_G", N_OPT_VBGP_G[CURRENT_SITE_NUMBER()-1]);
TestLog("N_OPT_VBGP_G_RD", N_OPT_VBGP_G_RD[CURRENT_SITE_NUMBER()-1]);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_21_gyr_bandgap_trimming_V4", T10_21_gyr_bandgap_trimming_V4);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
# Config Buffer, TM_CONF
wac('EXT_MODE', 0xc00f) # Page Test, Reg TM_CONF
wcb('tm_buf_pwrup',0x1) # Enable TB1 only
wcb('tm_bus_inv',0x1) # Invert tset bus
# Config ANAIO pad, TM_PIN
wcb('tm_int2_en',0x1)
wcb('tm_int2_sel',0x2) # TB1OUT on anaio1
wcb('tm_asdx_en',0x1)
wcb('tm_asdx_sel',0x4) # TB2IN on anaio2
# Config CTB_P/N, TM_ADDR
wcb('tm_cfg', 0x8) # CTB_P is VBGP_REFN(local gnd), CTP_N is VBGP_1V21
wcb('tm_addr', 0xe)
# Measure Bandgap
dly(100e-6)
cmt("TOI: The measurement needs to be done with an accuracy of +/- 1mV")
gav('V_BGP_G_M_RAW', 'INT2','ASDX')
calc('V_BGP_G_M', 'V_BGP_G_M_RAW','-', 'V_OFF1_ECOFF')
log('V_BGP_G_M')
# Clean-up
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Reset test configuration
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_22_GYR_bandgap_measurement_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double V_BGP_G_M_RAW[xNSitES], V_BGP_G_M[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T10_22_GYR_bandgap_measurement_V2_PAT_id");
rdi.dc("T10_22_GYR_bandgap_measurement_V2DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("INT2,ASDX",TA::BADC).vMeas().average(128).measWait(1 ms) //V_BGP_G_M_RAW
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
ARRAY_D JSUB_results_ASDX;
JSUB_results_ASDX = rdi.id("T10_22_GYR_bandgap_measurement_V2DC_id0").getMultiValue("ASDX");
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T10_22_GYR_bandgap_measurement_V2DC_id0").getMultiValue("INT2");
V_BGP_G_M_RAW[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[0] - JSUB_results_ASDX[0];
V_BGP_G_M[CURRENT_SITE_NUMBER()-1] = V_BGP_G_M_RAW[CURRENT_SITE_NUMBER()-1] - V_OFF1_ECOFF[CURRENT_SITE_NUMBER()-1];
FuncPrint("JSUB_results_INT2", JSUB_results_INT2[0]);
FuncPrint("JSUB_results_ASDX", JSUB_results_ASDX[0]);
FuncPrint("V_BGP_G_M_RAW", V_BGP_G_M_RAW[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_BGP_G_M", V_BGP_G_M[CURRENT_SITE_NUMBER()-1]);
int Func_result = rdi.id("T10_22_GYR_bandgap_measurement_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("V_BGP_G_M", V_BGP_G_M[CURRENT_SITE_NUMBER()-1]);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_22_GYR_bandgap_measurement_V2", T10_22_GYR_bandgap_measurement_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: GYR bandgap characterization
# Characterization loop derived from T10_21_gyr_bandgap_trimming
# Steps: 1. enable temp adc test mode
# 2. set ATM, measure VBGP1V21 refer to BGP_REFN
# 3. Characterization loop
#############################################################################################################
#from test_sub_functions import *
cmt('Version info: $Revision: 3 $ $Author: luz3sgh $ $Date: 2024/07/02 01:44:18 GMT $')
# Config Buffer, TM_CONF
wac('EXT_MODE', 0xc00f) # Page Test, Reg TM_CONF
wcb('tm_buf_pwrup',0x1) # Enable TB1 only
wcb('tm_bus_inv',0x1) # Invert tset bus
# Config ANAIO pad, TM_PIN
wcb('tm_int2_en',0x1)
wcb('tm_int2_sel',0x2) # TB1OUT on anaio1
wcb('tm_asdx_en',0x1)
wcb('tm_asdx_sel',0x4) # TB2IN on anaio2
# Config CTB_P/N, TM_ADDR
wcb('tm_cfg', 0x8) # CTB_P is VBGP_REFN(local gnd), CTP_N is VBGP_1V21
wcb('tm_addr', 0xe)
# Characterization loop
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x003f) # Set masking register
ras('REG_VALUE', 'ANA_TRM_OSC') # Store the current value
for n in range (0, 64, 1):
cmt('Set trim index to value {} in range (0..64)'.format(n))
wr('ANA_TRM_OSC', n) # ANA_TRM_OSC<7:0> gyr_trm_res_prog_bg
rac('ANA_TRM_OSC', n, 0x003f) # loop only bits <5:0>
dly(100e-6)
cmt("TOI: The measurement needs to be done with an accuracy of +/- 1mV")
gav(f'V_BGP_G_C_RAW[{n:03d}]', 'INT2','ASDX')
calc(f'V_BGP_G_C[{n:03d}]', f'V_BGP_G_C_RAW[{n:03d}]','-', 'V_OFF1_ECOFF')
log(f'V_BGP_G_C[{n:03d}]')
dly(592e-9)
wri('ANA_TRM_OSC','REG_VALUE')
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Clean
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
wac('EXT_MODE', 0xc00a) # Page TEMP_DP,Reg TEMP_TEST_TADC, bit<0>
|
/*****************************************************
* T10_23_GYR_Bandgap_Char_V3, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH: fix some bugs.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_23_GYR_Bandgap_Char_V3: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 2;
vector<int> i_comment_line[i_split_count];
static int i_REG_VALUE[xNSitES];
ARRAY_I aI_Captured_0;
static double d_V_BGP_G_C_RAW[xNSitES][64];
static double V_BGP_G_C[xNSitES][64];
ARRAY_D ad_V_BGP_G_C_RAW;
static int i_WRITE_BACK[xNSitES];
static int i_vec_Num1[32] = {0};
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(i_REG_VALUE, 9, xNSitES);
//!"CTmsg: cut pattern to 2 parts @ oriAVCvecline [16499]
//!"CTmsg: cut pattern to 2 parts @ binarypatline [16489]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_23_GYR_Bandgap_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 3 > <Author: luz3sgh > <Date: 2024/07/02 01:44:18 GMT >}
valid comment[ 1] @ avcline 3386: {ras('REG_VALUE', 'ANA_TRM_OSC')}
valid comment[ 2] @ avcline 3499: {cmt: Set trim index to value 0 in range (0..64)}
valid comment[ 3] @ avcline 3701: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 3] @ avcline 3701: {gav('V_BGP_G_C_RAW[000]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 3] @ avcline 3701: {calc('V_BGP_G_C[000]', 'V_BGP_G_C_RAW[000]', '-', 'V_OFF1_ECOFF')}
valid comment[ 3] @ avcline 3701: {log('V_BGP_G_C[000]', '', '', 0, 0)}
valid comment[ 4] @ avcline 3702: {cmt: Set trim index to value 1 in range (0..64)}
valid comment[ 5] @ avcline 3904: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 5] @ avcline 3904: {gav('V_BGP_G_C_RAW[001]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 5] @ avcline 3904: {calc('V_BGP_G_C[001]', 'V_BGP_G_C_RAW[001]', '-', 'V_OFF1_ECOFF')}
valid comment[ 5] @ avcline 3904: {log('V_BGP_G_C[001]', '', '', 0, 0)}
valid comment[ 6] @ avcline 3905: {cmt: Set trim index to value 2 in range (0..64)}
valid comment[ 7] @ avcline 4107: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 7] @ avcline 4107: {gav('V_BGP_G_C_RAW[002]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 7] @ avcline 4107: {calc('V_BGP_G_C[002]', 'V_BGP_G_C_RAW[002]', '-', 'V_OFF1_ECOFF')}
valid comment[ 7] @ avcline 4107: {log('V_BGP_G_C[002]', '', '', 0, 0)}
valid comment[ 8] @ avcline 4108: {cmt: Set trim index to value 3 in range (0..64)}
valid comment[ 9] @ avcline 4310: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 9] @ avcline 4310: {gav('V_BGP_G_C_RAW[003]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 9] @ avcline 4310: {calc('V_BGP_G_C[003]', 'V_BGP_G_C_RAW[003]', '-', 'V_OFF1_ECOFF')}
valid comment[ 9] @ avcline 4310: {log('V_BGP_G_C[003]', '', '', 0, 0)}
valid comment[ 10] @ avcline 4311: {cmt: Set trim index to value 4 in range (0..64)}
valid comment[ 11] @ avcline 4513: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 11] @ avcline 4513: {gav('V_BGP_G_C_RAW[004]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 11] @ avcline 4513: {calc('V_BGP_G_C[004]', 'V_BGP_G_C_RAW[004]', '-', 'V_OFF1_ECOFF')}
valid comment[ 11] @ avcline 4513: {log('V_BGP_G_C[004]', '', '', 0, 0)}
valid comment[ 12] @ avcline 4514: {cmt: Set trim index to value 5 in range (0..64)}
valid comment[ 13] @ avcline 4716: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 13] @ avcline 4716: {gav('V_BGP_G_C_RAW[005]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 13] @ avcline 4716: {calc('V_BGP_G_C[005]', 'V_BGP_G_C_RAW[005]', '-', 'V_OFF1_ECOFF')}
valid comment[ 13] @ avcline 4716: {log('V_BGP_G_C[005]', '', '', 0, 0)}
valid comment[ 14] @ avcline 4717: {cmt: Set trim index to value 6 in range (0..64)}
valid comment[ 15] @ avcline 4919: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 15] @ avcline 4919: {gav('V_BGP_G_C_RAW[006]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 15] @ avcline 4919: {calc('V_BGP_G_C[006]', 'V_BGP_G_C_RAW[006]', '-', 'V_OFF1_ECOFF')}
valid comment[ 15] @ avcline 4919: {log('V_BGP_G_C[006]', '', '', 0, 0)}
valid comment[ 16] @ avcline 4920: {cmt: Set trim index to value 7 in range (0..64)}
valid comment[ 17] @ avcline 5122: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 17] @ avcline 5122: {gav('V_BGP_G_C_RAW[007]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 17] @ avcline 5122: {calc('V_BGP_G_C[007]', 'V_BGP_G_C_RAW[007]', '-', 'V_OFF1_ECOFF')}
valid comment[ 17] @ avcline 5122: {log('V_BGP_G_C[007]', '', '', 0, 0)}
valid comment[ 18] @ avcline 5123: {cmt: Set trim index to value 8 in range (0..64)}
valid comment[ 19] @ avcline 5325: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 19] @ avcline 5325: {gav('V_BGP_G_C_RAW[008]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 19] @ avcline 5325: {calc('V_BGP_G_C[008]', 'V_BGP_G_C_RAW[008]', '-', 'V_OFF1_ECOFF')}
valid comment[ 19] @ avcline 5325: {log('V_BGP_G_C[008]', '', '', 0, 0)}
valid comment[ 20] @ avcline 5326: {cmt: Set trim index to value 9 in range (0..64)}
valid comment[ 21] @ avcline 5528: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 21] @ avcline 5528: {gav('V_BGP_G_C_RAW[009]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 21] @ avcline 5528: {calc('V_BGP_G_C[009]', 'V_BGP_G_C_RAW[009]', '-', 'V_OFF1_ECOFF')}
valid comment[ 21] @ avcline 5528: {log('V_BGP_G_C[009]', '', '', 0, 0)}
valid comment[ 22] @ avcline 5529: {cmt: Set trim index to value 10 in range (0..64)}
valid comment[ 23] @ avcline 5731: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 23] @ avcline 5731: {gav('V_BGP_G_C_RAW[010]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 23] @ avcline 5731: {calc('V_BGP_G_C[010]', 'V_BGP_G_C_RAW[010]', '-', 'V_OFF1_ECOFF')}
valid comment[ 23] @ avcline 5731: {log('V_BGP_G_C[010]', '', '', 0, 0)}
valid comment[ 24] @ avcline 5732: {cmt: Set trim index to value 11 in range (0..64)}
valid comment[ 25] @ avcline 5934: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 25] @ avcline 5934: {gav('V_BGP_G_C_RAW[011]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 25] @ avcline 5934: {calc('V_BGP_G_C[011]', 'V_BGP_G_C_RAW[011]', '-', 'V_OFF1_ECOFF')}
valid comment[ 25] @ avcline 5934: {log('V_BGP_G_C[011]', '', '', 0, 0)}
valid comment[ 26] @ avcline 5935: {cmt: Set trim index to value 12 in range (0..64)}
valid comment[ 27] @ avcline 6137: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 27] @ avcline 6137: {gav('V_BGP_G_C_RAW[012]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 27] @ avcline 6137: {calc('V_BGP_G_C[012]', 'V_BGP_G_C_RAW[012]', '-', 'V_OFF1_ECOFF')}
valid comment[ 27] @ avcline 6137: {log('V_BGP_G_C[012]', '', '', 0, 0)}
valid comment[ 28] @ avcline 6138: {cmt: Set trim index to value 13 in range (0..64)}
valid comment[ 29] @ avcline 6340: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 29] @ avcline 6340: {gav('V_BGP_G_C_RAW[013]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 29] @ avcline 6340: {calc('V_BGP_G_C[013]', 'V_BGP_G_C_RAW[013]', '-', 'V_OFF1_ECOFF')}
valid comment[ 29] @ avcline 6340: {log('V_BGP_G_C[013]', '', '', 0, 0)}
valid comment[ 30] @ avcline 6341: {cmt: Set trim index to value 14 in range (0..64)}
valid comment[ 31] @ avcline 6543: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 31] @ avcline 6543: {gav('V_BGP_G_C_RAW[014]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 31] @ avcline 6543: {calc('V_BGP_G_C[014]', 'V_BGP_G_C_RAW[014]', '-', 'V_OFF1_ECOFF')}
valid comment[ 31] @ avcline 6543: {log('V_BGP_G_C[014]', '', '', 0, 0)}
valid comment[ 32] @ avcline 6544: {cmt: Set trim index to value 15 in range (0..64)}
valid comment[ 33] @ avcline 6746: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 33] @ avcline 6746: {gav('V_BGP_G_C_RAW[015]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 33] @ avcline 6746: {calc('V_BGP_G_C[015]', 'V_BGP_G_C_RAW[015]', '-', 'V_OFF1_ECOFF')}
valid comment[ 33] @ avcline 6746: {log('V_BGP_G_C[015]', '', '', 0, 0)}
valid comment[ 34] @ avcline 6747: {cmt: Set trim index to value 16 in range (0..64)}
valid comment[ 35] @ avcline 6949: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 35] @ avcline 6949: {gav('V_BGP_G_C_RAW[016]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 35] @ avcline 6949: {calc('V_BGP_G_C[016]', 'V_BGP_G_C_RAW[016]', '-', 'V_OFF1_ECOFF')}
valid comment[ 35] @ avcline 6949: {log('V_BGP_G_C[016]', '', '', 0, 0)}
valid comment[ 36] @ avcline 6950: {cmt: Set trim index to value 17 in range (0..64)}
valid comment[ 37] @ avcline 7152: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 37] @ avcline 7152: {gav('V_BGP_G_C_RAW[017]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 37] @ avcline 7152: {calc('V_BGP_G_C[017]', 'V_BGP_G_C_RAW[017]', '-', 'V_OFF1_ECOFF')}
valid comment[ 37] @ avcline 7152: {log('V_BGP_G_C[017]', '', '', 0, 0)}
valid comment[ 38] @ avcline 7153: {cmt: Set trim index to value 18 in range (0..64)}
valid comment[ 39] @ avcline 7355: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 39] @ avcline 7355: {gav('V_BGP_G_C_RAW[018]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 39] @ avcline 7355: {calc('V_BGP_G_C[018]', 'V_BGP_G_C_RAW[018]', '-', 'V_OFF1_ECOFF')}
valid comment[ 39] @ avcline 7355: {log('V_BGP_G_C[018]', '', '', 0, 0)}
valid comment[ 40] @ avcline 7356: {cmt: Set trim index to value 19 in range (0..64)}
valid comment[ 41] @ avcline 7558: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 41] @ avcline 7558: {gav('V_BGP_G_C_RAW[019]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 41] @ avcline 7558: {calc('V_BGP_G_C[019]', 'V_BGP_G_C_RAW[019]', '-', 'V_OFF1_ECOFF')}
valid comment[ 41] @ avcline 7558: {log('V_BGP_G_C[019]', '', '', 0, 0)}
valid comment[ 42] @ avcline 7559: {cmt: Set trim index to value 20 in range (0..64)}
valid comment[ 43] @ avcline 7761: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 43] @ avcline 7761: {gav('V_BGP_G_C_RAW[020]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 43] @ avcline 7761: {calc('V_BGP_G_C[020]', 'V_BGP_G_C_RAW[020]', '-', 'V_OFF1_ECOFF')}
valid comment[ 43] @ avcline 7761: {log('V_BGP_G_C[020]', '', '', 0, 0)}
valid comment[ 44] @ avcline 7762: {cmt: Set trim index to value 21 in range (0..64)}
valid comment[ 45] @ avcline 7964: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 45] @ avcline 7964: {gav('V_BGP_G_C_RAW[021]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 45] @ avcline 7964: {calc('V_BGP_G_C[021]', 'V_BGP_G_C_RAW[021]', '-', 'V_OFF1_ECOFF')}
valid comment[ 45] @ avcline 7964: {log('V_BGP_G_C[021]', '', '', 0, 0)}
valid comment[ 46] @ avcline 7965: {cmt: Set trim index to value 22 in range (0..64)}
valid comment[ 47] @ avcline 8167: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 47] @ avcline 8167: {gav('V_BGP_G_C_RAW[022]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 47] @ avcline 8167: {calc('V_BGP_G_C[022]', 'V_BGP_G_C_RAW[022]', '-', 'V_OFF1_ECOFF')}
valid comment[ 47] @ avcline 8167: {log('V_BGP_G_C[022]', '', '', 0, 0)}
valid comment[ 48] @ avcline 8168: {cmt: Set trim index to value 23 in range (0..64)}
valid comment[ 49] @ avcline 8370: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 49] @ avcline 8370: {gav('V_BGP_G_C_RAW[023]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 49] @ avcline 8370: {calc('V_BGP_G_C[023]', 'V_BGP_G_C_RAW[023]', '-', 'V_OFF1_ECOFF')}
valid comment[ 49] @ avcline 8370: {log('V_BGP_G_C[023]', '', '', 0, 0)}
valid comment[ 50] @ avcline 8371: {cmt: Set trim index to value 24 in range (0..64)}
valid comment[ 51] @ avcline 8573: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 51] @ avcline 8573: {gav('V_BGP_G_C_RAW[024]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 51] @ avcline 8573: {calc('V_BGP_G_C[024]', 'V_BGP_G_C_RAW[024]', '-', 'V_OFF1_ECOFF')}
valid comment[ 51] @ avcline 8573: {log('V_BGP_G_C[024]', '', '', 0, 0)}
valid comment[ 52] @ avcline 8574: {cmt: Set trim index to value 25 in range (0..64)}
valid comment[ 53] @ avcline 8776: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 53] @ avcline 8776: {gav('V_BGP_G_C_RAW[025]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 53] @ avcline 8776: {calc('V_BGP_G_C[025]', 'V_BGP_G_C_RAW[025]', '-', 'V_OFF1_ECOFF')}
valid comment[ 53] @ avcline 8776: {log('V_BGP_G_C[025]', '', '', 0, 0)}
valid comment[ 54] @ avcline 8777: {cmt: Set trim index to value 26 in range (0..64)}
valid comment[ 55] @ avcline 8979: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 55] @ avcline 8979: {gav('V_BGP_G_C_RAW[026]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 55] @ avcline 8979: {calc('V_BGP_G_C[026]', 'V_BGP_G_C_RAW[026]', '-', 'V_OFF1_ECOFF')}
valid comment[ 55] @ avcline 8979: {log('V_BGP_G_C[026]', '', '', 0, 0)}
valid comment[ 56] @ avcline 8980: {cmt: Set trim index to value 27 in range (0..64)}
valid comment[ 57] @ avcline 9182: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 57] @ avcline 9182: {gav('V_BGP_G_C_RAW[027]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 57] @ avcline 9182: {calc('V_BGP_G_C[027]', 'V_BGP_G_C_RAW[027]', '-', 'V_OFF1_ECOFF')}
valid comment[ 57] @ avcline 9182: {log('V_BGP_G_C[027]', '', '', 0, 0)}
valid comment[ 58] @ avcline 9183: {cmt: Set trim index to value 28 in range (0..64)}
valid comment[ 59] @ avcline 9385: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 59] @ avcline 9385: {gav('V_BGP_G_C_RAW[028]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 59] @ avcline 9385: {calc('V_BGP_G_C[028]', 'V_BGP_G_C_RAW[028]', '-', 'V_OFF1_ECOFF')}
valid comment[ 59] @ avcline 9385: {log('V_BGP_G_C[028]', '', '', 0, 0)}
valid comment[ 60] @ avcline 9386: {cmt: Set trim index to value 29 in range (0..64)}
valid comment[ 61] @ avcline 9588: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 61] @ avcline 9588: {gav('V_BGP_G_C_RAW[029]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 61] @ avcline 9588: {calc('V_BGP_G_C[029]', 'V_BGP_G_C_RAW[029]', '-', 'V_OFF1_ECOFF')}
valid comment[ 61] @ avcline 9588: {log('V_BGP_G_C[029]', '', '', 0, 0)}
valid comment[ 62] @ avcline 9589: {cmt: Set trim index to value 30 in range (0..64)}
valid comment[ 63] @ avcline 9791: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 63] @ avcline 9791: {gav('V_BGP_G_C_RAW[030]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 63] @ avcline 9791: {calc('V_BGP_G_C[030]', 'V_BGP_G_C_RAW[030]', '-', 'V_OFF1_ECOFF')}
valid comment[ 63] @ avcline 9791: {log('V_BGP_G_C[030]', '', '', 0, 0)}
valid comment[ 64] @ avcline 9792: {cmt: Set trim index to value 31 in range (0..64)}
valid comment[ 65] @ avcline 9994: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 65] @ avcline 9994: {gav('V_BGP_G_C_RAW[031]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 65] @ avcline 9994: {calc('V_BGP_G_C[031]', 'V_BGP_G_C_RAW[031]', '-', 'V_OFF1_ECOFF')}
valid comment[ 65] @ avcline 9994: {log('V_BGP_G_C[031]', '', '', 0, 0)}
valid comment[ 66] @ avcline 9995: {cmt: Set trim index to value 32 in range (0..64)}
valid comment[ 67] @ avcline 10197: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 67] @ avcline 10197: {gav('V_BGP_G_C_RAW[032]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 67] @ avcline 10197: {calc('V_BGP_G_C[032]', 'V_BGP_G_C_RAW[032]', '-', 'V_OFF1_ECOFF')}
valid comment[ 67] @ avcline 10197: {log('V_BGP_G_C[032]', '', '', 0, 0)}
valid comment[ 68] @ avcline 10198: {cmt: Set trim index to value 33 in range (0..64)}
valid comment[ 69] @ avcline 10400: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 69] @ avcline 10400: {gav('V_BGP_G_C_RAW[033]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 69] @ avcline 10400: {calc('V_BGP_G_C[033]', 'V_BGP_G_C_RAW[033]', '-', 'V_OFF1_ECOFF')}
valid comment[ 69] @ avcline 10400: {log('V_BGP_G_C[033]', '', '', 0, 0)}
valid comment[ 70] @ avcline 10401: {cmt: Set trim index to value 34 in range (0..64)}
valid comment[ 71] @ avcline 10603: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 71] @ avcline 10603: {gav('V_BGP_G_C_RAW[034]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 71] @ avcline 10603: {calc('V_BGP_G_C[034]', 'V_BGP_G_C_RAW[034]', '-', 'V_OFF1_ECOFF')}
valid comment[ 71] @ avcline 10603: {log('V_BGP_G_C[034]', '', '', 0, 0)}
valid comment[ 72] @ avcline 10604: {cmt: Set trim index to value 35 in range (0..64)}
valid comment[ 73] @ avcline 10806: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 73] @ avcline 10806: {gav('V_BGP_G_C_RAW[035]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 73] @ avcline 10806: {calc('V_BGP_G_C[035]', 'V_BGP_G_C_RAW[035]', '-', 'V_OFF1_ECOFF')}
valid comment[ 73] @ avcline 10806: {log('V_BGP_G_C[035]', '', '', 0, 0)}
valid comment[ 74] @ avcline 10807: {cmt: Set trim index to value 36 in range (0..64)}
valid comment[ 75] @ avcline 11009: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 75] @ avcline 11009: {gav('V_BGP_G_C_RAW[036]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 75] @ avcline 11009: {calc('V_BGP_G_C[036]', 'V_BGP_G_C_RAW[036]', '-', 'V_OFF1_ECOFF')}
valid comment[ 75] @ avcline 11009: {log('V_BGP_G_C[036]', '', '', 0, 0)}
valid comment[ 76] @ avcline 11010: {cmt: Set trim index to value 37 in range (0..64)}
valid comment[ 77] @ avcline 11212: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 77] @ avcline 11212: {gav('V_BGP_G_C_RAW[037]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 77] @ avcline 11212: {calc('V_BGP_G_C[037]', 'V_BGP_G_C_RAW[037]', '-', 'V_OFF1_ECOFF')}
valid comment[ 77] @ avcline 11212: {log('V_BGP_G_C[037]', '', '', 0, 0)}
valid comment[ 78] @ avcline 11213: {cmt: Set trim index to value 38 in range (0..64)}
valid comment[ 79] @ avcline 11415: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 79] @ avcline 11415: {gav('V_BGP_G_C_RAW[038]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 79] @ avcline 11415: {calc('V_BGP_G_C[038]', 'V_BGP_G_C_RAW[038]', '-', 'V_OFF1_ECOFF')}
valid comment[ 79] @ avcline 11415: {log('V_BGP_G_C[038]', '', '', 0, 0)}
valid comment[ 80] @ avcline 11416: {cmt: Set trim index to value 39 in range (0..64)}
valid comment[ 81] @ avcline 11618: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 81] @ avcline 11618: {gav('V_BGP_G_C_RAW[039]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 81] @ avcline 11618: {calc('V_BGP_G_C[039]', 'V_BGP_G_C_RAW[039]', '-', 'V_OFF1_ECOFF')}
valid comment[ 81] @ avcline 11618: {log('V_BGP_G_C[039]', '', '', 0, 0)}
valid comment[ 82] @ avcline 11619: {cmt: Set trim index to value 40 in range (0..64)}
valid comment[ 83] @ avcline 11821: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 83] @ avcline 11821: {gav('V_BGP_G_C_RAW[040]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 83] @ avcline 11821: {calc('V_BGP_G_C[040]', 'V_BGP_G_C_RAW[040]', '-', 'V_OFF1_ECOFF')}
valid comment[ 83] @ avcline 11821: {log('V_BGP_G_C[040]', '', '', 0, 0)}
valid comment[ 84] @ avcline 11822: {cmt: Set trim index to value 41 in range (0..64)}
valid comment[ 85] @ avcline 12024: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 85] @ avcline 12024: {gav('V_BGP_G_C_RAW[041]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 85] @ avcline 12024: {calc('V_BGP_G_C[041]', 'V_BGP_G_C_RAW[041]', '-', 'V_OFF1_ECOFF')}
valid comment[ 85] @ avcline 12024: {log('V_BGP_G_C[041]', '', '', 0, 0)}
valid comment[ 86] @ avcline 12025: {cmt: Set trim index to value 42 in range (0..64)}
valid comment[ 87] @ avcline 12227: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 87] @ avcline 12227: {gav('V_BGP_G_C_RAW[042]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 87] @ avcline 12227: {calc('V_BGP_G_C[042]', 'V_BGP_G_C_RAW[042]', '-', 'V_OFF1_ECOFF')}
valid comment[ 87] @ avcline 12227: {log('V_BGP_G_C[042]', '', '', 0, 0)}
valid comment[ 88] @ avcline 12228: {cmt: Set trim index to value 43 in range (0..64)}
valid comment[ 89] @ avcline 12430: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 89] @ avcline 12430: {gav('V_BGP_G_C_RAW[043]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 89] @ avcline 12430: {calc('V_BGP_G_C[043]', 'V_BGP_G_C_RAW[043]', '-', 'V_OFF1_ECOFF')}
valid comment[ 89] @ avcline 12430: {log('V_BGP_G_C[043]', '', '', 0, 0)}
valid comment[ 90] @ avcline 12431: {cmt: Set trim index to value 44 in range (0..64)}
valid comment[ 91] @ avcline 12633: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 91] @ avcline 12633: {gav('V_BGP_G_C_RAW[044]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 91] @ avcline 12633: {calc('V_BGP_G_C[044]', 'V_BGP_G_C_RAW[044]', '-', 'V_OFF1_ECOFF')}
valid comment[ 91] @ avcline 12633: {log('V_BGP_G_C[044]', '', '', 0, 0)}
valid comment[ 92] @ avcline 12634: {cmt: Set trim index to value 45 in range (0..64)}
valid comment[ 93] @ avcline 12836: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 93] @ avcline 12836: {gav('V_BGP_G_C_RAW[045]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 93] @ avcline 12836: {calc('V_BGP_G_C[045]', 'V_BGP_G_C_RAW[045]', '-', 'V_OFF1_ECOFF')}
valid comment[ 93] @ avcline 12836: {log('V_BGP_G_C[045]', '', '', 0, 0)}
valid comment[ 94] @ avcline 12837: {cmt: Set trim index to value 46 in range (0..64)}
valid comment[ 95] @ avcline 13039: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 95] @ avcline 13039: {gav('V_BGP_G_C_RAW[046]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 95] @ avcline 13039: {calc('V_BGP_G_C[046]', 'V_BGP_G_C_RAW[046]', '-', 'V_OFF1_ECOFF')}
valid comment[ 95] @ avcline 13039: {log('V_BGP_G_C[046]', '', '', 0, 0)}
valid comment[ 96] @ avcline 13040: {cmt: Set trim index to value 47 in range (0..64)}
valid comment[ 97] @ avcline 13242: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 97] @ avcline 13242: {gav('V_BGP_G_C_RAW[047]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 97] @ avcline 13242: {calc('V_BGP_G_C[047]', 'V_BGP_G_C_RAW[047]', '-', 'V_OFF1_ECOFF')}
valid comment[ 97] @ avcline 13242: {log('V_BGP_G_C[047]', '', '', 0, 0)}
valid comment[ 98] @ avcline 13243: {cmt: Set trim index to value 48 in range (0..64)}
valid comment[ 99] @ avcline 13445: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[ 99] @ avcline 13445: {gav('V_BGP_G_C_RAW[048]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 99] @ avcline 13445: {calc('V_BGP_G_C[048]', 'V_BGP_G_C_RAW[048]', '-', 'V_OFF1_ECOFF')}
valid comment[ 99] @ avcline 13445: {log('V_BGP_G_C[048]', '', '', 0, 0)}
valid comment[100] @ avcline 13446: {cmt: Set trim index to value 49 in range (0..64)}
valid comment[101] @ avcline 13648: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[101] @ avcline 13648: {gav('V_BGP_G_C_RAW[049]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[101] @ avcline 13648: {calc('V_BGP_G_C[049]', 'V_BGP_G_C_RAW[049]', '-', 'V_OFF1_ECOFF')}
valid comment[101] @ avcline 13648: {log('V_BGP_G_C[049]', '', '', 0, 0)}
valid comment[102] @ avcline 13649: {cmt: Set trim index to value 50 in range (0..64)}
valid comment[103] @ avcline 13851: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[103] @ avcline 13851: {gav('V_BGP_G_C_RAW[050]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[103] @ avcline 13851: {calc('V_BGP_G_C[050]', 'V_BGP_G_C_RAW[050]', '-', 'V_OFF1_ECOFF')}
valid comment[103] @ avcline 13851: {log('V_BGP_G_C[050]', '', '', 0, 0)}
valid comment[104] @ avcline 13852: {cmt: Set trim index to value 51 in range (0..64)}
valid comment[105] @ avcline 14054: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[105] @ avcline 14054: {gav('V_BGP_G_C_RAW[051]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[105] @ avcline 14054: {calc('V_BGP_G_C[051]', 'V_BGP_G_C_RAW[051]', '-', 'V_OFF1_ECOFF')}
valid comment[105] @ avcline 14054: {log('V_BGP_G_C[051]', '', '', 0, 0)}
valid comment[106] @ avcline 14055: {cmt: Set trim index to value 52 in range (0..64)}
valid comment[107] @ avcline 14257: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[107] @ avcline 14257: {gav('V_BGP_G_C_RAW[052]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[107] @ avcline 14257: {calc('V_BGP_G_C[052]', 'V_BGP_G_C_RAW[052]', '-', 'V_OFF1_ECOFF')}
valid comment[107] @ avcline 14257: {log('V_BGP_G_C[052]', '', '', 0, 0)}
valid comment[108] @ avcline 14258: {cmt: Set trim index to value 53 in range (0..64)}
valid comment[109] @ avcline 14460: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[109] @ avcline 14460: {gav('V_BGP_G_C_RAW[053]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[109] @ avcline 14460: {calc('V_BGP_G_C[053]', 'V_BGP_G_C_RAW[053]', '-', 'V_OFF1_ECOFF')}
valid comment[109] @ avcline 14460: {log('V_BGP_G_C[053]', '', '', 0, 0)}
valid comment[110] @ avcline 14461: {cmt: Set trim index to value 54 in range (0..64)}
valid comment[111] @ avcline 14663: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[111] @ avcline 14663: {gav('V_BGP_G_C_RAW[054]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[111] @ avcline 14663: {calc('V_BGP_G_C[054]', 'V_BGP_G_C_RAW[054]', '-', 'V_OFF1_ECOFF')}
valid comment[111] @ avcline 14663: {log('V_BGP_G_C[054]', '', '', 0, 0)}
valid comment[112] @ avcline 14664: {cmt: Set trim index to value 55 in range (0..64)}
valid comment[113] @ avcline 14866: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[113] @ avcline 14866: {gav('V_BGP_G_C_RAW[055]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[113] @ avcline 14866: {calc('V_BGP_G_C[055]', 'V_BGP_G_C_RAW[055]', '-', 'V_OFF1_ECOFF')}
valid comment[113] @ avcline 14866: {log('V_BGP_G_C[055]', '', '', 0, 0)}
valid comment[114] @ avcline 14867: {cmt: Set trim index to value 56 in range (0..64)}
valid comment[115] @ avcline 15069: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[115] @ avcline 15069: {gav('V_BGP_G_C_RAW[056]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[115] @ avcline 15069: {calc('V_BGP_G_C[056]', 'V_BGP_G_C_RAW[056]', '-', 'V_OFF1_ECOFF')}
valid comment[115] @ avcline 15069: {log('V_BGP_G_C[056]', '', '', 0, 0)}
valid comment[116] @ avcline 15070: {cmt: Set trim index to value 57 in range (0..64)}
valid comment[117] @ avcline 15272: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[117] @ avcline 15272: {gav('V_BGP_G_C_RAW[057]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[117] @ avcline 15272: {calc('V_BGP_G_C[057]', 'V_BGP_G_C_RAW[057]', '-', 'V_OFF1_ECOFF')}
valid comment[117] @ avcline 15272: {log('V_BGP_G_C[057]', '', '', 0, 0)}
valid comment[118] @ avcline 15273: {cmt: Set trim index to value 58 in range (0..64)}
valid comment[119] @ avcline 15475: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[119] @ avcline 15475: {gav('V_BGP_G_C_RAW[058]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[119] @ avcline 15475: {calc('V_BGP_G_C[058]', 'V_BGP_G_C_RAW[058]', '-', 'V_OFF1_ECOFF')}
valid comment[119] @ avcline 15475: {log('V_BGP_G_C[058]', '', '', 0, 0)}
valid comment[120] @ avcline 15476: {cmt: Set trim index to value 59 in range (0..64)}
valid comment[121] @ avcline 15678: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[121] @ avcline 15678: {gav('V_BGP_G_C_RAW[059]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[121] @ avcline 15678: {calc('V_BGP_G_C[059]', 'V_BGP_G_C_RAW[059]', '-', 'V_OFF1_ECOFF')}
valid comment[121] @ avcline 15678: {log('V_BGP_G_C[059]', '', '', 0, 0)}
valid comment[122] @ avcline 15679: {cmt: Set trim index to value 60 in range (0..64)}
valid comment[123] @ avcline 15881: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[123] @ avcline 15881: {gav('V_BGP_G_C_RAW[060]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[123] @ avcline 15881: {calc('V_BGP_G_C[060]', 'V_BGP_G_C_RAW[060]', '-', 'V_OFF1_ECOFF')}
valid comment[123] @ avcline 15881: {log('V_BGP_G_C[060]', '', '', 0, 0)}
valid comment[124] @ avcline 15882: {cmt: Set trim index to value 61 in range (0..64)}
valid comment[125] @ avcline 16084: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[125] @ avcline 16084: {gav('V_BGP_G_C_RAW[061]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[125] @ avcline 16084: {calc('V_BGP_G_C[061]', 'V_BGP_G_C_RAW[061]', '-', 'V_OFF1_ECOFF')}
valid comment[125] @ avcline 16084: {log('V_BGP_G_C[061]', '', '', 0, 0)}
valid comment[126] @ avcline 16085: {cmt: Set trim index to value 62 in range (0..64)}
valid comment[127] @ avcline 16287: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[127] @ avcline 16287: {gav('V_BGP_G_C_RAW[062]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[127] @ avcline 16287: {calc('V_BGP_G_C[062]', 'V_BGP_G_C_RAW[062]', '-', 'V_OFF1_ECOFF')}
valid comment[127] @ avcline 16287: {log('V_BGP_G_C[062]', '', '', 0, 0)}
valid comment[128] @ avcline 16288: {cmt: Set trim index to value 63 in range (0..64)}
valid comment[129] @ avcline 16490: {cmt: TOI: The measurement needs to be done with an accuracy of +/- 1mV}
valid comment[129] @ avcline 16490: {gav('V_BGP_G_C_RAW[063]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[129] @ avcline 16490: {calc('V_BGP_G_C[063]', 'V_BGP_G_C_RAW[063]', '-', 'V_OFF1_ECOFF')}
valid comment[129] @ avcline 16490: {log('V_BGP_G_C[063]', '', '', 0, 0)}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.digCap("digcapid_0").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(1*16).execute();
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][3]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_000//{gav('V_BGP_G_C_RAW[000]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][5]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_001//{gav('V_BGP_G_C_RAW[001]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][7]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_002//{gav('V_BGP_G_C_RAW[002]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][9]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_003//{gav('V_BGP_G_C_RAW[003]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][11]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_004//{gav('V_BGP_G_C_RAW[004]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][13]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_005//{gav('V_BGP_G_C_RAW[005]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][15]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_006//{gav('V_BGP_G_C_RAW[006]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][17]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_007//{gav('V_BGP_G_C_RAW[007]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][19]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_008//{gav('V_BGP_G_C_RAW[008]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][21]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_009//{gav('V_BGP_G_C_RAW[009]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][23]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_010//{gav('V_BGP_G_C_RAW[010]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][25]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_011//{gav('V_BGP_G_C_RAW[011]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][27]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_012//{gav('V_BGP_G_C_RAW[012]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][29]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_013//{gav('V_BGP_G_C_RAW[013]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][31]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_014//{gav('V_BGP_G_C_RAW[014]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][33]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_015//{gav('V_BGP_G_C_RAW[015]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][35]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_016//{gav('V_BGP_G_C_RAW[016]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][37]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_017//{gav('V_BGP_G_C_RAW[017]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][39]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_018//{gav('V_BGP_G_C_RAW[018]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][41]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_019//{gav('V_BGP_G_C_RAW[019]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][43]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_020//{gav('V_BGP_G_C_RAW[020]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][45]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_021//{gav('V_BGP_G_C_RAW[021]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][47]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_022//{gav('V_BGP_G_C_RAW[022]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][49]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_023//{gav('V_BGP_G_C_RAW[023]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][51]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_024//{gav('V_BGP_G_C_RAW[024]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][53]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_025//{gav('V_BGP_G_C_RAW[025]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][55]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_026//{gav('V_BGP_G_C_RAW[026]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][57]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_027//{gav('V_BGP_G_C_RAW[027]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][59]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_028//{gav('V_BGP_G_C_RAW[028]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][61]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_029//{gav('V_BGP_G_C_RAW[029]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][63]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_030//{gav('V_BGP_G_C_RAW[030]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][65]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_031//{gav('V_BGP_G_C_RAW[031]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][67]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_032//{gav('V_BGP_G_C_RAW[032]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][69]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_033//{gav('V_BGP_G_C_RAW[033]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][71]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_034//{gav('V_BGP_G_C_RAW[034]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][73]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_035//{gav('V_BGP_G_C_RAW[035]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][75]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_036//{gav('V_BGP_G_C_RAW[036]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][77]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_037//{gav('V_BGP_G_C_RAW[037]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][79]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_038//{gav('V_BGP_G_C_RAW[038]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][81]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_039//{gav('V_BGP_G_C_RAW[039]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][83]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_040//{gav('V_BGP_G_C_RAW[040]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][85]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_041//{gav('V_BGP_G_C_RAW[041]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][87]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_042//{gav('V_BGP_G_C_RAW[042]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][89]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_043//{gav('V_BGP_G_C_RAW[043]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][91]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_044//{gav('V_BGP_G_C_RAW[044]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][93]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_045//{gav('V_BGP_G_C_RAW[045]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][95]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_046//{gav('V_BGP_G_C_RAW[046]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][97]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_047//{gav('V_BGP_G_C_RAW[047]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][99]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_048//{gav('V_BGP_G_C_RAW[048]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][101]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_049//{gav('V_BGP_G_C_RAW[049]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][103]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_050//{gav('V_BGP_G_C_RAW[050]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][105]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_051//{gav('V_BGP_G_C_RAW[051]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][107]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_052//{gav('V_BGP_G_C_RAW[052]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][109]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_053//{gav('V_BGP_G_C_RAW[053]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][111]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_054//{gav('V_BGP_G_C_RAW[054]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][113]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_055//{gav('V_BGP_G_C_RAW[055]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][115]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_056//{gav('V_BGP_G_C_RAW[056]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][117]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_057//{gav('V_BGP_G_C_RAW[057]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][119]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_058//{gav('V_BGP_G_C_RAW[058]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][121]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_059//{gav('V_BGP_G_C_RAW[059]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][123]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_060//{gav('V_BGP_G_C_RAW[060]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][125]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_061//{gav('V_BGP_G_C_RAW[061]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][127]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_062//{gav('V_BGP_G_C_RAW[062]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][129]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_BGP_G_C_RAW_063//{gav('V_BGP_G_C_RAW[063]', 'INT2', 'ASDX', 2, 0.0001, True)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(64); ad_jsubresults_INT2.init(-9.9);
ARRAY_D ad_jsubresults_ASDX; ad_jsubresults_ASDX.resize(64); ad_jsubresults_ASDX.init(-9.9);
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
ad_jsubresults_ASDX = rdi.id("dcid_0").getMultiValue("ASDX");
aI_Captured_0[0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[0]);
i_REG_VALUE[curSite] = aI_Captured_0[0];
FuncPrint("REG_VALUE",i_REG_VALUE[curSite]);
for(int i=0; i<64; i++){
d_V_BGP_G_C_RAW[curSite][i] = ad_jsubresults_INT2[0 + i] - ad_jsubresults_ASDX[0 + i];
FuncPrint("V_BGP_G_C_RAW_" + rdi.itos(curSite) + "_"+ rdi.itos(i) ,d_V_BGP_G_C_RAW[curSite][i]);
V_BGP_G_C[curSite][i] = d_V_BGP_G_C_RAW[curSite][i] - V_OFF1_ECOFF[curSite];
FuncPrint(s_Func_Test_Name_Add_2Num("V_BGP_G_C_",i), V_BGP_G_C[curSite][i]);
}
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 16499: {wri('ANA_TRM_OSC', 'REG_VALUE')}
valid comment[ 1] @ avcline 17730: {Test End: T10_23_GYR_Bandgap_Char}
*/
static int i_vec_iposition1[32] = {
31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,
48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63
};
for (int i = 0; i < 32; i++)
{
i_vec_Num1[i] = i_vec_iposition1[i];
}
FOR_EACH_SITE_BEGIN();
i_WRITE_BACK[curSite] = Switch_High_Low_Bits_16Bits(i_REG_VALUE[curSite]);
Func_Vector_Dynamic_Write(s_splited_pat_name[1], "SDX", i_vec_Num1, 32, i_WRITE_BACK[curSite], 0, 2); //Notes. TEI check per project
//TODO pl.TEI check position & mask
FOR_EACH_SITE_END();
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.func().label(s_splited_pat_name[1]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
FuncPrint("REG_VALUE", i_REG_VALUE[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
for(int i=0; i < 64; i++){
TestLog(s_Func_Test_Name_Add_2Num("V_BGP_G_C_",i), V_BGP_G_C[curSite][i]);
}
// TestLog("REG_VALUE", i_REG_VALUE[curSite]);
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T10_23_GYR_Bandgap_Char_V3", T10_23_GYR_Bandgap_Char_V3);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: VDDG LDO trimming, VDDG, typ 1.5V
#############################################################################################################
from test_sub_functions import *
cmt('Version info: $Revision: 4 $ $Author: hmf1rt $ $Date: 2024/04/24 11:24:19 GMT $')
wac('EXT_MODE', 0xc006) # Fcu page.
wcb('temp_mode',0x1) # FCU_TEST_CONF, temp always on
wcb('temp_test_odr',0x4) # FCU_TEST_CONF, set temp test ODR to 800
dly(320e-6)
# Overwrite power up signal
wac('EXT_MODE',0xc00d) # Page Test, Reg PMU
wcb('owr_vddg_en',0x1)
wcb('gyr_owr_en',0x1)
dly(100e-6)
# Config Buffer, TM_CONF
wac('EXT_MODE', 0xc00f) # Page Test, Reg TM_CONF
wcb('tm_buf_pwrup',0x1) # Enable TB1 only
wcb('tm_bus_inv',0x1) # Invert tset bus
# Config ANAIO pad, TM_PIN
wcb('tm_int2_en',0x1)
wcb('tm_int2_sel',0x2) # TB1OUT on anaio1
wcb('tm_asdx_en',0x1)
wcb('tm_asdx_sel',0x4) # TB2IN on anaio2
# Config CTB_P/N, TM_ADDR
wcb('tm_cfg', 0xb) # VSSG(local gnd)@CTP_P, VDDG@CTP_N
wcb('tm_addr', 0xd) # COM_TIO_PWR, Signal :TM_PWRBLOCK_EN
# Trim loop
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x07c0) # Set masking register
for n in range (0, 32, 1):
cmt('Set trim index to value {} in range (0..31)'.format(n))
wr('ANA_TRM_RES_PROG0', n*2**6) # ANA_TRM_RES_PROG0<10:6> gyr_trm_res_prog_ldo_a
rac('ANA_TRM_RES_PROG0', n*2**6, 0x07c0)
uclk('ASCX')
bw('ASCX', 1)
dly(1352*74e-9)
gav(f'V_VDDG_LDO_RAW[{n:03d}]', 'INT2','ASDX')
calc(f'V_VDDG_LDO[{n:03d}]', f'V_VDDG_LDO_RAW[{n:03d}]','-', 'V_OFF1_ECON')
log(f'V_VDDG_LDO[{n:03d}]')
ubw('ASCX')
clk('ASCX', 1/148e-9)
oti('N_OPT_VDDG_LDO', 'V_VDDG_LDO', 1.52, criteria='gt') # Select optimum trim index
log('N_OPT_VDDG_LDO')
otv('V_OPT_VDDG_LDO', 'V_VDDG_LDO', 1.52, criteria='gt') # Select optimum trim value
log('V_OPT_VDDG_LDO')
calc('N_ANA_TRM_RES_PROG0_WR','N_OPT_VDDG_LDO','<<',6)
wri('ANA_TRM_RES_PROG0', 'N_ANA_TRM_RES_PROG0_WR')
ras('N_ANA_TRM_RES_PROG0_RD', 'ANA_TRM_RES_PROG0')
calc('N_ANA_TRM_RES_PROG0_10_6','N_ANA_TRM_RES_PROG0_RD','&',0x07c0)
calc('N_OPT_VDDG_LDO_RD','N_ANA_TRM_RES_PROG0_10_6','>>',6)
cmt('The test item is a functional fail if N_OPT_VDDG_LDO_RD != N_OPT_VDDG_LDO')
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Clean
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
wac('EXT_MODE',0xc00d) # Page Test, Reg PMU
wcb('owr_vddg_en',0x0) # GYR_TEST_OWR1 bit10
wcb('gyr_owr_en',0x0) # GYR_TEST_OWR1 bit0
wac('EXT_MODE', 0xc006)
wcb('temp_mode',0x0) # FCU page, FCU_TEST_CONF
wcb('temp_test_odr',0x0) # FCU page, FCU_TEST_CONF
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_24_vddg_ldo_trimming_V4: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
INT split_pat_flag;
GET_USER_FLAG("split_pat_flag", &split_pat_flag);
vector<string> s_splited_pat_name;
const int split_count = 2; // Alarm:: split_count need manual confirm.
s_splited_pat_name.resize(split_count);
vector<int> i_comment_line[split_count];
static int N_ANA_TRM_RES_PROG0_RD[xNSitES], N_OPT_VDDG_LDO[xNSitES], N_ANA_TRM_RES_PROG0_WR[xNSitES], N_ANA_TRM_RES_PROG0_10_6[xNSitES], N_OPT_VDDG_LDO_RD[xNSitES];
static double V_VDDG_LDO_RAW[xNSitES][32], V_VDDG_LDO[xNSitES][32], V_OPT_VDDG_LDO[xNSitES];
ARRAY_LL N_ANA_TRM_RES_PROG0_WR_rtv(xNSitES);
const int Wri_Bit_Length = 33;
const int Wri_Bit_Position = 31;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
rdi.enableOre(oreFlag);
rdi.oreFile("./ORE_Files/rdi_ore_T10_24_VDDG_LDO_TRIMMING.xml");
GET_TESTSUITE_NAME(test_name);
if (split_pat_flag)
{
split_pattern(s_label_name,"wri",split_pat_flag,s_splited_pat_name);
}
else
{
for (int i = 0; i<split_count; i++)
{
s_splited_pat_name[i] = s_label_name + "_part" + rdi.itos(i);
i_comment_line[i] = search_comment_line(s_splited_pat_name[i]);
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
RDI_BEGIN(mode);
rdi.burstId("T10_24_vddg_ldo_trimming_V4_PAT_id0");
for (int i = 0; i<32; i++)
{
rdi.dc("T10_24_vddg_ldo_trimming_V4DC_id0").label(s_splited_pat_name[0]).insertSub(i_comment_line[0][i]).pin("INT2,ASDX",TA::BADC).vMeas().average(128).measWait(1 ms).cont(); //V_VDDG_LDO_RAW[i]
}
rdi.dc("T10_24_vddg_ldo_trimming_V4DC_id0").execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
ARRAY_D JSUB_results_ASDX;
JSUB_results_ASDX = rdi.id("T10_24_vddg_ldo_trimming_V4DC_id0").getMultiValue("ASDX");
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T10_24_vddg_ldo_trimming_V4DC_id0").getMultiValue("INT2");
for (int i = 0; i<32; i++)
{
V_VDDG_LDO_RAW[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_INT2[i] - JSUB_results_ASDX[i];
V_VDDG_LDO[CURRENT_SITE_NUMBER()-1][i] = V_VDDG_LDO_RAW[CURRENT_SITE_NUMBER()-1][i] - V_OFF1_ECON[CURRENT_SITE_NUMBER()-1];
}
for (int i = 0; i<32; i++)
{
FuncPrint("V_VDDG_LDO_RAW_"+rdi.itos(i), V_VDDG_LDO_RAW[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i = 0; i<32; i++)
{
FuncPrint("V_VDDG_LDO_"+rdi.itos(i), V_VDDG_LDO[CURRENT_SITE_NUMBER()-1][i]);
}
N_OPT_VDDG_LDO[CURRENT_SITE_NUMBER()-1] = i_Func_Optimal_Trim_Val(V_VDDG_LDO[CURRENT_SITE_NUMBER()-1], Target_T1024, 32, "bigger");
V_OPT_VDDG_LDO[CURRENT_SITE_NUMBER()-1] = V_VDDG_LDO[CURRENT_SITE_NUMBER()-1][N_OPT_VDDG_LDO[CURRENT_SITE_NUMBER()-1]];
// calc('N_ANA_TRM_RES_PROG0_WR','N_OPT_VDDG_LDO','<<',6)
// wri('ANA_TRM_RES_PROG0', 'N_ANA_TRM_RES_PROG0_WR')
// ras('N_ANA_TRM_RES_PROG0_RD', 'ANA_TRM_RES_PROG0')
// calc('N_ANA_TRM_RES_PROG0_10_6','N_ANA_TRM_RES_PROG0_RD','&',0x07c0)
// calc('N_OPT_VDDG_LDO_RD','N_ANA_TRM_RES_PROG0_10_6','>>',6)
// cmt('The test item is a functional fail if N_OPT_VDDG_LDO_RD != N_OPT_VDDG_LDO')
N_ANA_TRM_RES_PROG0_WR[CURRENT_SITE_NUMBER()-1] = N_OPT_VDDG_LDO[CURRENT_SITE_NUMBER()-1] << 6;
FuncPrint("N_OPT_VDDG_LDO", N_OPT_VDDG_LDO[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_OPT_VDDG_LDO", V_OPT_VDDG_LDO[CURRENT_SITE_NUMBER()-1]);
FuncPrint("N_ANA_TRM_RES_PROG0_WR", N_ANA_TRM_RES_PROG0_WR[CURRENT_SITE_NUMBER()-1]);
N_ANA_TRM_RES_PROG0_WR_rtv[CURRENT_SITE_NUMBER()-1] = extend_Pmode_Herschel(N_ANA_TRM_RES_PROG0_WR[CURRENT_SITE_NUMBER()-1], 2);
FuncPrint("N_ANA_TRM_RES_PROG0_WR_rtv", N_ANA_TRM_RES_PROG0_WR_rtv[CURRENT_SITE_NUMBER()-1]);
FOR_EACH_SITE_END();
rdi.runTimeVal("N_ANA_TRM_RES_PROG0_WR_rtv", N_ANA_TRM_RES_PROG0_WR_rtv);
RDI_BEGIN(mode);
rdi.burstId("T10_24_vddg_ldo_trimming_V4_PAT_id1");
rdi.digCap("T10_24_vddg_ldo_trimming_V4_Digcap_id").vecVarOnly().pin("SDO").capMode(TA::SER).samples(16*1).bitPerWord(16).execute();
rdi.smartVec().label(s_splited_pat_name[1]).pin("SDX").writeData("N_ANA_TRM_RES_PROG0_WR_rtv", Wri_Bit_Length, Wri_Bit_Position).execute();
RDI_END();
}
ON_FIRST_INVOCATION_END();
ARRAY_I Vec=rdi.id("T10_24_vddg_ldo_trimming_V4_Digcap_id").getVector();
N_ANA_TRM_RES_PROG0_RD[CURRENT_SITE_NUMBER()-1] = reverse_ras_result(Vec[0]);
N_ANA_TRM_RES_PROG0_10_6[CURRENT_SITE_NUMBER()-1] = N_ANA_TRM_RES_PROG0_RD[CURRENT_SITE_NUMBER()-1] & 1984;
N_OPT_VDDG_LDO_RD[CURRENT_SITE_NUMBER()-1] = N_ANA_TRM_RES_PROG0_10_6[CURRENT_SITE_NUMBER()-1] >> 6;
int Func_result0 = rdi.id("T10_24_vddg_ldo_trimming_V4_PAT_id0").getBurstPassFail();
int Func_result1 = rdi.id("T10_24_vddg_ldo_trimming_V4_PAT_id1").getBurstPassFail();
FuncPrint("Func_result0", Func_result0);
FuncPrint("Func_result1", Func_result1);
int Func_result = 1 * Func_result0 * Func_result1;
if (N_OPT_VDDG_LDO_RD[CURRENT_SITE_NUMBER()-1] != N_OPT_VDDG_LDO[CURRENT_SITE_NUMBER()-1]) Func_result=99;
FuncPrint("Func_result1", Func_result1);
TestLog("FUNCTIONAL_TEST", Func_result);
for (int i = 0; i<10; i++)
{
TestLog("V_VDDG_LDO_0"+rdi.itos(i), V_VDDG_LDO[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i = 10; i<32; i++)
{
TestLog("V_VDDG_LDO_"+rdi.itos(i), V_VDDG_LDO[CURRENT_SITE_NUMBER()-1][i]);
}
TestLog("N_OPT_VDDG_LDO", N_OPT_VDDG_LDO[CURRENT_SITE_NUMBER()-1]);
TestLog("V_OPT_VDDG_LDO", V_OPT_VDDG_LDO[CURRENT_SITE_NUMBER()-1]);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_24_vddg_ldo_trimming_V4", T10_24_vddg_ldo_trimming_V4);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_CONF', 0x0011) # Enable TB1; invert test bus
wac('TM_PIN', 0x0095) # Enable ANAIO1/2; TB1_OUT on ANAIO1; TB2_INP on ANAIO2
wac('TM_ADDR', 0x0b0d) # Enable power block on ATM; Connect VDDG/VSSG
dly(100e-6)
gav('V_VDDG_LDO_M_RAW', 'INT2','ASDX')
calc('V_VDDG_LDO_M', 'V_VDDG_LDO_M_RAW', '-', 'V_OFF1_ECOFF')
log('V_VDDG_LDO_M')
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_25_VDDG_LDO_measurement_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double V_VDDG_LDO_M_RAW[xNSitES],V_VDDG_LDO_M[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T10_25_VDDG_LDO_measurement_V2_PAT_id");
rdi.dc("T10_25_VDDG_LDO_measurement_V2DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("INT2,ASDX",TA::BADC).vMeas().average(128).measWait(1 ms) //V_VDDG_LDO_M_RAW
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
ARRAY_D JSUB_results_ASDX;
JSUB_results_ASDX = rdi.id("T10_25_VDDG_LDO_measurement_V2DC_id0").getMultiValue("ASDX");
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T10_25_VDDG_LDO_measurement_V2DC_id0").getMultiValue("INT2");
V_VDDG_LDO_M_RAW[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[0] - JSUB_results_ASDX[0];
V_VDDG_LDO_M[CURRENT_SITE_NUMBER()-1] = V_VDDG_LDO_M_RAW[CURRENT_SITE_NUMBER()-1] - V_OFF1_ECOFF[CURRENT_SITE_NUMBER()-1];
FuncPrint("JSUB_results_INT2", JSUB_results_INT2[0]);
FuncPrint("JSUB_results_ASDX", JSUB_results_ASDX[0]);
FuncPrint("V_VDDG_LDO_M_RAW", V_VDDG_LDO_M_RAW[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_VDDG_LDO_M", V_VDDG_LDO_M[CURRENT_SITE_NUMBER()-1]);
int Func_result = rdi.id("T10_25_VDDG_LDO_measurement_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("V_VDDG_LDO_M", V_VDDG_LDO_M[CURRENT_SITE_NUMBER()-1]);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_25_VDDG_LDO_measurement_V2", T10_25_VDDG_LDO_measurement_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: VDDG LDO characterization, VDDG, typ 1.5V
# Characterization loop derived from T10_24_vddg_ldo_trimming
#############################################################################################################
from test_sub_functions import *
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
# Config Buffer, TM_CONF
wac('EXT_MODE', 0xc00f) # Page Test, Reg TM_CONF
wcb('tm_buf_pwrup',0x1) # Enable TB1 only
wcb('tm_bus_inv',0x1) # Invert tset bus
# Config ANAIO pad, TM_PIN
wcb('tm_int2_en',0x1)
wcb('tm_int2_sel',0x2) # TB1OUT on anaio1
wcb('tm_asdx_en',0x1)
wcb('tm_asdx_sel',0x4) # TB2IN on anaio2
# Config CTB_P/N, TM_ADDR
wcb('tm_cfg', 0xb) # VSSG(local gnd)@CTP_P, VDDG@CTP_N
wcb('tm_addr', 0xd) # COM_TIO_PWR, Signal :TM_PWRBLOCK_EN
# Characterization loop
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x07c0) # Set masking register
ras('REG_VALUE', 'ANA_TRM_RES_PROG0') # Store the current value
for n in range (0, 32, 1):
cmt('Set trim index to value {} in range (0..31)'.format(n))
wr('ANA_TRM_RES_PROG0', n*2**6) # ANA_TRM_RES_PROG0<10:6> gyr_trm_res_prog_ldo_a
rac('ANA_TRM_RES_PROG0', n*2**6, 0x07c0)
dly(100e-6)
gav(f'V_VDDG_LDO_C_RAW[{n:03d}]', 'INT2','ASDX')
calc(f'V_VDDG_LDO_C[{n:03d}]', f'V_VDDG_LDO_C_RAW[{n:03d}]','-', 'V_OFF1_ECOFF')
log(f'V_VDDG_LDO_C[{n:03d}]')
dly(592e-9)
wri('ANA_TRM_RES_PROG0', 'REG_VALUE')
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Clean
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* T10_26_VDDG_LDO_Char_V2, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH: fix some bugs.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_26_VDDG_LDO_Char_V2: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 2;
vector<int> i_comment_line[i_split_count];
static int i_REG_VALUE[xNSitES];
ARRAY_I aI_Captured_0;
static double d_V_VDDG_LDO_C_RAW[xNSitES][32];
static double V_VDDG_LDO_C[xNSitES][32];
ARRAY_D ad_V_VDDG_LDO_C_RAW;
static int i_WRITE_BACK[xNSitES];
static int i_vec_Num1[32] = {0};
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(i_REG_VALUE, 9, xNSitES);
//!"CTmsg: cut pattern to 2 parts @ oriAVCvecline [10003]
//!"CTmsg: cut pattern to 2 parts @ binarypatline [9993]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_26_VDDG_LDO_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 20:34:28 GMT >}
valid comment[ 1] @ avcline 3386: {ras('REG_VALUE', 'ANA_TRM_RES_PROG0')}
valid comment[ 2] @ avcline 3499: {cmt: Set trim index to value 0 in range (0..31)}
valid comment[ 3] @ avcline 3701: {gav('V_VDDG_LDO_C_RAW[000]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 3] @ avcline 3701: {calc('V_VDDG_LDO_C[000]', 'V_VDDG_LDO_C_RAW[000]', '-', 'V_OFF1_ECOFF')}
valid comment[ 3] @ avcline 3701: {log('V_VDDG_LDO_C[000]', '', '', 0, 0)}
valid comment[ 4] @ avcline 3702: {cmt: Set trim index to value 1 in range (0..31)}
valid comment[ 5] @ avcline 3904: {gav('V_VDDG_LDO_C_RAW[001]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 5] @ avcline 3904: {calc('V_VDDG_LDO_C[001]', 'V_VDDG_LDO_C_RAW[001]', '-', 'V_OFF1_ECOFF')}
valid comment[ 5] @ avcline 3904: {log('V_VDDG_LDO_C[001]', '', '', 0, 0)}
valid comment[ 6] @ avcline 3905: {cmt: Set trim index to value 2 in range (0..31)}
valid comment[ 7] @ avcline 4107: {gav('V_VDDG_LDO_C_RAW[002]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 7] @ avcline 4107: {calc('V_VDDG_LDO_C[002]', 'V_VDDG_LDO_C_RAW[002]', '-', 'V_OFF1_ECOFF')}
valid comment[ 7] @ avcline 4107: {log('V_VDDG_LDO_C[002]', '', '', 0, 0)}
valid comment[ 8] @ avcline 4108: {cmt: Set trim index to value 3 in range (0..31)}
valid comment[ 9] @ avcline 4310: {gav('V_VDDG_LDO_C_RAW[003]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 9] @ avcline 4310: {calc('V_VDDG_LDO_C[003]', 'V_VDDG_LDO_C_RAW[003]', '-', 'V_OFF1_ECOFF')}
valid comment[ 9] @ avcline 4310: {log('V_VDDG_LDO_C[003]', '', '', 0, 0)}
valid comment[ 10] @ avcline 4311: {cmt: Set trim index to value 4 in range (0..31)}
valid comment[ 11] @ avcline 4513: {gav('V_VDDG_LDO_C_RAW[004]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 11] @ avcline 4513: {calc('V_VDDG_LDO_C[004]', 'V_VDDG_LDO_C_RAW[004]', '-', 'V_OFF1_ECOFF')}
valid comment[ 11] @ avcline 4513: {log('V_VDDG_LDO_C[004]', '', '', 0, 0)}
valid comment[ 12] @ avcline 4514: {cmt: Set trim index to value 5 in range (0..31)}
valid comment[ 13] @ avcline 4716: {gav('V_VDDG_LDO_C_RAW[005]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 13] @ avcline 4716: {calc('V_VDDG_LDO_C[005]', 'V_VDDG_LDO_C_RAW[005]', '-', 'V_OFF1_ECOFF')}
valid comment[ 13] @ avcline 4716: {log('V_VDDG_LDO_C[005]', '', '', 0, 0)}
valid comment[ 14] @ avcline 4717: {cmt: Set trim index to value 6 in range (0..31)}
valid comment[ 15] @ avcline 4919: {gav('V_VDDG_LDO_C_RAW[006]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 15] @ avcline 4919: {calc('V_VDDG_LDO_C[006]', 'V_VDDG_LDO_C_RAW[006]', '-', 'V_OFF1_ECOFF')}
valid comment[ 15] @ avcline 4919: {log('V_VDDG_LDO_C[006]', '', '', 0, 0)}
valid comment[ 16] @ avcline 4920: {cmt: Set trim index to value 7 in range (0..31)}
valid comment[ 17] @ avcline 5122: {gav('V_VDDG_LDO_C_RAW[007]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 17] @ avcline 5122: {calc('V_VDDG_LDO_C[007]', 'V_VDDG_LDO_C_RAW[007]', '-', 'V_OFF1_ECOFF')}
valid comment[ 17] @ avcline 5122: {log('V_VDDG_LDO_C[007]', '', '', 0, 0)}
valid comment[ 18] @ avcline 5123: {cmt: Set trim index to value 8 in range (0..31)}
valid comment[ 19] @ avcline 5325: {gav('V_VDDG_LDO_C_RAW[008]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 19] @ avcline 5325: {calc('V_VDDG_LDO_C[008]', 'V_VDDG_LDO_C_RAW[008]', '-', 'V_OFF1_ECOFF')}
valid comment[ 19] @ avcline 5325: {log('V_VDDG_LDO_C[008]', '', '', 0, 0)}
valid comment[ 20] @ avcline 5326: {cmt: Set trim index to value 9 in range (0..31)}
valid comment[ 21] @ avcline 5528: {gav('V_VDDG_LDO_C_RAW[009]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 21] @ avcline 5528: {calc('V_VDDG_LDO_C[009]', 'V_VDDG_LDO_C_RAW[009]', '-', 'V_OFF1_ECOFF')}
valid comment[ 21] @ avcline 5528: {log('V_VDDG_LDO_C[009]', '', '', 0, 0)}
valid comment[ 22] @ avcline 5529: {cmt: Set trim index to value 10 in range (0..31)}
valid comment[ 23] @ avcline 5731: {gav('V_VDDG_LDO_C_RAW[010]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 23] @ avcline 5731: {calc('V_VDDG_LDO_C[010]', 'V_VDDG_LDO_C_RAW[010]', '-', 'V_OFF1_ECOFF')}
valid comment[ 23] @ avcline 5731: {log('V_VDDG_LDO_C[010]', '', '', 0, 0)}
valid comment[ 24] @ avcline 5732: {cmt: Set trim index to value 11 in range (0..31)}
valid comment[ 25] @ avcline 5934: {gav('V_VDDG_LDO_C_RAW[011]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 25] @ avcline 5934: {calc('V_VDDG_LDO_C[011]', 'V_VDDG_LDO_C_RAW[011]', '-', 'V_OFF1_ECOFF')}
valid comment[ 25] @ avcline 5934: {log('V_VDDG_LDO_C[011]', '', '', 0, 0)}
valid comment[ 26] @ avcline 5935: {cmt: Set trim index to value 12 in range (0..31)}
valid comment[ 27] @ avcline 6137: {gav('V_VDDG_LDO_C_RAW[012]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 27] @ avcline 6137: {calc('V_VDDG_LDO_C[012]', 'V_VDDG_LDO_C_RAW[012]', '-', 'V_OFF1_ECOFF')}
valid comment[ 27] @ avcline 6137: {log('V_VDDG_LDO_C[012]', '', '', 0, 0)}
valid comment[ 28] @ avcline 6138: {cmt: Set trim index to value 13 in range (0..31)}
valid comment[ 29] @ avcline 6340: {gav('V_VDDG_LDO_C_RAW[013]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 29] @ avcline 6340: {calc('V_VDDG_LDO_C[013]', 'V_VDDG_LDO_C_RAW[013]', '-', 'V_OFF1_ECOFF')}
valid comment[ 29] @ avcline 6340: {log('V_VDDG_LDO_C[013]', '', '', 0, 0)}
valid comment[ 30] @ avcline 6341: {cmt: Set trim index to value 14 in range (0..31)}
valid comment[ 31] @ avcline 6543: {gav('V_VDDG_LDO_C_RAW[014]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 31] @ avcline 6543: {calc('V_VDDG_LDO_C[014]', 'V_VDDG_LDO_C_RAW[014]', '-', 'V_OFF1_ECOFF')}
valid comment[ 31] @ avcline 6543: {log('V_VDDG_LDO_C[014]', '', '', 0, 0)}
valid comment[ 32] @ avcline 6544: {cmt: Set trim index to value 15 in range (0..31)}
valid comment[ 33] @ avcline 6746: {gav('V_VDDG_LDO_C_RAW[015]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 33] @ avcline 6746: {calc('V_VDDG_LDO_C[015]', 'V_VDDG_LDO_C_RAW[015]', '-', 'V_OFF1_ECOFF')}
valid comment[ 33] @ avcline 6746: {log('V_VDDG_LDO_C[015]', '', '', 0, 0)}
valid comment[ 34] @ avcline 6747: {cmt: Set trim index to value 16 in range (0..31)}
valid comment[ 35] @ avcline 6949: {gav('V_VDDG_LDO_C_RAW[016]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 35] @ avcline 6949: {calc('V_VDDG_LDO_C[016]', 'V_VDDG_LDO_C_RAW[016]', '-', 'V_OFF1_ECOFF')}
valid comment[ 35] @ avcline 6949: {log('V_VDDG_LDO_C[016]', '', '', 0, 0)}
valid comment[ 36] @ avcline 6950: {cmt: Set trim index to value 17 in range (0..31)}
valid comment[ 37] @ avcline 7152: {gav('V_VDDG_LDO_C_RAW[017]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 37] @ avcline 7152: {calc('V_VDDG_LDO_C[017]', 'V_VDDG_LDO_C_RAW[017]', '-', 'V_OFF1_ECOFF')}
valid comment[ 37] @ avcline 7152: {log('V_VDDG_LDO_C[017]', '', '', 0, 0)}
valid comment[ 38] @ avcline 7153: {cmt: Set trim index to value 18 in range (0..31)}
valid comment[ 39] @ avcline 7355: {gav('V_VDDG_LDO_C_RAW[018]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 39] @ avcline 7355: {calc('V_VDDG_LDO_C[018]', 'V_VDDG_LDO_C_RAW[018]', '-', 'V_OFF1_ECOFF')}
valid comment[ 39] @ avcline 7355: {log('V_VDDG_LDO_C[018]', '', '', 0, 0)}
valid comment[ 40] @ avcline 7356: {cmt: Set trim index to value 19 in range (0..31)}
valid comment[ 41] @ avcline 7558: {gav('V_VDDG_LDO_C_RAW[019]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 41] @ avcline 7558: {calc('V_VDDG_LDO_C[019]', 'V_VDDG_LDO_C_RAW[019]', '-', 'V_OFF1_ECOFF')}
valid comment[ 41] @ avcline 7558: {log('V_VDDG_LDO_C[019]', '', '', 0, 0)}
valid comment[ 42] @ avcline 7559: {cmt: Set trim index to value 20 in range (0..31)}
valid comment[ 43] @ avcline 7761: {gav('V_VDDG_LDO_C_RAW[020]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 43] @ avcline 7761: {calc('V_VDDG_LDO_C[020]', 'V_VDDG_LDO_C_RAW[020]', '-', 'V_OFF1_ECOFF')}
valid comment[ 43] @ avcline 7761: {log('V_VDDG_LDO_C[020]', '', '', 0, 0)}
valid comment[ 44] @ avcline 7762: {cmt: Set trim index to value 21 in range (0..31)}
valid comment[ 45] @ avcline 7964: {gav('V_VDDG_LDO_C_RAW[021]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 45] @ avcline 7964: {calc('V_VDDG_LDO_C[021]', 'V_VDDG_LDO_C_RAW[021]', '-', 'V_OFF1_ECOFF')}
valid comment[ 45] @ avcline 7964: {log('V_VDDG_LDO_C[021]', '', '', 0, 0)}
valid comment[ 46] @ avcline 7965: {cmt: Set trim index to value 22 in range (0..31)}
valid comment[ 47] @ avcline 8167: {gav('V_VDDG_LDO_C_RAW[022]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 47] @ avcline 8167: {calc('V_VDDG_LDO_C[022]', 'V_VDDG_LDO_C_RAW[022]', '-', 'V_OFF1_ECOFF')}
valid comment[ 47] @ avcline 8167: {log('V_VDDG_LDO_C[022]', '', '', 0, 0)}
valid comment[ 48] @ avcline 8168: {cmt: Set trim index to value 23 in range (0..31)}
valid comment[ 49] @ avcline 8370: {gav('V_VDDG_LDO_C_RAW[023]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 49] @ avcline 8370: {calc('V_VDDG_LDO_C[023]', 'V_VDDG_LDO_C_RAW[023]', '-', 'V_OFF1_ECOFF')}
valid comment[ 49] @ avcline 8370: {log('V_VDDG_LDO_C[023]', '', '', 0, 0)}
valid comment[ 50] @ avcline 8371: {cmt: Set trim index to value 24 in range (0..31)}
valid comment[ 51] @ avcline 8573: {gav('V_VDDG_LDO_C_RAW[024]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 51] @ avcline 8573: {calc('V_VDDG_LDO_C[024]', 'V_VDDG_LDO_C_RAW[024]', '-', 'V_OFF1_ECOFF')}
valid comment[ 51] @ avcline 8573: {log('V_VDDG_LDO_C[024]', '', '', 0, 0)}
valid comment[ 52] @ avcline 8574: {cmt: Set trim index to value 25 in range (0..31)}
valid comment[ 53] @ avcline 8776: {gav('V_VDDG_LDO_C_RAW[025]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 53] @ avcline 8776: {calc('V_VDDG_LDO_C[025]', 'V_VDDG_LDO_C_RAW[025]', '-', 'V_OFF1_ECOFF')}
valid comment[ 53] @ avcline 8776: {log('V_VDDG_LDO_C[025]', '', '', 0, 0)}
valid comment[ 54] @ avcline 8777: {cmt: Set trim index to value 26 in range (0..31)}
valid comment[ 55] @ avcline 8979: {gav('V_VDDG_LDO_C_RAW[026]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 55] @ avcline 8979: {calc('V_VDDG_LDO_C[026]', 'V_VDDG_LDO_C_RAW[026]', '-', 'V_OFF1_ECOFF')}
valid comment[ 55] @ avcline 8979: {log('V_VDDG_LDO_C[026]', '', '', 0, 0)}
valid comment[ 56] @ avcline 8980: {cmt: Set trim index to value 27 in range (0..31)}
valid comment[ 57] @ avcline 9182: {gav('V_VDDG_LDO_C_RAW[027]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 57] @ avcline 9182: {calc('V_VDDG_LDO_C[027]', 'V_VDDG_LDO_C_RAW[027]', '-', 'V_OFF1_ECOFF')}
valid comment[ 57] @ avcline 9182: {log('V_VDDG_LDO_C[027]', '', '', 0, 0)}
valid comment[ 58] @ avcline 9183: {cmt: Set trim index to value 28 in range (0..31)}
valid comment[ 59] @ avcline 9385: {gav('V_VDDG_LDO_C_RAW[028]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 59] @ avcline 9385: {calc('V_VDDG_LDO_C[028]', 'V_VDDG_LDO_C_RAW[028]', '-', 'V_OFF1_ECOFF')}
valid comment[ 59] @ avcline 9385: {log('V_VDDG_LDO_C[028]', '', '', 0, 0)}
valid comment[ 60] @ avcline 9386: {cmt: Set trim index to value 29 in range (0..31)}
valid comment[ 61] @ avcline 9588: {gav('V_VDDG_LDO_C_RAW[029]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 61] @ avcline 9588: {calc('V_VDDG_LDO_C[029]', 'V_VDDG_LDO_C_RAW[029]', '-', 'V_OFF1_ECOFF')}
valid comment[ 61] @ avcline 9588: {log('V_VDDG_LDO_C[029]', '', '', 0, 0)}
valid comment[ 62] @ avcline 9589: {cmt: Set trim index to value 30 in range (0..31)}
valid comment[ 63] @ avcline 9791: {gav('V_VDDG_LDO_C_RAW[030]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 63] @ avcline 9791: {calc('V_VDDG_LDO_C[030]', 'V_VDDG_LDO_C_RAW[030]', '-', 'V_OFF1_ECOFF')}
valid comment[ 63] @ avcline 9791: {log('V_VDDG_LDO_C[030]', '', '', 0, 0)}
valid comment[ 64] @ avcline 9792: {cmt: Set trim index to value 31 in range (0..31)}
valid comment[ 65] @ avcline 9994: {gav('V_VDDG_LDO_C_RAW[031]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 65] @ avcline 9994: {calc('V_VDDG_LDO_C[031]', 'V_VDDG_LDO_C_RAW[031]', '-', 'V_OFF1_ECOFF')}
valid comment[ 65] @ avcline 9994: {log('V_VDDG_LDO_C[031]', '', '', 0, 0)}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.digCap("digcapid_0").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(1*16).execute();
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][3]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_000//{gav('V_VDDG_LDO_C_RAW[000]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][5]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_001//{gav('V_VDDG_LDO_C_RAW[001]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][7]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_002//{gav('V_VDDG_LDO_C_RAW[002]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][9]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_003//{gav('V_VDDG_LDO_C_RAW[003]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][11]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_004//{gav('V_VDDG_LDO_C_RAW[004]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][13]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_005//{gav('V_VDDG_LDO_C_RAW[005]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][15]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_006//{gav('V_VDDG_LDO_C_RAW[006]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][17]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_007//{gav('V_VDDG_LDO_C_RAW[007]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][19]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_008//{gav('V_VDDG_LDO_C_RAW[008]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][21]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_009//{gav('V_VDDG_LDO_C_RAW[009]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][23]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_010//{gav('V_VDDG_LDO_C_RAW[010]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][25]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_011//{gav('V_VDDG_LDO_C_RAW[011]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][27]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_012//{gav('V_VDDG_LDO_C_RAW[012]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][29]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_013//{gav('V_VDDG_LDO_C_RAW[013]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][31]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_014//{gav('V_VDDG_LDO_C_RAW[014]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][33]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_015//{gav('V_VDDG_LDO_C_RAW[015]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][35]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_016//{gav('V_VDDG_LDO_C_RAW[016]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][37]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_017//{gav('V_VDDG_LDO_C_RAW[017]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][39]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_018//{gav('V_VDDG_LDO_C_RAW[018]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][41]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_019//{gav('V_VDDG_LDO_C_RAW[019]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][43]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_020//{gav('V_VDDG_LDO_C_RAW[020]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][45]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_021//{gav('V_VDDG_LDO_C_RAW[021]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][47]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_022//{gav('V_VDDG_LDO_C_RAW[022]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][49]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_023//{gav('V_VDDG_LDO_C_RAW[023]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][51]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_024//{gav('V_VDDG_LDO_C_RAW[024]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][53]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_025//{gav('V_VDDG_LDO_C_RAW[025]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][55]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_026//{gav('V_VDDG_LDO_C_RAW[026]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][57]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_027//{gav('V_VDDG_LDO_C_RAW[027]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][59]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_028//{gav('V_VDDG_LDO_C_RAW[028]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][61]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_029//{gav('V_VDDG_LDO_C_RAW[029]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][63]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_030//{gav('V_VDDG_LDO_C_RAW[030]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][65]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VDDG_LDO_C_RAW_031//{gav('V_VDDG_LDO_C_RAW[031]', 'INT2', 'ASDX', 2, 0.0001, True)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(32); ad_jsubresults_INT2.init(-9.9);
ARRAY_D ad_jsubresults_ASDX; ad_jsubresults_ASDX.resize(32); ad_jsubresults_ASDX.init(-9.9);
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
ad_jsubresults_ASDX = rdi.id("dcid_0").getMultiValue("ASDX");
aI_Captured_0[0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[0]);
i_REG_VALUE[curSite] = aI_Captured_0[0];
FuncPrint("REG_VALUE",i_REG_VALUE[curSite]);
for(int i=0; i<32; i++){
d_V_VDDG_LDO_C_RAW[curSite][i] = ad_jsubresults_INT2[0 + i] - ad_jsubresults_ASDX[0 + i];
V_VDDG_LDO_C[curSite][i] = d_V_VDDG_LDO_C_RAW[curSite][i] - V_OFF1_ECOFF[curSite];
FuncPrint("V_VDDG_LDO_C_RAW_" + rdi.itos(curSite) + "_"+ rdi.itos(i) ,d_V_VDDG_LDO_C_RAW[curSite][i]);
FuncPrint(s_Func_Test_Name_Add_2Num("V_VDDG_LDO_C_", i), V_VDDG_LDO_C[curSite][i]);
}
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10003: {wri('ANA_TRM_RES_PROG0', 'REG_VALUE')}
valid comment[ 1] @ avcline 11042: {Test End: T10_26_VDDG_LDO_Char}
*/
static int i_vec_iposition1[32] = {
31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,
48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63
};
for (int i = 0; i < 32; i++)
{
i_vec_Num1[i] = i_vec_iposition1[i];
}
FOR_EACH_SITE_BEGIN();
i_WRITE_BACK[curSite] = Switch_High_Low_Bits_16Bits(i_REG_VALUE[curSite]);
Func_Vector_Dynamic_Write(s_splited_pat_name[1], "SDX", i_vec_Num1, 32, i_WRITE_BACK[curSite], 0, 2); //Notes. TEI check per project
FOR_EACH_SITE_END();
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.func().label(s_splited_pat_name[1]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
for(int i=0; i < 32; i++){
TestLog(s_Func_Test_Name_Add_2Num("V_VDDG_LDO_C_", i), V_VDDG_LDO_C[curSite][i]);
}
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T10_26_VDDG_LDO_Char_V2", T10_26_VDDG_LDO_Char_V2);
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generate cpp file from given test case python file
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#############################################################################################################
# description: GYRA bias current trimming
# ib_gyr@ANAIO1
# Notes: 1. gyr_trm_res_prog_i selected from trim loop
# 2. gry_trm_res_prog_i2/a/fe/vco calculated based on gyr_trm_res_prog_i
#############################################################################################################
cmt('Version info: $Revision: 3 $ $Author: hmf1rt $ $Date: 2024/04/24 09:42:55 GMT $')
wac('EXT_MODE', 0xc006) # Fcu page.
wcb('temp_mode',0x1) # FCU_TEST_CONF, temp always on
wcb('temp_test_odr',0x4) # FCU_TEST_CONF, set temp test ODR to 800
dly(320e-6)
# Config ANAIO pad, TM_PIN
wac('EXT_MODE', 0xc00f) # Page Test, Reg TM_PIN
wcb('tm_int2_en',0x1)
wcb('tm_int2_sel',0x4) # TB1INP on anaio1
# Config CTB_P/N, TM_ADDR
wcb('tm_cfg', 0x1) # IB_GRY@CTP_P, IB_ACC@CTP_N
wcb('tm_addr', 0xe) # COM_TIO_PWR, Signal :TM_PWRBLOCK_EN
# Trim loop
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x003f) # Set masking register
for n in range (0, 64, 1):
cmt('Set trim index to value {} in range (0..63)'.format(n))
wr('ANA_TRM_RES_PROG1', n) # <5:0> gyr_trm_res_prog_i
rac('ANA_TRM_RES_PROG1', n, 0x003f)
uclk('ASCX')
bw('ASCX', 1)
dly(271*74e-9) # Delay ~20us
gac(f'I_BIAS_G[{n:02d}]', 'INT2', i_range=2e-6)
log(f'I_BIAS_G[{n:02d}]')
ubw('ASCX')
clk('ASCX', 1/148e-9)
oti('N_OPT_IBIAS_G', 'I_BIAS_G', -2.5e-6)
log('N_OPT_IBIAS_G')
otv('I_OPT_IBIAS_G', 'I_BIAS_G', -2.5e-6)
log('I_OPT_IBIAS_G')
# Write REG ANA_TRM_RES_PROG1
calc('RES_PROG_I','N_OPT_IBIAS_G') # <5:0> of ANA_TRM_RES_PROG1
calc('N_OPT_IBIAS_G_54','N_OPT_IBIAS_G','>>',4)
calc('RES_PROG_I2','N_OPT_IBIAS_G_54','<<',6) # <7:6> of ANA_TRM_RES_PROG1
calc('RES_PROG_A','N_OPT_IBIAS_G','<<',10) # <15:10> of ANA_TRM_RES_PROG1
wri('ANA_TRM_RES_PROG1','RES_PROG_I') # current mask still 0x003f
wr('OCP_MASK',0x0000)
rac('OCP_MASK',0xffff)
wac('OCP_MASK',0x00c0)
wri('ANA_TRM_RES_PROG1','RES_PROG_I2')
wr('OCP_MASK',0x0000)
rac('OCP_MASK',0xffff)
wac('OCP_MASK',0xfc00)
wri('ANA_TRM_RES_PROG1','RES_PROG_A')
wr('OCP_MASK',0x0000)
rac('OCP_MASK',0xffff)
# Read & Check ANA_TRM_RES_PROG1
ras('N_ANA_TRM_RES_PROG1_RD','ANA_TRM_RES_PROG1')
calc('RES_PROG_I_RD','N_ANA_TRM_RES_PROG1_RD', '&', 0x003f)
calc('N_ANA_TRM_RES_PROG1_RD_7_6','N_ANA_TRM_RES_PROG1_RD', '&', 0x00c0)
calc('RES_PROG_I2_RD','N_ANA_TRM_RES_PROG1_RD_7_6', '>>', 6)
calc('N_ANA_TRM_RES_PROG1_RD_15_10','N_ANA_TRM_RES_PROG1_RD', '&', 0xfc00)
calc('RES_PROG_A_RD','N_ANA_TRM_RES_PROG1_RD_15_10', '>>', 10)
log('RES_PROG_I_RD')
log('RES_PROG_I2_RD')
log('RES_PROG_A_RD')
cmt('This item is fucntion fail if RES_PROG_I_RD != N_OPT_IBIAS_G')
cmt('This item is fucntion fail if RES_PROG_I2_RD != N_OPT_IBIAS_G_54')
cmt('This item is fucntion fail if RES_PROG_A_RD != N_OPT_IBIAS_G')
# Write REG ANA_TRM_RES_PROG2
calc('RES_PROG_FE','N_OPT_IBIAS_G') # <5:0> of ANA_TRM_RES_PROG2
calc('RES_PROG_VCO','N_OPT_IBIAS_G','<<',8) # <13:8> of ANA_TRM_RES_PROG2
wac('OCP_MASK',0x003f)
wri('ANA_TRM_RES_PROG2','RES_PROG_FE')
wr('OCP_MASK',0x0000)
rac('OCP_MASK',0xffff)
wac('OCP_MASK',0x3f00)
wri('ANA_TRM_RES_PROG2','RES_PROG_VCO')
wr('OCP_MASK',0x0000)
rac('OCP_MASK',0xffff)
# Read & Check ANA_TRM_RES_PROG2
ras('N_ANA_TRM_RES_PROG2_RD','ANA_TRM_RES_PROG2')
calc('RES_PROG_FE_RD','N_ANA_TRM_RES_PROG2_RD', '&', 0x003f)
calc('RES_PROG_VCO_RD','N_ANA_TRM_RES_PROG2_RD', '&', 0x3f00)
log('RES_PROG_FE_RD')
log('RES_PROG_VCO_RD')
cmt('This item is fucntion fail if RES_PROG_FE_RD != RES_PROG_FE')
cmt('This item is fucntion fail if RES_PROG_VCO_RD != RES_PROG_VCO')
# Clean
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('EXT_MODE', 0xc006) # FCU page
wcb('temp_mode',0x0) # FCU_TEST_CONF
wcb('temp_test_odr',0x0) # FCU_TEST_CONF
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/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_27_gyr_bias_current_trimming_V3: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
INT split_pat_flag;
GET_USER_FLAG("split_pat_flag", &split_pat_flag);
vector<string> s_splited_pat_name;
const int split_count = 6; // Alarm:: split_count need manual confirm.
s_splited_pat_name.resize(split_count);
vector<int> i_comment_line[split_count];
static int N_OPT_IBIAS_G[xNSitES];
static double I_BIAS_G[xNSitES][64], I_OPT_IBIAS_G[xNSitES];
static int RES_PROG_I[xNSitES], N_OPT_IBIAS_G_54[xNSitES], RES_PROG_I2[xNSitES], RES_PROG_A[xNSitES];
static int N_ANA_TRM_RES_PROG1_RD[xNSitES], RES_PROG_I_RD[xNSitES], N_ANA_TRM_RES_PROG1_RD_7_6[xNSitES], RES_PROG_I2_RD[xNSitES], N_ANA_TRM_RES_PROG1_RD_15_10[xNSitES];
static int RES_PROG_A_RD[xNSitES], RES_PROG_FE[xNSitES], RES_PROG_VCO[xNSitES], RES_PROG_FE_RD[xNSitES], RES_PROG_VCO_RD[xNSitES], N_ANA_TRM_RES_PROG2_RD[xNSitES];
ARRAY_LL RES_PROG_I_rtv(xNSitES), RES_PROG_I2_rtv(xNSitES), RES_PROG_A_rtv(xNSitES);
ARRAY_LL RES_PROG_FE_rtv(xNSitES), RES_PROG_VCO_rtv(xNSitES);
const int Wri_Bit_Length = 33;
const int Wri_Bit_Position = 31;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
rdi.enableOre(oreFlag);
rdi.oreFile("./ORE_Files/rdi_ore_T10_27_GYR_BIAS_CURRENT_TRIMMING.xml");
GET_TESTSUITE_NAME(test_name);
if (split_pat_flag)
{
split_pattern(s_label_name,"wri",split_pat_flag,s_splited_pat_name);
}
else
{
for (int i = 0; i<split_count; i++)
{
s_splited_pat_name[i] = s_label_name + "_part" + rdi.itos(i);
i_comment_line[i] = search_comment_line(s_splited_pat_name[i]);
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
// oti('N_OPT_IBIAS_G', 'I_BIAS_G', -2.5e-6)
// log('N_OPT_IBIAS_G')
// otv('I_OPT_IBIAS_G', 'I_BIAS_G', -2.5e-6)
// log('I_OPT_IBIAS_G')
// # Write REG ANA_TRM_RES_PROG1
// calc('RES_PROG_I','N_OPT_IBIAS_G') # <5:0> of ANA_TRM_RES_PROG1
// calc('N_OPT_IBIAS_G_54','N_OPT_IBIAS_G','>>',4)
// calc('RES_PROG_I2','N_OPT_IBIAS_G_54','<<',6) # <7:6> of ANA_TRM_RES_PROG1
// calc('RES_PROG_A','N_OPT_IBIAS_G','<<',10) # <15:10> of ANA_TRM_RES_PROG1
// wri('ANA_TRM_RES_PROG1','RES_PROG_I') # current mask still 0x003f
// wr('OCP_MASK',0x0000)
// rac('OCP_MASK',0xffff)
// wac('OCP_MASK',0x00c0)
// wri('ANA_TRM_RES_PROG1','RES_PROG_I2')
// wr('OCP_MASK',0x0000)
// rac('OCP_MASK',0xffff)
// wac('OCP_MASK',0xfc00)
// wri('ANA_TRM_RES_PROG1','RES_PROG_A')
// wr('OCP_MASK',0x0000)
// rac('OCP_MASK',0xffff)
// # Read & Check ANA_TRM_RES_PROG1
// ras('N_ANA_TRM_RES_PROG1_RD','ANA_TRM_RES_PROG1')
// calc('RES_PROG_I_RD','N_ANA_TRM_RES_PROG1_RD', '&', 0x003f)
// calc('N_ANA_TRM_RES_PROG1_RD_7_6','N_ANA_TRM_RES_PROG1_RD', '&', 0x00c0)
// calc('RES_PROG_I2_RD','N_ANA_TRM_RES_PROG1_RD_7_6', '>>', 6)
// calc('N_ANA_TRM_RES_PROG1_RD_15_10','N_ANA_TRM_RES_PROG1_RD', '&', 0xfc00)
// calc('RES_PROG_A_RD','N_ANA_TRM_RES_PROG1_RD_15_10', '>>', 10)
// log('RES_PROG_I_RD')
// log('RES_PROG_I2_RD')
// log('RES_PROG_A_RD')
// cmt('This item is fucntion fail if RES_PROG_I_RD != N_OPT_IBIAS_G')
// cmt('This item is fucntion fail if RES_PROG_I2_RD != N_OPT_IBIAS_G_54')
// cmt('This item is fucntion fail if RES_PROG_A_RD != N_OPT_IBIAS_G')
// # Write REG ANA_TRM_RES_PROG2
// calc('RES_PROG_FE','N_OPT_IBIAS_G') # <5:0> of ANA_TRM_RES_PROG2
// calc('RES_PROG_VCO','N_OPT_IBIAS_G','<<',8) # <13:8> of ANA_TRM_RES_PROG2
// wac('OCP_MASK',0x003f)
// wri('ANA_TRM_RES_PROG2','RES_PROG_FE')
// wr('OCP_MASK',0x0000)
// rac('OCP_MASK',0xffff)
// wac('OCP_MASK',0x3f00)
// wri('ANA_TRM_RES_PROG2','RES_PROG_VCO')
// wr('OCP_MASK',0x0000)
// rac('OCP_MASK',0xffff)
// # Read & Check ANA_TRM_RES_PROG2
// ras('N_ANA_TRM_RES_PROG2_RD','ANA_TRM_RES_PROG2')
// calc('RES_PROG_FE_RD','N_ANA_TRM_RES_PROG2_RD', '&', 0x003f)
// calc('RES_PROG_VCO_RD','N_ANA_TRM_RES_PROG2_RD', '&', 0x3f00)
// log('RES_PROG_FE_RD')
// log('RES_PROG_VCO_RD')
// cmt('This item is fucntion fail if RES_PROG_FE_RD != RES_PROG_FE')
// cmt('This item is fucntion fail if RES_PROG_VCO_RD != RES_PROG_VCO')
RDI_BEGIN(mode);
rdi.burstId("T10_27_gyr_bias_current_trimming_V3_PAT_id0");
for (int i = 0; i<64; i++)
{
rdi.dc("T10_27_gyr_bias_current_trimming_V3DC_id0").label(s_splited_pat_name[0])// Alarm::vForce value had not been assigned in TOI, need manual check
.insertSub(i_comment_line[0][i]).pin("INT2").vForce(0 V).iMeas().valueMode(TA::BADC).iRange(1e-05 A).average(32).measWait(1 ms).cont();
}
rdi.dc("T10_27_gyr_bias_current_trimming_V3DC_id0").execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T10_27_gyr_bias_current_trimming_V3DC_id0").getMultiValue("INT2");
for (int i = 0; i<64; i++)
{
I_BIAS_G[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_INT2[i];
FuncPrint("I_BIAS_G_"+rdi.itos(i), I_BIAS_G[CURRENT_SITE_NUMBER()-1][i]);
}
N_OPT_IBIAS_G[CURRENT_SITE_NUMBER()-1] = i_Func_Optimal_Trim_Val(I_BIAS_G[CURRENT_SITE_NUMBER()-1], Target_T1027, 64);
I_OPT_IBIAS_G[CURRENT_SITE_NUMBER()-1] = I_BIAS_G[CURRENT_SITE_NUMBER()-1][N_OPT_IBIAS_G[CURRENT_SITE_NUMBER()-1]];
FuncPrint("N_OPT_IBIAS_G", N_OPT_IBIAS_G[CURRENT_SITE_NUMBER()-1]);
FuncPrint("I_OPT_IBIAS_G", I_OPT_IBIAS_G[CURRENT_SITE_NUMBER()-1]);
RES_PROG_I[CURRENT_SITE_NUMBER()-1] = N_OPT_IBIAS_G[CURRENT_SITE_NUMBER()-1] ;//<5:0> of ANA_TRM_RES_PROG1
N_OPT_IBIAS_G_54[CURRENT_SITE_NUMBER()-1] = N_OPT_IBIAS_G[CURRENT_SITE_NUMBER()-1] >> 4;
RES_PROG_I2[CURRENT_SITE_NUMBER()-1] = N_OPT_IBIAS_G_54[CURRENT_SITE_NUMBER()-1] << 6; //<7:6> of ANA_TRM_RES_PROG1
RES_PROG_A[CURRENT_SITE_NUMBER()-1] = N_OPT_IBIAS_G[CURRENT_SITE_NUMBER()-1] << 10; //<15:10> of ANA_TRM_RES_PROG1
FuncPrint("RES_PROG_I", RES_PROG_I[CURRENT_SITE_NUMBER()-1]);
FuncPrint("N_OPT_IBIAS_G_54", N_OPT_IBIAS_G_54[CURRENT_SITE_NUMBER()-1]);
FuncPrint("RES_PROG_I2", RES_PROG_I2[CURRENT_SITE_NUMBER()-1]);
FuncPrint("RES_PROG_A", RES_PROG_A[CURRENT_SITE_NUMBER()-1]);
RES_PROG_I_rtv[CURRENT_SITE_NUMBER()-1] = extend_Pmode_Herschel(RES_PROG_I[CURRENT_SITE_NUMBER()-1], 2);
RES_PROG_I2_rtv[CURRENT_SITE_NUMBER()-1] = extend_Pmode_Herschel(RES_PROG_I2[CURRENT_SITE_NUMBER()-1], 2);
RES_PROG_A_rtv[CURRENT_SITE_NUMBER()-1] = extend_Pmode_Herschel(RES_PROG_A[CURRENT_SITE_NUMBER()-1], 2);
FuncPrint("RES_PROG_I_rtv", RES_PROG_I_rtv[CURRENT_SITE_NUMBER()-1]);
FuncPrint("RES_PROG_I2_rtv", RES_PROG_I2_rtv[CURRENT_SITE_NUMBER()-1]);
FuncPrint("RES_PROG_A_rtv", RES_PROG_A_rtv[CURRENT_SITE_NUMBER()-1]);
FOR_EACH_SITE_END();
rdi.runTimeVal("RES_PROG_I_rtv", RES_PROG_I_rtv);
rdi.runTimeVal("RES_PROG_I2_rtv", RES_PROG_I2_rtv);
rdi.runTimeVal("RES_PROG_A_rtv", RES_PROG_A_rtv);
RDI_BEGIN(mode);
rdi.burstId("T10_27_gyr_bias_current_trimming_V3_PAT_id1");
rdi.digCap("T10_27_gyr_bias_current_trimming_V3_Digcap_id").vecVarOnly().pin("SDO").capMode(TA::SER).samples(16*1).bitPerWord(16).execute();
rdi.smartVec().label(s_splited_pat_name[1]).pin("SDX").writeData("RES_PROG_I_rtv", Wri_Bit_Length, Wri_Bit_Position).execute();
rdi.smartVec().label(s_splited_pat_name[2]).pin("SDX").writeData("RES_PROG_I2_rtv", Wri_Bit_Length, Wri_Bit_Position).execute();
rdi.smartVec().label(s_splited_pat_name[3]).pin("SDX").writeData("RES_PROG_A_rtv", Wri_Bit_Length, Wri_Bit_Position).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
ARRAY_I Vec=rdi.id("T10_27_gyr_bias_current_trimming_V3_Digcap_id").getVector();
N_ANA_TRM_RES_PROG1_RD[CURRENT_SITE_NUMBER()-1] = reverse_ras_result(Vec[0]);
RES_PROG_I_RD[CURRENT_SITE_NUMBER()-1] = N_ANA_TRM_RES_PROG1_RD[CURRENT_SITE_NUMBER()-1] & 63;
N_ANA_TRM_RES_PROG1_RD_7_6[CURRENT_SITE_NUMBER()-1] = N_ANA_TRM_RES_PROG1_RD[CURRENT_SITE_NUMBER()-1] & 192;
RES_PROG_I2_RD[CURRENT_SITE_NUMBER()-1] = N_ANA_TRM_RES_PROG1_RD_7_6[CURRENT_SITE_NUMBER()-1] >> 6;
N_ANA_TRM_RES_PROG1_RD_15_10[CURRENT_SITE_NUMBER()-1] = N_ANA_TRM_RES_PROG1_RD[CURRENT_SITE_NUMBER()-1] & 64512;
RES_PROG_A_RD[CURRENT_SITE_NUMBER()-1] = N_ANA_TRM_RES_PROG1_RD_15_10[CURRENT_SITE_NUMBER()-1] >> 10;
RES_PROG_FE[CURRENT_SITE_NUMBER()-1] = N_OPT_IBIAS_G[CURRENT_SITE_NUMBER()-1] ;
RES_PROG_VCO[CURRENT_SITE_NUMBER()-1] = N_OPT_IBIAS_G[CURRENT_SITE_NUMBER()-1] << 8;
FuncPrint("RES_PROG_I_RD", RES_PROG_I_RD[CURRENT_SITE_NUMBER()-1]);
FuncPrint("N_ANA_TRM_RES_PROG1_RD_7_6", N_ANA_TRM_RES_PROG1_RD_7_6[CURRENT_SITE_NUMBER()-1]);
FuncPrint("RES_PROG_I2_RD", RES_PROG_I2_RD[CURRENT_SITE_NUMBER()-1]);
FuncPrint("N_ANA_TRM_RES_PROG1_RD_15_10", N_ANA_TRM_RES_PROG1_RD_15_10[CURRENT_SITE_NUMBER()-1]);
FuncPrint("RES_PROG_A_RD", RES_PROG_A_RD[CURRENT_SITE_NUMBER()-1]);
FuncPrint("RES_PROG_FE", RES_PROG_FE[CURRENT_SITE_NUMBER()-1]);
FuncPrint("RES_PROG_VCO", RES_PROG_VCO[CURRENT_SITE_NUMBER()-1]);
RES_PROG_FE_rtv[CURRENT_SITE_NUMBER()-1] = extend_Pmode_Herschel(RES_PROG_FE[CURRENT_SITE_NUMBER()-1], 2);
RES_PROG_VCO_rtv[CURRENT_SITE_NUMBER()-1] = extend_Pmode_Herschel(RES_PROG_VCO[CURRENT_SITE_NUMBER()-1], 2);
FuncPrint("RES_PROG_FE_rtv", RES_PROG_FE_rtv[CURRENT_SITE_NUMBER()-1]);
FuncPrint("RES_PROG_VCO_rtv", RES_PROG_VCO_rtv[CURRENT_SITE_NUMBER()-1]);
FOR_EACH_SITE_END();
rdi.runTimeVal("RES_PROG_FE_rtv", RES_PROG_FE_rtv);
rdi.runTimeVal("RES_PROG_VCO_rtv", RES_PROG_VCO_rtv);
RDI_BEGIN(mode);
rdi.burstId("T10_27_gyr_bias_current_trimming_V3_PAT_id2");
rdi.digCap("T10_27_gyr_bias_current_trimming_V3_Digcap_id2").vecVarOnly().pin("SDO").capMode(TA::SER).samples(16*1).bitPerWord(16).execute();
rdi.smartVec().label(s_splited_pat_name[4]).pin("SDX").writeData("RES_PROG_FE_rtv", Wri_Bit_Length, Wri_Bit_Position).execute();
rdi.smartVec().label(s_splited_pat_name[5]).pin("SDX").writeData("RES_PROG_VCO_rtv", Wri_Bit_Length, Wri_Bit_Position).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
ARRAY_I Vec=rdi.id("T10_27_gyr_bias_current_trimming_V3_Digcap_id2").getVector();
N_ANA_TRM_RES_PROG2_RD[CURRENT_SITE_NUMBER()-1] = reverse_ras_result(Vec[0]);
RES_PROG_FE_RD[CURRENT_SITE_NUMBER()-1] = N_ANA_TRM_RES_PROG2_RD[CURRENT_SITE_NUMBER()-1] & 63;
RES_PROG_VCO_RD[CURRENT_SITE_NUMBER()-1] = N_ANA_TRM_RES_PROG2_RD[CURRENT_SITE_NUMBER()-1] & 16128;
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
int Func_result0 = rdi.id("T10_27_gyr_bias_current_trimming_V3_PAT_id0").getBurstPassFail();
int Func_result1 = rdi.id("T10_27_gyr_bias_current_trimming_V3_PAT_id1").getBurstPassFail();
int Func_result2 = rdi.id("T10_27_gyr_bias_current_trimming_V3_PAT_id2").getBurstPassFail();
FuncPrint("Func_result0", Func_result0);
FuncPrint("Func_result1", Func_result1);
FuncPrint("Func_result2", Func_result2);
int Func_result = 1 * Func_result0 * Func_result1 * Func_result2;
int RD_WR_compare = 1;
if ((RES_PROG_I_RD[CURRENT_SITE_NUMBER()-1]) != N_OPT_IBIAS_G[CURRENT_SITE_NUMBER()-1]) RD_WR_compare=0;
if ((RES_PROG_I2_RD[CURRENT_SITE_NUMBER()-1]) != N_OPT_IBIAS_G_54[CURRENT_SITE_NUMBER()-1]) RD_WR_compare=0;
if ((RES_PROG_A_RD[CURRENT_SITE_NUMBER()-1]) != N_OPT_IBIAS_G[CURRENT_SITE_NUMBER()-1]) RD_WR_compare=0;
if ((RES_PROG_FE_RD[CURRENT_SITE_NUMBER()-1]) != RES_PROG_FE[CURRENT_SITE_NUMBER()-1]) RD_WR_compare=0;
if ((RES_PROG_VCO_RD[CURRENT_SITE_NUMBER()-1]) != RES_PROG_VCO[CURRENT_SITE_NUMBER()-1]) RD_WR_compare=0;
FuncPrint("RD_WR_compare", RD_WR_compare);
Func_result = Func_result * RD_WR_compare;
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
for (int i = 0; i<10; i++)
{
TestLog("I_BIAS_G_0"+rdi.itos(i), I_BIAS_G[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i = 10; i<64; i++)
{
TestLog("I_BIAS_G_"+rdi.itos(i), I_BIAS_G[CURRENT_SITE_NUMBER()-1][i]);
}
TestLog("N_OPT_IBIAS_G", N_OPT_IBIAS_G[CURRENT_SITE_NUMBER()-1]);
TestLog("I_OPT_IBIAS_G", I_OPT_IBIAS_G[CURRENT_SITE_NUMBER()-1]);
TestLog("RES_PROG_I_RD", RES_PROG_I_RD[CURRENT_SITE_NUMBER()-1]);
TestLog("RES_PROG_I2_RD", RES_PROG_I2_RD[CURRENT_SITE_NUMBER()-1]);
TestLog("RES_PROG_A_RD", RES_PROG_A_RD[CURRENT_SITE_NUMBER()-1]);
TestLog("RES_PROG_VCO_RD", RES_PROG_VCO_RD[CURRENT_SITE_NUMBER()-1]>>8);
TestLog("RES_PROG_FE_RD", RES_PROG_FE_RD[CURRENT_SITE_NUMBER()-1]);
// Auto_Code_Judge_and_log
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_27_gyr_bias_current_trimming_V3", T10_27_gyr_bias_current_trimming_V3);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_CONF', 0x0100) # tm_se_meas=1 tm_bus_inv=0 (COM_TIOP for BUF1_INP)
wac('TM_PIN', 0x0009) # tm_int2_sel=4 (BUF1_INP) tm_int2_en=1
wac('TM_ADDR', 0x010e) # tm_cfg=1 (COM_TB2= IB_ACC, COM_TB1= IB_GYR) tm_addr=e (tm_bus_sel=tm_addr(3:2)=3 (COM_TION/P) COM_TIO_REF;
# enable the power_ana_test_multiplexor); any tm_addr value except off/0 enables the test module
dly(100e-6)
gac('I_BIAS_GYR_M', 'INT2', i_range=2e-6)
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_28_GYR_Bias_Current_Measurement_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double I_BIAS_GYR_M[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T10_28_GYR_Bias_Current_Measurement_V2_PAT_id");
rdi.dc("T10_28_GYR_Bias_Current_Measurement_V2DC_id0").label(s_label_name)
// Alarm::vForce value had not been assigned in TOI, need manual check
.insertSub(i_comment_line0[0]).pin("INT2").vForce(0 V).iMeas().valueMode(TA::BADC).iRange(10e-06 A).average(16).measWait(0.1 ms) //I_BIAS_GYR_M
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T10_28_GYR_Bias_Current_Measurement_V2DC_id0").getMultiValue("INT2");
I_BIAS_GYR_M[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[0];
FuncPrint("I_BIAS_GYR_M", I_BIAS_GYR_M[CURRENT_SITE_NUMBER()-1]);
int Func_result = rdi.id("T10_28_GYR_Bias_Current_Measurement_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("I_BIAS_GYR_M", I_BIAS_GYR_M[CURRENT_SITE_NUMBER()-1]);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_28_GYR_Bias_Current_Measurement_V2", T10_28_GYR_Bias_Current_Measurement_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: GYRA bias current characterization
# Characterization loop derived from T10_27_gyr_bias_current_trimming
# ib_gyr@ANAIO1
#############################################################################################################
cmt('Version info: $Revision: 4 $ $Author: luz3sgh $ $Date: 2024/07/02 01:48:53 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_CONF', 0x0100) # tm_se_meas=1 tm_bus_inv=0 (COM_TIOP for BUF1_INP)
wac('TM_PIN', 0x0009) # tm_int2_sel=4 (BUF1_INP) tm_int2_en=1
wac('TM_ADDR', 0x010e) # tm_cfg=1 (COM_TB2= IB_ACC, COM_TB1= IB_GYR) tm_addr=e (tm_bus_sel=tm_addr(3:2)=3 (COM_TION/P) COM_TIO_REF;
# enable the power_ana_test_multiplexor); any tm_addr value except off/0 enables the test module
# Characterization loop
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x003f) # Set masking register
ras('REG_VALUE', 'ANA_TRM_RES_PROG1') # Store the current value
for n in range (0, 64, 1):
cmt('Set trim index to value {} in range (0..63)'.format(n))
wr('ANA_TRM_RES_PROG1', n) # <5:0> gyr_trm_res_prog_i
rac('ANA_TRM_RES_PROG1', n, 0x003f)
dly(271*74e-9)
gac(f'I_BIAS_G_C[{n:02d}]', 'INT2', i_range=2e-6)
log(f'I_BIAS_G_C[{n:02d}]')
dly(148e-9)
wri('ANA_TRM_RES_PROG1', 'REG_VALUE')
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Clean
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* T10_29_GYR_Bias_Current_Char_V4, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH: fix some bugs.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_29_GYR_Bias_Current_Char_V4: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 2;
vector<int> i_comment_line[i_split_count];
static int i_REG_VALUE[xNSitES];
ARRAY_I aI_Captured_0;
static double d_I_BIAS_G_C[xNSitES][64];
ARRAY_D ad_I_BIAS_G_C;
static int i_WRITE_BACK[xNSitES];
static int i_vec_Num1[32] = {0};
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(i_REG_VALUE, 9, xNSitES);
//!"CTmsg: cut pattern to 2 parts @ oriAVCvecline [14205]
//!"CTmsg: cut pattern to 2 parts @ binarypatline [14195]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_29_GYR_Bias_Current_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 4 > <Author: luz3sgh > <Date: 2024/07/02 01:48:53 GMT >}
valid comment[ 1] @ avcline 1162: {ras('REG_VALUE', 'ANA_TRM_RES_PROG1')}
valid comment[ 2] @ avcline 1275: {cmt: Set trim index to value 0 in range (0..63)}
valid comment[ 3] @ avcline 1476: {gac('I_BIAS_G_C[00]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 3] @ avcline 1476: {log('I_BIAS_G_C[00]', '', '', 0, 0)}
valid comment[ 4] @ avcline 1477: {cmt: Set trim index to value 1 in range (0..63)}
valid comment[ 5] @ avcline 1678: {gac('I_BIAS_G_C[01]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 5] @ avcline 1678: {log('I_BIAS_G_C[01]', '', '', 0, 0)}
valid comment[ 6] @ avcline 1679: {cmt: Set trim index to value 2 in range (0..63)}
valid comment[ 7] @ avcline 1880: {gac('I_BIAS_G_C[02]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 7] @ avcline 1880: {log('I_BIAS_G_C[02]', '', '', 0, 0)}
valid comment[ 8] @ avcline 1881: {cmt: Set trim index to value 3 in range (0..63)}
valid comment[ 9] @ avcline 2082: {gac('I_BIAS_G_C[03]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 9] @ avcline 2082: {log('I_BIAS_G_C[03]', '', '', 0, 0)}
valid comment[ 10] @ avcline 2083: {cmt: Set trim index to value 4 in range (0..63)}
valid comment[ 11] @ avcline 2284: {gac('I_BIAS_G_C[04]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 11] @ avcline 2284: {log('I_BIAS_G_C[04]', '', '', 0, 0)}
valid comment[ 12] @ avcline 2285: {cmt: Set trim index to value 5 in range (0..63)}
valid comment[ 13] @ avcline 2486: {gac('I_BIAS_G_C[05]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 13] @ avcline 2486: {log('I_BIAS_G_C[05]', '', '', 0, 0)}
valid comment[ 14] @ avcline 2487: {cmt: Set trim index to value 6 in range (0..63)}
valid comment[ 15] @ avcline 2688: {gac('I_BIAS_G_C[06]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 15] @ avcline 2688: {log('I_BIAS_G_C[06]', '', '', 0, 0)}
valid comment[ 16] @ avcline 2689: {cmt: Set trim index to value 7 in range (0..63)}
valid comment[ 17] @ avcline 2890: {gac('I_BIAS_G_C[07]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 17] @ avcline 2890: {log('I_BIAS_G_C[07]', '', '', 0, 0)}
valid comment[ 18] @ avcline 2891: {cmt: Set trim index to value 8 in range (0..63)}
valid comment[ 19] @ avcline 3092: {gac('I_BIAS_G_C[08]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 19] @ avcline 3092: {log('I_BIAS_G_C[08]', '', '', 0, 0)}
valid comment[ 20] @ avcline 3093: {cmt: Set trim index to value 9 in range (0..63)}
valid comment[ 21] @ avcline 3294: {gac('I_BIAS_G_C[09]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 21] @ avcline 3294: {log('I_BIAS_G_C[09]', '', '', 0, 0)}
valid comment[ 22] @ avcline 3295: {cmt: Set trim index to value 10 in range (0..63)}
valid comment[ 23] @ avcline 3496: {gac('I_BIAS_G_C[10]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 23] @ avcline 3496: {log('I_BIAS_G_C[10]', '', '', 0, 0)}
valid comment[ 24] @ avcline 3497: {cmt: Set trim index to value 11 in range (0..63)}
valid comment[ 25] @ avcline 3698: {gac('I_BIAS_G_C[11]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 25] @ avcline 3698: {log('I_BIAS_G_C[11]', '', '', 0, 0)}
valid comment[ 26] @ avcline 3699: {cmt: Set trim index to value 12 in range (0..63)}
valid comment[ 27] @ avcline 3900: {gac('I_BIAS_G_C[12]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 27] @ avcline 3900: {log('I_BIAS_G_C[12]', '', '', 0, 0)}
valid comment[ 28] @ avcline 3901: {cmt: Set trim index to value 13 in range (0..63)}
valid comment[ 29] @ avcline 4102: {gac('I_BIAS_G_C[13]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 29] @ avcline 4102: {log('I_BIAS_G_C[13]', '', '', 0, 0)}
valid comment[ 30] @ avcline 4103: {cmt: Set trim index to value 14 in range (0..63)}
valid comment[ 31] @ avcline 4304: {gac('I_BIAS_G_C[14]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 31] @ avcline 4304: {log('I_BIAS_G_C[14]', '', '', 0, 0)}
valid comment[ 32] @ avcline 4305: {cmt: Set trim index to value 15 in range (0..63)}
valid comment[ 33] @ avcline 4506: {gac('I_BIAS_G_C[15]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 33] @ avcline 4506: {log('I_BIAS_G_C[15]', '', '', 0, 0)}
valid comment[ 34] @ avcline 4507: {cmt: Set trim index to value 16 in range (0..63)}
valid comment[ 35] @ avcline 4708: {gac('I_BIAS_G_C[16]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 35] @ avcline 4708: {log('I_BIAS_G_C[16]', '', '', 0, 0)}
valid comment[ 36] @ avcline 4709: {cmt: Set trim index to value 17 in range (0..63)}
valid comment[ 37] @ avcline 4910: {gac('I_BIAS_G_C[17]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 37] @ avcline 4910: {log('I_BIAS_G_C[17]', '', '', 0, 0)}
valid comment[ 38] @ avcline 4911: {cmt: Set trim index to value 18 in range (0..63)}
valid comment[ 39] @ avcline 5112: {gac('I_BIAS_G_C[18]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 39] @ avcline 5112: {log('I_BIAS_G_C[18]', '', '', 0, 0)}
valid comment[ 40] @ avcline 5113: {cmt: Set trim index to value 19 in range (0..63)}
valid comment[ 41] @ avcline 5314: {gac('I_BIAS_G_C[19]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 41] @ avcline 5314: {log('I_BIAS_G_C[19]', '', '', 0, 0)}
valid comment[ 42] @ avcline 5315: {cmt: Set trim index to value 20 in range (0..63)}
valid comment[ 43] @ avcline 5516: {gac('I_BIAS_G_C[20]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 43] @ avcline 5516: {log('I_BIAS_G_C[20]', '', '', 0, 0)}
valid comment[ 44] @ avcline 5517: {cmt: Set trim index to value 21 in range (0..63)}
valid comment[ 45] @ avcline 5718: {gac('I_BIAS_G_C[21]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 45] @ avcline 5718: {log('I_BIAS_G_C[21]', '', '', 0, 0)}
valid comment[ 46] @ avcline 5719: {cmt: Set trim index to value 22 in range (0..63)}
valid comment[ 47] @ avcline 5920: {gac('I_BIAS_G_C[22]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 47] @ avcline 5920: {log('I_BIAS_G_C[22]', '', '', 0, 0)}
valid comment[ 48] @ avcline 5921: {cmt: Set trim index to value 23 in range (0..63)}
valid comment[ 49] @ avcline 6122: {gac('I_BIAS_G_C[23]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 49] @ avcline 6122: {log('I_BIAS_G_C[23]', '', '', 0, 0)}
valid comment[ 50] @ avcline 6123: {cmt: Set trim index to value 24 in range (0..63)}
valid comment[ 51] @ avcline 6324: {gac('I_BIAS_G_C[24]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 51] @ avcline 6324: {log('I_BIAS_G_C[24]', '', '', 0, 0)}
valid comment[ 52] @ avcline 6325: {cmt: Set trim index to value 25 in range (0..63)}
valid comment[ 53] @ avcline 6526: {gac('I_BIAS_G_C[25]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 53] @ avcline 6526: {log('I_BIAS_G_C[25]', '', '', 0, 0)}
valid comment[ 54] @ avcline 6527: {cmt: Set trim index to value 26 in range (0..63)}
valid comment[ 55] @ avcline 6728: {gac('I_BIAS_G_C[26]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 55] @ avcline 6728: {log('I_BIAS_G_C[26]', '', '', 0, 0)}
valid comment[ 56] @ avcline 6729: {cmt: Set trim index to value 27 in range (0..63)}
valid comment[ 57] @ avcline 6930: {gac('I_BIAS_G_C[27]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 57] @ avcline 6930: {log('I_BIAS_G_C[27]', '', '', 0, 0)}
valid comment[ 58] @ avcline 6931: {cmt: Set trim index to value 28 in range (0..63)}
valid comment[ 59] @ avcline 7132: {gac('I_BIAS_G_C[28]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 59] @ avcline 7132: {log('I_BIAS_G_C[28]', '', '', 0, 0)}
valid comment[ 60] @ avcline 7133: {cmt: Set trim index to value 29 in range (0..63)}
valid comment[ 61] @ avcline 7334: {gac('I_BIAS_G_C[29]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 61] @ avcline 7334: {log('I_BIAS_G_C[29]', '', '', 0, 0)}
valid comment[ 62] @ avcline 7335: {cmt: Set trim index to value 30 in range (0..63)}
valid comment[ 63] @ avcline 7536: {gac('I_BIAS_G_C[30]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 63] @ avcline 7536: {log('I_BIAS_G_C[30]', '', '', 0, 0)}
valid comment[ 64] @ avcline 7537: {cmt: Set trim index to value 31 in range (0..63)}
valid comment[ 65] @ avcline 7738: {gac('I_BIAS_G_C[31]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 65] @ avcline 7738: {log('I_BIAS_G_C[31]', '', '', 0, 0)}
valid comment[ 66] @ avcline 7739: {cmt: Set trim index to value 32 in range (0..63)}
valid comment[ 67] @ avcline 7940: {gac('I_BIAS_G_C[32]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 67] @ avcline 7940: {log('I_BIAS_G_C[32]', '', '', 0, 0)}
valid comment[ 68] @ avcline 7941: {cmt: Set trim index to value 33 in range (0..63)}
valid comment[ 69] @ avcline 8142: {gac('I_BIAS_G_C[33]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 69] @ avcline 8142: {log('I_BIAS_G_C[33]', '', '', 0, 0)}
valid comment[ 70] @ avcline 8143: {cmt: Set trim index to value 34 in range (0..63)}
valid comment[ 71] @ avcline 8344: {gac('I_BIAS_G_C[34]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 71] @ avcline 8344: {log('I_BIAS_G_C[34]', '', '', 0, 0)}
valid comment[ 72] @ avcline 8345: {cmt: Set trim index to value 35 in range (0..63)}
valid comment[ 73] @ avcline 8546: {gac('I_BIAS_G_C[35]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 73] @ avcline 8546: {log('I_BIAS_G_C[35]', '', '', 0, 0)}
valid comment[ 74] @ avcline 8547: {cmt: Set trim index to value 36 in range (0..63)}
valid comment[ 75] @ avcline 8748: {gac('I_BIAS_G_C[36]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 75] @ avcline 8748: {log('I_BIAS_G_C[36]', '', '', 0, 0)}
valid comment[ 76] @ avcline 8749: {cmt: Set trim index to value 37 in range (0..63)}
valid comment[ 77] @ avcline 8950: {gac('I_BIAS_G_C[37]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 77] @ avcline 8950: {log('I_BIAS_G_C[37]', '', '', 0, 0)}
valid comment[ 78] @ avcline 8951: {cmt: Set trim index to value 38 in range (0..63)}
valid comment[ 79] @ avcline 9152: {gac('I_BIAS_G_C[38]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 79] @ avcline 9152: {log('I_BIAS_G_C[38]', '', '', 0, 0)}
valid comment[ 80] @ avcline 9153: {cmt: Set trim index to value 39 in range (0..63)}
valid comment[ 81] @ avcline 9354: {gac('I_BIAS_G_C[39]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 81] @ avcline 9354: {log('I_BIAS_G_C[39]', '', '', 0, 0)}
valid comment[ 82] @ avcline 9355: {cmt: Set trim index to value 40 in range (0..63)}
valid comment[ 83] @ avcline 9556: {gac('I_BIAS_G_C[40]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 83] @ avcline 9556: {log('I_BIAS_G_C[40]', '', '', 0, 0)}
valid comment[ 84] @ avcline 9557: {cmt: Set trim index to value 41 in range (0..63)}
valid comment[ 85] @ avcline 9758: {gac('I_BIAS_G_C[41]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 85] @ avcline 9758: {log('I_BIAS_G_C[41]', '', '', 0, 0)}
valid comment[ 86] @ avcline 9759: {cmt: Set trim index to value 42 in range (0..63)}
valid comment[ 87] @ avcline 9960: {gac('I_BIAS_G_C[42]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 87] @ avcline 9960: {log('I_BIAS_G_C[42]', '', '', 0, 0)}
valid comment[ 88] @ avcline 9961: {cmt: Set trim index to value 43 in range (0..63)}
valid comment[ 89] @ avcline 10162: {gac('I_BIAS_G_C[43]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 89] @ avcline 10162: {log('I_BIAS_G_C[43]', '', '', 0, 0)}
valid comment[ 90] @ avcline 10163: {cmt: Set trim index to value 44 in range (0..63)}
valid comment[ 91] @ avcline 10364: {gac('I_BIAS_G_C[44]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 91] @ avcline 10364: {log('I_BIAS_G_C[44]', '', '', 0, 0)}
valid comment[ 92] @ avcline 10365: {cmt: Set trim index to value 45 in range (0..63)}
valid comment[ 93] @ avcline 10566: {gac('I_BIAS_G_C[45]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 93] @ avcline 10566: {log('I_BIAS_G_C[45]', '', '', 0, 0)}
valid comment[ 94] @ avcline 10567: {cmt: Set trim index to value 46 in range (0..63)}
valid comment[ 95] @ avcline 10768: {gac('I_BIAS_G_C[46]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 95] @ avcline 10768: {log('I_BIAS_G_C[46]', '', '', 0, 0)}
valid comment[ 96] @ avcline 10769: {cmt: Set trim index to value 47 in range (0..63)}
valid comment[ 97] @ avcline 10970: {gac('I_BIAS_G_C[47]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 97] @ avcline 10970: {log('I_BIAS_G_C[47]', '', '', 0, 0)}
valid comment[ 98] @ avcline 10971: {cmt: Set trim index to value 48 in range (0..63)}
valid comment[ 99] @ avcline 11172: {gac('I_BIAS_G_C[48]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 99] @ avcline 11172: {log('I_BIAS_G_C[48]', '', '', 0, 0)}
valid comment[100] @ avcline 11173: {cmt: Set trim index to value 49 in range (0..63)}
valid comment[101] @ avcline 11374: {gac('I_BIAS_G_C[49]', 'INT2', 2e-06, 0.0001, True)}
valid comment[101] @ avcline 11374: {log('I_BIAS_G_C[49]', '', '', 0, 0)}
valid comment[102] @ avcline 11375: {cmt: Set trim index to value 50 in range (0..63)}
valid comment[103] @ avcline 11576: {gac('I_BIAS_G_C[50]', 'INT2', 2e-06, 0.0001, True)}
valid comment[103] @ avcline 11576: {log('I_BIAS_G_C[50]', '', '', 0, 0)}
valid comment[104] @ avcline 11577: {cmt: Set trim index to value 51 in range (0..63)}
valid comment[105] @ avcline 11778: {gac('I_BIAS_G_C[51]', 'INT2', 2e-06, 0.0001, True)}
valid comment[105] @ avcline 11778: {log('I_BIAS_G_C[51]', '', '', 0, 0)}
valid comment[106] @ avcline 11779: {cmt: Set trim index to value 52 in range (0..63)}
valid comment[107] @ avcline 11980: {gac('I_BIAS_G_C[52]', 'INT2', 2e-06, 0.0001, True)}
valid comment[107] @ avcline 11980: {log('I_BIAS_G_C[52]', '', '', 0, 0)}
valid comment[108] @ avcline 11981: {cmt: Set trim index to value 53 in range (0..63)}
valid comment[109] @ avcline 12182: {gac('I_BIAS_G_C[53]', 'INT2', 2e-06, 0.0001, True)}
valid comment[109] @ avcline 12182: {log('I_BIAS_G_C[53]', '', '', 0, 0)}
valid comment[110] @ avcline 12183: {cmt: Set trim index to value 54 in range (0..63)}
valid comment[111] @ avcline 12384: {gac('I_BIAS_G_C[54]', 'INT2', 2e-06, 0.0001, True)}
valid comment[111] @ avcline 12384: {log('I_BIAS_G_C[54]', '', '', 0, 0)}
valid comment[112] @ avcline 12385: {cmt: Set trim index to value 55 in range (0..63)}
valid comment[113] @ avcline 12586: {gac('I_BIAS_G_C[55]', 'INT2', 2e-06, 0.0001, True)}
valid comment[113] @ avcline 12586: {log('I_BIAS_G_C[55]', '', '', 0, 0)}
valid comment[114] @ avcline 12587: {cmt: Set trim index to value 56 in range (0..63)}
valid comment[115] @ avcline 12788: {gac('I_BIAS_G_C[56]', 'INT2', 2e-06, 0.0001, True)}
valid comment[115] @ avcline 12788: {log('I_BIAS_G_C[56]', '', '', 0, 0)}
valid comment[116] @ avcline 12789: {cmt: Set trim index to value 57 in range (0..63)}
valid comment[117] @ avcline 12990: {gac('I_BIAS_G_C[57]', 'INT2', 2e-06, 0.0001, True)}
valid comment[117] @ avcline 12990: {log('I_BIAS_G_C[57]', '', '', 0, 0)}
valid comment[118] @ avcline 12991: {cmt: Set trim index to value 58 in range (0..63)}
valid comment[119] @ avcline 13192: {gac('I_BIAS_G_C[58]', 'INT2', 2e-06, 0.0001, True)}
valid comment[119] @ avcline 13192: {log('I_BIAS_G_C[58]', '', '', 0, 0)}
valid comment[120] @ avcline 13193: {cmt: Set trim index to value 59 in range (0..63)}
valid comment[121] @ avcline 13394: {gac('I_BIAS_G_C[59]', 'INT2', 2e-06, 0.0001, True)}
valid comment[121] @ avcline 13394: {log('I_BIAS_G_C[59]', '', '', 0, 0)}
valid comment[122] @ avcline 13395: {cmt: Set trim index to value 60 in range (0..63)}
valid comment[123] @ avcline 13596: {gac('I_BIAS_G_C[60]', 'INT2', 2e-06, 0.0001, True)}
valid comment[123] @ avcline 13596: {log('I_BIAS_G_C[60]', '', '', 0, 0)}
valid comment[124] @ avcline 13597: {cmt: Set trim index to value 61 in range (0..63)}
valid comment[125] @ avcline 13798: {gac('I_BIAS_G_C[61]', 'INT2', 2e-06, 0.0001, True)}
valid comment[125] @ avcline 13798: {log('I_BIAS_G_C[61]', '', '', 0, 0)}
valid comment[126] @ avcline 13799: {cmt: Set trim index to value 62 in range (0..63)}
valid comment[127] @ avcline 14000: {gac('I_BIAS_G_C[62]', 'INT2', 2e-06, 0.0001, True)}
valid comment[127] @ avcline 14000: {log('I_BIAS_G_C[62]', '', '', 0, 0)}
valid comment[128] @ avcline 14001: {cmt: Set trim index to value 63 in range (0..63)}
valid comment[129] @ avcline 14202: {gac('I_BIAS_G_C[63]', 'INT2', 2e-06, 0.0001, True)}
valid comment[129] @ avcline 14202: {log('I_BIAS_G_C[63]', '', '', 0, 0)}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.digCap("digcapid_0").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(1*16).execute();
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][3]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[00]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][5]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[01]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][7]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[02]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][9]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[03]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][11]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[04]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][13]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[05]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][15]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[06]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][17]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[07]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][19]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[08]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][21]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[09]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][23]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[10]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][25]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[11]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][27]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[12]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][29]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[13]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][31]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[14]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][33]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[15]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][35]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[16]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][37]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[17]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][39]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[18]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][41]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[19]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][43]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[20]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][45]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[21]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][47]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[22]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][49]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[23]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][51]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[24]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][53]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[25]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][55]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[26]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][57]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[27]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][59]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[28]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][61]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[29]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][63]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[30]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][65]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[31]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][67]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[32]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][69]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[33]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][71]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[34]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][73]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[35]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][75]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[36]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][77]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[37]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][79]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[38]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][81]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[39]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][83]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[40]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][85]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[41]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][87]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[42]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][89]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[43]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][91]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[44]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][93]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[45]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][95]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[46]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][97]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[47]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][99]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[48]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][101]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[49]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][103]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[50]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][105]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[51]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][107]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[52]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][109]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[53]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][111]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[54]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][113]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[55]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][115]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[56]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][117]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[57]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][119]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[58]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][121]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[59]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][123]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[60]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][125]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[61]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][127]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[62]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][129]).pin("INT2").iMeas().iRange(10 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_G_C[63]', 'INT2', 2e-06, 0.0001, True)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(64); ad_jsubresults_INT2.init(-9.9);
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
aI_Captured_0[0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[0]);
i_REG_VALUE[curSite] = aI_Captured_0[0];
FuncPrint("REG_VALUE",i_REG_VALUE[curSite]);
for(int i=0; i<64; i++){
d_I_BIAS_G_C[curSite][i] = ad_jsubresults_INT2[0 + i];
FuncPrint("I_BIAS_G_C_" + rdi.itos(curSite) + "_"+ rdi.itos(i) ,d_I_BIAS_G_C[curSite][i]);
}
//Add calc code if necessary
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 14205: {wri('ANA_TRM_RES_PROG1', 'REG_VALUE')}
valid comment[ 1] @ avcline 15244: {Test End: T10_29_GYR_Bias_Current_Char}
*/
static int i_vec_iposition1[32] = {
31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,
48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63
};
for (int i = 0; i < 32; i++)
{
i_vec_Num1[i] = i_vec_iposition1[i];
}
FOR_EACH_SITE_BEGIN();
i_WRITE_BACK[curSite] = Switch_High_Low_Bits_16Bits(i_REG_VALUE[curSite]);
Func_Vector_Dynamic_Write(s_splited_pat_name[1], "SDX", i_vec_Num1, 32, i_WRITE_BACK[curSite], 0, 2); //Notes. TEI check per project
FOR_EACH_SITE_END();
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.func().label(s_splited_pat_name[1]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
for(int i=0; i < 64; i++){
TestLog(s_Func_Test_Name_Add_2Num("I_BIAS_G_C_", i), d_I_BIAS_G_C[curSite][i]);
}
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T10_29_GYR_Bias_Current_Char_V4", T10_29_GYR_Bias_Current_Char_V4);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_CONF', 0x0101) # tm_se_meas=1 (BUFF2_INP= VSS) tm_bus_inv=0 tm_buf_pwrup=1 (tbuf_tb1_on)
# single ended meas. because the power_ana_test_multiplexor_2 provides VDD_FOSC/VDD_BGP
wac('TM_PIN', 0x0095) # tm_asdx_sel=4 (BUF2_INP) tm_asdx_en=1 tm_int2_sel=2 (BUF1_OUT) tm_int2_en=1
wac('TM_ADDR', 0x0f0d) # tm_cfg=f (COM_TB2= VDD_BGP, COM_TB1= VDD_FOSC) tm_addr=d (COM_TIO_PWR;
# enable the power_ana_test_multiplexor_2 for power supplies; tm_bus_sel=tm_addr(3:2)=3 (BUFF1/2_INP= COM_TIOP/N due to tm_bus_inv=0) );
# any tm_addr value except off/0 enables the test module
dly(100e-6)
gav('V_VDD_FOSC_M_RAW', 'INT2', 'ASDX') # no check (V_OFF1_ECOFF)
calc('V_VDD_FOSC', 'V_VDD_FOSC_M_RAW', '-', 'V_OFF1_ECOFF')
log('V_VDD_FOSC')
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_30_VDD_FOSC_measurement_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double V_VDD_FOSC_M_RAW[xNSitES], V_VDD_FOSC[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T10_30_VDD_FOSC_measurement_V2_PAT_id");
rdi.dc("T10_30_VDD_FOSC_measurement_V2DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms) //V_VDD_FOSC_M_RAW
.execute();
rdi.hwRelay().pin("INT2,ASDX").setOff("ALL").execute();
RDI_END();
ON_FIRST_INVOCATION_END();
ARRAY_D JSUB_results_ASDX;
JSUB_results_ASDX = rdi.id("T10_30_VDD_FOSC_measurement_V2DC_id0").getMultiValue("ASDX");
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T10_30_VDD_FOSC_measurement_V2DC_id0").getMultiValue("INT2");
V_VDD_FOSC_M_RAW[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[0] - JSUB_results_ASDX[0];
V_VDD_FOSC[CURRENT_SITE_NUMBER()-1] = V_VDD_FOSC_M_RAW[CURRENT_SITE_NUMBER()-1] - V_OFF1_ECOFF[CURRENT_SITE_NUMBER()-1];
FuncPrint("JSUB_results_ASDX", JSUB_results_ASDX[0]);
FuncPrint("JSUB_results_INT2", JSUB_results_INT2[0]);
FuncPrint("V_VDD_FOSC_M_RAW", V_VDD_FOSC_M_RAW[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_VDD_FOSC", V_VDD_FOSC[CURRENT_SITE_NUMBER()-1]);
int Func_result = rdi.id("T10_30_VDD_FOSC_measurement_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("V_VDD_FOSC", V_VDD_FOSC[CURRENT_SITE_NUMBER()-1]);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_30_VDD_FOSC_measurement_V2", T10_30_VDD_FOSC_measurement_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_CONF', 0x0111) # tm_se_meas=1 (BUFF2_INP= VSS) tm_bus_inv=1 tm_buf_pwrup=1 (tbuf_tb1_on)
# single ended meas. because the power_ana_test_multiplexor_2 provides VDD_FOSC/VDD_BGP
wac('TM_PIN', 0x0095) # tm_asdx_sel=4 (BUF2_INP) tm_asdx_en=1 tm_int2_sel=2 (BUF1_OUT) tm_int2_en=1
wac('TM_ADDR', 0x0f0d) # tm_cfg=f (COM_TB2= VDD_BGP, COM_TB1= VDD_FOSC) tm_addr=d (COM_TIO_PWR;
# enable the power_ana_test_multiplexor_2 for power supplies; tm_bus_sel=tm_addr(3:2)=3 (BUFF1/2_INP= COM_TIOP/N due to tm_bus_inv=0) );
dly(100e-6)
gav('V_VDD_BGP_M_RAW', 'INT2', 'ASDX')
calc('V_VDD_BGP', 'V_VDD_BGP_M_RAW', '-', 'V_OFF1_ECOFF')
log('V_VDD_BGP')
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs and reset test configuration
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_31_VDD_BGP_measurement_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double V_VDD_BGP_M_RAW[xNSitES], V_VDD_BGP[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T10_31_VDD_BGP_measurement_V2_PAT_id");
rdi.dc("T10_31_VDD_BGP_measurement_V2DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms) //V_VDD_BGP_M_RAW
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
ARRAY_D JSUB_results_ASDX;
JSUB_results_ASDX = rdi.id("T10_31_VDD_BGP_measurement_V2DC_id0").getMultiValue("ASDX");
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T10_31_VDD_BGP_measurement_V2DC_id0").getMultiValue("INT2");
V_VDD_BGP_M_RAW[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[0] - JSUB_results_ASDX[0];
V_VDD_BGP[CURRENT_SITE_NUMBER()-1] = V_VDD_BGP_M_RAW[CURRENT_SITE_NUMBER()-1] - V_OFF1_ECOFF[CURRENT_SITE_NUMBER()-1];
FuncPrint("JSUB_results_ASDX", JSUB_results_ASDX[0]);
FuncPrint("JSUB_results_INT2", JSUB_results_INT2[0]);
FuncPrint("V_VDD_BGP_M_RAW", V_VDD_BGP_M_RAW[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_VDD_BGP", V_VDD_BGP[CURRENT_SITE_NUMBER()-1]);
int Func_result = rdi.id("T10_31_VDD_BGP_measurement_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("V_VDD_BGP", V_VDD_BGP[CURRENT_SITE_NUMBER()-1]);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_31_VDD_BGP_measurement_V2", T10_31_VDD_BGP_measurement_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc005) # Switch to the FIFO register page
wac('OCP_MASK', 0x0102) # activate bit 8 (fifo_acc_en) and bit 1 (fifo_en)
wac('FIFO_CONF', 0x0102) # fifo_acc_en=1 fifo_en=1 (new with CA version, see ASICAP-4450)
wr('OCP_MASK', 0x0000) # reset OCP mask
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_CONF', 0x0001) # tm_se_meas=0 tm_bus_inv=0 tm_buf_pwrup=1 (tbuf_tb1_on)
wac('TM_PIN', 0x0095) # tm_asdx_sel=4 (BUF2_INP) tm_asdx_en=1 tm_int2_sel=2 (BUF1_OUT) tm_int2_en=1
wac('TM_ADDR', 0x050d) # tm_cfg= 5 (COM_TB2= VSS, COM_TB1= VDDD_RAM; CFG[3]=0) tm_addr=d (COM_TIO_PWR;
# enable the power_ana_test_multiplexor_2 for power supplies; tm_bus_sel=tm_addr(3:2)=3 (BUFF1/2_INP= COM_TIOP/N due to tm_bus_inv=0) );
# any tm_addr value except off/0 enables the test module
dly(100e-6)
gav('V_VDDD_RAM_M_RAW', 'INT2', 'ASDX') # no check ()
calc('V_VDDD_RAM', 'V_VDDD_RAM_M_RAW', '-', 'V_OFF1_ECOFF')
log('V_VDDD_RAM')
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
wac('EXT_MODE', 0xc005) # Switch to the FIFO register page
wac('OCP_MASK', 0x0102) # activate bit 8 (fifo_acc_en) and bit 1 (fifo_en)
wac('FIFO_CONF', 0x0000) # reset value
wr('OCP_MASK', 0x0000) # reset OCP mask
rac('OCP_MASK', 0xffff) # Check masking register reset
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_33_VDDD_RAM_measurement_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double V_VDDD_RAM_M_RAW[xNSitES], V_VDDD_RAM[xNSitES];
// Auto_Code_Variable_define
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T10_33_VDDD_RAM_measurement_V2_PAT_id");
rdi.dc("T10_33_VDDD_RAM_measurement_V2DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms) //V_VDDD_RAM_M_RAW
.execute();
RDI_END();
// Auto_Code_Execution_Part
ON_FIRST_INVOCATION_END();
ARRAY_D JSUB_results_ASDX;
JSUB_results_ASDX = rdi.id("T10_33_VDDD_RAM_measurement_V2DC_id0").getMultiValue("ASDX");
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T10_33_VDDD_RAM_measurement_V2DC_id0").getMultiValue("INT2");
V_VDDD_RAM_M_RAW[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[0] - JSUB_results_ASDX[0];
V_VDDD_RAM[CURRENT_SITE_NUMBER()-1] = V_VDDD_RAM_M_RAW[CURRENT_SITE_NUMBER()-1] - V_OFF1_ECOFF[CURRENT_SITE_NUMBER()-1];
FuncPrint("JSUB_results_ASDX", JSUB_results_ASDX[0]);
FuncPrint("JSUB_results_INT2", JSUB_results_INT2[0]);
FuncPrint("V_VDDD_RAM_M_RAW", V_VDDD_RAM_M_RAW[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_VDDD_RAM", V_VDDD_RAM[CURRENT_SITE_NUMBER()-1]);
// Auto_Code_Retrieve_Data
int Func_result = rdi.id("T10_33_VDDD_RAM_measurement_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("V_VDDD_RAM", V_VDDD_RAM[CURRENT_SITE_NUMBER()-1]);
// Auto_Code_Judge_and_log
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_33_VDDD_RAM_measurement_V2", T10_33_VDDD_RAM_measurement_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc006) # Switch to FCU register page
wcb('temp_mode', 0x1) # Keep temp always on
wcb('temp_test_odr', 0x4) # Set temp test ODR to 800
wr('FCU_TEST_CMD', 0x8000) # Trigger temp datapath reset
# values of T01_10_SET_DEVICE_CONFIG_STC_ACC
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_CONF', 0x0011) # tm_se_meas=0 tm_bus_inv=1 tm_buf_pwrup=1 (tbuf_tb1_on)
# bus_inv required the power_ana_test_multiplexor_2 provides VSS_G/VDDT
wac('TM_PIN', 0x0095) # tm_asdx_sel=4 (BUF2_INP) tm_asdx_en=1 tm_int2_sel=2 (BUF1_OUT) tm_int2_en=1
wac('TM_ADDR', 0x0a0d) # tm_cfg=a (COM_TB2= VDDT, COM_TB1= VSS_G) tm_addr=d (COM_TIO_PWR;
# enable the power_ana_test_multiplexor_2 for power supplies; tm_bus_sel=tm_addr(3:2)=3 (BUFF1/2_INP= COM_TION/P due to tm_bus_inv=1) );
dly(100e-6)
gav('V_VDDT_M_RAW', 'INT2', 'ASDX') # no check ()
calc('V_VDDT', 'V_VDDT_M_RAW', '-', 'V_OFF1_ECOFF')
log('V_VDDT')
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_34_VDDT_LDO_measurement_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double V_VDDT_M_RAW[xNSitES], V_VDDT[xNSitES];
// Auto_Code_Variable_define
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T10_34_VDDT_LDO_measurement_V2_PAT_id");
rdi.dc("T10_34_VDDT_LDO_measurement_V2DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("INT2,ASDX",TA::BADC).vMeas().average(128).measWait(1 ms) //V_VDDT_M_RAW
.execute();
RDI_END();
// Auto_Code_Execution_Part
ON_FIRST_INVOCATION_END();
ARRAY_D JSUB_results_ASDX;
JSUB_results_ASDX = rdi.id("T10_34_VDDT_LDO_measurement_V2DC_id0").getMultiValue("ASDX");
ARRAY_D JSUB_results_INT2;
JSUB_results_INT2 = rdi.id("T10_34_VDDT_LDO_measurement_V2DC_id0").getMultiValue("INT2");
V_VDDT_M_RAW[CURRENT_SITE_NUMBER()-1] = JSUB_results_INT2[0] - JSUB_results_ASDX[0];
V_VDDT[CURRENT_SITE_NUMBER()-1] = V_VDDT_M_RAW[CURRENT_SITE_NUMBER()-1] - V_OFF1_ECOFF[CURRENT_SITE_NUMBER()-1];
FuncPrint("JSUB_results_INT2", JSUB_results_INT2[0]);
FuncPrint("JSUB_results_ASDX", JSUB_results_ASDX[0]);
FuncPrint("V_VDDT_M_RAW", V_VDDT_M_RAW[CURRENT_SITE_NUMBER()-1]);
FuncPrint("V_VDDT", V_VDDT[CURRENT_SITE_NUMBER()-1]);
// Auto_Code_Retrieve_Data
int Func_result = rdi.id("T10_34_VDDT_LDO_measurement_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("V_VDDT", V_VDDT[CURRENT_SITE_NUMBER()-1]);
// Auto_Code_Judge_and_log
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T10_34_VDDT_LDO_measurement_V2", T10_34_VDDT_LDO_measurement_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: Bandgap temperature coefficient characterization
# Characterization loop derived from T10_16_acc_bias_current_trimming
# The ACC BIAS current is routed to the pin INT2.
# For all the 16 values of pc_trm_bgp_tc the current values are logged to I_BIAS_ACC_TC[00] .. I_BIAS_ACC_TC[15].
# The DMS model doesn't show any change for these different pc_trm_bgp_tc values.
# In vbgp_acc_top (wreal) the input BGP_TRM_C (which is pc_trm_bgp_tc) affects only the voltage references
# VREF_AA/_FA/_LA/_S, but not output currents IB_xx.
#
# The limit for all the values I_BIAS_ACC_TC[] is set to 0.8 .. 1.1e-6 (around the target 0.9e-6, see T10_16).
#
# After the characterization loop the register ANA_TRM_BG is set to the previous value,
# and the test module / IO registers TM_CONF, TM_PIN, TM_ADDR, IO_TEST_IF are set to their reset values.
#############################################################################################################
cmt('Version info: $Revision: 3 $ $Author: luz3sgh $ $Date: 2024/07/02 01:51:04 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_CONF', 0x0110) # tm_se_meas=1 tm_bus_inv=1 (COM_TION instead of COM_TIOP for BUF1_INP)
wac('TM_PIN', 0x0009) # tm_int2_sel=4 (BUF1_INP) tm_int2_en=1
wac('TM_ADDR', 0x010e) # tm_cfg=1 (COM_TB2= IB_ACC, COM_TB1= IB_GYR) tm_addr=e (tm_bus_sel=tm_addr(3:2)=3 (COM_TION/P) COM_TIO_REF;
# enable the power_ana_test_multiplexor); any tm_addr value except off/0 enables the test module
# Characterization loop
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x000f) # ANA_TRM_BG<3:0> pc_trm_bgp_tc
ras('REG_VALUE', 'ANA_TRM_BG') # Store the current value
for n in range (0, 16, 1):
cmt('Set trim index to value {} in range (0..15)'.format(n))
wr('ANA_TRM_BG', n) # ANA_TRM_BG<3:0> pc_trm_bgp_tc
rac('ANA_TRM_BG',n, 0x000f)
dly(20e-6)
gac(f'I_BIAS_ACC_TC[{n:02d}]', 'INT2', i_range=2e-6)
log(f'I_BIAS_ACC_TC[{n:02d}]')
dly(592e-9)
wri('ANA_TRM_BG','REG_VALUE')
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Clean
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* T10_36_ACC_Bias_TC_Char_V3, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH: fix some bugs.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_36_ACC_Bias_TC_Char_V3: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 2;
vector<int> i_comment_line[i_split_count];
static int i_REG_VALUE[xNSitES];
ARRAY_I aI_Captured_0;
static double d_I_BIAS_ACC_TC[xNSitES][16];
ARRAY_D ad_I_BIAS_ACC_TC;
static int i_WRITE_BACK[xNSitES];
static int i_vec_Num1[32] = {0};
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(i_REG_VALUE, 9, xNSitES);
//!"CTmsg: cut pattern to 2 parts @ oriAVCvecline [4515]
//!"CTmsg: cut pattern to 2 parts @ binarypatline [4505]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_36_ACC_Bias_TC_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 3 > <Author: luz3sgh > <Date: 2024/07/02 01:51:04 GMT >}
valid comment[ 1] @ avcline 1162: {ras('REG_VALUE', 'ANA_TRM_BG')}
valid comment[ 2] @ avcline 1275: {cmt: Set trim index to value 0 in range (0..15)}
valid comment[ 3] @ avcline 1476: {gac('I_BIAS_ACC_TC[00]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 3] @ avcline 1476: {log('I_BIAS_ACC_TC[00]', '', '', 0, 0)}
valid comment[ 4] @ avcline 1477: {cmt: Set trim index to value 1 in range (0..15)}
valid comment[ 5] @ avcline 1678: {gac('I_BIAS_ACC_TC[01]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 5] @ avcline 1678: {log('I_BIAS_ACC_TC[01]', '', '', 0, 0)}
valid comment[ 6] @ avcline 1679: {cmt: Set trim index to value 2 in range (0..15)}
valid comment[ 7] @ avcline 1880: {gac('I_BIAS_ACC_TC[02]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 7] @ avcline 1880: {log('I_BIAS_ACC_TC[02]', '', '', 0, 0)}
valid comment[ 8] @ avcline 1881: {cmt: Set trim index to value 3 in range (0..15)}
valid comment[ 9] @ avcline 2082: {gac('I_BIAS_ACC_TC[03]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 9] @ avcline 2082: {log('I_BIAS_ACC_TC[03]', '', '', 0, 0)}
valid comment[ 10] @ avcline 2083: {cmt: Set trim index to value 4 in range (0..15)}
valid comment[ 11] @ avcline 2284: {gac('I_BIAS_ACC_TC[04]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 11] @ avcline 2284: {log('I_BIAS_ACC_TC[04]', '', '', 0, 0)}
valid comment[ 12] @ avcline 2285: {cmt: Set trim index to value 5 in range (0..15)}
valid comment[ 13] @ avcline 2486: {gac('I_BIAS_ACC_TC[05]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 13] @ avcline 2486: {log('I_BIAS_ACC_TC[05]', '', '', 0, 0)}
valid comment[ 14] @ avcline 2487: {cmt: Set trim index to value 6 in range (0..15)}
valid comment[ 15] @ avcline 2688: {gac('I_BIAS_ACC_TC[06]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 15] @ avcline 2688: {log('I_BIAS_ACC_TC[06]', '', '', 0, 0)}
valid comment[ 16] @ avcline 2689: {cmt: Set trim index to value 7 in range (0..15)}
valid comment[ 17] @ avcline 2890: {gac('I_BIAS_ACC_TC[07]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 17] @ avcline 2890: {log('I_BIAS_ACC_TC[07]', '', '', 0, 0)}
valid comment[ 18] @ avcline 2891: {cmt: Set trim index to value 8 in range (0..15)}
valid comment[ 19] @ avcline 3092: {gac('I_BIAS_ACC_TC[08]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 19] @ avcline 3092: {log('I_BIAS_ACC_TC[08]', '', '', 0, 0)}
valid comment[ 20] @ avcline 3093: {cmt: Set trim index to value 9 in range (0..15)}
valid comment[ 21] @ avcline 3294: {gac('I_BIAS_ACC_TC[09]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 21] @ avcline 3294: {log('I_BIAS_ACC_TC[09]', '', '', 0, 0)}
valid comment[ 22] @ avcline 3295: {cmt: Set trim index to value 10 in range (0..15)}
valid comment[ 23] @ avcline 3496: {gac('I_BIAS_ACC_TC[10]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 23] @ avcline 3496: {log('I_BIAS_ACC_TC[10]', '', '', 0, 0)}
valid comment[ 24] @ avcline 3497: {cmt: Set trim index to value 11 in range (0..15)}
valid comment[ 25] @ avcline 3698: {gac('I_BIAS_ACC_TC[11]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 25] @ avcline 3698: {log('I_BIAS_ACC_TC[11]', '', '', 0, 0)}
valid comment[ 26] @ avcline 3699: {cmt: Set trim index to value 12 in range (0..15)}
valid comment[ 27] @ avcline 3900: {gac('I_BIAS_ACC_TC[12]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 27] @ avcline 3900: {log('I_BIAS_ACC_TC[12]', '', '', 0, 0)}
valid comment[ 28] @ avcline 3901: {cmt: Set trim index to value 13 in range (0..15)}
valid comment[ 29] @ avcline 4102: {gac('I_BIAS_ACC_TC[13]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 29] @ avcline 4102: {log('I_BIAS_ACC_TC[13]', '', '', 0, 0)}
valid comment[ 30] @ avcline 4103: {cmt: Set trim index to value 14 in range (0..15)}
valid comment[ 31] @ avcline 4304: {gac('I_BIAS_ACC_TC[14]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 31] @ avcline 4304: {log('I_BIAS_ACC_TC[14]', '', '', 0, 0)}
valid comment[ 32] @ avcline 4305: {cmt: Set trim index to value 15 in range (0..15)}
valid comment[ 33] @ avcline 4506: {gac('I_BIAS_ACC_TC[15]', 'INT2', 2e-06, 0.0001, True)}
valid comment[ 33] @ avcline 4506: {log('I_BIAS_ACC_TC[15]', '', '', 0, 0)}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.digCap("digcapid_0").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(1*16).execute();
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][3]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_TC[00]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][5]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_TC[01]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][7]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_TC[02]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][9]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_TC[03]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][11]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_TC[04]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][13]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_TC[05]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][15]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_TC[06]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][17]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_TC[07]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][19]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_TC[08]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][21]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_TC[09]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][23]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_TC[10]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][25]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_TC[11]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][27]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_TC[12]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][29]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_TC[13]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][31]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_TC[14]', 'INT2', 2e-06, 0.0001, True)}
.insertSub(i_comment_line[0][33]).pin("INT2").iMeas().iRange(2 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_BIAS_ACC_TC[15]', 'INT2', 2e-06, 0.0001, True)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(16); ad_jsubresults_INT2.init(-9.9);
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
aI_Captured_0[0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[0]);
i_REG_VALUE[curSite] = aI_Captured_0[0];
FuncPrint("REG_VALUE",i_REG_VALUE[curSite]);
for(int i=0; i<16; i++){
d_I_BIAS_ACC_TC[curSite][i] = ad_jsubresults_INT2[0 + i];
FuncPrint("I_BIAS_ACC_TC_" + rdi.itos(curSite) + "_"+ rdi.itos(i) ,d_I_BIAS_ACC_TC[curSite][i]);
}
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 4515: {wri('ANA_TRM_BG', 'REG_VALUE')}
valid comment[ 1] @ avcline 5554: {Test End: T10_36_ACC_Bias_TC_Char}
*/
static int i_vec_iposition1[32] = {
31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,
48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63
};
for (int i = 0; i < 32; i++)
{
i_vec_Num1[i] = i_vec_iposition1[i];
}
FOR_EACH_SITE_BEGIN();
i_WRITE_BACK[curSite] = Switch_High_Low_Bits_16Bits(i_REG_VALUE[curSite]);
Func_Vector_Dynamic_Write(s_splited_pat_name[1], "SDX", i_vec_Num1, 32, i_WRITE_BACK[curSite], 0, 2); //Notes. TEI check per project
FOR_EACH_SITE_END();
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.func().label(s_splited_pat_name[1]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
for(int i=0; i < 16; i++){
TestLog(s_Func_Test_Name_Add_2Num("I_BIAS_ACC_TC_", i), d_I_BIAS_ACC_TC[curSite][i]);
}
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T10_36_ACC_Bias_TC_Char_V3", T10_36_ACC_Bias_TC_Char_V3);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: FOSC trimming
# Info : osc frequency changes monotonically with pc_trm_ftc= 0 ... 5
# Steps: 1. Route fosc to INT1 pad
# 2. Loop over trim steps and store the frequency values
#############################################################################################################
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:26:36 GMT $')
scmd('set_tb_global VDDmin_scale(0.8);') # extend model check min/max range for Trim-sweep
scmd('set_tb_global VDDmax_scale(1.6);') # extend model check min/max range for Trim-sweep
wr('EXT_MODE', 0xc00f) # Switch to TEST page
wac('DTB1',0x004c) # Route fosc_clk to INT1
wr('EXT_MODE', 0xc00d) # Switch to ANA page
wac('OCP_MASK', 0x0e00) # ANA_TRM_PMU<14:12> pc_trm_ftc
ras('REG_VALUE', 'ANA_TRM_PMU') # Store the current value
for n in range (0, 6, 1): # in design FTC trim is clipped at 5
cmt('Set trim index to value {} in range (0..5)'.format(n))
wr('ANA_TRM_PMU', n*2**9) # ANA_TRM_PMU<3:0> pc_trm_ftc
rac('ANA_TRM_PMU',n*2**9, 0x0e00)
dly(10e-6)
gaf('F_FOSC_FTC[{:03d}]'.format(n), 'INT1')
log('F_FOSC_FTC[{:03d}]'.format(n))
dly(592e-9)
wri('ANA_TRM_PMU','REG_VALUE')
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Clean
wr('EXT_MODE', 0xc00f) # Switch to TEST page
wac('DTB1',0x0000) # reset value
scmd('set_tb_global VDDmin_scale(1.0);') # reset model check min/max range
scmd('set_tb_global VDDmax_scale(1.0);') # reset model check min/max range
|
/*****************************************************
* T10_38_FOSC_FTC_Char_R1, description file version Notfound, avc file version Notfound
* First Editor : jsh5sgh
* Code generated with autocoding tool V2.9.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH V4: correct wrong comment.
* JSH5SGH R1: version update.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_38_FOSC_FTC_Char_R1: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
double SAMPLE_PERIOD_US;
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 3;
vector<int> i_comment_line[i_split_count];
ARRAY_I aI_Captured_0;
static double d_F_FOSC_FTC[xNSitES][6];
static int i_REG_VALUE[xNSitES];
static int i_WRITE_BACK[xNSitES];
static int i_vec_Num2[32] = {0};
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES], i_funcRes2[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
//!"CTmsg: cut pattern to 3 parts @ oriAVCvecline [867, 1891]
//!"CTmsg: cut pattern to 3 parts @ binarypatline [857, 1881]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_38_FOSC_FTC_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 3 > <Author: luz3sgh > <Date: 2024/07/02 05:25:12 GMT >}
valid comment[ 1] @ avcline 552: {ras('REG_VALUE', 'ANA_TRM_PMU')}
valid comment[ 2] @ avcline 665: {cmt: Set trim index to value 0 in range (0..7)}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.digCap("digcapid_0").label(s_splited_pat_name[0]).pin("SDO").capMode(TA::SER).bitPerWord(16).samples(1*16).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
aI_Captured_0[0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[0]);
i_REG_VALUE[curSite] = aI_Captured_0[0];
FuncPrint("REG_VALUE",i_REG_VALUE[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 867: {gaf('F_FOSC_FTC[000]', 'INT1', 2e+07, True)}
valid comment[ 0] @ avcline 867: {log('F_FOSC_FTC[000]', '', '', 0, 0)}
valid comment[ 1] @ avcline 868: {cmt: Set trim index to value 1 in range (0..7)}
valid comment[ 2] @ avcline 1070: {gaf('F_FOSC_FTC[001]', 'INT1', 2e+07, True)}
valid comment[ 2] @ avcline 1070: {log('F_FOSC_FTC[001]', '', '', 0, 0)}
valid comment[ 3] @ avcline 1071: {cmt: Set trim index to value 2 in range (0..7)}
valid comment[ 4] @ avcline 1273: {gaf('F_FOSC_FTC[002]', 'INT1', 2e+07, True)}
valid comment[ 4] @ avcline 1273: {log('F_FOSC_FTC[002]', '', '', 0, 0)}
valid comment[ 5] @ avcline 1274: {cmt: Set trim index to value 3 in range (0..7)}
valid comment[ 6] @ avcline 1476: {gaf('F_FOSC_FTC[003]', 'INT1', 2e+07, True)}
valid comment[ 6] @ avcline 1476: {log('F_FOSC_FTC[003]', '', '', 0, 0)}
valid comment[ 7] @ avcline 1477: {cmt: Set trim index to value 4 in range (0..7)}
valid comment[ 8] @ avcline 1679: {gaf('F_FOSC_FTC[004]', 'INT1', 2e+07, True)}
valid comment[ 8] @ avcline 1679: {log('F_FOSC_FTC[004]', '', '', 0, 0)}
valid comment[ 9] @ avcline 1680: {cmt: Set trim index to value 5 in range (0..7)}
valid comment[ 10] @ avcline 1882: {gaf('F_FOSC_FTC[005]', 'INT1', 2e+07, True)}
valid comment[ 10] @ avcline 1882: {log('F_FOSC_FTC[005]', '', '', 0, 0)}
*/
Primary.timing(SPECIFICATION("SPI_STD_INT1_FREQ_MEAS"));
FLUSH(TM::APRM);
SAMPLE_PERIOD_US = Primary.getSpecification().getSpecValue("per_ns@INT1_Port") * 1e-03;
FuncPrint("SAMPLE_PERIOD_US", SAMPLE_PERIOD_US);
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
for(int i=0; i<5; i++)
{
rdi.port("INT1_Port").digCap("vv_meas_code_"+rdi.itos(i)).pin("INT1").capMode(TA::SER).samples(4096).bitPerWord(1).execute();
rdi.portSync();
rdi.port("Non_INT1_Port").func().label(s_splited_pat_name[1]).startVec(i_comment_line[1][2*i]).stopVec(i_comment_line[1][2*i+2]-1).execute();
rdi.portSync();
}
rdi.port("INT1_Port").digCap("vv_meas_code_"+rdi.itos(5)).pin("INT1").capMode(TA::SER).samples(4096).bitPerWord(1).execute();
rdi.portSync();
rdi.port("Non_INT1_Port").func().label(s_splited_pat_name[1]).startVec(i_comment_line[1][10]).execute();
rdi.portSync();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
ARRAY_I ai_meas_code;
for(int i=0; i<6; i++){
ai_meas_code = rdi.id("vv_meas_code_" + rdi.itos(i)).getVector();
d_F_FOSC_FTC[curSite][i] = d_Func_Calculate_Freq_ByFFT(ai_meas_code, SAMPLE_PERIOD_US) *1e6;
FuncPrint(s_Func_Test_Name_Add_3Num("d_F_FOSC_FTC_", i), d_F_FOSC_FTC[curSite][i]);
}
//Add calc code if necessary
FOR_EACH_SITE_END();
Primary.timing(TIMING_SPEC(1,1));
Primary.timing(1);
FLUSH(TM::APRM);
/* Ori key coments in subpat2 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 1891: {wri('ANA_TRM_PMU', 'REG_VALUE')}
valid comment[ 1] @ avcline 2433: {Test End: T10_38_FOSC_FTC_Char}
*/
static int i_vec_iposition2[32] = {
31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,
48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63
};
for (int i = 0; i < 32; i++)
{
i_vec_Num2[i] = i_vec_iposition2[i];
}
FOR_EACH_SITE_BEGIN();
i_WRITE_BACK[curSite] = Switch_High_Low_Bits_16Bits(i_REG_VALUE[curSite]);
Func_Vector_Dynamic_Write(s_splited_pat_name[2], "SDX", i_vec_Num2, 32, i_WRITE_BACK[curSite], 0, 2); //Notes. TEI check per project
FOR_EACH_SITE_END();
RDI_BEGIN(mode);
rdi.burstId("burst_id2");
rdi.func().label(s_splited_pat_name[2]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes2[curSite] = rdi.id("burst_id2").getBurstPassFail();
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
for(int i=0; i<6; i++){
TestLog(s_Func_Test_Name_Add_3Num("F_FOSC_FTC_", i), d_F_FOSC_FTC[curSite][i]);
}
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite] && i_funcRes2[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T10_38_FOSC_FTC_Char_R1", T10_38_FOSC_FTC_Char_R1);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: Bandgap temperature coefficient characterization
# Characterization loop derived from T10_11_acc_bandgap_trimming
# - VSS_A to ANAIO2, VREF_AA to ANAIO1 with buffer 1 enabled only
# For all the 16 values of pc_trm_bgp_tc the current values are logged to V_VBG_ACC_TC[00] .. V_VBG_ACC_TC[15].
# In vbgp_acc_top (wreal) the input BGP_TRM_C (which is pc_trm_bgp_tc) affects the voltage references
# VREF_AA/_FA/_LA/_S.
#
# The limit for all the values V_VBG_ACC_TC[] is set to 0.73 .. 0.77 (around the target 0.75, see T10_11).
#
# After the characterization loop the register ANA_TRM_BG is set to the previous value,
# and the test module / IO registers TM_CONF, TM_PIN, TM_ADDR, IO_TEST_IF are set to their reset values.
#############################################################################################################
from test_sub_functions import *
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_CONF', 0x0011) # tm_se_meas=0 tm_bus_inv=1 tm_buf_pwrup=1 (tbuf_tb1_on)
# bus_inv. because the power_ana_test_multiplexor_refs provides VSS_A/VREF_AA
wac('TM_PIN', 0x0095) # tm_asdx_sel=4 (BUF2_INP) tm_asdx_en=1 tm_int2_sel=2 (BUF1_OUT) tm_int2_en=1
wac('TM_ADDR', 0x060e) # tm_cfg=6 (COM_TB2= VREF_AA, COM_TB1= VSS_A) tm_addr=e (tm_bus_sel=tm_addr(3:2)=3 (COM_TION/P) COM_TIO_REF;
# enable the power_ana_test_multiplexor); any tm_addr value except off/0 enables the test module
# Characterization loop
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x000f) # ANA_TRM_BG<3:0> pc_trm_bgp_tc
ras('REG_VALUE', 'ANA_TRM_BG') # Store the current value
for n in range (0, 16, 1):
cmt('Set trim index to value {} in range (0..15)'.format(n))
wr('ANA_TRM_BG', n) # ANA_TRM_BG<3:0> pc_trm_bgp_tc
rac('ANA_TRM_BG', n, 0x000f)
dly(100e-6)
gav('V_VBG_ACC_TC_RAW[{:02d}]'.format(n), 'INT2', 'ASDX')
calc('V_VBG_ACC_TC[{:02d}]'.format(n), 'V_VBG_ACC_TC_RAW[{:02d}]'.format(n), '-', 'V_OFF1_ECOFF')
log(f'V_VBG_ACC_TC[{n:02}]')
dly(592e-9)
wri('ANA_TRM_BG','REG_VALUE')
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Clean
wac('EXT_MODE', 0xc00f) # Switch to the TEST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* T10_39_ACC_Bandgap_TC_Char_V2, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH: fix some bugs.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_39_ACC_Bandgap_TC_Char_V2: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 2;
vector<int> i_comment_line[i_split_count];
static int i_REG_VALUE[xNSitES];
ARRAY_I aI_Captured_0;
static double d_V_VBG_ACC_TC_RAW[xNSitES][16];
static double V_VBG_ACC_TC[xNSitES][16];
ARRAY_D ad_V_VBG_ACC_TC_RAW;
static int i_WRITE_BACK[xNSitES];
static int i_vec_Num1[32] = {0};
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(i_REG_VALUE, 9, xNSitES);
//!"CTmsg: cut pattern to 2 parts @ oriAVCvecline [4531]
//!"CTmsg: cut pattern to 2 parts @ binarypatline [4521]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_39_ACC_Bandgap_TC_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 20:34:28 GMT >}
valid comment[ 1] @ avcline 1162: {ras('REG_VALUE', 'ANA_TRM_BG')}
valid comment[ 2] @ avcline 1275: {cmt: Set trim index to value 0 in range (0..15)}
valid comment[ 3] @ avcline 1477: {gav('V_VBG_ACC_TC_RAW[00]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 3] @ avcline 1477: {calc('V_VBG_ACC_TC[00]', 'V_VBG_ACC_TC_RAW[00]', '-', 'V_OFF1_ECOFF')}
valid comment[ 3] @ avcline 1477: {log('V_VBG_ACC_TC[00]', '', '', 0, 0)}
valid comment[ 4] @ avcline 1478: {cmt: Set trim index to value 1 in range (0..15)}
valid comment[ 5] @ avcline 1680: {gav('V_VBG_ACC_TC_RAW[01]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 5] @ avcline 1680: {calc('V_VBG_ACC_TC[01]', 'V_VBG_ACC_TC_RAW[01]', '-', 'V_OFF1_ECOFF')}
valid comment[ 5] @ avcline 1680: {log('V_VBG_ACC_TC[01]', '', '', 0, 0)}
valid comment[ 6] @ avcline 1681: {cmt: Set trim index to value 2 in range (0..15)}
valid comment[ 7] @ avcline 1883: {gav('V_VBG_ACC_TC_RAW[02]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 7] @ avcline 1883: {calc('V_VBG_ACC_TC[02]', 'V_VBG_ACC_TC_RAW[02]', '-', 'V_OFF1_ECOFF')}
valid comment[ 7] @ avcline 1883: {log('V_VBG_ACC_TC[02]', '', '', 0, 0)}
valid comment[ 8] @ avcline 1884: {cmt: Set trim index to value 3 in range (0..15)}
valid comment[ 9] @ avcline 2086: {gav('V_VBG_ACC_TC_RAW[03]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 9] @ avcline 2086: {calc('V_VBG_ACC_TC[03]', 'V_VBG_ACC_TC_RAW[03]', '-', 'V_OFF1_ECOFF')}
valid comment[ 9] @ avcline 2086: {log('V_VBG_ACC_TC[03]', '', '', 0, 0)}
valid comment[ 10] @ avcline 2087: {cmt: Set trim index to value 4 in range (0..15)}
valid comment[ 11] @ avcline 2289: {gav('V_VBG_ACC_TC_RAW[04]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 11] @ avcline 2289: {calc('V_VBG_ACC_TC[04]', 'V_VBG_ACC_TC_RAW[04]', '-', 'V_OFF1_ECOFF')}
valid comment[ 11] @ avcline 2289: {log('V_VBG_ACC_TC[04]', '', '', 0, 0)}
valid comment[ 12] @ avcline 2290: {cmt: Set trim index to value 5 in range (0..15)}
valid comment[ 13] @ avcline 2492: {gav('V_VBG_ACC_TC_RAW[05]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 13] @ avcline 2492: {calc('V_VBG_ACC_TC[05]', 'V_VBG_ACC_TC_RAW[05]', '-', 'V_OFF1_ECOFF')}
valid comment[ 13] @ avcline 2492: {log('V_VBG_ACC_TC[05]', '', '', 0, 0)}
valid comment[ 14] @ avcline 2493: {cmt: Set trim index to value 6 in range (0..15)}
valid comment[ 15] @ avcline 2695: {gav('V_VBG_ACC_TC_RAW[06]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 15] @ avcline 2695: {calc('V_VBG_ACC_TC[06]', 'V_VBG_ACC_TC_RAW[06]', '-', 'V_OFF1_ECOFF')}
valid comment[ 15] @ avcline 2695: {log('V_VBG_ACC_TC[06]', '', '', 0, 0)}
valid comment[ 16] @ avcline 2696: {cmt: Set trim index to value 7 in range (0..15)}
valid comment[ 17] @ avcline 2898: {gav('V_VBG_ACC_TC_RAW[07]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 17] @ avcline 2898: {calc('V_VBG_ACC_TC[07]', 'V_VBG_ACC_TC_RAW[07]', '-', 'V_OFF1_ECOFF')}
valid comment[ 17] @ avcline 2898: {log('V_VBG_ACC_TC[07]', '', '', 0, 0)}
valid comment[ 18] @ avcline 2899: {cmt: Set trim index to value 8 in range (0..15)}
valid comment[ 19] @ avcline 3101: {gav('V_VBG_ACC_TC_RAW[08]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 19] @ avcline 3101: {calc('V_VBG_ACC_TC[08]', 'V_VBG_ACC_TC_RAW[08]', '-', 'V_OFF1_ECOFF')}
valid comment[ 19] @ avcline 3101: {log('V_VBG_ACC_TC[08]', '', '', 0, 0)}
valid comment[ 20] @ avcline 3102: {cmt: Set trim index to value 9 in range (0..15)}
valid comment[ 21] @ avcline 3304: {gav('V_VBG_ACC_TC_RAW[09]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 21] @ avcline 3304: {calc('V_VBG_ACC_TC[09]', 'V_VBG_ACC_TC_RAW[09]', '-', 'V_OFF1_ECOFF')}
valid comment[ 21] @ avcline 3304: {log('V_VBG_ACC_TC[09]', '', '', 0, 0)}
valid comment[ 22] @ avcline 3305: {cmt: Set trim index to value 10 in range (0..15)}
valid comment[ 23] @ avcline 3507: {gav('V_VBG_ACC_TC_RAW[10]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 23] @ avcline 3507: {calc('V_VBG_ACC_TC[10]', 'V_VBG_ACC_TC_RAW[10]', '-', 'V_OFF1_ECOFF')}
valid comment[ 23] @ avcline 3507: {log('V_VBG_ACC_TC[10]', '', '', 0, 0)}
valid comment[ 24] @ avcline 3508: {cmt: Set trim index to value 11 in range (0..15)}
valid comment[ 25] @ avcline 3710: {gav('V_VBG_ACC_TC_RAW[11]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 25] @ avcline 3710: {calc('V_VBG_ACC_TC[11]', 'V_VBG_ACC_TC_RAW[11]', '-', 'V_OFF1_ECOFF')}
valid comment[ 25] @ avcline 3710: {log('V_VBG_ACC_TC[11]', '', '', 0, 0)}
valid comment[ 26] @ avcline 3711: {cmt: Set trim index to value 12 in range (0..15)}
valid comment[ 27] @ avcline 3913: {gav('V_VBG_ACC_TC_RAW[12]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 27] @ avcline 3913: {calc('V_VBG_ACC_TC[12]', 'V_VBG_ACC_TC_RAW[12]', '-', 'V_OFF1_ECOFF')}
valid comment[ 27] @ avcline 3913: {log('V_VBG_ACC_TC[12]', '', '', 0, 0)}
valid comment[ 28] @ avcline 3914: {cmt: Set trim index to value 13 in range (0..15)}
valid comment[ 29] @ avcline 4116: {gav('V_VBG_ACC_TC_RAW[13]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 29] @ avcline 4116: {calc('V_VBG_ACC_TC[13]', 'V_VBG_ACC_TC_RAW[13]', '-', 'V_OFF1_ECOFF')}
valid comment[ 29] @ avcline 4116: {log('V_VBG_ACC_TC[13]', '', '', 0, 0)}
valid comment[ 30] @ avcline 4117: {cmt: Set trim index to value 14 in range (0..15)}
valid comment[ 31] @ avcline 4319: {gav('V_VBG_ACC_TC_RAW[14]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 31] @ avcline 4319: {calc('V_VBG_ACC_TC[14]', 'V_VBG_ACC_TC_RAW[14]', '-', 'V_OFF1_ECOFF')}
valid comment[ 31] @ avcline 4319: {log('V_VBG_ACC_TC[14]', '', '', 0, 0)}
valid comment[ 32] @ avcline 4320: {cmt: Set trim index to value 15 in range (0..15)}
valid comment[ 33] @ avcline 4522: {gav('V_VBG_ACC_TC_RAW[15]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 33] @ avcline 4522: {calc('V_VBG_ACC_TC[15]', 'V_VBG_ACC_TC_RAW[15]', '-', 'V_OFF1_ECOFF')}
valid comment[ 33] @ avcline 4522: {log('V_VBG_ACC_TC[15]', '', '', 0, 0)}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.digCap("digcapid_0").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(1*16).execute();
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][3]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_TC_RAW_00//{gav('V_VBG_ACC_TC_RAW[00]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][5]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_TC_RAW_01//{gav('V_VBG_ACC_TC_RAW[01]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][7]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_TC_RAW_02//{gav('V_VBG_ACC_TC_RAW[02]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][9]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_TC_RAW_03//{gav('V_VBG_ACC_TC_RAW[03]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][11]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_TC_RAW_04//{gav('V_VBG_ACC_TC_RAW[04]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][13]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_TC_RAW_05//{gav('V_VBG_ACC_TC_RAW[05]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][15]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_TC_RAW_06//{gav('V_VBG_ACC_TC_RAW[06]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][17]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_TC_RAW_07//{gav('V_VBG_ACC_TC_RAW[07]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][19]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_TC_RAW_08//{gav('V_VBG_ACC_TC_RAW[08]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][21]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_TC_RAW_09//{gav('V_VBG_ACC_TC_RAW[09]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][23]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_TC_RAW_10//{gav('V_VBG_ACC_TC_RAW[10]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][25]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_TC_RAW_11//{gav('V_VBG_ACC_TC_RAW[11]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][27]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_TC_RAW_12//{gav('V_VBG_ACC_TC_RAW[12]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][29]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_TC_RAW_13//{gav('V_VBG_ACC_TC_RAW[13]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][31]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_TC_RAW_14//{gav('V_VBG_ACC_TC_RAW[14]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][33]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_VBG_ACC_TC_RAW_15//{gav('V_VBG_ACC_TC_RAW[15]', 'INT2', 'ASDX', 2, 0.0001, True)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(16); ad_jsubresults_INT2.init(-9.9);
ARRAY_D ad_jsubresults_ASDX; ad_jsubresults_ASDX.resize(16); ad_jsubresults_ASDX.init(-9.9);
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
ad_jsubresults_ASDX = rdi.id("dcid_0").getMultiValue("ASDX");
aI_Captured_0[0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[0]);
i_REG_VALUE[curSite] = aI_Captured_0[0];
FuncPrint("REG_VALUE",i_REG_VALUE[curSite]);
for(int i=0; i<16; i++){
d_V_VBG_ACC_TC_RAW[curSite][i] = ad_jsubresults_INT2[0 + i] - ad_jsubresults_ASDX[0 + i];
FuncPrint("V_VBG_ACC_TC_RAW_" + rdi.itos(curSite) + "_"+ rdi.itos(i) ,d_V_VBG_ACC_TC_RAW[curSite][i]);
V_VBG_ACC_TC[curSite][i] = d_V_VBG_ACC_TC_RAW[curSite][i] - V_OFF1_ECOFF[curSite];
FuncPrint(s_Func_Test_Name_Add_2Num("V_VBG_ACC_TC_", i), V_VBG_ACC_TC[curSite][i]);
}
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 4531: {wri('ANA_TRM_BG', 'REG_VALUE')}
valid comment[ 1] @ avcline 5570: {Test End: T10_39_ACC_Bandgap_TC_Char}
*/
static int i_vec_iposition1[32] = {
31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,
48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63
};
for (int i = 0; i < 32; i++)
{
i_vec_Num1[i] = i_vec_iposition1[i];
}
FOR_EACH_SITE_BEGIN();
i_WRITE_BACK[curSite] = Switch_High_Low_Bits_16Bits(i_REG_VALUE[curSite]);
Func_Vector_Dynamic_Write(s_splited_pat_name[1], "SDX", i_vec_Num1, 32, i_WRITE_BACK[curSite], 0, 2); //Notes. TEI check per project
//TODO pl.TEI check position & mask
FOR_EACH_SITE_END();
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.func().label(s_splited_pat_name[1]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
FuncPrint("REG_VALUE", i_REG_VALUE[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
for(int i=0; i < 16; i++){
TestLog(s_Func_Test_Name_Add_2Num("V_VBG_ACC_TC_", i), V_VBG_ACC_TC[curSite][i]);
}
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T10_39_ACC_Bandgap_TC_Char_V2", T10_39_ACC_Bandgap_TC_Char_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: Bandgap temperature coefficient characterization
# Characterization loop derived from T10_16_acc_bias_current_trimming
# - VSS to ASDX(ANAIO2), VREFD to INT2(ANAIO1) with buffer 1 enabled only
#
# For all the 16 values of pc_trm_bgp_tc the current values are logged to V_REF_D_TC[00] .. V_REF_D_TC[15].
# The signal pc_trm_bgp_tc isn't routed to the instance power_topi.PWR_ANA.STBY_REG.
# Different VREFD values can't be expected.
#
# The limit for all the values V_REF_D_TC[] is set to 1.0 .. 1.2 (around the target 1.1, see T10_01).
#
# After the characterization loop the register ANA_TRM_BG is set to the previous value,
# and the test module / IO registers TM_CONF, TM_PIN, TM_ADDR, IO_TEST_IF are set to their reset values.
#############################################################################################################
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 20:34:28 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_CONF', 0x0011) # Enable TB1; invert test bus
wac('TM_PIN', 0x0095) # Enable ANAIO1/2; TB1_OUT on ANAIO1; TB2_INP on ANAIO2
wac('TM_ADDR', 0x070e) # Enable reference block on ATM; Connect VREFD/VSS
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x000f) # ANA_TRM_BG<3:0> pc_trm_bgp_tc
ras('REG_VALUE', 'ANA_TRM_BG') # Store the current value
for n in range (0, 16, 1):
cmt('Set trim index to value {} in range (0..15)'.format(n))
wr('ANA_TRM_BG', n) # ANA_TRM_BG<3:0> pc_trm_bgp_tc
rac('ANA_TRM_BG',n, 0x000f)
dly(100e-6)
gav('V_REF_D_TC_RAW[{:02d}]'.format(n), 'INT2', 'ASDX')
calc('V_REF_D_TC[{:02d}]'.format(n), 'V_REF_D_TC_RAW[{:02d}]'.format(n), '-', 'V_OFF1_ECOFF')
log('V_REF_D_TC[{:02d}]'.format(n))
dly(592e-9)
wri('ANA_TRM_BG','REG_VALUE') # Write back the stored value
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_ADDR', 0x0000) # Disable ATM
wac('TM_PIN', 0x0000) # Reset pin config
wac('TM_CONF', 0x0000) # Disable TBs
|
/*****************************************************
* T10_40_Standby_Regulator_TC_Char_V2, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
* JSH5SGH: fix some bugs.
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_40_Standby_Regulator_TC_Char_V2: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 2;
vector<int> i_comment_line[i_split_count];
static int i_REG_VALUE[xNSitES];
ARRAY_I aI_Captured_0;
static double d_V_REF_D_TC_RAW[xNSitES][16];
static double V_REF_D_TC[xNSitES][16];
ARRAY_D ad_V_REF_D_TC_RAW;
static int i_WRITE_BACK[xNSitES];
static int i_vec_Num1[32] = {0};
static int i_funcRes0[xNSitES], i_funcRes1[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(i_REG_VALUE, 9, xNSitES);
//!"CTmsg: cut pattern to 2 parts @ oriAVCvecline [4531]
//!"CTmsg: cut pattern to 2 parts @ binarypatline [4521]
if (i_split_pat_flag)
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
}
else
{
split_pattern(s_label_name,"cut_here","",i_split_pat_flag,s_splited_pat_name);
for(int i=0; i<i_split_count; i++){
i_comment_line[i] = search_comment_line_specialOnly(s_splited_pat_name[i], "search_here");
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_40_Standby_Regulator_TC_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 20:34:28 GMT >}
valid comment[ 1] @ avcline 1162: {ras('REG_VALUE', 'ANA_TRM_BG')}
valid comment[ 2] @ avcline 1275: {cmt: Set trim index to value 0 in range (0..15)}
valid comment[ 3] @ avcline 1477: {gav('V_REF_D_TC_RAW[00]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 3] @ avcline 1477: {calc('V_REF_D_TC[00]', 'V_REF_D_TC_RAW[00]', '-', 'V_OFF1_ECOFF')}
valid comment[ 3] @ avcline 1477: {log('V_REF_D_TC[00]', '', '', 0, 0)}
valid comment[ 4] @ avcline 1478: {cmt: Set trim index to value 1 in range (0..15)}
valid comment[ 5] @ avcline 1680: {gav('V_REF_D_TC_RAW[01]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 5] @ avcline 1680: {calc('V_REF_D_TC[01]', 'V_REF_D_TC_RAW[01]', '-', 'V_OFF1_ECOFF')}
valid comment[ 5] @ avcline 1680: {log('V_REF_D_TC[01]', '', '', 0, 0)}
valid comment[ 6] @ avcline 1681: {cmt: Set trim index to value 2 in range (0..15)}
valid comment[ 7] @ avcline 1883: {gav('V_REF_D_TC_RAW[02]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 7] @ avcline 1883: {calc('V_REF_D_TC[02]', 'V_REF_D_TC_RAW[02]', '-', 'V_OFF1_ECOFF')}
valid comment[ 7] @ avcline 1883: {log('V_REF_D_TC[02]', '', '', 0, 0)}
valid comment[ 8] @ avcline 1884: {cmt: Set trim index to value 3 in range (0..15)}
valid comment[ 9] @ avcline 2086: {gav('V_REF_D_TC_RAW[03]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 9] @ avcline 2086: {calc('V_REF_D_TC[03]', 'V_REF_D_TC_RAW[03]', '-', 'V_OFF1_ECOFF')}
valid comment[ 9] @ avcline 2086: {log('V_REF_D_TC[03]', '', '', 0, 0)}
valid comment[ 10] @ avcline 2087: {cmt: Set trim index to value 4 in range (0..15)}
valid comment[ 11] @ avcline 2289: {gav('V_REF_D_TC_RAW[04]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 11] @ avcline 2289: {calc('V_REF_D_TC[04]', 'V_REF_D_TC_RAW[04]', '-', 'V_OFF1_ECOFF')}
valid comment[ 11] @ avcline 2289: {log('V_REF_D_TC[04]', '', '', 0, 0)}
valid comment[ 12] @ avcline 2290: {cmt: Set trim index to value 5 in range (0..15)}
valid comment[ 13] @ avcline 2492: {gav('V_REF_D_TC_RAW[05]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 13] @ avcline 2492: {calc('V_REF_D_TC[05]', 'V_REF_D_TC_RAW[05]', '-', 'V_OFF1_ECOFF')}
valid comment[ 13] @ avcline 2492: {log('V_REF_D_TC[05]', '', '', 0, 0)}
valid comment[ 14] @ avcline 2493: {cmt: Set trim index to value 6 in range (0..15)}
valid comment[ 15] @ avcline 2695: {gav('V_REF_D_TC_RAW[06]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 15] @ avcline 2695: {calc('V_REF_D_TC[06]', 'V_REF_D_TC_RAW[06]', '-', 'V_OFF1_ECOFF')}
valid comment[ 15] @ avcline 2695: {log('V_REF_D_TC[06]', '', '', 0, 0)}
valid comment[ 16] @ avcline 2696: {cmt: Set trim index to value 7 in range (0..15)}
valid comment[ 17] @ avcline 2898: {gav('V_REF_D_TC_RAW[07]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 17] @ avcline 2898: {calc('V_REF_D_TC[07]', 'V_REF_D_TC_RAW[07]', '-', 'V_OFF1_ECOFF')}
valid comment[ 17] @ avcline 2898: {log('V_REF_D_TC[07]', '', '', 0, 0)}
valid comment[ 18] @ avcline 2899: {cmt: Set trim index to value 8 in range (0..15)}
valid comment[ 19] @ avcline 3101: {gav('V_REF_D_TC_RAW[08]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 19] @ avcline 3101: {calc('V_REF_D_TC[08]', 'V_REF_D_TC_RAW[08]', '-', 'V_OFF1_ECOFF')}
valid comment[ 19] @ avcline 3101: {log('V_REF_D_TC[08]', '', '', 0, 0)}
valid comment[ 20] @ avcline 3102: {cmt: Set trim index to value 9 in range (0..15)}
valid comment[ 21] @ avcline 3304: {gav('V_REF_D_TC_RAW[09]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 21] @ avcline 3304: {calc('V_REF_D_TC[09]', 'V_REF_D_TC_RAW[09]', '-', 'V_OFF1_ECOFF')}
valid comment[ 21] @ avcline 3304: {log('V_REF_D_TC[09]', '', '', 0, 0)}
valid comment[ 22] @ avcline 3305: {cmt: Set trim index to value 10 in range (0..15)}
valid comment[ 23] @ avcline 3507: {gav('V_REF_D_TC_RAW[10]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 23] @ avcline 3507: {calc('V_REF_D_TC[10]', 'V_REF_D_TC_RAW[10]', '-', 'V_OFF1_ECOFF')}
valid comment[ 23] @ avcline 3507: {log('V_REF_D_TC[10]', '', '', 0, 0)}
valid comment[ 24] @ avcline 3508: {cmt: Set trim index to value 11 in range (0..15)}
valid comment[ 25] @ avcline 3710: {gav('V_REF_D_TC_RAW[11]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 25] @ avcline 3710: {calc('V_REF_D_TC[11]', 'V_REF_D_TC_RAW[11]', '-', 'V_OFF1_ECOFF')}
valid comment[ 25] @ avcline 3710: {log('V_REF_D_TC[11]', '', '', 0, 0)}
valid comment[ 26] @ avcline 3711: {cmt: Set trim index to value 12 in range (0..15)}
valid comment[ 27] @ avcline 3913: {gav('V_REF_D_TC_RAW[12]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 27] @ avcline 3913: {calc('V_REF_D_TC[12]', 'V_REF_D_TC_RAW[12]', '-', 'V_OFF1_ECOFF')}
valid comment[ 27] @ avcline 3913: {log('V_REF_D_TC[12]', '', '', 0, 0)}
valid comment[ 28] @ avcline 3914: {cmt: Set trim index to value 13 in range (0..15)}
valid comment[ 29] @ avcline 4116: {gav('V_REF_D_TC_RAW[13]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 29] @ avcline 4116: {calc('V_REF_D_TC[13]', 'V_REF_D_TC_RAW[13]', '-', 'V_OFF1_ECOFF')}
valid comment[ 29] @ avcline 4116: {log('V_REF_D_TC[13]', '', '', 0, 0)}
valid comment[ 30] @ avcline 4117: {cmt: Set trim index to value 14 in range (0..15)}
valid comment[ 31] @ avcline 4319: {gav('V_REF_D_TC_RAW[14]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 31] @ avcline 4319: {calc('V_REF_D_TC[14]', 'V_REF_D_TC_RAW[14]', '-', 'V_OFF1_ECOFF')}
valid comment[ 31] @ avcline 4319: {log('V_REF_D_TC[14]', '', '', 0, 0)}
valid comment[ 32] @ avcline 4320: {cmt: Set trim index to value 15 in range (0..15)}
valid comment[ 33] @ avcline 4522: {gav('V_REF_D_TC_RAW[15]', 'INT2', 'ASDX', 2, 0.0001, True)}
valid comment[ 33] @ avcline 4522: {calc('V_REF_D_TC[15]', 'V_REF_D_TC_RAW[15]', '-', 'V_OFF1_ECOFF')}
valid comment[ 33] @ avcline 4522: {log('V_REF_D_TC[15]', '', '', 0, 0)}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.digCap("digcapid_0").vecVarOnly().pin("SDO").capMode(TA::SER).bitPerWord(16).samples(1*16).execute();
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][3]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_TC_RAW_00//{gav('V_REF_D_TC_RAW[00]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][5]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_TC_RAW_01//{gav('V_REF_D_TC_RAW[01]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][7]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_TC_RAW_02//{gav('V_REF_D_TC_RAW[02]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][9]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_TC_RAW_03//{gav('V_REF_D_TC_RAW[03]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][11]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_TC_RAW_04//{gav('V_REF_D_TC_RAW[04]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][13]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_TC_RAW_05//{gav('V_REF_D_TC_RAW[05]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][15]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_TC_RAW_06//{gav('V_REF_D_TC_RAW[06]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][17]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_TC_RAW_07//{gav('V_REF_D_TC_RAW[07]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][19]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_TC_RAW_08//{gav('V_REF_D_TC_RAW[08]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][21]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_TC_RAW_09//{gav('V_REF_D_TC_RAW[09]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][23]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_TC_RAW_10//{gav('V_REF_D_TC_RAW[10]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][25]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_TC_RAW_11//{gav('V_REF_D_TC_RAW[11]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][27]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_TC_RAW_12//{gav('V_REF_D_TC_RAW[12]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][29]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_TC_RAW_13//{gav('V_REF_D_TC_RAW[13]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][31]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_TC_RAW_14//{gav('V_REF_D_TC_RAW[14]', 'INT2', 'ASDX', 2, 0.0001, True)}
.insertSub(i_comment_line[0][33]).pin("INT2,ASDX", TA::BADC).vMeas().average(128).measWait(1 ms)//V_REF_D_TC_RAW_15//{gav('V_REF_D_TC_RAW[15]', 'INT2', 'ASDX', 2, 0.0001, True)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
aI_Captured_0 = rdi.id("digcapid_0").getVector("SDO");
ARRAY_D ad_jsubresults_INT2; ad_jsubresults_INT2.resize(16); ad_jsubresults_INT2.init(-9.9);
ARRAY_D ad_jsubresults_ASDX; ad_jsubresults_ASDX.resize(16); ad_jsubresults_ASDX.init(-9.9);
ad_jsubresults_INT2 = rdi.id("dcid_0").getMultiValue("INT2");
ad_jsubresults_ASDX = rdi.id("dcid_0").getMultiValue("ASDX");
aI_Captured_0[0] = Switch_High_Low_Bits_16Bits(aI_Captured_0[0]);
i_REG_VALUE[curSite] = aI_Captured_0[0];
FuncPrint("REG_VALUE",i_REG_VALUE[curSite]);
for(int i=0; i<16; i++){
d_V_REF_D_TC_RAW[curSite][i] = ad_jsubresults_INT2[0 + i] - ad_jsubresults_ASDX[0 + i];
FuncPrint("V_REF_D_TC_RAW_" + rdi.itos(curSite) + "_"+ rdi.itos(i) ,d_V_REF_D_TC_RAW[curSite][i]);
V_REF_D_TC[curSite][i] = d_V_REF_D_TC_RAW[curSite][i] - V_OFF1_ECOFF[curSite];
FuncPrint(s_Func_Test_Name_Add_2Num("V_REF_D_TC_", i), V_REF_D_TC[curSite][i]);
}
FOR_EACH_SITE_END();
/* Ori key coments in subpat1 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 4531: {wri('ANA_TRM_BG', 'REG_VALUE')}
valid comment[ 1] @ avcline 5570: {Test End: T10_40_Standby_Regulator_TC_Char}
*/
static int i_vec_iposition1[32] = {
31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,
48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63
};
for (int i = 0; i < 32; i++)
{
i_vec_Num1[i] = i_vec_iposition1[i];
}
FOR_EACH_SITE_BEGIN();
i_WRITE_BACK[curSite] = Switch_High_Low_Bits_16Bits(i_REG_VALUE[curSite]);
Func_Vector_Dynamic_Write(s_splited_pat_name[1], "SDX", i_vec_Num1, 32, i_WRITE_BACK[curSite], 0, 2); //Notes. TEI check per project
FOR_EACH_SITE_END();
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.func().label(s_splited_pat_name[1]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes1[curSite] = rdi.id("burst_id1").getBurstPassFail();
FOR_EACH_SITE_END();
}
ON_FIRST_INVOCATION_END();
for(int i=0; i < 16; i++){
TestLog(s_Func_Test_Name_Add_2Num("V_REF_D_TC_", i), V_REF_D_TC[curSite][i]);
}
i_funcRes[curSite] = i_funcRes0[curSite] && i_funcRes1[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T10_40_Standby_Regulator_TC_Char_V2", T10_40_Standby_Regulator_TC_Char_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# - measure currents for different external voltages, routed VDDD
# (T02_18_enable_vddd_dc_and_vdda_external_bypass executed before)
#############################################################################################################
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
for n in range (13, 8, -1):
cmt("Set voltage to {} V on pad INT1 and measure current".format(n/10))
sav("INT1", n/10)
dly(100e-6)
gac(f"I_VDDD_DC_VEXT_{n:02d}", "INT1", i_range=1e-3)
log(f"I_VDDD_DC_VEXT_{n:02d}")
sav("INT1", 1.1) # as in T02_18_enable_vddd_dc_and_vdda_external_bypass
dly(100e-6)
|
/*****************************************************
* T10_41_VDDD_DC_Vext_Char_V1, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T10_41_VDDD_DC_Vext_Char_V1: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static double d_I_VDDD_DC_VEXT_09[xNSitES];
static double d_I_VDDD_DC_VEXT_10[xNSitES];
static double d_I_VDDD_DC_VEXT_11[xNSitES];
static double d_I_VDDD_DC_VEXT_12[xNSitES];
static double d_I_VDDD_DC_VEXT_13[xNSitES];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(d_I_VDDD_DC_VEXT_09, 9.9, xNSitES);
Func_Init_Var(d_I_VDDD_DC_VEXT_10, 9.9, xNSitES);
Func_Init_Var(d_I_VDDD_DC_VEXT_11, 9.9, xNSitES);
Func_Init_Var(d_I_VDDD_DC_VEXT_12, 9.9, xNSitES);
Func_Init_Var(d_I_VDDD_DC_VEXT_13, 9.9, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T10_41_VDDD_DC_Vext_Char}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 1 > <Author: hmf1rt > <Date: 2024/03/13 13:36:52 GMT >}
valid comment[ 0] @ avcline 10: {cmt: Set voltage to 1.3 V on pad INT1 and measure current}
valid comment[ 0] @ avcline 10: {sav('INT1', 1.3, 2, 0.01, False, False)}
valid comment[ 1] @ avcline 19: {gac('I_VDDD_DC_VEXT_13', 'INT1', 0.001, 0.0001, True)}
valid comment[ 1] @ avcline 19: {log('I_VDDD_DC_VEXT_13', '', '', 0, 0)}
valid comment[ 2] @ avcline 20: {cmt: Set voltage to 1.2 V on pad INT1 and measure current}
valid comment[ 2] @ avcline 20: {sav('INT1', 1.2, 2, 0.01, False, False)}
valid comment[ 3] @ avcline 30: {gac('I_VDDD_DC_VEXT_12', 'INT1', 0.001, 0.0001, True)}
valid comment[ 3] @ avcline 30: {log('I_VDDD_DC_VEXT_12', '', '', 0, 0)}
valid comment[ 4] @ avcline 31: {cmt: Set voltage to 1.1 V on pad INT1 and measure current}
valid comment[ 4] @ avcline 31: {sav('INT1', 1.1, 2, 0.01, False, False)}
valid comment[ 5] @ avcline 40: {gac('I_VDDD_DC_VEXT_11', 'INT1', 0.001, 0.0001, True)}
valid comment[ 5] @ avcline 40: {log('I_VDDD_DC_VEXT_11', '', '', 0, 0)}
valid comment[ 6] @ avcline 41: {cmt: Set voltage to 1.0 V on pad INT1 and measure current}
valid comment[ 6] @ avcline 41: {sav('INT1', 1, 2, 0.01, False, False)}
valid comment[ 7] @ avcline 50: {gac('I_VDDD_DC_VEXT_10', 'INT1', 0.001, 0.0001, True)}
valid comment[ 7] @ avcline 50: {log('I_VDDD_DC_VEXT_10', '', '', 0, 0)}
valid comment[ 8] @ avcline 51: {cmt: Set voltage to 0.9 V on pad INT1 and measure current}
valid comment[ 8] @ avcline 51: {sav('INT1', 0.9, 2, 0.01, False, False)}
valid comment[ 9] @ avcline 61: {gac('I_VDDD_DC_VEXT_09', 'INT1', 0.001, 0.0001, True)}
valid comment[ 9] @ avcline 61: {log('I_VDDD_DC_VEXT_09', '', '', 0, 0)}
valid comment[ 10] @ avcline 62: {sav('INT1', 1.1, 2, 0.01, False, False)}
valid comment[ 11] @ avcline 71: {Test End: T10_41_VDDD_DC_Vext_Char}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][0]).pin("INT1").vForce(1.3 V)//{sav('INT1', 1.3, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][1]).pin("INT1").vForce(1.3 V).iMeas().iRange(100 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_VDDD_DC_VEXT_13', 'INT1', 0.001, 0.0001, True)}
.insertSub(i_comment_line[0][2]).pin("INT1").vForce(1.2 V)//{sav('INT1', 1.2, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][3]).pin("INT1").vForce(1.2 V).iMeas().iRange(100 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_VDDD_DC_VEXT_12', 'INT1', 0.001, 0.0001, True)}
.insertSub(i_comment_line[0][4]).pin("INT1").vForce(1.1 V)//{sav('INT1', 1.1, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][5]).pin("INT1").vForce(1.1 V).iMeas().iRange(100 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_VDDD_DC_VEXT_11', 'INT1', 0.001, 0.0001, True)}
.insertSub(i_comment_line[0][6]).pin("INT1").vForce(1 V)//{sav('INT1', 1, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][7]).pin("INT1").vForce(1 V).iMeas().iRange(100 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_VDDD_DC_VEXT_10', 'INT1', 0.001, 0.0001, True)}
.insertSub(i_comment_line[0][8]).pin("INT1").vForce(0.9 V)//{sav('INT1', 0.9, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][9]).pin("INT1").vForce(0.9 V).iMeas().iRange(100 uA).valueMode(TA::BADC).average(128).measWait(1 ms)//{gac('I_VDDD_DC_VEXT_09', 'INT1', 0.001, 0.0001, True)}
.insertSub(i_comment_line[0][10]).pin("INT1").vForce(1.1 V).iRange(40 mA)//{sav('INT1', 1.1, 2, 0.01, False, False)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
ARRAY_D ad_jsubresults_INT1; ad_jsubresults_INT1.resize(5); ad_jsubresults_INT1.init(-9.9);
ad_jsubresults_INT1 = rdi.id("dcid_0").getMultiValue("INT1");
d_I_VDDD_DC_VEXT_09[curSite] = ad_jsubresults_INT1[4];
d_I_VDDD_DC_VEXT_10[curSite] = ad_jsubresults_INT1[3];
d_I_VDDD_DC_VEXT_11[curSite] = ad_jsubresults_INT1[2];
d_I_VDDD_DC_VEXT_12[curSite] = ad_jsubresults_INT1[1];
d_I_VDDD_DC_VEXT_13[curSite] = ad_jsubresults_INT1[0];
FuncPrint("I_VDDD_DC_VEXT_09",d_I_VDDD_DC_VEXT_09[curSite]);
FuncPrint("I_VDDD_DC_VEXT_10",d_I_VDDD_DC_VEXT_10[curSite]);
FuncPrint("I_VDDD_DC_VEXT_11",d_I_VDDD_DC_VEXT_11[curSite]);
FuncPrint("I_VDDD_DC_VEXT_12",d_I_VDDD_DC_VEXT_12[curSite]);
FuncPrint("I_VDDD_DC_VEXT_13",d_I_VDDD_DC_VEXT_13[curSite]);
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
TestLog("I_VDDD_DC_VEXT_09", d_I_VDDD_DC_VEXT_09[curSite]);
TestLog("I_VDDD_DC_VEXT_10", d_I_VDDD_DC_VEXT_10[curSite]);
TestLog("I_VDDD_DC_VEXT_11", d_I_VDDD_DC_VEXT_11[curSite]);
TestLog("I_VDDD_DC_VEXT_12", d_I_VDDD_DC_VEXT_12[curSite]);
TestLog("I_VDDD_DC_VEXT_13", d_I_VDDD_DC_VEXT_13[curSite]);
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T10_41_VDDD_DC_Vext_Char_V1", T10_41_VDDD_DC_Vext_Char_V1);
|
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