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stringclasses 1
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stringlengths 131
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generate cpp file from given test case python file
|
cmt('Version info: $Revision: 1 $ $Author: rio1rt $ $Date: 2024/01/25 15:35:15 GMT $')
sav('VDD', 0.0, sim_ignore=True)
sav('VDDIO', 0.0, sim_ignore=True)
dly(1e-3)
sav('VDD', 1.8, v_range=2.0, i_comp=40e-3)
sav('VDDIO', 3.0, v_range=4.0, i_comp=40e-3)
dly(3e-3)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_01_power_cycle_V1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double v_VDDIO, v_VDD;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
v_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
v_VDD = Primary.getLevelSpec().getSpecValue("VDD");
rdi.dc().pin("All_AVI64").disconnect().execute();
rdi.hwRelay().pin("ALL_PS1600").setOff("ALL").execute();
rdi.hwRelay().pin("SPI_Pins").setOn("AC").setOff("DC,PPMU").execute();
rdi.util().pin("K1_K2").setOn().execute();
rdi.util().pin("K6,K7").setOff().execute();
// rdi.dc().pin("VDD_AVI64").vForce(v_VDD).iMeasRange(40 mA).execute();
// rdi.dc().pin("VDDIO_AVI64").vForce(v_VDDIO).iMeasRange(40 mA).execute();
RDI_BEGIN(mode);
rdi.burstId("T01_01_power_cycle_V1_PAT_id");
rdi.dc("T01_01_power_cycle_V1DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("VDD").vForce(0.0)
.insertSub(i_comment_line0[0]).pin("VDDIO").vForce(0.0)
.insertSub(i_comment_line0[1]).pin("VDD").vForce(v_VDD).iRange(40 mA)
.insertSub(i_comment_line0[1]).pin("VDDIO").vForce(v_VDDIO).iRange(40 mA)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_01_power_cycle_V1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_01_power_cycle_V1", T01_01_power_cycle_V1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
rac('CHIP_ID', 0x0000, 0x0000) # Dummy read to init SPI protocol
dly(50e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_02_IF_setup_SPI_V1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T01_02_IF_setup_SPI_V1_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_02_IF_setup_SPI_V1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_02_IF_setup_SPI_V1", T01_02_IF_setup_SPI_V1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:10:23 GMT $')
bw('CSB', 1) # Pre-condition inputs: CSB high to keep I2C enabled
bw('SCX', 1) # Pre-condition inputs: SCX high I2C clock
bw('SDX', 1) # Pre-condition inputs: SDX high I2C data
bw('SDO', 0) # Pre-condition inputs: SDO low to use I2C device ID 0x68
dly(10e-6)
sav('VDD', 0.0, sim_ignore=True)
sav('VDDIO', 0.0, sim_ignore=True)
dly(1e-3)
sav('VDD', 1.8, v_range=2.0, i_comp=40e-3)
sav('VDDIO', 3.0, v_range=4.0, i_comp=40e-3)
dly(3e-3)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_03_IF_setup_I2C_devID68_R1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double v_VDDIO, v_VDD;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
v_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
v_VDD = Primary.getLevelSpec().getSpecValue("VDD");
RDI_BEGIN(mode);
rdi.burstId("T01_03_IF_setup_I2C_devID68_R1_PAT_id");
rdi.dc("T01_03_IF_setup_I2C_devID68_R1DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("VDD").vForce(0.0)
.insertSub(i_comment_line0[0]).pin("VDDIO").vForce(0.0)
.insertSub(i_comment_line0[1]).pin("VDD").vForce(v_VDD).iRange(40 mA)
.insertSub(i_comment_line0[1]).pin("VDDIO").vForce(v_VDDIO).iRange(40 mA)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_03_IF_setup_I2C_devID68_R1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_03_IF_setup_I2C_devID68_R1", T01_03_IF_setup_I2C_devID68_R1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:21:04 GMT $')
bw('CSB', 1) # Pre-condition inputs: CSB high to keep I2C enabled
bw('SCX', 1) # Pre-condition inputs: SCX high I2C clock
bw('SDX', 1) # Pre-condition inputs: SDX high I2C data
bw('SDO', 1) # Pre-condition inputs: SDO low to use I2C device ID 0x69
dly(10e-6)
sav('VDD', 0.0, sim_ignore=True)
sav('VDDIO', 0.0, sim_ignore=True)
dly(1e-3)
sav('VDD', 1.8, v_range=2.0, i_comp=40e-3)
sav('VDDIO', 3.0, v_range=4.0, i_comp=40e-3)
dly(3e-3)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_04_IF_setup_I2C_devID69_R1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double v_VDDIO, v_VDD;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
v_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
v_VDD = Primary.getLevelSpec().getSpecValue("VDD");
RDI_BEGIN(mode);
rdi.burstId("T01_04_IF_setup_I2C_devID69_R1_PAT_id");
rdi.dc("T01_04_IF_setup_I2C_devID69_R1DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("VDD").vForce(0.0)
.insertSub(i_comment_line0[0]).pin("VDDIO").vForce(0.0)
.insertSub(i_comment_line0[1]).pin("VDD").vForce(v_VDD).iRange(40 mA)
.insertSub(i_comment_line0[1]).pin("VDDIO").vForce(v_VDDIO).iRange(40 mA)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_04_IF_setup_I2C_devID69_R1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_04_IF_setup_I2C_devID69_R1", T01_04_IF_setup_I2C_devID69_R1);
|
generate cpp file from given test case python file
|
# Warning, AA workaround applied, pri.sec pad drive strength set to 1
cmt('Version info: $Revision: bai430aa_rel/4 $ $Author: hmf1rt $ $Date: 2024/09/25 12:30:22 GMT $')
wr('EXT_MODE', 0x0000) # User page
wac('IO_PAD_STRENGTH', 0x0049) # Set pad drive strength to 1 for prim/sec IF
rac('CHIP_ID', 0x00af, 0x00ff) # Check chip access
wac('PWR_CONF', 0x0000) # Keep advanced power save off (default is 0x0)
dly(10e-6)
wr('CMD', 0xBB3A) # 1st command for enabling the extended mode
wr('CMD', 0x2C62) # 2nd command for enabling the extended mode
wr('CMD', 0xA576) # 1st command for enabling the super privilege mode
wr('CMD', 0x34D6) # 2nd command for enabling the super privilege mode
dly(200e-6)
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
dly(400e-6)
rac('ERR_REG', 0x0000) # Check error register
wac('EXT_MODE', 0xc00d) # Enable super privilege mode; switch to ANA register page
rac('STATUS_PMOD0', 0x0003, 0x0003) # Check ACC AFE PMU status
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_10_set_device_config_STC_ACC_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
ARRAY_LL IO_PAD_STRENGTH_rtv(xNSitES);
const int Wri_Bit_Length = 33;
const int Wri_Bit_Position = 415;
int IO_PAD_STRENGTH = 1;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T01_10_set_device_config_STC_ACC_V2_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
// FOR_EACH_SITE_BEGIN();
// IO_PAD_STRENGTH_rtv[CURRENT_SITE_NUMBER()-1] = extend_Pmode_Herschel(IO_PAD_STRENGTH, 2);
// FOR_EACH_SITE_END();
// rdi.runTimeVal("IO_PAD_STRENGTH_rtv", IO_PAD_STRENGTH_rtv);
//
// RDI_BEGIN(mode);
// rdi.burstId("id2");
// rdi.digCap("pad_drv_digcap").vecVarOnly().pin("SDO").capMode(TA::SER).samples(16*1).bitPerWord(16).execute();
// rdi.smartVec().label("T08_99_Pad_Drive_setting_R1").pin("SDX").writeData("IO_PAD_STRENGTH_rtv", Wri_Bit_Length, Wri_Bit_Position).execute();
// RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_10_set_device_config_STC_ACC_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
// int Func_result2 = rdi.id("id2").getBurstPassFail();
// FuncPrint("Func_result2", Func_result2);
//
// ARRAY_I Vec=rdi.id("pad_drv_digcap").getVector();
// FuncPrint("IO_PAD_STRENGTH_RD", reverse_ras_result(Vec[0])&0x7);
// FuncPrint("IO_PAD_STRENGTH", IO_PAD_STRENGTH);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_10_set_device_config_STC_ACC_V2", T01_10_set_device_config_STC_ACC_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: rio1rt $ $Date: 2024/03/14 13:05:55 GMT $')
rac('CHIP_ID', 0x00af, 0x00ff) # Check chip access
wac('PWR_CONF', 0x0000) # Keep advanced power save off (default is 0x0)
dly(10e-6)
wr('CMD', 0xBB3A) # 1st command for enabling the extended mode
wr('CMD', 0x2C62) # 2nd command for enabling the extended mode
wr('CMD', 0xA576) # 1st command for enabling the super privilege mode
wr('CMD', 0x34D6) # 2nd command for enabling the super privilege mode
dly(10e-6)
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
wac('GYR_CONF', 0xe25c) # Enable GYR in HPM; set GFS=4K; set ODR=1600; set BW=200
dly(50e-3)
rac('ERR_REG', 0x0000) # Check error register
wac('EXT_MODE', 0xc00d) # Enable super privilege mode; switch to ANA register page
rac('STATUS_PMOD0', 0x0003, 0x0003) # Check ACC AFE PMU status
rac('STATUS_PMOD1', 0x003c, 0x003c) # Check GYR drive and rate PMU status
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_11_set_device_config_STC_COMBO_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T01_11_set_device_config_STC_COMBO_V2_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_11_set_device_config_STC_COMBO_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_11_set_device_config_STC_COMBO_V2", T01_11_set_device_config_STC_COMBO_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/3 $ $Author: hmf1rt $ $Date: 2024/08/06 09:19:58 GMT $')
wac('EXT_MODE', 0xc006) # Switch to the FCU register page
wac('OCP_MASK', 0x1000) # Set masking register
wr('FILTER_CONF',0x1000) # Bypass GYR notch filter
rac('FILTER_CONF',0x1000, 0x1000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('OCP_MASK', 0x0040) # Set masking register
wr('FCU_TEST_CONF',0x0040) # Disable gyro self-test
rac('FCU_TEST_CONF',0x0040) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00d) # Switch to ANA/PMU register page
wac('GYR_TEST_AA_AI', 0x0003) # Power down AA/AI
wac('EXT_MODE', 0xc00e) # Switch to AFE register page
wac('OCP_MASK', 0x0030) # Set masking register
wr('DRV_ST_TRM', 0x0020) # Disable GYR startup BITE
rac('DRV_ST_TRM', 0x0020, 0x0020) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x0004) # Set masking register
wr('GYR_TEST_EN', 0x0004) # Enable VCO free-running frequency
rac('GYR_TEST_EN', 0x0004, 0x0004) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc000) # Switch to USR register page
wac('GYR_CONF', 0xe25e) # Enable GYR in HPM; set GFS=4K; set ODR=6400; set BW=200
dly(5e-3) # Delay for PMU power-up; no data ready (~10ms)
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
rac('STATUS_PMOD1', 0x003c, 0x003c) # Check GYR drive and rate PMU status
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_20_switch_on_GYR_wo_drive_V3: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T01_20_switch_on_GYR_wo_drive_V3_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
// rdi.func().label("T11_21_VCO_reference_measurement_V2_AVC2_PY2").execute();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_20_switch_on_GYR_wo_drive_V3_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_20_switch_on_GYR_wo_drive_V3", T01_20_switch_on_GYR_wo_drive_V3);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:21:04 GMT $')
wac('EXT_MODE', 0xc000) # Switch to USR register page
wac('GYR_CONF', 0x0058) # Disable GYR; set default configuration
dly(100e-6)
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x0004) # Set masking register
wr('GYR_TEST_EN', 0x0000) # Disable VCO free-running frequency
rac('GYR_TEST_EN', 0x0000, 0x0004) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00e) # Switch to AFE register page
wac('OCP_MASK', 0x0020) # Set masking register
wr('DRV_ST_TRM', 0x0000) # Enable GYR startup BITE
rac('DRV_ST_TRM', 0x0000, 0x0020) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00d) # Switch to ANA/PMU register page
wac('GYR_TEST_AA_AI', 0x0000) # Enable power up of AA/AI
wac('EXT_MODE', 0xc006) # Switch to the FCU register page
wac('OCP_MASK', 0x0040) # Set masking register
wr('FCU_TEST_CONF',0x0000) # Enable gyro self-test
rac('FCU_TEST_CONF',0x0000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('OCP_MASK', 0x1000) # Set masking register
wr('FILTER_CONF',0x0000) # Disable GYR notch filter bypass
rac('FILTER_CONF',0x0000, 0x1000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00d) # Switch to ANA/PMU register page
rac('STATUS_PMOD1', 0x0000, 0x003c) # Check GYR drive and rate PMU status
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_21_switch_off_GYR_wo_drive_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T01_21_switch_off_GYR_wo_drive_V2_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_21_switch_off_GYR_wo_drive_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_21_switch_off_GYR_wo_drive_V2", T01_21_switch_off_GYR_wo_drive_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 3 $ $Author: luz3sgh $ $Date: 2024/05/20 08:35:37 GMT $')
wac('EXT_MODE',0xc000) # User page
wac('ACC_CONF', 0x004e) # e24c->004e, odr to max 6.4K, bandwidth change to auto, Disable ACC
wac('EXT_MODE',0xc00e) # AFE(acc afe) page
wac('ACC_TRM_CTRL',0x01af) # Default value for gmboost, slow chopper, settling count
wac('ACC_TEST_CTRL',0x00c7) # Disable sensor drive, disconnect MEMS, enable all 3 channels
wac('EXT_MODE',0xc00b) # AFE(acc_dp) page
wac('ACC_COMP_CONF', 0x0003) # Disable offset and gain correction
wac('EXT_MODE',0xc000) # User page
wac('FILTER_CONF', 0x0000) # Bypass IIR, reset value 0303
wac('ACC_CONF', 0xe04e) # Enable ACC in HPM; set AFS=32g; set ODR=3200; set BW=AUTO
dly(400e-6) # wait for the internal clock (25kHz), multiple clocks in the PMU
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_24_enable_ACC_high_odr_mode_V3: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T01_24_enable_ACC_high_odr_mode_V3_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T01_24_enable_ACC_high_odr_mode_V3_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_24_enable_ACC_high_odr_mode_V3", T01_24_enable_ACC_high_odr_mode_V3);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: luz3sgh $ $Date: 2024/06/11 07:02:03 GMT $')
wac('EXT_MODE',0xc000) # AFE(acc afe) page
wac('ACC_CONF', 0x004e) # Disable ACC
# Restore to default value
wac('EXT_MODE',0xc00e) # AFE(acc afe) page
wac('ACC_TEST_CTRL',0x0007) # Restore default
wac('EXT_MODE',0xc00b) # AFE(acc_dp) page
wac('ACC_COMP_CONF', 0x0000) # Restore default
wac('EXT_MODE',0xc000) # User page
wac('FILTER_CONF', 0x0303) # Restore default
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
dly(500e-6) # as in T01_10_set_device_config_STC, +100microseconds for rac(),wac()
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_25_disable_ACC_high_odr_mode_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("01_25_disable_ACC_high_odr_mode_V2_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("01_25_disable_ACC_high_odr_mode_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_25_disable_ACC_high_odr_mode_V2", T01_25_disable_ACC_high_odr_mode_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:21:04 GMT $')
wac('EXT_MODE', 0xc006) # Switch to the FCU register page
wac('OCP_MASK', 0x1000) # Set masking register
wr('FILTER_CONF',0x1000) # Bypass GYR notch filter
rac('FILTER_CONF',0x1000, 0x1000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('OCP_MASK', 0x0040) # Set masking register
wr('FCU_TEST_CONF',0x0040) # Disable gyro self-test
rac('FCU_TEST_CONF',0x0040) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00d) # Switch to ANA/PMU register page
wac('GYR_TEST_AA_AI', 0x0003) # Power down AA/AI
wac('OCP_MASK', 0x1000) # Set masking register
wr('ANA_TRM_CAP_PROG_DRV', 0x1000) # Enable realignment of GYR clk to FOSC
rac('ANA_TRM_CAP_PROG_DRV', 0x1000, 0x1000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00e) # Switch to AFE register page
wac('OCP_MASK', 0x0030) # Set masking register
wr('DRV_ST_TRM', 0x0020) # Disable GYR startup BITE
rac('DRV_ST_TRM', 0x0020, 0x0020) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x0004) # Set masking register
wr('GYR_TEST_EN', 0x0004) # Enable VCO free-running frequency
rac('GYR_TEST_EN', 0x0004, 0x0004) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc000) # Switch to USR register page
wac('GYR_CONF', 0xe25e) # Enable GYR in HPM; set GFS=4K; set ODR=6400; set BW=200
dly(5e-3) # Delay for PMU power-up; no data ready (~10ms)
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
rac('STATUS_PMOD1', 0x003c, 0x003c) # Check GYR drive and rate PMU status
|
/*****************************************************
* T01_30_switch_on_GYR_wo_drive_econ_V3, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_30_switch_on_GYR_wo_drive_econ_V3: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T01_30_switch_on_GYR_wo_drive_econ}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 3 > <Author: hmf1rt > <Date: 2024/04/25 08:09:21 GMT >}
valid comment[ 1] @ avcline 3973: {Test End: T01_30_switch_on_GYR_wo_drive_econ}
*/
// rdi.util().pin("K1_K2,K6,K7").setOn().execute();
// rdi.dc().pin("VDD_AVI64").vForce(0).iMeasRange(40 mA).execute();
// rdi.dc().pin("VDDIO_AVI64").vForce(0).iMeasRange(40 mA).execute();
// RDI_BEGIN(mode);
// rdi.dc().pin("VDDIO_AVI64").vForce(0).execute();
// rdi.dc().pin("VDD_AVI64").vForce(0).execute();
// rdi.wait(1 ms);
// rdi.dc().pin("VDDIO_AVI64").vForce(3).execute();
// rdi.dc().pin("VDD_AVI64").vForce(1.8).execute();
// rdi.wait(1 ms);
// rdi.func().label("T01_02_IF_setup_SPI_V1_AVC1_PY1").execute();
// rdi.func().label("T01_10_set_device_config_STC_ACC_R1").execute();
// rdi.func().label(s_splited_pat_name[0]).execute();
// RDI_END();
//
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.func().label(s_splited_pat_name[0]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
FuncPrint("i_funcRes0", i_funcRes0[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
//rdi.func().label("T11_20_VCO_reference_trimming_V2_AVC2_PY2").execute();
ON_FIRST_INVOCATION_END();
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_30_switch_on_GYR_wo_drive_econ_V3", T01_30_switch_on_GYR_wo_drive_econ_V3);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:21:04 GMT $')
wac('EXT_MODE', 0xc000) # Switch to USR register page
wac('GYR_CONF', 0x0058) # Disable GYR; set default configuration
dly(100e-6)
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x0004) # Set masking register
wr('GYR_TEST_EN', 0x0000) # Disable VCO free-running frequency
rac('GYR_TEST_EN', 0x0000, 0x0004) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00e) # Switch to AFE register page
wac('OCP_MASK', 0x0020) # Set masking register
wr('DRV_ST_TRM', 0x0000) # Enable GYR startup BITE
rac('DRV_ST_TRM', 0x0000, 0x0020) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00d) # Switch to ANA/PMU register page
wac('OCP_MASK', 0x1000) # Set masking register
wr('ANA_TRM_CAP_PROG_DRV', 0x0000) # Disable realignment of GYR clk to FOSC
rac('ANA_TRM_CAP_PROG_DRV', 0x0000, 0x1000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('GYR_TEST_AA_AI', 0x0000) # Enable power up of AA/AI
wac('EXT_MODE', 0xc006) # Switch to the FCU register page
wac('OCP_MASK', 0x0040) # Set masking register
wr('FCU_TEST_CONF',0x0000) # Enable gyro self-test
rac('FCU_TEST_CONF',0x0000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('OCP_MASK', 0x1000) # Set masking register
wr('FILTER_CONF',0x0000) # Disable GYR notch filter bypass
rac('FILTER_CONF',0x0000, 0x1000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00d) # Switch to ANA/PMU register page
rac('STATUS_PMOD1', 0x0000, 0x003c) # Check GYR drive and rate PMU status
|
/*****************************************************
* T01_31_switch_off_GYR_wo_drive_econ_V4, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T01_31_switch_off_GYR_wo_drive_econ_V4: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T01_31_switch_off_GYR_wo_drive_econ}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 4 > <Author: hmf1rt > <Date: 2024/04/25 15:29:47 GMT >}
valid comment[ 1] @ avcline 3973: {Test End: T01_31_switch_off_GYR_wo_drive_econ}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.func().label(s_splited_pat_name[0]).execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
FuncPrint("i_funcRes0", i_funcRes0[curSite]);
//Add calc code if necessary
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T01_31_switch_off_GYR_wo_drive_econ_V4", T01_31_switch_off_GYR_wo_drive_econ_V4);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: luz3sgh $ $Date: 2024/04/12 06:49:43 GMT $')
cmt("py $Revision: 2 $")
wac("EXT_MODE", 0xc009) # change to page 9,IO
bw("ASCX", 1) # Set pad ASCX to "1"
#IO page
wac('OCP_MASK', 0x0018) # Set masking register
wr('IO_TEST_IF', 0x0018) # Enable external clock; select ASCX as clk source
dly(10.064e-6) # Delay to fit the 74ns grid
ubw('ASCX')
clk("ASCX", 1/148e-9) # Start to apply ext clk (6.757 MHz) on DTM3
dly(20.128e-6) # Delay to fit the 74ns grid
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
rac("IO_TEST_IF", 0x0018, 0x0018) # Check register setting
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_02_enable_external_clock_on_ascx_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T02_02_enable_external_clock_on_ascx_V2_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T02_02_enable_external_clock_on_ascx_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_02_enable_external_clock_on_ascx_V2", T02_02_enable_external_clock_on_ascx_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# Part1- VDDA bypass
# - swith off ACC
# - switch off VDDA_LDO
# - disable pullup on ANAIO 2
# - set ext. voltage
# - enable bypass--connect VDDA to OCSB Pad
# Part2- VDDDC bypass
# - set INT1 to 1.15V
# - enable bypass--connect VDDDC to INT1 pad
# - switch off VDD_DC LDO
# - set INT1 to 1.1V
#############################################################################################################
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 19:45:00 GMT $')
# Part1,vdda bypass
# switch off ACC
wac('EXT_MODE', 0xc000) # Switch to USR page
wac('ACC_CONF',0x024c) # Disable ACC
# power down VDDA_LDO (to prevent power request in other test items)
wac('EXT_MODE', 0xc00d) # Switch to PMU page
wac("OCP_MASK", 0x000a)
wr("PMU_TEST_OWR",0x0008) # bit3 acc_vdda_owr_en 1, bit 1, owr_vdda_acc_en 0
rac("PMU_TEST_OWR",0x0008,0x000a)
wr("OCP_MASK", 0x0000)
rac("OCP_MASK", 0xffff)
# set vdda ext. voltage
sav("OCSB", 1.5, v_range=2.0, i_comp=10e-3)
dly(100.048e-6)
# enable bypass
wac("EXT_MODE", 0xc00d) # change to page D, ANA/PMU page ++
wac("OCP_MASK", 0x0001) # Set masking register
wr("ANA_TEST_PWR",0x0001) # vdda_ext_en to 1, VDDA to OCSB
rac("ANA_TEST_PWR", 0x0001, 0x0001) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
# Part2, vddd_dc bypass
sav('INT1', 1.15, v_range=2.0, i_comp=10e-3)
dly(100.048e-6)
wac('OCP_MASK', 0x0042) # Set masking register
wr('ANA_TEST_PWR', 0x0002) # Bypass VDDD_DC to external pad
rac('ANA_TEST_PWR', 0x0002,0x0042) # Bypass VDDD_DC to external pad
dly(10.064e-6)
wr('ANA_TEST_PWR', 0x0042) # Disable VDDD_DC LDO; keep external pad bypass
rac('ANA_TEST_PWR', 0x0042,0x0042) # Disable VDDD_DC LDO; keep external pad bypass
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Set vddd_dc ext. voltage
sav('INT1', 1.1, v_range=2.0, i_comp=10e-3)
dly(100.048e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_10_enable_VDDD_DC_and_VDDA_external_bypass_ECon_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
double d_V_INT1, d_V_OCSB;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
d_V_INT1 = Primary.getLevelSpec().getSpecValue("INT1");
d_V_OCSB = Primary.getLevelSpec().getSpecValue("OCSB");
RDI_BEGIN(mode);
rdi.burstId("T02_10_enable_VDDD_DC_and_VDDA_external_bypass_ECon_V2_PAT_id");
rdi.dc("T02_10_enable_VDDD_DC_and_VDDA_external_bypass_ECon_V2DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("OCSB").vForce(d_V_OCSB)
.insertSub(i_comment_line0[1]).pin("INT1").vForce(1.15)
.insertSub(i_comment_line0[2]).pin("INT1").vForce(d_V_INT1)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T02_10_enable_VDDD_DC_and_VDDA_external_bypass_ECon_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_10_enable_VDDD_DC_and_VDDA_external_bypass_ECon_V2", T02_10_enable_VDDD_DC_and_VDDA_external_bypass_ECon_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 19:45:00 GMT $')
# Part1 disable vdddc bypass
sav('INT1', 1.15) # Increase supply voltage to 1.15V on pad INT1
dly(100.048e-6)
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x0042) # Set masking register
wr('ANA_TEST_PWR', 0x0002) # Enable VDDD_DC_LDO; keep external bypass
rac('ANA_TEST_PWR', 0x0002, 0x0042) # Check register setting
dly(100.048e-6)
wr('ANA_TEST_PWR', 0x0000) # Disable VDDD_DC extnernal bypass
rac('ANA_TEST_PWR', 0x0000, 0x0042) # Check register setting
dly(100.048e-6)
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
uav('INT1') # Unset voltage stimuli on INT1
dly(100.048e-6)
# Part2 disable vdda bypass
# disable bypass VDDA_LDO with ext voltage
wac("OCP_MASK", 0x0001) # Set masking register
wr("ANA_TEST_PWR",0x0000) # vdda_ext_en to 0, disconnect VDDA to OCSB
rac("ANA_TEST_PWR", 0x0000, 0x0001) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
# unset ext voltage
uav("OCSB")
dly(100.048e-6)
# disable VDDA_LDO power overwrite
wac('EXT_MODE',0xc00d) # to PMU page
wac("OCP_MASK", 0x000a)
wr("PMU_TEST_OWR",0x0000) # bit3 acc_vdda_owr_en 0, bit 1, owr_vdda_acc_en 0
rac("PMU_TEST_OWR",0x0000,0x000a)
wr("OCP_MASK", 0x0000)
rac("OCP_MASK", 0xffff)
# switch on ACC
wac('EXT_MODE', 0xc000)
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
dly(3000.256e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_11_disable_VDDD_DC_and_VDDA_external_bypass_ECon_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T02_11_disable_VDDD_DC_and_VDDA_external_bypass_ECon_V2_PAT_id");
rdi.dc("T02_11_disable_VDDD_DC_and_VDDA_external_bypass_ECon_V2DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("INT1").vForce(1.15)
.insertSub(i_comment_line0[1]).pin("INT1").relay(TA::ppmuRly_offALL)
.insertSub(i_comment_line0[2]).pin("OCSB").relay(TA::ppmuRly_offALL)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T02_11_disable_VDDD_DC_and_VDDA_external_bypass_ECon_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_11_disable_VDDD_DC_and_VDDA_external_bypass_ECon_V2", T02_11_disable_VDDD_DC_and_VDDA_external_bypass_ECon_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# - swith off ACC
# - switch off VDDA_LDO
# - disable pullup on ANAIO 2
# - set ext. voltage
# - enable bypass--connect VDDA to external Pad
#############################################################################################################
cmt('Version info: $Revision: 3 $ $Author: hmf1rt $ $Date: 2024/04/19 12:11:59 GMT $')
# switch off ACC
wac('EXT_MODE', 0xc000) # Switch to USR page
wac('ACC_CONF',0x024c) # Disable ACC
# power down VDDA_LDO (to prevent power request in other test items)
wac('EXT_MODE', 0xc00d) # Switch to PMU page
wac("OCP_MASK", 0x000a)
wr("PMU_TEST_OWR",0x0008) # bit3 acc_vdda_owr_en 1, bit 1, owr_vdda_acc_en 0
rac("PMU_TEST_OWR",0x0008,0x000a)
wr("OCP_MASK", 0x0000)
rac("OCP_MASK", 0xffff)
# set ext. voltage
sav("OCSB", 1.5, v_range=2.0, i_comp=10e-3)
dly(100e-6)
# enable bypass
wac("EXT_MODE", 0xc00d) # change to page D, ANA/PMU page ++
wac("OCP_MASK", 0x0001) # Set masking register
wr("ANA_TEST_PWR",0x0001) # vdda_ext_en to 1, VDDA to OCSB
rac("ANA_TEST_PWR", 0x0001, 0x0001) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_14_enable_vdda_external_bypass_V3: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T02_14_enable_vdda_external_bypass_V3_PAT_id");
rdi.dc("T02_14_enable_vdda_external_bypass_V3DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("OCSB").vForce(1.5)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T02_14_enable_vdda_external_bypass_V3_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_14_enable_vdda_external_bypass_V3", T02_14_enable_vdda_external_bypass_V3);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# - disable bypass VDDA_LDO with ext. voltage
# - unset ext. voltage
# - enable pullup on ANAIO2
# - disable VDDA pwr overwrite
# - switch on ACC
#############################################################################################################
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/08/07 15:17:16 GMT $')
# disable bypass VDDA_LDO with ext voltage
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac("OCP_MASK", 0x0001) # Set masking register
wr("ANA_TEST_PWR",0x0000) # vdda_ext_en to 0, disconnect VDDA to OCSB
rac("ANA_TEST_PWR", 0x0000, 0x0001) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
# unset ext voltage
uav("OCSB")
dly(100e-6)
# disable VDDA_LDO power overwrite
wac('EXT_MODE',0xc00d) # to PMU page
wac("OCP_MASK", 0x000a)
wr("PMU_TEST_OWR",0x0000) # bit3 acc_vdda_owr_en 0, bit 1, owr_vdda_acc_en 0
rac("PMU_TEST_OWR",0x0000,0x000a)
wr("OCP_MASK", 0x0000)
rac("OCP_MASK", 0xffff)
# switch on ACC
wac('EXT_MODE', 0xc000)
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
dly(3e-3)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_15_disable_vdda_external_bypass_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T02_15_disable_vdda_external_bypass_V2_PAT_id");
rdi.dc("T02_15_disable_vdda_external_bypass_V2DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("OCSB").relay(TA::ppmuRly_offALL)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T02_15_disable_vdda_external_bypass_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_15_disable_vdda_external_bypass_V2", T02_15_disable_vdda_external_bypass_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# - swith off ACC
# - switch off VDDA_LDO
# - disable pullup on ANAIO 2
# - set ext. voltage
# - enable bypass--connect VDDA to external Pad
#############################################################################################################
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/04/19 12:28:38 GMT $')
# switch off ACC
wac('EXT_MODE', 0xc000) # Switch to USR page
wac('ACC_CONF',0x024c) # Disable ACC
# power down VDDA_LDO (to prevent power request in other test items)
wac('EXT_MODE', 0xc00d) # Switch to PMU page
wac("OCP_MASK", 0x000a)
wr("PMU_TEST_OWR",0x0008) # bit3 acc_vdda_owr_en 1, bit 1, owr_vdda_acc_en 0
rac("PMU_TEST_OWR",0x0008,0x000a)
wr("OCP_MASK", 0x0000)
rac("OCP_MASK", 0xffff)
# set ext. voltage
sav("OCSB", 1.5, v_range=2.0, i_comp=10e-3)
dly(100e-6)
# enable bypass
wac("EXT_MODE", 0xc00d) # change to page D, ANA/PMU page ++
wac("OCP_MASK", 0x0001) # Set masking register
wr("ANA_TEST_PWR",0x0001) # vdda_ext_en to 1, VDDA to OCSB
rac("ANA_TEST_PWR", 0x0001, 0x0001) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
|
/*****************************************************
* T02_16_enable_vdda_external_bypass_econ_V1, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_16_enable_vdda_external_bypass_econ_V1: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static int i_funcRes0[xNSitES];
double d_V_OCSB;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
d_V_OCSB = Primary.getLevelSpec().getSpecValue("OCSB");
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T02_16_enable_vdda_external_bypass_econ}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 1 > <Author: hmf1rt > <Date: 2024/04/19 12:28:38 GMT >}
valid comment[ 1] @ avcline 1162: {sav('OCSB', 1.5, 2, 0.01, False, False)}
valid comment[ 2] @ avcline 1940: {Test End: T02_16_enable_vdda_external_bypass_econ}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][1]).pin("OCSB").vForce(d_V_OCSB)//{sav('OCSB', 1.5, 2, 0.01, False, False)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
//Add calc code if necessary
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_16_enable_vdda_external_bypass_econ_V1", T02_16_enable_vdda_external_bypass_econ_V1);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# - disable bypass VDDA_LDO with ext. voltage
# - unset ext. voltage
# - enable pullup on ANAIO2
# - disable VDDA pwr overwrite
# - switch on ACC
#############################################################################################################
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/08/07 15:17:16 GMT $')
# disable bypass VDDA_LDO with ext voltage
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac("OCP_MASK", 0x0001) # Set masking register
wr("ANA_TEST_PWR",0x0000) # vdda_ext_en to 0, disconnect VDDA to OCSB
rac("ANA_TEST_PWR", 0x0000, 0x0001) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
# unset ext voltage
uav("OCSB")
dly(100e-6)
# disable VDDA_LDO power overwrite
wac('EXT_MODE',0xc00d) # to PMU page
wac("OCP_MASK", 0x000a)
wr("PMU_TEST_OWR",0x0000) # bit3 acc_vdda_owr_en 0, bit 1, owr_vdda_acc_en 0
rac("PMU_TEST_OWR",0x0000,0x000a)
wr("OCP_MASK", 0x0000)
rac("OCP_MASK", 0xffff)
# switch on ACC
wac('EXT_MODE', 0xc000)
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
dly(3e-3)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_17_disable_vdda_external_bypass_econ_R1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T02_17_disable_vdda_external_bypass_econ_R1_PAT_id");
rdi.dc("T02_17_disable_vdda_external_bypass_econ_R1DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("OCSB").relay(TA::ppmuRly_offALL)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T02_17_disable_vdda_external_bypass_econ_R1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_17_disable_vdda_external_bypass_econ_R1", T02_17_disable_vdda_external_bypass_econ_R1);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# Part1- VDDA bypass
# - swith off ACC
# - switch off VDDA_LDO
# - disable pullup on ANAIO 2
# - set ext. voltage
# - enable bypass--connect VDDA to OCSB Pad
# Part2- VDDDC bypass
# - set INT1 to 1.15V
# - enable bypass--connect VDDDC to INT1 pad
# - switch off VDD_DC LDO
# - set INT1 to 1.1V
# - enable ACC in HPM
#############################################################################################################
cmt('Version info: $Revision: 4 $ $Author: hmf1rt $ $Date: 2024/04/23 14:41:28 GMT $')
# Part1,vdda bypass
# switch off ACC
wac('EXT_MODE', 0xc000) # Switch to USR page
wac('ACC_CONF',0x024c) # Disable ACC
# power down VDDA_LDO (to prevent power request in other test items)
wac('EXT_MODE', 0xc00d) # Switch to PMU page
wac("OCP_MASK", 0x000a)
wr("PMU_TEST_OWR",0x0008) # bit3 acc_vdda_owr_en 1, bit 1, owr_vdda_acc_en 0
rac("PMU_TEST_OWR",0x0008,0x000a)
wr("OCP_MASK", 0x0000)
rac("OCP_MASK", 0xffff)
# set vdda ext. voltage
sav("OCSB", 1.5, v_range=2.0, i_comp=10e-3)
dly(100e-6)
# enable bypass
wac("EXT_MODE", 0xc00d) # change to page D, ANA/PMU page ++
wac("OCP_MASK", 0x0001) # Set masking register
wr("ANA_TEST_PWR",0x0001) # vdda_ext_en to 1, VDDA to OCSB
rac("ANA_TEST_PWR", 0x0001, 0x0001) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
# Part2, vddd_dc bypass
sav('INT1', 1.15, v_range=2.0, i_comp=10e-3)
dly(100e-6)
wac('OCP_MASK', 0x0042) # Set masking register
wr('ANA_TEST_PWR', 0x0002) # Bypass VDDD_DC to external pad
rac('ANA_TEST_PWR', 0x0002,0x0042) # Bypass VDDD_DC to external pad
dly(10e-6)
wr('ANA_TEST_PWR', 0x0042) # Disable VDDD_DC LDO; keep external pad bypass
rac('ANA_TEST_PWR', 0x0042,0x0042) # Disable VDDD_DC LDO; keep external pad bypass
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Set vddd_dc ext. voltage
sav('INT1', 1.1, v_range=2.0, i_comp=10e-3)
dly(100e-6)
# switch on ACC
wac('EXT_MODE', 0xc000) # Switch to USR page
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM
dly(400e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_18_enable_vddd_dc_and_vdda_external_bypass_V4: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
double d_V_INT1, d_V_OCSB;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
d_V_INT1 = Primary.getLevelSpec().getSpecValue("INT1");
d_V_OCSB = Primary.getLevelSpec().getSpecValue("OCSB");
RDI_BEGIN(mode);
rdi.burstId("T02_18_enable_vddd_dc_and_vdda_external_bypass_V4_PAT_id");
rdi.dc("T02_18_enable_vddd_dc_and_vdda_external_bypass_V4DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("OCSB").vForce(d_V_OCSB)
.insertSub(i_comment_line0[1]).pin("INT1").vForce(1.15)
.insertSub(i_comment_line0[2]).pin("INT1").vForce(d_V_INT1)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T02_18_enable_vddd_dc_and_vdda_external_bypass_V4_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_18_enable_vddd_dc_and_vdda_external_bypass_V4", T02_18_enable_vddd_dc_and_vdda_external_bypass_V4);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 3 $ $Author: hmf1rt $ $Date: 2024/04/23 14:41:28 GMT $')
# switch off ACC
wac('EXT_MODE', 0xc000) # Switch to USR page
wac('ACC_CONF',0x024c) # Disable ACC
# Part1 disable vdddc bypass
sav('INT1', 1.15) # Increase supply voltage to 1.15V on pad INT1
dly(100e-6)
wac('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('OCP_MASK', 0x0042) # Set masking register
wr('ANA_TEST_PWR', 0x0002) # Enable VDDD_DC_LDO; keep external bypass
rac('ANA_TEST_PWR', 0x0002, 0x0042) # Check register setting
dly(100e-6)
wr('ANA_TEST_PWR', 0x0000) # Disable VDDD_DC extnernal bypass
rac('ANA_TEST_PWR', 0x0000, 0x0042) # Check register setting
dly(100e-6)
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
uav('INT1') # Unset voltage stimuli on INT1
dly(100e-6)
# Part2 disable vdda bypass
# disable bypass VDDA_LDO with ext voltage
wac("OCP_MASK", 0x0001) # Set masking register
wr("ANA_TEST_PWR",0x0000) # vdda_ext_en to 0, disconnect VDDA to OCSB
rac("ANA_TEST_PWR", 0x0000, 0x0001) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
# unset ext voltage
uav("OCSB")
dly(100e-6)
# disable VDDA_LDO power overwrite
wac('EXT_MODE',0xc00d) # to PMU page
wac("OCP_MASK", 0x000a)
wr("PMU_TEST_OWR",0x0000) # bit3 acc_vdda_owr_en 0, bit 1, owr_vdda_acc_en 0
rac("PMU_TEST_OWR",0x0000,0x000a)
wr("OCP_MASK", 0x0000)
rac("OCP_MASK", 0xffff)
# switch on ACC
wac('EXT_MODE', 0xc000)
wac('ACC_CONF', 0xe24c) # Enable ACC in HPM; set AFS=32g; set ODR=1600; set BW=200
dly(400e-6)
|
/*****************************************************
* T02_19_disable_vddd_dc_and_vdda_external_bypass_V3, description file version Notfound, avc file version Notfound
* First Editor : ayh2sgh
* Code generated with autocoding tool V2.8.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_19_disable_vddd_dc_and_vdda_external_bypass_V3: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T02_19_disable_vddd_dc_and_vdda_external_bypass}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 3 > <Author: hmf1rt > <Date: 2024/04/23 14:41:28 GMT >}
valid comment[ 1] @ avcline 394: {sav('INT1', 1.15, 2, 0.01, False, False)}
valid comment[ 2] @ avcline 1384: {uav('INT1', False)}
valid comment[ 3] @ avcline 1970: {uav('OCSB', False)}
valid comment[ 4] @ avcline 3140: {Test End: T02_19_disable_vddd_dc_and_vdda_external_bypass}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][1]).pin("INT1").vForce(1.15 V)//{sav('INT1', 1.15, 2, 0.01, False, False)}
.insertSub(i_comment_line[0][2]).pin("INT1").relay(TA::ppmuRly_offALL)////{uav('INT1', False)}
.insertSub(i_comment_line[0][3]).pin("OCSB").relay(TA::ppmuRly_offALL)////{uav('OCSB', False)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
//Add calc code if necessary
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T02_19_disable_vddd_dc_and_vdda_external_bypass_V3", T02_19_disable_vddd_dc_and_vdda_external_bypass_V3);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: supply VDDG externally via IO_OCSB_LOWRES pin
#############################################################################################################
from test_sub_functions import *
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 19:45:00 GMT $')
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wac('TM_ADDR', 0x0003) # Enable ATM loop back test
wac('TM_PIN', 0x1100) # Set ATM ANAIO 4,3 => highZ
wac('TM_CONF', 0x0000) # Disable TBs
wac('EXT_MODE', 0xc00d) # Switch to PMU page
wac("PMU_TEST_OWR",0x0030) # enable VDDT (required for Gyro BG and Bias)
wac("EXT_MODE", 0xc00d) # change to page D, ANA/PMU page ++
wac("OCP_MASK", 0x0010) # Set masking register
wr("ANA_TEST_PWR",0x0010) # vddg_ext_en to 1: connecting VDDG to IO_OCSB_LOWRES
rac("ANA_TEST_PWR", 0x0010, 0x0010) # Check register setting
wr("OCP_MASK", 0x0000) # Reset masking register
rac("OCP_MASK", 0xffff) # Check masking register reset
dly(100e-6)
sav('OCSB', 1.5) # Set voltage on OCSB
|
/*****************************************************
* T02_21_enable_vddg_external_bypass_V2, description file version Notfound, avc file version Notfound
* First Editor : jsh5sgh
* Code generated with autocoding tool V2.9.1, in TOI2 standard way by module write_standard
* Change History:
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T02_21_enable_vddg_external_bypass_V2: public testmethod::TestMethod {
protected:
int i_funcRes[xNSitES];
virtual void initialize()
{
}
virtual void run()
{
const string s_label_name = Primary.getLabel();//CodingTool:Till this line by write_xpart_head_pure_func()
INT i_split_pat_flag;
GET_USER_FLAG("split_pat_flag", &i_split_pat_flag);
vector<string> s_splited_pat_name;
s_splited_pat_name.resize(1);
s_splited_pat_name[0] = s_label_name;
const int i_split_count = 1;
vector<int> i_comment_line[i_split_count];
static int i_funcRes0[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
i_comment_line[0] = search_comment_line_specialOnly(s_label_name, "search_here");
print_key_comment(s_label_name, i_comment_line[0], printFlag);
/* Ori key coments in subpat0 ~~~~~~~~~~~~~~
valid comment[ 0] @ avcline 10: {Test Start: T02_21_enable_vddg_external_bypass}
valid comment[ 0] @ avcline 10: {cmt: Version info: <Revision: 2 > <Author: laj1mu23 > <Date: 2024/03/25 19:45:00 GMT >}
valid comment[ 1] @ avcline 1940: {sav('OCSB', 1.5, 2, 0.01, False, False)}
valid comment[ 1] @ avcline 1940: {Test End: T02_21_enable_vddg_external_bypass}
*/
RDI_BEGIN(mode);
rdi.burstId("burst_id0");
rdi.dc("dcid_0").label(s_splited_pat_name[0])
.insertSub(i_comment_line[0][1]).pin("OCSB").vForce(1.5 V)//{sav('OCSB', 1.5, 2, 0.01, False, False)}
.execute();
RDI_END();
FOR_EACH_SITE_BEGIN();
i_funcRes0[curSite] = rdi.id("burst_id0").getBurstPassFail();
//Add calc code if necessary
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
i_funcRes[curSite] = i_funcRes0[curSite];
FuncPrint("Func_result", i_funcRes[curSite]);
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
return;//From this line writtern by write_xpart_foot()
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{ string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T02_21_enable_vddg_external_bypass_V2", T02_21_enable_vddg_external_bypass_V2);
|
generate cpp file from given test case python file
|
#############################################################################################################
# Description: SCAN test
# Preamble: T03_10_scan_entry, T03_11_scan_reset
#############################################################################################################
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
cmt('Execute the scan pattern file: T03_01_scan_test_V1.stil')
cmt('The pattern timing is included in this file')
cmt('This test item is a functional fail if any of the compare vectors in the scan patttern fails')
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T03_01_scan_test: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
static double v_VDDIO, v_VDD;
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
// v_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
// v_VDD = Primary.getLevelSpec().getSpecValue("VDD");
//
// rdi.dc().pin("VDD").vForce(v_VDD).iRange(40 mA).execute();
// rdi.hwRelay().pin("INT1,INT2").setOff("ALL").execute();
rdi.dc().pin("VDDIO").vForce(1.8).iRange(40 mA).execute();
// rdi.dc().pin("SCX").vForce(1.8).iRange(40 mA).execute();
// Primary.getLevelSpec().change("VDDIO", 1.8);
RDI_BEGIN(mode);
rdi.burstId("T03_01_scan_test_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
// rdi.emapLocation(TA::RAM);
// RDI_BEGIN();
// rdi.emap("a").label(s_label_name).pin("SDO")
// .failCount()
// // .pfMap()
//// .FFC()
// .failCyc()
// .execute();
// .pin("pC").failCyc(5).execute();
// rdi.emap("b").label(s_label_name).pin("MISO").FFC().execute();
// RDI_END();
rdi.util().pin("K4,K8").setOff().execute();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T03_01_scan_test_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
// int fcount=rdi.id("a").getFailCount("SDO");
//
// ARRAY_LL FailCycles = rdi.id("a").getFailCyc("SDO");
//
// cout << "FailCycles=" << FailCycles <<endl;
// FuncPrint("Fail Count SDO", fcount);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T03_01_scan_test", T03_01_scan_test);
|
generate cpp file from given test case python file
|
#############################################################################################################
# Description: IDDQ test
# Preamble: T03_10_scan_entry, T03_11_scan_reset
#############################################################################################################
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
cmt('Execute the IDDQ pattern file: T03_01_scan_test_V1.stil')
cmt('After each IDDQ vector n in range 01..29, indicated in the pattern file with "iddq capture", execute following sequence')
# ---sequence start---
dly(10e-6)
gac('IDDQ_VDD_LV_n', 'VDD', i_range=100e-6)
gac('IDDQ_VDDIO_LV_n', 'VDDIO', i_range=10e-6)
gac('IDDQ_VDDD_DC_LV_n', 'INT1', i_range=1e-3)
cmt('Apply a high voltage supply INT1=1.68V for 1 ms')
sav('INT1', 1.68, v_range=4.0, i_comp=1e-3) # TODO: stress voltage TBD
dly(1e-3)
sav('INT1', 1.1, v_range=4.0, i_comp=1e-3) # Change supply voltage here in char flow
dly(10e-6)
gac('IDDQ_VDD_HV_n', 'VDD', i_range=100e-6)
gac('IDDQ_VDDIO_HV_n', 'VDDIO', i_range=10e-6)
gac('IDDQ_VDDD_DC_HV_n', 'INT1', i_range=1e-3)
cmt('Calculate DELTA_IDDQ_VDD_n = IDDQ_VDD_HV_n - IDDQ_VDD_LV_n')
cmt('Calculate DELTA_IDDQ_VDDIO_n = IDDQ_VDDIO_HV_n - IDDQ_VDDIO_LV_n')
cmt('Calculate DELTA_IDDQ_VDDD_DC_n = IDDQ_VDDD_DC_HV_n - IDDQ_VDDD_DC_LV_n')
# ---sequence end---
cmt('This test item is a functional fail if any of the compare vectors in the IDDQ patttern fails')
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T03_02_IDDQ_test: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double IDDQ_VDD_LV[xNSitES][30];
static double IDDQ_VDDIO_LV[xNSitES][30];
static double IDDQ_VDDD_DC_LV[xNSitES][30];
static double IDDQ_VDD_HV[xNSitES][30];
static double IDDQ_VDDIO_HV[xNSitES][30];
static double IDDQ_VDDD_DC_HV[xNSitES][30];
static double DELTA_IDDQ_VDD[xNSitES][30];
static double DELTA_IDDQ_VDDIO[xNSitES][30];
static double DELTA_IDDQ_VDDD_DC[xNSitES][30];
const int NUM_STEPS = 30;
RDI_INIT();
double d_V_VDD, d_V_VDDIO, d_V_INT1;
const double stress_voltage = 1.68; // V
ON_FIRST_INVOCATION_BEGIN();
GET_TESTSUITE_NAME(test_name);
d_V_VDD = Primary.getLevelSpec().getSpecValue("VDD");
d_V_VDDIO = Primary.getLevelSpec().getSpecValue("VDDIO");
d_V_INT1 = Primary.getLevelSpec().getSpecValue("INT1");
i_comment_line0 = search_comment_line(s_label_name,"IddqTestPoint"); //key word: "IddqTestPoint"
print_key_comment(s_label_name, i_comment_line0, printFlag);
rdi.enableOre(oreFlag);
rdi.oreFile("./ORE_Files/rdi_ore_T03_02_IDDQ_TEST.xml");
RDI_BEGIN(mode);
rdi.burstId("burst_id1");
rdi.dc("t0302_iddq_test_ID").label(s_label_name).cont();
for(int i=0;i<NUM_STEPS ;i++)
{
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("VDD").vForce(d_V_VDD).iRange(10 uA).iMeas().measWait(1 ms).valueMode(TA::BADC).average(64).cont();//IDDQ_VDD_LV
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("VDDIO").vForce(d_V_VDDIO).iRange(10 uA).iMeas().measWait(1 ms).valueMode(TA::BADC).average(256).postWait(1.2 ms).cont();//IDDQ_VDDIO_LV
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("INT1").vForce(d_V_INT1).iRange(0.1 mA).iMeas().measWait(1 ms).valueMode(TA::BADC).average(64).cont();//IDDQ_VDDD_DC_LV
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("INT1").vForce(stress_voltage).iRange(40 mA).postWait(1 ms).cont();
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("INT1").vForce(d_V_INT1).iRange(40 mA).postWait(10 us).cont();//1.3V.cont();
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("VDD").vForce(d_V_VDD).iRange(10 uA).iMeas().measWait(1 ms).valueMode(TA::BADC).average(64).cont();//IDDQ_VDD_HV
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("VDDIO").vForce(d_V_VDDIO).iRange(10 uA).iMeas().measWait(1 ms).valueMode(TA::BADC).average(256).postWait(1.2 ms).cont();//IDDQ_VDDIO_HV
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("INT1").vForce(d_V_INT1).iMeas().iRange(0.1 mA).measWait(1 ms).valueMode(TA::BADC).average(64).cont();//IDDQ_VDDD_DC_HV
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("VDD").vForce(d_V_VDD V).iRange(40 mA).cont();
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("VDDIO").vForce(d_V_VDDIO V).iRange(40 mA).cont();
rdi.dc("t0302_iddq_test_ID").insertSub(i_comment_line0[i]).pin("INT1").vForce(d_V_INT1 V).iRange(40 mA).cont();
}
rdi.dc("t0302_iddq_test_ID").execute();
// rdi.hwRelay().pin("INT1").setOff("ALL").execute();
RDI_END();
rdi.util().pin("K4").setOff().execute();
// rdi.dc().pin("VDD").vForce(3 V).execute();
ON_FIRST_INVOCATION_END();
int Func_result = /*rdi.id("burst_id").getBurstPassFail() */ rdi.id("burst_id1").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
ARRAY_D JSUB_results_VDD;
JSUB_results_VDD = rdi.id("t0302_iddq_test_ID").getMultiValue("VDD");
ARRAY_D JSUB_results_VDDIO;
JSUB_results_VDDIO = rdi.id("t0302_iddq_test_ID").getMultiValue("VDDIO");
ARRAY_D JSUB_results_INT1;
JSUB_results_INT1 = rdi.id("t0302_iddq_test_ID").getMultiValue("INT1");
for (int i=0; i<NUM_STEPS; i++)
{
IDDQ_VDD_LV[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_VDD[i*2];
IDDQ_VDD_HV[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_VDD[i*2+1];
IDDQ_VDDIO_LV[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_VDDIO[i*2];
IDDQ_VDDIO_HV[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_VDDIO[i*2+1];
IDDQ_VDDD_DC_LV[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_INT1[i*2];
IDDQ_VDDD_DC_HV[CURRENT_SITE_NUMBER()-1][i] = JSUB_results_INT1[i*2+1];
DELTA_IDDQ_VDD[CURRENT_SITE_NUMBER()-1][i] = IDDQ_VDD_LV[CURRENT_SITE_NUMBER()-1][i] - IDDQ_VDD_HV[CURRENT_SITE_NUMBER()-1][i];
DELTA_IDDQ_VDDIO[CURRENT_SITE_NUMBER()-1][i] = IDDQ_VDDIO_LV[CURRENT_SITE_NUMBER()-1][i] - IDDQ_VDDIO_HV[CURRENT_SITE_NUMBER()-1][i];
DELTA_IDDQ_VDDD_DC[CURRENT_SITE_NUMBER()-1][i] = IDDQ_VDDD_DC_LV[CURRENT_SITE_NUMBER()-1][i] - IDDQ_VDDD_DC_HV[CURRENT_SITE_NUMBER()-1][i];
}
for (int i=0; i<NUM_STEPS; i++)
{
FuncPrint("IDDQ_VDD_LV_"+rdi.itos(i), IDDQ_VDD_LV[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("IDDQ_VDD_HV_"+rdi.itos(i), IDDQ_VDD_HV[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i=0; i<NUM_STEPS; i++)
{
FuncPrint("IDDQ_VDDIO_LV_"+rdi.itos(i+1), IDDQ_VDDIO_LV[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("IDDQ_VDDIO_HV_"+rdi.itos(i+1), IDDQ_VDDIO_HV[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i=0; i<NUM_STEPS; i++)
{
FuncPrint("IDDQ_VDDD_DC_LV_"+rdi.itos(i+1), IDDQ_VDDD_DC_LV[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("IDDQ_VDDD_DC_HV_"+rdi.itos(i+1), IDDQ_VDDD_DC_HV[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i=0; i<NUM_STEPS; i++)
{
FuncPrint("DELTA_IDDQ_VDD_"+rdi.itos(i+1), DELTA_IDDQ_VDD[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("DELTA_IDDQ_VDDIO_"+rdi.itos(i+1), DELTA_IDDQ_VDDIO[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("DELTA_IDDQ_VDDD_DC_"+rdi.itos(i+1), DELTA_IDDQ_VDDD_DC[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i=0; i<10; i++)
{
TestLog("IDDQ_VDD_LV_0"+rdi.itos(i), IDDQ_VDD_LV[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDDIO_LV_0"+rdi.itos(i), IDDQ_VDDIO_LV[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDDD_DC_LV_0"+rdi.itos(i), IDDQ_VDDD_DC_LV[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDD_DELTA_0"+rdi.itos(i), DELTA_IDDQ_VDD[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDDIO_DELTA_0"+rdi.itos(i), DELTA_IDDQ_VDDIO[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDDD_DC_DELTA_0"+rdi.itos(i), DELTA_IDDQ_VDDD_DC[CURRENT_SITE_NUMBER()-1][i]);
}
for (int i=10; i<NUM_STEPS; i++)
{
TestLog("IDDQ_VDD_LV_"+rdi.itos(i), IDDQ_VDD_LV[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDDIO_LV_"+rdi.itos(i), IDDQ_VDDIO_LV[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDDD_DC_LV_"+rdi.itos(i), IDDQ_VDDD_DC_LV[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDD_DELTA_"+rdi.itos(i), DELTA_IDDQ_VDD[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDDIO_DELTA_"+rdi.itos(i), DELTA_IDDQ_VDDIO[CURRENT_SITE_NUMBER()-1][i]);
TestLog("IDDQ_VDDD_DC_DELTA_"+rdi.itos(i), DELTA_IDDQ_VDDD_DC[CURRENT_SITE_NUMBER()-1][i]);
}
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T03_02_IDDQ_test", T03_02_IDDQ_test);
|
generate cpp file from given test case python file
|
#############################################################################################################
# Description: transitional SCAN test
# Preamble: T03_10_scan_entry, T03_11_scan_reset
#############################################################################################################
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
cmt('Execute the scan pattern file: T03_03_scan_test_transitional_V1.stil')
cmt('The pattern timing is included in this file')
cmt('This test item is a functional fail if any of the compare vectors in the scan patttern fails')
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: JSH5SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T03_03_scan_test_transitional: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
// Auto_Code_Variable_define
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T03_03_scan_test_transitional_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
// Auto_Code_Execution_Part
ON_FIRST_INVOCATION_END();
// Auto_Code_Retrieve_Data
int Func_result = rdi.id("T03_03_scan_test_transitional_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
// Auto_Code_Judge_and_log
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T03_03_scan_test_transitional", T03_03_scan_test_transitional);
|
generate cpp file from given test case python file
|
from test_sub_functions import *
CRC = get_rom_crc()
cmt('Version info: $Revision: 3 $ $Author: rio1rt $ $Date: 2024/06/11 10:33:47 GMT $')
# Setup prerequisites for MBIST
wac('EXT_MODE',0xc00d) # Switch to PMU register page
wcb('force_ds_pwr_on', 0x1) # Force DS power
wac('EXT_MODE',0xc000) # Switch to USR register page
wcb('mem_conf_ram', 0x0) # Assign 4kB RAM to MCU
# Configure interrupt
wac('IO_INT_CTRL', 0x0005) # Enable INT1 as output and active high
wac('INT_MAP_MCU', 0x4000) # Map command execution interrupt to INT1
wac('INT_CONF', 0x0001) # Use latched interrupt mode for INT1
# Execute MBIST FW
wr('MCU_GP_1', 0x007b) # MCU boot ASIC test; select MBIST
wr('MCU_GP_STATUS', 0x0001) # Sync GP register
wcb('mcu_mode', 0x3) # Power on MCU
dly(2e-3)
rac('MCU_GP_0', 0x0003, 0x0003) # Check MBIST is running
ras('MCU_GP_0_WITHINMBIST','MCU_GP_0') # log real value
calc('FEAT_ENG_STATE_WITHINMBIST', 'MCU_GP_0_WITHINMBIST', '&', '0x0003')
log('FEAT_ENG_STATE_WITHINMBIST') # Expect 0x3
dly(120e-3)
# Check MBIST result
bc('INT1', 1) # Check FW ready interrupt
cmt('TOI, please log INT1 status as STATUS_INT1, set function to fail if not logic one')
log('STATUS_INT1') # Expect 0x1
rac('MCU_GP_0', 0x017B) # Check MBIST test result
ras('MCU_GP_0_AFTERMBIST','MCU_GP_0') # log real value, expect 0x017B
log('MCU_GP_0_AFTERMBIST')
cmt(f'Reading ROM-CRC: 0x{CRC:04X}')
rac('MCU_SW_STATUS3', CRC) # Check ROM CRC
ras('ROM_CRC_AFTERMBIST','MCU_SW_STATUS3') # log real value
log('ROM_CRC_AFTERMBIST') # Expect CRC
# Clean-up
wcb('mcu_mode', 0x0) # Power off MCU
wac('IO_INT_CTRL', 0x0000) # Reset IO configuration
wac('INT_MAP_MCU', 0x0000) # Reset interrupt mapping
wac('INT_CONF', 0x0000) # Reset interrupt configuration
wcb('mem_conf_ram', 0x2) # Set RAM config to default
wac('EXT_MODE',0xc00d) # Switch to PMU register page
wcb('force_ds_pwr_on', 0x0) # Disable DS power force
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T03_05_MBIST_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
static int MCU_GP_0_WITHINMBIST[xNSitES];
static int MCU_GP_0_AFTERMBIST[xNSitES];
static int ROM_CRC_AFTERMBIST[xNSitES];
static int FEAT_ENG_STATE_WITHINMBIST[xNSitES];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T03_05_MBIST_V2_PAT_id");
rdi.digCap("T03_05_MBIST_V2_Digcap_id").label(s_label_name).pin("SDO").capMode(TA::SER).samples(16*3).bitPerWord(16).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
ARRAY_I Vec=rdi.id("T03_05_MBIST_V2_Digcap_id").getVector();
MCU_GP_0_WITHINMBIST[CURRENT_SITE_NUMBER()-1] = reverse_ras_result(Vec[0]);
MCU_GP_0_AFTERMBIST[CURRENT_SITE_NUMBER()-1] = reverse_ras_result(Vec[1]);
ROM_CRC_AFTERMBIST[CURRENT_SITE_NUMBER()-1] = reverse_ras_result(Vec[2]);
FEAT_ENG_STATE_WITHINMBIST[CURRENT_SITE_NUMBER()-1] = MCU_GP_0_WITHINMBIST[CURRENT_SITE_NUMBER()-1] & 0x0003;
int Func_result = rdi.id("T03_05_MBIST_V2_PAT_id").getBurstPassFail();
int STATUS_INT1 = rdi.getBurstPassFail("INT1");
FuncPrint("Func_result", Func_result);
FuncPrint("FEAT_ENG_STATE_WITHINMBIST", FEAT_ENG_STATE_WITHINMBIST[CURRENT_SITE_NUMBER()-1]);
FuncPrint("MCU_GP_0_AFTERMBIST", MCU_GP_0_AFTERMBIST[CURRENT_SITE_NUMBER()-1]);
FuncPrint("ROM_CRC_AFTERMBIST", ROM_CRC_AFTERMBIST[CURRENT_SITE_NUMBER()-1]);
FuncPrint("STATUS_INT1", STATUS_INT1);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("FEAT_ENG_STATE_WITHINMBIST", FEAT_ENG_STATE_WITHINMBIST[CURRENT_SITE_NUMBER()-1]);
TestLog("MCU_GP_0_AFTERMBIST", MCU_GP_0_AFTERMBIST[CURRENT_SITE_NUMBER()-1]);
TestLog("ROM_CRC_AFTERMBIST", ROM_CRC_AFTERMBIST[CURRENT_SITE_NUMBER()-1]);
TestLog("STATUS_INT1", STATUS_INT1);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T03_05_MBIST_V2", T03_05_MBIST_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 2 $ $Author: laj1mu23 $ $Date: 2024/03/25 21:19:50 GMT $')
wac('EXT_MODE', 0xc000) # Switch to USR register page
rac('REV_ID', 0x0000, 0x00ff) # Read and check revision id
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T03_08_check_revision_ID_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T03_08_check_revision_ID_V2_PAT_id");
// for (int i=0; i<100; i++)
// {
rdi.func().label(s_label_name).execute();
// }
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T03_08_check_revision_ID_V2_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T03_08_check_revision_ID_V2", T03_08_check_revision_ID_V2);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: bai430aa_rel/1 $ $Author: hmf1rt $ $Date: 2024/07/18 13:22:20 GMT $')
wr('CMD', 0xBB3A) # 1st command for enabling the extended mode
wr('CMD', 0x2C62) # 2nd command for enabling the extended mode
wr('CMD', 0xA576) # 1st command for enabling the super privilege mode
wr('CMD', 0x34D6) # 2nd command for enabling the super privilege mode
dly(10e-6)
dly(100e-6)
sav('INT1', 1.1) # Apply a voltage of 1.1V on pad INT1 (VDDD_DC/DS)
sav('OCSB', 1.1) # Apply a voltage of 1.1V on pad OCSB (VDDD_MEM)
dly(100e-6)
bw('ASCX', 0) # Pre-condition inputs: scan_clk = Low
bw('ASDX', 0) # Pre-condition inputs: scan_in2 = Low
wr('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('ANA_TEST_PWR', 0x0002) # Bypass VDDD_DC to external pad
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wr('TEST_SCAN', 0x0006) # Enable ext supply for scan; set compressed mode
dly(100e-6)
wr('TEST_SCAN', 0x000e) # Enter compressed scan mode
dly(10e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T03_09_scan_entry_compressed_V1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double v_INT1, v_OCSB;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
v_INT1 = Primary.getLevelSpec().getSpecValue("INT1");
v_OCSB = Primary.getLevelSpec().getSpecValue("OCSB");
rdi.util().pin("K4").setOn().execute();
RDI_BEGIN(mode);
rdi.burstId("T03_09_scan_entry_compressed_V1_PAT_id");
rdi.dc("T03_09_scan_entry_compressed_V1DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("INT1").vForce(v_INT1)
.insertSub(i_comment_line0[0]).pin("OCSB").vForce(v_OCSB)
.execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T03_09_scan_entry_compressed_V1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T03_09_scan_entry_compressed_V1", T03_09_scan_entry_compressed_V1);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 4 $ $Author: hmf1rt $ $Date: 2024/06/12 11:58:00 GMT $')
wr('CMD', 0xBB3A) # 1st command for enabling the extended mode
wr('CMD', 0x2C62) # 2nd command for enabling the extended mode
wr('CMD', 0xA576) # 1st command for enabling the super privilege mode
wr('CMD', 0x34D6) # 2nd command for enabling the super privilege mode
dly(10e-6)
dly(100e-6)
sav('INT1', 1.1) # Apply a voltage of 1.1V on pad INT1 (VDDD_DC/DS)
sav('OCSB', 1.1) # Apply a voltage of 1.1V on pad OCSB (VDDD_MEM)
dly(100e-6)
bw('ASCX', 0) # Pre-condition inputs: scan_clk = Low
bw('ASDX', 0) # Pre-condition inputs: scan_in2 = Low
wr('EXT_MODE', 0xc00d) # Switch to ANA register page
wac('ANA_TEST_PWR', 0x0002) # Bypass VDDD_DC to external pad
wac('EXT_MODE', 0xc00f) # Switch to TST register page
wr('TEST_SCAN', 0x0002) # Enable ext supply for scan mode
dly(100e-6)
wr('TEST_SCAN', 0x000a) # Enter scan mode
dly(10e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T03_10_scan_entry_V3: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
vector<int> i_comment_line0;
static double v_INT1, v_OCSB;
// Auto_Code_Variable_define
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
i_comment_line0 = search_comment_line(s_label_name);
print_key_comment(s_label_name, i_comment_line0, printFlag);
v_INT1 = Primary.getLevelSpec().getSpecValue("INT1");
v_OCSB = Primary.getLevelSpec().getSpecValue("OCSB");
// rdi.util().pin("K4").setOn().execute();
// rdi.util().pin("K8").setOn().execute();
// rdi.dc().pin("INT1_AVI64").vForce(0.8).iClamp(2 mA).iMeasRange(10 mA).execute();
RDI_BEGIN(mode);
rdi.burstId("T03_10_scan_entry_V3_PAT_id");
rdi.dc("T03_10_scan_entry_V3DC_id0").label(s_label_name)
.insertSub(i_comment_line0[0]).pin("INT1").vForce(v_INT1)
.insertSub(i_comment_line0[0]).pin("OCSB").vForce(v_OCSB)
.execute();
RDI_END();
// Auto_Code_Execution_Part
ON_FIRST_INVOCATION_END();
// Auto_Code_Retrieve_Data
int Func_result = rdi.id("T03_10_scan_entry_V3_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
// Auto_Code_Judge_and_log
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T03_10_scan_entry_V3", T03_10_scan_entry_V3);
|
generate cpp file from given test case python file
|
cmt('Version info: $Revision: 1 $ $Author: hmf1rt $ $Date: 2024/03/13 13:36:52 GMT $')
# Execute scan reset sequence
dly(5e-6)
bw('CSB', 0)
bw('SCX', 1)
dly(5e-6)
bw('SCX', 0)
dly(5e-6)
bw('SCX', 1)
dly(5e-6)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T03_11_scan_reset_V1: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T03_11_scan_reset_V1_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T03_11_scan_reset_V1_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T03_11_scan_reset_V1", T03_11_scan_reset_V1);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: SPI4 communication at max speed 10 MHz
# - Entry condition STC_ACC
# - Execute single write, single read, burst write, burst read
#############################################################################################################
cmt('Version info: $Revision: 4 $ $Author: luz3sgh $ $Date: 2024/05/06 05:53:19 GMT $')
cmt('Use signal and timing conventions compliant with SPI4 mode 0')
cmt('Use the following parameters: F_sck = 10.0 MHz')
wac('EXT_MODE', 0xc007) # Switch to MCU register page
# single write single read
wr('MCU_SW_STATUS0', 0x55aa) # Write signature to register
rac('MCU_SW_STATUS0', 0x55aa) # Read signature from register
wr('MCU_SW_STATUS1', 0x81cc) # Write signature to register
rac('MCU_SW_STATUS1', 0x81cc) # Read signature from register
wr('MCU_SW_STATUS2', 0xf00f) # Write signature to register
rac('MCU_SW_STATUS2', 0xf00f) # Read signature from register
wr('MCU_SW_STATUS3', 0xaa55) # Write signature to register
rac('MCU_SW_STATUS3', 0xaa55) # Read signature from register
# burst read
brac('MCU_SW_STATUS0', [0x55aa,0x81cc,0xf00f,0xaa55]) # Burst read and compare
# burst write burst read
bwr('MCU_SW_STATUS0', [0xaa55,0xcc81,0x0ff0,0x55aa]) # Burst write
brac('MCU_SW_STATUS0', [0xaa55,0xcc81,0x0ff0,0x55aa]) # Burst read and compare
# register reset
wac('MCU_SW_STATUS0', 0x0000) # Reset register value
wac('MCU_SW_STATUS1', 0x0000) # Reset register value
wac('MCU_SW_STATUS2', 0x0000) # Reset register value
wac('MCU_SW_STATUS3', 0x0000) # Reset register value
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T04_01_SPI4_test_V4: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T04_01_SPI4_test_V4_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T04_01_SPI4_test_V4_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T04_01_SPI4_test_V4", T04_01_SPI4_test_V4);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description:
# - SPI4 mode 0, 10.0MHz
#############################################################################################################
cmt('Version info: $Revision: 2 $ $Author: luz3sgh $ $Date: 2024/05/06 05:53:19 GMT $')
def register_set():
wac('MCU_SW_STATUS0', 0xaa55) # Write signature to register
wac('MCU_SW_STATUS1', 0x82cc) # Write signature to register
wac('MCU_SW_STATUS2', 0xd0ee) # Write signature to register
wac('MCU_SW_STATUS3', 0xf00f) # Write signature to register
brac('MCU_SW_STATUS0', [0xaa55, 0x82cc, 0xd0ee, 0xf00f]) # Burst read access and compare
wac('MCU_SW_STATUS0', 0x0f01) # Write signature to register
wac('MCU_SW_STATUS1', 0x1800) # Write signature to register
brac('MCU_SW_STATUS0', [0x0f01, 0x1800])# Burst read access and compare
def register_reset():
wac('MCU_SW_STATUS0', 0x0000) # Write reset to register
wac('MCU_SW_STATUS1', 0x0000) # Write reset to register
wac('MCU_SW_STATUS2', 0x0000) # Write reset to register
wac('MCU_SW_STATUS3', 0x0000) # Write reset to register
wac('EXT_MODE', 0xc007) # Switch to MCU register page
# -- CSB Setup Time SPI4 mode 0 --
# Test CSB Setup Time in SPI4 mode 0 (CPOL = 0 and CPHA = 0)
# Use signal and timing conventions compliant with SPI4 mode 0 according test spec
# Execute the 2 sequences "register_reset" + "register_set"
# If pattern pass: In "register_set" shift all falling edges of CSB signal to the right
# relative to SCX rising edges in 1 ns steps and repeat "register_reset"+"register_set"
# If pattern fail: Record the time T_SPI4_SETUP_CSB_M0 at which "register_set" passed
# for the last time
cmt('Start sequence "register_reset"')
register_reset()
cmt('Stop sequence "register_reset"')
cmt('Start sequence "register_set"')
register_set()
cmt('Stop sequence "register_set"')
dly(100e-6)
# -- CSB Hold Time SPI4 mode 0 --
# Test CSB Hold Time in SPI4 mode 0 (CPOL = 0 and CPHA = 0)
# Use signal and timing conventions compliant with SPI4 mode 0 according test spec
# Execute the 2 sequences "register_reset" + "register_set"
# If pattern pass: In "register_set" shift all rising edges of CSB signal to the left
# relative to SCX rising edges in 1 ns steps and repeat "register_reset"+"register_set"
# If pattern fail: Record the time T_SPI4_HOLD_CSB_M0 at which "register_set" passed
# for the last time
cmt('Start sequence "register_reset"')
register_reset()
cmt('Stop sequence "register_reset"')
cmt('Start sequence "register_set"')
register_set()
cmt('Stop sequence "register_set"')
dly(100e-6)
# -- SDX Setup Time SPI4 mode 0 --
# Test SDX Setup Time in SPI4 mode 0 (CPOL = 0 and CPHA = 0)
# Use signal and timing conventions compliant with SPI4 mode 0 according test spec
# Execute the 2 sequences "register_reset" + "register_set"
# If pattern pass: In "register_set" shift all edges of SDX signal to the right
# relative to SCX edges in 1 ns steps and repeat "register_reset"+"register_set"
# If pattern fail: Record the time T_SPI4_SETUP_SDX_M0 at which "register_set" passed
# for the last time
cmt('Start sequence "register_reset"')
register_reset()
cmt('Stop sequence "register_reset"')
cmt('Start sequence "register_set"')
register_set()
cmt('Stop sequence "register_set"')
dly(100e-6)
# -- SDX Hold Time SPI4 mode 0 --
# Test SDX Hold Time in SPI4 mode 0 (CPOL = 0 and CPHA = 0)
# Use signal and timing conventions compliant with SPI4 mode 0 according test spec
# Execute the 2 sequences "register_reset" + "register_set"
# If pattern pass: In "register_set" shift all edges of SDX signal to the left
# relative to SCX edges in 1 ns steps and repeat "register_reset"+"register_set"
# If pattern fail: Record the time T_SPI4_HOLD_SDX_M0 at which "register_set" passed
# for the last time
cmt('Start sequence "register_reset"')
register_reset()
cmt('Stop sequence "register_reset"')
cmt('Start sequence "register_set"')
register_set()
cmt('Stop sequence "register_set"')
dly(100e-6)
# -- SDO Delay Time SPI4 mode 0 --
# Test SDO Delay Time in SPI4 mode 0 (CPOL = 0 and CPHA = 0)
# Use signal and timing conventions compliant with SPI4 mode 0 according test spec
# Set default SDO strobe point in ATE
# Execute the sequence "register_set"
# If pattern pass: In "register_set" shift all SDO strobe points to the left
# relative to SCX falling edges in 1 ns steps and repeat "register_set"
# If pattern fail: Record the time T_SPI4_DELAY_SDO_M0 at which "register_set" passed
# for the last time
cmt('Start sequence "register_set"')
register_set()
cmt('Stop sequence "register_set"')
dly(100e-6)
# -- SCX Frequency SPI4 mode 0 --
# Test SCX frequency in SPI4 mode 0 (CPOL = 0 and CPHA = 0)
# Use signal and timing conventions compliant with SPI4 mode 0 according test spec
# Execute the 2 sequences "register_reset" + "register_set"
# If pattern pass: In "register_set" decrease T_LOW and T_HIGH for signal SCX and the
# timing of signal SDX and the strobe points related to signal SDO by 1.0 ns each and
# repeat "register_reset"+"register_set"
# If pattern fail: Record the frequency F_SPI4_SCX_M0 = 1/(T_LOW + T_HIGH)
# at which "register_set" passed for the last time
cmt('Start sequence "register_reset"')
register_reset()
cmt('Stop sequence "register_reset"')
cmt('Start sequence "register_set"')
register_set()
cmt('Stop sequence "register_set"')
dly(100e-6)
# clean-up
wac('MCU_SW_STATUS0', 0x0000) # Write reset to register
wac('MCU_SW_STATUS1', 0x0000) # Write reset to register
wac('MCU_SW_STATUS2', 0x0000) # Write reset to register
wac('MCU_SW_STATUS3', 0x0000) # Write reset to register
|
#include "testmethod.hpp"
//for test method API interfaces (any system include should be added above this line)
#include "mapi.hpp"
#include "../Common.hpp"
//for MTP test method API interfaces
using namespace std;
/**
* Test method class.
*
* For each testsuite using this test method, one object of this
* class is created.
*/
class T04_02_SPI4_Char_M0: public testmethod::TestMethod {
protected:
int mSPI_mode; //M0 - M3
int mSPI3_flag; //0 for SPI4, 1 for SPI3
int i_funcRes[xNSitES];
double d_T_SETUP_CSB_M0[xNSitES];
double d_T_HOLD_CSB_M0[xNSitES];
double d_T_SETUP_SDI_M0[xNSitES];
double d_T_HOLD_SDI_M0[xNSitES];
double d_T_DELAY_SDO_M0[xNSitES];
double d_F_SCK_M0[xNSitES];
// double d_T_LOW_SCX_M0[xNSitES];
// double d_T_HIGH_SCX_M0[xNSitES];
double d_T_SCK_M0[xNSitES];
string mMOSIpin;
string mMISOpin;
/**
*Initialize the parameter interface to the testflow.
*This method is called just once after a testsuite is created.
*/
virtual void initialize()
{
//Add your initialization code here
//Note: Test Method API should not be used in this method!
addParameter("SPI_mode",
"int",
&mSPI_mode,
testmethod::TM_PARAMETER_INPUT)
.setDefault("0");
addParameter("SPI3_flag",
"int",
&mSPI3_flag,
testmethod::TM_PARAMETER_INPUT)
.setDefault("0");
addParameter("MOSIpin",
"string",
&mMOSIpin,
testmethod::TM_PARAMETER_INPUT)
.setDefault("SDX");
addParameter("MISOpin",
"string",
&mMISOpin,
testmethod::TM_PARAMETER_INPUT)
.setDefault("SDO");
}
/**
*This test is invoked per site.
*/
virtual void run()
{
string pat_name[2][4] = {{"T04_02_SPI4_Char_M0", "", "", "T04_12_SPI4_Char_M3"},
{"T04_04_SPI3_Char_M0", "", "", "T04_14_SPI3_Char_M3"}};
const string s_Label_Init = pat_name[mSPI3_flag][mSPI_mode]+"_Init";
const string s_Label_Set = pat_name[mSPI3_flag][mSPI_mode]+"_Set";
const string s_Label_Reset = pat_name[mSPI3_flag][mSPI_mode]+"_Reset";
static int i_func_results[xNSitES][8];
// int i_func_results[xNSitES][8];
static double d_TransitionTime1[xNSitES], d_TransitionTime2[xNSitES], d_TransitionTime3[xNSitES], d_TransitionTime4[xNSitES], d_TransitionTime5[xNSitES], d_TransitionTime6[xNSitES], d_TransitionTime7[xNSitES];
// static double d_TransitionTime1[xNSitES], d_TransitionTime2[xNSitES], d_TransitionTime3[xNSitES], d_TransitionTime4[xNSitES], d_TransitionTime5[xNSitES];
SEARCH_FUNC_TASK TASK_spec1, TASK_spec2, TASK_spec3, TASK_spec4, TASK_spec5, TASK_spec6, TASK_spec7, TASK_spec8;
int i_PassFail;
ON_FIRST_INVOCATION_BEGIN();
Func_Init_Var(i_funcRes, 0, xNSitES);
Func_Init_Var(d_T_SETUP_CSB_M0, -999.0, xNSitES);
Func_Init_Var(d_T_HOLD_CSB_M0, -999.0, xNSitES);
Func_Init_Var(d_T_SETUP_SDI_M0, -999.0, xNSitES);
Func_Init_Var(d_T_HOLD_SDI_M0, -999.0, xNSitES);
Func_Init_Var(d_T_DELAY_SDO_M0, -999.0, xNSitES);
Func_Init_Var(d_F_SCK_M0, -999.0, xNSitES);
// Func_Init_Var(d_T_LOW_SCX_M0, -999.0, xNSitES);
// Func_Init_Var(d_T_HIGH_SCX_M0, -999.0, xNSitES);
Func_Init_Var(d_T_SCK_M0, -999.0, xNSitES);
Func_Init_Var((int**)i_func_results, -999, xNSitES, 10);
Func_Init_Var(d_TransitionTime1, -999.0, xNSitES);
Func_Init_Var(d_TransitionTime2, -999.0, xNSitES);
Func_Init_Var(d_TransitionTime3, -999.0, xNSitES);
Func_Init_Var(d_TransitionTime4, -999.0, xNSitES);
Func_Init_Var(d_TransitionTime5, -999.0, xNSitES);
Func_Init_Var(d_TransitionTime6, -999.0, xNSitES);
Func_Init_Var(d_TransitionTime7, -999.0, xNSitES);
Primary.label(s_Label_Init);
FLUSH();
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_func_results[curSite][0] = GET_FUNCTIONAL_RESULT();
Func_Print(i_func_results[curSite][0], "i_func_results[0]");
FOR_EACH_SITE_END();
Primary.timing(TIMING_SPEC(44,1));
FLUSH(TM::APRM);
Primary.label(s_Label_Reset);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_func_results[curSite][1] = GET_FUNCTIONAL_RESULT();
Func_Print(i_func_results[curSite][1], "i_func_results[1]");
FOR_EACH_SITE_END();
//*************************CSB Setup Time SPI4 mode 0*************************
Primary.label(s_Label_Set);
FLUSH();
// TASK_spec1.pin("CSB").spec("delay1",TM::TIM).method(TM::Binary).start(0).stop(82).resolution(0.5);
TASK_spec1.pin("CSB").spec("delay1",TM::TIM).method(TM::Linear).start(0).stop(90).stepWidth(0.1);
TASK_spec1.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec1.getPassFail("CSB");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime1[curSite] = TASK_spec1.getPassValue("CSB");
d_T_SETUP_CSB_M0[curSite] = 50 - d_TransitionTime1[curSite]; //unit s
Func_Print(d_TransitionTime1[curSite], "Org TransitionTime1");
Func_Print(d_T_SETUP_CSB_M0[curSite], "d_T_SETUP_CSB_M0");
}
FOR_EACH_SITE_END();
//*************************CSB Hold Time SPI4 mode 0*************************
Primary.label(s_Label_Reset);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_func_results[curSite][2] = GET_FUNCTIONAL_RESULT();
Func_Print(i_func_results[curSite][2], "i_func_results[2]");
FOR_EACH_SITE_END();
Primary.label(s_Label_Set);
FLUSH();
// TASK_spec2.pin("CSB").spec("delay2",TM::TIM).method(TM::Binary).start(0).stop(-70).resolution(0.5);
TASK_spec2.pin("CSB").spec("delay2",TM::TIM).method(TM::Linear).start(0).stop(-90).stepWidth(0.1);
TASK_spec2.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec2.getPassFail("CSB");
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime2[curSite] = TASK_spec2.getPassValue("CSB");
d_T_HOLD_CSB_M0[curSite] = ( 50 + d_TransitionTime2[curSite]) ; //unit s
Func_Print(d_TransitionTime2[curSite], "Org TransitionTime2");
Func_Print(d_T_HOLD_CSB_M0[curSite], "d_T_HOLD_CSB_M0");
}
FOR_EACH_SITE_END();
//*************************SDI Setup Time SPI4 mode 0*************************
Primary.label(s_Label_Reset);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_func_results[curSite][3] = GET_FUNCTIONAL_RESULT();
Func_Print(i_func_results[curSite][3], "i_func_results[3]");
FOR_EACH_SITE_END();
Primary.label(s_Label_Set);
FLUSH();
// TASK_spec3.pin(mMOSIpin).spec("delay3",TM::TIM).method(TM::Binary).start(0).stop(82).resolution(0.5);
TASK_spec3.pin(mMOSIpin).spec("delay3",TM::TIM).method(TM::Linear).start(0).stop(80).stepWidth(0.1);
TASK_spec3.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec3.getPassFail(mMOSIpin);
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime3[curSite] = TASK_spec3.getPassValue(mMOSIpin);
d_T_SETUP_SDI_M0[curSite] = ( 50 - d_TransitionTime3[curSite]) ; //unit s
Func_Print(d_TransitionTime3[curSite], "Org TransitionTime3");
Func_Print(d_T_SETUP_SDI_M0[curSite], "d_T_SETUP_SDI_M0");
}
FOR_EACH_SITE_END();
//*************************SDI Hold Time SPI4 mode 0*************************
Primary.label(s_Label_Reset);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_func_results[curSite][4] = GET_FUNCTIONAL_RESULT();
Func_Print(i_func_results[curSite][4], "i_func_results[4]");
FOR_EACH_SITE_END();
Primary.label(s_Label_Set);
FLUSH();
// TASK_spec4.pin(mMOSIpin).spec("delay3",TM::TIM).method(TM::Binary).start(0).stop(-82).resolution(0.5);
TASK_spec4.pin(mMOSIpin).spec("delay3",TM::TIM).method(TM::Linear).start(0).stop(-90).stepWidth(0.1);
TASK_spec4.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec4.getPassFail(mMOSIpin);
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime4[curSite] = TASK_spec4.getPassValue(mMOSIpin);
d_T_HOLD_SDI_M0[curSite] = ( 50 + d_TransitionTime4[curSite]) ; //unit s
Func_Print(d_TransitionTime4[curSite], "Org TransitionTime4");
Func_Print(d_T_HOLD_SDI_M0[curSite], "d_T_HOLD_SDI_M0");
}
FOR_EACH_SITE_END();
//*************************SDO Delay Time SPI4 mode 0*************************
Primary.label(s_Label_Reset);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_func_results[curSite][5] = GET_FUNCTIONAL_RESULT();
Func_Print(i_func_results[curSite][5], "i_func_results[5]");
FOR_EACH_SITE_END();
// Primary.label(s_Label_Set_Sdo_Dly);
Primary.label(s_Label_Set);
FLUSH();
// TASK_spec5.pin(mMISOpin).spec("delay5",TM::TIM).method(TM::Binary).start(0).stop(-82).resolution(0.5);
TASK_spec5.pin(mMISOpin).spec("delay5",TM::TIM).method(TM::Linear).start(-80).stop(20).stepWidth(0.1);
TASK_spec5.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec5.getPassFail(mMISOpin);
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime5[curSite] = TASK_spec5.getPassValue(mMISOpin);
d_T_DELAY_SDO_M0[curSite] = (0.8*100 + d_TransitionTime5[curSite]) ; //unit s
Func_Print(d_TransitionTime5[curSite], "Org TransitionTime5");
Func_Print(d_T_DELAY_SDO_M0[curSite], "d_T_DELAY_SDO_M0");
}
FOR_EACH_SITE_END();
//*************************T_HIGH_SCK_MIN SPI4 mode 0*************************
// Primary.label(s_Label_Reset);
// FUNCTIONAL_TEST();
// FOR_EACH_SITE_BEGIN();
// i_func_results[curSite][6] = GET_FUNCTIONAL_RESULT();
// Func_Print(i_func_results[curSite][6], "i_func_results[6]");
// FOR_EACH_SITE_END();
//
// Primary.label(s_Label_Set);
//// Primary.label("T_10_25_SPI4_Timing_Char_M0_register_set_t_high");
// FLUSH();
//// TASK_spec6.spec("per_ns",TM::TIM).method(TM::Binary).start(20).stop(82).resolution(1);
// TASK_spec6.pin("SCX").spec("delay6",TM::TIM).method(TM::Linear).start(1).stop(40).stepWidth(1);
// TASK_spec6.execute();
//
// FOR_EACH_SITE_BEGIN();
// i_PassFail = TASK_spec6.getPassFail("SCX");
// //if find the transition point, get value
// if(i_PassFail)
// {
//
// d_TransitionTime6[curSite] = TASK_spec6.getPassValue("SCX");
// d_T_HIGH_SCX_M0[curSite] = (41 - d_TransitionTime6[curSite]) ; //unit s
//
// Func_Print(d_TransitionTime6[curSite], "Org TransitionTime6");
// Func_Print(d_T_HIGH_SCX_M0[curSite], "d_T_HIGH_SCX_M0");
//
//
// }
// FOR_EACH_SITE_END();
//*************************T_LOW_SCK_MIN SPI4 mode 0*************************
// Primary.label(s_Label_Reset);
// FUNCTIONAL_TEST();
// FOR_EACH_SITE_BEGIN();
// i_func_results[curSite][7] = GET_FUNCTIONAL_RESULT();
// Func_Print(i_func_results[curSite][7], "i_func_results[7]");
// FOR_EACH_SITE_END();
//
// Primary.label(s_Label_Set);
//// Primary.label("T_10_25_SPI4_Timing_Char_M0_register_set_t_low");
// FLUSH();
//// TASK_spec6.spec("per_ns",TM::TIM).method(TM::Binary).start(20).stop(82).resolution(1);
// TASK_spec7.pin("SCX").spec("delay6",TM::TIM).method(TM::Linear).start(-1).stop(-40).stepWidth(1);
// TASK_spec7.execute();
//
// FOR_EACH_SITE_BEGIN();
// i_PassFail = TASK_spec7.getPassFail("SCX");
// //if find the transition point, get value
// if(i_PassFail)
// {
//
// d_TransitionTime7[curSite] = TASK_spec7.getPassValue("SCX");
// d_T_LOW_SCX_M0[curSite] = (41 + d_TransitionTime7[curSite]) ; //unit s
//
// Func_Print(d_TransitionTime7[curSite], "Org TransitionTime7");
// Func_Print(d_T_LOW_SCX_M0[curSite], "d_T_LOW_SCX_M0");
//
//
// }
// FOR_EACH_SITE_END();
//*************************SCK Frequency SPI4 mode 0*************************
Primary.label(s_Label_Reset);
FUNCTIONAL_TEST();
FOR_EACH_SITE_BEGIN();
i_func_results[curSite][8] = GET_FUNCTIONAL_RESULT();
Func_Print(i_func_results[curSite][8], "i_func_results[8]");
FOR_EACH_SITE_END();
Primary.label(s_Label_Set);
Primary.timing(TIMING_SPEC(45,1));
FLUSH(TM::APRM);
// TASK_spec6.spec("per_ns",TM::TIM).method(TM::Binary).start(20).stop(82).resolution(1);
TASK_spec8.spec("f_scx",TM::TIM).method(TM::Linear).start(10).stop(90).stepWidth(1);
TASK_spec8.execute();
FOR_EACH_SITE_BEGIN();
i_PassFail = TASK_spec8.getPassFail();
//if find the transition point, get value
if(i_PassFail)
{
d_TransitionTime7[curSite] = TASK_spec8.getPassValue();
d_F_SCK_M0[curSite] = d_TransitionTime7[curSite]*1e6; //Hz
// d_F_SCK_M0[curSite] = 1000000000/TASK_spec8.getPassValue();
// d_T_SCK_M0[curSite] = TASK_spec8.getPassValue();
Func_Print(d_TransitionTime7[curSite], "Org TransitionTime7");
Func_Print(d_F_SCK_M0[curSite], "d_F_SCK_M0");
// Func_Print(d_T_SCK_M0[curSite], "d_T_SCK_M0");
}
FOR_EACH_SITE_END();
FOR_EACH_SITE_BEGIN();
i_funcRes[curSite] = i_func_results[curSite][0] & i_func_results[curSite][1] & i_func_results[curSite][2] &
i_func_results[curSite][3] & i_func_results[curSite][4] & i_func_results[curSite][5] &
i_func_results[curSite][8];
FOR_EACH_SITE_END();
ON_FIRST_INVOCATION_END();
string spi;
if (mSPI3_flag)
spi = "3";
else
spi = "4";
Func_Print(i_funcRes[curSite], "i_funcRes");
TestLog("FUNCTIONAL_TEST", i_funcRes[curSite]);
TestLog("T_SPI"+spi+"_SETUP_CSB_M"+rdi.itos(mSPI_mode), d_T_SETUP_CSB_M0[curSite]*1e-9);
TestLog("T_SPI"+spi+"_HOLD_CSB_M"+rdi.itos(mSPI_mode), d_T_HOLD_CSB_M0[curSite]*1e-9);
TestLog("T_SPI"+spi+"_SETUP_SDX_M"+rdi.itos(mSPI_mode), d_T_SETUP_SDI_M0[curSite]*1e-9);
TestLog("T_SPI"+spi+"_HOLD_SDX_M"+rdi.itos(mSPI_mode), d_T_HOLD_SDI_M0[curSite]*1e-9);
TestLog("T_SPI"+spi+"_DELAY_"+mMISOpin+"_M"+rdi.itos(mSPI_mode), d_T_DELAY_SDO_M0[curSite]*1e-9);
// TestLog("T_HIGH_SCX_SPI"+spi+"m0", d_T_HIGH_SCX_M0[curSite]*1e-9);
// TestLog("T_LOW_SCX_SPI"+spi+"m0", d_T_LOW_SCX_M0[curSite]*1e-9);
TestLog("F_SPI"+spi+"_SCX_M"+rdi.itos(mSPI_mode), d_F_SCK_M0[curSite]);
return;
}
/**
*This function will be invoked once the specified parameter's value is changed.
*@param parameterIdentifier
*/
virtual void postParameterChange(const string& parameterIdentifier)
{
//Add your code
//Note: Test Method API should not be used in this method!
return;
}
/**
*This function will be invoked once the Select Test Method Dialog is opened.
*/
virtual const string getComment() const
{
string comment = " please add your comment for this method.";
return comment;
}
};
REGISTER_TESTMETHOD("03_Char.T04_02_SPI4_Char_M0", T04_02_SPI4_Char_M0);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: SPI3 communication at max speed 10 MHz
# - Entry condition STC_ACC
# - Execute single write, single read, burst write, burst read
#############################################################################################################
cmt('Version info: $Revision: 4 $ $Author: luz3sgh $ $Date: 2024/05/06 06:30:36 GMT $')
cmt('Use signal and timing conventions compliant with SPI3 mode 0')
cmt('Use the following parameters: F_sck = 10.0 MHz')
wac('EXT_MODE', 0xc007) # Switch to MCU register page
# single write single read
wr('MCU_SW_STATUS0', 0x55aa) # Write signature to register
rac('MCU_SW_STATUS0', 0x55aa) # Read signature from register
wr('MCU_SW_STATUS1', 0x81cc) # Write signature to register
rac('MCU_SW_STATUS1', 0x81cc) # Read signature from register
wr('MCU_SW_STATUS2', 0xf00f) # Write signature to register
rac('MCU_SW_STATUS2', 0xf00f) # Read signature from register
wr('MCU_SW_STATUS3', 0xaa55) # Write signature to register
rac('MCU_SW_STATUS3', 0xaa55) # Read signature from register
# burst read
brac('MCU_SW_STATUS0', [0x55aa,0x81cc,0xf00f,0xaa55]) # Burst read and compare
# burst write burst read
bwr('MCU_SW_STATUS0', [0xaa55,0xcc81,0x0ff0,0x55aa]) # Burst write
brac('MCU_SW_STATUS0', [0xaa55,0xcc81,0x0ff0,0x55aa]) # Burst read and compare
# register reset
wac('MCU_SW_STATUS0', 0x0000) # Reset register value
wac('MCU_SW_STATUS1', 0x0000) # Reset register value
wac('MCU_SW_STATUS2', 0x0000) # Reset register value
wac('MCU_SW_STATUS3', 0x0000) # Reset register value
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T04_03_SPI3_test_V4: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
// vector<int> i_comment_line0;
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
// i_comment_line0 = search_comment_line(s_label_name);
// print_key_comment(s_label_name, i_comment_line0, printFlag);
RDI_BEGIN(mode);
rdi.burstId("T04_03_SPI3_test_V4_PAT_id");
rdi.func().label(s_label_name).execute();
RDI_END();
ON_FIRST_INVOCATION_END();
int Func_result = rdi.id("T04_03_SPI3_test_V4_PAT_id").getBurstPassFail();
FuncPrint("Func_result", Func_result);
TestLog("FUNCTIONAL_TEST", Func_result);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T04_03_SPI3_test_V4", T04_03_SPI3_test_V4);
|
generate cpp file from given test case python file
|
#############################################################################################################
# description: I2C delay trimming
# steps: 1.Enable I2C delay test
# 2.Measure SCX rise, fall delay refernce, within loop
# 3.Measure SCX rise, fall delay, within loop
# 4.Find best index
#############################################################################################################
cmt('Version info: $Revision: 3 $ $Author: luz3sgh $ $Date: 2024/05/20 08:10:02 GMT $')
wac('EXT_MODE',0xc00f) # Test PAGE
wac('TEST_I2C_DEL',0x0001) # Enable bit for I2C delay test
wac('EXT_MODE',0xc009) # IO PAGE
for n in range(8):
cmt(f'Set I2C delay trimming to {n} in given range')
wac('OCP_MASK', 0xe000) # Mask setting for IO_PAD_TRM<15:13>
wr('IO_PAD_TRM', n*2**13) # Set I2C delay trimming
rac('IO_PAD_TRM', n*2**13, 0xe000) # Check register setting
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
wac('EXT_MODE', 0xc00f) # Switch to TST register page
# Reference measurement SCX RISE
wr('DTB3', 0x002c) # scl_dl_topad on both ASDX & OOSDO
dly(2e-6)
bw('CSB', 0)
bw('SCX', 0)
dly(2e-6)
bw('SCX', 1)
cmt('Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF')
cmt('Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF')
dly(1e-6)
cmt(f'Calc T_DLY_RISE_REF_{n} = T_RISE_ASDX_REF - T_RISE_OSDO_REF')
# Reference measurement SCX FALL
dly(2e-6)
bw('SCX', 0)
cmt('Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF')
cmt('Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF')
dly(1e-6)
cmt(f'Calc T_DLY_FALL_REF_{n} = T_FALL_ASDX_REF - T_FALL_OSDO_REF')
bw('CSB', 1)
dly(2e-6)
# Delay measurement SCX RISE
wr('DTB3', 0x0027) # sck_dl_frompad@ASDX, sck_dl_topad@OSDO
dly(2e-6)
bw('CSB', 0)
bw('SCX', 0)
dly(2e-6)
bw('SCX', 1)
cmt('Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS')
cmt('Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS')
dly(1e-6)
cmt(f'Calc T_DLY_RISE_MEAS_{n} = T_RISE_ASDX_MEAS - T_RISE_OSDO_MEAS')
log(f'T_DLY_RISE_MEAS_{n}')
# Delay measurement SCX FALL
dly(2e-6)
bw('SCX', 0)
cmt('Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS')
cmt('Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS')
dly(1e-6)
cmt(f'Calc T_DLY_FALL_MEAS_{n} = T_FALL_ASDX_MEAS - T_FALL_OSDO_MEAS')
log(f'T_DLY_FALL_MEAS_{n}')
bw('CSB', 1)
dly(2e-6)
wac('DTB3', 0x0000) # Disable DTB3X
cmt(f'Caculate T_DLY_RISE_{n} = T_DLY_RISE_MEAS_{n} - T_DLY_RISE_REF_{n}')
cmt(f'Caculate T_DLY_FALL_{n} = T_DLY_FALL_MEAS_{n} - T_DLY_FALL_REF_{n}')
wac('EXT_MODE', 0xc009) # !!!Back to IO page for next loop
cmt('Select index n = N_OPT_I2C with T_DLY_RISE_N_OPT_I2C <= target value')
cmt('and with min. difference of T_DLY_RISE_N_OPT_I2C to target value')
calc('N_OPT_I2C',2) # Warning, placeholder !! Only for simulation
log('T_DLY_RISE_N_OPT_I2C')
log('N_OPT_I2C')
calc('N_IO_PAD_TRM_WR','N_OPT_I2C','<<',13)
wac('OCP_MASK', 0xe000) # Mask setting for IO_PAD_TRM<15:13>
wri('IO_PAD_TRM', 'N_IO_PAD_TRM_WR')
ras('N_IO_PAD_TRM_RD','IO_PAD_TRM')
calc('N_OPT_I2C_RD','N_IO_PAD_TRM_RD','>>',13)
cmt('The test item is a functional fail if (N_OPT_I2C_RD != N_OPT_I2C')
wr('OCP_MASK', 0x0000) # Reset masking register
rac('OCP_MASK', 0xffff) # Check masking register reset
# Clean
wac('EXT_MODE',0xc00f) # Test PAGE
wac('TEST_I2C_DEL',0x0000)
|
/*****************************************************
* Description
* 1.
* 2.
* Change History
* First Editor: GON3SGH
*
*****************************************************/
#include "testmethod.hpp"
#include "mapi.hpp"
#include "../Common.hpp"
using namespace std;
class T04_06_i2c_delay_trimming_V2: public testmethod::TestMethod {
protected:
virtual void initialize()
{
}
virtual void run()
{
static STRING test_name;
const string s_label_name = Primary.getLabel();
INT split_pat_flag;
GET_USER_FLAG("split_pat_flag", &split_pat_flag);
vector<string> s_splited_pat_name;
const int split_count = 2; // Alarm:: split_count need manual confirm.
s_splited_pat_name.resize(split_count);
vector<int> i_comment_line[split_count];
static int N_IO_PAD_TRM_RD[xNSitES], N_OPT_I2C[xNSitES], N_IO_PAD_TRM_WR[xNSitES], N_OPT_I2C_RD[xNSitES];
// Auto_Code_Variable_define
ARRAY_LL N_IO_PAD_TRM_WR_rtv;
const int Wri_Bit_Length = 33;
const int Wri_Bit_Position = 31;
double main_port_period, ASDX_port_period, OSDO_port_period;
const int Cap_Cyc_Main_Port = 6;
const int Cap_Cyc_Offset = 0;
static double T_RISE_OSDO_REF[xNSitES][8], T_RISE_ASDX_REF[xNSitES][8], T_FALL_OSDO_REF[xNSitES][8], T_FALL_ASDX_REF[xNSitES][8];
static double T_RISE_OSDO_MEAS[xNSitES][8], T_RISE_ASDX_MEAS[xNSitES][8], T_FALL_OSDO_MEAS[xNSitES][8], T_FALL_ASDX_MEAS[xNSitES][8];
static double T_DLY_RISE_REF[xNSitES][8], T_DLY_FALL_REF[xNSitES][8], T_DLY_RISE_MEAS[xNSitES][8], T_DLY_FALL_MEAS[xNSitES][8];
static double T_DLY_RISE[xNSitES][8], T_DLY_FALL[xNSitES][8];
RDI_INIT();
ON_FIRST_INVOCATION_BEGIN();
rdi.enableOre(oreFlag);
rdi.oreFile("./ORE_Files/rdi_ore_T04_06_I2C_DELAY_TRIMMING.xml");
GET_TESTSUITE_NAME(test_name);
N_IO_PAD_TRM_WR_rtv.resize(xNSitES);
if (split_pat_flag)
{
split_pattern(s_label_name,"wri",split_pat_flag,s_splited_pat_name);
}
else
{
for (int i = 0; i<split_count; i++)
{
s_splited_pat_name[i] = s_label_name + "_part" + rdi.itos(i);
i_comment_line[i] = search_comment_line(s_splited_pat_name[i]);
print_key_comment(s_splited_pat_name[i], i_comment_line[i], printFlag);
}
// Set the period carefully, main port period must be integer multiple of the capture port.
main_port_period = Primary.getSpecification().getSpecValue("per_ns@Non_OSDO_ASDX_Port");
ASDX_port_period = Primary.getSpecification().getSpecValue("per_ns@ASDX_Port");
OSDO_port_period = Primary.getSpecification().getSpecValue("per_ns@OSDO_Port");
FuncPrint("main_port_period", main_port_period);
FuncPrint("ASDX_port_period", ASDX_port_period);
FuncPrint("OSDO_port_period", OSDO_port_period);
int Port_factor_ASDX = int(main_port_period / ASDX_port_period);
int Port_factor_OSDO = int(main_port_period / OSDO_port_period);
FuncPrint("Port_factor_ASDX", Port_factor_ASDX);
FuncPrint("Port_factor_OSDO", Port_factor_OSDO);
// key comment[0]is || TCMT 1478," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
// key comment[1]is || TCMT 1518," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
// key comment[2]is || TCMT 1693," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[3]is || TCMT 1733," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[4]is || TCMT 3060," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
// key comment[5]is || TCMT 3100," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
// key comment[6]is || TCMT 3275," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[7]is || TCMT 3315," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[8]is || TCMT 4642," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
// key comment[9]is || TCMT 4682," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
// key comment[10]is || TCMT 4857," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[11]is || TCMT 4897," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[12]is || TCMT 6224," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
// key comment[13]is || TCMT 6264," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
// key comment[14]is || TCMT 6439," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[15]is || TCMT 6479," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[16]is || TCMT 7806," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
// key comment[17]is || TCMT 7846," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
// key comment[18]is || TCMT 8021," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[19]is || TCMT 8061," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[20]is || TCMT 9388," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
// key comment[21]is || TCMT 9428," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
// key comment[22]is || TCMT 9603," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[23]is || TCMT 9643," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[24]is || TCMT 10970," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
// key comment[25]is || TCMT 11010," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
// key comment[26]is || TCMT 11185," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[27]is || TCMT 11225," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[28]is || TCMT 12552," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_REF} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_REF} {dly(1e-06, 0)}"
// key comment[29]is || TCMT 12592," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_REF} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_REF} {dly(1e-06, 0)}"
// key comment[30]is || TCMT 12767," {bw('SCX', 1)} {cmt: Wait for 0 to 1 transition on OSDO and record time T_RISE_OSDO_MEAS} {cmt: Wait for 0 to 1 transition on ASDX and record time T_RISE_ASDX_MEAS} {dly(1e-06, 0)}"
// key comment[31]is || TCMT 12807," {bw('SCX', 0)} {cmt: Wait for 1 to 0 transition on OSDO and record time T_FALL_OSDO_MEAS} {cmt: Wait for 1 to 0 transition on ASDX and record time T_FALL_ASDX_MEAS} {dly(1e-06, 0)}"
rdi.dc().pin("VDDIO").vForce(1.8 V).execute();
Primary.getLevelSpec().change("VDDIO",1.8);
FLUSH(TM::APRM);
RDI_BEGIN(mode);
rdi.burstId("T04_06_i2c_delay_trimming_V2_PAT_id0");
rdi.port("Non_OSDO_ASDX_Port").func().label(s_splited_pat_name[0]).execute();
rdi.port("ASDX_Port").waitCycle((i_comment_line[0][0]+Cap_Cyc_Offset)*Port_factor_ASDX);
for (int i = 0; i<32; i++)
{
rdi.port("ASDX_Port").digCap("Result_ASDX"+rdi.itos(i)).pin("ASDX").samples(8*Port_factor_ASDX*Cap_Cyc_Main_Port).bitPerWord(1).execute();
if (i!=31)
{
rdi.port("ASDX_Port").waitCycle((i_comment_line[0][i+1]-i_comment_line[0][i]-Cap_Cyc_Main_Port)*Port_factor_ASDX);
}
}
rdi.port("OSDO_Port").waitCycle((i_comment_line[0][0]+Cap_Cyc_Offset)*Port_factor_OSDO);
for (int i = 0; i<32; i++)
{
rdi.port("OSDO_Port").digCap("Result_OSDO"+rdi.itos(i)).pin("OSDO").samples(8*Port_factor_OSDO*Cap_Cyc_Main_Port).bitPerWord(1).execute();
if (i!=31)
{
rdi.port("OSDO_Port").waitCycle((i_comment_line[0][i+1]-i_comment_line[0][i]-Cap_Cyc_Main_Port)*Port_factor_OSDO);
}
}
RDI_END();
FOR_EACH_SITE_BEGIN();
ARRAY_I vec_RISE_REF, vec_FALL_REF, vec_RISE_MEAS, vec_FALL_MEAS;
for (int i = 0; i<8; i++)
{
vec_RISE_REF = rdi.id("Result_ASDX"+rdi.itos(i*4+0)).getVector("ASDX");
vec_FALL_REF = rdi.id("Result_ASDX"+rdi.itos(i*4+1)).getVector("ASDX");
vec_RISE_MEAS = rdi.id("Result_ASDX"+rdi.itos(i*4+2)).getVector("ASDX");
vec_FALL_MEAS = rdi.id("Result_ASDX"+rdi.itos(i*4+3)).getVector("ASDX");
T_RISE_ASDX_REF[CURRENT_SITE_NUMBER()-1][i] = 1.00 * Find_first_Switch_point_index(vec_RISE_REF,0.5,"Rise",0,8*Port_factor_ASDX*Cap_Cyc_Main_Port-1) * ASDX_port_period / 8;
T_FALL_ASDX_REF[CURRENT_SITE_NUMBER()-1][i] = 1.00 * Find_first_Switch_point_index(vec_FALL_REF,0.5,"Fall",0,8*Port_factor_ASDX*Cap_Cyc_Main_Port-1) * ASDX_port_period / 8;
T_RISE_ASDX_MEAS[CURRENT_SITE_NUMBER()-1][i] = 1.00 * Find_first_Switch_point_index(vec_RISE_MEAS,0.5,"Rise",0,8*Port_factor_ASDX*Cap_Cyc_Main_Port-1) * ASDX_port_period / 8;
T_FALL_ASDX_MEAS[CURRENT_SITE_NUMBER()-1][i] = 1.00 * Find_first_Switch_point_index(vec_FALL_MEAS,0.5,"Fall",0,8*Port_factor_ASDX*Cap_Cyc_Main_Port-1) * ASDX_port_period / 8;
if(printFlag)
{
cout << "PIN ASDX, Trim index = " << rdi.itos(i) << "||vec_RISE_REF=" << vec_RISE_REF << endl;
cout << "PIN ASDX, Trim index = " << rdi.itos(i) << "||vec_FALL_REF=" << vec_FALL_REF << endl;
cout << "PIN ASDX, Trim index = " << rdi.itos(i) << "||vec_RISE_MEAS=" << vec_RISE_MEAS << endl;
cout << "PIN ASDX, Trim index = " << rdi.itos(i) << "||vec_FALL_MEAS=" << vec_FALL_MEAS << endl;
}
vec_RISE_REF = rdi.id("Result_OSDO"+rdi.itos(i*4+0)).getVector("OSDO");
vec_FALL_REF = rdi.id("Result_OSDO"+rdi.itos(i*4+1)).getVector("OSDO");
vec_RISE_MEAS = rdi.id("Result_OSDO"+rdi.itos(i*4+2)).getVector("OSDO");
vec_FALL_MEAS = rdi.id("Result_OSDO"+rdi.itos(i*4+3)).getVector("OSDO");
T_RISE_OSDO_REF[CURRENT_SITE_NUMBER()-1][i] = 1.00 * Find_first_Switch_point_index(vec_RISE_REF,0.5,"Rise",0,8*Port_factor_OSDO*Cap_Cyc_Main_Port-1) * OSDO_port_period / 8;
T_FALL_OSDO_REF[CURRENT_SITE_NUMBER()-1][i] = 1.00 * Find_first_Switch_point_index(vec_FALL_REF,0.5,"Fall",0,8*Port_factor_OSDO*Cap_Cyc_Main_Port-1) * OSDO_port_period / 8;
T_RISE_OSDO_MEAS[CURRENT_SITE_NUMBER()-1][i] = 1.00 * Find_first_Switch_point_index(vec_RISE_MEAS,0.5,"Rise",0,8*Port_factor_OSDO*Cap_Cyc_Main_Port-1) * OSDO_port_period / 8;
T_FALL_OSDO_MEAS[CURRENT_SITE_NUMBER()-1][i] = 1.00 * Find_first_Switch_point_index(vec_FALL_MEAS,0.5,"Fall",0,8*Port_factor_OSDO*Cap_Cyc_Main_Port-1) * OSDO_port_period / 8;
if(printFlag)
{
cout << "PIN OSDO, Trim index = " << rdi.itos(i) << "||vec_RISE_REF=" << vec_RISE_REF << endl;
cout << "PIN OSDO, Trim index = " << rdi.itos(i) << "||vec_FALL_REF=" << vec_FALL_REF << endl;
cout << "PIN OSDO, Trim index = " << rdi.itos(i) << "||vec_RISE_MEAS=" << vec_RISE_MEAS << endl;
cout << "PIN OSDO, Trim index = " << rdi.itos(i) << "||vec_FALL_MEAS=" << vec_FALL_MEAS << endl;
}
}
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_RISE_ASDX_REF"+rdi.itos(i), T_RISE_ASDX_REF[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_FALL_ASDX_REF"+rdi.itos(i), T_FALL_ASDX_REF[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_RISE_ASDX_MEAS"+rdi.itos(i), T_RISE_ASDX_MEAS[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_FALL_ASDX_MEAS"+rdi.itos(i), T_FALL_ASDX_MEAS[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_RISE_OSDO_REF"+rdi.itos(i), T_RISE_OSDO_REF[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_FALL_OSDO_REF"+rdi.itos(i), T_FALL_OSDO_REF[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_RISE_OSDO_MEAS"+rdi.itos(i), T_RISE_OSDO_MEAS[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_FALL_OSDO_MEAS"+rdi.itos(i), T_FALL_OSDO_MEAS[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++)
{
T_DLY_RISE_REF[CURRENT_SITE_NUMBER()-1][i] = T_RISE_ASDX_REF[CURRENT_SITE_NUMBER()-1][i] - T_RISE_OSDO_REF[CURRENT_SITE_NUMBER()-1][i];
T_DLY_FALL_REF[CURRENT_SITE_NUMBER()-1][i] = T_FALL_ASDX_REF[CURRENT_SITE_NUMBER()-1][i] - T_FALL_OSDO_REF[CURRENT_SITE_NUMBER()-1][i];
T_DLY_RISE_MEAS[CURRENT_SITE_NUMBER()-1][i] = T_RISE_ASDX_MEAS[CURRENT_SITE_NUMBER()-1][i] - T_RISE_OSDO_MEAS[CURRENT_SITE_NUMBER()-1][i];
T_DLY_FALL_MEAS[CURRENT_SITE_NUMBER()-1][i] = T_FALL_ASDX_MEAS[CURRENT_SITE_NUMBER()-1][i] - T_FALL_OSDO_MEAS[CURRENT_SITE_NUMBER()-1][i];
T_DLY_RISE[CURRENT_SITE_NUMBER()-1][i] = T_DLY_RISE_MEAS[CURRENT_SITE_NUMBER()-1][i] - T_DLY_RISE_REF[CURRENT_SITE_NUMBER()-1][i];
T_DLY_FALL[CURRENT_SITE_NUMBER()-1][i] = T_DLY_FALL_MEAS[CURRENT_SITE_NUMBER()-1][i] - T_DLY_FALL_REF[CURRENT_SITE_NUMBER()-1][i];
}
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_DLY_RISE_REF"+rdi.itos(i), T_DLY_RISE_REF[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_DLY_FALL_REF"+rdi.itos(i), T_DLY_FALL_REF[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_DLY_RISE_MEAS"+rdi.itos(i), T_DLY_RISE_MEAS[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_DLY_FALL_MEAS"+rdi.itos(i), T_DLY_FALL_MEAS[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_DLY_RISE"+rdi.itos(i), T_DLY_RISE[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
for (int i = 0; i<8; i++) FuncPrint("T_DLY_FALL"+rdi.itos(i), T_DLY_FALL[CURRENT_SITE_NUMBER()-1][i]);
FuncPrint("===============================================================================","****");
N_OPT_I2C[CURRENT_SITE_NUMBER()-1] = i_Func_Optimal_Trim_Val(T_DLY_RISE[CURRENT_SITE_NUMBER()-1], Target_T0406, 8, "smaller");
N_IO_PAD_TRM_WR[CURRENT_SITE_NUMBER()-1] = N_OPT_I2C[CURRENT_SITE_NUMBER()-1] << 13;
FuncPrint("N_OPT_I2C", N_OPT_I2C[CURRENT_SITE_NUMBER()-1]);
FuncPrint("N_IO_PAD_TRM_WR", N_IO_PAD_TRM_WR[CURRENT_SITE_NUMBER()-1]);
N_IO_PAD_TRM_WR_rtv[CURRENT_SITE_NUMBER()-1] = extend_Pmode_Herschel(N_IO_PAD_TRM_WR[CURRENT_SITE_NUMBER()-1], 2);
FuncPrint("N_IO_PAD_TRM_WR_rtv", N_IO_PAD_TRM_WR_rtv[CURRENT_SITE_NUMBER()-1]);
// N_OPT_I2C_RD[CURRENT_SITE_NUMBER()-1] = N_IO_PAD_TRM_RD[CURRENT_SITE_NUMBER()-1] >> 13;
// cmt('Select index n = N_OPT_I2C with T_DLY_RISE_N_OPT_I2C <= target value')
// cmt('and with min. difference of T_DLY_RISE_N_OPT_I2C to target value')
// calc('N_OPT_I2C',2) # Warning, placeholder !! Only for simulation
// calc('N_IO_PAD_TRM_WR','N_OPT_I2C','<<',13)
// wac('OCP_MASK', 0xe000) # Mask setting for IO_PAD_TRM<15:13>
// wri('IO_PAD_TRM', 'N_IO_PAD_TRM_WR')
// ras('N_IO_PAD_TRM_RD','IO_PAD_TRM')
// calc('N_OPT_I2C_RD','N_IO_PAD_TRM_RD','>>',13)
// cmt('The test item is a functional fail if (N_OPT_I2C_RD != N_OPT_I2C')
FOR_EACH_SITE_END();
// double try_array1[5] = {5, 3.5, 0.5, 1.5, 2.49};
// cout << "i_Func_Optimal_Pos_Trim_Val=" << i_Func_Optimal_Pos_Trim_Val(try_array1, 2, 5) << "||||" << try_array1[i_Func_Optimal_Pos_Trim_Val(try_array1, 2, 5)] << endl;
// cout << "i_Func_Optimal_Neg_Trim_Val=" << i_Func_Optimal_Neg_Trim_Val(try_array1, 2, 5) << "||||" << try_array1[i_Func_Optimal_Neg_Trim_Val(try_array1, 2, 5)] << endl;
// cout << "i_Func_Optimal_Trim_Val=" << i_Func_Optimal_Trim_Val(try_array1, 2, 5) << "||||" << try_array1[i_Func_Optimal_Trim_Val(try_array1, 2, 5)] << endl;
rdi.runTimeVal("N_IO_PAD_TRM_WR_rtv", N_IO_PAD_TRM_WR_rtv);
TIMING_SPEC spi_std(1, 1);
Primary.timing(spi_std);
Primary.timing(1);
RDI_BEGIN(mode);
rdi.burstId("T04_06_i2c_delay_trimming_V2_PAT_id1");
rdi.digCap("T04_06_i2c_delay_trimming_V2_Digcap_id").vecVarOnly().pin("SDO").capMode(TA::SER).samples(16*1).bitPerWord(16).execute();
rdi.smartVec().label(s_splited_pat_name[1]).pin("SDX").writeData("N_IO_PAD_TRM_WR_rtv", Wri_Bit_Length, Wri_Bit_Position).execute();
RDI_END();
rdi.dc().pin("VDDIO").vForce(3 V).execute();
Primary.getLevelSpec().change("VDDIO",3);
FLUSH(TM::APRM);
}
ON_FIRST_INVOCATION_END();
ARRAY_I Vec=rdi.id("T04_06_i2c_delay_trimming_V2_Digcap_id").getVector();
N_IO_PAD_TRM_RD[CURRENT_SITE_NUMBER()-1] = reverse_ras_result(Vec[0]);
FuncPrint("N_IO_PAD_TRM_RD", N_IO_PAD_TRM_RD[CURRENT_SITE_NUMBER()-1]);
int Func_result0 = rdi.id("T04_06_i2c_delay_trimming_V2_PAT_id0").getBurstPassFail();
int Func_result1 = rdi.id("T04_06_i2c_delay_trimming_V2_PAT_id1").getBurstPassFail();
FuncPrint("Func_result0", Func_result0);
FuncPrint("Func_result1", Func_result1);
int Func_result = 1 * Func_result0 * Func_result1;
if ((N_IO_PAD_TRM_RD[CURRENT_SITE_NUMBER()-1] >> 13 ) != N_OPT_I2C[CURRENT_SITE_NUMBER()-1]) Func_result=99;
FuncPrint("Func_result", Func_result);
for (int i = 0; i<8; i++) TestLog("T_DLY_RISE_MEAS_"+rdi.itos(i), T_DLY_RISE[CURRENT_SITE_NUMBER()-1][i]*1e-9);
for (int i = 0; i<8; i++) TestLog("T_DLY_FALL_MEAS_"+rdi.itos(i), T_DLY_FALL[CURRENT_SITE_NUMBER()-1][i]*1e-9);
TestLog("FUNCTIONAL_TEST", Func_result);
TestLog("N_OPT_I2C", N_OPT_I2C[CURRENT_SITE_NUMBER()-1]);
TestLog("T_DLY_RISE_N_OPT_I2C", T_DLY_RISE[CURRENT_SITE_NUMBER()-1][N_OPT_I2C[CURRENT_SITE_NUMBER()-1]]*1e-9);
return;
}
virtual void postParameterChange(const string& parameterIdentifier)
{
return;
}
virtual const string getComment() const
{
string comment = "_";
return comment;
}
};
REGISTER_TESTMETHOD("02_Wafer.T04_06_i2c_delay_trimming_V2", T04_06_i2c_delay_trimming_V2);
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