File size: 24,581 Bytes

81b9afd

Module,File,Func,Time (Secs)
allocation,RegisterBankInfo,RegisterBankInfo,3
allocation,RegisterInfo,eliminateFrameIndex,943
allocation,RegisterInfo,getCalleeSavedRegs,86
allocation,RegisterInfo,getCallPreservedMask,106
allocation,RegisterInfo,getFrameRegister,6
allocation,RegisterInfo,getNoPreservedMask,3
allocation,RegisterInfo,getPointerRegClass,7
allocation,RegisterInfo,getReservedRegs,3
allocation,RegisterInfo,hasReservedSpillSlot,245
allocation,RegisterInfo,isAsmClobberable,12
allocation,RegisterInfo,isConstantPhysReg,10
allocation,RegisterInfo,RegisterInfo,28
allocation,RegisterInfo,requiresFrameIndexScavenging,9
allocation,RegisterInfo,requiresRegisterScavenging,5
Assembler,AsmParser,addCSRSystemRegisterOperands,5
Assembler,AsmParser,addExpr,21
Assembler,AsmParser,addFenceArgOperands,346
Assembler,AsmParser,addFRMArgOperands,7
Assembler,AsmParser,addImmOperands,5
Assembler,AsmParser,addRegOperands,4
Assembler,AsmParser,addVTypeIOperands,5
Assembler,AsmParser,AsmParser,8
Assembler,AsmParser,classifySymbolRef,235
Assembler,AsmParser,convertFPR64ToFPR16,10
Assembler,AsmParser,convertFPR64ToFPR32,17
Assembler,AsmParser,createImm,14
Assembler,AsmParser,createReg,19
Assembler,AsmParser,createSysReg,21
Assembler,AsmParser,createToken,4
Assembler,AsmParser,createVType,5
Assembler,AsmParser,defaultMaskRegOp,157
Assembler,AsmParser,emitToStreamer,18
Assembler,AsmParser,evaluateConstantImm,31
Assembler,AsmParser,generateImmOutOfRangeError,28
Assembler,AsmParser,getEndLoc,9
Assembler,AsmParser,getFeatureBits,5
Assembler,AsmParser,getImm,8
Assembler,AsmParser,getLoc,7
Assembler,AsmParser,getReg,11
Assembler,AsmParser,getRoundingMode,979
Assembler,AsmParser,getStartLoc,2
Assembler,AsmParser,getSysReg,6
Assembler,AsmParser,getTargetStreamer,5
Assembler,AsmParser,getToken,1
Assembler,AsmParser,getVType,4
Assembler,AsmParser,isBareSimmNLsb0,1172
Assembler,AsmParser,isBareSymbol,332
Assembler,AsmParser,isCallSymbol,130
Assembler,AsmParser,isCLUIImm,359
Assembler,AsmParser,isCSRSystemRegister,9
Assembler,AsmParser,isFenceArg,696
Assembler,AsmParser,isFRMArg,380
Assembler,AsmParser,isGPR,22
Assembler,AsmParser,isImm,6
Assembler,AsmParser,isImmXLenLI,496
Assembler,AsmParser,isMem,9
Assembler,AsmParser,isPseudoJumpSymbol,34
Assembler,AsmParser,isReg,2
Assembler,AsmParser,isRV32E,5
Assembler,AsmParser,isRV64,3
Assembler,AsmParser,isRV64-2,3
Assembler,AsmParser,isSImm10Lsb0000NonZero,240
Assembler,AsmParser,isSImm12,93
Assembler,AsmParser,isSImm12Lsb0,56
Assembler,AsmParser,isSImm13Lsb0,12
Assembler,AsmParser,isSImm21Lsb0JAL,32
Assembler,AsmParser,isSImm5,46
Assembler,AsmParser,isSImm5Plus1,16
Assembler,AsmParser,isSImm6,17
Assembler,AsmParser,isSImm6NonZero,3
Assembler,AsmParser,isSImm9Lsb0,17
Assembler,AsmParser,isSystemRegister,1
Assembler,AsmParser,isToken,2
Assembler,AsmParser,isTPRelAddSymbol,164
Assembler,AsmParser,isUImm10Lsb00NonZero,30
Assembler,AsmParser,isUImm20AUIPC,61
Assembler,AsmParser,isUImm20LUI,25
Assembler,AsmParser,isUImm5,24
Assembler,AsmParser,isUImm7Lsb00,28
Assembler,AsmParser,isUImm8Lsb00,18
Assembler,AsmParser,isUImm8Lsb000,7
Assembler,AsmParser,isUImm9Lsb000,6
Assembler,AsmParser,isUImmLog2XLen,31
Assembler,AsmParser,isUImmLog2XLenHalf,13
Assembler,AsmParser,isUImmLog2XLenNonZero,15
Assembler,AsmParser,isV0Reg,3
Assembler,AsmParser,isVType,3
Assembler,AsmParser,isVTypeI,2
Assembler,AsmParser,KindTy,32
Assembler,AsmParser,LLVMInitializeAsmParser,19
Assembler,AsmParser,MatchAndEmitInstruction,2899
Assembler,AsmParser,matchRegisterNameHelper,344
Assembler,AsmParser,Operand,18
Assembler,AsmParser,Operand2,43
Assembler,AsmParser,ParseRegister,1930
Assembler,AsmParser,parseAtomicMemOp,457
Assembler,AsmParser,parseRegister2,27
Assembler,AsmParser,parseBareSymbol,546
Assembler,AsmParser,parseCallSymbol,301
Assembler,AsmParser,parseCSRSystemRegister,703
Assembler,AsmParser,ParseDirective,77
Assembler,AsmParser,parseImmediate,234
Assembler,AsmParser,ParseInstruction,126
Assembler,AsmParser,parseJALOffset,75
Assembler,AsmParser,parseMaskReg,321
Assembler,AsmParser,parseMemOpBaseReg,90
Assembler,AsmParser,parseOperand,227
Assembler,AsmParser,parseOperandWithModifier,160
Assembler,AsmParser,parsePseudoJumpSymbol,335
Assembler,AsmParser,parseVTypeI,1445
Assembler,AsmParser,print,11
Assembler,AsmParser,setFeatureBits,18
Assembler,AsmParser,tryParseRegister,14
Assembler,AsmParser,validateTargetOperandClass,189
Assembler,AsmPrinter,AsmPrinter,31
Assembler,AsmPrinter,emitAttributes,130
Assembler,AsmPrinter,emitEndOfAsmFile,11
Assembler,AsmPrinter,emitInstruction,42
Assembler,AsmPrinter,emitStartOfAsmFile,27
Assembler,AsmPrinter,EmitToStreamer,104
Assembler,AsmPrinter,getPassName,3
Assembler,AsmPrinter,LLVMInitializeAsmPrinter,21
Assembler,AsmPrinter,lowerOperand,380
Assembler,AsmPrinter,PrintAsmMemoryOperand,61
Assembler,AsmPrinter,PrintAsmOperand,487
Assembler,AsmPrinter,runOnMachineFunction,52
Disassembler,Disassembler,addImplySP,185
Disassembler,Disassembler,createDisassembler,24
Disassembler,Disassembler,decodeCLUIImmOperand,53
Disassembler,Disassembler,DecodeFPR16RegisterClass,107
Disassembler,Disassembler,DecodeFPR32CRegisterClass,39
Disassembler,Disassembler,DecodeFPR32RegisterClass,27
Disassembler,Disassembler,DecodeFPR64CRegisterClass,24
Disassembler,Disassembler,DecodeFPR64RegisterClass,20
Disassembler,Disassembler,decodeFRMArg,34
Disassembler,Disassembler,DecodeGPRCRegisterClass,15
Disassembler,Disassembler,DecodeGPRNoX0RegisterClass,11
Disassembler,Disassembler,DecodeGPRNoX0X2RegisterClass,26
Disassembler,Disassembler,DecodeGPRRegisterClass,63
Disassembler,Disassembler,decodeRVCInstrRdRs1Rs2,118
Disassembler,Disassembler,decodeRVCInstrRdRs1UImm,299
Disassembler,Disassembler,decodeRVCInstrRdRs2,34
Disassembler,Disassembler,decodeRVCInstrRdSImm,179
Disassembler,Disassembler,decodeRVCInstrSImm,109
Disassembler,Disassembler,decodeSImmNonZeroOperand,63
Disassembler,Disassembler,decodeSImmOperand,6
Disassembler,Disassembler,decodeSImmOperandAndLsl1,14
Disassembler,Disassembler,decodeUImmNonZeroOperand,35
Disassembler,Disassembler,decodeUImmOperand,17
Disassembler,Disassembler,decodeVMaskReg,22
Disassembler,Disassembler,DecodeVRRegisterClass,12
Disassembler,Disassembler,Disassembler,21
Disassembler,Disassembler,getInstruction,539
Disassembler,Disassembler,LLVMInitializeDisassembler,22
Emission,AsmBackend,~AsmBackend,2
Emission,AsmBackend,adjustFixupValue,682
Emission,AsmBackend,applyFixup,250
Emission,AsmBackend,AsmBackend,15
Emission,AsmBackend,createAsmBackend,96
Emission,AsmBackend,createObjectTargetWriter,9
Emission,AsmBackend,evaluateTargetFixup,1449
Emission,AsmBackend,fixupNeedsRelaxation,48
Emission,AsmBackend,fixupNeedsRelaxationAdvanced,108
Emission,AsmBackend,getFixupKind,10
Emission,AsmBackend,getFixupKindInfo,266
Emission,AsmBackend,getNumFixupKinds,2
Emission,AsmBackend,getRelaxedOpcode,25
Emission,AsmBackend,getTargetABI,4
Emission,AsmBackend,getTargetOptions,5
Emission,AsmBackend,mayNeedRelaxation,34
Emission,AsmBackend,relaxInstruction,343
Emission,AsmBackend,requiresDiffExpressionRelocations,29
Emission,AsmBackend,setForceRelocs,3
Emission,AsmBackend,shouldForceRelocation,305
Emission,AsmBackend,shouldInsertExtraNopBytesForCodeAlign,751
Emission,AsmBackend,shouldInsertFixupForCodeAlign,542
Emission,AsmBackend,willForceRelocations,17
Emission,AsmBackend,writeNopData,368
Emission,AsmInfo,anchor,1
Emission,AsmInfo,getExprForFDESymbol,216
Emission,AsmInfo,MCAsmInfo,64
Emission,BaseInfo,ABI,23
Emission,BaseInfo,computeTargetABI,910
Emission,BaseInfo,FenceField,3
Emission,BaseInfo,getTargetABI,38
Emission,BaseInfo,II,401
Emission,BaseInfo,OperandType,33
Emission,BaseInfo,RISCVVSEW,7
Emission,BaseInfo,RoundingMode,29
Emission,BaseInfo,roundingModeToString,47
Emission,BaseInfo,RVVConstraintType,9
Emission,BaseInfo,stringToRoundingMode,26
Emission,BaseInfo,validate,13
Emission,BaseInfo,VLMUL,7
Emission,BaseInfo,VMTs,49
Emission,ELFObjectWriter,~ELFObjectWriter,1
Emission,ELFObjectWriter,createELFObjectWriter,18
Emission,ELFObjectWriter,ELFObjectWriter,16
Emission,ELFObjectWriter,getRelocType,739
Emission,ELFObjectWriter,needsRelocateWithSymbol,4
Emission,ELFStreamer,AttributeItem,7
Emission,ELFStreamer,AttributeType,5
Emission,ELFStreamer,calculateContentSize,75
Emission,ELFStreamer,emitAttribute,71
Emission,ELFStreamer,emitDirectiveOptionNoPIC,7
Emission,ELFStreamer,emitDirectiveOptionNoRelax,4
Emission,ELFStreamer,emitDirectiveOptionNoRVC,16
Emission,ELFStreamer,emitDirectiveOptionPIC,3
Emission,ELFStreamer,emitDirectiveOptionPop,2
Emission,ELFStreamer,emitDirectiveOptionPush,1
Emission,ELFStreamer,emitDirectiveOptionRelax,3
Emission,ELFStreamer,emitDirectiveOptionRVC,4
Emission,ELFStreamer,emitIntTextAttribute,27
Emission,ELFStreamer,emitTextAttribute,4
Emission,ELFStreamer,finishAttributeSection,286
Emission,ELFStreamer,getAttributeItem,56
Emission,ELFStreamer,getStreamer,11
Emission,ELFStreamer,setAttributeItem1,32
Emission,ELFStreamer,setAttributeItem2,19
Emission,ELFStreamer,setAttributeItems,45
Emission,ELFStreamer,TargetELFStreamer,567
Emission,FixupKind,enumFixups,80
Emission,InstPrinter,applyTargetSpecificCLOption,22
Emission,InstPrinter,getRegisterName,15
Emission,InstPrinter,InstPrinter,13
Emission,InstPrinter,printAtomicMemOp,40
Emission,InstPrinter,printBranchOperand,54
Emission,InstPrinter,printCSRSystemRegister,19
Emission,InstPrinter,printFenceArg,83
Emission,InstPrinter,printFRMArg,51
Emission,InstPrinter,printInst,66
Emission,InstPrinter,printOperand,60
Emission,InstPrinter,printRegName,2
Emission,InstPrinter,printVMaskReg,106
Emission,InstPrinter,printVTypeI,8
Emission,MatInt,generateInstSeq,585
Emission,MatInt,getIntMatCost,308
Emission,MatInt,structInst,52
Emission,MCCodeEmitter,~MCCodeEmitter,2
Emission,MCCodeEmitter,createMCCodeEmitter,8
Emission,MCCodeEmitter,encodeInstruction,303
Emission,MCCodeEmitter,getImmOpValue,943
Emission,MCCodeEmitter,getImmOpValueAsr1,120
Emission,MCCodeEmitter,getMachineOpValue,20
Emission,MCCodeEmitter,getVMaskReg,18
Emission,MCCodeEmitter,MCCodeEmitter,10
Emission,MCExpr,classof1,6
Emission,MCExpr,classof2,2
Emission,MCExpr,create,19
Emission,MCExpr,enumVariantKind,19
Emission,MCExpr,evaluateAsConstant,303
Emission,MCExpr,evaluateAsInt64,59
Emission,MCExpr,evaluateAsRelocatableImpl,55
Emission,MCExpr,findAssociatedFragment,3
Emission,MCExpr,fixELFSymbolsInTLSFixups,27
Emission,MCExpr,fixELFSymbolsInTLSFixupsImpl,411
Emission,MCExpr,getKind,5
Emission,MCExpr,getPCRelHiFixup,493
Emission,MCExpr,getSubExpr,2
Emission,MCExpr,getVariantKindForName,48
Emission,MCExpr,getVariantKindName,29
Emission,MCExpr,MCExpr,21
Emission,MCExpr,printImpl,176
Emission,MCExpr,visitUsedExpr,7
Emission,MCTargetDesc,createAsmTargetStreamer,19
Emission,MCTargetDesc,createInstrAnalysis,3
Emission,MCTargetDesc,createMCAsmInfo,22
Emission,MCTargetDesc,createMCInstPrinter,29
Emission,MCTargetDesc,createMCInstrInfo,3
Emission,MCTargetDesc,createMCRegisterInfo,7
Emission,MCTargetDesc,createMCSubtargetInfo,21
Emission,MCTargetDesc,createNullTargetStreamer,10
Emission,MCTargetDesc,createObjectTargetStreamer,33
Emission,MCTargetDesc,evaluateBranch,186
Emission,MCTargetDesc,InstrAnalysis,3
Emission,MCTargetDesc,LLVMInitializeTargetMC,143
Emission,TargetStreamer,emitAttribute,8
Emission,TargetStreamer,emitAttribute2,2
Emission,TargetStreamer,emitDirectiveOptionNoPIC,3
Emission,TargetStreamer,emitDirectiveOptionNoPIC2,2
Emission,TargetStreamer,emitDirectiveOptionNoRelax,4
Emission,TargetStreamer,emitDirectiveOptionNoRelax2,1
Emission,TargetStreamer,emitDirectiveOptionNoRVC,4
Emission,TargetStreamer,emitDirectiveOptionNoRVC2,6
Emission,TargetStreamer,emitDirectiveOptionPIC,3
Emission,TargetStreamer,emitDirectiveOptionPIC2,2
Emission,TargetStreamer,emitDirectiveOptionPop,1
Emission,TargetStreamer,emitDirectiveOptionPop2,4
Emission,TargetStreamer,emitDirectiveOptionPush,2
Emission,TargetStreamer,emitDirectiveOptionPush2,2
Emission,TargetStreamer,emitDirectiveOptionRelax,3
Emission,TargetStreamer,emitDirectiveOptionRelax2,2
Emission,TargetStreamer,emitDirectiveOptionRVC,2
Emission,TargetStreamer,emitDirectiveOptionRVC2,1
Emission,TargetStreamer,emitIntTextAttribute,6
Emission,TargetStreamer,emitIntTextAttribute2,4
Emission,TargetStreamer,emitTargetAttributes,476
Emission,TargetStreamer,emitTextAttribute,4
Emission,TargetStreamer,emitTextAttribute2,5
Emission,TargetStreamer,finish,2
Emission,TargetStreamer,finishAttributeSection,2
Emission,TargetStreamer,finishAttributeSection2,2
Emission,TargetStreamer,TargetAsmStreamer,16
Emission,TargetStreamer,TargetStreamer,2
Optimization,CleanupVSETVLI,CleanupVSETVLI,21
Optimization,CleanupVSETVLI,createPass,15
Optimization,CleanupVSETVLI,getAnalysisUsage,12
Optimization,CleanupVSETVLI,getPassName,24
Optimization,CleanupVSETVLI,getRequiredProperties,17
Optimization,CleanupVSETVLI,runOnMachineBasicBlock,5111
Optimization,CleanupVSETVLI,runOnMachineFunction,490
Optimization,ExpandAtomicPseudoInsts,createPass,21
Optimization,ExpandAtomicPseudoInsts,ExpandAtomicPseudo,15
Optimization,ExpandAtomicPseudoInsts,expandMBB,250
Optimization,ExpandAtomicPseudoInsts,expandMI,5474
Optimization,ExpandAtomicPseudoInsts,getPassName,17
Optimization,ExpandAtomicPseudoInsts,runOnMachineFunction,191
Optimization,ExpandPseudoInsts,createPass,21
Optimization,ExpandPseudoInsts,expandMBB,15
Optimization,ExpandPseudoInsts,expandMI,352
Optimization,ExpandPseudoInsts,ExpandPseudo,7700
Optimization,ExpandPseudoInsts,getPassName,17
Optimization,ExpandPseudoInsts,runOnMachineFunction,181
Optimization,MergeBaseOffset,createPass,8
Optimization,MergeBaseOffset,getPassName,10
Optimization,MergeBaseOffset,getRequiredProperties,21
Optimization,MergeBaseOffset,MergeBaseOffsetOpt,14
Optimization,MergeBaseOffset,runOnMachineFunction,6068
Scheduling,InstrInfo,analyzeBranch,329
Scheduling,InstrInfo,areMemAccessesTriviallyDisjoint,219
Scheduling,InstrInfo,buildOutlinedFrame,346
Scheduling,InstrInfo,copyPhysReg,455
Scheduling,InstrInfo,decomposeMachineOperandsTargetFlags,20
Scheduling,InstrInfo,getBranchDestBlock,35
Scheduling,InstrInfo,getInstSizeInBytes,713
Scheduling,InstrInfo,getMemOperandWithOffsetWidth,46
Scheduling,InstrInfo,getOutliningCandidateInfo,566
Scheduling,InstrInfo,getOutliningType,493
Scheduling,InstrInfo,getSerializableDirectMachineOperandTargetFlags,121
Scheduling,InstrInfo,insertBranch,149
Scheduling,InstrInfo,insertIndirectBranch,343
Scheduling,InstrInfo,insertOutlinedCall,155
Scheduling,InstrInfo,InstrInfo,21
Scheduling,InstrInfo,isAsCheapAsAMove,258
Scheduling,InstrInfo,isBranchOffsetInRange,46
Scheduling,InstrInfo,isCopyInstrImpl,170
Scheduling,InstrInfo,isFunctionSafeToOutlineFrom,21
Scheduling,InstrInfo,isLoadFromStackSlot,101
Scheduling,InstrInfo,isMBBSafeToOutlineFrom,11
Scheduling,InstrInfo,isStoreToStackSlot,62
Scheduling,InstrInfo,loadRegFromStackSlot,127
Scheduling,InstrInfo,movImm,400
Scheduling,InstrInfo,parseCondBranch,19
Scheduling,InstrInfo,removeBranch,53
Scheduling,InstrInfo,reverseBranchCondition,64
Scheduling,InstrInfo,storeRegToStackSlot,118
Scheduling,InstrInfo,verifyInstruction,44
Scheduling,MachineFunctionInfo,getLibCallStackSize,10
Scheduling,MachineFunctionInfo,getMoveF64FrameIndex,19
Scheduling,MachineFunctionInfo,getVarArgsFrameIndex,14
Scheduling,MachineFunctionInfo,getVarArgsSaveSize,6
Scheduling,MachineFunctionInfo,MachineFunctionInfo,6
Scheduling,MachineFunctionInfo,setLibCallStackSize,12
Scheduling,MachineFunctionInfo,setVarArgsFrameIndex,10
Scheduling,MachineFunctionInfo,setVarArgsSaveSize,7
Scheduling,MachineFunctionInfo,useSaveRestoreLibCalls,691
Scheduling,Subtarget,anchor,2
Scheduling,Subtarget,enableLinkerRelax,8
Scheduling,Subtarget,enableMachineScheduler,3
Scheduling,Subtarget,enableRVCHintInstrs,10
Scheduling,Subtarget,enableSaveRestore,6
Scheduling,Subtarget,getCallLowering,9
Scheduling,Subtarget,getFrameLowering,6
Scheduling,Subtarget,getInstrInfo,7
Scheduling,Subtarget,getInstructionSelector,15
Scheduling,Subtarget,getLegalizerInfo,12
Scheduling,Subtarget,getRegBankInfo,9
Scheduling,Subtarget,getRegisterInfo,7
Scheduling,Subtarget,getSelectionDAGInfo,10
Scheduling,Subtarget,getTargetABI,9
Scheduling,Subtarget,getTargetLowering,9
Scheduling,Subtarget,getXLen,6
Scheduling,Subtarget,getXLenVT,12
Scheduling,Subtarget,hasStdExtA,6
Scheduling,Subtarget,hasStdExtB,1
Scheduling,Subtarget,hasStdExtC,2
Scheduling,Subtarget,hasStdExtD,4
Scheduling,Subtarget,hasStdExtF,3
Scheduling,Subtarget,hasStdExtM,2
Scheduling,Subtarget,hasStdExtV,5
Scheduling,Subtarget,hasStdExtZba,2
Scheduling,Subtarget,hasStdExtZbb,2
Scheduling,Subtarget,hasStdExtZbc,2
Scheduling,Subtarget,hasStdExtZbe,2
Scheduling,Subtarget,hasStdExtZbf,3
Scheduling,Subtarget,hasStdExtZbm,2
Scheduling,Subtarget,hasStdExtZbp,3
Scheduling,Subtarget,hasStdExtZbproposedc,1
Scheduling,Subtarget,hasStdExtZbr,1
Scheduling,Subtarget,hasStdExtZbs,2
Scheduling,Subtarget,hasStdExtZbt,2
Scheduling,Subtarget,hasStdExtZfh,2
Scheduling,Subtarget,hasStdExtZvamo,2
Scheduling,Subtarget,hasStdExtZvlsseg,3
Scheduling,Subtarget,initializeSubtargetDependencies,302
Scheduling,Subtarget,is64Bit,14
Scheduling,Subtarget,isRegisterReservedByUser,29
Scheduling,Subtarget,isRV32E,9
Scheduling,Subtarget,Subtarget,150
Scheduling,TargetInfo,getThe32Target,18
Scheduling,TargetInfo,getThe64Target,3
Scheduling,TargetInfo,LLVMInitializeTargetInfo,11
Scheduling,TargetMachine,addGlobalInstructionSelect,6
Scheduling,TargetMachine,addInstSelector,104
Scheduling,TargetMachine,addIRPasses,14
Scheduling,TargetMachine,addIRTranslator,19
Scheduling,TargetMachine,addLegalizeMachineIR,10
Scheduling,TargetMachine,addPreEmitPass,21
Scheduling,TargetMachine,addPreEmitPass2,84
Scheduling,TargetMachine,addPreRegAlloc,150
Scheduling,TargetMachine,addPreSched2,2
Scheduling,TargetMachine,addRegBankSelect,18
Scheduling,TargetMachine,computeDataLayout,45
Scheduling,TargetMachine,createPassConfig,8
Scheduling,TargetMachine,getEffectiveRelocModel,6
Scheduling,TargetMachine,getObjFileLowering,34
Scheduling,TargetMachine,getSubtargetImpl,99
Scheduling,TargetMachine,getTargetMachine,27
Scheduling,TargetMachine,getTargetTransformInfo,20
Scheduling,TargetMachine,isNoopAddrSpaceCast,77
Scheduling,TargetMachine,LLVMInitializeTarget,21
Scheduling,TargetMachine,PassConfig,30
Scheduling,TargetMachine,TargetMachine,128
Scheduling,TargetObjectFIle,getModuleMetadata,1158
Scheduling,TargetObjectFIle,getSectionForConstant,68
Scheduling,TargetObjectFIle,Initialize,64
Scheduling,TargetObjectFIle,isConstantInSmallSection,54
Scheduling,TargetObjectFIle,isGlobalInSmallSection,988
Scheduling,TargetObjectFIle,isInSmallSection,8
Scheduling,TargetObjectFIle,SelectSectionForGlobal,45
Scheduling,TargetTransformInfo,getIntImmCost,255
Scheduling,TargetTransformInfo,getIntImmCostInst,738
Scheduling,TargetTransformInfo,getIntImmCostIntrin,51
Scheduling,TargetTransformInfo,getST,5
Scheduling,TargetTransformInfo,getTLI,3
Scheduling,TargetTransformInfo,TTIImpl,46
Selection,CallLowering,CallLowering,10
Selection,CallLowering,lowerCall,2
Selection,CallLowering,lowerFormalArguments,3
Selection,CallLowering,lowerReturn,135
Selection,FrameLowering,adjustReg,222
Selection,FrameLowering,canUseAsEpilogue,461
Selection,FrameLowering,canUseAsPrologue,232
Selection,FrameLowering,determineCalleeSaves,808
Selection,FrameLowering,eliminateCallFramePseudoInstr,41
Selection,FrameLowering,emitEpilogue,1005
Selection,FrameLowering,emitPrologue,3037
Selection,FrameLowering,FrameLowering,29
Selection,FrameLowering,getFrameIndexReference,1249
Selection,FrameLowering,hasBP,25
Selection,FrameLowering,hasFP,63
Selection,FrameLowering,hasReservedCallFrame,12
Selection,FrameLowering,processFunctionBeforeFrameFinalized,81
Selection,FrameLowering,restoreCalleeSavedRegisters,592
Selection,FrameLowering,spillCalleeSavedRegisters,534
Selection,InstructionSelector,createInstructionSelector,13
Selection,InstructionSelector,getName,5
Selection,InstructionSelector,InstructionSelector,53
Selection,InstructionSelector,select,31
Selection,ISelDAGToDAG,createISelDag,8
Selection,ISelDAGToDAG,DAGToDAGISel,11
Selection,ISelDAGToDAG,getPassName,1
Selection,ISelDAGToDAG,MatchSLLIUW,243
Selection,ISelDAGToDAG,MatchSRLIUW,311
Selection,ISelDAGToDAG,PostprocessISelDAG,130
Selection,ISelDAGToDAG,runOnMachineFunction,4
Selection,ISelDAGToDAG,Select,28532
Selection,ISelDAGToDAG,SelectAddrFI,8
Selection,ISelDAGToDAG,SelectInlineAsmMemoryOperand,205
Selection,ISelDAGToDAG,selectVLOp,164
Selection,ISelDAGToDAG,selectVSplat,247
Selection,ISelDAGToDAG,selectVSplatSimm5,1070
Selection,ISelDAGToDAG,selectVSplatUimm5,385
Selection,ISelLowering,analyzeInputArgs,322
Selection,ISelLowering,analyzeOutputArgs,279
Selection,ISelLowering,CanLowerReturn,460
Selection,ISelLowering,computeKnownBitsForTargetNode,384
Selection,ISelLowering,ComputeNumSignBitsForTargetNode,226
Selection,ISelLowering,convertSelectOfConstantsToMath,25
Selection,ISelLowering,convertSetCCLogicToBitwiseLogic,9
Selection,ISelLowering,decomposeMulByConstant,569
Selection,ISelLowering,EmitInstrWithCustomInserter,382
Selection,ISelLowering,emitLeadingFence,225
Selection,ISelLowering,emitMaskedAtomicCmpXchgIntrinsic,273
Selection,ISelLowering,emitMaskedAtomicRMWIntrinsic,139
Selection,ISelLowering,emitTrailingFence,184
Selection,ISelLowering,getAddr,368
Selection,ISelLowering,getConstraintType,102
Selection,ISelLowering,getDynamicTLSAddr,213
Selection,ISelLowering,getExceptionPointerRegister,4
Selection,ISelLowering,getExceptionSelectorRegister,9
Selection,ISelLowering,getExtendForAtomicCmpSwapArg,7
Selection,ISelLowering,getExtendForAtomicOps,5
Selection,ISelLowering,getInlineAsmMemConstraint,87
Selection,ISelLowering,getRegForInlineAsmConstraint,1204
Selection,ISelLowering,getRegisterByName,228
Selection,ISelLowering,getSetCCResultType,97
Selection,ISelLowering,getStaticTLSAddr,527
Selection,ISelLowering,getSubtarget,7
Selection,ISelLowering,getTargetNodeName,610
Selection,ISelLowering,getTgtMemIntrinsic,409
Selection,ISelLowering,hasBitPreservingFPLogic,12
Selection,ISelLowering,isCheapToSpeculateCtlz,4
Selection,ISelLowering,isCheapToSpeculateCttz,7
Selection,ISelLowering,isDesirableToCommuteWithShift,1301
Selection,ISelLowering,isEligibleForTailCallOptimization,692
Selection,ISelLowering,isFMAFasterThanFMulAndFAdd,16
Selection,ISelLowering,isFPImmLegal,33
Selection,ISelLowering,isLegalAddImmediate,7
Selection,ISelLowering,isLegalAddressingMode,124
Selection,ISelLowering,isLegalICmpImmediate,2
Selection,ISelLowering,isSExtCheaperThanZExt,83
Selection,ISelLowering,isTruncateFree,105
Selection,ISelLowering,isTruncateFree2,45
Selection,ISelLowering,isZExtFree,137
Selection,ISelLowering,LowerAsmOperandForConstraint,268
Selection,ISelLowering,LowerBlockAddress,76
Selection,ISelLowering,LowerCall,1683
Selection,ISelLowering,LowerConstantPool,11
Selection,ISelLowering,lowerEXTRACT_VECTOR_ELT,1002
Selection,ISelLowering,LowerFormalArguments,2016
Selection,ISelLowering,LowerFRAMEADDR,264
Selection,ISelLowering,LowerGlobalAddress,161
Selection,ISelLowering,LowerGlobalTLSAddress,150
Selection,ISelLowering,lowerINSERT_VECTOR_ELT,736
Selection,ISelLowering,LowerINTRINSIC_W_CHAIN,2604
Selection,ISelLowering,LowerINTRINSIC_WO_CHAIN,1364
Selection,ISelLowering,LowerJumpTable,4
Selection,ISelLowering,LowerOperation,1857
Selection,ISelLowering,LowerReturn,1045
Selection,ISelLowering,LowerRETURNADDR,258
Selection,ISelLowering,lowerSELECT,293
Selection,ISelLowering,lowerShiftLeftParts,864
Selection,ISelLowering,lowerShiftRightParts,464
Selection,ISelLowering,lowerSPLATVECTOR,1305
Selection,ISelLowering,LowerVASTART,171
Selection,ISelLowering,lowerVectorMaskExt,948
Selection,ISelLowering,lowerVectorMaskTrunc,298
Selection,ISelLowering,mayBeEmittedAsTailCall,262
Selection,ISelLowering,NodeType,301
Selection,ISelLowering,normaliseSetCC,96
Selection,ISelLowering,PerformDAGCombine,84
Selection,ISelLowering,ReplaceNodeResults,3901
Selection,ISelLowering,shouldConsiderGEPOffsetSplit,3
Selection,ISelLowering,shouldConvertConstantLoadToIntImm,2
Selection,ISelLowering,shouldExpandAtomicCmpXchgInIR,88
Selection,ISelLowering,shouldExpandAtomicRMWInIR,85
Selection,ISelLowering,shouldExpandShift,78
Selection,ISelLowering,shouldExtendTypeInLibCall,178
Selection,ISelLowering,shouldInsertFencesForAtomic,6
Selection,ISelLowering,shouldSignExtendTypeInLibCall,5
Selection,ISelLowering,TargetLowering,3111
Selection,ISelLowering,targetShrinkDemandedConstant,1040
Selection,ISelLowering,validateCCReservedRegs,478
Selection,LegalizeInfo,LegalizerInfo,12
Selection,MCInstLower,lowerMachineInstrToMCInst,721
Selection,MCInstLower,lowerMachineOperandToMCOperand,192
Selection,MCInstLower,lowerSymbolOperand,254