File size: 5,679 Bytes
25ade36 | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 | #include "edge-impulse-sdk/dsp/config.hpp"
#if EIDSP_LOAD_CMSIS_DSP_SOURCES
/* ----------------------------------------------------------------------
* Project: CMSIS DSP Library
* Title: arm_vlog_q15
* Description: Q15 vector log
*
* $Date: 19 July 2021
* $Revision: V1.10.0
*
* Target Processor: Cortex-M and Cortex-A cores
* -------------------------------------------------------------------- */
/*
* Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "edge-impulse-sdk/CMSIS/DSP/Include/dsp/fast_math_functions.h"
#define LOG_Q15_ACCURACY 15
/* Bit to represent the normalization factor
It is Ceiling[Log2[LOG_Q15_ACCURACY]] of the previous value.
The Log2 algorithm is assuming that the value x is
1 <= x < 2.
But input value could be as small a 2^-LOG_Q15_ACCURACY
which would give an integer part of -15.
*/
#define LOG_Q15_INTEGER_PART 4
/* 2.0 in q14 */
#define LOQ_Q15_THRESHOLD (1u << LOG_Q15_ACCURACY)
/* HALF */
#define LOQ_Q15_Q16_HALF LOQ_Q15_THRESHOLD
#define LOQ_Q15_Q14_HALF (LOQ_Q15_Q16_HALF >> 2)
/* 1.0 / Log2[Exp[1]] in q15 */
#define LOG_Q15_INVLOG2EXP 0x58b9u
/* Clay Turner algorithm */
static uint16_t arm_scalar_log_q15(uint16_t src)
{
int i;
int16_t c = __CLZ(src)-16;
int16_t normalization=0;
/* 0.5 in q11 */
uint16_t inc = LOQ_Q15_Q16_HALF >> (LOG_Q15_INTEGER_PART + 1);
/* Will compute y = log2(x) for 1 <= x < 2.0 */
uint16_t x;
/* q11 */
uint16_t y=0;
/* q11 */
int16_t tmp;
/* Normalize and convert to q14 format */
x = src;
if ((c-1) < 0)
{
x = x >> (1-c);
}
else
{
x = x << (c-1);
}
normalization = c;
/* Compute the Log2. Result is in q11 instead of q16
because we know 0 <= y < 1.0 but
we want a result allowing to do a
product on int16 rather than having to go
through int32
*/
for(i = 0; i < LOG_Q15_ACCURACY ; i++)
{
x = (((int32_t)x*x)) >> (LOG_Q15_ACCURACY - 1);
if (x >= LOQ_Q15_THRESHOLD)
{
y += inc ;
x = x >> 1;
}
inc = inc >> 1;
}
/*
Convert the Log2 to Log and apply normalization.
We compute (y - normalisation) * (1 / Log2[e]).
*/
/* q11 */
//tmp = y - ((int32_t)normalization << (LOG_Q15_ACCURACY + 1));
tmp = (int16_t)y - (normalization << (LOG_Q15_ACCURACY - LOG_Q15_INTEGER_PART));
/* q4.11 */
y = ((int32_t)tmp * LOG_Q15_INVLOG2EXP) >> 15;
return(y);
}
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
q15x8_t vlogq_q15(q15x8_t src)
{
int i;
int16x8_t c = vclzq_s16(src);
int16x8_t normalization = c;
/* 0.5 in q11 */
uint16_t inc = LOQ_Q15_Q16_HALF >> (LOG_Q15_INTEGER_PART + 1);
/* Will compute y = log2(x) for 1 <= x < 2.0 */
uint16x8_t x;
/* q11 */
uint16x8_t y = vdupq_n_u16(0);
/* q11 */
int16x8_t vtmp;
mve_pred16_t p;
/* Normalize and convert to q14 format */
vtmp = vsubq_n_s16(c,1);
x = vshlq_u16((uint16x8_t)src,vtmp);
/* Compute the Log2. Result is in q11 instead of q16
because we know 0 <= y < 1.0 but
we want a result allowing to do a
product on int16 rather than having to go
through int32
*/
for(i = 0; i < LOG_Q15_ACCURACY ; i++)
{
x = vmulhq_u16(x,x);
x = vshlq_n_u16(x,2);
p = vcmphiq_u16(x,vdupq_n_u16(LOQ_Q15_THRESHOLD));
y = vaddq_m_n_u16(y, y,inc,p);
x = vshrq_m_n_u16(x,x,1,p);
inc = inc >> 1;
}
/*
Convert the Log2 to Log and apply normalization.
We compute (y - normalisation) * (1 / Log2[e]).
*/
/* q11 */
// tmp = (int16_t)y - (normalization << (LOG_Q15_ACCURACY - LOG_Q15_INTEGER_PART));
vtmp = vshlq_n_s16(normalization,LOG_Q15_ACCURACY - LOG_Q15_INTEGER_PART);
vtmp = vsubq_s16((int16x8_t)y,vtmp);
/* q4.11 */
// y = ((int32_t)tmp * LOG_Q15_INVLOG2EXP) >> 15;
vtmp = vqdmulhq_n_s16(vtmp,LOG_Q15_INVLOG2EXP);
return(vtmp);
}
#endif
/**
@ingroup groupFastMath
*/
/**
@addtogroup vlog
@{
*/
/**
@brief q15 vector of log values.
@param[in] pSrc points to the input vector in q15
@param[out] pDst points to the output vector in q4.11
@param[in] blockSize number of samples in each vector
@return none
*/
void arm_vlog_q15(
const q15_t * pSrc,
q15_t * pDst,
uint32_t blockSize)
{
uint32_t blkCnt; /* loop counters */
#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
q15x8_t src;
q15x8_t dst;
blkCnt = blockSize >> 3;
while (blkCnt > 0U)
{
src = vld1q(pSrc);
dst = vlogq_q15(src);
vst1q(pDst, dst);
pSrc += 8;
pDst += 8;
/* Decrement loop counter */
blkCnt--;
}
blkCnt = blockSize & 7;
#else
blkCnt = blockSize;
#endif
while (blkCnt > 0U)
{
*pDst++ = arm_scalar_log_q15(*pSrc++);
/* Decrement loop counter */
blkCnt--;
}
}
/**
@} end of vlog group
*/
#endif // EIDSP_LOAD_CMSIS_DSP_SOURCES
|