mohammad javad

mjm4dl 's models 244

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mjm4dl/slot_filling_intent_data_laptopdata_128_e2_cosine_sched

Text Generation • 8B • Updated Oct 19, 2024

mjm4dl/slot_filling_intent_data_laptopdata_64_e2_cosine_sched

Text Generation • 8B • Updated Oct 18, 2024 • 1

mjm4dl/data_caption_price64_e4_cosine_sched

Text Generation • 0.6B • Updated Oct 13, 2024

mjm4dl/data_caption_price128_e2_cosine_sched

Text Generation • 3B • Updated Sep 15, 2024

mjm4dl/Gemma_slot_filling_intent_data_20may_laptop_64_e2_cosine_sched

Text Generation • 3B • Updated Aug 20, 2024

mjm4dl/slot_filling_intent_data_10_augest_64_e2_cosine_sched

Text Generation • 8B • Updated Aug 20, 2024

mjm4dl/WD_ADR_v1_really_mistral_mbh_new_data_r32_e5_linear_sched

Text Generation • 7B • Updated Aug 11, 2024

mjm4dl/WD_ADR_v1_really_mistral_mbh_new_data_r32_e5_cosine_sched

Text Generation • 7B • Updated Aug 11, 2024 • 1

mjm4dl/slot_filling_intent_data_10_augest_32_e3_cosine_sched

Text Generation • 8B • Updated Aug 11, 2024

mjm4dl/WD_ADR_v1_really_mistral_mbh_new_data_r16_e5_linear_sched

Text Generation • 7B • Updated Aug 11, 2024 • 1

mjm4dl/WD_ADR_v1_really_mistral_mbh_new_data_r16_e5_cosine_sched

Text Generation • 7B • Updated Aug 11, 2024

mjm4dl/WD_ADR_v1_really_mistral_mbh_new_data_r32_e3_linear_sched

Text Generation • 7B • Updated Aug 11, 2024 • 1

mjm4dl/WD_ADR_v1_really_mistral_mbh_new_data_r32_e3_cosine_sched

Text Generation • 7B • Updated Aug 11, 2024 • 11

mjm4dl/WD_ADR_v1_really_mistral_mbh_new_data_r16_e3_linear_sched

Text Generation • 7B • Updated Aug 11, 2024

mjm4dl/WD_ADR_v1_really_mistral_mbh_new_data_r16_e3_cosine_sched

Text Generation • 7B • Updated Aug 11, 2024 • 1

mjm4dl/WD_ADR_v1_mistral_mbh_new_data_r32_e5_linear_sched

Text Generation • 8B • Updated Aug 11, 2024 • 1

mjm4dl/WD_ADR_v1_mistral_mbh_new_data_r32_e5_cosine_sched

Text Generation • 8B • Updated Aug 11, 2024 • 7

mjm4dl/WD_ADR_v1_mistral_mbh_new_data_r16_e5_linear_sched

Text Generation • 8B • Updated Aug 11, 2024

mjm4dl/WD_ADR_v1_mistral_mbh_new_data_r16_e5_cosine_sched

Text Generation • 8B • Updated Aug 11, 2024 • 1

mjm4dl/WD_ADR_v1_mistral_mbh_new_data_r32_e3_linear_sched

Text Generation • 8B • Updated Aug 11, 2024

mjm4dl/WD_ADR_v1_mistral_mbh_new_data_r32_e3_cosine_sched

Text Generation • 8B • Updated Aug 11, 2024 • 3

mjm4dl/WD_ADR_v1_mistral_mbh_new_data_r16_e3_linear_sched

Text Generation • 8B • Updated Aug 11, 2024 • 3

mjm4dl/WD_ADR_v1_mistral_mbh_new_data_r16_e3_cosine_sched

Text Generation • 8B • Updated Aug 11, 2024

mjm4dl/WD_v1_mistral_mbh_new_data_r32_e5_linear_sched

Text Generation • 8B • Updated Aug 11, 2024

mjm4dl/WD_v1_mistral_mbh_new_data_r32_e5_cosine_sched

Text Generation • 8B • Updated Aug 11, 2024

mjm4dl/WD_v1_mistral_mbh_new_data_r16_e5_linear_sched

Text Generation • 8B • Updated Aug 11, 2024 • 17

mjm4dl/WD_v1_mistral_mbh_new_data_r16_e5_cosine_sched

Text Generation • 8B • Updated Aug 11, 2024 • 5

mjm4dl/WD_v1_mistral_mbh_new_data_r32_e3_linear_sched

Text Generation • 8B • Updated Aug 11, 2024 • 17

mjm4dl/WD_v1_mistral_mbh_new_data_r32_e3_cosine_sched

Text Generation • 8B • Updated Aug 11, 2024

mjm4dl/WD_v1_mistral_mbh_new_data_r16_e3_linear_sched

Text Generation • 8B • Updated Aug 11, 2024