Real-ESRGAN-general-x4v3 (MLX)

Apple MLX fp16 port of Real-ESRGAN realesr-general-x4v3 (SRVGGNetCompact, ×4), for super-resolution on Apple Silicon. Converted from the official xinntao/Real-ESRGAN release checkpoint (BSD-3-Clause).

Usage

pip install realesrgan-mlx   # https://github.com/xocialize/realesrgan-mlx
realesrgan-mlx -i input.png -o out/ -n realesr-general-x4v3

from realesrgan_mlx.pipeline_mlx import make_upsampler, upscale_image
up = make_upsampler("realesr-general-x4v3", tile=256)   # tile>0 caps memory on large images
out = upscale_image("input.png", up)

make_upsampler downloads these weights automatically.

Details

• Architecture: SRVGGNetCompact (num_feat=64, num_conv=32, act=prelu)
• Scale: ×4 · Precision: fp16
• Parity vs PyTorch: full-forward 4.1e-6 (CPU fp32); fp16 vs fp32 golden 2.0e-3.
• Denoise strength: this model ships with a paired model_wdn.safetensors; build_model(..., denoise_strength=s) blends s*model + (1-s)*wdn (1.0 keeps detail, 0.0 = max denoise).

License

BSD-3-Clause (upstream Real-ESRGAN, Xintao Wang et al.).