infer .inputs from routing/routing.json (restored): unblocks multiplier8x8, multiplier2x2, float16/32 add/normalize/pack/classify, and ~120 other circuits with explicit inter-gate wiring

eval_all: hash-keyed result cache (--cache-dir, --no-cache); README: bit-ordering scope rules; docs/ISA.md: opcode reference and end-to-end tutorial; docs/float-pipeline.md: composition gap notes

README + eval.py: align with current bit-cascaded ternary layout

Smoke test for play.py

Update play.py and eval.py to current bit-cascade comparator/mod-5 layout

Self-consistent .inputs metadata across all variants

Always regenerate .inputs from a fresh signal registry

cmd_inputs: detect and regenerate stale .inputs metadata

infer_inputs_for_gate: handle bit-cascade and ternary modular patterns

Cleanup pass: README accuracy, dead-code removal, CPU coverage

Full ternary: rebuild modular detectors and drop pattern_recognition

Bit-cascade division stages and all float comparators

Bit-cascade integer comparators (8/16/32-bit) with ternary weights

Add --ternary flag to quantize.py; rewrite buffer gates as +/-1 weights

Quantize weights to per-tensor minimum signed integer dtype

Add CPU program suite and fix CALL / V-flag handling

Promote 32-bit/64KB build to canonical, rewrite README

Add 18 prebuilt variants and unified eval harness

Delete cofiber_circuit.safetensors with huggingface_hub

Cofiber detection circuit: depth-3 threshold network, 61520 INT8 params, 2.18M gates

Fix priority encoder circuit logic

Add IEEE 754 float16/float32 arithmetic circuits

Parameterize CPU circuits for N-bit data and address widths

Standardize build output filenames with explicit bit widths

Add 32-bit arithmetic support with cascaded byte comparison

Add 32-bit ALU support with 1KB memory profile

Move SmolLM2 analysis files into smollm2 subfolder

Add trained hybrid extractor model (64% accuracy)

Add operator-aware splitting for word number extraction

Switch HybridExtractor from 256-way softmax to digit prediction

Add HybridExtractor for digit lookup + word number learning

Add PositionalDigitExtractor with direct digit supervision

Add SmolLM2-360M architecture analysis, fix PositionExtractor tokenization

Refactor LLM integration: consolidate training scripts, add extraction strategies

Remove verbose batch progress output from train_llm.py

Add LLM hidden state extraction training (train_llm.py)

Clarify proof-of-concept status: circuit validation complete, LLM integration in progress

Validate proof of concept: 100% arithmetic fitness with frozen circuits

Add LLM integration proof-of-concept framework and baseline evaluation

Remove duplicate function definitions in build.py

Add (A + B) × C expression circuit (parenthetical grouping)

Fold threshold_cpu.py into eval.py

Add order of operations circuit (arithmetic.expr_add_mul)

Add 3-operand adder circuit (arithmetic.add3_8bit)

Update roadmap: remove completed items, add 16-bit and float

Add configurable memory partitioning for LLM integration

Add PUSH/POP/RET stack operation tests

Add barrel shifter and priority encoder tests

Fix DEC eval test, add INC/DEC/NEG/ROL/ROR tests

Add INC, DEC, NEG, ROL, ROR, stack ops, barrel shifter, priority encoder