Threshold Logic Circuits
Collection
Boolean gates, voting functions, modular arithmetic, and adders as threshold networks.
β’
248 items
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Updated
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1
2x2 array multiplier. Regular structure with rows of AND gates and adders.
Inputs: A[1:0], B[1:0] (4 inputs)
Outputs: P[3:0] (4 outputs)
A1 A0
β β
B0 βββΌββββββΌββββββΊ P0
β β β β
B1 ββββββΌββββββ€
β β β
βΌ βΌ βΌ
P3 P2 P1
Regular grid of AND-adder cells. Simple, predictable timing.
| Inputs | 4 |
| Outputs | 4 |
| Neurons | 10 |
| Layers | 3 |
| Parameters | 44 |
| Magnitude | 44 |
MIT