Threshold Logic Circuits
Collection
Boolean gates, voting functions, modular arithmetic, and adders as threshold networks.
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4-bit carry lookahead adder. Computes all carries in parallel using generate (G) and propagate (P) signals, avoiding ripple delay.
Inputs: A[3:0], B[3:0], Cin (9 inputs)
Outputs: S[3:0], Cout (5 outputs)
For each bit i:
P_i = A_i XOR B_i (propagate)
G_i = A_i AND B_i (generate)
Carries computed in parallel:
C1 = G0 + P0·Cin
C2 = G1 + P1·G0 + P1·P0·Cin
C3 = G2 + P2·G1 + P2·P1·G0 + P2·P1·P0·Cin
Cout = G3 + P3·C3
Sum bits:
S_i = P_i XOR C_i
| A | B | Cin | S | Cout |
|---|---|---|---|---|
| 0000 | 0000 | 0 | 0000 | 0 |
| 0001 | 0001 | 0 | 0010 | 0 |
| 1111 | 0001 | 0 | 0000 | 1 |
| 1111 | 1111 | 1 | 1111 | 1 |
Binary: A + B + Cin = (Cout << 4) | S
| Component | Neurons |
|---|---|
| P/G generation | 8 |
| Carry lookahead | 8 |
| Sum XORs | 8 |
Total: 24 neurons, 108 parameters, 4 layers
Ripple carry: O(n) delay as each carry waits for previous Carry lookahead: O(1) delay for carry computation (parallel)
For 4 bits: CLA computes all carries simultaneously.
from safetensors.torch import load_file
w = load_file('model.safetensors')
# Verify: all 512 input combinations (16 x 16 x 2) produce correct sums
threshold-carrylookahead4bit/
├── model.safetensors
├── create_safetensors.py
├── config.json
└── README.md
MIT