neural_reflect: condense its README section to the family's house style; remove the version tag from the module and the model manifest

README.md

@@ -526,49 +526,28 @@ out = H( w0·sig[eff(a0,i0)] + w1·sig[eff(a1,i1)] + bias ) ;   sig[eff(oa,oidx)
 `G` recurrences sweep the netlist once; `G` sweeps settle any acyclic netlist
 regardless of gate order, so U reproduces the family's combinational evaluation.
 
-- **Universality.** `compile_to_reflect` maps any ≤2-input family `Net` to a
-  stored netlist. Compiled this way, a ripple-carry adder and the SUBLEQ
-  machine's datapath, the family's own subtract-and-branch logic, run through
-  the interpreter bit-exact; the datapath is checked against the reference over
-  all 65,536 `(M[A], M[B])` operand pairs. Results do not depend on the order
-  the gates are stored in.
-- **Scale.** When the netlist is read by gate index rather than by address, the
-  addressed span stays small as the gate count grows, so U holds a circuit far
-  larger than its wire space. The 156-gate SUBLEQ datapath is interpreted with
-  a 272-signal addressed span.
-- **A complete machine hosted inside the interpreter.** A stored microprogram
-  holds a whole SUBLEQ machine: its 32-byte memory lives in signals, and the
-  interpreter's own indexed addressing (set `PTR` to a byte address, read or
-  write the eight bit-planes) serves as the machine's memory-access hardware.
-  266 stored gates fetch three operand bytes, read two data bytes, subtract,
-  write the result back, and branch, one instruction per sweep; the memory and
-  program counter carry across sweeps. One instruction is exact over 4,096
-  random `(memory, PC)` states, and a stored countdown program runs a loop to a
-  halt with its final memory matching the reference emulator.
-- **Self-reference.** When the netlist is address-reachable, a gate can write
-  into it: a stored gate edits the weights that define it. The index flag adds
-  `PTR`, so a fixed-size program walks an address range; one such program
-  streams the netlist's own bytes to the output device, emitting its own
-  description. A single program computes `a & b` and then edits its own gate so
-  the next sweep computes `a & ~b`, and a program-set `BANK` flag switches the
-  interpreter to a different resident machine without an external load step.
-- **State.** A stored netlist with feedback holds state across sweeps: a 2-bit
-  counter advances `0, 1, 2, 3, 0` as U is iterated.
-- **Physical reading.** One recurrence is one matrix-vector product followed by
-  a threshold; each write is one bit of the state. On a memristive crossbar
-  that bit is a conductance, so a program editing the netlist region is the
-  computation editing the array's own weights.
-
-Verified against a reference interpreter: exhaustive single-gate semantics
-(every ternary weight pair, bias, and input assignment), single-step agreement
-on random full states with halted states as fixed points, bit-exact
-interpretation of the ripple-carry adder and the SUBLEQ datapath (all 65,536
-pairs) under sorted and shuffled gate order, one hosted SUBLEQ instruction over
-4,096 random memory states and a stored program run to a halt, the
-self-reproduction, self-rewrite, and bank-switch programs, the counter holding
-state through feedback, and equality of the compiled matrix form with the gate
-graph, the 0.5 comparator margin measured under read noise and conductance
-mismatch.
+- **Universal over the family, at scale.** `compile_to_reflect` maps any
+  ≤2-input family `Net` to a stored netlist; a ripple-carry adder and the
+  family's own SUBLEQ datapath run through U bit-exact, the datapath checked
+  against the reference over all 65,536 operand pairs and independent of the
+  order the gates are stored in. Because the netlist is read by gate index
+  rather than by address, the addressed signal span stays small as the gate
+  count grows.
+- **A complete stored machine runs inside it.** The whole SUBLEQ machine, its
+  32-byte memory held in signals, executes as a 266-gate microprogram: fetch
+  three operand bytes, read two data bytes, subtract, write the result back,
+  branch, one instruction per sweep, with the interpreter's own indexed
+  addressing serving as the memory-access hardware and the memory and program
+  counter carrying across sweeps. A stored countdown program runs its loop to a
+  halt with final memory matching the reference emulator, and one instruction
+  is exact over 4,096 random memory states.
+- **The program is its own weights.** When the netlist is address-reachable a
+  gate writes into it: one program streams the netlist's own bytes out the
+  output device, another computes `a & b` and then rewrites its own gate so the
+  next sweep computes `a & ~b`, and a `BANK` flag runs a different resident
+  machine in place. A netlist with feedback holds state across sweeps (a 2-bit
+  counter), and the compiled matrix form equals the gate graph within the same
+  0.5 comparator margin, measured under read noise and conductance mismatch.
 
 ```bash
 python src/reflect.py verify     # universality, a hosted SUBLEQ machine, quine, metamorphosis

src/reflect.py

@@ -29,14 +29,17 @@ G recurrences sweep the netlist once; G sweeps settle any acyclic netlist
 regardless of gate order, so U reproduces the family's combinational evaluation.
 
 Capabilities:
-  - compile_to_reflect() maps any <=2-input family Net to a stored netlist; the
-    family's full-adder cell runs through the interpreter bit-exact.
-  - A netlist stored in arbitrary gate order yields the combinational result,
-    since G sweeps relax to the fixed point.
-  - A program streams the netlist's own bytes to the output device, emitting its
-    own description.
-  - A program copies its bank into the other bank and sets the BANK flag to run
-    a different resident machine, without an external load step.
+  - compile_to_reflect() maps any <=2-input family Net to a stored netlist; a
+    ripple-carry adder and the family's SUBLEQ datapath run through the
+    interpreter bit-exact, independent of the order the gates are stored in.
+  - Read by gate index, the netlist can far exceed the addressed signal span: a
+    whole SUBLEQ machine, its memory held in signals, runs one instruction per
+    sweep with the interpreter's indexed addressing as its memory-access
+    hardware.
+  - A program streams the netlist's own bytes to the output device; another
+    rewrites its own gate so the next sweep computes a different function; a
+    BANK flag runs a different resident machine. A netlist with feedback holds
+    state across sweeps.
   - The accumulator width follows from F and the bias width. U compiles to a
     recurrent ternary matrix stack equal to the gate graph, with a measured
     noise and conductance-mismatch margin.
@@ -551,7 +554,7 @@ def build(cfg, save=True):
     tensors = {f"matrix.layer{i:03d}.weight": Wt for i, (Wt, _) in enumerate(layers)}
     tensors.update({f"matrix.layer{i:03d}.bias": B for i, (_, B) in enumerate(layers)})
     for k, v in (("signals", cfg.S), ("gates", cfg.G), ("banks", cfg.banks),
-                 ("state_bits", cfg.STATE_BITS), ("layers", info["layers"]), ("version", 2)):
+                 ("state_bits", cfg.STATE_BITS), ("layers", info["layers"])):
         tensors[f"manifest.{k}"] = torch.tensor([float(v)])
     meta = {"machine": "reflect", "weight_quantization": "ternary",
             "config": json.dumps({"A": cfg.A, "S": cfg.S, "G": cfg.G, "F": cfg.F,
@@ -717,7 +720,7 @@ def verify(cfg, device):
           f"(a stored machine holding state through feedback): {seq}")
     ok &= kgood
 
-    print("\nREFLECT v2 (universality, order, quine, metamorphosis, sequential state):",
+    print("\nneural_reflect (universality, order, quine, metamorphosis, sequential state):",
           "PASS" if ok else "FAIL")
     return ok
 
@@ -1090,7 +1093,7 @@ def analog(cfg, device):
 
 
 def main():
-    ap = argparse.ArgumentParser(description="neural_reflect v2")
+    ap = argparse.ArgumentParser(description="neural_reflect")
     ap.add_argument("cmd", choices=["build", "verify", "analog", "all"])
     ap.add_argument("--device", default="cuda" if torch.cuda.is_available() else "cpu")
     args = ap.parse_args()

variants/neural_reflect.safetensors

@@ -1,3 +1,3 @@
 version https://git-lfs.github.com/spec/v1
-oid sha256:d653009bb03b30bf2ce2cc7a30e48c3cf284d722750c9a3aad0a51ce59fb4691
-size 157772226
+oid sha256:e2264c9149218afcd5dc534ad422170b1dad3a06ccb767c6f973e9a3a6618835
+size 157772150