Threshold Logic Circuits
Collection
Boolean gates, voting functions, modular arithmetic, and adders as threshold networks.
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248 items
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Updated
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1
2x2 Dadda tree multiplier. Uses height-reduction algorithm to minimize adder stages.
Inputs: A[1:0], B[1:0] (4 inputs)
Outputs: P[3:0] (4 outputs)
P = A × B (unsigned)
Reduces partial product columns to heights in sequence: 2, 3, 4, 6, 9, 13... For 2x2, columns are already within limits, so minimal reduction needed.
A1·B0 A0·B0
A1·B1 A0·B1
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P3 P2 P1 P0
| Inputs | 4 |
| Outputs | 4 |
| Neurons | 10 |
| Layers | 3 |
| Parameters | 44 |
| Magnitude | 44 |
MIT