threshold-srt-divider

4-bit by 2-bit SRT divider. Uses redundant quotient digits.

Circuit

Inputs: N[3:0] (dividend), D[1:0] (divisor)
Outputs: Q[3:0] (quotient), R[1:0] (remainder)

SRT Algorithm

SRT (Sweeney, Robertson, Tocher) uses redundant digit set {-1, 0, +1}:

  • Allows imprecise comparisons (simpler hardware)
  • Quotient converted to standard form at end
  • Used in high-performance FPUs (including Pentium FDIV bug)

Parameters

Inputs 6
Outputs 6
Neurons 12
Layers 4
Parameters 84
Magnitude 96

License

MIT

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