Threshold Logic Circuits
Collection
Boolean gates, voting functions, modular arithmetic, and adders as threshold networks.
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269 items
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Updated
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1
3x3 Wallace tree multiplier. Multiplies two 3-bit unsigned integers using carry-save reduction.
multiply(A[2:0], B[2:0]) -> P[5:0]
Range: 0-7 x 0-7 = 0-49
Wallace trees use 3:2 compressors (full adders) to reduce partial products in parallel, minimizing the critical path compared to ripple-carry approaches.
b2 b1 b0
x a2 a1 a0
βββββββββββββββββββββ
a0b2 a0b1 a0b0
a1b2 a1b1 a1b0
a2b2 a2b1 a2b0
βββββββββββββββββββββββββββββ
p5 p4 p3 p2 p1 p0
Column counts: [1, 2, 3, 2, 1] at positions [0, 1, 2, 3, 4]
Col 0: pp00 βββββββββββββββββββββββββββββββββββββΊ p0
Col 1: pp01 ββ¬ββΊ HA ββ¬ββΊ p1
pp10 ββ βββΊ c1 βββββββββββ
β
Col 2: pp02 ββ¬ββΊ FA ββ¬ββΊ s2 βββΊ HA βββΌβββΊ p2
pp11 ββ€ βββΊ c2 ββ β
pp20 ββ β β
βΌ β
Col 3: pp12 ββ¬ββΊ HA ββ¬ββΊ s3 ββΊ HA βββΌβββΊ p3
pp21 ββ βββΊ c3 βββββββββΌββ
β β
Col 4: pp22 ββββββββββΊ HA βββΊ HA βββ΄ββ΄ββΊ p4
β
Col 5: ββββββββββββββββββββββββββββββββββΊ p5
| Inputs | 6 |
| Outputs | 6 |
| Neurons | 37 |
| Layers | 5 |
| Parameters | 147 |
| Magnitude | 133 |
| Approach | Depth | Parallelism |
|---|---|---|
| Ripple-Carry | O(n) | Low |
| Wallace Tree | O(log n) | High |
For larger multipliers, Wallace trees significantly reduce latency.
from safetensors.torch import load_file
w = load_file('model.safetensors')
# 7 x 7 = 49
# All 64 combinations verified
MIT