Commit History

Delete old fp16mixed names + retired medium dit_bf16.trt (fp16 rename shipped)
48e34e2
verified

cortexelus commited on

Rename fp16mixed->fp16 DiT/T5Gemma engines+onnx (copies; deletes follow after code merge)
3f29675
verified

cortexelus commited on

sa3-m fp8: ship calibrated-bakedmin engine (176 fp8 GEMM + 96 bf16 fused MHA + baked fp32 RoPE; calibration by @ryanontheinside #47)
4697212
verified

cortexelus commited on

Upload tensorRT/sm_90/sa3-m/dit_fp8.trt with huggingface_hub
feddb8b
verified

cortexelus commited on

Fix the bf16 medium DiT: bake RoPE's tables into the graph (clipping 3.112% -> 0.014%) (#5)
6152b1d

cortexelus commited on

Rebuild medium DiT fp16-mixed engines (sm_90 + new sm_120): attention now fuses, 4.3x faster (#4)
06debc3

cortexelus commited on

Add bf16 medium DiT TRT engine (sm_90) — FMHA-fused, medium default (#1)
9a38efb

mattricesound cortexelus commited on

DiT engines: replace BF16 with FP16-mixed (FP32 islands) + add FP32 variants
97651ef

Cortexelus Claude Opus 4.7 (1M context) commited on

DiT TRT engines: rebuild with profile min=1 (sm_90)
5f27021

Cortexelus Claude Opus 4.7 (1M context) commited on

Reorganize tensorRT/ into per-arch subdirs; rebuild DiT engines with conditioner baked in
08c1abe

Cortexelus commited on