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stupid-zwl
/
rtlmul
like
0
Safetensors
JackieZhang/chipgpt
scale-lab/MetRex
code
verilog
RTL
PPA-prediction
hardware-design
arxiv:
2305.14019
arxiv:
2403.11202
License:
mit
Model card
Files
Files and versions
xet
Community
Copy to bucket
new
main
rtlmul
/
RL_model_grpo
/
tokenizer.json
Commit History
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197a209
verified
stupid-zwl
commited on
Apr 7
stupid-zwl commited on 