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stupid-zwl
/
rtlmul
like
0
Safetensors
JackieZhang/chipgpt
scale-lab/MetRex
code
verilog
RTL
PPA-prediction
hardware-design
arxiv:
2305.14019
arxiv:
2403.11202
License:
mit
Model card
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rtlmul
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History:
7 commits
stupid-zwl
Update README.md
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RL_model_grpo
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qwen3_8b_sft_rtl
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README.md
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