text stringlengths 59 71.4k |
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/////////////////////////////////////////////////////////////
// Created by: Synopsys DC Expert(TM) in wire load mode
// Version : L-2016.03-SP3
// Date : Wed Oct 19 14:29:56 2016
/////////////////////////////////////////////////////////////
module FSM_Add_Subtract ( clk, rst, rst_FSM, beg_FSM, zero_flag_i,
... |
#include <bits/stdc++.h> using namespace std; const int maxn = 5e5 + 10; pair<long long, long long> p[maxn]; long long ans[maxn]; int main() { int n, num = 0, cnt = 0; long long l, r; scanf( %d , &n); for (int i = 1; i <= n; i++) { scanf( %lld%lld , &l, &r); p[++num].first = l; ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; int n, m; int lace[110][110]; int main() { int x, y, i, j; while (cin >> n >> m) { memset(lace, 0, sizeof(lace)); for (i = 1; i <= m; i++) { cin >> x >> y; lace[x][y] = lace[y][x] = 1; } int xx, ans = 0; while (1... |
#include <bits/stdc++.h> using namespace std; vector<int> adj[100100], ans; int arr[100100], cnt[100100]; bool visited[100100]; int n, m; void dfs(int v) { for (vector<int>::iterator it = adj[v].begin(); it != adj[v].end(); it++) { cnt[*it]++; if (cnt[*it] == arr[*it]) { cnt[*it]++; ... |
#include <bits/stdc++.h> using namespace std; long long a[200001]; int main() { long long t, m = 0, i, n, k, ans; ; scanf( %lld%lld , &n, &k); for (i = 0; i < n; i++) scanf( %lld , &a[i]); sort(a, a + n); for (i = (n + 1) / 2; i < n; i++) { t = m; m += (a[i] - a[i - 1]) * (i - ... |
#include <bits/stdc++.h> using namespace std; void frepn() { freopen( .in , r , stdin); freopen( .out , w , stdout); } const int N = 50500; const long long INF = (1e17) + 777; const int mod = (1e9) + 7; int n, a[N], k, t; int ans, ans2, a... |
#include <bits/stdc++.h> using namespace std; const long long N = 2e5 + 10; const long long inf = 1e18; long long n, m, Q, E[N][3], l[N], r[N], op[N]; long long hd[N], ht = 1, tf[N], id[N]; long long cnt = 0; struct edge { long long v, w, n; } e[N * 2]; void addedge(long long u, long long v, long ... |
// (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of Xilinx, Inc. and is protected under U.S. and
// international copyright and other intellectual property
// laws.
//
// DISCLAIMER
// This disclaimer is not a license and does not grant ... |
#include <bits/stdc++.h> using namespace std; const int sz = 105; long long int r[sz], a[sz][sz], b[sz][sz], ans[sz][sz], m; void multiply(long long int a[][sz], long long int b[][sz]) { for (int i = 0; i < m; i++) { for (int j = 0; j < m; j++) { ans[i][j] = 0; for (int k = 0; k < m; k... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
#include <bits/stdc++.h> const double pi = 3.141592653589793238462643383279; using namespace std; long long GCD(long long a, long long b) { if (b == 0) return a; return GCD(b, a % b); } int arr[1000010]; int rev[1000010]; int main() { cin.tie(0); ios::sync_with_stdio(false); cout << fi... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
/**
* ------------------------------------------------------------
* Copyright (c) All rights reserved
* SiLab, Institute of Physics, University of Bonn
* ------------------------------------------------------------
*/
`timescale 1ps/1ps
`default_nettype none
module spi
#(
parameter BASEADDR = 16'h0000,
... |
#include <bits/stdc++.h> using namespace std; const long long N = 1234567; const long long MOD = 998244353; void solve() { long long n, m, i, j = 0, k, l = 0, ok = 0, o = 0, p, ans = 0, x, y, a[30]; string s; cin >> n >> k >> s; for (long long i = 0; i < k / 2; i++) { map<char, long long> ... |
#include <bits/stdc++.h> using namespace std; const int INF = 10000000; int main() { int n; cin >> n; string a; cin >> a; for (int j = 1; j <= 25; j++) for (int i = 0; i + 4 * j < a.size(); i++) { if (a[i] == * && a[i + j] == * && a[i + 2 * j] == * && a[i + 3 * ... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
//======================================================================
//
// siphash.v
// ---------
// Top level wrapper for the Verilog 2001 implementation of SipHash.
// This wrapper provides a 32-bit memory like interface.
//
//
// Copyright (c) 2012, Secworks Sweden AB
// All rights reserved.
//
// Redistribution... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; const int M = 110; const int inf = 1000000000; int main() { int n, m, g[M][M] = {0}; double f[M][M] = {0.0}; cin >> n >> m; for (int i = 1; i <= n; i++) { for (int j = 1; j <= n; j++) { g[i][j] = inf; f[i][j] = 0; } ... |
`timescale 1ns / 1ps
////////////////////////////////////////////////////////////////////////////////
// Company: California State University San Bernardino
// Engineer: Bogdan Kravtsov
// Tyler Clayton
//
// Create Date: 11:46:02 10/17/2016
// Module Name: ID_EX
// Project Name: MIPS
//... |
#include <bits/stdc++.h> using namespace std; const double PI{3.1415926535897932384626433832795}; const int MOD{static_cast<int>(1e9 + 7)}; const double EPS{1e-9}; template <typename T> T ModAdd(const T &a, const T &b, const int &mod = MOD) { return ((a) % mod + (a) % mod) % mod; } template <typenam... |
`timescale 1ns / 1ps
////////////////////////////////////////////////////////////////////////////////
// Dual 74HC595 interface (16 bit) for the YL-3
// Original Engineer: Jon Carrier (https://gist.github.com/jjcarrier/)
// Re-written: EllisGL
//
// Dependencies: CLK=50MHz. Slower clocks should also work. If a faster... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
#include <bits/stdc++.h> using namespace std; const long long M = 1000000007; const double pi = 3.141592653589793238463; bool vow(char ch) { return ch == a || ch == e || ch == i || ch == o || ch == u ; } bool isPrime(long long n) { for (long long i = 2; i * i <= n; i++) if (n % i == 0... |
#include <bits/stdc++.h> using namespace std; const int INF = 0x3f3f3f3f; const double eps = 1e-6; template <class T> T gcd(T a, T b) { if (!b) return a; return gcd(b, a % b); } const int maxn = 1e6 + 10; int n, m; int phi[maxn]; int a[maxn]; int get(int x) { int res = x; for (long... |
/*
-- ============================================================================
-- FILE NAME : uart_rx.v
-- DESCRIPTION : UARTÊÜÐť⥸¥å©`¥ë
-- ----------------------------------------------------------------------------
-- Revision Date Coding_by Comment
-- 1.0.0 2011/06/27 suito ÐÂÒ×÷³É
-- ======... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; const int INF = (int)1e9; const int N = 155; int old[N][N * N]; int now[N][N * N]; int q[N]; int main() { ios_base::sync_with_stdio(0); cin.tie(nullptr); int n, k, s; cin >> n >> k >> s; for (int i = 0; i < n; i++) cin >> q[i]; for (int... |
`include "hi_simulate.v"
/*
pck0 - input main 24Mhz clock (PLL / 4)
[7:0] adc_d - input data from A/D converter
mod_type - modulation type
pwr_lo - output to coil drivers (ssp_clk / 8)
adc_clk - output A/D clock signal
ssp_frame - output SSS frame indicator (goes high while the 8 bits are shift... |
module loacal_sw(
input clk,
input reset,
output reg [31:0] data_out,
input [64:0] command,
input command_wr,
output reg ale,
output reg cs_n,
output reg rd_wr,
output reg [31:0] data,
input ack_n_um,
input [31:0] rdata_um
);
reg command_rd;
reg [64:0] command_q_r;
wire [64:0] command_q;
wire comm... |
#include <bits/stdc++.h> using namespace std; void solve() { long long n, k; cin >> n >> k; string s; cin >> s; vector<long long> l_r, r_l; long long count = k + 1; for (long long i = 0; i < n; i++) { if (s[i] == 1 ) { count = 0; l_r.push_back(0); } else if (... |
#include <bits/stdc++.h> using namespace std; int n, m, a[300010][27]; int val[300010], cost[610]; int fail[300010]; string st[610]; char s[300010], p[300010]; int main() { int T, op, len, slen, i, j, k, x; long long ans; for (scanf( %d , &T); T; --T) { scanf( %d %s , &op, s); len ... |
/*
File: ewrapper_io_rx_slow.v
This file is part of the Parallella Project .
Copyright (C) 2013 Adapteva, Inc.
Contributed by Roman Trogan <>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foun... |
// -*- Mode: Verilog -*-
// Filename : basic.v
// Description : Basic Picoblaze Example Project
// Author : Philip Tracton
// Created On : Thu May 21 22:30:44 2015
// Last Modified By: Philip Tracton
// Last Modified On: Thu May 21 22:30:44 2015
// Update Count :... |
// Computer_System_mm_interconnect_0_avalon_st_adapter_001.v
// This file was auto-generated from altera_avalon_st_adapter_hw.tcl. If you edit it your changes
// will probably be lost.
//
// Generated using ACDS version 16.1 196
`timescale 1 ps / 1 ps
module Computer_System_mm_interconnect_0_avalon_st_adapter_001 #... |
// ***************************************************************************
// ***************************************************************************
// Copyright 2014 - 2017 (c) Analog Devices, Inc. All rights reserved.
//
// In this HDL repository, there are many different and unique modules, consisting
// of... |
#include <bits/stdc++.h> using namespace std; int n, x, fr, x0, L, R, len, l[4000], f[4000]; string s1[4000], s2[4000], ss, p, p1; int main() { ios::sync_with_stdio(0); cin >> n; for (int i = (1); i <= (n); i++) { cin >> s1[i]; l[i] = s1[i].length() - 1; } for (int i = (1); i <= ... |
#include <bits/stdc++.h> using namespace std; int32_t main() { ios_base::sync_with_stdio(false); long long n, m, k; cin >> n >> m >> k; long long l = 1, r = 1e9 + 1; while (r - l > 1) { long long mid = (l + r) / 2; long long ans = mid; if (k >= mid) ans += ((mid - 1) * mid) / 2... |
/*
Copyright (c) 2014-2018 Alex Forencich
Permission is hereby granted, free of charge, to any person obtaining a copy
of this software and associated documentation files (the "Software"), to deal
in the Software without restriction, including without limitation the rights
to use, copy, modify, merge, publish, distri... |
#include <bits/stdc++.h> using namespace std; int main() { long long int t, n, ar[100010]; long long int xr[50010], yr[50010], mr[50010]; while (cin >> t) { for (int i = 0; i < t; i++) { cin >> n; xr[i] = 0; yr[i] = 0; mr[i] = 0; for (int j = 0; j < n; j++) ... |
`timescale 1ns / 1ps
module mac_test();
reg reset;
reg [31:0] data_in;
reg data_in_clock;
reg data_in_enable;
reg data_in_start;
reg data_in_end;
reg tx_clock;
reg carrier_sense;
reg collision;
wire tx_enable;
wire [7:0] tx_data;
reg [31:0]... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
`timescale 1ns/10ps
`define CLK_PERIOD 4.0
module PATTERN(
output reg clk,
output reg [2:0] circle1,
output reg [2:0] circle2,
output reg [4:0] in,
output reg in_valid,
output reg rst_n,
input [5:0] out,
input out_valid
);
reg [4:0] pixel1 [0:7];
reg [4:0] p... |
#include <bits/stdc++.h> using namespace std; const int N = 17; int n, m, x, y, z, inf; int bin[N], d[N][N], du[N], f[1 << N], q[N]; int main() { for (register int i = 1; i <= 16; ++i) bin[i] = 1 << (i - 1); int sum = 0; scanf( %d , &n); scanf( %d , &m); memset(d, 60, sizeof(d)); inf =... |
// ======================================================================
// CBC-DES encryption/decryption
// algorithm according to FIPS 46-3 specification
// Copyright (C) 2013 Torsten Meissner
//-----------------------------------------------------------------------
// This program is free software; you can redistri... |
/*
Copyright (C) 2014 Adapteva, Inc.
Contributed by Fred Huettig <>
Contributed by Andreas Olofsson <>
This program is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at... |
#include <bits/stdc++.h> using namespace std; int t; char a[30]; int main() { cin >> t; while (t--) { string s; cin >> s; int len = s.size(), id = 0; for (int i = 0; i < len; i++) { int temp = 1; while (s[i + 1] == s[i]) { i++; temp++; ... |
#include <bits/stdc++.h> using namespace std; long long a[2005]; vector<long long> Z; vector<long long> F; int main() { long long n, i, S = 0; cin >> n; for (i = 0; i < n; i++) { cin >> a[i]; S += a[i]; } sort(a, a + n); reverse(a, a + n); for (i = 0; i < n; i++) { ... |
// megafunction wizard: %ROM: 1-PORT%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: altsyncram
// ============================================================
// File Name: rom16x2048.v
// Megafunction Name(s):
// altsyncram
//
// Simulation Library Files(s):
// altera_mf
// =============================... |
// Copyright 1986-2016 Xilinx, Inc. All Rights Reserved.
// --------------------------------------------------------------------------------
// Tool Version: Vivado v.2016.4 (win64) Build Mon Jan 23 19:11:23 MST 2017
// Date : Tue Mar 28 05:22:50 2017
// Host : DESKTOP-B1QME94 running 64-bit major releas... |
// --------------------------------------------------------------------
// Copyright (c) 2007 by Terasic Technologies Inc.
// --------------------------------------------------------------------
//
// Permission:
//
// Terasic grants permission to use and modify this code for use
// in synthesis for all Ter... |
module mult_wrap (
input ck,
input [31:0] i_a, i_b,
input [3:0] i_htId,
input i_vld,
output [63:0] o_res,
output [3:0] o_htId,
output o_vld
);
// Wires & Registers
wire [63:0] c_t6_res;
wire [3:0] c_t1_htId;
wire c_t1_vld;
reg [3:0] r_t2_htId, r_t3_htId, r_t4_htId, r_t5_htId, r_... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
//-----------------------------------------------------------------------------
//
// (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of Xilinx, Inc. and is protected under U.S. and
// international copyright and other intellectual property
... |
#include <bits/stdc++.h> using namespace std; vector<int> solve(vector<int> a) { int n = (int)a.size(); vector<int> dp(n + 1, 1e9); dp[0] = -1e9; vector<int> ret(n); for (int i = 0; i < n; i++) { int x = (int)(upper_bound(dp.begin(), dp.end(), a[i]) - dp.begin()); ret[i] = x; d... |
// -*- Mode: Verilog -*-
// Filename : cpu.v
// Description : Complete Picoblaze Design
// Author : Philip Tracton
// Created On : Thu May 21 22:33:37 2015
// Last Modified By: Philip Tracton
// Last Modified On: Thu May 21 22:33:37 2015
// Update Count : 0
// St... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
#include <bits/stdc++.h> using namespace std; int toint(char a) { return (a - 0 ); } int main() { ios::sync_with_stdio(0); cin.tie(0); cout.tie(0); int tst; cin >> tst; while (tst--) { string a, s; cin >> a >> s; long long int num = stoll(a); long long int sum = st... |
#include <iostream> #include <bits/stdc++.h> #include <stdio.h> #include <cstdlib> #include<algorithm> #include<string.h> #include<map> #include<math.h> using namespace std; int main() { int t; cin>>t; while(t--) { int n,k; cin>>n>>k;int count =0; vector <int> v,a(n);int max=n;... |
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2015 by Johan Bjork.
// SPDX-License-Identifier: CC0-1.0
parameter N = 4;
interface a_if #(parameter PARAM = 0) ();
logic long_name;
modport source (output long_name);
modpo... |
// "and_tree_plusarg.v"
// This variant demonstrates using a plusarg to pass in the name of
// a HAC object file.
// @vcs-flags@ -P pli.tab -sverilog
// @haco@ and_tree.haco-c
// @plusargs@ +PRSIM_OBJ=and_tree.haco-c
`timescale 1ps / 1ps
// `include "standard.v"
`include "standard.v-wrap"
//-------------------------... |
`timescale 1ns / 1ps
module tx_sm_tb ();
`include "dut.v"
integer i;
initial
begin
//$dumpfile("test.vcd");
//$dumpvars(0,tx_sm_tb,U_tx_sm);
end
initial
begin
#15 reset = 0;
// Will initially wait IFG before making any transmissions
// Set fifo_count to 1 and check IFG delay before tx_enable i... |
#include <bits/stdc++.h> using namespace std; const double EPS = 1e-10; const double PI = acos(-1.0); int dp[51][51][51]; int dfs(int n, int m, int k) { if (dp[n][m][k] >= 0) return dp[n][m][k]; if (k == 0 || n * m == k) return dp[n][m][k] = 0; dp[n][m][k] = 1e9; for (int j = 0; j <= k; ++j) {... |
#include <bits/stdc++.h> using namespace std; const long long N = 8e6 + 7, mod = 998244353, root = 3; long long x[N], n, m, i, j, ma, mb, inv, res, b[N], ans[N], L, R[N]; long long pow_mod(long long x, long long n) { long long res = 1; while (n) { if (n & 1) res = 1LL * x * res % mod; x = 1L... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
module SensorFSM (
input Reset_n_i,
input Clk_i,
input In0_i,
input In1_i,
input In2_i,
input In3_i,
input In4_i,
input In5_i,
input In6_i,
input In7_i,
input In8_i,
input In9_i,
output Out0_o,
output Out1_o,
output Out2_o,
output Out3_o,
output Out4_o,
output Out5_o,
output Out6_o... |
// Copyright (c) 2014 Takashi Toyoshima <>.
// All rights reserved. Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.
// TODO: NMI and IRQ handling is not correct. It should push PC and PSR to
// stack, and follow timing constraint. It must be realized by collaborati... |
#include <bits/stdc++.h> using namespace std; int main() { string x, y; cin >> x >> y; const auto n = int(x.size()); auto ok = true; for (auto i = 0; i < n; i++) ok &= y[i] <= x[i]; if (ok) cout << y << endl; else cout << -1 << endl; } |
#include <bits/stdc++.h> using namespace std; int main() { int n, s; string c; cin >> n >> c; s = n; string r = ; while (n > 0) { if (n % 2 == 0) { string y = ; y += c[s - n]; y += r; r = y; } else { r += c[s - n]; } n--; ... |
/*
* Copyright 2017 Google Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to... |
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2011 by Wilson Snyder.
module t_embed1_wrap (/*AUTOARG*/
// Outputs
bit_out, vec_out, wide_out, did_init_out,
// Inputs
clk, bit_in, vec_in, wide_in, is_ref
);
/*AU... |
#include <bits/stdc++.h> using namespace std; struct point { point() : x(0), y(0){}; point(long long x, long long y) : x(x), y(y){}; long long x; long long y; }; point operator+(point a, point b) { return point(a.x + b.x, a.y + b.y); } point operator-(point a, point b) { return point(a.x - b.x... |
#include <bits/stdc++.h> using namespace std; int main() { int a, b, c, d, i, j, x, y = 0, w, z = 0, e; cin >> a >> b >> c >> d; if (d % c != 0) { cout << 0; return 0; } w = d / c; if (c == d) { if (c >= a && c <= b) cout << 1; else cout << 0; re... |
module audio_player(CLK, PB_PLY, VOL, PB_RST, LEDS, SEGA, SEGD, P,
i2c_rst, i2c_scl, i2c_sda, i2c_vcc, i2c_gnd, i2c_beat,
MemOe, MemWr, FlashRp, FlashCS, RamCS, ADDR,
EppAstb, EppDstb, EppWr, FlashStSts, RamWait, EppWait,
RamAdv, RamClk, RamCre, RamCS, RamLB, RamUB, EppDB, MemDB
... |
#include <bits/stdc++.h> char s[300010], p; int main() { int n, m, sum = 0, k, i; scanf( %d%d , &n, &m); scanf( %s , s); for (i = 1; i < n; i++) if (s[i] == . && s[i - 1] == . ) sum++; while (m--) { scanf( %d %c , &k, &p); if (p != . && s[k - 1] == . ) { if (s[k -... |
//Legal Notice: (C)2018 Altera Corporation. All rights reserved. Your
//use of Altera Corporation's design tools, logic functions and other
//software and tools, and its AMPP partner logic functions, and any
//output files any of the foregoing (including device programming or
//simulation files), and any associated do... |
#include <bits/stdc++.h> using namespace std; int n, s, i, a[1003], res, x; int main() { cin >> n >> x; for (i = 1; i <= n; i++) { cin >> a[i]; s += a[i]; } if (s <= 0) s *= (-1); res = s / x; if (s % x > 0) res++; cout << res; return 0; } |
#include <bits/stdc++.h> #pragma GCC target( sse4,avx ) const int p = 1000000007; int mul32(int x, int y) { return int(int64_t(x) * y % p); } int add32(int x, int y) { int res = x + y; if (res >= p) res -= p; return res; } int sub32(int x, int y) { int res = x - y; if (res < 0) res += p;... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
module test();
wire [1:0] n0 = 2'bzx;
wire [1:0] n1 = 2'b0x;
wire [1:0] n2 = 2'b1x;
wire [1:0] n3 = 2'bxx;
wire [1:0] n4 = 2'bxx;
wand [1:0] n5 = 2'bxx;
wor [1:0] n6 = 2'bxx;
assign n4 = 2'b0x;
assign n4 = 2'b0x;
assign n4 = 2'b1x;
assign n4 = 2'b1x;
assign n4 = 2'b1x;
assign n5 = 2'b0x;
assign n5 = 2'b0x;
assign n... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
// (c) Copyright 1995-2017 Xilinx, Inc. All rights reserved.
//
// This file contains confidential and proprietary information
// of Xilinx, Inc. and is protected under U.S. and
// international copyright and other intellectual property
// laws.
//
// DISCLAIMER
// This disclaimer is not a license and does not grant ... |
module EmitOneCH
(
input Transmit_CLK, //100M
input RX_Gate, //Transmit Enable
input [7:0] EmitDelay, //7th bit for Transmit Enable, 6:0 for Delay
input [5:0] Emit_Width, //Emit pulse wid... |
#include <bits/stdc++.h> using namespace std; int main() { long long t; cin >> t; while (t--) { long long n; cin >> n; for (long long i = 1; i <= n; i++) { cout << 1 << ; } cout << endl; } } |
/**
* ------------------------------------------------------------
* Copyright (c) All rights reserved
* SiLab, Institute of Physics, University of Bonn
* ------------------------------------------------------------
*/
`timescale 1ps/1ps
`default_nettype none
module i2c #(
parameter BASEADDR = 16'h... |
#include <bits/stdc++.h> using namespace std; int X, Y; int n; int cnt; bool used[1000][1000]; bool edge[1000][1000][4]; const int DX[] = {1, 0, -1, 0}, DY[] = {0, 1, 0, -1}; vector<int> ans; void dfs(int x, int y) { if (x < 0 || x >= X || y < 0 || y >= Y || used[x][y]) return; used[x][y] = tr... |
#include <bits/stdc++.h> using namespace std; const int maxn = 1e5 + 5; int A[maxn], MAX = 0; int main() { int n; cin >> n; for (int i = 0; i < n; i++) cin >> A[i]; sort(A, A + n); int ans = 0; for (int i = 0; i < n; i++) if (ans * A[i] + ans <= i) ans++; cout << ans; retur... |
#include <bits/stdc++.h> using namespace std; bool flag = 0; void sss(int &n, int &k) { if (flag == 0) n = n + k; else if (flag == 1) n = n - k; } void print(int &now, int k) { k += 48; if (k > now) { while (k != now) { printf( + ); now++; } } else i... |
#include <bits/stdc++.h> using namespace std; int main() { long i, j, t, a, b, m, n, c, d, y, x, k, s; t = 1; while (t--) { string s1, s2; cin >> s1 >> s2; if (s1 == s2) cout << s1; else cout << 1; } } |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/*
** -----------------------------------------------------------------------------**
** extjtag.v
**
** GPIO control
**
** Copyright (C) 2007 Elphel, Inc
**
** -----------------------------------------------------------------------------**
** This file is part of X353
** X353 is free software - hardware description ... |
#include <bits/stdc++.h> int main() { char a[110], b[110]; scanf( %s , a); getchar(); scanf( %s , b); int len = strlen(a); for (int i = 0; i < len; i++) { if (a[i] < b[i]) { printf( -1 ); return 0; } } for (int i = 0; i < len; i++) { if (a[i] == b[i]) ... |
module Sec5_SM(
input DigitalLDir,
input DigitalRDir,
input clk_i,
input reset_n,
output reg [3:0] outputs
// output reg Len,
// output reg Ldir,
// output reg Ren,
// output reg Rdir
);
reg [2:0] state;
reg [2:0] state_next;
parameter S0 = 3'b000; //Moving forward
parameter S1 = 3'b001; //Moving backwa... |
/**
* bsg_nonsynth_mem_1rw_sync_mask_write_byte_dma.v
*
*/
`include "bsg_defines.v"
module bsg_nonsynth_mem_1rw_sync_mask_write_byte_dma
#(parameter `BSG_INV_PARAM(width_p)
, parameter `BSG_INV_PARAM(els_p)
, parameter `BSG_INV_PARAM(id_p)
, parameter data_width_in_bytes_lp=(width_p>>3)
, para... |
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