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/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
#define _USE_MATH_DEFINES #include <bits/stdc++.h> using namespace std; //template #define rep(i,a,b) for(int i=(int)(a);i<(int)(b);i++) #define ALL(v) (v).begin(),(v).end() using ll=long long int; const int inf = 0x3fffffff; const ll INF = 0x1fffffffffffffff; const double eps=1e-12; template<typenam...
`timescale 1ns / 1ps ////////////////////////////////////////////////////////////////////////////////// // Company: // Engineer: // // Create Date: 06/23/2015 05:17:53 PM // Design Name: // Module Name: testcase_basic // Project Name: // Target Devices: // Tool Versions: // Description: // // Dependencies: //...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
#include <bits/stdc++.h> using namespace std; int N, M, P, Q; int A[101], B[101]; int w[202][202]; bool V[202]; vector<int> path; bool dfs(int n) { path.push_back(n); V[n] = 1; if (n == N + N + 1) return 1; for (int i = 0; i <= N + N + 1; i++) if (!V[i] && w[n][i]) { if (dfs(...
// Copyright (c) 2000-2011 Bluespec, Inc. // Copyright (c) 2013 Jonathan Woodruff // Permission is hereby granted, free of charge, to any person obtaining a copy // of this software and associated documentation files (the "Software"), to deal // in the Software without restriction, including without limitation the rig...
// megafunction wizard: %FIFO%VBB% // GENERATION: STANDARD // VERSION: WM1.0 // MODULE: scfifo // ============================================================ // File Name: FIFO_DETECTION_TIME.v // Megafunction Name(s): // scfifo // // Simulation Library Files(s): // // ========================================...
//----------------------------------------------------------------------------- // // (c) Copyright 2010-2011 Xilinx, Inc. All rights reserved. // // This file contains confidential and proprietary information // of Xilinx, Inc. and is protected under U.S. and // international copyright and other intellectual property ...
#include <bits/stdc++.h> using namespace std; int n, m, a[110], s[110][110]; int main() { scanf( %d%d , &n, &m); for (int i = 1; i <= n; i++) { scanf( %d , &a[i]); for (int j = 1; j <= a[i]; j++) s[i][j % m + 1]++; } for (int i = 1; i <= n; i++) for (int j = 1; j <= n; j++) ...
/** * A module for helping the processor handle loads * and stores to and from main memory. * * @author Robert Fotino, 2016 */ `include "definitions.vh" module data_cache ( input clk, input boot_done, // Interface for using the cache input ...
// -*- verilog -*- // // USRP - Universal Software Radio Peripheral // // Copyright (C) 2003 Matt Ettus // // This program is free software; you can redistribute it and/or modify // it under the terms of the GNU General Public License as published by // the Free Software Foundation; either version 2 of the License...
module MMCME2_ADV # ( parameter BANDWIDTH = "OPTIMIZED", parameter real CLKFBOUT_MULT_F = 5.000, parameter real CLKFBOUT_PHASE = 0.000, parameter CLKFBOUT_USE_FINE_PS = "FALSE", parameter real CLKIN1_PERIOD = 10.000, parameter real CLKIN2_PERIOD = 0.000, parameter real C...
// ========== Copyright Header Begin ========================================== // // OpenSPARC T1 Processor File: cpx_dp_macb_r.v // Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved. // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES. // // The above named program is free software; you can redistribute it and...
#include <bits/stdc++.h> using namespace std; long double PI = acosl(-1); bool compare_int(int a, int b) { return (a > b); } bool compare_string(string a, string b) { return a.size() < b.size(); } bool compare_pair(const pair<int, int> &a, const pair<int, int> &b) { if (a.second == b.second) return ...
module ovm; class simple_item extends ovm_sequence_item; rand int unsigned addr; rand int unsigned data; rand int unsigned delay; constraint c1 { addr < 16'h2000; } constraint c2 { data < 16'h1000; } // OVM automation macros for general objects `ovm_object_utils_begin(simple_item) a = b; ...
#include <bits/stdc++.h> using namespace std; using namespace std; const long long mod = 1e9 + 7; const int inf = 1e9; string s; long long expMod(long long base, long long ex, long long mod) { if (ex == 0) return 1; long long temp = expMod(base, ex / 2, mod); temp = (temp * temp) % mod; if (...
#include <bits/stdc++.h> using namespace std; const int N = 1e5 + 10; int n, x, y, b[N], cnt[N], a[N]; bool vis[N]; bool cmp(int i, int j) { return make_pair(cnt[b[i]], b[i]) > make_pair(cnt[b[j]], b[j]); } int main() { ios::sync_with_stdio(0); cin.tie(0); int T; cin >> T; while (T...
#include <bits/stdc++.h> using namespace std; int n; long long arr[200010], tot = 0; int main(void) { cin >> n; for (int i = 0; i < n; i++) { cin >> arr[i]; if (i > 0) tot += abs(arr[i] - arr[i - 1]); else tot += abs(arr[i]); } cout << tot; return 0; }
#include <bits/stdc++.h> using namespace std; int main() { ios_base::sync_with_stdio(false); cin.tie(NULL); cout.tie(NULL); long long n, k; cin >> n >> k; string s; cin >> s; string ans; for (long long i = 0; i < k; i++) { ans.push_back(s[i]); } for (long long i = k...
/////////////////////////////////////////////////////////////////////////////// // Copyright (c) 1995/2010 Xilinx, Inc. // All Right Reserved. /////////////////////////////////////////////////////////////////////////////// // ____ ____ // / /\/ / // /___/ \ / Vendor : Xilinx // \ \ \/ Version : 13....
`timescale 1ns / 1ps ////////////////////////////////////////////////////////////////////////////////// // Company: // Engineer: // // Create Date: 17:46:41 12/12/2016 // Design Name: // Module Name: vga_test // Project Name: // Target Devices: // Tool versions: // Description: // // Dependencies: // // Revision:...
module Counter32_RV1 ( input Reset_n_i, input Clk_i, input Preset_i, input Enable_i, input[31:0] PresetVal_i, output Zero_o ); wire ResetSig_s; wire Direction_s; wire [15:0] DH_s; wire [15:0] DL_s; wire Overflow_s; assign ResetSig_s = 1'b0; assign Direction_s = 1'b1; Counter32 ThisCounte...
module ghrd_10as066n2_pr_region_controller_0 ( input wire avl_csr_read, // avl_csr.read input wire avl_csr_write, // .write input wire [1:0] avl_csr_address, // .address input wire [31:0] avl_csr_writedata, ...
`include "defines.v" module connectRouter_nobuffer #(parameter addr = 4'b0000) //No. 0 connect router, port 0 ( input `control_w port_in, input `control_w inj, input bfull, input clk, input rst, output `control_w port_out, output ...
#include <bits/stdc++.h> using namespace std; int main() { int n1, n2, k1, k2; cin >> n1 >> n2 >> k1 >> k2; if (n1 > n2) { cout << First << endl; return 0; } if (n2 > n1) { cout << Second << endl; return 0; } if (k1 < k2) { cout << Second << endl; ...
#include <bits/stdc++.h> using namespace std; signed main() { long long a[4]; for (long long i = 0; i < 4; i++) cin >> a[i]; sort(a, a + 4); if ((a[3] + a[0] == a[2] + a[1]) || (a[3] == a[0] + a[1] + a[2])) cout << YES << endl; else cout << NO << endl; return 0; }
// megafunction wizard: %LPM_RAM_DP+%VBB% // GENERATION: STANDARD // VERSION: WM1.0 // MODULE: altsyncram // ============================================================ // File Name: dpram_128_32x32_be.v // Megafunction Name(s): // altsyncram // ===========================================================...
/* Copyright (c) 2014-2018 Alex Forencich Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, modify, merge, publish, distri...
`timescale 1ns / 1ps //////////////////////////////////////////////////////////////////////////////// // Company: // Engineer: // // Create Date: 15:39:19 05/12/2015 // Design Name: data_memory // Module Name: /media/BELGELER/Workspaces/Xilinx/processor/test_data_memory.v // Project Name: processor // Target D...
//Iamskk// #include <iostream> #include <iosfwd> #include <iomanip> #include <cstdio> #include <cstring> #include <cstdlib> #include <ctime> #include <cmath> #include <cassert> #include <cctype> #include <climits> #include <vector> #include <bitset> #include <set> #include <queue> #inclu...
// ============================================================== // RTL generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC // Version: 2018.2 // Copyright (C) 1986-2018 Xilinx, Inc. All Rights Reserved. // // =========================================================== `timescale 1 ns /...
#include <bits/stdc++.h> #pragma comment(linker, /STACK:1024000000,1024000000 ) using namespace std; const int maxn = 510005; int n, m; vector<int> g[maxn]; char s[maxn]; vector<int> dep[maxn]; vector<int> op[maxn]; int id[maxn][2]; int deep[maxn]; int mx[maxn]; int dfs_clock = 1; void dfs(in...
//Legal Notice: (C)2014 Altera Corporation. All rights reserved. Your //use of Altera Corporation's design tools, logic functions and other //software and tools, and its AMPP partner logic functions, and any //output files any of the foregoing (including device programming or //simulation files), and any associated do...
`timescale 1ns / 1ps module data_path( //---------------channel data input----------------------------------------- input [15:0] din16, //---------------channel data output----------------------------------------- output [31:0] dout32, //---------------Register------------------------------------------------...
#include <bits/stdc++.h> using namespace std; int main() { long long int n, a[102400], i, j, o = 0, l = 0, ma, k = 0; cin >> n; for (i = 0; i < n; i++) cin >> a[i]; for (i = 1; i < n; i++) { if (a[i] + k < a[i - 1]) { o += a[i - 1] - (a[i] + k); k += a[i - 1] - (a[i] + k); ...
//------------------------------------------------------------------------------ // // Copyright 2011, Benjamin Gelb. All Rights Reserved. // See LICENSE file for copying permission. // //------------------------------------------------------------------------------ // // Author: Ben Gelb () // // Brief Description: //...
#include <bits/stdc++.h> using namespace std; const int MAXL = 40000; pair<int, int> p[MAXL]; int Init() { for (int i = 0; i * i < MAXL; i++) { for (int j = i; j * j + i * i < MAXL; j++) { int now = i * i + j * j; p[now].first = i; p[now].second = j; } } return 0;...
#include <bits/stdc++.h> using namespace std; long long read() { long long x = 0, F = 1; char c = getchar(); while (c < 0 || c > 9 ) { if (c == - ) F = -1; c = getchar(); } while (c >= 0 && c <= 9 ) { x = (x << 3) + (x << 1) + c - 0 ; c = getchar(); } retu...
#include <bits/stdc++.h> using namespace std; int main() { int count[26] = {0}, c = 0, i; string str; getline(cin, str); for (i = 1; i <= str.length() - 1; i++) { if (str[i] == } || str[i] == , ) count[str[i - 1] - a ]++; } for (i = 0; i <= 25; i++) if (count[i] > 0) c++; ...
#include <bits/stdc++.h> using namespace std; vector<int> all; vector<int> zu; vector<int> de; int main() { string x; cin >> x; int y = x.size() / 2; cout << x; for (size_t i = 0; i < y; i++) { swap(x[i], x[x.size() - i - 1]); } cout << x << endl; return 0; }
#include <bits/stdc++.h> using namespace std; template <typename T, typename U> inline void amin(T &x, U y) { if (y < x) x = y; } template <typename T, typename U> inline void amax(T &x, U y) { if (x < y) x = y; } int main() { int n, p, k, ai; cin >> n >> k >> p; vector<int> ods; ...
#include <bits/stdc++.h> using namespace std; int n; int x[2001], y[2001]; int p[2001], mn[2001]; int k[2001], c[2001]; bool used[2001][2001]; unsigned long long dst[2001][2001]; unsigned long long dist(int i, int j) { return (unsigned long long)(k[i] + k[j]) * (unsigned long long)(abs(x[...
//----------------------------------------------------------------- // FPGA Audio Project SoC IP // V0.1 // Ultra-Embedded.com // Copyright 2011 - 2012 // // Email: // // License: LGPL // // If you wo...
#include <bits/stdc++.h> #pragma comment(linker, /STACK:16000000 ) using namespace std; const int inf = 0x3f3f3f3f; const long long inf2 = 0x3f3f3f3f3f3f3f3f; const double eps = 1e-6; const int mod = 1000000007; namespace fastio { char in[100000]; int itr = 0, llen = 0; char get() { if (itr == ...
#include <bits/stdc++.h> using namespace std; int main() { ios::sync_with_stdio(0); string s; cin >> s; char x = a ; int y; set<int> arr[26]; for (int i = 0; i < s.length(); i++) { y = s[i] - x; arr[y].insert(i); } int q; cin >> q; int n, ans = 0; for (in...
#include <bits/stdc++.h> using namespace std; bool SR(int &_x) { return scanf( %d , &_x) == 1; } bool SR(long long &_x) { return scanf( %lld , &_x) == 1; } bool SR(double &_x) { return scanf( %lf , &_x) == 1; } bool SR(char *_s) { return scanf( %s , _s) == 1; } bool RI() { return true; } template <typenam...
#include <bits/stdc++.h> using namespace std; bool isAscending(const vector<int64_t>& vec) { for (int i = 1; i < vec.size(); ++i) { if (vec[i - 1] >= vec[i]) { return false; } } return true; } bool Requal(const vector<int64_t>& av, const vector<int64_t>& bv) { for (int i = 0;...
#include <bits/stdc++.h> template <typename Tp> void in(Tp &x) { char ch = getchar(), f = 1; x = 0; while (ch != - && (ch < 0 || ch > 9 )) ch = getchar(); if (ch == - ) f = -1, ch = getchar(); while (ch >= 0 && ch <= 9 ) x = x * 10 + ch - 0 , ch = getchar(); x *= f; } template ...
#include <bits/stdc++.h> namespace imzzy { class fastin { private: int _ch, _f; public: inline fastin &operator>>(char &c) { c = getchar(); return *this; } template <typename _Tp> inline fastin &operator>>(_Tp &_x) { _x = 0; while (!isdigit(_ch)) _f |= (_ch == 45...
// Accellera Standard V2.3 Open Verification Library (OVL). // Accellera Copyright (c) 2005-2008. All rights reserved. //------------------------------------------------------------------------------ // SHARED CODE //------------------------------------------------------------------------------ // No shared code for ...
#include <bits/stdc++.h> using namespace std; int n, m, i, x, y, res; vector<int> g[200200], o[200200]; bool u[3][200200], w[200200], ok = true; char r[200200]; void dfs(int i, int z) { u[z][i] = true; w[i] = true; for (int j = 0; j < g[i].size(); j++) { int k = g[i][j]; if (w[k]) ok...
#include <bits/stdc++.h> using namespace std; int main() { int t; cin >> t; while (t--) { int n, k; cin >> n >> k; int ans = n; for (int i = 1; i * i <= n; i++) if (n % i == 0) { if (i <= k) ans = min(ans, n / i); if (n / i <= k) ans = min(ans, i); ...
#include <bits/stdc++.h> #pragma comment(linker, /STACK:102400000,102400000 ) const int inf = 0x3f3f3f3f; const long double PI = acos(-1); using namespace std; const int N = 1e5 + 10; int t, n, ans; char s[N]; int solve() { for (char c = a ; c <= z ; c++) { int temp = 0, i = 0, j = n - 1; ...
/******************************************************************************* * This file is owned and controlled by Xilinx and must be used * * solely for design, simulation, implementation and creation of * * design files limited to Xilinx devices or technologies. Use ...
#include <bits/stdc++.h> using namespace std; int main() { int a[102][102]; int b, c, i, j, n, m; cin >> n >> m; for (i = 1; i <= n; i++) for (j = 1; j <= m; j++) cin >> a[i][j]; b = n; while (b % 2 == 0 && b / 2 != 0) { c = 0; for (i = 1; i <= b / 2; i++) for (j = ...
#include <bits/stdc++.h> using namespace std; int N, M; vector<vector<char>> v; bool Mastervis[50][50]; bool vis[50][50]; int dx[] = {0, 0, 1, -1}; int dy[] = {1, -1, 0, 0}; bool isCyc(int r, int c, int pr, int pc) { if (vis[r][c]) return true; vis[r][c] = true; Mastervis[r][c] = true; i...
#include <bits/stdc++.h> using namespace std; int fun(string x) { if (x.size() > 7) return 1000005; int n = 0; for (int i = 0; i < x.size(); i++) { n *= 10; n += (x[i] - 0 ); } return n; } bool f(string s) { if (s.size() > 1 && s[0] == 0 || s.size() > 7) return false...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
#include <bits/stdc++.h> using namespace std; const long double Fictive = 5e18; struct str { long long k, b; long double eval(long double x) { return x * (long double)k + b; } }; vector<str> vec; inline long double get_x(str fi, str se) { return (long double)(fi.b - se.b) / (long double)(se.k - ...
#include <bits/stdc++.h> using namespace std; const int D = 505; const int N = 5005; pair<int, int> pre[D][N]; int ans[D][N]; void solve() { memset(pre, -1, sizeof(pre)); memset(ans, -1, sizeof(ans)); int d, s; cin >> d >> s; queue<pair<int, int> > que; que.push(pair<int, int>(0, 0))...
//======================================================= // This code is generated by Terasic System Builder //======================================================= module dlog_video( //////////// CLOCK ////////// OSC_50_B3B, OSC_50_B4A, OSC_50_B5B, OSC_50_B8A, //////////// Si5338 ////////// ...
// ------------------------------------------------------------- // // Generated Architecture Declaration for rtl of inst_ebc_e // // Generated // by: wig // on: Mon Mar 22 13:27:29 2004 // cmd: H:\work\mix_new\mix\mix_0.pl -strip -nodelta ../../mde_tests.xls // // !!! Do not edit this file! Autogenerated by MIX !...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
#include <bits/stdc++.h> const long long int MOD = 1e9 + 7; using namespace std; constexpr int mul(int a, int b) { return 1LL * a * b % MOD; } template <typename... T> constexpr int mul(int a, int b, T... t) { return mul(mul(a, b), t...); } template <class T> inline T Min(const T &a, const T &b) { ...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
#include <bits/stdc++.h> using namespace std; using ll = long long int; int ara[200005], dist[200005], ans[200005]; vector<int> even, odd, ad[200005]; bool vis[200005]; int main() { ios_base::sync_with_stdio(false); cin.tie(NULL); int n, i, j; cin >> n; for (i = 1; i <= n; i++) { c...
#include <bits/stdc++.h> using namespace std; long long int him(long long int a, long long int n) { long long int ans = 1; while (n) { if (n % 2 != 0) { ans = ((ans) * (a)); } a = ((a) * (a)); n = n / 2; } return ans; } int main() { long long int t; cin >>...
#include <bits/stdc++.h> using namespace std; using ll = long long; using vi = vector<int>; using vvi = vector<vi>; using vll = vector<ll>; using vvll = vector<vll>; using vb = vector<bool>; using vd = vector<double>; using vs = vector<string>; using pii = pair<int, int>; using pll = pair<ll, ll>;...
#include <bits/stdc++.h> using namespace std; int n, ms, type[5005], dp[5005]; int main() { scanf( %d %d , &n, &ms); for (int i = 1; i <= n; i++) { double x; scanf( %d %lf , type + i, &x); } for (int i = 1; i <= n; i++) { int j = type[i]; for (int k = j; k >= 1; k--) { ...
// DESCRIPTION: Verilator: Verilog Test module // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2008 by Wilson Snyder. module t (/*AUTOARG*/ // Inputs clk ); input clk; reg [2:0] in; wire a,y,y_fixed; wire b = in[0]; wire en = in[1]; pullup(a); ...
`timescale 1ns / 1ps ////////////////////////////////////////////////////////////////////////////////// // Company: Universidad De Costa Rica // Engineer: Joshua Torres M (A76478) // // Create Date: 15:27:21 09/06/2015 // Design Name: // Module Name: ram // Project Name: Diseno de una Cola/Pila sincronicas /...
#include <bits/stdc++.h> using namespace std; const long long MOD = 1e9 + 7; const int INF = 1e9; const long long IINF = 1e18; const int dx[4] = {1, 0, -1, 0}; const int dy[4] = {0, 1, 0, -1}; const char dir[4] = { D , R , U , L }; template <typename T> istream &operator>>(istream &is, vector<T> &v...
`timescale 1ns / 1ps ////////////////////////////////////////////////////////////////////////////////// // Company: // Engineer: // // Create Date: 2016/05/24 20:36:12 // Design Name: // Module Name: D_behavior_tb // Project Name: // Target Devices: // Tool Versions: // Description: // // Dependencies: // //...
// DESCRIPTION: Verilator: Verilog Test module // // Copyright 2010 by Wilson Snyder. This program is free software; you can // redistribute it and/or modify it under the terms of either the GNU // Lesser General Public License Version 3 or the Perl Artistic License // Version 2.0. // SPDX-License-Identifier: LGPL-3.0-...
#include <bits/stdc++.h> using namespace std; int brute(int s, int x) { int ans = 0; for (int i = 1; i <= s; ++i) for (int j = 1; j <= s; ++j) if (i + j == s && (i ^ j) == x) ++ans; return ans; } long long ways0(long long s, long long x) { if (s == x) return 2; return 0; } ...
#include <bits/stdc++.h> using namespace std; using ll = long long; #define pb push_back #define endl n #define F first #define S second #define pp pop_back ll mod = 1e9+7; ll dp[200200][2]; ll st[200200]; ll n; ll rec(ll level,int curr){ if(st[level]==1||st[level]==0){ if(...
#include <bits/stdc++.h> using namespace std; int main() { unsigned long long n, i, j, sum, k, temp; scanf( %llu , &n); unsigned long long a[n]; for (i = 0; i < n; i++) { scanf( %llu , &a[i]); } sum = 0; sort(a, a + n); k = n / 2; for (i = 0; i < k; i++) { temp = (a[i...
/** * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable la...
#include <bits/stdc++.h> using namespace std; const int N = 1e5 + 50; int n, p, first[N], second[N]; double tmin = 1e9; pair<double, int> d[N]; bool ok(double x) { double tp = x * p; for (int i = 0; i < n; ++i) { tp -= max(first[i] * x - second[i], 0.0); } return tp >= 0; } int mai...
`timescale 1ns / 1ps //////////////////////////////////////////////////////////////////////////////// // Company: // Engineer: // // Create Date: 16:34:40 05/17/2015 // Design Name: Main // Module Name: C:/Users/dagosttv.ROSE-HULMAN/Documents/School/ECE/ECE398/CAN-Bus-Controller-/Main_test.v // Project Name: C...
#include <bits/stdc++.h> using namespace std; long long n, m, i; string s; int main() { char c; cin >> s; i = 0; while (s[i] < 80) { n *= 10; n += s[i] - 48; i++; } c = s[i]; if (n % 4 == 1) m = (n + 1) / 2; if (n % 4 == 2) m = (n + 2) / 2; if (n % 4 == 3) m...
#include <bits/stdc++.h> using namespace std; using db = long double; using pll = pair<long long, long long>; int32_t main() { ios::sync_with_stdio(0); cin.tie(0); cout.tie(0); long long t, i, x, j, y, z, k, n; long long tt; cin >> tt; for (long long _tt = 0; _tt < tt; _tt++) { ...
// Copyright 1986-2017 Xilinx, Inc. All Rights Reserved. // -------------------------------------------------------------------------------- // Tool Version: Vivado v.2017.2 (win64) Build Thu Jun 15 18:39:09 MDT 2017 // Date : Wed Sep 20 21:28:52 2017 // Host : EffulgentTome running 64-bit major release ...
#include <bits/stdc++.h> char a[1111]; int main() { int i, j, k, l, s, flag; while (~scanf( %s , a + 2)) { a[0] = a[1] = 0 ; s = 0; l = strlen(a); flag = 0; for (i = 0; i < l - 2; i++) { if (flag) break; for (j = i + 1; j < l - 1; j++) { if (flag) bre...
#include <bits/stdc++.h> using namespace std; int n, len1, len2, ans; string s; int main() { cin >> n; getline(cin, s), getline(cin, s); while (len1 < s.size()) { len2 = len1 + n - 1; while (len2 > len1) if (s[len2] == . || s[len2] == ? || s[len2] == ! ) { len1 = l...
(*******************************************************************) (* Copyright 2010 Alexandre Pilkiewicz *) (* < > *) (* This program is free software. It comes without any warranty, *) (* to the extent permitted by applicable law. You can redistribute *) (* it an...
// ------------------------------------------------------------- // // Generated Architecture Declaration for rtl of ent_c // // Generated // by: wig // on: Thu Jun 29 16:41:09 2006 // cmd: /cygdrive/h/work/eclipse/MIX/mix_0.pl -conf macro._MP_VHDL_USE_ENTY_MP_=Overwritten vhdl_enty from cmdline -conf macro._MP_VH...
#include <bits/stdc++.h> using namespace std; long long read() { char ch = getchar(); long long x = 0, ff = 1; while (ch < 0 || ch > 9 ) { if (ch == - ) ff = -ff; ch = getchar(); } while (ch >= 0 && ch <= 9 ) x = x * 10 + ch - 0 , ch = getchar(); return x * ff; } void...
#include <bits/stdc++.h> using namespace std; const int oo = 1000111000; int n, k, a[30300], f[222][30300][2], ans[222][30300]; int main() { int x; cin >> n >> k; for (int i = 1; i <= n; i++) { cin >> x; a[i] = a[i - 1] + x; } for (int i = 0; i <= k; i++) for (int j = 0; j ...
#include <bits/stdc++.h> using namespace std; const int N = 1e5 + 5; int n, one, two[2], tmp, num, a[N]; bool flag, f[N]; int read() { int x = 0, f = 1; char c = getchar(); while (c < 0 || c > 9 ) { if (c == - ) f = -1; c = getchar(); } while (c >= 0 && c <= 9 ) { ...
//hardware top level module module sm_top ( input clkIn, input rst_n, input [ 3:0 ] clkDevide, input clkEnable, output clk, input [ 4:0 ] regAddr, output [31:0 ] regData ); //metastability input filters wire [ 3:0 ] devide; wire ...
// DESCRIPTION: Verilator: Verilog Test module // // This file ONLY is placed into the Public Domain, for any use, // without warranty, 2010 by Wilson Snyder. `define STRINGIFY(x) `"x`" module t (/*AUTOARG*/ // Outputs out, // Inputs in ); input in; // inputs don't get flagged as undriven outpu...
#include <bits/stdc++.h> using namespace std; const int maxn = 100 + 10, maxm = 10000 + 10; long long n, m, drt = 1, x = 1, y = 1, ans = 0, dis = 0, o = 0; char mat[maxn][maxm]; int main() { cin >> n >> m; for (int i = 1; i <= n; i++) { mat[i][0] = # ; mat[i][m + 1] = # ; for (int ...
#include <bits/stdc++.h> using namespace std; const int maxn = 5e5 + 7; const int maxm = 1e5 + 7; struct Que { int l, r, rt, id; }; struct Data { int sum; int id; bool operator<(const Data& a) const { return (sum == a.sum) ? (id < a.id) : (sum > a.sum); } }; struct Edge { i...
#include <bits/stdc++.h> using namespace std; int n, m; struct Node { int pos, val, sit; } a[305]; bool cmp(Node x, Node y) { if (x.val == y.val) { return x.pos > y.pos; } return x.val < y.val; } bool cmp2(Node x, Node y) { return x.pos < y.pos; } int main() { int T; std::c...
#include <bits/stdc++.h> using namespace std; const int N = 1e5; int n; int neg = 0; string s[N + 5]; inline long long pars(int x) { long long ret = 0LL; for (int i = 0; i < s[x].size(); i++) { if (s[x][i] == - ) continue; if (s[x][i] == . ) break; ret *= 10; ret += s[x][i]...
#include <bits/stdc++.h> using namespace std; int main() { ios::sync_with_stdio(false); cin.tie(0); int n; cin >> n; long long ans = 0; priority_queue<int, vector<int>, greater<int>> pq; while (n--) { int x; cin >> x; if (pq.size() && x > pq.top()) { ans += x - ...
#include <bits/stdc++.h> using namespace std; long long gcd(long long a, long long b); int main() { long long t, w, b; cin >> t >> w >> b; long long tie = 0; long long total = t; bool overflow = false; long long gcdValue = gcd(w, b); if (LLONG_MAX / double(w) < double(b) / gcdValue) ov...
// ============================================================== // File generated by Vivado(TM) HLS - High-Level Synthesis from C, C++ and SystemC // Version: 2017.4 // Copyright (C) 1986-2017 Xilinx, Inc. All Rights Reserved. // // ============================================================== `timescale 1 ns / 1 ...
`timescale 1ns / 1ps module bridge( // FURCULA BUS input f_signed_i, input [1:0] f_siz_i, input [2:0] f_adr_i, input [63:0] f_dat_i, output [63:0] f_dat_o, // WISHBONE BUS output [7:0] wb_sel_o, output [63:0] wb_dat_o, input [63:0] wb_dat_i ); // Wishbone SEL_O signal generation. wire size_byte = (f_siz...