text stringlengths 59 71.4k |
|---|
`include "assert.vh"
`include "cpu.vh"
module cpu_tb();
reg clk = 0;
//
// ROM
//
localparam MEM_ADDR = 4;
localparam MEM_EXTRA = 4;
reg [ MEM_ADDR :0] mem_addr;
reg [ MEM_EXTRA-1:0] mem_extra;
reg [ MEM_ADDR :0] rom_lower_bound = 0;
reg [ MEM_ADDR :0] rom_upper_bo... |
#include <bits/stdc++.h> using namespace std; int main() { long long i; long long n, m, k, l; cin >> n >> m >> k >> l; long long no = 0; long long yes = 0; long long j = (l + k); long long ans = ((j - 1) / m) + 1; if (((ans * m)) > n) no = 1; if (no) cout << -1 ; else ... |
#include <bits/stdc++.h> using namespace std; int main() { ios::sync_with_stdio(false); cin.tie(0); int n, k; cin >> n >> k; vector<vector<int>> g(n); for (int i = 0; i < n - 1; i++) { int x, y; cin >> x >> y; --x; --y; g[x].push_back(y); g[y].push_back(x)... |
#include <bits/stdc++.h> #pragma comment(linker, /STACK:16777216 ) using namespace std; int n, m, jm; long long ans; int main() { cin >> n >> m >> jm; ans = ceil(1.0 * n / jm) * ceil(1.0 * m / jm) * ((n - 1) % jm + 1) * ((m - 1) % jm + 1); cout << ans; return 0; } |
#include <bits/stdc++.h> using namespace std; int main() { int n; cin >> n; int d[n]; int total = 0; for (int i = 0; i < n; i++) { cin >> d[i]; total += d[i]; } int s, t; cin >> s >> t; if (s == t) { cout << 0; return 0; } if (s > t) swap(s, t); ... |
/*
Distributed under the MIT license.
Copyright (c) 2015 Dave McCoy ()
Permission is hereby granted, free of charge, to any person obtaining a copy of
this software and associated documentation files (the "Software"), to deal in
the Software without restriction, including without limitation the rights to
use, copy, mo... |
#include <bits/stdc++.h> int const maxn = 255; int const mod = 1e9 + 7; long long a[maxn]; long long c[maxn][maxn]; long long pow(long long a, long long b, long long p) { long long r = 1; while (b) { if (b & 1) r = (r * a) % p; a = (a * a) % p; b >>= 1; } return r; } int ... |
`timescale 1 ns / 1 ps
`include "defines.v"
`ifndef ICE
`define REGFILE_REGISTERED_OUT 1
`endif
module regfile
#(parameter [0:0] MICROOPS_ENABLED = 1)
(input clk,
input rst,
input [31:0] PC,
input [4:0] addr1,
... |
//----------------------------------------------------------------------------
// RGB Block Ram - Sub Level Module
//-----------------------------------------------------------------------------
//
// XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
// SOLELY FOR USE IN DEVELOPING PROGRAMS AND... |
#include <bits/stdc++.h> using namespace std; const int BIT = (1 << 17), M = 110, N = 25; int n, m, cnt[BIT], a[M]; long long f[BIT][N], b[N], p[N], year; void solve(int x) { memset(f, 0, sizeof(f)); f[0][0] = 1; int maxb = (1 << n); for (int i = 0; i < maxb; i++) { for (int j = 0; j <= ... |
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 14:55:04 12/14/2010
// Design Name:
// Module Name: msu
// Project Name:
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
//
// Revision:
// R... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
// DESCRIPTION: Verilator Test: Top level testbench for VCS or other fully Verilog compliant simulators
//
// This file ONLY is placed into the Public Domain, for any use,
// without warranty, 2003 by Wilson Snyder.
`timescale 1 ns / 1ns
module bench;
/*AUTOWIRE*/
// Beginning of automatic wires (for undeclare... |
#include <bits/stdc++.h> using namespace std; const int N = 5e5 + 5; unordered_map<long long, long long> m1, mp; long long m, k, n, s; bool check() { for (auto it : mp) { if (it.second > m1[it.first]) return false; } return true; } int main() { ios::sync_with_stdio(0); cin.tie(0)... |
#include <bits/stdc++.h> using namespace std; vector<int> idb[100002]; int dp[301]; int main() { int n, m, s, e; cin >> n >> m >> s >> e; vector<int> a(n); for (int i = 0; i < n; i++) scanf( %d , &a[i]); for (int i = 0; i < m; i++) { int b; scanf( %d , &b); idb[b].push_back... |
#include <bits/stdc++.h> using namespace std; const long long N = 2e6 + 5; long long n, k, a[N], res; void solo() { cin >> n; for (int i = 1; i <= n; i++) cout << i + 1 << ; } int main() { ios_base::sync_with_stdio(0); cin.tie(0); cout.tie(0); long long t = 1; cin >> t; wh... |
module generator(clk, out1, out2, out3, out4, out5, out6,out7,out8);
input wire clk;
output wire out1,out2,out3,out4,out5,out6,out7,out8;
reg [129:0] d1_max; initial d1_max <= 130'd956;
divmod div1(.clk(clk), .max_val(d1_max[ 9: 0]), .out_clk(out1));
divmod div2(.clk(clk), .max_val(d1_max[19:10]), .out_clk(out... |
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer: Jorge Sequeira
//
// Create Date: 08/31/2016 03:34:58 PM
// Design Name:
// Module Name: KOA_c
// Project Name:
// Target Devices:
// Tool Versions:
// Description: Recursive Karasuba P... |
#include <bits/stdc++.h> using namespace std; template <typename T> T gcd(T a, T b) { return (b == 0) ? a : gcd(b, a % b); } template <typename T> T lcm(T a, T b) { return a * (b / gcd(a, b)); } template <typename T> T mod_exp(T b, T p, T m) { T x = 1; while (p) { if (p & 1) x = ... |
// megafunction wizard: %LPM_ADD_SUB%
// GENERATION: STANDARD
// VERSION: WM1.0
// MODULE: LPM_ADD_SUB
// ============================================================
// File Name: alu_add.v
// Megafunction Name(s):
// LPM_ADD_SUB
//
// Simulation Library Files(s):
// lpm
// ====================================... |
#include <bits/stdc++.h> using namespace std; int n, k; double dp[205][35][35]; vector<int> p; pair<int, int> rev(int x, int y, int rx, int ry) { if (x >= rx && x <= ry) { x = rx + (ry - rx) - (x - rx); } if (y >= rx && y <= ry) { y = rx + (ry - rx) - (y - rx); } return make_pa... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
// (C) 2001-2016 Intel Corporation. All rights reserved.
// Your use of Intel Corporation's design tools, logic functions and other
// software and tools, and its AMPP partner logic functions, and any output
// files any of the foregoing (including device programming or simulation
// files), and any associated docum... |
// NeoGeo logic definition (simulation only)
// Copyright (C) 2018 Sean Gonsalves
//
// This program is free software: you can redistribute it and/or modify
// it under the terms of the GNU General Public License as published by
// the Free Software Foundation, either version 3 of the License, or
// (at your option) an... |
#include <bits/stdc++.h> using namespace std; struct _ { _() { ios_base::sync_with_stdio(0); } } _; template <class T> void PV(T a, T b) { while (a != b) cout << *a++, cout << (a != b ? : n ); } template <class T> inline bool chmin(T &a, T b) { return a > b ? a = b, 1 : 0; } templa... |
//////////////////////////////////////////////////////////////////////
//// ////
//// i2cSlave.v ////
//// ////
//// This file is part of the i2cSla... |
// DESCRIPTION: Verilator: Verilog Test module
//
// This file ONLY is placed under the Creative Commons Public Domain, for
// any use, without warranty, 2014 by Wilson Snyder.
// SPDX-License-Identifier: CC0-1.0
module t (/*AUTOARG*/
// Inputs
clk
);
input clk;
integer cyc = 0;
reg [63:0] crc;
... |
#include <bits/stdc++.h> using namespace std; int a[102] = {0}; int main() { int n, m, i, ans = 0, x, l, r, num, mid; cin >> n >> m; for (i = 0; i < m; i++) { cin >> x; a[x]++; } sort(a + 1, a + 101); l = 1; r = 10000; while (l <= r) { num = 0; mid = (l + r)... |
///////////////////////////////////////////////////////////////////////////////
// vim:set shiftwidth=3 softtabstop=3 expandtab:
// $Id: in_arb_regs.v 5077 2009-02-22 20:17:46Z grg $
//
// Module: in_arb_regs.v
// Project: NF2.1
// Description: Demultiplexes, stores and serves register requests
//
/////////////////////... |
#include <bits/stdc++.h> using namespace std; int N; vector<pair<int, int> > VX[5]; vector<pair<int, int> > VY[5]; int X[101010]; int Y[101010]; int C[101010]; void ref() { for (int i = 1; i <= N; i++) swap(X[i], Y[i]); } bool f(int m, int a, int b, int c) { int x1 = VX[a][m - 1].first + 1; ... |
/*------------------------------------------------------------------------------
* This code was generated by Spiral Multiplier Block Generator, www.spiral.net
* Copyright (c) 2006, Carnegie Mellon University
* All rights reserved.
* The code is distributed under a BSD style license
* (see http://www.opensource.or... |
#include <bits/stdc++.h> using namespace std; const int MAX_N = 200005; int l[MAX_N], r[MAX_N]; int a[MAX_N]; int n; int F[MAX_N]; int main() { scanf( %d , &n); for (int i = 1; i <= n; i++) scanf( %d , &a[i]); for (int i = 1; i <= n; i++) { l[i] = i; while (a[l[i] - 1] >= a[i]) l[i... |
#include <bits/stdc++.h> using namespace std; const int MAXN = 2e5 + 10; const int MAXM = 1e6 + 10; const int MAXLOG = 20; struct Edge { int x, y, w; int id; } edge[MAXM]; int T, n, m, i; int val; vector<pair<int, int> > e[MAXN]; int fa[MAXN], anc[MAXN][MAXLOG], dep[MAXN]; int ans[MAXM]; ... |
module butterfly3_8(
enable,
i_0,
i_1,
i_2,
i_3,
i_4,
i_5,
i_6,
i_7,
o_0,
o_1,
o_2,
o_3,
... |
#include <bits/stdc++.h> using namespace std; __attribute__((constructor)) void Init() { ios_base::sync_with_stdio(false), cin.tie(0), cout << fixed; } constexpr int N = 5e3; char A[N + 2], B[N + 2]; int16_t dp[2][N + 1]; int main() { int n, m, t = 0, ans = 0; cin >> n >> m >> &A[1] >> &B[1]; ... |
// generated by gen_VerilogEHR.py using VerilogEHR.mako
// Copyright (c) 2019 Massachusetts Institute of Technology
// Permission is hereby granted, free of charge, to any person
// obtaining a copy of this software and associated documentation
// files (the "Software"), to deal in the Software without
// restriction... |
// just an example with frequencies. not to be used!
// Copyright 2007 Altera Corporation. All rights reserved.
// Altera products are protected under numerous U.S. and foreign patents,
// maskwork rights, copyrights and other intellectual property laws.
//
// This reference design file, and your use thereof, is... |
module mstore
#(
parameter N = 0,
parameter MWIDTH = 1
)
(
input wire clk,
input wire rst_n,
input wire in_nd,
input wire [MWIDTH-1:0] in_m,
input wire in_read,
output wire [MWIDTH-1:0] out_m,
output reg ... |
#include <bits/stdc++.h> using namespace std; int n; vector<vector<int> > G; vector<vector<int> > ID; vector<vector<int> > ans; void addp(int id, int t) { while (ans.size() <= t) ans.push_back(vector<int>()); ans[t].push_back(id); } void solve(int from, int lab, int v) { int ctr = 0; for... |
//----------------------------------------------------------------------------
//-- Unidad de transmision serie asincrona
//------------------------------------------
//-- (C) BQ. September 2015. Written by Juan Gonzalez (Obijuan)
//-- GPL license
//----------------------------------------------------------------------... |
#include <bits/stdc++.h> using namespace std; bool isprime(long long n) { if (n < 2) return false; if (n == 2) return true; if (n % 2 == 0) return false; for (int i = 3; i * i <= n; i = i + 2) { if (n % i == 0) return false; } return true; } int main() { int n; cin >> n; ... |
#include <bits/stdc++.h> using namespace std; int main() { char a[10][10]; char b[10][10]; vector<char> v, l; long long int i, count = 0, j; for (i = 0; i < 2; i++) { for (j = 0; j < 2; j++) { cin >> a[i][j]; } } v.push_back(a[0][0]); v.push_back(a[0][1]); v.p... |
#include <bits/stdc++.h> using namespace std; int MinDist(int n, int k, const string& s) { int first_cow_pos = 0; while (first_cow_pos < n && s[first_cow_pos] == 1 ) { ++first_cow_pos; } int last_cow_pos = first_cow_pos; int rooms = 1; while (rooms < k + 1) { ++last_cow_pos; ... |
`timescale 1ns / 1ps
/**
* C_PWM_CNT_WIDTH: 16bits, [0,65535], if using mV as units, range to 65V
* with 150M clock, 60K denominator means 0.4ms, frequency: 2.5kHZ,
* climbing time can reach 60K * 60K / 150M = 25s.
* if inc/dec has 32bits (16bits fractional part), climbing time can reach
* 25s * 60K = 40hours
*/
... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; int gcd(int f, int s) { if (s == 0) return f; else return gcd(s, f % s); } int const N = 200005; long long const mod = 1000 * 1000 * 1000 + 7; map<string, long long> m; string s[N]; int main() { int a; cin >> a; if (a < 6) ... |
#include <bits/stdc++.h> using namespace std; const long long int md = 1e9 + 7; const long long int N = 55; long long int a[N]; long long int dp[N][N]; vector<pair<long long int, long long int>> v; long long int mask; long long int rec(long long int n, long long int k) { long long int s = 0; if ... |
module score_counter
(
input wire clk, reset,
input wire d_inc, d_dec, d_clr,
// inc -- increase (hit signal)
// dec -- decrease by 2 (kill signal)
// cle -- simple clear signal
output wire [3:0] dig0, dig1
);
// signal declaration
reg [3:0] dig0_reg, dig1_reg, dig0_next, dig1_next;... |
`timescale 1ns / 1ps
////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 20:48:24 03/26/2016
// Design Name: Top
// Module Name: G:/ceshi/lab5_box/test_for_top.v
// Project Name: lab5_box
// Target Device:
// Tool versions: ... |
module master(
input wire [6:0] address,
input wire [7:0] register,
input wire refresh_clk,
input wire sys_clk,
input wire mode,
input wire en,
input wire reset,
input wire Start,
input wire Stop,
input wire repeat_start,
output reg [7:0] out,
output reg ack,
inout wire sda,
inout wire scl... |
#include <bits/stdc++.h> using namespace std; long long arr[101], N, T; void Input() { cin >> N; memset(arr, 0, sizeof arr); for (int i = 0; i < N; i++) { long long tmp; cin >> tmp; arr[tmp]++; } } void Solve() { int one = 0, two = 0; for (int i = 0; i <= 100; i++) { ... |
#include <bits/stdc++.h> using namespace std; const int N = 1000 * 1000 + 20; int a[N], x[N], y[N], visited[N], h[N], mark[N], n, t = 0, dady[N]; vector<int> ans, adj[N]; void dfs_mark(int v) { visited[v] = 1; for (int i = 0; i < adj[v].size(); i++) { int u = adj[v][i]; if (visited[u] == 0... |
#include <bits/stdc++.h> int n, m; int table[(1 << 20) + 10]; int lowbit[(1 << 20) + 10]; int ba[35][35]; int cost[35][35]; int same[35][35]; char st[35][35]; int min(int x, int y) { if (x < y) return x; else return y; } int main() { int i, a, j; scanf( %d%d n , &n, &m); ... |
#include <bits/stdc++.h> using namespace std; int main() { set<char> c; int mul = 0; long long ans = 1; bool f = false; string s; cin >> s; for (int i = 0; i < s.length(); i++) { if (s[i] == ? ) ans *= 10; else if (s[i] >= 65 && s[i] <= 74) c.insert(s[i]); ... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> const int MAXN = 200000; using namespace std; inline int read() { int x = 0, w = 1; char c = ; while (c < 0 || c > 9 ) { c = getchar(); if (c == - ) w = -1; } while (c >= 0 && c <= 9 ) { x = (x << 1) + (x << 3) + (c ^ 48); c = getchar(... |
/*+--------------------------------------------------------------------------
Copyright (c) 2015, Microsoft Corporation
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are met:
* Redistributions of source code ... |
#include <bits/stdc++.h> using namespace std; int r[100005], t, n, m, ans = 0; vector<int> id[100005]; set<int> v; int main() { scanf( %d%d , &n, &m); for (int i = 1; i <= m; i++) { scanf( %d , &t); v.insert(t); id[t].push_back(i); r[t] = max(r[t], i); } for (auto it : ... |
#include <bits/stdc++.h> using namespace std; const int N = 100000; const int delt = 255; long long fa[N], fb[N], fc[N]; int main() { ios::sync_with_stdio(false); string a, b, c; cin >> a; cin >> b; cin >> c; for (int i = 0; i < a.size(); i++) { fa[a[i] + delt]++; } for (... |
/*
* Milkymist SoC
* Copyright (C) 2007, 2008, 2009, 2011 Sebastien Bourdeauducq
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, version 3 of the License.
*
* This program is distribut... |
#include <bits/stdc++.h> using namespace std; long long int solve() { long long int n; cin >> n; vector<bool> dp(2 * n + 1, 0); vector<long long int> p(2 * n); vector<long long int> nums; long long int cover = 0; vector<long long int> inv(2 * n + 1); for (long long int j = 0; j < 2 *... |
#include <bits/stdc++.h> using namespace std; struct node { int u , v , w; node(){} node(int u,int v,int w): u(u) , v(v) , w(w){}; bool operator < (const node &o) const { return w < o.w; } }; struct dsu { int par[200010]; void init() { ... |
/*
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law... |
// (C) 2001-2017 Intel Corporation. All rights reserved.
// Your use of Intel Corporation's design tools, logic functions and other
// software and tools, and its AMPP partner logic functions, and any output
// files any of the foregoing (including device programming or simulation
// files), and any associated docum... |
#include <bits/stdc++.h> int g[1010][1010]; int main() { int n, k, ans, i, j; while (~scanf( %d%d , &n, &k)) { ans = 0; memset(g, 0, sizeof(g)); for (i = 0; i < n; i++) for (j = i + 1; j <= i + k; j++) g[i][j % n] = 1, ans++; int flag = 1; for (i = 0; i < n; i++) ... |
#include <bits/stdc++.h> using namespace std; int main() { long long int t = 1; cin >> t; while (t--) { long long int n, i, j; cin >> n; long long int a = n / 3, b = n / 3; if (n % 3 == 1) cout << a + 1 << << b; else if (n % 3 == 2) cout << a << << b... |
//*******************************************************************************************************************************************************/
// Module Name: mult
// Module Type: Multiplexer
// Author: Shreyas Vinod
// Purpose: Multiplexers for Neptune I v3.0
// Description: Combinatorial 2 to 1 and 4... |
`timescale 1ns / 1ps
////////////////////////////////////////////////////////////////////////////////
// Company: California State University San Bernardino
// Engineer: Bogdan Kravtsov
// Tyler Clayton
//
// Create Date: 14:20:02 10/03/2016
// Module Name: INSTR_MEM
// Project Name: MIPS
... |
/*******************************************************************************
* This file is owned and controlled by Xilinx and must be used solely *
* for design, simulation, implementation and creation of design files *
* limited to Xilinx devices or technologies. Use with non-Xilinx ... |
// (C) 1992-2014 Altera Corporation. All rights reserved.
// Your use of Altera Corporation's design tools, logic functions and other
// software and tools, and its AMPP partner logic functions, and any output
// files any of the foregoing (including device programming or simulati... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
#include <bits/stdc++.h> using namespace std; int n, m, k; vector<vector<int> > g; vector<vector<int> > revg; int active[1000005]; int del; int limx, limy, limz; unordered_set<int> visited; void add(int a, int b) { if (active[a] && active[b]) { g[a].push_back(b); revg[b].push_back(a); ... |
// Copyright 1986-2016 Xilinx, Inc. All Rights Reserved.
// --------------------------------------------------------------------------------
// Tool Version: Vivado v.2016.4 (win64) Build Mon Jan 23 19:11:23 MST 2017
// Date : Tue Mar 28 02:08:39 2017
// Host : DESKTOP-B1QME94 running 64-bit major releas... |
(* abc9_box *)
module MISTRAL_MUL27X27(input [26:0] A, input [26:0] B, output [53:0] Y);
parameter A_SIGNED = 1;
parameter B_SIGNED = 1;
// TODO: Cyclone 10 GX timings; the below are for Cyclone V
specify
(A *> Y) = 3732;
(B *> Y) = 3928;
endspecify
wire [53:0] A_, B_;
if (A_SIGNED)
assign A_ = $signed(... |
#include <bits/stdc++.h> using namespace std; long long t, n, i, b[1010], ta, tb, k1, a[1010], tem, x[1010], y[1010], k2, tom; vector<long long> v[1010]; void dfs(long long aa, long long bb) { b[aa] = bb; long long ii; for (ii = 0; ii < v[aa].size(); ii++) if (!b[v[aa][ii]]) dfs(v[aa][ii], bb)... |
#include <bits/stdc++.h> using namespace std; const double PI = 3.1415926535897932384626433832795; const double EPS = 1e-9; set<int> good; void gen(int x) { good.insert(x); if (x > 100 * 1000 * 1000) { return; } gen(10 * x + 4); gen(10 * x + 7); } vector<pair<int, int> > swaps; ... |
`timescale 1ns/1ns
module ddc_chain_tb();
reg clk, rst;
initial rst = 1;
initial #1000 rst = 0;
initial clk = 0;
always #5 clk = ~clk;
initial $dumpfile("ddc_chain_tb.vcd");
initial $dumpvars(0,ddc_chain_tb);
reg signed [23:0] adc_in;
wire signed [15:0] adc_out_i, adc_out_q;
... |
`timescale 1 ps / 1 ps
`include "ov7670_marker_tracker_ip_v1_0_tb_include.vh"
// lite_response Type Defines
`define RESPONSE_OKAY 2'b00
`define RESPONSE_EXOKAY 2'b01
`define RESP_BUS_WIDTH 2
`define BURST_TYPE_INCR 2'b01
`define BURST_TYPE_WRAP 2'b10
// AMBA AXI4 Lite Range Constants
`define S00_AXI_MAX_BURST_LEN... |
//////////////////////////////////////////////////////////////////////
//// ////
//// Generic Single-Port Synchronous RAM ////
//// ////
//// This file is part of memory li... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
//
// Copyright (c) 1999 Steven Wilson ()
//
// This source code is free software; you can redistribute it
// and/or modify it in source code form under the terms of the GNU
// General Public License as published by the Free Software
// Foundation; either version 2 of the License, or (at your option)
// ... |
#include <bits/stdc++.h> using namespace std; int main() { ios_base::sync_with_stdio(0), cin.tie(NULL), cout.tie(NULL); int a, b, c; cin >> a >> b >> c; cout << ((a + c - 1) * (b + c - 1) - c * (c - 1)) << n ; return 0; } |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
// ----------------------------------------------------------------------
// Copyright (c) 2016, The Regents of the University of California All
// rights reserved.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met:... |
#include <bits/stdc++.h> using namespace std; int main() { int n, s; scanf( %d %d , &n, &s); long long arr[n]; for (int i = 0; i < n; i++) scanf( %lld , &arr[i]); sort(arr, arr + n); long long val = arr[n / 2]; long long cnt = abs(s - val); for (int i = 0; i < (n / 2); i++) { i... |
#include <bits/stdc++.h> using namespace std; void __print(int x) { cerr << x; } void __print(long x) { cerr << x; } void __print(long long x) { cerr << x; } void __print(unsigned x) { cerr << x; } void __print(unsigned long x) { cerr << x; } void __print(unsigned long long x) { cerr << x; } void __prin... |
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 12/18/2016 10:56:00 PM
// Design Name:
// Module Name: merge
// Project Name:
// Target Devices:
// Tool Versions:
// Description:
//
// Dependencies:
//
// Revi... |
#include <bits/stdc++.h> using namespace std; int ans; int father[1100]; int find(int x) { if (father[x] == x) return x; father[x] = find(father[x]); return father[x]; } bool Union(int x, int y) { int f1 = find(x); int f2 = find(y); if (f1 == f2) return false; if (f1 < f2) ... |
/*****************************************************************************
* File : processing_system7_bfm_v2_0_5_ddrc.v
*
* Date : 2012-11
*
* Description : Module that acts as controller for sparse memory (DDR).
*
*****************************************************************************/
`timescale 1n... |
module traffic_light_controller ( clk, reset, north_south, east_west );
output [2:0] north_south;
output [2:0] east_west;
input clk, reset;
wire N80, N81, N82, N83, N85, N96, n40, n41, n42, n45, n46, n47, n48, n49,
n50, n51, n52, n53, n54, n55, n56, n57, n58, n59, n60, n61, n62, n63,
n64, n6... |
// Copyright (C) 1991-2015 Altera Corporation. All rights reserved.
// Your use of Altera Corporation's design tools, logic functions
// and other software and tools, and its AMPP partner logic
// functions, and any output files from any of the foregoing
// (including device programming or simulation files), and any... |
`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company:
// Engineer:
//
// Create Date: 18:10:30 02/08/2016
// Design Name:
// Module Name: Hazard_unit
// Project Name:
// Target Devices:
// Tool versions:
// Description:
//
// Dependencies:
/... |
#include <bits/stdc++.h> using namespace std; int N, M; vector<pair<int, int> > V; int main(int argc, const char *argv[]) { cin >> N >> M; for (int i = 0, x, y; i < M; i++) { cin >> x >> y; V.push_back(pair<int, int>(x, y)); } sort(V.begin(), V.end()); vector<pair<int, int> > cur... |
#include <bits/stdc++.h> using namespace std; int main() { long long int n, i, j = 0, c1 = 0, c0 = 0; string a, b; vector<long long int> v0, v1; cin >> n; cin >> a; cin >> b; for (i = 0; i < n; i++) { if (b[i] == 0 ) { if (a[i] == 1 ) v1.push_back(i); el... |
#include <bits/stdc++.h> using namespace std; int lim = 1e6; int inf = 1e8; void err(istream_iterator<string> it) { cerr << endl; } template <typename T, typename... Args> void err(istream_iterator<string> it, T a, Args... args) { cerr << *it << = << a << t ; err(++it, args...); } template... |
/*
* File: pippo_timer.v
* Project: pippo
* Designer: kiss@pwrsemi
* Mainteiner: kiss@pwrsemi
* Checker:
* Assigner:
* Description:
Ò»£¬ÊµÏÖPowerPC Embedded ArchitectureµÄ¶þ¸öÎïÀí¼ÆÊýÆ÷ºÍÈý¸ö¶¨Ê±Æ÷Âß¼£º
ÎïÀí¼ÆÊýÆ÷Time Base£º64룬µÝÔö£»TBµÄeventÓУº
Watchdog eve... |
// ========== Copyright Header Begin ==========================================
//
// OpenSPARC T1 Processor File: dram_ctl_edgelogic.v
// Copyright (c) 2006 Sun Microsystems, Inc. All Rights Reserved.
// DO NOT ALTER OR REMOVE COPYRIGHT NOTICES.
//
// The above named program is free software; you can redistribute i... |
/**
* Copyright 2020 The SkyWater PDK Authors
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* https://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable la... |
/******************************************************************************
* License Agreement *
* *
* Copyright (c) 1991-2012 Altera Corporation, San Jose, California, USA. *
... |
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.