name
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code
string
asm
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string
getProcAddressEGL
static GLFWglproc getProcAddressEGL(const char* procname) { _GLFWwindow* window = _glfwPlatformGetCurrentContext(); if (window->context.egl.client) { GLFWglproc proc = (GLFWglproc) _glfw_dlsym(window->context.egl.client, procname); if (proc...
pushq %rbp movq %rsp, %rbp subq $0x20, %rsp movq %rdi, -0x10(%rbp) callq 0x26940 movq %rax, -0x18(%rbp) movq -0x18(%rbp), %rax cmpq $0x0, 0x290(%rax) je 0x29b7e movq -0x18(%rbp), %rax movq 0x290(%rax), %rdi movq -0x10(%rbp), %rsi callq 0x108e0 movq %rax, -0x20(%rbp) cmpq $0x0, -0x20(%rbp) je 0x29b7c movq -0x20(%rbp), %...
/drobilla[P]glfw/src/egl_context.c
destroyContextEGL
static void destroyContextEGL(_GLFWwindow* window) { #if defined(_GLFW_X11) // NOTE: Do not unload libGL.so.1 while the X11 display is still open, // as it will make XCloseDisplay segfault if (window->context.client != GLFW_OPENGL_API) #endif // _GLFW_X11 { if (window->context.egl.client) ...
pushq %rbp movq %rsp, %rbp subq $0x10, %rsp movq %rdi, -0x8(%rbp) movq -0x8(%rbp), %rax cmpl $0x30001, 0x1f0(%rax) # imm = 0x30001 je 0x29beb movq -0x8(%rbp), %rax cmpq $0x0, 0x290(%rax) je 0x29be9 movq -0x8(%rbp), %rax movq 0x290(%rax), %rdi callq 0x10a30 movq -0x8(%rbp), %rax movq $0x0, 0x290(%rax) jmp 0x29beb movq...
/drobilla[P]glfw/src/egl_context.c
glfwChooseVisualEGL
GLFWbool _glfwChooseVisualEGL(const _GLFWctxconfig* ctxconfig, const _GLFWfbconfig* fbconfig, Visual** visual, int* depth) { XVisualInfo* result; XVisualInfo desired; EGLConfig native; EGLint visualID = 0, count = 0; const long vimask = Vis...
pushq %rbp movq %rsp, %rbp subq $0x90, %rsp movq %rdi, -0x10(%rbp) movq %rsi, -0x18(%rbp) movq %rdx, -0x20(%rbp) movq %rcx, -0x28(%rbp) movl $0x0, -0x7c(%rbp) movl $0x0, -0x80(%rbp) movq $0x3, -0x88(%rbp) movq -0x10(%rbp), %rdi movq -0x18(%rbp), %rsi leaq -0x78(%rbp), %rdx callq 0x296b0 cmpl $0x0, %eax jne 0x29ce9 movl...
/drobilla[P]glfw/src/egl_context.c
glfwGetEGLContext
GLFWAPI EGLContext glfwGetEGLContext(GLFWwindow* handle) { _GLFWwindow* window = (_GLFWwindow*) handle; _GLFW_REQUIRE_INIT_OR_RETURN(EGL_NO_CONTEXT); if (window->context.client == GLFW_NO_API) { _glfwInputError(GLFW_NO_WINDOW_CONTEXT, NULL); return EGL_NO_CONTEXT; } return wind...
pushq %rbp movq %rsp, %rbp subq $0x20, %rsp movq %rdi, -0x10(%rbp) movq -0x10(%rbp), %rax movq %rax, -0x18(%rbp) leaq 0xeddd(%rip), %rax # 0x38bf8 cmpl $0x0, (%rax) jne 0x29e3a movl $0x10001, %edi # imm = 0x10001 xorl %eax, %eax movl %eax, %esi movb $0x0, %al callq 0x17170 movq $0x0, -0x8(%rbp) jmp 0x29e7...
/drobilla[P]glfw/src/egl_context.c
glfwGetEGLSurface
GLFWAPI EGLSurface glfwGetEGLSurface(GLFWwindow* handle) { _GLFWwindow* window = (_GLFWwindow*) handle; _GLFW_REQUIRE_INIT_OR_RETURN(EGL_NO_SURFACE); if (window->context.client == GLFW_NO_API) { _glfwInputError(GLFW_NO_WINDOW_CONTEXT, NULL); return EGL_NO_SURFACE; } return wind...
pushq %rbp movq %rsp, %rbp subq $0x20, %rsp movq %rdi, -0x10(%rbp) movq -0x10(%rbp), %rax movq %rax, -0x18(%rbp) leaq 0xed5d(%rip), %rax # 0x38bf8 cmpl $0x0, (%rax) jne 0x29eba movl $0x10001, %edi # imm = 0x10001 xorl %eax, %eax movl %eax, %esi movb $0x0, %al callq 0x17170 movq $0x0, -0x8(%rbp) jmp 0x29ef...
/drobilla[P]glfw/src/egl_context.c
openJoystickDevice
static GLFWbool openJoystickDevice(const char* path) { char axisCount, buttonCount; char name[256] = ""; int jid, fd, version; _GLFWjoystick* js; for (jid = 0; jid <= GLFW_JOYSTICK_LAST; jid++) { if (!_glfw.joysticks[jid].present) continue; if (strcmp(_glfw.joystic...
pushq %rbp movq %rsp, %rbp subq $0x140, %rsp # imm = 0x140 movq %rdi, -0x10(%rbp) leaq -0x120(%rbp), %rdi xorl %esi, %esi movl $0x100, %edx # imm = 0x100 callq 0x100f0 movl $0x0, -0x124(%rbp) cmpl $0xf, -0x124(%rbp) jg 0x2a223 movslq -0x124(%rbp), %rcx leaq 0xea35(%rip), %rax # 0x38bf8 addq $...
/drobilla[P]glfw/src/linux_joystick.c
llvm::DenseMapBase<llvm::DenseMap<llvm::sys::fs::UniqueID, clang::DirectoryEntry*, llvm::DenseMapInfo<llvm::sys::fs::UniqueID, void>, llvm::detail::DenseMapPair<llvm::sys::fs::UniqueID, clang::DirectoryEntry*>>, llvm::sys::fs::UniqueID, clang::DirectoryEntry*, llvm::DenseMapInfo<llvm::sys::fs::UniqueID, void>, llvm::de...
value_type& FindAndConstruct(KeyT &&Key) { BucketT *TheBucket; if (LookupBucketFor(Key, TheBucket)) return *TheBucket; return *InsertIntoBucket(TheBucket, std::move(Key)); }
pushq %r15 pushq %r14 pushq %rbx subq $0x10, %rsp movq %rsi, %rbx movq %rdi, %r14 leaq 0x8(%rsp), %r15 movq %r15, %rdx callq 0x7e62a6 movl %eax, %ecx movq (%r15), %rax testb %cl, %cl jne 0x7e629c movq %r14, %rdi movq %rbx, %rsi movq %rbx, %rdx movq %rax, %rcx callq 0x7e6418 movups (%rbx), %xmm0 movups %xmm0, (%rax) mov...
/llvm/ADT/DenseMap.h
getHIPOffloadTargetTriple(clang::driver::Driver const&, llvm::opt::ArgList const&)
static std::optional<llvm::Triple> getHIPOffloadTargetTriple(const Driver &D, const ArgList &Args) { if (!Args.hasArg(options::OPT_offload_EQ)) { auto OffloadArchs = Args.getAllArgValues(options::OPT_offload_arch_EQ); if (llvm::find(OffloadArchs, "amdgcnspirv") != OffloadArchs.cend()) { if (OffloadArchs...
pushq %r15 pushq %r14 pushq %r12 pushq %rbx subq $0xa8, %rsp movq %rdx, %r15 movq %rsi, %r14 movq %rdi, %rbx movq %rdx, %rdi movl $0xb85, %esi # imm = 0xB85 callq 0x7fd7d4 testq %rax, %rax je 0x801332 leaq 0x8(%rsp), %r12 movq %r12, %rdi movq %r14, %rsi movq %r15, %rdx callq 0x8156ba movb 0x38(%r12), %al tes...
/Driver/Driver.cpp
RenderComplexRangeOption[abi:cxx11](clang::LangOptionsBase::ComplexRangeKind)
static std::string RenderComplexRangeOption(LangOptions::ComplexRangeKind Range) { std::string ComplexRangeStr = ComplexRangeKindToStr(Range); if (!ComplexRangeStr.empty()) return "-complex-range=" + ComplexRangeStr; return ComplexRangeStr; }
pushq %r14 pushq %rbx subq $0x28, %rsp movq %rdi, %rbx leaq 0x8(%rsp), %r14 movq %r14, %rdi callq 0x86c2a4 cmpq $0x0, 0x8(%r14) je 0x86bf07 leaq 0x2a2de30(%rip), %rsi # 0x3299d0b leaq 0x8(%rsp), %r14 movq %rbx, %rdi movq %r14, %rdx callq 0x76484b movq (%r14), %rdi leaq 0x18(%rsp), %rax cmpq %rax, %rdi je 0x86bf38 mov...
/Driver/ToolChains/Clang.cpp
clang::driver::tools::darwin::VerifyDebug::ConstructJob(clang::driver::Compilation&, clang::driver::JobAction const&, clang::driver::InputInfo const&, llvm::SmallVector<clang::driver::InputInfo, 4u> const&, llvm::opt::ArgList const&, char const*) const
void darwin::VerifyDebug::ConstructJob(Compilation &C, const JobAction &JA, const InputInfo &Output, const InputInfoList &Inputs, const ArgList &Args, const char *L...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x128, %rsp # imm = 0x128 movq %r9, %rbx movq %r8, %r13 movq %rcx, %r12 movq %rdx, 0x38(%rsp) movq %rsi, 0x40(%rsp) movq %rdi, %r15 leaq 0xa8(%rsp), %rcx movq %rcx, -0x10(%rcx) movabsq $0x1000000000, %rax # imm = 0x1000000000 movq %r...
/Driver/ToolChains/Darwin.cpp
clang::driver::toolchains::Linux::getMultiarchTriple[abi:cxx11](clang::driver::Driver const&, llvm::Triple const&, llvm::StringRef) const
std::string Linux::getMultiarchTriple(const Driver &D, const llvm::Triple &TargetTriple, StringRef SysRoot) const { llvm::Triple::EnvironmentType TargetEnvironment = TargetTriple.getEnvironment(); bool IsAndroid = TargetTriple.isAndro...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x128, %rsp # imm = 0x128 movq %rcx, %r14 movq %rdi, %rbx movl 0x20(%rcx), %ecx decl %ecx cmpl $0x25, %ecx ja 0x8c2145 movq %r9, %r15 movq %r8, %r12 movq %rdx, %r13 movl 0x30(%r14), %ebp movl 0x24(%r14), %eax leaq 0x2a0a8af(%rip), %rdx ...
/Driver/ToolChains/Linux.cpp
clang::driver::toolchains::NaClToolChain::AddClangSystemIncludeArgs(llvm::opt::ArgList const&, llvm::SmallVector<char const*, 16u>&) const
void NaClToolChain::AddClangSystemIncludeArgs(const ArgList &DriverArgs, ArgStringList &CC1Args) const { const Driver &D = getDriver(); if (DriverArgs.hasArg(clang::driver::options::OPT_nostdinc)) return; if (!DriverArgs.hasArg(options::OPT_nobuiltininc)) { S...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x148, %rsp # imm = 0x148 movq %rdx, %rbx movq %rsi, %r14 movq %rdi, %r15 movq 0x8(%rdi), %rbp movq %rsi, %rdi movl $0xb52, %esi # imm = 0xB52 callq 0x7fd7d4 testq %rax, %rax jne 0x8d9bc4 movq %r14, %rdi movl $0xb3e, %esi ...
/Driver/ToolChains/NaCl.cpp
clang::driver::MultilibSetBuilder::Either(clang::driver::MultilibBuilder const&, clang::driver::MultilibBuilder const&, clang::driver::MultilibBuilder const&, clang::driver::MultilibBuilder const&, clang::driver::MultilibBuilder const&)
MultilibSetBuilder &MultilibSetBuilder::Either(const MultilibBuilder &M1, const MultilibBuilder &M2, const MultilibBuilder &M3, const MultilibBuilder &M4, ...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x258, %rsp # imm = 0x258 movq %r9, %r14 movq %r8, %r12 movq %rcx, %r13 movq %rdx, %rbp movq %rsi, %r15 movq %rdi, %rbx leaq 0x10(%rsp), %rax movq %rax, -0x10(%rax) movq (%rsi), %rsi movq 0x8(%r15), %rdx addq %rsi, %rdx movq %rsp, %rdi c...
/Driver/MultilibBuilder.cpp
clang::driver::tools::ppc::getPPCTargetCPU[abi:cxx11](clang::driver::Driver const&, llvm::opt::ArgList const&, llvm::Triple const&)
std::string ppc::getPPCTargetCPU(const Driver &D, const ArgList &Args, const llvm::Triple &T) { if (Arg *A = Args.getLastArg(clang::driver::options::OPT_mcpu_EQ)) return normalizeCPUName(A->getValue(), T); return getPPCGenericTargetCPU(T); }
pushq %r15 pushq %r14 pushq %rbx movq %rcx, %r14 movq %rdi, %rbx movq %rdx, %rdi movl $0x8a0, %esi # imm = 0x8A0 callq 0x7fd7d4 testq %rax, %rax je 0x8fe78e movq 0x30(%rax), %rax movq (%rax), %r15 testq %r15, %r15 je 0x8fe7a0 movq %r15, %rdi callq 0x6e5300 movq %rax, %rdx jmp 0x8fe7a2 movl 0x20(%r14), %esi m...
/Driver/ToolChains/Arch/PPC.cpp
clang::driver::tools::sparc::getSparcTargetFeatures(clang::driver::Driver const&, llvm::opt::ArgList const&, std::vector<llvm::StringRef, std::allocator<llvm::StringRef>>&)
void sparc::getSparcTargetFeatures(const Driver &D, const ArgList &Args, std::vector<StringRef> &Features) { sparc::FloatABI FloatABI = sparc::getSparcFloatABI(D, Args); if (FloatABI == sparc::FloatABI::Soft) Features.push_back("+soft-float"); if (Arg *A = Args.getLastArg(o...
pushq %r14 pushq %rbx subq $0x18, %rsp movq %rdx, %rbx movq %rsi, %r14 callq 0x8ff292 cmpl $0x1, %eax jne 0x8ff5ee leaq 0x3dc8e38(%rip), %rax # 0x46c83f2 movq %rax, 0x8(%rsp) movq $0xb, 0x10(%rsp) movq 0x8(%rbx), %rsi cmpq 0x10(%rbx), %rsi je 0x8ff5e1 movups 0x8(%rsp), %xmm0 movups %xmm0, (%rsi) addq $0x10, 0x8(%rbx)...
/Driver/ToolChains/Arch/Sparc.cpp
clang::CompilerInstance::setTarget(clang::TargetInfo*)
void CompilerInstance::setTarget(TargetInfo *Value) { Target = Value; }
movq %rdi, %rax testq %rsi, %rsi je 0x906fc8 incl 0xc4(%rsi) movq 0x28(%rax), %rdi movq %rsi, 0x28(%rax) testq %rdi, %rdi je 0x906fdd decl 0xc4(%rdi) je 0x906fde retq movq (%rdi), %rax jmpq *0x8(%rax)
/Frontend/CompilerInstance.cpp
clang::Preprocessor::AnnotatePreviousCachedTokens(clang::Token const&)
void Preprocessor::AnnotatePreviousCachedTokens(const Token &Tok) { assert(Tok.isAnnotation() && "Expected annotation token"); assert(CachedLexPos != 0 && "Expected to have some cached tokens"); assert(CachedTokens[CachedLexPos-1].getLastLoc() == Tok.getAnnotationEndLoc() && "The annotation should be unt...
movq 0xb70(%rdi), %rcx testq %rcx, %rcx je 0x9f3384 pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx pushq %rax movq %rsi, %r14 movq %rdi, %rbx movq 0xb48(%rdi), %rax movl (%rsi), %edx leaq (%rcx,%rcx,2), %rsi leaq (%rax,%rsi,8), %r15 addq $-0x18, %r15 movq %rax, %r13 negq %r13 movq %rcx, %r12 cmpl %ed...
/Lex/PPCaching.cpp
llvm::detail::DenseMapPair<clang::ObjCInterfaceDecl*, llvm::SmallVector<std::pair<clang::ObjCInterfaceDecl*, clang::ObjCInterfaceDecl::DefinitionData*>, 2u>>* llvm::DenseMapBase<llvm::SmallDenseMap<clang::ObjCInterfaceDecl*, llvm::SmallVector<std::pair<clang::ObjCInterfaceDecl*, clang::ObjCInterfaceDecl::DefinitionData...
BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup, BucketT *TheBucket) { incrementEpoch(); // If the load of the hash table is more than 3/4, or if fewer than 1/8 of // the buckets are empty (meaning that many are filled with tombstones), // grow th...
pushq %r15 pushq %r14 pushq %rbx subq $0x10, %rsp movq %rcx, %rax movq %rdx, %r14 movq %rdi, %rbx movl (%rdi), %edx movl %edx, %ecx shrl %ecx movl $0x2, %esi testb $0x1, %dl jne 0xa66e25 movl 0x10(%rbx), %esi leal 0x4(,%rcx,4), %edx leal (%rsi,%rsi,2), %edi cmpl %edi, %edx jae 0xa66e5c notl %ecx addl %esi, %ecx subl 0x...
/llvm/ADT/DenseMap.h
llvm::SmallVectorTemplateBase<std::pair<std::pair<clang::ObjCCategoryDecl*, clang::ObjCCategoryDecl*>, llvm::SmallVector<std::pair<clang::ObjCIvarDecl*, clang::ObjCIvarDecl*>, 4u>>, false>::moveElementsForGrow(std::pair<std::pair<clang::ObjCCategoryDecl*, clang::ObjCCategoryDecl*>, llvm::SmallVector<std::pair<clang::Ob...
void SmallVectorTemplateBase<T, TriviallyCopyable>::moveElementsForGrow( T *NewElts) { // Move the elements over. this->uninitialized_move(this->begin(), this->end(), NewElts); // Destroy the original elements. destroy_range(this->begin(), this->end()); }
pushq %r15 pushq %r14 pushq %rbx movq %rsi, %rdx movq %rdi, %rbx movq (%rdi), %rdi movl 0x8(%rbx), %eax leaq (%rax,%rax,2), %rsi shlq $0x5, %rsi addq %rdi, %rsi callq 0xa6768a movl 0x8(%rbx), %eax testq %rax, %rax je 0xa67683 movq (%rbx), %rbx leaq -0x40(%rbx), %r14 shlq $0x5, %rax leaq (%rax,%rax,2), %r15 movq -0x50(%...
/llvm/ADT/SmallVector.h
clang::TreeTransform<(anonymous namespace)::AdjustConstraintDepth>::TransformConstantArrayType(clang::TypeLocBuilder&, clang::ConstantArrayTypeLoc)
QualType TreeTransform<Derived>::TransformConstantArrayType(TypeLocBuilder &TLB, ConstantArrayTypeLoc TL) { const ConstantArrayType *T = TL.getTypePtr(); QualType ElementType = getDerived().TransformType(TLB, TL.getElementLoc()); if (ElementType.isNull()) ret...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x78, %rsp movq %rcx, %r12 movq %rsi, %rbx movq %rdi, %r15 movq %rdx, 0x10(%rsp) movq 0x20(%rdx), %r14 leaq 0x10(%rcx), %rbp movq %r14, %rdi callq 0x15bc822 xorl %ecx, %ecx testq %rbp, %rbp setne %cl subq %rcx, %rbp movl %eax, %esi xorl %r13d, %r13...
/Sema/TreeTransform.h
DeclHasAttr(clang::Decl const*, clang::Attr const*)
static bool DeclHasAttr(const Decl *D, const Attr *A) { const OwnershipAttr *OA = dyn_cast<OwnershipAttr>(A); const AnnotateAttr *Ann = dyn_cast<AnnotateAttr>(A); for (const auto *i : D->attrs()) if (i->getKind() == A->getKind()) { if (Ann) { if (Ann->getAnnotation() == cast<AnnotateAttr>(i)->ge...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx pushq %rax movq %rsi, %r14 movzwl 0x20(%rsi), %ebx xorl %r13d, %r13d cmpl $0x129, %ebx # imm = 0x129 movl $0x0, %ebp cmoveq %rsi, %rbp callq 0x9842ae cmpq %rdx, %rax je 0xcb08cc movq %rax, %r15 movq %rdx, %r12 movq %rbp, (%rsp) xorl %ebp, %ebp...
/Sema/SemaDecl.cpp
void clang::Decl::dropAttrs<clang::SelectAnyAttr>()
void dropAttrs() { if (!HasAttrs) return; AttrVec &Vec = getAttrs(); llvm::erase_if(Vec, [](Attr *A) { return isa<Ts...>(A); }); if (Vec.empty()) HasAttrs = false; }
testb $0x1, 0x1d(%rdi) je 0xcb1c12 pushq %r14 pushq %rbx pushq %rax movq %rdi, %rbx callq 0x13b3844 movq %rax, %r14 movq (%rax), %rdi movl 0x8(%rax), %eax leaq (%rdi,%rax,8), %rsi callq 0xcb1c13 subq (%r14), %rax shrq $0x3, %rax movl %eax, 0x8(%r14) testl %eax, %eax jne 0xcb1c0b andb $-0x2, 0x1d(%rbx) addq $0x8, %rsp p...
/clang/AST/DeclBase.h
getOpenCLKernelParameterType(clang::Sema&, clang::QualType)
static OpenCLParamType getOpenCLKernelParameterType(Sema &S, QualType PT) { if (PT->isDependentType()) return InvalidKernelParam; if (PT->isPointerType() || PT->isReferenceType()) { QualType PointeeType = PT->getPointeeType(); if (PointeeType.getAddressSpace() == LangAS::opencl_generic || Point...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x88, %rsp movq %rdi, %r15 movq %rsi, (%rsp) movq %rsi, %rcx andq $-0x10, %rcx movq (%rcx), %rdi testb $0x4, 0x11(%rdi) jne 0xcb1f9f movq 0x8(%rdi), %rax andq $-0x10, %rax movq (%rax), %rax movb 0x10(%rax), %al addb $-0x28, %al cmpb $0x2, %al ja 0x...
/Sema/SemaDecl.cpp
(anonymous namespace)::SelfReferenceChecker::VisitCXXOperatorCallExpr(clang::CXXOperatorCallExpr*)
void VisitCXXOperatorCallExpr(CXXOperatorCallExpr *E) { Expr *Callee = E->getCallee(); if (isa<UnresolvedLookupExpr>(Callee)) return Inherited::VisitCXXOperatorCallExpr(E); Visit(Callee); for (auto Arg: E->arguments()) HandleValue(Arg->IgnoreParenImpCasts()); }
pushq %r15 pushq %r14 pushq %r12 pushq %rbx pushq %rax movq %rsi, %r14 movq %rdi, %rbx movzbl 0x3(%rsi), %eax movq (%rsi,%rax), %rsi cmpb $0x19, (%rsi) jne 0xcb492b movq %rbx, %rdi movq %r14, %rsi addq $0x8, %rsp popq %rbx popq %r12 popq %r14 popq %r15 jmp 0xcb4896 movq %rbx, %rdi callq 0xcb452a movl 0x10(%r14), %r15d ...
/Sema/SemaDecl.cpp
void llvm::function_ref<void (clang::SourceLocation, clang::PartialDiagnostic)>::callback_fn<clang::Sema::DiagnoseUnusedNestedTypedefs(clang::RecordDecl const*)::$_0>(long, clang::SourceLocation, clang::PartialDiagnostic)
static Ret callback_fn(intptr_t callable, Params ...params) { return (*reinterpret_cast<Callable*>(callable))( std::forward<Params>(params)...); }
pushq %r14 pushq %rbx subq $0x78, %rsp movl %esi, %eax movl 0x10(%rdx), %ecx movq %rsp, %rbx movl %ecx, 0x10(%rbx) movups (%rdx), %xmm0 movaps %xmm0, (%rbx) movq $0x0, (%rdx) movq (%rdi), %rsi addq $0x8, %rsi leaq 0x18(%rsp), %r14 movq %r14, %rdi movl %eax, %edx movq %rbx, %rcx xorl %r8d, %r8d callq 0xbcc81a movq %r14,...
/llvm/ADT/STLFunctionalExtras.h
clang::Sema::checkMSInheritanceAttrOnDefinition(clang::CXXRecordDecl*, clang::SourceRange, bool, clang::MSInheritanceModel)
bool Sema::checkMSInheritanceAttrOnDefinition( CXXRecordDecl *RD, SourceRange Range, bool BestCase, MSInheritanceModel ExplicitModel) { assert(RD->hasDefinition() && "RD has no definition!"); // We may not have seen base specifiers or any virtual methods yet. We will // have to wait until the record is ...
pushq %rbp pushq %r15 pushq %r14 pushq %r12 pushq %rbx subq $0x70, %rsp movl %r8d, %ebp movl %ecx, %r12d movq %rdx, %r15 movq %rsi, %r14 movq %rdi, %rbx movq %rsi, (%rsp) movq 0x80(%rsi), %rcx testq %rcx, %rcx jne 0xcbea43 movq 0x68(%r14), %rsi leaq 0x60(%rsi), %rdi callq 0x9736d6 movq 0x80(%r14), %rcx xorl %eax, %eax ...
/Sema/SemaDeclAttr.cpp
handleDestructorAttr(clang::Sema&, clang::Decl*, clang::ParsedAttr const&)
static void handleDestructorAttr(Sema &S, Decl *D, const ParsedAttr &AL) { uint32_t priority = DestructorAttr::DefaultPriority; if (AL.getNumArgs() && !S.checkUInt32Argument(AL, AL.getArgAsExpr(0), priority)) return; D->addAttr(::new (S.Context) DestructorAttr(S.Context, AL, priority)); }
pushq %r15 pushq %r14 pushq %r12 pushq %rbx pushq %rax movq %rdx, %r14 movq %rsi, %rbx movq %rdi, %r15 movl $0xffff, 0x4(%rsp) # imm = 0xFFFF cmpw $0x0, 0x30(%rdx) je 0xcc7827 movq 0x48(%r14), %rdx andq $-0x4, %rdx leaq 0x4(%rsp), %rcx movq %r15, %rdi movq %r14, %rsi movl $0xffffffff, %r8d # imm = 0xFFFFFFFF...
/Sema/SemaDeclAttr.cpp
handleWeakImportAttr(clang::Sema&, clang::Decl*, clang::ParsedAttr const&)
static void handleWeakImportAttr(Sema &S, Decl *D, const ParsedAttr &AL) { // weak_import only applies to variable & function declarations. bool isDef = false; if (!D->canBeWeakImported(isDef)) { if (isDef) S.Diag(AL.getLoc(), diag::warn_attribute_invalid_on_definition) << "weak_import"; els...
pushq %r15 pushq %r14 pushq %r12 pushq %rbx subq $0x68, %rsp movq %rdx, %rbx movq %rsi, %r15 movq %rdi, %r14 leaq 0x2(%rsp), %rsi movb $0x0, (%rsi) movq %r15, %rdi callq 0x13b4336 testb %al, %al je 0xccd8b9 movl $0x850, %edi # imm = 0x850 addq 0x100(%r14), %rdi movl $0x28, %esi movl $0x3, %edx callq 0x7825a6...
/Sema/SemaDeclAttr.cpp
handleExclusiveTrylockFunctionAttr(clang::Sema&, clang::Decl*, clang::ParsedAttr const&)
static void handleExclusiveTrylockFunctionAttr(Sema &S, Decl *D, const ParsedAttr &AL) { SmallVector<Expr*, 2> Args; if (!checkTryLockFunAttrCommon(S, D, AL, Args)) return; D->addAttr(::new (S.Context) ExclusiveTrylockFunctionAttr( S.Context, AL, AL.getArg...
pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x20, %rsp movq %rdx, %r14 movq %rsi, %rbx movq %rdi, %r15 leaq 0x10(%rsp), %r13 movq %r13, -0x10(%r13) movabsq $0x200000000, %rax # imm = 0x200000000 movq %rax, -0x8(%r13) movq %rsp, %rcx callq 0xce9fa9 testb %al, %al je 0xcd0592 movl $0x850, %edi ...
/Sema/SemaDeclAttr.cpp
handleAssertCapabilityAttr(clang::Sema&, clang::Decl*, clang::ParsedAttr const&)
static void handleAssertCapabilityAttr(Sema &S, Decl *D, const ParsedAttr &AL) { SmallVector<Expr*, 1> Args; if (!checkLockFunAttrCommon(S, D, AL, Args)) return; D->addAttr(::new (S.Context) AssertCapabilityAttr(S.Context, AL, Args.data(), Args.size())); }
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x18, %rsp movq %rdx, %r15 movq %rsi, %rbx movq %rdi, %r12 leaq 0x10(%rsp), %rbp movq %rbp, -0x10(%rbp) movabsq $0x100000000, %rax # imm = 0x100000000 movq %rax, -0x8(%rbp) movq %rsp, %r14 movq %r14, %rcx xorl %r8d, %r8d movl $0x1, %r9d callq ...
/Sema/SemaDeclAttr.cpp
handleArgumentWithTypeTagAttr(clang::Sema&, clang::Decl*, clang::ParsedAttr const&)
static void handleArgumentWithTypeTagAttr(Sema &S, Decl *D, const ParsedAttr &AL) { if (!AL.isArgIdent(0)) { S.Diag(AL.getLoc(), diag::err_attribute_argument_n_type) << AL << /* arg num = */ 1 << AANT_ArgumentIdentifier; return; } ParamIdx ArgumentIdx; ...
pushq %rbp pushq %r15 pushq %r14 pushq %r12 pushq %rbx subq $0x80, %rsp movq %rdx, %rbx movq %rdi, %r15 cmpw $0x0, 0x30(%rdx) je 0xcd1481 testb $0x2, 0x48(%rbx) jne 0xcd14e9 addq $0x8, %r15 movl 0x10(%rbx), %edx leaq 0x20(%rsp), %r14 movq %r14, %rdi movq %r15, %rsi movl $0xb2e, %ecx # imm = 0xB2E xorl %r8d, ...
/Sema/SemaDeclAttr.cpp
handleMSAllocatorAttr(clang::Sema&, clang::Decl*, clang::ParsedAttr const&)
static void handleMSAllocatorAttr(Sema &S, Decl *D, const ParsedAttr &AL) { // Warn if the return type is not a pointer or reference type. if (auto *FD = dyn_cast<FunctionDecl>(D)) { QualType RetTy = FD->getReturnType(); if (!RetTy->isPointerType() && !RetTy->isReferenceType()) { S.Diag(AL.getLoc(), d...
pushq %r15 pushq %r14 pushq %rbx subq $0x70, %rsp movq %rdx, %rbx movq %rsi, %r15 movq %rdi, %r14 testq %rsi, %rsi je 0xcd1d67 movl 0x1c(%r15), %eax andl $0x7f, %eax addl $-0x25, %eax cmpl $-0x6, %eax jb 0xcd1d67 movq 0x30(%r15), %rax andq $-0x10, %rax movq (%rax), %rax movb 0x10(%rax), %cl addb $-0x1b, %cl cmpb $-0x3,...
/Sema/SemaDeclAttr.cpp
clang::RecursiveASTVisitor<(anonymous namespace)::ArgumentDependenceChecker>::TraverseTypeLoc(clang::TypeLoc)
bool RecursiveASTVisitor<Derived>::TraverseTypeLoc(TypeLoc TL) { if (TL.isNull()) return true; switch (TL.getTypeLocClass()) { #define ABSTRACT_TYPELOC(CLASS, BASE) #define TYPELOC(CLASS, BASE) \ case TypeLoc::CLASS: ...
pushq %rbp pushq %r15 pushq %r14 pushq %r12 pushq %rbx subq $0x20, %rsp movb $0x1, %bpl testq %rsi, %rsi je 0xce0109 movq %rdx, %rbx movq %rsi, %r15 movq %rdi, %r14 leaq 0x263c4cc(%rip), %r12 # 0x331c50c testb $0xf, %r15b je 0xce0082 andq $-0x10, %r15 movq (%r15), %rdi andq $-0x10, %rdi callq 0x15bc822 xorl %ecx, %ec...
/clang/AST/RecursiveASTVisitor.h
clang::RecursiveASTVisitor<(anonymous namespace)::ArgumentDependenceChecker>::TraverseConceptReference(clang::ConceptReference*)
bool RecursiveASTVisitor<Derived>::TraverseConceptReference( ConceptReference *CR) { if (!getDerived().shouldTraversePostOrder()) TRY_TO(VisitConceptReference(CR)); TRY_TO(TraverseNestedNameSpecifierLoc(CR->getNestedNameSpecifierLoc())); TRY_TO(TraverseDeclarationNameInfo(CR->getConceptNameInfo())); if ...
pushq %r15 pushq %r14 pushq %r12 pushq %rbx subq $0x18, %rsp movq %rsi, %r14 movq %rdi, %rbx movq (%rsi), %rsi movq 0x8(%r14), %rdx callq 0xce1ae4 testb %al, %al je 0xce1ad1 movq 0x28(%r14), %rax movq %rax, 0x10(%rsp) movups 0x18(%r14), %xmm0 movups %xmm0, (%rsp) movq %rbx, %rdi callq 0xce1b56 testb %al, %al je 0xce1ad...
/clang/AST/RecursiveASTVisitor.h
void clang::Decl::dropAttrs<clang::CodeSegAttr>()
void dropAttrs() { if (!HasAttrs) return; AttrVec &Vec = getAttrs(); llvm::erase_if(Vec, [](Attr *A) { return isa<Ts...>(A); }); if (Vec.empty()) HasAttrs = false; }
testb $0x1, 0x1d(%rdi) je 0xce8f96 pushq %r14 pushq %rbx pushq %rax movq %rdi, %rbx callq 0x13b3844 movq %rax, %r14 movq (%rax), %rdi movl 0x8(%rax), %eax leaq (%rdi,%rax,8), %rsi callq 0xce8f97 subq (%r14), %rax shrq $0x3, %rax movl %eax, 0x8(%r14) testl %eax, %eax jne 0xce8f8f andb $-0x2, 0x1d(%rbx) addq $0x8, %rsp p...
/clang/AST/DeclBase.h
clang::VisibilityAttr* clang::Decl::getAttr<clang::VisibilityAttr>() const
bool hasAttrs() const { return HasAttrs; }
testb $0x1, 0x1d(%rdi) jne 0xcea8c1 xorl %eax, %eax retq pushq %rax callq 0x13b3844 movl 0x8(%rax), %edx testq %rdx, %rdx je 0xcea916 movq (%rax), %rcx shlq $0x3, %rdx xorl %eax, %eax xorl %esi, %esi movq (%rcx,%rsi), %rdi cmpw $0x170, 0x20(%rdi) # imm = 0x170 je 0xcea8f1 addq $0x8, %rsi cmpq %rsi, %rdx jne 0xcea8...
/clang/AST/DeclBase.h
void clang::Decl::dropAttrs<clang::ObjCDesignatedInitializerAttr>()
void dropAttrs() { if (!HasAttrs) return; AttrVec &Vec = getAttrs(); llvm::erase_if(Vec, [](Attr *A) { return isa<Ts...>(A); }); if (Vec.empty()) HasAttrs = false; }
testb $0x1, 0x1d(%rdi) je 0xceb68e pushq %r14 pushq %rbx pushq %rax movq %rdi, %rbx callq 0x13b3844 movq %rax, %r14 movq (%rax), %rdi movl 0x8(%rax), %eax leaq (%rdi,%rax,8), %rsi callq 0xceb68f subq (%r14), %rax shrq $0x3, %rax movl %eax, 0x8(%r14) testl %eax, %eax jne 0xceb687 andb $-0x2, 0x1d(%rbx) addq $0x8, %rsp p...
/clang/AST/DeclBase.h
llvm::DenseMapBase<llvm::DenseMap<clang::ParmVarDecl*, clang::SourceLocation, llvm::DenseMapInfo<clang::ParmVarDecl*, void>, llvm::detail::DenseMapPair<clang::ParmVarDecl*, clang::SourceLocation>>, clang::ParmVarDecl*, clang::SourceLocation, llvm::DenseMapInfo<clang::ParmVarDecl*, void>, llvm::detail::DenseMapPair<clan...
bool erase(const KeyT &Val) { BucketT *TheBucket; if (!LookupBucketFor(Val, TheBucket)) return false; // not in map. TheBucket->getSecond().~ValueT(); TheBucket->getFirst() = getTombstoneKey(); decrementNumEntries(); incrementNumTombstones(); return true; }
pushq %rbx subq $0x10, %rsp movq %rdi, %rbx leaq 0x8(%rsp), %rdx callq 0xd2402a testb %al, %al je 0xcebe14 movq 0x8(%rsp), %rcx movq $-0x2000, (%rcx) # imm = 0xE000 movq 0x8(%rbx), %xmm0 paddd 0x2504ce1(%rip), %xmm0 # 0x31f0af0 movq %xmm0, 0x8(%rbx) addq $0x10, %rsp popq %rbx retq
/llvm/ADT/DenseMap.h
clang::Sema::DiagnoseImmediateEscalatingReason(clang::FunctionDecl*)
void Sema::DiagnoseImmediateEscalatingReason(FunctionDecl *FD) { assert(FD->isImmediateEscalating() && !FD->isConsteval() && "expected an immediate function"); assert(FD->hasBody() && "expected the function to have a body"); struct ImmediateEscalatingExpressionsVisitor : public RecursiveASTVisitor<...
subq $0x28, %rsp movq %rsp, %rax movq %rdi, (%rax) movq %rsi, 0x8(%rax) movl 0x1c(%rsi), %ecx andl $0x7f, %ecx cmpl $0x23, %ecx sete 0x10(%rax) xorps %xmm0, %xmm0 movups %xmm0, 0x18(%rax) movq %rax, %rdi callq 0xcf0db4 addq $0x28, %rsp retq nop
/Sema/SemaDeclCXX.cpp
NoteIndirectBases(clang::ASTContext&, llvm::SmallPtrSet<clang::QualType, 4u>&, clang::QualType const&)
static void NoteIndirectBases(ASTContext &Context, IndirectBaseSet &Set, const QualType &Type) { // Even though the incoming type is a base, it might not be // a class -- it could be a template parm, for instance. if (auto Rec = Type->getAs<RecordType>()) { auto Decl = Rec->getAsCXXRecordDec...
pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x20, %rsp movq %rdi, %rbx andq $-0x10, %rsi movq (%rsi), %rax movq 0x8(%rax), %rax andq $-0x10, %rax movq (%rax), %rdi testq %rdi, %rdi je 0xcf2289 cmpb $0x2e, 0x10(%rdi) jne 0xcf2289 callq 0x15b04ee movq %rax, %rdi callq 0x9847f2 cmpq %rdx, %rax je 0xcf2289...
/Sema/SemaDeclCXX.cpp
clang::Sema::CheckIfOverriddenFunctionIsMarkedFinal(clang::CXXMethodDecl const*, clang::CXXMethodDecl const*)
bool Sema::CheckIfOverriddenFunctionIsMarkedFinal(const CXXMethodDecl *New, const CXXMethodDecl *Old) { FinalAttr *FA = Old->getAttr<FinalAttr>(); if (!FA) return false; Diag(New->getLocation(), diag::err_final_function_overridden) << New->getDeclName() ...
pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0xd0, %rsp movq %rdx, %r15 movq %rsi, %r12 movq %rdi, %r14 movq %rdx, %rdi callq 0xcf19b4 movq %rax, %rbx testq %rax, %rax je 0xcf3520 addq $0x8, %r14 movl 0x18(%r12), %edx leaq 0x10(%rsp), %r13 movq %r13, %rdi movq %r14, %rsi movl $0xda5, %ecx # i...
/Sema/SemaDeclCXX.cpp
clang::Sema::BuildBaseInitializer(clang::QualType, clang::TypeSourceInfo*, clang::Expr*, clang::CXXRecordDecl*, clang::SourceLocation)
MemInitResult Sema::BuildBaseInitializer(QualType BaseType, TypeSourceInfo *BaseTInfo, Expr *Init, CXXRecordDecl *ClassDecl, SourceLocation EllipsisLoc) { SourceLocation BaseLoc = BaseTInfo->getTypeLoc().getBeginLoc(); if (!BaseType->isDependentType() && !BaseT...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x1b78, %rsp # imm = 0x1B78 movl %r9d, %r12d movq %r8, 0x18(%rsp) movq %rcx, %rbp movq %rdx, %rbx movq %rsi, %r15 movq %rdi, %r14 movq %rsi, (%rsp) movq %rcx, 0x38(%rsp) movq (%rdx), %rax leaq 0x8(%rdx), %r13 leaq 0x98(%rsp), %rdi movq %r...
/Sema/SemaDeclCXX.cpp
clang::Sema::DiagnoseAbstractType(clang::CXXRecordDecl const*)
void Sema::DiagnoseAbstractType(const CXXRecordDecl *RD) { // Check if we've already emitted the list of pure virtual functions // for this class. if (PureVirtualClassDiagSet && PureVirtualClassDiagSet->count(RD)) return; // If the diagnostic is suppressed, don't emit the notes. We're only // going to em...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x118, %rsp # imm = 0x118 movq %rsi, %r15 movq %rdi, %rbx movq 0x1000(%rdi), %r14 testq %r14, %r14 je 0xcf770e movq %r14, %rdi movq %r15, %rsi callq 0x9bcc58 movq 0x8(%r14), %rcx xorl %edx, %edx cmpq (%r14), %rcx sete %dl movl 0x10(%r14,...
/Sema/SemaDeclCXX.cpp
GetKeyForMember(clang::ASTContext&, clang::CXXCtorInitializer*)
static const void *GetKeyForMember(ASTContext &Context, CXXCtorInitializer *Member) { if (!Member->isAnyMemberInitializer()) return GetKeyForBase(Context, QualType(Member->getBaseClass(), 0)); return Member->getAnyMember()->getCanonicalDecl(); }
movq %rdi, %rax movq (%rdi), %rdi movl %edi, %ecx andl $0x6, %ecx cmpq $0x2, %rcx je 0xcf9561 cmpl $0x4, %ecx jne 0xcf956b andq $-0x8, %rdi movq 0x38(%rdi), %rax movl 0x40(%rdi), %ecx movq -0x8(%rax,%rcx,8), %rdi jmp 0xcf9565 andq $-0x8, %rdi movq (%rdi), %rax jmpq *0x20(%rax) pushq %rax movq %rax, %rdi callq 0x13bd57c...
/Sema/SemaDeclCXX.cpp
DiagnoseNamespaceInlineMismatch(clang::Sema&, clang::SourceLocation, clang::SourceLocation, clang::IdentifierInfo*, bool*, clang::NamespaceDecl*)
static void DiagnoseNamespaceInlineMismatch(Sema &S, SourceLocation KeywordLoc, SourceLocation Loc, IdentifierInfo *II, bool *IsInline, NamespaceDecl *PrevNS) { assert(*IsInline != PrevN...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x168, %rsp # imm = 0x168 movq %r8, %r14 movq %rcx, %rbx movq %rdi, %r15 testb $0x20, 0x39(%r8) jne 0xd0709a leaq 0x8(%r15), %rsi leaq 0x108(%rsp), %r12 movq %r12, %rdi movl $0xe48, %ecx # imm = 0xE48 xorl %r8d, %r8d callq 0xb...
/Sema/SemaDeclCXX.cpp
clang::Sema::ActOnNamespaceAliasDef(clang::Scope*, clang::SourceLocation, clang::SourceLocation, clang::IdentifierInfo*, clang::CXXScopeSpec&, clang::SourceLocation, clang::IdentifierInfo*)
Decl *Sema::ActOnNamespaceAliasDef(Scope *S, SourceLocation NamespaceLoc, SourceLocation AliasLoc, IdentifierInfo *Alias, CXXScopeSpec &SS, SourceLocation IdentLoc, IdentifierInfo ...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x278, %rsp # imm = 0x278 movq %r9, %rbp movq %r8, %r12 movl %ecx, 0x24(%rsp) movl %edx, 0x4c(%rsp) movq %rsi, %rbx movq %rdi, %r15 movq 0x2b8(%rsp), %rdx movl 0x2b0(%rsp), %ecx movq %r8, 0x40(%rsp) leaq 0x170(%rsp), %r14 movq %r14, %rdi...
/Sema/SemaDeclCXX.cpp
clang::Sema::findInheritingConstructor(clang::SourceLocation, clang::CXXConstructorDecl*, clang::ConstructorUsingShadowDecl*)
CXXConstructorDecl * Sema::findInheritingConstructor(SourceLocation Loc, CXXConstructorDecl *BaseCtor, ConstructorUsingShadowDecl *Shadow) { CXXRecordDecl *Derived = Shadow->getParent(); SourceLocation UsingLoc = Shadow->getLocation(); // FIXME: Add...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x1d8, %rsp # imm = 0x1D8 movq %rdx, %r13 movq %rdi, %rbp movq %rcx, 0x50(%rsp) movq 0x10(%rcx), %rcx movq %rcx, %rax andq $-0x8, %rax testb $0x4, %cl movl %esi, 0x60(%rsp) je 0xd0ce17 movq (%rax), %rax leaq -0x40(%rax), %rcx testq %rax,...
/Sema/SemaDeclCXX.cpp
clang::Sema::DefineInheritingConstructor(clang::SourceLocation, clang::CXXConstructorDecl*)
void Sema::DefineInheritingConstructor(SourceLocation CurrentLocation, CXXConstructorDecl *Constructor) { CXXRecordDecl *ClassDecl = Constructor->getParent(); assert(Constructor->getInheritedConstructor() && !Constructor->doesThisDeclarationHaveABody() && !Co...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0xf8, %rsp movq %rdx, %r15 movl %esi, 0x8(%rsp) movq %rdi, 0x10(%rsp) leaq 0x48(%rdx), %rbx movq %rbx, %rdi callq 0x13b45bc movq 0x10(%rax), %rcx movq %rcx, %rax andq $-0x8, %rax testb $0x4, %cl je 0xd0d594 movq (%rax), %rax leaq -0x40(%rax), %r14 ...
/Sema/SemaDeclCXX.cpp
clang::Sema::ActOnFinishCXXNonNestedClass()
void Sema::ActOnFinishCXXNonNestedClass() { referenceDLLExportedClassMethods(); if (!DelayedDllExportMemberFunctions.empty()) { SmallVector<CXXMethodDecl*, 4> WorkList; std::swap(DelayedDllExportMemberFunctions, WorkList); for (CXXMethodDecl *M : WorkList) { DefineDefaultedFunction(*this, M, M->g...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x38, %rsp movq %rdi, %rbx callq 0xd0deda cmpl $0x0, 0xe38(%rbx) je 0xd0deca leaq 0xe30(%rbx), %rdi leaq 0x18(%rsp), %r12 movq %r12, -0x10(%r12) movabsq $0x400000000, %rax # imm = 0x400000000 movq %rax, -0x8(%r12) leaq 0x8(%rsp), %r15 movq %r1...
/Sema/SemaDeclCXX.cpp
DefineDefaultedFunction(clang::Sema&, clang::FunctionDecl*, clang::SourceLocation)
static void DefineDefaultedFunction(Sema &S, FunctionDecl *FD, SourceLocation DefaultLoc) { Sema::DefaultedFunctionKind DFK = S.getDefaultedFunctionKind(FD); if (DFK.isComparison()) return S.DefineDefaultedComparison(DefaultLoc, FD, DFK.asComparison()); switch (DFK.asSpeci...
pushq %rbp pushq %r14 pushq %rbx movl %edx, %ebp movq %rsi, %rbx movq %rdi, %r14 callq 0xcfa4ac testl $0xff00, %eax # imm = 0xFF00 je 0xd0e212 movzbl %ah, %ecx movq %r14, %rdi movl %ebp, %esi movq %rbx, %rdx popq %rbx popq %r14 popq %rbp jmp 0xd00a88 cmpb $0x5, %al ja 0xd0e28f movzbl %al, %eax leaq 0x260f5ac(...
/Sema/SemaDeclCXX.cpp
clang::Sema::CheckLiteralOperatorDeclaration(clang::FunctionDecl*)
bool Sema::CheckLiteralOperatorDeclaration(FunctionDecl *FnDecl) { if (isa<CXXMethodDecl>(FnDecl)) { Diag(FnDecl->getLocation(), diag::err_literal_operator_outside_namespace) << FnDecl->getDeclName(); return true; } if (FnDecl->isExternC()) { Diag(FnDecl->getLocation(), diag::err_literal_operat...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x258, %rsp # imm = 0x258 movq %rsi, %r14 movq %rdi, %rbx movl 0x1c(%rsi), %eax andl $0x7c, %eax cmpl $0x20, %eax jne 0xd11852 addq $0x8, %rbx movl 0x18(%r14), %edx leaq 0x78(%rsp), %r15 movq %r15, %rdi movq %rbx, %rsi movl $0xeb1, %ecx ...
/Sema/SemaDeclCXX.cpp
clang::Sema::ActOnStartLinkageSpecification(clang::Scope*, clang::SourceLocation, clang::Expr*, clang::SourceLocation)
Decl *Sema::ActOnStartLinkageSpecification(Scope *S, SourceLocation ExternLoc, Expr *LangStr, SourceLocation LBraceLoc) { StringLiteral *Lit = cast<StringLiteral>(LangStr); assert(Lit->isUnevaluated() && "Unexpected string literal...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x78, %rsp movl %r8d, %r12d movq %rcx, %r15 movl %edx, %ebp movq %rsi, %r14 movq %rdi, %rbx movl (%rcx), %edx movl 0x4(%rcx), %eax leaq (%rcx,%rax,4), %rdi addq $0x14, %rdi shrl $0x15, %edx andl $0x7, %edx imull 0x10(%rcx), %edx cmpl $0x3, %edx je ...
/Sema/SemaDeclCXX.cpp
clang::SemaBase::SemaDiagnosticBuilder const& clang::operator<<<llvm::SmallString<12u>>(clang::SemaBase::SemaDiagnosticBuilder const&, llvm::SmallString<12u> const&)
const SemaDiagnosticBuilder & operator<<(const SemaDiagnosticBuilder &Diag, const T &Value) { if (Diag.ImmediateDiag) *Diag.ImmediateDiag << Value; else if (Diag.PartialDiagId) Diag.getDeviceDeferredDiags()[Diag.Fn][*Diag.PartialDiagId].second << Value; return Diag; ...
pushq %r15 pushq %r14 pushq %rbx subq $0x10, %rsp movq %rsi, %r14 movq %rdi, %rbx cmpb $0x1, 0x50(%rdi) jne 0xd140f2 leaq 0x20(%rbx), %rdi jmp 0xd14139 cmpb $0x1, 0x5c(%rbx) jne 0xd14145 movq %rbx, %rdi callq 0xbcc72e movq %rax, %r15 movq 0x10(%rbx), %rdi testq %rdi, %rdi je 0xd14114 movq (%rdi), %rax callq *0x20(%rax)...
/clang/Sema/SemaBase.h
clang::Sema::MarkVirtualMembersReferenced(clang::SourceLocation, clang::CXXRecordDecl const*, bool)
void Sema::MarkVirtualMembersReferenced(SourceLocation Loc, const CXXRecordDecl *RD, bool ConstexprOnly) { // Mark all functions which will appear in RD's vtable as used. CXXFinalOverriderMap FinalOverriders; RD->getFinalOverriders(Fi...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x48, %rsp movl %ecx, %ebp movl %esi, 0xc(%rsp) movq %rdi, %r14 xorps %xmm0, %xmm0 leaq 0x48(%rsp), %rax movaps %xmm0, -0x28(%rax) movl $0x0, -0x18(%rax) movq %rax, -0x10(%rax) movq $0x0, -0x8(%rax) leaq 0x20(%rsp), %r12 movq %rdx, 0x10(%rsp) movq ...
/Sema/SemaDeclCXX.cpp
clang::Sema::DefineUsedVTables()
bool Sema::DefineUsedVTables() { LoadExternalVTableUses(); if (VTableUses.empty()) return false; // Note: The VTableUses vector could grow as a result of marking // the members of a class as "used", so we check the size each // time through the loop and prefer indices (which are stable) to // iterators...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0xa8, %rsp movq %rdi, %rbx callq 0xd17000 xorl %ebp, %ebp cmpl $0x0, 0xce0(%rbx) je 0xd177a7 leaq 0xde8(%rbx), %rax movq %rax, 0x30(%rsp) leaq 0x8(%rbx), %rax movq %rax, 0x28(%rsp) xorl %r14d, %r14d movq $0x0, 0x18(%rsp) movq 0xcd8(%rbx), %rax shlq...
/Sema/SemaDeclCXX.cpp
clang::Sema::checkExceptionSpecification(bool, clang::ExceptionSpecificationType, llvm::ArrayRef<clang::OpaquePtr<clang::QualType>>, llvm::ArrayRef<clang::SourceRange>, clang::Expr*, llvm::SmallVectorImpl<clang::QualType>&, clang::FunctionProtoType::ExceptionSpecInfo&)
void Sema::checkExceptionSpecification( bool IsTopLevel, ExceptionSpecificationType EST, ArrayRef<ParsedType> DynamicExceptions, ArrayRef<SourceRange> DynamicExceptionRanges, Expr *NoexceptExpr, SmallVectorImpl<QualType> &Exceptions, FunctionProtoType::ExceptionSpecInfo &ESI) { Exceptions.clear();...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x48, %rsp movl %esi, %ebp movq %rdi, %rbx movq 0x98(%rsp), %r15 movq 0x90(%rsp), %rax movl $0x0, 0x8(%rax) movl %edx, (%r15) cmpl $0x2, %edx jne 0xd1980f movq %r8, %r12 movq %rcx, %r14 movl 0xc(%rax), %eax cmpq %r8, %rax jae 0xd196ff movq 0x90(%rs...
/Sema/SemaDeclCXX.cpp
printTemplateArgs[abi:cxx11](clang::PrintingPolicy const&, clang::TemplateArgumentListInfo&, clang::TemplateParameterList const*)
static std::string printTemplateArgs(const PrintingPolicy &PrintingPolicy, TemplateArgumentListInfo &Args, const TemplateParameterList *Params) { SmallString<128> SS; llvm::raw_svector_ostream OS(SS); bool First = true; unsigned I = 0; ...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0xd8, %rsp movq %rcx, %r14 movq %rdx, %r13 movq %rsi, %r15 movq %rdi, (%rsp) leaq 0x58(%rsp), %rax movq %rax, -0x18(%rax) xorl %r12d, %r12d movq %r12, -0x10(%rax) movq $0x80, -0x8(%rax) leaq 0x8(%rsp), %rdi movl $0x2, 0x8(%rdi) movb $0x0, 0x28(%rdi...
/Sema/SemaDeclCXX.cpp
isTupleLike(clang::Sema&, clang::SourceLocation, clang::QualType, llvm::APSInt&)::ICEDiagnoser::diagnoseNotICE(clang::Sema&, clang::SourceLocation)
Sema::SemaDiagnosticBuilder diagnoseNotICE(Sema &S, SourceLocation Loc) override { return S.Diag(Loc, diag::err_decomp_decl_std_tuple_size_not_constant) << printTemplateArgs(S.Context.getPrintingPolicy(), Args, /*Params*...
pushq %r15 pushq %r14 pushq %r12 pushq %rbx subq $0x88, %rsp movq %rdx, %r14 movq %rsi, %r15 movq %rdi, %rbx leaq 0x8(%rdx), %rsi leaq 0x28(%rsp), %r12 movq %r12, %rdi movl %ecx, %edx movl $0xcd0, %ecx # imm = 0xCD0 xorl %r8d, %r8d callq 0xbcc738 movl $0x4358, %esi # imm = 0x4358 addq 0x100(%r14), ...
/Sema/SemaDeclCXX.cpp
CheckConstexprCtorInitializer(clang::Sema&, clang::FunctionDecl const*, clang::FieldDecl*, llvm::SmallSet<clang::Decl*, 16u, std::less<clang::Decl*>>&, bool&, clang::Sema::CheckConstexprKind)
static bool CheckConstexprCtorInitializer(Sema &SemaRef, const FunctionDecl *Dcl, FieldDecl *Field, llvm::SmallSet<Decl*, 16> &Inits, bool &Diagnosed, ...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0xd8, %rsp movl %r9d, %ebp movq %r8, %r12 movq %rcx, %r13 movq %rdx, %r15 movq %rdi, %r14 cmpl $0x1, %r9d jne 0xd1b43b movq 0xf0(%r14), %rax movb $0x1, %bl testb $0x40, 0x1(%rax) jne 0xd1b452 movb $0x1, %bl testb $-0x80, 0x1c(%r15) jne 0xd1b452 tes...
/Sema/SemaDeclCXX.cpp
llvm::SmallPtrSetImpl<clang::QualType>::insert(clang::QualType)
std::pair<iterator, bool> insert(PtrType Ptr) { auto p = insert_imp(PtrTraits::getAsVoidPointer(Ptr)); return std::make_pair(makeIterator(p.first), p.second); }
pushq %r14 pushq %rbx pushq %rax movq %rsi, %r14 movq %rdi, %rbx movq %rsi, %rdi movq %rdx, %rsi callq 0x7723c8 movq 0x8(%r14), %rcx xorl %esi, %esi cmpq (%r14), %rcx sete %sil movl 0x10(%r14,%rsi,4), %esi leaq (%rcx,%rsi,8), %rcx cmpq %rax, %rcx je 0xd1b735 cmpq $-0x2, (%rax) jb 0xd1b735 addq $0x8, %rax cmpq %rcx, %ra...
/llvm/ADT/SmallPtrSet.h
void llvm::SmallVectorImpl<clang::Decl*>::append<clang::ObjCProtocolDecl* const*, void>(clang::ObjCProtocolDecl* const*, clang::ObjCProtocolDecl* const*)
void append(ItTy in_start, ItTy in_end) { this->assertSafeToAddRange(in_start, in_end); size_type NumInputs = std::distance(in_start, in_end); this->reserve(this->size() + NumInputs); this->uninitialized_copy(in_start, in_end, this->end()); this->set_size(this->size() + NumInputs); }
pushq %r15 pushq %r14 pushq %rbx movq %rdx, %rbx movq %rsi, %r15 movq %rdi, %r14 subq %rsi, %rbx sarq $0x3, %rbx movl 0x8(%rdi), %eax movl 0xc(%rdi), %ecx leaq (%rbx,%rax), %rdx cmpq %rcx, %rdx jbe 0xd510f3 leaq 0x10(%r14), %rsi movl $0x8, %ecx movq %r14, %rdi callq 0x7803c4 movl 0x8(%r14), %eax testq %rbx, %rbx jle 0x...
/llvm/ADT/SmallVector.h
clang::Sema::LookupParsedName(clang::LookupResult&, clang::Scope*, clang::CXXScopeSpec*, clang::QualType, bool, bool)
bool Sema::LookupParsedName(LookupResult &R, Scope *S, CXXScopeSpec *SS, QualType ObjectType, bool AllowBuiltinCreation, bool EnteringContext) { // When the scope specifier is invalid, don't even look for anything. if (SS && SS->isInvalid()) return false; ...
pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx movq %r8, %r12 movq %rsi, %rbx movq %rdi, %r14 testq %rcx, %rcx je 0xf0a64b movq %rcx, %r15 movb 0x30(%rsp), %al movl (%rcx), %esi movl 0x4(%rcx), %ecx testl %esi, %esi setne %dil testl %ecx, %ecx setne %r8b andb %dil, %r8b cmpb $0x1, %r8b jne 0xf0a5b1 cmpq $0x0, 0...
/Sema/SemaLookup.cpp
clang::Sema::LookupOrCreateLabel(clang::IdentifierInfo*, clang::SourceLocation, clang::SourceLocation)
LabelDecl *Sema::LookupOrCreateLabel(IdentifierInfo *II, SourceLocation Loc, SourceLocation GnuLabelLoc) { // Do a lookup to see if we have a label with this name already. NamedDecl *Res = nullptr; if (GnuLabelLoc.isValid()) { // Local label definitions always shadow exis...
pushq %rbp pushq %r15 pushq %r14 pushq %rbx pushq %rax movl %edx, %ebp movq %rsi, %r14 movq %rdi, %rbx testl %ecx, %ecx je 0xf0d306 movl %ecx, %r8d movq 0x100(%rbx), %rdi movq 0x230(%rbx), %rsi movl %ebp, %edx movq %r14, %rcx callq 0x13ac25c movq %rax, %r15 leaq 0x260(%rbx), %rax jmp 0xf0d372 movq 0x260(%rbx), %rsi mov...
/Sema/SemaLookup.cpp
bool clang::interp::Cast<(clang::interp::PrimType)9, (clang::interp::PrimType)2>(clang::interp::InterpState&, clang::interp::CodePtr)
bool Cast(InterpState &S, CodePtr OpPC) { using T = typename PrimConv<TIn>::T; using U = typename PrimConv<TOut>::T; S.Stk.push<U>(U::from(S.Stk.pop<T>())); return true; }
pushq %rbp pushq %r14 pushq %rbx subq $0x10, %rsp movq 0xb0(%rdi), %rbx movl $0x10, %esi movq %rbx, %rdi callq 0x14e67e4 movl 0x8(%rax), %ecx movq %rsp, %r14 movl %ecx, 0x8(%r14) movq (%rax), %rcx movq %rcx, (%r14) movl $0x0, 0x8(%rax) movl $0x10, %esi movq %rbx, %rdi callq 0x14e6818 movq %r14, %rdi callq 0x149b2c6 mov...
/AST/Interp/Interp.h
bool clang::interp::Init<(clang::interp::PrimType)11, clang::interp::Floating>(clang::interp::InterpState&, clang::interp::CodePtr)
bool Init(InterpState &S, CodePtr OpPC) { const T &Value = S.Stk.pop<T>(); const Pointer &Ptr = S.Stk.peek<Pointer>(); if (!CheckInit(S, OpPC, Ptr)) { assert(false); return false; } Ptr.initialize(); new (&Ptr.deref<T>()) T(Value); return true; }
pushq %r15 pushq %r14 pushq %rbx subq $0x20, %rsp movq %rsi, %rbx movq %rdi, %r15 movq 0xb0(%rdi), %rsi movq %rsp, %rdi callq 0x14938e8 movq 0xb0(%r15), %rdi movl $0x30, %esi callq 0x14e67e4 movq %rax, %r14 movq %r15, %rdi movq %rbx, %rsi movq %rax, %rdx callq 0x14d2cf9 movl %eax, %ebx testb %al, %al je 0x146f9eb movq ...
/AST/Interp/Interp.h
clang::interp::InitMap::InitMap(unsigned int)
InitMap::InitMap(unsigned N) : UninitFields(N), Data(std::make_unique<T[]>(numFields(N))) { std::fill_n(data(), numFields(N), 0); }
pushq %rbp pushq %r15 pushq %r14 pushq %r12 pushq %rbx movl %esi, %ebp movq %rdi, %r15 movl %esi, (%rdi) movl %esi, %ebx addq $0x3f, %rbx shrq $0x3, %rbx movl %ebx, %r12d andl $-0x8, %r12d movq %r12, %rdi callq 0x6e5b00 movq %rax, %r14 movq %rax, %rdi xorl %esi, %esi movq %r12, %rdx callq 0x6e5280 movq %r14, 0x8(%r15) ...
/AST/Interp/Descriptor.cpp
llvm::CCState::AllocateStack(unsigned int, llvm::Align)
int64_t AllocateStack(unsigned Size, Align Alignment) { int64_t Offset; if (NegativeOffsets) { StackSize = alignTo(StackSize + Size, Alignment); Offset = -StackSize; } else { Offset = alignTo(StackSize, Alignment); StackSize = Offset + Size; } MaxStackArgAlign = std::max(Alig...
pushq %rbx movl %edx, %ecx movq 0x30(%rdi), %rax cmpb $0x1, 0x28(%rdi) jne 0x192fbbd movl $0x1, %ebx shlq %cl, %rbx movl %esi, %edx addq %rbx, %rdx addq %rdx, %rax decq %rax negq %rbx andq %rax, %rbx movq %rbx, 0x30(%rdi) negq %rbx jmp 0x192fbda movl $0x1, %ebx shlq %cl, %rbx addq %rbx, %rax decq %rax negq %rbx andq %r...
/llvm/CodeGen/CallingConvLower.h
llvm::AMDGPUPassConfig::addStraightLineScalarOptimizationPasses()
void AMDGPUPassConfig::addStraightLineScalarOptimizationPasses() { if (isPassEnabled(EnableLoopPrefetch, CodeGenOptLevel::Aggressive)) addPass(createLoopDataPrefetchPass()); addPass(createSeparateConstOffsetFromGEPPass()); // ReassociateGEPs exposes more opportunities for SLSR. See // the example in reassoc...
pushq %rbx movq %rdi, %rbx cmpw $0x0, 0x4b343b4(%rip) # 0x65404c8 je 0x1a0c121 cmpb $0x0, 0x4b34423(%rip) # 0x6540540 jne 0x1a0c138 jmp 0x1a0c148 movq 0x70(%rbx), %rdi callq 0x2e76e6c cmpl $0x3, %eax jl 0x1a0c148 cmpb $0x1, 0x4b3440a(%rip) # 0x6540540 jne 0x1a0c148 callq 0x2cca838 movq %rbx, %rdi movq %rax, %rsi ...
/Target/AMDGPU/AMDGPUTargetMachine.cpp
llvm::RegisterPassParser<(anonymous namespace)::SGPRRegisterRegAlloc>::~RegisterPassParser()
~RegisterPassParser() override { RegistryClass::setListener(nullptr); }
movq %rdi, %rax leaq 0x499b64c(%rip), %rcx # 0x63a8ca8 movq %rcx, (%rdi) movq $0x0, 0x4b3328e(%rip) # 0x65408f8 leaq 0x499b6bf(%rip), %rcx # 0x63a8d30 movq %rcx, 0x8(%rdi) movq 0x18(%rdi), %rdi addq $0x28, %rax cmpq %rax, %rdi jne 0x6e5920 retq nop
/llvm/CodeGen/MachinePassRegistry.h
llvm::cl::opt<llvm::FunctionPass* (*)(), false, llvm::RegisterPassParser<(anonymous namespace)::SGPRRegisterRegAlloc>>::handleOccurrence(unsigned int, llvm::StringRef, llvm::StringRef)
bool handleOccurrence(unsigned pos, StringRef ArgName, StringRef Arg) override { typename ParserClass::parser_data_type Val = typename ParserClass::parser_data_type(); if (Parser.parse(*this, ArgName, Arg, Val)) return true; // Parse error! this->setValue(Val); this...
pushq %rbp pushq %r14 pushq %rbx subq $0x10, %rsp movl %esi, %ebp movq %rdi, %rbx leaq 0x8(%rsp), %rax movq $0x0, (%rax) addq $0xa8, %rdi movq %rax, (%rsp) movq %rbx, %rsi callq 0x1a0db9e movl %eax, %r14d testb %al, %al jne 0x1a0d6e7 movq 0x8(%rsp), %rax movq %rax, 0x80(%rbx) movw %bp, 0xc(%rbx) cmpq $0x0, 0x298(%rbx) ...
/llvm/Support/CommandLine.h
llvm::SmallVectorTemplateBase<std::function<void (llvm::PassManager<llvm::LazyCallGraph::SCC, llvm::AnalysisManager<llvm::LazyCallGraph::SCC, llvm::LazyCallGraph&>, llvm::LazyCallGraph&, llvm::CGSCCUpdateResult&>&, llvm::OptimizationLevel)>, false>::push_back(std::function<void (llvm::PassManager<llvm::LazyCallGraph::S...
void push_back(const T &Elt) { const T *EltPtr = reserveForParamAndGetAddress(Elt); ::new ((void *)this->end()) T(*EltPtr); this->set_size(this->size() + 1); }
pushq %r15 pushq %r14 pushq %rbx movq %rdi, %rbx movl $0x1, %edx callq 0x1a0f096 movq %rax, %r14 movq (%rbx), %r15 movl 0x8(%rbx), %eax shlq $0x5, %rax xorps %xmm0, %xmm0 movups %xmm0, 0x10(%r15,%rax) movups %xmm0, (%r15,%rax) movq 0x10(%r14), %rcx testq %rcx, %rcx je 0x1a0f08c addq %rax, %r15 movq %r15, %rdi movq %r14...
/llvm/ADT/SmallVector.h
llvm::SmallVectorImpl<llvm::SMFixIt>::clear()
void clear() { this->destroy_range(this->begin(), this->end()); this->Size = 0; }
pushq %r15 pushq %r14 pushq %rbx movq %rdi, %rbx movl 0x8(%rdi), %eax testq %rax, %rax je 0x1a10498 movq (%rbx), %r14 addq $-0x10, %r14 shlq $0x4, %rax leaq (%rax,%rax,2), %r15 leaq (%r14,%r15), %rax movq -0x10(%r14,%r15), %rdi cmpq %rdi, %rax je 0x1a10492 movq (%rax), %rsi incq %rsi callq 0x6e50f0 addq $-0x30, %r15 jn...
/llvm/ADT/SmallVector.h
void llvm::cl::apply<llvm::cl::opt<bool, false, llvm::cl::parser<bool>>, char [21], llvm::cl::desc, llvm::cl::initializer<bool>>(llvm::cl::opt<bool, false, llvm::cl::parser<bool>>*, char const (&) [21], llvm::cl::desc const&, llvm::cl::initializer<bool> const&)
void apply(Opt *O, const Mod &M, const Mods &... Ms) { applicator<Mod>::opt(M, *O); apply(O, Ms...); }
pushq %r15 pushq %r14 pushq %r12 pushq %rbx pushq %rax movq %rcx, %rbx movq %rdx, %r14 movq %rsi, %r15 movq %rdi, %r12 movq %rsi, %rdi callq 0x6e5300 movq %r12, %rdi movq %r15, %rsi movq %rax, %rdx callq 0x76cc2c movups (%r14), %xmm0 movups %xmm0, 0x20(%r12) movq (%rbx), %rax movb (%rax), %cl movb %cl, 0x80(%r12) movb ...
/llvm/Support/CommandLine.h
llvm::RequireAnalysisPass<llvm::MachineModuleAnalysis, llvm::Module, llvm::AnalysisManager<llvm::Module>>::printPipeline(llvm::raw_ostream&, llvm::function_ref<llvm::StringRef (llvm::StringRef)>)
void printPipeline(raw_ostream &OS, function_ref<StringRef(StringRef)> MapClassName2PassName) { auto ClassName = AnalysisT::name(); auto PassName = MapClassName2PassName(ClassName); OS << "require<" << PassName << '>'; }
pushq %r15 pushq %r14 pushq %rbx movq %rcx, %rbx movq %rdx, %r14 movq %rsi, %r15 callq 0x1a12d44 movq %rbx, %rdi movq %rax, %rsi callq *%r14 movq %rax, %rbx movq %rdx, %r14 leaq 0x18d9356(%rip), %rsi # 0x32ec051 movl $0x8, %edx movq %r15, %rdi callq 0x757dc8 movq %rax, %rdi movq %rbx, %rsi movq %r14, %rdx callq 0x757...
/llvm/IR/PassManager.h
llvm::RequireAnalysisPass<llvm::CollectorMetadataAnalysis, llvm::Module, llvm::AnalysisManager<llvm::Module>>::printPipeline(llvm::raw_ostream&, llvm::function_ref<llvm::StringRef (llvm::StringRef)>)
void printPipeline(raw_ostream &OS, function_ref<StringRef(StringRef)> MapClassName2PassName) { auto ClassName = AnalysisT::name(); auto PassName = MapClassName2PassName(ClassName); OS << "require<" << PassName << '>'; }
pushq %r15 pushq %r14 pushq %rbx movq %rcx, %rbx movq %rdx, %r14 movq %rsi, %r15 callq 0x1a12f16 movq %rbx, %rdi movq %rax, %rsi callq *%r14 movq %rax, %rbx movq %rdx, %r14 leaq 0x18d9184(%rip), %rsi # 0x32ec051 movl $0x8, %edx movq %r15, %rdi callq 0x757dc8 movq %rax, %rdi movq %rbx, %rsi movq %r14, %rdx callq 0x757...
/llvm/IR/PassManager.h
llvm::SmallVectorImpl<std::pair<llvm::GlobalVariable*, llvm::SmallVector<llvm::consthoist::ConstantInfo, 8u>>>::assignRemote(llvm::SmallVectorImpl<std::pair<llvm::GlobalVariable*, llvm::SmallVector<llvm::consthoist::ConstantInfo, 8u>>>&&)
void assignRemote(SmallVectorImpl &&RHS) { this->destroy_range(this->begin(), this->end()); if (!this->isSmall()) free(this->begin()); this->BeginX = RHS.BeginX; this->Size = RHS.Size; this->Capacity = RHS.Capacity; RHS.resetToSmall(); }
pushq %r15 pushq %r14 pushq %r12 pushq %rbx pushq %rax movq %rsi, %rbx movq %rdi, %r14 movq (%rdi), %r15 movl 0x8(%rdi), %eax testq %rax, %rax je 0x1a15be6 addq $-0x1510, %r15 # imm = 0xEAF0 imulq $0x1518, %rax, %r12 # imm = 0x1518 leaq (%r15,%r12), %rdi callq 0x1a15c78 addq $-0x1518, %r12 # imm =...
/llvm/ADT/SmallVector.h
std::pair<llvm::DenseMapIterator<llvm::MachineBasicBlock*, bool, llvm::DenseMapInfo<llvm::MachineBasicBlock*, void>, llvm::detail::DenseMapPair<llvm::MachineBasicBlock*, bool>, false>, bool> llvm::DenseMapBase<llvm::DenseMap<llvm::MachineBasicBlock*, bool, llvm::DenseMapInfo<llvm::MachineBasicBlock*, void>, llvm::detai...
std::pair<iterator, bool> try_emplace(const KeyT &Key, Ts &&... Args) { BucketT *TheBucket; if (LookupBucketFor(Key, TheBucket)) return std::make_pair(makeIterator(TheBucket, shouldReverseIterate<KeyT>() ? getBuckets() ...
pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x10, %rsp movq %rcx, %r15 movq %rdx, %r12 movq %rsi, %r14 movq %rdi, %rbx leaq 0x8(%rsp), %r13 movq %rsi, %rdi movq %rdx, %rsi movq %r13, %rdx callq 0x1a7ed0e movl %eax, %ecx movq (%r13), %rax testb %cl, %cl je 0x1aef7fe xorl %ecx, %ecx jmp 0x1aef81e movq %r...
/llvm/ADT/DenseMap.h
(anonymous namespace)::SIShrinkInstructions::shouldShrinkTrue16(llvm::MachineInstr&) const
bool SIShrinkInstructions::shouldShrinkTrue16(MachineInstr &MI) const { for (unsigned I = 0, E = MI.getNumExplicitOperands(); I != E; ++I) { const MachineOperand &MO = MI.getOperand(I); if (MO.isReg()) { Register Reg = MO.getReg(); assert(!Reg.isVirtual() && "Prior checks should ensure we only shr...
pushq %rbx movq %rdi, %rbx callq 0x2aebc42 movl %eax, %ecx movb $0x1, %al testl %ecx, %ecx je 0x1b1e9e4 movq 0x20(%rbx), %rdx leaq 0x48935a2(%rip), %rsi # 0x63b1f08 movq (%rsi), %rsi leaq 0x4893a98(%rip), %rdi # 0x63b2408 movq (%rdi), %rdi movl %ecx, %r8d shlq $0x5, %r8 xorl %r9d, %r9d cmpb $0x0, (%rdx,%r9) jne 0x1...
/Target/AMDGPU/SIShrinkInstructions.cpp
(anonymous namespace)::AAAMDWavesPerEU::initialize(llvm::Attributor&)
void initialize(Attributor &A) override { Function *F = getAssociatedFunction(); auto &InfoCache = static_cast<AMDGPUInformationCache &>(A.getInfoCache()); if (const auto *AssumedGroupSize = A.getAAFor<AAAMDFlatWorkGroupSize>( *this, IRPosition::function(*F), DepClassTy::REQUIRED)) { uns...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x68, %rsp movq %rsi, %r12 movq %rdi, %rbx addq $0x40, %rdi callq 0x1b2c40a movq %rax, %r14 movq 0xa0(%r12), %r13 leaq 0x8(%rsp), %r15 movq $0x0, 0x8(%r15) movq %rax, (%r15) movq %r15, %rdi callq 0x22f59b2 movq (%r15), %rsi movq 0x8(%r15), %rdx mov...
/Target/AMDGPU/AMDGPUAttributor.cpp
llvm::AMDGPUCallLowering::isEligibleForTailCallOptimization(llvm::MachineIRBuilder&, llvm::CallLowering::CallLoweringInfo&, llvm::SmallVectorImpl<llvm::CallLowering::ArgInfo>&, llvm::SmallVectorImpl<llvm::CallLowering::ArgInfo>&) const
bool AMDGPUCallLowering::isEligibleForTailCallOptimization( MachineIRBuilder &B, CallLoweringInfo &Info, SmallVectorImpl<ArgInfo> &InArgs, SmallVectorImpl<ArgInfo> &OutArgs) const { // Must pass all target-independent checks in order to tail call optimize. if (!Info.IsTailCall) return false; // Indir...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x38, %rsp cmpb $0x1, 0x1611(%rdx) jne 0x1b34f3d movq %rdx, %r14 cmpb $0x0, 0x8(%rdx) je 0x1b34f3d movq %r8, %rbx movq %rcx, %r12 movq %rdi, %r15 movq 0x8(%rsi), %r13 movq (%r13), %rax movl (%r14), %ebp movq %rax, 0x10(%rsp) movzwl 0x2(%rax), %edx ...
/Target/AMDGPU/AMDGPUCallLowering.cpp
(anonymous namespace)::AMDGPUIncomingArgHandler::assignValueToReg(llvm::Register, llvm::Register, llvm::CCValAssign const&)
void assignValueToReg(Register ValVReg, Register PhysReg, const CCValAssign &VA) override { markPhysRegUsed(PhysReg); if (VA.getLocVT().getSizeInBits() < 32) { // 16-bit types are reported as legal for 32-bit registers. We need to do // a 32-bit copy, and truncate to avoid t...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x38, %rsp movq %rcx, %r15 movl %edx, %ebp movl %esi, %ebx movq %rdi, %r14 movq (%rdi), %rax movl %edx, %esi callq *0x40(%rax) movzbl 0x16(%r15), %eax shll $0x4, %eax leaq 0x199992b(%rip), %rcx # 0x34d07a0 movq -0x10(%rax,%rcx), %rdx movb -0x8(%r...
/Target/AMDGPU/AMDGPUCallLowering.cpp
(anonymous namespace)::AMDGPUOutgoingArgHandler::getStackAddress(unsigned long, long, llvm::MachinePointerInfo&, llvm::ISD::ArgFlagsTy)
Register getStackAddress(uint64_t Size, int64_t Offset, MachinePointerInfo &MPO, ISD::ArgFlagsTy Flags) override { MachineFunction &MF = MIRBuilder.getMF(); const LLT PtrTy = LLT::pointer(AMDGPUAS::PRIVATE_ADDRESS, 32); const LLT S32 = LLT::scalar(32); ...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x48, %rsp movq %rcx, %rbx movq %rdx, %r15 movq %rdi, %r12 movq 0x8(%rdi), %rdi movq 0x8(%rdi), %r14 cmpb $0x1, 0x38(%r12) jne 0x1b370c7 movslq 0x30(%r12), %rdx addq %r15, %rdx movq 0x38(%r14), %rdi movl $0x1, %ecx xorl %r8d, %r8d callq 0x2ae1ac6 m...
/Target/AMDGPU/AMDGPUCallLowering.cpp
llvm::AMDGPUInstructionSelector::selectG_FABS(llvm::MachineInstr&) const
bool AMDGPUInstructionSelector::selectG_FABS(MachineInstr &MI) const { Register Dst = MI.getOperand(0).getReg(); const RegisterBank *DstRB = RBI.getRegBank(Dst, *MRI, TRI); if (DstRB->getID() != AMDGPU::SGPRRegBankID || MRI->getType(Dst) != LLT::scalar(64)) return false; Register Src = MI.getOperand(...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x88, %rsp movq %rsi, %rbx movq %rdi, %r15 movq 0x20(%rsi), %rax movl 0x4(%rax), %r14d movq 0x68(%rdi), %rdi movq 0x48(%r15), %rdx movq 0x60(%r15), %rcx movl %r14d, %esi callq 0x2bca634 cmpl $0x1, (%rax) jne 0x1b5f00a testl %r14d, %r14d jns 0x1b5f0...
/Target/AMDGPU/AMDGPUInstructionSelector.cpp
llvm::AMDGPUInstructionSelector::isDSOffset2Legal(llvm::Register, long, long, unsigned int) const
bool AMDGPUInstructionSelector::isDSOffset2Legal(Register Base, int64_t Offset0, int64_t Offset1, unsigned Size) const { if (Offset0 % Size != 0 || Offset1 % Size != 0) return false; if (!isUInt<8>(Offset0 / Size) ...
movq %rdx, %rax movl %r8d, %r9d cqto idivq %r9 testq %rdx, %rdx je 0x1b63341 xorl %eax, %eax retq movq %rax, %r8 movq %rcx, %rax cqto idivq %r9 movq %rax, %rcx xorl %eax, %eax testq %rdx, %rdx jne 0x1b63340 cmpq $0xff, %r8 ja 0x1b63340 cmpq $0xff, %rcx ja 0x1b63340 movq 0x78(%rdi), %rcx movb $0x1, %al cmpl $0x5, 0x1f8(...
/Target/AMDGPU/AMDGPUInstructionSelector.cpp
llvm::AMDGPUInstructionSelector::selectMUBUFOffsetImpl(llvm::MachineOperand&, llvm::Register&, llvm::Register&, long&) const
bool AMDGPUInstructionSelector::selectMUBUFOffsetImpl( MachineOperand &Root, Register &RSrcReg, Register &SOffset, int64_t &Offset) const { // FIXME: Pattern should not reach here. if (STI.useFlatForGlobal()) return false; MUBUFAddressData AddrData = parseMUBUFAddress(Root.getReg()); if (shouldUseAddr...
movq 0x78(%rdi), %rax cmpb $0x0, 0x273(%rax) je 0x1b63820 xorl %eax, %eax retq pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x78, %rsp movq %r8, %rbx movq %rcx, %r14 movq %rdx, %r12 movq %rsi, %r13 movq %rdi, %r15 movl 0x4(%rsi), %edx leaq 0x8(%rsp), %rbp movq %rbp, %rdi movq %r15, %rsi callq...
/Target/AMDGPU/AMDGPUInstructionSelector.cpp
getNamedBarrierOp(bool, unsigned int)
unsigned getNamedBarrierOp(bool HasInlineConst, Intrinsic::ID IntrID) { if (HasInlineConst) { switch (IntrID) { default: llvm_unreachable("not a named barrier op"); case Intrinsic::amdgcn_s_barrier_init: return AMDGPU::S_BARRIER_INIT_IMM; case Intrinsic::amdgcn_s_barrier_join: return...
testl %edi, %edi je 0x1b63c00 cmpl $0xb97, %esi # imm = 0xB97 jg 0x1b63c1b movl $0x1034, %eax # imm = 0x1034 cmpl $0xb89, %esi # imm = 0xB89 je 0x1b63c36 movl $0x1036, %eax # imm = 0x1036 retq cmpl $0xb97, %esi # imm = 0xB97 jg 0x1b63c29 movl $0x1035, %eax ...
/Target/AMDGPU/AMDGPUInstructionSelector.cpp
AMDGPUISelDAGToDAGPass::run(llvm::MachineFunction&, llvm::AnalysisManager<llvm::MachineFunction>&)
PreservedAnalyses AMDGPUISelDAGToDAGPass::run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM) { #ifdef EXPENSIVE_CHECKS auto &FAM = MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(MF) .getManager(); auto &F = MF.getFunction(); DominatorTree &DT ...
pushq %rbx movq %rdi, %rbx callq 0x2938228 movq %rbx, %rax popq %rbx retq
/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
AMDGPUDAGToDAGISel::isFlatScratchBaseLegalSVImm(llvm::SDValue) const
bool AMDGPUDAGToDAGISel::isFlatScratchBaseLegalSVImm(SDValue Addr) const { // Starting with GFX12, VADDR and SADDR fields in VSCRATCH can use negative // values. if (AMDGPU::isGFX12Plus(*Subtarget)) return true; auto Base = Addr.getOperand(0); auto *RHSImm = cast<ConstantSDNode>(Addr.getOperand(1)); //...
pushq %rbp pushq %r15 pushq %r14 pushq %rbx pushq %rax movq %rsi, %r14 movq %rdi, %rbx movq 0x108(%rdi), %rdi callq 0x1cdc044 movb $0x1, %bpl testb %al, %al jne 0x1b6c195 movq 0x28(%r14), %rcx movq (%rcx), %rax movq 0x28(%rcx), %rcx movl 0x18(%rax), %edx cmpl $0xba, %edx je 0x1b6c0e9 cmpl $0x38, %edx jne 0x1b6c157 test...
/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
AMDGPUDAGToDAGISel::SelectSMRDBaseOffset(llvm::SDValue, llvm::SDValue&, llvm::SDValue*, llvm::SDValue*, bool, bool, bool, long) const
bool AMDGPUDAGToDAGISel::SelectSMRDBaseOffset(SDValue Addr, SDValue &SBase, SDValue *SOffset, SDValue *Offset, bool Imm32Only, bool IsBuffer, bool HasSOffset, ...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x38, %rsp movq %r9, %r12 movq %r8, %r14 movl %edx, %ebp movq %rsi, %r13 movq %rdi, %r15 testq %r8, %r8 sete %al testq %r9, %r9 sete %dl orb %al, %dl movq %rcx, 0x18(%rsp) jne 0x1b6f119 xorl %ebx, %ebx leaq 0x8(%rsp), %rcx movq %rbx, (%rcx) movl %e...
/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
(anonymous namespace)::isExtractHiElt(llvm::SDValue, llvm::SDValue&)
static bool isExtractHiElt(SDValue In, SDValue &Out) { In = stripBitcast(In); if (In.getOpcode() == ISD::EXTRACT_VECTOR_ELT) { if (ConstantSDNode *Idx = dyn_cast<ConstantSDNode>(In.getOperand(1))) { if (!Idx->isOne()) return false; Out = In.getOperand(0); return true; } } if ...
pushq %rbp pushq %r14 pushq %rbx movq %rsi, %rbx movl 0x18(%rdi), %eax cmpl $0xe6, %eax jne 0x1b6f7c9 movq 0x28(%rdi), %rax movq (%rax), %rdi movl 0x18(%rdi), %eax cmpl $0xd7, %eax je 0x1b6f80c cmpl $0x9d, %eax jne 0x1b6f885 movq 0x28(%rdi), %r14 movq 0x28(%r14), %rax movl 0x18(%rax), %ecx cmpl $0x23, %ecx je 0x1b6f7f4...
/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
AMDGPUDAGToDAGISel::SelectInterpP1F16(llvm::SDNode*)
void AMDGPUDAGToDAGISel::SelectInterpP1F16(SDNode *N) { if (Subtarget->getLDSBankCount() != 16) { // This is a single instruction with a pattern. SelectCode(N); return; } SDLoc DL(N); // This requires 2 instructions. It is possible to write a pattern to support // this, but the generated isel em...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x118, %rsp # imm = 0x118 movq %rsi, %rbx movq %rdi, %r14 movq 0x108(%rdi), %rax cmpl $0x10, 0x268(%rax) jne 0x1b701e2 movq 0x48(%rbx), %rsi movq %rsi, 0x28(%rsp) testq %rsi, %rsi je 0x1b6ff48 leaq 0x28(%rsp), %rdi movl $0x1, %edx callq ...
/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
llvm::AMDGPUTargetLowering::LowerFLOG2(llvm::SDValue, llvm::SelectionDAG&) const
SDValue AMDGPUTargetLowering::LowerFLOG2(SDValue Op, SelectionDAG &DAG) const { // v_log_f32 is good enough for OpenCL, except it doesn't handle denormals. // If we have to handle denormals, scale up the input and adjust the result. // scaled = x * (is_denormal ? 0x1.0p+32 : 1.0) // log2 = amdgpu_log2 - (is_de...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x118, %rsp # imm = 0x118 movq %rcx, %rbx movl %edx, %r14d movq %rsi, %rbp movq %rdi, 0x48(%rsp) movq 0x48(%rsi), %rsi movq %rsi, 0x38(%rsp) testq %rsi, %rsi je 0x1b7c77c leaq 0x38(%rsp), %rdi movl $0x1, %edx callq 0x30b6354 movl 0x44(%r...
/Target/AMDGPU/AMDGPUISelLowering.cpp
llvm::AMDGPUTargetLowering::LowerFLOGCommon(llvm::SDValue, llvm::SelectionDAG&) const
SDValue AMDGPUTargetLowering::LowerFLOGCommon(SDValue Op, SelectionDAG &DAG) const { SDValue X = Op.getOperand(0); EVT VT = Op.getValueType(); SDNodeFlags Flags = Op->getFlags(); SDLoc DL(Op); const bool IsLog10 = Op.getOpcode() == ISD::FLOG10; assert(IsLog10 |...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x308, %rsp # imm = 0x308 movq %rcx, %rbp movq %rsi, %r14 movq %rdi, 0x50(%rsp) movq 0x28(%rsi), %rax movq (%rax), %r13 movl 0x8(%rax), %r12d movl 0xc(%rax), %eax movl %eax, 0x3c(%rsp) movq 0x30(%rsi), %rax movl %edx, %ecx shlq $0x4, %rc...
/Target/AMDGPU/AMDGPUISelLowering.cpp
llvm::AMDGPUTargetLowering::lowerFEXP(llvm::SDValue, llvm::SelectionDAG&) const
SDValue AMDGPUTargetLowering::lowerFEXP(SDValue Op, SelectionDAG &DAG) const { EVT VT = Op.getValueType(); SDLoc SL(Op); SDValue X = Op.getOperand(0); SDNodeFlags Flags = Op->getFlags(); const bool IsExp10 = Op.getOpcode() == ISD::FEXP10; if (VT.getScalarType() == MVT::f16) { // v_exp_f16 (fmul x, log2...
pushq %rbp pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x3a8, %rsp # imm = 0x3A8 movq %rcx, %rbx movq %rsi, %r14 movq %rdi, %r12 movq 0x30(%rsi), %rax movl %edx, %ecx shlq $0x4, %rcx movb (%rax,%rcx), %dl movq 0x8(%rax,%rcx), %rax movb %dl, 0x38(%rsp) movq %rax, 0x40(%rsp) movq 0x48(%rsi), %...
/Target/AMDGPU/AMDGPUISelLowering.cpp
llvm::detail::DenseMapPair<llvm::Register, llvm::Register>* llvm::DenseMapBase<llvm::DenseMap<llvm::Register, llvm::Register, llvm::DenseMapInfo<llvm::Register, void>, llvm::detail::DenseMapPair<llvm::Register, llvm::Register>>, llvm::Register, llvm::Register, llvm::DenseMapInfo<llvm::Register, void>, llvm::detail::Den...
BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup, BucketT *TheBucket) { incrementEpoch(); // If the load of the hash table is more than 3/4, or if fewer than 1/8 of // the buckets are empty (meaning that many are filled with tombstones), // grow th...
pushq %r15 pushq %r14 pushq %rbx subq $0x10, %rsp movq %rcx, %rax movq %rdx, %r14 movq %rdi, %rbx movl 0x8(%rdi), %ecx movl 0x10(%rdi), %esi leal 0x4(,%rcx,4), %edx leal (%rsi,%rsi,2), %edi cmpl %edi, %edx jae 0x1c1022f notl %ecx addl %esi, %ecx subl 0xc(%rbx), %ecx movl %esi, %edx shrl $0x3, %edx cmpl %edx, %ecx jbe 0...
/llvm/ADT/DenseMap.h
void llvm::SmallVectorImpl<llvm::MachineInstr*>::resizeImpl<false>(unsigned long)
size_t size() const { return Size; }
movl 0x8(%rdi), %eax cmpq %rsi, %rax je 0x1c105cb pushq %r14 pushq %rbx pushq %rax movq %rsi, %rbx movq %rdi, %r14 ja 0x1c105c0 movl 0xc(%r14), %ecx cmpq %rbx, %rcx jae 0x1c1059f leaq 0x10(%r14), %rsi movl $0x8, %ecx movq %r14, %rdi movq %rbx, %rdx callq 0x7803c4 movl 0x8(%r14), %eax cmpq %rbx, %rax je 0x1c105c0 shlq $...
/llvm/ADT/SmallVector.h
llvm::ARMAsmPrinter::PrintSymbolOperand(llvm::MachineOperand const&, llvm::raw_ostream&)
void ARMAsmPrinter::PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) { assert(MO.isGlobal() && "caller should check MO.isGlobal"); unsigned TF = MO.getTargetFlags(); if (TF & ARMII::MO_LO16) O << ":lower16:"; else if (TF & ARMII::MO_HI16) O << ":upper16...
pushq %rbp pushq %r15 pushq %r14 pushq %rbx pushq %rax movq %rdx, %rbx movq %rsi, %r15 movq %rdi, %r14 movl (%rsi), %eax movl %eax, %ecx shrl $0x8, %ecx andl $0xfff, %ecx # imm = 0xFFF xorl %ebp, %ebp testb %al, %al cmovnel %ecx, %ebp testb $0x1, %bpl jne 0x1ce6499 testb $0x2, %bpl jne 0x1ce64a2 btl $0x8, %e...
/Target/ARM/ARMAsmPrinter.cpp
llvm::tGPR_and_tGPROddGetRawAllocationOrder(llvm::MachineFunction const&)
iterator begin() const { return RegsBegin; }
leaq 0x46fc6db(%rip), %rax # 0x63e9a10 movq 0x460(%rax), %rcx movzwl 0x474(%rax), %eax movq %rcx, -0x28(%rsp) movq %rax, -0x20(%rsp) leaq 0x29d99ec(%rip), %rax # 0x46c6d40 movq %rax, -0x18(%rsp) movq $0x4, -0x10(%rsp) movq 0x10(%rdi), %rax movzbl 0x161(%rax), %ecx notl %ecx movzbl 0x192(%rax), %edx andl %ecx, %edx ...
/llvm/MC/MCRegisterInfo.h
llvm::tGPREven_and_tcGPRnotr12GetRawAllocationOrder(llvm::MachineFunction const&)
iterator begin() const { return RegsBegin; }
leaq 0x46fc62b(%rip), %rax # 0x63e9a10 movq 0x500(%rax), %rcx movzwl 0x514(%rax), %eax movq %rcx, -0x28(%rsp) movq %rax, -0x20(%rsp) leaq 0x29d9948(%rip), %rax # 0x46c6d4c movq %rax, -0x18(%rsp) movq $0x2, -0x10(%rsp) movq 0x10(%rdi), %rax movzbl 0x161(%rax), %ecx notl %ecx movzbl 0x192(%rax), %edx andl %ecx, %edx ...
/llvm/MC/MCRegisterInfo.h
(anonymous namespace)::ARMAsmParser::parseDirectiveUnwindRaw(llvm::SMLoc)
bool ARMAsmParser::parseDirectiveUnwindRaw(SMLoc L) { MCAsmParser &Parser = getParser(); int64_t StackOffset; const MCExpr *OffsetExpr; SMLoc OffsetLoc = getLexer().getLoc(); if (!UC.hasFnStart()) return Error(L, ".fnstart must precede .unwind_raw directives"); if (getParser().parseExpression(OffsetExp...
pushq %r15 pushq %r14 pushq %r13 pushq %r12 pushq %rbx subq $0x70, %rsp movq %rsi, %r12 movq %rdi, %rbx movq 0x8(%rdi), %r15 movq (%r15), %rax movq %r15, %rdi callq *0x28(%rax) movq %rax, %rdi callq 0x311c32a cmpl $0x0, 0x148(%rbx) je 0x1e260fc movq %rax, %r14 movq 0x8(%rbx), %rdi movq %rsp, %rsi callq 0x311c968 testb ...
/Target/ARM/AsmParser/ARMAsmParser.cpp