name string | code string | asm string | file string |
|---|---|---|---|
bool llvm::DenseMapBase<llvm::DenseMap<llvm::Value*, unsigned long, llvm::DenseMapInfo<llvm::Value*, void>, llvm::detail::DenseMapPair<llvm::Value*, unsigned long>>, llvm::Value*, unsigned long, llvm::DenseMapInfo<llvm::Value*, void>, llvm::detail::DenseMapPair<llvm::Value*, unsigned long>>::LookupBucketFor<llvm::Value... | unsigned getNumBuckets() const {
return NumBuckets;
} | movl 0x10(%rdi), %ecx
testl %ecx, %ecx
je 0x1ecc76e
pushq %rbx
movq (%rdi), %rdi
movq (%rsi), %rsi
movl %esi, %eax
shrl $0x4, %eax
movl %esi, %r9d
shrl $0x9, %r9d
xorl %eax, %r9d
decl %ecx
andl %ecx, %r9d
movl %r9d, %eax
shll $0x4, %eax
leaq (%rdi,%rax), %r8
movq (%rdi,%rax), %rbx
movb $0x1, %al
cmpq %rbx, %rsi
jne 0x1... | /llvm/ADT/DenseMap.h |
llvm::SmallPtrSetImpl<llvm::Function const*>::insert(llvm::Function const*) | std::pair<iterator, bool> insert(PtrType Ptr) {
auto p = insert_imp(PtrTraits::getAsVoidPointer(Ptr));
return std::make_pair(makeIterator(p.first), p.second);
} | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %r14
movq %rdi, %rbx
movq %rsi, %rdi
movq %rdx, %rsi
callq 0x7723c8
movq 0x8(%r14), %rcx
xorl %esi, %esi
cmpq (%r14), %rcx
sete %sil
movl 0x10(%r14,%rsi,4), %esi
leaq (%rcx,%rsi,8), %rcx
cmpq %rax, %rcx
je 0x1ecd69f
cmpq $-0x2, (%rax)
jb 0x1ecd69f
addq $0x8, %rax
cmpq %rcx, %... | /llvm/ADT/SmallPtrSet.h |
llvm::SmallPtrSetImpl<llvm::User*>::insert(llvm::User*) | std::pair<iterator, bool> insert(PtrType Ptr) {
auto p = insert_imp(PtrTraits::getAsVoidPointer(Ptr));
return std::make_pair(makeIterator(p.first), p.second);
} | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %r14
movq %rdi, %rbx
movq %rsi, %rdi
movq %rdx, %rsi
callq 0x7723c8
movq 0x8(%r14), %rcx
xorl %esi, %esi
cmpq (%r14), %rcx
sete %sil
movl 0x10(%r14,%rsi,4), %esi
leaq (%rcx,%rsi,8), %rcx
cmpq %rax, %rcx
je 0x1ecd7dd
cmpq $-0x2, (%rax)
jb 0x1ecd7dd
addq $0x8, %rax
cmpq %rcx, %... | /llvm/ADT/SmallPtrSet.h |
llvm::HexagonAsmPrinter::PrintAsmMemoryOperand(llvm::MachineInstr const*, unsigned int, char const*, llvm::raw_ostream&) | bool HexagonAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
unsigned OpNo,
const char *ExtraCode,
raw_ostream &O) {
if (ExtraCode && ExtraCode[0])
return true; // Unk... | pushq %r15
pushq %r14
pushq %rbx
movq %r8, %rbx
testq %rcx, %rcx
je 0x1ed1916
movb $0x1, %al
cmpb $0x0, (%rcx)
jne 0x1ed1957
movq 0x20(%rsi), %r14
leal 0x1(%rdx), %r15d
shlq $0x5, %r15
movq %rbx, %rcx
callq 0x1ed1722
cmpq $0x0, 0x10(%r14,%r15)
je 0x1ed1955
addq %r15, %r14
leaq 0x2c24082(%rip), %rsi # 0x4af59be
movl $... | /Target/Hexagon/HexagonAsmPrinter.cpp |
llvm::HexagonInstrInfo::hasLoadFromStackSlot(llvm::MachineInstr const&, llvm::SmallVectorImpl<llvm::MachineMemOperand const*>&) const | bool HexagonInstrInfo::hasLoadFromStackSlot(
const MachineInstr &MI,
SmallVectorImpl<const MachineMemOperand *> &Accesses) const {
if (MI.isBundle()) {
const MachineBasicBlock *MBB = MI.getParent();
MachineBasicBlock::const_instr_iterator MII = MI.getIterator();
for (++MII; MII != MBB->instr_end()... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
cmpw $0x14, 0x44(%rsi)
jne 0x1ed3a90
movq 0x18(%r14), %r12
addq $0x30, %r12
movq 0x8(%r14), %r14
cmpq %r12, %r14
je 0x1ed3aa9
testb $0x4, 0x2c(%r14)
je 0x1ed3aa9
movq %r15, %rdi
movq %r14, %rsi
movq %rbx, %rdx
callq 0... | /Target/Hexagon/HexagonInstrInfo.cpp |
llvm::HexagonInstrInfo::getDuplexOpcode(llvm::MachineInstr const&, bool) const | int HexagonInstrInfo::getDuplexOpcode(const MachineInstr &MI,
bool ForBigCore) const {
// Static table to switch the opcodes across Tiny Core and Big Core.
// dup_ opcodes are Big core opcodes.
// NOTE: There are special instructions that need to handled later.
// L4_return... | pushq %rbp
pushq %r14
pushq %rbx
movl %edx, %ebx
movq %rsi, %r14
movb 0x466e6f9(%rip), %al # 0x654c708
testb %al, %al
je 0x1ede099
movzwl 0x44(%r14), %ebp
testb %bl, %bl
je 0x1ede065
movq 0x466e6c1(%rip), %rcx # 0x654c6e8
movl $0xffffffff, %ebx # imm = 0xFFFFFFFF
testq %rcx, %rcx
je 0x1ede092
leaq 0x466e6a8(... | /Target/Hexagon/HexagonInstrInfo.cpp |
llvm::HexagonMCCodeEmitter::getExprOpValue(llvm::MCInst const&, llvm::MCOperand const&, llvm::MCExpr const*, llvm::SmallVectorImpl<llvm::MCFixup>&, llvm::MCSubtargetInfo const&) const | unsigned HexagonMCCodeEmitter::getExprOpValue(const MCInst &MI,
const MCOperand &MO, const MCExpr *ME, SmallVectorImpl<MCFixup> &Fixups,
const MCSubtargetInfo &STI) const {
if (isa<HexagonMCExpr>(ME))
ME = &HexagonMCInstrInfo::getExpr(*ME);
int64_t Value;
if (ME->evaluateAsAbsolute(Value)) {
b... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x48, %rsp
movq %r9, %r13
movq %r8, %rbp
movq %rcx, %r15
movq %rdx, %r12
movq %rsi, %rbx
movq %rdi, %r14
cmpb $0x4, (%rcx)
jne 0x1fdaa80
movq %r15, %rdi
callq 0x1fcc34f
movq %rax, %r15
leaq 0x20(%rsp), %rsi
movq %r15, %rdi
callq 0x313bd40
testb %al... | /Target/Hexagon/MCTargetDesc/HexagonMCCodeEmitter.cpp |
(anonymous namespace)::LoongArchAsmParser::emitLAInstSeq(llvm::MCRegister, llvm::MCRegister, llvm::MCExpr const*, llvm::SmallVectorImpl<(anonymous namespace)::LoongArchAsmParser::Inst>&, llvm::SMLoc, llvm::MCStreamer&, bool) | void LoongArchAsmParser::emitLAInstSeq(MCRegister DestReg, MCRegister TmpReg,
const MCExpr *Symbol,
SmallVectorImpl<Inst> &Insts,
SMLoc IDLoc, MCStreamer &Out,
bool... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xb8, %rsp
movq %r9, %rbx
movq %r8, %r13
movq %rcx, 0xb0(%rsp)
movl %edx, %ebp
movl %esi, %r14d
movq %rdi, (%rsp)
movq 0x8(%rdi), %rdi
movq (%rdi), %rax
callq *0x30(%rax)
movq %rax, 0xa8(%rsp)
movl 0x8(%r13), %eax
testq %rax, %rax
je 0x203269d
movq... | /Target/LoongArch/AsmParser/LoongArchAsmParser.cpp |
(anonymous namespace)::LoongArchMCInstrAnalysis::isUnconditionalBranch(llvm::MCInst const&) const | virtual bool isUnconditionalBranch(const MCInst &Inst) const {
return Info->get(Inst.getOpcode()).isUnconditionalBranch();
} | movq 0x8(%rdi), %rax
movl (%rsi), %ecx
movq (%rax), %rax
movq %rcx, %rdx
shlq $0x5, %rdx
subq %rdx, %rax
movl $0xd00, %edx # imm = 0xD00
andl 0x10(%rax), %edx
movb $0x1, %al
cmpl $0x500, %edx # imm = 0x500
je 0x2034328
cmpl $0x2b7, %ecx # imm = 0x2B7
jne 0x2034329
movq 0x10(%rsi), %rax
... | /llvm/MC/MCInstrAnalysis.h |
(anonymous namespace)::LoongArchMCCodeEmitter::encodeInstruction(llvm::MCInst const&, llvm::SmallVectorImpl<char>&, llvm::SmallVectorImpl<llvm::MCFixup>&, llvm::MCSubtargetInfo const&) const | void LoongArchMCCodeEmitter::encodeInstruction(
const MCInst &MI, SmallVectorImpl<char> &CB,
SmallVectorImpl<MCFixup> &Fixups, const MCSubtargetInfo &STI) const {
const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
// Get byte count of instruction.
unsigned Size = Desc.getSize();
switch (MI.getOpcode()... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x148, %rsp # imm = 0x148
movq %r8, %r15
movq %rcx, %rbx
movq %rdx, %r12
movq %rsi, %r13
movl (%rsi), %eax
leal -0x172(%rax), %ecx
cmpl $0x4, %ecx
movq %rbx, 0x10(%rsp)
movq %rdi, 0x8(%rsp)
jb 0x2037bb8
leal -0x182(%rax), %ecx
cmpl $0x4,... | /Target/LoongArch/MCTargetDesc/LoongArchMCCodeEmitter.cpp |
llvm::MipsAsmPrinter::emitPseudoIndirectBranch(llvm::MCStreamer&, llvm::MachineInstr const*) | void MipsAsmPrinter::emitPseudoIndirectBranch(MCStreamer &OutStreamer,
const MachineInstr *MI) {
bool HasLinkReg = false;
bool InMicroMipsMode = Subtarget->inMicroMipsMode();
MCInst TmpInst0;
if (Subtarget->hasMips64r6()) {
// MIPS64r6 should use (JALR64 ZERO_6... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x80, %rsp
movq %rdx, %r12
movq %rsi, %rbx
movq %rdi, %r14
movq 0x358(%rdi), %rax
movb 0x13d(%rax), %cl
xorb $0x1, %cl
andb 0x13f(%rax), %cl
leaq 0x10(%rsp), %r15
leaq 0x20(%rsp), %r13
xorps %xmm0, %xmm0
movaps %xmm0, -0x20(%r13)
movq %r13, -0x10(%r13)
movabs... | /Target/Mips/MipsAsmPrinter.cpp |
llvm::MipsAsmPrinter::emitFunctionEntryLabel() | void MipsAsmPrinter::emitFunctionEntryLabel() {
MipsTargetStreamer &TS = getTargetStreamer();
// NaCl sandboxing requires that indirect call instructions are masked.
// This means that function entry points should be bundle-aligned.
if (Subtarget->isTargetNaCl())
emitAlignment(std::max(MF->getAlignment(), ... | pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq 0x50(%rdi), %rax
movq 0x10(%rax), %r14
movq 0x358(%rdi), %rcx
cmpl $0x12, 0x1fc(%rcx)
jne 0x203af32
movq 0x58(%rbx), %rax
movl 0x154(%rax), %eax
cmpb $0x5, %al
movl $0x4, %esi
cmovael %eax, %esi
movq %rbx, %rdi
xorl %edx, %edx
xorl %ecx, %ecx
callq 0x27ab1ee
movq 0x... | /Target/Mips/MipsAsmPrinter.cpp |
llvm::BasicTTIImplBase<llvm::MipsTTIImpl>::getIntrinsicInstrCost(llvm::IntrinsicCostAttributes const&, llvm::TargetTransformInfo::TargetCostKind) | InstructionCost getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
TTI::TargetCostKind CostKind) {
// Check for generically free intrinsics.
if (BaseT::getIntrinsicInstrCost(ICA, CostKind) == 0)
return 0;
// Assume that target intrinsics are cheap.
I... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x358, %rsp # imm = 0x358
movl %edx, %r14d
movq %rsi, %r12
movq %rdi, %r15
leaq 0x8(%rdi), %rbx
movq %rbx, %rdi
callq 0x181cee6
xorl %ecx, %ecx
xorl %esi, %esi
testq %rax, %rax
setns %cl
setle %sil
xorl %edi, %edi
xorl %eax, %eax
testl %... | /llvm/CodeGen/BasicTTIImpl.h |
llvm::BasicTTIImplBase<llvm::MipsTTIImpl>::getMemoryOpCost(unsigned int, llvm::Type*, llvm::MaybeAlign, unsigned int, llvm::TargetTransformInfo::TargetCostKind, llvm::TargetTransformInfo::OperandValueInfo, llvm::Instruction const*) | InstructionCost
getMemoryOpCost(unsigned Opcode, Type *Src, MaybeAlign Alignment,
unsigned AddressSpace, TTI::TargetCostKind CostKind,
TTI::OperandValueInfo OpInfo = {TTI::OK_AnyValue, TTI::OP_None},
const Instruction *I = nullptr) {
assert(!Src->isVoidTy() &&... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movl %r9d, %r13d
movq %rdx, %r15
movl %esi, %ebp
movq %rdi, %r12
movq 0x8(%rdi), %rsi
movq 0x18(%rdi), %rdi
movl $0x1, %ecx
callq 0x180a826
cmpb $0x1, %al
jne 0x204573c
xorl %ebx, %ebx
movl $0x4, %r14d
jmp 0x2045862
movq %rsp, %rbx
movq ... | /llvm/CodeGen/BasicTTIImpl.h |
llvm::BasicTTIImplBase<llvm::NVPTXTTIImpl>::getCastInstrCost(unsigned int, llvm::Type*, llvm::Type*, llvm::TargetTransformInfo::CastContextHint, llvm::TargetTransformInfo::TargetCostKind, llvm::Instruction const*) | InstructionCost getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
TTI::CastContextHint CCH,
TTI::TargetCostKind CostKind,
const Instruction *I = nullptr) {
if (BaseT::getCastInstrCost(Opcode, Dst, Src, CCH... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x98, %rsp
movl %r9d, %ebx
movl %r8d, %r14d
movq %rcx, %r13
movq %rdx, %r12
movl %esi, %ebp
movq %rdi, %r15
movq 0xd0(%rsp), %rax
addq $0x8, %rdi
movq %rax, (%rsp)
movq %rdi, 0x78(%rsp)
callq 0x181ef2c
xorl %ecx, %ecx
xorl %esi, %esi
testq %rax, %r... | /llvm/CodeGen/BasicTTIImpl.h |
llvm::BasicTTIImplBase<llvm::NVPTXTTIImpl>::getMinMaxReductionCost(unsigned int, llvm::VectorType*, llvm::FastMathFlags, llvm::TargetTransformInfo::TargetCostKind) | InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty,
FastMathFlags FMF,
TTI::TargetCostKind CostKind) {
// Targets must implement a default value for the scalable case, since
// we don't know how many lanes th... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x178, %rsp # imm = 0x178
movl %r8d, 0x28(%rsp)
movl %ecx, 0x3c(%rsp)
movl %esi, 0x38(%rsp)
movq %rdi, 0x40(%rsp)
cmpb $0x13, 0x8(%rdx)
jne 0x2115d24
movl $0x1, %ebp
xorl %r13d, %r13d
jmp 0x2116168
movq %rdx, %r15
movl 0x20(%rdx), %eax
t... | /llvm/CodeGen/BasicTTIImpl.h |
llvm::BasicTTIImplBase<llvm::NVPTXTTIImpl>::simplifyDemandedVectorEltsIntrinsic(llvm::InstCombiner&, llvm::IntrinsicInst&, llvm::APInt, llvm::APInt&, llvm::APInt&, llvm::APInt&, std::function<void (llvm::Instruction*, unsigned int, llvm::APInt, llvm::APInt&)>) | std::optional<Value *> simplifyDemandedVectorEltsIntrinsic(
InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
APInt &UndefElts2, APInt &UndefElts3,
std::function<void(Instruction *, unsigned, APInt, APInt &)>
SimplifyAndSetOp) {
return BaseT::simplifyDemandedVect... | pushq %r14
pushq %rbx
subq $0x38, %rsp
movq 0x58(%rsp), %rbx
movl 0x8(%rcx), %eax
movl %eax, 0x8(%rsp)
cmpl $0x40, %eax
ja 0x2117055
movq (%rcx), %rax
movq %rax, (%rsp)
jmp 0x2117060
movq %rsp, %rdi
movq %rcx, %rsi
callq 0x7b435e
xorps %xmm0, %xmm0
movaps %xmm0, 0x20(%rsp)
movaps %xmm0, 0x10(%rsp)
movq 0x10(%rbx), %rax... | /llvm/CodeGen/BasicTTIImpl.h |
llvm::clearAnnotationCache(llvm::Module const*) | void clearAnnotationCache(const Module *Mod) {
auto &AC = getAnnotationCache();
std::lock_guard<sys::Mutex> Guard(AC.Lock);
AC.Cache.erase(Mod);
} | pushq %r14
pushq %rbx
pushq %rax
movq %rdi, (%rsp)
callq 0x2118c47
leaq 0x4440845(%rip), %rdi # 0x6559448
callq 0x6e5a40
testl %eax, %eax
jne 0x2118c40
leaq 0x4440865(%rip), %rbx # 0x6559478
movq %rsp, %rsi
movq %rbx, %rdi
callq 0x211a5b8
leaq 0x4440823(%rip), %r14 # 0x6559448
movq %rbx, %rdi
movq %rax, %rsi
call... | /Target/NVPTX/NVPTXUtilities.cpp |
llvm::argHasNVVMAnnotation(llvm::Value const&, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>> const&, bool) | static inline bool doit (const Value &Val) {
return Val.getValueID() == Value::ArgumentVal;
} | cmpb $0x16, (%rdi)
jne 0x2119767
pushq %rbp
pushq %rbx
subq $0x28, %rsp
movl %edx, %ebp
movq %rdi, %rbx
movq 0x18(%rdi), %rdi
xorps %xmm0, %xmm0
movq %rsp, %rdx
movaps %xmm0, (%rdx)
movq $0x0, 0x10(%rdx)
callq 0x2119407
testb %al, %al
je 0x211976a
movzbl %bpl, %eax
addl 0x20(%rbx), %eax
leaq 0x24(%rsp), %rdx
movl %eax,... | /llvm/IR/Value.h |
llvm::isImageWriteOnly(llvm::Value const&) | bool isImageWriteOnly(const Value &val) {
return argHasNVVMAnnotation(val, "wroimage");
} | pushq %r15
pushq %r14
pushq %rbx
subq $0x20, %rsp
movq %rdi, %rbx
leaq 0x10(%rsp), %r15
movq %r15, -0x10(%r15)
leaq 0x2b32ef0(%rip), %rsi # 0x4c4c7b3
leaq 0x2b32ef1(%rip), %rdx # 0x4c4c7bb
movq %rsp, %r14
movq %r14, %rdi
callq 0x759680
movq %rbx, %rdi
movq %r14, %rsi
xorl %edx, %edx
callq 0x21196fc
movl %eax, %ebx
... | /Target/NVPTX/NVPTXUtilities.cpp |
llvm::NVVMIntrRangePass::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) | PreservedAnalyses NVVMIntrRangePass::run(Function &F,
FunctionAnalysisManager &AM) {
return runNVVMIntrRange(F) ? PreservedAnalyses::none()
: PreservedAnalyses::all();
} | pushq %rbx
subq $0x20, %rsp
movq %rdi, %rbx
movq %rdx, %rdi
callq 0x211af28
testb %al, %al
je 0x211aedf
xorps %xmm0, %xmm0
movups %xmm0, 0x28(%rbx)
movups %xmm0, 0x38(%rbx)
movups %xmm0, 0x48(%rbx)
movups %xmm0, 0x18(%rbx)
movq $0x0, 0x58(%rbx)
leaq 0x20(%rbx), %rax
movq %rax, (%rbx)
movq %rax, 0x8(%rbx)
movq $0x2, 0x1... | /Target/NVPTX/NVVMIntrRange.cpp |
llvm::GlobalVariable* llvm::function_ref<llvm::GlobalVariable* ()>::callback_fn<(anonymous namespace)::createInitOrFiniCalls(llvm::Function&, bool)::$_0>(long) | static Ret callback_fn(intptr_t callable, Params ...params) {
return (*reinterpret_cast<Callable*>(callable))(
std::forward<Params>(params)...);
} | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x30, %rsp
movq %rdi, %r12
movl $0x58, %edi
movl $0x1, %esi
callq 0x30d5acc
movq %rax, %rbx
movq (%r12), %r14
movq 0x8(%r12), %rdi
xorl %r13d, %r13d
xorl %esi, %esi
callq 0x30d1c58
movq %rax, %r15
movq 0x8(%r12), %rdi
xorl %esi, %esi
callq 0x30d1c58
movq %rax... | /llvm/ADT/STLFunctionalExtras.h |
llvm::NVPTXAAWrapperPass::NVPTXAAWrapperPass() | NVPTXAAWrapperPass::NVPTXAAWrapperPass() : ImmutablePass(ID) {
initializeNVPTXAAWrapperPassPass(*PassRegistry::getPassRegistry());
} | pushq %rax
xorl %eax, %eax
movq %rax, 0x8(%rdi)
leaq 0x443be34(%rip), %rcx # 0x6559750
movq %rcx, 0x10(%rdi)
movl $0x4, 0x18(%rdi)
leaq 0x4313a22(%rip), %rcx # 0x6431350
movq %rcx, (%rdi)
movq %rax, 0x20(%rdi)
callq 0x30cca18
movq %rsp, %rdx
movq %rax, (%rdx)
leaq 0x443be0d(%rip), %rdi # 0x6559754
leaq -0x1de(%ri... | /Target/NVPTX/NVPTXAliasAnalysis.cpp |
llvm::NVPTXFrameLowering::emitPrologue(llvm::MachineFunction&, llvm::MachineBasicBlock&) const | MachineFrameInfo &getFrameInfo() { return *FrameInfo; } | movq 0x38(%rsi), %rax
movq 0x8(%rax), %rcx
cmpq 0x10(%rax), %rcx
je 0x211e69e
pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x68, %rsp
movq %rsi, %rbx
movq 0x38(%rdx), %r13
movq 0x10(%rsi), %rdi
movq 0x28(%rsi), %rbp
movq (%rdi), %rax
movq %rdx, %r14
callq *0xc8(%rax)
movq %rax, %r12
movq $0x0... | /llvm/CodeGen/MachineFunction.h |
llvm::DenseMapBase<llvm::DenseMap<llvm::ValueMapCallbackVH<llvm::GlobalVariable*, llvm::GlobalVariable*, llvm::ValueMapConfig<llvm::GlobalVariable*, llvm::sys::SmartMutex<false>>>, llvm::GlobalVariable*, llvm::DenseMapInfo<llvm::ValueMapCallbackVH<llvm::GlobalVariable*, llvm::GlobalVariable*, llvm::ValueMapConfig<llvm:... | void initEmpty() {
setNumEntries(0);
setNumTombstones(0);
assert((getNumBuckets() & (getNumBuckets()-1)) == 0 &&
"# initial buckets must be a power of two!");
const KeyT EmptyKey = getEmptyKey();
for (BucketT *B = getBuckets(), *E = getBucketsEnd(); B != E; ++B)
::new (&B->getFirst... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
xorl %eax, %eax
movq %rax, 0x8(%rdi)
movq $0x2, 0x8(%rsp)
movq %rax, 0x10(%rsp)
movq $-0x1000, 0x18(%rsp) # imm = 0xF000
leaq 0x4312850(%rip), %r14 # 0x64318b8
movq %r14, (%rsp)
movq %rax, 0x20(%rsp)
movl 0x10(%rdi), %eax
testq %rax... | /llvm/ADT/DenseMap.h |
llvm::DenseMap<llvm::ValueMapCallbackVH<llvm::GlobalVariable*, llvm::GlobalVariable*, llvm::ValueMapConfig<llvm::GlobalVariable*, llvm::sys::SmartMutex<false>>>, llvm::GlobalVariable*, llvm::DenseMapInfo<llvm::ValueMapCallbackVH<llvm::GlobalVariable*, llvm::GlobalVariable*, llvm::ValueMapConfig<llvm::GlobalVariable*, l... | void grow(unsigned AtLeast) {
unsigned OldNumBuckets = NumBuckets;
BucketT *OldBuckets = Buckets;
allocateBuckets(std::max<unsigned>(64, static_cast<unsigned>(NextPowerOf2(AtLeast-1))));
assert(Buckets);
if (!OldBuckets) {
this->BaseT::initEmpty();
return;
}
this->moveFromOldBu... | pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
movl 0x10(%rdi), %r15d
decl %esi
movl %esi, %eax
shrl %eax
orl %esi, %eax
movl %eax, %ecx
shrl $0x2, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x4, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x8, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x10, %eax
orl %ecx, %eax
incl %ea... | /llvm/ADT/DenseMap.h |
llvm::DenseMap<llvm::ValueMapCallbackVH<llvm::Constant*, llvm::Value*, llvm::ValueMapConfig<llvm::Constant*, llvm::sys::SmartMutex<false>>>, llvm::Value*, llvm::DenseMapInfo<llvm::ValueMapCallbackVH<llvm::Constant*, llvm::Value*, llvm::ValueMapConfig<llvm::Constant*, llvm::sys::SmartMutex<false>>>, void>, llvm::detail:... | void init(unsigned InitNumEntries) {
auto InitBuckets = BaseT::getMinBucketToReserveForEntries(InitNumEntries);
if (allocateBuckets(InitBuckets)) {
this->BaseT::initEmpty();
} else {
NumEntries = 0;
NumTombstones = 0;
}
} | pushq %rbx
movq %rdi, %rbx
testl %esi, %esi
je 0x211f80b
shll $0x2, %esi
movl $0xaaaaaaab, %eax # imm = 0xAAAAAAAB
imulq %rsi, %rax
shrq $0x21, %rax
incl %eax
movl %eax, %ecx
shrl %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x2, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x4, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl... | /llvm/ADT/DenseMap.h |
bool llvm::DenseMapBase<llvm::DenseMap<llvm::ValueMapCallbackVH<llvm::Constant*, llvm::Value*, llvm::ValueMapConfig<llvm::Constant*, llvm::sys::SmartMutex<false>>>, llvm::Value*, llvm::DenseMapInfo<llvm::ValueMapCallbackVH<llvm::Constant*, llvm::Value*, llvm::ValueMapConfig<llvm::Constant*, llvm::sys::SmartMutex<false>... | unsigned getNumBuckets() const {
return NumBuckets;
} | movl 0x10(%rdi), %ecx
testl %ecx, %ecx
je 0x211faf6
pushq %rbx
movq (%rdi), %rdi
movq 0x18(%rsi), %rsi
movl %esi, %eax
shrl $0x4, %eax
movl %esi, %r9d
shrl $0x9, %r9d
xorl %eax, %r9d
decl %ecx
andl %ecx, %r9d
leaq (%r9,%r9,2), %rax
shlq $0x4, %rax
leaq (%rdi,%rax), %r8
movq 0x18(%rdi,%rax), %rbx
movb $0x1, %al
cmpq %rb... | /llvm/ADT/DenseMap.h |
bool llvm::DenseMapBase<llvm::DenseMap<llvm::ValueMapCallbackVH<llvm::Constant*, llvm::Value*, llvm::ValueMapConfig<llvm::Constant*, llvm::sys::SmartMutex<false>>>, llvm::Value*, llvm::DenseMapInfo<llvm::ValueMapCallbackVH<llvm::Constant*, llvm::Value*, llvm::ValueMapConfig<llvm::Constant*, llvm::sys::SmartMutex<false>... | unsigned getNumBuckets() const {
return NumBuckets;
} | movl 0x10(%rdi), %ecx
testl %ecx, %ecx
je 0x21205b9
pushq %rbx
movq (%rdi), %rdi
movq (%rsi), %rsi
movl %esi, %eax
shrl $0x4, %eax
movl %esi, %r9d
shrl $0x9, %r9d
xorl %eax, %r9d
decl %ecx
andl %ecx, %r9d
leaq (%r9,%r9,2), %rax
shlq $0x4, %rax
leaq (%rdi,%rax), %r8
movq 0x18(%rdi,%rax), %rbx
movb $0x1, %al
cmpq %rbx, %... | /llvm/ADT/DenseMap.h |
llvm::DenseMapBase<llvm::DenseMap<llvm::ValueMapCallbackVH<llvm::Constant*, llvm::Value*, llvm::ValueMapConfig<llvm::Constant*, llvm::sys::SmartMutex<false>>>, llvm::Value*, llvm::DenseMapInfo<llvm::ValueMapCallbackVH<llvm::Constant*, llvm::Value*, llvm::ValueMapConfig<llvm::Constant*, llvm::sys::SmartMutex<false>>>, v... | void clear() {
incrementEpoch();
if (getNumEntries() == 0 && getNumTombstones() == 0) return;
// If the capacity of the array is huge, and the # elements used is small,
// shrink the array.
if (getNumEntries() * 4 < getNumBuckets() && getNumBuckets() > 64) {
shrink_and_clear();
return;
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x58, %rsp
movq %rdi, %r14
movl 0x8(%rdi), %ecx
testl %ecx, %ecx
jne 0x2120725
cmpl $0x0, 0xc(%r14)
je 0x2120827
shll $0x2, %ecx
movl 0x10(%r14), %eax
cmpl %eax, %ecx
setae %cl
cmpl $0x41, %eax
setb %dl
orb %cl, %dl
jne 0x2120751
movq %r14, %rdi
ad... | /llvm/ADT/DenseMap.h |
llvm::NVPTXDAGToDAGISelLegacy::NVPTXDAGToDAGISelLegacy(llvm::NVPTXTargetMachine&, llvm::CodeGenOptLevel) | NVPTXDAGToDAGISelLegacy::NVPTXDAGToDAGISelLegacy(NVPTXTargetMachine &tm,
CodeGenOptLevel OptLevel)
: SelectionDAGISelLegacy(
ID, std::make_unique<NVPTXDAGToDAGISel>(tm, OptLevel)) {} | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movl %edx, %ebp
movq %rsi, %r14
movq %rdi, %rbx
movl $0x120, %edi # imm = 0x120
callq 0x6e5900
movq %rax, %r15
movq %rax, %rdi
movq %r14, %rsi
movl %ebp, %edx
callq 0x2937d66
leaq 0x431100a(%rip), %rax # 0x64319c8
movq %rax, (%r15)
movq %r14, 0x108(%r1... | /Target/NVPTX/NVPTXISelDAGToDAG.cpp |
llvm::NVPTXDAGToDAGISel::Select(llvm::SDNode*) | void NVPTXDAGToDAGISel::Select(SDNode *N) {
if (N->isMachineOpcode()) {
N->setNodeId(-1);
return; // Already selected.
}
switch (N->getOpcode()) {
case ISD::LOAD:
case ISD::ATOMIC_LOAD:
if (tryLoad(N))
return;
break;
case ISD::STORE:
case ISD::ATOMIC_STORE:
if (tryStore(N))
... | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movl 0x18(%rsi), %eax
testl %eax, %eax
js 0x2120b35
movq %rdi, %r14
cmpl $0x148, %eax # imm = 0x148
jle 0x2120b59
leal -0x207(%rax), %ecx
cmpl $0x337, %ecx # imm = 0x337
ja 0x2120c37
leaq 0x2b2c19d(%rip), %rax # 0x4c4ccbc
movslq (%rax,%rcx,4), %rc... | /Target/NVPTX/NVPTXISelDAGToDAG.cpp |
llvm::NVPTXDAGToDAGISel::tryLoadVector(llvm::SDNode*) | bool NVPTXDAGToDAGISel::tryLoadVector(SDNode *N) {
SDValue Chain = N->getOperand(0);
SDValue Op1 = N->getOperand(1);
SDValue Addr, Offset, Base;
std::optional<unsigned> Opcode;
SDLoc DL(N);
SDNode *LD;
MemSDNode *MemSD = cast<MemSDNode>(N);
EVT LoadedVT = MemSD->getMemoryVT();
if (!LoadedVT.isSimple... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x148, %rsp # imm = 0x148
movq %rsi, %rbx
movq %rdi, %r14
movq 0x28(%rsi), %rax
movups (%rax), %xmm0
movaps %xmm0, 0x50(%rsp)
movq 0x28(%rax), %r13
movl 0x30(%rax), %ebp
xorl %eax, %eax
movq %rax, 0xf8(%rsp)
movl %eax, 0x100(%rsp)
movq %... | /Target/NVPTX/NVPTXISelDAGToDAG.cpp |
llvm::NVPTXDAGToDAGISel::tryIntrinsicNoChain(llvm::SDNode*) | const SDValue &getOperand(unsigned Num) const {
assert(Num < NumOperands && "Invalid child # of SDNode!");
return OperandList[Num];
} | movq 0x28(%rsi), %rax
movq (%rax), %rax
movq 0x58(%rax), %rax
cmpl $0x41, 0x20(%rax)
jb 0x2125b0b
movq 0x18(%rax), %rax
jmp 0x2125b0f
addq $0x18, %rax
pushq %rbx
movl (%rax), %ebx
cmpq $0x2354, %rbx # imm = 0x2354
jne 0x2125b20
callq 0x2126a4a
cmpl $0x2354, %ebx # imm = 0x2354
sete %al
popq %rbx
ret... | /llvm/CodeGen/SelectionDAGNodes.h |
llvm::BasicTTIImplBase<llvm::RISCVTTIImpl>::getMinMaxReductionCost(unsigned int, llvm::VectorType*, llvm::FastMathFlags, llvm::TargetTransformInfo::TargetCostKind) | InstructionCost getMinMaxReductionCost(Intrinsic::ID IID, VectorType *Ty,
FastMathFlags FMF,
TTI::TargetCostKind CostKind) {
// Targets must implement a default value for the scalable case, since
// we don't know how many lanes th... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x178, %rsp # imm = 0x178
movl %r8d, 0x28(%rsp)
movl %ecx, 0x3c(%rsp)
movl %esi, 0x38(%rsp)
movq %rdi, 0x40(%rsp)
cmpb $0x13, 0x8(%rdx)
jne 0x22461a4
movl $0x1, %ebp
xorl %r13d, %r13d
jmp 0x22465db
movq %rdx, %r15
movl 0x20(%rdx), %eax
t... | /llvm/CodeGen/BasicTTIImpl.h |
(anonymous namespace)::RISCVInstructionSelector::selectSelect(llvm::MachineInstr&, llvm::MachineIRBuilder&, llvm::MachineRegisterInfo&) const | bool RISCVInstructionSelector::selectSelect(MachineInstr &MI,
MachineIRBuilder &MIB,
MachineRegisterInfo &MRI) const {
auto &SelectMI = cast<GSelect>(MI);
Register LHS, RHS;
RISCVCC::CondCode CC;
getOperandsForBranch(Select... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x48, %rsp
movq %rcx, %r13
movq %rdx, %r15
movq %rsi, %rbx
movq %rdi, %rbp
xorl %r14d, %r14d
leaq 0x14(%rsp), %rcx
movl %r14d, (%rcx)
leaq 0x10(%rsp), %r8
movl %r14d, (%r8)
movq 0x20(%rsi), %rax
movl 0x24(%rax), %edi
leaq 0xc(%rsp), %rdx
movq %r13,... | /Target/RISCV/GISel/RISCVInstructionSelector.cpp |
getVRBValueMapping(unsigned int) | static const RegisterBankInfo::ValueMapping *getVRBValueMapping(unsigned Size) {
unsigned Idx;
if (Size <= 64)
Idx = RISCV::VRB64Idx;
else if (Size == 128)
Idx = RISCV::VRB128Idx;
else if (Size == 256)
Idx = RISCV::VRB256Idx;
else if (Size == 512)
Idx = RISCV::VRB512Idx;
else
llvm::repo... | movl $0x10, %ecx
cmpl $0x41, %edi
jb 0x226c851
cmpl $0x80, %edi
je 0x226c84c
cmpl $0x200, %edi # imm = 0x200
je 0x226c845
cmpl $0x100, %edi # imm = 0x100
jne 0x226c85f
movl $0x16, %ecx
jmp 0x226c851
movl $0x19, %ecx
jmp 0x226c851
movl $0x13, %ecx
shll $0x4, %ecx
leaq 0x41d6885(%rip), %rax # 0x64... | /Target/RISCV/GISel/RISCVRegisterBankInfo.cpp |
llvm::DenseMap<llvm::GetElementPtrInst*, std::pair<llvm::Value*, llvm::Value*>, llvm::DenseMapInfo<llvm::GetElementPtrInst*, void>, llvm::detail::DenseMapPair<llvm::GetElementPtrInst*, std::pair<llvm::Value*, llvm::Value*>>>::grow(unsigned int) | void grow(unsigned AtLeast) {
unsigned OldNumBuckets = NumBuckets;
BucketT *OldBuckets = Buckets;
allocateBuckets(std::max<unsigned>(64, static_cast<unsigned>(NextPowerOf2(AtLeast-1))));
assert(Buckets);
if (!OldBuckets) {
this->BaseT::initEmpty();
return;
}
this->moveFromOldBu... | pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
movl 0x10(%rdi), %r15d
decl %esi
movl %esi, %eax
shrl %eax
orl %esi, %eax
movl %eax, %ecx
shrl $0x2, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x4, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x8, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x10, %eax
orl %ecx, %eax
incl %ea... | /llvm/ADT/DenseMap.h |
(anonymous namespace)::RISCVInsertVSETVLI::getAnalysisUsage(llvm::AnalysisUsage&) const | void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.setPreservesCFG();
AU.addUsedIfAvailable<LiveIntervalsWrapperPass>();
AU.addPreserved<LiveIntervalsWrapperPass>();
AU.addPreserved<SlotIndexesWrapperPass>();
AU.addPreserved<LiveDebugVariables>();
AU.addPreserved<LiveStacks>();
M... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
movq %rsi, %rdi
callq 0x30c9076
leaq 0x90(%rbx), %rsi
leaq 0x430b892(%rip), %r15 # 0x6587498
movq %rbx, %rdi
movq %r15, %rdx
callq 0x1696e60
leaq 0x70(%rbx), %r12
movq %rbx, %rdi
movq %r12, %rsi
movq %r15, %rdx
callq 0x1696e60
leaq... | /Target/RISCV/RISCVInsertVSETVLI.cpp |
initializeRISCVInsertWriteVXRMPassOnce(llvm::PassRegistry&) | static bool ignoresVXRM(const MachineInstr &MI) {
switch (RISCV::getRVVMCOpcode(MI.getOpcode())) {
default:
return false;
case RISCV::VNCLIP_WI:
case RISCV::VNCLIPU_WI:
return MI.getOperand(3).getImm() == 0;
}
} | pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movl $0x50, %edi
callq 0x6e5900
movq %rax, %r14
leaq 0x2be8925(%rip), %rax # 0x4e68910
movq %rax, (%r14)
movq $0x1d, 0x8(%r14)
leaq 0x2be8931(%rip), %rax # 0x4e6892e
movq %rax, 0x10(%r14)
movq $0x17, 0x18(%r14)
leaq 0x42dfe04(%rip), %rax # 0x655fe14
movq %rax, 0x20... | /Target/RISCV/RISCVInsertWriteVXRM.cpp |
llvm::createRISCVInsertWriteVXRMPass() | FunctionPass *llvm::createRISCVInsertWriteVXRMPass() {
return new RISCVInsertWriteVXRM();
} | pushq %rbx
movl $0xa8, %edi
callq 0x6e5900
movq %rax, %rbx
xorl %eax, %eax
movq %rax, 0x8(%rbx)
leaq 0x42dfda3(%rip), %rcx # 0x655fe14
movq %rcx, 0x10(%rbx)
movl $0x2, 0x18(%rbx)
xorps %xmm0, %xmm0
movups %xmm0, 0x20(%rbx)
movq %rax, 0x30(%rbx)
leaq 0x41c3a42(%rip), %rcx # 0x6443ad0
movq %rcx, (%rbx)
leaq 0x58(%rbx... | /Target/RISCV/RISCVInsertWriteVXRM.cpp |
llvm::Pass* llvm::callDefaultCtor<(anonymous namespace)::RISCVInsertWriteVXRM, true>() | Pass *callDefaultCtor() {
return new PassName();
} | pushq %rbx
movl $0xa8, %edi
callq 0x6e5900
movq %rax, %rbx
xorl %eax, %eax
movq %rax, 0x8(%rbx)
leaq 0x42dfd33(%rip), %rcx # 0x655fe14
movq %rcx, 0x10(%rbx)
movl $0x2, 0x18(%rbx)
xorps %xmm0, %xmm0
movups %xmm0, 0x20(%rbx)
movq %rax, 0x30(%rbx)
leaq 0x41c39d2(%rip), %rcx # 0x6443ad0
movq %rcx, (%rbx)
leaq 0x58(%rbx... | /llvm/PassSupport.h |
llvm::RISCVDAGToDAGISel::PreprocessISelDAG() | void RISCVDAGToDAGISel::PreprocessISelDAG() {
SelectionDAG::allnodes_iterator Position = CurDAG->allnodes_end();
bool MadeChange = false;
while (Position != CurDAG->allnodes_begin()) {
SDNode *N = &*--Position;
if (N->use_empty())
continue;
SDValue Result;
switch (N->getOpcode()) {
cas... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x228, %rsp # imm = 0x228
movq %rdi, %r12
movq 0x38(%rdi), %rdi
leaq 0x150(%rdi), %r13
cmpq 0x158(%rdi), %r13
je 0x2281b0f
leaq 0xa0(%rsp), %rbx
movq $0x0, 0x98(%rsp)
movl %eax, 0x7c(%rsp)
movq %r12, 0x60(%rsp)
movq (%r13), %r13
leaq -0x... | /Target/RISCV/RISCVISelDAGToDAG.cpp |
llvm::RISCVTargetLowering::hasBitTest(llvm::SDValue, llvm::SDValue) const | bool RISCVTargetLowering::hasBitTest(SDValue X, SDValue Y) const {
// Zbs provides BEXT[_I], which can be used with SEQZ/SNEZ as a bit test.
if (Subtarget.hasStdExtZbs())
return X.getValueType().isScalarInteger();
auto *C = dyn_cast<ConstantSDNode>(Y);
// XTheadBs provides th.tst (similar to bexti), if Y is... | pushq %rbp
pushq %rbx
subq $0x18, %rsp
movq %rcx, %rax
movq 0x4e0f8(%rdi), %rcx
cmpb $0x1, 0x16f(%rcx)
jne 0x2295c26
movq 0x30(%rsi), %rcx
movl %edx, %edx
shlq $0x4, %rdx
movb (%rcx,%rdx), %al
movq 0x8(%rcx,%rdx), %rcx
movb %al, 0x8(%rsp)
movq %rcx, 0x10(%rsp)
testb %al, %al
je 0x2295c61
addb $-0x2, %al
cmpb $0x8, %al
... | /Target/RISCV/RISCVISelLowering.cpp |
llvm::RISCVTargetLowering::shouldProduceAndByConstByHoistingConstFromShiftsLHSOfAnd(llvm::SDValue, llvm::ConstantSDNode*, llvm::ConstantSDNode*, llvm::SDValue, unsigned int, unsigned int, llvm::SelectionDAG&) const | bool RISCVTargetLowering::
shouldProduceAndByConstByHoistingConstFromShiftsLHSOfAnd(
SDValue X, ConstantSDNode *XC, ConstantSDNode *CC, SDValue Y,
unsigned OldShiftOpcode, unsigned NewShiftOpcode,
SelectionDAG &DAG) const {
// One interesting pattern that we'd want to form is 'bit extract'... | pushq %rbp
pushq %r14
pushq %rbx
movq %r8, %r14
movq %rcx, %rbx
testq %rcx, %rcx
sete %al
cmpl $0xbf, %r9d
setne %cl
orb %al, %cl
jne 0x2295ded
movq 0x58(%rbx), %rdi
movl 0x20(%rdi), %ebp
addq $0x18, %rdi
cmpl $0x40, %ebp
ja 0x2295de2
cmpq $0x1, (%rdi)
jne 0x2295ded
xorl %eax, %eax
jmp 0x2295e26
callq 0x7b55b6
decl %eb... | /Target/RISCV/RISCVISelLowering.cpp |
combineTruncOfSraSext(llvm::SDNode*, llvm::SelectionDAG&) | static SDValue combineTruncOfSraSext(SDNode *N, SelectionDAG &DAG) {
SDValue Mask = N->getOperand(1);
SDValue VL = N->getOperand(2);
bool IsVLMAX = isAllOnesConstant(VL) ||
(isa<RegisterSDNode>(VL) &&
cast<RegisterSDNode>(VL)->getReg() == RISCV::X0);
if (!IsVLMAX || Mask.getO... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xb8, %rsp
movq %rsi, %rbx
movq %rdi, %r15
movq 0x28(%rdi), %rax
movq 0x28(%rax), %r14
movl 0x30(%rax), %ecx
movl %ecx, 0x40(%rsp)
movq 0x50(%rax), %r12
movl 0x58(%rax), %ebp
movq %r12, %rdi
movl %ebp, %esi
callq 0x292921c
testb %al, %al
je 0x22d22... | /Target/RISCV/RISCVISelLowering.cpp |
llvm::RISCVTargetLowering::AdjustInstrPostInstrSelection(llvm::MachineInstr&, llvm::SDNode*) const | void RISCVTargetLowering::AdjustInstrPostInstrSelection(MachineInstr &MI,
SDNode *Node) const {
// Add FRM dependency to any instructions with dynamic rounding mode.
int Idx = RISCV::getNamedOperandIdx(MI.getOpcode(), RISCV::OpName::frm);
if (Idx < 0) {
... | pushq %rbx
subq $0x20, %rsp
movq %rsi, %rbx
movzwl 0x44(%rsi), %edi
movl $0x3, %esi
callq 0x22277ad
testw %ax, %ax
js 0x22dc193
movzwl %ax, %eax
movq 0x20(%rbx), %rcx
movl %eax, %eax
shlq $0x5, %rax
cmpq $0x7, 0x10(%rcx,%rax)
jne 0x22dc1be
movq %rbx, %rdi
movl $0x2, %esi
xorl %edx, %edx
xorl %ecx, %ecx
callq 0x2aec1b0
... | /Target/RISCV/RISCVISelLowering.cpp |
convertValVTToLocVT(llvm::SelectionDAG&, llvm::SDValue, llvm::CCValAssign const&, llvm::SDLoc const&, llvm::RISCVSubtarget const&) | static SDValue convertValVTToLocVT(SelectionDAG &DAG, SDValue Val,
const CCValAssign &VA, const SDLoc &DL,
const RISCVSubtarget &Subtarget) {
EVT LocVT = VA.getLocVT();
switch (VA.getLocInfo()) {
default:
llvm_unreachable("Unexpected CCVal... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x78, %rsp
movq %rcx, %r13
movl %edx, %ebx
movq %rsi, %r14
movq %rdi, %r15
movb 0x16(%rcx), %bpl
movb %bpl, 0x18(%rsp)
movq $0x0, 0x20(%rsp)
testb $0x7e, 0x14(%rcx)
je 0x22e0b6e
movq %r8, %r12
leaq 0x18(%rsp), %rbp
movq %rbp, %rdi
callq 0x18db6ea
m... | /Target/RISCV/RISCVISelLowering.cpp |
llvm::RISCVTargetLowering::getTargetNodeName(unsigned int) const | const char *RISCVTargetLowering::getTargetNodeName(unsigned Opcode) const {
#define NODE_NAME_CASE(NODE) \
case RISCVISD::NODE: \
return "RISCVISD::" #NODE;
// clang-format off
switch ((RISCVISD::NodeType... | addl $0xfffffe1a, %esi # imm = 0xFFFFFE1A
cmpl $0x1f7, %esi # imm = 0x1F7
ja 0x22e1adc
movl %esi, %eax
leaq 0x4162c99(%rip), %rcx # 0x6444770
movq (%rcx,%rax,8), %rax
retq
xorl %eax, %eax
retq
nop
| /Target/RISCV/RISCVISelLowering.cpp |
llvm::RISCVTargetLowering::allowsMisalignedMemoryAccesses(llvm::EVT, unsigned int, llvm::Align, llvm::MachineMemOperand::Flags, unsigned int*) const | bool RISCVTargetLowering::allowsMisalignedMemoryAccesses(
EVT VT, unsigned AddrSpace, Align Alignment, MachineMemOperand::Flags Flags,
unsigned *Fast) const {
if (!VT.isVector()) {
if (Fast)
*Fast = Subtarget.enableUnalignedScalarMem();
return Subtarget.enableUnalignedScalarMem();
}
// All ... | pushq %rbp
pushq %r14
pushq %rbx
subq $0x30, %rsp
movl %r8d, %ebp
movq %rdi, %rbx
movq 0x50(%rsp), %r14
movb %sil, (%rsp)
movq %rdx, 0x8(%rsp)
testb %sil, %sil
je 0x22e465b
leal -0x11(%rsi), %eax
cmpb $-0x53, %al
jae 0x22e46ae
movzbl %sil, %eax
leaq 0x11e584d(%rip), %rcx # 0x34c9ea0
movb -0x1(%rax,%rcx), %al
xorl %ed... | /Target/RISCV/RISCVISelLowering.cpp |
llvm::RISCVMachineFunctionInfo* llvm::MachineFunctionInfo::create<llvm::RISCVMachineFunctionInfo>(llvm::BumpPtrAllocatorImpl<llvm::MallocAllocator, 4096ul, 4096ul, 128ul>&, llvm::RISCVMachineFunctionInfo const&) | static Ty *create(BumpPtrAllocator &Allocator, const Ty &MFI) {
return new (Allocator.Allocate<Ty>()) Ty(MFI);
} | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movl $0x80, %esi
movl $0x3, %edx
callq 0x7825a6
movq %rax, %r14
leaq 0x415902e(%rip), %rax # 0x6445768
movq %rax, (%r14)
movups 0x8(%rbx), %xmm0
movups 0x18(%rbx), %xmm1
movups 0x28(%rbx), %xmm2
movups %xmm0, 0x8(%r14)
movups %xmm1, 0x18(%r14)
movups %xmm2, 0x28(%r14)
... | /llvm/CodeGen/MachineFunction.h |
std::pair<llvm::DenseMapIterator<llvm::MachineInstr const*, llvm::SmallVector<unsigned int, 12u>, llvm::DenseMapInfo<llvm::MachineInstr const*, void>, llvm::detail::DenseMapPair<llvm::MachineInstr const*, llvm::SmallVector<unsigned int, 12u>>, false>, bool> llvm::DenseMapBase<llvm::DenseMap<llvm::MachineInstr const*, l... | std::pair<iterator, bool> try_emplace(KeyT &&Key, Ts &&... Args) {
BucketT *TheBucket;
if (LookupBucketFor(Key, TheBucket))
return std::make_pair(makeIterator(TheBucket,
shouldReverseIterate<KeyT>()
? getBuckets()
... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x10, %rsp
movq %rcx, %r15
movq %rdx, %r12
movq %rsi, %r14
movq %rdi, %rbx
leaq 0x8(%rsp), %r13
movq %rsi, %rdi
movq %rdx, %rsi
movq %r13, %rdx
callq 0x22ed5f0
movl %eax, %ecx
movq (%r13), %rax
testb %cl, %cl
je 0x22ed55e
xorl %ecx, %ecx
jmp 0x22ed571
movq %r... | /llvm/ADT/DenseMap.h |
llvm::Pass* llvm::callDefaultCtor<(anonymous namespace)::RISCVMoveMerge, true>() | Pass *callDefaultCtor() {
return new PassName();
} | pushq %rax
movl $0xe8, %edi
callq 0x6e5900
xorl %ecx, %ecx
movq %rcx, 0x8(%rax)
leaq 0x4270d10(%rip), %rdx # 0x6560444
movq %rdx, 0x10(%rax)
movl $0x2, 0x18(%rax)
xorps %xmm0, %xmm0
movups %xmm0, 0x20(%rax)
movq %rcx, 0x30(%rax)
leaq 0x415633f(%rip), %rdx # 0x6445a90
movq %rdx, (%rax)
movq %rcx, 0x48(%rax)
leaq 0x6... | /llvm/PassSupport.h |
llvm::DebugLocStream::List& llvm::SmallVectorImpl<llvm::DebugLocStream::List>::emplace_back<llvm::DwarfCompileUnit*&, unsigned long>(llvm::DwarfCompileUnit*&, unsigned long&&) | size_t size() const { return Size; } | movl 0x8(%rdi), %eax
cmpl 0xc(%rdi), %eax
jae 0x27cf0cc
movq (%rdi), %rcx
leaq (%rax,%rax,2), %r8
movq (%rsi), %rsi
movq (%rdx), %rdx
movq %rsi, (%rcx,%r8,8)
movq $0x0, 0x8(%rcx,%r8,8)
movq %rdx, 0x10(%rcx,%r8,8)
incl %eax
movl %eax, 0x8(%rdi)
leaq (%rax,%rax,2), %rax
leaq (%rcx,%rax,8), %rax
addq $-0x18, %rax
retq
nop... | /llvm/ADT/SmallVector.h |
llvm::DenseMap<llvm::SDNode*, std::pair<llvm::SDNode*, unsigned int>, llvm::DenseMapInfo<llvm::SDNode*, void>, llvm::detail::DenseMapPair<llvm::SDNode*, std::pair<llvm::SDNode*, unsigned int>>>::grow(unsigned int) | void grow(unsigned AtLeast) {
unsigned OldNumBuckets = NumBuckets;
BucketT *OldBuckets = Buckets;
allocateBuckets(std::max<unsigned>(64, static_cast<unsigned>(NextPowerOf2(AtLeast-1))));
assert(Buckets);
if (!OldBuckets) {
this->BaseT::initEmpty();
return;
}
this->moveFromOldBu... | pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
movl 0x10(%rdi), %r15d
decl %esi
movl %esi, %eax
shrl %eax
orl %esi, %eax
movl %eax, %ecx
shrl $0x2, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x4, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x8, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x10, %eax
orl %ecx, %eax
incl %ea... | /llvm/ADT/DenseMap.h |
(anonymous namespace)::DAGCombiner::getMergeStoreChains(llvm::SmallVectorImpl<(anonymous namespace)::DAGCombiner::MemOpLink>&, unsigned int) | SDValue DAGCombiner::getMergeStoreChains(SmallVectorImpl<MemOpLink> &StoreNodes,
unsigned NumStores) {
SmallVector<SDValue, 8> Chains;
SmallPtrSet<const SDNode *, 8> Visited;
SDLoc StoreDL(StoreNodes[0].MemNode);
for (unsigned i = 0; i < NumStores; ++i) {
Visited.in... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x128, %rsp # imm = 0x128
movl %edx, %ebp
movq %rsi, %r14
movq %rdi, 0x18(%rsp)
leaq 0xa8(%rsp), %rcx
movq %rcx, -0x10(%rcx)
movabsq $0x800000000, %rax # imm = 0x800000000
movq %rax, -0x8(%rcx)
leaq 0x58(%rsp), %rax
movq %rax, -0x20... | /CodeGen/SelectionDAG/DAGCombiner.cpp |
(anonymous namespace)::DAGCombiner::refineExtractVectorEltIntoMultipleNarrowExtractVectorElts(llvm::SDNode*) | bool DAGCombiner::refineExtractVectorEltIntoMultipleNarrowExtractVectorElts(
SDNode *N) {
// We perform this optimization post type-legalization because
// the type-legalizer often scalarizes integer-promoted vectors.
// Performing this optimization before may cause legalizaton cycles.
if (Level != AfterLeg... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x4e8, %rsp # imm = 0x4E8
movl 0x18(%rdi), %eax
decl %eax
cmpl $0x1, %eax
ja 0x2891402
movq %rsi, %rbp
movq %rdi, %rbx
movq (%rdi), %rax
movq 0x28(%rax), %rdi
callq 0x2ae2c94
cmpb $0x0, (%rax)
jne 0x2891402
movq 0x28(%rbp), %rax
movq (%r... | /CodeGen/SelectionDAG/DAGCombiner.cpp |
expandLog10(llvm::SDLoc const&, llvm::SDValue, llvm::SelectionDAG&, llvm::TargetLowering const&, llvm::SDNodeFlags) | static SDValue expandLog10(const SDLoc &dl, SDValue Op, SelectionDAG &DAG,
const TargetLowering &TLI, SDNodeFlags Flags) {
// TODO: What fast-math-flags should be set on the floating-point nodes?
if (Op.getValueType() == MVT::f32 &&
LimitFloatPrecision > 0 && LimitFloatPrecision <=... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x308, %rsp # imm = 0x308
movq %r8, %r15
movq %rcx, %r14
movq %rdi, %rbx
movq 0x30(%rsi), %rcx
movl %edx, %edi
shlq $0x4, %rdi
movb (%rcx,%rdi), %al
movq 0x8(%rcx,%rdi), %r8
cmpb $0xc, %al
jne 0x28e8484
movl 0x3c9a2aa(%rip), %ecx # 0x6... | /CodeGen/SelectionDAG/SelectionDAGBuilder.cpp |
llvm::SelectionDAGBuilder::visitVectorSplice(llvm::CallInst const&) | void SelectionDAGBuilder::visitVectorSplice(const CallInst &I) {
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
EVT VT = TLI.getValueType(DAG.getDataLayout(), I.getType());
SDLoc DL = getCurSDLoc();
SDValue V1 = getValue(I.getOperand(0));
SDValue V2 = getValue(I.getOperand(1));
int64_t Imm = cast... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xf8, %rsp
movq %rsi, %r14
movq %rdi, %rbx
movq 0x340(%rdi), %rax
movq 0x10(%rax), %r15
movq 0x28(%rax), %rdi
callq 0x2ae2c94
movq 0x8(%r14), %rdx
movq %r15, %rdi
movq %rax, %rsi
xorl %ecx, %ecx
callq 0x180a826
movl %eax, %r13d
movb %al, 0x58(%rsp)... | /CodeGen/SelectionDAG/SelectionDAGBuilder.cpp |
llvm::SelectionDAGBuilder::visitVectorDeinterleave(llvm::CallInst const&) | void SelectionDAGBuilder::visitVectorDeinterleave(const CallInst &I) {
auto DL = getCurSDLoc();
SDValue InVec = getValue(I.getOperand(0));
EVT OutVT =
InVec.getValueType().getHalfNumVectorElementsVT(*DAG.getContext());
unsigned OutNumElts = OutVT.getVectorMinNumElements();
// ISD Node needs the input ... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x178, %rsp # imm = 0x178
movq %rsi, %rbx
movq (%rdi), %rsi
movq %rdi, 0x28(%rsp)
movl 0x330(%rdi), %eax
movq $0x0, 0x38(%rsp)
movl %eax, 0x40(%rsp)
testq %rsi, %rsi
je 0x28ec480
addq $0x30, %rsi
leaq 0x38(%rsp), %rdi
callq 0xae0368
movl... | /CodeGen/SelectionDAG/SelectionDAGBuilder.cpp |
llvm::SelectionDAGBuilder::visitVPStore(llvm::VPIntrinsic const&, llvm::SmallVectorImpl<llvm::SDValue> const&) | void SelectionDAGBuilder::visitVPStore(
const VPIntrinsic &VPIntrin, const SmallVectorImpl<SDValue> &OpValues) {
SDLoc DL = getCurSDLoc();
Value *PtrOperand = VPIntrin.getArgOperand(1);
EVT VT = OpValues[0].getValueType();
MaybeAlign Alignment = VPIntrin.getPointerAlignment();
AAMDNodes AAInfo = VPIntrin.... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x128, %rsp # imm = 0x128
movq %rdx, %r15
movq %rsi, %r14
movq %rdi, %rbx
movq (%rdi), %rsi
movl 0x330(%rdi), %eax
movq $0x0, 0x88(%rsp)
movl %eax, 0x90(%rsp)
testq %rsi, %rsi
je 0x28ed0a4
addq $0x30, %rsi
leaq 0x88(%rsp), %rdi
callq 0xa... | /CodeGen/SelectionDAG/SelectionDAGBuilder.cpp |
std::pair<llvm::MachineBasicBlock*, llvm::BranchProbability>& llvm::SmallVectorImpl<std::pair<llvm::MachineBasicBlock*, llvm::BranchProbability>>::emplace_back<llvm::MachineBasicBlock*&, llvm::BranchProbability&>(llvm::MachineBasicBlock*&, llvm::BranchProbability&) | reference emplace_back(ArgTypes &&... Args) {
if (LLVM_UNLIKELY(this->size() >= this->capacity()))
return this->growAndEmplaceBack(std::forward<ArgTypes>(Args)...);
::new ((void *)this->end()) T(std::forward<ArgTypes>(Args)...);
this->set_size(this->size() + 1);
return this->back();
} | pushq %rbx
movq %rdi, %rbx
movl 0x8(%rdi), %ecx
cmpl 0xc(%rdi), %ecx
jae 0x28f4541
movq (%rbx), %rax
shlq $0x4, %rcx
movq (%rsi), %rsi
movq %rsi, (%rax,%rcx)
movl (%rdx), %edx
movl %edx, 0x8(%rax,%rcx)
movl 0x8(%rbx), %ecx
incl %ecx
movl %ecx, 0x8(%rbx)
movl %ecx, %ecx
shlq $0x4, %rcx
addq %rcx, %rax
addq $-0x10, %rax
... | /llvm/ADT/SmallVector.h |
isTwoAddrUse(llvm::MachineInstr&, llvm::Register, llvm::Register&) | unsigned getNumOperands() const { return NumOperands; } | movzwl 0x28(%rdi), %ecx
movzbl 0x2a(%rdi), %eax
shll $0x10, %eax
orl %ecx, %eax
testl %eax, %eax
je 0x2c207f7
pushq %r14
pushq %rbx
pushq %rax
movq %rdx, %rbx
movq %rdi, %r14
movq 0x20(%rdi), %rcx
movl %eax, %edx
addq $0x4, %rcx
xorl %eax, %eax
movl -0x4(%rcx), %edi
testl $0x10000ff, %edi # imm = 0x10000FF
jne 0... | /llvm/CodeGen/MachineInstr.h |
llvm::ConvergingVLIWScheduler::schedNode(llvm::SUnit*, bool) | void ConvergingVLIWScheduler::schedNode(SUnit *SU, bool IsTopNode) {
if (IsTopNode) {
Top.bumpNode(SU);
SU->TopReadyCycle = Top.CurrCycle;
} else {
Bot.bumpNode(SU);
SU->BotReadyCycle = Bot.CurrCycle;
}
} | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
testl %edx, %edx
je 0x2c27c91
leaq 0x18(%r14), %rdi
movq %rbx, %rsi
callq 0x2c26ecc
movl 0xc0(%r14), %eax
movl %eax, 0xe8(%rbx)
jmp 0x2c27cad
leaq 0xd8(%r14), %rdi
movq %rbx, %rsi
callq 0x2c26ecc
movl 0x180(%r14), %eax
movl %eax, 0xec(%rbx)
addq $0x8, %rs... | /CodeGen/VLIWMachineScheduler.cpp |
llvm::MDNodeKeyImpl<llvm::DISubrange>::MDNodeKeyImpl(llvm::DISubrange const*) | const Header &getHeader() const {
return *(reinterpret_cast<const Header *>(this) - 1);
} | leaq -0x10(%rsi), %rax
movq -0x10(%rsi), %rcx
testb $0x2, %cl
jne 0x3066804
addl %ecx, %ecx
andl $0x78, %ecx
movq %rax, %rdx
subq %rcx, %rdx
jmp 0x3066808
movq -0x20(%rsi), %rdx
movq (%rdx), %rcx
movq %rcx, (%rdi)
movq (%rax), %rcx
testb $0x2, %cl
jne 0x3066823
addl %ecx, %ecx
andl $0x78, %ecx
movq %rax, %rdx
subq %rcx... | /llvm/IR/Metadata.h |
bool llvm::DenseMapBase<llvm::DenseMap<llvm::DIGenericSubrange*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DIGenericSubrange>, llvm::detail::DenseSetPair<llvm::DIGenericSubrange*>>, llvm::DIGenericSubrange*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DIGenericSubrange>, llvm::detail::DenseSetPair<llv... | bool LookupBucketFor(const LookupKeyT &Val,
const BucketT *&FoundBucket) const {
const BucketT *BucketsPtr = getBuckets();
const unsigned NumBuckets = getNumBuckets();
if (NumBuckets == 0) {
FoundBucket = nullptr;
return false;
}
// FoundTombstone - Keep track of... | pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x20, %rsp
movq %rdx, %rbx
movl 0x10(%rdi), %ebp
testl %ebp, %ebp
je 0x3066e3c
movq %rsi, %r14
movq (%rdi), %r12
movq (%rsi), %rsi
movq %rsp, %r15
movq %r15, %rdi
callq 0x3066e5a
movq %r15, %rdi
callq 0x3066c06
movl %eax, %ecx
decl %ebp
movq (%r14), %rsi
andl... | /llvm/ADT/DenseMap.h |
llvm::DenseMapBase<llvm::DenseMap<llvm::DIEnumerator*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DIEnumerator>, llvm::detail::DenseSetPair<llvm::DIEnumerator*>>, llvm::DIEnumerator*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DIEnumerator>, llvm::detail::DenseSetPair<llvm::DIEnumerator*>>::moveFromOl... | void moveFromOldBuckets(BucketT *OldBucketsBegin, BucketT *OldBucketsEnd) {
initEmpty();
// Insert all the old elements.
const KeyT EmptyKey = getEmptyKey();
const KeyT TombstoneKey = getTombstoneKey();
for (BucketT *B = OldBucketsBegin, *E = OldBucketsEnd; B != E; ++B) {
if (!KeyInfoT::isEqu... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x10, %rsp
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
movq $0x0, 0x8(%rdi)
movl 0x10(%rdi), %ecx
testq %rcx, %rcx
je 0x3067829
movq (%r15), %rax
movabsq $0x1fffffffffffffff, %rdx # imm = 0x1FFFFFFFFFFFFFFF
addq %rdx, %rcx
andq %rcx, %rdx
andl $0x1, %ecx
... | /llvm/ADT/DenseMap.h |
bool llvm::DenseMapBase<llvm::DenseMap<llvm::DIBasicType*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DIBasicType>, llvm::detail::DenseSetPair<llvm::DIBasicType*>>, llvm::DIBasicType*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DIBasicType>, llvm::detail::DenseSetPair<llvm::DIBasicType*>>::LookupBucke... | bool LookupBucketFor(const LookupKeyT &Val,
const BucketT *&FoundBucket) const {
const BucketT *BucketsPtr = getBuckets();
const unsigned NumBuckets = getNumBuckets();
if (NumBuckets == 0) {
FoundBucket = nullptr;
return false;
}
// FoundTombstone - Keep track of... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x98, %rsp
movq %rdx, %rbx
movl 0x10(%rdi), %ebp
testl %ebp, %ebp
je 0x306798b
movq %rsi, %r14
movq (%rdi), %r12
leaq 0x8(%rsi), %r8
leaq 0x10(%rsi), %r9
leaq 0x18(%rsi), %rax
leaq 0x1c(%rsi), %r10
xorps %xmm0, %xmm0
leaq 0x50(%rsp), %rcx
movaps %x... | /llvm/ADT/DenseMap.h |
llvm::detail::DenseSetPair<llvm::DIFile*>* llvm::DenseMapBase<llvm::DenseMap<llvm::DIFile*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DIFile>, llvm::detail::DenseSetPair<llvm::DIFile*>>, llvm::DIFile*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DIFile>, llvm::detail::DenseSetPair<llvm::DIFile*>>::Ins... | BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup,
BucketT *TheBucket) {
incrementEpoch();
// If the load of the hash table is more than 3/4, or if fewer than 1/8 of
// the buckets are empty (meaning that many are filled with tombstones),
// grow th... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rcx, %rax
movq %rdx, %r14
movq %rdi, %rbx
movl 0x8(%rdi), %ecx
movl 0x10(%rdi), %esi
leal 0x4(,%rcx,4), %edx
leal (%rsi,%rsi,2), %edi
cmpl %edi, %edx
jae 0x306a6ed
notl %ecx
addl %esi, %ecx
subl 0xc(%rbx), %ecx
movl %esi, %edx
shrl $0x3, %edx
cmpl %edx, %ecx
jbe 0... | /llvm/ADT/DenseMap.h |
llvm::detail::DenseSetPair<llvm::DINamespace*>* llvm::DenseMapBase<llvm::DenseMap<llvm::DINamespace*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DINamespace>, llvm::detail::DenseSetPair<llvm::DINamespace*>>, llvm::DINamespace*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DINamespace>, llvm::detail::Den... | BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup,
BucketT *TheBucket) {
incrementEpoch();
// If the load of the hash table is more than 3/4, or if fewer than 1/8 of
// the buckets are empty (meaning that many are filled with tombstones),
// grow th... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rcx, %rax
movq %rdx, %r14
movq %rdi, %rbx
movl 0x8(%rdi), %ecx
movl 0x10(%rdi), %esi
leal 0x4(,%rcx,4), %edx
leal (%rsi,%rsi,2), %edi
cmpl %edi, %edx
jae 0x306ca93
notl %ecx
addl %esi, %ecx
subl 0xc(%rbx), %ecx
movl %esi, %edx
shrl $0x3, %edx
cmpl %edx, %ecx
jbe 0... | /llvm/ADT/DenseMap.h |
llvm::hash_code llvm::hashing::detail::hash_combine_recursive_helper::combine<llvm::Metadata*, llvm::MDString*, llvm::Metadata*, unsigned int>(unsigned long, char*, char*, llvm::Metadata* const&, llvm::MDString* const&, llvm::Metadata* const&, unsigned int const&) | hash_code combine(size_t length, char *buffer_ptr, char *buffer_end,
const T &arg, const Ts &...args) {
buffer_ptr = combine_data(length, buffer_ptr, buffer_end, get_hashable_data(arg));
// Recurse to the next argument.
return combine(length, buffer_ptr, buffer_end, args...);
} | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %r9, %r12
movq %rcx, %rbx
movq %rdi, %r13
movq 0x50(%rsp), %r14
movq 0x58(%rsp), %r15
leaq 0x8(%rsp), %rbp
movq %rsi, (%rbp)
movq (%r8), %r8
movq %rbp, %rsi
callq 0x3064e66
movq (%rbp), %rcx
leaq 0x10(%rsp), %rbp
movq %rcx, (%rbp)
m... | /llvm/ADT/Hashing.h |
llvm::DenseMap<llvm::DICommonBlock*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DICommonBlock>, llvm::detail::DenseSetPair<llvm::DICommonBlock*>>::grow(unsigned int) | void grow(unsigned AtLeast) {
unsigned OldNumBuckets = NumBuckets;
BucketT *OldBuckets = Buckets;
allocateBuckets(std::max<unsigned>(64, static_cast<unsigned>(NextPowerOf2(AtLeast-1))));
assert(Buckets);
if (!OldBuckets) {
this->BaseT::initEmpty();
return;
}
this->moveFromOldBu... | pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %r15
movl 0x10(%rdi), %ebx
movq (%rdi), %r14
leal -0x1(%rsi), %eax
movl %eax, %ecx
shrl %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x2, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x4, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x8, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x10,... | /llvm/ADT/DenseMap.h |
llvm::hash_code llvm::hashing::detail::hash_combine_recursive_helper::combine<llvm::Metadata*, llvm::MDString*, llvm::MDString*, llvm::MDString*>(unsigned long, char*, char*, llvm::Metadata* const&, llvm::MDString* const&, llvm::MDString* const&, llvm::MDString* const&) | hash_code combine(size_t length, char *buffer_ptr, char *buffer_end,
const T &arg, const Ts &...args) {
buffer_ptr = combine_data(length, buffer_ptr, buffer_end, get_hashable_data(arg));
// Recurse to the next argument.
return combine(length, buffer_ptr, buffer_end, args...);
} | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %r9, %r12
movq %rcx, %rbx
movq %rdi, %r13
movq 0x50(%rsp), %r14
movq 0x58(%rsp), %r15
leaq 0x8(%rsp), %rbp
movq %rsi, (%rbp)
movq (%r8), %r8
movq %rbp, %rsi
callq 0x3064e66
movq (%rbp), %rcx
leaq 0x10(%rsp), %rbp
movq %rcx, (%rbp)
m... | /llvm/ADT/Hashing.h |
llvm::MDNodeInfo<llvm::DIModule>::getHashValue(llvm::DIModule const*) | static unsigned getHashValue(const NodeTy *N) {
return KeyTy(N).getHashValue();
} | subq $0xc8, %rsp
movq %rdi, %rsi
leaq 0x8(%rsp), %rdi
callq 0x306d796
leaq 0x10(%rsp), %r8
leaq 0x18(%rsp), %r9
leaq 0x20(%rsp), %rax
leaq 0x28(%rsp), %r10
xorps %xmm0, %xmm0
leaq 0x80(%rsp), %rcx
movaps %xmm0, 0x20(%rcx)
movaps %xmm0, 0x10(%rcx)
movaps %xmm0, (%rcx)
movaps %xmm0, -0x10(%rcx)
movaps %xmm0, -0x20(%rcx)
... | /IR/LLVMContextImpl.h |
llvm::MDNodeKeyImpl<llvm::DIModule>::MDNodeKeyImpl(llvm::DIModule const*) | static bool classof(const Metadata *MD) {
return MD->getMetadataID() == DIFileKind;
} | cmpb $0x10, (%rsi)
movq %rsi, %rax
je 0x306d7bc
movq -0x10(%rsi), %rcx
testb $0x2, %cl
jne 0x306d7b5
leaq -0x10(%rsi), %rax
addl %ecx, %ecx
andl $0x78, %ecx
subq %rcx, %rax
jmp 0x306d7b9
movq -0x20(%rsi), %rax
movq (%rax), %rax
movq %rax, (%rdi)
leaq -0x10(%rsi), %rax
movq -0x10(%rsi), %rcx
testb $0x2, %cl
jne 0x306d7d... | /llvm/IR/DebugInfoMetadata.h |
llvm::DenseMap<llvm::DIModule*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DIModule>, llvm::detail::DenseSetPair<llvm::DIModule*>>::grow(unsigned int) | void grow(unsigned AtLeast) {
unsigned OldNumBuckets = NumBuckets;
BucketT *OldBuckets = Buckets;
allocateBuckets(std::max<unsigned>(64, static_cast<unsigned>(NextPowerOf2(AtLeast-1))));
assert(Buckets);
if (!OldBuckets) {
this->BaseT::initEmpty();
return;
}
this->moveFromOldBu... | pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %r15
movl 0x10(%rdi), %ebx
movq (%rdi), %r14
leal -0x1(%rsi), %eax
movl %eax, %ecx
shrl %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x2, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x4, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x8, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x10,... | /llvm/ADT/DenseMap.h |
bool llvm::DenseMapBase<llvm::DenseMap<llvm::DITemplateTypeParameter*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DITemplateTypeParameter>, llvm::detail::DenseSetPair<llvm::DITemplateTypeParameter*>>, llvm::DITemplateTypeParameter*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DITemplateTypeParameter>, ... | bool LookupBucketFor(const LookupKeyT &Val,
const BucketT *&FoundBucket) const {
const BucketT *BucketsPtr = getBuckets();
const unsigned NumBuckets = getNumBuckets();
if (NumBuckets == 0) {
FoundBucket = nullptr;
return false;
}
// FoundTombstone - Keep track of... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rdx, %rbx
movl 0x10(%rdi), %ebp
testl %ebp, %ebp
je 0x306dd7f
movq %rsi, %r14
movq (%rdi), %r15
movq (%rsi), %rdi
callq 0x306dd9a
movl %eax, %ecx
decl %ebp
movq (%r14), %rsi
andl %ebp, %ecx
leaq (%r15,%rcx,8), %rdx
movq (%rdx), %r9
movb $0x1, %al
cmpq %r9, %r... | /llvm/ADT/DenseMap.h |
llvm::MDNodeKeyImpl<llvm::DITemplateValueParameter>::MDNodeKeyImpl(llvm::DITemplateValueParameter const*) | dwarf::Tag DINode::getTag() const { return (dwarf::Tag)SubclassData16; } | movzwl 0x2(%rsi), %eax
movl %eax, (%rdi)
leaq -0x10(%rsi), %rax
movq -0x10(%rsi), %rcx
testb $0x2, %cl
jne 0x306e546
addl %ecx, %ecx
andl $0x78, %ecx
movq %rax, %rdx
subq %rcx, %rdx
jmp 0x306e54a
movq -0x20(%rsi), %rdx
movq (%rdx), %rcx
movq %rcx, 0x8(%rdi)
movq (%rax), %rcx
testb $0x2, %cl
jne 0x306e566
addl %ecx, %ec... | /IR/DebugInfoMetadata.cpp |
bool llvm::DenseMapBase<llvm::DenseMap<llvm::DILocalVariable*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DILocalVariable>, llvm::detail::DenseSetPair<llvm::DILocalVariable*>>, llvm::DILocalVariable*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DILocalVariable>, llvm::detail::DenseSetPair<llvm::DILocal... | bool LookupBucketFor(const LookupKeyT &Val,
const BucketT *&FoundBucket) const {
const BucketT *BucketsPtr = getBuckets();
const unsigned NumBuckets = getNumBuckets();
if (NumBuckets == 0) {
FoundBucket = nullptr;
return false;
}
// FoundTombstone - Keep track of... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rdx, %rbx
movl 0x10(%rdi), %ebp
testl %ebp, %ebp
je 0x306f6d5
movq %rsi, %r14
movq (%rdi), %r15
movq (%rsi), %rdi
callq 0x306f6f0
movl %eax, %ecx
decl %ebp
movq (%r14), %rsi
andl %ebp, %ecx
leaq (%r15,%rcx,8), %rdx
movq (%rdx), %r9
movb $0x1, %al
cmpq %r9, %r... | /llvm/ADT/DenseMap.h |
llvm::hash_code llvm::hashing::detail::hash_combine_recursive_helper::combine<llvm::MDString*, unsigned int>(unsigned long, char*, char*, llvm::MDString* const&, unsigned int const&) | hash_code combine(size_t length, char *buffer_ptr, char *buffer_end,
const T &arg, const Ts &...args) {
buffer_ptr = combine_data(length, buffer_ptr, buffer_end, get_hashable_data(arg));
// Recurse to the next argument.
return combine(length, buffer_ptr, buffer_end, args...);
} | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %r9, %r14
movq %rcx, %rbx
movq %rdi, %r15
leaq 0x8(%rsp), %r12
movq %rsi, (%r12)
movq (%r8), %r8
movq %r12, %rsi
callq 0x3065a00
movq (%r12), %rcx
leaq 0x10(%rsp), %r12
movq %rcx, (%r12)
movl (%r14), %r8d
movq %r15, %rdi
movq %r12, %rsi
movq %rax, %rdx
m... | /llvm/ADT/Hashing.h |
llvm::MDNodeKeyImpl<llvm::DILabel>::isKeyOf(llvm::DILabel const*) const | bool isKeyOf(const DILabel *RHS) const {
return Scope == RHS->getRawScope() && Name == RHS->getRawName() &&
File == RHS->getRawFile() && Line == RHS->getLine();
} | movq (%rdi), %rcx
movq -0x10(%rsi), %rdx
testb $0x2, %dl
jne 0x306fcd2
leaq -0x10(%rsi), %rax
addl %edx, %edx
andl $0x78, %edx
subq %rdx, %rax
jmp 0x306fcd6
movq -0x20(%rsi), %rax
cmpq (%rax), %rcx
jne 0x306fcef
movq 0x8(%rdi), %rcx
cmpq 0x8(%rax), %rcx
jne 0x306fcef
movq 0x10(%rdi), %rcx
cmpq 0x10(%rax), %rcx
je 0x306... | /IR/LLVMContextImpl.h |
bool llvm::DenseMapBase<llvm::DenseMap<llvm::DIMacroFile*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DIMacroFile>, llvm::detail::DenseSetPair<llvm::DIMacroFile*>>, llvm::DIMacroFile*, llvm::detail::DenseSetEmpty, llvm::MDNodeInfo<llvm::DIMacroFile>, llvm::detail::DenseSetPair<llvm::DIMacroFile*>>::LookupBucke... | bool LookupBucketFor(const LookupKeyT &Val,
const BucketT *&FoundBucket) const {
const BucketT *BucketsPtr = getBuckets();
const unsigned NumBuckets = getNumBuckets();
if (NumBuckets == 0) {
FoundBucket = nullptr;
return false;
}
// FoundTombstone - Keep track of... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x98, %rsp
movq %rdx, %rbx
movl 0x10(%rdi), %ebp
testl %ebp, %ebp
je 0x307235f
movq %rsi, %r14
movq (%rdi), %r12
leaq 0x4(%rsi), %r9
leaq 0x8(%rsi), %rax
leaq 0x10(%rsi), %r10
xorps %xmm0, %xmm0
leaq 0x50(%rsp), %rcx
movaps %xmm0, 0x20(%rcx)
movaps... | /llvm/ADT/DenseMap.h |
bool llvm::DenseMapBase<llvm::DenseMap<llvm::DIArgList*, llvm::detail::DenseSetEmpty, llvm::DIArgListInfo, llvm::detail::DenseSetPair<llvm::DIArgList*>>, llvm::DIArgList*, llvm::detail::DenseSetEmpty, llvm::DIArgListInfo, llvm::detail::DenseSetPair<llvm::DIArgList*>>::LookupBucketFor<llvm::DIArgListKeyInfo>(llvm::DIArg... | bool LookupBucketFor(const LookupKeyT &Val,
const BucketT *&FoundBucket) const {
const BucketT *BucketsPtr = getBuckets();
const unsigned NumBuckets = getNumBuckets();
if (NumBuckets == 0) {
FoundBucket = nullptr;
return false;
}
// FoundTombstone - Keep track of... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rdx, %rbx
movl 0x10(%rdi), %ebp
testl %ebp, %ebp
je 0x307298e
movq %rsi, %r14
movq (%rdi), %r12
movq (%rsi), %rdi
movq 0x8(%rsi), %rax
leaq (%rdi,%rax,8), %rsi
callq 0x30729a5
movq %rax, %r15
decl %ebp
andl %ebp, %r15d
movl $0x1, %... | /llvm/ADT/DenseMap.h |
llvm::detail::DenseSetPair<llvm::DIArgList*>* llvm::DenseMapBase<llvm::DenseMap<llvm::DIArgList*, llvm::detail::DenseSetEmpty, llvm::DIArgListInfo, llvm::detail::DenseSetPair<llvm::DIArgList*>>, llvm::DIArgList*, llvm::detail::DenseSetEmpty, llvm::DIArgListInfo, llvm::detail::DenseSetPair<llvm::DIArgList*>>::InsertInto... | BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup,
BucketT *TheBucket) {
incrementEpoch();
// If the load of the hash table is more than 3/4, or if fewer than 1/8 of
// the buckets are empty (meaning that many are filled with tombstones),
// grow th... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rcx, %rax
movq %rdx, %r14
movq %rdi, %rbx
movl 0x8(%rdi), %ecx
movl 0x10(%rdi), %esi
leal 0x4(,%rcx,4), %edx
leal (%rsi,%rsi,2), %edi
cmpl %edi, %edx
jae 0x3072c2f
notl %ecx
addl %esi, %ecx
subl 0xc(%rbx), %ecx
movl %esi, %edx
shrl $0x3, %edx
cmpl %edx, %ecx
jbe 0... | /llvm/ADT/DenseMap.h |
llvm::DbgRecord::createDebugIntrinsic(llvm::Module*, llvm::Instruction*) const | DbgInfoIntrinsic *
DbgRecord::createDebugIntrinsic(Module *M, Instruction *InsertBefore) const {
switch (RecordKind) {
case ValueKind:
return cast<DbgVariableRecord>(this)->createDebugIntrinsic(M, InsertBefore);
case LabelKind:
return cast<DbgLabelRecord>(this)->createDebugIntrinsic(M, InsertBefore);
};... | cmpb $0x0, 0x20(%rdi)
jne 0x30742ea
jmp 0x307407a
nop
| /IR/DebugProgramInstruction.cpp |
(anonymous namespace)::AsmParser::parseDirectiveCVFile() | bool AsmParser::parseDirectiveCVFile() {
SMLoc FileNumberLoc = getTok().getLoc();
int64_t FileNumber;
std::string Filename;
std::string Checksum;
int64_t ChecksumKind = 0;
if (parseIntToken(FileNumber,
"expected file number in '.cv_file' directive") ||
check(FileNumber < 1, FileNu... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xd8, %rsp
movq %rdi, %rbx
callq 0x311c4aa
movq %rax, %rdi
callq 0x311c330
movq %rax, %r14
leaq 0x78(%rsp), %r13
movq %r13, -0x10(%r13)
xorl %eax, %eax
movq %rax, -0x8(%r13)
movb %al, (%r13)
leaq 0x28(%rsp), %r12
movq %r12, -0x10(%r12)
movq %rax, -... | /MC/MCParser/AsmParser.cpp |
(anonymous namespace)::AsmParser::parseDirectiveDCB(llvm::StringRef, unsigned int) | bool AsmParser::parseDirectiveDCB(StringRef IDVal, unsigned Size) {
SMLoc NumValuesLoc = Lexer.getLoc();
int64_t NumValues;
if (checkForValidSection() || parseAbsoluteExpression(NumValues))
return true;
if (NumValues < 0) {
Warning(NumValuesLoc, "'" + Twine(IDVal) + "' directive with negative repeat co... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x58, %rsp
movl %ecx, %r14d
movq %rdx, %r13
movq %rsi, %rbp
movq %rdi, %rbx
addq $0x28, %rdi
callq 0x311c32a
movq %rax, %r15
movq (%rbx), %rax
movq %rbx, %rdi
callq *0x108(%rax)
movb $0x1, %r12b
testb %al, %al
jne 0x310e3fd
movq (%rbx), %rax
movq %... | /MC/MCParser/AsmParser.cpp |
(anonymous namespace)::COFFAsmParser::ParseSectionSwitch(llvm::StringRef, unsigned int, llvm::StringRef, llvm::COFF::COMDATType) | bool COFFAsmParser::ParseSectionSwitch(StringRef Section,
unsigned Characteristics,
StringRef COMDATSymName,
COFF::COMDATType Type) {
if (getLexer().isNot(AsmToken::EndOfStatement))
return TokError... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x38, %rsp
movq %r9, %r14
movq %r8, %rbx
movl %ecx, %ebp
movq %rdx, %r15
movq %rsi, %r12
movq %rdi, %r13
movq 0x8(%rdi), %rdi
movq (%rdi), %rax
callq *0x28(%rax)
movq 0x8(%rax), %rax
cmpl $0x9, (%rax)
jne 0x31146f2
movq 0x8(%r13), %rdi
movq (%rdi),... | /MC/MCParser/COFFAsmParser.cpp |
llvm::AsmLexer::LexSlash() | AsmToken AsmLexer::LexSlash() {
if (!MAI.shouldAllowAdditionalComments()) {
IsAtStartOfStatement = false;
return AsmToken(AsmToken::Slash, StringRef(TokStart, 1));
}
switch (*CurPtr) {
case '*':
IsAtStartOfStatement = false;
break; // C style comment.
case '/':
++CurPtr;
return LexLin... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x20, %rsp
movq %rsi, %r14
movq %rdi, %rbx
movq 0x90(%rsi), %rax
cmpb $0x0, 0x41(%rax)
je 0x311e892
movq 0x98(%r14), %rax
movzbl (%rax), %ecx
cmpl $0x2f, %ecx
jne 0x311e7ad
incq %rax
movq %rax, 0x98(%r14)
movq %rbx, %rdi
movq %r14, %rsi
callq 0x311e914
movq %... | /MC/MCParser/AsmLexer.cpp |
llvm::AsmLexer::isAtStartOfComment(char const*) | bool AsmLexer::isAtStartOfComment(const char *Ptr) {
if (MAI.getRestrictCommentStringToStartOfStatement() && !IsAtStartOfStatement)
return false;
StringRef CommentString = MAI.getCommentString();
if (CommentString.size() == 1)
return CommentString[0] == Ptr[0];
// Allow # preprocessor comments also b... | movq 0x90(%rdi), %rcx
cmpb $0x1, 0x40(%rcx)
jne 0x312005c
cmpb $0x1, 0xb1(%rdi)
jne 0x3120078
movq 0x30(%rcx), %rax
movq 0x38(%rcx), %rdx
cmpq $0x1, %rdx
je 0x3120070
cmpb $0x23, 0x1(%rax)
jne 0x312007b
movb (%rax), %al
cmpb (%rsi), %al
sete %al
retq
xorl %eax, %eax
retq
pushq %rax
movq %rsi, %rdi
movq %rax, %rsi
callq... | /MC/MCParser/AsmLexer.cpp |
llvm::MapVector<llvm::MCSection*, llvm::ConstantPool, llvm::DenseMap<llvm::MCSection*, unsigned int, llvm::DenseMapInfo<llvm::MCSection*, void>, llvm::detail::DenseMapPair<llvm::MCSection*, unsigned int>>, llvm::SmallVector<std::pair<llvm::MCSection*, llvm::ConstantPool>, 0u>>::operator[](llvm::MCSection* const&) | ValueT &operator[](const KeyT &Key) {
std::pair<KeyT, typename MapType::mapped_type> Pair = std::make_pair(Key, 0);
std::pair<typename MapType::iterator, bool> Result = Map.insert(Pair);
auto &I = Result.first->second;
if (Result.second) {
Vector.push_back(std::make_pair(Key, ValueT()));
I =... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x1e8, %rsp # imm = 0x1E8
movq %rsi, %r15
movq %rdi, %rbx
movq (%rsi), %rax
leaq 0x10(%rsp), %rcx
movq %rax, -0x8(%rcx)
movl $0x0, (%rcx)
leaq 0x18(%rsp), %r14
leaq 0x8(%rsp), %rdx
movq %r14, %rdi
movq %rbx, %rsi
callq 0x27d7594
movq (%r... | /llvm/ADT/MapVector.h |
llvm::DenseMap<std::pair<llvm::MCSymbol const*, unsigned int>, llvm::MCSymbolRefExpr const*, llvm::DenseMapInfo<std::pair<llvm::MCSymbol const*, unsigned int>, void>, llvm::detail::DenseMapPair<std::pair<llvm::MCSymbol const*, unsigned int>, llvm::MCSymbolRefExpr const*>>::grow(unsigned int) | void grow(unsigned AtLeast) {
unsigned OldNumBuckets = NumBuckets;
BucketT *OldBuckets = Buckets;
allocateBuckets(std::max<unsigned>(64, static_cast<unsigned>(NextPowerOf2(AtLeast-1))));
assert(Buckets);
if (!OldBuckets) {
this->BaseT::initEmpty();
return;
}
this->moveFromOldBu... | pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
movl 0x10(%rdi), %r15d
decl %esi
movl %esi, %eax
shrl %eax
orl %esi, %eax
movl %eax, %ecx
shrl $0x2, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x4, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x8, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x10, %eax
orl %ecx, %eax
incl %ea... | /llvm/ADT/DenseMap.h |
llvm::SmallVectorTemplateBase<std::pair<llvm::MCSection*, llvm::ConstantPool>, false>::grow(unsigned long) | void SmallVectorTemplateBase<T, TriviallyCopyable>::grow(size_t MinSize) {
size_t NewCapacity;
T *NewElts = mallocForGrow(MinSize, NewCapacity);
moveElementsForGrow(NewElts);
takeAllocationForGrow(NewElts, NewCapacity);
} | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %rdx
movq %rdi, %rbx
leaq 0x10(%rdi), %r15
movq %rsp, %r12
movl $0xe0, %ecx
movq %r15, %rsi
movq %r12, %r8
callq 0x78027e
movq %rax, %r14
movq %rbx, %rdi
movq %rax, %rsi
callq 0x31230ae
movq (%r12), %r12
movq (%rbx), %rdi
cmpq %r15, %rdi
je 0x312309a
cal... | /llvm/ADT/SmallVector.h |
llvm::SmallVectorImpl<llvm::ConstantPoolEntry>::operator=(llvm::SmallVectorImpl<llvm::ConstantPoolEntry>&&) | SmallVectorImpl<T> &SmallVectorImpl<T>::operator=(SmallVectorImpl<T> &&RHS) {
// Avoid self-assignment.
if (this == &RHS) return *this;
// If the RHS isn't small, clear this vector and then steal its buffer.
if (!RHS.isSmall()) {
this->assignRemote(std::move(RHS));
return *this;
}
// If we already... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rdi, %rbx
cmpq %rsi, %rdi
je 0x31231d6
movq %rsi, %r14
movq (%rsi), %rsi
leaq 0x10(%r14), %rax
cmpq %rax, %rsi
je 0x3123149
movq %rbx, %rdi
movq %r14, %rsi
callq 0x31231e6
jmp 0x31231d6
movl 0x8(%r14), %r15d
movl 0x8(%rbx), %r12d
cmpl %r15d, %r12d
jae 0x31231... | /llvm/ADT/SmallVector.h |
llvm::MCAsmBackend::createDwoObjectWriter(llvm::raw_pwrite_stream&, llvm::raw_pwrite_stream&) const | std::unique_ptr<MCObjectWriter>
MCAsmBackend::createDwoObjectWriter(raw_pwrite_stream &OS,
raw_pwrite_stream &DwoOS) const {
auto TW = createObjectTargetWriter();
switch (TW->getFormat()) {
case Triple::COFF:
return createWinCOFFDwoObjectWriter(
cast<MCWinCOFFObject... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
movq %rcx, %r14
movq %rdx, %r15
movq %rsi, %r12
movq %rdi, %rbx
movq (%rsi), %rax
movq %rsp, %r13
movq %r13, %rdi
callq *0x28(%rax)
movq (%r13), %rdi
movq (%rdi), %rax
callq *0x10(%rax)
cmpl $0x7, %eax
je 0x312365a
cmpl $0x3, %eax
je 0x3... | /MC/MCAsmBackend.cpp |
llvm::cl::opt<(anonymous namespace)::DefaultOnOff, false, llvm::cl::parser<(anonymous namespace)::DefaultOnOff>>::printOptionValue(unsigned long, bool) const | void printOptionValue(size_t GlobalWidth, bool Force) const override {
if (Force || !this->getDefault().compare(this->getValue())) {
cl::printOptionDiff<ParserClass>(*this, Parser, this->getValue(),
this->getDefault(), GlobalWidth);
}
} | movq %rsi, %r8
movq %rdi, %rsi
movl 0x80(%rdi), %eax
testl %edx, %edx
je 0x3123f0a
subq $0x18, %rsp
leaq 0x98(%rsi), %rdi
leaq 0x88(%rsi), %rcx
leaq 0x33a7df7(%rip), %r9 # 0x64cbce8
leaq 0x8(%rsp), %rdx
movq %r9, (%rdx)
movb $0x1, 0xc(%rdx)
movl %eax, 0x8(%rdx)
callq 0x76feee
addq $0x18, %rsp
retq
cmpb $0x1, 0x94(%r... | /llvm/Support/CommandLine.h |
void llvm::cl::apply<llvm::cl::opt<llvm::cl::boolOrDefault, false, llvm::cl::parser<llvm::cl::boolOrDefault>>, char [22], llvm::cl::OptionHidden, llvm::cl::desc, llvm::cl::initializer<llvm::cl::boolOrDefault>>(llvm::cl::opt<llvm::cl::boolOrDefault, false, llvm::cl::parser<llvm::cl::boolOrDefault>>*, char const (&) [22]... | void apply(Opt *O, const Mod &M, const Mods &... Ms) {
applicator<Mod>::opt(M, *O);
apply(O, Ms...);
} | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movq %r8, %rbx
movq %rcx, %r14
movq %rdx, %r15
movq %rsi, %r12
movq %rdi, %r13
movq %rsi, %rdi
callq 0x6e5300
movq %r13, %rdi
movq %r12, %rsi
movq %rax, %rdx
callq 0x76cc2c
movl (%r15), %eax
movzwl 0xa(%r13), %ecx
shll $0x5, %eax
andl $0x60, %eax
andl $-0x61, %ecx
... | /llvm/Support/CommandLine.h |
llvm::MCAssembler::relaxBoundaryAlign(llvm::MCBoundaryAlignFragment&) | bool MCAssembler::relaxBoundaryAlign(MCBoundaryAlignFragment &BF) {
// BoundaryAlignFragment that doesn't need to align any fragment should not be
// relaxed.
if (!BF.getLastFragment())
return false;
uint64_t AlignedOffset = getFragmentOffset(BF);
uint64_t AlignedSize = 0;
for (const MCFragment *F = BF... | cmpq $0x0, 0x20(%rsi)
je 0x3126976
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movq %rsi, %rbx
movq %rdi, %r14
movq 0x8(%rsi), %rsi
callq 0x3124f60
movq 0x10(%rbx), %r12
xorl %r13d, %r13d
movq %rbx, %r15
movq (%r15), %r15
movq %r14, %rdi
movq %r15, %rsi
callq 0x3124bc2
addq %rax, %r13
cmpq 0x20(%rbx), %r15
j... | /MC/MCAssembler.cpp |
llvm::MCAssembler::relaxDwarfLineAddr(llvm::MCDwarfLineAddrFragment&) | bool MCAssembler::relaxDwarfLineAddr(MCDwarfLineAddrFragment &DF) {
bool WasRelaxed;
if (getBackend().relaxDwarfLineAddr(*this, DF, WasRelaxed))
return WasRelaxed;
MCContext &Context = getContext();
uint64_t OldSize = DF.getContents().size();
int64_t AddrDelta;
bool Abs = DF.getAddrDelta().evaluateKnow... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rsi, %rbx
movq %rdi, %r14
movq 0x8(%rdi), %rdi
movq (%rdi), %rax
leaq 0xf(%rsp), %rcx
movq %r14, %rsi
movq %rbx, %rdx
callq *0x98(%rax)
testb %al, %al
je 0x31269e2
movb 0xf(%rsp), %al
jmp 0x3126a39
movq (%r14), %r15
leaq 0x28(%rbx)... | /MC/MCAssembler.cpp |
emitAbsValue(llvm::MCStreamer&, llvm::MCExpr const*, unsigned int) | static void emitAbsValue(MCStreamer &OS, const MCExpr *Value, unsigned Size) {
const MCExpr *ABS = forceExpAbs(OS, Value);
OS.emitValue(ABS, Size);
} | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movl %edx, %ebx
movq %rsi, %r15
movq %rdi, %r14
movq 0x8(%rdi), %r12
movq 0x98(%r12), %rax
cmpb $0x0, 0x161(%rax)
jne 0x3135154
movq %r12, %rdi
callq 0x312c386
movq %rax, %r13
movq (%r14), %rax
movq %r14, %rdi
movq %r13, %rsi
movq %r15, %rdx
callq *0x110(%rax)
movq... | /MC/MCDwarf.cpp |
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