name string | code string | asm string | file string |
|---|---|---|---|
llvm::InvalidateAnalysisPass<llvm::ShouldNotRunFunctionPassesAnalysis>::printPipeline(llvm::raw_ostream&, llvm::function_ref<llvm::StringRef (llvm::StringRef)>) | void printPipeline(raw_ostream &OS,
function_ref<StringRef(StringRef)> MapClassName2PassName) {
auto ClassName = AnalysisT::name();
auto PassName = MapClassName2PassName(ClassName);
OS << "invalidate<" << PassName << '>';
} | pushq %r15
pushq %r14
pushq %rbx
movq %rcx, %rbx
movq %rdx, %r14
movq %rsi, %r15
callq 0x1c20fce
movq %rbx, %rdi
movq %rax, %rsi
callq *%r14
movq %rax, %rbx
movq %rdx, %r14
leaq 0x1825029(%rip), %rsi # 0x346e7ba
movl $0xb, %edx
movq %r15, %rdi
callq 0x7c4562
movq %rax, %rdi
movq %rbx, %rsi
movq %r14, %rdx
callq 0x7c4... | /llvm/IR/PassManager.h |
llvm::RequireAnalysisPass<llvm::TargetIRAnalysis, llvm::Function, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) | PreservedAnalyses run(IRUnitT &Arg, AnalysisManagerT &AM,
ExtraArgTs &&... Args) {
(void)AM.template getResult<AnalysisT>(Arg,
std::forward<ExtraArgTs>(Args)...);
return PreservedAnalyses::all();
} | pushq %rbx
subq $0x20, %rsp
movq %rdi, %rbx
leaq 0x3ce82ad(%rip), %rsi # 0x5932568
movq %rcx, %rdi
callq 0x1a7f6e0
leaq 0x20(%rbx), %rax
movq %rax, (%rbx)
movq %rax, 0x8(%rbx)
movl $0x2, %eax
movq %rax, 0x10(%rbx)
xorl %ecx, %ecx
movl %ecx, 0x18(%rbx)
leaq 0x50(%rbx), %rdx
movq %rdx, 0x30(%rbx)
movq %rdx, 0x38(%rbx)
... | /llvm/IR/PassManager.h |
llvm::InvalidateAnalysisPass<llvm::TargetIRAnalysis>::printPipeline(llvm::raw_ostream&, llvm::function_ref<llvm::StringRef (llvm::StringRef)>) | void printPipeline(raw_ostream &OS,
function_ref<StringRef(StringRef)> MapClassName2PassName) {
auto ClassName = AnalysisT::name();
auto PassName = MapClassName2PassName(ClassName);
OS << "invalidate<" << PassName << '>';
} | pushq %r15
pushq %r14
pushq %rbx
movq %rcx, %rbx
movq %rdx, %r14
movq %rsi, %r15
callq 0x1c21236
movq %rbx, %rdi
movq %rax, %rsi
callq *%r14
movq %rax, %rbx
movq %rdx, %r14
leaq 0x18242c9(%rip), %rsi # 0x346e7ba
movl $0xb, %edx
movq %r15, %rdi
callq 0x7c4562
movq %rax, %rdi
movq %rbx, %rsi
movq %r14, %rdx
callq 0x7c4... | /llvm/IR/PassManager.h |
llvm::PreservedAnalyses llvm::InvalidateAnalysisPass<llvm::UniformityInfoAnalysis>::run<llvm::Function, llvm::AnalysisManager<llvm::Function>>(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) | PreservedAnalyses run(IRUnitT &Arg, AnalysisManagerT &AM, ExtraArgTs &&...) {
auto PA = PreservedAnalyses::all();
PA.abandon<AnalysisT>();
return PA;
} | pushq %r15
pushq %r14
pushq %rbx
subq $0x20, %rsp
movq %rdi, %rbx
leaq 0x20(%rdi), %rax
movq %rax, (%rdi)
movq %rax, 0x8(%rdi)
movl $0x2, %eax
movq %rax, 0x10(%rdi)
xorl %ecx, %ecx
movl %ecx, 0x18(%rdi)
leaq 0x30(%rdi), %r14
leaq 0x50(%rdi), %rdx
movq %rdx, 0x30(%rdi)
movq %rdx, 0x38(%rdi)
movq %rax, 0x40(%rdi)
movl %e... | /llvm/IR/PassManager.h |
llvm::RequireAnalysisPass<llvm::TypeBasedAA, llvm::Function, llvm::AnalysisManager<llvm::Function>>::run(llvm::Function&, llvm::AnalysisManager<llvm::Function>&) | PreservedAnalyses run(IRUnitT &Arg, AnalysisManagerT &AM,
ExtraArgTs &&... Args) {
(void)AM.template getResult<AnalysisT>(Arg,
std::forward<ExtraArgTs>(Args)...);
return PreservedAnalyses::all();
} | pushq %rbx
subq $0x20, %rsp
movq %rdi, %rbx
leaq 0x3ce6cc5(%rip), %rsi # 0x5932798
movq %rcx, %rdi
callq 0x1a7f6e0
leaq 0x20(%rbx), %rax
movq %rax, (%rbx)
movq %rax, 0x8(%rbx)
movl $0x2, %eax
movq %rax, 0x10(%rbx)
xorl %ecx, %ecx
movl %ecx, 0x18(%rbx)
leaq 0x50(%rbx), %rdx
movq %rdx, 0x30(%rbx)
movq %rdx, 0x38(%rbx)
... | /llvm/IR/PassManager.h |
llvm::detail::AnalysisPassModel<llvm::LazyCallGraph::SCC, llvm::OuterAnalysisManagerProxy<llvm::AnalysisManager<llvm::Module>, llvm::LazyCallGraph::SCC, llvm::LazyCallGraph&>, llvm::AnalysisManager<llvm::LazyCallGraph::SCC, llvm::LazyCallGraph&>::Invalidator, llvm::LazyCallGraph&>::run(llvm::LazyCallGraph::SCC&, llvm::... | std::unique_ptr<AnalysisResultConcept<IRUnitT, InvalidatorT>>
run(IRUnitT &IR, AnalysisManager<IRUnitT, ExtraArgTs...> &AM,
ExtraArgTs... ExtraArgs) override {
return std::make_unique<ResultModelT>(
Pass.run(IR, AM, std::forward<ExtraArgTs>(ExtraArgs)...));
} | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x60, %rsp
movq %rdi, %rbx
movq 0x8(%rsi), %rax
leaq 0x8(%rsp), %r14
movq %rax, -0x8(%r14)
movq %r14, %rdi
xorl %esi, %esi
callq 0x17b1462
movl $0x38, %edi
callq 0x751940
movq %rax, %r15
movq -0x8(%r14), %rax
leaq 0x38(%rsp), %r12
movq %rax, -0x8(%r12)
movq %... | /llvm/IR/PassManagerInternal.h |
llvm::ChangeReporter<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>>::handleIRAfterPass(llvm::Any, llvm::StringRef, llvm::StringRef) | void ChangeReporter<T>::handleIRAfterPass(Any IR, StringRef PassID,
StringRef PassName) {
assert(!BeforeStack.empty() && "Unexpected empty stack encountered.");
std::string Name = getIRName(IR);
if (isIgnored(PassID)) {
if (VerboseMode)
handleIgnored(PassID, N... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x78, %rsp
movq %r9, %r13
movq %r8, %rbp
movq %rcx, 0x10(%rsp)
movq %rdx, %r15
movq %rsi, %r12
movq %rdi, %rbx
movq (%rsi), %rsi
testq %rsi, %rsi
je 0x1c62119
movq (%rsi), %rax
leaq 0x30(%rsp), %rdi
callq *0x10(%rax)
jmp 0x1c62122
movq $0x0, 0x30(%... | /Passes/StandardInstrumentations.cpp |
void llvm::cl::apply<llvm::cl::opt<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>, false, llvm::cl::parser<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>>>, char [21], llvm::cl::desc, llvm::cl::OptionHidden, llvm::cl::initializer<char [4]>>(llvm::cl::opt<s... | void apply(Opt *O, const Mod &M, const Mods &... Ms) {
applicator<Mod>::opt(M, *O);
apply(O, Ms...);
} | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movq %r8, %rbx
movq %rcx, %r14
movq %rdx, %r15
movq %rsi, %r12
movq %rdi, %r13
movq %rsi, %rdi
callq 0x7512e0
movq %r13, %rdi
movq %r12, %rsi
movq %rax, %rdx
callq 0x1c90c20
movups (%r15), %xmm0
movups %xmm0, 0x20(%r13)
movl (%r14), %eax
movzwl 0xa(%r13), %ecx
shll... | /llvm/Support/CommandLine.h |
void llvm::detail::UniqueFunctionBase<void, llvm::StringRef, llvm::Any, llvm::PreservedAnalyses const&>::CallImpl<llvm::PrintIRInstrumentation::registerCallbacks(llvm::PassInstrumentationCallbacks&)::$_1>(void*, llvm::StringRef, llvm::Any&, llvm::PreservedAnalyses const&) | static ReturnT CallImpl(void *CallableAddr,
AdjustedParamT<ParamTs>... Params) {
auto &Func = *reinterpret_cast<CalledAsT *>(CallableAddr);
return Func(std::forward<ParamTs>(Params)...);
} | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x10, %rsp
movq %rdx, %r14
movq %rsi, %r15
movq (%rcx), %rbx
movq $0x0, (%rcx)
movq (%rdi), %r12
testq %rbx, %rbx
je 0x1c6d7e7
movq (%rbx), %rax
leaq 0x8(%rsp), %rdi
movq %rbx, %rsi
callq *0x10(%rax)
jmp 0x1c6d7f0
movq $0x0, 0x8(%rsp)
leaq 0x8(%rsp), %r13
mov... | /llvm/ADT/FunctionExtras.h |
llvm::DenseMap<llvm::BasicBlock const*, llvm::DenseMap<llvm::BasicBlock const*, unsigned int, llvm::DenseMapInfo<llvm::BasicBlock const*, void>, llvm::detail::DenseMapPair<llvm::BasicBlock const*, unsigned int>>, llvm::DenseMapInfo<llvm::BasicBlock const*, void>, llvm::detail::DenseMapPair<llvm::BasicBlock const*, llvm... | void grow(unsigned AtLeast) {
unsigned OldNumBuckets = NumBuckets;
BucketT *OldBuckets = Buckets;
allocateBuckets(std::max<unsigned>(64, static_cast<unsigned>(NextPowerOf2(AtLeast-1))));
assert(Buckets);
if (!OldBuckets) {
this->BaseT::initEmpty();
return;
}
this->moveFromOldBu... | pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %r15
movl 0x10(%rdi), %ebx
movq (%rdi), %r14
leal -0x1(%rsi), %eax
movl %eax, %ecx
shrl %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x2, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x4, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x8, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x10,... | /llvm/ADT/DenseMap.h |
GetFunctions(llvm::Any) | static SmallVector<Function *, 1> GetFunctions(Any IR) {
SmallVector<Function *, 1> Functions;
if (const auto *MaybeF = unwrapIR<Function>(IR)) {
Functions.push_back(const_cast<Function *>(MaybeF));
} else if (const auto *MaybeM = unwrapIR<Module>(IR)) {
for (Function &F : *const_cast<Module *>(MaybeM))
... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %r14
movq %rdi, %rbx
leaq 0x10(%rdi), %rax
movq %rax, (%rdi)
movabsq $0x100000000, %rax # imm = 0x100000000
movq %rax, 0x8(%rdi)
movq (%rsi), %rsi
testq %rsi, %rsi
je 0x1c70578
movq (%rsi), %rax
leaq 0x8(%rsp), %rdi
callq *0x10(%rax)
jmp 0x1c70581
movq $... | /Passes/StandardInstrumentations.cpp |
llvm::detail::IEEEFloat::convert(llvm::fltSemantics const&, llvm::RoundingMode, bool*) | IEEEFloat::opStatus IEEEFloat::convert(const fltSemantics &toSemantics,
roundingMode rounding_mode,
bool *losesInfo) {
lostFraction lostFraction;
unsigned int newPartCount, oldPartCount;
opStatus fs;
int shift;
const fltSemantics &f... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
movq %rcx, 0x8(%rsp)
movl %edx, 0x1c(%rsp)
movq %rsi, %r13
movq %rdi, %rbx
movq (%rdi), %r15
callq 0x1c786d0
movb %al, 0x3(%rsp)
movl 0x8(%r13), %r12d
movq (%rbx), %rax
movl 0x8(%rax), %eax
leal 0x40(%rax), %r14d
movl %r12d, %ebp
leaq 0x... | /Support/APFloat.cpp |
llvm::detail::IEEEFloat::initFromFloat8E5M2APInt(llvm::APInt const&) | bool isSingleWord() const { return BitWidth <= APINT_BITS_PER_WORD; } | movl 0x8(%rsi), %ecx
cmpq $0x41, %rcx
jb 0x1c7ca9e
movq (%rsi), %rsi
movq (%rsi), %rax
andl $0x3, %eax
addq $0x3f, %rcx
shrq $0x6, %rcx
decl %ecx
movq (%rsi,%rcx,8), %rdx
movl %edx, %ecx
shrl $0x2, %ecx
andl $0x1f, %ecx
leaq 0x327f793(%rip), %rsi # 0x4efc254
movq %rsi, (%rdi)
movb 0x14(%rdi), %sil
shrb $0x4, %dl
andb... | /llvm/ADT/APInt.h |
llvm::APFloat::convertToQuad() const | const fltSemantics &getSemantics() const { return *U.semantics; } | leaq 0x8(%rdi), %rsi
movq 0x8(%rdi), %rax
leaq 0x327adfd(%rip), %rcx # 0x4efc224
cmpq %rcx, %rax
je 0x1c81450
pushq %r15
pushq %r14
pushq %rbx
subq $0x40, %rsp
leaq 0x28(%rsp), %rbx
leaq 0x327adfb(%rip), %r15 # 0x4efc23c
movq %rbx, %rdi
cmpq %r15, %rax
je 0x1c8146e
callq 0x1c776b0
jmp 0x1c81473
leaq 0x327ade5(%rip)... | /llvm/ADT/APFloat.h |
llvm::APInt::rotl(unsigned int) const | APInt APInt::rotl(unsigned rotateAmt) const {
if (LLVM_UNLIKELY(BitWidth == 0))
return *this;
rotateAmt %= BitWidth;
if (rotateAmt == 0)
return *this;
return shl(rotateAmt) | lshr(BitWidth - rotateAmt);
} | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rsi, %r14
movq %rdi, %rbx
movl 0x8(%rsi), %r15d
testq %r15, %r15
je 0x1c82c5d
movl %edx, %eax
xorl %edx, %edx
divl %r15d
testl %edx, %edx
je 0x1c82c5d
movl %edx, %ebp
movl %r15d, 0x10(%rsp)
cmpl $0x40, %r15d
ja 0x1c82c6d
movq (%r14... | /Support/APInt.cpp |
llvm::APIntOps::ScaleBitMask(llvm::APInt const&, unsigned int, bool) | APInt llvm::APIntOps::ScaleBitMask(const APInt &A, unsigned NewBitWidth,
bool MatchAllBits) {
unsigned OldBitWidth = A.getBitWidth();
assert((((OldBitWidth % NewBitWidth) == 0) ||
((NewBitWidth % OldBitWidth) == 0)) &&
"One size should be a multiple of the other... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movl %ecx, 0x14(%rsp)
movq %rsi, %r14
movq %rdi, %rbx
movl 0x8(%rsi), %r13d
cmpl %edx, %r13d
jne 0x1c898f6
movq %rbx, %rdi
movq %r14, %rsi
callq 0x1c827b4
jmp 0x1c89a8c
movl %edx, %ebp
movq %rbx, %rdi
movl %edx, %esi
xorl %edx, %edx
xorl... | /Support/APInt.cpp |
llvm::cl::basic_parser_impl::getOptionWidth(llvm::cl::Option const&) const | size_t basic_parser_impl::getOptionWidth(const Option &O) const {
size_t Len = argPlusPrefixesSize(O.ArgStr);
auto ValName = getValueName();
if (!ValName.empty()) {
size_t FormattingLen = 3;
if (O.getMiscFlags() & PositionalEatsArgs)
FormattingLen = 6;
Len += getValueStr(O, ValName).size() + For... | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %r14
movq 0x18(%rsi), %rax
leaq 0x7(%rax), %rcx
cmpq $0x1, %rax
movl $0x7, %ebx
cmovneq %rcx, %rbx
movq (%rdi), %rax
callq *0x10(%rax)
testq %rdx, %rdx
je 0x1c8feb3
movb 0xb(%r14), %al
andb $0x4, %al
shrb $0x2, %al
movzbl %al, %eax
leaq (%rax,%rax,2), %rax
addq %rbx, %rax
mov... | /Support/CommandLine.cpp |
llvm::cl::Option::addArgument() | void Option::addArgument() {
GlobalParser->addOption(this);
FullyInitialized = true;
} | pushq %rbx
movq %rdi, %rbx
movq 0x3c50daf(%rip), %rax # 0x58e0eb8
testq %rax, %rax
jne 0x1c90128
leaq 0x3c50da3(%rip), %rdi # 0x58e0eb8
leaq 0xbe54(%rip), %rsi # 0x1c9bf70
leaq 0xbf1b(%rip), %rdx # 0x1c9c03e
callq 0x1cac5ee
movq 0x3c50d89(%rip), %rdi # 0x58e0eb8
movq %rbx, %rsi
xorl %edx, %edx
callq 0x1... | /Support/CommandLine.cpp |
llvm::SmallPtrSetImpl<llvm::cl::SubCommand*>::insert(llvm::cl::SubCommand*) | std::pair<iterator, bool> insert(PtrType Ptr) {
auto p = insert_imp(PtrTraits::getAsVoidPointer(Ptr));
return std::make_pair(makeIterator(p.first), p.second);
} | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %r14
movq %rdi, %rbx
movq %rsi, %rdi
movq %rdx, %rsi
callq 0x8efa2e
movq 0x8(%r14), %rcx
xorl %esi, %esi
cmpq (%r14), %rcx
sete %sil
movl 0x10(%r14,%rsi,4), %esi
leaq (%rcx,%rsi,8), %rcx
cmpq %rax, %rcx
je 0x1c9996b
cmpq $-0x2, (%rax)
jb 0x1c9996b
addq $0x8, %rax
cmpq %rcx, %... | /llvm/ADT/SmallPtrSet.h |
llvm::Uint24 llvm::DataExtractor::getU<llvm::Uint24>(unsigned long*, llvm::Error*) const | T DataExtractor::getU(uint64_t *offset_ptr, Error *Err) const {
ErrorAsOutParameter ErrAsOut(Err);
T val = 0;
if (isError(Err))
return val;
uint64_t offset = *offset_ptr;
if (!prepareRead(offset, sizeof(T), Err))
return val;
std::memcpy(&val, &Data.data()[offset], sizeof(val));
if (sys::IsLittleE... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r12
testq %rdx, %rdx
je 0x1c9da1c
cmpq $0x0, (%rbx)
jne 0x1c9da5e
movq (%r14), %r15
movl $0x3, %edx
movq %r12, %rdi
movq %r15, %rsi
movq %rbx, %rcx
callq 0x1c9d58c
testb %al, %al
je 0x1c9da5e
cmpb $0x1, 0x10(%r12)
movq (%... | /Support/DataExtractor.cpp |
void llvm::ScopedPrinter::printEnum<unsigned char, unsigned int>(llvm::StringRef, unsigned char, llvm::ArrayRef<llvm::EnumEntry<unsigned int>>) | void printEnum(StringRef Label, T Value,
ArrayRef<EnumEntry<TEnum>> EnumValues) {
StringRef Name;
bool Found = false;
for (const auto &EnumItem : EnumValues) {
if (EnumItem.Value == Value) {
Name = EnumItem.Name;
Found = true;
break;
}
}
if (Foun... | pushq %rbp
pushq %r14
pushq %rbx
movzbl %cl, %r10d
testq %r9, %r9
je 0x1ca0bcc
movq %r8, %rax
leaq (%r9,%r9,4), %rcx
leaq -0x28(,%rcx,8), %r11
xorl %ebx, %ebx
xorl %r9d, %r9d
xorl %r8d, %r8d
xorl %ecx, %ecx
movl 0x20(%rax,%rbx), %ebp
cmpl %r10d, %ebp
jne 0x1ca0bb9
movq (%rax,%rbx), %rcx
movq 0x8(%rax,%rbx), %r8
movb $0... | /llvm/Support/ScopedPrinter.h |
llvm::report_fatal_error(llvm::Error, bool) | void report_fatal_error(Error Err, bool GenCrashDiag) {
assert(Err && "report_fatal_error called with success value");
std::string ErrMsg;
{
raw_string_ostream ErrStream(ErrMsg);
logAllUnhandledErrors(std::move(Err), ErrStream);
}
report_fatal_error(Twine(ErrMsg), GenCrashDiag);
} | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xb8, %rsp
movl %esi, %ebx
movq %rdi, %r15
leaq 0x70(%rsp), %rax
movq %rax, -0x10(%rax)
xorl %ebp, %ebp
movq %rbp, -0x8(%rax)
movb $0x0, (%rax)
leaq 0x80(%rsp), %r12
leaq 0x60(%rsp), %r14
movq %r12, %rdi
movq %r14, %rsi
callq 0xe50108
leaq 0x30(%rs... | /Support/Error.cpp |
llvm::formatted_raw_ostream::resetColor() | raw_ostream &resetColor() override {
if (colors_enabled()) {
DisableScanScope S(this);
raw_ostream::resetColor();
}
return *this;
} | pushq %rbx
movq %rdi, %rbx
cmpb $0x1, 0x28(%rdi)
jne 0x1ca37cb
movq 0x10(%rbx), %rsi
movq 0x20(%rbx), %rdx
subq %rsi, %rdx
movq %rbx, %rdi
callq 0x1ca35b6
movb $0x1, 0x68(%rbx)
movq %rbx, %rdi
callq 0x1ceac94
movb $0x0, 0x68(%rbx)
movq 0x20(%rbx), %rax
movq %rax, 0x40(%rbx)
movq %rbx, %rax
popq %rbx
retq
| /llvm/Support/FormattedStream.h |
computeForSatAddSub(bool, bool, llvm::KnownBits const&, llvm::KnownBits const&) | static KnownBits computeForSatAddSub(bool Add, bool Signed,
const KnownBits &LHS,
const KnownBits &RHS) {
// We don't see NSW even for sadd/ssub as we want to check if the result has
// signed overflow.
KnownBits Res =
KnownBits::comp... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xb8, %rsp
movq %r8, %r13
movq %rcx, %r15
movl %edx, %ebp
movl %esi, %r14d
movq %rdi, %rbx
xorl %edx, %edx
xorl %ecx, %ecx
movq %r15, %r8
movq %r13, %r9
callq 0x1ca62e0
movl 0x8(%rbx), %r11d
testl %ebp, %ebp
movq %r11, 0x38(%rsp)
je 0x1ca9519
leal ... | /Support/KnownBits.cpp |
llvm::ErrorOr<std::unique_ptr<llvm::MemoryBuffer, std::default_delete<llvm::MemoryBuffer>>> getOpenFileImpl<llvm::MemoryBuffer>(int, llvm::Twine const&, unsigned long, unsigned long, long, bool, bool, std::optional<llvm::Align>) | static ErrorOr<std::unique_ptr<MB>>
getOpenFileImpl(sys::fs::file_t FD, const Twine &Filename, uint64_t FileSize,
uint64_t MapSize, int64_t Offset, bool RequiresNullTerminator,
bool IsVolatile, std::optional<Align> Alignment) {
static int PageSize = sys::Process::getPageSizeEstimate();... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x88, %rsp
movq %r9, %r14
movq %r8, %r12
movq %rcx, %r15
movq %rdx, %r13
movl %esi, 0x14(%rsp)
movq %rdi, %rbx
movb 0x3c3405e(%rip), %al # 0x58e1418
testb %al, %al
je 0x1cad6f4
cmpq $-0x1, %r12
jne 0x1cad43d
movq %r15, %r12
cmpq $-0x1, %r15
jne ... | /Support/MemoryBuffer.cpp |
llvm::SHA1::final(std::array<unsigned int, 5ul>&) | void SHA1::final(std::array<uint32_t, HASH_LENGTH / 4> &HashResult) {
// Pad to complete the last block
pad();
if constexpr (sys::IsBigEndianHost) {
// Just copy the current state
for (int i = 0; i < 5; i++) {
HashResult[i] = InternalState.State[i];
}
} else {
// Swap byte order back
... | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
callq 0x1cb696c
xorl %eax, %eax
movl 0x40(%r14,%rax,4), %ecx
bswapl %ecx
movl %ecx, (%rbx,%rax,4)
incq %rax
cmpq $0x5, %rax
jne 0x1cb6af5
addq $0x8, %rsp
popq %rbx
popq %r14
retq
| /Support/SHA1.cpp |
llvm::SmallVectorBase<unsigned int>::grow_pod(void*, unsigned long, unsigned long) | void SmallVectorBase<Size_T>::grow_pod(void *FirstEl, size_t MinSize,
size_t TSize) {
size_t NewCapacity = getNewCapacity<Size_T>(MinSize, TSize, this->capacity());
void *NewElts;
if (BeginX == FirstEl) {
NewElts = llvm::safe_malloc(NewCapacity * TSize);
if (NewElts ... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rcx, %r15
movq %rsi, %r12
movq %rdi, %rbx
movl 0xc(%rdi), %esi
movq %rdx, %rdi
callq 0x1cba46a
movq %rax, %r14
movq (%rbx), %rdi
movq %rax, %rbp
imulq %r15, %rbp
cmpq %r12, %rdi
je 0x1cba5a4
movq %rbp, %rsi
callq 0x7510d0
testq %rax, %ra... | /Support/SmallVector.cpp |
llvm::SourceMgr::getLineAndColumn(llvm::SMLoc, unsigned int) const | std::pair<unsigned, unsigned>
SourceMgr::getLineAndColumn(SMLoc Loc, unsigned BufferID) const {
if (!BufferID)
BufferID = FindBufferContainingLoc(Loc);
assert(BufferID && "Invalid location!");
auto &SB = getBufferInfo(BufferID);
const char *Ptr = Loc.getPointer();
unsigned LineNo = SB.getLineNumber(Ptr)... | pushq %rbp
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %rbx
movq %rdi, %r14
testl %edx, %edx
jne 0x1cbb14b
movq %r14, %rdi
movq %rbx, %rsi
callq 0x1cbacf4
movl %eax, %edx
decl %edx
movq (%r14), %rax
leaq (%rdx,%rdx,2), %rcx
leaq (%rax,%rcx,8), %r14
movq %r14, %rdi
movq %rbx, %rsi
callq 0x1cbad44
movl %eax, %ebp
m... | /Support/SourceMgr.cpp |
llvm::StringRef::consumeInteger(unsigned int, llvm::APInt&) | bool StringRef::consumeInteger(unsigned Radix, APInt &Result) {
StringRef Str = *this;
// Autosense radix if not specified.
if (Radix == 0)
Radix = GetAutoSenseRadix(Str);
assert(Radix > 1 && Radix <= 36);
// Empty strings (after the radix autosense) are invalid.
if (Str.empty()) return true;
// S... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x48, %rsp
movq %rdx, %r14
movl %esi, %ebp
movq %rdi, %rbx
movups (%rdi), %xmm0
movaps %xmm0, (%rsp)
testl %esi, %esi
jne 0x1cc3a3d
movq %rsp, %rdi
callq 0x1cc386d
movl %eax, %ebp
movq 0x8(%rsp), %rax
testq %rax, %rax
je 0x1cc3c96
movq (%rsp), %rcx... | /Support/StringRef.cpp |
llvm::StdThreadPool::wait(llvm::ThreadPoolTaskGroup&) | void StdThreadPool::wait(ThreadPoolTaskGroup &Group) {
// Wait for all threads in the group to complete.
if (!isWorkerThread()) {
std::unique_lock<std::mutex> LockGuard(QueueLock);
CompletionCondition.wait(LockGuard,
[&] { return workCompletedUnlocked(&Group); });
return;
... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rsi, %rbx
movq %rdi, %r14
callq 0x1cc614c
testb %al, %al
je 0x1cc60d8
movq %r14, %rdi
movq %rbx, %rsi
addq $0x18, %rsp
popq %rbx
popq %r12
popq %r14
popq %r15
jmp 0x1cc5b12
leaq 0xb0(%r14), %rax
leaq 0x8(%rsp), %r15
movq %rax, (%r15)
movb $0x0, 0x8(%r15... | /Support/ThreadPool.cpp |
printVal(double, double, llvm::raw_ostream&) | static void printVal(double Val, double Total, raw_ostream &OS) {
if (Total < 1e-7) // Avoid dividing by zero.
OS << " ----- ";
else
OS << format(" %7.4f (%5.1f%%)", Val, Val*100/Total);
} | movsd 0x323368d(%rip), %xmm2 # 0x4efec78
ucomisd %xmm1, %xmm2
jbe 0x1ccb602
leaq 0x32337b7(%rip), %rsi # 0x4efedaf
movl $0x12, %edx
jmp 0x7c4562
subq $0x28, %rsp
movsd 0x310bd2a(%rip), %xmm2 # 0x4dd7338
mulsd %xmm0, %xmm2
divsd %xmm1, %xmm2
leaq 0x32337a5(%rip), %rax # 0x4efedc2
leaq 0x8(%rsp), %rsi
movq %rax, 0x... | /Support/Timer.cpp |
llvm::NamedRegionTimer::NamedRegionTimer(llvm::StringRef, llvm::StringRef, llvm::StringRef, llvm::StringRef, bool) | NamedRegionTimer::NamedRegionTimer(StringRef Name, StringRef Description,
StringRef GroupName,
StringRef GroupDescription, bool Enabled)
: TimeRegion(!Enabled ? nullptr
: &NamedGroupedTimers->get(Name, Description, GroupName,
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x38, %rsp
testl %r9d, %r9d
je 0x1ccb7b1
movq %rdx, %r12
movq %rsi, %r13
movq %rcx, 0x18(%rsp)
movq %r8, 0x20(%rsp)
movq %rdi, 0x30(%rsp)
leaq 0x80(%rsp), %rbp
leaq 0x70(%rsp), %r15
movq 0x3c160a8(%rip), %rax # 0x58e1730
testq %rax, %rax
jne 0x1c... | /Support/Timer.cpp |
llvm::vfs::InMemoryFileSystem::addFile(llvm::Twine const&, long, std::unique_ptr<llvm::MemoryBuffer, std::default_delete<llvm::MemoryBuffer>>, std::optional<unsigned int>, std::optional<unsigned int>, std::optional<llvm::sys::fs::file_type>, std::optional<llvm::sys::fs::perms>, llvm::function_ref<std::unique_ptr<llvm::... | bool InMemoryFileSystem::addFile(const Twine &P, time_t ModificationTime,
std::unique_ptr<llvm::MemoryBuffer> Buffer,
std::optional<uint32_t> User,
std::optional<uint32_t> Group,
std::opti... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x258, %rsp # imm = 0x258
movq %r9, %rbx
movq %r8, 0x8(%rsp)
movq %rcx, %r13
movq %rdx, 0x28(%rsp)
movq %rdi, %r14
leaq 0x1a8(%rsp), %r12
movq %r12, -0x18(%r12)
movq $0x0, -0x10(%r12)
movq $0x80, -0x8(%r12)
leaq 0x190(%rsp), %r15
movq %r... | /Support/VirtualFileSystem.cpp |
llvm::vfs::InMemoryFileSystem::openFileForRead(llvm::Twine const&) | llvm::ErrorOr<std::unique_ptr<File>>
InMemoryFileSystem::openFileForRead(const Twine &Path) {
auto Node = lookupNode(Path,/*FollowFinalSymlink=*/true);
if (!Node)
return Node.getError();
// When we have a file provide a heap-allocated wrapper for the memory buffer
// to match the ownership semantics for Fi... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xd0, %rsp
movq %rdx, %r14
movq %rdi, %rbx
leaq 0x28(%rsp), %r15
movq %r15, %rdi
movl $0x1, %ecx
xorl %r8d, %r8d
callq 0x1cd0a4a
testb $0x1, 0xa0(%r15)
je 0x1cd1435
orb $0x1, 0x10(%rbx)
movl 0x28(%rsp), %eax
movq 0x30(%rsp), %rcx
movl %eax, (%rbx)
movq %rcx, ... | /Support/VirtualFileSystem.cpp |
llvm::vfs::RedirectingFileSystem::lookupPath(llvm::StringRef) const | ErrorOr<RedirectingFileSystem::LookupResult>
RedirectingFileSystem::lookupPath(StringRef Path) const {
llvm::SmallString<128> CanonicalPath(Path);
if (std::error_code EC = makeCanonicalForLookup(CanonicalPath))
return EC;
// RedirectOnly means the VFS is always used.
if (UsageTrackingActive && Redirection ... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x278, %rsp # imm = 0x278
movq %rsi, %r14
movq %rdi, %rbx
leaq (%rcx,%rdx), %rax
leaq 0xe8(%rsp), %r12
movq %r12, -0x18(%r12)
movq $0x0, -0x10(%r12)
movq $0x80, -0x8(%r12)
leaq 0xd0(%rsp), %r15
movq %r15, %rdi
movq %rdx, %rsi
movq %rax, ... | /Support/VirtualFileSystem.cpp |
llvm::vfs::RedirectingFileSystem::create(llvm::ArrayRef<std::pair<std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char>>>>, bool, llvm::vfs::FileSystem&) | std::unique_ptr<RedirectingFileSystem> RedirectingFileSystem::create(
ArrayRef<std::pair<std::string, std::string>> RemappedFiles,
bool UseExternalNames, FileSystem &ExternalFS) {
std::unique_ptr<RedirectingFileSystem> FS(
new RedirectingFileSystem(&ExternalFS));
FS->UseExternalNames = UseExternalName... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x208, %rsp # imm = 0x208
movq %r8, %rbp
movl %ecx, %ebx
movq %rdx, %r15
movq %rsi, 0x18(%rsp)
movq %rdi, %r14
movl $0x80, %edi
callq 0x751940
movq %rax, %r12
leaq 0x70(%rsp), %r13
movq %rbp, (%r13)
movq %rbp, 0x20(%rsp)
lock
incl 0x8(%r... | /Support/VirtualFileSystem.cpp |
llvm::ErrorOr<(anonymous namespace)::RealFileSystem::WorkingDirectory>::ErrorOr<(anonymous namespace)::RealFileSystem::WorkingDirectory>((anonymous namespace)::RealFileSystem::WorkingDirectory&&, std::enable_if<std::is_convertible_v<(anonymous namespace)::RealFileSystem::WorkingDirectory, (anonymous namespace)::RealFil... | ErrorOr(OtherT &&Val,
std::enable_if_t<std::is_convertible_v<OtherT, T>> * = nullptr)
: HasError(false) {
new (getStorage()) storage_type(std::forward<OtherT>(Val));
} | pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
andb $-0x2, 0x130(%rdi)
movq %rsi, %r14
leaq 0x18(%rdi), %rax
movq %rax, (%rdi)
movq $0x0, 0x8(%rdi)
movq $0x80, 0x10(%rdi)
cmpq $0x0, 0x8(%rsi)
je 0x1cd8102
movq %rbx, %rdi
movq %r14, %rsi
callq 0x8584ac
leaq 0xb0(%rbx), %rax
movq %rax, 0x98(%rbx)
movq $0x0, 0xa0(%rbx)
... | /llvm/Support/ErrorOr.h |
llvm::vfs::RedirectingFileSystem::FileEntry::~FileEntry() | FileEntry(StringRef Name, StringRef ExternalContentsPath, NameKind UseName)
: RemapEntry(EK_File, Name, ExternalContentsPath, UseName) {} | pushq %rbx
movq %rdi, %rbx
leaq 0x3b49ebb(%rip), %rax # 0x5824d00
addq $0x10, %rax
movq %rax, (%rdi)
movq 0x30(%rdi), %rdi
leaq 0x40(%rbx), %rax
cmpq %rax, %rdi
je 0x1cdae64
movq (%rax), %rsi
incq %rsi
callq 0x7510e0
leaq 0x3b49eb5(%rip), %rax # 0x5824d20
addq $0x10, %rax
movq %rax, (%rbx)
movq 0x10(%rbx), %rdi
lea... | /llvm/Support/VirtualFileSystem.h |
llvm::SmallVectorImpl<llvm::vfs::RedirectingFileSystem::Entry*>::assignRemote(llvm::SmallVectorImpl<llvm::vfs::RedirectingFileSystem::Entry*>&&) | void assignRemote(SmallVectorImpl &&RHS) {
this->destroy_range(this->begin(), this->end());
if (!this->isSmall())
free(this->begin());
this->BeginX = RHS.BeginX;
this->Size = RHS.Size;
this->Capacity = RHS.Capacity;
RHS.resetToSmall();
} | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
movq (%rdi), %rdi
leaq 0x10(%r14), %rax
cmpq %rax, %rdi
je 0x1cdde11
callq 0x751980
movq (%rbx), %rax
movq %rax, (%r14)
movq 0x8(%rbx), %rax
movq %rax, 0x8(%r14)
leaq 0x10(%rbx), %rax
movq %rax, (%rbx)
movq $0x0, 0x8(%rbx)
addq $0x8, %rsp
popq %rbx
popq %... | /llvm/ADT/SmallVector.h |
llvm::yaml::Scanner::scanBlockScalar(bool) | bool Scanner::scanBlockScalar(bool IsLiteral) {
assert(*Current == '|' || *Current == '>');
char StyleIndicator;
char ChompingIndicator;
unsigned BlockIndent;
bool IsDone = false;
if (!scanBlockScalarIndicators(StyleIndicator, ChompingIndicator, BlockIndent,
IsDone))
ret... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x188, %rsp # imm = 0x188
movq %rdi, %rbx
movq %rsp, %r8
movb $0x0, (%r8)
leaq 0x3(%rsp), %rsi
leaq 0x2(%rsp), %rdx
leaq 0x8(%rsp), %rcx
callq 0x1ce3296
testb %al, %al
je 0x1ce380f
movb $0x1, %bpl
cmpb $0x0, (%rsp)
jne 0x1ce3811
movb 0x3... | /Support/YAMLParser.cpp |
llvm::yaml::Stream::printError(llvm::SMRange const&, llvm::Twine const&, llvm::SourceMgr::DiagKind) | void Stream::printError(const SMRange &Range, const Twine &Msg,
SourceMgr::DiagKind Kind) {
scanner->printError(Range.Start, Kind, Msg, Range);
} | subq $0x38, %rsp
movq %rdx, %rax
movq %rsi, %r8
movq (%rdi), %rdx
movq (%rsi), %rsi
movq (%rdx), %rdi
xorps %xmm0, %xmm0
movaps %xmm0, 0x20(%rsp)
movzbl 0x4c(%rdx), %edx
movaps 0x20(%rsp), %xmm0
movups %xmm0, (%rsp)
movl %edx, 0x10(%rsp)
movl $0x1, %r9d
movl %ecx, %edx
movq %rax, %rcx
callq 0x1cbc2c2
addq $0x38, %rsp
r... | /Support/YAMLParser.cpp |
llvm::yaml::ScalarNode::getDoubleQuotedValue(llvm::StringRef, llvm::SmallVectorImpl<char>&) const | StringRef
ScalarNode::getDoubleQuotedValue(StringRef RawValue,
SmallVectorImpl<char> &Storage) const {
assert(RawValue.size() >= 2 && RawValue.front() == '"' &&
RawValue.back() == '"');
StringRef UnquotedValue = RawValue.substr(1, RawValue.size() - 2);
auto UnescapeFunc ... | pushq %r15
pushq %r14
pushq %rbx
subq $0x20, %rsp
leaq -0x2(%rdx), %rax
xorl %r8d, %r8d
testq %rdx, %rdx
setne %r8b
addq %r8, %rsi
subq %r8, %rdx
cmpq %rax, %rdx
cmovbq %rdx, %rax
xorps %xmm0, %xmm0
movq %rsp, %r15
movaps %xmm0, (%r15)
movaps %xmm0, 0x10(%r15)
movq %rdi, (%r15)
leaq 0x15f5(%rip), %rdx # 0x1ce650e
... | /Support/YAMLParser.cpp |
llvm::yaml::Document::parseTAGDirective() | void Document::parseTAGDirective() {
Token Tag = getNext(); // %TAG <handle> <prefix>
StringRef T = Tag.Range;
// Strip %TAG
T = T.substr(T.find_first_of(" \t")).ltrim(" \t");
std::size_t HandleEnd = T.find_first_of(" \t");
StringRef TagHandle = T.substr(0, HandleEnd);
StringRef TagPrefix = T.substr(Handl... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x70, %rsp
movq %rdi, %r14
movq (%rdi), %rax
movq (%rax), %rsi
leaq 0x38(%rsp), %rbx
movq %rbx, %rdi
callq 0x1cdff74
movups 0x8(%rbx), %xmm0
leaq 0x10(%rsp), %r12
movaps %xmm0, (%r12)
leaq 0x321c0c6(%rip), %r15 # 0x4f0218c
movl $0x2, %edx
movq %r12, %rdi
mo... | /Support/YAMLParser.cpp |
llvm::yaml::ScalarTraits<float, void>::input(llvm::StringRef, void*, float&) | StringRef ScalarTraits<float>::input(StringRef Scalar, void *, float &Val) {
if (to_float(Scalar, Val))
return StringRef();
return "invalid floating point number";
} | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
subq $0x68, %rsp
movq %rcx, %rbx
leaq 0x40(%rsp), %rax
movw $0x105, 0x20(%rax) # imm = 0x105
movq %rdi, (%rax)
movq %rsi, 0x8(%rax)
leaq 0x20(%rsp), %r15
movq %r15, -0x18(%r15)
movq $0x0, -0x10(%r15)
movq $0x20, -0x8(%r15)
leaq 0x8(%rsp), %rsi
movq %rax, %rdi
callq 0x1cc... | /Support/YAMLTraits.cpp |
llvm::yaml::ScalarTraits<llvm::yaml::Hex16, void>::output(llvm::yaml::Hex16 const&, void*, llvm::raw_ostream&) | void ScalarTraits<Hex16>::output(const Hex16 &Val, void *, raw_ostream &Out) {
Out << format("0x%" PRIX16, (uint16_t)Val);
} | subq $0x18, %rsp
movzwl (%rdi), %eax
leaq 0x3218b64(%rip), %rcx # 0x4f024d4
movq %rsp, %rsi
movq %rcx, 0x8(%rsi)
leaq 0x3a0eb22(%rip), %rcx # 0x56f84a0
addq $0x10, %rcx
movq %rcx, (%rsi)
movw %ax, 0x10(%rsi)
movq %rdx, %rdi
callq 0x1ce9f7a
addq $0x18, %rsp
retq
| /Support/YAMLTraits.cpp |
llvm::writeToOutput(llvm::StringRef, std::function<llvm::Error (llvm::raw_ostream&)>) | Error llvm::writeToOutput(StringRef OutputFileName,
std::function<Error(raw_ostream &)> Write) {
if (OutputFileName == "-")
return Write(outs());
if (OutputFileName == "/dev/null") {
raw_null_ostream Out;
return Write(Out);
}
unsigned Mode = sys::fs::all_read | sys::fs::a... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xe0, %rsp
movq %rcx, %r14
movq %rdx, %r15
movq %rsi, %r12
movq %rdi, %rbx
cmpq $0x9, %rdx
je 0x1ceb471
cmpq $0x1, %r15
jne 0x1ceb48b
leaq 0x3212c27(%rip), %rsi # 0x4efe07f
movq %r12, %rdi
movq %r15, %rdx
callq 0x751d10
testl %eax, %eax
je 0x1ceb680
cmpq $0... | /Support/raw_ostream.cpp |
llvm::Expected<llvm::BitVector>::Expected<llvm::BitVector>(llvm::BitVector&&, std::enable_if<std::is_convertible_v<llvm::BitVector, llvm::BitVector>, void>::type*) | Expected(OtherT &&Val,
std::enable_if_t<std::is_convertible_v<OtherT, T>> * = nullptr)
: HasError(false)
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
// Expected is unchecked upon construction in Debug builds.
,
Unchecked(true)
#endif
{
new (getStorage()) storage_type(std::forward<... | pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
andb $-0x2, 0x48(%rdi)
movq %rsi, %r14
leaq 0x10(%rdi), %rax
movq %rax, (%rdi)
movabsq $0x600000000, %rax # imm = 0x600000000
movq %rax, 0x8(%rdi)
cmpl $0x0, 0x8(%rsi)
je 0x1d008f4
movq %rbx, %rdi
movq %r14, %rsi
callq 0xa4991e
movl 0x40(%r14), %eax
movl %eax, 0x40(... | /llvm/Support/Error.h |
llvm::json::sortedElements(llvm::json::Object const&) | std::vector<const Object::value_type *> sortedElements(const Object &O) {
std::vector<const Object::value_type *> Elements;
for (const auto &E : O)
Elements.push_back(&E);
llvm::sort(Elements,
[](const Object::value_type *L, const Object::value_type *R) {
return L->first < R->first... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rsi, %r14
movq %rdi, %rbx
xorps %xmm0, %xmm0
movups %xmm0, (%rdi)
movq $0x0, 0x10(%rdi)
movq %rsi, %rdi
callq 0x1d00ecc
movq %rax, (%rsp)
movq %rdx, 0x8(%rsp)
movl 0x10(%r14), %r12d
shlq $0x6, %r12
addq (%r14), %r12
cmpq %r12, %rax
je 0x1d01821
leaq 0x1... | /Support/JSON.cpp |
llvm::json::OStream::arrayBegin() | void llvm::json::OStream::arrayBegin() {
valueBegin();
Stack.emplace_back();
Stack.back().Ctx = Array;
Indent += IndentSize;
OS << '[';
} | pushq %rbx
movq %rdi, %rbx
callq 0x1d02a06
movq %rbx, %rdi
callq 0x1cb3e42
movq (%rbx), %rax
movl 0x8(%rbx), %ecx
movl $0x1, -0x8(%rax,%rcx,8)
movl 0xa8(%rbx), %eax
addl %eax, 0xac(%rbx)
movq 0xa0(%rbx), %rdi
movq 0x20(%rdi), %rax
cmpq 0x18(%rdi), %rax
jae 0x1d02e6f
leaq 0x1(%rax), %rcx
movq %rcx, 0x20(%rdi)
movb $0x5b... | /Support/JSON.cpp |
llvm::TargetMachine::~TargetMachine() | TargetMachine::~TargetMachine() = default; | pushq %rbx
movq %rdi, %rbx
leaq 0x3b202f1(%rip), %rax # 0x58265b0
addq $0x10, %rax
movq %rax, (%rdi)
addq $0x328, %rdi # imm = 0x328
callq 0x7c518e
cmpb $0x1, 0x320(%rbx)
jne 0x1d062ee
leaq 0x288(%rbx), %rdi
movb $0x0, 0x320(%rbx)
callq 0x1caf966
movq 0x278(%rbx), %rdi
testq %rdi, %rdi
je 0x1d06300
movq (%... | /Target/TargetMachine.cpp |
llvm::AArch64::parseArchExtension(llvm::StringRef) | std::optional<AArch64::ExtensionInfo>
AArch64::parseArchExtension(StringRef ArchExt) {
if (ArchExt.empty())
return {};
for (const auto &A : Extensions) {
if (ArchExt == A.UserVisibleName || ArchExt == A.Alias)
return A;
}
return {};
} | pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x10, %rsp
movq %rdi, %rbx
movq %rsi, (%rsp)
movq %rdx, 0x8(%rsp)
testq %rdx, %rdx
je 0x1d0942d
leaq 0x3b1e03e(%rip), %r14 # 0x5827400
addq $0x10, %r14
movl $0x3170, %r12d # imm = 0x3170
xorl %ebp, %ebp
movq %rsp, %r15
movq 0x8(%rsp), %rdx
cmpq -0x... | /TargetParser/AArch64TargetParser.cpp |
llvm::AArch64::ArchInfo::implies(llvm::AArch64::ArchInfo const&) const | bool implies(const ArchInfo &Other) const {
if (this->Profile != Other.Profile)
return false; // ARMV8R
if (this->Version.getMajor() == Other.Version.getMajor()) {
return this->Version > Other.Version;
}
if (this->Version.getMajor() == 9 && Other.Version.getMajor() == 8) {
assert(this-... | movl 0x10(%rdi), %ecx
cmpl 0x10(%rsi), %ecx
jne 0x1d0a2cb
movq %rdi, %rax
movq (%rdi), %rdx
movq (%rsi), %rcx
cmpl %ecx, %edx
jne 0x1d0a28a
movq %rsi, %rdi
movq %rax, %rsi
jmp 0x8e94b6
movl %edx, %eax
xorl $0x9, %eax
movl %ecx, %esi
xorl $0x8, %esi
orl %eax, %esi
jne 0x1d0a2cb
movq %rdx, %rax
shrq $0x20, %rax
movl $0x7... | /llvm/TargetParser/AArch64TargetParser.h |
llvm::ARM::parseArch(llvm::StringRef) | ARM::ArchKind ARM::parseArch(StringRef Arch) {
Arch = getCanonicalArchName(Arch);
StringRef Syn = getArchSynonym(Arch);
for (const auto &A : ARMArchNames) {
if (A.Name.ends_with(Syn))
return A.ID;
}
return ArchKind::INVALID;
} | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
callq 0x1d0f322
movq %rax, %rdi
movq %rdx, %rsi
callq 0x1d0ec31
movq %rax, (%rsp)
movq %rdx, %r14
movq %rdx, %r15
negq %r15
leaq -0x1(%rdx), %r12
xorl %r13d, %r13d
leaq 0x3b1aaa3(%rip), %rbx # 0x582a5b0
movq 0x8(%r13,%rbx), %rdi
cmpq %r14, %... | /TargetParser/ARMTargetParser.cpp |
getProfileKind(llvm::ARM::ArchKind) | static ARM::ProfileKind getProfileKind(ARM::ArchKind AK) {
switch (AK) {
case ARM::ArchKind::ARMV6M:
case ARM::ArchKind::ARMV7M:
case ARM::ArchKind::ARMV7EM:
case ARM::ArchKind::ARMV8MMainline:
case ARM::ArchKind::ARMV8MBaseline:
case ARM::ArchKind::ARMV8_1MMainline:
return ARM::ProfileKind::M;
case... | movslq %edi, %rax
leaq 0x31f5bbb(%rip), %rcx # 0x4f05760
movl (%rcx,%rax,4), %eax
retq
| /TargetParser/ARMTargetParser.cpp |
llvm::StringSwitch<llvm::Triple::ArchType, llvm::Triple::ArchType>::StartsWith(llvm::StringLiteral, llvm::Triple::ArchType) | StringSwitch& StartsWith(StringLiteral S, T Value) {
if (!Result && Str.starts_with(S)) {
Result = std::move(Value);
}
return *this;
} | pushq %rbp
pushq %rbx
pushq %rax
movq %rdi, %rbx
cmpb $0x0, 0x14(%rdi)
jne 0x1d22b78
cmpq %rdx, 0x8(%rbx)
jb 0x1d22b78
movl %ecx, %ebp
testq %rdx, %rdx
je 0x1d22b6d
movq (%rbx), %rdi
callq 0x751d10
testl %eax, %eax
jne 0x1d22b78
movl %ebp, %eax
btsq $0x20, %rax
movq %rax, 0x10(%rbx)
movq %rbx, %rax
addq $0x8, %rsp
popq... | /llvm/ADT/StringSwitch.h |
llvm::DenseMap<llvm::VersionTuple, llvm::Triple::SubArchType, llvm::DenseMapInfo<llvm::VersionTuple, void>, llvm::detail::DenseMapPair<llvm::VersionTuple, llvm::Triple::SubArchType>>::init(unsigned int) | void init(unsigned InitNumEntries) {
auto InitBuckets = BaseT::getMinBucketToReserveForEntries(InitNumEntries);
if (allocateBuckets(InitBuckets)) {
this->BaseT::initEmpty();
} else {
NumEntries = 0;
NumTombstones = 0;
}
} | pushq %rbp
pushq %rbx
pushq %rax
movq %rdi, %rbx
testl %esi, %esi
je 0x1d2806e
shll $0x2, %esi
movl $0xaaaaaaab, %eax # imm = 0xAAAAAAAB
imulq %rsi, %rax
shrq $0x21, %rax
incl %eax
movl %eax, %ecx
shrl %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x2, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x4, %ecx
orl %eax, %ec... | /llvm/ADT/DenseMap.h |
llvm::AMDGPU::Hwreg::getHwreg(unsigned long, llvm::MCSubtargetInfo const&) | StringRef getHwreg(uint64_t Encoding, const MCSubtargetInfo &STI) {
return getNameFromOperandTable(Operands, Encoding, STI);
} | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x3b23083(%rip), %r13 # 0x584dde0
cmpl $0x31, %r14d
ja 0x1d2ad92
movl %r14d, %eax
shlq $0x5, %rax
cmpl %r14d, 0x10(%rax,%r13)
jne 0x1d2ad92
leaq (%rax,%r13), %r12
movq 0x8(%r12), %r15
testq %r15, %r15
je ... | /Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp |
llvm::AMDGPU::IsaInfo::getAddressableNumSGPRs(llvm::MCSubtargetInfo const*) | unsigned getAddressableNumSGPRs(const MCSubtargetInfo *STI) {
if (STI->getFeatureBits().test(FeatureSGPRInitBug))
return FIXED_NUM_SGPRS_FOR_INIT_BUG;
IsaVersion Version = getIsaVersion(STI->getCPU());
if (Version.Major >= 10)
return 106;
if (Version.Major >= 8)
return 102;
return 104;
} | movl $0x60, %eax
testb $0x4, 0xea(%rdi)
jne 0x1d2e3e6
pushq %rax
movq 0x40(%rdi), %rax
movq 0x48(%rdi), %rsi
movq %rax, %rdi
callq 0x1d1fe83
xorl %ecx, %ecx
cmpl $0x8, %eax
setb %cl
cmpl $0xa, %eax
leal 0x66(%rcx,%rcx), %ecx
movl $0x6a, %eax
cmovbl %ecx, %eax
addq $0x8, %rsp
retq
| /Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp |
llvm::AMDGPU::getRegBitWidth(unsigned int) | unsigned getRegBitWidth(unsigned RCID) {
switch (RCID) {
case AMDGPU::SGPR_LO16RegClassID:
case AMDGPU::AGPR_LO16RegClassID:
return 16;
case AMDGPU::SGPR_32RegClassID:
case AMDGPU::VGPR_32RegClassID:
case AMDGPU::VRegOrLds_32RegClassID:
case AMDGPU::AGPR_32RegClassID:
case AMDGPU::VS_32RegClassID:
... | cmpl $0xb6, %edi
jle 0x1d309c0
cmpl $0x149, %edi # imm = 0x149
jle 0x1d309de
cmpl $0x1ca, %edi # imm = 0x1CA
jg 0x1d30a47
leal -0x18b(%rdi), %eax
cmpl $0x37, %eax
ja 0x1d30aeb
movabsq $0x240000140f, %rcx # imm = 0x240000140F
btq %rax, %rcx
jae 0x1d30ad5
movl $0x180, %eax # imm = 0x1... | /Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp |
void llvm::SmallVectorImpl<llvm::Function*>::append<llvm::Function* const*, void>(llvm::Function* const*, llvm::Function* const*) | void append(ItTy in_start, ItTy in_end) {
this->assertSafeToAddRange(in_start, in_end);
size_type NumInputs = std::distance(in_start, in_end);
this->reserve(this->size() + NumInputs);
this->uninitialized_copy(in_start, in_end, this->end());
this->set_size(this->size() + NumInputs);
} | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movq %rdx, %r12
movq %rsi, %r14
movq %rdi, %rbx
movq %rdx, %r15
subq %rsi, %r15
movq %r15, %r13
sarq $0x3, %r13
movl 0x8(%rdi), %edx
movl 0xc(%rdi), %eax
addq %r13, %rdx
cmpq %rax, %rdx
jbe 0x1d33236
leaq 0x10(%rbx), %rsi
movl $0x8, %ecx
movq %rbx, %rdi
callq 0x1cb... | /llvm/ADT/SmallVector.h |
llvm::AMDGPUPALMetadata::setScratchSize(unsigned int, llvm::MCExpr const*, llvm::MCContext&) | void AMDGPUPALMetadata::setScratchSize(unsigned CC, const MCExpr *Val,
MCContext &Ctx) {
if (isLegacy()) {
// Old non-msgpack format.
setRegister(getScratchSizeKey(CC), Val, Ctx);
return;
}
// Msgpack format.
setHwStage(CC, ".scratch_memory_size", msgpack::Type... | movq %rdx, %r9
cmpl $0xc, (%rdi)
jne 0x1d339c3
addl $-0x57, %esi
movl $0x1000004a, %eax # imm = 0x1000004A
cmpl $0x9, %esi
ja 0x1d339b9
movl %esi, %eax
leaq 0x32ab5e6(%rip), %rdx # 0x4fdef9c
movl (%rdx,%rax,4), %eax
movl %eax, %esi
movq %r9, %rdx
jmp 0x1d33552
leaq 0x32a93d7(%rip), %rdx # 0x4fdcda1
movl $0x14... | /Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp |
createIndexMap(llvm::ArrayRef<llvm::StringLiteral>, llvm::ArrayRef<llvm::StringLiteral>) | static StringMap<int> createIndexMap(ArrayRef<StringLiteral> names,
ArrayRef<StringLiteral> altNames) {
StringMap<int> map;
assert(names.size() == altNames.size());
for (unsigned i = 0; i < names.size(); ++i) {
map.insert(std::pair(names[i], i));
map.insert(std::pair(a... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
movq %rdx, 0x20(%rsp)
xorps %xmm0, %xmm0
movups %xmm0, 0x3bad4ad(%rip) # 0x58e3468
movabsq $0x1000000000, %rax # imm = 0x1000000000
movq %rax, 0x3bad4ac(%rip) # 0x58e3478
testq %rsi, %rsi
je 0x1d3607b
movq %rsi, %rbp
movl $0x1, %e... | /Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp |
void PrintField::printField<llvm::MCExpr const*, &llvm::AMDGPU::AMDGPUMCKernelCodeT::workitem_private_segment_byte_size, (llvm::MCExpr const**)0>(llvm::StringRef, llvm::AMDGPU::AMDGPUMCKernelCodeT const&, llvm::raw_ostream&, llvm::MCContext&) | static void printField(StringRef Name, const AMDGPUMCKernelCodeT &C,
raw_ostream &OS, MCContext &Ctx) {
OS << Name << " = ";
const MCExpr *Value = C.*ptr;
int64_t Val;
if (Value->evaluateAsAbsolute(Val))
OS << Val;
else
Value->print(OS, Ctx.getAsmInfo());
} | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %r8, %r14
movq %rcx, %rbx
movq %rdx, %r15
movq %rsi, %rdx
movq %rdi, %rsi
movq %rcx, %rdi
callq 0x7c4562
leaq 0x2987796(%rip), %rsi # 0x46c108d
movl $0x3, %edx
movq %rax, %rdi
callq 0x7c4562
movq 0x128(%r15), %r15
leaq 0x8(%rsp), %rsi
movq %r15, %rdi
callq 0x1af1... | /Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp |
llvm::PerTargetMIParsingState::getRegBank(llvm::StringRef) | const RegisterBank *PerTargetMIParsingState::getRegBank(StringRef Name) {
auto RegBankInfo = Names2RegBanks.find(Name);
if (RegBankInfo == Names2RegBanks.end())
return nullptr;
return RegBankInfo->getValue();
} | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %r15
movq %rsi, %r12
movq %rdi, %r14
leaq 0xe0(%rdi), %rbx
movq %rsi, %rdi
movq %rdx, %rsi
callq 0x1cc23d8
movq %rbx, %rdi
movq %r12, %rsi
movq %r15, %rdx
movl %eax, %ecx
callq 0x1cc2626
movl %eax, %ecx
xorl %eax, %eax
cmpl $-0x1, %ecx
je 0x1d3add2
movl ... | /CodeGen/MIRParser/MIParser.cpp |
std::pair<llvm::DenseMapIterator<unsigned int, llvm::Value const*, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, llvm::Value const*>, false>, bool> llvm::DenseMapBase<llvm::DenseMap<unsigned int, llvm::Value const*, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<un... | std::pair<iterator, bool> try_emplace(KeyT &&Key, Ts &&... Args) {
BucketT *TheBucket;
if (LookupBucketFor(Key, TheBucket))
return std::make_pair(makeIterator(TheBucket,
shouldReverseIterate<KeyT>()
? getBuckets()
... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x10, %rsp
movq %rcx, %r15
movq %rdx, %r12
movq %rsi, %r14
movq %rdi, %rbx
leaq 0x8(%rsp), %r13
movq %rsi, %rdi
movq %rdx, %rsi
movq %r13, %rdx
callq 0x1d3df58
movl %eax, %ecx
movq (%r13), %rax
testb %cl, %cl
je 0x1d3df12
xorl %ecx, %ecx
jmp 0x1d3df32
movq %r... | /llvm/ADT/DenseMap.h |
llvm::detail::DenseMapPair<unsigned int, llvm::Value const*>* llvm::DenseMapBase<llvm::DenseMap<unsigned int, llvm::Value const*, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, llvm::Value const*>>, unsigned int, llvm::Value const*, llvm::DenseMapInfo<unsigned int, void>, llvm::detail:... | BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup,
BucketT *TheBucket) {
incrementEpoch();
// If the load of the hash table is more than 3/4, or if fewer than 1/8 of
// the buckets are empty (meaning that many are filled with tombstones),
// grow th... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rcx, %rax
movq %rdx, %r14
movq %rdi, %rbx
movl 0x8(%rdi), %ecx
movl 0x10(%rdi), %esi
leal 0x4(,%rcx,4), %edx
leal (%rsi,%rsi,2), %edi
cmpl %edi, %edx
jae 0x1d3e027
notl %ecx
addl %esi, %ecx
subl 0xc(%rbx), %ecx
movl %esi, %edx
shrl $0x3, %edx
cmpl %edx, %ecx
jbe 0... | /llvm/ADT/DenseMap.h |
initSlots2BasicBlocks(llvm::Function const&, llvm::DenseMap<unsigned int, llvm::BasicBlock const*, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, llvm::BasicBlock const*>>&) | static void initSlots2BasicBlocks(
const Function &F,
DenseMap<unsigned, const BasicBlock *> &Slots2BasicBlocks) {
ModuleSlotTracker MST(F.getParent(), /*ShouldInitializeAllMetadata=*/false);
MST.incorporateFunction(F);
for (const auto &BB : F) {
if (BB.hasName())
continue;
int Slot = MST.ge... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x98, %rsp
movq %rsi, %rbx
movq %rdi, %r14
movq 0x28(%rdi), %rsi
leaq 0x28(%rsp), %r15
movq %r15, %rdi
xorl %edx, %edx
callq 0x197d2b2
movq %r15, %rdi
movq %r14, %rsi
callq 0x197d496
movq 0x50(%r14), %r13
addq $0x48, %r14
cmpq %r14, %r13
je 0x1d3ee... | /CodeGen/MIRParser/MIParser.cpp |
(anonymous namespace)::MIParser::parseCFIAddressSpace(unsigned int&) | bool MIParser::parseCFIAddressSpace(unsigned &AddressSpace) {
if (Token.isNot(MIToken::IntegerLiteral))
return error("expected a cfi address space literal");
if (Token.integerValue().isSigned())
return error("expected an unsigned integer (cfi address space)");
AddressSpace = Token.integerValue().getZExtVa... | pushq %rbx
subq $0x30, %rsp
movq %rdi, %rbx
cmpl $0x81, 0x40(%rdi)
jne 0x1d463a8
cmpb $0x0, 0x94(%rbx)
je 0x1d463b1
leaq 0x40(%rbx), %rdx
cmpl $0x41, 0x90(%rbx)
jb 0x1d463d6
movq 0x88(%rbx), %rax
jmp 0x1d463dd
leaq 0x329a874(%rip), %rax # 0x4fe0c23
jmp 0x1d463b8
leaq 0x329a890(%rip), %rax # 0x4fe0c48
leaq 0x8(%rsp)... | /CodeGen/MIRParser/MIParser.cpp |
std::pair<llvm::StringMapIterator<llvm::Register>, bool> llvm::StringMap<llvm::Register, llvm::MallocAllocator>::try_emplace_with_hash<llvm::Register>(llvm::StringRef, unsigned int, llvm::Register&&) | std::pair<iterator, bool> try_emplace_with_hash(StringRef Key,
uint32_t FullHashValue,
ArgsTy &&...Args) {
unsigned BucketNo = LookupBucketFor(Key, FullHashValue);
StringMapEntryBase *&Bucket = TheTable[BucketNo]... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %r8, %r15
movq %rdx, %r12
movq %rsi, %r13
movq %rdi, %r14
callq 0x1cc24fa
movl %eax, %ebp
movq (%r14), %rax
movl %ebp, %ecx
leaq (%rax,%rcx,8), %rbx
movq (%rbx), %rax
cmpq $-0x8, %rax
je 0x1d470f1
testq %rax, %rax
je 0x1d470f5
jmp 0x1d470... | /llvm/ADT/StringMap.h |
maybeLexIRBlock((anonymous namespace)::Cursor, llvm::MIToken&, llvm::function_ref<void (char const*, llvm::Twine const&)>) | StringRef remaining() const { return StringRef(Ptr, End - Ptr); } | movq %rsi, %rax
subq %rdi, %rax
cmpq $0xa, %rax
jb 0x1d4964d
movabsq $0x636f6c622d726925, %r9 # imm = 0x636F6C622D726925
xorq (%rdi), %r9
movzwl 0x8(%rdi), %r10d
xorq $0x2e6b, %r10 # imm = 0x2E6B
orq %r9, %r10
je 0x1d49652
xorl %edx, %edx
xorl %eax, %eax
retq
subq $0x28, %rsp
cmpq $0xb, %rax
jl 0x1d49682
movs... | /CodeGen/MIRParser/MILexer.cpp |
computeNumSignBitsFromRangeMetadata(llvm::GAnyLoad const*, unsigned int) | static unsigned computeNumSignBitsFromRangeMetadata(const GAnyLoad *Ld,
unsigned TyBits) {
const MDNode *Ranges = Ld->getRanges();
if (!Ranges)
return 1;
ConstantRange CR = getConstantRangeFromMetadata(*Ranges);
if (TyBits > CR.getBitWidth()) {
switch... | pushq %r15
pushq %r14
pushq %rbx
subq $0x50, %rsp
movl %esi, %ebx
movq %rdi, %r14
movq 0x30(%rdi), %rax
testb $0x7, %al
je 0x1d4f5d0
andq $-0x8, %rax
addq $0x10, %rax
movq %rax, %rcx
jmp 0x1d4f5d7
leaq 0x30(%r14), %rcx
movq %rax, (%rcx)
movq (%rcx), %rax
movq 0x48(%rax), %rsi
testq %rsi, %rsi
je 0x1d4f61f
movq %rsp, %r... | /CodeGen/GlobalISel/GISelKnownBits.cpp |
addFlagsUsingAttrFn(llvm::ISD::ArgFlagsTy&, std::function<bool (llvm::Attribute::AttrKind)> const&) | static void
addFlagsUsingAttrFn(ISD::ArgFlagsTy &Flags,
const std::function<bool(Attribute::AttrKind)> &AttrFn) {
// TODO: There are missing flags. Add them here.
if (AttrFn(Attribute::SExt))
Flags.setSExt();
if (AttrFn(Attribute::ZExt))
Flags.setZExt();
if (AttrFn(Attribute::InReg))... | pushq %r14
pushq %rbx
pushq %rax
movl $0x34, 0x4(%rsp)
cmpq $0x0, 0x10(%rsi)
je 0x1d519f1
movq %rsi, %r14
movq %rdi, %rbx
leaq 0x4(%rsp), %rsi
movq %r14, %rdi
callq *0x18(%r14)
testb %al, %al
je 0x1d51828
orb $0x2, (%rbx)
movl $0x4a, 0x4(%rsp)
cmpq $0x0, 0x10(%r14)
je 0x1d519f1
leaq 0x4(%rsp), %rsi
movq %r14, %rdi
call... | /CodeGen/GlobalISel/CallLowering.cpp |
llvm::CombinerHelper::replaceRegOpWith(llvm::MachineRegisterInfo&, llvm::MachineOperand&, llvm::Register) const | void CombinerHelper::replaceRegOpWith(MachineRegisterInfo &MRI,
MachineOperand &FromRegOp,
Register ToReg) const {
assert(FromRegOp.getParent() && "Expected an operand in an MI");
Observer.changingInstr(*FromRegOp.getParent());
FromRegOp... | pushq %r15
pushq %r14
pushq %rbx
movl %ecx, %ebx
movq %rdx, %r14
movq %rdi, %r15
movq 0x10(%rdi), %rdi
movq 0x8(%rdx), %rsi
movq (%rdi), %rax
callq *0x20(%rax)
movq %r14, %rdi
movl %ebx, %esi
callq 0x17a95ca
movq 0x10(%r15), %rdi
movq 0x8(%r14), %rsi
movq (%rdi), %rax
movq 0x28(%rax), %rax
popq %rbx
popq %r14
popq %r15... | /CodeGen/GlobalISel/CombinerHelper.cpp |
llvm::CombinerHelper::applyCombineShuffleConcat(llvm::MachineInstr&, llvm::SmallVector<llvm::Register, 12u>&) | void CombinerHelper::applyCombineShuffleConcat(MachineInstr &MI,
SmallVector<Register> &Ops) {
LLT SrcTy = MRI.getType(Ops[0]);
Register UndefReg = 0;
for (Register &Reg : Ops) {
if (Reg == 0) {
if (UndefReg == 0)
UndefReg = Builder.buildUndef(SrcT... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x38, %rsp
movq %rdx, %r14
movq %rdi, %r15
movq (%rdx), %r13
movl (%r13), %eax
testl %eax, %eax
movq %rsi, 0x8(%rsp)
jns 0x1d5917e
movq 0x8(%r15), %rcx
andl $0x7fffffff, %eax # imm = 0x7FFFFFFF
cmpl %eax, 0x1d0(%rcx)
jbe 0x1d5917e
movq 0x1c8(... | /CodeGen/GlobalISel/CombinerHelper.cpp |
llvm::CombinerHelper::matchSextTruncSextLoad(llvm::MachineInstr&) | bool CombinerHelper::matchSextTruncSextLoad(MachineInstr &MI) {
assert(MI.getOpcode() == TargetOpcode::G_SEXT_INREG);
Register SrcReg = MI.getOperand(1).getReg();
Register LoadUser = SrcReg;
if (MRI.getType(SrcReg).isVector())
return false;
Register TruncSrc;
if (mi_match(SrcReg, MRI, m_GTrunc(m_Reg(T... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x38, %rsp
movq %rsi, %r14
movq %rdi, %rbx
movq 0x20(%rsi), %rax
movl 0x24(%rax), %r15d
movq 0x8(%rdi), %rsi
testl %r15d, %r15d
jns 0x1d5a5df
movl %r15d, %eax
andl $0x7fffffff, %eax # imm = 0x7FFFFFFF
cmpl %eax, 0x1d0(%rsi)
jbe 0x1d5a5df
movq 0x1c8(%rsi), %rcx
mov... | /CodeGen/GlobalISel/CombinerHelper.cpp |
llvm::CombinerHelper::tryCombineMemCpyFamily(llvm::MachineInstr&, unsigned int) | bool CombinerHelper::tryCombineMemCpyFamily(MachineInstr &MI, unsigned MaxLen) {
MachineIRBuilder HelperBuilder(MI);
GISelObserverWrapper DummyObserver;
LegalizerHelper Helper(HelperBuilder.getMF(), DummyObserver, HelperBuilder);
return Helper.lowerMemCpyFamily(MI, MaxLen) ==
LegalizerHelper::LegalizeR... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x118, %rsp # imm = 0x118
movl %edx, 0xc(%rsp)
movq %rsi, %r14
leaq 0x90(%rsp), %r15
movq %r15, %rdi
callq 0x91ed10
leaq 0x18(%rsp), %rdx
leaq 0x40(%rsp), %rax
movq %rax, -0x20(%rax)
movq %rax, -0x18(%rax)
movq $0x4, -0x10(%rax)
movl $0x... | /CodeGen/GlobalISel/CombinerHelper.cpp |
llvm::CombinerHelper::applyCombineShlOfExtend(llvm::MachineInstr&, llvm::RegisterImmPair const&) | void CombinerHelper::applyCombineShlOfExtend(MachineInstr &MI,
const RegisterImmPair &MatchData) {
Register ExtSrcReg = MatchData.Reg;
int64_t ShiftAmtVal = MatchData.Imm;
LLT ExtSrcTy = MRI.getType(ExtSrcReg);
auto ShiftAmt = Builder.buildConstant(ExtSrcTy, ShiftAm... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x48, %rsp
movq %rsi, %rbx
movq %rdi, %r14
movl (%rdx), %r13d
movq 0x8(%rdx), %rdx
xorl %esi, %esi
testl %r13d, %r13d
jns 0x1d5d9ac
movq 0x8(%r14), %rax
movl %r13d, %ecx
andl $0x7fffffff, %ecx # imm = 0x7FFFFFFF
cmpl %ecx, 0x1d0(%rax)
jbe 0x1... | /CodeGen/GlobalISel/CombinerHelper.cpp |
llvm::CombinerHelper::matchCombineInsertVecElts(llvm::MachineInstr&, llvm::SmallVectorImpl<llvm::Register>&) | bool CombinerHelper::matchCombineInsertVecElts(
MachineInstr &MI, SmallVectorImpl<Register> &MatchInfo) {
assert(MI.getOpcode() == TargetOpcode::G_INSERT_VECTOR_ELT &&
"Invalid opcode");
Register DstReg = MI.getOperand(0).getReg();
LLT DstTy = MRI.getType(DstReg);
assert(DstTy.isVector() && "Invali... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x38, %rsp
movq %rdx, 0x8(%rsp)
movq %rsi, %r15
movq %rdi, %r14
movq 0x20(%rsi), %rax
movl 0x4(%rax), %r12d
testl %r12d, %r12d
jns 0x1d60814
movq 0x8(%r14), %rax
movl %r12d, %ecx
andl $0x7fffffff, %ecx # imm = 0x7FFFFFFF
cmpl %ecx, 0x1d0(%rax... | /CodeGen/GlobalISel/CombinerHelper.cpp |
llvm::SetVector<llvm::MachineInstr const*, llvm::SmallVector<llvm::MachineInstr const*, 8u>, llvm::DenseSet<llvm::MachineInstr const*, llvm::DenseMapInfo<llvm::MachineInstr const*, void>>, 8u>::count(llvm::MachineInstr const* const&) const | size_type count(const key_type &key) const {
if constexpr (canBeSmall())
if (isSmall())
return is_contained(vector_, key);
return set_.count(key);
} | pushq %rbx
subq $0x10, %rsp
movq %rsi, %rdx
movq %rdi, %rbx
cmpl $0x0, 0x8(%rdi)
je 0x1d630c9
movq (%rdx), %rax
leaq 0x8(%rsp), %rsi
movq %rax, (%rsi)
movq %rsp, %rdx
movq %rbx, %rdi
callq 0xb09e1e
jmp 0x1d630ea
movq 0x18(%rbx), %rdi
movl 0x20(%rbx), %eax
leaq (%rdi,%rax,8), %rsi
callq 0x1d72ab8
movl 0x20(%rbx), %ecx
s... | /llvm/ADT/SetVector.h |
bool llvm::DenseMapBase<llvm::DenseMap<llvm::MachineBasicBlock*, llvm::MachineInstr*, llvm::DenseMapInfo<llvm::MachineBasicBlock*, void>, llvm::detail::DenseMapPair<llvm::MachineBasicBlock*, llvm::MachineInstr*>>, llvm::MachineBasicBlock*, llvm::MachineInstr*, llvm::DenseMapInfo<llvm::MachineBasicBlock*, void>, llvm::d... | unsigned getNumBuckets() const {
return NumBuckets;
} | movl 0x10(%rdi), %ecx
testl %ecx, %ecx
je 0x1d712ad
pushq %rbx
movq (%rdi), %rdi
movl (%rsi), %r8d
movl %r8d, %eax
shrl $0x4, %eax
shrl $0x9, %r8d
xorl %eax, %r8d
decl %ecx
andl %ecx, %r8d
movl $0x1, %r10d
xorl %r9d, %r9d
movl %r8d, %ebx
shlq $0x4, %rbx
leaq (%rdi,%rbx), %r11
movq (%rdi,%rbx), %rbx
cmpq %rbx, (%rsi)
jn... | /llvm/ADT/DenseMap.h |
bool llvm::MIPatternMatch::UnaryOp_match<llvm::MIPatternMatch::bind_ty<llvm::Register>, 125u>::match<llvm::Register&>(llvm::MachineRegisterInfo const&, llvm::Register&) | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 2) {
return L.match(MRI, TmpMI->getOperand(1).getReg());
}
}
return false;
} | pushq %rbx
movq %rsi, %rax
movq %rdi, %rbx
movl (%rdx), %esi
movq %rax, %rdi
callq 0x17dae6c
testq %rax, %rax
je 0x1d71d03
cmpw $0x7d, 0x44(%rax)
jne 0x1d71d03
movzwl 0x28(%rax), %ecx
movzbl 0x2a(%rax), %edx
shll $0x10, %edx
orl %ecx, %edx
cmpl $0x2, %edx
jne 0x1d71d03
movq 0x20(%rax), %rax
movl 0x24(%rax), %eax
movq (... | /llvm/CodeGen/GlobalISel/MIPatternMatch.h |
bool llvm::MIPatternMatch::UnaryOp_match<llvm::MIPatternMatch::And<llvm::MIPatternMatch::bind_ty<llvm::Register>, llvm::MIPatternMatch::CheckType>, 126u>::match<llvm::Register&>(llvm::MachineRegisterInfo const&, llvm::Register&) | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 2) {
return L.match(MRI, TmpMI->getOperand(1).getReg());
}
}
return false;
} | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %r14
movq %rdi, %rbx
movl (%rdx), %esi
movq %r14, %rdi
callq 0x17dae6c
testq %rax, %rax
je 0x1d71fe6
cmpw $0x7e, 0x44(%rax)
jne 0x1d71fe6
movzwl 0x28(%rax), %ecx
movzbl 0x2a(%rax), %edx
shll $0x10, %edx
orl %ecx, %edx
cmpl $0x2, %edx
jne 0x1d71fe6
movq 0x20(%rax), %rax
movl 0... | /llvm/CodeGen/GlobalISel/MIPatternMatch.h |
bool llvm::MIPatternMatch::BinaryOp_match<llvm::MIPatternMatch::bind_ty<llvm::Register>, llvm::MIPatternMatch::ICstOrSplatMatch<long>, 134u, false>::match<llvm::Register>(llvm::MachineRegisterInfo const&, llvm::Register&&) | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 3) {
return (L.match(MRI, TmpMI->getOperand(1).getReg()) &&
R.match(MRI, TmpMI->getOperand(2).getReg... | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
movl (%rdx), %esi
movq %rbx, %rdi
callq 0x17dae6c
testq %rax, %rax
je 0x1d7240a
cmpw $0x86, 0x44(%rax)
jne 0x1d7240a
movzwl 0x28(%rax), %ecx
movzbl 0x2a(%rax), %edx
shll $0x10, %edx
orl %ecx, %edx
cmpl $0x3, %edx
jne 0x1d7240a
movq 0x20(%rax), %rax
movl 0... | /llvm/CodeGen/GlobalISel/MIPatternMatch.h |
bool llvm::MIPatternMatch::BinaryOp_match<llvm::MIPatternMatch::bind_ty<llvm::Register>, llvm::MIPatternMatch::bind_ty<llvm::Register>, 62u, true>::match<llvm::Register&>(llvm::MachineRegisterInfo const&, llvm::Register&) | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 3) {
return (L.match(MRI, TmpMI->getOperand(1).getReg()) &&
R.match(MRI, TmpMI->getOperand(2).getReg... | pushq %rbx
movq %rsi, %rax
movq %rdi, %rbx
movl (%rdx), %esi
movq %rax, %rdi
callq 0x17dae6c
testq %rax, %rax
je 0x1d72730
cmpw $0x3e, 0x44(%rax)
jne 0x1d72730
movzwl 0x28(%rax), %ecx
movzbl 0x2a(%rax), %edx
shll $0x10, %edx
orl %ecx, %edx
cmpl $0x3, %edx
jne 0x1d72730
movq 0x20(%rax), %rax
movl 0x24(%rax), %ecx
movq (... | /llvm/CodeGen/GlobalISel/MIPatternMatch.h |
llvm::DenseMapBase<llvm::SmallDenseMap<llvm::MachineInstr*, llvm::MachineInstr*, 8u, llvm::DenseMapInfo<llvm::MachineInstr*, void>, llvm::detail::DenseMapPair<llvm::MachineInstr*, llvm::MachineInstr*>>, llvm::MachineInstr*, llvm::MachineInstr*, llvm::DenseMapInfo<llvm::MachineInstr*, void>, llvm::detail::DenseMapPair<l... | void moveFromOldBuckets(BucketT *OldBucketsBegin, BucketT *OldBucketsEnd) {
initEmpty();
// Insert all the old elements.
const KeyT EmptyKey = getEmptyKey();
const KeyT TombstoneKey = getTombstoneKey();
for (BucketT *B = OldBucketsBegin, *E = OldBucketsEnd; B != E; ++B) {
if (!KeyInfoT::isEqu... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x10, %rsp
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
leaq 0x8(%rdi), %rax
andl $0x1, (%rdi)
movl $0x0, 0x4(%rdi)
cmoveq 0x8(%rdi), %rax
movl $0x8, %ecx
cmovel 0x10(%rdi), %ecx
testl %ecx, %ecx
je 0x1d73228
movl %ecx, %ecx
movabsq $0xfffffffffffffff, %rd... | /llvm/ADT/DenseMap.h |
bool llvm::MIPatternMatch::BinaryOp_match<llvm::MIPatternMatch::bind_ty<llvm::Register>, llvm::MIPatternMatch::bind_ty<llvm::Register>, 135u, false>::match<llvm::Register>(llvm::MachineRegisterInfo const&, llvm::Register&&) | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 3) {
return (L.match(MRI, TmpMI->getOperand(1).getReg()) &&
R.match(MRI, TmpMI->getOperand(2).getReg... | pushq %rbx
movq %rsi, %rax
movq %rdi, %rbx
movl (%rdx), %esi
movq %rax, %rdi
callq 0x17dae6c
testq %rax, %rax
je 0x1d73473
cmpw $0x87, 0x44(%rax)
jne 0x1d73473
movzwl 0x28(%rax), %ecx
movzbl 0x2a(%rax), %edx
shll $0x10, %edx
orl %ecx, %edx
cmpl $0x3, %edx
jne 0x1d73473
movq 0x20(%rax), %rax
movl 0x24(%rax), %ecx
movq (... | /llvm/CodeGen/GlobalISel/MIPatternMatch.h |
bool llvm::MIPatternMatch::BinaryOp_match<llvm::MIPatternMatch::bind_ty<llvm::Register>, llvm::MIPatternMatch::GCstAndRegMatch, 212u, false>::match<llvm::Register&>(llvm::MachineRegisterInfo const&, llvm::Register&) | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 3) {
return (L.match(MRI, TmpMI->getOperand(1).getReg()) &&
R.match(MRI, TmpMI->getOperand(2).getReg... | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
movl (%rdx), %esi
movq %rbx, %rdi
callq 0x17dae6c
testq %rax, %rax
je 0x1d742c2
cmpw $0xd4, 0x44(%rax)
jne 0x1d742c2
movzwl 0x28(%rax), %ecx
movzbl 0x2a(%rax), %edx
shll $0x10, %edx
orl %ecx, %edx
cmpl $0x3, %edx
jne 0x1d742c2
movq 0x20(%rax), %rax
movl 0... | /llvm/CodeGen/GlobalISel/MIPatternMatch.h |
bool llvm::MIPatternMatch::UnaryOp_match<llvm::MIPatternMatch::bind_ty<llvm::MachineInstr*>, 189u>::match<llvm::Register>(llvm::MachineRegisterInfo const&, llvm::Register&&) | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 2) {
return L.match(MRI, TmpMI->getOperand(1).getReg());
}
}
return false;
} | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
movl (%rdx), %esi
movq %rbx, %rdi
callq 0x17dae6c
testq %rax, %rax
je 0x1d77318
cmpw $0xbd, 0x44(%rax)
jne 0x1d77318
movzwl 0x28(%rax), %ecx
movzbl 0x2a(%rax), %edx
shll $0x10, %edx
orl %ecx, %edx
cmpl $0x2, %edx
jne 0x1d77318
movq 0x20(%rax), %rax
movl 0... | /llvm/CodeGen/GlobalISel/MIPatternMatch.h |
bool llvm::MIPatternMatch::BinaryOp_match<llvm::MIPatternMatch::UnaryOp_match<llvm::MIPatternMatch::UnaryOp_match<llvm::MIPatternMatch::bind_ty<llvm::Register>, 78u>, 126u>, llvm::MIPatternMatch::ImplicitDefMatch, 73u, false>::match<llvm::MachineInstr*>(llvm::MachineRegisterInfo const&, llvm::MachineInstr*&&) | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 3) {
return (L.match(MRI, TmpMI->getOperand(1).getReg()) &&
R.match(MRI, TmpMI->getOperand(2).getReg... | pushq %r14
pushq %rbx
pushq %rax
movq (%rdx), %r14
testq %r14, %r14
je 0x1d777e4
cmpw $0x49, 0x44(%r14)
jne 0x1d777e4
movzwl 0x28(%r14), %eax
movzbl 0x2a(%r14), %ecx
shll $0x10, %ecx
orl %eax, %ecx
cmpl $0x3, %ecx
jne 0x1d777e4
movq %rsi, %rbx
movq 0x20(%r14), %rax
movl 0x24(%rax), %eax
leaq 0x4(%rsp), %rdx
movl %eax, ... | /llvm/CodeGen/GlobalISel/MIPatternMatch.h |
bool llvm::MIPatternMatch::UnaryOp_match<llvm::MIPatternMatch::UnaryOp_match<llvm::MIPatternMatch::bind_ty<llvm::Register>, 78u>, 126u>::match<llvm::Register>(llvm::MachineRegisterInfo const&, llvm::Register&&) | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 2) {
return L.match(MRI, TmpMI->getOperand(1).getReg());
}
}
return false;
} | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
movl (%rdx), %esi
movq %rbx, %rdi
callq 0x17dae6c
testq %rax, %rax
je 0x1d7783b
cmpw $0x7e, 0x44(%rax)
jne 0x1d7783b
movzwl 0x28(%rax), %ecx
movzbl 0x2a(%rax), %edx
shll $0x10, %edx
orl %ecx, %edx
cmpl $0x2, %edx
jne 0x1d7783b
movq 0x20(%rax), %rax
movl 0... | /llvm/CodeGen/GlobalISel/MIPatternMatch.h |
bool llvm::MIPatternMatch::BinaryOp_match<llvm::MIPatternMatch::UnaryOp_match<llvm::MIPatternMatch::bind_ty<llvm::Register>, 78u>, llvm::MIPatternMatch::GCstAndRegMatch, 135u, false>::match<llvm::Register>(llvm::MachineRegisterInfo const&, llvm::Register&&) | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 3) {
return (L.match(MRI, TmpMI->getOperand(1).getReg()) &&
R.match(MRI, TmpMI->getOperand(2).getReg... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %rbx
movq %rdi, %r14
movl (%rdx), %esi
movq %rbx, %rdi
callq 0x17dae6c
testq %rax, %rax
je 0x1d779b4
movq %rax, %r15
cmpw $0x87, 0x44(%rax)
jne 0x1d779b4
movzwl 0x28(%r15), %eax
movzbl 0x2a(%r15), %ecx
shll $0x10, %ecx
orl %eax, %ecx
cmpl $0x3, %ecx
jne 0x1d7... | /llvm/CodeGen/GlobalISel/MIPatternMatch.h |
bool llvm::MIPatternMatch::UnaryOp_match<llvm::MIPatternMatch::BinaryOp_match<llvm::MIPatternMatch::operand_type_match, llvm::MIPatternMatch::bind_ty<llvm::Register>, 73u, false>, 78u>::match<llvm::Register>(llvm::MachineRegisterInfo const&, llvm::Register&&) | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 2) {
return L.match(MRI, TmpMI->getOperand(1).getReg());
}
}
return false;
} | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
movl (%rdx), %esi
movq %rbx, %rdi
callq 0x17dae6c
testq %rax, %rax
je 0x1d77c01
cmpw $0x4e, 0x44(%rax)
jne 0x1d77c01
movzwl 0x28(%rax), %ecx
movzbl 0x2a(%rax), %edx
shll $0x10, %edx
orl %ecx, %edx
cmpl $0x2, %edx
jne 0x1d77c01
movq 0x20(%rax), %rax
movl 0... | /llvm/CodeGen/GlobalISel/MIPatternMatch.h |
bool llvm::MIPatternMatch::BinaryOp_match<llvm::MIPatternMatch::operand_type_match, llvm::MIPatternMatch::bind_ty<llvm::Register>, 73u, false>::match<llvm::Register>(llvm::MachineRegisterInfo const&, llvm::Register&&) | bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
MachineInstr *TmpMI;
if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 3) {
return (L.match(MRI, TmpMI->getOperand(1).getReg()) &&
R.match(MRI, TmpMI->getOperand(2).getReg... | pushq %rbx
movq %rsi, %rax
movq %rdi, %rbx
movl (%rdx), %esi
movq %rax, %rdi
callq 0x17dae6c
testq %rax, %rax
je 0x1d77c4c
cmpw $0x49, 0x44(%rax)
jne 0x1d77c4c
movzwl 0x28(%rax), %ecx
movzbl 0x2a(%rax), %edx
shll $0x10, %edx
orl %ecx, %edx
cmpl $0x3, %edx
jne 0x1d77c4c
movq 0x20(%rax), %rax
movl 0x44(%rax), %eax
movq 0... | /llvm/CodeGen/GlobalISel/MIPatternMatch.h |
llvm::IRTranslator::ValueToVRegInfo::getOffsets(llvm::Value const&) | OffsetListT *getOffsets(const Value &V) {
auto It = TypeToOffsets.find(V.getType());
if (It != TypeToOffsets.end())
return It->second;
return insertOffsets(V);
} | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
addq $0xd8, %rdi
movq 0x8(%rsi), %rsi
callq 0x1d8c4f0
movl 0xe8(%r14), %ecx
shlq $0x4, %rcx
addq 0xd8(%r14), %rcx
cmpq %rcx, %rax
je 0x1d7d18d
movq 0x8(%rax), %rax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
movq %r14, %rdi
movq %rbx, %rsi
addq $0x8, %rsp
po... | /llvm/CodeGen/GlobalISel/IRTranslator.h |
llvm::IRTranslator::translate(llvm::Constant const&, llvm::Register) | bool IRTranslator::translate(const Constant &C, Register Reg) {
// We only emit constants into the entry block from here. To prevent jumpy
// debug behaviour remove debug line.
if (auto CurrInstDL = CurBuilder->getDL())
EntryBuilder->setDebugLoc(DebugLoc());
if (auto CI = dyn_cast<ConstantInt>(&C))
Ent... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x38, %rsp
movl %edx, %ebp
movq %rsi, %r14
movq %rdi, %rbx
movq 0x290(%rdi), %rax
movq 0x20(%rax), %rsi
movq %rsi, 0x8(%rsp)
testq %rsi, %rsi
je 0x1d7d4e2
leaq 0x8(%rsp), %rdi
movl $0x1, %edx
callq 0x1a648a8
cmpq $0x0, 0x8(%rsp)
je 0x1d7d51b
movq 0... | /CodeGen/GlobalISel/IRTranslator.cpp |
llvm::detail::DenseMapPair<llvm::Value const*, llvm::SmallVector<llvm::Register, 1u>*>* llvm::DenseMapBase<llvm::DenseMap<llvm::Value const*, llvm::SmallVector<llvm::Register, 1u>*, llvm::DenseMapInfo<llvm::Value const*, void>, llvm::detail::DenseMapPair<llvm::Value const*, llvm::SmallVector<llvm::Register, 1u>*>>, llv... | BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup,
BucketT *TheBucket) {
incrementEpoch();
// If the load of the hash table is more than 3/4, or if fewer than 1/8 of
// the buckets are empty (meaning that many are filled with tombstones),
// grow th... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rcx, %rax
movq %rdx, %r14
movq %rdi, %rbx
movl 0x8(%rdi), %ecx
movl 0x10(%rdi), %esi
leal 0x4(,%rcx,4), %edx
leal (%rsi,%rsi,2), %edi
cmpl %edi, %edx
jae 0x1d8c24f
notl %ecx
addl %esi, %ecx
subl 0xc(%rbx), %ecx
movl %esi, %edx
shrl $0x3, %edx
cmpl %edx, %ecx
jbe 0... | /llvm/ADT/DenseMap.h |
llvm::SpecificBumpPtrAllocator<llvm::SmallVector<llvm::Register, 1u>>::DestroyAll() | void DestroyAll() {
auto DestroyElements = [](char *Begin, char *End) {
assert(Begin == (char *)alignAddr(Begin, Align::Of<T>()));
for (char *Ptr = Begin; Ptr + sizeof(T) <= End; Ptr += sizeof(T))
reinterpret_cast<T *>(Ptr)->~T();
};
for (auto I = Allocator.Slabs.begin(), E = Allocator.... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdi, %rbx
movl 0x18(%rdi), %eax
testq %rax, %rax
je 0x1d8cedd
movq 0x10(%rbx), %r14
leaq (%r14,%rax,8), %r15
movl $0x1e, %ebp
movq 0x10(%rbx), %rax
movq %r14, %rcx
subq %rax, %rcx
shrq $0xa, %rcx
andl $0x1ffffff, %ecx # imm = 0x1F... | /llvm/Support/Allocator.h |
llvm::DenseMapBase<llvm::DenseMap<std::pair<llvm::BasicBlock const*, llvm::BasicBlock const*>, llvm::SmallVector<llvm::MachineBasicBlock*, 1u>, llvm::DenseMapInfo<std::pair<llvm::BasicBlock const*, llvm::BasicBlock const*>, void>, llvm::detail::DenseMapPair<std::pair<llvm::BasicBlock const*, llvm::BasicBlock const*>, l... | void moveFromOldBuckets(BucketT *OldBucketsBegin, BucketT *OldBucketsEnd) {
initEmpty();
// Insert all the old elements.
const KeyT EmptyKey = getEmptyKey();
const KeyT TombstoneKey = getTombstoneKey();
for (BucketT *B = OldBucketsBegin, *E = OldBucketsEnd; B != E; ++B) {
if (!KeyInfoT::isEqu... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
movq $0x0, 0x8(%rdi)
movl 0x10(%rdi), %ecx
testq %rcx, %rcx
je 0x1d8db20
movq (%r15), %rax
leaq (%rcx,%rcx,4), %rcx
leaq (%rax,%rcx,8), %rcx
movq $-0x1000, %rdx # imm = 0xF000
movq %rdx,... | /llvm/ADT/DenseMap.h |
llvm::SmallVectorImpl<llvm::LLT>::assignRemote(llvm::SmallVectorImpl<llvm::LLT>&&) | void assignRemote(SmallVectorImpl &&RHS) {
this->destroy_range(this->begin(), this->end());
if (!this->isSmall())
free(this->begin());
this->BeginX = RHS.BeginX;
this->Size = RHS.Size;
this->Capacity = RHS.Capacity;
RHS.resetToSmall();
} | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movq %rdi, %r14
movq (%rdi), %rdi
leaq 0x10(%r14), %rax
cmpq %rax, %rdi
je 0x1d91f45
callq 0x751980
movq (%rbx), %rax
movq %rax, (%r14)
movq 0x8(%rbx), %rax
movq %rax, 0x8(%r14)
leaq 0x10(%rbx), %rax
movq %rax, (%rbx)
movq $0x0, 0x8(%rbx)
addq $0x8, %rsp
popq %rbx
popq %... | /llvm/ADT/SmallVector.h |
llvm::GISelWorkList<128u>::remove(llvm::MachineInstr const*) | void remove(const MachineInstr *I) {
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
assert((Finalized || WorklistMap.empty()) && "Neither finalized nor empty");
#endif
auto It = WorklistMap.find(I);
if (It == WorklistMap.end())
return; // Not in worklist.
// Don't bother moving everything down, just null ou... | pushq %rbx
movq %rdi, %rbx
addq $0x410, %rdi # imm = 0x410
callq 0xae62f4
movl 0x420(%rbx), %ecx
shlq $0x4, %rcx
addq 0x410(%rbx), %rcx
cmpq %rcx, %rax
je 0x1d94da3
movl 0x8(%rax), %ecx
movq (%rbx), %rdx
movq $0x0, (%rdx,%rcx,8)
movq $-0x2000, (%rax) # imm = 0xE000
movq 0x418(%rbx), %xmm0
paddd 0x15f8... | /llvm/CodeGen/GlobalISel/GISelWorkList.h |
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