name string | code string | asm string | file string |
|---|---|---|---|
llvm::SelectionDAG::getMaskedLoad(llvm::EVT, llvm::SDLoc const&, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::SDValue, llvm::EVT, llvm::MachineMemOperand*, llvm::ISD::MemIndexedMode, llvm::ISD::LoadExtType, bool) | SDValue SelectionDAG::getMaskedLoad(EVT VT, const SDLoc &dl, SDValue Chain,
SDValue Base, SDValue Offset, SDValue Mask,
SDValue PassThru, EVT MemVT,
MachineMemOperand *MMO,
ISD... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x138, %rsp # imm = 0x138
movl %r9d, %ebp
movq %r8, %r12
movq %rcx, %r14
movq %rdi, %rbx
leaq 0x180(%rsp), %r13
leaq 0x170(%rsp), %r15
movb 0x1d8(%rsp), %al
movb %al, 0x1f(%rsp)
cmpl $0x0, 0x1c8(%rsp)
je 0x1f56312
movq (%r15), %rax
movl ... | /CodeGen/SelectionDAG/SelectionDAG.cpp |
unsigned short llvm::SelectionDAG::getSyntheticNodeSubclassData<llvm::MaskedScatterSDNode, llvm::SDVTList&, llvm::EVT&, llvm::MachineMemOperand*&, llvm::ISD::MemIndexType&, bool&>(unsigned int, llvm::SDVTList&, llvm::EVT&, llvm::MachineMemOperand*&, llvm::ISD::MemIndexType&, bool&) | static uint16_t getSyntheticNodeSubclassData(unsigned IROrder,
ArgTypes &&... Args) {
// The compiler can reduce this expression to a constant iff we pass an
// empty DebugLoc. Thankfully, the debug location doesn't have any bearing
// on the subclass data.
... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
subq $0x98, %rsp
movl %edi, %eax
leaq 0x20(%rsp), %r10
movq $0x0, (%r10)
movq (%rsi), %r11
movl 0x8(%rsi), %ebx
movq (%rcx), %rcx
movl (%r8), %r15d
movzbl (%r9), %ebp
movups (%rdx), %xmm0
movups %xmm0, (%rsp)
movq %rcx, 0x10(%rsp)
leaq 0x28(%rsp), %r14
movq %r14, %rdi
movl $0... | /llvm/CodeGen/SelectionDAG.h |
llvm::FPStateAccessSDNode* llvm::SelectionDAG::newSDNode<llvm::FPStateAccessSDNode, llvm::ISD::NodeType, unsigned int, llvm::DebugLoc const&, llvm::SDVTList&, llvm::EVT&, llvm::MachineMemOperand*&>(llvm::ISD::NodeType&&, unsigned int&&, llvm::DebugLoc const&, llvm::SDVTList&, llvm::EVT&, llvm::MachineMemOperand*&) | SDNodeT *newSDNode(ArgTypes &&... Args) {
return new (NodeAllocator.template Allocate<SDNodeT>())
SDNodeT(std::forward<ArgTypes>(Args)...);
} | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %r9, %r14
movq %r8, %r15
movq %rcx, %rbx
movq %rdx, %r13
movq %rsi, %rbp
movq 0x50(%rsp), %rcx
movq 0x160(%rdi), %r12
testq %r12, %r12
je 0x1f57a75
movq (%r12), %rax
movq %rax, 0x160(%rdi)
jmp 0x1f57a94
addq $0x168, %rdi ... | /llvm/CodeGen/SelectionDAG.h |
llvm::SelectionDAG::getNode(unsigned int, llvm::SDLoc const&, llvm::SDVTList, llvm::ArrayRef<llvm::SDValue>, llvm::SDNodeFlags) | SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
ArrayRef<SDValue> Ops, const SDNodeFlags Flags) {
if (VTList.NumVTs == 1)
return getNode(Opcode, DL, VTList.VTs[0], Ops, Flags);
#ifndef NDEBUG
for (const auto &Op : Ops)
assert(Op.getOpcode() != ... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x1a8, %rsp # imm = 0x1A8
movl %r9d, %r13d
movq %rdx, %r15
movq %rdi, %r14
leaq 0x1e0(%rsp), %rdx
movq %rcx, 0x30(%rsp)
movl %r8d, 0x38(%rsp)
movl %esi, 0x54(%rsp)
cmpl $0x1, %r8d
jne 0x1f5804f
movq 0x8(%rcx), %r8
movl (%rcx), %ecx
movup... | /CodeGen/SelectionDAG/SelectionDAG.cpp |
llvm::SelectionDAG::getVTList(llvm::EVT, llvm::EVT, llvm::EVT, llvm::EVT) | SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
FoldingSetNodeID ID;
ID.AddInteger(4U);
ID.AddInteger(VT1.getRawBits());
ID.AddInteger(VT2.getRawBits());
ID.AddInteger(VT3.getRawBits());
ID.AddInteger(VT4.getRawBits());
void *IP = nullptr;
SDVTListNode *Result = VTListMap.FindNod... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xb8, %rsp
movq %r8, %rbp
movl %ecx, %r12d
movq %rdx, %rbx
movl %esi, %r15d
movq %rdi, 0x18(%rsp)
leaq 0x38(%rsp), %rcx
movq %rcx, -0x10(%rcx)
movabsq $0x2000000000, %rax # imm = 0x2000000000
movq %rax, -0x8(%rcx)
leaq 0x28(%rsp), %r13
movq %r1... | /CodeGen/SelectionDAG/SelectionDAG.cpp |
llvm::SelectionDAG::UpdateSDLocOnMergeSDNode(llvm::SDNode*, llvm::SDLoc const&) | SDNode *SelectionDAG::UpdateSDLocOnMergeSDNode(SDNode *N, const SDLoc &OLoc) {
DebugLoc NLoc = N->getDebugLoc();
if (NLoc && OptLevel == CodeGenOptLevel::None && OLoc.getDebugLoc() != NLoc) {
N->setDebugLoc(DebugLoc());
}
unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
N->setIROrder(Order);... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rdx, %r14
movq %rsi, %rbx
movq %rdi, %r15
movq 0x48(%rsi), %rsi
movq %rsi, (%rsp)
testq %rsi, %rsi
je 0x1f59f10
movq %rsp, %rdi
movl $0x1, %edx
callq 0x1a648a8
movq (%rsp), %rax
testq %rax, %rax
je 0x1f59f4f
cmpl $0x0, 0x48(%r15)
jne 0x1f59f4f
cmpq %rax, (%r14)
je... | /CodeGen/SelectionDAG/SelectionDAG.cpp |
llvm::BuildVectorSDNode::getConstantFPSplatNode(llvm::APInt const&, llvm::BitVector*) const | ConstantFPSDNode *
BuildVectorSDNode::getConstantFPSplatNode(const APInt &DemandedElts,
BitVector *UndefElements) const {
return dyn_cast_or_null<ConstantFPSDNode>(
getSplatValue(DemandedElts, UndefElements));
} | pushq %rax
callq 0x1f5f98a
testq %rax, %rax
je 0x1f5cee6
movl 0x18(%rax), %ecx
cmpl $0x24, %ecx
je 0x1f5cee8
cmpl $0xc, %ecx
je 0x1f5cee8
xorl %eax, %eax
popq %rcx
retq
| /CodeGen/SelectionDAG/SelectionDAG.cpp |
llvm::isOneOrOneSplat(llvm::SDValue, bool) | bool llvm::isOneOrOneSplat(SDValue N, bool AllowUndefs) {
ConstantSDNode *C =
isConstOrConstSplat(N, AllowUndefs, /*AllowTruncation*/ true);
return C && C->isOne();
} | pushq %rbx
movl $0x1, %ecx
callq 0x1f4200a
testq %rax, %rax
je 0x1f5cf10
movq 0x58(%rax), %rdi
movl 0x20(%rdi), %ebx
addq $0x18, %rdi
cmpl $0x40, %ebx
ja 0x1f5cf14
cmpq $0x1, (%rdi)
jmp 0x1f5cf1d
xorl %eax, %eax
jmp 0x1f5cf20
callq 0x1c82ec2
decl %ebx
cmpl %ebx, %eax
sete %al
popq %rbx
retq
| /CodeGen/SelectionDAG/SelectionDAG.cpp |
llvm::SelectionDAG::SplitScalar(llvm::SDValue const&, llvm::SDLoc const&, llvm::EVT const&, llvm::EVT const&) | std::pair<SDValue, SDValue> SelectionDAG::SplitScalar(const SDValue &N,
const SDLoc &DL,
const EVT &LoVT,
const EVT &HiVT) {
assert(!LoVT.isVector() && !HiV... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x58, %rsp
movq %r9, %r12
movq %rcx, %r14
movq %rdx, %r13
movq %rsi, %r15
movq %rdi, %rbx
movb (%r8), %al
movb %al, 0x24(%rsp)
movq 0x8(%r8), %rax
movq %rax, 0x28(%rsp)
movups (%rdx), %xmm0
movaps %xmm0, 0x40(%rsp)
xorl %ebp, %ebp
movq %rsi, %rdi
x... | /CodeGen/SelectionDAG/SelectionDAG.cpp |
llvm::BuildVectorSDNode::getConstantFPSplatPow2ToLog2Int(llvm::BitVector*, unsigned int) const | int32_t
BuildVectorSDNode::getConstantFPSplatPow2ToLog2Int(BitVector *UndefElements,
uint32_t BitWidth) const {
if (ConstantFPSDNode *CN =
dyn_cast_or_null<ConstantFPSDNode>(getSplatValue(UndefElements))) {
bool IsExact;
APSInt IntVal(BitWidth);
... | pushq %r15
pushq %r14
pushq %rbx
subq $0x20, %rsp
movl %edx, %ebx
callq 0x1f32f90
testq %rax, %rax
je 0x1f5fd99
movq %rax, %r14
movl 0x18(%rax), %eax
cmpl $0x24, %eax
je 0x1f5fd9c
cmpl $0xc, %eax
je 0x1f5fd9c
xorl %r14d, %r14d
testq %r14, %r14
je 0x1f5fe04
leaq 0x10(%rsp), %r15
movq %r15, %rdi
movl %ebx, %esi
xorl %edx... | /CodeGen/SelectionDAG/SelectionDAG.cpp |
llvm::DenseMapBase<llvm::DenseMap<llvm::SDNode const*, llvm::SmallVector<llvm::SDDbgValue*, 2u>, llvm::DenseMapInfo<llvm::SDNode const*, void>, llvm::detail::DenseMapPair<llvm::SDNode const*, llvm::SmallVector<llvm::SDDbgValue*, 2u>>>, llvm::SDNode const*, llvm::SmallVector<llvm::SDDbgValue*, 2u>, llvm::DenseMapInfo<ll... | void moveFromOldBuckets(BucketT *OldBucketsBegin, BucketT *OldBucketsEnd) {
initEmpty();
// Insert all the old elements.
const KeyT EmptyKey = getEmptyKey();
const KeyT TombstoneKey = getTombstoneKey();
for (BucketT *B = OldBucketsBegin, *E = OldBucketsEnd; B != E; ++B) {
if (!KeyInfoT::isEqu... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
movq $0x0, 0x8(%rdi)
movl 0x10(%rdi), %eax
testq %rax, %rax
je 0x1f623f4
movq (%r15), %rcx
leaq (%rax,%rax,4), %rax
leaq -0x28(,%rax,8), %rax
movabsq $-0x3333333333333333, %rdx # imm = 0xCCCCCCCC... | /llvm/ADT/DenseMap.h |
llvm::ConstantPoolSDNode::ConstantPoolSDNode(bool, llvm::MachineConstantPoolValue*, llvm::SDVTList, int, llvm::Align, unsigned int) | ConstantPoolSDNode(bool isTarget, MachineConstantPoolValue *v, SDVTList VTs,
int o, Align Alignment, unsigned TF)
: SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, 0,
DebugLoc(), VTs),
Offset(o), Alignment(Alignment), TargetFlags(TF) {
assert(Offset >... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movl %r9d, %ebx
movl %r8d, %r9d
movq %rcx, %r8
movq %rdx, %r15
movq %rdi, %r14
movl 0x48(%rsp), %ebp
movb 0x40(%rsp), %r13b
testl %esi, %esi
movl $0x29, %eax
movl $0x11, %esi
cmovnel %eax, %esi
movq %rsp, %r12
movq $0x0, (%r12)
xorl %edx, %edx... | /llvm/CodeGen/SelectionDAGNodes.h |
llvm::ExternalSymbolSDNode::ExternalSymbolSDNode(bool, char const*, unsigned int, llvm::SDVTList) | ExternalSymbolSDNode(bool isTarget, const char *Sym, unsigned TF,
SDVTList VTs)
: SDNode(isTarget ? ISD::TargetExternalSymbol : ISD::ExternalSymbol, 0,
DebugLoc(), VTs),
Symbol(Sym), TargetFlags(TF) {} | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movl %ecx, %ebx
movq %rdx, %r14
movq %rdi, %r15
testl %esi, %esi
movl $0x2a, %eax
movl $0x12, %esi
cmovnel %eax, %esi
movq %rsp, %r12
movq $0x0, (%r12)
xorl %edx, %edx
movq %r12, %rcx
callq 0xd7879c
movq (%r12), %rsi
testq %rsi, %rsi
je 0x1f636ef
movq %rsp, %rdi
ca... | /llvm/CodeGen/SelectionDAGNodes.h |
llvm::CondCodeSDNode::CondCodeSDNode(llvm::ISD::CondCode) | explicit CondCodeSDNode(ISD::CondCode Cond)
: SDNode(ISD::CONDCODE, 0, DebugLoc(), getSDVTList(MVT::Other)),
Condition(Cond) {} | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movl %esi, %ebx
movq %rdi, %r14
leaq 0x8(%rsp), %r15
movq $0x0, (%r15)
movl $0x1, %edi
xorl %esi, %esi
callq 0x1f58eb0
movq %r14, %rdi
movl $0x8, %esi
xorl %edx, %edx
movq %r15, %rcx
movq %rax, %r8
movl $0x1, %r9d
callq 0xd7879c
movq (%r15), %rsi
testq %rsi, %rsi
je 0x1... | /llvm/CodeGen/SelectionDAGNodes.h |
bool llvm::SDPatternMatch::BinaryOpc_match<llvm::SDPatternMatch::Value_bind, llvm::SDPatternMatch::BinaryOpc_match<llvm::SDPatternMatch::SpecificInt_match, llvm::SDPatternMatch::DeferredValue_match, false, false>, true, false>::match<llvm::SDPatternMatch::BasicMatchContext>(llvm::SDPatternMatch::BasicMatchContext const... | inline UnaryOpc_match<Opnd> m_UnaryOp(unsigned Opc, const Opnd &Op) {
return UnaryOpc_match<Opnd>(Opc, Op);
} | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movl 0x18(%rdx), %eax
cmpl (%rdi), %eax
jne 0x1f64430
movq %rdx, %r14
movq %rsi, %rbx
movq %rdi, %r15
movq 0x28(%rdx), %rax
movq (%rax), %rcx
movl 0x8(%rax), %eax
movq 0x8(%rdi), %rdx
movq %rcx, (%rdx)
movl %eax, 0x8(%rdx)
leaq 0x10(%rdi), %r12
movq 0x28(%r14), %ra... | /llvm/CodeGen/SDPatternMatch.h |
llvm::detail::DenseMapPair<llvm::SDNode*, unsigned int>* llvm::DenseMapBase<llvm::DenseMap<llvm::SDNode*, unsigned int, llvm::DenseMapInfo<llvm::SDNode*, void>, llvm::detail::DenseMapPair<llvm::SDNode*, unsigned int>>, llvm::SDNode*, unsigned int, llvm::DenseMapInfo<llvm::SDNode*, void>, llvm::detail::DenseMapPair<llvm... | BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup,
BucketT *TheBucket) {
incrementEpoch();
// If the load of the hash table is more than 3/4, or if fewer than 1/8 of
// the buckets are empty (meaning that many are filled with tombstones),
// grow th... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rcx, %rax
movq %rdx, %r14
movq %rdi, %rbx
movl 0x8(%rdi), %ecx
movl 0x10(%rdi), %esi
leal 0x4(,%rcx,4), %edx
leal (%rsi,%rsi,2), %edi
cmpl %edi, %edx
jae 0x1f64c63
notl %ecx
addl %esi, %ecx
subl 0xc(%rbx), %ecx
movl %esi, %edx
shrl $0x3, %edx
cmpl %edx, %ecx
jbe 0... | /llvm/ADT/DenseMap.h |
llvm::BaseIndexOffset::match(llvm::SDNode const*, llvm::SelectionDAG const&) | BaseIndexOffset BaseIndexOffset::match(const SDNode *N,
const SelectionDAG &DAG) {
if (const auto *LS0 = dyn_cast<LSBaseSDNode>(N))
return matchLSNode(LS0, DAG);
if (const auto *LN = dyn_cast<LifetimeSDNode>(N)) {
if (LN->hasOffset())
return BaseIndexOffset(LN->g... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x18, %rsp
movq %rsi, %r14
movl $0xfffffedd, %eax # imm = 0xFFFFFEDD
addl 0x18(%rsi), %eax
cmpl $-0x2, %eax
setb %al
testq %rsi, %rsi
sete %cl
orb %al, %cl
jne 0x1f65c5f
movq %rdx, %rbx
movq %rdi, 0x8(%rsp)
movb %cl, 0x7(%rsp)
movq %r14, %rdi... | /CodeGen/SelectionDAG/SelectionDAGAddressAnalysis.cpp |
printrWithDepthHelper(llvm::raw_ostream&, llvm::SDNode const*, llvm::SelectionDAG const*, unsigned int, unsigned int) | static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
const SelectionDAG *G, unsigned depth,
unsigned indent) {
if (depth == 0)
return;
OS.indent(indent);
N->print(OS, G);
for (const SDValue &Op : N->op_values()) {
// D... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdx, (%rsp)
testl %ecx, %ecx
je 0x1f6b0ec
movl %r8d, %ebx
movl %ecx, %ebp
movq %rsi, %r12
movq %rdi, %r15
movl %r8d, %esi
callq 0x1cea6fa
movq %r12, %rdi
movq %r15, %rsi
movq (%rsp), %rdx
callq 0x1f6b112
movzwl 0x40(%r12), %eax
testq %ra... | /CodeGen/SelectionDAG/SelectionDAGDumper.cpp |
printMemOperand(llvm::raw_ostream&, llvm::MachineMemOperand const&, llvm::MachineFunction const*, llvm::Module const*, llvm::MachineFrameInfo const*, llvm::TargetInstrInfo const*, llvm::LLVMContext&) | static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
const MachineFunction *MF, const Module *M,
const MachineFrameInfo *MFI,
const TargetInstrInfo *TII, LLVMContext &Ctx) {
ModuleSlotTracker MST(M);
if (MF)
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x88, %rsp
movq %r9, %r15
movq %r8, %rbx
movq %rdx, %rbp
movq %rsi, %r13
movq %rdi, %r12
movq 0xc0(%rsp), %r14
leaq 0x18(%rsp), %rdi
movq %rcx, %rsi
movl $0x1, %edx
callq 0x197d2b2
testq %rbp, %rbp
je 0x1f6b3df
movq (%rbp), %rsi
leaq 0x18(%rsp), %r... | /CodeGen/SelectionDAG/SelectionDAGDumper.cpp |
llvm::SelectionDAGISel::initializeAnalysisResults(llvm::AnalysisManager<llvm::MachineFunction>&) | void SelectionDAGISel::initializeAnalysisResults(
MachineFunctionAnalysisManager &MFAM) {
auto &FAM = MFAM.getResult<FunctionAnalysisManagerMachineFunctionProxy>(*MF)
.getManager();
auto &MAMP = MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(*MF);
Function &Fn = MF->getFunction();... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
movq %rsi, %r15
movq %rdi, %rbx
movq 0x28(%rdi), %rdx
leaq 0x3960c01(%rip), %rsi # 0x58cd190
movq %r15, %rdi
callq 0x17af3d4
movq 0x8(%rax), %rbp
movq 0x28(%rbx), %rdx
leaq 0x3960c02(%rip), %rsi # 0x58cd1a8
movq %r15, 0x18(%rsp)
movq... | /CodeGen/SelectionDAG/SelectionDAGISel.cpp |
llvm::UniformityInfoAnalysis::Result* llvm::AnalysisManager<llvm::Function>::getCachedResult<llvm::UniformityInfoAnalysis>(llvm::Function&) const | typename PassT::Result *getCachedResult(IRUnitT &IR) const {
assert(AnalysisPasses.count(PassT::ID()) &&
"This analysis pass was not registered prior to being queried");
ResultConceptT *ResultConcept = getCachedResultImpl(PassT::ID(), IR);
if (!ResultConcept)
return nullptr;
using Res... | pushq %rbx
subq $0x10, %rsp
movq %rdi, %rbx
addq $0x30, %rdi
leaq 0x39c5f81(%rip), %rcx # 0x59327a8
movq %rsp, %rax
movq %rcx, (%rax)
movq %rsi, 0x8(%rax)
movq %rax, %rsi
callq 0xbd07ee
movl 0x40(%rbx), %ecx
leaq (%rcx,%rcx,2), %rcx
shlq $0x3, %rcx
addq 0x30(%rbx), %rcx
cmpq %rcx, %rax
je 0x1f6c857
movq 0x10(%rax), %... | /llvm/IR/PassManager.h |
isFoldedOrDeadInstruction(llvm::Instruction const*, llvm::FunctionLoweringInfo const&) | static bool isFoldedOrDeadInstruction(const Instruction *I,
const FunctionLoweringInfo &FuncInfo) {
return !I->mayWriteToMemory() && // Side-effecting instructions aren't folded.
!I->isTerminator() && // Terminators aren't folded.
!isa<DbgInfoIntrinsic>(I) &... | pushq %r14
pushq %rbx
subq $0x18, %rsp
movq %rsi, %rbx
movq %rdi, %r14
callq 0x1a40d60
testb %al, %al
jne 0x1f6faf4
movzbl (%r14), %eax
leal -0x1e(%rax), %ecx
cmpl $0xb, %ecx
jae 0x1f6fafe
xorl %eax, %eax
addq $0x18, %rsp
popq %rbx
popq %r14
retq
cmpb $0x55, %al
jne 0x1f6fb1d
movq %r14, %rdi
callq 0x8f16ea
testb %al, %... | /CodeGen/SelectionDAG/SelectionDAGISel.cpp |
llvm::SelectionDAGISel::IsLegalToFold(llvm::SDValue, llvm::SDNode*, llvm::SDNode*, llvm::CodeGenOptLevel, bool) | bool SelectionDAGISel::IsLegalToFold(SDValue N, SDNode *U, SDNode *Root,
CodeGenOptLevel OptLevel,
bool IgnoreChains) {
if (OptLevel == CodeGenOptLevel::None)
return false;
// If Root use can somehow reach N through a path that doesn't c... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x158, %rsp # imm = 0x158
testl %r8d, %r8d
je 0x1f71168
movl %r9d, %ebp
movq %rcx, %r15
movq %rdx, %r12
movq %rdi, %rbx
movl $0xffffffff, %eax # imm = 0xFFFFFFFF
movzwl 0x42(%rcx), %ecx
addl %eax, %ecx
movq 0x30(%r15), %rdx
shlq $0... | /CodeGen/SelectionDAG/SelectionDAGISel.cpp |
llvm::SelectionDAGISel::Select_READ_REGISTER(llvm::SDNode*) | void SelectionDAGISel::Select_READ_REGISTER(SDNode *Op) {
SDLoc dl(Op);
MDNodeSDNode *MD = cast<MDNodeSDNode>(Op->getOperand(1));
const MDString *RegStr = cast<MDString>(MD->getMD()->getOperand(0));
EVT VT = Op->getValueType(0);
LLT Ty = VT.isSimple() ? getLLTForMVT(VT.getSimpleVT()) : LLT();
Register Reg ... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x30, %rsp
movq %rsi, %rbx
movq %rdi, %r14
movq 0x48(%rsi), %rsi
movq %rsi, 0x10(%rsp)
testq %rsi, %rsi
je 0x1f712d8
leaq 0x10(%rsp), %rdi
movl $0x1, %edx
callq 0x1a648a8
movl 0x44(%rbx), %eax
movl %eax, 0x18(%rsp)
movq 0x28(%rbx), %rax
movq 0x28(%rax), %rax
... | /CodeGen/SelectionDAG/SelectionDAGISel.cpp |
llvm::SelectionDAGISel::Select_JUMP_TABLE_DEBUG_INFO(llvm::SDNode*) | void SelectionDAGISel::Select_JUMP_TABLE_DEBUG_INFO(SDNode *N) {
SDLoc dl(N);
CurDAG->SelectNodeTo(N, TargetOpcode::JUMP_TABLE_DEBUG_INFO, MVT::Glue,
CurDAG->getTargetConstant(N->getConstantOperandVal(1),
dl, MVT::i64, true));
} | pushq %r15
pushq %r14
pushq %rbx
subq $0x30, %rsp
movq %rsi, %rbx
movq %rdi, %r14
movq 0x48(%rsi), %rsi
movq %rsi, 0x10(%rsp)
testq %rsi, %rsi
je 0x1f71b3e
leaq 0x10(%rsp), %rdi
movl $0x1, %edx
callq 0x1a648a8
movl 0x44(%rbx), %eax
movl %eax, 0x18(%rsp)
movq 0x38(%r14), %r14
movq 0x28(%rbx), %rax
movq 0x28(%rax), %rax
... | /CodeGen/SelectionDAG/SelectionDAGISel.cpp |
llvm::RegisterPassParser<llvm::RegisterScheduler>::~RegisterPassParser() | ~RegisterPassParser() override { RegistryClass::setListener(nullptr); } | pushq %rbx
movq %rdi, %rbx
leaq 0x38de769(%rip), %rax # 0x5854280
leaq 0x10(%rax), %rcx
movq %rcx, (%rdi)
addq $0x48, %rax
movq %rax, 0x8(%rdi)
leaq 0x3970843(%rip), %rax # 0x58e6370
movq $0x0, 0x10(%rax)
leaq 0x38de7cc(%rip), %rax # 0x5854308
addq $0x10, %rax
movq %rax, 0x8(%rdi)
movq 0x18(%rdi), %rdi
leaq 0x28(... | /llvm/CodeGen/MachinePassRegistry.h |
llvm::MachinePassRegistry<llvm::ScheduleDAGSDNodes* (*)(llvm::SelectionDAGISel*, llvm::CodeGenOptLevel)>::Remove(llvm::MachinePassRegistryNode<llvm::ScheduleDAGSDNodes* (*)(llvm::SelectionDAGISel*, llvm::CodeGenOptLevel)>*) | void Remove(MachinePassRegistryNode<PassCtorTy> *Node) {
for (MachinePassRegistryNode<PassCtorTy> **I = &List; *I;
I = (*I)->getNextAddress()) {
if (*I == Node) {
if (Listener)
Listener->NotifyRemove(Node->getName());
*I = (*I)->getNext();
break;
}
}
} | pushq %rbx
movq %rdi, %rax
movq %rax, %rbx
movq (%rax), %rax
testq %rax, %rax
je 0x1f75fd9
cmpq %rsi, %rax
jne 0x1f75fa6
movq 0x10(%rdi), %rdi
testq %rdi, %rdi
je 0x1f75fd0
movq 0x8(%rsi), %rax
movq 0x10(%rsi), %rdx
movq (%rdi), %rcx
movq %rax, %rsi
callq *0x20(%rcx)
movq (%rbx), %rax
movq (%rax), %rax
movq %rax, (%rbx... | /llvm/CodeGen/MachinePassRegistry.h |
llvm::SelectionDAGBuilder::SelectionDAGBuilder(llvm::SelectionDAG&, llvm::FunctionLoweringInfo&, llvm::SwiftErrorValueTracking&, llvm::CodeGenOptLevel) | SelectionDAGBuilder(SelectionDAG &dag, FunctionLoweringInfo &funcinfo,
SwiftErrorValueTracking &swifterror, CodeGenOptLevel ol)
: SDNodeOrder(LowestSDNodeOrder), TM(dag.getTarget()), DAG(dag),
SL(std::make_unique<SDAGSwitchLowering>(this, funcinfo)),
FuncInfo(funcinfo), Swift... | pushq %r15
pushq %r14
pushq %r12
pushq %rbx
pushq %rax
movq %rcx, %r14
movq %rdx, %r15
movq %rdi, %rbx
leaq 0x60(%rdi), %rax
xorl %r12d, %r12d
movl %r12d, 0x48(%rdi)
xorps %xmm0, %xmm0
movups %xmm0, 0x38(%rdi)
movups %xmm0, (%rdi)
movups %xmm0, 0xc(%rdi)
movups %xmm0, 0x20(%rdi)
movl %r12d, 0x30(%rdi)
movq %rax, 0x50(%... | /CodeGen/SelectionDAG/SelectionDAGBuilder.h |
std::pair<llvm::SDValue, llvm::SDNode*> const* llvm::SmallVectorTemplateCommon<std::pair<llvm::SDValue, llvm::SDNode*>, void>::reserveForParamAndGetAddressImpl<llvm::SmallVectorTemplateBase<std::pair<llvm::SDValue, llvm::SDNode*>, true>>(llvm::SmallVectorTemplateBase<std::pair<llvm::SDValue, llvm::SDNode*>, true>*, std... | static const T *reserveForParamAndGetAddressImpl(U *This, const T &Elt,
size_t N) {
size_t NewSize = This->size() + N;
if (LLVM_LIKELY(NewSize <= This->capacity()))
return &Elt;
bool ReferencesStorage = false;
int64_t Index = -1;
if (!U::Take... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %rbx
movl 0x8(%rdi), %ecx
movl 0xc(%rdi), %eax
addq %rcx, %rdx
cmpq %rax, %rdx
ja 0x1f76d78
movq %rbx, %rax
addq $0x8, %rsp
popq %rbx
popq %r14
popq %r15
popq %rbp
retq
movq %rdi, %r14
movq (%rdi), %rax
leaq (%rcx,%rcx,2), %rcx
cmpq %rbx, %rax
setbe %sil... | /llvm/ADT/SmallVector.h |
llvm::StatepointLoweringState::getLocation(llvm::SDValue) | SDValue getLocation(SDValue Val) {
auto I = Locations.find(Val);
if (I == Locations.end())
return SDValue();
return I->second;
} | pushq %rbx
subq $0x10, %rsp
movq %rdi, %rbx
movq %rsp, %rax
movq %rsi, (%rax)
movl %edx, 0x8(%rax)
movq %rax, %rsi
callq 0x1f7ae52
movl 0x10(%rbx), %ecx
shlq $0x5, %rcx
addq (%rbx), %rcx
cmpq %rcx, %rax
je 0x1f78c07
movq 0x10(%rax), %rcx
movl 0x18(%rax), %edx
jmp 0x1f78c0b
xorl %edx, %edx
xorl %ecx, %ecx
movq %rcx, %ra... | /CodeGen/SelectionDAG/StatepointLowering.h |
llvm::SmallVectorTemplateBase<llvm::GCRelocateInst const*, true>::push_back(llvm::GCRelocateInst const*) | void push_back(ValueParamT Elt) {
const T *EltPtr = reserveForParamAndGetAddress(Elt);
memcpy(reinterpret_cast<void *>(this->end()), EltPtr, sizeof(T));
this->set_size(this->size() + 1);
} | pushq %r14
pushq %rbx
pushq %rax
movq %rsi, %r14
movq %rdi, %rbx
movl 0x8(%rdi), %edx
cmpl 0xc(%rdi), %edx
jae 0x1f79539
movq (%rbx), %rax
movl 0x8(%rbx), %ecx
movq %r14, (%rax,%rcx,8)
incl 0x8(%rbx)
addq $0x8, %rsp
popq %rbx
popq %r14
retq
incq %rdx
leaq 0x10(%rbx), %rsi
movl $0x8, %ecx
movq %rbx, %rdi
callq 0x1cba528... | /llvm/ADT/SmallVector.h |
llvm::DenseMapBase<llvm::DenseMap<llvm::SDValue, llvm::detail::DenseSetEmpty, llvm::DenseMapInfo<llvm::SDValue, void>, llvm::detail::DenseSetPair<llvm::SDValue>>, llvm::SDValue, llvm::detail::DenseSetEmpty, llvm::DenseMapInfo<llvm::SDValue, void>, llvm::detail::DenseSetPair<llvm::SDValue>>::clear() | unsigned getNumEntries() const {
return NumEntries;
} | movl 0x8(%rdi), %ecx
testl %ecx, %ecx
jne 0x1f7ad73
cmpl $0x0, 0xc(%rdi)
je 0x1f7adba
shll $0x2, %ecx
movl 0x10(%rdi), %eax
cmpl %eax, %ecx
setae %cl
cmpl $0x41, %eax
setb %dl
orb %cl, %dl
je 0x1f7adbc
testq %rax, %rax
je 0x1f7adb2
movq (%rdi), %rcx
shlq $0x4, %rax
addq %rcx, %rax
movq $0x0, (%rcx)
movl $0xffffffff, 0x... | /llvm/ADT/DenseMap.h |
llvm::DenseMapBase<llvm::DenseMap<llvm::SDValue, llvm::SDValue, llvm::DenseMapInfo<llvm::SDValue, void>, llvm::detail::DenseMapPair<llvm::SDValue, llvm::SDValue>>, llvm::SDValue, llvm::SDValue, llvm::DenseMapInfo<llvm::SDValue, void>, llvm::detail::DenseMapPair<llvm::SDValue, llvm::SDValue>>::find(llvm::SDValue const&) | iterator find(const_arg_type_t<KeyT> Val) {
BucketT *TheBucket;
if (LookupBucketFor(Val, TheBucket))
return makeIterator(TheBucket,
shouldReverseIterate<KeyT>() ? getBuckets()
: getBucketsEnd(),
*thi... | pushq %r14
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq %rsp, %r14
movq %r14, %rdx
callq 0x1f7ae80
movl 0x10(%rbx), %edx
shlq $0x5, %rdx
addq (%rbx), %rdx
testb %al, %al
movq (%r14), %rax
cmoveq %rdx, %rax
addq $0x8, %rsp
popq %rbx
popq %r14
retq
nop
| /llvm/ADT/DenseMap.h |
bool llvm::DenseMapBase<llvm::DenseMap<llvm::Instruction const*, llvm::DenseMap<llvm::Value const*, llvm::FunctionLoweringInfo::StatepointRelocationRecord, llvm::DenseMapInfo<llvm::Value const*, void>, llvm::detail::DenseMapPair<llvm::Value const*, llvm::FunctionLoweringInfo::StatepointRelocationRecord>>, llvm::DenseMa... | unsigned getNumBuckets() const {
return NumBuckets;
} | movl 0x10(%rdi), %ecx
testl %ecx, %ecx
je 0x1f7b5c9
pushq %rbx
movq (%rdi), %rdi
movl (%rsi), %r8d
movl %r8d, %eax
shrl $0x4, %eax
shrl $0x9, %r8d
xorl %eax, %r8d
decl %ecx
andl %ecx, %r8d
movl $0x1, %r10d
xorl %r9d, %r9d
movl %r8d, %ebx
shlq $0x5, %rbx
leaq (%rdi,%rbx), %r11
movq (%rdi,%rbx), %rbx
cmpq %rbx, (%rsi)
jn... | /llvm/ADT/DenseMap.h |
llvm::DenseMapBase<llvm::DenseMap<llvm::SDValue, int, llvm::DenseMapInfo<llvm::SDValue, void>, llvm::detail::DenseMapPair<llvm::SDValue, int>>, llvm::SDValue, int, llvm::DenseMapInfo<llvm::SDValue, void>, llvm::detail::DenseMapPair<llvm::SDValue, int>>::FindAndConstruct(llvm::SDValue const&) | value_type& FindAndConstruct(const KeyT &Key) {
BucketT *TheBucket;
if (LookupBucketFor(Key, TheBucket))
return *TheBucket;
return *InsertIntoBucket(TheBucket, Key);
} | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x8(%rsp), %r15
movq %r15, %rdx
callq 0x1f7b96a
movl %eax, %ecx
movq (%r15), %rax
testb %cl, %cl
jne 0x1f7b95f
movq %r14, %rdi
movq %rbx, %rsi
movq %rbx, %rdx
movq %rax, %rcx
callq 0x1f7ba16
movq (%rbx), %rcx
movq %rcx, (%rax)
movl 0... | /llvm/ADT/DenseMap.h |
bool llvm::DenseMapBase<llvm::DenseMap<llvm::SDValue, llvm::Register, llvm::DenseMapInfo<llvm::SDValue, void>, llvm::detail::DenseMapPair<llvm::SDValue, llvm::Register>>, llvm::SDValue, llvm::Register, llvm::DenseMapInfo<llvm::SDValue, void>, llvm::detail::DenseMapPair<llvm::SDValue, llvm::Register>>::LookupBucketFor<l... | unsigned getNumBuckets() const {
return NumBuckets;
} | movl 0x10(%rdi), %ecx
testl %ecx, %ecx
je 0x1f7bc80
pushq %rbp
pushq %rbx
movq (%rdi), %rdi
movq (%rsi), %rax
movq %rax, %r8
shrq $0x4, %r8
shrq $0x9, %rax
xorl %eax, %r8d
addl 0x8(%rsi), %r8d
decl %ecx
andl %ecx, %r8d
movl $0x1, %r10d
xorl %r9d, %r9d
movl %r8d, %r11d
leaq (%r11,%r11,2), %r11
leaq (%rdi,%r11,8), %r11
m... | /llvm/ADT/DenseMap.h |
llvm::DenseMap<llvm::SDValue, llvm::Register, llvm::DenseMapInfo<llvm::SDValue, void>, llvm::detail::DenseMapPair<llvm::SDValue, llvm::Register>>::grow(unsigned int) | void grow(unsigned AtLeast) {
unsigned OldNumBuckets = NumBuckets;
BucketT *OldBuckets = Buckets;
allocateBuckets(std::max<unsigned>(64, static_cast<unsigned>(NextPowerOf2(AtLeast-1))));
assert(Buckets);
if (!OldBuckets) {
this->BaseT::initEmpty();
return;
}
this->moveFromOldBu... | pushq %r15
pushq %r14
pushq %rbx
movq %rdi, %rbx
movl 0x10(%rdi), %r15d
decl %esi
movl %esi, %eax
shrl %eax
orl %esi, %eax
movl %eax, %ecx
shrl $0x2, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x4, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x8, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x10, %eax
orl %ecx, %eax
incl %ea... | /llvm/ADT/DenseMap.h |
llvm::detail::DenseMapPair<llvm::Value const*, llvm::FunctionLoweringInfo::StatepointRelocationRecord>* llvm::DenseMapBase<llvm::DenseMap<llvm::Value const*, llvm::FunctionLoweringInfo::StatepointRelocationRecord, llvm::DenseMapInfo<llvm::Value const*, void>, llvm::detail::DenseMapPair<llvm::Value const*, llvm::Functio... | BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup,
BucketT *TheBucket) {
incrementEpoch();
// If the load of the hash table is more than 3/4, or if fewer than 1/8 of
// the buckets are empty (meaning that many are filled with tombstones),
// grow th... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rcx, %rax
movq %rdx, %r14
movq %rdi, %rbx
movl 0x8(%rdi), %ecx
movl 0x10(%rdi), %esi
leal 0x4(,%rcx,4), %edx
leal (%rsi,%rsi,2), %edi
cmpl %edi, %edx
jae 0x1f7bfa1
notl %ecx
addl %esi, %ecx
subl 0xc(%rbx), %ecx
movl %esi, %edx
shrl $0x3, %edx
cmpl %edx, %ecx
jbe 0... | /llvm/ADT/DenseMap.h |
llvm::DenseMapBase<llvm::DenseMap<llvm::Value const*, llvm::FunctionLoweringInfo::StatepointRelocationRecord, llvm::DenseMapInfo<llvm::Value const*, void>, llvm::detail::DenseMapPair<llvm::Value const*, llvm::FunctionLoweringInfo::StatepointRelocationRecord>>, llvm::Value const*, llvm::FunctionLoweringInfo::StatepointR... | void moveFromOldBuckets(BucketT *OldBucketsBegin, BucketT *OldBucketsEnd) {
initEmpty();
// Insert all the old elements.
const KeyT EmptyKey = getEmptyKey();
const KeyT TombstoneKey = getTombstoneKey();
for (BucketT *B = OldBucketsBegin, *E = OldBucketsEnd; B != E; ++B) {
if (!KeyInfoT::isEqu... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x10, %rsp
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r15
movq $0x0, 0x8(%rdi)
movl 0x10(%rdi), %ecx
testq %rcx, %rcx
je 0x1f7c1e7
movq (%r15), %rax
movabsq $0xfffffffffffffff, %rdx # imm = 0xFFFFFFFFFFFFFFF
addq %rdx, %rcx
andq %rcx, %rdx
andl $0x1, %ecx
ne... | /llvm/ADT/DenseMap.h |
llvm::TargetLowering::SimplifyDemandedBits(llvm::SDValue, llvm::APInt const&, llvm::KnownBits&, llvm::TargetLowering::TargetLoweringOpt&, unsigned int, bool) const | bool TargetLowering::SimplifyDemandedBits(SDValue Op, const APInt &DemandedBits,
KnownBits &Known,
TargetLoweringOpt &TLO,
unsigned Depth,
bool AssumeSi... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
movq %r9, %r10
movq %r8, %rbx
movq %rcx, %r15
movl %edx, %ebp
movq %rsi, %r12
movq %rdi, %r13
movq 0x30(%rsi), %rcx
movl %edx, %edx
shlq $0x4, %rdx
movb (%rcx,%rdx), %al
movq 0x8(%rcx,%rdx), %rcx
movb %al, 0x18(%rsp)
movq %rcx, 0x20(%rsp... | /CodeGen/SelectionDAG/TargetLowering.cpp |
llvm::TargetLowering::SimplifyMultipleUseDemandedBits(llvm::SDValue, llvm::APInt const&, llvm::SelectionDAG&, unsigned int) const | SDValue TargetLowering::SimplifyMultipleUseDemandedBits(
SDValue Op, const APInt &DemandedBits, SelectionDAG &DAG,
unsigned Depth) const {
EVT VT = Op.getValueType();
// Since the number of lanes in a scalable vector is unknown at compile time,
// we track one bit which is implicitly broadcast to all lane... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x28, %rsp
movl %r9d, %r15d
movq %r8, %rbx
movq %rcx, %r14
movl %edx, %ebp
movq %rsi, %r12
movq %rdi, %r13
movq 0x30(%rsi), %rcx
movl %edx, %edx
shlq $0x4, %rdx
movb (%rcx,%rdx), %al
movq 0x8(%rcx,%rdx), %rcx
movb %al, 0x18(%rsp)
movq %rcx, 0x20(%r... | /CodeGen/SelectionDAG/TargetLowering.cpp |
bool llvm::any_of<llvm::iterator_range<llvm::SDNode::value_op_iterator>, llvm::TargetLowering::SimplifyDemandedVectorElts(llvm::SDValue, llvm::APInt const&, llvm::APInt&, llvm::APInt&, llvm::TargetLowering::TargetLoweringOpt&, unsigned int, bool) const::$_1>(llvm::iterator_range<llvm::SDNode::value_op_iterator>&&, llvm... | IteratorT begin() const { return begin_iterator; } | movq (%rdi), %rcx
movq 0x8(%rdi), %rax
movq %rax, %r8
subq %rcx, %r8
sarq $0x3, %r8
movabsq $-0x3333333333333333, %rdi # imm = 0xCCCCCCCCCCCCCCCD
imulq %rdi, %r8
sarq $0x2, %r8
testq %r8, %r8
jle 0x1f8f69d
movq (%rsi), %rdx
movq 0x28(%rdx), %rdx
movq (%rdx), %r9
movl 0x8(%rdx), %r11d
leaq (%r8,%r8,4), %r10
shlq $0x5, %... | /llvm/ADT/iterator_range.h |
llvm::TargetLowering::SimplifyDemandedBitsForTargetNode(llvm::SDValue, llvm::APInt const&, llvm::APInt const&, llvm::KnownBits&, llvm::TargetLowering::TargetLoweringOpt&, unsigned int) const | bool TargetLowering::SimplifyDemandedBitsForTargetNode(
SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts,
KnownBits &Known, TargetLoweringOpt &TLO, unsigned Depth) const {
assert((Op.getOpcode() >= ISD::BUILTIN_OP_END ||
Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
Op.getOp... | pushq %rax
movq %r9, %rcx
movl 0x18(%rsp), %eax
movq 0x10(%rsp), %r9
movq (%r9), %r9
movq (%rdi), %r10
movl %eax, (%rsp)
callq *0x780(%r10)
xorl %eax, %eax
popq %rcx
retq
nop
| /CodeGen/SelectionDAG/TargetLowering.cpp |
llvm::TargetLowering::SimplifyMultipleUseDemandedBitsForTargetNode(llvm::SDValue, llvm::APInt const&, llvm::APInt const&, llvm::SelectionDAG&, unsigned int) const | SDValue TargetLowering::SimplifyMultipleUseDemandedBitsForTargetNode(
SDValue Op, const APInt &DemandedBits, const APInt &DemandedElts,
SelectionDAG &DAG, unsigned Depth) const {
assert(
(Op.getOpcode() >= ISD::BUILTIN_OP_END ||
Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
Op.getOpcode() =... | xorl %eax, %eax
xorl %edx, %edx
retq
nop
| /CodeGen/SelectionDAG/TargetLowering.cpp |
llvm::TargetLowering::LowerAsmOperandForConstraint(llvm::SDValue, llvm::StringRef, std::vector<llvm::SDValue, std::allocator<llvm::SDValue>>&, llvm::SelectionDAG&) const | void TargetLowering::LowerAsmOperandForConstraint(SDValue Op,
StringRef Constraint,
std::vector<SDValue> &Ops,
SelectionDAG &DAG) const {
if (Constraint.size() > 1)
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x48, %rsp
movq %rsi, 0x38(%rsp)
movl %edx, 0x40(%rsp)
cmpq $0x1, %r8
jbe 0x1f98498
addq $0x48, %rsp
popq %rbx
popq %r12
popq %r13
popq %r14
popq %r15
popq %rbp
retq
movzbl (%rcx), %eax
leal -0x58(%rax), %ecx
cmpl $0x1b, %ecx
ja 0x1f98489
movl $0x8... | /CodeGen/SelectionDAG/TargetLowering.cpp |
llvm::TargetLowering::BuildSDIV(llvm::SDNode*, llvm::SelectionDAG&, bool, llvm::SmallVectorImpl<llvm::SDNode*>&) const | SDValue TargetLowering::BuildSDIV(SDNode *N, SelectionDAG &DAG,
bool IsAfterLegalization,
SmallVectorImpl<SDNode *> &Created) const {
SDLoc dl(N);
EVT VT = N->getValueType(0);
EVT SVT = VT.getScalarType();
EVT ShVT = getShiftAmountTy(VT, DAG.ge... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x6a8, %rsp # imm = 0x6A8
movq %r8, 0x158(%rsp)
movl %ecx, 0x88(%rsp)
movq %rdx, %rbx
movq %rsi, %r14
movq %rdi, %r12
movq 0x48(%rsi), %rsi
movq %rsi, 0x48(%rsp)
testq %rsi, %rsi
je 0x1f999b0
leaq 0x48(%rsp), %rdi
movl $0x1, %edx
callq 0... | /CodeGen/SelectionDAG/TargetLowering.cpp |
llvm::APInt::clearHighBits(unsigned int) | void clearHighBits(unsigned hiBits) {
assert(hiBits <= BitWidth && "More bits than bitwidth");
APInt Keep = getLowBitsSet(BitWidth, BitWidth - hiBits);
*this &= Keep;
} | pushq %rbp
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rdi, %rbx
movl 0x8(%rdi), %eax
movl %eax, %ebp
subl %esi, %ebp
movq %rsp, %r14
movq %r14, %rdi
movl %eax, %esi
xorl %edx, %edx
xorl %ecx, %ecx
callq 0x8ef112
movq %r14, %rdi
xorl %esi, %esi
movl %ebp, %edx
callq 0x92d706
cmpl $0x40, 0x8(%rbx)
ja 0x1fbf186
movq (%r... | /llvm/ADT/APInt.h |
llvm::DAGTypeLegalizer::SetSoftPromotedHalf(llvm::SDValue, llvm::SDValue) | void DAGTypeLegalizer::SetSoftPromotedHalf(SDValue Op, SDValue Result) {
assert(Result.getValueType() == MVT::i16 &&
"Invalid type for soft-promoted half");
AnalyzeNewValue(Result);
auto &OpIdEntry = SoftPromotedHalfs[getTableId(Op)];
assert((OpIdEntry == 0) && "Node is already promoted!");
OpIdEntr... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x20, %rsp
movl %edx, %ebx
movq %rsi, %r14
movq %rdi, %r15
leaq 0x10(%rsp), %r12
movq %rcx, (%r12)
movl %r8d, 0x8(%r12)
movq %r12, %rsi
callq 0x1fc2dda
leaq 0x3b0(%r15), %r13
movq %r15, %rdi
movq %r14, %rsi
movl %ebx, %edx
callq 0x1fc2e66
leaq 0xc(%rsp), %rsi... | /CodeGen/SelectionDAG/LegalizeTypes.cpp |
llvm::DAGTypeLegalizer::CustomLowerNode(llvm::SDNode*, llvm::EVT, bool) | bool DAGTypeLegalizer::CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult) {
// See if the target wants to custom lower this node.
if (TLI.getOperationAction(N->getOpcode(), VT) != TargetLowering::Custom)
return false;
SmallVector<SDValue, 8> Results;
if (LegalizeResult)
TLI.ReplaceNodeResults(N, R... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x98, %rsp
movq %rsi, %rbx
movq %rdi, %r14
movq (%rdi), %rdi
movl 0x18(%rsi), %eax
cmpq $0x1e4, %rax # imm = 0x1E4
ja 0x1fc3bbb
testb %dl, %dl
je 0x1fc3c48
leaq 0x10ea(%rdi), %rcx
movzbl %dl, %edx
imulq $0x1e5, %rdx, %rdx # imm = 0x... | /CodeGen/SelectionDAG/LegalizeTypes.cpp |
bool llvm::DenseMapBase<llvm::SmallDenseMap<unsigned int, llvm::SDValue, 8u, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, llvm::SDValue>>, unsigned int, llvm::SDValue, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, llvm::SDValue>>::LookupBucketFor<un... | const BucketT *getBuckets() const {
return Small ? getInlineBuckets() : getLargeRep()->Buckets;
} | leaq 0x8(%rdi), %rcx
testb $0x1, (%rdi)
cmoveq 0x8(%rdi), %rcx
movl $0x8, %r8d
cmovel 0x10(%rdi), %r8d
testl %r8d, %r8d
je 0x1fc49a2
pushq %rbx
movl (%rsi), %esi
leal (%rsi,%rsi,8), %eax
leal (%rsi,%rax,4), %edi
decl %r8d
andl %r8d, %edi
movl $0x1, %r10d
xorl %r9d, %r9d
movl %edi, %r11d
leaq (%r11,%r11,2), %r11
leaq (%... | /llvm/ADT/DenseMap.h |
llvm::SmallDenseMap<unsigned int, llvm::SDValue, 8u, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, llvm::SDValue>>::grow(unsigned int) | void grow(unsigned AtLeast) {
if (AtLeast > InlineBuckets)
AtLeast = std::max<unsigned>(64, NextPowerOf2(AtLeast-1));
if (Small) {
// First move the inline buckets into a temporary storage.
AlignedCharArrayUnion<BucketT[InlineBuckets]> TmpStorage;
BucketT *TmpBegin = reinterpret_cast<Bu... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
subq $0xc8, %rsp
movl %esi, %ebp
movq %rdi, %rbx
cmpl $0x9, %esi
jb 0x1fc4efe
decl %ebp
movl %ebp, %eax
shrl %eax
orl %ebp, %eax
movl %eax, %ecx
shrl $0x2, %ecx
orl %eax, %ecx
movl %ecx, %eax
shrl $0x4, %eax
orl %ecx, %eax
movl %eax, %ecx
shrl $0x8, %ecx
orl %eax, %ecx
movl %... | /llvm/ADT/DenseMap.h |
llvm::DAGTypeLegalizer::NoteDeletion(llvm::SDNode*, llvm::SDNode*) | void NoteDeletion(SDNode *Old, SDNode *New) {
assert(Old != New && "node replaced with self");
for (unsigned i = 0, e = Old->getNumValues(); i != e; ++i) {
TableId NewId = getTableId(SDValue(New, i));
TableId OldId = getTableId(SDValue(Old, i));
if (OldId != NewId) {
ReplacedValues[Ol... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x78, %rsp
movq %rdx, 0x60(%rsp)
movzwl 0x42(%rsi), %eax
movl %eax, (%rsp)
testl %eax, %eax
je 0x1fc539d
movq %rsi, %r14
movq %rdi, %r15
leaq 0x558(%rdi), %rax
movq %rax, 0x58(%rsp)
leaq 0x1a8(%rdi), %rax
movq %rax, 0x50(%rsp)
leaq 0x270(%rdi), %ra... | /CodeGen/SelectionDAG/LegalizeTypes.h |
llvm::DenseMapBase<llvm::SmallDenseMap<unsigned int, llvm::SDValue, 8u, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, llvm::SDValue>>, unsigned int, llvm::SDValue, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, llvm::SDValue>>::erase(unsigned int cons... | bool erase(const KeyT &Val) {
BucketT *TheBucket;
if (!LookupBucketFor(Val, TheBucket))
return false; // not in map.
TheBucket->getSecond().~ValueT();
TheBucket->getFirst() = getTombstoneKey();
decrementNumEntries();
incrementNumTombstones();
return true;
} | pushq %rbx
subq $0x10, %rsp
movq %rdi, %rbx
leaq 0x8(%rsp), %rdx
callq 0x1fc4918
testb %al, %al
je 0x1fc5477
movq 0x8(%rsp), %rcx
movl $0xfffffffe, (%rcx) # imm = 0xFFFFFFFE
addl $-0x2, (%rbx)
incl 0x4(%rbx)
addq $0x10, %rsp
popq %rbx
retq
nop
| /llvm/ADT/DenseMap.h |
llvm::DenseMapBase<llvm::SmallDenseMap<unsigned int, unsigned int, 8u, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, unsigned int>>, unsigned int, unsigned int, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, unsigned int>>::erase(unsigned int const&) | bool erase(const KeyT &Val) {
BucketT *TheBucket;
if (!LookupBucketFor(Val, TheBucket))
return false; // not in map.
TheBucket->getSecond().~ValueT();
TheBucket->getFirst() = getTombstoneKey();
decrementNumEntries();
incrementNumTombstones();
return true;
} | pushq %rbx
subq $0x10, %rsp
movq %rdi, %rbx
leaq 0x8(%rsp), %rdx
callq 0x1fc5510
testb %al, %al
je 0x1fc54a5
movq 0x8(%rsp), %rcx
movl $0xfffffffe, (%rcx) # imm = 0xFFFFFFFE
addl $-0x2, (%rbx)
incl 0x4(%rbx)
addq $0x10, %rsp
popq %rbx
retq
nop
| /llvm/ADT/DenseMap.h |
bool llvm::DenseMapBase<llvm::SmallDenseMap<unsigned int, unsigned int, 8u, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, unsigned int>>, unsigned int, unsigned int, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, unsigned int>>::LookupBucketFor<unsign... | const BucketT *getBuckets() const {
return Small ? getInlineBuckets() : getLargeRep()->Buckets;
} | leaq 0x8(%rdi), %rcx
testb $0x1, (%rdi)
cmoveq 0x8(%rdi), %rcx
movl $0x8, %r8d
cmovel 0x10(%rdi), %r8d
testl %r8d, %r8d
je 0x1fc5596
pushq %rbx
movl (%rsi), %esi
leal (%rsi,%rsi,8), %eax
leal (%rsi,%rax,4), %edi
decl %r8d
andl %r8d, %edi
movl $0x1, %r10d
xorl %r9d, %r9d
movl %edi, %r11d
leaq (%rcx,%r11,8), %r11
movl (%... | /llvm/ADT/DenseMap.h |
llvm::DenseMapBase<llvm::SmallDenseMap<unsigned int, std::pair<unsigned int, unsigned int>, 8u, llvm::DenseMapInfo<unsigned int, void>, llvm::detail::DenseMapPair<unsigned int, std::pair<unsigned int, unsigned int>>>, unsigned int, std::pair<unsigned int, unsigned int>, llvm::DenseMapInfo<unsigned int, void>, llvm::det... | value_type& FindAndConstruct(KeyT &&Key) {
BucketT *TheBucket;
if (LookupBucketFor(Key, TheBucket))
return *TheBucket;
return *InsertIntoBucket(TheBucket, std::move(Key));
} | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rsi, %rbx
movq %rdi, %r14
leaq 0x8(%rsp), %r15
movq %r15, %rdx
callq 0x1fc55a2
movl %eax, %ecx
movq (%r15), %rax
testb %cl, %cl
jne 0x1fc5f9c
movq %r14, %rdi
movq %rbx, %rsi
movq %rbx, %rdx
movq %rax, %rcx
callq 0x1fc5fa6
movl (%rbx), %ecx
movl %ecx, (%rax)
movq $... | /llvm/ADT/DenseMap.h |
llvm::detail::DenseMapPair<llvm::SDValue, llvm::SDValue>* llvm::DenseMapBase<llvm::SmallDenseMap<llvm::SDValue, llvm::SDValue, 64u, llvm::DenseMapInfo<llvm::SDValue, void>, llvm::detail::DenseMapPair<llvm::SDValue, llvm::SDValue>>, llvm::SDValue, llvm::SDValue, llvm::DenseMapInfo<llvm::SDValue, void>, llvm::detail::Den... | BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup,
BucketT *TheBucket) {
incrementEpoch();
// If the load of the hash table is more than 3/4, or if fewer than 1/8 of
// the buckets are empty (meaning that many are filled with tombstones),
// grow th... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rcx, %rax
movq %rdx, %r14
movq %rdi, %rbx
movl (%rdi), %edx
movl %edx, %ecx
shrl %ecx
movl $0x40, %esi
testb $0x1, %dl
jne 0x1fcd5df
movl 0x10(%rbx), %esi
leal 0x4(,%rcx,4), %edx
leal (%rsi,%rsi,2), %edi
cmpl %edi, %edx
jae 0x1fcd619
notl %ecx
addl %esi, %ecx
subl... | /llvm/ADT/DenseMap.h |
(anonymous namespace)::VectorLegalizer::ExpandSIGN_EXTEND_VECTOR_INREG(llvm::SDNode*) | SDValue VectorLegalizer::ExpandSIGN_EXTEND_VECTOR_INREG(SDNode *Node) {
SDLoc DL(Node);
EVT VT = Node->getValueType(0);
SDValue Src = Node->getOperand(0);
EVT SrcVT = Src.getValueType();
// First build an any-extend node which can be legalized above when we
// recurse through it.
SDValue Op = DAG.getNode... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xa8, %rsp
movq %rsi, %r12
movq %rdi, %r14
movq 0x48(%rsi), %rsi
movq %rsi, 0x28(%rsp)
testq %rsi, %rsi
je 0x1fcde16
leaq 0x28(%rsp), %rdi
movl $0x1, %edx
callq 0x1a648a8
movl 0x44(%r12), %eax
leaq 0x28(%rsp), %rbp
movl %eax, 0x8(%rbp)
movq 0x30(%r... | /CodeGen/SelectionDAG/LegalizeVectorOps.cpp |
(anonymous namespace)::VectorLegalizer::ExpandFNEG(llvm::SDNode*) | SDValue VectorLegalizer::ExpandFNEG(SDNode *Node) {
if (TLI.isOperationLegalOrCustom(ISD::FSUB, Node->getValueType(0))) {
SDLoc DL(Node);
SDValue Zero = DAG.getConstantFP(-0.0, DL, Node->getValueType(0));
// TODO: If FNEG had fast-math-flags, they'd get propagated to this FSUB.
return DAG.getNode(ISD:... | pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
subq $0x48, %rsp
movq %rsi, %rbx
movq %rdi, %r14
movq 0x8(%rdi), %rdi
movq 0x30(%rsi), %rax
movq 0x8(%rax), %rcx
movl (%rax), %edx
movl $0x61, %esi
xorl %r8d, %r8d
callq 0x8f30ba
testb %al, %al
je 0x1fcfda3
movq 0x48(%rbx), %rsi
movq %rsi, 0x28(%rsp)
testq %rsi, %rsi
je 0x1fc... | /CodeGen/SelectionDAG/LegalizeVectorOps.cpp |
llvm::DAGTypeLegalizer::ScalarizeVecRes_ExpOp(llvm::SDNode*) | SDValue DAGTypeLegalizer::ScalarizeVecRes_ExpOp(SDNode *N) {
SDValue Op = GetScalarizedVector(N->getOperand(0));
return DAG.getNode(N->getOpcode(), SDLoc(N), Op.getValueType(), Op,
N->getOperand(1));
} | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x48, %rsp
movq %rsi, %rbx
movq %rdi, %r14
movq 0x28(%rsi), %rax
movq (%rax), %rsi
movl 0x8(%rax), %edx
callq 0x1fd554e
movq %rax, %r15
movl %edx, %r12d
movq 0x8(%r14), %r14
movl 0x18(%rbx), %ebp
movq 0x48(%rbx), %rsi
movq %rsi, 0x28(%rsp)
testq %r... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(llvm::SDNode*) | SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
// If the operand is wider than the vector element type then it is implicitly
// truncated. Make that explicit here.
EVT EltVT = N->getValueType(0).getVectorElementType();
SDValue InOp = N->getOperand(0);
if (InOp.getValueType() != EltVT... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x48, %rsp
movq %rsi, %rbx
movq %rdi, %r12
movq 0x30(%rsi), %rcx
movzbl (%rcx), %eax
movq 0x8(%rcx), %rcx
movb %al, 0x10(%rsp)
movq %rcx, 0x18(%rsp)
testq %rax, %rax
je 0x1fd2c92
leaq 0x11baeb8(%rip), %rcx # 0x318db40
movb -0x1(%rax,%rcx), %bpl
x... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::ScalarizeVecRes_VSELECT(llvm::SDNode*) | SDValue DAGTypeLegalizer::ScalarizeVecRes_VSELECT(SDNode *N) {
SDValue Cond = N->getOperand(0);
EVT OpVT = Cond.getValueType();
SDLoc DL(N);
// The vselect result and true/value operands needs scalarizing, but it's
// not a given that the Cond does. For instance, in AVX512 v1i1 is legal.
// See the similar ... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x128, %rsp # imm = 0x128
movq %rsi, %r14
movq %rdi, %rbx
movq 0x28(%rsi), %rax
movq (%rax), %r12
movl 0x8(%rax), %r15d
movl 0xc(%rax), %eax
movl %eax, 0x34(%rsp)
movq 0x30(%r12), %rax
movq %r15, %rcx
shlq $0x4, %rcx
movb (%rax,%rcx), %d... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::ScalarizeVecRes_SELECT(llvm::SDNode*) | SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
SDValue LHS = GetScalarizedVector(N->getOperand(1));
return DAG.getSelect(SDLoc(N),
LHS.getValueType(), N->getOperand(0), LHS,
GetScalarizedVector(N->getOperand(2)));
} | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x68, %rsp
movq %rsi, %r12
movq %rdi, %r14
movq 0x28(%rsi), %rax
movq 0x28(%rax), %rsi
movl 0x30(%rax), %edx
callq 0x1fd554e
movq %rax, %r13
movl %edx, %ebp
movq 0x8(%r14), %rax
movq %rax, 0x40(%rsp)
movq 0x48(%r12), %rsi
movq %rsi, 0x28(%rsp)
test... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(llvm::SDNode*) | SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
// Figure out if the scalar is the LHS or RHS and return it.
SDValue Arg = N->getOperand(2).getOperand(0);
if (Arg.isUndef())
return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
unsigned Op = !cast<ConstantSDNode>(Arg)->isZero... | pushq %rbp
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rdi, %rbx
movq 0x28(%rsi), %r14
movq 0x50(%r14), %rax
movq 0x28(%rax), %rax
movq (%rax), %rax
cmpl $0x33, 0x18(%rax)
jne 0x1fd3af5
movq 0x8(%rbx), %rbx
movq 0x30(%rsi), %rcx
movzbl (%rcx), %eax
movq 0x8(%rcx), %rcx
movb %al, (%rsp)
movq %rcx, 0x8(%rsp)
testq %rax,... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::ScalarizeVecRes_TernaryOp(llvm::SDNode*) | SDValue DAGTypeLegalizer::ScalarizeVecRes_TernaryOp(SDNode *N) {
SDValue Op0 = GetScalarizedVector(N->getOperand(0));
SDValue Op1 = GetScalarizedVector(N->getOperand(1));
SDValue Op2 = GetScalarizedVector(N->getOperand(2));
return DAG.getNode(N->getOpcode(), SDLoc(N), Op0.getValueType(), Op0, Op1,
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x88, %rsp
movq %rsi, %rbx
movq %rdi, %r15
movq 0x28(%rsi), %rax
movq (%rax), %rsi
movl 0x8(%rax), %edx
callq 0x1fd554e
movq %rax, %r14
movl %edx, %ebp
movq 0x28(%rbx), %rax
movq 0x28(%rax), %rsi
movl 0x30(%rax), %edx
movq %r15, %rdi
callq 0x1fd554... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::ScalarizeVecOp_VSETCC(llvm::SDNode*) | SDValue DAGTypeLegalizer::ScalarizeVecOp_VSETCC(SDNode *N) {
assert(N->getValueType(0).isVector() &&
N->getOperand(0).getValueType().isVector() &&
"Operand types must be vectors");
assert(N->getValueType(0) == MVT::v1i1 && "Expected v1i1 type");
EVT VT = N->getValueType(0);
SDValue LHS = GetS... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xb8, %rsp
movq %rsi, %r14
movq %rdi, %rbx
movq 0x30(%rsi), %rax
movb (%rax), %cl
movq 0x8(%rax), %rax
movb %cl, 0x48(%rsp)
movq %rax, 0x50(%rsp)
movq 0x28(%rsi), %rax
movq (%rax), %rsi
movl 0x8(%rax), %edx
callq 0x1fd554e
movq %rax, 0x58(%rsp)
mov... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::ScalarizeVecOp_CMP(llvm::SDNode*) | SDValue DAGTypeLegalizer::ScalarizeVecOp_CMP(SDNode *N) {
SDValue LHS = GetScalarizedVector(N->getOperand(0));
SDValue RHS = GetScalarizedVector(N->getOperand(1));
EVT ResVT = N->getValueType(0).getVectorElementType();
SDValue Cmp = DAG.getNode(N->getOpcode(), SDLoc(N), ResVT, LHS, RHS);
return DAG.getNode(I... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x78, %rsp
movq %rsi, %rbx
movq %rdi, %r14
movq 0x28(%rsi), %rax
movq (%rax), %rsi
movl 0x8(%rax), %edx
callq 0x1fd554e
movq %rax, 0x40(%rsp)
movl %edx, 0x34(%rsp)
movq 0x28(%rbx), %rax
movq 0x28(%rax), %rsi
movl 0x30(%rax), %edx
movq %r14, %rdi
ca... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(llvm::SDNode*, llvm::SDValue&, llvm::SDValue&) | void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
SDValue &Hi) {
assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
SDLoc dl(N);
unsigned NumSubvectors = N->getNumOperands() / 2;
if (NumSubvectors == 1) {
Lo = N->getO... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x178, %rsp # imm = 0x178
movq %rcx, %rbx
movq %rdx, %r12
movq %rsi, %r15
movq %rdi, %r14
movq 0x48(%rsi), %rsi
movq %rsi, 0x18(%rsp)
testq %rsi, %rsi
je 0x1fd76b4
leaq 0x18(%rsp), %rdi
movl $0x1, %edx
callq 0x1a648a8
movl 0x44(%r15), %e... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::SplitVecRes_FPOp_MultiType(llvm::SDNode*, llvm::SDValue&, llvm::SDValue&) | void DAGTypeLegalizer::SplitVecRes_FPOp_MultiType(SDNode *N, SDValue &Lo,
SDValue &Hi) {
SDValue LHSLo, LHSHi;
GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
SDLoc DL(N);
SDValue RHSLo, RHSHi;
SDValue RHS = N->getOperand(1);
EVT RHSVT = RHS.getValueType();... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xc8, %rsp
movq %rcx, 0x80(%rsp)
movq %rdx, %r12
movq %rsi, %r14
movq %rdi, %r15
xorl %ebx, %ebx
leaq 0x50(%rsp), %rcx
movq %rbx, (%rcx)
movl %ebx, 0x8(%rcx)
leaq 0x40(%rsp), %r8
movq %rbx, (%r8)
movl %ebx, 0x8(%r8)
movq 0x28(%rsi), %rax
movq (%rax... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::SplitVecRes_StrictFPOp(llvm::SDNode*, llvm::SDValue&, llvm::SDValue&) | void DAGTypeLegalizer::SplitVecRes_StrictFPOp(SDNode *N, SDValue &Lo,
SDValue &Hi) {
unsigned NumOps = N->getNumOperands();
SDValue Chain = N->getOperand(0);
EVT LoVT, HiVT;
SDLoc dl(N);
std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
SmallVecto... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x1d8, %rsp # imm = 0x1D8
movq %rcx, 0xb0(%rsp)
movq %rdx, 0xb8(%rsp)
movq %rdi, %r14
movzwl 0x40(%rsi), %eax
movq %rax, 0x38(%rsp)
movq 0x28(%rsi), %rax
movq (%rax), %rbx
movl 0x8(%rax), %ebp
movq %rsi, 0x40(%rsp)
movq 0x48(%rsi), %rsi
... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::SplitVecRes_FIX(llvm::SDNode*, llvm::SDValue&, llvm::SDValue&) | void DAGTypeLegalizer::SplitVecRes_FIX(SDNode *N, SDValue &Lo, SDValue &Hi) {
SDValue LHSLo, LHSHi;
GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
SDValue RHSLo, RHSHi;
GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
SDLoc dl(N);
SDValue Op2 = N->getOperand(2);
unsigned Opcode = N->getOpcode();
Lo = D... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x98, %rsp
movq %rcx, %rbx
movq %rdx, %r15
movq %rsi, %r14
movq %rdi, %r12
xorl %r13d, %r13d
leaq 0x50(%rsp), %rcx
movq %r13, (%rcx)
movl %r13d, 0x8(%rcx)
leaq 0x40(%rsp), %r8
movq %r13, (%r8)
movl %r13d, 0x8(%r8)
movq 0x28(%rsi), %rax
movq (%rax),... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::SplitVecOp_FPOpDifferentTypes(llvm::SDNode*) | SDValue DAGTypeLegalizer::SplitVecOp_FPOpDifferentTypes(SDNode *N) {
SDLoc DL(N);
EVT LHSLoVT, LHSHiVT;
std::tie(LHSLoVT, LHSHiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
if (!isTypeLegal(LHSLoVT) || !isTypeLegal(LHSHiVT))
return DAG.UnrollVectorOp(N, N->getValueType(0).getVectorNumElements());
SDVa... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x108, %rsp # imm = 0x108
movq %rsi, %rbx
movq %rdi, %r14
movq 0x48(%rsi), %rsi
movq %rsi, 0x58(%rsp)
testq %rsi, %rsi
je 0x1fe3904
leaq 0x58(%rsp), %rdi
movl $0x1, %edx
callq 0x1a648a8
movl 0x44(%rbx), %eax
movl %eax, 0x60(%rsp)
xorl %r... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::WidenVectorResult(llvm::SDNode*, unsigned int) | void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
LLVM_DEBUG(dbgs() << "Widen node result " << ResNo << ": "; N->dump(&DAG));
// See if the target wants to custom widen this node.
if (CustomWidenLowerNode(N, N->getValueType(ResNo)))
return;
SDValue Res = SDValue();
auto unrollExpand... | pushq %r14
pushq %rbx
subq $0x38, %rsp
movl %edx, %ebx
movq %rdi, %r14
movq %rsi, 0x18(%rsp)
movq 0x30(%rsi), %rax
movl %edx, %edx
shlq $0x4, %rdx
movq 0x8(%rax,%rdx), %rcx
movl (%rax,%rdx), %edx
callq 0x1fc3c5e
testb %al, %al
jne 0x1fe7832
xorps %xmm0, %xmm0
movq %rsp, %rax
movaps %xmm0, (%rax)
leaq 0x18(%rsp), %rcx
m... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::WidenVecRes_BITCAST(llvm::SDNode*) | SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
SDValue InOp = N->getOperand(0);
EVT InVT = InOp.getValueType();
EVT VT = N->getValueType(0);
EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
SDLoc dl(N);
switch (getTypeAction(InVT)) {
case TargetLowering::TypeLegal:
break;
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x258, %rsp # imm = 0x258
movq %rsi, %r12
movq %rdi, %rbx
movq 0x28(%rsi), %rax
movq (%rax), %r15
movl 0x8(%rax), %r13d
movl 0xc(%rax), %ebp
movq 0x30(%r15), %rax
movq %r13, %rcx
shlq $0x4, %rcx
movb (%rax,%rcx), %dl
movq 0x8(%rax,%rcx),... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::WidenVecRes_LOAD(llvm::SDNode*) | SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
LoadSDNode *LD = cast<LoadSDNode>(N);
ISD::LoadExtType ExtType = LD->getExtensionType();
// A vector must always be stored in memory as-is, i.e. without any padding
// between the elements, since various code depend on it, e.g. in the
// handling of a b... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x238, %rsp # imm = 0x238
movq %rsi, %rbx
movq %rdi, %r14
movzwl 0x1e(%rsi), %ebp
movb 0x58(%rsi), %al
movq 0x60(%rsi), %rcx
leaq 0x120(%rsp), %r15
movb %al, (%r15)
movq %rcx, 0x8(%r15)
movq %r15, %rdi
callq 0xb77d1c
testb %al, %al
je 0x... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::WidenVecRes_VP_GATHER(llvm::VPGatherSDNode*) | SDValue DAGTypeLegalizer::WidenVecRes_VP_GATHER(VPGatherSDNode *N) {
EVT WideVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
SDValue Mask = N->getMask();
SDValue Scale = N->getScale();
ElementCount WideEC = WideVT.getVectorElementCount();
SDLoc dl(N);
SDValue Index = GetWidenedVector(... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xe8, %rsp
movq %rsi, %rbx
movq %rdi, %r14
movq (%rdi), %rdi
movq 0x8(%r14), %rax
movq 0x40(%rax), %rsi
movq 0x30(%rbx), %rax
movq 0x8(%rax), %rcx
movq (%rdi), %r8
movl (%rax), %edx
callq *0x240(%r8)
leaq 0x70(%rsp), %rdi
movb %al, (%rdi)
movq %rdx... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::WidenVecRes_VECTOR_REVERSE(llvm::SDNode*) | SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_REVERSE(SDNode *N) {
EVT VT = N->getValueType(0);
EVT EltVT = VT.getVectorElementType();
SDLoc dl(N);
EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
SDValue OpValue = GetWidenedVector(N->getOperand(0));
assert(WidenVT == OpValue.getValueType() &&... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x138, %rsp # imm = 0x138
movq %rsi, %r14
movq %rdi, %rbp
movq 0x30(%rsi), %rcx
movzbl (%rcx), %eax
movq 0x8(%rcx), %rcx
movb %al, 0x68(%rsp)
movq %rcx, 0x70(%rsp)
testq %rax, %rax
je 0x1feb6b1
leaq 0x11a249f(%rip), %rcx # 0x318db40
mo... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::WidenVecRes_Binary(llvm::SDNode*) | SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
// Binary op widening.
SDLoc dl(N);
EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
SDValue InOp1 = GetWidenedVector(N->getOperand(0));
SDValue InOp2 = GetWidenedVector(N->getOperand(1));
if (N->getNumOperands() == 2)
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0xc8, %rsp
movq %rsi, %rbx
movq %rdi, %r14
movq 0x48(%rsi), %rsi
movq %rsi, 0x30(%rsp)
testq %rsi, %rsi
je 0x1febacc
leaq 0x30(%rsp), %rdi
movl $0x1, %edx
callq 0x1a648a8
movl 0x44(%rbx), %eax
movl %eax, 0x38(%rsp)
movq (%r14), %rdi
movq 0x8(%r14),... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::WidenVecRes_UnarySameEltsWithScalarArg(llvm::SDNode*) | SDValue DAGTypeLegalizer::WidenVecRes_UnarySameEltsWithScalarArg(SDNode *N) {
SDValue FpValue = N->getOperand(0);
EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
if (getTypeAction(FpValue.getValueType()) != TargetLowering::TypeWidenVector)
return DAG.UnrollVectorOp(N, WidenVT.ge... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x68, %rsp
movq %rsi, %rbx
movq %rdi, %r14
movq 0x28(%rsi), %rax
movq (%rax), %r12
movl 0x8(%rax), %r13d
movq (%rdi), %rdi
movq 0x8(%r14), %rax
movq 0x40(%rax), %rsi
movq 0x30(%rbx), %rax
movq 0x8(%rax), %rcx
movq (%rdi), %r8
movl (%rax), %edx
call... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(llvm::SDNode*) | SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
SDValue InOp = GetWidenedVector(N->getOperand(0));
return DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(N),
N->getValueType(0), InOp, N->getOperand(1));
} | pushq %rbp
pushq %r15
pushq %r14
pushq %r12
pushq %rbx
subq $0x40, %rsp
movq %rsi, %rbx
movq %rdi, %r14
movq 0x28(%rsi), %rax
movq (%rax), %rsi
movl 0x8(%rax), %edx
callq 0x1fef2b6
movq %rax, %r15
movl %edx, %ebp
movq 0x8(%r14), %r14
movq 0x48(%rbx), %rsi
movq %rsi, 0x20(%rsp)
testq %rsi, %rsi
je 0x1ff3977
leaq 0x20(%r... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::WidenVecOp_VECREDUCE_SEQ(llvm::SDNode*) | SDValue DAGTypeLegalizer::WidenVecOp_VECREDUCE_SEQ(SDNode *N) {
SDLoc dl(N);
SDValue AccOp = N->getOperand(0);
SDValue VecOp = N->getOperand(1);
SDValue Op = GetWidenedVector(VecOp);
EVT OrigVT = VecOp.getValueType();
EVT WideVT = Op.getValueType();
EVT ElemVT = OrigVT.getVectorElementType();
SDNodeFla... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x138, %rsp # imm = 0x138
movq %rsi, %r15
movq %rdi, %r12
movq 0x48(%rsi), %rsi
movq %rsi, 0x50(%rsp)
testq %rsi, %rsi
je 0x1ff72bc
leaq 0x50(%rsp), %rdi
movl $0x1, %edx
callq 0x1a648a8
movl 0x44(%r15), %eax
movl %eax, 0x58(%rsp)
movq 0x... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
llvm::DAGTypeLegalizer::WidenVecOp_VP_CttzElements(llvm::SDNode*) | SDValue DAGTypeLegalizer::WidenVecOp_VP_CttzElements(SDNode *N) {
SDLoc DL(N);
SDValue Source = GetWidenedVector(N->getOperand(0));
EVT SrcVT = Source.getValueType();
SDValue Mask =
GetWidenedMask(N->getOperand(1), SrcVT.getVectorElementCount());
return DAG.getNode(N->getOpcode(), DL, N->getValueType(0... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x78, %rsp
movq %rsi, %rbx
movq %rdi, %r15
movq 0x48(%rsi), %rsi
movq %rsi, 0x18(%rsp)
testq %rsi, %rsi
je 0x1ff77ef
leaq 0x18(%rsp), %rdi
movl $0x1, %edx
callq 0x1a648a8
movl 0x44(%rbx), %eax
leaq 0x18(%rsp), %rcx
movl %eax, 0x8(%rcx)
movq 0x28(%r... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
BuildVectorFromScalar(llvm::SelectionDAG&, llvm::EVT, llvm::SmallVectorImpl<llvm::SDValue>&, unsigned int, unsigned int) | static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
SmallVectorImpl<SDValue> &LdOps,
unsigned Start, unsigned End) {
SDLoc dl(LdOps[Start]);
EVT LdTy = LdOps[Start].getValueType();
unsigned Width = VecTy.getSizeInBits();
un... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x118, %rsp # imm = 0x118
movl %r9d, 0x3c(%rsp)
movl %r8d, %ebp
movq %rcx, %r13
movq %rdi, 0x50(%rsp)
movb %sil, 0x98(%rsp)
movq %rdx, 0xa0(%rsp)
movl %r8d, %ebx
movq (%rcx), %rax
shlq $0x4, %rbx
movq (%rax,%rbx), %r14
movq 0x48(%r14), %... | /CodeGen/SelectionDAG/LegalizeVectorTypes.cpp |
bool llvm::DenseMapBase<llvm::DenseMap<std::pair<llvm::SDValue, llvm::SDValue>, unsigned int, llvm::DenseMapInfo<std::pair<llvm::SDValue, llvm::SDValue>, void>, llvm::detail::DenseMapPair<std::pair<llvm::SDValue, llvm::SDValue>, unsigned int>>, std::pair<llvm::SDValue, llvm::SDValue>, unsigned int, llvm::DenseMapInfo<s... | unsigned getNumBuckets() const {
return NumBuckets;
} | movl 0x10(%rdi), %ecx
testl %ecx, %ecx
je 0x1ff8e8b
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
movq (%rsi), %rax
movq 0x10(%rsi), %r8
movq %rax, %r9
shrq $0x4, %r9
shrq $0x9, %rax
xorl %eax, %r9d
addl 0x8(%rsi), %r9d
movq %r8, %rax
shrq $0x4, %rax
shrq $0x9, %r8
xorl %r8d, %eax
addl 0x18(%rsi), %eax
movq (%rdi), %rdi
... | /llvm/ADT/DenseMap.h |
llvm::SmallVectorTemplateBase<std::pair<std::pair<llvm::SDValue, llvm::SDValue>, llvm::SmallVector<unsigned int, 12u>>, false>::moveElementsForGrow(std::pair<std::pair<llvm::SDValue, llvm::SDValue>, llvm::SmallVector<unsigned int, 12u>>*) | void SmallVectorTemplateBase<T, TriviallyCopyable>::moveElementsForGrow(
T *NewElts) {
// Move the elements over.
this->uninitialized_move(this->begin(), this->end(), NewElts);
// Destroy the original elements.
destroy_range(this->begin(), this->end());
} | pushq %r15
pushq %r14
pushq %rbx
movq %rsi, %rdx
movq %rdi, %rbx
movq (%rdi), %rdi
movl 0x8(%rbx), %eax
leaq (%rax,%rax,2), %rsi
shlq $0x5, %rsi
addq %rdi, %rsi
callq 0x1ff920e
movl 0x8(%rbx), %eax
testq %rax, %rax
je 0x1ff9207
movq (%rbx), %rbx
leaq -0x30(%rbx), %r14
shlq $0x5, %rax
leaq (%rax,%rax,2), %r15
movq -0x40... | /llvm/ADT/SmallVector.h |
llvm::SmallVectorTemplateBase<llvm::SmallVector<std::pair<unsigned int, int>, 2u>, false>::moveElementsForGrow(llvm::SmallVector<std::pair<unsigned int, int>, 2u>*) | void SmallVectorTemplateBase<T, TriviallyCopyable>::moveElementsForGrow(
T *NewElts) {
// Move the elements over.
this->uninitialized_move(this->begin(), this->end(), NewElts);
// Destroy the original elements.
destroy_range(this->begin(), this->end());
} | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movq %rdi, %rbx
movl 0x8(%rdi), %r12d
testq %r12, %r12
je 0x1ff936c
movq %rsi, %r14
movq (%rbx), %r15
shlq $0x5, %r12
movabsq $0x200000000, %r13 # imm = 0x200000000
leaq 0x10(%r14), %rax
movq %rax, (%r14)
movq %r13, 0x8(%r14)
cmpl $0x0, 0x8(%r15)
je 0x1ff935e
... | /llvm/ADT/SmallVector.h |
(anonymous namespace)::ScheduleDAGLinearize::ScheduleNode(llvm::SDNode*) | void ScheduleDAGLinearize::ScheduleNode(SDNode *N) {
if (N->getNodeId() != 0)
llvm_unreachable(nullptr);
if (!N->isMachineOpcode() &&
(N->getOpcode() == ISD::EntryToken || isPassiveNode(N)))
// These nodes do not need to be translated into MIs.
return;
LLVM_DEBUG(dbgs() << "\n*** Scheduling: "... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
pushq %rax
movq %rdi, %rbx
movq %rsi, (%rsp)
movl 0x18(%rsi), %eax
testl %eax, %eax
js 0x1ffc3ea
cmpl $0x1, %eax
je 0x1ffc4c7
movq %rsi, %rdi
callq 0x1ffc390
testb %al, %al
jne 0x1ffc4c7
movq 0x280(%rbx), %rsi
cmpq 0x288(%rbx), %rsi
je 0x1ffc40b
movq (%r... | /CodeGen/SelectionDAG/ScheduleDAGFast.cpp |
llvm::detail::DenseMapPair<llvm::SDNode*, llvm::SDNode*>* llvm::DenseMapBase<llvm::DenseMap<llvm::SDNode*, llvm::SDNode*, llvm::DenseMapInfo<llvm::SDNode*, void>, llvm::detail::DenseMapPair<llvm::SDNode*, llvm::SDNode*>>, llvm::SDNode*, llvm::SDNode*, llvm::DenseMapInfo<llvm::SDNode*, void>, llvm::detail::DenseMapPair<... | BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup,
BucketT *TheBucket) {
incrementEpoch();
// If the load of the hash table is more than 3/4, or if fewer than 1/8 of
// the buckets are empty (meaning that many are filled with tombstones),
// grow th... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rcx, %rax
movq %rdx, %r14
movq %rdi, %rbx
movl 0x8(%rdi), %ecx
movl 0x10(%rdi), %esi
leal 0x4(,%rcx,4), %edx
leal (%rsi,%rsi,2), %edi
cmpl %edi, %edx
jae 0x1ffc639
notl %ecx
addl %esi, %ecx
subl 0xc(%rbx), %ecx
movl %esi, %edx
shrl $0x3, %edx
cmpl %edx, %ecx
jbe 0... | /llvm/ADT/DenseMap.h |
llvm::createILPListDAGScheduler(llvm::SelectionDAGISel*, llvm::CodeGenOptLevel) | ScheduleDAGSDNodes *llvm::createILPListDAGScheduler(SelectionDAGISel *IS,
CodeGenOptLevel OptLevel) {
const TargetSubtargetInfo &STI = IS->MF->getSubtarget();
const TargetInstrInfo *TII = STI.getInstrInfo();
const TargetRegisterInfo *TRI = STI.getRegisterInfo();... | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x10, %rsp
movq %rdi, %rbx
movq 0x28(%rdi), %rax
movq 0x10(%rax), %r14
movq (%r14), %rax
movq %r14, %rdi
callq *0x80(%rax)
movq %rax, %r15
movq (%r14), %rax
movq %r14, %rdi
callq *0xc8(%rax)
movq %rax, %r14
movq 0x78(%rbx), %r13
movl $0xb0, %edi
callq 0x75194... | /CodeGen/SelectionDAG/ScheduleDAGRRList.cpp |
(anonymous namespace)::ScheduleDAGRRList::AdvanceToCycle(unsigned int) | void ScheduleDAGRRList::AdvanceToCycle(unsigned NextCycle) {
if (NextCycle <= CurCycle)
return;
IssueCount = 0;
AvailableQueue->setCurCycle(NextCycle);
if (!HazardRec->isEnabled()) {
// Bypass lots of virtual calls in case of long latency.
CurCycle = NextCycle;
}
else {
for (; CurCycle != N... | cmpl %esi, 0x2a8(%rdi)
jae 0x1fff5b2
pushq %rbp
pushq %rbx
pushq %rax
movl %esi, %ebp
movq %rdi, %rbx
movl $0x0, 0x2b0(%rdi)
movq 0x280(%rdi), %rax
movl %esi, 0x8(%rax)
movq 0x2a0(%rdi), %rax
cmpl $0x0, 0x8(%rax)
je 0x1fff5b3
cmpl %ebp, 0x2a8(%rbx)
je 0x1fff5b9
movq 0x2a0(%rbx), %rdi
movq (%rdi), %rax
callq *0x58(%rax)... | /CodeGen/SelectionDAG/ScheduleDAGRRList.cpp |
std::pair<llvm::SUnit*, llvm::SDep>& llvm::SmallVectorImpl<std::pair<llvm::SUnit*, llvm::SDep>>::emplace_back<llvm::SUnit*&, llvm::SDep&>(llvm::SUnit*&, llvm::SDep&) | size_t size() const { return Size; } | movl 0x8(%rdi), %eax
cmpl 0xc(%rdi), %eax
jae 0x2000812
movq (%rdi), %rcx
leaq (%rax,%rax,2), %rax
movq (%rsi), %rsi
movq %rsi, (%rcx,%rax,8)
movups (%rdx), %xmm0
movups %xmm0, 0x8(%rcx,%rax,8)
movl 0x8(%rdi), %eax
incl %eax
movl %eax, 0x8(%rdi)
movq (%rdi), %rcx
leaq (%rax,%rax,2), %rax
leaq (%rcx,%rax,8), %rax
addq $... | /llvm/ADT/SmallVector.h |
CalcNodeSethiUllmanNumber(llvm::SUnit const*, std::vector<unsigned int, std::allocator<unsigned int>>&) | static unsigned
CalcNodeSethiUllmanNumber(const SUnit *SU, std::vector<unsigned> &SUNumbers) {
if (SUNumbers[SU->NodeNum] != 0)
return SUNumbers[SU->NodeNum];
// Use WorkList to avoid stack overflow on excessively large IRs.
struct WorkState {
WorkState(const SUnit *SU) : SU(SU) {}
const SUnit *SU;
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x118, %rsp # imm = 0x118
movq %rsi, %rbx
movl 0xc8(%rdi), %eax
movq (%rsi), %rcx
cmpl $0x0, (%rcx,%rax,4)
jne 0x2002144
movq %rdi, %rsi
leaq 0x18(%rsp), %rcx
movq %rcx, -0x10(%rcx)
movabsq $0x1000000000, %rax # imm = 0x1000000000
mo... | /CodeGen/SelectionDAG/ScheduleDAGRRList.cpp |
llvm::SmallVectorTemplateBase<CalcNodeSethiUllmanNumber(llvm::SUnit const*, std::vector<unsigned int, std::allocator<unsigned int>>&)::WorkState, true>::push_back(CalcNodeSethiUllmanNumber(llvm::SUnit const*, std::vector<unsigned int, std::allocator<unsigned int>>&)::WorkState) | void push_back(ValueParamT Elt) {
const T *EltPtr = reserveForParamAndGetAddress(Elt);
memcpy(reinterpret_cast<void *>(this->end()), EltPtr, sizeof(T));
this->set_size(this->size() + 1);
} | pushq %r15
pushq %r14
pushq %rbx
movl %edx, %ebx
movq %rsi, %r15
movq %rdi, %r14
movl 0x8(%rdi), %edx
cmpl 0xc(%rdi), %edx
jae 0x2002188
movq (%r14), %rax
movl 0x8(%r14), %ecx
shlq $0x4, %rcx
movq %r15, (%rax,%rcx)
movl %ebx, 0x8(%rax,%rcx)
incl 0x8(%r14)
popq %rbx
popq %r14
popq %r15
retq
incq %rdx
leaq 0x10(%r14), %r... | /llvm/ADT/SmallVector.h |
llvm::ScheduleDAGSDNodes::newSUnit(llvm::SDNode*) | SUnit *ScheduleDAGSDNodes::newSUnit(SDNode *N) {
#ifndef NDEBUG
const SUnit *Addr = nullptr;
if (!SUnits.empty())
Addr = &SUnits[0];
#endif
SUnits.emplace_back(N, (unsigned)SUnits.size());
assert((Addr == nullptr || Addr == &SUnits[0]) &&
"SUnits std::vector reallocated on the fly!");
SUnits.back... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rdi, %r14
leaq 0x8(%rsp), %r15
movq %rsi, (%r15)
movq 0x38(%rdi), %rax
subq 0x30(%rdi), %rax
addq $0x30, %rdi
shrq $0x8, %rax
leaq 0x4(%rsp), %rdx
movl %eax, (%rdx)
movq %r15, %rsi
callq 0x20037de
movq 0x38(%r14), %rax
leaq -0x100(%rax), %rcx
movq %rcx, -0xf8(%rax... | /CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp |
llvm::ScheduleDAGSDNodes::getDAGName[abi:cxx11]() const | std::string ScheduleDAGSDNodes::getDAGName() const {
return "sunit-dag." + BB->getFullName();
} | pushq %r14
pushq %rbx
subq $0x28, %rsp
movq %rdi, %rbx
movq 0x248(%rsi), %rsi
leaq 0x8(%rsp), %r14
movq %r14, %rdi
callq 0x17502c8
leaq 0x2feebe6(%rip), %rcx # 0x4ff4793
movl $0xa, %r8d
movq %r14, %rdi
xorl %esi, %esi
xorl %edx, %edx
callq 0x7511f0
leaq 0x10(%rbx), %rdx
movq %rdx, (%rbx)
movq (%rax), %rsi
movq %rax, ... | /CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp |
bool llvm::DenseMapBase<llvm::DenseMap<long long, llvm::SDNode*, llvm::DenseMapInfo<long long, void>, llvm::detail::DenseMapPair<long long, llvm::SDNode*>>, long long, llvm::SDNode*, llvm::DenseMapInfo<long long, void>, llvm::detail::DenseMapPair<long long, llvm::SDNode*>>::LookupBucketFor<long long>(long long const&, ... | unsigned getNumBuckets() const {
return NumBuckets;
} | movl 0x10(%rdi), %ecx
testl %ecx, %ecx
je 0x200635d
pushq %rbp
pushq %r15
pushq %r14
pushq %rbx
movq (%rdi), %rdi
movq (%rsi), %rsi
leal (%rsi,%rsi,8), %eax
leal (%rsi,%rax,4), %r8d
decl %ecx
andl %ecx, %r8d
movl $0x1, %ebx
xorl %r9d, %r9d
movabsq $0x7fffffffffffffff, %r10 # imm = 0x7FFFFFFFFFFFFFFF
leaq 0x1(%r10), %r1... | /llvm/ADT/DenseMap.h |
llvm::detail::DenseMapPair<llvm::SUnit*, llvm::Register>* llvm::DenseMapBase<llvm::DenseMap<llvm::SUnit*, llvm::Register, llvm::DenseMapInfo<llvm::SUnit*, void>, llvm::detail::DenseMapPair<llvm::SUnit*, llvm::Register>>, llvm::SUnit*, llvm::Register, llvm::DenseMapInfo<llvm::SUnit*, void>, llvm::detail::DenseMapPair<ll... | BucketT *InsertIntoBucketImpl(const KeyT &Key, const LookupKeyT &Lookup,
BucketT *TheBucket) {
incrementEpoch();
// If the load of the hash table is more than 3/4, or if fewer than 1/8 of
// the buckets are empty (meaning that many are filled with tombstones),
// grow th... | pushq %r15
pushq %r14
pushq %rbx
subq $0x10, %rsp
movq %rcx, %rax
movq %rdx, %r14
movq %rdi, %rbx
movl 0x8(%rdi), %ecx
movl 0x10(%rdi), %esi
leal 0x4(,%rcx,4), %edx
leal (%rsi,%rsi,2), %edi
cmpl %edi, %edx
jae 0x20068b7
notl %ecx
addl %esi, %ecx
subl 0xc(%rbx), %ecx
movl %esi, %edx
shrl $0x3, %edx
cmpl %edx, %ecx
jbe 0... | /llvm/ADT/DenseMap.h |
llvm::createVLIWDAGScheduler(llvm::SelectionDAGISel*, llvm::CodeGenOptLevel) | ScheduleDAGSDNodes *llvm::createVLIWDAGScheduler(SelectionDAGISel *IS,
CodeGenOptLevel) {
return new ScheduleDAGVLIW(*IS->MF, IS->AA, new ResourcePriorityQueue(IS));
} | pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
movq %rdi, %r14
movl $0x2a8, %edi # imm = 0x2A8
callq 0x751940
movq %rax, %rbx
movq 0x28(%r14), %r15
movq 0x48(%r14), %r13
movl $0xc8, %edi
callq 0x751940
movq %rax, %r12
movq %rax, %rdi
movq %r14, %rsi
callq 0x2041f38
movq %rbx, %rdi
movq %r15, %rsi
cal... | /CodeGen/SelectionDAG/ScheduleDAGVLIW.cpp |
llvm::InstrEmitter::CreateVirtualRegisters(llvm::SDNode*, llvm::MachineInstrBuilder&, llvm::MCInstrDesc const&, bool, bool, llvm::DenseMap<llvm::SDValue, llvm::Register, llvm::DenseMapInfo<llvm::SDValue, void>, llvm::detail::DenseMapPair<llvm::SDValue, llvm::Register>>&) | void InstrEmitter::CreateVirtualRegisters(SDNode *Node,
MachineInstrBuilder &MIB,
const MCInstrDesc &II,
bool IsClone, bool IsCloned,
DenseMap<SDValue, Register> &V... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x98, %rsp
movl %r9d, 0xc(%rsp)
movl %r8d, 0x1c(%rsp)
movq %rcx, %r13
movq %rdx, 0x40(%rsp)
movq %rsi, %r12
movq %rdi, (%rsp)
movzwl 0x42(%rsi), %eax
movl %eax, %ecx
shll $0x4, %ecx
movq $0x0, 0x10(%rsp)
xorl %edx, %edx
testq %rcx, %rcx
je 0x20094a... | /CodeGen/SelectionDAG/InstrEmitter.cpp |
llvm::InstrEmitter::AddRegisterOperand(llvm::MachineInstrBuilder&, llvm::SDValue, unsigned int, llvm::MCInstrDesc const*, llvm::DenseMap<llvm::SDValue, llvm::Register, llvm::DenseMapInfo<llvm::SDValue, void>, llvm::detail::DenseMapPair<llvm::SDValue, llvm::Register>>&, bool, bool, bool) | void
InstrEmitter::AddRegisterOperand(MachineInstrBuilder &MIB,
SDValue Op,
unsigned IIOpNum,
const MCInstrDesc *II,
DenseMap<SDValue, Register> &VRBaseMap,
... | pushq %rbp
pushq %r15
pushq %r14
pushq %r13
pushq %r12
pushq %rbx
subq $0x68, %rsp
movq %r9, %rbx
movl %r8d, %ebp
movl %ecx, %eax
movq %rdx, %r14
movq %rsi, %r15
movq %rdi, %r13
movq 0xa0(%rsp), %rcx
movq %rdx, %rsi
movl %eax, 0x1c(%rsp)
movl %eax, %edx
callq 0x2009832
movl %eax, %edx
movq %r15, 0x10(%rsp)
movq 0x8(%r1... | /CodeGen/SelectionDAG/InstrEmitter.cpp |
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