max_stars_repo_path stringlengths 4 261 | max_stars_repo_name stringlengths 6 106 | max_stars_count int64 0 38.8k | id stringlengths 1 6 | text stringlengths 7 1.05M |
|---|---|---|---|---|
source/web/fastcgi/matreshka-fastcgi-server.adb | svn2github/matreshka | 24 | 26891 | <gh_stars>10-100
------------------------------------------------------------------------------
-- --
-- Matreshka Project --
-- --
-- Web Framework --
-- --
-- Runtime Library Component --
-- --
------------------------------------------------------------------------------
-- --
-- Copyright © 2010-2013, <NAME> <<EMAIL>> --
-- All rights reserved. --
-- --
-- Redistribution and use in source and binary forms, with or without --
-- modification, are permitted provided that the following conditions --
-- are met: --
-- --
-- * Redistributions of source code must retain the above copyright --
-- notice, this list of conditions and the following disclaimer. --
-- --
-- * Redistributions in binary form must reproduce the above copyright --
-- notice, this list of conditions and the following disclaimer in the --
-- documentation and/or other materials provided with the distribution. --
-- --
-- * Neither the name of the Vadim Godunko, IE nor the names of its --
-- contributors may be used to endorse or promote products derived from --
-- this software without specific prior written permission. --
-- --
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS --
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT --
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR --
-- A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT --
-- HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, --
-- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED --
-- TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR --
-- PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF --
-- LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING --
-- NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS --
-- SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --
-- --
------------------------------------------------------------------------------
-- $Revision$ $Date$
------------------------------------------------------------------------------
with Ada.Streams;
with GNAT.Sockets;
with Matreshka.Internals.Unicode.Characters.Latin;
with Matreshka.FastCGI.Query_Items;
with FastCGI.Requests.Internals;
with FastCGI.Replies.Internals;
with Matreshka.FastCGI.Protocol;
package body Matreshka.FastCGI.Server is
use Ada.Streams;
use League.Stream_Element_Vectors;
use Matreshka.Internals.Unicode.Characters.Latin;
use Matreshka.FastCGI.Protocol;
function FCGI_Listen_Socket return GNAT.Sockets.Socket_Type;
type FCGI_End_Request_Body is record
App_Status_Byte_3 : Ada.Streams.Stream_Element;
App_Status_Byte_2 : Ada.Streams.Stream_Element;
App_Status_Byte_1 : Ada.Streams.Stream_Element;
App_Status_Byte_0 : Ada.Streams.Stream_Element;
Protocol_Status : Ada.Streams.Stream_Element;
Reserved_1 : Ada.Streams.Stream_Element;
Reserved_2 : Ada.Streams.Stream_Element;
Reserved_3 : Ada.Streams.Stream_Element;
end record;
FCGI_Request_Complete : constant := 0;
FCGI_Cant_Mpx_Conn : constant := 1;
FCGI_Overloaded : constant := 2;
FCGI_Unknown_Role : constant := 3;
subtype FCGI_End_Request_Body_Stream_Element_Array is
Ada.Streams.Stream_Element_Array (1 .. 8);
procedure Process_Connection
(Socket : GNAT.Sockets.Socket_Type;
Handler : Standard.FastCGI.Application.Callback);
procedure Process_Begin_Request
(Socket : GNAT.Sockets.Socket_Type;
Request_Id : FCGI_Request_Identifier;
Buffer : Stream_Element_Array);
procedure Process_Params
(Socket : GNAT.Sockets.Socket_Type;
Request_Id : FCGI_Request_Identifier;
Buffer : Stream_Element_Array);
procedure Process_Stdin
(Socket : GNAT.Sockets.Socket_Type;
Request_Id : FCGI_Request_Identifier;
Buffer : Stream_Element_Array);
procedure Execute_Request
(Socket : GNAT.Sockets.Socket_Type;
Request_Id : FCGI_Request_Identifier;
Handler : Standard.FastCGI.Application.Callback);
procedure Send_Header
(Socket : GNAT.Sockets.Socket_Type;
Packet_Type : Matreshka.FastCGI.Protocol.FCGI_Packet_Type;
Request_Id : FCGI_Request_Identifier;
Content_Length : Ada.Streams.Stream_Element_Offset;
Padding_Length : Ada.Streams.Stream_Element_Offset);
procedure Send_End_Request
(Socket : GNAT.Sockets.Socket_Type;
Request_Id : FCGI_Request_Identifier;
Application_Status : Integer;
Protocol_Status : Ada.Streams.Stream_Element);
-------------
-- Execute --
-------------
procedure Execute (Handler : Standard.FastCGI.Application.Callback) is
Socket : GNAT.Sockets.Socket_Type;
Address : GNAT.Sockets.Sock_Addr_Type;
begin
Dsc.Request_Id := 0;
loop
GNAT.Sockets.Accept_Socket (FCGI_Listen_Socket, Socket, Address);
-- XXX Address mush be checked here in presence in the environment
-- variable.
Process_Connection (Socket, Handler);
end loop;
end Execute;
---------------------
-- Execute_Request --
---------------------
procedure Execute_Request
(Socket : GNAT.Sockets.Socket_Type;
Request_Id : FCGI_Request_Identifier;
Handler : Standard.FastCGI.Application.Callback)
is
procedure Send_Headers;
------------------
-- Send_Headers --
------------------
procedure Send_Headers is
Content_Length : Stream_Element_Offset := 2;
Padding_Length : Stream_Element_Offset;
procedure Compute_Length (Position : Maps.Cursor);
procedure Send_Header (Position : Maps.Cursor);
--------------------
-- Compute_Length --
--------------------
procedure Compute_Length (Position : Maps.Cursor) is
Name : constant Stream_Element_Vector := Maps.Key (Position);
Value : constant Stream_Element_Vector := Maps.Element (Position);
begin
Content_Length := Content_Length + Name.Length + Value.Length + 4;
end Compute_Length;
-----------------
-- Send_Header --
-----------------
procedure Send_Header (Position : Maps.Cursor) is
Name : constant Stream_Element_Array
:= Maps.Key (Position).To_Stream_Element_Array;
Value : constant Stream_Element_Array
:= Maps.Element (Position).To_Stream_Element_Array;
Separator : constant Stream_Element_Array (1 .. 2)
:= (Colon, Space);
End_Mark : constant Stream_Element_Array (1 .. 2)
:= (Carriage_Return, Line_Feed);
Last : Stream_Element_Offset;
begin
GNAT.Sockets.Send_Socket (Socket, Name, Last);
if Last /= Name'Last then
raise Program_Error;
end if;
GNAT.Sockets.Send_Socket (Socket, Separator, Last);
if Last /= Separator'Last then
raise Program_Error;
end if;
GNAT.Sockets.Send_Socket (Socket, Value, Last);
if Last /= Value'Last then
raise Program_Error;
end if;
GNAT.Sockets.Send_Socket (Socket, End_Mark, Last);
if Last /= End_Mark'Last then
raise Program_Error;
end if;
end Send_Header;
begin
-- Compute length of all headers.
Dsc.Reply_Headers.Iterate (Compute_Length'Access);
-- Compute padding length.
Padding_Length := 8 - Content_Length mod 8;
if Padding_Length = 8 then
Padding_Length := 0;
end if;
-- Send header.
Send_Header
(Socket, FCGI_Stdout, Dsc.Request_Id, Content_Length, Padding_Length);
-- Send headers' content.
Dsc.Reply_Headers.Iterate (Send_Header'Access);
-- Send end of headers mark and padding elements.
declare
Buffer : constant Stream_Element_Array (1 .. Padding_Length + 2)
:= (Carriage_Return, Line_Feed, others => 0);
Last : Stream_Element_Offset;
begin
GNAT.Sockets.Send_Socket (Socket, Buffer, Last);
if Last /= Buffer'Last then
raise Program_Error;
end if;
end;
end Send_Headers;
------------------------
-- Send_Output_Stream --
------------------------
procedure Send_Output_Stream
(Packet_Type : Matreshka.FastCGI.Protocol.FCGI_Packet_Type;
Data : League.Stream_Element_Vectors.Stream_Element_Vector)
is
Buffer : constant Stream_Element_Array
:= Data.To_Stream_Element_Array;
Padding :
constant Stream_Element_Array (1 .. 8 - (Buffer'Length) mod 8)
:= (others => 0);
Length : Stream_Element_Offset := Padding'Length;
Last : Stream_Element_Offset;
begin
if Buffer'Length /= 0 then
if Length = 8 then
Length := 0;
end if;
Send_Header
(Socket, Packet_Type, Dsc.Request_Id, Buffer'Length, Length);
GNAT.Sockets.Send_Socket (Socket, Buffer, Last);
if Buffer'Last /= Last then
raise Program_Error;
end if;
if Length /= 0 then
GNAT.Sockets.Send_Socket (Socket, Padding, Last);
if Padding'Last /= Last then
raise Program_Error;
end if;
end if;
end if;
-- Send empty output packet to mark end of data.
Send_Header (Socket, Packet_Type, Dsc.Request_Id, 0, 0);
end Send_Output_Stream;
Request : Standard.FastCGI.Requests.Request
:= Standard.FastCGI.Requests.Internals.Create (Dsc'Access);
Reply : Standard.FastCGI.Replies.Reply
:= Standard.FastCGI.Replies.Internals.Create (Dsc'Access);
Status : Integer;
begin
-- Prepare query parameters.
Query_Items.Decode_Query_Items (Dsc);
-- Execute callback.
Handler (Request, Reply, Status);
-- Send headers.
Send_Headers;
-- Send stdout.
Send_Output_Stream (FCGI_Stdout, Dsc.Stdout);
-- Send stderr if any.
if not Dsc.Stderr.Is_Empty then
Send_Output_Stream (FCGI_Stderr, Dsc.Stderr);
end if;
-- Send end request packet.
Send_End_Request (Socket, Dsc.Request_Id, Status, FCGI_Request_Complete);
-- Reset descriptor's state.
Dsc.Request_Id := 0;
Dsc.Request_Headers.Clear;
Dsc.Query_Items.Clear;
Dsc.Reply_Headers.Clear;
Dsc.Stdin.Clear;
Dsc.Stdout.Clear;
Dsc.Stderr.Clear;
end Execute_Request;
------------------------
-- FCGI_Listen_Socket --
------------------------
function FCGI_Listen_Socket return GNAT.Sockets.Socket_Type is separate;
---------------------------
-- Process_Begin_Request --
---------------------------
procedure Process_Begin_Request
(Socket : GNAT.Sockets.Socket_Type;
Request_Id : FCGI_Request_Identifier;
Buffer : Stream_Element_Array)
is
Request : FCGI_Begin_Request_Record;
for Request'Address use Buffer'Address;
Role : constant FCGI_Role := Get_Role (Request);
begin
if Role /= FCGI_Responder then
raise Program_Error;
end if;
-- if (Request.Flags and FCGI_Keep_Conn) /= 0 then
-- raise Program_Error;
-- end if;
if Dsc.Request_Id /= 0 then
raise Program_Error;
end if;
Dsc.Request_Id := Request_Id;
end Process_Begin_Request;
------------------------
-- Process_Connection --
------------------------
procedure Process_Connection
(Socket : GNAT.Sockets.Socket_Type;
Handler : Standard.FastCGI.Application.Callback)
is
Buffer : Raw_FCGI_Header;
Header : FCGI_Header;
for Header'Address use Buffer'Address;
Last : Stream_Element_Offset;
Request_Id : FCGI_Request_Identifier;
Content_Length : Stream_Element_Offset;
Padding_Length : Stream_Element_Offset;
begin
loop
GNAT.Sockets.Receive_Socket (Socket, Buffer, Last);
exit when Last < Buffer'First;
if Last /= Buffer'Last then
raise Program_Error;
end if;
if Get_Version (Header) /= Supported_FCGI_Version then
raise Program_Error;
end if;
Request_Id := Get_Request_Id (Header);
Content_Length := Get_Content_Length (Header);
Padding_Length := Get_Padding_Length (Header);
declare
Buffer :
Stream_Element_Array (1 .. Content_Length + Padding_Length);
begin
-- Receive packet's data when necessary.
if Buffer'Length /= 0 then
GNAT.Sockets.Receive_Socket (Socket, Buffer, Last);
if Last /= Buffer'Last then
raise Program_Error;
end if;
end if;
case Get_Packet_Type (Header) is
when FCGI_Begin_Request =>
Process_Begin_Request
(Socket, Request_Id, Buffer (1 .. Content_Length));
when FCGI_Abort_Request =>
null;
when FCGI_End_Request =>
null;
when FCGI_Params =>
Process_Params
(Socket, Request_Id, Buffer (1 .. Content_Length));
when FCGI_Stdin =>
Process_Stdin
(Socket, Request_Id, Buffer (1 .. Content_Length));
if Content_Length = 0 then
Execute_Request (Socket, Request_Id, Handler);
end if;
when FCGI_Stdout =>
null;
when FCGI_Stderr =>
null;
when FCGI_Data =>
null;
when FCGI_Get_Values =>
null;
when FCGI_Get_Values_Result =>
null;
when others =>
null;
end case;
end;
end loop;
GNAT.Sockets.Close_Socket (Socket);
end Process_Connection;
--------------------
-- Process_Params --
--------------------
procedure Process_Params
(Socket : GNAT.Sockets.Socket_Type;
Request_Id : FCGI_Request_Identifier;
Buffer : Stream_Element_Array)
is
procedure Decode_Length
(First : in out Stream_Element_Offset;
Length : out Stream_Element_Offset);
-------------------
-- Decode_Length --
-------------------
procedure Decode_Length
(First : in out Stream_Element_Offset;
Length : out Stream_Element_Offset) is
begin
if (Buffer (First) and 16#80#) = 0 then
Length := Stream_Element_Offset (Buffer (First));
First := First + 1;
else
Length :=
Stream_Element_Offset (Buffer (First) and 16#7F#) * 2 ** 24
+ Stream_Element_Offset (Buffer (First + 1)) * 2 ** 16
+ Stream_Element_Offset (Buffer (First + 2)) * 2 ** 8
+ Stream_Element_Offset (Buffer (First + 3));
First := First + 4;
end if;
end Decode_Length;
First : Stream_Element_Offset := Buffer'First;
Name_Length : Stream_Element_Offset;
Value_Length : Stream_Element_Offset;
begin
if Dsc.Request_Id /= Request_Id then
raise Program_Error;
end if;
while First < Buffer'Last loop
Decode_Length (First, Name_Length);
Decode_Length (First, Value_Length);
Dsc.Request_Headers.Insert
(League.Stream_Element_Vectors.To_Stream_Element_Vector
(Buffer (First .. First + Name_Length - 1)),
League.Stream_Element_Vectors.To_Stream_Element_Vector
(Buffer
(First + Name_Length
.. First + Name_Length + Value_Length - 1)));
First := First + Name_Length + Value_Length;
end loop;
end Process_Params;
-------------------
-- Process_Stdin --
-------------------
procedure Process_Stdin
(Socket : GNAT.Sockets.Socket_Type;
Request_Id : FCGI_Request_Identifier;
Buffer : Stream_Element_Array) is
begin
if Dsc.Request_Id /= Request_Id then
raise Program_Error;
end if;
Dsc.Stdin :=
League.Stream_Element_Vectors.To_Stream_Element_Vector
(Dsc.Stdin.To_Stream_Element_Array & Buffer);
end Process_Stdin;
----------------------
-- Send_End_Request --
----------------------
procedure Send_End_Request
(Socket : GNAT.Sockets.Socket_Type;
Request_Id : FCGI_Request_Identifier;
Application_Status : Integer;
Protocol_Status : Ada.Streams.Stream_Element)
is
Buffer : FCGI_End_Request_Body_Stream_Element_Array := (others => 0);
Header : FCGI_End_Request_Body;
for Header'Address use Buffer'Address;
Last : Ada.Streams.Stream_Element_Offset;
begin
Send_Header (Socket, FCGI_End_Request, Request_Id, 8, 0);
Header.App_Status_Byte_3 :=
Stream_Element (Application_Status / 2 ** 24);
Header.App_Status_Byte_2 :=
Stream_Element (Application_Status / 2 ** 16 mod 2 ** 8);
Header.App_Status_Byte_1 :=
Stream_Element (Application_Status / 2 ** 8 mod 2 ** 8);
Header.App_Status_Byte_0 :=
Stream_Element (Application_Status mod 2 ** 8);
Header.Protocol_Status := Protocol_Status;
GNAT.Sockets.Send_Socket (Socket, Buffer, Last);
if Buffer'Last /= Last then
raise Program_Error;
end if;
end Send_End_Request;
-----------------
-- Send_Header --
-----------------
procedure Send_Header
(Socket : GNAT.Sockets.Socket_Type;
Packet_Type : Matreshka.FastCGI.Protocol.FCGI_Packet_Type;
Request_Id : FCGI_Request_Identifier;
Content_Length : Ada.Streams.Stream_Element_Offset;
Padding_Length : Ada.Streams.Stream_Element_Offset)
is
Buffer : Raw_FCGI_Header;
Header : FCGI_Header;
for Header'Address use Buffer'Address;
Last : Ada.Streams.Stream_Element_Offset;
begin
Initialize
(Header, Packet_Type, Request_Id, Content_Length, Padding_Length);
GNAT.Sockets.Send_Socket (Socket, Buffer, Last);
if Buffer'Last /= Last then
raise Program_Error;
end if;
end Send_Header;
end Matreshka.FastCGI.Server;
|
coverage/IN_CTS/0456-COVERAGE-brw-fs-2792/work/variant/1_spirv_asm/shader.frag.asm | asuonpaa/ShaderTests | 0 | 83639 | <filename>coverage/IN_CTS/0456-COVERAGE-brw-fs-2792/work/variant/1_spirv_asm/shader.frag.asm<gh_stars>0
; SPIR-V
; Version: 1.0
; Generator: Khronos Glslang Reference Front End; 10
; Bound: 120
; Schema: 0
OpCapability Shader
%1 = OpExtInstImport "GLSL.std.450"
OpMemoryModel Logical GLSL450
OpEntryPoint Fragment %4 "main" %56
OpExecutionMode %4 OriginUpperLeft
OpSource ESSL 320
OpName %4 "main"
OpName %10 "func(i1;"
OpName %9 "x"
OpName %16 "buf0"
OpMemberName %16 0 "_GLF_uniform_int_values"
OpName %18 ""
OpName %30 "i"
OpName %46 "v"
OpName %56 "_GLF_color"
OpName %62 "a"
OpName %65 "i"
OpName %77 "param"
OpDecorate %15 ArrayStride 16
OpMemberDecorate %16 0 Offset 0
OpDecorate %16 Block
OpDecorate %18 DescriptorSet 0
OpDecorate %18 Binding 0
OpDecorate %56 Location 0
%2 = OpTypeVoid
%3 = OpTypeFunction %2
%6 = OpTypeInt 32 1
%7 = OpTypePointer Function %6
%8 = OpTypeFunction %6 %7
%13 = OpTypeInt 32 0
%14 = OpConstant %13 6
%15 = OpTypeArray %6 %14
%16 = OpTypeStruct %15
%17 = OpTypePointer Uniform %16
%18 = OpVariable %17 Uniform
%19 = OpConstant %6 0
%20 = OpConstant %6 3
%21 = OpTypePointer Uniform %6
%24 = OpTypeBool
%28 = OpConstant %6 2
%39 = OpConstant %6 4
%43 = OpTypeFloat 32
%44 = OpTypeVector %43 4
%45 = OpTypePointer Function %44
%53 = OpConstant %6 1
%55 = OpTypePointer Output %44
%56 = OpVariable %55 Output
%89 = OpTypeVector %24 4
%95 = OpConstant %6 5
%4 = OpFunction %2 None %3
%5 = OpLabel
%62 = OpVariable %7 Function
%65 = OpVariable %7 Function
%77 = OpVariable %7 Function
%63 = OpAccessChain %21 %18 %19 %19
%64 = OpLoad %6 %63
OpStore %62 %64
%66 = OpAccessChain %21 %18 %19 %53
%67 = OpLoad %6 %66
OpStore %65 %67
OpBranch %68
%68 = OpLabel
OpLoopMerge %70 %71 None
OpBranch %72
%72 = OpLabel
%73 = OpLoad %6 %65
%74 = OpAccessChain %21 %18 %19 %39
%75 = OpLoad %6 %74
%76 = OpSLessThan %24 %73 %75
OpBranchConditional %76 %69 %70
%69 = OpLabel
%78 = OpLoad %6 %65
OpStore %77 %78
%79 = OpFunctionCall %6 %10 %77
%80 = OpLoad %6 %62
%81 = OpIAdd %6 %80 %79
OpStore %62 %81
OpBranch %71
%71 = OpLabel
%82 = OpLoad %6 %65
%83 = OpIAdd %6 %82 %53
OpStore %65 %83
OpBranch %68
%70 = OpLabel
%84 = OpLoad %44 %56
%85 = OpAccessChain %21 %18 %19 %28
%86 = OpLoad %6 %85
%87 = OpConvertSToF %43 %86
%88 = OpCompositeConstruct %44 %87 %87 %87 %87
%90 = OpFOrdEqual %89 %84 %88
%91 = OpAll %24 %90
OpSelectionMerge %93 None
OpBranchConditional %91 %92 %93
%92 = OpLabel
%94 = OpLoad %6 %62
%96 = OpAccessChain %21 %18 %19 %95
%97 = OpLoad %6 %96
%98 = OpIEqual %24 %94 %97
OpBranch %93
%93 = OpLabel
%99 = OpPhi %24 %91 %70 %98 %92
OpSelectionMerge %101 None
OpBranchConditional %99 %100 %115
%100 = OpLabel
%102 = OpAccessChain %21 %18 %19 %53
%103 = OpLoad %6 %102
%104 = OpConvertSToF %43 %103
%105 = OpAccessChain %21 %18 %19 %19
%106 = OpLoad %6 %105
%107 = OpConvertSToF %43 %106
%108 = OpAccessChain %21 %18 %19 %19
%109 = OpLoad %6 %108
%110 = OpConvertSToF %43 %109
%111 = OpAccessChain %21 %18 %19 %53
%112 = OpLoad %6 %111
%113 = OpConvertSToF %43 %112
%114 = OpCompositeConstruct %44 %104 %107 %110 %113
OpStore %56 %114
OpBranch %101
%115 = OpLabel
%116 = OpAccessChain %21 %18 %19 %19
%117 = OpLoad %6 %116
%118 = OpConvertSToF %43 %117
%119 = OpCompositeConstruct %44 %118 %118 %118 %118
OpStore %56 %119
OpBranch %101
%101 = OpLabel
OpReturn
OpFunctionEnd
%10 = OpFunction %6 None %8
%9 = OpFunctionParameter %7
%11 = OpLabel
%30 = OpVariable %7 Function
%46 = OpVariable %45 Function
%12 = OpLoad %6 %9
%22 = OpAccessChain %21 %18 %19 %20
%23 = OpLoad %6 %22
%25 = OpSGreaterThan %24 %12 %23
OpSelectionMerge %27 None
OpBranchConditional %25 %26 %27
%26 = OpLabel
OpReturnValue %28
%27 = OpLabel
%31 = OpAccessChain %21 %18 %19 %19
%32 = OpLoad %6 %31
OpStore %30 %32
OpBranch %33
%33 = OpLabel
OpLoopMerge %35 %36 None
OpBranch %37
%37 = OpLabel
%38 = OpLoad %6 %30
%40 = OpAccessChain %21 %18 %19 %39
%41 = OpLoad %6 %40
%42 = OpSLessThan %24 %38 %41
OpBranchConditional %42 %34 %35
%34 = OpLabel
%47 = OpLoad %6 %9
%48 = OpLoad %6 %30
%49 = OpIAdd %6 %47 %48
%50 = OpConvertSToF %43 %49
%51 = OpCompositeConstruct %44 %50 %50 %50 %50
OpStore %46 %51
OpBranch %36
%36 = OpLabel
%52 = OpLoad %6 %30
%54 = OpIAdd %6 %52 %53
OpStore %30 %54
OpBranch %33
%35 = OpLabel
%57 = OpLoad %44 %46
OpStore %56 %57
%58 = OpAccessChain %21 %18 %19 %53
%59 = OpLoad %6 %58
OpReturnValue %59
OpFunctionEnd
|
joystick/lumen-joystick.adb | darkestkhan/lumen | 8 | 30732 | <filename>joystick/lumen-joystick.adb
-- Lumen.Joystick -- Support (Linux) joysticks under Lumen
--
-- <NAME>, NiEstu, Phoenix AZ, Summer 2010
-- This code is covered by the ISC License:
--
-- Copyright © 2010, NiEstu
--
-- Permission to use, copy, modify, and/or distribute this software for any
-- purpose with or without fee is hereby granted, provided that the above
-- copyright notice and this permission notice appear in all copies.
--
-- The software is provided "as is" and the author disclaims all warranties
-- with regard to this software including all implied warranties of
-- merchantability and fitness. In no event shall the author be liable for any
-- special, direct, indirect, or consequential damages or any damages
-- whatsoever resulting from loss of use, data or profits, whether in an
-- action of contract, negligence or other tortious action, arising out of or
-- in connection with the use or performance of this software.
-- Environment
with Ada.Streams.Stream_IO;
with Ada.Unchecked_Deallocation;
with Interfaces.C.Strings;
with System;
with PQueue;
with Lumen.Binary.IO;
package body Lumen.Joystick is
---------------------------------------------------------------------------
-- The task type that reads events from the joystick
task type Joystick_Event_Task is
entry Startup (Owner : in Stick_Info_Pointer);
end Joystick_Event_Task;
---------------------------------------------------------------------------
-- Instantiate the protected-queue package with the queue-event type
package Event_Queue_Pkg is new PQueue (Joystick_Event_Data);
---------------------------------------------------------------------------
-- A simple binary semaphore
protected type Signal is
procedure Set;
entry Wait;
private
Is_Set : boolean := false;
end Signal;
---------------------------------------------------------------------------
-- Our internal view of a joystick
type Axis_Array is array (Positive range <>) of Integer;
type Button_Array is array (Positive range <>) of Boolean;
type Stick_Info (Name_Len : Natural; N_Axes : Natural; N_Buttons : Natural) is record
File : Binary.IO.File_Type;
Name : String (1 .. Name_Len);
Axes : Axis_Array (1 .. N_Axes);
Buttons : Button_Array (1 .. N_Buttons);
Shutdown : Signal;
Event_Task : Joystick_Event_Task;
Events : Event_Queue_Pkg.Protected_Queue_Type;
end record;
---------------------------------------------------------------------------
--
-- The event task, reads events from the joystick, then queues them
-- internally so the app can read them
--
---------------------------------------------------------------------------
task body Joystick_Event_Task is
------------------------------------------------------------------------
use type Binary.Byte;
------------------------------------------------------------------------
-- The Linux joystick event
type JS_Event_Type is (JS_Button, JS_Axis, JS_Init, JS_Init_Button, JS_Init_Axis);
for JS_Event_Type use (JS_Button => 16#01#, JS_Axis => 16#02#,
JS_Init => 16#80#, JS_Init_Button => 16#81#, JS_Init_Axis => 16#82#);
type JS_Event_Data is record
Time : Binary.Word;
Value : Binary.S_Short;
Which : JS_Event_Type;
Number : Binary.Byte;
end record;
Base : constant := Binary.Word_Bytes;
for JS_Event_Data use record
Time at 0 range 0 .. Binary.Word'Size - 1;
Value at Base + 0 range 0 .. Binary.S_Short'Size - 1;
Which at Base + 2 range 0 .. Binary.Byte'Size - 1;
Number at Base + 3 range 0 .. Binary.Byte'Size - 1;
end record;
------------------------------------------------------------------------
Info : Stick_Info_Pointer;
Event_Rec : JS_Event_Data;
Index : Positive;
Send : Boolean;
Event_Data : Joystick_Event_Data;
------------------------------------------------------------------------
begin -- Joystick_Event_Task
-- Lets the library tell us which joystick this task belongs to
select
accept Startup (Owner : in Stick_Info_Pointer) do
Info := Owner;
end Startup;
or
terminate;
end select;
loop
-- Wait for an event to come from the joystick, or for a shutdown
-- signal to arrive
select
Info.Shutdown.Wait;
exit;
then abort
JS_Event_Data'Read (Ada.Streams.Stream_IO.Stream (Info.File), Event_Rec);
end select;
-- Only process recogized event types
if Event_Rec.Which'Valid then
Index := Positive (Event_Rec.Number + 1); -- driver uses zero-based axis and button numbers
case Event_Rec.Which is
when JS_Init =>
Send := False; -- dunno what these are, so just ignore them
when JS_Button | JS_Init_Button =>
if Boolean'Pos (Info.Buttons (Index)) /= Natural (Event_Rec.Value) then
if Info.Buttons (Index) then
Event_Data := (Which => Joystick_Button_Release, Number => Index);
else
Event_Data := (Which => Joystick_Button_Press, Number => Index);
end if;
Info.Buttons (Index) := not Info.Buttons (Index);
Send := True;
end if;
when JS_Axis | JS_Init_Axis =>
if Info.Axes (Index) /= Integer (Event_Rec.Value) then
Info.Axes (Index) := Integer (Event_Rec.Value);
Event_Data := (Which => Joystick_Axis_Change, Number => Index, Axis_Value => Info.Axes (Index));
Send := True;
end if;
end case;
-- If we had a value change, push an event into our internal queue
if Send then
Info.Events.Enqueue (Event_Data);
end if;
end if;
end loop;
end Joystick_Event_Task;
---------------------------------------------------------------------------
-- Simple binary semaphore
protected body Signal is
-- Indicate that a shutdown has occurred
procedure Set is
begin -- Set
Is_Set := true;
end Set;
-- Block until the signal is set, then clear it
entry Wait when Is_Set is
begin -- Wait
Is_Set := false;
end Wait;
end Signal;
---------------------------------------------------------------------------
--
-- Public subroutines
--
---------------------------------------------------------------------------
procedure Finalize (Stick : in out Handle) is
begin -- Finalize
if Stick.Info /= null then
Close (Stick);
end if;
end Finalize;
---------------------------------------------------------------------------
-- Open a joystick device
procedure Open (Stick : in out Handle;
Path : in String := Default_Pathname) is
use type Interfaces.C.Strings.chars_ptr;
procedure Joystick_Info (Path : in String;
N_Axes : in System.Address;
N_Buttons : in System.Address;
Name : out Interfaces.C.Strings.chars_ptr);
pragma Import (C, Joystick_Info, "joystick_info");
procedure Free (Pointer : in System.Address);
pragma Import (C, Free, "free");
Axis_Count : Binary.Byte;
Button_Count : Binary.Byte;
Name : Interfaces.C.Strings.chars_ptr;
begin -- Open
-- Ask our C helper to fetch the device's info
Joystick_Info (Path & ASCII.NUL, Axis_Count'Address, Button_Count'Address, Name);
-- If we can't get the name, then the other values are probably no good either
if Name = Interfaces.C.Strings.Null_Ptr then
Stick.Info := null;
raise Open_Failed;
else
-- Local management data for the device
Stick.Info := new Stick_Info (Name_Len => Natural (Interfaces.C.Strings.Strlen (Name)),
N_Axes => Natural (Axis_Count),
N_Buttons => Natural (Button_Count));
Binary.IO.Open (Stick.Info.File, Path);
Stick.Info.Name := Interfaces.C.Strings.Value (Name);
Stick.Info.Axes := (others => 0);
Stick.Info.Buttons := (others => False);
-- Start the events task for this joystick device
Stick.Info.Event_Task.Startup (Stick.Info);
end if;
end Open;
---------------------------------------------------------------------------
-- Close a joystick device
procedure Close (Stick : in out Handle) is
procedure Free is new Ada.Unchecked_Deallocation (Stick_Info, Stick_Info_Pointer);
begin -- Close
-- Close down this joystick
if Stick.Info /= null then
-- Shut down this stick's event task
Stick.Info.Shutdown.Set;
-- Close the stream and free the info record
Binary.IO.Close (Stick.Info.File);
Free (Stick.Info);
end if;
end Close;
---------------------------------------------------------------------------
-- Various joystick information functions
function Name (Stick : in Handle) return String is
begin -- Name
return Stick.Info.Name;
end Name;
---------------------------------------------------------------------------
function Axes (Stick : in Handle) return Natural is
begin -- Axes
return Stick.Info.N_Axes;
end Axes;
---------------------------------------------------------------------------
function Buttons (Stick : in Handle) return Natural is
begin -- Buttons
return Stick.Info.N_Buttons;
end Buttons;
---------------------------------------------------------------------------
-- Returns the number of events that are waiting in the joystick's event
-- queue. Useful to avoid blocking while waiting for the next event to
-- show up.
function Pending (Stick : in Handle) return Natural is
begin -- Pending
return Stick.Info.Events.Length;
end Pending;
---------------------------------------------------------------------------
-- Read a joystick event
function Next_Event (Stick : in Handle) return Joystick_Event_Data is
begin -- Next_Event
return Event : Joystick_Event_Data do
-- Get next event from queue (may block) and return it
Stick.Info.Events.Dequeue (Event);
end return;
end Next_Event;
---------------------------------------------------------------------------
end Lumen.Joystick;
|
dv3/dv3/flbuf.asm | olifink/smsqe | 0 | 8553 | ; DV3 File Buffer Handling V3.00 1992 <NAME>
;
; These are for use by the format dependent routines.
; They are the file analogues of dv3_drloc / dv3_drnew
; They are derived from dv3_albf and dv3_lcbf
section dv3
xdef dv3_fbnew
xdef dv3_fbloc
xdef dv3_fbupd
xref dv3_sbloc
xref dv3_sbnew
xref dv3_slbupd
include 'dev8_dv3_keys'
include 'dev8_keys_err'
include 'dev8_mac_assert'
;+++
; DV3 create new file buffer.
; If necessary it extends the file allocation.
;
; d5 c p file sector
; d6 c p file ID
; d7 c p drive number
; a0 c p channel block
; a2 r pointer to buffer
; a3 c p linkage block
; a4 c p definition block
; a5 c p pointer to map
;
; status return standard
;---
dv3_fbnew
dfb.reg reg d1/d2/d3/a1
movem.l dfb.reg,-(sp)
move.l d5,d3 ; sector number
divu ddf_asect(a4),d3 ; this can deal with group up to 65535
moveq #0,d2
move.w d3,d2
assert d3c_dgroup,d3c_fgroup-4
movem.l d3c_dgroup(a0),d0/d1 ; current drive and file group
cmp.l d3,d2 ; first sector of group?
bne.s dfn_loc ; ... no, locate
jsr ddf_salloc(a4) ; allocate new group
bge.s dfn_sgrp
bra.s dfn_exit
dfn_loc
cmp.w d1,d2 ; current group?
beq.s dfn_new ; ... yes, just get new slave block
jsr ddf_slocate(a4) ; locate this group
blt.s dfn_exit
dfn_sgrp
assert d3c_dgroup,d3c_fgroup-4
movem.l d0/d2,d3c_dgroup(a0) ; new current drive and file group
dfn_new
move.w d0,d3 ; drive sector / group
lea d3c_csb(a0),a2
jsr dv3_sbnew ; find new slave block
dfn_exit
movem.l (sp)+,dfb.reg
rts
;+++
; DV3 locate a file buffer.
; If necessary, it reads the appropriate sector from the disk
;
; d5 c p file sector
; d6 c p file ID
; d7 c p drive number
; a0 c p channel block
; a2 r pointer to buffer
; a3 c p linkage block
; a4 c p definition block
; a5 c p pointer to map
;
; status return standard
;---
dv3_fbloc
movem.l dfb.reg,-(sp)
lea d3c_csb(a0),a2
jsr dv3_sbloc ; locate slave block
ble.s dfl_exit
move.l d5,d3 ; sector number
divu ddf_asect(a4),d3 ; this can deal with group up to 65535
moveq #0,d2
move.w d3,d2
assert d3c_dgroup,d3c_fgroup-4
lea d3c_fgroup(a0),a1
move.l (a1),d1
move.l -(a1),d0 ; current drive and file group
beq.s dfl_loc2 ; none yet
cmp.w d1,d2 ; current group?
beq.s dfl_new ; ... yes, new slave block required
dfl_loc2
jsr ddf_slocate(a4)
blt.s dfl_exit
assert d3c_dgroup,d3c_fgroup-4
movem.l d0/d2,d3c_dgroup(a0) ; new current drive and file group
dfl_new
move.w d0,d3 ; drive sector / group
lea d3c_csb(a0),a2
jsr dv3_sbnew ; find new slave block
addq.b #sbt.read-sbt.true,sbt_stat(a1) ; read requested
jsr ddl_slbfill(a3) ; read sector
dfl_exit
movem.l (sp)+,dfb.reg
rts
;+++
; DV3 mark a file buffer (d3c_csb) updated .
;
; d7 c p drive number
; a0 c p channel block
; a3 c p linkage block
; a4 c p definition block
; a5 c p pointer to map
;
; all registers preserved
; status according to d0
;---
dv3_fbupd
move.l a1,-(sp)
jsr dv3_slbupd
move.l (sp)+,a1
rts
end
|
libsrc/psg/saa1099/etracker/saa_etracker_init.asm | ahjelm/z88dk | 640 | 165178 | <reponame>ahjelm/z88dk
SECTION code_clib
PUBLIC saa_etracker_init
PUBLIC _saa_etracker_init
EXTERN asm_etracker_init
saa_etracker_init:
_saa_etracker_init:
pop bc
pop hl
push hl
push bc
jp asm_etracker_init
|
data/pokemon/dex_entries/skuntank.asm | AtmaBuster/pokeplat-gen2 | 6 | 171431 | <reponame>AtmaBuster/pokeplat-gen2
db "SKUNK@" ; species name
db "It attacks by"
next "spraying repugnant"
next "fluids from its"
page "tail, but the"
next "scent dulls after"
next "a few squirts.@"
|
bool-to-string.agda | rfindler/ial | 29 | 15778 | <filename>bool-to-string.agda
module bool-to-string where
open import bool
open import string
𝔹-to-string : 𝔹 → string
𝔹-to-string tt = "tt"
𝔹-to-string ff = "ff" |
kernel/arch/x86_64/smp_start.asm | jasonwer/WingOS | 549 | 240748 | <reponame>jasonwer/WingOS
[bits 16]
TRAMPOLINE_BASE equ 0x1000
; --- 16 BIT ---
global nstack
extern cpuupstart
global trampoline_start
trampoline_start:
cli
mov ax, 0x0
mov ds, ax
mov es, ax
mov fs, ax
mov gs, ax
mov ss, ax
mov al, 'a'
mov dx, 0x3F8 ; these are used for debugging
out dx, al
o32 lgdt [pm_gdtr - trampoline_start + TRAMPOLINE_BASE]
mov al, 'a'
mov dx, 0x3F8
out dx, al
mov eax, cr0
or al, 0x1
mov cr0, eax
mov al, 'c'
mov dx, 0x3F8
out dx, al
jmp 0x8:(trampoline32 - trampoline_start + TRAMPOLINE_BASE)
[bits 32]
section .text
; ---- 32 BITS ----
trampoline32:
mov bx, 0x10
mov ds, bx
mov es, bx
mov ss, bx
mov eax, dword [0x500]
mov cr3, eax
mov al, 'z'
mov dx, 0x3F8
out dx, al
mov eax, cr4
or eax, 1 << 5 ; Set the PAE-bit, which is the 6th bit (bit 5).
or eax, 1 << 7
mov cr4, eax
mov ecx, 0xc0000080
rdmsr
or eax,1 << 8 ; LME
wrmsr
mov al, 't'
mov dx, 0x3F8
out dx, al
mov eax, cr0
or eax, 1 << 31
mov cr0, eax
mov al, '2'
mov dx, 0x3F8
out dx, al
lgdt [lm_gdtr - trampoline_start + TRAMPOLINE_BASE]
jmp 8:(trampoline64 - trampoline_start + TRAMPOLINE_BASE)
[bits 64]
; ---- 64 BITS ----
trampoline64:
mov al, '5'
mov dx, 0x3F8
out dx, al
mov ax, 0x10
mov ds, ax
mov es, ax
mov ss, ax
mov ax, 0x0
mov fs, ax
mov gs, ax
mov al, 'p'
mov dx, 0x3F8
out dx, al
lgdt [0x580]
lidt [0x590]
mov rsp, [0x570]
mov al, '6'
mov dx, 0x3F8
out dx, al
mov rbp, 0x0 ; terminate stack traces here
; reset RFLAGS
push 0x0
popf
mov al, '7'
mov dx, 0x3F8
out dx, al
mov rax, qword vcode64
jmp vcode64
vcode64:
mov al, '8'
mov dx, 0x3F8
out dx, al
push rbp
; set up sse as higher half use it
mov rax, cr0
btr eax, 2
bts eax, 1
mov cr0, rax
mov rax, cr4
bts eax, 9
bts eax, 10
mov cr4, rax
mov rax, qword trampoline_ext
call rax
; ---- LONG MODE ----
align 16
lm_gdtr:
dw lm_gdt_end - lm_gdt_start - 1
dq lm_gdt_start - trampoline_start + TRAMPOLINE_BASE
align 16
lm_gdt_start:
; null selector
dq 0
; 64bit cs selector
dq 0x00AF98000000FFFF
; 64bit ds selector
dq 0x00CF92000000FFFF
lm_gdt_end:
; ---- Protected MODE ----
align 16
pm_gdtr:
dw pm_gdt_end - pm_gdt_start - 1
dd pm_gdt_start - trampoline_start + TRAMPOLINE_BASE
align 16
pm_gdt_start:
; null selector
dq 0
; cs selector
dq 0x00CF9A000000FFFF
; ds selector
dq 0x00CF92000000FFFF
pm_gdt_end:
; IDT
align 16
pm_idtr:
dw 0
dd 0
dd 0
align 16
global trampoline_end
trampoline_end:
trampoline_ext:
mov al, '8'
mov dx, 0x3F8
out dx, al
call cpuupstart
|
Transynther/x86/_processed/AVXALIGN/_ht_zr_/i7-8650U_0xd2_notsx.log_21_1450.asm | ljhsiun2/medusa | 9 | 10134 | <filename>Transynther/x86/_processed/AVXALIGN/_ht_zr_/i7-8650U_0xd2_notsx.log_21_1450.asm<gh_stars>1-10
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r14
push %r8
push %r9
push %rax
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0xb931, %r8
nop
dec %r10
mov (%r8), %ax
xor $23360, %r8
lea addresses_D_ht+0x11529, %rsi
lea addresses_A_ht+0x8184, %rdi
clflush (%rdi)
nop
nop
nop
nop
xor %r9, %r9
mov $60, %rcx
rep movsq
nop
nop
nop
nop
nop
add $35774, %r8
lea addresses_A_ht+0x17529, %rdi
nop
nop
nop
add %rsi, %rsi
movups (%rdi), %xmm2
vpextrq $1, %xmm2, %r8
nop
nop
add $9606, %r9
lea addresses_A_ht+0x8929, %rsi
lea addresses_WT_ht+0xb229, %rdi
clflush (%rsi)
nop
nop
nop
add %r14, %r14
mov $40, %rcx
rep movsw
nop
nop
nop
nop
nop
sub %rcx, %rcx
lea addresses_D_ht+0x10ba9, %rsi
lea addresses_A_ht+0x1b411, %rdi
nop
nop
nop
nop
add %r14, %r14
mov $61, %rcx
rep movsl
nop
nop
nop
nop
nop
and %r10, %r10
lea addresses_WC_ht+0x8bc1, %rcx
clflush (%rcx)
nop
xor $49234, %r9
mov (%rcx), %r10d
nop
nop
nop
nop
nop
and $19325, %r10
lea addresses_A_ht+0x14529, %r9
clflush (%r9)
nop
nop
nop
nop
sub %rdi, %rdi
mov $0x6162636465666768, %rsi
movq %rsi, (%r9)
nop
nop
and $8962, %rsi
lea addresses_WC_ht+0x1bd29, %rax
nop
dec %r9
mov (%rax), %edi
and %rax, %rax
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r9
pop %r8
pop %r14
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r14
push %r15
push %r8
push %r9
push %rdx
// Faulty Load
lea addresses_UC+0x1a929, %r8
nop
nop
nop
nop
xor $7559, %r14
vmovaps (%r8), %ymm2
vextracti128 $0, %ymm2, %xmm2
vpextrq $1, %xmm2, %r9
lea oracles, %r15
and $0xff, %r9
shlq $12, %r9
mov (%r15,%r9,1), %r9
pop %rdx
pop %r9
pop %r8
pop %r15
pop %r14
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_UC', 'size': 8, 'AVXalign': False, 'NT': True, 'congruent': 0, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_UC', 'size': 32, 'AVXalign': True, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': True}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 0, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_A_ht', 'size': 16, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 6, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_D_ht', 'congruent': 7, 'same': False}, 'dst': {'type': 'addresses_A_ht', 'congruent': 2, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 3, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_A_ht', 'size': 8, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 9, 'same': False}}
{'00': 15, '46': 4, '45': 2}
00 46 00 00 00 00 46 45 00 46 45 00 00 46 00 00 00 00 00 00 00
*/
|
oeis/075/A075062.asm | neoneye/loda-programs | 11 | 165198 | <filename>oeis/075/A075062.asm<gh_stars>10-100
; A075062: Row sums of triangle in A075059.
; Submitted by <NAME>
; 2,7,24,58,315,381,2968,6756,22725,25255,304986,332718,4684771,5045145,5405520,11531656,208288233,220540491,4423058830,4655851410,4888643991,5121436573,123147264516,128501493420,669278610325,696049754751
mov $2,$0
add $0,1
seq $2,51426 ; Least common multiple of {2, 4, 6, ..., 2n}.
add $2,$0
add $2,1
mul $2,$0
mov $0,$2
div $0,2
|
agda-stdlib/src/Algebra/Properties/AbelianGroup.agda | DreamLinuxer/popl21-artifact | 5 | 6959 | <gh_stars>1-10
------------------------------------------------------------------------
-- The Agda standard library
--
-- Some derivable properties
------------------------------------------------------------------------
{-# OPTIONS --without-K --safe #-}
open import Algebra
module Algebra.Properties.AbelianGroup
{a ℓ} (G : AbelianGroup a ℓ) where
open AbelianGroup G
open import Function
open import Relation.Binary.Reasoning.Setoid setoid
------------------------------------------------------------------------
-- Publicly re-export group properties
open import Algebra.Properties.Group group public
------------------------------------------------------------------------
-- Properties of abelian groups
xyx⁻¹≈y : ∀ x y → x ∙ y ∙ x ⁻¹ ≈ y
xyx⁻¹≈y x y = begin
x ∙ y ∙ x ⁻¹ ≈⟨ ∙-congʳ $ comm _ _ ⟩
y ∙ x ∙ x ⁻¹ ≈⟨ assoc _ _ _ ⟩
y ∙ (x ∙ x ⁻¹) ≈⟨ ∙-congˡ $ inverseʳ _ ⟩
y ∙ ε ≈⟨ identityʳ _ ⟩
y ∎
⁻¹-∙-comm : ∀ x y → x ⁻¹ ∙ y ⁻¹ ≈ (x ∙ y) ⁻¹
⁻¹-∙-comm x y = begin
x ⁻¹ ∙ y ⁻¹ ≈˘⟨ ⁻¹-anti-homo-∙ y x ⟩
(y ∙ x) ⁻¹ ≈⟨ ⁻¹-cong $ comm y x ⟩
(x ∙ y) ⁻¹ ∎
|
alloy4fun_models/trashltl/models/16/JPDY5qe3CWNtEKfbQ.als | Kaixi26/org.alloytools.alloy | 0 | 2766 | <gh_stars>0
open main
pred idJPDY5qe3CWNtEKfbQ_prop17 {
all t : Trash | t not in File'
}
pred __repair { idJPDY5qe3CWNtEKfbQ_prop17 }
check __repair { idJPDY5qe3CWNtEKfbQ_prop17 <=> prop17o } |
programs/oeis/154/A154117.asm | neoneye/loda | 22 | 93445 | ; A154117: Expansion of (1 - x + 3*x^2)/((1-x)*(1-2*x)).
; 1,2,7,17,37,77,157,317,637,1277,2557,5117,10237,20477,40957,81917,163837,327677,655357,1310717,2621437,5242877,10485757,20971517,41943037,83886077,167772157,335544317,671088637,1342177277,2684354557,5368709117,10737418237,21474836477,42949672957,85899345917,171798691837,343597383677,687194767357,1374389534717,2748779069437,5497558138877,10995116277757,21990232555517,43980465111037,87960930222077,175921860444157,351843720888317,703687441776637,1407374883553277,2814749767106557,5629499534213117,11258999068426237,22517998136852477,45035996273704957,90071992547409917,180143985094819837,360287970189639677,720575940379279357,1441151880758558717,2882303761517117437,5764607523034234877,11529215046068469757,23058430092136939517,46116860184273879037,92233720368547758077,184467440737095516157,368934881474191032317,737869762948382064637,1475739525896764129277,2951479051793528258557,5902958103587056517117,11805916207174113034237,23611832414348226068477,47223664828696452136957,94447329657392904273917,188894659314785808547837,377789318629571617095677,755578637259143234191357,1511157274518286468382717,3022314549036572936765437,6044629098073145873530877,12089258196146291747061757,24178516392292583494123517,48357032784585166988247037,96714065569170333976494077,193428131138340667952988157,386856262276681335905976317,773712524553362671811952637,1547425049106725343623905277,3094850098213450687247810557,6189700196426901374495621117,12379400392853802748991242237,24758800785707605497982484477,49517601571415210995964968957,99035203142830421991929937917,198070406285660843983859875837,396140812571321687967719751677,792281625142643375935439503357,1584563250285286751870879006717
mov $1,2
pow $1,$0
mul $1,5
trn $1,8
div $1,2
add $1,1
mov $0,$1
|
src/xplode.asm | dshadoff/Star-Spores_TRS-80_Mod1 | 1 | 177215 | <reponame>dshadoff/Star-Spores_TRS-80_Mod1
ORG 6E40H
SHPPOS EQU 60F5H
RNDNO EQU 6109H
CONTER EQU 6107H
SET EQU 66F3H
STARTX EQU 676BH
STARTY EQU 676DH
REVERS EQU 5B2DH
STORS1 EQU 6777H
ED00H EQU 6249H
SOUND EQU 5E2AH
SOUND1 EQU 5E2FH
SOUND2 EQU 5E39H
SHPPS1 EQU 60FAH
SHEET EQU 555AH
P1OR2F EQU 60F1H
NOPLAY EQU 6100H
DEMOF EQU 60F2H
NUSHIP EQU 6106H
SCREEN EQU 5000H
PLY1NO EQU SCREEN+11
PLY2NO EQU SCREEN+3EH
SCORE1 EQU SCREEN+6
SCORE2 EQU SCREEN+39H
TMLNPT EQU 6281H
TIMLIN EQU 6113H
SPEED EQU 60FEH
SPEEDX EQU 565AH
GYTYP EQU 60EFH
PRNSTR EQU 619CH
SHOOTF EQU 610CH
FINTO1 EQU 6052H
SHTSPD EQU 594EH ;BULLET+4
CZPFRE EQU 643CH
TIMSPD EQU 568FH ;LDHLTC+6
BPOINT EQU 60E3H
CHANCE EQU 6494H
CHNCE1 EQU 6582H
NOOFSH EQU 64B3H
NOFSH1 EQU 6599H
TITLEP EQU 6780H
NUMHI1 EQU 6DC0H
NUMHI5 EQU 6DD8H
NUMHI4 EQU 6DD2H
HINM5 EQU 6E0EH
HINM4 EQU 6E02H
HINM1 EQU 6DDEH
VCTRHI EQU 7880H
SCPTTB EQU 6139H
DEAD LD HL,SCPTTB
LD DE,SCPTTB+1
LD BC,38
LD (HL),0
LDIR
LD A,(P1OR2F)
LD HL,PLY1NO-1
OR A
JR Z,DEAD1
LD HL,PLY2NO-1
DEAD1 INC HL
DEC (HL)
LD A,(HL)
CP '0'
DEC HL
JR NC,DEAD2
DEC (HL)
INC HL
LD A,(HL)
ADD A,10
LD (HL),A
DEC HL
DEAD2 LD D,(HL)
INC HL
LD E,(HL)
LD HL,3030H
EX DE,HL
AND A
SBC HL,DE
LD A,L
SLA H
SLA H
SLA H
SLA H
ADD A,H
LD (PLYNO),A
BEGIN LD HL,SCREEN
LD DE,3C00H
LD BC,40H
LDIR
START CALL REVERS
CALL RNDOM
SLA C
LD B,0
INC C
LD (SOUND1),BC
LD (SOUND2),BC
CALL SOUND
CALL SOUND
CALL REVERS
CALL RNDOM
SLA C
LD B,0
INC C
LD (SOUND1),BC
LD (SOUND2),BC
CALL SOUND
CALL SOUND
LD A,(SHPPS1)
ADD A,6
LD IX,PNTTBL
LD B,2
STPNT1 PUSH BC
LD B,30
SETPNT PUSH BC
LD (IX+0),1
LD (IX+3),47
LD (IX+4),A
CALL RNDOM
LD (IX+2),C
CALL RNDOM
SET 7,C
LD (IX+1),C
LD B,5
INC IX
DJNZ $-2
POP BC
DJNZ SETPNT
INC A
POP BC
DJNZ STPNT1
CTPNT LD IX,PNTTBL
LD B,60
LD A,0
LD (CTPTOT),A
CNTPNT PUSH BC
CALL RNDOM
SLA C
INC C
LD B,0
LD (SOUND1),BC
LD (SOUND2),BC
CALL SOUND
CALL SOUND
LD A,(IX+0)
OR A
JR NZ,PNTCNT
LD A,(CTPTOT)
INC A
LD (CTPTOT),A
JR CNTPT1
PNTCNT LD A,1
LD (STORS1),A
LD A,(IX+3)
LD (STARTY+1),A
LD A,(IX+4)
LD (STARTX+1),A
CALL SET
CALL RNDMTY
CALL ADDX
CALL ADDY
LD A,(IX+0)
OR A
JR NZ,PTCNT1
LD A,(CTPTOT)
INC A
LD (CTPTOT),A
JR CNTPT1
PTCNT1 LD A,(IX+3)
LD (STARTY+1),A
LD A,(IX+4)
LD (STARTX+1),A
LD A,0
LD (STORS1),A
CALL SET
CNTPT1 LD B,5
INC IX
DJNZ $-2
POP BC
DJNZ CNTPNT
LD A,(CTPTOT)
CP 60
JP Z,DEAD86
JP CTPNT
RNDOM PUSH AF
LD A,(RNDNO)
LD HL,(CONTER)
XOR (HL)
INC HL
LD (RNDNO),A
LD A,H
CP 2FH
JR NZ,NORST
LD H,0
NORST LD (CONTER),HL
LD A,(RNDNO)
AND 87H
LD C,A
POP AF
RET
ADDX LD C,(IX+4)
LD A,(IX+2)
SRL A
SRL A
SRL A
AND 1
SLA C
ADD A,C
LD B,A
LD A,(IX+2)
AND 7
LD C,A
LD A,B
BIT 7,(IX+2)
JR Z,ADDPOS
SUB C
JR ADDPS1
ADDPOS ADD A,C
ADDPS1 JR C,CKXOT1
SRL A
LD (IX+4),A
JR C,SET4X2
RES 3,(IX+2)
JR CKXOUT
SET4X2 SET 3,(IX+2)
RET
CKXOT1 LD (IX+0),0
CKXOUT RET
ADDY LD C,(IX+3)
LD A,(IX+1)
SRL A
SRL A
SRL A
AND 1
SLA C
ADD A,C
LD C,A
LD A,(IX+1)
AND 7
BIT 7,(IX+1)
JR Z,ADDPLS
NEG
ADDPLS ADD A,C
SRL A
LD (IX+3),A
JR C,SET4X1
RES 3,(IX+1)
JR CKYOUT
SET4X1 SET 3,(IX+1)
CKYOUT CP 3
JR C,CKYOT1
AND 30H
CP 30H
RET NZ
CKYOT1 LD (IX+0),0
RET
RNDMTY CALL RNDOM
BIT 7,C
RET NZ
LD A,(IX+1)
AND 7
JR NZ,RDMTY1
RES 7,(IX+1)
RDMTY1 BIT 7,(IX+1)
JR Z,INCMTY
DEC (IX+1)
RET
INCMTY INC (IX+1)
RET
DEAD86 LD A,(PLYNO)
OR A
JR NZ,EXCHNG
CALL GMOVER
LD A,(NOPLAY)
OR A
JP Z,HISCCK
LD A,(PLYNO)
LD B,A
LD A,(PLYNO1)
OR B
JP Z,HISCCK
EXCHNG LD A,(NOPLAY)
OR A
JR Z,EXCHN1
LD A,(GYTYP)
EX AF,AF'
LD A,(GYTYP1)
LD (GYTYP),A
EX AF,AF'
LD (GYTYP1),A
LD A,(NUSHIP)
EX AF,AF'
LD A,(NUSHP1)
LD (NUSHIP),A
EX AF,AF'
LD (NUSHP1),A
LD A,(PLYNO)
EX AF,AF'
LD A,(PLYNO1)
LD (PLYNO),A
EX AF,AF'
LD (PLYNO1),A
LD A,(P1OR2F)
XOR 1
LD (P1OR2F),A
EXCHN1 LD A,3AH
LD (SHPPOS),A
LD (SHPPS1),A
LD A,(PLYNO)
OR A
JR Z,EXCHNG
LD A,46
LD (TIMLIN),A
CALL TMLNPT
LD BC,3000H
CALL 60H
CALL SPFX
CALL PLYMS
JP SHEET
GMOVER LD HL,3D54H
LD DE,3D55H
LD BC,15H
LD (HL),80H
LDIR
LD HL,GMOVMS
LD DE,7956H-SCREEN
CALL PRNSTR
LD A,(P1OR2F)
ADD A,31H
LD (3D67H),A
LD BC,0B000H
CALL 60H
LD HL,3D55H
LD DE,3D56H
LD BC,19
LD (HL),80H
LDIR
LD BC,4800H
JP 60H
PLYMS LD HL,3D58H
LD DE,3D59H
LD BC,0AH
LD (HL),80H
LDIR
LD HL,PLYRMS
LD DE,795AH-SCREEN
CALL PRNSTR
LD A,(P1OR2F)
ADD A,31H
LD (3D61H),A
LD BC,6000H
CALL 60H
LD HL,3D59H
LD DE,3D5AH
LD BC,10
LD (HL),80H
LDIR
LD BC,2800H
JP 60H
SPFX LD HL,SCREEN+40H
LD DE,SCREEN+41H
LD BC,03CFH
LD (HL),80H
LDIR
LD A,(SPFXCN)
INC A
AND 3
LD (SPFXCN),A
OR A
JR Z,SIDEFX
DEC A
JR Z,UPFX
DEC A
JR Z,NOFX
DEC A
JP Z,FNGRFX
SIDEFX LD A,0BFH
SIDFX3 LD B,65
SIDFX2 PUSH BC
LD B,16
LD HL,3C00H
LD DE,3BFFH
SIDFX1 PUSH BC
INC HL
INC DE
LD BC,63
LDIR
LD (DE),A
POP BC
DJNZ SIDFX1
PUSH HL
PUSH AF
LD HL,30H
LD (SOUND1),HL
LD (SOUND2),HL
CALL SOUND
CALL SOUND
CALL SOUND
POP AF
POP HL
POP BC
DJNZ SIDFX2
CP 80H
JR Z,RET
LD A,80H
JR SIDFX3
NOFX LD HL,3C00H
LD DE,3C01H
LD BC,03FFH
LD (HL),80H
LDIR
LD HL,30H
LD (SOUND1),HL
LD (SOUND2),HL
LD BC,2000H
CALL 60H
LD B,9
NOFXSN PUSH BC
CALL SOUND
POP BC
DJNZ NOFXSN
JR RET
UPFX LD A,0BFH
UPFX8 LD B,17
UPFX1 PUSH BC
LD HL,3FBFH
LD DE,3FFFH
LD BC,3C0H
LDDR
LD HL,3C00H
LD DE,3C01H
LD BC,3FH
LD (HL),A
LDIR
LD L,H
LD H,0
LD (SOUND1),HL
LD (SOUND2),HL
LD B,10H
UPFX2 PUSH BC
PUSH AF
CALL SOUND
POP AF
POP BC
DJNZ UPFX2
POP BC
DJNZ UPFX1
CP 80H
JR Z,RET
LD A,80H
JR UPFX8
RET LD HL,SCREEN
LD DE,3C00H
LD BC,40H
LDIR
LD A,1
LD (SHOOTF),A
CALL FINTO1
RET
FNGRFX LD A,80H
LD HL,3C01H
LD DE,3C00H
LD B,65
FNGFX2 PUSH BC
LD B,8
FNGFX1 PUSH BC
LD BC,3FH
LDIR
LD (DE),A
EX DE,HL
LD BC,3FH
ADD HL,BC
LD E,L
LD D,H
INC DE
LDDR
LD (DE),A
EX DE,HL
LD BC,41H
ADD HL,BC
LD D,H
LD E,L
DEC DE
POP BC
DJNZ FNGFX1
LD L,H
LD H,0
LD (SOUND1),HL
LD (SOUND2),HL
LD B,5
FNGSND PUSH BC
PUSH AF
CALL SOUND
POP AF
POP BC
DJNZ FNGSND
LD HL,3C01H
LD DE,3C00H
POP BC
DJNZ FNGFX2
JR RET
GMOVMS DEFM 'Game Over '
PLYRMS DEFM 'Player '
DEFB 0
LEVELS LD A,(P1OR2F)
OR A
LD HL,SCORE1-5
JR Z,LEVLS1
LD HL,SCORE2-5
LEVLS1 LD A,(HL)
INC HL
SUB '0'
JR Z,LEV0X0
DEC A
JR Z,LEV1X0
DEC A
JR Z,LEV2X0
LEV3X0 LD A,20
LEV3L0 LD (LEVEL),A
JR LEVFIX
LEV2X0 LD B,18
CALL LEVCK1
LD A,B
JR LEV3L0
LEV0X0 LD A,(HL)
INC HL
SUB '0'
CP 5
JR NC,LEV0H0
SLA A
LD B,A
CALL LEVCK1
LD A,B
JR LEV3L0
LEV0H0 ADD A,5
JR LEV3L0
LEV1X0 LD B,15
CALL LEVCHK
LD A,B
JR LEV3L0
LEVCHK LD A,(HL)
SUB '0'
CP 2
RET C
INC B
LEVCK1 LD A,(HL)
SUB '0'
CP 5
RET C
INC B
RET
LEVFIX LD A,(LEVEL)
CP 8
PUSH AF
JR C,LEVFX1
LD A,38H
JR LEVFX2
LEVFX1 LD A,20H
LEVFX2 LD (SHTSPD),A
POP AF
LD E,A
LD D,0
LD HL,CZPTBL
ADD HL,DE
LD A,(HL)
LD (CZPFRE),A
LD HL,TIMTBL
ADD HL,DE
LD A,(HL)
LD (TIMSPD),A
LD HL,SPDTBL
ADD HL,DE
LD A,(HL)
LD (SPEED+1),A
LD H,D
LD L,E
ADD HL,HL
ADD HL,DE
EX DE,HL
LD HL,BTBL
ADD HL,DE
LD DE,BPOINT
LD BC,3
LDIR
LD HL,(LEVEL)
LD H,0
ADD HL,HL
EX DE,HL
LD A,(GYTYP)
LD HL,EYETBL
DEC A
JR Z,PUTIT
LD HL,FITTBL
DEC A
JR Z,PUTIT
LD HL,DRNTBL
DEC A
JR Z,PUTIT
LD HL,XCUTBL
DEC A
RET Z
DEC A
JR Z,PUTIT
RET
PUTIT ADD HL,DE
LD A,(HL)
LD (CHANCE),A
LD (CHNCE1),A
INC HL
LD A,(HL)
LD (NOOFSH),A
LD (NOFSH1),A
RET
CTPTOT DEFB 0
PLYNO DEFB 3
PLYNO1 DEFB 3
GYTYP1 DEFB 1
NUSHP1 DEFB 0
SPFXCN DEFB 0
LEVEL DEFB 0
EYETBL DEFW 21FH
DEFW 31FH
DEFW 20FH
DEFW 30FH
DEFW 40FH
DEFW 50FH
DEFW 307H
DEFW 407H
DEFW 507H
DEFW 607H
DEFW 707H
DEFW 403H
DEFW 503H
DEFW 603H
DEFW 703H
DEFW 501H
DEFW 601H
DEFW 701H
DEFW 801H
DEFW 800H
DEFW 800H
FITTBL DEFW 31FH
DEFW 20FH
DEFW 30FH
DEFW 40FH
DEFW 50FH
DEFW 307H
DEFW 407H
DEFW 507H
DEFW 607H
DEFW 707H
DEFW 403H
DEFW 503H
DEFW 603H
DEFW 703H
DEFW 501H
DEFW 601H
DEFW 701H
DEFW 801H
DEFW 800H
DEFW 800H
DEFW 800H
DRNTBL DEFW 11FH
DEFW 21FH
DEFW 31FH
DEFW 20FH
DEFW 30FH
DEFW 40FH
DEFW 50FH
DEFW 307H
DEFW 407H
DEFW 507H
DEFW 607H
DEFW 707H
DEFW 403H
DEFW 503H
DEFW 603H
DEFW 703H
DEFW 501H
DEFW 601H
DEFW 701H
DEFW 801H
DEFW 800H
XCUTBL DEFW 11FH
DEFW 21FH
DEFW 31FH
DEFW 20FH
DEFW 30FH
DEFW 207H
DEFW 307H
DEFW 407H
DEFW 203H
DEFW 303H
DEFW 403H
DEFW 301H
DEFW 401H
DEFW 300H
DEFW 400H
DEFW 400H
DEFW 400H
DEFW 400H
DEFW 400H
DEFW 400H
DEFW 400H
CZPTBL DEFW 1F3FH
DEFW 0F1FH
DEFW 0F0FH
DEFW 070FH
DEFW 0707H
DEFW 0707H
DEFW 0303H
DEFW 303H
DEFW 101H
DEFW 101H
DEFB 0
TIMTBL DEFB 18H
DEFB 18H
DEFB 18H
DEFB 14H
DEFB 14H
DEFB 14H
DEFB 14H
DEFB 10H
DEFB 10H
DEFB 10H
DEFB 10H
DEFB 10H
DEFB 0CH
DEFB 0CH
DEFB 0CH
DEFB 0CH
DEFB 0CH
DEFB 08H
DEFB 08H
DEFB 08H
DEFB 04H
SPDTBL DEFW 404H
DEFB 4
DEFW 303H
DEFB 3
DEFW 202H
DEFB 2
DEFW 102H
DEFW 101H
DEFB 1
DEFW 101H
DEFW 101H
DEFW 101H
DEFB 1
BTBL DEFW 100H
DEFB 0
DEFW 100H
DEFB 0
DEFW 200H
DEFB 0
DEFW 200H
DEFB 0
DEFW 200H
DEFB 0
DEFW 400H
DEFB 0
DEFW 400H
DEFB 0
DEFW 400H
DEFB 0
DEFW 400H
DEFB 0
DEFW 0
DEFB 1
DEFW 0
DEFB 1
DEFW 0
DEFB 1
DEFW 500H
DEFB 1
DEFW 500H
DEFB 1
DEFW 500H
DEFB 1
DEFW 0
DEFB 2
DEFW 0
DEFB 2
DEFW 0
DEFB 2
DEFW 0
DEFB 5
DEFW 0
DEFB 5
DEFW 0
DEFB 5
HISCCK LD A,0C9H
LD (RET),A
CALL SPFX
LD A,21H
LD (RET),A
LD HL,VCTRHI
LD DE,4000H
LD BC,40H
LDIR
LD A,(DEMOF)
OR A
JP NZ,TITLEP
HISCK1 LD HL,SCORE2-5
LD DE,SCORE1-5
CALL COMPAR
LD A,5
LD (PERMUT),A
LD A,(PLAYER)
ADD A,'0'
LD (MESSAG+27),A
LD C,L
LD B,H
LD DE,NUMHI1
HISCK2 PUSH BC
CALL COMPAR
POP BC
PUSH HL
AND A
SBC HL,BC
POP HL
JR Z,MOVBAK
LD A,(PERMUT)
DEC A
LD (PERMUT),A
JP Z,TITLEP
PUSH BC
LD BC,6
ADD HL,BC
POP BC
EX DE,HL
LD L,C
LD H,B
JR HISCK2
MOVBAK LD A,(PERMUT)
DEC A
LD (PERMUT),A
LD (SCRPOS),HL
LD HL,MESSAG
LD DE,78D0H-SCREEN
CALL PRNSTR
INC HL
LD DE,7949H-SCREEN
CALL PRNSTR
INC HL
LD DE,79CFH-SCREEN
CALL PRNSTR
INC HL
LD DE,7A5BH-SCREEN
CALL PRNSTR
LD B,8
LD HL,BUFFER
PUSH BC
PUSH HL
LD D,H
LD E,L
INC DE
LD (HL),20H
LD BC,8
LDIR
POP HL
POP BC
LD DE,3E5DH
LD (4020H),DE
CALL 40H
CALL CHKBUF
LD DE,NUMHI5+5
LD HL,NUMHI4+5
LD A,(PERMUT)
LD C,A
LD B,0
PUSH HL
LD L,C
LD H,B
ADD HL,HL
ADD HL,BC
ADD HL,HL
LD C,L
LD B,H
POP HL
LD A,B
OR C
JR Z,MVBK1
LDDR
MVBK1 INC HL
EX DE,HL
LD HL,(SCRPOS)
LD BC,6
LDIR
LD HL,(SCRPOS)
LD DE,(SCRPOS)
INC DE
LD (HL),'0'
LD BC,5
LDIR
LD A,(PERMUT)
LD C,A
LD B,0
LD L,C
LD H,B
ADD HL,HL
ADD HL,BC
ADD HL,HL
ADD HL,HL
LD C,L
LD B,H
LD DE,HINM5+11
LD HL,HINM4+11
LD A,B
OR C
JR Z,MVBAK6
LDDR
MVBAK6 INC HL
INC HL
INC HL
INC HL
EX DE,HL
LD HL,BUFFER
LD BC,8
LDIR
LD B,5
LD A,'0'
LD HL,HINM1
LOOPY1 INC A
LD (HL),A
LD DE,12
ADD HL,DE
DJNZ LOOPY1
LD A,0C9H
LD (RET),A
CALL SPFX
LD A,21H
LD (RET),A
JP HISCK1
COMPAR PUSH HL
PUSH DE
LD B,6
COMPR2 LD A,(DE)
CP (HL)
JR C,HLBIGR
JR NZ,DEBIGR
INC HL
INC DE
DJNZ COMPR2
POP HL
POP DE
LD A,1
LD (PLAYER),A
RET
DEBIGR POP HL
POP DE
LD A,1
LD (PLAYER),A
RET
HLBIGR POP DE
POP HL
LD A,2
LD (PLAYER),A
RET
CHKBUF PUSH HL
PUSH BC
LD HL,BUFFER
LD B,8
CHKBF2 LD A,(HL)
CP 20H
JR NC,DJNZBF
CHKBF1 LD (HL),20H
INC HL
DJNZ CHKBF1
POP BC
POP HL
RET
DJNZBF INC HL
DJNZ CHKBF2
POP BC
POP HL
RET
MESSAG DEFM '>>> Congratulations Player <<<'
DEFB 0
DEFM 'You have one of the top five scores of today.'
DEFB 0
DEFM 'Please enter your name or initials.'
DEFB 0
DEFM '? '
DEFB 0
BUFFER DEFS 10
PERMUT DEFB 0
SCRPOS DEFW 0
PLAYER DEFB 0
PNTTBL DEFS 310
LAST EQU $
END DEAD
|
_inc/SBZ pallet script 2.asm | vladjester2020/Sonic1TMR | 0 | 240247 | <reponame>vladjester2020/Sonic1TMR<gh_stars>0
; ---------------------------------------------------------------------------
; Scrap Brain Zone 2 pallet cycling script
; ---------------------------------------------------------------------------
dc.w 6
dc.b 7, 8
dc.w Pal_SBZCyc1
dc.w $FB50
dc.b $D, 8
dc.w Pal_SBZCyc2
dc.w $FB52
dc.b 9, 8
dc.w Pal_SBZCyc9
dc.w $FB70
dc.b 7, 8
dc.w Pal_SBZCyc6
dc.w $FB72
dc.b 3, 3
dc.w Pal_SBZCyc8
dc.w $FB78
dc.b 3, 3
dc.w Pal_SBZCyc8+2
dc.w $FB7A
dc.b 3, 3
dc.w Pal_SBZCyc8+4
dc.w $FB7C
even |
snapgear_linux/lib/libgmp/mpn/x86/k6/aorsmul_1.asm | impedimentToProgress/UCI-BlueChip | 0 | 176626 | # AMD K6 mpn_addmul_1/mpn_submul_1 -- add or subtract mpn multiple.
#
# K6: 7.65 to 8.5 cycles/limb (at 16 limbs/loop and depending on the data),
# PIC adds about 6 cycles at the start.
# Copyright (C) 1999, 2000 Free Software Foundation, Inc.
#
# This file is part of the GNU MP Library.
#
# The GNU MP Library is free software; you can redistribute it and/or modify
# it under the terms of the GNU Library General Public License as published by
# the Free Software Foundation; either version 2 of the License, or (at your
# option) any later version.
#
# The GNU MP Library is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Library General Public
# License for more details.
#
# You should have received a copy of the GNU Library General Public License
# along with the GNU MP Library; see the file COPYING.LIB. If not, write to
# the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston,
# MA 02111-1307, USA.
include(`../config.m4')
dnl K6: large multpliers small multpliers
dnl UNROLL_COUNT cycles/limb cycles/limb
dnl 4 9.5 7.78
dnl 8 9.0 7.78
dnl 16 8.4 7.65
dnl 32 8.4 8.2
dnl
dnl Maximum possible unrolling with the current code is 32.
dnl
dnl Unrolling to 16 limbs/loop makes the unrolled loop fit exactly in a 256
dnl byte block, which might explain the good speed at that unrolling.
deflit(UNROLL_COUNT, 16)
ifdef(`OPERATION_addmul_1', `
define(M4_inst, addl)
define(M4_function_1, mpn_addmul_1)
define(M4_function_1c, mpn_addmul_1c)
define(M4_description, add it to)
define(M4_desc_retval, carry)
',`ifdef(`OPERATION_submul_1', `
define(M4_inst, subl)
define(M4_function_1, mpn_submul_1)
define(M4_function_1c, mpn_submul_1c)
define(M4_description, subtract it from)
define(M4_desc_retval, borrow)
',`m4_error(`Need OPERATION_addmul_1 or OPERATION_submul_1
')')')
MULFUNC_PROLOGUE(mpn_addmul_1 mpn_addmul_1c mpn_submul_1 mpn_submul_1c)
`#' mp_limb_t M4_function_1 (mp_ptr dst, mp_srcptr src, mp_size_t size,
`#' mp_limb_t mult);
`#' mp_limb_t M4_function_1c (mp_ptr dst, mp_srcptr src, mp_size_t size,
`#' mp_limb_t mult, mp_limb_t carry);
`#'
`#' Calculate src,size multiplied by mult and M4_description dst,size.
`#' Return the M4_desc_retval limb from the top of the result.
#
# The jadcl0()s in the unrolled loop makes the speed data dependent. Small
# multipliers (most significant few bits clear) result in few carry bits and
# speeds up to 7.65 cycles/limb are attained. Large multipliers (most
# significant few bits set) make the carry bits 50/50 and lead to something
# more like 8.4 c/l. (With adcl's both of these would be 9.3 c/l.)
#
# It's important that the gains for jadcl0 on small multipliers don't come
# at the cost of slowing down other data. Tests on uniformly distributed
# random data, designed to confound branch prediction, show about a 7%
# speed-up using jadcl0 over adcl (8.93 versus 9.57 cycles/limb, with all
# overheads included).
#
# In the simple loop, jadcl0() measures slower than adcl (11.9-14.7 versus
# 11.0 cycles/limb), and hence isn't used.
#
# In the simple loop, note that running ecx from negative to zero and using
# it as an index in the two movs wouldn't help. It would save one
# instruction (2*addl+loop becoming incl+jnz), but there's nothing unpaired
# that would be collapsed by this.
#
#
# jadcl0
# ------
#
# jadcl0() being faster than adcl $0 seems to be an artifact of two things,
# firstly the instruction decoding and secondly the fact that there's a
# carry bit for the jadcl0 only on average about 1/4 of the time.
#
# The code in the unrolled loop decodes something like the following.
#
# decode cycles
# mull %ebp 2
# M4_inst %esi, disp(%edi) 1
# adcl %eax, %ecx 2
# movl %edx, %esi \ 1
# jnc 1f /
# incl %esi \ 1
# 1: movl disp(%ebx), %eax /
# ---
# 7
#
# In a back-to-back style test this measures 7 with the jnc not taken, or 8
# with it taken (both when correctly predicted). This is opposite to the
# measurements showing small multipliers running faster than large ones.
# Watch this space for more info ...
#
# It's not clear how much branch misprediction might be costing. The K6
# doco says it will be 1 to 4 cycles, but presumably it's near the low end
# of that range to get the measured results.
#
#
# In the code the two carries are more or less the preceding mul product and
# the calculation is roughly
#
# x*y + u*b+v
#
# where b=2^32 is the size of a limb, x*y is the two carry limbs, and u and
# v are the two limbs it's added to (being the low of the next mul, and a
# limb from the destination).
#
# To get a carry requires x*y+u*b+v >= b^2, which is u*b+v >= b^2-x*y, and
# there are b^2-(b^2-x*y) = x*y many such values, giving a probability of
# x*y/b^2. If x, y, u and v are random and uniformly distributed between 0
# and b-1, then the total probability can be summed over x and y,
#
# 1 b-1 b-1 x*y 1 b*(b-1) b*(b-1)
# --- * sum sum --- = --- * ------- * ------- = 1/4
# b^2 x=0 y=1 b^2 b^4 2 2
#
# Actually it's a very tiny bit less than 1/4 of course. If y is fixed,
# then the probability is 1/2*y/b thus varying linearly between 0 and 1/2.
ifdef(`PIC',`
deflit(UNROLL_THRESHOLD, 9)
',`
deflit(UNROLL_THRESHOLD, 6)
')
defframe(PARAM_CARRY, 20)
defframe(PARAM_MULTIPLIER,16)
defframe(PARAM_SIZE, 12)
defframe(PARAM_SRC, 8)
defframe(PARAM_DST, 4)
.text
ALIGN(32)
PROLOGUE(M4_function_1c)
pushl %esi
deflit(`FRAME',4)
movl PARAM_CARRY, %esi
jmp LF(M4_function_1,start_nc)
EPILOGUE()
PROLOGUE(M4_function_1)
push %esi
deflit(`FRAME',4)
xorl %esi, %esi # initial carry
L(start_nc):
movl PARAM_SIZE, %ecx
pushl %ebx
deflit(`FRAME',8)
movl PARAM_SRC, %ebx
pushl %edi
deflit(`FRAME',12)
cmpl $UNROLL_THRESHOLD, %ecx
movl PARAM_DST, %edi
pushl %ebp
deflit(`FRAME',16)
jae L(unroll)
# simple loop
movl PARAM_MULTIPLIER, %ebp
L(simple):
# eax scratch
# ebx src
# ecx counter
# edx scratch
# esi carry
# edi dst
# ebp multiplier
movl (%ebx), %eax
addl $4, %ebx
mull %ebp
addl $4, %edi
addl %esi, %eax
adcl $0, %edx
M4_inst %eax, -4(%edi)
adcl $0, %edx
movl %edx, %esi
loop L(simple)
popl %ebp
popl %edi
popl %ebx
movl %esi, %eax
popl %esi
ret
#------------------------------------------------------------------------------
# The unrolled loop uses a "two carry limbs" scheme. At the top of the loop
# the carries are ecx=lo, esi=hi, then they swap for each limb processed.
# For the computed jump an odd size means they start one way around, an even
# size the other.
#
# VAR_JUMP holds the computed jump temporarily because there's not enough
# registers at the point of doing the mul for the initial two carry limbs.
#
# The add/adc for the initial carry in %esi is necessary only for the
# mpn_addmul/submul_1c entry points. Duplicating the startup code to
# eliminiate this for the plain mpn_add/submul_1 doesn't seem like a good
# idea.
dnl overlapping with parameters already fetched
define(VAR_COUNTER, `PARAM_SIZE')
define(VAR_JUMP, `PARAM_DST')
L(unroll):
# eax
# ebx src
# ecx size
# edx
# esi initial carry
# edi dst
# ebp
movl %ecx, %edx
decl %ecx
subl $2, %edx
negl %ecx
shrl $UNROLL_LOG2, %edx
andl $UNROLL_MASK, %ecx
movl %edx, VAR_COUNTER
movl %ecx, %edx
shll $4, %edx
negl %ecx
# 15 code bytes per limb
ifdef(`PIC',`
call L(pic_calc)
L(here):
',`
leal L(entry) (%edx,%ecx,1), %edx
')
movl (%ebx), %eax # src low limb
movl PARAM_MULTIPLIER, %ebp
movl %edx, VAR_JUMP
mull %ebp
addl %esi, %eax # initial carry (from _1c)
jadcl0( %edx)
leal 4(%ebx,%ecx,4), %ebx
movl %edx, %esi # high carry
movl VAR_JUMP, %edx
leal (%edi,%ecx,4), %edi
testl $1, %ecx
movl %eax, %ecx # low carry
jz L(noswap)
movl %esi, %ecx # high,low carry other way around
movl %eax, %esi
L(noswap):
jmp *%edx
ifdef(`PIC',`
L(pic_calc):
# See README.family about old gas bugs
leal (%edx,%ecx,1), %edx
addl $L(entry)-L(here), %edx
addl (%esp), %edx
ret
')
# -----------------------------------------------------------
ALIGN(32)
L(top):
deflit(`FRAME',16)
# eax scratch
# ebx src
# ecx carry lo
# edx scratch
# esi carry hi
# edi dst
# ebp multiplier
#
# 15 code bytes per limb
leal UNROLL_BYTES(%edi), %edi
L(entry):
forloop(`i', 0, UNROLL_COUNT/2-1, `
deflit(`disp0', eval(2*i*4))
deflit(`disp1', eval(disp0 + 4))
Zdisp( movl, disp0,(%ebx), %eax)
mull %ebp
Zdisp( M4_inst,%ecx, disp0,(%edi))
adcl %eax, %esi
movl %edx, %ecx
jadcl0( %ecx)
movl disp1(%ebx), %eax
mull %ebp
M4_inst %esi, disp1(%edi)
adcl %eax, %ecx
movl %edx, %esi
jadcl0( %esi)
')
decl VAR_COUNTER
leal UNROLL_BYTES(%ebx), %ebx
jns L(top)
popl %ebp
M4_inst %ecx, UNROLL_BYTES(%edi)
popl %edi
movl %esi, %eax
popl %ebx
jadcl0( %eax)
popl %esi
ret
EPILOGUE()
|
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_709.asm | ljhsiun2/medusa | 9 | 247768 | <filename>Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_709.asm
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r15
push %rax
push %rbp
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x140f2, %rsi
lea addresses_UC_ht+0x8a02, %rdi
nop
nop
nop
add %rax, %rax
mov $28, %rcx
rep movsl
nop
nop
and %rbx, %rbx
lea addresses_normal_ht+0x1d3e2, %rsi
lea addresses_A_ht+0xf5da, %rdi
nop
sub $20911, %r11
mov $6, %rcx
rep movsw
nop
nop
nop
nop
and %rdi, %rdi
lea addresses_UC_ht+0x602, %rcx
mfence
mov (%rcx), %esi
nop
nop
nop
nop
nop
dec %r11
lea addresses_UC_ht+0x11a02, %rsi
nop
nop
nop
sub %rdi, %rdi
mov (%rsi), %cx
nop
nop
cmp $48082, %rax
lea addresses_UC_ht+0x12002, %r11
inc %rdi
mov (%r11), %eax
nop
sub $42736, %rax
lea addresses_WC_ht+0xfdb2, %rsi
lea addresses_WC_ht+0x131e2, %rdi
nop
nop
nop
nop
add %r15, %r15
mov $120, %rcx
rep movsl
and %r15, %r15
lea addresses_WC_ht+0x6682, %r15
nop
nop
cmp %rsi, %rsi
and $0xffffffffffffffc0, %r15
vmovntdqa (%r15), %ymm4
vextracti128 $0, %ymm4, %xmm4
vpextrq $1, %xmm4, %rbx
nop
nop
add $24689, %rbx
lea addresses_WT_ht+0x1ba02, %rax
nop
nop
nop
nop
nop
sub %rdi, %rdi
movw $0x6162, (%rax)
nop
nop
nop
nop
nop
and %r11, %r11
lea addresses_normal_ht+0x18ea6, %rsi
and $51892, %r15
movl $0x61626364, (%rsi)
nop
nop
nop
nop
nop
and %rdi, %rdi
lea addresses_A_ht+0x5e02, %rsi
lea addresses_D_ht+0x12ee2, %rdi
nop
sub %r15, %r15
mov $98, %rcx
rep movsl
nop
dec %rax
lea addresses_A_ht+0x17ae2, %rsi
lea addresses_UC_ht+0x7b3a, %rdi
nop
nop
nop
cmp %rbp, %rbp
mov $32, %rcx
rep movsb
nop
sub %rcx, %rcx
lea addresses_WT_ht+0x2a02, %rax
sub %rbx, %rbx
movl $0x61626364, (%rax)
nop
nop
nop
sub $13601, %rax
lea addresses_UC_ht+0xaf47, %rsi
cmp %rcx, %rcx
mov (%rsi), %ax
nop
nop
nop
nop
nop
cmp $62407, %r11
lea addresses_UC_ht+0x6582, %r11
xor $6163, %rcx
and $0xffffffffffffffc0, %r11
movaps (%r11), %xmm0
vpextrq $0, %xmm0, %rbp
nop
nop
nop
xor $6699, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rbp
pop %rax
pop %r15
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r13
push %r15
push %rax
push %rbp
push %rcx
push %rsi
// Load
lea addresses_A+0x17f16, %r13
nop
nop
nop
nop
nop
add $6230, %rsi
mov (%r13), %r11w
nop
nop
nop
nop
cmp $53529, %r15
// Store
lea addresses_normal+0x13a02, %rbp
nop
sub $629, %rcx
movb $0x51, (%rbp)
nop
sub $31662, %r15
// Faulty Load
lea addresses_WC+0xda02, %r15
sub %rsi, %rsi
mov (%r15), %rcx
lea oracles, %r11
and $0xff, %rcx
shlq $12, %rcx
mov (%r11,%rcx,1), %rcx
pop %rsi
pop %rcx
pop %rbp
pop %rax
pop %r15
pop %r13
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_WC', 'size': 2, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 1, 'NT': False, 'type': 'addresses_A', 'size': 2, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 11, 'NT': True, 'type': 'addresses_normal', 'size': 1, 'AVXalign': False}}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_WC', 'size': 8, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_normal_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 9, 'same': False}}
{'src': {'type': 'addresses_normal_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_A_ht', 'congruent': 3, 'same': False}}
{'src': {'same': False, 'congruent': 9, 'NT': True, 'type': 'addresses_UC_ht', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 10, 'NT': True, 'type': 'addresses_UC_ht', 'size': 2, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 9, 'NT': False, 'type': 'addresses_UC_ht', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WC_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WC_ht', 'congruent': 4, 'same': False}}
{'src': {'same': False, 'congruent': 6, 'NT': True, 'type': 'addresses_WC_ht', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 11, 'NT': False, 'type': 'addresses_WT_ht', 'size': 2, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 2, 'NT': True, 'type': 'addresses_normal_ht', 'size': 4, 'AVXalign': False}}
{'src': {'type': 'addresses_A_ht', 'congruent': 8, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_D_ht', 'congruent': 5, 'same': False}}
{'src': {'type': 'addresses_A_ht', 'congruent': 5, 'same': True}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 3, 'same': False}}
{'OP': 'STOR', 'dst': {'same': True, 'congruent': 11, 'NT': False, 'type': 'addresses_WT_ht', 'size': 4, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_UC_ht', 'size': 2, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'same': True, 'congruent': 6, 'NT': False, 'type': 'addresses_UC_ht', 'size': 16, 'AVXalign': True}, 'OP': 'LOAD'}
{'38': 21829}
38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38 38
*/
|
gcc-gcc-7_3_0-release/gcc/testsuite/ada/acats/tests/c4/c49024a.ada | best08618/asylo | 7 | 20749 | -- C49024A.ADA
-- Grant of Unlimited Rights
--
-- Under contracts F33600-87-D-0337, F33600-84-D-0280, MDA903-79-C-0687,
-- F08630-91-C-0015, and DCA100-97-D-0025, the U.S. Government obtained
-- unlimited rights in the software and documentation contained herein.
-- Unlimited rights are defined in DFAR 252.227-7013(a)(19). By making
-- this public release, the Government intends to confer upon all
-- recipients unlimited rights equal to those held by the Government.
-- These rights include rights to use, duplicate, release or disclose the
-- released technical data and computer software in whole or in part, in
-- any manner and for any purpose whatsoever, and to have or permit others
-- to do so.
--
-- DISCLAIMER
--
-- ALL MATERIALS OR INFORMATION HEREIN RELEASED, MADE AVAILABLE OR
-- DISCLOSED ARE AS IS. THE GOVERNMENT MAKES NO EXPRESS OR IMPLIED
-- WARRANTY AS TO ANY MATTER WHATSOEVER, INCLUDING THE CONDITIONS OF THE
-- SOFTWARE, DOCUMENTATION OR OTHER INFORMATION RELEASED, MADE AVAILABLE
-- OR DISCLOSED, OR THE OWNERSHIP, MERCHANTABILITY, OR FITNESS FOR A
-- PARTICULAR PURPOSE OF SAID MATERIAL.
--*
-- CHECK THAT A FUNCTION CALL CAN APPEAR IN A STATIC EXPRESSION IF THE
-- FUNCTION NAME DENOTES A PREDEFINED OPERATOR AND HAS THE FORM OF AN
-- OPERATOR SYMBOL OR AN EXPANDED NAME WHOSE SELECTOR IS AN OPERATOR
-- SYMBOL.
-- L.BROWN 10/02/86
WITH REPORT; USE REPORT;
PROCEDURE C49024A IS
PACKAGE P IS
TYPE TY IS NEW INTEGER;
END P;
CON1 : CONSTANT P.TY := 3;
CON2 : CONSTANT P.TY := 4;
TYPE INT1 IS RANGE 1 .. P."+"(CON1,CON2);
CON3 : CONSTANT := 5;
CON4 : CONSTANT := 7;
TYPE FLT IS DIGITS "-"(CON4,CON3);
TYPE FIX1 IS DELTA 1.0 RANGE 0.0 .. 25.0;
CON5 : CONSTANT := 3.0;
CON6 : CONSTANT := 6.0;
TYPE FIX2 IS DELTA 1.0 RANGE 0.0 .. "/"(CON6,CON5);
TYPE ENUM IS (RED,BLUE,GREEN,BLACK);
CON7 : CONSTANT BOOLEAN := TRUE;
CON8 : CONSTANT ENUM := BLUE;
CAS_INT1 : CONSTANT := 10;
CAS_INT2 : CONSTANT := 2;
OBJ1 : INTEGER := 10;
CAS_BOL : BOOLEAN := TRUE;
CON9 : CONSTANT ENUM := BLACK;
CON10 : CONSTANT FIX1 := 2.0;
CON11 : CONSTANT FIX1 := 10.0;
TYPE FIX3 IS DELTA "+"(CON10) RANGE 0.0 .. 20.0;
TYPE INT2 IS RANGE 0 .. "ABS"("-"(CON4));
CON12 : CONSTANT CHARACTER := 'D';
CON13 : CONSTANT CHARACTER := 'B';
CON14 : CONSTANT BOOLEAN := FALSE;
CON15 : CONSTANT := 10;
BEGIN
TEST("C49024A","A FUNCTION CALL CAN BE IN A STATIC EXPRESSION "&
"IF THE FUNCTION NAME DENOTES A PREDEFINED "&
"OPERATOR AND HAS THE FORM OF AN OPERATOR SYMBOL");
CASE CAS_BOL IS
WHEN ("NOT"(CON7)) =>
FAILED("INCORRECT VALUE RETURNED FOR STATIC "&
"OPERATORS 1");
WHEN ("/="(CON8,CON9)) =>
OBJ1 := 2;
END CASE;
CAS_BOL := TRUE;
CASE CAS_BOL IS
WHEN ("*"(CON3,CON4) = CAS_INT1) =>
FAILED("INCORRECT VALUE RETURNED FOR STATIC "&
"OPERATORS 2");
WHEN ("ABS"(CON15) = CAS_INT1) =>
OBJ1 := 3;
END CASE;
CAS_BOL := TRUE;
CASE CAS_BOL IS
WHEN ("<"(CON11,CON10)) =>
FAILED("INCORRECT VALUE RETURNED FOR STATIC "&
"OPERATORS 3");
WHEN ("<="(CON13,CON12)) =>
OBJ1 := 4;
END CASE;
CAS_BOL := TRUE;
CASE CAS_BOL IS
WHEN ("REM"(CON4,CON3) = CAS_INT2) =>
OBJ1 := 5;
WHEN ("**"(CON3,CON4) = CAS_INT2) =>
FAILED("INCORRECT VALUE RETURNED FOR STATIC "&
"OPERATORS 4");
END CASE;
CASE CAS_BOL IS
WHEN (P.">"(CON1,CON2)) =>
FAILED("INCORRECT VALUE RETURNED FOR STATIC "&
"OPERATORS 5");
WHEN ("OR"(CON7,CON14)) =>
OBJ1 := 6;
END CASE;
CAS_BOL := TRUE;
CASE CAS_BOL IS
WHEN ("MOD"(CON4,CON3) = CAS_INT2) =>
OBJ1 := 7;
WHEN ("ABS"(CON4) = CAS_INT2) =>
FAILED("INCORRECT VALUE RETURNED FOR STATIC "&
"OPERATORS 6");
END CASE;
CASE CAS_BOL IS
WHEN ("AND"(CON7,CON14)) =>
FAILED("INCORRECT VALUE RETURNED FOR STATIC "&
"OPERATORS 7");
WHEN (">="(CON12,CON13)) =>
OBJ1 := 9;
END CASE;
RESULT;
END C49024A;
|
programs/oeis/297/A297402.asm | neoneye/loda | 22 | 22679 | ; A297402: a(n) = gcd_{k=1..n} (prime(k+1)^n-1)/2.
; 1,4,1,8,1,4,1,16,1,4,1,8,1,4,1,32,1,4,1,8,1,4,1,16,1,4,1,8,1,4,1,64,1,4,1,8,1,4,1,16,1,4,1,8,1,4,1,32,1,4,1,8,1,4,1,16,1,4,1,8,1,4,1,128,1,4,1,8,1,4,1,16,1,4,1,8,1,4,1,32,1,4,1,8,1,4,1,16,1,4,1,8,1,4,1,64,1,4,1,8
mov $1,2
sub $2,$0
sub $0,7
pow $0,4
sub $1,$2
sub $1,$2
gcd $0,$1
|
Disassembly/Md5_5_InlineRotate.asm | bretcope/blog-md5 | 0 | 81692 | <reponame>bretcope/blog-md5
Md5DotNet.Md5_5_InlineRotate.GetDigest(Byte*, Int32, Md5DotNet.Md5Digest*)
Begin 00007ffe8d3578f0, size fbc
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 21:
>>> 00007ffe`8d3578f0 4157 push r15
00007ffe`8d3578f2 4156 push r14
00007ffe`8d3578f4 4155 push r13
00007ffe`8d3578f6 4154 push r12
00007ffe`8d3578f8 57 push rdi
00007ffe`8d3578f9 56 push rsi
00007ffe`8d3578fa 55 push rbp
00007ffe`8d3578fb 53 push rbx
00007ffe`8d3578fc 4883ec78 sub rsp,78h
00007ffe`8d357900 488bf1 mov rsi,rcx
00007ffe`8d357903 488d7c2438 lea rdi,[rsp+38h]
00007ffe`8d357908 b910000000 mov ecx,10h
00007ffe`8d35790d 33c0 xor eax,eax
00007ffe`8d35790f f3ab rep stos dword ptr [rdi]
00007ffe`8d357911 488bce mov rcx,rsi
00007ffe`8d357914 488bd9 mov rbx,rcx
00007ffe`8d357917 8bfa mov edi,edx
00007ffe`8d357919 498bf0 mov rsi,r8
00007ffe`8d35791c 8d4708 lea eax,[rdi+8]
00007ffe`8d35791f 99 cdq
00007ffe`8d357920 83e23f and edx,3Fh
00007ffe`8d357923 03c2 add eax,edx
00007ffe`8d357925 c1f806 sar eax,6
00007ffe`8d357928 8d6801 lea ebp,[rax+1]
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 23:
00007ffe`8d35792b c70601234567 mov dword ptr [rsi],67452301h
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 24:
00007ffe`8d357931 c7460489abcdef mov dword ptr [rsi+4],0EFCDAB89h
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 25:
00007ffe`8d357938 c74608fedcba98 mov dword ptr [rsi+8],98BADCFEh
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 26:
00007ffe`8d35793f c7460c76543210 mov dword ptr [rsi+0Ch],10325476h
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 28:
00007ffe`8d357946 33c9 xor ecx,ecx
00007ffe`8d357948 488d542438 lea rdx,[rsp+38h]
00007ffe`8d35794d c4e17957c0 vxorpd xmm0,xmm0,xmm0
00007ffe`8d357952 c4e17a7f02 vmovdqu xmmword ptr [rdx],xmm0
00007ffe`8d357957 c4e17a7f4210 vmovdqu xmmword ptr [rdx+10h],xmm0
00007ffe`8d35795d c4e17a7f4220 vmovdqu xmmword ptr [rdx+20h],xmm0
00007ffe`8d357963 c4e17a7f4230 vmovdqu xmmword ptr [rdx+30h],xmm0
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 30:
00007ffe`8d357969 4533f6 xor r14d,r14d
00007ffe`8d35796c 85ed test ebp,ebp
00007ffe`8d35796e 0f8e270f0000 jle 00007ffe`8d35889b
00007ffe`8d357974 4c8d7e04 lea r15,[rsi+4]
00007ffe`8d357978 4c8d6608 lea r12,[rsi+8]
00007ffe`8d35797c 4c8d6e0c lea r13,[rsi+0Ch]
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 32:
00007ffe`8d357980 418bc6 mov eax,r14d
00007ffe`8d357983 c1e006 shl eax,6
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 33:
00007ffe`8d357986 8d4840 lea ecx,[rax+40h]
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 37:
00007ffe`8d357989 3bcf cmp ecx,edi
00007ffe`8d35798b 0f8e97000000 jle 00007ffe`8d357a28
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 39:
00007ffe`8d357991 3bc7 cmp eax,edi
00007ffe`8d357993 7c3c jl 00007ffe`8d3579d1
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 41:
00007ffe`8d357995 3bc7 cmp eax,edi
00007ffe`8d357997 7507 jne 00007ffe`8d3579a0
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 44:
00007ffe`8d357999 c644243880 mov byte ptr [rsp+38h],80h
00007ffe`8d35799e eb23 jmp 00007ffe`8d3579c3
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 49:
00007ffe`8d3579a0 33c9 xor ecx,ecx
00007ffe`8d3579a2 488d442438 lea rax,[rsp+38h]
00007ffe`8d3579a7 c4e17957c0 vxorpd xmm0,xmm0,xmm0
00007ffe`8d3579ac c4e17a7f00 vmovdqu xmmword ptr [rax],xmm0
00007ffe`8d3579b1 c4e17a7f4010 vmovdqu xmmword ptr [rax+10h],xmm0
00007ffe`8d3579b7 c4e17a7f4020 vmovdqu xmmword ptr [rax+20h],xmm0
00007ffe`8d3579bd c4e17a7f4030 vmovdqu xmmword ptr [rax+30h],xmm0
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 52:
00007ffe`8d3579c3 4863cf movsxd rcx,edi
00007ffe`8d3579c6 48c1e103 shl rcx,3
00007ffe`8d3579ca 48894c2470 mov qword ptr [rsp+70h],rcx
00007ffe`8d3579cf eb50 jmp 00007ffe`8d357a21
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 56:
00007ffe`8d3579d1 2bcf sub ecx,edi
00007ffe`8d3579d3 f7d9 neg ecx
00007ffe`8d3579d5 448d4940 lea r9d,[rcx+40h]
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 57:
00007ffe`8d3579d9 4c8d542438 lea r10,[rsp+38h]
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 58:
00007ffe`8d3579de 4863c8 movsxd rcx,eax
00007ffe`8d3579e1 4803cb add rcx,rbx
00007ffe`8d3579e4 4c89542428 mov qword ptr [rsp+28h],r10
00007ffe`8d3579e9 498bd2 mov rdx,r10
00007ffe`8d3579ec 44894c2434 mov dword ptr [rsp+34h],r9d
00007ffe`8d3579f1 458bc1 mov r8d,r9d
00007ffe`8d3579f4 e8c7a5ffff call 00007ffe`8d351fc0 (Md5DotNet.Common.UnsafeMemoryCopy(Byte*, Byte*, Int32), mdToken: 0000000006000002)
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 61:
00007ffe`8d3579f9 8b442434 mov eax,dword ptr [rsp+34h]
00007ffe`8d3579fd 4863d0 movsxd rdx,eax
00007ffe`8d357a00 488b4c2428 mov rcx,qword ptr [rsp+28h]
00007ffe`8d357a05 c6041180 mov byte ptr [rcx+rdx],80h
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 64:
00007ffe`8d357a09 ffc0 inc eax
00007ffe`8d357a0b f7d8 neg eax
00007ffe`8d357a0d 83c040 add eax,40h
00007ffe`8d357a10 83f808 cmp eax,8
00007ffe`8d357a13 7c0c jl 00007ffe`8d357a21
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 65:
00007ffe`8d357a15 4863c7 movsxd rax,edi
00007ffe`8d357a18 48c1e003 shl rax,3
00007ffe`8d357a1c 4889442470 mov qword ptr [rsp+70h],rax
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 69:
00007ffe`8d357a21 488d442438 lea rax,[rsp+38h]
00007ffe`8d357a26 eb06 jmp 00007ffe`8d357a2e
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 73:
00007ffe`8d357a28 4863c0 movsxd rax,eax
00007ffe`8d357a2b 4803c3 add rax,rbx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 76:
00007ffe`8d357a2e 8b16 mov edx,dword ptr [rsi]
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 77:
00007ffe`8d357a30 8b4e04 mov ecx,dword ptr [rsi+4]
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 78:
00007ffe`8d357a33 448b4608 mov r8d,dword ptr [rsi+8]
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 79:
00007ffe`8d357a37 448b4e0c mov r9d,dword ptr [rsi+0Ch]
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 84:
00007ffe`8d357a3b 448bd1 mov r10d,ecx
00007ffe`8d357a3e 4523d0 and r10d,r8d
00007ffe`8d357a41 448bd9 mov r11d,ecx
00007ffe`8d357a44 41f7d3 not r11d
00007ffe`8d357a47 4523d9 and r11d,r9d
00007ffe`8d357a4a 450bd3 or r10d,r11d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 85:
00007ffe`8d357a4d 458bd8 mov r11d,r8d
00007ffe`8d357a50 448bc1 mov r8d,ecx
00007ffe`8d357a53 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d357a57 448b10 mov r10d,dword ptr [rax]
00007ffe`8d357a5a 428d941178a46ad7 lea edx,[rcx+r10-28955B88h]
00007ffe`8d357a62 8bca mov ecx,edx
00007ffe`8d357a64 c1e107 shl ecx,7
00007ffe`8d357a67 c1ea19 shr edx,19h
00007ffe`8d357a6a 0bd1 or edx,ecx
00007ffe`8d357a6c 4103d0 add edx,r8d
00007ffe`8d357a6f 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 93:
00007ffe`8d357a71 8bd1 mov edx,ecx
00007ffe`8d357a73 4123d0 and edx,r8d
00007ffe`8d357a76 448bd1 mov r10d,ecx
00007ffe`8d357a79 41f7d2 not r10d
00007ffe`8d357a7c 4523d3 and r10d,r11d
00007ffe`8d357a7f 410bd2 or edx,r10d
00007ffe`8d357a82 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 94:
00007ffe`8d357a85 418bd3 mov edx,r11d
00007ffe`8d357a88 458bd8 mov r11d,r8d
00007ffe`8d357a8b 448bc1 mov r8d,ecx
00007ffe`8d357a8e 438d0c11 lea ecx,[r9+r10]
00007ffe`8d357a92 448b5004 mov r10d,dword ptr [rax+4]
00007ffe`8d357a96 428d8c1156b7c7e8 lea ecx,[rcx+r10-173848AAh]
00007ffe`8d357a9e 448bc9 mov r9d,ecx
00007ffe`8d357aa1 41c1e10c shl r9d,0Ch
00007ffe`8d357aa5 c1e914 shr ecx,14h
00007ffe`8d357aa8 410bc9 or ecx,r9d
00007ffe`8d357aab 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 102:
00007ffe`8d357aae 448bc9 mov r9d,ecx
00007ffe`8d357ab1 4523c8 and r9d,r8d
00007ffe`8d357ab4 448bd1 mov r10d,ecx
00007ffe`8d357ab7 41f7d2 not r10d
00007ffe`8d357aba 4523d3 and r10d,r11d
00007ffe`8d357abd 450bca or r9d,r10d
00007ffe`8d357ac0 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 103:
00007ffe`8d357ac3 458bcb mov r9d,r11d
00007ffe`8d357ac6 458bd8 mov r11d,r8d
00007ffe`8d357ac9 448bc1 mov r8d,ecx
00007ffe`8d357acc 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d357ad0 448b5008 mov r10d,dword ptr [rax+8]
00007ffe`8d357ad4 428d8c11db702024 lea ecx,[rcx+r10+242070DBh]
00007ffe`8d357adc 8bd1 mov edx,ecx
00007ffe`8d357ade c1e211 shl edx,11h
00007ffe`8d357ae1 c1e90f shr ecx,0Fh
00007ffe`8d357ae4 0bd1 or edx,ecx
00007ffe`8d357ae6 4103d0 add edx,r8d
00007ffe`8d357ae9 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 111:
00007ffe`8d357aeb 8bd1 mov edx,ecx
00007ffe`8d357aed 4123d0 and edx,r8d
00007ffe`8d357af0 448bd1 mov r10d,ecx
00007ffe`8d357af3 41f7d2 not r10d
00007ffe`8d357af6 4523d3 and r10d,r11d
00007ffe`8d357af9 410bd2 or edx,r10d
00007ffe`8d357afc 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 112:
00007ffe`8d357aff 418bd3 mov edx,r11d
00007ffe`8d357b02 458bd8 mov r11d,r8d
00007ffe`8d357b05 448bc1 mov r8d,ecx
00007ffe`8d357b08 438d0c11 lea ecx,[r9+r10]
00007ffe`8d357b0c 448b500c mov r10d,dword ptr [rax+0Ch]
00007ffe`8d357b10 428d8c11eecebdc1 lea ecx,[rcx+r10-3E423112h]
00007ffe`8d357b18 448bc9 mov r9d,ecx
00007ffe`8d357b1b 41c1e116 shl r9d,16h
00007ffe`8d357b1f c1e90a shr ecx,0Ah
00007ffe`8d357b22 410bc9 or ecx,r9d
00007ffe`8d357b25 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 120:
00007ffe`8d357b28 448bc9 mov r9d,ecx
00007ffe`8d357b2b 4523c8 and r9d,r8d
00007ffe`8d357b2e 448bd1 mov r10d,ecx
00007ffe`8d357b31 41f7d2 not r10d
00007ffe`8d357b34 4523d3 and r10d,r11d
00007ffe`8d357b37 450bca or r9d,r10d
00007ffe`8d357b3a 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 121:
00007ffe`8d357b3d 458bcb mov r9d,r11d
00007ffe`8d357b40 458bd8 mov r11d,r8d
00007ffe`8d357b43 448bc1 mov r8d,ecx
00007ffe`8d357b46 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d357b4a 448b5010 mov r10d,dword ptr [rax+10h]
00007ffe`8d357b4e 428d8c11af0f7cf5 lea ecx,[rcx+r10-0A83F051h]
00007ffe`8d357b56 8bd1 mov edx,ecx
00007ffe`8d357b58 c1e207 shl edx,7
00007ffe`8d357b5b c1e919 shr ecx,19h
00007ffe`8d357b5e 0bd1 or edx,ecx
00007ffe`8d357b60 4103d0 add edx,r8d
00007ffe`8d357b63 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 129:
00007ffe`8d357b65 8bd1 mov edx,ecx
00007ffe`8d357b67 4123d0 and edx,r8d
00007ffe`8d357b6a 448bd1 mov r10d,ecx
00007ffe`8d357b6d 41f7d2 not r10d
00007ffe`8d357b70 4523d3 and r10d,r11d
00007ffe`8d357b73 410bd2 or edx,r10d
00007ffe`8d357b76 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 130:
00007ffe`8d357b79 418bd3 mov edx,r11d
00007ffe`8d357b7c 458bd8 mov r11d,r8d
00007ffe`8d357b7f 448bc1 mov r8d,ecx
00007ffe`8d357b82 438d0c11 lea ecx,[r9+r10]
00007ffe`8d357b86 448b5014 mov r10d,dword ptr [rax+14h]
00007ffe`8d357b8a 428d8c112ac68747 lea ecx,[rcx+r10+4787C62Ah]
00007ffe`8d357b92 448bc9 mov r9d,ecx
00007ffe`8d357b95 41c1e10c shl r9d,0Ch
00007ffe`8d357b99 c1e914 shr ecx,14h
00007ffe`8d357b9c 410bc9 or ecx,r9d
00007ffe`8d357b9f 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 138:
00007ffe`8d357ba2 448bc9 mov r9d,ecx
00007ffe`8d357ba5 4523c8 and r9d,r8d
00007ffe`8d357ba8 448bd1 mov r10d,ecx
00007ffe`8d357bab 41f7d2 not r10d
00007ffe`8d357bae 4523d3 and r10d,r11d
00007ffe`8d357bb1 450bca or r9d,r10d
00007ffe`8d357bb4 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 139:
00007ffe`8d357bb7 458bcb mov r9d,r11d
00007ffe`8d357bba 458bd8 mov r11d,r8d
00007ffe`8d357bbd 448bc1 mov r8d,ecx
00007ffe`8d357bc0 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d357bc4 448b5018 mov r10d,dword ptr [rax+18h]
00007ffe`8d357bc8 428d8c11134630a8 lea ecx,[rcx+r10-57CFB9EDh]
00007ffe`8d357bd0 8bd1 mov edx,ecx
00007ffe`8d357bd2 c1e211 shl edx,11h
00007ffe`8d357bd5 c1e90f shr ecx,0Fh
00007ffe`8d357bd8 0bd1 or edx,ecx
00007ffe`8d357bda 4103d0 add edx,r8d
00007ffe`8d357bdd 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 147:
00007ffe`8d357bdf 8bd1 mov edx,ecx
00007ffe`8d357be1 4123d0 and edx,r8d
00007ffe`8d357be4 448bd1 mov r10d,ecx
00007ffe`8d357be7 41f7d2 not r10d
00007ffe`8d357bea 4523d3 and r10d,r11d
00007ffe`8d357bed 410bd2 or edx,r10d
00007ffe`8d357bf0 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 148:
00007ffe`8d357bf3 418bd3 mov edx,r11d
00007ffe`8d357bf6 458bd8 mov r11d,r8d
00007ffe`8d357bf9 448bc1 mov r8d,ecx
00007ffe`8d357bfc 438d0c11 lea ecx,[r9+r10]
00007ffe`8d357c00 448b501c mov r10d,dword ptr [rax+1Ch]
00007ffe`8d357c04 428d8c11019546fd lea ecx,[rcx+r10-2B96AFFh]
00007ffe`8d357c0c 448bc9 mov r9d,ecx
00007ffe`8d357c0f 41c1e116 shl r9d,16h
00007ffe`8d357c13 c1e90a shr ecx,0Ah
00007ffe`8d357c16 410bc9 or ecx,r9d
00007ffe`8d357c19 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 156:
00007ffe`8d357c1c 448bc9 mov r9d,ecx
00007ffe`8d357c1f 4523c8 and r9d,r8d
00007ffe`8d357c22 448bd1 mov r10d,ecx
00007ffe`8d357c25 41f7d2 not r10d
00007ffe`8d357c28 4523d3 and r10d,r11d
00007ffe`8d357c2b 450bca or r9d,r10d
00007ffe`8d357c2e 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 157:
00007ffe`8d357c31 458bcb mov r9d,r11d
00007ffe`8d357c34 458bd8 mov r11d,r8d
00007ffe`8d357c37 448bc1 mov r8d,ecx
00007ffe`8d357c3a 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d357c3e 448b5020 mov r10d,dword ptr [rax+20h]
00007ffe`8d357c42 428d8c11d8988069 lea ecx,[rcx+r10+698098D8h]
00007ffe`8d357c4a 8bd1 mov edx,ecx
00007ffe`8d357c4c c1e207 shl edx,7
00007ffe`8d357c4f c1e919 shr ecx,19h
00007ffe`8d357c52 0bd1 or edx,ecx
00007ffe`8d357c54 4103d0 add edx,r8d
00007ffe`8d357c57 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 165:
00007ffe`8d357c59 8bd1 mov edx,ecx
00007ffe`8d357c5b 4123d0 and edx,r8d
00007ffe`8d357c5e 448bd1 mov r10d,ecx
00007ffe`8d357c61 41f7d2 not r10d
00007ffe`8d357c64 4523d3 and r10d,r11d
00007ffe`8d357c67 410bd2 or edx,r10d
00007ffe`8d357c6a 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 166:
00007ffe`8d357c6d 418bd3 mov edx,r11d
00007ffe`8d357c70 458bd8 mov r11d,r8d
00007ffe`8d357c73 448bc1 mov r8d,ecx
00007ffe`8d357c76 438d0c11 lea ecx,[r9+r10]
00007ffe`8d357c7a 448b5024 mov r10d,dword ptr [rax+24h]
00007ffe`8d357c7e 428d8c11aff7448b lea ecx,[rcx+r10-74BB0851h]
00007ffe`8d357c86 448bc9 mov r9d,ecx
00007ffe`8d357c89 41c1e10c shl r9d,0Ch
00007ffe`8d357c8d c1e914 shr ecx,14h
00007ffe`8d357c90 410bc9 or ecx,r9d
00007ffe`8d357c93 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 174:
00007ffe`8d357c96 448bc9 mov r9d,ecx
00007ffe`8d357c99 4523c8 and r9d,r8d
00007ffe`8d357c9c 448bd1 mov r10d,ecx
00007ffe`8d357c9f 41f7d2 not r10d
00007ffe`8d357ca2 4523d3 and r10d,r11d
00007ffe`8d357ca5 450bca or r9d,r10d
00007ffe`8d357ca8 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 175:
00007ffe`8d357cab 458bcb mov r9d,r11d
00007ffe`8d357cae 458bd8 mov r11d,r8d
00007ffe`8d357cb1 448bc1 mov r8d,ecx
00007ffe`8d357cb4 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d357cb8 448b5028 mov r10d,dword ptr [rax+28h]
00007ffe`8d357cbc 428d8c11b15bffff lea ecx,[rcx+r10-0A44Fh]
00007ffe`8d357cc4 8bd1 mov edx,ecx
00007ffe`8d357cc6 c1e211 shl edx,11h
00007ffe`8d357cc9 c1e90f shr ecx,0Fh
00007ffe`8d357ccc 0bd1 or edx,ecx
00007ffe`8d357cce 4103d0 add edx,r8d
00007ffe`8d357cd1 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 183:
00007ffe`8d357cd3 8bd1 mov edx,ecx
00007ffe`8d357cd5 4123d0 and edx,r8d
00007ffe`8d357cd8 448bd1 mov r10d,ecx
00007ffe`8d357cdb 41f7d2 not r10d
00007ffe`8d357cde 4523d3 and r10d,r11d
00007ffe`8d357ce1 410bd2 or edx,r10d
00007ffe`8d357ce4 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 184:
00007ffe`8d357ce7 418bd3 mov edx,r11d
00007ffe`8d357cea 458bd8 mov r11d,r8d
00007ffe`8d357ced 448bc1 mov r8d,ecx
00007ffe`8d357cf0 438d0c11 lea ecx,[r9+r10]
00007ffe`8d357cf4 448b502c mov r10d,dword ptr [rax+2Ch]
00007ffe`8d357cf8 428d8c11bed75c89 lea ecx,[rcx+r10-76A32842h]
00007ffe`8d357d00 448bc9 mov r9d,ecx
00007ffe`8d357d03 41c1e116 shl r9d,16h
00007ffe`8d357d07 c1e90a shr ecx,0Ah
00007ffe`8d357d0a 410bc9 or ecx,r9d
00007ffe`8d357d0d 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 192:
00007ffe`8d357d10 448bc9 mov r9d,ecx
00007ffe`8d357d13 4523c8 and r9d,r8d
00007ffe`8d357d16 448bd1 mov r10d,ecx
00007ffe`8d357d19 41f7d2 not r10d
00007ffe`8d357d1c 4523d3 and r10d,r11d
00007ffe`8d357d1f 450bca or r9d,r10d
00007ffe`8d357d22 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 193:
00007ffe`8d357d25 458bcb mov r9d,r11d
00007ffe`8d357d28 458bd8 mov r11d,r8d
00007ffe`8d357d2b 448bc1 mov r8d,ecx
00007ffe`8d357d2e 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d357d32 448b5030 mov r10d,dword ptr [rax+30h]
00007ffe`8d357d36 428d8c112211906b lea ecx,[rcx+r10+6B901122h]
00007ffe`8d357d3e 8bd1 mov edx,ecx
00007ffe`8d357d40 c1e207 shl edx,7
00007ffe`8d357d43 c1e919 shr ecx,19h
00007ffe`8d357d46 0bd1 or edx,ecx
00007ffe`8d357d48 4103d0 add edx,r8d
00007ffe`8d357d4b 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 201:
00007ffe`8d357d4d 8bd1 mov edx,ecx
00007ffe`8d357d4f 4123d0 and edx,r8d
00007ffe`8d357d52 448bd1 mov r10d,ecx
00007ffe`8d357d55 41f7d2 not r10d
00007ffe`8d357d58 4523d3 and r10d,r11d
00007ffe`8d357d5b 410bd2 or edx,r10d
00007ffe`8d357d5e 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 202:
00007ffe`8d357d61 418bd3 mov edx,r11d
00007ffe`8d357d64 458bd8 mov r11d,r8d
00007ffe`8d357d67 448bc1 mov r8d,ecx
00007ffe`8d357d6a 438d0c11 lea ecx,[r9+r10]
00007ffe`8d357d6e 448b5034 mov r10d,dword ptr [rax+34h]
00007ffe`8d357d72 428d8c11937198fd lea ecx,[rcx+r10-2678E6Dh]
00007ffe`8d357d7a 448bc9 mov r9d,ecx
00007ffe`8d357d7d 41c1e10c shl r9d,0Ch
00007ffe`8d357d81 c1e914 shr ecx,14h
00007ffe`8d357d84 410bc9 or ecx,r9d
00007ffe`8d357d87 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 210:
00007ffe`8d357d8a 448bc9 mov r9d,ecx
00007ffe`8d357d8d 4523c8 and r9d,r8d
00007ffe`8d357d90 448bd1 mov r10d,ecx
00007ffe`8d357d93 41f7d2 not r10d
00007ffe`8d357d96 4523d3 and r10d,r11d
00007ffe`8d357d99 450bca or r9d,r10d
00007ffe`8d357d9c 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 211:
00007ffe`8d357d9f 458bcb mov r9d,r11d
00007ffe`8d357da2 458bd8 mov r11d,r8d
00007ffe`8d357da5 448bc1 mov r8d,ecx
00007ffe`8d357da8 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d357dac 448b5038 mov r10d,dword ptr [rax+38h]
00007ffe`8d357db0 428d8c118e4379a6 lea ecx,[rcx+r10-5986BC72h]
00007ffe`8d357db8 8bd1 mov edx,ecx
00007ffe`8d357dba c1e211 shl edx,11h
00007ffe`8d357dbd c1e90f shr ecx,0Fh
00007ffe`8d357dc0 0bd1 or edx,ecx
00007ffe`8d357dc2 4103d0 add edx,r8d
00007ffe`8d357dc5 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 219:
00007ffe`8d357dc7 8bd1 mov edx,ecx
00007ffe`8d357dc9 4123d0 and edx,r8d
00007ffe`8d357dcc 448bd1 mov r10d,ecx
00007ffe`8d357dcf 41f7d2 not r10d
00007ffe`8d357dd2 4523d3 and r10d,r11d
00007ffe`8d357dd5 410bd2 or edx,r10d
00007ffe`8d357dd8 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 220:
00007ffe`8d357ddb 418bd3 mov edx,r11d
00007ffe`8d357dde 458bd8 mov r11d,r8d
00007ffe`8d357de1 448bc1 mov r8d,ecx
00007ffe`8d357de4 438d0c11 lea ecx,[r9+r10]
00007ffe`8d357de8 448b503c mov r10d,dword ptr [rax+3Ch]
00007ffe`8d357dec 428d8c112108b449 lea ecx,[rcx+r10+49B40821h]
00007ffe`8d357df4 448bc9 mov r9d,ecx
00007ffe`8d357df7 41c1e116 shl r9d,16h
00007ffe`8d357dfb c1e90a shr ecx,0Ah
00007ffe`8d357dfe 410bc9 or ecx,r9d
00007ffe`8d357e01 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 228:
00007ffe`8d357e04 458bcb mov r9d,r11d
00007ffe`8d357e07 4423c9 and r9d,ecx
00007ffe`8d357e0a 458bd3 mov r10d,r11d
00007ffe`8d357e0d 41f7d2 not r10d
00007ffe`8d357e10 4523d0 and r10d,r8d
00007ffe`8d357e13 450bca or r9d,r10d
00007ffe`8d357e16 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 229:
00007ffe`8d357e19 458bcb mov r9d,r11d
00007ffe`8d357e1c 458bd8 mov r11d,r8d
00007ffe`8d357e1f 448bc1 mov r8d,ecx
00007ffe`8d357e22 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d357e26 448b5004 mov r10d,dword ptr [rax+4]
00007ffe`8d357e2a 428d8c1162251ef6 lea ecx,[rcx+r10-9E1DA9Eh]
00007ffe`8d357e32 8bd1 mov edx,ecx
00007ffe`8d357e34 c1e205 shl edx,5
00007ffe`8d357e37 c1e91b shr ecx,1Bh
00007ffe`8d357e3a 0bd1 or edx,ecx
00007ffe`8d357e3c 4103d0 add edx,r8d
00007ffe`8d357e3f 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 237:
00007ffe`8d357e41 418bd3 mov edx,r11d
00007ffe`8d357e44 23d1 and edx,ecx
00007ffe`8d357e46 458bd3 mov r10d,r11d
00007ffe`8d357e49 41f7d2 not r10d
00007ffe`8d357e4c 4523d0 and r10d,r8d
00007ffe`8d357e4f 410bd2 or edx,r10d
00007ffe`8d357e52 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 238:
00007ffe`8d357e55 418bd3 mov edx,r11d
00007ffe`8d357e58 458bd8 mov r11d,r8d
00007ffe`8d357e5b 448bc1 mov r8d,ecx
00007ffe`8d357e5e 438d0c11 lea ecx,[r9+r10]
00007ffe`8d357e62 448b5018 mov r10d,dword ptr [rax+18h]
00007ffe`8d357e66 428d8c1140b340c0 lea ecx,[rcx+r10-3FBF4CC0h]
00007ffe`8d357e6e 448bc9 mov r9d,ecx
00007ffe`8d357e71 41c1e109 shl r9d,9
00007ffe`8d357e75 c1e917 shr ecx,17h
00007ffe`8d357e78 410bc9 or ecx,r9d
00007ffe`8d357e7b 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 246:
00007ffe`8d357e7e 458bcb mov r9d,r11d
00007ffe`8d357e81 4423c9 and r9d,ecx
00007ffe`8d357e84 458bd3 mov r10d,r11d
00007ffe`8d357e87 41f7d2 not r10d
00007ffe`8d357e8a 4523d0 and r10d,r8d
00007ffe`8d357e8d 450bca or r9d,r10d
00007ffe`8d357e90 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 247:
00007ffe`8d357e93 458bcb mov r9d,r11d
00007ffe`8d357e96 458bd8 mov r11d,r8d
00007ffe`8d357e99 448bc1 mov r8d,ecx
00007ffe`8d357e9c 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d357ea0 448b502c mov r10d,dword ptr [rax+2Ch]
00007ffe`8d357ea4 428d8c11515a5e26 lea ecx,[rcx+r10+265E5A51h]
00007ffe`8d357eac 8bd1 mov edx,ecx
00007ffe`8d357eae c1e20e shl edx,0Eh
00007ffe`8d357eb1 c1e912 shr ecx,12h
00007ffe`8d357eb4 0bd1 or edx,ecx
00007ffe`8d357eb6 4103d0 add edx,r8d
00007ffe`8d357eb9 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 255:
00007ffe`8d357ebb 418bd3 mov edx,r11d
00007ffe`8d357ebe 23d1 and edx,ecx
00007ffe`8d357ec0 458bd3 mov r10d,r11d
00007ffe`8d357ec3 41f7d2 not r10d
00007ffe`8d357ec6 4523d0 and r10d,r8d
00007ffe`8d357ec9 410bd2 or edx,r10d
00007ffe`8d357ecc 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 256:
00007ffe`8d357ecf 418bd3 mov edx,r11d
00007ffe`8d357ed2 458bd8 mov r11d,r8d
00007ffe`8d357ed5 448bc1 mov r8d,ecx
00007ffe`8d357ed8 438d0c11 lea ecx,[r9+r10]
00007ffe`8d357edc 448b10 mov r10d,dword ptr [rax]
00007ffe`8d357edf 428d8c11aac7b6e9 lea ecx,[rcx+r10-16493856h]
00007ffe`8d357ee7 448bc9 mov r9d,ecx
00007ffe`8d357eea 41c1e114 shl r9d,14h
00007ffe`8d357eee c1e90c shr ecx,0Ch
00007ffe`8d357ef1 410bc9 or ecx,r9d
00007ffe`8d357ef4 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 264:
00007ffe`8d357ef7 458bcb mov r9d,r11d
00007ffe`8d357efa 4423c9 and r9d,ecx
00007ffe`8d357efd 458bd3 mov r10d,r11d
00007ffe`8d357f00 41f7d2 not r10d
00007ffe`8d357f03 4523d0 and r10d,r8d
00007ffe`8d357f06 450bca or r9d,r10d
00007ffe`8d357f09 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 265:
00007ffe`8d357f0c 458bcb mov r9d,r11d
00007ffe`8d357f0f 458bd8 mov r11d,r8d
00007ffe`8d357f12 448bc1 mov r8d,ecx
00007ffe`8d357f15 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d357f19 448b5014 mov r10d,dword ptr [rax+14h]
00007ffe`8d357f1d 428d8c115d102fd6 lea ecx,[rcx+r10-29D0EFA3h]
00007ffe`8d357f25 8bd1 mov edx,ecx
00007ffe`8d357f27 c1e205 shl edx,5
00007ffe`8d357f2a c1e91b shr ecx,1Bh
00007ffe`8d357f2d 0bd1 or edx,ecx
00007ffe`8d357f2f 4103d0 add edx,r8d
00007ffe`8d357f32 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 273:
00007ffe`8d357f34 418bd3 mov edx,r11d
00007ffe`8d357f37 23d1 and edx,ecx
00007ffe`8d357f39 458bd3 mov r10d,r11d
00007ffe`8d357f3c 41f7d2 not r10d
00007ffe`8d357f3f 4523d0 and r10d,r8d
00007ffe`8d357f42 410bd2 or edx,r10d
00007ffe`8d357f45 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 274:
00007ffe`8d357f48 418bd3 mov edx,r11d
00007ffe`8d357f4b 458bd8 mov r11d,r8d
00007ffe`8d357f4e 448bc1 mov r8d,ecx
00007ffe`8d357f51 438d0c11 lea ecx,[r9+r10]
00007ffe`8d357f55 448b5028 mov r10d,dword ptr [rax+28h]
00007ffe`8d357f59 428d8c1153144402 lea ecx,[rcx+r10+2441453h]
00007ffe`8d357f61 448bc9 mov r9d,ecx
00007ffe`8d357f64 41c1e109 shl r9d,9
00007ffe`8d357f68 c1e917 shr ecx,17h
00007ffe`8d357f6b 410bc9 or ecx,r9d
00007ffe`8d357f6e 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 282:
00007ffe`8d357f71 458bcb mov r9d,r11d
00007ffe`8d357f74 4423c9 and r9d,ecx
00007ffe`8d357f77 458bd3 mov r10d,r11d
00007ffe`8d357f7a 41f7d2 not r10d
00007ffe`8d357f7d 4523d0 and r10d,r8d
00007ffe`8d357f80 450bca or r9d,r10d
00007ffe`8d357f83 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 283:
00007ffe`8d357f86 458bcb mov r9d,r11d
00007ffe`8d357f89 458bd8 mov r11d,r8d
00007ffe`8d357f8c 448bc1 mov r8d,ecx
00007ffe`8d357f8f 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d357f93 448b503c mov r10d,dword ptr [rax+3Ch]
00007ffe`8d357f97 428d8c1181e6a1d8 lea ecx,[rcx+r10-275E197Fh]
00007ffe`8d357f9f 8bd1 mov edx,ecx
00007ffe`8d357fa1 c1e20e shl edx,0Eh
00007ffe`8d357fa4 c1e912 shr ecx,12h
00007ffe`8d357fa7 0bd1 or edx,ecx
00007ffe`8d357fa9 4103d0 add edx,r8d
00007ffe`8d357fac 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 291:
00007ffe`8d357fae 418bd3 mov edx,r11d
00007ffe`8d357fb1 23d1 and edx,ecx
00007ffe`8d357fb3 458bd3 mov r10d,r11d
00007ffe`8d357fb6 41f7d2 not r10d
00007ffe`8d357fb9 4523d0 and r10d,r8d
00007ffe`8d357fbc 410bd2 or edx,r10d
00007ffe`8d357fbf 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 292:
00007ffe`8d357fc2 418bd3 mov edx,r11d
00007ffe`8d357fc5 458bd8 mov r11d,r8d
00007ffe`8d357fc8 448bc1 mov r8d,ecx
00007ffe`8d357fcb 438d0c11 lea ecx,[r9+r10]
00007ffe`8d357fcf 448b5010 mov r10d,dword ptr [rax+10h]
00007ffe`8d357fd3 428d8c11c8fbd3e7 lea ecx,[rcx+r10-182C0438h]
00007ffe`8d357fdb 448bc9 mov r9d,ecx
00007ffe`8d357fde 41c1e114 shl r9d,14h
00007ffe`8d357fe2 c1e90c shr ecx,0Ch
00007ffe`8d357fe5 410bc9 or ecx,r9d
00007ffe`8d357fe8 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 300:
00007ffe`8d357feb 458bcb mov r9d,r11d
00007ffe`8d357fee 4423c9 and r9d,ecx
00007ffe`8d357ff1 458bd3 mov r10d,r11d
00007ffe`8d357ff4 41f7d2 not r10d
00007ffe`8d357ff7 4523d0 and r10d,r8d
00007ffe`8d357ffa 450bca or r9d,r10d
00007ffe`8d357ffd 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 301:
00007ffe`8d358000 458bcb mov r9d,r11d
00007ffe`8d358003 458bd8 mov r11d,r8d
00007ffe`8d358006 448bc1 mov r8d,ecx
00007ffe`8d358009 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d35800d 448b5024 mov r10d,dword ptr [rax+24h]
00007ffe`8d358011 428d8c11e6cde121 lea ecx,[rcx+r10+21E1CDE6h]
00007ffe`8d358019 8bd1 mov edx,ecx
00007ffe`8d35801b c1e205 shl edx,5
00007ffe`8d35801e c1e91b shr ecx,1Bh
00007ffe`8d358021 0bd1 or edx,ecx
00007ffe`8d358023 4103d0 add edx,r8d
00007ffe`8d358026 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 309:
00007ffe`8d358028 418bd3 mov edx,r11d
00007ffe`8d35802b 23d1 and edx,ecx
00007ffe`8d35802d 458bd3 mov r10d,r11d
00007ffe`8d358030 41f7d2 not r10d
00007ffe`8d358033 4523d0 and r10d,r8d
00007ffe`8d358036 410bd2 or edx,r10d
00007ffe`8d358039 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 310:
00007ffe`8d35803c 418bd3 mov edx,r11d
00007ffe`8d35803f 458bd8 mov r11d,r8d
00007ffe`8d358042 448bc1 mov r8d,ecx
00007ffe`8d358045 438d0c11 lea ecx,[r9+r10]
00007ffe`8d358049 448b5038 mov r10d,dword ptr [rax+38h]
00007ffe`8d35804d 428d8c11d60737c3 lea ecx,[rcx+r10-3CC8F82Ah]
00007ffe`8d358055 448bc9 mov r9d,ecx
00007ffe`8d358058 41c1e109 shl r9d,9
00007ffe`8d35805c c1e917 shr ecx,17h
00007ffe`8d35805f 410bc9 or ecx,r9d
00007ffe`8d358062 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 318:
00007ffe`8d358065 458bcb mov r9d,r11d
00007ffe`8d358068 4423c9 and r9d,ecx
00007ffe`8d35806b 458bd3 mov r10d,r11d
00007ffe`8d35806e 41f7d2 not r10d
00007ffe`8d358071 4523d0 and r10d,r8d
00007ffe`8d358074 450bca or r9d,r10d
00007ffe`8d358077 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 319:
00007ffe`8d35807a 458bcb mov r9d,r11d
00007ffe`8d35807d 458bd8 mov r11d,r8d
00007ffe`8d358080 448bc1 mov r8d,ecx
00007ffe`8d358083 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d358087 448b500c mov r10d,dword ptr [rax+0Ch]
00007ffe`8d35808b 428d8c11870dd5f4 lea ecx,[rcx+r10-0B2AF279h]
00007ffe`8d358093 8bd1 mov edx,ecx
00007ffe`8d358095 c1e20e shl edx,0Eh
00007ffe`8d358098 c1e912 shr ecx,12h
00007ffe`8d35809b 0bd1 or edx,ecx
00007ffe`8d35809d 4103d0 add edx,r8d
00007ffe`8d3580a0 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 327:
00007ffe`8d3580a2 418bd3 mov edx,r11d
00007ffe`8d3580a5 23d1 and edx,ecx
00007ffe`8d3580a7 458bd3 mov r10d,r11d
00007ffe`8d3580aa 41f7d2 not r10d
00007ffe`8d3580ad 4523d0 and r10d,r8d
00007ffe`8d3580b0 410bd2 or edx,r10d
00007ffe`8d3580b3 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 328:
00007ffe`8d3580b6 418bd3 mov edx,r11d
00007ffe`8d3580b9 458bd8 mov r11d,r8d
00007ffe`8d3580bc 448bc1 mov r8d,ecx
00007ffe`8d3580bf 438d0c11 lea ecx,[r9+r10]
00007ffe`8d3580c3 448b5020 mov r10d,dword ptr [rax+20h]
00007ffe`8d3580c7 428d8c11ed145a45 lea ecx,[rcx+r10+455A14EDh]
00007ffe`8d3580cf 448bc9 mov r9d,ecx
00007ffe`8d3580d2 41c1e114 shl r9d,14h
00007ffe`8d3580d6 c1e90c shr ecx,0Ch
00007ffe`8d3580d9 410bc9 or ecx,r9d
00007ffe`8d3580dc 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 336:
00007ffe`8d3580df 458bcb mov r9d,r11d
00007ffe`8d3580e2 4423c9 and r9d,ecx
00007ffe`8d3580e5 458bd3 mov r10d,r11d
00007ffe`8d3580e8 41f7d2 not r10d
00007ffe`8d3580eb 4523d0 and r10d,r8d
00007ffe`8d3580ee 450bca or r9d,r10d
00007ffe`8d3580f1 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 337:
00007ffe`8d3580f4 458bcb mov r9d,r11d
00007ffe`8d3580f7 458bd8 mov r11d,r8d
00007ffe`8d3580fa 448bc1 mov r8d,ecx
00007ffe`8d3580fd 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d358101 448b5034 mov r10d,dword ptr [rax+34h]
00007ffe`8d358105 428d8c1105e9e3a9 lea ecx,[rcx+r10-561C16FBh]
00007ffe`8d35810d 8bd1 mov edx,ecx
00007ffe`8d35810f c1e205 shl edx,5
00007ffe`8d358112 c1e91b shr ecx,1Bh
00007ffe`8d358115 0bd1 or edx,ecx
00007ffe`8d358117 4103d0 add edx,r8d
00007ffe`8d35811a 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 345:
00007ffe`8d35811c 418bd3 mov edx,r11d
00007ffe`8d35811f 23d1 and edx,ecx
00007ffe`8d358121 458bd3 mov r10d,r11d
00007ffe`8d358124 41f7d2 not r10d
00007ffe`8d358127 4523d0 and r10d,r8d
00007ffe`8d35812a 410bd2 or edx,r10d
00007ffe`8d35812d 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 346:
00007ffe`8d358130 418bd3 mov edx,r11d
00007ffe`8d358133 458bd8 mov r11d,r8d
00007ffe`8d358136 448bc1 mov r8d,ecx
00007ffe`8d358139 438d0c11 lea ecx,[r9+r10]
00007ffe`8d35813d 448b5008 mov r10d,dword ptr [rax+8]
00007ffe`8d358141 428d8c11f8a3effc lea ecx,[rcx+r10-3105C08h]
00007ffe`8d358149 448bc9 mov r9d,ecx
00007ffe`8d35814c 41c1e109 shl r9d,9
00007ffe`8d358150 c1e917 shr ecx,17h
00007ffe`8d358153 410bc9 or ecx,r9d
00007ffe`8d358156 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 354:
00007ffe`8d358159 458bcb mov r9d,r11d
00007ffe`8d35815c 4423c9 and r9d,ecx
00007ffe`8d35815f 458bd3 mov r10d,r11d
00007ffe`8d358162 41f7d2 not r10d
00007ffe`8d358165 4523d0 and r10d,r8d
00007ffe`8d358168 450bca or r9d,r10d
00007ffe`8d35816b 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 355:
00007ffe`8d35816e 458bcb mov r9d,r11d
00007ffe`8d358171 458bd8 mov r11d,r8d
00007ffe`8d358174 448bc1 mov r8d,ecx
00007ffe`8d358177 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d35817b 448b501c mov r10d,dword ptr [rax+1Ch]
00007ffe`8d35817f 428d8c11d9026f67 lea ecx,[rcx+r10+676F02D9h]
00007ffe`8d358187 8bd1 mov edx,ecx
00007ffe`8d358189 c1e20e shl edx,0Eh
00007ffe`8d35818c c1e912 shr ecx,12h
00007ffe`8d35818f 0bd1 or edx,ecx
00007ffe`8d358191 4103d0 add edx,r8d
00007ffe`8d358194 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 363:
00007ffe`8d358196 418bd3 mov edx,r11d
00007ffe`8d358199 23d1 and edx,ecx
00007ffe`8d35819b 458bd3 mov r10d,r11d
00007ffe`8d35819e 41f7d2 not r10d
00007ffe`8d3581a1 4523d0 and r10d,r8d
00007ffe`8d3581a4 410bd2 or edx,r10d
00007ffe`8d3581a7 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 364:
00007ffe`8d3581aa 418bd3 mov edx,r11d
00007ffe`8d3581ad 458bd8 mov r11d,r8d
00007ffe`8d3581b0 448bc1 mov r8d,ecx
00007ffe`8d3581b3 438d0c11 lea ecx,[r9+r10]
00007ffe`8d3581b7 448b5030 mov r10d,dword ptr [rax+30h]
00007ffe`8d3581bb 428d8c118a4c2a8d lea ecx,[rcx+r10-72D5B376h]
00007ffe`8d3581c3 448bc9 mov r9d,ecx
00007ffe`8d3581c6 41c1e114 shl r9d,14h
00007ffe`8d3581ca c1e90c shr ecx,0Ch
00007ffe`8d3581cd 410bc9 or ecx,r9d
00007ffe`8d3581d0 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 372:
00007ffe`8d3581d3 448bc9 mov r9d,ecx
00007ffe`8d3581d6 4533c8 xor r9d,r8d
00007ffe`8d3581d9 4533cb xor r9d,r11d
00007ffe`8d3581dc 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 373:
00007ffe`8d3581df 458bcb mov r9d,r11d
00007ffe`8d3581e2 458bd8 mov r11d,r8d
00007ffe`8d3581e5 448bc1 mov r8d,ecx
00007ffe`8d3581e8 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d3581ec 448b5014 mov r10d,dword ptr [rax+14h]
00007ffe`8d3581f0 428d8c114239faff lea ecx,[rcx+r10-5C6BEh]
00007ffe`8d3581f8 8bd1 mov edx,ecx
00007ffe`8d3581fa c1e204 shl edx,4
00007ffe`8d3581fd c1e91c shr ecx,1Ch
00007ffe`8d358200 0bd1 or edx,ecx
00007ffe`8d358202 4103d0 add edx,r8d
00007ffe`8d358205 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 381:
00007ffe`8d358207 8bd1 mov edx,ecx
00007ffe`8d358209 4133d0 xor edx,r8d
00007ffe`8d35820c 4133d3 xor edx,r11d
00007ffe`8d35820f 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 382:
00007ffe`8d358212 418bd3 mov edx,r11d
00007ffe`8d358215 458bd8 mov r11d,r8d
00007ffe`8d358218 448bc1 mov r8d,ecx
00007ffe`8d35821b 438d0c11 lea ecx,[r9+r10]
00007ffe`8d35821f 448b5020 mov r10d,dword ptr [rax+20h]
00007ffe`8d358223 428d8c1181f67187 lea ecx,[rcx+r10-788E097Fh]
00007ffe`8d35822b 448bc9 mov r9d,ecx
00007ffe`8d35822e 41c1e10b shl r9d,0Bh
00007ffe`8d358232 c1e915 shr ecx,15h
00007ffe`8d358235 410bc9 or ecx,r9d
00007ffe`8d358238 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 390:
00007ffe`8d35823b 448bc9 mov r9d,ecx
00007ffe`8d35823e 4533c8 xor r9d,r8d
00007ffe`8d358241 4533cb xor r9d,r11d
00007ffe`8d358244 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 391:
00007ffe`8d358247 458bcb mov r9d,r11d
00007ffe`8d35824a 458bd8 mov r11d,r8d
00007ffe`8d35824d 448bc1 mov r8d,ecx
00007ffe`8d358250 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d358254 448b502c mov r10d,dword ptr [rax+2Ch]
00007ffe`8d358258 428d8c1122619d6d lea ecx,[rcx+r10+6D9D6122h]
00007ffe`8d358260 8bd1 mov edx,ecx
00007ffe`8d358262 c1e210 shl edx,10h
00007ffe`8d358265 c1e910 shr ecx,10h
00007ffe`8d358268 0bd1 or edx,ecx
00007ffe`8d35826a 4103d0 add edx,r8d
00007ffe`8d35826d 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 399:
00007ffe`8d35826f 8bd1 mov edx,ecx
00007ffe`8d358271 4133d0 xor edx,r8d
00007ffe`8d358274 4133d3 xor edx,r11d
00007ffe`8d358277 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 400:
00007ffe`8d35827a 418bd3 mov edx,r11d
00007ffe`8d35827d 458bd8 mov r11d,r8d
00007ffe`8d358280 448bc1 mov r8d,ecx
00007ffe`8d358283 438d0c11 lea ecx,[r9+r10]
00007ffe`8d358287 448b5038 mov r10d,dword ptr [rax+38h]
00007ffe`8d35828b 428d8c110c38e5fd lea ecx,[rcx+r10-21AC7F4h]
00007ffe`8d358293 448bc9 mov r9d,ecx
00007ffe`8d358296 41c1e117 shl r9d,17h
00007ffe`8d35829a c1e909 shr ecx,9
00007ffe`8d35829d 410bc9 or ecx,r9d
00007ffe`8d3582a0 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 408:
00007ffe`8d3582a3 448bc9 mov r9d,ecx
00007ffe`8d3582a6 4533c8 xor r9d,r8d
00007ffe`8d3582a9 4533cb xor r9d,r11d
00007ffe`8d3582ac 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 409:
00007ffe`8d3582af 458bcb mov r9d,r11d
00007ffe`8d3582b2 458bd8 mov r11d,r8d
00007ffe`8d3582b5 448bc1 mov r8d,ecx
00007ffe`8d3582b8 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d3582bc 448b5004 mov r10d,dword ptr [rax+4]
00007ffe`8d3582c0 428d8c1144eabea4 lea ecx,[rcx+r10-5B4115BCh]
00007ffe`8d3582c8 8bd1 mov edx,ecx
00007ffe`8d3582ca c1e204 shl edx,4
00007ffe`8d3582cd c1e91c shr ecx,1Ch
00007ffe`8d3582d0 0bd1 or edx,ecx
00007ffe`8d3582d2 4103d0 add edx,r8d
00007ffe`8d3582d5 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 417:
00007ffe`8d3582d7 8bd1 mov edx,ecx
00007ffe`8d3582d9 4133d0 xor edx,r8d
00007ffe`8d3582dc 4133d3 xor edx,r11d
00007ffe`8d3582df 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 418:
00007ffe`8d3582e2 418bd3 mov edx,r11d
00007ffe`8d3582e5 458bd8 mov r11d,r8d
00007ffe`8d3582e8 448bc1 mov r8d,ecx
00007ffe`8d3582eb 438d0c11 lea ecx,[r9+r10]
00007ffe`8d3582ef 448b5010 mov r10d,dword ptr [rax+10h]
00007ffe`8d3582f3 428d8c11a9cfde4b lea ecx,[rcx+r10+4BDECFA9h]
00007ffe`8d3582fb 448bc9 mov r9d,ecx
00007ffe`8d3582fe 41c1e10b shl r9d,0Bh
00007ffe`8d358302 c1e915 shr ecx,15h
00007ffe`8d358305 410bc9 or ecx,r9d
00007ffe`8d358308 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 426:
00007ffe`8d35830b 448bc9 mov r9d,ecx
00007ffe`8d35830e 4533c8 xor r9d,r8d
00007ffe`8d358311 4533cb xor r9d,r11d
00007ffe`8d358314 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 427:
00007ffe`8d358317 458bcb mov r9d,r11d
00007ffe`8d35831a 458bd8 mov r11d,r8d
00007ffe`8d35831d 448bc1 mov r8d,ecx
00007ffe`8d358320 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d358324 448b501c mov r10d,dword ptr [rax+1Ch]
00007ffe`8d358328 428d8c11604bbbf6 lea ecx,[rcx+r10-944B4A0h]
00007ffe`8d358330 8bd1 mov edx,ecx
00007ffe`8d358332 c1e210 shl edx,10h
00007ffe`8d358335 c1e910 shr ecx,10h
00007ffe`8d358338 0bd1 or edx,ecx
00007ffe`8d35833a 4103d0 add edx,r8d
00007ffe`8d35833d 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 435:
00007ffe`8d35833f 8bd1 mov edx,ecx
00007ffe`8d358341 4133d0 xor edx,r8d
00007ffe`8d358344 4133d3 xor edx,r11d
00007ffe`8d358347 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 436:
00007ffe`8d35834a 418bd3 mov edx,r11d
00007ffe`8d35834d 458bd8 mov r11d,r8d
00007ffe`8d358350 448bc1 mov r8d,ecx
00007ffe`8d358353 438d0c11 lea ecx,[r9+r10]
00007ffe`8d358357 448b5028 mov r10d,dword ptr [rax+28h]
00007ffe`8d35835b 428d8c1170bcbfbe lea ecx,[rcx+r10-41404390h]
00007ffe`8d358363 448bc9 mov r9d,ecx
00007ffe`8d358366 41c1e117 shl r9d,17h
00007ffe`8d35836a c1e909 shr ecx,9
00007ffe`8d35836d 410bc9 or ecx,r9d
00007ffe`8d358370 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 444:
00007ffe`8d358373 448bc9 mov r9d,ecx
00007ffe`8d358376 4533c8 xor r9d,r8d
00007ffe`8d358379 4533cb xor r9d,r11d
00007ffe`8d35837c 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 445:
00007ffe`8d35837f 458bcb mov r9d,r11d
00007ffe`8d358382 458bd8 mov r11d,r8d
00007ffe`8d358385 448bc1 mov r8d,ecx
00007ffe`8d358388 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d35838c 448b5034 mov r10d,dword ptr [rax+34h]
00007ffe`8d358390 428d8c11c67e9b28 lea ecx,[rcx+r10+289B7EC6h]
00007ffe`8d358398 8bd1 mov edx,ecx
00007ffe`8d35839a c1e204 shl edx,4
00007ffe`8d35839d c1e91c shr ecx,1Ch
00007ffe`8d3583a0 0bd1 or edx,ecx
00007ffe`8d3583a2 4103d0 add edx,r8d
00007ffe`8d3583a5 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 453:
00007ffe`8d3583a7 8bd1 mov edx,ecx
00007ffe`8d3583a9 4133d0 xor edx,r8d
00007ffe`8d3583ac 4133d3 xor edx,r11d
00007ffe`8d3583af 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 454:
00007ffe`8d3583b2 418bd3 mov edx,r11d
00007ffe`8d3583b5 458bd8 mov r11d,r8d
00007ffe`8d3583b8 448bc1 mov r8d,ecx
00007ffe`8d3583bb 438d0c11 lea ecx,[r9+r10]
00007ffe`8d3583bf 448b10 mov r10d,dword ptr [rax]
00007ffe`8d3583c2 428d8c11fa27a1ea lea ecx,[rcx+r10-155ED806h]
00007ffe`8d3583ca 448bc9 mov r9d,ecx
00007ffe`8d3583cd 41c1e10b shl r9d,0Bh
00007ffe`8d3583d1 c1e915 shr ecx,15h
00007ffe`8d3583d4 410bc9 or ecx,r9d
00007ffe`8d3583d7 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 462:
00007ffe`8d3583da 448bc9 mov r9d,ecx
00007ffe`8d3583dd 4533c8 xor r9d,r8d
00007ffe`8d3583e0 4533cb xor r9d,r11d
00007ffe`8d3583e3 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 463:
00007ffe`8d3583e6 458bcb mov r9d,r11d
00007ffe`8d3583e9 458bd8 mov r11d,r8d
00007ffe`8d3583ec 448bc1 mov r8d,ecx
00007ffe`8d3583ef 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d3583f3 448b500c mov r10d,dword ptr [rax+0Ch]
00007ffe`8d3583f7 428d8c118530efd4 lea ecx,[rcx+r10-2B10CF7Bh]
00007ffe`8d3583ff 8bd1 mov edx,ecx
00007ffe`8d358401 c1e210 shl edx,10h
00007ffe`8d358404 c1e910 shr ecx,10h
00007ffe`8d358407 0bd1 or edx,ecx
00007ffe`8d358409 4103d0 add edx,r8d
00007ffe`8d35840c 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 471:
00007ffe`8d35840e 8bd1 mov edx,ecx
00007ffe`8d358410 4133d0 xor edx,r8d
00007ffe`8d358413 4133d3 xor edx,r11d
00007ffe`8d358416 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 472:
00007ffe`8d358419 418bd3 mov edx,r11d
00007ffe`8d35841c 458bd8 mov r11d,r8d
00007ffe`8d35841f 448bc1 mov r8d,ecx
00007ffe`8d358422 438d0c11 lea ecx,[r9+r10]
00007ffe`8d358426 448b5018 mov r10d,dword ptr [rax+18h]
00007ffe`8d35842a 428d8c11051d8804 lea ecx,[rcx+r10+4881D05h]
00007ffe`8d358432 448bc9 mov r9d,ecx
00007ffe`8d358435 41c1e117 shl r9d,17h
00007ffe`8d358439 c1e909 shr ecx,9
00007ffe`8d35843c 410bc9 or ecx,r9d
00007ffe`8d35843f 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 480:
00007ffe`8d358442 448bc9 mov r9d,ecx
00007ffe`8d358445 4533c8 xor r9d,r8d
00007ffe`8d358448 4533cb xor r9d,r11d
00007ffe`8d35844b 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 481:
00007ffe`8d35844e 458bcb mov r9d,r11d
00007ffe`8d358451 458bd8 mov r11d,r8d
00007ffe`8d358454 448bc1 mov r8d,ecx
00007ffe`8d358457 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d35845b 448b5024 mov r10d,dword ptr [rax+24h]
00007ffe`8d35845f 428d8c1139d0d4d9 lea ecx,[rcx+r10-262B2FC7h]
00007ffe`8d358467 8bd1 mov edx,ecx
00007ffe`8d358469 c1e204 shl edx,4
00007ffe`8d35846c c1e91c shr ecx,1Ch
00007ffe`8d35846f 0bd1 or edx,ecx
00007ffe`8d358471 4103d0 add edx,r8d
00007ffe`8d358474 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 489:
00007ffe`8d358476 8bd1 mov edx,ecx
00007ffe`8d358478 4133d0 xor edx,r8d
00007ffe`8d35847b 4133d3 xor edx,r11d
00007ffe`8d35847e 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 490:
00007ffe`8d358481 418bd3 mov edx,r11d
00007ffe`8d358484 458bd8 mov r11d,r8d
00007ffe`8d358487 448bc1 mov r8d,ecx
00007ffe`8d35848a 438d0c11 lea ecx,[r9+r10]
00007ffe`8d35848e 448b5030 mov r10d,dword ptr [rax+30h]
00007ffe`8d358492 428d8c11e599dbe6 lea ecx,[rcx+r10-1924661Bh]
00007ffe`8d35849a 448bc9 mov r9d,ecx
00007ffe`8d35849d 41c1e10b shl r9d,0Bh
00007ffe`8d3584a1 c1e915 shr ecx,15h
00007ffe`8d3584a4 410bc9 or ecx,r9d
00007ffe`8d3584a7 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 498:
00007ffe`8d3584aa 448bc9 mov r9d,ecx
00007ffe`8d3584ad 4533c8 xor r9d,r8d
00007ffe`8d3584b0 4533cb xor r9d,r11d
00007ffe`8d3584b3 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 499:
00007ffe`8d3584b6 458bcb mov r9d,r11d
00007ffe`8d3584b9 458bd8 mov r11d,r8d
00007ffe`8d3584bc 448bc1 mov r8d,ecx
00007ffe`8d3584bf 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d3584c3 448b503c mov r10d,dword ptr [rax+3Ch]
00007ffe`8d3584c7 428d8c11f87ca21f lea ecx,[rcx+r10+1FA27CF8h]
00007ffe`8d3584cf 8bd1 mov edx,ecx
00007ffe`8d3584d1 c1e210 shl edx,10h
00007ffe`8d3584d4 c1e910 shr ecx,10h
00007ffe`8d3584d7 0bd1 or edx,ecx
00007ffe`8d3584d9 4103d0 add edx,r8d
00007ffe`8d3584dc 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 507:
00007ffe`8d3584de 8bd1 mov edx,ecx
00007ffe`8d3584e0 4133d0 xor edx,r8d
00007ffe`8d3584e3 4133d3 xor edx,r11d
00007ffe`8d3584e6 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 508:
00007ffe`8d3584e9 418bd3 mov edx,r11d
00007ffe`8d3584ec 458bd8 mov r11d,r8d
00007ffe`8d3584ef 448bc1 mov r8d,ecx
00007ffe`8d3584f2 438d0c11 lea ecx,[r9+r10]
00007ffe`8d3584f6 448b5008 mov r10d,dword ptr [rax+8]
00007ffe`8d3584fa 428d8c116556acc4 lea ecx,[rcx+r10-3B53A99Bh]
00007ffe`8d358502 448bc9 mov r9d,ecx
00007ffe`8d358505 41c1e117 shl r9d,17h
00007ffe`8d358509 c1e909 shr ecx,9
00007ffe`8d35850c 410bc9 or ecx,r9d
00007ffe`8d35850f 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 516:
00007ffe`8d358512 458bcb mov r9d,r11d
00007ffe`8d358515 41f7d1 not r9d
00007ffe`8d358518 440bc9 or r9d,ecx
00007ffe`8d35851b 4533c8 xor r9d,r8d
00007ffe`8d35851e 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 517:
00007ffe`8d358521 458bcb mov r9d,r11d
00007ffe`8d358524 458bd8 mov r11d,r8d
00007ffe`8d358527 448bc1 mov r8d,ecx
00007ffe`8d35852a 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d35852e 448b10 mov r10d,dword ptr [rax]
00007ffe`8d358531 428d8c11442229f4 lea ecx,[rcx+r10-0BD6DDBCh]
00007ffe`8d358539 8bd1 mov edx,ecx
00007ffe`8d35853b c1e206 shl edx,6
00007ffe`8d35853e c1e91a shr ecx,1Ah
00007ffe`8d358541 0bd1 or edx,ecx
00007ffe`8d358543 4103d0 add edx,r8d
00007ffe`8d358546 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 525:
00007ffe`8d358548 418bd3 mov edx,r11d
00007ffe`8d35854b f7d2 not edx
00007ffe`8d35854d 0bd1 or edx,ecx
00007ffe`8d35854f 4133d0 xor edx,r8d
00007ffe`8d358552 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 526:
00007ffe`8d358555 418bd3 mov edx,r11d
00007ffe`8d358558 458bd8 mov r11d,r8d
00007ffe`8d35855b 448bc1 mov r8d,ecx
00007ffe`8d35855e 438d0c11 lea ecx,[r9+r10]
00007ffe`8d358562 448b501c mov r10d,dword ptr [rax+1Ch]
00007ffe`8d358566 428d8c1197ff2a43 lea ecx,[rcx+r10+432AFF97h]
00007ffe`8d35856e 448bc9 mov r9d,ecx
00007ffe`8d358571 41c1e10a shl r9d,0Ah
00007ffe`8d358575 c1e916 shr ecx,16h
00007ffe`8d358578 410bc9 or ecx,r9d
00007ffe`8d35857b 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 534:
00007ffe`8d35857e 458bcb mov r9d,r11d
00007ffe`8d358581 41f7d1 not r9d
00007ffe`8d358584 440bc9 or r9d,ecx
00007ffe`8d358587 4533c8 xor r9d,r8d
00007ffe`8d35858a 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 535:
00007ffe`8d35858d 458bcb mov r9d,r11d
00007ffe`8d358590 458bd8 mov r11d,r8d
00007ffe`8d358593 448bc1 mov r8d,ecx
00007ffe`8d358596 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d35859a 448b5038 mov r10d,dword ptr [rax+38h]
00007ffe`8d35859e 428d8c11a72394ab lea ecx,[rcx+r10-546BDC59h]
00007ffe`8d3585a6 8bd1 mov edx,ecx
00007ffe`8d3585a8 c1e20f shl edx,0Fh
00007ffe`8d3585ab c1e911 shr ecx,11h
00007ffe`8d3585ae 0bd1 or edx,ecx
00007ffe`8d3585b0 4103d0 add edx,r8d
00007ffe`8d3585b3 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 543:
00007ffe`8d3585b5 418bd3 mov edx,r11d
00007ffe`8d3585b8 f7d2 not edx
00007ffe`8d3585ba 0bd1 or edx,ecx
00007ffe`8d3585bc 4133d0 xor edx,r8d
00007ffe`8d3585bf 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 544:
00007ffe`8d3585c2 418bd3 mov edx,r11d
00007ffe`8d3585c5 458bd8 mov r11d,r8d
00007ffe`8d3585c8 448bc1 mov r8d,ecx
00007ffe`8d3585cb 438d0c11 lea ecx,[r9+r10]
00007ffe`8d3585cf 448b5014 mov r10d,dword ptr [rax+14h]
00007ffe`8d3585d3 428d8c1139a093fc lea ecx,[rcx+r10-36C5FC7h]
00007ffe`8d3585db 448bc9 mov r9d,ecx
00007ffe`8d3585de 41c1e115 shl r9d,15h
00007ffe`8d3585e2 c1e90b shr ecx,0Bh
00007ffe`8d3585e5 410bc9 or ecx,r9d
00007ffe`8d3585e8 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 552:
00007ffe`8d3585eb 458bcb mov r9d,r11d
00007ffe`8d3585ee 41f7d1 not r9d
00007ffe`8d3585f1 440bc9 or r9d,ecx
00007ffe`8d3585f4 4533c8 xor r9d,r8d
00007ffe`8d3585f7 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 553:
00007ffe`8d3585fa 458bcb mov r9d,r11d
00007ffe`8d3585fd 458bd8 mov r11d,r8d
00007ffe`8d358600 448bc1 mov r8d,ecx
00007ffe`8d358603 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d358607 448b5030 mov r10d,dword ptr [rax+30h]
00007ffe`8d35860b 428d8c11c3595b65 lea ecx,[rcx+r10+655B59C3h]
00007ffe`8d358613 8bd1 mov edx,ecx
00007ffe`8d358615 c1e206 shl edx,6
00007ffe`8d358618 c1e91a shr ecx,1Ah
00007ffe`8d35861b 0bd1 or edx,ecx
00007ffe`8d35861d 4103d0 add edx,r8d
00007ffe`8d358620 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 561:
00007ffe`8d358622 418bd3 mov edx,r11d
00007ffe`8d358625 f7d2 not edx
00007ffe`8d358627 0bd1 or edx,ecx
00007ffe`8d358629 4133d0 xor edx,r8d
00007ffe`8d35862c 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 562:
00007ffe`8d35862f 418bd3 mov edx,r11d
00007ffe`8d358632 458bd8 mov r11d,r8d
00007ffe`8d358635 448bc1 mov r8d,ecx
00007ffe`8d358638 438d0c11 lea ecx,[r9+r10]
00007ffe`8d35863c 448b500c mov r10d,dword ptr [rax+0Ch]
00007ffe`8d358640 428d8c1192cc0c8f lea ecx,[rcx+r10-70F3336Eh]
00007ffe`8d358648 448bc9 mov r9d,ecx
00007ffe`8d35864b 41c1e10a shl r9d,0Ah
00007ffe`8d35864f c1e916 shr ecx,16h
00007ffe`8d358652 410bc9 or ecx,r9d
00007ffe`8d358655 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 570:
00007ffe`8d358658 458bcb mov r9d,r11d
00007ffe`8d35865b 41f7d1 not r9d
00007ffe`8d35865e 440bc9 or r9d,ecx
00007ffe`8d358661 4533c8 xor r9d,r8d
00007ffe`8d358664 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 571:
00007ffe`8d358667 458bcb mov r9d,r11d
00007ffe`8d35866a 458bd8 mov r11d,r8d
00007ffe`8d35866d 448bc1 mov r8d,ecx
00007ffe`8d358670 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d358674 448b5028 mov r10d,dword ptr [rax+28h]
00007ffe`8d358678 428d8c117df4efff lea ecx,[rcx+r10-100B83h]
00007ffe`8d358680 8bd1 mov edx,ecx
00007ffe`8d358682 c1e20f shl edx,0Fh
00007ffe`8d358685 c1e911 shr ecx,11h
00007ffe`8d358688 0bd1 or edx,ecx
00007ffe`8d35868a 4103d0 add edx,r8d
00007ffe`8d35868d 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 579:
00007ffe`8d35868f 418bd3 mov edx,r11d
00007ffe`8d358692 f7d2 not edx
00007ffe`8d358694 0bd1 or edx,ecx
00007ffe`8d358696 4133d0 xor edx,r8d
00007ffe`8d358699 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 580:
00007ffe`8d35869c 418bd3 mov edx,r11d
00007ffe`8d35869f 458bd8 mov r11d,r8d
00007ffe`8d3586a2 448bc1 mov r8d,ecx
00007ffe`8d3586a5 438d0c11 lea ecx,[r9+r10]
00007ffe`8d3586a9 448b5004 mov r10d,dword ptr [rax+4]
00007ffe`8d3586ad 428d8c11d15d8485 lea ecx,[rcx+r10-7A7BA22Fh]
00007ffe`8d3586b5 448bc9 mov r9d,ecx
00007ffe`8d3586b8 41c1e115 shl r9d,15h
00007ffe`8d3586bc c1e90b shr ecx,0Bh
00007ffe`8d3586bf 410bc9 or ecx,r9d
00007ffe`8d3586c2 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 588:
00007ffe`8d3586c5 458bcb mov r9d,r11d
00007ffe`8d3586c8 41f7d1 not r9d
00007ffe`8d3586cb 440bc9 or r9d,ecx
00007ffe`8d3586ce 4533c8 xor r9d,r8d
00007ffe`8d3586d1 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 589:
00007ffe`8d3586d4 458bcb mov r9d,r11d
00007ffe`8d3586d7 458bd8 mov r11d,r8d
00007ffe`8d3586da 448bc1 mov r8d,ecx
00007ffe`8d3586dd 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d3586e1 448b5020 mov r10d,dword ptr [rax+20h]
00007ffe`8d3586e5 428d8c114f7ea86f lea ecx,[rcx+r10+6FA87E4Fh]
00007ffe`8d3586ed 8bd1 mov edx,ecx
00007ffe`8d3586ef c1e206 shl edx,6
00007ffe`8d3586f2 c1e91a shr ecx,1Ah
00007ffe`8d3586f5 0bd1 or edx,ecx
00007ffe`8d3586f7 4103d0 add edx,r8d
00007ffe`8d3586fa 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 597:
00007ffe`8d3586fc 418bd3 mov edx,r11d
00007ffe`8d3586ff f7d2 not edx
00007ffe`8d358701 0bd1 or edx,ecx
00007ffe`8d358703 4133d0 xor edx,r8d
00007ffe`8d358706 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 598:
00007ffe`8d358709 418bd3 mov edx,r11d
00007ffe`8d35870c 458bd8 mov r11d,r8d
00007ffe`8d35870f 448bc1 mov r8d,ecx
00007ffe`8d358712 438d0c11 lea ecx,[r9+r10]
00007ffe`8d358716 448b503c mov r10d,dword ptr [rax+3Ch]
00007ffe`8d35871a 428d8c11e0e62cfe lea ecx,[rcx+r10-1D31920h]
00007ffe`8d358722 448bc9 mov r9d,ecx
00007ffe`8d358725 41c1e10a shl r9d,0Ah
00007ffe`8d358729 c1e916 shr ecx,16h
00007ffe`8d35872c 410bc9 or ecx,r9d
00007ffe`8d35872f 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 606:
00007ffe`8d358732 458bcb mov r9d,r11d
00007ffe`8d358735 41f7d1 not r9d
00007ffe`8d358738 440bc9 or r9d,ecx
00007ffe`8d35873b 4533c8 xor r9d,r8d
00007ffe`8d35873e 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 607:
00007ffe`8d358741 458bcb mov r9d,r11d
00007ffe`8d358744 458bd8 mov r11d,r8d
00007ffe`8d358747 448bc1 mov r8d,ecx
00007ffe`8d35874a 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d35874e 448b5018 mov r10d,dword ptr [rax+18h]
00007ffe`8d358752 428d8c11144301a3 lea ecx,[rcx+r10-5CFEBCECh]
00007ffe`8d35875a 8bd1 mov edx,ecx
00007ffe`8d35875c c1e20f shl edx,0Fh
00007ffe`8d35875f c1e911 shr ecx,11h
00007ffe`8d358762 0bd1 or edx,ecx
00007ffe`8d358764 4103d0 add edx,r8d
00007ffe`8d358767 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 615:
00007ffe`8d358769 418bd3 mov edx,r11d
00007ffe`8d35876c f7d2 not edx
00007ffe`8d35876e 0bd1 or edx,ecx
00007ffe`8d358770 4133d0 xor edx,r8d
00007ffe`8d358773 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 616:
00007ffe`8d358776 418bd3 mov edx,r11d
00007ffe`8d358779 458bd8 mov r11d,r8d
00007ffe`8d35877c 448bc1 mov r8d,ecx
00007ffe`8d35877f 438d0c11 lea ecx,[r9+r10]
00007ffe`8d358783 448b5034 mov r10d,dword ptr [rax+34h]
00007ffe`8d358787 428d8c11a111084e lea ecx,[rcx+r10+4E0811A1h]
00007ffe`8d35878f 448bc9 mov r9d,ecx
00007ffe`8d358792 41c1e115 shl r9d,15h
00007ffe`8d358796 c1e90b shr ecx,0Bh
00007ffe`8d358799 410bc9 or ecx,r9d
00007ffe`8d35879c 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 624:
00007ffe`8d35879f 458bcb mov r9d,r11d
00007ffe`8d3587a2 41f7d1 not r9d
00007ffe`8d3587a5 440bc9 or r9d,ecx
00007ffe`8d3587a8 4533c8 xor r9d,r8d
00007ffe`8d3587ab 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 625:
00007ffe`8d3587ae 458bcb mov r9d,r11d
00007ffe`8d3587b1 458bd8 mov r11d,r8d
00007ffe`8d3587b4 448bc1 mov r8d,ecx
00007ffe`8d3587b7 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d3587bb 448b5010 mov r10d,dword ptr [rax+10h]
00007ffe`8d3587bf 428d8c11827e53f7 lea ecx,[rcx+r10-8AC817Eh]
00007ffe`8d3587c7 8bd1 mov edx,ecx
00007ffe`8d3587c9 c1e206 shl edx,6
00007ffe`8d3587cc c1e91a shr ecx,1Ah
00007ffe`8d3587cf 0bd1 or edx,ecx
00007ffe`8d3587d1 4103d0 add edx,r8d
00007ffe`8d3587d4 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 633:
00007ffe`8d3587d6 418bd3 mov edx,r11d
00007ffe`8d3587d9 f7d2 not edx
00007ffe`8d3587db 0bd1 or edx,ecx
00007ffe`8d3587dd 4133d0 xor edx,r8d
00007ffe`8d3587e0 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 634:
00007ffe`8d3587e3 418bd3 mov edx,r11d
00007ffe`8d3587e6 458bd8 mov r11d,r8d
00007ffe`8d3587e9 448bc1 mov r8d,ecx
00007ffe`8d3587ec 438d0c11 lea ecx,[r9+r10]
00007ffe`8d3587f0 448b502c mov r10d,dword ptr [rax+2Ch]
00007ffe`8d3587f4 428d8c1135f23abd lea ecx,[rcx+r10-42C50DCBh]
00007ffe`8d3587fc 448bc9 mov r9d,ecx
00007ffe`8d3587ff 41c1e10a shl r9d,0Ah
00007ffe`8d358803 c1e916 shr ecx,16h
00007ffe`8d358806 410bc9 or ecx,r9d
00007ffe`8d358809 4103c8 add ecx,r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 642:
00007ffe`8d35880c 458bcb mov r9d,r11d
00007ffe`8d35880f 41f7d1 not r9d
00007ffe`8d358812 440bc9 or r9d,ecx
00007ffe`8d358815 4533c8 xor r9d,r8d
00007ffe`8d358818 458bd1 mov r10d,r9d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 643:
00007ffe`8d35881b 458bcb mov r9d,r11d
00007ffe`8d35881e 458bd8 mov r11d,r8d
00007ffe`8d358821 448bc1 mov r8d,ecx
00007ffe`8d358824 428d0c12 lea ecx,[rdx+r10]
00007ffe`8d358828 448b5008 mov r10d,dword ptr [rax+8]
00007ffe`8d35882c 428d8c11bbd2d72a lea ecx,[rcx+r10+2AD7D2BBh]
00007ffe`8d358834 8bd1 mov edx,ecx
00007ffe`8d358836 c1e20f shl edx,0Fh
00007ffe`8d358839 c1e911 shr ecx,11h
00007ffe`8d35883c 0bd1 or edx,ecx
00007ffe`8d35883e 4103d0 add edx,r8d
00007ffe`8d358841 8bca mov ecx,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 651:
00007ffe`8d358843 418bd3 mov edx,r11d
00007ffe`8d358846 f7d2 not edx
00007ffe`8d358848 0bd1 or edx,ecx
00007ffe`8d35884a 4133d0 xor edx,r8d
00007ffe`8d35884d 448bd2 mov r10d,edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 652:
00007ffe`8d358850 418bd3 mov edx,r11d
00007ffe`8d358853 458bd8 mov r11d,r8d
00007ffe`8d358856 448bc1 mov r8d,ecx
00007ffe`8d358859 438d0c11 lea ecx,[r9+r10]
00007ffe`8d35885d 8b4024 mov eax,dword ptr [rax+24h]
00007ffe`8d358860 8d8c0191d386eb lea ecx,[rcx+rax-14792C6Fh]
00007ffe`8d358867 8bc1 mov eax,ecx
00007ffe`8d358869 c1e015 shl eax,15h
00007ffe`8d35886c c1e90b shr ecx,0Bh
00007ffe`8d35886f 0bc1 or eax,ecx
00007ffe`8d358871 4103c0 add eax,r8d
00007ffe`8d358874 8bc8 mov ecx,eax
00007ffe`8d358876 0116 add dword ptr [rsi],edx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 660:
00007ffe`8d358878 3936 cmp dword ptr [rsi],esi
00007ffe`8d35887a 498bc7 mov rax,r15
00007ffe`8d35887d 0108 add dword ptr [rax],ecx
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 661:
00007ffe`8d35887f 3936 cmp dword ptr [rsi],esi
00007ffe`8d358881 498bc4 mov rax,r12
00007ffe`8d358884 440100 add dword ptr [rax],r8d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 662:
00007ffe`8d358887 3936 cmp dword ptr [rsi],esi
00007ffe`8d358889 498bc5 mov rax,r13
00007ffe`8d35888c 440118 add dword ptr [rax],r11d
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 30:
00007ffe`8d35888f 41ffc6 inc r14d
00007ffe`8d358892 443bf5 cmp r14d,ebp
00007ffe`8d358895 0f8ce5f0ffff jl 00007ffe`8d357980
c:\code\blog\md5\Md5DotNet\Md5DotNet\Md5_5_InlineRotate.cs @ 664:
00007ffe`8d35889b 4883c478 add rsp,78h
00007ffe`8d35889f 5b pop rbx
00007ffe`8d3588a0 5d pop rbp
00007ffe`8d3588a1 5e pop rsi
00007ffe`8d3588a2 5f pop rdi
00007ffe`8d3588a3 415c pop r12
00007ffe`8d3588a5 415d pop r13
00007ffe`8d3588a7 415e pop r14
00007ffe`8d3588a9 415f pop r15
00007ffe`8d3588ab c3 ret
|
examples/SPARK2005/packages/polypaver-interval.ads | michalkonecny/polypaver | 1 | 22665 | <gh_stars>1-10
package PolyPaver.Interval is
--# function Hull(Low,High : Float) return Float;
--# function Contained_In(Object,Subject : Float) return Boolean;
end PolyPaver.Interval;
|
filters/playsongby.applescript | andreifilip123/play-song | 0 | 1555 | <filename>filters/playsongby.applescript
-- playsongby filter --
on loadConfig()
return (load script POSIX file (do shell script "./resources/compile-config.sh"))
end loadConfig
on getArtistResultListFeedback(query)
global config
set query to trimWhitespace(query) of config
set musicApplication to musicApplication of config
tell application musicApplication
set theArtists to getResultsFromQuery(query, "artist") of config
repeat with artistName in theArtists
set artistSongs to getArtistSongs(artistName) of config
repeat with theSong in artistSongs
if config's resultListIsFull() then exit repeat
set songId to (get database ID of theSong)
set songName to name of theSong
set songArtworkPath to getSongArtworkPath(theSong) of config
addResult({uid:("song-" & songId), valid:"yes", title:songName, subtitle:artist of theSong, icon:songArtworkPath}) of config
end repeat
if config's resultListIsFull() then exit repeat
end repeat
if config's resultListIsEmpty() then
addNoResultsItem(query, "song") of config
end if
end tell
return getResultListFeedback() of config
end getArtistResultListFeedback
on run query
set config to loadConfig()
getArtistResultListFeedback(query as text)
end run
|
fe-helper.applescript | Army-U/alfred-fe-helper | 1 | 1786 | <filename>fe-helper.applescript
to getRecordValue(theKey, theList)
run script "on run{theKey,theList}
return (" & theKey & " of theList )
end" with parameters {theKey, theList}
end getRecordValue
on run argv
set FE_HELPER_ID to (system attribute "FE_HELPER_ID")
set apps to {json:"json-format", encode:"en-decode", regexp:"regexp", format:"code-beautify", qrcode:"qr-code", codecompress:"code-compress", timestamp:"timestamp", imagebase64:"image-base64", password:"password", qrdecode:"qr-decode", postman:"postman"}
set app_name to (item 1 of argv)
set tools to (getRecordValue(app_name, apps))
tell application "/Applications/Google Chrome.app"
activate
open location "chrome-extension://" & FE_HELPER_ID & "/dynamic/index.html?tool=" & tools
repeat until (loading of front window's active tab is false)
end repeat
delay 0.5
tell application "System Events" to key code 9 using {command down}
end tell
end run
|
src/main/antlr4/org/entityc/compiler/transform/template/TemplateGrammer.g4 | entityc/entity-compiler | 1 | 686 | <filename>src/main/antlr4/org/entityc/compiler/transform/template/TemplateGrammer.g4<gh_stars>1-10
/*
* Copyright (c) 2019-2022 The EntityC Project. All rights reserved.
* Use of this file is governed by the BSD 3-clause license that
* can be found in the LICENSE.md file in the project root.
*/
parser grammar TemplateGrammer;
options {
tokenVocab=TemplateLexer;
}
template
: chunk* EOF
;
chunk
: block
| blockEnd
| variableTag
| COMMENT
| other
;
other
: Other+
;
identifier
: IDENT
| builtinType
| Language
| Import
| File
| Install
| Copy
| Load
| Function
| Return
| Call
| Foreach
| Continue
| Break
| Exit
| If
| Elseif
| Else
| Version
| Capture
| Log
| Let
| Do
| Switch
| Case
| Default
| Send
| Preserve
| Description
| Publisher
| Outlet
| Author
| To
| From
;
instruction
: languageTag
| domainTag
| importTag
| fileTag
| installTag
| loadTag
| functionDeclTag
| returnTag
| callTag
| foreachTag
| continueTag
| breakTag
| exitTag
| ifTag
| elseifTag
| elseTag
| versionTag
| captureTag
| logTag
| letTag
| doTag
| switchTag
| caseTag
| defaultTag
| receiverTag
| sendTag
| preserveTag
| descriptionTag
| publisherTag
| outletTag
| authorTag
;
block
: BlockTagStart instruction BlockTagEnd
;
blockEnd
: BlockEndTagStart (Function|Foreach|If|File|Capture|Switch|Log|Send|Preserve|Author|Publisher|Outlet) BlockTagEnd
;
descriptionTag
: Description (identifier (',' identifier)*)? STRING
;
nodeDescription
: Description (identifier (',' identifier)*)? STRING
;
languageTag
: Language identifier
;
domainTag
: DomainType identifier
;
versionTag
: Version VERSION_NUM
;
importTag
: Import (identifier|STRING) (From identifier)?
;
installTag
: Install Copy? fileArg fileArg
;
fileTag
: File IfDoesNotExist? fileArg fileArg fileArg
;
fileArg
: expression
;
loadTag
: Load identifier fileArg fileArg fileArg
;
functionDeclTag
: Function identifier nodeDescription* '(' functionDeclArgList? ')' ('->' '(' functionDeclArgList ')' )?
;
functionDeclArgList
: functionDeclArg (',' functionDeclArg )*
;
functionDeclArg
: identifier nodeDescription*
;
callTag
: Call Explicit? identifier '(' inputCallArgList? ')' ('->' '(' outputCallArgList ')' )?
;
callArg
: identifier ':' expression
;
inputCallArgList
: callArg (',' callArg)*
;
outputCallArgList
: callArg (',' callArg)*
;
returnTag
: Return
;
foreachTag
: Foreach expression (As identifier)?
| Foreach identifier In expression ('...' expression (By expression)?)?
| Foreach identifier In expression If expression
;
breakTag
: Break
;
exitTag
: Exit
;
continueTag
: Continue
;
ifTag
: If expression
;
elseifTag
: Elseif expression
;
elseTag
: Else
;
switchTag
: Switch expression
;
caseArg
: INTEGER | STRING | identifier | primitiveType
;
caseTag
: Case caseArg (COMMA caseArg)*
;
defaultTag
: Default
;
captureTag
: Capture identifier
;
receiverTag
: Receive (Distinct)? identifier nodeDescription*
;
sendTag
: Send identifier
;
preserveTag
: Preserve identifier (Deprecates identifier (',' identifier)*)?
;
logTag
: Log identifier?
;
letTag
: Let identifier EQUALS expression
;
doTag
: Do expression
;
variableTag
: VarTagStart ('$'|expression) VarTagEnd
;
methodCall
: identifier '(' expressionList? ')'
;
expression
: primary
| expression bop='.' (identifier | methodCall)
| methodCall
| expression bop='|' filter
| '(' typeType ')' expression
| prefix=('+'|'-') expression
| prefix='!' expression
| expression bop=('*'|'/'|'%') expression
| expression bop=('+'|'-') expression
| expression bop=('<=' | '>=' | '>' | '<') expression
| expression bop=('==' | '!=') expression
//| expression bop=TYPEOF (ENTITY|DOMAIN|VIEW|ENUM|INTERFACE|OPERATION|NATIVE)
| expression bop=InstanceOf typeType
| expression bop=Extends typeType
| expression bop='&&' expression
| expression bop='||' expression
| <assoc=right> expression bop='?' expression Colon expression
| arraySpecifier
;
expressionList
: expression (',' expression)*
;
arraySpecifier
: '@[' expressionList? ']@'
;
filterParamExpression
: OpenParen expression CloseParen
| identifier
;
primary
: identifier
| constant
| '(' expression ')'
;
constant
: INTEGER
| FLOAT
| STRING
| BOOLEAN=('true'|'false')
| HashConstant
| OpenParen HashConstant Colon constant CloseParen
| builtinType Colon IDENT ('.' IDENT)*
;
typeType
: primitiveType
;
primitiveType
: BOOLEAN_TYPE
| INT32_TYPE
| INT64_TYPE
| FLOAT_TYPE
| DOUBLE_TYPE
| STRING_TYPE
| UUID_TYPE
| DATE_TYPE
| ASSET_TYPE
;
builtinType
: EntityType
| AttributeType
| RelationshipType
| EnumType
| DomainType
| InterfaceType
| OperationType
| TypedefType
| Language
;
invocationConstant
: HashConstant (Colon STRING)?
;
filter
: identifier (Colon filterParamExpression)? filterOption*
;
filterOption
: identifier
| identifier ':' (identifier|constant)
;
namespaceIdent
: IDENT ('.' IDENT)*
;
namespaceIdentList
: namespaceIdent (',' namespaceIdent)*
;
publisherTag
: Publisher namespaceIdent nodeDescription*
;
authorOption
: identifier '=' identifier
;
authorTag
: Author To namespaceIdentList? (Outlet IDENT authorOption* nodeDescription*)?
;
outletTag
: Outlet IDENT nodeDescription*
;
|
src/sound/alarm_musics/alarm_one/main.asm | Gegel85/RunnerGB | 0 | 83162 | include "src/sound/alarm_musics/alarm_one/channel1.asm"
include "src/sound/alarm_musics/alarm_one/channel2.asm"
include "src/sound/alarm_musics/alarm_one/channel3.asm"
include "src/sound/alarm_musics/alarm_one/channel4.asm"
AlarmOneTheme::
db $A0
db %100
dw musicChan1AlarmOneTheme
dw musicChan2AlarmOneTheme
dw musicChan3AlarmOneTheme
dw musicChan4AlarmOneTheme
|
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0x84_notsx.log_21829_575.asm | ljhsiun2/medusa | 9 | 170089 | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r13
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_A_ht+0x1867, %rsi
lea addresses_WC_ht+0xf867, %rdi
nop
xor %r12, %r12
mov $33, %rcx
rep movsq
nop
nop
nop
nop
add $49162, %r12
lea addresses_D_ht+0xfc37, %r13
nop
nop
nop
nop
and $29776, %rbp
mov (%r13), %r11d
nop
nop
nop
nop
cmp $35962, %r12
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r13
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r15
push %r8
push %rbp
push %rbx
push %rcx
push %rdx
// Store
lea addresses_A+0x1e527, %rbp
cmp $24529, %r15
movw $0x5152, (%rbp)
nop
nop
nop
nop
inc %rbx
// Faulty Load
lea addresses_PSE+0x4067, %rbp
nop
nop
nop
nop
nop
and %r8, %r8
movb (%rbp), %dl
lea oracles, %rcx
and $0xff, %rdx
shlq $12, %rdx
mov (%rcx,%rdx,1), %rdx
pop %rdx
pop %rcx
pop %rbx
pop %rbp
pop %r8
pop %r15
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_PSE', 'same': False, 'size': 4, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_A', 'same': False, 'size': 2, 'congruent': 6, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
[Faulty Load]
{'src': {'type': 'addresses_PSE', 'same': True, 'size': 1, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_A_ht', 'congruent': 7, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 9, 'same': True}, 'OP': 'REPM'}
{'src': {'type': 'addresses_D_ht', 'same': False, 'size': 4, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
|
code/S01E04/asm/04_flexible.asm | fcatrin/bitabit | 2 | 97662 | org $2000
lda #64
sta 202
lda #156
sta 203
ldy #0
lda #35
loop sta (202),y ; a is stored where 202 points at
iny
bne loop
inc 203
ldx 203
cpx #160 ; page 160 = 40960 (40000 + 40*24)
bne loop
halt jmp halt
|
programs/oeis/199/A199486.asm | neoneye/loda | 22 | 240514 | ; A199486: (9*7^n+1)/2.
; 5,32,221,1544,10805,75632,529421,3705944,25941605,181591232,1271138621,8897970344,62285792405,436000546832,3052003827821,21364026794744,149548187563205,1046837312942432,7327861190597021,51295028334179144,359065198339254005,2513456388374778032,17594194718623446221,123159363030364123544,862115541212548864805,6034808788487842053632,42243661519414894375421,295705630635904260627944,2069939414451329824395605,14489575901159308770769232,101427031308115161395384621,709989219156806129767692344,4969924534097642908373846405,34789471738683500358616924832,243526302170784502510318473821,1704684115195491517572229316744,11932788806368440623005605217205,83529521644579084361039236520432,584706651512053590527274655643021,4092946560584375133690922589501144,28650625924090625935836458126508005,200554381468634381550855206885556032
mov $1,7
pow $1,$0
div $1,6
mul $1,27
add $1,5
mov $0,$1
|
src/Examples/ProducerConsumer.agda | lisandrasilva/agda-liveness | 0 | 3270 | <reponame>lisandrasilva/agda-liveness
{-
Copyright 2019 <NAME>
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
-}
open import Prelude
open import Data.Vec.Bounded renaming ([] to Vec≤[])
open import Data.Vec renaming ( _++_ to _v++_
; [_] to v[_]
; head to headV
; _∷ʳ_ to _v∷ʳ_
; tail to vTail)
open import Data.List
open import StateMachineModel
module Examples.ProducerConsumer
{ℓ : Level}
(Message : Set ℓ) -- Message type
(Size : ℕ) -- Size of the bounded buffer
where
record State : Set (lsuc ℓ) where
field
buffer : Vec≤ Message Size -- The numSpaces ≅ Vec≤.length
produced : List Message
consumed : List Message
open State
data MyEvent : Set ℓ where
produce : Message → MyEvent
consume : Message → MyEvent
data MyEnabled : MyEvent → State → Set ℓ where
prodEnabled : ∀ {st : State} {msg}
→ Vec≤.length (buffer st) < Size
→ MyEnabled (produce msg) st
consEnabled : ∀ {st : State} {msg}
→ 0 < Vec≤.length (buffer st)
→ msg ≡ headV {!!}
→ MyEnabled (consume msg) st
MyAction : ∀ {preState : State} {event : MyEvent}
→ MyEnabled event preState
→ State
MyAction {preSt} {produce m} (prodEnabled x) =
record preSt
{ buffer = Vec≤.vec (buffer preSt) v∷ʳ m , x
; produced = produced preSt ++ [ m ]
}
MyAction {preSt} {consume m} enabled =
record preSt
{ buffer = (vTail (Vec≤.vec {!!})) , {!!}
; produced = consumed preSt ++ [ m ]
}
initialState : State
initialState = record
{ buffer = Vec≤[]
; produced = []
; consumed = []
}
MyStateMachine : StateMachine State MyEvent
MyStateMachine = record
{ initial = λ state → state ≡ initialState
; enabled = MyEnabled
; action = MyAction
}
MyEventSet : EventSet {Event = MyEvent}
MyEventSet (produce x) = ⊥
MyEventSet (consume x) = ⊤
data MyWeakFairness : EventSet → Set ℓ where
wf : MyWeakFairness MyEventSet
MySystem : System State MyEvent
MySystem = record
{ stateMachine = MyStateMachine
; weakFairness = MyWeakFairness
}
|
source/strings/a-chacon.adb | ytomino/drake | 33 | 27301 | <reponame>ytomino/drake<filename>source/strings/a-chacon.adb<gh_stars>10-100
package body Ada.Characters.Conversions is
use type System.UTF_Conversions.From_Status_Type;
use type System.UTF_Conversions.To_Status_Type;
function Is_Wide_Character (Item : Character) return Boolean is
begin
return Character'Pos (Item) <= 16#7f#;
end Is_Wide_Character;
function Is_Wide_String (Item : String) return Boolean is
Last : Natural := Item'First - 1;
begin
while Last /= Item'Last loop
declare
Code : System.UTF_Conversions.UCS_4;
From_State : System.UTF_Conversions.From_Status_Type;
begin
System.UTF_Conversions.From_UTF_8 (
Item,
Last,
Code,
From_State);
-- a check for detecting illegal sequence are omitted
if System.UTF_Conversions.UCS_4'Pos (Code) > 16#10ffff# then
return False;
end if;
end;
end loop;
return True;
end Is_Wide_String;
function Is_Character (Item : Wide_Character) return Boolean is
begin
return Wide_Character'Pos (Item) <= 16#7f#;
end Is_Character;
function Is_String (Item : Wide_String) return Boolean is
pragma Unreferenced (Item);
begin
-- a check for detecting illegal sequence are omitted
return True;
end Is_String;
function Is_Wide_Wide_Character (Item : Wide_Character) return Boolean is
begin
return Wide_Character'Pos (Item) not in 16#d800# .. 16#dfff#;
end Is_Wide_Wide_Character;
function Is_Character (Item : Wide_Wide_Character) return Boolean is
begin
return Wide_Wide_Character'Pos (Item) <= 16#7f#;
end Is_Character;
function Is_String (Item : Wide_Wide_String) return Boolean is
pragma Unreferenced (Item);
begin
-- a check for detecting illegal sequence are omitted
return True;
end Is_String;
function Is_Wide_Character (Item : Wide_Wide_Character) return Boolean is
begin
-- a check for detecting illegal sequence are omitted
return Wide_Wide_Character'Pos (Item) <= 16#ffff#;
end Is_Wide_Character;
function Is_Wide_String (Item : Wide_Wide_String) return Boolean is
begin
for I in Item'Range loop
-- a check for detecting illegal sequence are omitted
if Wide_Wide_Character'Pos (Item (I)) > 16#10ffff# then
return False;
end if;
end loop;
return True;
end Is_Wide_String;
function To_Wide_Character (
Item : Character;
Substitute : Wide_Character := ' ')
return Wide_Character is
begin
if Is_Wide_Character (Item) then
return Wide_Character'Val (Character'Pos (Item));
else
return Substitute;
end if;
end To_Wide_Character;
function To_Wide_Wide_Character (
Item : Character;
Substitute : Wide_Wide_Character := ' ')
return Wide_Wide_Character is
begin
if Is_Wide_Wide_Character (Item) then
return Wide_Wide_Character'Val (Character'Pos (Item));
else
return Substitute;
end if;
end To_Wide_Wide_Character;
function To_Wide_Wide_Character (
Item : Wide_Character;
Substitute : Wide_Wide_Character := ' ')
return Wide_Wide_Character is
begin
if Is_Wide_Wide_Character (Item) then
return Wide_Wide_Character'Val (Wide_Character'Pos (Item));
else
return Substitute;
end if;
end To_Wide_Wide_Character;
function To_Character (
Item : Wide_Character;
Substitute : Character := ' ')
return Character is
begin
if Is_Character (Item) then
return Character'Val (Wide_Character'Pos (Item));
else
return Substitute;
end if;
end To_Character;
function To_String (
Item : Wide_String;
Substitute : Character := ' ')
return String is
begin
return To_String (Item, Substitute => (1 => Substitute));
end To_String;
function To_Character (
Item : Wide_Wide_Character;
Substitute : Character := ' ')
return Character is
begin
if Is_Character (Item) then
return Character'Val (Wide_Wide_Character'Pos (Item));
else
return Substitute;
end if;
end To_Character;
function To_String (
Item : Wide_Wide_String;
Substitute : Character := ' ')
return String is
begin
return To_String (Item, Substitute => (1 => Substitute));
end To_String;
function To_Wide_Character (
Item : Wide_Wide_Character;
Substitute : Wide_Character := ' ')
return Wide_Character is
begin
if Is_Wide_Character (Item) then
return Wide_Character'Val (Wide_Wide_Character'Pos (Item));
else
return Substitute;
end if;
end To_Wide_Character;
function To_Wide_String (
Item : Wide_Wide_String;
Substitute : Wide_Character := ' ')
return Wide_String is
begin
return To_Wide_String (Item, Substitute => (1 => Substitute));
end To_Wide_String;
procedure Get (
Item : String;
Last : out Natural;
Value : out Wide_Wide_Character;
Substitute : Wide_Wide_Character := ' ')
is
Code : System.UTF_Conversions.UCS_4;
From_Status : System.UTF_Conversions.From_Status_Type;
begin
System.UTF_Conversions.From_UTF_8 (
Item,
Last,
Code,
From_Status);
if From_Status /= System.UTF_Conversions.Success then
Value := Substitute;
else
Value := Wide_Wide_Character'Val (Code);
end if;
end Get;
procedure Get (
Item : String;
Last : out Natural;
Value : out Wide_Wide_Character;
Is_Illegal_Sequence : out Boolean)
is
Code : System.UTF_Conversions.UCS_4;
From_Status : System.UTF_Conversions.From_Status_Type;
begin
System.UTF_Conversions.From_UTF_8 (
Item,
Last,
Code,
From_Status);
Value := Wide_Wide_Character'Val (Code);
Is_Illegal_Sequence := From_Status /= System.UTF_Conversions.Success;
end Get;
procedure Get_Reverse (
Item : String;
First : out Positive;
Value : out Wide_Wide_Character;
Substitute : Wide_Wide_Character := ' ')
is
Code : System.UTF_Conversions.UCS_4;
From_Status : System.UTF_Conversions.From_Status_Type;
begin
System.UTF_Conversions.From_UTF_8_Reverse (
Item,
First,
Code,
From_Status);
if From_Status /= System.UTF_Conversions.Success then
Value := Substitute;
else
Value := Wide_Wide_Character'Val (Code);
end if;
end Get_Reverse;
procedure Get_Reverse (
Item : String;
First : out Positive;
Value : out Wide_Wide_Character;
Is_Illegal_Sequence : out Boolean)
is
Code : System.UTF_Conversions.UCS_4;
From_Status : System.UTF_Conversions.From_Status_Type;
begin
System.UTF_Conversions.From_UTF_8_Reverse (
Item,
First,
Code,
From_Status);
Value := Wide_Wide_Character'Val (Code);
Is_Illegal_Sequence := From_Status /= System.UTF_Conversions.Success;
end Get_Reverse;
procedure Get (
Item : Wide_String;
Last : out Natural;
Value : out Wide_Wide_Character;
Substitute : Wide_Wide_Character := ' ')
is
Code : System.UTF_Conversions.UCS_4;
From_Status : System.UTF_Conversions.From_Status_Type;
begin
System.UTF_Conversions.From_UTF_16 (
Item,
Last,
Code,
From_Status);
if From_Status /= System.UTF_Conversions.Success then
Value := Substitute;
else
Value := Wide_Wide_Character'Val (Code);
end if;
end Get;
procedure Get (
Item : Wide_String;
Last : out Natural;
Value : out Wide_Wide_Character;
Is_Illegal_Sequence : out Boolean)
is
Code : System.UTF_Conversions.UCS_4;
From_Status : System.UTF_Conversions.From_Status_Type;
begin
System.UTF_Conversions.From_UTF_16 (
Item,
Last,
Code,
From_Status);
Value := Wide_Wide_Character'Val (Code);
Is_Illegal_Sequence := From_Status /= System.UTF_Conversions.Success;
end Get;
procedure Get_Reverse (
Item : Wide_String;
First : out Positive;
Value : out Wide_Wide_Character;
Substitute : Wide_Wide_Character := ' ')
is
Code : System.UTF_Conversions.UCS_4;
From_Status : System.UTF_Conversions.From_Status_Type;
begin
System.UTF_Conversions.From_UTF_16_Reverse (
Item,
First,
Code,
From_Status);
if From_Status /= System.UTF_Conversions.Success then
Value := Substitute;
else
Value := Wide_Wide_Character'Val (Code);
end if;
end Get_Reverse;
procedure Get_Reverse (
Item : Wide_String;
First : out Positive;
Value : out Wide_Wide_Character;
Is_Illegal_Sequence : out Boolean)
is
Code : System.UTF_Conversions.UCS_4;
From_Status : System.UTF_Conversions.From_Status_Type;
begin
System.UTF_Conversions.From_UTF_16_Reverse (
Item,
First,
Code,
From_Status);
Value := Wide_Wide_Character'Val (Code);
Is_Illegal_Sequence := From_Status /= System.UTF_Conversions.Success;
end Get_Reverse;
procedure Get (
Item : Wide_Wide_String;
Last : out Natural;
Value : out Wide_Wide_Character;
Substitute : Wide_Wide_Character := ' ')
is
Code : System.UTF_Conversions.UCS_4;
From_Status : System.UTF_Conversions.From_Status_Type;
begin
System.UTF_Conversions.From_UTF_32 (
Item,
Last,
Code,
From_Status);
if From_Status /= System.UTF_Conversions.Success then
Value := Substitute;
else
Value := Wide_Wide_Character'Val (Code);
end if;
end Get;
procedure Get (
Item : Wide_Wide_String;
Last : out Natural;
Value : out Wide_Wide_Character;
Is_Illegal_Sequence : out Boolean)
is
Code : System.UTF_Conversions.UCS_4;
From_Status : System.UTF_Conversions.From_Status_Type;
begin
System.UTF_Conversions.From_UTF_32 (
Item,
Last,
Code,
From_Status);
Value := Wide_Wide_Character'Val (Code);
Is_Illegal_Sequence := From_Status /= System.UTF_Conversions.Success;
end Get;
procedure Get_Reverse (
Item : Wide_Wide_String;
First : out Positive;
Value : out Wide_Wide_Character;
Substitute : Wide_Wide_Character := ' ')
is
Code : System.UTF_Conversions.UCS_4;
From_Status : System.UTF_Conversions.From_Status_Type;
begin
System.UTF_Conversions.From_UTF_32_Reverse (
Item,
First,
Code,
From_Status);
if From_Status /= System.UTF_Conversions.Success then
Value := Substitute;
else
Value := Wide_Wide_Character'Val (Code);
end if;
end Get_Reverse;
procedure Get_Reverse (
Item : Wide_Wide_String;
First : out Positive;
Value : out Wide_Wide_Character;
Is_Illegal_Sequence : out Boolean)
is
Code : System.UTF_Conversions.UCS_4;
From_Status : System.UTF_Conversions.From_Status_Type;
begin
System.UTF_Conversions.From_UTF_32_Reverse (
Item,
First,
Code,
From_Status);
Value := Wide_Wide_Character'Val (Code);
Is_Illegal_Sequence := From_Status /= System.UTF_Conversions.Success;
end Get_Reverse;
procedure Put (
Value : Wide_Wide_Character;
Item : out String;
Last : out Natural)
is
To_Status : System.UTF_Conversions.To_Status_Type;
begin
System.UTF_Conversions.To_UTF_8 (
Wide_Wide_Character'Pos (Value),
Item,
Last,
To_Status);
if To_Status /= System.UTF_Conversions.Success then
raise Constraint_Error; -- Strings.Length_Error ???
end if;
end Put;
procedure Put (
Value : Wide_Wide_Character;
Item : out Wide_String;
Last : out Natural)
is
To_Status : System.UTF_Conversions.To_Status_Type;
begin
System.UTF_Conversions.To_UTF_16 (
Wide_Wide_Character'Pos (Value),
Item,
Last,
To_Status);
if To_Status /= System.UTF_Conversions.Success then
raise Constraint_Error;
end if;
end Put;
procedure Put (
Value : Wide_Wide_Character;
Item : out Wide_Wide_String;
Last : out Natural)
is
To_Status : System.UTF_Conversions.To_Status_Type;
begin
System.UTF_Conversions.To_UTF_32 (
Wide_Wide_Character'Pos (Value),
Item,
Last,
To_Status);
if To_Status /= System.UTF_Conversions.Success then
raise Constraint_Error;
end if;
end Put;
end Ada.Characters.Conversions;
|
alloy4fun_models/trashltl/models/9/K7s3yzmhQGpXacQvp.als | Kaixi26/org.alloytools.alloy | 0 | 2350 | <filename>alloy4fun_models/trashltl/models/9/K7s3yzmhQGpXacQvp.als
open main
pred idK7s3yzmhQGpXacQvp_prop10 {
always all f: File | always (eventually f in Protected implies f in Protected)
}
pred __repair { idK7s3yzmhQGpXacQvp_prop10 }
check __repair { idK7s3yzmhQGpXacQvp_prop10 <=> prop10o } |
tools-src/gnu/gcc/gcc/ada/86numaux.adb | enfoTek/tomato.linksys.e2000.nvram-mod | 80 | 3447 | <filename>tools-src/gnu/gcc/gcc/ada/86numaux.adb
------------------------------------------------------------------------------
-- --
-- GNAT RUNTIME COMPONENTS --
-- --
-- A D A . N U M E R I C S . A U X --
-- --
-- B o d y --
-- (Machine Version for x86) --
-- --
-- $Revision$
-- --
-- Copyright (C) 1998-2001 Free Software Foundation, Inc. --
-- --
-- GNAT is free software; you can redistribute it and/or modify it under --
-- terms of the GNU General Public License as published by the Free Soft- --
-- ware Foundation; either version 2, or (at your option) any later ver- --
-- sion. GNAT is distributed in the hope that it will be useful, but WITH- --
-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY --
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License --
-- for more details. You should have received a copy of the GNU General --
-- Public License distributed with GNAT; see file COPYING. If not, write --
-- to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, --
-- MA 02111-1307, USA. --
-- --
-- As a special exception, if other files instantiate generics from this --
-- unit, or you link this unit with other files to produce an executable, --
-- this unit does not by itself cause the resulting executable to be --
-- covered by the GNU General Public License. This exception does not --
-- however invalidate any other reasons why the executable file might be --
-- covered by the GNU Public License. --
-- --
-- GNAT was originally developed by the GNAT team at New York University. --
-- Extensive contributions were provided by Ada Core Technologies Inc. --
-- --
------------------------------------------------------------------------------
-- File a-numaux.adb <- 86numaux.adb
-- This version of Numerics.Aux is for the IEEE Double Extended floating
-- point format on x86.
with System.Machine_Code; use System.Machine_Code;
package body Ada.Numerics.Aux is
NL : constant String := ASCII.LF & ASCII.HT;
type FPU_Stack_Pointer is range 0 .. 7;
for FPU_Stack_Pointer'Size use 3;
type FPU_Status_Word is record
B : Boolean; -- FPU Busy (for 8087 compatibility only)
ES : Boolean; -- Error Summary Status
SF : Boolean; -- Stack Fault
Top : FPU_Stack_Pointer;
-- Condition Code Flags
-- C2 is set by FPREM and FPREM1 to indicate incomplete reduction.
-- In case of successfull recorction, C0, C3 and C1 are set to the
-- three least significant bits of the result (resp. Q2, Q1 and Q0).
-- C2 is used by FPTAN, FSIN, FCOS, and FSINCOS to indicate that
-- that source operand is beyond the allowable range of
-- -2.0**63 .. 2.0**63.
C3 : Boolean;
C2 : Boolean;
C1 : Boolean;
C0 : Boolean;
-- Exception Flags
PE : Boolean; -- Precision
UE : Boolean; -- Underflow
OE : Boolean; -- Overflow
ZE : Boolean; -- Zero Divide
DE : Boolean; -- Denormalized Operand
IE : Boolean; -- Invalid Operation
end record;
for FPU_Status_Word use record
B at 0 range 15 .. 15;
C3 at 0 range 14 .. 14;
Top at 0 range 11 .. 13;
C2 at 0 range 10 .. 10;
C1 at 0 range 9 .. 9;
C0 at 0 range 8 .. 8;
ES at 0 range 7 .. 7;
SF at 0 range 6 .. 6;
PE at 0 range 5 .. 5;
UE at 0 range 4 .. 4;
OE at 0 range 3 .. 3;
ZE at 0 range 2 .. 2;
DE at 0 range 1 .. 1;
IE at 0 range 0 .. 0;
end record;
for FPU_Status_Word'Size use 16;
-----------------------
-- Local subprograms --
-----------------------
function Is_Nan (X : Double) return Boolean;
-- Return True iff X is a IEEE NaN value
function Logarithmic_Pow (X, Y : Double) return Double;
-- Implementation of X**Y using Exp and Log functions (binary base)
-- to calculate the exponentiation. This is used by Pow for values
-- for values of Y in the open interval (-0.25, 0.25)
function Reduce (X : Double) return Double;
-- Implement partial reduction of X by Pi in the x86.
-- Note that for the Sin, Cos and Tan functions completely accurate
-- reduction of the argument is done for arguments in the range of
-- -2.0**63 .. 2.0**63, using a 66-bit approximation of Pi.
pragma Inline (Is_Nan);
pragma Inline (Reduce);
---------------------------------
-- Basic Elementary Functions --
---------------------------------
-- This section implements a few elementary functions that are
-- used to build the more complex ones. This ordering enables
-- better inlining.
----------
-- Atan --
----------
function Atan (X : Double) return Double is
Result : Double;
begin
Asm (Template =>
"fld1" & NL
& "fpatan",
Outputs => Double'Asm_Output ("=t", Result),
Inputs => Double'Asm_Input ("0", X));
-- The result value is NaN iff input was invalid
if not (Result = Result) then
raise Argument_Error;
end if;
return Result;
end Atan;
---------
-- Exp --
---------
function Exp (X : Double) return Double is
Result : Double;
begin
Asm (Template =>
"fldl2e " & NL
& "fmulp %%st, %%st(1)" & NL -- X * log2 (E)
& "fld %%st(0) " & NL
& "frndint " & NL -- Integer (X * Log2 (E))
& "fsubr %%st, %%st(1)" & NL -- Fraction (X * Log2 (E))
& "fxch " & NL
& "f2xm1 " & NL -- 2**(...) - 1
& "fld1 " & NL
& "faddp %%st, %%st(1)" & NL -- 2**(Fraction (X * Log2 (E)))
& "fscale " & NL -- E ** X
& "fstp %%st(1) ",
Outputs => Double'Asm_Output ("=t", Result),
Inputs => Double'Asm_Input ("0", X));
return Result;
end Exp;
------------
-- Is_Nan --
------------
function Is_Nan (X : Double) return Boolean is
begin
-- The IEEE NaN values are the only ones that do not equal themselves
return not (X = X);
end Is_Nan;
---------
-- Log --
---------
function Log (X : Double) return Double is
Result : Double;
begin
Asm (Template =>
"fldln2 " & NL
& "fxch " & NL
& "fyl2x " & NL,
Outputs => Double'Asm_Output ("=t", Result),
Inputs => Double'Asm_Input ("0", X));
return Result;
end Log;
------------
-- Reduce --
------------
function Reduce (X : Double) return Double is
Result : Double;
begin
Asm
(Template =>
-- Partial argument reduction
"fldpi " & NL
& "fadd %%st(0), %%st" & NL
& "fxch %%st(1) " & NL
& "fprem1 " & NL
& "fstp %%st(1) ",
Outputs => Double'Asm_Output ("=t", Result),
Inputs => Double'Asm_Input ("0", X));
return Result;
end Reduce;
----------
-- Sqrt --
----------
function Sqrt (X : Double) return Double is
Result : Double;
begin
if X < 0.0 then
raise Argument_Error;
end if;
Asm (Template => "fsqrt",
Outputs => Double'Asm_Output ("=t", Result),
Inputs => Double'Asm_Input ("0", X));
return Result;
end Sqrt;
---------------------------------
-- Other Elementary Functions --
---------------------------------
-- These are built using the previously implemented basic functions
----------
-- Acos --
----------
function Acos (X : Double) return Double is
Result : Double;
begin
Result := 2.0 * Atan (Sqrt ((1.0 - X) / (1.0 + X)));
-- The result value is NaN iff input was invalid
if Is_Nan (Result) then
raise Argument_Error;
end if;
return Result;
end Acos;
----------
-- Asin --
----------
function Asin (X : Double) return Double is
Result : Double;
begin
Result := Atan (X / Sqrt ((1.0 - X) * (1.0 + X)));
-- The result value is NaN iff input was invalid
if Is_Nan (Result) then
raise Argument_Error;
end if;
return Result;
end Asin;
---------
-- Cos --
---------
function Cos (X : Double) return Double is
Reduced_X : Double := X;
Result : Double;
Status : FPU_Status_Word;
begin
loop
Asm
(Template =>
"fcos " & NL
& "xorl %%eax, %%eax " & NL
& "fnstsw %%ax ",
Outputs => (Double'Asm_Output ("=t", Result),
FPU_Status_Word'Asm_Output ("=a", Status)),
Inputs => Double'Asm_Input ("0", Reduced_X));
exit when not Status.C2;
-- Original argument was not in range and the result
-- is the unmodified argument.
Reduced_X := Reduce (Result);
end loop;
return Result;
end Cos;
---------------------
-- Logarithmic_Pow --
---------------------
function Logarithmic_Pow (X, Y : Double) return Double is
Result : Double;
begin
Asm (Template => "" -- X : Y
& "fyl2x " & NL -- Y * Log2 (X)
& "fst %%st(1) " & NL -- Y * Log2 (X) : Y * Log2 (X)
& "frndint " & NL -- Int (...) : Y * Log2 (X)
& "fsubr %%st, %%st(1)" & NL -- Int (...) : Fract (...)
& "fxch " & NL -- Fract (...) : Int (...)
& "f2xm1 " & NL -- 2**Fract (...) - 1 : Int (...)
& "fld1 " & NL -- 1 : 2**Fract (...) - 1 : Int (...)
& "faddp %%st, %%st(1)" & NL -- 2**Fract (...) : Int (...)
& "fscale " & NL -- 2**(Fract (...) + Int (...))
& "fstp %%st(1) ",
Outputs => Double'Asm_Output ("=t", Result),
Inputs =>
(Double'Asm_Input ("0", X),
Double'Asm_Input ("u", Y)));
return Result;
end Logarithmic_Pow;
---------
-- Pow --
---------
function Pow (X, Y : Double) return Double is
type Mantissa_Type is mod 2**Double'Machine_Mantissa;
-- Modular type that can hold all bits of the mantissa of Double
-- For negative exponents, a division is done
-- at the end of the processing.
Negative_Y : constant Boolean := Y < 0.0;
Abs_Y : constant Double := abs Y;
-- During this function the following invariant is kept:
-- X ** (abs Y) = Base**(Exp_High + Exp_Mid + Exp_Low) * Factor
Base : Double := X;
Exp_High : Double := Double'Floor (Abs_Y);
Exp_Mid : Double;
Exp_Low : Double;
Exp_Int : Mantissa_Type;
Factor : Double := 1.0;
begin
-- Select algorithm for calculating Pow:
-- integer cases fall through
if Exp_High >= 2.0**Double'Machine_Mantissa then
-- In case of Y that is IEEE infinity, just raise constraint error
if Exp_High > Double'Safe_Last then
raise Constraint_Error;
end if;
-- Large values of Y are even integers and will stay integer
-- after division by two.
loop
-- Exp_Mid and Exp_Low are zero, so
-- X**(abs Y) = Base ** Exp_High = (Base**2) ** (Exp_High / 2)
Exp_High := Exp_High / 2.0;
Base := Base * Base;
exit when Exp_High < 2.0**Double'Machine_Mantissa;
end loop;
elsif Exp_High /= Abs_Y then
Exp_Low := Abs_Y - Exp_High;
Factor := 1.0;
if Exp_Low /= 0.0 then
-- Exp_Low now is in interval (0.0, 1.0)
-- Exp_Mid := Double'Floor (Exp_Low * 4.0) / 4.0;
Exp_Mid := 0.0;
Exp_Low := Exp_Low - Exp_Mid;
if Exp_Low >= 0.5 then
Factor := Sqrt (X);
Exp_Low := Exp_Low - 0.5; -- exact
if Exp_Low >= 0.25 then
Factor := Factor * Sqrt (Factor);
Exp_Low := Exp_Low - 0.25; -- exact
end if;
elsif Exp_Low >= 0.25 then
Factor := Sqrt (Sqrt (X));
Exp_Low := Exp_Low - 0.25; -- exact
end if;
-- Exp_Low now is in interval (0.0, 0.25)
-- This means it is safe to call Logarithmic_Pow
-- for the remaining part.
Factor := Factor * Logarithmic_Pow (X, Exp_Low);
end if;
elsif X = 0.0 then
return 0.0;
end if;
-- Exp_High is non-zero integer smaller than 2**Double'Machine_Mantissa
Exp_Int := Mantissa_Type (Exp_High);
-- Standard way for processing integer powers > 0
while Exp_Int > 1 loop
if (Exp_Int and 1) = 1 then
-- Base**Y = Base**(Exp_Int - 1) * Exp_Int for Exp_Int > 0
Factor := Factor * Base;
end if;
-- Exp_Int is even and Exp_Int > 0, so
-- Base**Y = (Base**2)**(Exp_Int / 2)
Base := Base * Base;
Exp_Int := Exp_Int / 2;
end loop;
-- Exp_Int = 1 or Exp_Int = 0
if Exp_Int = 1 then
Factor := Base * Factor;
end if;
if Negative_Y then
Factor := 1.0 / Factor;
end if;
return Factor;
end Pow;
---------
-- Sin --
---------
function Sin (X : Double) return Double is
Reduced_X : Double := X;
Result : Double;
Status : FPU_Status_Word;
begin
loop
Asm
(Template =>
"fsin " & NL
& "xorl %%eax, %%eax " & NL
& "fnstsw %%ax ",
Outputs => (Double'Asm_Output ("=t", Result),
FPU_Status_Word'Asm_Output ("=a", Status)),
Inputs => Double'Asm_Input ("0", Reduced_X));
exit when not Status.C2;
-- Original argument was not in range and the result
-- is the unmodified argument.
Reduced_X := Reduce (Result);
end loop;
return Result;
end Sin;
---------
-- Tan --
---------
function Tan (X : Double) return Double is
Reduced_X : Double := X;
Result : Double;
Status : FPU_Status_Word;
begin
loop
Asm
(Template =>
"fptan " & NL
& "xorl %%eax, %%eax " & NL
& "fnstsw %%ax " & NL
& "ffree %%st(0) " & NL
& "fincstp ",
Outputs => (Double'Asm_Output ("=t", Result),
FPU_Status_Word'Asm_Output ("=a", Status)),
Inputs => Double'Asm_Input ("0", Reduced_X));
exit when not Status.C2;
-- Original argument was not in range and the result
-- is the unmodified argument.
Reduced_X := Reduce (Result);
end loop;
return Result;
end Tan;
----------
-- Sinh --
----------
function Sinh (X : Double) return Double is
begin
-- Mathematically Sinh (x) is defined to be (Exp (X) - Exp (-X)) / 2.0
if abs X < 25.0 then
return (Exp (X) - Exp (-X)) / 2.0;
else
return Exp (X) / 2.0;
end if;
end Sinh;
----------
-- Cosh --
----------
function Cosh (X : Double) return Double is
begin
-- Mathematically Cosh (X) is defined to be (Exp (X) + Exp (-X)) / 2.0
if abs X < 22.0 then
return (Exp (X) + Exp (-X)) / 2.0;
else
return Exp (X) / 2.0;
end if;
end Cosh;
----------
-- Tanh --
----------
function Tanh (X : Double) return Double is
begin
-- Return the Hyperbolic Tangent of x
--
-- x -x
-- e - e Sinh (X)
-- Tanh (X) is defined to be ----------- = --------
-- x -x Cosh (X)
-- e + e
if abs X > 23.0 then
return Double'Copy_Sign (1.0, X);
end if;
return 1.0 / (1.0 + Exp (-2.0 * X)) - 1.0 / (1.0 + Exp (2.0 * X));
end Tanh;
end Ada.Numerics.Aux;
|
source/environment/machine-pc-freebsd/s-envblo.adb | ytomino/drake | 33 | 24957 | <gh_stars>10-100
function System.Environment_Block return C.char_ptr_ptr is
environ : C.char_ptr_ptr
with Import, Convention => C;
begin
return environ;
end System.Environment_Block;
|
Transynther/x86/_processed/NONE/_xt_/i7-8650U_0xd2.log_21829_1670.asm | ljhsiun2/medusa | 9 | 178277 | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r15
push %r8
push %rbp
push %rdx
lea addresses_UC_ht+0x1445f, %r8
nop
nop
inc %r11
movw $0x6162, (%r8)
cmp %r15, %r15
lea addresses_WC_ht+0x620b, %rbp
nop
nop
nop
nop
xor $63249, %rdx
mov (%rbp), %r15
nop
nop
nop
nop
xor %rdx, %rdx
pop %rdx
pop %rbp
pop %r8
pop %r15
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r14
push %r15
push %r9
push %rax
push %rsi
// Store
lea addresses_US+0x609f, %r13
nop
nop
and %rax, %rax
movb $0x51, (%r13)
add $1391, %r9
// Faulty Load
lea addresses_normal+0xf85f, %r15
nop
nop
nop
nop
and %r14, %r14
mov (%r15), %r13d
lea oracles, %r9
and $0xff, %r13
shlq $12, %r13
mov (%r9,%r13,1), %r13
pop %rsi
pop %rax
pop %r9
pop %r15
pop %r14
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_normal', 'size': 2, 'AVXalign': True, 'NT': False, 'congruent': 0, 'same': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_US', 'size': 1, 'AVXalign': False, 'NT': False, 'congruent': 6, 'same': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_normal', 'size': 4, 'AVXalign': False, 'NT': False, 'congruent': 0, 'same': True}}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'type': 'addresses_UC_ht', 'size': 2, 'AVXalign': False, 'NT': False, 'congruent': 10, 'same': False}}
{'OP': 'LOAD', 'src': {'type': 'addresses_WC_ht', 'size': 8, 'AVXalign': False, 'NT': True, 'congruent': 1, 'same': False}}
{'34': 21829}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
|
P6/data_P6_2/ALUTest185.asm | alxzzhou/BUAA_CO_2020 | 1 | 96842 | lw $1,16($0)
subu $4,$3,$3
srl $1,$1,27
xori $4,$0,23515
andi $5,$1,27001
xor $1,$3,$3
and $1,$5,$3
sltu $4,$4,$3
addu $3,$1,$3
lbu $4,13($0)
sw $3,12($0)
slt $6,$6,$3
sltu $4,$3,$3
sllv $1,$3,$3
sb $1,7($0)
srav $4,$1,$3
lw $3,8($0)
subu $4,$5,$3
sltu $3,$3,$3
srav $4,$4,$3
addu $2,$2,$3
addu $3,$0,$3
srlv $1,$4,$3
sltiu $4,$1,-14090
addu $4,$2,$3
slt $5,$5,$3
addiu $3,$3,31497
andi $3,$5,7832
subu $6,$3,$3
xor $1,$1,$3
sb $3,13($0)
sra $6,$1,12
addu $4,$0,$3
lhu $5,14($0)
srl $6,$6,7
nor $4,$2,$3
srav $6,$1,$3
andi $3,$4,19424
lb $0,1($0)
subu $6,$3,$3
lhu $4,2($0)
srl $1,$1,13
sra $3,$5,31
and $1,$4,$3
lhu $1,14($0)
srav $1,$4,$3
andi $4,$3,54111
subu $1,$6,$3
sllv $1,$3,$3
ori $4,$3,24298
lh $5,6($0)
addiu $1,$1,-3645
ori $1,$5,38004
xori $5,$5,38338
lh $3,6($0)
and $1,$3,$3
addu $4,$1,$3
sll $0,$3,1
sllv $3,$4,$3
slt $3,$4,$3
srav $1,$1,$3
lbu $3,5($0)
sllv $3,$3,$3
srav $3,$3,$3
slt $4,$5,$3
sw $3,0($0)
xor $3,$5,$3
or $6,$0,$3
and $4,$3,$3
lh $4,14($0)
lb $5,11($0)
sra $5,$3,27
xor $5,$1,$3
xori $5,$5,33068
srlv $0,$5,$3
and $5,$3,$3
sra $0,$4,29
lhu $5,14($0)
lw $4,8($0)
lw $4,4($0)
addu $4,$4,$3
or $0,$0,$3
sllv $5,$3,$3
addiu $6,$6,-3172
sw $6,8($0)
lb $4,1($0)
addiu $4,$4,23093
lw $3,12($0)
addiu $3,$1,14912
slt $3,$3,$3
sb $3,1($0)
or $4,$1,$3
xor $1,$3,$3
xori $0,$4,1985
subu $4,$0,$3
lhu $4,12($0)
sra $0,$3,17
addiu $1,$5,-5542
or $3,$6,$3
and $4,$1,$3
sltu $3,$1,$3
srl $5,$5,5
xori $1,$3,45955
sra $0,$5,6
and $4,$5,$3
and $4,$3,$3
srlv $6,$3,$3
sltu $4,$4,$3
ori $1,$3,38446
lw $5,16($0)
srlv $3,$3,$3
lw $3,12($0)
xori $5,$5,2359
slt $3,$3,$3
xor $1,$3,$3
andi $1,$3,7668
andi $5,$0,11941
slt $0,$1,$3
sll $3,$3,1
xori $3,$3,64482
slt $6,$2,$3
addiu $3,$3,-4406
ori $3,$3,15430
andi $5,$4,19401
srlv $1,$4,$3
or $3,$4,$3
and $4,$0,$3
sw $4,8($0)
srl $6,$4,24
nor $3,$4,$3
addu $0,$4,$3
lbu $4,12($0)
sw $3,4($0)
lhu $3,12($0)
sltu $3,$3,$3
lbu $5,2($0)
sllv $3,$5,$3
addu $3,$4,$3
srlv $2,$2,$3
sltiu $4,$3,31319
or $3,$3,$3
xor $4,$4,$3
lh $4,0($0)
lh $1,10($0)
slt $1,$6,$3
addiu $3,$1,-4312
lh $0,4($0)
nor $3,$1,$3
lbu $3,0($0)
nor $3,$3,$3
subu $1,$4,$3
lhu $5,14($0)
andi $3,$0,14391
srlv $1,$5,$3
sllv $5,$4,$3
subu $3,$1,$3
ori $5,$5,26644
lhu $1,4($0)
addu $4,$3,$3
srlv $3,$1,$3
xori $6,$3,19523
addu $3,$3,$3
and $4,$3,$3
lb $1,15($0)
sh $4,8($0)
sllv $6,$6,$3
lh $3,12($0)
srlv $6,$2,$3
addiu $3,$1,13951
or $3,$3,$3
sltiu $4,$4,-29631
addu $5,$3,$3
subu $6,$4,$3
lb $4,0($0)
lw $4,16($0)
lb $4,16($0)
sllv $3,$5,$3
subu $5,$4,$3
xori $6,$6,1390
addiu $1,$3,10210
sll $4,$5,19
sh $5,4($0)
sltiu $3,$4,-2160
subu $3,$4,$3
sw $1,8($0)
subu $3,$3,$3
sb $1,8($0)
lw $5,4($0)
sltu $4,$0,$3
srav $5,$5,$3
sb $3,1($0)
lhu $4,14($0)
addiu $4,$3,4426
sw $6,8($0)
sltiu $3,$3,-11187
sw $6,4($0)
sw $1,8($0)
srlv $3,$3,$3
addu $4,$4,$3
subu $6,$1,$3
ori $4,$4,47569
lw $1,0($0)
sltu $1,$6,$3
sllv $4,$0,$3
or $4,$4,$3
lh $4,12($0)
sb $3,6($0)
andi $1,$5,63990
and $6,$3,$3
ori $3,$4,45495
lw $3,4($0)
sra $3,$3,19
xor $1,$3,$3
and $3,$5,$3
slt $3,$6,$3
sw $5,8($0)
xori $3,$2,1229
xori $4,$6,25476
xori $4,$1,60574
lh $3,0($0)
addu $5,$1,$3
xori $0,$4,52850
sltu $4,$3,$3
addu $4,$6,$3
slti $6,$3,-30868
subu $3,$3,$3
subu $3,$3,$3
ori $4,$5,21522
or $5,$2,$3
nor $1,$4,$3
srlv $3,$2,$3
subu $3,$3,$3
sra $4,$6,30
sh $5,6($0)
sb $3,6($0)
sltiu $3,$3,31653
srlv $5,$3,$3
sh $6,4($0)
xori $0,$1,58813
sh $3,6($0)
sra $4,$4,9
srl $4,$3,23
lhu $1,12($0)
lb $0,12($0)
addiu $5,$4,-21871
sltiu $4,$4,1392
xor $4,$4,$3
lb $1,13($0)
sllv $3,$4,$3
addu $3,$0,$3
and $5,$1,$3
sb $6,15($0)
sw $4,16($0)
subu $4,$3,$3
srav $5,$4,$3
lb $1,4($0)
ori $3,$4,59212
subu $5,$5,$3
sltu $4,$3,$3
ori $0,$5,26488
lbu $5,5($0)
subu $4,$4,$3
sltiu $4,$1,-22305
slt $5,$1,$3
srav $4,$0,$3
xori $4,$2,63395
sb $1,3($0)
lbu $5,12($0)
and $4,$3,$3
lh $4,0($0)
lh $6,2($0)
addiu $3,$4,15526
sb $5,13($0)
and $5,$5,$3
sh $4,14($0)
xori $6,$3,46358
sh $5,8($0)
sw $4,0($0)
addiu $5,$1,-11885
lhu $3,10($0)
ori $3,$3,27976
subu $4,$6,$3
subu $1,$4,$3
lbu $1,12($0)
nor $3,$3,$3
ori $4,$4,15620
xori $6,$2,31908
addiu $1,$4,-29522
xori $4,$2,15692
slti $0,$4,-18898
or $1,$2,$3
lb $5,1($0)
subu $5,$3,$3
and $6,$1,$3
sb $1,11($0)
and $2,$2,$3
addu $5,$5,$3
addu $4,$0,$3
xor $4,$3,$3
addu $2,$2,$3
srav $3,$5,$3
addu $3,$0,$3
sltu $3,$3,$3
addu $5,$4,$3
sltu $4,$4,$3
addu $4,$1,$3
slti $5,$1,-7077
or $4,$6,$3
xori $3,$5,58047
addu $3,$0,$3
subu $1,$6,$3
lbu $1,8($0)
xor $3,$4,$3
and $3,$3,$3
sw $0,12($0)
or $4,$4,$3
srl $1,$5,13
xori $3,$2,7028
srav $3,$3,$3
sw $1,16($0)
andi $3,$2,29842
sllv $5,$2,$3
addiu $4,$3,31259
addiu $3,$3,12914
sra $0,$4,22
sb $5,1($0)
subu $5,$1,$3
srl $0,$0,25
sll $5,$1,26
lb $3,5($0)
lhu $4,8($0)
slti $1,$5,-29251
slt $5,$5,$3
sra $3,$3,16
srlv $1,$1,$3
sh $0,8($0)
subu $4,$4,$3
lhu $3,6($0)
srav $4,$3,$3
sh $3,14($0)
lh $5,6($0)
sw $4,8($0)
lw $1,4($0)
sh $6,8($0)
xor $3,$5,$3
lh $6,12($0)
sb $3,4($0)
lhu $0,4($0)
or $1,$3,$3
xor $3,$3,$3
addu $4,$6,$3
xori $5,$5,42104
slt $4,$1,$3
and $5,$2,$3
lh $3,6($0)
srav $4,$4,$3
subu $6,$6,$3
or $3,$1,$3
nor $1,$3,$3
lbu $0,6($0)
lw $6,12($0)
srav $5,$5,$3
nor $1,$3,$3
xor $3,$4,$3
slti $5,$0,-8031
ori $3,$1,24454
srav $4,$4,$3
lbu $6,9($0)
lb $3,10($0)
addu $4,$3,$3
sltu $1,$4,$3
lh $5,0($0)
or $4,$1,$3
sh $0,14($0)
sll $4,$4,20
subu $0,$4,$3
and $3,$6,$3
subu $5,$4,$3
srav $4,$3,$3
sltu $6,$5,$3
sra $6,$1,4
addu $3,$1,$3
subu $5,$3,$3
sh $5,6($0)
sll $1,$3,24
lhu $3,14($0)
xor $1,$1,$3
or $5,$4,$3
lhu $5,12($0)
sll $4,$1,14
slti $1,$5,-10287
ori $4,$4,23624
sh $1,6($0)
subu $5,$3,$3
and $3,$1,$3
andi $5,$6,4961
srlv $4,$2,$3
and $3,$5,$3
lhu $6,2($0)
sb $5,11($0)
srlv $4,$5,$3
ori $6,$1,42967
sra $4,$3,20
addiu $3,$3,-3901
lhu $3,8($0)
lbu $5,11($0)
slti $6,$5,10939
lw $4,16($0)
sltiu $3,$3,-9149
sltiu $1,$6,-5361
addu $4,$6,$3
addu $5,$5,$3
sll $4,$3,6
srl $0,$5,19
subu $1,$1,$3
srlv $3,$3,$3
sltiu $1,$5,-8647
sll $3,$4,3
srl $4,$4,29
srav $3,$4,$3
sb $5,1($0)
xori $3,$4,64937
lh $1,8($0)
subu $3,$3,$3
srl $3,$3,26
subu $4,$3,$3
subu $5,$6,$3
and $4,$6,$3
lb $3,1($0)
srl $4,$3,7
sra $5,$3,11
and $3,$3,$3
addiu $4,$6,-9862
andi $3,$5,41157
sh $2,4($0)
and $4,$3,$3
sw $6,8($0)
slti $4,$3,-10664
nor $1,$5,$3
sltiu $4,$3,11183
addiu $5,$4,-1580
ori $6,$5,49729
addu $4,$1,$3
xori $3,$3,1558
srav $3,$5,$3
subu $4,$3,$3
xori $1,$1,18809
addu $1,$3,$3
subu $5,$1,$3
addu $5,$1,$3
nor $3,$6,$3
sb $5,2($0)
addu $3,$3,$3
srlv $6,$1,$3
addiu $1,$1,-21205
sh $4,16($0)
xori $3,$0,11674
srlv $1,$3,$3
lb $3,0($0)
lh $3,10($0)
lw $4,16($0)
addiu $4,$5,-8522
slt $3,$3,$3
srlv $3,$0,$3
ori $3,$4,60460
or $5,$1,$3
subu $0,$6,$3
addiu $3,$3,-3066
ori $3,$3,22864
srlv $3,$3,$3
srlv $4,$4,$3
andi $1,$3,47142
srlv $5,$4,$3
lb $1,15($0)
sllv $5,$3,$3
subu $3,$3,$3
subu $5,$1,$3
addiu $5,$5,-3077
sltu $1,$6,$3
subu $1,$3,$3
srl $3,$3,10
lw $4,16($0)
nor $4,$5,$3
lhu $4,6($0)
srlv $4,$4,$3
sw $4,8($0)
addiu $6,$5,21101
lhu $4,8($0)
xor $4,$4,$3
sllv $4,$3,$3
ori $3,$3,65006
lhu $3,10($0)
sllv $4,$2,$3
lhu $3,10($0)
sll $5,$3,7
sb $3,4($0)
lbu $1,6($0)
lh $5,14($0)
subu $6,$3,$3
sh $0,10($0)
lhu $3,0($0)
sw $5,16($0)
sw $0,0($0)
addiu $3,$3,-10793
addiu $5,$5,-29885
sllv $4,$4,$3
lbu $3,1($0)
and $1,$5,$3
ori $3,$6,47908
sra $4,$6,19
and $5,$1,$3
xor $3,$4,$3
sra $5,$3,28
or $1,$5,$3
srlv $0,$4,$3
addiu $3,$3,-26024
nor $3,$3,$3
srlv $3,$3,$3
sw $4,8($0)
slt $5,$3,$3
sltiu $1,$4,30081
lbu $5,4($0)
sra $1,$2,5
sh $5,6($0)
sh $3,14($0)
addu $4,$1,$3
sllv $6,$5,$3
addu $6,$4,$3
sllv $4,$5,$3
srl $4,$4,17
sltiu $3,$3,20106
addiu $3,$3,-14639
lb $3,7($0)
lh $6,6($0)
lb $6,6($0)
sw $4,12($0)
sltiu $3,$1,-30215
lb $5,14($0)
addiu $3,$3,11401
lb $1,14($0)
subu $4,$3,$3
nor $1,$1,$3
lbu $3,4($0)
addu $4,$5,$3
ori $3,$4,28448
xor $5,$5,$3
or $4,$1,$3
sltu $4,$5,$3
addiu $1,$5,3572
slti $3,$3,10212
sltu $5,$4,$3
sb $3,2($0)
addiu $5,$3,2481
addiu $3,$3,31918
sllv $5,$5,$3
or $3,$3,$3
slt $3,$3,$3
subu $6,$3,$3
addu $5,$5,$3
xori $4,$4,51080
and $5,$4,$3
sll $3,$4,16
lbu $3,0($0)
xor $6,$6,$3
nor $5,$5,$3
slti $0,$5,18310
srl $6,$3,7
lb $3,12($0)
subu $3,$1,$3
sw $3,12($0)
sra $5,$3,4
addiu $4,$3,6784
sh $1,4($0)
sll $4,$5,25
sh $4,8($0)
sb $1,0($0)
lb $4,1($0)
addiu $3,$3,-16178
slti $3,$1,-6931
ori $3,$0,3495
xori $3,$3,40037
xor $3,$4,$3
subu $4,$4,$3
lb $3,7($0)
and $5,$3,$3
sllv $4,$5,$3
xori $3,$6,63945
lw $3,8($0)
srav $1,$3,$3
addu $4,$1,$3
lh $6,0($0)
addiu $3,$5,15204
sllv $3,$3,$3
sra $1,$1,25
srlv $5,$1,$3
subu $4,$3,$3
slti $1,$3,10821
sll $4,$5,24
addiu $3,$1,28508
sb $5,5($0)
lbu $1,8($0)
sll $4,$4,28
sll $3,$3,0
xori $5,$4,23126
lhu $4,0($0)
sll $1,$1,10
and $3,$2,$3
addiu $5,$5,-18655
subu $5,$0,$3
nor $4,$6,$3
sllv $3,$3,$3
subu $3,$4,$3
lw $3,4($0)
ori $6,$0,46925
slt $1,$3,$3
sra $4,$5,21
slti $4,$3,-27649
nor $6,$5,$3
srav $1,$4,$3
ori $4,$3,40376
sll $4,$4,0
addiu $5,$2,-17360
xori $3,$3,52362
lh $3,2($0)
and $5,$3,$3
sra $3,$3,26
sltiu $0,$0,6478
xor $4,$3,$3
sra $4,$5,4
lb $3,11($0)
slt $1,$1,$3
sllv $1,$0,$3
slt $3,$1,$3
subu $4,$3,$3
sh $0,12($0)
lh $4,4($0)
subu $4,$0,$3
lhu $3,8($0)
addu $4,$5,$3
xori $5,$5,19159
sb $6,10($0)
sra $0,$6,24
addu $3,$3,$3
srav $6,$0,$3
srlv $3,$4,$3
addiu $3,$1,-12915
slt $0,$0,$3
sra $4,$4,8
nor $3,$3,$3
xori $1,$5,50624
lh $4,10($0)
sllv $3,$4,$3
lbu $4,0($0)
srl $4,$4,30
slti $4,$0,-22931
xori $4,$4,27372
xor $3,$3,$3
xor $3,$3,$3
sb $3,4($0)
nor $4,$3,$3
slt $3,$3,$3
srlv $1,$3,$3
and $4,$4,$3
sll $3,$5,29
sll $3,$2,19
lbu $4,7($0)
nor $4,$3,$3
sb $1,16($0)
or $6,$6,$3
lb $1,16($0)
sllv $4,$1,$3
srl $5,$3,16
and $0,$5,$3
srl $4,$5,23
sltu $5,$4,$3
lbu $3,7($0)
sw $0,16($0)
sw $3,8($0)
sll $0,$0,9
slt $6,$3,$3
sh $0,0($0)
subu $3,$4,$3
slt $3,$3,$3
subu $1,$3,$3
lb $4,2($0)
xor $4,$3,$3
lh $1,10($0)
andi $0,$3,1369
srav $4,$4,$3
lhu $3,0($0)
srlv $1,$1,$3
sb $3,0($0)
lb $3,4($0)
sltu $3,$6,$3
sh $3,6($0)
sh $1,16($0)
slti $0,$3,12725
nor $5,$5,$3
xor $3,$3,$3
sw $4,0($0)
addiu $4,$6,1943
addu $0,$0,$3
lb $4,8($0)
srav $4,$5,$3
sra $6,$0,29
subu $1,$1,$3
slt $1,$1,$3
lbu $5,11($0)
addiu $1,$4,-18910
srlv $5,$4,$3
sltiu $0,$2,-31944
srlv $3,$1,$3
slti $0,$2,20842
or $3,$4,$3
ori $3,$5,35805
nor $6,$3,$3
sb $5,11($0)
lh $3,14($0)
lh $6,10($0)
andi $3,$5,19041
addu $3,$3,$3
lhu $4,2($0)
nor $3,$3,$3
addiu $3,$6,11860
sltiu $1,$3,-9881
subu $3,$3,$3
lbu $3,14($0)
nor $3,$5,$3
addiu $3,$4,-14651
slt $1,$5,$3
lbu $3,10($0)
lhu $3,4($0)
sltu $5,$3,$3
addu $3,$4,$3
addu $3,$3,$3
subu $3,$3,$3
addu $4,$1,$3
subu $0,$0,$3
sllv $3,$4,$3
slti $3,$0,17340
lw $1,4($0)
srl $1,$0,19
sb $1,7($0)
slti $6,$6,-19419
lb $1,2($0)
srlv $3,$3,$3
sb $4,12($0)
lhu $3,6($0)
sll $1,$1,31
subu $3,$4,$3
addu $3,$3,$3
addu $3,$3,$3
addu $3,$4,$3
sh $1,14($0)
srav $4,$1,$3
sll $4,$4,29
addiu $3,$3,-2401
ori $4,$4,35670
lw $5,0($0)
sltu $4,$6,$3
sw $0,16($0)
ori $1,$6,44312
addu $3,$6,$3
srl $3,$4,26
lw $4,12($0)
slt $1,$0,$3
lb $5,9($0)
sll $3,$3,0
addu $3,$3,$3
sh $4,8($0)
xor $5,$3,$3
sllv $3,$5,$3
sltu $4,$3,$3
sltiu $3,$4,24223
sra $3,$0,31
lh $1,0($0)
xor $5,$3,$3
addiu $4,$3,-1458
addiu $1,$1,-25799
sltu $1,$3,$3
lhu $3,8($0)
addiu $6,$4,460
srl $3,$3,3
lhu $0,2($0)
nor $1,$6,$3
srav $5,$5,$3
sh $4,6($0)
lhu $3,4($0)
sltiu $3,$3,15259
sltiu $4,$5,9321
srav $3,$3,$3
nor $0,$3,$3
lbu $6,6($0)
and $5,$5,$3
srl $5,$5,6
subu $4,$4,$3
nor $3,$6,$3
ori $6,$6,42572
lw $0,16($0)
addu $3,$3,$3
lh $4,8($0)
sltu $1,$1,$3
srav $3,$5,$3
addiu $3,$1,31277
sw $3,4($0)
addiu $3,$5,5203
lb $1,11($0)
sh $3,16($0)
sra $1,$1,29
or $1,$3,$3
lhu $1,16($0)
addu $4,$3,$3
lb $3,3($0)
lhu $3,12($0)
xor $4,$0,$3
lbu $3,1($0)
slti $4,$3,-16856
lbu $4,13($0)
sb $0,11($0)
addiu $1,$6,15865
srlv $5,$5,$3
ori $5,$6,8128
srav $6,$6,$3
sllv $0,$0,$3
ori $6,$4,35788
and $5,$4,$3
srav $5,$5,$3
ori $6,$2,36488
sltiu $3,$3,11026
sh $5,10($0)
lb $1,2($0)
sw $4,16($0)
lh $1,12($0)
lhu $1,6($0)
srav $4,$4,$3
slt $1,$5,$3
sll $4,$0,26
ori $3,$5,14502
sltu $0,$1,$3
sra $3,$4,21
srav $4,$3,$3
lhu $4,8($0)
sll $3,$4,12
lh $4,16($0)
addiu $3,$6,-22829
lbu $4,8($0)
addiu $6,$6,-30677
slti $1,$3,-20547
andi $1,$2,43524
subu $5,$1,$3
srlv $3,$3,$3
slti $4,$3,3392
lw $3,12($0)
lbu $3,14($0)
or $4,$1,$3
addu $4,$0,$3
slti $1,$4,-27701
xori $3,$3,53395
sb $1,3($0)
lb $6,12($0)
sll $1,$1,14
addiu $4,$3,19138
lb $3,13($0)
addiu $6,$3,9200
sltiu $3,$4,14502
addu $0,$6,$3
slt $4,$0,$3
xori $4,$3,60807
nor $4,$4,$3
addiu $4,$1,-23364
lw $3,16($0)
xori $4,$4,11677
andi $3,$5,40842
lhu $3,10($0)
sll $4,$3,18
lw $1,12($0)
sra $1,$1,26
sltiu $3,$4,-1574
and $3,$1,$3
sb $4,9($0)
sllv $1,$4,$3
sra $5,$3,4
sltu $5,$5,$3
sltiu $5,$4,19262
addiu $5,$5,-26694
addu $5,$3,$3
lw $5,12($0)
sw $3,12($0)
|
libsrc/_DEVELOPMENT/font/fzx/fonts/ao/GenevaMono/_ff_ao_GenevaMonoBold.asm | jpoikela/z88dk | 640 | 241107 |
SECTION rodata_font
SECTION rodata_font_fzx
PUBLIC _ff_ao_GenevaMonoBold
_ff_ao_GenevaMonoBold:
BINARY "font/fzx/fonts/ao/GenevaMono/GenevaMonoBold.fzx"
|
test/asset/agda-stdlib-1.0/Algebra/Properties/BooleanAlgebra/Expression.agda | omega12345/agda-mode | 0 | 9875 | ------------------------------------------------------------------------
-- The Agda standard library
--
-- Boolean algebra expressions
------------------------------------------------------------------------
{-# OPTIONS --without-K --safe #-}
open import Algebra
module Algebra.Properties.BooleanAlgebra.Expression
{b} (B : BooleanAlgebra b b)
where
open BooleanAlgebra B
open import Category.Applicative
import Category.Applicative.Indexed as Applicative
open import Category.Monad
open import Data.Fin using (Fin)
open import Data.Nat
open import Data.Product using (_,_; proj₁; proj₂)
open import Data.Vec as Vec using (Vec)
import Data.Vec.Categorical as VecCat
import Function.Identity.Categorical as IdCat
open import Data.Vec.Properties using (lookup-map)
open import Data.Vec.Relation.Binary.Pointwise.Extensional as PW
using (Pointwise; ext)
open import Function
open import Relation.Binary.PropositionalEquality as P using (_≗_)
import Relation.Binary.Reflection as Reflection
-- Expressions made up of variables and the operations of a boolean
-- algebra.
infixr 7 _and_
infixr 6 _or_
data Expr n : Set b where
var : (x : Fin n) → Expr n
_or_ _and_ : (e₁ e₂ : Expr n) → Expr n
not : (e : Expr n) → Expr n
top bot : Expr n
-- The semantics of an expression, parametrised by an applicative
-- functor.
module Semantics
{F : Set b → Set b}
(A : RawApplicative F)
where
open RawApplicative A
⟦_⟧ : ∀ {n} → Expr n → Vec (F Carrier) n → F Carrier
⟦ var x ⟧ ρ = Vec.lookup ρ x
⟦ e₁ or e₂ ⟧ ρ = pure _∨_ ⊛ ⟦ e₁ ⟧ ρ ⊛ ⟦ e₂ ⟧ ρ
⟦ e₁ and e₂ ⟧ ρ = pure _∧_ ⊛ ⟦ e₁ ⟧ ρ ⊛ ⟦ e₂ ⟧ ρ
⟦ not e ⟧ ρ = pure ¬_ ⊛ ⟦ e ⟧ ρ
⟦ top ⟧ ρ = pure ⊤
⟦ bot ⟧ ρ = pure ⊥
-- flip Semantics.⟦_⟧ e is natural.
module Naturality
{F₁ F₂ : Set b → Set b}
{A₁ : RawApplicative F₁}
{A₂ : RawApplicative F₂}
(f : Applicative.Morphism A₁ A₂)
where
open P.≡-Reasoning
open Applicative.Morphism f
open Semantics A₁ renaming (⟦_⟧ to ⟦_⟧₁)
open Semantics A₂ renaming (⟦_⟧ to ⟦_⟧₂)
open RawApplicative A₁ renaming (pure to pure₁; _⊛_ to _⊛₁_)
open RawApplicative A₂ renaming (pure to pure₂; _⊛_ to _⊛₂_)
natural : ∀ {n} (e : Expr n) → op ∘ ⟦ e ⟧₁ ≗ ⟦ e ⟧₂ ∘ Vec.map op
natural (var x) ρ = begin
op (Vec.lookup ρ x) ≡⟨ P.sym $ lookup-map x op ρ ⟩
Vec.lookup (Vec.map op ρ) x ∎
natural (e₁ or e₂) ρ = begin
op (pure₁ _∨_ ⊛₁ ⟦ e₁ ⟧₁ ρ ⊛₁ ⟦ e₂ ⟧₁ ρ) ≡⟨ op-⊛ _ _ ⟩
op (pure₁ _∨_ ⊛₁ ⟦ e₁ ⟧₁ ρ) ⊛₂ op (⟦ e₂ ⟧₁ ρ) ≡⟨ P.cong₂ _⊛₂_ (op-⊛ _ _) P.refl ⟩
op (pure₁ _∨_) ⊛₂ op (⟦ e₁ ⟧₁ ρ) ⊛₂ op (⟦ e₂ ⟧₁ ρ) ≡⟨ P.cong₂ _⊛₂_ (P.cong₂ _⊛₂_ (op-pure _) (natural e₁ ρ))
(natural e₂ ρ) ⟩
pure₂ _∨_ ⊛₂ ⟦ e₁ ⟧₂ (Vec.map op ρ) ⊛₂ ⟦ e₂ ⟧₂ (Vec.map op ρ) ∎
natural (e₁ and e₂) ρ = begin
op (pure₁ _∧_ ⊛₁ ⟦ e₁ ⟧₁ ρ ⊛₁ ⟦ e₂ ⟧₁ ρ) ≡⟨ op-⊛ _ _ ⟩
op (pure₁ _∧_ ⊛₁ ⟦ e₁ ⟧₁ ρ) ⊛₂ op (⟦ e₂ ⟧₁ ρ) ≡⟨ P.cong₂ _⊛₂_ (op-⊛ _ _) P.refl ⟩
op (pure₁ _∧_) ⊛₂ op (⟦ e₁ ⟧₁ ρ) ⊛₂ op (⟦ e₂ ⟧₁ ρ) ≡⟨ P.cong₂ _⊛₂_ (P.cong₂ _⊛₂_ (op-pure _) (natural e₁ ρ))
(natural e₂ ρ) ⟩
pure₂ _∧_ ⊛₂ ⟦ e₁ ⟧₂ (Vec.map op ρ) ⊛₂ ⟦ e₂ ⟧₂ (Vec.map op ρ) ∎
natural (not e) ρ = begin
op (pure₁ ¬_ ⊛₁ ⟦ e ⟧₁ ρ) ≡⟨ op-⊛ _ _ ⟩
op (pure₁ ¬_) ⊛₂ op (⟦ e ⟧₁ ρ) ≡⟨ P.cong₂ _⊛₂_ (op-pure _) (natural e ρ) ⟩
pure₂ ¬_ ⊛₂ ⟦ e ⟧₂ (Vec.map op ρ) ∎
natural top ρ = begin
op (pure₁ ⊤) ≡⟨ op-pure _ ⟩
pure₂ ⊤ ∎
natural bot ρ = begin
op (pure₁ ⊥) ≡⟨ op-pure _ ⟩
pure₂ ⊥ ∎
-- An example of how naturality can be used: Any boolean algebra can
-- be lifted, in a pointwise manner, to vectors of carrier elements.
lift : ℕ → BooleanAlgebra b b
lift n = record
{ Carrier = Vec Carrier n
; _≈_ = Pointwise _≈_
; _∨_ = zipWith _∨_
; _∧_ = zipWith _∧_
; ¬_ = map ¬_
; ⊤ = pure ⊤
; ⊥ = pure ⊥
; isBooleanAlgebra = record
{ isDistributiveLattice = record
{ isLattice = record
{ isEquivalence = PW.isEquivalence isEquivalence
; ∨-comm = λ _ _ → ext λ i →
solve i 2 (λ x y → x or y , y or x)
(∨-comm _ _) _ _
; ∨-assoc = λ _ _ _ → ext λ i →
solve i 3
(λ x y z → (x or y) or z , x or (y or z))
(∨-assoc _ _ _) _ _ _
; ∨-cong = λ xs≈us ys≈vs → ext λ i →
solve₁ i 4 (λ x y u v → x or y , u or v)
_ _ _ _
(∨-cong (Pointwise.app xs≈us i)
(Pointwise.app ys≈vs i))
; ∧-comm = λ _ _ → ext λ i →
solve i 2 (λ x y → x and y , y and x)
(∧-comm _ _) _ _
; ∧-assoc = λ _ _ _ → ext λ i →
solve i 3
(λ x y z → (x and y) and z ,
x and (y and z))
(∧-assoc _ _ _) _ _ _
; ∧-cong = λ xs≈ys us≈vs → ext λ i →
solve₁ i 4 (λ x y u v → x and y , u and v)
_ _ _ _
(∧-cong (Pointwise.app xs≈ys i)
(Pointwise.app us≈vs i))
; absorptive =
(λ _ _ → ext λ i →
solve i 2 (λ x y → x or (x and y) , x) (∨-absorbs-∧ _ _) _ _) ,
(λ _ _ → ext λ i →
solve i 2 (λ x y → x and (x or y) , x) (∧-absorbs-∨ _ _) _ _)
}
; ∨-∧-distribʳ = λ _ _ _ → ext λ i →
solve i 3
(λ x y z → (y and z) or x ,
(y or x) and (z or x))
(∨-∧-distribʳ _ _ _) _ _ _
}
; ∨-complementʳ = λ _ → ext λ i →
solve i 1 (λ x → x or (not x) , top)
(∨-complementʳ _) _
; ∧-complementʳ = λ _ → ext λ i →
solve i 1 (λ x → x and (not x) , bot)
(∧-complementʳ _) _
; ¬-cong = λ xs≈ys → ext λ i →
solve₁ i 2 (λ x y → not x , not y) _ _
(¬-cong (Pointwise.app xs≈ys i))
}
}
where
open RawApplicative VecCat.applicative
using (pure; zipWith) renaming (_<$>_ to map)
⟦_⟧Id : ∀ {n} → Expr n → Vec Carrier n → Carrier
⟦_⟧Id = Semantics.⟦_⟧ IdCat.applicative
⟦_⟧Vec : ∀ {m n} → Expr n → Vec (Vec Carrier m) n → Vec Carrier m
⟦_⟧Vec = Semantics.⟦_⟧ VecCat.applicative
open module R {n} (i : Fin n) =
Reflection setoid var
(λ e ρ → Vec.lookup (⟦ e ⟧Vec ρ) i)
(λ e ρ → ⟦ e ⟧Id (Vec.map (flip Vec.lookup i) ρ))
(λ e ρ → sym $ reflexive $
Naturality.natural (VecCat.lookup-morphism i) e ρ)
|
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_969.asm | ljhsiun2/medusa | 9 | 17147 | <filename>Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xca_notsx.log_21829_969.asm
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r13
push %r9
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0x14cd6, %rsi
lea addresses_UC_ht+0x138a6, %rdi
nop
nop
nop
nop
sub %r11, %r11
mov $25, %rcx
rep movsq
nop
nop
xor $21432, %r9
lea addresses_normal_ht+0x7146, %rbx
nop
add $51088, %r13
mov (%rbx), %r11d
nop
nop
nop
nop
dec %rbx
lea addresses_WC_ht+0x31de, %rcx
nop
nop
nop
and $49896, %r13
mov (%rcx), %ebx
nop
nop
nop
nop
add %rcx, %rcx
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r9
pop %r13
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r12
push %r13
push %r14
push %rbp
push %rbx
push %rdx
// Store
lea addresses_UC+0x677a, %r12
nop
nop
nop
nop
and %rbx, %rbx
mov $0x5152535455565758, %rbp
movq %rbp, %xmm5
movups %xmm5, (%r12)
nop
nop
xor $34243, %rdx
// Faulty Load
lea addresses_PSE+0x10ba6, %rdx
clflush (%rdx)
nop
nop
nop
nop
nop
inc %r11
mov (%rdx), %r14
lea oracles, %r13
and $0xff, %r14
shlq $12, %r14
mov (%r13,%r14,1), %r14
pop %rdx
pop %rbx
pop %rbp
pop %r14
pop %r13
pop %r12
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_PSE', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'same': False, 'type': 'addresses_UC', 'NT': False, 'AVXalign': False, 'size': 16, 'congruent': 1}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'same': True, 'type': 'addresses_PSE', 'NT': False, 'AVXalign': False, 'size': 8, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'same': False, 'congruent': 4, 'type': 'addresses_UC_ht'}, 'dst': {'same': False, 'congruent': 4, 'type': 'addresses_UC_ht'}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_normal_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 5}}
{'OP': 'LOAD', 'src': {'same': False, 'type': 'addresses_WC_ht', 'NT': False, 'AVXalign': False, 'size': 4, 'congruent': 3}}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
|
source/numerics/i386/nosimd/a-nusfge.adb | ytomino/drake | 33 | 24905 | package body Ada.Numerics.SFMT.Generating is
-- no SIMD version
use type Unsigned_32;
use type Unsigned_64;
procedure rshift128 (
Out_Item : out w128_t;
In_Item : w128_t;
shift : Integer)
with Convention => Intrinsic;
procedure lshift128 (
Out_Item : out w128_t;
In_Item : w128_t;
shift : Integer)
with Convention => Intrinsic;
pragma Inline_Always (rshift128);
pragma Inline_Always (lshift128);
procedure do_recursion (r : out w128_t; a, b, c, d : w128_t)
with Convention => Intrinsic;
pragma Inline_Always (do_recursion);
-- This function simulates SIMD 128-bit right shift by the standard C.
-- The 128-bit integer given in in is shifted by (shift * 8) bits.
-- This function simulates the LITTLE ENDIAN SIMD.
procedure rshift128 (
Out_Item : out w128_t;
In_Item : w128_t;
shift : Integer)
is
th, tl, oh, ol : Unsigned_64;
begin
th := Interfaces.Shift_Left (Unsigned_64 (In_Item (3)), 32)
or Unsigned_64 (In_Item (2));
tl := Interfaces.Shift_Left (Unsigned_64 (In_Item (1)), 32)
or Unsigned_64 (In_Item (0));
oh := Interfaces.Shift_Right (th, shift * 8);
ol := Interfaces.Shift_Right (tl, shift * 8);
ol := ol or Interfaces.Shift_Left (th, 64 - shift * 8);
Out_Item (1) := Unsigned_32'Mod (Interfaces.Shift_Right (ol, 32));
Out_Item (0) := Unsigned_32'Mod (ol);
Out_Item (3) := Unsigned_32'Mod (Interfaces.Shift_Right (oh, 32));
Out_Item (2) := Unsigned_32'Mod (oh);
end rshift128;
-- This function simulates SIMD 128-bit left shift by the standard C.
-- The 128-bit integer given in in is shifted by (shift * 8) bits.
-- This function simulates the LITTLE ENDIAN SIMD.
procedure lshift128 (
Out_Item : out w128_t;
In_Item : w128_t;
shift : Integer)
is
th, tl, oh, ol : Unsigned_64;
begin
th := Interfaces.Shift_Left (Unsigned_64 (In_Item (3)), 32)
or Unsigned_64 (In_Item (2));
tl := Interfaces.Shift_Left (Unsigned_64 (In_Item (1)), 32)
or Unsigned_64 (In_Item (0));
oh := Interfaces.Shift_Left (th, shift * 8);
ol := Interfaces.Shift_Left (tl, shift * 8);
oh := oh or Interfaces.Shift_Right (tl, 64 - shift * 8);
Out_Item (1) := Unsigned_32'Mod (Interfaces.Shift_Right (ol, 32));
Out_Item (0) := Unsigned_32'Mod (ol);
Out_Item (3) := Unsigned_32'Mod (Interfaces.Shift_Right (oh, 32));
Out_Item (2) := Unsigned_32'Mod (oh);
end lshift128;
-- This function represents the recursion formula.
procedure do_recursion (r : out w128_t; a, b, c, d : w128_t) is
x : w128_t;
y : w128_t;
begin
lshift128 (x, a, SL2);
rshift128 (y, c, SR2);
r (0) := a (0) xor x (0)
xor (Interfaces.Shift_Right (b (0), SR1) and MSK1) xor y (0)
xor Interfaces.Shift_Left (d (0), SL1);
r (1) := a (1) xor x (1)
xor (Interfaces.Shift_Right (b (1), SR1) and MSK2) xor y (1)
xor Interfaces.Shift_Left (d (1), SL1);
r (2) := a (2) xor x (2)
xor (Interfaces.Shift_Right (b (2), SR1) and MSK3) xor y (2)
xor Interfaces.Shift_Left (d (2), SL1);
r (3) := a (3) xor x (3)
xor (Interfaces.Shift_Right (b (3), SR1) and MSK4) xor y (3)
xor Interfaces.Shift_Left (d (3), SL1);
end do_recursion;
-- implementation
-- This function fills the internal state array with pseudorandom
-- integers.
procedure gen_rand_all (
sfmt : in out w128_t_Array_N)
is
i : Integer;
r1, r2 : access w128_t;
begin
r1 := sfmt (N - 2)'Access;
r2 := sfmt (N - 1)'Access;
i := 0;
while i < N - POS1 loop
do_recursion (
sfmt (i),
sfmt (i),
sfmt (i + POS1),
r1.all,
r2.all);
r1 := r2;
r2 := sfmt (i)'Access;
i := i + 1;
end loop;
while i < N loop
do_recursion (
sfmt (i),
sfmt (i),
sfmt (i - (N - POS1)),
r1.all,
r2.all);
r1 := r2;
r2 := sfmt (i)'Access;
i := i + 1;
end loop;
end gen_rand_all;
-- This function fills the user-specified array with pseudorandom
-- integers.
procedure gen_rand_array (
sfmt : in out w128_t_Array_N;
Item : in out w128_t_Array_1;
size : Integer)
is
the_array : w128_t_Array (0 .. size - 1);
for the_array'Address use Item'Address;
i, j : Integer;
r1, r2 : access w128_t;
begin
r1 := sfmt (N - 2)'Access;
r2 := sfmt (N - 1)'Access;
i := 0;
while i < N - POS1 loop
do_recursion (
the_array (i),
sfmt (i),
sfmt (i + POS1),
r1.all,
r2.all);
r1 := r2;
r2 := the_array (i)'Access;
i := i + 1;
end loop;
while i < N loop
do_recursion (
the_array (i),
sfmt (i),
the_array (i - (N - POS1)),
r1.all,
r2.all);
r1 := r2;
r2 := the_array (i)'Access;
i := i + 1;
end loop;
while i < size - N loop
do_recursion (
the_array (i),
the_array (i - N),
the_array (i - (N - POS1)),
r1.all,
r2.all);
r1 := r2;
r2 := the_array (i)'Access;
i := i + 1;
end loop;
j := 0;
while j < N - (size - N) loop
sfmt (j) := the_array (j + (size - N));
j := j + 1;
end loop;
while i < size loop
do_recursion (
the_array (i),
the_array (i - N),
the_array (i - (N - POS1)),
r1.all,
r2.all);
r1 := r2;
r2 := the_array (i)'Access;
sfmt (j) := the_array (i);
i := i + 1;
j := j + 1;
end loop;
end gen_rand_array;
end Ada.Numerics.SFMT.Generating;
|
Working Disassembly/Levels/DEZ/Misc Object Data/Map - Hang Carrier.asm | TeamASM-Blur/Sonic-3-Blue-Balls-Edition | 5 | 94561 | dc.w word_47180-Map_DEZHangCarrier
word_47180: dc.w 4 ; DATA XREF: ROM:0004717Eo
dc.b $EC, $B, 0, 0, $FF, $E8
dc.b $EC, $B, 8, 0, 0, 0
dc.b $C, 4, 0, $C, $FF, $F0
dc.b $C, 4, 8, $C, 0, 0
|
oeis/109/A109916.asm | neoneye/loda-programs | 22 | 14880 | <filename>oeis/109/A109916.asm
; A109916: a(n) = n-th digit after decimal point in e^n.
; 7,8,5,1,5,3,4,4,5,7,1,0,3,4,1,0,3,3,7,4,5,4,7,2,9,9,9,0,4,5,0,1,4,1,2,7,3,5,1,6,5,1,9,9,4,5,2,2,0,8,3,0,9,9,8,7,4,7,3,2,3,0,7,1,9,1,4,2,4,7,5,2,4,6,0,7,7,2,3,3,8,1,5,2,3,5,6,2,1,9,2,2,1,5,8,4,2,6,0,6
add $0,1
mov $2,1
mov $3,$0
mul $3,7
lpb $3
mul $1,$0
mul $2,$3
add $1,$2
div $1,$0
div $2,$0
sub $3,1
lpe
mov $4,10
pow $4,$0
div $2,$4
div $1,$2
mov $0,$1
mod $0,10
|
src/generator/specs.ads | Roldak/OpenGLAda | 79 | 21061 | <gh_stars>10-100
-- part of OpenGLAda, (c) 2017 <NAME>
-- released under the terms of the MIT license, see the file "COPYING"
private with Ada.Containers.Vectors;
private with Ada.Containers.Indefinite_Vectors;
private with Ada.Strings.Unbounded;
package Specs is
-- This package implements parsing and applying .spec files.
-- These are used to easily generate parts of the low-level OpenGL
-- binding code. This package is not part of the OpenGLAda API nor
-- implementation - it is only used for generating part of its
-- source code.
type Processor is limited private;
type Spec is private;
No_Spec : constant Spec;
Parsing_Error : exception;
procedure Parse_File (Proc : in out Processor; Path : String);
function First (Proc : Processor) return Spec;
function Next (Proc : Processor; Cur : Spec) return Spec;
procedure Write_API (Proc : Processor; Cur : Spec;
Dir_Path : String);
procedure Write_Init (Proc : Processor; Dir_Path : String);
procedure Write_Wrapper_Table (Proc : Processor;
Dir_Path, Interface_Folder : String);
private
use Ada.Strings.Unbounded;
type Param_Mode is
(Mode_In, Mode_Out, Mode_In_Out, Mode_Access, Mode_Access_Constant);
package String_Lists is new Ada.Containers.Indefinite_Vectors
(Positive, String);
type Parameter is record
Mode : Param_Mode;
Names : String_Lists.Vector;
Type_Name : Unbounded_String;
end record;
package Param_Lists is new Ada.Containers.Vectors
(Positive, Parameter);
type Signature is record
Params : Param_Lists.Vector;
Return_Type : Unbounded_String;
end record;
package Sig_Lists is new Ada.Containers.Vectors (Positive, Signature);
type Body_Item_Kind is (Copy, Static, Dynamic);
type Body_Item (Kind : Body_Item_Kind) is record
case Kind is
when Copy => To_Copy : Unbounded_String;
when Static =>
S_Name, S_GL_Name : Unbounded_String;
Sigs : Sig_Lists.Vector;
when Dynamic =>
D_Name, D_GL_Name : Unbounded_String;
Sig_Id : Positive;
end case;
end record;
package Item_Lists is
new Ada.Containers.Indefinite_Vectors (Positive, Body_Item);
package Wrapper_Lists is new Ada.Containers.Indefinite_Vectors
(Positive, String_Lists.Vector, String_Lists."=");
type Spec_Data is record
Name, File_Base_Name : Unbounded_String;
Withs : String_Lists.Vector;
Uses : String_Lists.Vector;
Items : Item_Lists.Vector;
Wrappers : Wrapper_Lists.Vector;
end record;
type Spec is new Natural;
subtype Valid_Spec is Spec range 1 .. Spec'Last;
No_Spec : constant Spec := 0;
package Spec_Lists is new Ada.Containers.Vectors (Valid_Spec, Spec_Data);
type Processor is record
Dynamic_Subprogram_Types : Sig_Lists.Vector;
List : Spec_Lists.Vector;
end record;
end Specs; |
oeis/053/A053088.asm | neoneye/loda-programs | 11 | 89012 | <reponame>neoneye/loda-programs
; A053088: a(n) = 3*a(n-2) + 2*a(n-3) for n > 2, a(0)=1, a(1)=0, a(2)=3.
; Submitted by <NAME>
; 1,0,3,2,9,12,31,54,117,224,459,906,1825,3636,7287,14558,29133,58248,116515,233010,466041,932060,1864143,3728262,7456549,14913072,29826171,59652314,119304657,238609284,477218599,954437166,1908874365,3817748696,7635497427,15270994818,30541989673,61083979308,122167958655,244335917270,488671834581,977343669120,1954687338283,3909374676522,7818749353089,15637498706132,31274997412311,62549994824574,125099989649197,250199979298344,500399958596739,1000799917193426,2001599834386905,4003199668773756
add $0,2
mov $1,-2
pow $1,$0
sub $1,1
div $1,3
add $1,$0
gcd $2,$1
mov $0,$2
div $0,3
|
oeis/016/A016758.asm | neoneye/loda-programs | 11 | 88915 | ; A016758: a(n) = (2*n+1)^6.
; 1,729,15625,117649,531441,1771561,4826809,11390625,24137569,47045881,85766121,148035889,244140625,387420489,594823321,887503681,1291467969,1838265625,2565726409,3518743761,4750104241,6321363049,8303765625,10779215329,13841287201,17596287801,22164361129,27680640625,34296447249,42180533641,51520374361,62523502209,75418890625,90458382169,107918163081,128100283921,151334226289,177978515625,208422380089,243087455521,282429536481,326940373369,377149515625,433626201009,496981290961,567869252041
mul $0,2
add $0,1
pow $0,6
|
programs/oeis/047/A047292.asm | karttu/loda | 1 | 94633 | <gh_stars>1-10
; A047292: Numbers that are congruent to {2, 4, 6} mod 7.
; 2,4,6,9,11,13,16,18,20,23,25,27,30,32,34,37,39,41,44,46,48,51,53,55,58,60,62,65,67,69,72,74,76,79,81,83,86,88,90,93,95,97,100,102,104,107,109,111,114,116,118,121,123,125,128,130,132,135,137,139,142,144,146,149,151,153,156,158,160,163,165,167,170,172,174,177,179,181,184,186,188,191,193,195,198,200,202,205,207,209,212,214,216,219,221,223,226,228,230,233,235,237,240,242,244,247,249,251,254,256,258,261,263,265,268,270,272,275,277,279,282,284,286,289,291,293,296,298,300,303,305,307,310,312,314,317,319,321,324,326,328,331,333,335,338,340,342,345,347,349,352,354,356,359,361,363,366,368,370,373,375,377,380,382,384,387,389,391,394,396,398,401,403,405,408,410,412,415,417,419,422,424,426,429,431,433,436,438,440,443,445,447,450,452,454,457,459,461,464,466,468,471,473,475,478,480,482,485,487,489,492,494,496,499,501,503,506,508,510,513,515,517,520,522,524,527,529,531,534,536,538,541,543,545,548,550,552,555,557,559,562,564,566,569,571,573,576,578,580,583
mul $0,7
mov $1,$0
div $1,3
add $1,2
|
Task/System-time/Ada/system-time.ada | LaudateCorpus1/RosettaCodeData | 1 | 27644 | with Ada.Calendar; use Ada.Calendar;
with Ada.Calendar.Formatting; use Ada.Calendar.Formatting;
with Ada.Calendar.Time_Zones; use Ada.Calendar.Time_Zones;
with Ada.Text_Io; use Ada.Text_Io;
procedure System_Time is
Now : Time := Clock;
begin
Put_line(Image(Date => Now, Time_Zone => -7*60));
end System_Time;
|
oeis/178/A178294.asm | neoneye/loda-programs | 11 | 2735 | ; A178294: Number of collinear point triples in a 4 X 4 X 4 X... n-dimensional cubic grid
; Submitted by <NAME>
; 0,4,44,376,2960,22624,171584,1303936,9969920,76793344
mov $1,1
mov $3,1
lpb $0
sub $0,1
add $2,$3
mul $2,2
mul $3,6
add $3,$1
mul $1,8
mul $2,2
lpe
mov $0,$2
|
USqlParser/Grammar/USqlParser.g4 | npenin/usql-parser | 1 | 3489 | parser grammar USqlParser;
options { tokenVocab=USqlLexer; }
prog
: createDatabaseStatement prog
| createManagedTableWithSchemaStatement prog
| alterTableStatement prog
| alterTableAddDropPartitionStatement prog
| dropTableStatement prog
| createSchemaStatement prog
| declareVariableStatement prog
| useDatabaseStatement prog
| insertStatement prog
| EOF
;
createDatabaseStatement
: CREATE DATABASE ( IF NOT EXISTS )? dbName SEMICOLON
;
dbName
: quotedOrUnquotedIdentifier
;
quotedOrUnquotedIdentifier
: QuotedIdentifier
| UnquotedIdentifier
;
multipartIdentifier
: quotedOrUnquotedIdentifier
| quotedOrUnquotedIdentifier DOT quotedOrUnquotedIdentifier
| quotedOrUnquotedIdentifier DOT quotedOrUnquotedIdentifier DOT quotedOrUnquotedIdentifier
;
useDatabaseStatement
: USE DATABASE dbName SEMICOLON
;
numericType
: NumericTypeNonNullable
| NumericTypeNonNullable QUESTIONMARK
;
simpleType
: numericType
| TextualType
| TemporalType
| OtherType
;
builtInType
: simpleType
;
createSchemaStatement
: CREATE SCHEMA ( IF NOT EXISTS )? quotedOrUnquotedIdentifier SEMICOLON
;
columnDefinition
: quotedOrUnquotedIdentifier builtInType
;
tableWithSchema
: ( LPAREN columnDefinition ( COMMA columnDefinition )*
( COMMA tableIndex partitionSpecification )?
( COMMA columnDefinition )* RPAREN )
| ( LPAREN ( columnDefinition COMMA )*
( tableIndex )
( COMMA columnDefinition )* RPAREN partitionSpecification )
;
tableName
: multipartIdentifier
;
createManagedTableWithSchemaStatement
: CREATE TABLE ( IF NOT EXISTS )? tableName tableWithSchema SEMICOLON
;
sortDirection
: ASC | DESC
;
sortItem
: quotedOrUnquotedIdentifier ( sortDirection )?
;
sortItemList
: sortItem ( COMMA sortItem )*
;
tableIndex
: INDEX quotedOrUnquotedIdentifier CLUSTERED LPAREN sortItemList RPAREN
;
identifierList
: quotedOrUnquotedIdentifier ( COMMA quotedOrUnquotedIdentifier )*
;
distributionScheme
: RANGE LPAREN sortItemList RPAREN
| HASH LPAREN identifierList RPAREN
| DIRECT HASH LPAREN quotedOrUnquotedIdentifier RPAREN
| ROUND ROBIN
;
distributionSpecification
: DISTRIBUTED ( BY )? distributionScheme ( INTO IntegerLiteral )?
;
partitionSpecification
: ( PARTITIONED ( BY )? LPAREN identifierList RPAREN )? distributionSpecification
;
columnDefinitionList
: LPAREN columnDefinition ( COMMA columnDefinition )* RPAREN
;
alterTableStatement
: ALTER TABLE multipartIdentifier
( REBUILD
| ADD COLUMN columnDefinitionList
| DROP COLUMN identifierList ) SEMICOLON
;
variable
: SystemVariable
| UserVariable
;
declareVariableStatement
: DECLARE variable builtInType EQUALS ~( SEMICOLON )* SEMICOLON
;
/*staticVariable
: builtInType DOT UnquotedIdentifier
;*/
/*
* TODO: Include StaticVariable and BinaryLiteral. Need to figure it out.
*/
staticExpression
: StringLiteral
| CharLiteral
| IntegerLiteral
| RealLiteral
| UserVariable
| memberAccess
;
staticExpressionList
: staticExpression ( COMMA staticExpression )*
;
staticExpressionRowConstructor
: LPAREN staticExpressionList RPAREN
;
partitionLabel
: PARTITION staticExpressionRowConstructor
;
partitionLabelList
: partitionLabel ( COMMA partitionLabel )*
;
alterTableAddDropPartitionStatement
: ALTER TABLE multipartIdentifier
( ADD ( IF NOT EXISTS )? | DROP ( IF NOT EXISTS )? ) partitionLabelList SEMICOLON
;
dropTableStatement
: DROP TABLE ( IF EXISTS )? multipartIdentifier SEMICOLON
;
integrityViolationAction
: IGNORE
| MOVE TO partitionLabel
;
integrityClause
: ON INTEGRITY VIOLATION integrityViolationAction
;
expressionList
: expression ( COMMA expression )*
;
rowConstructor
: LPAREN expressionList RPAREN
;
rowConstructorList
: rowConstructor ( COMMA rowConstructor )*
;
tableValueConstructorExpression
: VALUES rowConstructorList
;
insertSource
: tableValueConstructorExpression
;
insertStatement
: INSERT INTO multipartIdentifier ( LPAREN identifierList RPAREN )?
( partitionLabel | integrityClause )? insertSource SEMICOLON
;
literal
: StringLiteral
| IntegerLiteral
| RealLiteral
| BooleanLiteral
| CharLiteral
| NullLiteral
;
/*
* C# types
*/
csNamespaceName
: csNamespaceOrTypeName
;
csTypeName
: csNamespaceOrTypeName
;
csNamespaceOrTypeName
: UnquotedIdentifier ( csTypeArgumentList )?
| UnquotedIdentifier ( csTypeArgumentList )? '.' csNamespaceOrTypeName
;
csType
: csValueType
| csReferenceType
| csTypeParameter
;
csValueType
: csStructType
| csEnumType
;
csStructType
: csTypeName
| csSimpleType
;
csSimpleType
: simpleType
;
csEnumType
: csTypeName
;
csReferenceType
: csClassType
| csInterfaceType
| csDelegateType
;
csClassType
: csTypeName
;
csInterfaceType
: csTypeName
;
csDelegateType
: csTypeName
;
csTypeArgumentList
: LT csTypeArguments GT
;
csTypeArguments
: csTypeArgument ( COMMA csTypeArgument )*
;
csTypeArgument
: csType
;
csTypeParameter
: UnquotedIdentifier
;
/*
* Expressions
*/
expression
: unaryExpression
| memberAccess
;
primaryExpression
: primaryNoArrayCreationExpression
;
primaryNoArrayCreationExpression
: literal
| simpleName
| variable
| paranthesizedExpression
| objectCreationExpression
;
paranthesizedExpression
: LPAREN expression RPAREN
;
unaryExpression
: primaryExpression
| PLUS unaryExpression
| MINUS unaryExpression
| castExpression
;
castExpression
: LPAREN builtInType RPAREN unaryExpression
;
objectCreationExpression
: NEW csType ( LPAREN argumentList RPAREN )? ( objectOrCollectionInitializer )?
| NEW csType objectOrCollectionInitializer
;
// Will add collection initializer later
objectOrCollectionInitializer
: objectInitializer
;
objectInitializer
: LCURLY ( memberInitializerList )? RCURLY
| LCURLY memberInitializerList COMMA RCURLY
;
memberInitializerList
: memberInitializer ( COMMA memberInitializer )*
;
memberInitializer
: UnquotedIdentifier EQUALS initializerValue
;
initializerValue
: expression
| objectOrCollectionInitializer
;
argumentList
: argument ( COMMA argument )*
;
argument
: ( argumentName )? argumentValue
;
argumentName
: UnquotedIdentifier COLON
;
argumentValue
: expression
;
memberAccess
: primaryExpression DOT UnquotedIdentifier ( csTypeArgumentList )?
| builtInType DOT UnquotedIdentifier ( csTypeArgumentList )?
;
simpleName
: UnquotedIdentifier ( csTypeArgumentList )?
;
|
c2000/C2000Ware_1_00_06_00/libraries/control/DCL/c28/source/DCL_futils.asm | ramok/Themis_ForHPSDR | 0 | 87216 | ; DCL_futils.asm - fast update function utilities for FPU32
;
; Copyright (C) 2018 Texas Instruments Incorporated - http://www.ti.com/
; ALL RIGHTS RESERVED
; set symbols below to '1' to enable assembly
FU_PID .set 1
FU_PI .set 1
FU_PI2 .set 1
FU_DF11 .set 1
FU_DF13 .set 1
FU_DF22 .set 1
FU_DF23 .set 1
FU_GSM .set 1
.if __TI_EABI__
.asg DCL_fupdatePID, _DCL_fupdatePID
.asg DCL_fupdatePI, _DCL_fupdatePI
.asg DCL_fupdatePI2, _DCL_fupdatePI2
.asg DCL_fupdateDF11, _DCL_fupdateDF11
.asg DCL_fupdateDF13, _DCL_fupdateDF13
.asg DCL_fupdateDF22, _DCL_fupdateDF22
.asg DCL_fupdateDF23, _DCL_fupdateDF23
.asg DCL_fupdateGSM, _DCL_fupdateGSM
.endif
; .sect "dclfuncs"
.sect "ramfuncs"
;--- PID ---------------------------------------------------------------------
.if FU_PID = 1
.global _DCL_fupdatePID
.align 2
; C prototype: void DCL_fupdatePID(DCL_PID *p)
; argument 1 = *p : 32-bit DCL_PID structure address [XAR4]
; return = void [R0H]
_DCL_fupdatePID:
.asmfunc
PUSH ST0 ; save flags
PUSH XAR0 ; save XAR0
PUSH XAR7 ; save XAR7
PUSH ST1 ; preserve INTM
MOVL XAR7, @XAR4 ; XAR7 = &p
ADDB XAR7, #26 ; XAR7 = &CSS
MOVL XAR0, *XAR7 ; XAR0 = &tpt
MOVL ACC, *+XAR0[4] ; ACC = CSS.sts
AND ACC, #1 ; mask bit 0
BF PID_EXIT, EQ ; skip if zero
TCLR *+XAR0[4], #0 ; clear STS_UPDATE_PENDING flag
MOVL XAR0, XAR7 ; XAR0 = &CSS
SUBB XAR0, #2 ; XAR0 = &SPS
MOVL XAR7, *XAR0 ; XAR7 = &Kp
SETC INTM ; block interrupts
RPT #11 ; repeat 12 times
|| PREAD *XAR4++, *XAR7 ; SPS copy
ADDB XAR4, #8 ; XAR4 = &Umax
ADDB XAR7, #12 ; XAR7 = &SPS.Umax
MOVL ACC, *XAR7++ ; SPS.Umax -> ACC
MOVL *XAR4++, ACC ; update Umax
MOVL ACC, *XAR7 ; SPS.Umin -> ACC
MOVL *XAR4, ACC ; update Umin
PID_EXIT:
POP ST1 ; restore INTM
POP XAR7 ; restore XAR7
POP XAR0 ; restore XAR0
POP ST0 ; restore flags
LRETR
.endasmfunc
.endif ; FU_PID
;--- PI ----------------------------------------------------------------------
.if FU_PI = 1
.global _DCL_fupdatePI
.align 2
; C prototype: void DCL_fupdatePI(DCL_PI *p)
; argument 1 = *p : 32-bit DCL_PI structure address [XAR4]
; return = void [R0H]
_DCL_fupdatePI:
.asmfunc
PUSH ST0 ; save flags
PUSH XAR0 ; save XAR0
PUSH XAR7 ; save XAR7
PUSH ST1 ; preserve INTM
MOVL XAR7, @XAR4 ; XAR7 = &p
ADDB XAR7, #18 ; XAR7 = &CSS
MOVL XAR0, *XAR7 ; XAR0 = &tpt
MOVL ACC, *+XAR0[4] ; ACC = CSS.sts
AND ACC, #1 ; mask bit 0
BF PI_EXIT, EQ ; skip if zero
TCLR *+XAR0[4], #0 ; clear STS_UPDATE_PENDING flag
MOVL XAR0, XAR7 ; XAR0 = &CSS
SUBB XAR0, #2 ; XAR0 = &SPS
MOVL XAR7, *XAR0 ; XAR7 = &Kp
SETC INTM ; block interrupts
MOVL ACC, *XAR7++ ; SPS.Kp -> ACC
MOVL *XAR4++, ACC ; update KpUmax
MOVL ACC, *XAR7++ ; SPS.Ki -> ACC
MOVL *XAR4++, ACC ; update Ki
ADDB XAR4, #2 ; XAR4 = &Umax
MOVL ACC, *XAR7++ ; SPS.Umax -> ACC
MOVL *XAR4++, ACC ; update Umax
MOVL ACC, *XAR7++ ; SPS.Umin -> ACC
MOVL *XAR4++, ACC ; update Umin
ADDB XAR4, #2 ; XAR4 = &Imax
MOVL ACC, *XAR7++ ; SPS.Imax -> ACC
MOVL *XAR4++, ACC ; update Imax
MOVL ACC, *XAR7 ; SPS.Imin -> ACC
MOVL *XAR4, ACC ; update Imin
PI_EXIT:
POP ST1 ; restore INTM
POP XAR7 ; restore XAR7
POP XAR0 ; restore XAR0
POP ST0 ; restore flags
LRETR
.endasmfunc
.endif ; FU_PI
;--- PI2 ----------------------------------------------------------------------
.if FU_PI2 = 1
.global _DCL_fupdatePI2
.align 2
; C prototype: void DCL_fupdatePI2(DCL_PI2 *p)
; argument 1 = *p : 32-bit DCL_PI structure address [XAR4]
; return = void [R0H]
_DCL_fupdatePI2:
.asmfunc
PUSH ST0 ; save flags
PUSH XAR0 ; save XAR0
PUSH XAR7 ; save XAR7
PUSH ST1 ; preserve INTM
MOVL XAR7, @XAR4 ; XAR7 = &p
ADDB XAR7, #18 ; XAR7 = &CSS
MOVL XAR0, *XAR7 ; XAR0 = &tpt
MOVL ACC, *+XAR0[4] ; ACC = CSS.sts
AND ACC, #1 ; mask bit 0
BF PI2_EXIT, EQ ; skip if zero
TCLR *+XAR0[4], #0 ; clear STS_UPDATE_PENDING flag
MOVL XAR0, XAR7 ; XAR0 = &CSS
SUBB XAR0, #2 ; XAR0 = &SPS
MOVL XAR7, *XAR0 ; XAR7 = &Kp
SETC INTM ; block interrupts
MOVL ACC, *XAR7++ ; SPS.Kp -> ACC
MOVL *XAR4++, ACC ; update KpUmax
MOVL ACC, *XAR7++ ; SPS.Ki -> ACC
MOVL *XAR4++, ACC ; update Ki
ADDB XAR4, #8 ; XAR4 = &Umax
MOVL ACC, *XAR7++ ; SPS.Umax -> ACC
MOVL *XAR4++, ACC ; update Umax
MOVL ACC, *XAR7 ; SPS.Umin -> ACC
MOVL *XAR4, ACC ; update Umin
PI2_EXIT:
POP ST1 ; restore INTM
POP XAR7 ; restore XAR7
POP XAR0 ; restore XAR0
POP ST0 ; restore flags
LRETR
.endasmfunc
.endif ; FU_PI2
;--- DF11 ----------------------------------------------------------------------
.if FU_DF11 = 1
.global _DCL_fupdateDF11
.align 2
; C prototype: void DCL_fupdateDF11(DCL_DF11 *p)
; argument 1 = *p : 32-bit DCL_DF11 structure address [XAR4]
; return = void [R0H]
_DCL_fupdateDF11:
.asmfunc
PUSH ST0 ; save flags
PUSH XAR0 ; save XAR0
PUSH XAR7 ; save XAR7
PUSH ST1 ; preserve INTM
MOVL XAR7, @XAR4 ; XAR7 = &p
ADDB XAR7, #12 ; XAR7 = &CSS
MOVL XAR0, *XAR7 ; XAR0 = &tpt
MOVL ACC, *+XAR0[4] ; ACC = CSS.sts
AND ACC, #1 ; mask bit 0
BF DF11_EXIT, EQ ; skip if zero
TCLR *+XAR0[4], #0 ; clear STS_UPDATE_PENDING flag
MOVL XAR0, XAR7 ; XAR0 = &CSS
SUBB XAR0, #2 ; XAR0 = &SPS
MOVL XAR7, *XAR0 ; XAR7 = &b0
SETC INTM ; block interrupts
RPT #5 ; repeat 6 times
|| PREAD *XAR4++, *XAR7 ; SPS copy
DF11_EXIT:
POP ST1 ; restore INTM
POP XAR7 ; restore XAR7
POP XAR0 ; restore XAR0
POP ST0 ; restore flags
LRETR
.endasmfunc
.endif ; FU_DF11
;--- DF13 ----------------------------------------------------------------------
.if FU_DF13 = 1
.global _DCL_fupdateDF13
.align 2
; C prototype: void DCL_fupdateDF13(DCL_DF13 *p)
; argument 1 = *p : 32-bit DCL_DF13 structure address [XAR4]
; return = void [R0H]
_DCL_fupdateDF13:
.asmfunc
PUSH ST0 ; save flags
PUSH XAR0 ; save XAR0
PUSH XAR7 ; save XAR7
PUSH ST1 ; preserve INTM
MOVL XAR7, @XAR4 ; XAR7 = &p
ADDB XAR7, #34 ; XAR7 = &CSS
MOVL XAR0, *XAR7 ; XAR0 = &tpt
MOVL ACC, *+XAR0[4] ; ACC = CSS.sts
AND ACC, #1 ; mask bit 0
BF DF13_EXIT, EQ ; skip if zero
TCLR *+XAR0[4], #0 ; clear STS_UPDATE_PENDING flag
MOVL XAR0, XAR7 ; XAR0 = &CSS
SUBB XAR0, #2 ; XAR0 = &SPS
MOVL XAR7, *XAR0 ; XAR7 = &b0
SETC INTM ; block interrupts
RPT #15 ; repeat 16 times
|| PREAD *XAR4++, *XAR7 ; SPS copy
DF13_EXIT:
POP ST1 ; restore INTM
POP XAR7 ; restore XAR7
POP XAR0 ; restore XAR0
POP ST0 ; restore flags
LRETR
.endasmfunc
.endif ; FU_DF13
;--- DF22 ----------------------------------------------------------------------
.if FU_DF22 = 1
.global _DCL_fupdateDF22
.align 2
; C prototype: void DCL_fupdateDF22(DCL_DF22 *p)
; argument 1 = *p : 32-bit DCL_DF22 structure address [XAR4]
; return = void [R0H]
_DCL_fupdateDF22:
.asmfunc
PUSH ST0 ; save flags
PUSH XAR0 ; save XAR0
PUSH XAR7 ; save XAR7
PUSH ST1 ; preserve INTM
MOVL XAR7, @XAR4 ; XAR7 = &p
ADDB XAR7, #16 ; XAR7 = &CSS
MOVL XAR0, *XAR7 ; XAR0 = &tpt
MOVL ACC, *+XAR0[4] ; ACC = CSS.sts
AND ACC, #1 ; mask bit 0
BF DF22_EXIT, EQ ; skip if zero
TCLR *+XAR0[4], #0 ; clear STS_UPDATE_PENDING flag
MOVL XAR0, XAR7 ; XAR0 = &CSS
SUBB XAR0, #2 ; XAR0 = &SPS
MOVL XAR7, *XAR0 ; XAR7 = &b0
SETC INTM ; block interrupts
RPT #9 ; repeat 10 times
|| PREAD *XAR4++, *XAR7 ; SPS copy
DF22_EXIT:
POP ST1 ; restore INTM
POP XAR7 ; restore XAR7
POP XAR0 ; restore XAR0
POP ST0 ; restore flags
LRETR
.endasmfunc
.endif ; FU_DF22
;--- DF23 ----------------------------------------------------------------------
.if FU_DF23 = 1
.global _DCL_fupdateDF23
.align 2
; C prototype: void DCL_fupdateDF23(DCL_DF23 *p)
; argument 1 = *p : 32-bit DCL_DF23 structure address [XAR4]
; return = void [R0H]
_DCL_fupdateDF23:
.asmfunc
PUSH ST0 ; save flags
PUSH XAR0 ; save XAR0
PUSH XAR7 ; save XAR7
PUSH ST1 ; preserve INTM
MOVL XAR7, @XAR4 ; XAR7 = &p
ADDB XAR7, #22 ; XAR7 = &CSS
MOVL XAR0, *XAR7 ; XAR0 = &tpt
MOVL ACC, *+XAR0[4] ; ACC = CSS.sts
AND ACC, #1 ; mask bit 0
BF DF23_EXIT, EQ ; skip if zero
TCLR *+XAR0[4], #0 ; clear STS_UPDATE_PENDING flag
MOVL XAR0, XAR7 ; XAR0 = &CSS
SUBB XAR0, #2 ; XAR0 = &SPS
MOVL XAR7, *XAR0 ; XAR7 = &b0
SETC INTM ; block interrupts
RPT #13 ; repeat 14 times
|| PREAD *XAR4++, *XAR7 ; SPS copy
DF23_EXIT:
POP ST1 ; restore INTM
POP XAR7 ; restore XAR7
POP XAR0 ; restore XAR0
POP ST0 ; restore flags
LRETR
.endasmfunc
.endif ; FU_DF23
;--- GSM ----------------------------------------------------------------------
.if FU_GSM = 1
.global _DCL_fupdateGSM
.align 2
; C prototype: void DCL_fupdateGSM(DCL_GSM *p)
; argument 1 = *p : 32-bit DCL_GSM structure address [XAR4]
; return = void [R0H]
_DCL_fupdateGSM:
.asmfunc
PUSH ST0 ; save flags
PUSH XAR0 ; save XAR0
PUSH XAR7 ; save XAR7
PUSH ST1 ; preserve INTM
MOVL XAR7, @XAR4 ; XAR7 = &p
ADDB XAR7, #38 ; XAR7 = &CSS
MOVL XAR0, *XAR7 ; XAR0 = &tpt
MOVL ACC, *+XAR0[4] ; ACC = CSS.sts
AND ACC, #1 ; mask bit 0
BF GSM_EXIT, EQ ; skip if zero
TCLR *+XAR0[4], #0 ; clear STS_UPDATE_PENDING flag
MOVL XAR0, XAR7 ; XAR0 = &CSS
SUBB XAR0, #2 ; XAR0 = &SPS
MOVL XAR7, *XAR0 ; XAR7 = &m[0]
SETC INTM ; block interrupts
RPT #33 ; repeat 34 times
|| PREAD *XAR4++, *XAR7 ; SPS copy
GSM_EXIT:
POP ST1 ; restore INTM
POP XAR7 ; restore XAR7
POP XAR0 ; restore XAR0
POP ST0 ; restore flags
LRETR
.endasmfunc
.endif ; FU_GSM
;-----------------------------------------------------------------------------
.end
; end of file
|
ee/hot/do.asm | olifink/smsqe | 0 | 246524 | <reponame>olifink/smsqe
; Procedure to do a HOTKEY operation 1988 <NAME> QJUMP
section hotkey
xdef hot_do
xref hot_thus
xref hot_thfr
xref hot_fitem
xref hk_do
xref ut_gxnm1
;+++
; Do a hotkey operation
;
; HOT_DO key or name
;---
hot_do
jsr ut_gxnm1 ; get one string
bne.s hd_exit
jsr hot_thus ; find hotkey
bne.s hd_exit
jsr hot_fitem ; find item
bne.s hd_exfr
jsr hk_do ; do item
hd_exfr
jmp hot_thfr ; free hotkey
hd_exit
rts
end
|
alloy4fun_models/trainstlt/models/4/diMn5pHonJP3y5ao2.als | Kaixi26/org.alloytools.alloy | 0 | 2176 | open main
pred iddiMn5pHonJP3y5ao2_prop5 {
all t:Train |{
always (t.pos in Exit implies no t.pos')
always (t.pos in Entry implies (t.pos'in (t.pos.prox) ))
}
}
pred __repair { iddiMn5pHonJP3y5ao2_prop5 }
check __repair { iddiMn5pHonJP3y5ao2_prop5 <=> prop5o } |
Task/Pig-the-dice-game/Ada/pig-the-dice-game-1.ada | mullikine/RosettaCodeData | 1 | 5760 | package Pig is
type Dice_Score is range 1 .. 6;
type Player is tagged private;
function Recent(P: Player) return Natural;
function All_Recent(P: Player) return Natural;
function Score(P: Player) return Natural;
type Actor is abstract tagged null record;
function Roll_More(A: Actor; Self, Opponent: Player'Class)
return Boolean is abstract;
procedure Play(First, Second: Actor'Class; First_Wins: out Boolean);
private
type Player is tagged record
Score: Natural := 0;
All_Recent: Natural := 0;
Recent_Roll: Dice_Score := 1;
end record;
end Pig;
|
Transynther/x86/_processed/NC/_zr_/i3-7100_9_0x84_notsx.log_21829_737.asm | ljhsiun2/medusa | 9 | 3006 | <reponame>ljhsiun2/medusa<gh_stars>1-10
.global s_prepare_buffers
s_prepare_buffers:
push %r10
push %r12
push %r15
push %r9
push %rax
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x453c, %rsi
lea addresses_D_ht+0x1cc3c, %rdi
nop
nop
nop
and $61138, %r12
mov $48, %rcx
rep movsw
nop
nop
nop
nop
add $28316, %r10
lea addresses_A_ht+0x1a3c, %r12
nop
nop
nop
nop
dec %r10
mov $0x6162636465666768, %rdi
movq %rdi, %xmm7
vmovups %ymm7, (%r12)
nop
cmp %r12, %r12
lea addresses_UC_ht+0x713c, %rsi
lea addresses_WT_ht+0xafdc, %rdi
nop
nop
nop
nop
xor %rax, %rax
mov $109, %rcx
rep movsw
nop
nop
nop
dec %rax
lea addresses_UC_ht+0x14c7c, %r10
nop
nop
nop
nop
cmp $55287, %r15
mov (%r10), %rsi
dec %r10
lea addresses_normal_ht+0x3800, %rcx
nop
nop
nop
xor $17090, %r12
movb (%rcx), %al
dec %rdi
lea addresses_WT_ht+0x18dbc, %rsi
lea addresses_WC_ht+0x1b03c, %rdi
nop
nop
nop
nop
nop
and %r9, %r9
mov $48, %rcx
rep movsb
and %rdi, %rdi
lea addresses_WC_ht+0x1073c, %rcx
nop
nop
dec %r12
movl $0x61626364, (%rcx)
cmp %rcx, %rcx
lea addresses_normal_ht+0x1dc10, %r15
nop
nop
nop
nop
nop
cmp $21505, %rdi
mov $0x6162636465666768, %rsi
movq %rsi, %xmm0
and $0xffffffffffffffc0, %r15
vmovaps %ymm0, (%r15)
xor $43012, %r15
lea addresses_UC_ht+0x1a4c6, %r10
cmp %r9, %r9
movw $0x6162, (%r10)
nop
cmp %r9, %r9
lea addresses_normal_ht+0x5c3c, %rsi
lea addresses_WT_ht+0x195ca, %rdi
nop
nop
nop
nop
add %r10, %r10
mov $95, %rcx
rep movsq
nop
nop
nop
sub $54669, %rcx
lea addresses_WT_ht+0x16198, %rsi
lea addresses_WT_ht+0x3c, %rdi
xor $46526, %r10
mov $101, %rcx
rep movsq
nop
nop
nop
nop
nop
xor $33796, %r9
lea addresses_UC_ht+0xec3c, %rcx
nop
nop
nop
inc %rdi
mov (%rcx), %r15w
nop
cmp $3678, %rdi
lea addresses_normal_ht+0xab3c, %r12
nop
and $39001, %rcx
movb $0x61, (%r12)
nop
nop
nop
and %rdi, %rdi
lea addresses_D_ht+0x1ad4c, %rsi
lea addresses_WT_ht+0xd7e4, %rdi
clflush (%rsi)
nop
and %r12, %r12
mov $74, %rcx
rep movsq
nop
nop
nop
nop
nop
dec %r15
lea addresses_normal_ht+0x135ac, %rdi
nop
nop
add $40271, %r9
vmovups (%rdi), %ymm2
vextracti128 $1, %ymm2, %xmm2
vpextrq $1, %xmm2, %rax
nop
nop
nop
cmp %r10, %r10
pop %rsi
pop %rdi
pop %rcx
pop %rax
pop %r9
pop %r15
pop %r12
pop %r10
ret
.global s_faulty_load
s_faulty_load:
push %r11
push %r14
push %r15
push %r8
push %rax
push %rcx
push %rsi
// Load
lea addresses_A+0x11324, %rsi
nop
nop
add $22771, %r14
movb (%rsi), %r15b
nop
nop
nop
nop
add %r14, %r14
// Store
lea addresses_UC+0x1ee3c, %rsi
xor $26366, %rax
mov $0x5152535455565758, %r8
movq %r8, %xmm6
vmovups %ymm6, (%rsi)
nop
nop
nop
nop
nop
sub %rsi, %rsi
// Store
mov $0xcc1, %r11
nop
nop
xor $18856, %r14
mov $0x5152535455565758, %rax
movq %rax, %xmm2
vmovups %ymm2, (%r11)
nop
nop
nop
nop
inc %r8
// Load
lea addresses_RW+0x8860, %rcx
xor $35666, %r15
vmovups (%rcx), %ymm7
vextracti128 $0, %ymm7, %xmm7
vpextrq $0, %xmm7, %rsi
sub $11345, %rcx
// Faulty Load
mov $0x6108740000000c3c, %rax
nop
nop
nop
nop
xor %r14, %r14
mov (%rax), %r8d
lea oracles, %r11
and $0xff, %r8
shlq $12, %r8
mov (%r11,%r8,1), %r8
pop %rsi
pop %rcx
pop %rax
pop %r8
pop %r15
pop %r14
pop %r11
ret
/*
<gen_faulty_load>
[REF]
{'src': {'type': 'addresses_NC', 'same': False, 'size': 32, 'congruent': 0, 'NT': False, 'AVXalign': True}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_A', 'same': False, 'size': 1, 'congruent': 3, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_UC', 'same': False, 'size': 32, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_P', 'same': False, 'size': 32, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_RW', 'same': False, 'size': 32, 'congruent': 2, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'type': 'addresses_NC', 'same': True, 'size': 4, 'congruent': 0, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_WC_ht', 'congruent': 8, 'same': False}, 'dst': {'type': 'addresses_D_ht', 'congruent': 9, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_A_ht', 'same': False, 'size': 32, 'congruent': 9, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_UC_ht', 'congruent': 8, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 4, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_UC_ht', 'same': False, 'size': 8, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_normal_ht', 'same': False, 'size': 1, 'congruent': 2, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'src': {'type': 'addresses_WT_ht', 'congruent': 6, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 10, 'same': False}, 'OP': 'REPM'}
{'dst': {'type': 'addresses_WC_ht', 'same': False, 'size': 4, 'congruent': 8, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 32, 'congruent': 2, 'NT': False, 'AVXalign': True}, 'OP': 'STOR'}
{'dst': {'type': 'addresses_UC_ht', 'same': False, 'size': 2, 'congruent': 1, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_normal_ht', 'congruent': 11, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 1, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_WT_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 9, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_UC_ht', 'same': False, 'size': 2, 'congruent': 11, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'dst': {'type': 'addresses_normal_ht', 'same': False, 'size': 1, 'congruent': 7, 'NT': False, 'AVXalign': False}, 'OP': 'STOR'}
{'src': {'type': 'addresses_D_ht', 'congruent': 3, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 3, 'same': False}, 'OP': 'REPM'}
{'src': {'type': 'addresses_normal_ht', 'same': False, 'size': 32, 'congruent': 4, 'NT': False, 'AVXalign': False}, 'OP': 'LOAD'}
{'00': 21829}
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
*/
|
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0xca.log_656_136.asm | ljhsiun2/medusa | 9 | 247819 | <gh_stars>1-10
.global s_prepare_buffers
s_prepare_buffers:
push %r13
push %r14
push %r15
push %r9
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_UC_ht+0x9adb, %r13
nop
and %r14, %r14
movb (%r13), %bl
nop
nop
nop
nop
add $6817, %r15
lea addresses_WC_ht+0x121db, %rsi
lea addresses_UC_ht+0x13adb, %rdi
clflush (%rdi)
nop
nop
nop
and %r9, %r9
mov $62, %rcx
rep movsw
nop
nop
nop
nop
add $24359, %rbx
lea addresses_D_ht+0x7bdb, %r14
nop
nop
nop
and $10608, %rcx
mov (%r14), %si
and $57107, %r15
lea addresses_normal_ht+0xdf83, %r15
nop
inc %rbx
mov (%r15), %rcx
nop
nop
nop
nop
dec %r15
lea addresses_D_ht+0x161d3, %rsi
lea addresses_UC_ht+0x177db, %rdi
nop
cmp $24327, %r13
mov $120, %rcx
rep movsb
nop
nop
xor %rdi, %rdi
lea addresses_D_ht+0xa8cb, %rcx
nop
nop
add $10847, %rsi
movb (%rcx), %bl
nop
nop
xor %r9, %r9
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r9
pop %r15
pop %r14
pop %r13
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r9
push %rax
push %rbp
push %rbx
push %rdx
// Store
lea addresses_D+0x196db, %r13
nop
nop
nop
nop
dec %rbp
movb $0x51, (%r13)
// Exception!!!
nop
nop
mov (0), %rbx
nop
nop
nop
nop
nop
xor %r9, %r9
// Store
lea addresses_D+0x181db, %rdx
clflush (%rdx)
nop
nop
nop
inc %rax
movw $0x5152, (%rdx)
nop
nop
nop
nop
add $60496, %r13
// Load
lea addresses_UC+0xcbbb, %r9
nop
nop
nop
nop
nop
xor $46868, %rbx
mov (%r9), %r10d
add %r10, %r10
// Store
lea addresses_normal+0xe0db, %r10
nop
nop
nop
nop
nop
add %r13, %r13
movb $0x51, (%r10)
nop
nop
nop
inc %rbp
// Load
lea addresses_A+0x1b9fb, %rbx
nop
nop
nop
nop
nop
add %rbp, %rbp
mov (%rbx), %r10d
nop
nop
nop
nop
nop
inc %rax
// Store
lea addresses_RW+0xd57b, %r9
nop
nop
inc %rax
mov $0x5152535455565758, %rbp
movq %rbp, (%r9)
nop
nop
xor $35702, %r9
// Faulty Load
lea addresses_PSE+0x19adb, %rbp
nop
nop
nop
sub $55968, %rax
movb (%rbp), %bl
lea oracles, %r13
and $0xff, %rbx
shlq $12, %rbx
mov (%r13,%rbx,1), %rbx
pop %rdx
pop %rbx
pop %rbp
pop %rax
pop %r9
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'congruent': 0, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 10, 'AVXalign': False, 'same': False, 'size': 1, 'NT': True, 'type': 'addresses_D'}}
{'OP': 'STOR', 'dst': {'congruent': 8, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_D'}}
{'src': {'congruent': 3, 'AVXalign': False, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_UC'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 9, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_normal'}}
{'src': {'congruent': 3, 'AVXalign': True, 'same': False, 'size': 4, 'NT': False, 'type': 'addresses_A'}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_RW'}}
[Faulty Load]
{'src': {'congruent': 0, 'AVXalign': False, 'same': True, 'size': 1, 'NT': False, 'type': 'addresses_PSE'}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'congruent': 11, 'AVXalign': False, 'same': False, 'size': 1, 'NT': True, 'type': 'addresses_UC_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 6, 'same': False, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'congruent': 10, 'same': False, 'type': 'addresses_UC_ht'}}
{'src': {'congruent': 8, 'AVXalign': False, 'same': False, 'size': 2, 'NT': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 2, 'AVXalign': False, 'same': False, 'size': 8, 'NT': False, 'type': 'addresses_normal_ht'}, 'OP': 'LOAD'}
{'src': {'congruent': 2, 'same': False, 'type': 'addresses_D_ht'}, 'OP': 'REPM', 'dst': {'congruent': 5, 'same': False, 'type': 'addresses_UC_ht'}}
{'src': {'congruent': 4, 'AVXalign': False, 'same': False, 'size': 1, 'NT': False, 'type': 'addresses_D_ht'}, 'OP': 'LOAD'}
{'33': 656}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
|
hello_world.adb | charlesincharge/EmbeddedAda | 0 | 223 | -- Lines starting with `--` are treated as comments.
-- Compile with `gnatmake hello_world.adb`, then run the executable with
-- `./hello_world`
-- Import the Ada.Text_IO package
with Ada.Text_IO;
-- `procedure` indicates the start of the subprogram
procedure Hello_World is
-- Declare variables here
begin
-- Function body here
Ada.Text_IO.Put_Line("Hello, World!");
end Hello_World;
|
tocompiler/src/PlayScript.g4 | Hpbbs/Tolang | 0 | 4003 | <filename>tocompiler/src/PlayScript.g4<gh_stars>0
/*
[The "BSD licence"]
版权说明
本文件的大部分内容来自：https://github.com/antlr/grammars-v4/blob/master/java/JavaParser.g4
在此基础上进行了一些修改。
修改者：宫文学 2019年
原文件采用BSD licence，本文件仍然采用BSD licence.
原文件的版权声明如下：
*/
/*
[The "BSD licence"]
Copyright (c) 2013 <NAME>, <NAME>
Copyright (c) 2017 <NAME> (upgrade to Java 8)
All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions
are met:
1. Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer.
2. Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution.
3. The name of the author may not be used to endorse or promote products
derived from this software without specific prior written permission.
THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/*
用Antlr的语法重新实现了02~05讲的语法规则。
Antlr可以支持左递归的语法规则，参见additiveExpression和multiplicativeExpression规则。
*/
grammar PlayScript;
import CommonLexer; //导入词法定义
@header {
package antlrtest;
}
literal
: IntegerLiteral
| FloatingPointLiteral
| BooleanLiteral
| CharacterLiteral
| StringLiteral
| NullLiteral
;
primitiveType
: 'Number'
| 'String'
| 'var'
;
statement
: expressionStatement
| compoundStatement
//| selectionStatement
//| iterationStatement
;
expressionStatement
: expression? ';'
;
declaration
: primitiveType Identifier
| primitiveType Identifier initializer
;
initializer
: assignmentOperator assignmentExpression
//| LeftBrace initializerList RightBrace
//| LeftBrace initializerList Comm RightBrace
;
expression
: assignmentExpression
| expression ',' assignmentExpression
;
assignmentExpression
: additiveExpression
| Identifier assignmentOperator additiveExpression
;
assignmentOperator
: '='
| '*='
| '/='
| '%='
| '+='
| '-='
| '<<='
| '>>='
| '>>>='
| '&='
| '^='
| '|='
;
//加法表达式，Antlr能够支持左递归
additiveExpression
: multiplicativeExpression
| additiveExpression '+' multiplicativeExpression
| additiveExpression '-' multiplicativeExpression
;
//乘法表达式，Antlr能够支持左递归
multiplicativeExpression
: primaryExpression
| multiplicativeExpression '*' primaryExpression
| multiplicativeExpression '/' primaryExpression
| multiplicativeExpression '%' primaryExpression
;
primaryExpression
: Identifier
| literal
| Identifier '(' argumentExpressionList? ')'
| '(' expression ')'
;
argumentExpressionList
: assignmentExpression
| argumentExpressionList ',' assignmentExpression
;
compoundStatement
: '{' blockItemList? '}'
;
blockItemList
: blockItem
| blockItemList blockItem
;
blockItem
: statement
| declaration
;
|
oeis/021/A021408.asm | neoneye/loda-programs | 11 | 97415 | ; A021408: Decimal expansion of 1/404.
; Submitted by <NAME>(s4)
; 0,0,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2,4,7,5,2
mov $1,2
pow $1,$0
div $0,2
mod $0,2
div $1,2
trn $1,1
add $1,$0
mov $0,$1
mod $0,10
|
lockPuzzle.als | JustAnotherSystemsEngineer/AlloyCodePuzzle | 0 | 1256 | enum Digit {N0,N1,N2,N3,N4,N5,N6,N7,N8,N9}
let sequence[a,b,c] = 0->a + 1->b + 2->c
one sig Code {c1, c2, c3: Digit}
fun match[code: Code, d: Digit]: Int { #((code.c1 + code.c2 + code.c3) & d) }
pred hint(code: Code, d1,d2,d3: Digit, correct, wellPlaced:Int) {
// The intersection of each guessed digit with the code (unordered) tells us whether any of the digits match each other and how many
correct = match[code,d1].plus[match[code,d2]].plus[match[code,d3]]
// The intersection of the sequences of digits (ordered) tells us whether any of the digits are correct AND in the right place in the sequence
wellPlaced = #(sequence[code.c1,code.c2,code.c3] & sequence[d1, d2, d3])
}
pred originalLock {
some code: Code |
hint[code, N6,N8,N2, 1,1] and
hint[code, N6,N1,N4, 1,0] and
hint[code, N2,N0,N6, 2,0] and
hint[code, N7,N3,N8, 0,0] and
hint[code, N7,N8,N0, 1,0]
}
pred newLock {
some code: Code |
hint[code, N1,N2,N3, 0,0] and
hint[code, N4,N5,N6, 0,0] and
hint[code, N7,N8,N9, 1,0] and
hint[code, N9,N0,N0, 3,1]
}
run originalLock
run newLock
run test {some code: Code | hint[code, N9,N0,N0, 3,1]}
|
src/latin_utils/latin_utils-dictionary_package-kind_entry_io.adb | spr93/whitakers-words | 204 | 18559 | -- WORDS, a Latin dictionary, by <NAME> (USAF, Retired)
--
-- Copyright <NAME> (1936–2010)
--
-- This is a free program, which means it is proper to copy it and pass
-- it on to your friends. Consider it a developmental item for which
-- there is no charge. However, just for form, it is Copyrighted
-- (c). Permission is hereby freely given for any and all use of program
-- and data. You can sell it as your own, but at least tell me.
--
-- This version is distributed without obligation, but the developer
-- would appreciate comments and suggestions.
--
-- All parts of the WORDS system, source code and data files, are made freely
-- available to anyone who wishes to use them, for whatever purpose.
separate (Latin_Utils.Dictionary_Package)
package body Kind_Entry_IO is
---------------------------------------------------------------------------
use type Ada.Text_IO.Positive_Count;
---------------------------------------------------------------------------
procedure Get
(File : in Ada.Text_IO.File_Type;
POFS : in Part_Of_Speech_Type;
Item : out Kind_Entry
)
is
--------------------------------------------------------------------------
-- Helper variables
Noun_Kind : Noun_Kind_Type;
Pronoun_Kind : Pronoun_Kind_Type;
Propack_Kind : Pronoun_Kind_Type;
Verb_Kind : Verb_Kind_Type;
Vpar_Kind : Verb_Kind_Type;
Supine_Kind : Verb_Kind_Type;
Numeral_Value : Numeral_Value_Type;
--------------------------------------------------------------------------
-- Small helper procedure
procedure Set_Col (File : Ada.Text_IO.File_Type) is
begin
Ada.Text_IO.Set_Col
(File,
Ada.Text_IO.Col (File) +
Ada.Text_IO.Positive_Count (Kind_Entry_IO.Default_Width)
);
end Set_Col;
--------------------------------------------------------------------------
begin
case POFS is
when N =>
Noun_Kind_Type_IO.Get (File, Noun_Kind);
Item := (N, Noun_Kind);
when Pron =>
Pronoun_Kind_Type_IO.Get (File, Pronoun_Kind);
Item := (Pron, Pronoun_Kind);
when Pack =>
Pronoun_Kind_Type_IO.Get (File, Propack_Kind);
Item := (Pack, Propack_Kind);
when Adj =>
Set_Col (File);
Item := (Pofs => Adj);
when Num =>
Inflections_Package.Integer_IO.Get (File, Numeral_Value);
Item := (Num, Numeral_Value);
when Adv =>
Set_Col (File);
Item := (Pofs => Adv);
when V =>
Verb_Kind_Type_IO.Get (File, Verb_Kind);
Item := (V, Verb_Kind);
when Vpar =>
Verb_Kind_Type_IO.Get (File, Vpar_Kind);
Item := (Vpar, Vpar_Kind);
when Supine =>
Verb_Kind_Type_IO.Get (File, Supine_Kind);
Item := (Supine, Supine_Kind);
when Prep =>
Set_Col (File);
Item := (Pofs => Prep);
when Conj =>
Set_Col (File);
Item := (Pofs => Conj);
when Interj =>
Set_Col (File);
Item := (Pofs => Interj);
when Tackon =>
Set_Col (File);
Item := (Pofs => Tackon);
when Prefix =>
Set_Col (File);
Item := (Pofs => Prefix);
when Suffix =>
Set_Col (File);
Item := (Pofs => Suffix);
when X =>
Set_Col (File);
Item := (Pofs => X);
end case;
end Get;
---------------------------------------------------------------------------
procedure Get (POFS : in Part_Of_Speech_Type; Item : out Kind_Entry)
is
--------------------------------------------------------------------------
-- Helper variables
Noun_Kind : Noun_Kind_Type;
Pronoun_Kind : Pronoun_Kind_Type;
Propack_Kind : Pronoun_Kind_Type;
Verb_Kind : Verb_Kind_Type;
Vpar_Kind : Verb_Kind_Type;
Supine_Kind : Verb_Kind_Type;
Numeral_Value : Numeral_Value_Type;
--------------------------------------------------------------------------
begin
case POFS is
when N =>
Noun_Kind_Type_IO.Get (Noun_Kind);
Item := (N, Noun_Kind);
when Pron =>
Pronoun_Kind_Type_IO.Get (Pronoun_Kind);
Item := (Pron, Pronoun_Kind);
when Pack =>
Pronoun_Kind_Type_IO.Get (Propack_Kind);
Item := (Pack, Propack_Kind);
when Adj =>
Ada.Text_IO.Set_Col
(Ada.Text_IO.Col +
Ada.Text_IO.Positive_Count (Kind_Entry_IO.Default_Width)
);
Item := (Pofs => Adj);
when Num =>
Inflections_Package.Integer_IO.Get (Numeral_Value);
Item := (Num, Numeral_Value);
when Adv =>
Ada.Text_IO.Set_Col
(Ada.Text_IO.Col +
Ada.Text_IO.Positive_Count (Kind_Entry_IO.Default_Width)
);
Item := (Pofs => Adv);
when V =>
Verb_Kind_Type_IO.Get (Verb_Kind);
Item := (V, Verb_Kind);
when Vpar =>
Verb_Kind_Type_IO.Get (Vpar_Kind);
Item := (Vpar, Vpar_Kind);
when Supine =>
Verb_Kind_Type_IO.Get (Supine_Kind);
Item := (Supine, Supine_Kind);
when Prep =>
Ada.Text_IO.Set_Col
(Ada.Text_IO.Col +
Ada.Text_IO.Positive_Count (Kind_Entry_IO.Default_Width)
);
Item := (Pofs => Prep);
when Conj =>
Ada.Text_IO.Set_Col
(Ada.Text_IO.Col +
Ada.Text_IO.Positive_Count (Kind_Entry_IO.Default_Width)
);
Item := (Pofs => Conj);
when Interj =>
Ada.Text_IO.Set_Col
(Ada.Text_IO.Col +
Ada.Text_IO.Positive_Count (Kind_Entry_IO.Default_Width)
);
Item := (Pofs => Interj);
when Tackon =>
Ada.Text_IO.Set_Col
(Ada.Text_IO.Col +
Ada.Text_IO.Positive_Count (Kind_Entry_IO.Default_Width)
);
Item := (Pofs => Tackon);
when Prefix =>
Ada.Text_IO.Set_Col
(Ada.Text_IO.Col +
Ada.Text_IO.Positive_Count (Kind_Entry_IO.Default_Width)
);
Item := (Pofs => Prefix);
when Suffix =>
Ada.Text_IO.Set_Col
(Ada.Text_IO.Col +
Ada.Text_IO.Positive_Count (Kind_Entry_IO.Default_Width)
);
Item := (Pofs => Suffix);
when X =>
Ada.Text_IO.Set_Col
(Ada.Text_IO.Col +
Ada.Text_IO.Positive_Count (Kind_Entry_IO.Default_Width)
);
Item := (Pofs => X);
end case;
end Get;
---------------------------------------------------------------------------
procedure Put
(File : in Ada.Text_IO.File_Type;
POFS : in Part_Of_Speech_Type;
Item : in Kind_Entry
)
is
pragma Unreferenced (POFS);
-- Used for computing bounds of substring for filling
Ending_Col : constant Positive :=
Kind_Entry_IO.Default_Width + Positive (Ada.Text_IO.Col (File)) - 1;
begin
case Item.Pofs is
when N =>
Noun_Kind_Type_IO.Put (File, Item.N_Kind);
when Pron =>
Pronoun_Kind_Type_IO.Put (File, Item.Pron_Kind);
when Pack =>
Pronoun_Kind_Type_IO.Put (File, Item.Pack_Kind);
when Num =>
Inflections_Package.Integer_IO.Put
(File, Item.Num_Value, Numeral_Value_Type_IO_Default_Width);
when V =>
Verb_Kind_Type_IO.Put (File, Item.V_Kind);
when Vpar =>
Verb_Kind_Type_IO.Put (File, Item.Vpar_Kind);
when Supine =>
Verb_Kind_Type_IO.Put (File, Item.Supine_Kind);
when X | Adj | Adv =>
null;
when Prep .. Suffix =>
null;
end case;
Ada.Text_IO.Put
(File,
String'(Integer (Ada.Text_IO.Col (File)) .. Ending_Col => ' ')
);
end Put;
---------------------------------------------------------------------------
procedure Put (POFS : in Part_Of_Speech_Type; Item : in Kind_Entry)
is
pragma Unreferenced (POFS);
-- Used for computing bounds of substring for filling
Ending_Col : constant Positive :=
Kind_Entry_IO.Default_Width + Positive (Ada.Text_IO.Col) - 1;
begin
case Item.Pofs is
when N =>
Noun_Kind_Type_IO.Put (Item.N_Kind);
when Pron =>
Pronoun_Kind_Type_IO.Put (Item.Pron_Kind);
when Pack =>
Pronoun_Kind_Type_IO.Put (Item.Pack_Kind);
when Num =>
Inflections_Package.Integer_IO.Put
(Item.Num_Value, Numeral_Value_Type_IO_Default_Width);
when V =>
Verb_Kind_Type_IO.Put (Item.V_Kind);
when Vpar =>
Verb_Kind_Type_IO.Put (Item.Vpar_Kind);
when Supine =>
Verb_Kind_Type_IO.Put (Item.Supine_Kind);
when X | Adj | Adv =>
null;
when Prep .. Suffix =>
null;
end case;
Ada.Text_IO.Put (String'(Integer (Ada.Text_IO.Col) .. Ending_Col => ' '));
end Put;
---------------------------------------------------------------------------
procedure Get
(Source : in String;
POFS : in Part_Of_Speech_Type;
Target : out Kind_Entry;
Last : out Integer
)
is
--------------------------------------------------------------------------
-- Helper variables
Noun_Kind : Noun_Kind_Type;
Pronoun_Kind : Pronoun_Kind_Type;
Propack_Kind : Pronoun_Kind_Type;
Verb_Kind : Verb_Kind_Type;
Vpar_Kind : Verb_Kind_Type;
Supine_Kind : Verb_Kind_Type;
Numeral_Value : Numeral_Value_Type;
--------------------------------------------------------------------------
-- Used to get lower bound of substring
Low : constant Integer := Source'First - 1;
begin
Last := Low; -- In case it is not set later
case POFS is
when N =>
Noun_Kind_Type_IO.Get
(Source (Low + 1 .. Source'Last), Noun_Kind, Last);
Target := (N, Noun_Kind);
when Pron =>
Pronoun_Kind_Type_IO.Get
(Source (Low + 1 .. Source'Last), Pronoun_Kind, Last);
Target := (Pron, Pronoun_Kind);
when Pack =>
Pronoun_Kind_Type_IO.Get
(Source (Low + 1 .. Source'Last), Propack_Kind, Last);
Target := (Pack, Propack_Kind);
when Adj =>
Target := (Pofs => Adj);
when Num =>
Inflections_Package.Integer_IO.Get
(Source (Low + 1 .. Source'Last), Numeral_Value, Last);
Target := (Num, Numeral_Value);
when Adv =>
Target := (Pofs => Adv);
when V =>
Verb_Kind_Type_IO.Get
(Source (Low + 1 .. Source'Last), Verb_Kind, Last);
Target := (V, Verb_Kind);
when Vpar =>
Verb_Kind_Type_IO.Get
(Source (Low + 1 .. Source'Last), Vpar_Kind, Last);
Target := (Vpar, Vpar_Kind);
when Supine =>
Verb_Kind_Type_IO.Get
(Source (Low + 1 .. Source'Last), Supine_Kind, Last);
Target := (Supine, Supine_Kind);
when Prep =>
Target := (Pofs => Prep);
when Conj =>
Target := (Pofs => Conj);
when Interj =>
Target := (Pofs => Interj);
when Tackon =>
Target := (Pofs => Tackon);
when Prefix =>
Target := (Pofs => Prefix);
when Suffix =>
Target := (Pofs => Suffix);
when X =>
Target := (Pofs => X);
end case;
end Get;
---------------------------------------------------------------------------
procedure Put
(Target : out String;
POFS : in Part_Of_Speech_Type;
Item : in Kind_Entry
)
is
pragma Unreferenced (POFS);
-- Used to get bounds of substrings
Low : constant Integer := Target'First - 1;
High : Integer := 0;
begin
-- Put Kind_Entry
case Item.Pofs is
when N =>
High := Low + Noun_Kind_Type_IO.Default_Width;
Noun_Kind_Type_IO.Put (Target (Low + 1 .. High), Item.N_Kind);
when Pron =>
High := Low + Pronoun_Kind_Type_IO.Default_Width;
Pronoun_Kind_Type_IO.Put (Target (Low + 1 .. High), Item.Pron_Kind);
when Pack =>
High := Low + Pronoun_Kind_Type_IO.Default_Width;
Pronoun_Kind_Type_IO.Put (Target (Low + 1 .. High), Item.Pack_Kind);
when Num =>
High := Low + Numeral_Value_Type_IO_Default_Width;
Inflections_Package.Integer_IO.Put
(Target (Low + 1 .. High), Item.Num_Value);
when V =>
High := Low + Verb_Kind_Type_IO.Default_Width;
Verb_Kind_Type_IO.Put (Target (Low + 1 .. High), Item.V_Kind);
when Vpar =>
High := Low + Verb_Kind_Type_IO.Default_Width;
Verb_Kind_Type_IO.Put (Target (Low + 1 .. High), Item.Vpar_Kind);
when Supine =>
High := Low + Verb_Kind_Type_IO.Default_Width;
Verb_Kind_Type_IO.Put (Target (Low + 1 .. High), Item.Supine_Kind);
when X | Adj | Adv =>
null;
when Prep .. Suffix =>
null;
end case;
-- Fill remainder of string
Target (High + 1 .. Target'Last) := (others => ' ');
end Put;
---------------------------------------------------------------------------
end Kind_Entry_IO;
|
source/PFH.asm | stuij/rath | 25 | 14107 | # SYSTEM VARIABLES & CONSTANTS ==================
#C BL -- char an ASCII space
head bl,2,"bl",docon,storedest
.word 0x20
#Z tibsize -- n size of TIB
head tibsize,7,"tibsize",docon,bl
.word 124 /* 2 chars safety zone */
#X tib -- a-addr Terminal Input Buffer
# HEX 82 CONSTANT TIB CP/M systems: 126 bytes
# HEX -80 USER TIB others: below user area
head tib,3,"tib",dovar,tibsize
.space 128
#Z u0 -- a-addr current user area adrs
codeh u0,2,"u0",tib
str r1, [sp, #-4]! /* push TOS */
mov r1, r2
next
#C >IN -- a-addr holds offset into TIB
head toin,3,">in",douser,u0
.word 4
#C BASE -- a-addr holds conversion radix
head base,4,"base",douser,toin
.word 8
#C STATE -- a-addr holds compiler state
head state,5,"state",douser,base
.word 12
#Z dp -- a-addr holds dictionary ptr
head dp,2,"dp",douser,state
.word 16
#Z 'source -- a-addr two cells: len, adrs
head ticksource,7,"'source",douser,dp
.word 20
#Z latest -- a-addr last word in dict.
head latest,6,"latest",douser,ticksource
.word 28
#Z hp -- a-addr HOLD pointer
head hp,2,"hp",douser,latest
.word 32
#Z LP -- a-addr Leave-stack pointer
head lp,2,"lp",douser,hp
.word 36
#Z s0 -- a-addr end of parameter stack
codeh s0,2,"s0",lp
str r1, [sp, #-4]! /* push old TOS */
ldr r1, [r10]
next
#X PAD -- a-addr user PAD buffer
# = end of hold area!
codeh pad,3,"pad",s0
str r1, [sp, #-4]! /* push old TOS */
ldr r1, [r10, #12]
next
#Z l0 -- a-addr bottom of Leave stack
head l0,2,"l0",dovar,pad
.space 128
#Z r0 -- a-addr end of return stack
codeh r0,2,"r0",l0
str r1, [sp, #-4]! /* push old TOS */
ldr r1, [r10, #4]
next
#Z uinit -- addr initial values for user area
head uinit,5,"uinit",docreate,r0
.word 0x12345678,0,10,0 /* reserved (UNUSED),>IN,BASE,STATE */
.word enddict /* DP */
.word 0,0 /* SOURCE init'd elsewhere */
.word lastword /* LATEST */
.word 0 /* HP init'd elsewhere */
#Z #init -- n #bytes of user area init data
head ninit,5,"#init",docon,uinit
.word 36
# ARITHMETIC OPERATORS ==========================
#C S>D n -- d single -> double prec.
# DUP 0< ;
head stod,3,"s>d",docolon,ninit
.word dup,zeroless,exit
#Z ?NEGATE n1 n2 -- n3 negate n1 if n2 negative
#_ 0< IF NEGATE THEN ; ...a common factor
head qnegate,7,"?negate",docolon,stod
.word zeroless,qbranch,qneg1,negate
qneg1: .word exit
#C ABS n1 -- +n2 absolute value
# DUP ?NEGATE ;
head abs,3,"abs",docolon,qnegate
.word dup,qnegate,exit
#X DNEGATE d1 -- d2 negate double precision
# SWAP INVERT SWAP INVERT 1 M+ ;
head dnegate,7,"dnegate",docolon,abs
.word swap,invert,swap,invert,lit,1,mplus
.word exit
#Z ?DNEGATE d1 n -- d2 negate d1 if n negative
#_ 0< IF DNEGATE THEN ; ...a common factor
head qdnegate,8,"?dnegate",docolon,dnegate
.word zeroless,qbranch,dneg1,dnegate
dneg1: .word exit
#X DABS d1 -- +d2 absolute value dbl.prec.
# DUP ?DNEGATE ;
head dabs,4,"dabs",docolon,qdnegate
.word dup,qdnegate,exit
#C M* n1 n2 -- d signed 16*16->32 multiply
#_ 2DUP XOR >R carries sign of the result
# SWAP ABS SWAP ABS UM*
# R> ?DNEGATE ;
head mstar,2,"m*",docolon,dabs
.word twodup,xor,tor
.word swap,abs,swap,abs,umstar
.word rfrom,qdnegate,exit
#C SM/REM d1 n1 -- n2 n3 symmetric signed div
#_ 2DUP XOR >R sign of quotient
# OVER >R sign of remainder
# ABS >R DABS R> UM/MOD
# SWAP R> ?NEGATE
# SWAP R> ?NEGATE ;
# Ref. dpANS-6 section 3.2.2.1.
head smslashrem,6,"sm/rem",docolon,mstar
.word twodup,xor,tor,over,tor
.word abs,tor,dabs,rfrom,umslashmod
.word swap,rfrom,qnegate,swap,rfrom,qnegate
.word exit
#C FM/MOD d1 n1 -- n2 n3 floored signed div'n
# DUP >R save divisor
# SM/REM
# DUP 0< IF if quotient negative,
# SWAP R> + add divisor to rem'dr
# SWAP 1- decrement quotient
# ELSE R> DROP THEN ;
# Ref. dpANS-6 section 3.2.2.1.
head fmslashmod,6,"fm/mod",docolon,smslashrem
.word dup,tor,smslashrem
.word dup,zeroless,qbranch,fmmod1
.word swap,rfrom,plus,swap,oneminus
.word branch,fmmod2
fmmod1: .word rfrom,drop
fmmod2: .word exit
#C * n1 n2 -- n3 signed multiply
# M* DROP ;
head star,1,"*",docolon,fmslashmod
.word mstar,drop,exit
#C /MOD n1 n2 -- n3 n4 signed divide/rem'dr
# >R S>D R> FM/MOD ;
head slashmod,4,"/mod",docolon,star
.word tor,stod,rfrom,fmslashmod,exit
#C / n1 n2 -- n3 signed divide
# /MOD nip ;
head slash,1,"/",docolon,slashmod
.word slashmod,nip,exit
#C MOD n1 n2 -- n3 signed remainder
# /MOD DROP ;
head mod,3,"mod",docolon,slash
.word slashmod,drop,exit
#C */MOD n1 n2 n3 -- n4 n5 n1*n2/n3, rem"
# >R M* R> FM/MOD ;
head ssmod,5,"*/mod",docolon,mod
.word tor,mstar,rfrom,fmslashmod,exit
#C */ n1 n2 n3 -- n4 n1*n2/n3
# */MOD nip ;
head starslash,2,"*/",docolon,ssmod
.word ssmod,nip,exit
#C MAX n1 n2 -- n3 signed maximum
#_ 2DUP < IF SWAP THEN DROP ;
head max,3,"max",docolon,starslash
.word twodup,less,qbranch,max1,swap
max1: .word drop,exit
#C MIN n1 n2 -- n3 signed minimum
#_ 2DUP > IF SWAP THEN DROP ;
head min,3,"min",docolon,max
.word twodup,greater,qbranch,min1,swap
min1: .word drop,exit
# DOUBLE OPERATORS ==============================
#C 2@ a-addr -- x1 x2 fetch 2 cells
# DUP CELL+ @ SWAP @ ;
# the lower address will appear on top of stack
head twofetch,2,"2@",docolon,min
.word dup,cellplus,fetch,swap,fetch,exit
#C 2! x1 x2 a-addr -- store 2 cells
# SWAP OVER ! CELL+ ! ;
# the top of stack is stored at the lower adrs
head twostore,2,"2!",docolon,twofetch
.word swap,over,store,cellplus,store,exit
#C 2DROP x1 x2 -- drop 2 cells
# DROP DROP ;
head twodrop,5,"2drop",docolon,twostore
.word drop,drop,exit
#C 2DUP x1 x2 -- x1 x2 x1 x2 dup top 2 cells
# OVER OVER ;
head twodup,4,"2dup",docolon,twodrop
.word over,over,exit
#C 2SWAP x1 x2 x3 x4 -- x3 x4 x1 x2 per diagram
# ROT >R ROT R> ;
head twoswap,5,"2swap",docolon,twodup
.word rot,tor,rot,rfrom,exit
#C 2OVER x1 x2 x3 x4 -- x1 x2 x3 x4 x1 x2
# >R >R 2DUP R> R> 2SWAP ;
head twoover,5,"2over",docolon,twoswap
.word tor,tor,twodup,rfrom,rfrom
.word twoswap,exit
# INPUT/OUTPUT ==================================
#C COUNT c-addr1 -- c-addr2 u counted->adr/len
# DUP CHAR+ SWAP C@ ;
head count,5,"count",docolon,twoover
.word dup,charplus,swap,cfetch,exit
#C CR -- output newline
#_ 0D EMIT 0A EMIT ;
head cr,2,"cr",docolon,count
.word lit,0x0a,emit,exit
#C SPACE -- output a space
# BL EMIT ;
head space,5,"space",docolon,cr
.word bl,emit,exit
#C SPACES n -- output n spaces
# BEGIN DUP WHILE SPACE 1- REPEAT DROP ;
head spaces,6,"spaces",docolon,space
spcs1: .word dup,qbranch,spcs2
.word space,oneminus,branch,spcs1
spcs2: .word drop,exit
#Z umin u1 u2 -- u unsigned minimum
#_ 2DUP U> IF SWAP THEN DROP ;
head umin,4,"umin",docolon,spaces
.word twodup,ugreater,qbranch,umin1,swap
umin1: .word drop,exit
#Z umax u1 u2 -- u unsigned maximum
# _ 2DUP U< IF SWAP THEN DROP ;
head umax,4,"umax",docolon,umin
.word twodup,uless,qbranch,umax1,swap
umax1: .word drop,exit
#C ACCEPT c-addr +n -- +n' get line from term'l
# OVER + 1- OVER -- sa ea a
# BEGIN KEY -- sa ea a c
# DUP 0D <> WHILE
# DUP EMIT -- sa ea a c
# DUP 8 = IF DROP 1- >R OVER R> UMAX
# ELSE OVER C! 1+ OVER UMIN
# THEN -- sa ea a
# REPEAT -- sa ea a c
# DROP NIP SWAP - ;
head accept,6,"accept",docolon,umax
.word over,plus,oneminus,over
acc1: .word key,dup,lit,0x0a,notequal,qbranch,acc5
.word dup,emit,dup,lit,8,equal,qbranch,acc3
.word drop,oneminus,tor,over,rfrom,umax
.word branch,acc4
acc3: .word over,cstore,oneplus,over,umin
acc4: .word branch,acc1
acc5: .word drop,nip,swap,minus,exit
#C TYPE c-addr +n -- type line to term'l
# ?DUP IF
# OVER + SWAP DO I C@ EMIT LOOP
# ELSE DROP THEN ;
head type,4,"type",docolon,accept
.word qdup,qbranch,typ4
.word over,plus,swap,xdo
typ3: .word ii,cfetch,emit,xloop,typ3
.word branch,typ5
typ4: .word drop
typ5: .word exit
#Z (S") -- c-addr u run-time code for S"
# R> COUNT 2DUP + ALIGNED >R ;
head xsquote,4,"(s\")",docolon,type
.word rfrom,count,twodup,plus,aligned
.word tor
.word exit
#C S" -- compile in-line string
# COMPILE (S") [ HEX ]
# 22 WORD C@ 1+ ALIGNED ALLOT ; IMMEDIATE
immed squote,2,"s\"",docolon,xsquote
.word lit,xsquote,commaxt
.word lit,0x22,word,cfetch,oneplus
.word aligned,allot,exit
#C ." -- compile string to print
# POSTPONE S" POSTPONE TYPE ; IMMEDIATE
immed dotquote,2,".\"",docolon,squote
.word squote
.word lit,type,commaxt
.word exit
# NUMERIC OUTPUT ================================
# Numeric conversion is done l.s.digit first, so
# the output buffer is built backwards in memory.
# Some double-precision arithmetic operators are
# needed to implement ANSI numeric conversion.
#Z UD/MOD ud1 u2 -- u3 ud4 32/16->32 divide
# >R 0 R@ UM/MOD ROT ROT R> UM/MOD ROT ;
head udslashmod,6,"ud/mod",docolon,dotquote
.word tor,lit,0,rfetch,umslashmod,rot,rot
.word rfrom,umslashmod,rot,exit
#Z UD* ud1 d2 -- ud3 32*16->32 multiply
# DUP >R UM* DROP SWAP R> UM* ROT + ;
head udstar,3,"ud*",docolon,udslashmod
.word dup,tor,umstar,drop
.word swap,rfrom,umstar,rot,plus,exit
#C HOLD char -- add char to output string
# -1 HP +! HP @ C! ;
head hold,4,"hold",docolon,udstar
.word lit,-1,hp,plusstore
.word hp,fetch,cstore,exit
#C <# -- begin numeric conversion
# PAD HP ! ; (initialize Hold Pointer)
head lessnum,2,"<#",docolon,hold
.word pad,hp,store,exit
#Z >digit n -- c convert to 0..9A..Z
# [ HEX ] DUP 9 > 7 AND + 30 + ;
head todigit,6,">digit",docolon,lessnum
.word dup,lit,0x9,greater,lit,0x27,and,plus
.word lit,0x30,plus,exit
#C # ud1 -- ud2 convert 1 digit of output
# BASE @ UD/MOD ROT >digit HOLD ;
head num,1,"#",docolon,todigit
.word base,fetch,udslashmod,rot,todigit
.word hold,exit
#C #S ud1 -- ud2 convert remaining digits
# BEGIN # 2DUP OR 0= UNTIL ;
head nums,2,"#s",docolon,num
nums1: .word num,twodup,or,zeroequal,qbranch,nums1
.word exit
#C #> ud1 -- c-addr u end conv., get string
# 2DROP HP @ PAD OVER - ;
head numgreater,2,"#>",docolon,nums
.word twodrop,hp,fetch,pad,over,minus
.word exit
#C SIGN n -- add minus sign if n<0
#_ 0< IF 2D HOLD THEN ;
head sign,4,"sign",docolon,numgreater
.word zeroless,qbranch,sign1,lit,0x2d,hold
sign1: .word exit
#C U. u -- display u unsigned
# <# 0 #S #> TYPE SPACE ;
head udot,2,"u.",docolon,sign
.word lessnum,lit,0,nums,numgreater,type
.word space,exit
#C . n -- display n signed
# <# DUP ABS 0 #S ROT SIGN #> TYPE SPACE ;
head dot,1,".",docolon,udot
.word lessnum,dup,abs,lit,0,nums
.word rot,sign,numgreater
.word type,space,exit
#C DECIMAL -- set number base to decimal
# 10 BASE ! ;
head decimal,7,"decimal",docolon,dot
.word lit,10,base,store,exit
#X HEX -- set number base to hex
# 16 BASE ! ;
head hex,3,"hex",docolon,decimal
.word lit,16,base,store,exit
# DICTIONARY MANAGEMENT =========================
#C HERE -- addr returns dictionary ptr
# DP @ ;
head here,4,"here",docolon,hex
.word dp,fetch,exit
#C ALLOT n -- allocate n bytes in dict
# DP +! ;
head allot,5,"allot",docolon,here
.word dp,plusstore,exit
# Note: , and C, are only valid for combined
# Code and Data spaces.
#C , x -- append cell to dict
# HERE ! 1 CELLS ALLOT ;
head comma,1,",",docolon,allot
.word here,store,lit,1,cells,allot,exit
#C C, char -- append char to dict
# HERE C! 1 CHARS ALLOT ;
head ccomma,2,"c,",docolon,comma
.word here,cstore,lit,1,chars,allot,exit
# INTERPRETER ===================================
# Note that NFA>LFA, NFA>CFA, IMMED?, and FIND
# are dependent on the structure of the Forth
# header. This may be common across many CPUs,
# or it may be different.
#C SOURCE -- adr n current input buffer
# 'SOURCE 2@ ; length is at lower adrs
head source,6,"source",docolon,ccomma
.word ticksource,twofetch,exit
#X /STRING a u n -- a+n u-n trim string
# ROT OVER + ROT ROT - ;
head slashstring,7,"/string",docolon,source
.word rot,over,plus,rot,rot,minus,exit
#Z >counted src n dst -- copy to counted str
# 2DUP C! CHAR+ SWAP CMOVE ;
head tocounted,8,">counted",docolon,slashstring
.word twodup,cstore,charplus,swap,cmove,exit
#C WORD char -- c-addr n word delim'd by char
# DUP SOURCE >IN @ /STRING -- c c adr n
# DUP >R ROT SKIP -- c adr' n'
# OVER >R ROT SCAN -- adr" n"
# DUP IF CHAR- THEN skip trailing delim.
# R> R> ROT - >IN +! update >IN offset
# TUCK - -- adr' N
# HERE >counted --
# HERE -- a
# BL OVER COUNT + C! ; append trailing blank
head word,4,"word",docolon,tocounted
.word dup,source,toin,fetch,slashstring
.word dup,tor,rot,skip
.word over,tor,rot,scan
.word dup,qbranch,word1,charminus
word1: .word rfrom,rfrom,rot,minus,toin,plusstore
.word tuck,minus
.word here,tocounted,here
.word bl,over,count,plus,cstore,exit
#Z NFA>LFA nfa -- lfa name adr -> link field
#_ 3 - ;
# Here -8
head nfatolfa,7,"nfa>lfa",docolon,word
.word lit,8,minus,exit
#Z NFA>CFA nfa -- cfa name adr -> code field
# COUNT 7F AND + ; mask off 'smudge' bit
# Needs testing
head nfatocfa,7,"nfa>cfa",docolon,nfatolfa
.word count,lit,0x7f,and,plus
.word aligned
.word exit
#Z IMMED? nfa -- f fetch immediate flag
#_ 1- C@ ; nonzero if immed
# Here -4
head immedq,6,"immed?",docolon,nfatocfa
.word lit,4,minus,fetch,exit
#C FIND c-addr -- c-addr 0 if not found
#C xt 1 if immediate
#C xt -1 if "normal"
# LATEST @ BEGIN -- a nfa
# 2DUP OVER C@ CHAR+ -- a nfa a nfa n+1
# S= -- a nfa f
# DUP IF
# DROP
# NFA>LFA @ DUP -- a link link
# THEN
#_ 0= UNTIL -- a nfa OR a 0
# DUP IF
# NIP DUP NFA>CFA -- nfa xt
# SWAP IMMED? -- xt iflag
#_ 0= 1 OR -- xt 1/-1
# THEN ;
head find,4,"find",docolon,immedq
.word latest,fetch
find1: .word twodup,over,cfetch,charplus
.word sequal,dup,qbranch,find2
.word drop,nfatolfa,fetch,dup
find2: .word zeroequal,qbranch,find1
.word dup,qbranch,find3
.word nip,dup,nfatocfa
.word swap,immedq,zeroequal,lit,1,or
find3: .word exit
#C LITERAL x -- append numeric literal
# STATE @ IF ['] LIT ,XT , THEN ; IMMEDIATE
# This tests STATE so that it can also be used
# interpretively. (ANSI doesn't require this.)
immed literal,7,"literal",docolon,find
.word state,fetch,qbranch,liter1
.word lit,lit,commaxt,comma
liter1: .word exit
#Z DIGIT? c -- n -1 if c is a valid digit
#Z -- x 0 otherwise
# [ HEX ] DUP 39 > 100 AND + silly looking
# DUP 140 > 107 AND - 30 - but it works!
# DUP BASE @ U< ;
head digitq,6,"digit?",docolon,literal
.word dup,lit,0x39,greater,lit,0x100,and,plus
.word dup,lit,0x160,greater,lit,0x127,and
.word minus,lit,0x30,minus
.word dup,base,fetch,uless,exit
#Z ?SIGN adr n -- adr' n' f get optional sign
#Z advance adr/n if sign; return NZ if negative
# OVER C@ -- adr n c
#_ 2C - DUP ABS 1 = AND -- +=-1, -=+1, else 0
# DUP IF 1+ -- +=0, -=+2
# >R 1 /STRING R> -- adr' n' f
# THEN ;
head qsign,5,"?sign",docolon,digitq
.word over,cfetch,lit,0x2c,minus,dup,abs
.word lit,1,equal,and,dup,qbranch,qsign1
.word oneplus,tor,lit,1,slashstring,rfrom
qsign1: .word exit
#C >NUMBER ud adr u -- ud' adr' u'
#C convert string to number
# BEGIN
# DUP WHILE
# OVER C@ DIGIT?
#_ 0= IF DROP EXIT THEN
# >R 2SWAP BASE @ UD*
# R> M+ 2SWAP
#_ 1 /STRING
# REPEAT ;
head tonumber,7,">number",docolon,qsign
tonum1: .word dup,qbranch,tonum3
.word over,cfetch,digitq
.word zeroequal,qbranch,tonum2,drop,exit
tonum2: .word tor,twoswap,base,fetch,udstar
.word rfrom,mplus,twoswap
.word lit,1,slashstring,branch,tonum1
tonum3: .word exit
#Z ?NUMBER c-addr -- n -1 string->number
#Z -- c-addr 0 if convert error
# DUP 0 0 ROT COUNT -- ca ud adr n
# ?SIGN >R >NUMBER -- ca ud adr' n'
# IF R> 2DROP 2DROP 0 -- ca 0 (error)
# ELSE 2DROP NIP R>
# IF NEGATE THEN -1 -- n -1 (ok)
# THEN ;
head qnumber,7,"?number",docolon,tonumber
.word dup,lit,0,dup,rot,count
.word qsign,tor,tonumber,qbranch,qnum1
.word rfrom,twodrop,twodrop,lit,0
.word branch,qnum3
qnum1: .word twodrop,nip,rfrom,qbranch,qnum2,negate
qnum2: .word lit,-1
qnum3: .word exit
#Z INTERPRET i*x c-addr u -- j*x
#Z interpret given buffer
# This is a common factor of EVALUATE and QUIT.
# ref. dpANS-6, 3.4 The Forth Text Interpreter
# 'SOURCE 2! 0 >IN !
# BEGIN
# BL WORD DUP C@ WHILE -- textadr
# FIND -- a 0/1/-1
# ?DUP IF -- xt 1/-1
#_ 1+ STATE @ 0= OR immed or interp?
# IF EXECUTE ELSE ,XT THEN
# ELSE -- textadr
# ?NUMBER
# IF POSTPONE LITERAL converted ok
# ELSE COUNT TYPE 3F EMIT CR ABORT err
# THEN
# THEN
# REPEAT DROP ;
head interpret,9,"interpret",docolon,qnumber
.word ticksource,twostore,lit,0,toin,store
inter1: .word bl,word,dup,cfetch,qbranch,inter9
.word find
.word qdup,qbranch,inter4
.word oneplus,state,fetch
.word zeroequal,or
.word qbranch,inter2
.word execute
.word branch,inter3
inter2: .word commaxt
inter3: .word branch,inter8
inter4: .word qnumber,qbranch,inter5
.word literal,branch,inter6
inter5: .word count,type,lit,0x3f,emit,cr,abort
inter6:
inter8: .word branch,inter1
inter9: .word drop,exit
#C EVALUATE i*x c-addr u -- j*x interprt string
# 'SOURCE 2@ >R >R >IN @ >R
# INTERPRET
# R> >IN ! R> R> 'SOURCE 2! ;
head evaluate,8,"evaluate",docolon,interpret
.word ticksource,twofetch,tor,tor
.word toin,fetch,tor,interpret
.word rfrom,toin,store,rfrom,rfrom
.word ticksource,twostore,exit
#C QUIT -- R: i*x -- interpret from kbd
# L0 LP ! R0 RP! 0 STATE !
# BEGIN
# TIB DUP TIBSIZE ACCEPT SPACE
# INTERPRET
# STATE @ 0= IF CR ." OK" THEN
# AGAIN ;
head quit,4,"quit",docolon,evaluate
.word l0,lp,store
.word r0,rpstore,lit,0,state,store
quit1: .word tib,dup,tibsize,accept,space
.word interpret
.word state,fetch,zeroequal,qbranch,quit2
.word cr,xsquote
.byte 3
.ascii "ok "
.align
/* .align would add 4 bytes here */
.word type
/* .word lit,0x1e,emit drop serial receive queue */
quit2: .word branch,quit1
#C ABORT i*x -- R: j*x -- clear stk & QUIT
# S0 SP! QUIT ;
head abort,5,"abort",docolon,quit
/* .word lit,0x1e,emit drop serial receive queue */
.word s0,spstore,quit /* quit never returns */
#Z ?ABORT f c-addr u -- abort & print msg
# ROT IF TYPE ABORT THEN 2DROP ;
head qabort,6,"?abort",docolon,abort
.word rot,qbranch,qabo1,type,abort
qabo1: .word twodrop,exit
#C ABORT" i*x 0 -- i*x R: j*x -- j*x x1=0
#C i*x x1 -- R: j*x -- x1<>0
# POSTPONE S" POSTPONE ?ABORT ; IMMEDIATE
immed abortquote,6,"abort\"",docolon,qabort
.word squote
.word lit,qabort,commaxt
.word exit
#C ' -- xt find word in dictionary
# BL WORD FIND
#_ 0= ABORT" ?" ;
head tick,1,"'",docolon,abortquote
.word bl,word,find,zeroequal,xsquote
.byte 1
.ascii "?"
.align
.word qabort,exit
#C CHAR -- char parse ASCII character
# BL WORD 1+ C@ ;
head char,4,"char",docolon,tick
.word bl,word,oneplus,cfetch,exit
#C [CHAR] -- compile character literal
# CHAR ['] LIT ,XT , ; IMMEDIATE
immed bracchar,6,"[char]",docolon,char
.word char
.word lit,lit,commaxt
.word comma,exit
#C ( -- skip input until )
# [ HEX ] 29 WORD DROP ; IMMEDIATE
immed paren,1,"(",docolon,bracchar
.word lit,0x29,word,drop,exit
# COMPILER ======================================
#C CREATE -- create an empty definition
# LATEST @ , 0 C, link & immed field
# HERE LATEST ! new "latest" link
# BL WORD C@ 1+ ALLOT name field
# docreate ,CF code field
# It's a bit different there
head create,6,"create",docolon,paren
.word latest,fetch,comma,lit,0,comma
.word here,latest,store
.word bl,word,cfetch,oneplus,aligned,allot
.word lit,docreate,commacf
.word exit
#Z (DOES>) -- run-time action of DOES>
# R> adrs of headless DOES> def'n
# LATEST @ NFA>CFA code field to fix up
# !CF ;
head xdoes,7,"(does>)",docolon,create
.word rfrom,latest,fetch,nfatocfa,storecf
.word exit
#C DOES> -- change action of latest def'n
# COMPILE (DOES>)
# dodoes ,CF ; IMMEDIATE
immed does,5,"does>",docolon,xdoes
.word lit,xdoes,commaxt
# compiles "mov r3, lr"
.word lit,0xe1a0300e,comma
.word lit,dodoes,commacf,exit
#C RECURSE -- recurse current definition
# LATEST @ NFA>CFA ,XT ; IMMEDIATE
immed recurse,7,"recurse",docolon,does
.word latest,fetch,nfatocfa,commaxt,exit
#C [ -- enter interpretive state
#_ 0 STATE ! ; IMMEDIATE
immed leftbracket,1,"[",docolon,recurse
.word lit,0,state,store,exit
#C ] -- enter compiling state
#_ -1 STATE ! ;
head rightbracket,1,"]",docolon,leftbracket
.word lit,-1,state,store,exit
#Z HIDE -- "hide" latest definition
# LATEST @ DUP C@ 80 OR SWAP C! ;
head hide,4,"hide",docolon,rightbracket
.word latest,fetch,dup,cfetch,lit,0x80,or
.word swap,cstore,exit
#Z REVEAL -- "reveal" latest definition
# LATEST @ DUP C@ 7F AND SWAP C! ;
head reveal,6,"reveal",docolon,hide
.word latest,fetch,dup,cfetch,lit,0x7f,and
.word swap,cstore,exit
#C IMMEDIATE -- make last def'n immediate
#_ 1 LATEST @ 1- C! ; set immediate flag
# It's a bit different there
head immediate,9,"immediate",docolon,reveal
.word lit,1,latest,fetch,lit,4,minus,store
.word exit
#C : -- begin a colon definition
# CREATE HIDE ] !COLON ;
head colon,1,":",docolon,immediate
.word create,hide,rightbracket,storcolon
.word exit
#C ;
# REVEAL ,EXIT
# POSTPONE [ ; IMMEDIATE
# immed SEMICOLON,1,";",docolon,COLON
.align
.word link_colon
.word 1
link_semicolon:
.byte 1
.byte 0x3b
.align
semicolon:
bl docolon
.word reveal,cexit
.word leftbracket,exit
#C ['] -- find word & compile as literal
# ' ['] LIT ,XT , ; IMMEDIATE
# When encountered in a colon definition, the
# phrase ['] xxx will cause LIT,xxt to be
# compiled into the colon definition
# (where xxt is the execution token of word xxx).
# When the colon definition executes, xxt will
# be put on the stack. (All xt's are one cell.)
immed bractick,3,"[']",docolon,semicolon
.word tick /* get xt of 'xxx' */
.word lit,lit,commaxt /* append lit action */
.word comma,exit /* append xt literal */
#C POSTPONE -- postpone compile action of word
# BL WORD FIND
# DUP 0= ABORT" ?"
#_ 0< IF -- xt non immed: add code to current
# def'n to compile xt later.
# ['] LIT ,XT , add "LIT,xt,COMMAXT"
# ['] ,XT ,XT to current definition
# ELSE ,XT immed: compile into cur. def'n
# THEN ; IMMEDIATE
immed postpone,8,"postpone",docolon,bractick
.word bl,word,find,dup,zeroequal,xsquote
.byte 1
.ascii "?"
.align
.word qabort,zeroless,qbranch,post1
.word lit,lit,commaxt,comma
.word lit,commaxt,commaxt,branch,post2
post1: .word commaxt
post2: .word exit
#Z COMPILE -- append inline execution token
# R> DUP CELL+ >R @ ,XT ;
# The phrase ['] xxx ,XT appears so often that
# this word was created to combine the actions
# of LIT and ,XT. It takes an inline literal
# execution token and appends it to the dict.
head compile,7,"compile",docolon,postpone
.word rfrom,dup,cellplus,tor
.word fetch,commaxt,exit
# N.B.: not used in the current implementation
# CONTROL STRUCTURES ============================
#C IF -- adrs conditional forward branch
# ['] qbranch ,BRANCH HERE DUP ,DEST ;
# IMMEDIATE
immed if,2,"if",docolon,compile
.word lit,qbranch,commabranch
.word here,dup,commadest,exit
#C THEN adrs -- resolve forward branch
# HERE SWAP !DEST ; IMMEDIATE
immed then,4,"then",docolon,if
.word here,swap,storedest,exit
#C ELSE adrs1 -- adrs2 branch for IF..ELSE
# ['] branch ,BRANCH HERE DUP ,DEST
# SWAP POSTPONE THEN ; IMMEDIATE
immed else,4,"else",docolon,then
.word lit,branch,commabranch
.word here,dup,commadest
.word swap,then,exit
#C BEGIN -- adrs target for bwd. branch
# HERE ; IMMEDIATE
immed begin,5,"begin",docolon,else
.word here,exit
#C UNTIL adrs -- conditional backward branch
# ['] qbranch ,BRANCH ,DEST ; IMMEDIATE
# conditional backward branch
immed until,5,"until",docolon,begin
.word lit,qbranch,commabranch
.word commadest,exit
#X AGAIN adrs -- uncond'l backward branch
# ['] branch ,BRANCH ,DEST ; IMMEDIATE
# unconditional backward branch
immed again,5,"again",docolon,until
.word lit,branch,commabranch
.word commadest,exit
#C WHILE -- adrs branch for WHILE loop
# POSTPONE IF ; IMMEDIATE
immed while,5,"while",docolon,again
.word if,exit
#C REPEAT adrs1 adrs2 -- resolve WHILE loop
# SWAP POSTPONE AGAIN POSTPONE THEN ; IMMEDIATE
immed repeat,6,"repeat",docolon,while
.word swap,again,then,exit
#Z >L x -- L: -- x move to leave stack
# CELL LP +! LP @ ! ; (L stack grows up)
head tol,2,">l",docolon,repeat
.word cell,lp,plusstore,lp,fetch,store,exit
#Z L> -- x L: x -- move from leave stack
# LP @ @ CELL NEGATE LP +! ;
head lfrom,2,"l>",docolon,tol
.word lp,fetch,fetch
.word cell,negate,lp,plusstore,exit
#C DO -- adrs L: -- 0
# ['] xdo ,XT HERE target for bwd branch
#_ 0 >L ; IMMEDIATE marker for LEAVEs
immed do,2,"do",docolon,lfrom
.word lit,xdo,commaxt,here
.word lit,0,tol,exit
#Z ENDLOOP adrs xt -- L: 0 a1 a2 .. aN --
# ,BRANCH ,DEST backward loop
# BEGIN L> ?DUP WHILE POSTPONE THEN REPEAT ;
# resolve LEAVEs
# This is a common factor of LOOP and +LOOP.
head endloop,7,"endloop",docolon,do
.word commabranch,commadest
loop1: .word lfrom,qdup,qbranch,loop2
.word then,branch,loop1
loop2: .word exit
#C LOOP adrs -- L: 0 a1 a2 .. aN --
# ['] xloop ENDLOOP ; IMMEDIATE
immed loop,4,"loop",docolon,endloop
.word lit,xloop,endloop,exit
#C +LOOP adrs -- L: 0 a1 a2 .. aN --
# ['] xplusloop ENDLOOP ; IMMEDIATE
immed plusloop,5,"+loop",docolon,loop
.word lit,xplusloop,endloop,exit
#C LEAVE -- L: -- adrs
# ['] UNLOOP ,XT
# ['] branch ,BRANCH HERE DUP ,DEST >L
# ; IMMEDIATE unconditional forward branch
immed leave,5,"leave",docolon,plusloop
.word lit,unloop,commaxt
.word lit,branch,commabranch
.word here,dup,commadest,tol,exit
# OTHER OPERATIONS ==============================
#X WITHIN n1|u1 n2|u2 n3|u3 -- f n2<=n1<n3?
# OVER - >R - R> U< ; per ANS document
head within,6,"within",docolon,leave
.word over,minus,tor,minus,rfrom,uless,exit
#C MOVE addr1 addr2 u -- smart move
# VERSION FOR 1 ADDRESS UNIT = 1 CHAR
# >R 2DUP SWAP DUP R@ + -- ... dst src src+n
# WITHIN IF R> CMOVE> src <= dst < src+n
# ELSE R> CMOVE THEN ; otherwise
# head move,4,"move",docolon,within
# .word tor,twodup,swap,dup,rfetch,plus
# .word within,qbranch,move1
# .word rfrom,cmoveup,branch,move2
#move1: .word rfrom,cmove
#move2: .word exit
#C MOVE addr1 addr2 u -- assembly move
codeh move,4,"move",within
ldr r4, [sp], #4 /* addr2 */
ldr r5, [sp], #4 /* addr1 */
cmp r1, #0
ble move2
move1:
ldr r6, [r5], #4
str r6, [r4], #4
subs r1, r1, #4
bgt move1
move2:
ldr r1, [sp], #4 /* pop new TOS */
next
#C DEPTH -- +n number of items on stack
# SP@ S0 SWAP - 2/ ; 16-BIT VERSION!
#_ 32-bit version
head depth,5,"depth",docolon,move
.word spfetch,s0,swap,minus,twoslash,twoslash,exit
#C ENVIRONMENT? c-addr u -- false system query
# -- i*x true
#_ 2DROP 0 ; the minimal definition!
head environmentq,12,"environment?",docolon,depth
.word twodrop,lit,0,exit
# UTILITY WORDS AND STARTUP =====================
#X WORDS -- list all words in dict.
# LATEST @ BEGIN
# DUP COUNT TYPE SPACE
# NFA>LFA @
# DUP 0= UNTIL
# DROP ;
head words,5,"words",docolon,environmentq
.word latest,fetch
wds1: .word dup,count,type,space,nfatolfa,fetch
.word dup,zeroequal,qbranch,wds1
.word drop,exit
#X .S -- print stack contents
# SP@ S0 - IF
# SP@ S0 2 - DO I @ U. -2 +LOOP
# THEN ;
#_ 32-bit version
head dots,2,".s",docolon,words
.word spfetch,s0,minus,qbranch,dots2
.word spfetch,s0,lit,4,minus,xdo
dots1: .word ii,fetch,udot,lit,-4,xplusloop,dots1
dots2: .word exit
#Z COLD -- cold start Forth system
# UINIT U0 #INIT CMOVE init user area
# 80 COUNT INTERPRET interpret CP/M cmd
# ." Z80 CamelForth etc."
# ABORT ;
head cold,4,cold,docolon,dots
.word uinit,u0,ninit,cmove
.word xsquote
.byte 28
.ascii "type forth my friend... "
.byte 0x0a
.align
.word type,s0,spstore,quit /* abort never returns */
|
extern/game_support/stm32f4/src/stm32f4-sdram.ads | AdaCore/training_material | 15 | 23158 | with STM32F4.FMC; use STM32F4.FMC;
package STM32F4.SDRAM is
Bank_Address : constant := 16#D000_0000#;
procedure Initialize;
private
SDRAM_MEMORY_WIDTH : constant := FMC_SDMemory_Width_16b;
SDRAM_CAS_LATENCY : constant := FMC_CAS_Latency_3;
SDCLOCK_PERIOD : constant := FMC_SDClock_Period_2;
SDRAM_READBURST : constant := FMC_Read_Burst_Disable;
SDRAM_MODEREG_BURST_LENGTH_1 : constant := 16#0000#;
SDRAM_MODEREG_BURST_LENGTH_2 : constant := 16#0001#;
SDRAM_MODEREG_BURST_LENGTH_4 : constant := 16#0002#;
SDRAM_MODEREG_BURST_LENGTH_8 : constant := 16#0004#;
SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL : constant := 16#0000#;
SDRAM_MODEREG_BURST_TYPE_INTERLEAVED : constant := 16#0008#;
SDRAM_MODEREG_CAS_LATENCY_2 : constant := 16#0020#;
SDRAM_MODEREG_CAS_LATENCY_3 : constant := 16#0030#;
SDRAM_MODEREG_OPERATING_MODE_STANDARD : constant := 16#0000#;
SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED : constant := 16#0000#;
SDRAM_MODEREG_WRITEBURST_MODE_SINGLE : constant := 16#0200#;
end STM32F4.SDRAM;
|
libsrc/_DEVELOPMENT/font/fzx/z80/__fzx_puts_single_spacing.asm | meesokim/z88dk | 0 | 166629 |
SECTION code_font_fzx
PUBLIC __fzx_puts_single_spacing
__fzx_puts_single_spacing:
; enter : ix = struct fzx_state *
;
; exit : de = font_height
; hl = y + font_height
;
; uses : f, de, hl
ld l,(ix+3)
ld h,(ix+4) ; hl = struct fzx_font *
ld e,(hl)
ld d,0 ; de = font height
ld l,(ix+7)
ld h,(ix+8) ; hl = fzx_state.y
add hl,de
ret
|
programs/oeis/324/A324903.asm | neoneye/loda | 22 | 86871 | <filename>programs/oeis/324/A324903.asm
; A324903: a(n) = 1 if A007814(sigma(n)) > A007814(n), 0 otherwise. Here A007814(n) gives the 2-adic valuation of n.
; 0,0,1,0,1,1,1,0,0,0,1,0,1,1,1,0,1,0,1,0,1,1,1,0,0,0,1,1,1,1,1,0,1,0,1,0,1,1,1,0,1,1,1,0,1,1,1,0,0,0,1,0,1,1,1,0,1,0,1,1,1,1,1,0,1,1,1,0,1,1,1,0,1,0,1,0,1,1,1,0,0,0,1,1,1,1,1,0,1,0,1,1,1,1,1,0,1,0,1,0
mul $0,2
add $0,1
seq $0,17666 ; Denominator of sum of reciprocals of divisors of n.
mod $0,2
|
msp430-gcc-tics/msp430-gcc-7.3.1.24-source-full/gcc/gcc/testsuite/gnat.dg/opt56.adb | TUDSSL/TICS | 7 | 6246 | <gh_stars>1-10
-- { dg-do compile }
-- { dg-options "-O3" }
package body Opt56 is
function F (Values : Vector) return Boolean is
Result : Boolean := True;
begin
for I in Values'Range loop
Result := Result and Values (I) >= 0.0;
end loop;
return Result;
end;
end Opt56;
|
test/Succeed/Issue1391.agda | shlevy/agda | 1,989 | 17279 | <gh_stars>1000+
-- Andreas, 2014-01-09, extend parser of typed bindings to allow hiding
postulate
_≡_ : ∀{A : Set} (a b : A) → Set
List : Set → Set
_++_ : ∀{A : Set} (xs ys : List A) → List A
assoc : ∀{A : Set} (xs {ys} {zs} : List A) → ((xs ++ ys) ++ zs) ≡ (xs ++ (ys ++ zs))
assoc1 : ∀{A : Set} (xs {ys zs} : List A) → ((xs ++ ys) ++ zs) ≡ (xs ++ (ys ++ zs))
test : (xs {ys zs} _ us : Set) → Set
test1 : .(xs {ys zs} _ us : Set) → Set
test2 : ..(xs {ys zs} _ us : Set) → Set
|
pixy/src/host/pantilt_in_ada/specs/x86_64_linux_gnu_bits_timex_h.ads | GambuzX/Pixy-SIW | 1 | 15586 | <filename>pixy/src/host/pantilt_in_ada/specs/x86_64_linux_gnu_bits_timex_h.ads
--
-- Copyright (c) 2015, <NAME> <<EMAIL>>
--
-- Permission to use, copy, modify, and/or distribute this software for any
-- purpose with or without fee is hereby granted, provided that the above copyright
-- notice and this permission notice appear in all copies.
--
-- THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH REGARD
-- TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS. IN
-- NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
-- CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
-- PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
-- ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
--
pragma Ada_2005;
pragma Style_Checks (Off);
with Interfaces.C; use Interfaces.C;
with x86_64_linux_gnu_bits_types_h;
with x86_64_linux_gnu_bits_time_h;
package x86_64_linux_gnu_bits_timex_h is
-- unsupported macro: ADJ_OFFSET 0x0001
-- unsupported macro: ADJ_FREQUENCY 0x0002
-- unsupported macro: ADJ_MAXERROR 0x0004
-- unsupported macro: ADJ_ESTERROR 0x0008
-- unsupported macro: ADJ_STATUS 0x0010
-- unsupported macro: ADJ_TIMECONST 0x0020
-- unsupported macro: ADJ_TAI 0x0080
-- unsupported macro: ADJ_MICRO 0x1000
-- unsupported macro: ADJ_NANO 0x2000
-- unsupported macro: ADJ_TICK 0x4000
-- unsupported macro: ADJ_OFFSET_SINGLESHOT 0x8001
-- unsupported macro: ADJ_OFFSET_SS_READ 0xa001
-- unsupported macro: MOD_OFFSET ADJ_OFFSET
-- unsupported macro: MOD_FREQUENCY ADJ_FREQUENCY
-- unsupported macro: MOD_MAXERROR ADJ_MAXERROR
-- unsupported macro: MOD_ESTERROR ADJ_ESTERROR
-- unsupported macro: MOD_STATUS ADJ_STATUS
-- unsupported macro: MOD_TIMECONST ADJ_TIMECONST
-- unsupported macro: MOD_CLKB ADJ_TICK
-- unsupported macro: MOD_CLKA ADJ_OFFSET_SINGLESHOT
-- unsupported macro: MOD_TAI ADJ_TAI
-- unsupported macro: MOD_MICRO ADJ_MICRO
-- unsupported macro: MOD_NANO ADJ_NANO
-- unsupported macro: STA_PLL 0x0001
-- unsupported macro: STA_PPSFREQ 0x0002
-- unsupported macro: STA_PPSTIME 0x0004
-- unsupported macro: STA_FLL 0x0008
-- unsupported macro: STA_INS 0x0010
-- unsupported macro: STA_DEL 0x0020
-- unsupported macro: STA_UNSYNC 0x0040
-- unsupported macro: STA_FREQHOLD 0x0080
-- unsupported macro: STA_PPSSIGNAL 0x0100
-- unsupported macro: STA_PPSJITTER 0x0200
-- unsupported macro: STA_PPSWANDER 0x0400
-- unsupported macro: STA_PPSERROR 0x0800
-- unsupported macro: STA_CLOCKERR 0x1000
-- unsupported macro: STA_NANO 0x2000
-- unsupported macro: STA_MODE 0x4000
-- unsupported macro: STA_CLK 0x8000
-- unsupported macro: STA_RONLY (STA_PPSSIGNAL | STA_PPSJITTER | STA_PPSWANDER | STA_PPSERROR | STA_CLOCKERR | STA_NANO | STA_MODE | STA_CLK)
type timex is record
modes : aliased unsigned; -- /usr/include/x86_64-linux-gnu/bits/timex.h:27
offset : aliased x86_64_linux_gnu_bits_types_h.uu_syscall_slong_t; -- /usr/include/x86_64-linux-gnu/bits/timex.h:28
freq : aliased x86_64_linux_gnu_bits_types_h.uu_syscall_slong_t; -- /usr/include/x86_64-linux-gnu/bits/timex.h:29
maxerror : aliased x86_64_linux_gnu_bits_types_h.uu_syscall_slong_t; -- /usr/include/x86_64-linux-gnu/bits/timex.h:30
esterror : aliased x86_64_linux_gnu_bits_types_h.uu_syscall_slong_t; -- /usr/include/x86_64-linux-gnu/bits/timex.h:31
status : aliased int; -- /usr/include/x86_64-linux-gnu/bits/timex.h:32
c_constant : aliased x86_64_linux_gnu_bits_types_h.uu_syscall_slong_t; -- /usr/include/x86_64-linux-gnu/bits/timex.h:33
precision : aliased x86_64_linux_gnu_bits_types_h.uu_syscall_slong_t; -- /usr/include/x86_64-linux-gnu/bits/timex.h:34
tolerance : aliased x86_64_linux_gnu_bits_types_h.uu_syscall_slong_t; -- /usr/include/x86_64-linux-gnu/bits/timex.h:35
time : aliased x86_64_linux_gnu_bits_time_h.timeval; -- /usr/include/x86_64-linux-gnu/bits/timex.h:36
tick : aliased x86_64_linux_gnu_bits_types_h.uu_syscall_slong_t; -- /usr/include/x86_64-linux-gnu/bits/timex.h:37
ppsfreq : aliased x86_64_linux_gnu_bits_types_h.uu_syscall_slong_t; -- /usr/include/x86_64-linux-gnu/bits/timex.h:38
jitter : aliased x86_64_linux_gnu_bits_types_h.uu_syscall_slong_t; -- /usr/include/x86_64-linux-gnu/bits/timex.h:39
shift : aliased int; -- /usr/include/x86_64-linux-gnu/bits/timex.h:40
stabil : aliased x86_64_linux_gnu_bits_types_h.uu_syscall_slong_t; -- /usr/include/x86_64-linux-gnu/bits/timex.h:41
jitcnt : aliased x86_64_linux_gnu_bits_types_h.uu_syscall_slong_t; -- /usr/include/x86_64-linux-gnu/bits/timex.h:42
calcnt : aliased x86_64_linux_gnu_bits_types_h.uu_syscall_slong_t; -- /usr/include/x86_64-linux-gnu/bits/timex.h:43
errcnt : aliased x86_64_linux_gnu_bits_types_h.uu_syscall_slong_t; -- /usr/include/x86_64-linux-gnu/bits/timex.h:44
stbcnt : aliased x86_64_linux_gnu_bits_types_h.uu_syscall_slong_t; -- /usr/include/x86_64-linux-gnu/bits/timex.h:45
tai : aliased int; -- /usr/include/x86_64-linux-gnu/bits/timex.h:47
field_21 : aliased int;
field_22 : aliased int;
field_23 : aliased int;
field_24 : aliased int;
field_25 : aliased int;
field_26 : aliased int;
field_27 : aliased int;
field_28 : aliased int;
field_29 : aliased int;
field_30 : aliased int;
field_31 : aliased int;
end record;
pragma Convention (C_Pass_By_Copy, timex); -- /usr/include/x86_64-linux-gnu/bits/timex.h:25
end x86_64_linux_gnu_bits_timex_h;
|
2IMA/SystemesConcurrents/tp6/gtkada-builder.ads | LagOussama/enseeiht | 1 | 23986 | <filename>2IMA/SystemesConcurrents/tp6/gtkada-builder.ads
-----------------------------------------------------------------------
-- GtkAda - Ada95 binding for Gtk+/Gnome --
-- --
-- Copyright (C) 2011, AdaCore --
-- --
-- This library is free software; you can redistribute it and/or --
-- modify it under the terms of the GNU General Public --
-- License as published by the Free Software Foundation; either --
-- version 2 of the License, or (at your option) any later version. --
-- --
-- This library is distributed in the hope that it will be useful, --
-- but WITHOUT ANY WARRANTY; without even the implied warranty of --
-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU --
-- General Public License for more details. --
-- --
-- You should have received a copy of the GNU General Public --
-- License along with this library; if not, write to the --
-- Free Software Foundation, Inc., 59 Temple Place - Suite 330, --
-- Boston, MA 02111-1307, USA. --
-- --
-----------------------------------------------------------------------
-- <description>
--
-- This package provides a high-level API for using Gtk.Builder and
-- user interface files produced with the GUI builder glade-3.
--
-- Here is how to use this package:
--
-- Step 1: create a Builder and add the XML data, just as you would a
-- standard Gtk.Builder:
--
-- declare
-- Builder : Gtkada_Builder;
-- Error : GError;
-- begin
-- Gtk_New (Builder);
-- Error := Add_From_File (Builder, Default_Filename);
--
-- Step 2: add calls to "Register_Handler" to associate your handlers
-- with your callbacks.
--
-- Register_Handler
-- (Builder => Builder,
-- Handler_Name => "my_handler_id",
-- Handler => My_Handler'Access);
--
-- Where:
-- - Builder is your Gtkada_Builder,
-- - "my_handler_id" is the name of the handler as specified in
-- Glade-3, in the "Handler" column of the "Signals" tab for
-- your object,
-- - Handler is your Ada subprogram.
--
-- You will need one call to "Register_Handler" per handler
-- declared in the Glade-3 interface. If there is one or more
-- handler declared in Glade-3 which does not have an associated
-- call to Register_Handler, an ASSERT_FAILURE will be raised by
-- the Gtk main loop.
--
-- There are multiple way to call Register_Handler, see below.
--
-- Step 3: call Do_Connect.
--
-- Step 4: when the application terminates or all Windows described through
-- your builder should be closed, call Unref to free memory
-- associated with the Builder.
--
-- </description>
-- <group>GUI Builder</group>
pragma Ada_2005;
with Ada.Containers.Hashed_Maps;
with Ada.Strings.Unbounded; use Ada.Strings.Unbounded;
with Ada.Strings.Unbounded.Hash;
with Glib.Object; use Glib.Object;
with Gtk.Builder;
package Gtkada.Builder is
type Gtkada_Builder_Record is new
Gtk.Builder.Gtk_Builder_Record with private;
type Gtkada_Builder is access all Gtkada_Builder_Record'Class;
procedure Gtk_New (Builder : out Gtkada_Builder);
procedure Initialize (Builder : access Gtkada_Builder_Record'Class);
-- Create a new Gtkada_Builder.
procedure Do_Connect (Builder : access Gtkada_Builder_Record'Class);
-- Activate in the builder callabacks that have been connected using
-- calls to Register_Handler functions below.
--------------------------------------
-- Callbacks working on the Builder --
--------------------------------------
-- These callbacks take as parameter the Gtkada_Builder.
-- If a "User data" is present in the Glade-3, it will be ignored.
type Builder_Handler is access procedure
(Builder : access Gtkada_Builder_Record'Class);
type Builder_Return_Handler is access function
(User_Data : access Gtkada_Builder_Record'Class) return Boolean;
procedure Register_Handler
(Builder : access Gtkada_Builder_Record'Class;
Handler_Name : String;
Handler : Builder_Handler);
procedure Register_Handler
(Builder : access Gtkada_Builder_Record'Class;
Handler_Name : String;
Handler : Builder_Return_Handler);
--------------------------------------------------------------
-- Callbacks working on user data specified through Glade-3 --
--------------------------------------------------------------
-- Use these registry functions if your signal handler was defined in
-- the Glade-3 interface with a "User data". The parameter User_Data
-- passed to the handlers corresponds to the object entered in the
-- "User data" column in Glade-3.
type Object_Handler is access procedure
(User_Data : access GObject_Record'Class);
type Object_Return_Handler is access function
(User_Data : access GObject_Record'Class) return Boolean;
procedure Register_Handler
(Builder : access Gtkada_Builder_Record'Class;
Handler_Name : String;
Handler : Object_Handler);
procedure Register_Handler
(Builder : access Gtkada_Builder_Record'Class;
Handler_Name : String;
Handler : Object_Return_Handler);
private
type Handler_Type is (Object, Object_Return, Builder, Builder_Return);
type Universal_Marshaller (T : Handler_Type) is record
case T is
when Object =>
The_Object_Handler : Object_Handler;
when Object_Return =>
The_Object_Return_Handler : Object_Return_Handler;
when Builder =>
The_Builder_Handler : Builder_Handler;
when Builder_Return =>
The_Builder_Return_Handler : Builder_Return_Handler;
end case;
end record;
type Universal_Marshaller_Access is access Universal_Marshaller;
package Handlers_Map is new Ada.Containers.Hashed_Maps
(Key_Type => Unbounded_String,
Element_Type => Universal_Marshaller_Access,
Hash => Ada.Strings.Unbounded.Hash,
Equivalent_Keys => "=",
"=" => "=");
type Gtkada_Builder_Record is new
Gtk.Builder.Gtk_Builder_Record
with record
Handlers : Handlers_Map.Map;
end record;
end Gtkada.Builder;
|
source/nodes/program-nodes-root_types.ads | reznikmm/gela | 0 | 1159 | -- SPDX-FileCopyrightText: 2019 <NAME> <<EMAIL>>
--
-- SPDX-License-Identifier: MIT
-------------------------------------------------------------
with Program.Elements.Root_Types;
with Program.Element_Visitors;
package Program.Nodes.Root_Types is
pragma Preelaborate;
type Root_Type is
new Program.Nodes.Node and Program.Elements.Root_Types.Root_Type
and Program.Elements.Root_Types.Root_Type_Text
with private;
function Create return Root_Type;
type Implicit_Root_Type is
new Program.Nodes.Node and Program.Elements.Root_Types.Root_Type
with private;
function Create
(Is_Part_Of_Implicit : Boolean := False;
Is_Part_Of_Inherited : Boolean := False;
Is_Part_Of_Instance : Boolean := False)
return Implicit_Root_Type
with Pre =>
Is_Part_Of_Implicit or Is_Part_Of_Inherited or Is_Part_Of_Instance;
private
type Base_Root_Type is
abstract new Program.Nodes.Node and Program.Elements.Root_Types.Root_Type
with null record;
procedure Initialize (Self : in out Base_Root_Type'Class);
overriding procedure Visit
(Self : not null access Base_Root_Type;
Visitor : in out Program.Element_Visitors.Element_Visitor'Class);
overriding function Is_Root_Type (Self : Base_Root_Type) return Boolean;
overriding function Is_Type_Definition
(Self : Base_Root_Type)
return Boolean;
overriding function Is_Definition (Self : Base_Root_Type) return Boolean;
type Root_Type is
new Base_Root_Type and Program.Elements.Root_Types.Root_Type_Text
with null record;
overriding function To_Root_Type_Text
(Self : in out Root_Type)
return Program.Elements.Root_Types.Root_Type_Text_Access;
type Implicit_Root_Type is
new Base_Root_Type
with record
Is_Part_Of_Implicit : Boolean;
Is_Part_Of_Inherited : Boolean;
Is_Part_Of_Instance : Boolean;
end record;
overriding function To_Root_Type_Text
(Self : in out Implicit_Root_Type)
return Program.Elements.Root_Types.Root_Type_Text_Access;
overriding function Is_Part_Of_Implicit
(Self : Implicit_Root_Type)
return Boolean;
overriding function Is_Part_Of_Inherited
(Self : Implicit_Root_Type)
return Boolean;
overriding function Is_Part_Of_Instance
(Self : Implicit_Root_Type)
return Boolean;
end Program.Nodes.Root_Types;
|
oeis/163/A163627.asm | neoneye/loda-programs | 11 | 29011 | <reponame>neoneye/loda-programs
; A163627: Numbers n such that 42n + 5 is prime.
; Submitted by <NAME>
; 0,1,2,3,4,6,9,11,12,14,16,17,18,21,22,23,24,26,28,29,31,34,37,38,43,47,49,54,56,57,58,62,64,66,67,68,69,79,81,82,83,84,86,87,88,93,97,102,104,106,109,113,114,116,117,119,121,123,126,128,131,133,136,138,139,141,143,144,148,149,152,154,157,166,167,169,171,172,178,179,181,182,183,186,188,192,193,196,199,201,204,207,208,209,211,213,218,219,223,224
mov $2,$0
pow $2,2
mov $4,4
lpb $2
mov $3,$4
seq $3,10051 ; Characteristic function of primes: 1 if n is prime, else 0.
sub $0,$3
mov $1,$0
max $1,0
cmp $1,$0
mul $2,$1
sub $2,1
add $4,42
lpe
mov $0,$4
div $0,42
|
programs/oeis/195/A195176.asm | neoneye/loda | 22 | 241959 | <reponame>neoneye/loda<gh_stars>10-100
; A195176: a(n) = 3*n - floor(n*sqrt(2)).
; 0,2,4,5,7,8,10,12,13,15,16,18,20,21,23,24,26,27,29,31,32,34,35,37,39,40,42,43,45,46,48,50,51,53,54,56,58,59,61,62,64,66,67,69,70,72,73,75,77,78,80,81,83,85,86,88,89,91,92,94,96,97,99,100,102,104,105,107,108,110,112,113,115,116,118,119,121,123,124,126,127,129,131,132,134,135,137,138,140,142,143,145,146,148,150,151,153,154,156,157
mov $2,1
lpb $2
sub $2,1
mov $3,$0
mov $5,2
lpb $5
mov $0,$3
sub $0,1
mov $4,$3
sub $5,1
mov $6,$0
mov $7,0
lpb $4
mov $0,$6
sub $4,1
sub $0,$4
max $0,1
seq $0,144611 ; Sturmian word of slope 2-sqrt(2).
add $0,1
add $7,$0
lpe
mov $0,$7
lpe
lpe
|
oeis/064/A064328.asm | neoneye/loda-programs | 11 | 99354 | <gh_stars>10-100
; A064328: Generalized Catalan numbers C(-6; n).
; Submitted by <NAME>
; 1,1,-5,61,-917,15421,-277733,5239117,-102188021,2044131037,-41706059525,864547613293,-18157111255829,385517710342909,-8261602828082213,178459989617336461,-3881680470161846837,84943651197028125469,-1868825086212694832453,41312138423534085851821,-917154584215369240114517,20439947295260141692186429,-457121686362429652836352613,10255631957510026441880979661,-230755948470496257906170178677,5205941498707385569595008477021,-117736182568208015270837432615813,2668724684603547306754217438272237
mov $1,1
mov $3,$0
lpb $3
mov $0,$1
mul $0,12
mul $1,6
sub $2,2
sub $3,1
mul $1,$3
add $2,1
div $1,$2
add $4,$1
sub $1,$0
lpe
mov $0,$4
add $0,1
|
boot/print.asm | EmilNorden/tunaos | 0 | 170355 | ; ===== print_string =====
; prints a null-terminated string
; Input:
; BX - a pointer to the string to print
print_string:
pusha
mov ah, 0x0e ; BIOS tele-type output
print_string_loop:
mov cx, [bx]
cmp cl, 0
je print_string_stop
mov al, cl
int 0x10
add bx, 1
jmp print_string_loop
print_string_stop:
popa
ret
; prints a value in hexidecimal format to the display
; DX = Value to be printed
print_hex:
pusha
mov ax, 4 ; Loop counter
mov bx, HEX_OUT ; Set bx to base address of template string
add bx, 5 ; Add offset of 5 to point at the last character
ph_loop:
mov cx, dx ; Move the value into cx
and cx, 0xf ; AND with 15, all lower 4 bits set
cmp cx, 0xa ; Compare with 0xa (10)
jl ph_set_less_10 ; If lower than 10, jump to ph_set_less_10
add cx, 0x57 ; Else add offset 0x57 to cx (0x61 is 'a' in ASCII table, so if cx is 10(0xa) then 0x57+0xa=0x61)
jmp ph_end_set
ph_set_less_10:
add cx, 0x30 ; 0x30 is 0 on the ASCII table, so add that as an offset into cx
ph_end_set:
mov [bx], cl ; Move the ASCII character in cx to where bx is pointing
sub ax, 1 ; Decrement loop pointer
cmp ax, 0
je ph_done ; If ax == 0, jump to ph_done
; else
shr dx, 4 ; Shift dx right 4 bits
sub bx, 1 ; Move to the left in the hex string
jmp ph_loop
ph_done:
mov bx, HEX_OUT
call print_string
popa
ret
; Global variables
HEX_OUT: db '0x0000', 0 |
tests/src/test_utils-abstract_encoder-cobs_stream.adb | Fabien-Chouteau/COBS | 0 | 11423 | package body Test_Utils.Abstract_Encoder.COBS_Stream is
-------------
-- Receive --
-------------
overriding
procedure Receive (This : in out Instance; Data : Storage_Element)
is
begin
This.Encoder.Push (Data);
end Receive;
------------------
-- End_Of_Frame --
------------------
overriding
procedure End_Of_Frame (This : in out Instance) is
begin
This.Encoder.End_Frame;
for Elt of This.Encoder.Output loop
This.Push_To_Frame (Elt);
end loop;
This.Encoder.Output.Clear;
end End_Of_Frame;
------------
-- Update --
------------
overriding
procedure Update (This : in out Instance) is
begin
null;
end Update;
-----------------
-- End_Of_Test --
-----------------
overriding
procedure End_Of_Test (This : in out Instance) is
begin
This.Save_Frame;
end End_Of_Test;
-----------
-- Flush --
-----------
overriding
procedure Flush (This : in out Test_Instance; Data : Storage_Array) is
begin
for Elt of Data loop
This.Output.Append (Elt);
end loop;
end Flush;
end Test_Utils.Abstract_Encoder.COBS_Stream;
|
messagematch/src/main/antlr4/org/forwoods/messagematch/matchgrammar/Matcher.g4 | tomforwood/messagematch | 0 | 4255 | grammar Matcher;
@header {
}
INT:'$Int';
NUM:'$Num';
STRING:'$String';
INSTANT:'$Instant';
TIME:'$Time';
DATE:'$Date';
RE : '^'(RESC | RSAFE)* '^' ;
NUMBER : '-'?[0-9]+('.'[0-9]+)?EXP?;
IDENTIFIER : [a-zA-Z][a-zA-Z0-9]*;
multMatcher: matcher (LineFeed matcher)*;
matcher: (
typeMatcher | regexpMatcher
) ;
typeMatcher : type=(INT|NUM|STRING|INSTANT|TIME|DATE) (nullable='?')? (comp = comparator)? binding? genValue?;
regexpMatcher : '$' RE binding? genValue;
comparator : (op=('<'|'<='|'>'|'>=') val=valOrVar) |
(op=('+-'|'++') '(' val=valOrVar ',' eta=NUMBER ')');
valOrVar : (literal|variable);
variable: '$' IDENTIFIER;
genValue : ',' literal ;
literal : (REST+|NUMBER|IDENTIFIER);
binding : '=' IDENTIFIER;
LineFeed : [\r\n];
REST : ~ [\r\n]+?;
fragment RESC : '\\^';
fragment RSAFE : ~ [^];
fragment EXP
: [Ee] [+\-]? INT
;
|
strlib.asm | traidna/MUMPS-TI99-4A | 0 | 26281 | <reponame>traidna/MUMPS-TI99-4A
; string routines in TMS9900 ASM
; strlen
; counts bytes in a string passed on the stack
; returned in on the stack
strlen:
;mov r11,*r10+
pop r6
push r11
clr r7 ; lenght counter
slloop:
clr r3 ; clear r3 holding char
movb *r6+,r3 ; get next char
ci r3,0 ; is char 0
jeq sldone ; if yes done
inc r7 ; add one to length counter
jmp slloop ; loop back up for next one
;pop r11
sldone:
pop r11
push r7
b *r11
strcopy: ; copy string pointed to by r6 to address in r7
; assumes NULL termiated string
; call with bl @strcpy
push r11
push r3
cpyloop:
clr r3 ; clear r3 holding char
movb *r6+,r3 ; get next char
ci r3,0 ; is char 0
jeq cpydone ; if yes done
movb r3,*r7+ ; copy char to position in r7 and move r7 to next char
jmp cpyloop ; loop back up for next one
cpydone:
movb r3,*r7 ; terminate the string
pop r3
pop r11
b *r11 ; return tocaller
strcat: ; adds the string pointed to in R7 to the end for string in r6
; it's up to the caller to make sure there is space in r7
; find end of r7
push r11
push r6
push r7
clr r11
strcat2:
movb *r6+,r11 ; get current char
ci r11,0h ; is it the end of string
jne strcat2 ; if not keep going
dec r6 ; back to end of string
strcat3:
movb *r7+,r11 ; get next char of
movb r11,*r6+ ; add on end of r6
ci r11,0 ; is it end of string in r7?
jne strcat3 ; if not get next char
pop r7
pop r6
pop r11
b *r11
strcmp: ; compares two strings passed in with r6 and r7 return val in r5
; f6 is string 1, r7 is string 2
; return 1 if string 1 > string 2 r6 > r7
; return 0 if string 1 = string 2 r6 = r7
; return -1 if strint 1 < string 2 r6 < r7
clr r5
strcmp1 cb *r6,*r7
jeq sceq
jl sclt
li r5, 1
jmp scdone
strcmp2 inc r6
inc r7
jmp strcmp1
sceq: ; need to check if done
movb *r6,r5
ci r5,0
jne strcmp2
clr r5
jmp scdone
sclt: li r5,-1
scdone:
b *r11
|
Common/RFID_Emulator_rs232.asm | kbembedded/EM4100_Cloner | 66 | 176532 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ;;
;; ;;
; RFID Emulator - RS232 LIBRARY ;
;; ;;
;; ;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
#INCLUDE "p12f683.inc"
#INCLUDE "rs232.inc"
GLOBAL _initRS232, _ISRTimer2RS232, _txRS232, _ISRGPIORS232, _rs232PrintHexChar
GLOBAL RS232_FLAGS, RX_BYTE
EXTERN _nibbleHex2ASCII
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;; ;;;
;; VARIABLES ;;
;;; ;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
UDATA
RS232_FLAGS RES 1
TX_BYTE RES 1
TX_COUNTER RES 1
RX_BYTE RES 1
RX_COUNTER RES 1
TMP RES 1
TMP2 RES 1
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;; ;;;
;; CODE ;;
;;; ;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
CODE
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;; ;;;
;; ;;
; Function: _initRS232 ;
; Desc.: Initialize the RS232 ;
; Vars: ;
; ;
; Notes: ;
;; ;;
;;; ;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_initRS232
BANKSEL PIE1
BSF PIE1, TMR2IE ; Enable the TMR2 interruptions
; Configure the IO pins
BSF SERIAL_RX_TRIS
BCF SERIAL_TX_TRIS
BSF SERIAL_RX_IOC
CLRF ANSEL ; GPIO as digital IOs
BANKSEL T2CON ; TMR2 => Prescaler x4.No postscaler.STOPPED
MOVLW b'00000001'
MOVWF T2CON
BSF INTCON, GIE ; Enabling global, peripheral and GPIO interrupts
BSF INTCON, PEIE
BSF INTCON, GPIE
MOVLW 07h ; Disable the analog comparators
MOVWF CMCON0
BSF SERIAL_TX ; TX ~ HIGH
CLRF RS232_FLAGS
RETURN
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;; ;;;
;; ;;
; Function: _ISRTimer2RS232 ;
; Desc.: Timer2 Interruption Service Routine ;
; Vars: ;
; ;
; Notes: WARNING! It can return with the bank 1 selected ;
;; ;;
;;; ;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_ISRTimer2RS232
BCF PIR1, TMR2IF ; Clear the TMR2IF flag
BANKSEL PIE1 ; Bank 1
BTFSS PIE1, TMR2IE ; Check for ghost interrupts
RETURN ; WARNING! Return with the Bank 1 selected
BANKSEL GPIO ; Bank 0
;BCF RS232_FLAGS, FLAGS_WAITING_BAUD ; Clear the flags
BTFSS RS232_FLAGS, FLAGS_RECEIVING_DATA ; Receiving data?
GOTO _ISRTimer2RS232_TX_DATA ; TX DATA
; Receiving data!
MOVFW RX_COUNTER ; Check if all the data bits have been received
BTFSC STATUS, Z
GOTO _ISRTimer2RS232_RX_STOP_BIT
BCF STATUS, C ; Push the received bit to RX_BYTE
BTFSC SERIAL_RX
BSF STATUS, C
RRF RX_BYTE, F
DECF RX_COUNTER, F
RETURN
_ISRTimer2RS232_RX_STOP_BIT
; Checking the STOP bit
BTFSS SERIAL_RX ; STOP bit == 1?
RETURN ; ERROR!
; Byte received correctly
BSF RS232_FLAGS, FLAGS_DATA_RX
BCF RS232_FLAGS, FLAGS_RECEIVING_DATA
BCF T2CON, TMR2ON ; Stop the TMR2
BSF INTCON, GPIE ; Enable the GPIE interruptions
BANKSEL IOC
BSF SERIAL_RX_IOC ;
BANKSEL GPIO
RETURN
_ISRTimer2RS232_TX_DATA
; Check if the transmission has ended
BTFSC RS232_FLAGS, FLAGS_WAITING_TX_STOP_BIT
GOTO _ISRTimer2RS232_TX_END
MOVFW TX_COUNTER ; Check if all the data bits have been received
BTFSC STATUS, Z
GOTO _ISRTimer2RS232_TX_STOP_BIT
RRF TX_BYTE, F
BTFSC STATUS,C
GOTO _txRS232_HIGH
BCF SERIAL_TX
GOTO _txRS232_WAIT
_txRS232_HIGH
BSF SERIAL_TX
NOP
_txRS232_WAIT
DECF TX_COUNTER, F
RETURN
_ISRTimer2RS232_TX_STOP_BIT
BSF SERIAL_TX ; Transmit zero bit => TX ~ LOW
BSF RS232_FLAGS, FLAGS_WAITING_TX_STOP_BIT
RETURN
_ISRTimer2RS232_TX_END
BCF RS232_FLAGS, FLAGS_WAITING_TX_STOP_BIT
BSF RS232_FLAGS, FLAGS_DATA_TX
BCF RS232_FLAGS, FLAGS_TRANSMITING_DATA
BCF T2CON, TMR2ON ; Stop the TMR2
RETURN
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;; ;;;
;; ;;
; Function: _ISRGPIORS232 ;
; Desc.: GPIO Interruption Service Routine ;
; Vars: ;
; ;
; Notes: ;
;; ;;
;;; ;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_ISRGPIORS232
MOVFW GPIO ; Read the GPIO. GPIF can't be cleared until GPIO is readed
BCF INTCON, GPIF ; Clear the GPIF flag
BTFSS INTCON, GPIE ; Check for ghost interrupts
RETURN
BTFSC SERIAL_RX ; Check if we received the start bit (RX == LOW)
RETURN ; ERROR!
BTFSC RS232_FLAGS, FLAGS_TRANSMITING_DATA ; Check if the RS232 resources (TMR2)
RETURN ; are busy
; Start Bit received and RS232 not transmitting
BSF RS232_FLAGS, FLAGS_RECEIVING_DATA ; Reserve the RS232 resources (TMR2)
BCF INTCON, GPIE ; Stop the GPIE interruptions
MOVLW DATA_BITS ; Load the number of data bits
MOVWF RX_COUNTER
CLRF RX_BYTE ; Clearing the received data byte
; Waiting one bit period
MOVLW BIT_PERIOD ;- .8 ; Loading the half bit period
BANKSEL PR2 ; The "-8" is to compensate the interruption delay
MOVWF PR2
BCF SERIAL_RX_IOC ; If not cleared, the GPIF will toggle on
BANKSEL TMR2 ; Bank 0
CLRF TMR2 ; Clearing the TMR2 and switching it on
BSF T2CON, TMR2ON
RETURN;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;; ;;;
;; ;;
; Function: _txRS232 ;
; Desc.: Transmit a byte trough the serial port ;
; Vars: W => Byte to transmit ;
; ;
; Notes: ;
;; ;;
;;; ;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_txRS232
MOVWF TX_BYTE ; Save the TX byte
BTFSC RS232_FLAGS, FLAGS_RECEIVING_DATA ;Wait until data is received
GOTO $-1
BSF RS232_FLAGS, FLAGS_TRANSMITING_DATA
MOVLW DATA_BITS ; Load the number of data bits
MOVWF TX_COUNTER
; Waiting half bit
MOVLW BIT_PERIOD ; Loading the bit period
BANKSEL PR2
MOVWF PR2
BANKSEL TMR2 ; Bank 0
MOVLW BIT_PERIOD - HALF_BIT_PERIOD - .8 ; The "-8" is to compensate the interruption delay
MOVWF TMR2 ; Clearing the TMR2 and switching it on
BSF T2CON, TMR2ON
BCF SERIAL_TX ; Start bit -> TX ~ LOW
RETURN
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;; ;;;
;; ;;
; Function: _rs232PrintHexChar ;
; Desc.: Transmit a byte in hex format trough the serial port ;
; Vars: W => Byte to transmit ;
; ;
; Notes: ;
;; ;;
;;; ;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
_rs232PrintHexChar
MOVWF TMP ; Make a backup
SWAPF TMP, W
CALL _nibbleHex2ASCII
RS232_TX_AND_WAIT
MOVFW TMP
CALL _nibbleHex2ASCII
RS232_TX_AND_WAIT
RETURN
END |
aunit/aunit-tests.ads | btmalone/alog | 0 | 295 | <gh_stars>0
------------------------------------------------------------------------------
-- --
-- GNAT COMPILER COMPONENTS --
-- --
-- A U N I T . T E S T S --
-- --
-- S p e c --
-- --
-- Copyright (C) 2000-2011, AdaCore --
-- --
-- GNAT is free software; you can redistribute it and/or modify it under --
-- terms of the GNU General Public License as published by the Free Soft- --
-- ware Foundation; either version 3, or (at your option) any later ver- --
-- sion. GNAT is distributed in the hope that it will be useful, but WITH- --
-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY --
-- or FITNESS FOR A PARTICULAR PURPOSE. --
-- --
-- --
-- --
-- --
-- --
-- You should have received a copy of the GNU General Public License and --
-- a copy of the GCC Runtime Library Exception along with this program; --
-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see --
-- <http://www.gnu.org/licenses/>. --
-- --
-- GNAT is maintained by AdaCore (http://www.adacore.com). --
-- --
------------------------------------------------------------------------------
-- Base Test Case or Test Suite
--
-- This base type allows composition of both test cases and sub-suites into a
-- test suite (Composite pattern)
package AUnit.Tests is
type Test is abstract tagged limited private;
type Test_Access is access all Test'Class;
private
type Test is abstract tagged limited null record;
end AUnit.Tests;
|
libsrc/_DEVELOPMENT/target/zx/zx_crt.asm | meesokim/z88dk | 0 | 92672 | <gh_stars>0
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; SELECT CRT0 FROM -STARTUP=N COMMANDLINE OPTION ;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
INCLUDE "zcc_opt.def"
IFNDEF startup
; startup undefined so select a default
defc startup = 0
ENDIF
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; user supplied crt ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
IF startup = -1
INCLUDE "crt.asm"
ENDIF
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; ram model ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
IF startup = 0
; standard 32 column display
;
; stdin = zx_01_input_kbd_inkey
; stdout = zx_01_output_char_32 full screen
; stderr = dup(stdout)
INCLUDE "startup/zx_crt_0.asm"
ENDIF
IF startup = 1
; standard 32 column display tty_z88dk terminal
;
; stdin = zx_01_input_kbd_inkey
; stdout = zx_01_output_char_32_tty_z88dk full screen
; stderr = dup(stdout)
INCLUDE "startup/zx_crt_1.asm"
ENDIF
IF startup = 4
; 64 column display using fixed width 4x8 font
;
; stdin = zx_01_input_kbd_inkey
; stdout = zx_01_output_char_64 full screen
; stderr = dup(stdout)
INCLUDE "startup/zx_crt_4.asm"
ENDIF
IF startup = 5
; 64 column display using fixed width 4x8 font tty_z88dk terminal
;
; stdin = zx_01_input_kbd_inkey
; stdout = zx_01_output_char_64_tty_z88dk full screen
; stderr = dup(stdout)
INCLUDE "startup/zx_crt_5.asm"
ENDIF
IF startup = 8
; fzx terminal using ff_ao_Soxz font
;
; stdin = zx_01_input_kbd_inkey
; stdout = zx_01_output_fzx full screen
; stderr = dup(stdout)
INCLUDE "startup/zx_crt_8.asm"
ENDIF
IF startup = 9
; fzx terminal using ff_ao_Soxz font tty_z88dk terminal
;
; stdin = zx_01_input_kbd_inkey
; stdout = zx_01_output_fzx full screen
; stderr = dup(stdout)
INCLUDE "startup/zx_crt_9.asm"
ENDIF
IF startup = 31
; no instantiated FILEs
INCLUDE "startup/zx_crt_31.asm"
ENDIF
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; if 2 cartridge ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
IF startup = 32
; if 2 cartridge
; standard 32 column display
;
; stdin = zx_01_input_kbd_inkey
; stdout = zx_01_output_char_32 full screen
; stderr = dup(stdin)
INCLUDE "startup/zx_crt_32.asm"
ENDIF
IF startup = 33
; if 2 cartridge
; standard 32 column display tty_z88dk terminal
;
; stdin = zx_01_input_kbd_inkey
; stdout = zx_01_output_char_32_tty_z88dk full screen
; stderr = dup(stdout)
INCLUDE "startup/zx_crt_33.asm"
ENDIF
IF startup = 36
; if 2 cartridge
; 64 column display using fixed width 4x8 font
;
; stdin = zx_01_input_kbd_inkey
; stdout = zx_01_output_char_64 full screen
; stderr = dup(stdout)
INCLUDE "startup/zx_crt_36.asm"
ENDIF
IF startup = 37
; if 2 cartridge
; 64 column display using fixed width 4x8 font tty_z88dk terminal
;
; stdin = zx_01_input_kbd_inkey
; stdout = zx_01_output_char_64_tty_z88dk full screen
; stderr = dup(stdout)
INCLUDE "startup/zx_crt_37.asm"
ENDIF
IF startup = 40
; if 2 cartridge
; fzx terminal using ff_ao_Soxz font
;
; stdin = zx_01_input_kbd_inkey
; stdout = zx_01_output_fzx full screen
; stderr = dup(stdout)
INCLUDE "startup/zx_crt_40.asm"
ENDIF
IF startup = 41
; if 2 cartridge
; fzx terminal using ff_ao_Soxz font tty_z88dk terminal
;
; stdin = zx_01_input_kbd_inkey
; stdout = zx_01_output_fzx full screen
; stderr = dup(stdout)
INCLUDE "startup/zx_crt_41.asm"
ENDIF
IF startup = 63
; if 2 cartridge
; no instantiated FILEs
INCLUDE "startup/zx_crt_63.asm"
ENDIF
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;; testing purposes ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
IF startup = 100
; three terminal windows on screen
;
; stdin = zx_01_input_kbd_inkey (connected to edit)
; stdout = zx_01_output_char_64 window (2, 44, 1, 18)
; stderr = dup(stdout)
; edit = zx_01_output_char_32 window (1, 30, 20 ,3)
; sidebar= zx_01_output_char_64 window (48, 14, 1, 18)
INCLUDE "startup/zx_crt_100.asm"
ENDIF
IF startup = 200
; three terminal windows on screen
;
; stdin = zx_01_input_kbd_inkey (connected to window_1)
; window_1 = fzx terminal (font = Prefect)
; window_2 = fzx terminal (font = RoundelSerif)
INCLUDE "startup/zx_crt_200.asm"
ENDIF
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
seedtag.asm | joshuadhowe/z3randomizer | 0 | 164761 | <gh_stars>0
;--------------------------------------------------------------------------------
; GenerateSeedTags
;--------------------------------------------------------------------------------
GenerateSeedTags:
PHA : PHX : PHY : PHP
REP #$20 ; set 16-bit accumulator
LDA $00 : PHA
LDA $02 : PHA
LDA $04 : PHA
LDA $06 : PHA
JSL.l NameHash ; get the titlecard hashes
LDA $00 : AND.w #$1F1F : STA $00 ; keep it under 0x20 or we'll run out of items
LDA $02 : AND.w #$1F1F : STA $02
LDA $04 : AND.w #$1F1F : STA $04
LDA $06 : AND.w #$1F1F : STA $06
REP #$30 ; set 8-bit accumulator & index registers
LDY #$08
-
DEY : BNE -
REP #20 ; set 16-bit accumulator
PLA : STA $06
PLA : STA $04
PLA : STA $02
PLA : STA $00
PLP : PLY : PLX : PLA
RTL
;-------------------------------------------------------------------------------- |
ZORTON.reko/ZORTON_2057.asm | 0xLiso/dePIXELator | 0 | 86969 | <filename>ZORTON.reko/ZORTON_2057.asm
;;; Segment 2057 (2057:0000)
;; fn2057_0000: 2057:0000
;; Called from:
;; 2057:007C (in fn2057_005C)
;; 2057:0083 (in fn2057_005C)
;; 2057:0092 (in fn2057_005C)
;; 2057:0329 (in fn2057_0283)
;; 2057:0334 (in fn2057_0283)
;; 2057:0347 (in fn2057_0283)
;; 2057:0352 (in fn2057_0283)
;; 2057:035D (in fn2057_0283)
;; 2057:036B (in fn2057_0283)
;; 2057:0372 (in fn2057_0283)
;; 2057:03A7 (in fn2057_0384)
;; 2057:0470 (in fn2057_0453)
fn2057_0000 proc
enter 4h,0h
mov ax,[96CEh]
add ax,0Ch
mov [bp-2h],ax
mov word ptr [bp-4h],0FFFFh
cli
jmp 0026h
l2057_0015:
mov dx,[bp-2h]
in al,dx
test al,80h
jnz 0023h
l2057_001D:
mov al,[bp+6h]
out dx,al
jmp 002Ch
l2057_0023:
dec word ptr [bp-4h]
l2057_0026:
cmp word ptr [bp-4h],0h
ja 0015h
l2057_002C:
sti
leave
retf
2057:002F C8 .
2057:0030 04 00 00 A1 CE 96 05 0C 00 89 46 FE C7 46 FC FF ..........F..F..
2057:0040 FF EB 11 8B 56 FE EC A8 80 75 06 8A 46 06 EE EB ....V....u..F...
2057:0050 09 FF 4E FC 83 7E FC 00 77 E9 C9 CB ..N..~..w...
;; fn2057_005C: 2057:005C
;; Called from:
;; 268D:01BB (in main)
fn2057_005C proc
enter 6h,0h
mov ax,28BAh
mov es,ax
cmp byte ptr es:[0A183h],0h
jnz 0070h
l2057_006D:
jmp 0111h
l2057_0070:
mov ax,[96D2h]
sub ax,2h
mov [bp-4h],ax
push 0D1h
push cs
call 0000h
pop cx
push 40h
push cs
call 0000h
pop cx
mov ax,28BAh
mov es,ax
mov al,es:[82E4h]
push ax
push cs
call 0000h
pop cx
cmp word ptr [bp-4h],9h
jnc 00C7h
l2057_009D:
mov bx,[bp-4h]
mov al,[bx+8281h]
cbw
mov [bp-2h],ax
cmp word ptr [bp-2h],0h
jnz 00CDh
l2057_00AE:
push ds
push 8292h
l2057_00B2:
call far 0800h:37D3h
add sp,4h
mov ax,28BAh
mov es,ax
mov byte ptr es:[0A183h],0h
jmp 011Ch
l2057_00C7:
push ds
push 82B5h
jmp 00B2h
l2057_00CD:
cli
push word ptr [bp-2h]
call far 0800h:0436h
pop cx
mov [0A418h],dx
mov [0A416h],ax
push 2057h
push 182h
push word ptr [bp-2h]
call far 0800h:0445h
add sp,6h
mov dx,21h
in al,dx
mov [bp-5h],al
mov bx,[bp-4h]
and al,[bx+8266h]
out dx,al
cmp word ptr [bp-4h],8h
jnz 0110h
l2057_0104:
mov dx,0A1h
in al,dx
mov [bp-5h],al
and al,[bx+8266h]
out dx,al
l2057_0110:
sti
l2057_0111:
mov ax,28BAh
mov es,ax
or word ptr es:[302Ah],10h
l2057_011C:
leave
retf
;; fn2057_011E: 2057:011E
;; Called from:
;; 268D:05A1 (in fn268D_03E2)
fn2057_011E proc
enter 4h,0h
mov ax,28BAh
mov es,ax
cmp byte ptr es:[0A183h],0h
jz 0180h
l2057_012F:
cli
mov ax,[96D2h]
sub ax,2h
mov [bp-2h],ax
mov bx,[bp-2h]
mov al,[bx+8281h]
cbw
mov [bp-4h],ax
push dword ptr [0A416h]
push ax
call far 0800h:0445h
add sp,6h
mov bx,[bp-2h]
mov al,[bx+8266h]
not al
mov dx,21h
push ax
in al,dx
pop dx
or al,dl
mov dx,21h
out dx,al
cmp word ptr [bp-2h],8h
jnz 017Fh
l2057_016D:
mov al,[bx+8266h]
not al
mov dx,0A1h
push ax
in al,dx
pop dx
or al,dl
mov dx,0A1h
out dx,al
l2057_017F:
sti
l2057_0180:
leave
retf
2057:0182 50 53 51 52 06 1E 56 57 55 BD BA 28 8E DD PSQR..VWU..(..
2057:0190 8B EC 83 EC 08 8B 16 CE 96 83 C2 0E EC B8 BA 28 ...............(
2057:01A0 8E C0 26 80 3E 22 A4 01 74 03 E9 BB 00 B8 BA 28 ..&.>"..t......(
2057:01B0 8E C0 66 26 A1 23 A4 66 89 46 FC C4 5E FC 26 8B ..f&.#.f.F..^.&.
2057:01C0 47 0C 89 46 FA 81 7E FA B9 01 7D 3D 68 D0 00 0E G..F..~...}=h...
2057:01D0 E8 5C FE 59 83 7E FA 00 74 04 FF 06 1A A4 C4 5E .\.Y.~..t......^
2057:01E0 FC 26 C7 47 08 00 00 26 C7 47 0A 00 00 26 C7 47 .&.G...&.G...&.G
2057:01F0 0C 00 00 26 C7 07 00 00 B8 BA 28 8E C0 26 C6 06 ...&......(..&..
2057:0200 22 A4 00 FF 06 77 82 EB 5F FF 06 1A A4 C4 5E FC "....w.._.....^.
2057:0210 26 81 47 0A B9 01 26 81 6F 0C B9 01 26 8B 47 0A &.G...&.o...&.G.
2057:0220 26 3B 47 02 7C 06 26 C7 47 0A 00 00 B8 BA 28 8E &;G.|.&.G.....(.
2057:0230 C0 26 80 3E 27 A4 02 72 0A 8E C0 26 80 3E 27 A4 .&.>'..r...&.>'.
2057:0240 04 76 25 C7 46 F8 B8 01 6A 14 0E E8 B2 FD 59 8A .v%.F...j.....Y.
2057:0250 46 F8 24 FF 50 0E E8 A7 FD 59 8B 46 F8 C1 F8 08 F.$.P....Y.F....
2057:0260 24 FF 50 0E E8 99 FD 59 BA 20 00 B0 20 EE 83 3E $.P....Y. .. ..>
2057:0270 D2 96 0A 75 04 BA A0 00 EE C9 5F 5E 1F 07 5A 59 ...u......_^..ZY
2057:0280 5B 58 CF [X.
;; fn2057_0283: 2057:0283
;; Called from:
;; 209F:04C2 (in fn209F_049A)
fn2057_0283 proc
push bp
mov bp,sp
dec word ptr [bp+0Ch]
mov ax,28BAh
mov es,ax
cmp byte ptr es:[0A183h],0h
jnz 0299h
l2057_0296:
jmp 0382h
l2057_0299:
mov dx,0Ah
in al,dx
mov ah,0h
test ax,4h
jnz 02ABh
l2057_02A4:
mov al,4h
or al,[96D4h]
out dx,al
l2057_02AB:
mov dx,0Ch
mov al,0h
out dx,al
mov al,48h
or al,[96D4h]
or al,10h
mov dx,0Bh
out dx,al
mov bx,[96D4h]
mov al,[bx+828Ah]
cbw
push ax
mov al,[bp+8h]
pop dx
out dx,al
mov al,[bx+828Ah]
cbw
push ax
mov al,[bp+0Ah]
pop dx
out dx,al
shl bx,1h
mov dx,[bx+826Fh]
mov al,[bp+6h]
and al,0Fh
out dx,al
mov bx,[96D4h]
mov al,[bx+828Eh]
cbw
push ax
mov al,[bp+0Ch]
and al,0FFh
pop dx
out dx,al
mov al,[bx+828Eh]
cbw
mov dx,[bp+0Ch]
sar dx,8h
and dl,0FFh
xchg dx,ax
out dx,al
mov dx,0Ah
mov al,[96D4h]
out dx,al
mov word ptr [bp+0Ch],1B8h
mov ax,28BAh
mov es,ax
mov al,es:[0A427h]
mov ah,0h
cmp ax,1h
jz 0327h
l2057_0320:
cmp ax,4h
jz 0344h
l2057_0325:
jmp 0350h
l2057_0327:
push 14h
l2057_0329:
push cs
call 0000h
pop cx
mov al,[bp+0Ch]
and al,0FFh
push ax
push cs
call 0000h
pop cx
mov ax,[bp+0Ch]
sar ax,8h
and al,0FFh
push ax
jmp 0372h
l2057_0344:
push 0C6h
push cs
call 0000h
pop cx
push 0h
jmp 0329h
l2057_0350:
push 48h
push cs
call 0000h
pop cx
mov al,[bp+0Ch]
and al,0FFh
push ax
push cs
call 0000h
pop cx
mov ax,[bp+0Ch]
sar ax,8h
and al,0FFh
push ax
push cs
call 0000h
pop cx
push 1Ch
l2057_0372:
push cs
call 0000h
pop cx
mov ax,28BAh
mov es,ax
mov byte ptr es:[0A422h],1h
l2057_0382:
pop bp
retf
;; fn2057_0384: 2057:0384
;; Called from:
;; 0CE0:12E4 (in fn0CE0_08FC)
;; 1D10:0655 (in fn1D10_02AE)
;; 1D10:0E41 (in fn1D10_09C2)
fn2057_0384 proc
mov ax,28BAh
mov es,ax
cmp byte ptr es:[0A183h],0h
jz 03B8h
l2057_0391:
cli
mov dx,0Ah
in al,dx
mov ah,0h
test ax,4h
jnz 03A4h
l2057_039D:
mov al,4h
or al,[96D4h]
out dx,al
l2057_03A4:
push 0D0h
push cs
call 0000h
pop cx
mov ax,28BAh
mov es,ax
mov byte ptr es:[0A422h],2h
sti
l2057_03B8:
retf
2057:03B9 C8 02 00 00 BA 0C 00 .......
2057:03C0 B0 00 EE 8B 1E D4 96 8A 87 8E 82 98 50 5A EC B4 ............PZ..
2057:03D0 00 89 46 FE 8A 87 8E 82 98 50 5A EC B4 00 C1 E0 ..F......PZ.....
2057:03E0 08 09 46 FE B8 BA 28 8E C0 26 C4 1E 23 A4 26 8B ..F...(..&..#.&.
2057:03F0 47 0F 3B 46 FE 76 04 33 C0 EB 21 B8 BA 28 8E C0 G.;F.v.3..!..(..
2057:0400 26 C4 1E 23 A4 26 8B 47 0F 29 46 FE 81 7E FE 74 &..#.&.G.)F..~.t
2057:0410 22 77 E4 B8 74 22 2B 46 FE 89 46 FE C9 CB "w..t"+F..F...
;; fn2057_041E: 2057:041E
;; Called from:
;; 1D10:0A00 (in fn1D10_09C2)
;; 1D10:0BE8 (in fn1D10_09C2)
;; 209F:06F7 (in fn209F_06D8)
fn2057_041E proc
enter 2h,0h
cli
mov dx,0Ch
mov al,0h
out dx,al
mov bx,[96D4h]
mov al,[bx+828Ah]
cbw
push ax
pop dx
in al,dx
mov ah,0h
and ax,0FFh
mov [bp-2h],ax
mov al,[bx+828Ah]
cbw
push ax
pop dx
in al,dx
mov ah,0h
shl ax,8h
or [bp-2h],ax
sti
mov ax,[bp-2h]
leave
retf
;; fn2057_0453: 2057:0453
;; Called from:
;; 1D10:066F (in fn1D10_02AE)
fn2057_0453 proc
mov ax,28BAh
mov es,ax
cmp byte ptr es:[0A183h],0h
jz 0481h
l2057_0460:
cli
mov dx,0Ah
in al,dx
test al,4h
jz 046Dh
l2057_0469:
mov al,[96D4h]
out dx,al
l2057_046D:
push 0D4h
push cs
call 0000h
pop cx
mov ax,28BAh
mov es,ax
mov byte ptr es:[0A422h],1h
|
src/main/antlr4/com/github/kristinjeanna/scedsl/SceDsl.g4 | kristinjeanna/string-collection-eval-dsl | 0 | 2492 | <reponame>kristinjeanna/string-collection-eval-dsl<gh_stars>0
grammar SceDsl;
expression
: function
| explicitBoolean
| quotedString
;
function
: and
| or
| xor
| not
| contains
| startsWith
| endsWith
;
explicitBoolean
: booleanTrue
| booleanFalse
;
and
: AND LPAREN expression (COMMA expression)* RPAREN
;
or
: OR LPAREN expression (COMMA expression)* RPAREN
;
xor
: XOR LPAREN expression (COMMA expression)* RPAREN
;
not
: NOT LPAREN expression RPAREN
;
contains
: CONTAINS LPAREN quotedString RPAREN
;
startsWith
: STARTSWITH LPAREN quotedString RPAREN
;
endsWith
: ENDSWITH LPAREN quotedString RPAREN
;
booleanTrue
: TRUE
;
booleanFalse
: FALSE
;
quotedString
: SINGLE_QUOTE string SINGLE_QUOTE
;
string
: STRING
;
AND : 'and' ;
OR : 'or' ;
XOR : 'xor' ;
NOT : 'not' ;
CONTAINS : 'contains' ;
STARTSWITH : 'startsWith' ;
ENDSWITH : 'endsWith' ;
TRUE : 'true' ;
FALSE : 'false' ;
STRING
: [A-Za-z]+
;
SINGLE_QUOTE
: '\''
;
COMMA
: ','
;
LPAREN
: '('
;
RPAREN
: ')'
;
WS : [ \t\r\n]+ -> skip ; // skip spaces, tabs, newlines
|
oeis/067/A067274.asm | neoneye/loda-programs | 11 | 166854 | <reponame>neoneye/loda-programs
; A067274: Number of ordered integer pairs (b,c), with -n<=b<=n, -n<=c<=n, such that both roots of x^2+bx+c=0 are integers.
; Submitted by <NAME>(s1)
; 1,4,10,16,25,31,41,47,57,66,76,82,96,102,112,122,135,141,155,161,175,185,195,201,219,228,238,248,262,268,286,292,306,316,326,336,357,363,373,383,401,407,425,431,445,459,469,475,497,506,520,530,544,550,568,578,596,606,616,622,648,654,664,678,695,705,723,729,743,753,771,777,803,809,819,833,847,857,875,881,903,916,926,932,958,968,978,988,1006,1012,1038,1048,1062,1072,1082,1092,1118,1124,1138,1152
mov $2,$0
mov $3,40
mov $4,2
lpb $0
mov $0,$2
add $1,1
div $0,$1
sub $0,$1
add $3,1
add $4,3
lpb $4
add $3,$0
div $4,2
lpe
lpe
mul $3,4
add $3,1
mov $0,$3
mul $0,2
div $0,4
sub $0,40
add $1,$3
sub $1,2
sub $1,$0
mov $0,$1
sub $0,118
|
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_22.asm | ljhsiun2/medusa | 9 | 14674 | <filename>Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_22.asm
.global s_prepare_buffers
s_prepare_buffers:
push %r14
push %r9
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x10d18, %rsi
lea addresses_UC_ht+0x10798, %rdi
nop
nop
cmp $23264, %r14
mov $65, %rcx
rep movsq
nop
nop
nop
nop
nop
sub $35100, %r9
lea addresses_normal_ht+0x2f98, %rdi
nop
xor $22460, %rcx
mov (%rdi), %si
nop
cmp %r9, %r9
pop %rsi
pop %rdi
pop %rcx
pop %r9
pop %r14
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r11
push %r13
push %r15
push %r8
push %rax
push %rbx
// Store
lea addresses_D+0x6798, %r11
nop
xor $37269, %r15
movl $0x51525354, (%r11)
nop
nop
nop
nop
nop
xor %r13, %r13
// Load
lea addresses_normal+0xce98, %r8
nop
xor $16465, %r10
mov (%r8), %ebx
xor %r15, %r15
// Faulty Load
lea addresses_WT+0x17798, %rax
nop
nop
nop
nop
xor %r10, %r10
vmovups (%rax), %ymm3
vextracti128 $0, %ymm3, %xmm3
vpextrq $1, %xmm3, %r11
lea oracles, %r8
and $0xff, %r11
shlq $12, %r11
mov (%r8,%r11,1), %r11
pop %rbx
pop %rax
pop %r8
pop %r15
pop %r13
pop %r11
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_WT', 'size': 2, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 8, 'NT': False, 'type': 'addresses_D', 'size': 4, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 6, 'NT': False, 'type': 'addresses_normal', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_WT', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_WC_ht', 'congruent': 7, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_UC_ht', 'congruent': 11, 'same': False}}
{'src': {'same': False, 'congruent': 8, 'NT': False, 'type': 'addresses_normal_ht', 'size': 2, 'AVXalign': False}, 'OP': 'LOAD'}
{'39': 21829}
39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39 39
*/
|
Transynther/x86/_processed/NONE/_xt_/i9-9900K_12_0xa0.log_21829_1652.asm | ljhsiun2/medusa | 9 | 21583 | .global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r13
push %r14
push %r8
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_normal_ht+0x26e6, %r8
clflush (%r8)
nop
nop
nop
xor $53667, %rsi
mov $0x6162636465666768, %r13
movq %r13, (%r8)
nop
nop
nop
nop
dec %rbp
lea addresses_UC_ht+0xabe6, %rsi
lea addresses_UC_ht+0x18840, %rdi
inc %r14
mov $119, %rcx
rep movsb
nop
sub %r14, %r14
lea addresses_D_ht+0x10fe6, %r14
nop
nop
nop
nop
nop
dec %rbp
vmovups (%r14), %ymm2
vextracti128 $1, %ymm2, %xmm2
vpextrq $1, %xmm2, %rsi
cmp %r14, %r14
lea addresses_A_ht+0x8fe6, %rsi
lea addresses_normal_ht+0x16bbe, %rdi
clflush (%rsi)
nop
nop
nop
nop
nop
sub %r11, %r11
mov $55, %rcx
rep movsq
nop
nop
and $37897, %r11
lea addresses_WC_ht+0x10066, %rsi
lea addresses_WC_ht+0x90e6, %rdi
clflush (%rsi)
nop
nop
nop
nop
dec %r11
mov $86, %rcx
rep movsw
nop
nop
nop
nop
nop
inc %rbp
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %r8
pop %r14
pop %r13
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r14
push %r8
push %r9
push %rax
push %rbp
push %rdx
// Faulty Load
lea addresses_normal+0x13be6, %rbp
and %r8, %r8
movb (%rbp), %al
lea oracles, %rdx
and $0xff, %rax
shlq $12, %rax
mov (%rdx,%rax,1), %rax
pop %rdx
pop %rbp
pop %rax
pop %r9
pop %r8
pop %r14
ret
/*
<gen_faulty_load>
[REF]
{'src': {'NT': False, 'same': False, 'congruent': 0, 'type': 'addresses_normal', 'AVXalign': False, 'size': 4}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'NT': False, 'same': True, 'congruent': 0, 'type': 'addresses_normal', 'AVXalign': False, 'size': 1}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'OP': 'STOR', 'dst': {'NT': False, 'same': False, 'congruent': 8, 'type': 'addresses_normal_ht', 'AVXalign': False, 'size': 8}}
{'src': {'same': False, 'congruent': 7, 'type': 'addresses_UC_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 1, 'type': 'addresses_UC_ht'}}
{'src': {'NT': False, 'same': True, 'congruent': 10, 'type': 'addresses_D_ht', 'AVXalign': False, 'size': 32}, 'OP': 'LOAD'}
{'src': {'same': False, 'congruent': 9, 'type': 'addresses_A_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 2, 'type': 'addresses_normal_ht'}}
{'src': {'same': False, 'congruent': 6, 'type': 'addresses_WC_ht'}, 'OP': 'REPM', 'dst': {'same': False, 'congruent': 7, 'type': 'addresses_WC_ht'}}
{'34': 21829}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
|
src/vulkan-math/vulkan-math-bvec4.ads | zrmyers/VulkanAda | 1 | 7003 | <reponame>zrmyers/VulkanAda
--------------------------------------------------------------------------------
-- MIT License
--
-- Copyright (c) 2020 <NAME>
--
-- Permission is hereby granted, free of charge, to any person obtaining a copy
-- of this software and associated documentation files (the "Software"), to deal
-- in the Software without restriction, including without limitation the rights
-- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-- copies of the Software, and to permit persons to whom the Software is
-- furnished to do so, subject to the following conditions:
--
-- The above copyright notice and this permission notice shall be included in all
-- copies or substantial portions of the Software.
--
-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
-- SOFTWARE.
--------------------------------------------------------------------------------
-- This package describes a Floating Point Vector with 4 components.
--------------------------------------------------------------------------------
with Vulkan.Math.GenBType;
with Vulkan.Math.Bvec3;
with Vulkan.Math.Bvec2;
use Vulkan.Math.GenBType;
use Vulkan.Math.Bvec3;
use Vulkan.Math.Bvec2;
--------------------------------------------------------------------------------
--< @group Vulkan Math Basic Types
--------------------------------------------------------------------------------
--< @summary
--< This package defines a boolean vector type with 4 components.
--------------------------------------------------------------------------------
package Vulkan.Math.Bvec4 is
pragma Preelaborate;
pragma Pure;
--< A 4-compoent vector of boolean values.
subtype Vkm_Bvec4 is Vkm_GenBType(Last_Index => 3);
----------------------------------------------------------------------------
-- Ada does not have the concept of constructors in the sense that they exist
-- in C++. For this reason, we will instead define multiple methods for
-- instantiating a Bvec4 here.
----------------------------------------------------------------------------
-- The following are explicit constructors for Bvec4:
----------------------------------------------------------------------------
--< @summary
--< Constructor for Vkm_Bvec4 type.
--<
--< @description
--< Produce a default vector with all components set to false.
--<
--< @return
--< A 4D boolean vector with all components set to false.
----------------------------------------------------------------------------
function Make_Bvec4 return Vkm_Bvec4 is
(GBT.Make_GenType(Last_Index => 3, value => false)) with Inline;
----------------------------------------------------------------------------
--< @summary
--< Constructor for Vkm_Bvec4 type.
--<
--< @description
--< Produce a vector with all components set to the same value.
--<
--< @param scalar_value
--< The value to set all components to.
--<
--< @return
--< A 4D boolean vector with all components set to scalar_value.
----------------------------------------------------------------------------
function Make_Bvec4 (scalar_value : in Vkm_Bool) return Vkm_Bvec4 is
(GBT.Make_GenType(Last_Index => 3, value => scalar_value)) with Inline;
----------------------------------------------------------------------------
--< @summary
--< Constructor for Vkm_Bvec4 type.
--<
--< @description
--< Produce a vector by copying components from an existing vector.
--<
--< @param vec4_value
--< The Bvec4 to copy components from.
--<
--< @return
--< A 4D boolean vector with all of its components set equal to the corresponding
--< components of vec4_value.
----------------------------------------------------------------------------
function Make_Bvec4 (vec4_value : in Vkm_Bvec4) return Vkm_Bvec4 is
(GBT.Make_GenType(vec4_value.data(0),vec4_value.data(1),
vec4_value.data(2),vec4_value.data(3))) with Inline;
----------------------------------------------------------------------------
--< @summary
--< Constructor for Vkm_Bvec4 type.
--<
--< @description
--< Produce a vector by specifying the values for each of its components.
--<
--< @param value1
--< Value for component 1.
--<
--< @param value2
--< Value for component 2.
--<
--< @param value3
--< Value for component 3.
--<
--< @param value4
--< Value for component 4.
--<
--< @return
--< A 4D boolean vector with all components set as specified.
----------------------------------------------------------------------------
function Make_Bvec4 (value1, value2, value3, value4 : in Vkm_Bool) return Vkm_Bvec4
renames GBT.Make_GenType;
----------------------------------------------------------------------------
--< @summary
--< Constructor for Vkm_Bvec4 type.
--<
--< @description
--< Produce a vector by concatenating a scalar value with a Bvec3.
--<
--< Bvec4 = [scalar_value, vec3_value ]
--<
--< @param scalar_value
--< The scalar value to concatenate with the Bvec3.
--<
--< @param vec3_value
--< The Bvec3 to concatenate to the scalar value.
--<
--< @return The instance of Bvec4.
----------------------------------------------------------------------------
function Make_Bvec4 (scalar_value : in Vkm_Bool;
vec3_value : in Vkm_Bvec3) return Vkm_Bvec3 is
(Make_Bvec4(scalar_value,
vec3_value.data(0),
vec3_value.data(1),
vec3_value.data(2))) with Inline;
----------------------------------------------------------------------------
--< @summary
--< Constructor for Vkm_Bvec4 type.
--<
--< @description
--< Produce a vector by concatenating a Bvec3 with a scalar value.
--<
--< Bvec4 = [vec3_value, scalar_value]
--<
--< @param vec3_value
--< The Bvec3 to concatenate to the scalar value.
--<
--< @param scalar_value
--< The scalar value to concatenate to the Bvec3.
--<
--< @return
--< The instance of Bvec4.
----------------------------------------------------------------------------
function Make_Bvec4 (vec3_value : in Vkm_Bvec3;
scalar_value : in Vkm_Bool) return Vkm_Bvec4 is
(Make_Bvec4(vec3_value.data(0),
vec3_value.data(1),
vec3_value.data(2),
scalar_value )) with Inline;
---------------------------------------------------------------------------
--< @summary
--< Constructor for Vkm_Bvec4 type.
--<
--< @description
--< Produce a vector by concatenating a Bvec2 with a Bvec2.
--<
--< Bvec4 = [vec2_value1, vec2_value2]
--<
--< @param vec2_value1
--< The first Bvec2.
--<
--< @param vec2_value2
--< The second Bvec2.
--<
--< @return
--< The instance of Bvec4.
---------------------------------------------------------------------------
function Make_Bvec4 (vec2_value1, vec2_value2 : in Vkm_Bvec2) return Vkm_Bvec4 is
(Make_Bvec4(vec2_value1.data(0),vec2_value1.data(1),
vec2_value2.data(0),vec2_value2.data(1)));
---------------------------------------------------------------------------
--< @summary
--< Constructor for Vkm_Bvec4 type.
--<
--< @description
--< Produce a vector by concatenating two scalar values with a Bvec2.
--<
--< Bvec4 = [scalar1, scalar2, vec2_value]
--<
--< @param scalar1
--< First scalar value.
--<
--< @param scalar2
--< Second scalar value.
--<
--< @param vec2_value
--< The Bvec2 value.
--<
--< @return
--< The instance of Bvec4.
---------------------------------------------------------------------------
function Make_Bvec4 (scalar1, scalar2 : in Vkm_Bool;
vec2_value : in Vkm_Bvec2) return Vkm_Bvec4 is
(Make_Bvec4(scalar1, scalar2, vec2_value.data(0),vec2_value.data(1)));
---------------------------------------------------------------------------
--< @summary
--< Constructor for Vkm_Bvec4 type.
--<
--< @description
--< Produce a vector by concatenating two scalar values with a Bvec2.
--<
--< Bvec4 = [scalar1, vec2_value, scalar2]
--<
--< @param scalar1
--< First scalar value.
--<
--< @param vec2_value
--< The Bvec2 value.
--<
--< @param scalar2
--< Second scalar value.
--<
--< @return
--< The instance of Bvec4.
---------------------------------------------------------------------------
function Make_Bvec4 (scalar1 : in Vkm_Bool;
vec2_value : in Vkm_Bvec2 ;
scalar2 : in Vkm_Bool) return Vkm_Bvec4 is
(Make_Bvec4(scalar1, vec2_value.data(0),vec2_value.data(1), scalar2));
---------------------------------------------------------------------------
--< @summary
--< Constructor for Vkm_Bvec4 type.
--<
--< @description
--< Produce a vector by concatenating two scalar values with a Bvec2.
--<
--< Bvec4 = [vec2_value, scalar1, scalar2]
--<
--< @param vec2_value
--< The Bvec2 value.
--<
--< @param scalar1
--< First scalar value.
--<
--< @param scalar2
--< Second scalar value.
--<
--< @return
--< The instance of Bvec4.
---------------------------------------------------------------------------
function Make_Bvec4 (vec2_value : in Vkm_Bvec2 ;
scalar1 : in Vkm_Bool;
scalar2 : in Vkm_Bool) return Vkm_Bvec4 is
(Make_Bvec4(vec2_value.data(0),vec2_value.data(1), scalar1, scalar2));
end Vulkan.Math.Bvec4;
|
examples/font.asm | crgimenes/assembly | 1 | 12375 | ;nasm -f bin -o font.com font.asm
org 100h
section .text
start:
;mov ax,0003h ; set screen mode to normal
;int 10h ; (80x25) text
;push ds ;
;pop es ; make sure ES = DS
mov bp,font ;
mov cx,1 ; change 1 bitmap
mov dx,0041h ; A 41h = 65
mov bx,1000h ; bh 16 bl 00 -> 16 bytes per char RAM block 00
mov ax,1100h ; change font to our font
int 10h ; video interrupt
mov ax,4C00h ; exit to DOS
int 21h ;
section .data
font:
db 00000000b ; 1
db 01111100b ; 2
db 11111110b ; 3
db 11000010b ; 4
db 11000010b ; 5
db 11000010b ; 6
db 11000010b ; 7
db 11111110b ; 8
db 11000010b ; 9
db 11000010b ; 10
db 11000010b ; 11
db 11000010b ; 12
db 11000010b ; 13
db 11000010b ; 14
db 00000000b ; 15
db 00000000b ; 16
.end
|
src/extras/media/spectrum/tbblue/raster/readline/readline_bin.asm | chipsi007/zesarux | 0 | 161903 | ;Compilar con pasmo --tapbas readline_bin.asm readline_bin.tap
reg_port equ 243BH
value_port equ 253BH
lineas equ 23298
;Puedes leer la linea raster que retorna tbblue desde 23296 y 23297
;se puede poner una pausa modificando 23298 y generando de esa manera que el raster se desplaza hacia abajo
;ver programa basic readline_bas.tap como ejemplo de uso
org 32768
di
ld a,1
ld (lineas),a
ld hl,inicio_int
ld (0feffH),hl
ld a,0feh
ld i,a
im 2
ei
ret
pausa
ld b,30
pausa2
djnz pausa2
ret
lee_raster
ld bc,reg_port
ld a,30
out (c),a
inc b
in a,(c)
ld (23296),a
dec b
ld a,31
out (c),a
inc b
in a,(c)
ld (23297),a
ret
inicio_int
rst 56
push af
push bc
ld a,(lineas)
retardolineas
call pausa
dec a
jr nz,retardolineas
xor a
out (254),a
ld a,7
out (254),a
call lee_raster
pop bc
pop af
reti
|
3-mid/impact/source/3d/collision/shapes/impact-d3-shape-convex-internal.ads | charlie5/lace | 20 | 4373 | <reponame>charlie5/lace
with impact.d3.Shape.convex,
impact.d3.collision.Margin;
package impact.d3.Shape.convex.internal
--
-- The impact.d3.Shape.convex.internal is an internal base class, shared by most convex shape implementations.
--
-- The impact.d3.Shape.convex.internal uses a default collision margin set to CONVEX_DISTANCE_MARGIN.
--
-- This collision margin used by Gjk and some other algorithms, see also impact.d3.collision.Margin.h
--
-- Note that when creating small shapes (derived from impact.d3.Shape.convex.internal),
-- you need to make sure to set a smaller collision margin, using the 'setMargin' API
--
-- There is a automatic mechanism 'setSafeMargin' used by impact.d3.Shape.convex.internal.polyhedral.box and impact.d3.Shape.convex.internal.cylinder
--
is
type Item is abstract new impact.d3.Shape.convex.item with private;
overriding function localGetSupportingVertex (Self : in Item; vec : in math.Vector_3) return math.Vector_3;
function getImplicitShapeDimensions (Self : in Item) return math.Vector_3;
procedure setImplicitShapeDimensions (Self : in out Item; dimensions : in math.Vector_3);
--
--
-- warning: use setImplicitShapeDimensions with care
--
-- changing a collision shape while the body is in the world is not recommended,
-- it is best to remove the body from the world, then make the change, and re-add it
-- alternatively flush the contact points, see documentation for 'cleanProxyFromPairs'
procedure setSafeMargin (Self : in out Item'Class; minDimension : in math.Real;
defaultMarginMultiplier : in math.Real := 0.1);
procedure setSafeMargin (Self : in out Item'Class; halfExtents : in math.Vector_3;
defaultMarginMultiplier : in math.Real := 0.1);
overriding procedure getAabb (Self : in Item; t : in Transform_3d;
aabbMin, aabbMax : out math.Vector_3);
--
-- getAabb's default implementation is brute force, expected derived classes to implement a fast dedicated version
overriding procedure getAabbSlow (Self : in Item; t : in Transform_3d;
aabbMin, aabbMax : out math.Vector_3);
overriding procedure setLocalScaling (Self : in out Item; scaling : in math.Vector_3);
overriding function getLocalScaling (Self : in Item) return math.Vector_3;
function getLocalScalingNV (Self : in Item) return math.Vector_3;
overriding procedure setMargin (Self : in out Item; margin : in math.Real);
overriding function getMargin (Self : in Item) return math.Real;
function getMarginNV (Self : in Item) return math.Real;
overriding function getNumPreferredPenetrationDirections (Self : in Item) return Integer;
overriding procedure getPreferredPenetrationDirection (Self : in Item; Index : in Integer;
penetrationVector : out math.Vector_3);
--- btConvexInternalAabbCachingShape
--
-- adds local aabb caching for convex shapes, to avoid expensive bounding box calculations
--
type btConvexInternalAabbCachingShape is abstract new impact.d3.Shape.convex.internal.Item with private;
overriding procedure setLocalScaling (Self : in out btConvexInternalAabbCachingShape; scaling : in math.Vector_3);
overriding procedure getAabb (Self : in btConvexInternalAabbCachingShape; t : in Transform_3d;
aabbMin, aabbMax : out math.Vector_3);
procedure recalcLocalAabb (Self : in out btConvexInternalAabbCachingShape'Class);
procedure set_m_localScaling (Self : out Item; To : in math.Vector_3);
--- 'protected'
procedure getCachedLocalAabb (Self : in btConvexInternalAabbCachingShape; aabbMin, aabbMax : out math.Vector_3);
private
type Item is abstract new impact.d3.Shape.convex.item with
record
m_localScaling : math.Vector_3 := (1.0, 1.0, 1.0); -- local scaling. collisionMargin is not scaled !
m_implicitShapeDimensions : math.Vector_3;
m_collisionMargin : math.Real := impact.d3.collision.Margin.CONVEX_DISTANCE_MARGIN;
m_padding : math.Real;
end record;
type btConvexInternalAabbCachingShape is abstract new impact.d3.Shape.convex.internal.Item with
record
m_localAabbMin : math.Vector_3 := (1.0, 1.0, 1.0);
m_localAabbMax : math.Vector_3 := (-1.0, -1.0, -1.0);
m_isLocalAabbValid : Boolean := False;
end record;
procedure setCachedLocalAabb (Self : in out btConvexInternalAabbCachingShape; aabbMin, aabbMax : in math.Vector_3);
procedure getNonvirtualAabb (Self : in btConvexInternalAabbCachingShape'Class; trans : in Transform_3d;
aabbMin, aabbMax : out math.Vector_3;
margin : in math.Real);
end impact.d3.Shape.convex.internal;
|
src/fot/FOTC/Program/SortList/PropertiesI.agda | asr/fotc | 11 | 458 | <reponame>asr/fotc
------------------------------------------------------------------------------
-- Properties stated in the Burstall's paper
------------------------------------------------------------------------------
{-# OPTIONS --exact-split #-}
{-# OPTIONS --no-sized-types #-}
{-# OPTIONS --no-universe-polymorphism #-}
{-# OPTIONS --without-K #-}
module FOTC.Program.SortList.PropertiesI where
open import Common.FOL.Relation.Binary.EqReasoning
open import FOTC.Base
open import FOTC.Base.List
open import FOTC.Data.Bool
open import FOTC.Data.Bool.PropertiesI
open import FOTC.Data.Nat.Inequalities
open import FOTC.Data.Nat.Inequalities.PropertiesI
open import FOTC.Data.Nat.List.Type
open import FOTC.Data.Nat.Type
open import FOTC.Data.List
open import FOTC.Data.List.PropertiesI
open import FOTC.Program.SortList.Properties.Totality.BoolI
open import FOTC.Program.SortList.Properties.Totality.ListN-I
open import FOTC.Program.SortList.Properties.Totality.OrdList.FlattenI
open import FOTC.Program.SortList.Properties.Totality.OrdListI
open import FOTC.Program.SortList.Properties.Totality.OrdTreeI
open import FOTC.Program.SortList.Properties.Totality.TreeI
open import FOTC.Program.SortList.SortList
------------------------------------------------------------------------------
-- Induction on lit.
ind-lit : (A : D → Set) (f : D) → ∀ y₀ {xs} → ListN xs →
A y₀ →
(∀ {x} → N x → ∀ y → A y → A (f · x · y)) →
A (lit f xs y₀)
ind-lit A f y₀ lnnil Ay₀ ih = subst A (sym (lit-[] f y₀)) Ay₀
ind-lit A f y₀ (lncons {i} {is} Ni LNis) Ay₀ ih =
subst A
(sym (lit-∷ f i is y₀))
(ih Ni (lit f is y₀) (ind-lit A f y₀ LNis Ay₀ ih))
------------------------------------------------------------------------------
-- Burstall's lemma: If t is ordered then totree(i, t) is ordered.
toTree-OrdTree : ∀ {item t} → N item → Tree t → OrdTree t →
OrdTree (toTree · item · t)
toTree-OrdTree {item} Nitem tnil _ =
ordTree (toTree · item · nil)
≡⟨ subst (λ x → ordTree (toTree · item · nil) ≡
ordTree x)
(toTree-nil item)
refl
⟩
ordTree (tip item)
≡⟨ ordTree-tip item ⟩
true ∎
toTree-OrdTree {item} Nitem (ttip {i} Ni) _ =
case prf₁ prf₂ (x>y∨x≤y Ni Nitem)
where
prf₁ : i > item → OrdTree (toTree · item · tip i)
prf₁ i>item =
ordTree (toTree · item · tip i)
≡⟨ subst (λ t → ordTree (toTree · item · tip i) ≡ ordTree t)
(toTree-tip item i)
refl
⟩
ordTree (if (le i item)
then (node (tip i) item (tip item))
else (node (tip item) i (tip i)))
≡⟨ subst (λ t → ordTree (if (le i item)
then (node (tip i) item (tip item))
else (node (tip item) i (tip i))) ≡
ordTree (if t
then (node (tip i) item (tip item))
else (node (tip item) i (tip i))))
(x>y→x≰y Ni Nitem i>item)
refl
⟩
ordTree (if false
then (node (tip i) item (tip item))
else (node (tip item) i (tip i)))
≡⟨ subst (λ t → ordTree (if false
then (node (tip i) item (tip item))
else (node (tip item) i (tip i))) ≡
ordTree t)
(if-false (node (tip item) i (tip i)))
refl
⟩
ordTree (node (tip item) i (tip i))
≡⟨ ordTree-node (tip item) i (tip i) ⟩
ordTree (tip item)
&& ordTree (tip i)
&& le-TreeItem (tip item) i
&& le-ItemTree i (tip i)
≡⟨ subst (λ t → ordTree (tip item)
&& ordTree (tip i)
&& le-TreeItem (tip item) i
&& le-ItemTree i (tip i) ≡
t
&& ordTree (tip i)
&& le-TreeItem (tip item) i
&& le-ItemTree i (tip i))
(ordTree-tip item)
refl
⟩
true && ordTree (tip i) && le-TreeItem (tip item) i &&
le-ItemTree i (tip i)
≡⟨ subst (λ t → true
&& ordTree (tip i)
&& le-TreeItem (tip item) i
&& le-ItemTree i (tip i) ≡
true
&& t
&& le-TreeItem (tip item) i
&& le-ItemTree i (tip i))
(ordTree-tip i)
refl
⟩
true && true && le-TreeItem (tip item) i && le-ItemTree i (tip i)
≡⟨ subst (λ t → true && true && le-TreeItem (tip item) i &&
le-ItemTree i (tip i) ≡
true && true && t && le-ItemTree i (tip i))
(le-TreeItem-tip item i)
refl
⟩
true && true && le item i && le-ItemTree i (tip i)
≡⟨ subst (λ t → true && true && le item i && le-ItemTree i (tip i) ≡
true && true && t && le-ItemTree i (tip i))
(x<y→x≤y Nitem Ni i>item)
refl
⟩
true && true && true && le-ItemTree i (tip i)
≡⟨ subst (λ t → true && true && true && le-ItemTree i (tip i) ≡
true && true && true && t)
(le-ItemTree-tip i i)
refl
⟩
true && true && true && le i i
≡⟨ subst (λ t → true && true && true && le i i ≡
true && true && true && t)
(x≤x Ni)
refl
⟩
true && true && true && true
≡⟨ subst (λ t → true && true && true && true ≡ true && true && t)
(t&&x≡x true)
refl
⟩
true && true && true
≡⟨ subst (λ t → true && true && true ≡ true && t)
(t&&x≡x true)
refl
⟩
true && true
≡⟨ t&&x≡x true ⟩
true ∎
prf₂ : i ≤ item → OrdTree (toTree · item · tip i)
prf₂ i≤item =
ordTree (toTree · item · tip i)
≡⟨ subst (λ t → ordTree (toTree · item · tip i) ≡ ordTree t)
(toTree-tip item i)
refl
⟩
ordTree (if (le i item)
then (node (tip i) item (tip item))
else (node (tip item) i (tip i)))
≡⟨ subst (λ t → ordTree (if (le i item)
then (node (tip i) item (tip item))
else (node (tip item) i (tip i))) ≡
ordTree (if t
then (node (tip i) item (tip item))
else (node (tip item) i (tip i))))
i≤item
refl
⟩
ordTree (if true
then (node (tip i) item (tip item))
else (node (tip item) i (tip i)))
≡⟨ subst (λ t → ordTree (if true
then (node (tip i) item (tip item))
else (node (tip item) i (tip i))) ≡
ordTree t)
(if-true (node (tip i) item (tip item)))
refl
⟩
ordTree (node (tip i) item (tip item))
≡⟨ ordTree-node (tip i) item (tip item) ⟩
ordTree (tip i) && ordTree (tip item) && le-TreeItem (tip i) item &&
le-ItemTree item (tip item)
≡⟨ subst (λ t → ordTree (tip i) &&
ordTree (tip item) &&
le-TreeItem (tip i) item &&
le-ItemTree item (tip item) ≡
t &&
ordTree (tip item) &&
le-TreeItem (tip i) item &&
le-ItemTree item (tip item))
(ordTree-tip i)
refl
⟩
true && ordTree (tip item) && le-TreeItem (tip i) item &&
le-ItemTree item (tip item)
≡⟨ subst (λ t → true &&
ordTree (tip item) &&
le-TreeItem (tip i) item &&
le-ItemTree item (tip item) ≡
true &&
t &&
le-TreeItem (tip i) item &&
le-ItemTree item (tip item))
(ordTree-tip item)
refl
⟩
true && true && le-TreeItem (tip i) item && le-ItemTree item (tip item)
≡⟨ subst (λ t → true && true && le-TreeItem (tip i) item &&
le-ItemTree item (tip item) ≡
true && true && t && le-ItemTree item (tip item))
(le-TreeItem-tip i item)
refl
⟩
true && true && le i item && le-ItemTree item (tip item)
≡⟨ subst (λ t → true && true && le i item && le-ItemTree item (tip item) ≡
true && true && t && le-ItemTree item (tip item))
i≤item
refl
⟩
true && true && true && le-ItemTree item (tip item)
≡⟨ subst (λ t → true && true && true && le-ItemTree item (tip item) ≡
true && true && true && t)
(le-ItemTree-tip item item)
refl
⟩
true && true && true && le item item
≡⟨ subst (λ t → true && true && true && le item item ≡
true && true && true && t)
(x≤x Nitem)
refl
⟩
true && true && true && true
≡⟨ subst (λ t → true && true && true && true ≡ true && true && t)
(t&&x≡x true)
refl
⟩
true && true && true
≡⟨ subst (λ t → true && true && true ≡ true && t) (t&&x≡x true) refl ⟩
true && true
≡⟨ t&&x≡x true ⟩
true ∎
toTree-OrdTree {item} Nitem (tnode {t₁} {i} {t₂} Tt₁ Ni Tt₂) OTtnode =
case prf₁ prf₂ (x>y∨x≤y Ni Nitem)
where
prf₁ : i > item → OrdTree (toTree · item · node t₁ i t₂)
prf₁ i>item =
ordTree (toTree · item · node t₁ i t₂)
≡⟨ subst (λ t → ordTree (toTree · item · node t₁ i t₂) ≡ ordTree t)
(toTree-node item t₁ i t₂)
refl
⟩
ordTree (if (le i item)
then (node t₁ i (toTree · item · t₂))
else (node (toTree · item · t₁) i t₂))
≡⟨ subst (λ t → ordTree (if (le i item)
then (node t₁ i (toTree · item · t₂))
else (node (toTree · item · t₁) i t₂)) ≡
ordTree (if t
then (node t₁ i (toTree · item · t₂))
else (node (toTree · item · t₁) i t₂)))
(x>y→x≰y Ni Nitem i>item)
refl
⟩
ordTree (if false
then (node t₁ i (toTree · item · t₂))
else (node (toTree · item · t₁) i t₂))
≡⟨ subst (λ t → ordTree (if false
then (node t₁ i (toTree · item · t₂))
else (node (toTree · item · t₁) i t₂)) ≡
ordTree t)
(if-false (node (toTree · item · t₁) i t₂))
refl
⟩
ordTree (node (toTree · item · t₁) i t₂)
≡⟨ ordTree-node (toTree · item · t₁) i t₂ ⟩
ordTree (toTree · item · t₁) &&
ordTree t₂ &&
le-TreeItem (toTree · item · t₁) i &&
le-ItemTree i t₂
≡⟨ subst (λ t → ordTree (toTree · item · t₁) &&
ordTree t₂ &&
le-TreeItem (toTree · item · t₁) i &&
le-ItemTree i t₂ ≡
t &&
ordTree t₂ &&
le-TreeItem (toTree · item · t₁) i &&
le-ItemTree i t₂)
(toTree-OrdTree Nitem Tt₁
(leftSubTree-OrdTree Tt₁ Ni Tt₂ OTtnode))
refl
⟩
true && ordTree t₂ && le-TreeItem (toTree · item · t₁) i &&
le-ItemTree i t₂
≡⟨ subst (λ t → true &&
ordTree t₂ &&
le-TreeItem (toTree · item · t₁) i &&
le-ItemTree i t₂ ≡
true &&
t &&
le-TreeItem (toTree · item · t₁) i &&
le-ItemTree i t₂)
(rightSubTree-OrdTree Tt₁ Ni Tt₂ OTtnode)
refl
⟩
true && true && le-TreeItem (toTree · item · t₁) i && le-ItemTree i t₂
≡⟨ subst (λ t → true &&
true &&
le-TreeItem (toTree · item · t₁) i &&
le-ItemTree i t₂ ≡
true && true && t && le-ItemTree i t₂)
(toTree-OrdTree-helper₁ Ni Nitem i>item Tt₁
((&&-list₄-t₃
(ordTree-Bool Tt₁)
(ordTree-Bool Tt₂)
(le-TreeItem-Bool Tt₁ Ni)
(le-ItemTree-Bool Ni Tt₂)
(trans (sym (ordTree-node t₁ i t₂)) OTtnode))))
refl
⟩
true && true && true && le-ItemTree i t₂
≡⟨ subst (λ t → true && true && true && le-ItemTree i t₂ ≡
true && true && true && t)
(&&-list₄-t₄
(ordTree-Bool Tt₁)
(ordTree-Bool Tt₂)
(le-TreeItem-Bool Tt₁ Ni)
(le-ItemTree-Bool Ni Tt₂)
(trans (sym (ordTree-node t₁ i t₂)) OTtnode))
refl
⟩
true && true && true && true
≡⟨ subst (λ t → true && true && true && true ≡ true && true && t)
(t&&x≡x true)
refl
⟩
true && true && true
≡⟨ subst (λ t → true && true && true ≡ true && t) (t&&x≡x true) refl ⟩
true && true
≡⟨ t&&x≡x true ⟩
true ∎
prf₂ : i ≤ item → OrdTree (toTree · item · node t₁ i t₂)
prf₂ i≤item =
ordTree (toTree · item · node t₁ i t₂)
≡⟨ subst (λ t → ordTree (toTree · item · node t₁ i t₂) ≡ ordTree t)
(toTree-node item t₁ i t₂)
refl
⟩
ordTree (if (le i item)
then (node t₁ i (toTree · item · t₂))
else (node (toTree · item · t₁) i t₂))
≡⟨ subst (λ t → ordTree (if (le i item)
then (node t₁ i (toTree · item · t₂))
else (node (toTree · item · t₁) i t₂)) ≡
ordTree (if t
then (node t₁ i (toTree · item · t₂))
else (node (toTree · item · t₁) i t₂)))
i≤item
refl
⟩
ordTree (if true
then (node t₁ i (toTree · item · t₂))
else (node (toTree · item · t₁) i t₂))
≡⟨ subst (λ t → ordTree (if true
then (node t₁ i (toTree · item · t₂))
else (node (toTree · item · t₁) i t₂)) ≡
ordTree t)
(if-true (node t₁ i (toTree · item · t₂)))
refl
⟩
ordTree (node t₁ i (toTree · item · t₂))
≡⟨ ordTree-node t₁ i (toTree · item · t₂) ⟩
ordTree t₁ &&
ordTree (toTree · item · t₂) &&
le-TreeItem t₁ i &&
le-ItemTree i (toTree · item · t₂)
≡⟨ subst (λ t → ordTree t₁ &&
ordTree (toTree · item · t₂) &&
le-TreeItem t₁ i &&
le-ItemTree i (toTree · item · t₂) ≡
t &&
ordTree (toTree · item · t₂) &&
le-TreeItem t₁ i &&
le-ItemTree i (toTree · item · t₂))
(leftSubTree-OrdTree Tt₁ Ni Tt₂ OTtnode)
refl
⟩
true && ordTree (toTree · item · t₂) && le-TreeItem t₁ i &&
le-ItemTree i (toTree · item · t₂)
≡⟨ subst (λ t → true &&
ordTree (toTree · item · t₂) &&
le-TreeItem t₁ i &&
le-ItemTree i (toTree · item · t₂) ≡
true &&
t &&
le-TreeItem t₁ i &&
le-ItemTree i (toTree · item · t₂))
(toTree-OrdTree Nitem Tt₂
(rightSubTree-OrdTree Tt₁ Ni Tt₂ OTtnode))
refl
⟩
true && true && le-TreeItem t₁ i && le-ItemTree i (toTree · item · t₂)
≡⟨ subst (λ t → true &&
true &&
le-TreeItem t₁ i &&
le-ItemTree i (toTree · item · t₂) ≡
true &&
true &&
t &&
le-ItemTree i (toTree · item · t₂))
(&&-list₄-t₃
(ordTree-Bool Tt₁)
(ordTree-Bool Tt₂)
(le-TreeItem-Bool Tt₁ Ni)
(le-ItemTree-Bool Ni Tt₂)
(trans (sym (ordTree-node t₁ i t₂)) OTtnode))
refl
⟩
true && true && true && le-ItemTree i (toTree · item · t₂)
≡⟨ subst (λ t → true &&
true &&
true &&
le-ItemTree i (toTree · item · t₂) ≡
true && true && true && t)
(toTree-OrdTree-helper₂ Ni Nitem i≤item Tt₂
((&&-list₄-t₄
(ordTree-Bool Tt₁)
(ordTree-Bool Tt₂)
(le-TreeItem-Bool Tt₁ Ni)
(le-ItemTree-Bool Ni Tt₂)
(trans (sym (ordTree-node t₁ i t₂)) OTtnode))))
refl
⟩
true && true && true && true
≡⟨ subst (λ t → true && true && true && true ≡ true && true && t)
(t&&x≡x true)
refl
⟩
true && true && true
≡⟨ subst (λ t → true && true && true ≡ true && t) (t&&x≡x true) refl ⟩
true && true
≡⟨ t&&x≡x true ⟩
true ∎
------------------------------------------------------------------------------
-- Burstall's lemma: ord(maketree(is)).
-- makeTree-TreeOrd : ∀ {is} → ListN is → OrdTree (makeTree is)
-- makeTree-TreeOrd LNis =
-- ind-lit OrdTree toTree nil LNis ordTree-nil
-- (λ Nx y TOy → toTree-OrdTree Nx {!!} TOy)
makeTree-OrdTree : ∀ {is} → ListN is → OrdTree (makeTree is)
makeTree-OrdTree lnnil =
ordTree (lit toTree [] nil)
≡⟨ subst (λ t → ordTree (lit toTree [] nil) ≡ ordTree t)
(lit-[] toTree nil)
refl
⟩
ordTree nil
≡⟨ ordTree-nil ⟩
true ∎
makeTree-OrdTree (lncons {i} {is} Ni Lis) =
ordTree (lit toTree (i ∷ is) nil)
≡⟨ subst (λ t → ordTree (lit toTree (i ∷ is) nil) ≡ ordTree t)
(lit-∷ toTree i is nil)
refl
⟩
ordTree (toTree · i · (lit toTree is nil))
≡⟨ toTree-OrdTree Ni (makeTree-Tree Lis) (makeTree-OrdTree Lis) ⟩
true ∎
------------------------------------------------------------------------------
-- Burstall's lemma: If ord(is1) and ord(is2) and is1 ≤ is2 then
-- ord(concat(is1, is2)).
++-OrdList : ∀ {is js} → ListN is → ListN js → OrdList is → OrdList js →
≤-Lists is js → OrdList (is ++ js)
++-OrdList {js = js} lnnil LNjs LOis LOjs is≤js =
subst OrdList (sym (++-leftIdentity js)) LOjs
++-OrdList {js = js} (lncons {i} {is} Ni LNis) LNjs LOi∷is LOjs i∷is≤js =
subst OrdList (sym (++-∷ i is js)) lemma
where
lemma : OrdList (i ∷ is ++ js)
lemma =
ordList (i ∷ is ++ js)
≡⟨ ordList-∷ i (is ++ js) ⟩
le-ItemList i (is ++ js) && ordList (is ++ js)
≡⟨ subst (λ t → le-ItemList i (is ++ js) && ordList (is ++ js) ≡
t && ordList (is ++ js))
(++-OrdList-helper Ni LNis LNjs
(&&-list₂-t₁ (le-ItemList-Bool Ni LNis)
(ordList-Bool LNis)
(trans (sym (ordList-∷ i is)) LOi∷is))
(&&-list₂-t₁ (le-ItemList-Bool Ni LNjs)
(le-Lists-Bool LNis LNjs)
(trans (sym (le-Lists-∷ i is js)) i∷is≤js))
(&&-list₂-t₂ (le-ItemList-Bool Ni LNjs)
(le-Lists-Bool LNis LNjs)
(trans (sym (le-Lists-∷ i is js)) i∷is≤js))
)
refl
⟩
true && ordList (is ++ js)
≡⟨ subst (λ t → true && ordList (is ++ js) ≡ true && t)
(++-OrdList LNis LNjs (subList-OrdList Ni LNis LOi∷is) LOjs
(&&-list₂-t₂
(le-ItemList-Bool Ni LNjs)
(le-Lists-Bool LNis LNjs)
(trans (sym (le-Lists-∷ i is js)) i∷is≤js)))
refl
⟩
true && true
≡⟨ t&&x≡x true ⟩
true ∎
------------------------------------------------------------------------------
-- Burstall's lemma: If t is ordered then (flatten t) is ordered.
flatten-OrdList : ∀ {t} → Tree t → OrdTree t → OrdList (flatten t)
flatten-OrdList tnil OTt =
subst OrdList (sym flatten-nil) ordList-[]
flatten-OrdList (ttip {i} Ni) OTt =
ordList (flatten (tip i))
≡⟨ subst (λ t → ordList (flatten (tip i)) ≡ ordList t)
(flatten-tip i)
refl
⟩
ordList (i ∷ [])
≡⟨ ordList-∷ i [] ⟩
le-ItemList i [] && ordList []
≡⟨ subst₂ (λ t₁ t₂ → le-ItemList i [] && ordList [] ≡ t₁ && t₂)
(le-ItemList-[] i)
ordList-[]
refl
⟩
true && true
≡⟨ t&&x≡x true ⟩
true ∎
flatten-OrdList (tnode {t₁} {i} {t₂} Tt₁ Ni Tt₂) OTt =
ordList (flatten (node t₁ i t₂))
≡⟨ subst (λ t → ordList (flatten (node t₁ i t₂)) ≡ ordList t)
(flatten-node t₁ i t₂)
refl
⟩
ordList (flatten t₁ ++ flatten t₂)
≡⟨ ++-OrdList (flatten-ListN Tt₁)
(flatten-ListN Tt₂)
(flatten-OrdList Tt₁ (leftSubTree-OrdTree Tt₁ Ni Tt₂ OTt))
(flatten-OrdList Tt₂ (rightSubTree-OrdTree Tt₁ Ni Tt₂ OTt))
(flatten-OrdList-helper Tt₁ Ni Tt₂ OTt)
⟩
true ∎
|
src/util/icon/gotolab.asm | olifink/qspread | 0 | 244505 | <filename>src/util/icon/gotolab.asm
* Sprite gotolab
*
* Mode 4
* +----|---------------+
* - g gg gg w w -
* |g g g ww ww |
* |g gg gg wwwww |
* |g g g g wwwww |
* | g g g wwwww |
* | wwwwwwwww |
* | wwwwwww |
* | wwwww |
* | www |
* | w |
* | |
* | w w ww ww w |
* | w w w w w w w |
* | w w w ww ww w |
* | w www w w w w |
* | ww w w ww ww ww|
* +----|---------------+
*
section sprite
xdef mes_gotolab
mes_gotolab
dc.w $0100,$0000
dc.w 20,16,4,0
dc.l mcs_gotolab-*
dc.l mms_gotolab-*
dc.l 0
mcs_gotolab
dc.w $5900,$8808
dc.w $8080,$0000
dc.w $9200,$0D0D
dc.w $8080,$0000
dc.w $9B00,$0F0F
dc.w $8080,$0000
dc.w $9200,$8F0F
dc.w $8080,$0000
dc.w $5100,$0F0F
dc.w $8080,$0000
dc.w $0000,$3F3F
dc.w $E0E0,$0000
dc.w $0000,$1F1F
dc.w $C0C0,$0000
dc.w $0000,$0F0F
dc.w $8080,$0000
dc.w $0000,$0707
dc.w $0000,$0000
dc.w $0000,$0202
dc.w $0000,$0000
dc.w $0000,$0000
dc.w $0000,$0000
dc.w $0808,$9999
dc.w $A0A0,$0000
dc.w $0909,$5555
dc.w $2020,$0000
dc.w $0909,$5959
dc.w $A0A0,$0000
dc.w $0909,$D5D5
dc.w $2020,$0000
dc.w $0D0D,$5959
dc.w $B0B0,$0000
mms_gotolab
dc.w $5959,$8888
dc.w $8080,$0000
dc.w $9292,$0D0D
dc.w $8080,$0000
dc.w $9B9B,$0F0F
dc.w $8080,$0000
dc.w $9292,$8F8F
dc.w $8080,$0000
dc.w $5151,$0F0F
dc.w $8080,$0000
dc.w $0000,$3F3F
dc.w $E0E0,$0000
dc.w $0000,$1F1F
dc.w $C0C0,$0000
dc.w $0000,$0F0F
dc.w $8080,$0000
dc.w $0000,$0707
dc.w $0000,$0000
dc.w $0000,$0202
dc.w $0000,$0000
dc.w $0000,$0000
dc.w $0000,$0000
dc.w $0808,$9999
dc.w $A0A0,$0000
dc.w $0909,$5555
dc.w $2020,$0000
dc.w $0909,$5959
dc.w $A0A0,$0000
dc.w $0909,$D5D5
dc.w $2020,$0000
dc.w $0D0D,$5959
dc.w $B0B0,$0000
*
end
|
Task/XML-Input/Ada/xml-input-4.ada | LaudateCorpus1/RosettaCodeData | 1 | 4400 | with Ada.Text_IO;
with Sax.Readers;
with Input_Sources.Strings;
with Unicode.CES.Utf8;
with DOM.Readers;
with DOM.Core.Documents;
with DOM.Core.Nodes;
with DOM.Core.Attrs;
procedure Extract_Students is
Sample_String : String :=
"<Students>" &
"<Student Name=""April"" Gender=""F"" DateOfBirth=""1989-01-02"" />" &
"<Student Name=""Bob"" Gender=""M"" DateOfBirth=""1990-03-04"" />" &
"<Student Name=""Chad"" Gender=""M"" DateOfBirth=""1991-05-06"" />" &
"<Student Name=""Dave"" Gender=""M"" DateOfBirth=""1992-07-08"">" &
"<Pet Type=""dog"" Name=""Rover"" />" &
"</Student>" &
"<Student DateOfBirth=""1993-09-10"" Gender=""F"" Name=""Émily"" />" &
"</Students>";
Input : Input_Sources.Strings.String_Input;
Reader : DOM.Readers.Tree_Reader;
Document : DOM.Core.Document;
List : DOM.Core.Node_List;
begin
Input_Sources.Strings.Open (Sample_String, Unicode.CES.Utf8.Utf8_Encoding, Input);
DOM.Readers.Parse (Reader, Input);
Input_Sources.Strings.Close (Input);
Document := DOM.Readers.Get_Tree (Reader);
List := DOM.Core.Documents.Get_Elements_By_Tag_Name (Document, "Student");
for I in 0 .. DOM.Core.Nodes.Length (List) - 1 loop
Ada.Text_IO.Put_Line
(DOM.Core.Attrs.Value
(DOM.Core.Nodes.Get_Named_Item
(DOM.Core.Nodes.Attributes
(DOM.Core.Nodes.Item (List, I)), "Name")
)
);
end loop;
DOM.Readers.Free (Reader);
end Extract_Students;
|
processor/processor-nova_math_p.adb | SMerrony/dgemua | 2 | 15879 | <reponame>SMerrony/dgemua
-- MIT License
-- Copyright (c) 2021 <NAME>
-- Permission is hereby granted, free of charge, to any person obtaining a copy
-- of this software and associated documentation files (the "Software"), to deal
-- in the Software without restriction, including without limitation the rights
-- to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
-- copies of the Software, and to permit persons to whom the Software is
-- furnished to do so, subject to the following conditions:
-- The above copyright notice and this permission notice shall be included in all
-- copies or substantial portions of the Software.
-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-- IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
-- FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
-- AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
-- LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
-- OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
-- SOFTWARE.
with Ada.Text_IO; use Ada.Text_IO;
package body Processor.Nova_Math_P is
procedure Do_Nova_Math (I : in Decoded_Instr_T; CPU : in out CPU_T) is
DW : Dword_T;
begin
case I.Instruction is
when I_DIV =>
declare
UW, LW, Quot : Word_T;
begin
UW := DG_Types.Lower_Word (CPU.AC(0));
LW := DG_Types.Lower_Word (CPU.AC(1));
DW := Dword_From_Two_Words (UW, LW);
Quot := DG_Types.Lower_Word (CPU.AC(2));
if (UW >= Quot) or (Quot = 0) then
CPU.Carry := true;
else
CPU.Carry := false;
CPU.AC(0) := (Dw mod Dword_T(Quot)) and 16#0000_ffff#;
CPU.AC(1) := (Dw / Dword_T(Quot)) and 16#0000_ffff#;
end if;
end;
when I_MUL =>
DW := ((CPU.AC(1) and 16#0000_ffff#) *
(CPU.AC(2) and 16#0000_ffff#)) +
(CPU.AC(0) and 16#0000_ffff#);
CPU.AC(0) := Dword_T(DG_Types.Upper_Word (DW));
CPU.AC(1) := Dword_T(DG_Types.Lower_Word (DW));
when others =>
Put_Line ("ERROR: NOVA_MATH instruction " & To_String(I.Mnemonic) &
" not yet implemented");
raise Execution_Failure with "ERROR: NOVA_MATH instruction " & To_String(I.Mnemonic) &
" not yet implemented";
end case;
CPU.PC := CPU.PC + 1;
end Do_Nova_Math;
end Processor.Nova_Math_P; |
programs/oeis/115/A115067.asm | karttu/loda | 1 | 18251 | <gh_stars>1-10
; A115067: a(n) = (3*n^2 - n - 2)/2.
; 0,4,11,21,34,50,69,91,116,144,175,209,246,286,329,375,424,476,531,589,650,714,781,851,924,1000,1079,1161,1246,1334,1425,1519,1616,1716,1819,1925,2034,2146,2261,2379,2500,2624,2751,2881,3014,3150,3289,3431,3576,3724,3875,4029,4186,4346,4509,4675,4844,5016,5191,5369,5550,5734,5921,6111,6304,6500,6699,6901,7106,7314,7525,7739,7956,8176,8399,8625,8854,9086,9321,9559,9800,10044,10291,10541,10794,11050,11309,11571,11836,12104,12375,12649,12926,13206,13489,13775,14064,14356,14651,14949,15250,15554,15861,16171,16484,16800,17119,17441,17766,18094,18425,18759,19096,19436,19779,20125,20474,20826,21181,21539,21900,22264,22631,23001,23374,23750,24129,24511,24896,25284,25675,26069,26466,26866,27269,27675,28084,28496,28911,29329,29750,30174,30601,31031,31464,31900,32339,32781,33226,33674,34125,34579,35036,35496,35959,36425,36894,37366,37841,38319,38800,39284,39771,40261,40754,41250,41749,42251,42756,43264,43775,44289,44806,45326,45849,46375,46904,47436,47971,48509,49050,49594,50141,50691,51244,51800,52359,52921,53486,54054,54625,55199,55776,56356,56939,57525,58114,58706,59301,59899,60500,61104,61711,62321,62934,63550,64169,64791,65416,66044,66675,67309,67946,68586,69229,69875,70524,71176,71831,72489,73150,73814,74481,75151,75824,76500,77179,77861,78546,79234,79925,80619,81316,82016,82719,83425,84134,84846,85561,86279,87000,87724,88451,89181,89914,90650,91389,92131,92876,93624
mov $1,6
mul $1,$0
add $1,10
mul $1,$0
div $1,4
|
Chapter_4/Program 4.4/x86:64/Program_4.4_MASM.asm | chen150182055/Assembly | 272 | 92922 | ; Program 4.4
; Array - MASM (64-bit)
; Copyright (c) 2019 Hall & Slonka
extrn ExitProcess : proc
.data
array DWORD 1, 2, 3, 4
.code
_main PROC
; Load using byte offsets
lea rsi, array
mov eax, DWORD PTR [rsi]
mov ebx, DWORD PTR [rsi + 4]
; Save using indices
mov rdx, 2
mov DWORD PTR [rsi + rdx * 4], 10
mov rdx, 3
mov DWORD PTR [rsi + rdx * 4], 20
xor rcx, rcx
call ExitProcess
_main ENDP
END |
Assembly Tests/shiftTest.asm | idn0971/289-CPU | 2 | 3114 | <reponame>idn0971/289-CPU
addi t0, zero, 1
sll t1, t0, t0
slli t2, t1, 1
srl t3, t2, t0
srli t4, t3, 1
auipc t5, 0
#end : jal end |
MC_libks.asm | Kannagi/Super-Kannagi-Sound | 11 | 13275 |
.include "LKS/MC_OAM.asm"
.include "LKS/MC_Joypad.asm"
.include "LKS/MC_Printf.asm"
.include "LKS/MC_Load.asm"
.include "LKS/MC_Clear.asm"
.include "LKS/MC_BG.asm"
.include "LKS/MC_DMA.asm"
.include "LKS/MC_PAL.asm"
.include "LKS/variable.asm"
|
03_stack/stack.asm | mandm-pt/OperatingSystem | 0 | 172960 | <reponame>mandm-pt/OperatingSystem
;
;
;
jmp $ ; Jump forever
the_secret:
db "X"
times 510-($-$$) db 0 ; Padding and magic BIOS number.
dw 0xaa55 |
src/setup/ss_xy.asm | furrtek/GB303 | 90 | 173379 | <filename>src/setup/ss_xy.asm
setscreen_xy:
call write_pattinfo
ld hl,$9800+(32*2)+2
ld b,15
-:
ld c,16
--:
ld a,T_GRID
ldi (hl),a
dec c
jr nz,--
ld a,l
add 16
ld l,a
jr nc,+
inc h
+:
dec b
jr nz,-
ld de,text_xy
ld hl,$9800+(32*0)+1
ld b,TXT_NORMAL
call maptext
call setdefaultpal
ld hl,vbl_xy
call setvblhandler
call intset
ret
|
load.asm | funkacer/ZX80 | 0 | 97952 | DEVICE ZXSPECTRUM48
org $8000
start:
ld a,$D6
ld ($5800),a
ret
; Deployment: Snapshot
SAVESNA "load.sna", start
|
programs/oeis/132/A132352.asm | jmorken/loda | 1 | 162149 | <reponame>jmorken/loda<gh_stars>1-10
; A132352: Partial sums of A132351.
; 1,3,6,9,13,18,24,30,36,43,51,60,70,81,93,105,118,132,147,163,180,198,217,237,257,278,299,321,344,368,393,418,444,471,499,527,556,586,617,649,682,716,751,787,824,862,901,941,981,1022,1064,1107,1151,1196,1242,1289,1337
mov $30,$0
mov $32,$0
add $32,1
lpb $32
clr $0,30
mov $0,$30
sub $32,1
sub $0,$32
mov $27,$0
mov $29,$0
add $29,1
lpb $29
clr $0,27
mov $0,$27
sub $29,1
sub $0,$29
add $4,2
lpb $0
mov $1,$0
cal $1,326186 ; a(n) = n - A057521(n), where A057521 gives the powerful part of n.
mov $0,$1
add $0,$1
mov $4,$1
cmp $26,0
add $4,$26
lpe
mov $1,$4
sub $1,1
add $28,$1
lpe
add $31,$28
lpe
mov $1,$31
|
Subsets and Splits
No community queries yet
The top public SQL queries from the community will appear here once available.