id stringlengths 22 129 | text stringlengths 60 19.5k | arch stringclasses 9
values | syntax stringclasses 5
values | kind stringclasses 4
values | repo stringclasses 32
values | path stringlengths 7 108 | license stringclasses 10
values | commit stringlengths 40 40 | source_host stringclasses 1
value | category stringclasses 15
values | source_url stringlengths 85 192 | line_start int64 1 5.48k | line_end int64 4 5.5k |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
NetBSD/src:sys/arch/riscv/riscv/locore.S:12 | /* Set supervisor trap vector base register with ipi_handler */
PTR_LA a0, _C_LABEL(ipi_handler)
csrw stvec, a0
csrsi sie, SIE_SSIE
csrsi sstatus, SR_SIE // enable interrupts
li tp, 0
mv a0, s11
call _C_LABEL(cpu_init_secondary_processor)
/* t3 = __BIT(cpuindex % (sizeof(u_long) * NBBY)) */
li t3, 1
andi t... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | a7890ee99c2af93c8dd8db94e412051a296c1e74 | github | kernel | https://github.com/NetBSD/src/blob/a7890ee99c2af93c8dd8db94e412051a296c1e74/sys/arch/riscv/riscv/locore.S | 441 | 500 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:13 | /*
* set curlwp (tp and curcpu()->ci_curlwp) now we know the
* idle lwp from curcpu()->ci_idlelwp
*/
PTR_L tp, CI_IDLELWP(a0) /* tp = curcpu()->ci_idlelwp */
PTR_S tp, CI_CURLWP(a0) /* curlwp is idlelwp */
/* get my stack from lwp */
PTR_L t2, L_PCB(tp) /* t2 = lwp_getpcb(idlelwp) */
li t3, UPAGES * PAGE_S... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | a7890ee99c2af93c8dd8db94e412051a296c1e74 | github | kernel | https://github.com/NetBSD/src/blob/a7890ee99c2af93c8dd8db94e412051a296c1e74/sys/arch/riscv/riscv/locore.S | 481 | 540 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:14 | bnez tp, 1f // tp != 0, something went wrong.
csrr tp, scause // get cause
bgez tp, 2f // MSB is set if interrupt
csrw sip, zero // clear all interrupts
csrrw tp, sscratch, zero // get back our thread pointer
sret
1:
wfi
j 1b
2:
wfi
j 2b
#endif
.align 3
.Lstart:
#ifdef _LP64
.quad start
#else
.... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | a7890ee99c2af93c8dd8db94e412051a296c1e74 | github | kernel | https://github.com/NetBSD/src/blob/a7890ee99c2af93c8dd8db94e412051a296c1e74/sys/arch/riscv/riscv/locore.S | 521 | 580 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:15 | tail ___CONCAT(EARLYCONS, _platform_early_putchar)
#else
#define SBI_LEGACY_CONSOLE_PUTCHAR 1
li a7, SBI_LEGACY_CONSOLE_PUTCHAR
ecall
ret
#endif
END(uartputc)
ENTRY_NP(uartgetc)
#ifdef EARLYCONS
li a0, -1
#else
#define SBI_LEGACY_CONSOLE_GETCHAR 2
li a7, SBI_LEGACY_CONSOLE_GETCHAR
ecall
ret
#endif
ENTRY_NP(c... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | a7890ee99c2af93c8dd8db94e412051a296c1e74 | github | kernel | https://github.com/NetBSD/src/blob/a7890ee99c2af93c8dd8db94e412051a296c1e74/sys/arch/riscv/riscv/locore.S | 561 | 620 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:16 | END(cpu_Debugger)
ENTRY_NP(locore_prints)
addi sp, sp, -(SZREG * 2)
REG_S s0, (0 * SZREG)(sp)
mv s0, ra
1:
lbu a0, 0(s0)
beqz a0, 2f
call uartputc
addi s0, s0, 1
j 1b
2:
addi s0, s0, 8 // s0 points to the null terminator
andi ra, s0, -8
REG_L s0, (0 * SZREG)(sp)
addi sp, sp, (SZREG * 2)
ret
END(locore... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | a7890ee99c2af93c8dd8db94e412051a296c1e74 | github | kernel | https://github.com/NetBSD/src/blob/a7890ee99c2af93c8dd8db94e412051a296c1e74/sys/arch/riscv/riscv/locore.S | 601 | 660 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:17 | // Word size in bits
li s0, (SZREG * 8)
1:
addi s0, s0, -4 // nibble shift
srl a0, s1, s0 // extract ...
andi a0, a0, 0xf
bltu a0, s2, 2f
addi a0, a0, ('a' - '0' - 10)
2: addi a0, a0, '0'
call uartputc
beqz s0, 3f
and a0, s0, (16 - 1)
bnez a0, 1b
li a0, '_'
call uartputc
j 1b
3:
REG_L s0, (0 * SZR... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | a7890ee99c2af93c8dd8db94e412051a296c1e74 | github | kernel | https://github.com/NetBSD/src/blob/a7890ee99c2af93c8dd8db94e412051a296c1e74/sys/arch/riscv/riscv/locore.S | 641 | 700 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:18 | li a0, '\n'
call uartputc
li a0, '\r'
call uartputc
REG_L ra, (1 * SZREG)(sp)
addi sp, sp, (SZREG * 2)
ret
END(locore_printxnl)
#endif /* VERBOSE_INIT_RISCV */
.data
.align 2
hart_boot:
.word 0
/*
* Allocate some memory after the kernel image for stacks and
* bootstrap L1PT
*/
// .section "_init_... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | a7890ee99c2af93c8dd8db94e412051a296c1e74 | github | kernel | https://github.com/NetBSD/src/blob/a7890ee99c2af93c8dd8db94e412051a296c1e74/sys/arch/riscv/riscv/locore.S | 681 | 729 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:18 | li a0, '\n'
call uartputc
li a0, '\r'
call uartputc
REG_L ra, (1 * SZREG)(sp)
addi sp, sp, (SZREG * 2)
ret
END(locore_printxnl)
#endif /* VERBOSE_INIT_RISCV */
.data
.align 2
hart_boot:
.word 0
/*
* Allocate some memory after the kernel image for stacks and
* bootstrap L1PT
*/
.section "_init_me... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | 100a3398b8d3c64e571cff36b46c23431b410e09 | github | kernel | https://github.com/NetBSD/src/blob/100a3398b8d3c64e571cff36b46c23431b410e09/sys/arch/riscv/riscv/locore.S | 681 | 729 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:13 | /*
* set curlwp (tp and curcpu()->ci_curlwp) now we know the
* idle lwp from curcpu()->ci_idlelwp
*/
PTR_L tp, CI_IDLELWP(a0) /* tp = curcpu()->ci_idlelwp */
PTR_S tp, CI_CURLWP(a0) /* curlwp is idlelwp */
/* get my stack from lwp */
PTR_L t2, L_PCB(tp) /* t2 = lwp_getpcb(idlelwp) */
li t3, UPAGES * PAGE_S... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | f22ed7e5e69c72d9f89e9b834ac9ef4f6fc693a4 | github | kernel | https://github.com/NetBSD/src/blob/f22ed7e5e69c72d9f89e9b834ac9ef4f6fc693a4/sys/arch/riscv/riscv/locore.S | 481 | 540 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:3 | ENTRY_NP(start)
csrw sie, zero // disable interrupts
csrw sip, zero // clear any pending
li s0, SR_FS
csrc sstatus, s0 // disable FP
mv s10, a0 // copy hartid
mv s11, a1 // copy dtb PA
/* set the stack pointer for boot */
PTR_LA t0, _C_LABEL(bootstk)
mv sp, t0
VPRINTS("\n------------\nNetBSD start\... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | 6345bad4cf90683aa020ee19fd41aef146c00135 | github | kernel | https://github.com/NetBSD/src/blob/6345bad4cf90683aa020ee19fd41aef146c00135/sys/arch/riscv/riscv/locore.S | 81 | 140 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:4 | /*
* Our load address is not fixed, but our VA is. We need to construct
* an initial PDETAB.
*
* The space for the inital page table is included in the kernel
* .bss size calculation so we know the space exists.
*/
li a1, 0
PTR_LA s2, _C_LABEL(l1_pte)
mv s4, s2 // last page table
#ifdef _LP64
PTR_LA... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | 6345bad4cf90683aa020ee19fd41aef146c00135 | github | kernel | https://github.com/NetBSD/src/blob/6345bad4cf90683aa020ee19fd41aef146c00135/sys/arch/riscv/riscv/locore.S | 121 | 180 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:8 | li a0, 'P'
call _C_LABEL(uartputc)
/* Set supervisor trap vector base register */
PTR_LA t0, vstart
add t0, t0, s8
csrw stvec, t0
/* Set supervisor address translation and protection register */
srli t1, s4, PGSHIFT
#ifdef _LP64
li t0, SATP_MODE_SV39
#else
li t0, SATP_MODE_SV32
#endif
or t0, t0, t1
sfence.... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | 3a3e6e6861107fa30395b99abb65697f94ef1bf8 | github | kernel | https://github.com/NetBSD/src/blob/3a3e6e6861107fa30395b99abb65697f94ef1bf8/sys/arch/riscv/riscv/locore.S | 281 | 340 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:9 | PTR_LA a0, _C_LABEL(cpu_exception_handler)
csrw stvec, a0
PTR_LA t0, bootstk // top of lwp0uspace
PTR_S t0, L_PCB(tp) // set uarea of lwp (already zeroed)
addi sp, t0, -TF_LEN // switch to new stack
PTR_S sp, L_MD_UTF(tp) // store pointer to empty trapframe
PTR_LA t1, _C_LABEL(kernel_pmap_store)
add t2, s4,... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | 3a3e6e6861107fa30395b99abb65697f94ef1bf8 | github | kernel | https://github.com/NetBSD/src/blob/3a3e6e6861107fa30395b99abb65697f94ef1bf8/sys/arch/riscv/riscv/locore.S | 321 | 380 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:10 | // Now we should ready to start initializing the kernel.
mv a0, s10 // hartid
mv a1, s11 // dtb (physical)
li s0, 0 // zero frame pointer
call _C_LABEL(init_riscv) // do MD startup
tail _C_LABEL(main) // and transfer to main
/* No return from main */
END(start)
#if defined(MULTIPROCESSOR)
// a0 is hart... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | 3a3e6e6861107fa30395b99abb65697f94ef1bf8 | github | kernel | https://github.com/NetBSD/src/blob/3a3e6e6861107fa30395b99abb65697f94ef1bf8/sys/arch/riscv/riscv/locore.S | 361 | 420 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:11 | */
/* set stack pointer for boot */
li t1, BOOT_AP_STACKSIZE // XXXNH do a shift
mul t1, s9, t1
PTR_LA t0, _C_LABEL(bootstk)
/* sp = bootstk + (BOOT_AP_STACKSIZE * cpuindex) */
add sp, t0, t1
/*
* Calculate the difference between the VA and PA for start and
* keep in s8.
*/
PTR_LA t0, start
PTR_L s8,... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | 3a3e6e6861107fa30395b99abb65697f94ef1bf8 | github | kernel | https://github.com/NetBSD/src/blob/3a3e6e6861107fa30395b99abb65697f94ef1bf8/sys/arch/riscv/riscv/locore.S | 401 | 460 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:12 | #endif
or t0, t0, t1
sfence.vma
csrw satp, t0
.align 2
.global vmpstart
vmpstart:
// MMU is on!
csrw sscratch, zero // zero in sscratch to mark kernel
/* Set the global pointer */
.option push
.option norelax
lla gp, __global_pointer$
.option pop
/* Set SP to VA */
add sp, sp, s8
/* Set supervisor t... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | 3a3e6e6861107fa30395b99abb65697f94ef1bf8 | github | kernel | https://github.com/NetBSD/src/blob/3a3e6e6861107fa30395b99abb65697f94ef1bf8/sys/arch/riscv/riscv/locore.S | 441 | 500 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:13 | /* wait for the mailbox start bit to become true */
1:
fence rw, r /* matches cpu_boot_secondary_processors */
LONG_L t0, 0(t4)
and t0, t0, t3
bne t0, zero, 9f
wfi
j 1b
9:
/* Set supervisor trap vector base register */
PTR_LA a0, _C_LABEL(cpu_exception_handler)
csrw stvec, a0
li t0, CI_SIZE
mul t0, s9, t0... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | 3a3e6e6861107fa30395b99abb65697f94ef1bf8 | github | kernel | https://github.com/NetBSD/src/blob/3a3e6e6861107fa30395b99abb65697f94ef1bf8/sys/arch/riscv/riscv/locore.S | 481 | 540 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:14 | END(cpu_mpstart)
toomanyharts:
PRINTS("too many harts, or hart id doens't exist in cpu_hart[]\n")
1: wfi
j 1b
/*
* A very basic exception handler to just return when an IPI comes in during
* AP bringup.
*
* The handler address needs to have bottom two bits as zero.
*/
.align 2
ipi_handler:
csrrw tp, sscrat... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | 3a3e6e6861107fa30395b99abb65697f94ef1bf8 | github | kernel | https://github.com/NetBSD/src/blob/3a3e6e6861107fa30395b99abb65697f94ef1bf8/sys/arch/riscv/riscv/locore.S | 521 | 580 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:15 | #else
.word start
#endif
#ifdef CONSADDR
.align 3
.Lconsaddr:
#ifdef _LP64
.quad CONSADDR
#else
.word CONSADDR
#endif
#endif
ENTRY_NP(uartputc)
#ifdef EARLYCONS
tail ___CONCAT(EARLYCONS, _platform_early_putchar)
#else
#define SBI_LEGACY_CONSOLE_PUTCHAR 1
li a7, SBI_LEGACY_CONSOLE_PUTCHAR
ecall
ret
#endif
EN... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | 3a3e6e6861107fa30395b99abb65697f94ef1bf8 | github | kernel | https://github.com/NetBSD/src/blob/3a3e6e6861107fa30395b99abb65697f94ef1bf8/sys/arch/riscv/riscv/locore.S | 561 | 620 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:16 | bgeu a0, a1, 1f
2:
sb zero, 0(a0)
addi a0, a0, 1
bne a1, a0, 2b
1:
ret
END(clear_bss)
.globl _C_LABEL(cpu_Debugger_insn)
.globl _C_LABEL(cpu_Debugger_ret)
ENTRY_NP(cpu_Debugger)
cpu_Debugger_insn:
ebreak
cpu_Debugger_ret:
ret
END(cpu_Debugger)
#if defined(VERBOSE_INIT_RISCV)
ENTRY_NP(locore_prints)
addi ... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | 3a3e6e6861107fa30395b99abb65697f94ef1bf8 | github | kernel | https://github.com/NetBSD/src/blob/3a3e6e6861107fa30395b99abb65697f94ef1bf8/sys/arch/riscv/riscv/locore.S | 601 | 660 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:17 | END(locore_prints)
ENTRY_NP(locore_printx)
addi sp, sp, -(SZREG * 4)
REG_S s0, (0 * SZREG)(sp)
REG_S s1, (1 * SZREG)(sp)
REG_S s2, (2 * SZREG)(sp)
REG_S ra, (3 * SZREG)(sp)
mv s1, a0 // our print value
li s2, 10
li a0, '0'
call uartputc
li a0, 'x'
call uartputc
// Word size in bits
li s0, (SZREG * 8)... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | 3a3e6e6861107fa30395b99abb65697f94ef1bf8 | github | kernel | https://github.com/NetBSD/src/blob/3a3e6e6861107fa30395b99abb65697f94ef1bf8/sys/arch/riscv/riscv/locore.S | 641 | 700 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:18 | j 1b
3:
REG_L s0, (0 * SZREG)(sp)
REG_L s1, (1 * SZREG)(sp)
REG_L s2, (2 * SZREG)(sp)
REG_L ra, (3 * SZREG)(sp)
addi sp, sp, (SZREG * 4)
ret
END(locore_printx)
ENTRY_NP(locore_printxnl)
addi sp, sp, -(SZREG * 2)
REG_S ra, (1 * SZREG)(sp)
call locore_printx
li a0, '\n'
call uartputc
li a0, '\r'
call ua... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | 3a3e6e6861107fa30395b99abb65697f94ef1bf8 | github | kernel | https://github.com/NetBSD/src/blob/3a3e6e6861107fa30395b99abb65697f94ef1bf8/sys/arch/riscv/riscv/locore.S | 681 | 740 |
NetBSD/src:sys/arch/riscv/riscv/locore.S:19 | */
.section "_init_memory", "aw", %nobits
.align PGSHIFT
.global _C_LABEL(lwp0uspace)
_C_LABEL(lwp0uspace):
.space UPAGES * PAGE_SIZE
bootstk:
#ifdef MULTIPROCESSOR
.space BOOT_AP_STACKSIZE * (MAXCPUS - 1)
#endif
.section "_init_memory", "aw", %nobits
.align PGSHIFT
mmutables_start:
bootstrap_pde:
.global _C... | riscv | intel-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/locore.S | BSD-2-Clause | 3a3e6e6861107fa30395b99abb65697f94ef1bf8 | github | kernel | https://github.com/NetBSD/src/blob/3a3e6e6861107fa30395b99abb65697f94ef1bf8/sys/arch/riscv/riscv/locore.S | 721 | 747 |
NetBSD/src:sys/arch/riscv/riscv/spl.S:1 | /* $NetBSD: spl.S,v 1.8 2023/06/12 19:04:14 skrll Exp $ */
/*-
* Copyright (c) 2014,2023 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Matt Thomas of 3am Software Foundry, and Nick Hudson.
*
* Redistribution and use in source ... | riscv | gas-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/spl.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/riscv/riscv/spl.S | 1 | 60 |
NetBSD/src:sys/arch/riscv/riscv/spl.S:2 | .type _C_LABEL(ipl_sie_map), @object
.p2align INT_SCALESHIFT
_C_LABEL(ipl_sie_map):
.word 0 /* IPL_NONE */
.word 0 /* IPL_SOFTCLOCK */
.word 0 /* IPL_SOFTBIO */
.word 0 /* IPL_SOFTNET */
.word 0 /* IPL_SOFTSERIAL */
.word SIE_SEIE /* IPL_VM */
.word SIE_SEIE | SIE_STIE /* IPL_SCHED */
... | riscv | gas-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/spl.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/riscv/riscv/spl.S | 41 | 100 |
NetBSD/src:sys/arch/riscv/riscv/spl.S:3 | 3:
#endif /* __HAVE_FAST_SOFTINTS */
2:
ret // return (or do softints)
END(splx)
#if IPL_NONE != 0
#error IPL_NONE is not 0
#endif
ENTRY_NP(spl0)
PTR_L a3, L_CPU(tp) // get curcpu()
INT_S zero, CI_CPL(a3) // set current IPL to IPL_NONE
li t2, (SIE_SEIE | SIE_STIE | SIE_SSIE)
csrs sie, t2
csrsi sstatus, SR_... | riscv | gas-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/spl.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/riscv/riscv/spl.S | 81 | 140 |
NetBSD/src:sys/arch/riscv/riscv/spl.S:4 | PTR_ADDI t3, t3, 1 << INT_SCALESHIFT
not t5, t5
and t5, t5, t0
beq t5, zero, 1f
addi t1, t1, 1
bne t1, t2, 2b
1:
LONG_S t0, 0(a0)
mv a0, t1
jr ra
END(splintr)
ENTRY_NP(splsoftclock)
li t1, IPL_SOFTCLOCK
INT_L t0, _C_LABEL(ipl_sie_map) + SZINT * IPL_SOFTCLOCK
j _splraise
END(splsoftclock)
ENTRY_N... | riscv | gas-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/spl.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/riscv/riscv/spl.S | 121 | 180 |
NetBSD/src:sys/arch/riscv/riscv/spl.S:5 | ENTRY_NP(splvm)
li t1, IPL_VM
INT_L t0, _C_LABEL(ipl_sie_map) + SZINT * IPL_VM
j _splraise
END(splvm)
ENTRY_NP(splsched)
li t1, IPL_SCHED
INT_L t0, _C_LABEL(ipl_sie_map) + SZINT * IPL_SCHED
j _splraise
END(splsched)
ENTRY_NP(splhigh)
li t1, IPL_HIGH
INT_L t0, _C_LABEL(ipl_sie_map) + SZINT * IPL_HIGH
j _splr... | riscv | gas-like | handwritten | NetBSD/src | sys/arch/riscv/riscv/spl.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/riscv/riscv/spl.S | 161 | 199 |
NetBSD/src:sys/arch/rs6000/rs6000/locore.S:2 | #include <sys/syscall.h>
#include <machine/param.h>
#include <machine/psl.h>
#include <machine/trap.h>
#include <machine/asm.h>
#include <powerpc/spr.h>
#include <powerpc/oea/spr.h>
#include "ksyms.h"
/* Use common machine type */
/* .machine "com" */
/*
* Some instructions gas doesn't understand (yet?)
*/
#def... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/rs6000/rs6000/locore.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/rs6000/rs6000/locore.S | 41 | 100 |
NetBSD/src:sys/arch/rs6000/rs6000/locore.S:3 | /*
* This symbol is here for the benefit of kvm_mkdb, and is supposed to
* mark the start of kernel text.
*/
.text
.globl _C_LABEL(kernel_text)
_C_LABEL(kernel_text):
/*
* Startup entry. Note, this must be the first thing in the text
* segment!
*/
.text
.globl __start
__start:
li 0,0
mtmsr 0 /* Disable... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/rs6000/rs6000/locore.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/rs6000/rs6000/locore.S | 81 | 140 |
NetBSD/src:sys/arch/rs6000/rs6000/locore.S:4 | /* enable internal i/d-cache */
mfpvr 9
rlwinm 9,9,16,16,31
cmpwi %r9,1
beq 3f /* not needed for 601 */
mfspr 11,SPR_HID0
andi. 0,11,HID0_DCE
ori 11,11,HID0_ICE|HID0_DCE
ori 8,11,HID0_ICFI
bne 1f /* don't invalidate the D-cache */
ori 8,8,HID0_DCI /* unless it wasn't enabled */
1:
sync
mtspr SPR_HID0,8... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/rs6000/rs6000/locore.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/rs6000/rs6000/locore.S | 121 | 180 |
NetBSD/src:sys/arch/rs6000/rs6000/locore.S:5 | _C_LABEL(enable_intr):
mfmsr 3
ori 4,3,PSL_EE@l
mtmsr 4
blr
.globl _C_LABEL(disable_intr)
_C_LABEL(disable_intr):
mfmsr 3
andi. 4,3,~PSL_EE@l
mtmsr 4
blr
/*
* Pull in common switch / setfault code.
*/
#include <powerpc/powerpc/locore_subr.S>
/*
* Pull in common trap vector code.
*/
#include <powerpc/pow... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/rs6000/rs6000/locore.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/rs6000/rs6000/locore.S | 161 | 187 |
NetBSD/src:sys/arch/rs6000/stand/boot/srt0.s:1 | /* $NetBSD: srt0.s,v 1.1 2007/12/17 19:09:54 garbled Exp $ */
/*
* Copyright (C) 1996-1999 Cort Dougan (cort@fsmlasb.com).
* Copyright (C) 1996-1999 Gary Thomas (gdt@osf.org).
* Copyright (C) 1996-1999 Paul Mackeras (paulus@linuxcare.com).
* All rights reserved.
*
* Redistribution and use in source and binary fo... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/rs6000/stand/boot/srt0.s | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/rs6000/stand/boot/srt0.s | 1 | 60 |
NetBSD/src:sys/arch/rs6000/stand/boot/srt0.s:2 | /* when we start, the IPLCB pointer is in r3, and the extended one is in r4 */
.text
.globl _start
_start:
bl start
start:
mr 11,3 /* save the IPLCB pointer in r11 */
mr 12,4 /* save the extended IPLCB in r12 */
li 3,MSR_IP /* Establish default MSR value */
mtmsr 3
isync
mflr 7
bl flush_icache
mfspr 3,1... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/rs6000/stand/boot/srt0.s | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/rs6000/stand/boot/srt0.s | 41 | 100 |
NetBSD/src:sys/arch/rs6000/stand/boot/srt0.s:3 | * no matter where we're loaded, move ourselves to -Ttext address
*/
relocate:
lis 4,_start@h
ori 4,4,_start@l
lis 5,end@h
ori 5,5,end@l
addi 5,5,3 /* Round up - just in case */
sub 5,5,4 /* Compute # longwords to move */
srwi 5,5,2
mtctr 5
subi 3,3,4 /* Set up for loop */
subi 4,4,4
2:
lwzu 5,4(3)
stwu ... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/rs6000/stand/boot/srt0.s | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/rs6000/stand/boot/srt0.s | 81 | 140 |
NetBSD/src:sys/arch/rs6000/stand/boot/srt0.s:4 | .globl run
run:
mtctr 7 /* Entry point */
bctr
/*
* Flush instruction cache
*/
.globl flush_icache
flush_icache:
mflr 5
bl flush_dcache
mfspr 4,1008
li 4,0
ori 4,4,HID0_ICE|HID0_ICFI
or 3,3,4
mtspr 1008,3
andc 3,3,4
ori 3,3,HID0_ICE
mtspr 1008,3
mtlr 5
blr
/*
* Flush data ca... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/rs6000/stand/boot/srt0.s | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/rs6000/stand/boot/srt0.s | 121 | 177 |
NetBSD/src:sys/arch/rs6000/stand/boot/srt0.s:5 | * write LEDS
*/
.globl led
led:
mfmsr 5 /* save MSR to r5 */
lis 7,0xffff
ori 7,7,~(MSR_DR)
and 6,5,7
mtmsr 6
isync
#endif
/*
* local stack
*/
.comm .stack,8192,4 | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/rs6000/stand/boot/srt0.s | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/rs6000/stand/boot/srt0.s | 161 | 177 |
NetBSD/src:sys/arch/rs6000/stand/boot/srt0_pwr.s:2 | #define HID0_ICFI (1<<11)
#define HID0_DCE (1<<14)
#define HID0_ICE (1<<15)
/* when we start, the IPLCB pointer is in r3, and the extended one is in r4 */
.machine "com"
.text
.globl _start
_start:
bl start
start:
li 2,MSR_ME|MSR_AL /* Establish default MSR value */
mtmsr 2
isync
#if 0
/*
mflr 7
bl flush_ic... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/rs6000/stand/boot/srt0_pwr.s | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/rs6000/stand/boot/srt0_pwr.s | 41 | 100 |
NetBSD/src:sys/arch/rs6000/stand/boot/srt0_pwr.s:3 | /*
* no matter where we're loaded, move ourselves to -Ttext address
*/
relocate:
lis 4,_start@h
ori 4,4,_start@l
lis 5,end@h
ori 5,5,end@l
addi 5,5,3 /* Round up - just in case */
sub 5,5,4 /* Compute # longwords to move */
srwi 5,5,2
mtctr 5
subi 3,3,4 /* Set up for loop */
subi 4,4,4
2:
lwzu 5,4(3)
s... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/rs6000/stand/boot/srt0_pwr.s | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/rs6000/stand/boot/srt0_pwr.s | 81 | 140 |
NetBSD/src:sys/arch/rs6000/stand/boot/srt0_pwr.s:4 | * run(startsym, endsym, args, bootinfo, entry)
*/
.globl run
run:
mtctr 7 /* Entry point */
bctr
/*
* Flush instruction cache
*/
.globl flush_icache
flush_icache:
mflr 5
bl flush_dcache
mfspr 4,1008
li 4,0
ori 4,4,HID0_ICE|HID0_ICFI
or 3,3,4
mtspr 1008,3
andc 3,3,4
ori 3,3,HID0... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/rs6000/stand/boot/srt0_pwr.s | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/rs6000/stand/boot/srt0_pwr.s | 121 | 179 |
NetBSD/src:sys/arch/rs6000/stand/boot/srt0_pwr.s:5 | #if 0
/*
* write LEDS
*/
.globl led
led:
mfmsr 5 /* save MSR to r5 */
lis 7,0xffff
ori 7,7,~(MSR_DR)
and 6,5,7
mtmsr 6
isync
#endif
/*
* local stack
*/
.comm .stack,8192,4 | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/rs6000/stand/boot/srt0_pwr.s | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/rs6000/stand/boot/srt0_pwr.s | 161 | 179 |
NetBSD/src:sys/arch/sandpoint/sandpoint/locore.S:2 | #include <sys/syscall.h>
#include <machine/param.h>
#include <machine/psl.h>
#include <machine/trap.h>
#include <machine/asm.h>
#include <powerpc/spr.h>
#include <powerpc/oea/spr.h>
#include <powerpc/oea/hid.h>
#include "ksyms.h"
/*
* Some instructions gas doesn't understand (yet?)
*/
#define bdneq bdnzf 2,
/*
... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sandpoint/sandpoint/locore.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sandpoint/sandpoint/locore.S | 41 | 100 |
NetBSD/src:sys/arch/sandpoint/sandpoint/locore.S:3 | __start:
li 0,0
mtmsr 0 /* Disable FPU/MMU/exceptions */
isync
/* Enable data and instruction caches */
mfspr 8,1008
ori 8, 8, (HID0_ICE | HID0_DCE)@l
mtspr 1008,8
/* compute end of kernel memory */
#if NKSYMS || defined(DDB) || defined(MODULAR)
lis 7,_C_LABEL(startsym)@ha
addi 7,7,_C_LABEL(startsym)@l
st... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sandpoint/sandpoint/locore.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sandpoint/sandpoint/locore.S | 81 | 140 |
NetBSD/src:sys/arch/sandpoint/sandpoint/locore.S:4 | /* 3 and 4 were updated here, 5 and 6 are passed intact */
bl _C_LABEL(initppc)
bl _C_LABEL(main)
loop: b loop /* not reached */
.globl _C_LABEL(jump_to_ppc_reset_entry)
_C_LABEL(jump_to_ppc_reset_entry):
mfmsr 3
ori 3,3,PSL_IP@l
mtmsr 3
isync
ba 0xFFF00100
/*
* Include common switch / setfault code
*/
... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sandpoint/sandpoint/locore.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sandpoint/sandpoint/locore.S | 121 | 150 |
NetBSD/src:sys/arch/sandpoint/stand/altboot/entry.S:1 | /* $NetBSD: entry.S,v 1.6 2012/01/14 20:03:12 phx Exp $ */
#include <powerpc/psl.h>
#include <powerpc/spr.h>
#include <powerpc/oea/spr.h>
#include <powerpc/oea/bat.h>
#include <powerpc/oea/hid.h>
.text
.globl _start
_start:
/*
* Save possible argc and argv values from the firmware, usually
* passed in r3 and r... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sandpoint/stand/altboot/entry.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sandpoint/stand/altboot/entry.S | 1 | 60 |
NetBSD/src:sys/arch/sandpoint/stand/altboot/entry.S:2 | mfspr 11,SPR_HID0
andi. 0,11,HID0_DCE
ori 11,11,HID0_ICE
ori 8,11,HID0_ICFI
bne 1f /* don't invalidate the D-cache */
ori 8,8,HID0_DCFI /* unless it wasn't enabled */
1:
mfmsr 0
andi. 0,0,PSL_DR
beq 2f
lis 5,0xfec00000@ha /* CONFIG_ADDR of PCI */
lis 6,0xfee00000@ha /* CONFIG_DATA of PCI */
mfspr 3,SPR_... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sandpoint/stand/altboot/entry.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sandpoint/stand/altboot/entry.S | 41 | 100 |
NetBSD/src:sys/arch/sandpoint/stand/altboot/entry.S:3 | lwz 3,0(1)
lwz 4,4(1)
mtdbatl 1,3
mtdbatu 1,4
lwz 3,8(1)
lwz 4,12(1)
mtdbatl 2,3
mtdbatu 2,4
lwz 3,16(1)
lwz 4,20(1)
mtdbatl 3,3
mtdbatu 3,4
sync
mtspr SPR_HID0,8 /* enable and invalidate caches */
sync
mtspr SPR_HID0,11 /* enable caches */
sync
isync
/* make sure .bss gets zeroed. */
li 0,0
lis... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sandpoint/stand/altboot/entry.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sandpoint/stand/altboot/entry.S | 81 | 140 |
NetBSD/src:sys/arch/sandpoint/stand/altboot/entry.S:4 | bl brdsetup
#ifdef DEBUG
bl init_vectors
#endif
mr 3,30
mr 4,31
mr 5,28
mr 6,29
bl main
hang: b hang
/* NOTREACHED */
dbat_sanity_check:
andi. 0,3,BAT_Vs
beq 2f
andi. 0,4,BAT_I|BAT_PP_RW
cmpwi 0,0,BAT_I|BAT_PP_RW
bnelr
rlwinm 0,3,15,4,14
andis. 3,3,0xfffe0000@ha /* BAT_EPI */
andis. 4,4,BAT_RPN@ha
cmp... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sandpoint/stand/altboot/entry.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sandpoint/stand/altboot/entry.S | 121 | 180 |
NetBSD/src:sys/arch/sandpoint/stand/altboot/entry.S:5 | /*
* run(startsym, endsym, howto, bootinfo, entry)
*/
.globl run
run:
mtctr 7 /* hat trick jump to entry point */
bctr
/*
* newaltboot(argc, argv, altboot_base, altboot_len)
* To be executed in a safe memory region. Copies the new altboot from
* altboot_base to 0x1000000 and starts it there.
*/
.globl newa... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sandpoint/stand/altboot/entry.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sandpoint/stand/altboot/entry.S | 161 | 220 |
NetBSD/src:sys/arch/sandpoint/stand/altboot/entry.S:6 | addi 11,11,32
cmplw 11,12
ble 3b
sync
isync
blr
.globl newaltboot_end
newaltboot_end:
/* 8-bit i/o access */
.globl out8
out8:
stb 4,0(3)
eieio
blr
.globl in8
in8:
lbz 3,0(3)
eieio
blr
/*
* reverse endian access to mimic outw/outl/inw/inl
*/
.globl out16rb
.globl iohtole16
out16rb:
iohtole16:
sth... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sandpoint/stand/altboot/entry.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sandpoint/stand/altboot/entry.S | 201 | 260 |
NetBSD/src:sys/arch/sandpoint/stand/altboot/entry.S:7 | blr
.globl in16rb
.globl iole16toh
in16rb:
iole16toh:
lhbrx 3,0,3
eieio
blr
.globl in32rb
.globl iole32toh
in32rb:
iole32toh:
lwbrx 3,0,3
eieio
blr
#ifdef DEBUG
/*
* Call an exception handler, which prints out all information
* about the type of exception, cpu registers, stack frame
* backtrace, etc... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sandpoint/stand/altboot/entry.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sandpoint/stand/altboot/entry.S | 241 | 300 |
NetBSD/src:sys/arch/sandpoint/stand/altboot/entry.S:8 | beq 1f
andi. 1,1,0xffff /* make sure TGPR is disabled */
mtmsr 1
isync
mtsprg1 1 /* and save the real r1 again */
1: li 1,0x2000-16-(32*4+15*4)
stmw 2,24(1) /* save r2..r31 */
stw 0,16(1) /* save r0 */
mfsprg1 3
stw 3,20(1) /* and finally r1 */
mfcr 3
stw 3,0x90(1)
mfxer 3
stw 3,0x94(1)
mflr 3
st... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sandpoint/stand/altboot/entry.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sandpoint/stand/altboot/entry.S | 281 | 340 |
NetBSD/src:sys/arch/sandpoint/stand/altboot/entry.S:9 | bl call_handler
call_handler:
lis 11,exception_handler@ha
addi 11,11,exception_handler@l
mtsrr0 11
li 0,PSL_DR|PSL_IR
mtsrr1 0
mflr 3
subi 3,3,call_handler-trap
addi 4,1,16
rfi
.globl trap_end
trap_end:
#endif
.data
#define xBATL(pa, wimg, pp) \
((pa) | (wimg) | (pp))
#define xBATU(va, len, v) \
... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sandpoint/stand/altboot/entry.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sandpoint/stand/altboot/entry.S | 321 | 347 |
NetBSD/src:sys/arch/sbmips/stand/Makefile.inc:1 | # $NetBSD: Makefile.inc,v 1.1 2002/11/09 06:20:37 cgd Exp $
.include <bsd.own.mk>
BINDIR?= /usr/mdec
WARNS?= 1
MKMAN= no
CPPFLAGS+= -I${.CURDIR}/../..
LDSTATIC?= -static | mips | gas-like | handwritten | NetBSD/src | sys/arch/sbmips/stand/Makefile.inc | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sbmips/stand/Makefile.inc | 1 | 11 |
NetBSD/src:sys/arch/sgimips/conf/Makefile.sgimips.inc:1 | # $NetBSD: Makefile.sgimips.inc,v 1.13 2019/01/01 19:41:04 christos Exp $
WANT_ECOFF?=no
GENASSYM_EXTRAS+= ${S}/dev/arcbios/genassym.cf
.if ${WANT_ECOFF} == "yes"
SYSTEM_LD_TAIL_EXTRA=; \
echo ${MIPS_ELF2ECOFF} $@ $@.ecoff; \
${MIPS_ELF2ECOFF} $@ $@.ecoff; \
chmod 755 $@.ecoff
.endif | mips | gas-like | handwritten | NetBSD/src | sys/arch/sgimips/conf/Makefile.sgimips.inc | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sgimips/conf/Makefile.sgimips.inc | 1 | 12 |
NetBSD/src:sys/arch/sgimips/sgimips/ip22_cache.S:1 | /* $NetBSD: ip22_cache.S,v 1.5 2005/12/11 12:18:58 christos Exp $ */
/*
* Copyright 2001 Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Jason R. Thorpe for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the foll... | mips | gas-like | handwritten | NetBSD/src | sys/arch/sgimips/sgimips/ip22_cache.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sgimips/sgimips/ip22_cache.S | 1 | 60 |
NetBSD/src:sys/arch/sgimips/sgimips/ip22_cache.S:2 | #include <mips/asm.h>
#include <mips/cpuregs.h>
.set noreorder
.set mips3
#define PROLOGUE \
mfc0 t0, MIPS_COP_0_STATUS ; \
nop ; \
nop ; \
nop ; \
li v0, ~MIPS_SR_INT_IE /* ints off */ ; \
and t1, v0, t0 ; \
or t1, MIPS3_SR_KX /* enable 64-bit */ ; \
mtc0 t1, MIPS_COP_0_STA... | mips | gas-like | handwritten | NetBSD/src | sys/arch/sgimips/sgimips/ip22_cache.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sgimips/sgimips/ip22_cache.S | 41 | 100 |
NetBSD/src:sys/arch/sgimips/sgimips/ip22_cache.S:3 | dli v0, 0x9000000080000000 /* base of cache flush space */
or a0, v0 /* first */
or a1, v0 /* last */
/*
* Flush the cache by performing a store into the
* magic cache flush space.
*/
1: sw zero, 0(a0)
bne a0, a1, 1b
daddu a0, 32
EPILOGUE
j ra
nop
END(ip22_sdcache_do_wbinv)
LEAF_NOPROFILE(ip22_sdc... | mips | gas-like | handwritten | NetBSD/src | sys/arch/sgimips/sgimips/ip22_cache.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sgimips/sgimips/ip22_cache.S | 81 | 129 |
NetBSD/src:sys/arch/sgimips/stand/Makefile.inc:1 | # $NetBSD: Makefile.inc,v 1.4 2021/04/15 01:54:39 mrg Exp $
NOPIE= # defined
BINDIR?= /usr/mdec
COPTS+= -fcommon
# XXX SHOULD NOT NEED TO DEFINE THESE!
LIBCRT0=
LIBCRTI=
LIBC=
LIBCRTBEGIN=
LIBCRTEND= | mips | gas-like | handwritten | NetBSD/src | sys/arch/sgimips/stand/Makefile.inc | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sgimips/stand/Makefile.inc | 1 | 14 |
NetBSD/src:sys/arch/sgimips/stand/common/iris_start.S:1 | /* $NetBSD: iris_start.S,v 1.1 2019/01/12 16:44:47 tsutsui Exp $ */
/*
* Copyright (c) 2018 Naruaki Etomi
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source c... | mips | gas-like | handwritten | NetBSD/src | sys/arch/sgimips/stand/common/iris_start.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sgimips/stand/common/iris_start.S | 1 | 60 |
NetBSD/src:sys/arch/sgimips/stand/common/iris_start.S:2 | /*
* We assume the bootprom isn't expecting us to preserve the saved
* registers.
*/
move s0, a0 # save argc
move s1, a1 # save argv
move s2, a2 # save envp
move s3, ra # save RA
la a0, _C_LABEL(edata) # clear BSS
move a1, zero
la a2, _C_LABEL(end)
jal _C_LABEL(memset) # memset(edata, 0, en... | mips | gas-like | handwritten | NetBSD/src | sys/arch/sgimips/stand/common/iris_start.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sgimips/stand/common/iris_start.S | 41 | 67 |
NetBSD/src:sys/arch/sgimips/stand/common/start64.S:3 | */
#include <mips/asm.h>
#include <mips/cpuregs.h>
# .extern ARCBIOS, 4
.globl start
start:
.set noreorder
#ifdef __GP_SUPPORT__
dla gp, _C_LABEL (_gp)
#endif
daddi sp, - (CALLFRAME_SIZ * 2)
sd ra, CALLFRAME_RA * 2(sp) # Save RA
sd a0, 0(sp) # save argc
sd a1, 8(sp) # save argv
sd a2, 16(sp) # save env... | mips | gas-like | handwritten | NetBSD/src | sys/arch/sgimips/stand/common/start64.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sgimips/stand/common/start64.S | 81 | 121 |
NetBSD/src:sys/arch/sh3/sh3/cpu_in_cksum.S:2 | #define reg_mlen r2
#define reg_tmp3 r3
#define reg_m r4
#define reg_len r5
#define reg_off r6
#define reg_w r6 /* recycle */
#define reg_sum r7
#define REDUCE \
swap.w reg_sum, r0 ; \
extu.w reg_sum, reg_sum ; \
extu.w r0, r0 ; \
add r0, reg_sum
#define ROL \
shll8 reg_sum
#if _BYTE_ORDER == BI... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/cpu_in_cksum.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/cpu_in_cksum.S | 41 | 100 |
NetBSD/src:sys/arch/sh3/sh3/cpu_in_cksum.S:3 | #define ADDCL \
mov.l @reg_w+, r0 ; \
addc r0, reg_sum
#define FORWARD1 \
add #-1, reg_mlen
#define FORWARD2 \
add #-2, reg_mlen
/*
* LINTSTUB: include <sys/param.h>
* LINTSTUB: include <sys/mbuf.h>
*
* LINTSTUB: Func: int cpu_in_cksum(struct mbuf *m, int len, int off, uint32_t initial_sum);
*/
ENTRY(cpu_i... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/cpu_in_cksum.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/cpu_in_cksum.S | 81 | 140 |
NetBSD/src:sys/arch/sh3/sh3/cpu_in_cksum.S:4 | mov.l @(M_DATA, reg_m), reg_tmp3
sub reg_off, reg_mlen ! mlen -= off
bra .L_mbuf_loop_enter
add reg_tmp3, reg_off ! w = m->m_data + off
#undef reg_off /* it is dead now and we recycle it for reg_w */
mbuf_loop:
tst reg_m, reg_m
bt out_of_mbufs
mov.l @(M_LEN, reg_m), reg_mlen
tst reg_mlen, reg_mlen
bt/s mbu... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/cpu_in_cksum.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/cpu_in_cksum.S | 121 | 180 |
NetBSD/src:sys/arch/sh3/sh3/cpu_in_cksum.S:5 | cmp/gt r0, reg_mlen
bf/s 1f
mov reg_w, r0
tst #2, r0
bt/s 1f
REDUCE /* 1st instruction break only r0 */
ADDS
FORWARD2
1:
mov #127, r0
cmp/hi r0, reg_mlen
bf 1f
do_cksum128:
bsr cksum128
nop
mov #127, r0
cmp/hi r0, reg_mlen
bt do_cksum128
1:
bsr cksum128mod
nop
REDUCE
mov #1, r0
cmp/gt r0... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/cpu_in_cksum.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/cpu_in_cksum.S | 161 | 220 |
NetBSD/src:sys/arch/sh3/sh3/cpu_in_cksum.S:6 | bt 1f
ADDB
1:
mbuf_loop_continue:
mov.l @(M_NEXT, reg_m), reg_m
tst reg_len, reg_len
bf/s mbuf_loop
mbuf_loop_done:
tst reg_byte_swapped, reg_byte_swapped
bt/s 1f
REDUCE /* 1st instruction break only r0 */
ROL
1:
REDUCE
REDUCE
in_cksum_return:
not reg_sum, r0
PIC_EPILOGUE
lds.l @sp+, pr
rts
extu... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/cpu_in_cksum.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/cpu_in_cksum.S | 201 | 260 |
NetBSD/src:sys/arch/sh3/sh3/cpu_in_cksum.S:7 | mov.l @sp+, reg_sum /* restore */
.align 2
.L_got:
PIC_GOT_DATUM
.L_printf:
CALL_DATUM(_C_LABEL(printf), 1b)
.align 2 /* mova target */
.L_message_out_of_data:
.asciz "cksum: out of data (%d byte short)\n"
SET_ENTRY_SIZE(cpu_in_cksum)
.align 2
cksum128mod:
mov reg_mlen, r0
and #124, r0
sub r0, reg_mlen
... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/cpu_in_cksum.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/cpu_in_cksum.S | 241 | 300 |
NetBSD/src:sys/arch/sh3/sh3/cpu_in_cksum.S:8 | ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
ADDCL
cksum128_tail:
mov #0, r0
rts
addc r0, reg_sum | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/cpu_in_cksum.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/cpu_in_cksum.S | 281 | 309 |
NetBSD/src:sys/arch/sh3/sh3/exception_vector.S:2 | #include <sh3/mmu_sh4.h>
/*
* Align vectors more strictly here (where we don't really care) so
* that .align 5 (i.e. 32B cache line) before data block does the
* right thing w.r.t. final destinations after vectors are copied.
*/
#define _ALIGN_TEXT .align 5
#include <sh3/asm.h>
__KERNEL_RCSID(0, "$NetBSD: excepti... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/exception_vector.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/exception_vector.S | 41 | 100 |
NetBSD/src:sys/arch/sh3/sh3/exception_vector.S:3 | mov.l .Lg_curlwp, r1
mov.l @r1, r4 /* 1st arg */
/* Get TEA */
MOV (TEA, r1)
mov.l @r1, r6 /* 3rd arg */
/* Check TLB exception or not */
mov.l .Lg_TLB_PROT_ST, r1
cmp/hi r1, r0
bt/s 1f
mov r4, r8 /* preserve curlwp across call */
/* tlb_exception(curlwp, tf, TEA); */
__INTR_MASK_EXCEPTION_UNBLOCK(r0, ... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/exception_vector.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/exception_vector.S | 81 | 140 |
NetBSD/src:sys/arch/sh3/sh3/exception_vector.S:4 | mov.l .Lg_ast, r0
mov r8, r4
jsr @r0
mov r14, r5
#if defined(PTRACE_HOOKS) || defined(DDB)
mov.l @(TF_UBC, r14), r2
tst r2, r2 ! single-step == 0?
bt .Lg_return_from_exception
!! We are returning from DDB to do single step. Channel A in
!! UBC is already rigged, we just need to enable it.
MOV (BBRA, r3)
... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/exception_vector.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/exception_vector.S | 121 | 180 |
NetBSD/src:sys/arch/sh3/sh3/exception_vector.S:5 | * LINTSTUB: Var: char sh3_vector_tlbmiss[1];
*
* TLB miss vector. We run through the fast path first, checking if
* there's a valid mapping in curlwp or kernel pmap. We do fast path
* with exceptions disabled, so no P3 addresses please (including no
* kernel stack, as we cannot wire TLB entries on sh3). We can ... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/exception_vector.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/exception_vector.S | 161 | 220 |
NetBSD/src:sys/arch/sh3/sh3/exception_vector.S:6 | .L3_fetch_pte:
mov.l @r1, r3 ! fetch ptd
!! r2: vpn, prepared for indexing into ptd
!! r3: pt_entry_t **ptd => pt_entry_t *ptp => pt_entry_t pte
#ifdef DEBUG
tst r3, r3 ! ptd == NULL - cannot happen
bt/s .L3_call_tlb_exception
#endif
mov #-22, r1 ! __PMAP_PTP_SHIFT
!! __PMAP_PTP_INDEX(vpn)
mov r2, r0
shl... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/exception_vector.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/exception_vector.S | 201 | 260 |
NetBSD/src:sys/arch/sh3/sh3/exception_vector.S:7 | mov.l .L3_PG_HW_BITS, r1
cmp/pz r5 ! user space address?
and r1, r3 ! pte &= PG_HW_BITS
bf/s .L3_load_kernel
mov.l r3, @(0x04, r4) ! *SH3_PTEL = pte
!! load mapping for a user space page
!! we reload PTEH to enter VPN aligned to 4K page boundary
.L3_load_user:
mov.l r5, @r4 ! *SH3_PTEH = { VPN, ASID }
ldtl... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/exception_vector.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/exception_vector.S | 241 | 300 |
NetBSD/src:sys/arch/sh3/sh3/exception_vector.S:8 | mov.l .L3_tlb_exception, r0
mov r4, r8 ! save curlwp across the call
mov.l r2, @(TF_EXPEVT, r14) ! tf->tf_expevt = EXPEVT
jsr @r0
mov r14, r5 ! arg2: trapframe
/* Check for ASTs on exit to user mode. */
__INTR_MASK(r0, r1)
mov.l .L3_ast, r0
mov r8, r4 ! arg1: curlwp
jsr @r0
mov r14, r5 ! arg2: trap... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/exception_vector.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/exception_vector.S | 281 | 340 |
NetBSD/src:sys/arch/sh3/sh3/exception_vector.S:9 | * TLB miss vector. We run through the fast path first, checking if
* there's a valid mapping in curlwp or kernel pmap. We do fast path
* with exceptions disabled, so no P3 addresses please (though we can
* use kernel stack if need be, as its TLB entries are wired). We can
* only use BANK1 registers, and of those... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/exception_vector.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/exception_vector.S | 321 | 380 |
NetBSD/src:sys/arch/sh3/sh3/exception_vector.S:10 | !! r2: vpn, prepared for indexing into ptd
!! r3: pt_entry_t **ptd => pt_entry_t *ptp => pt_entry_t pte
#ifdef DEBUG
tst r3, r3 ! ptd == NULL - cannot happen
bt/s .L4_call_tlb_exception
#endif
mov #-22, r1 ! __PMAP_PTP_SHIFT
!! __PMAP_PTP_INDEX(vpn)
mov r2, r0
shld r1, r0 ! vpn >> __PMAP_PTP_SHIFT
mov.l .L... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/exception_vector.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/exception_vector.S | 361 | 420 |
NetBSD/src:sys/arch/sh3/sh3/exception_vector.S:11 | and r1, r3 ! pte &= PG_HW_BITS
shlr r0 ! pte >> _PG_PCMCIA_SHIFT
cmp/pz r5 ! user space address?
and #SH4_PTEA_SA_MASK, r0
mov.l r3, @(0x04, r4) ! *SH4_PTEL = pte
bf/s .L4_load_kernel
mov.l r0, @(0x34, r4) ! *SH4_PTEA = PCMCIA space attrs
!! load mapping for a user space page
!! we reload PTEH to enter VPN... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/exception_vector.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/exception_vector.S | 401 | 460 |
NetBSD/src:sys/arch/sh3/sh3/exception_vector.S:12 | mov r4, r8 ! save curlwp across the call
mov.l r2, @(TF_EXPEVT, r14) ! tf->tf_expevt = EXPEVT
jsr @r0
mov r14, r5 ! arg2: trapframe
/* Check for ASTs on exit to user mode. */
__INTR_MASK(r0, r1)
mov.l .L4_ast, r0
mov r8, r4 ! arg1: curlwp
jsr @r0
mov r14, r5 ! arg2: trapframe
__EXCEPTION_RETURN
.... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/exception_vector.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/exception_vector.S | 441 | 500 |
NetBSD/src:sys/arch/sh3/sh3/exception_vector.S:13 | */
NENTRY(sh_vector_interrupt)
__EXCEPTION_ENTRY
!! arguments for intc_intr(): for struct clockframe
stc ssr, r4
stc spc, r5
stc r0_bank, r6 ! ssp
__INTR_MASK_EXCEPTION_UNBLOCK(r0, r1, r3)
mov.l .Li_ci_idepth, r8 ! callee-saved
mov.l .Li_intc_intr, r0
mov.l @r8, r9 ! callee-saved
mov #0, r1
add #1, r9 ... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/exception_vector.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/exception_vector.S | 481 | 540 |
NetBSD/src:sys/arch/sh3/sh3/exception_vector.S:14 | mov.l r3, @(TF_SPC, r14) ! spc = _lock_cas_ras_start
.Li_return_to_user:
/* Check for ASTs on exit to user mode. */
mov.l .Li_ast, r0
mov.l .Li_curlwp, r1
mov r14, r5 /* 2nd arg */
jsr @r0
mov.l @r1, r4 /* 1st arg */
.Li_return_from_interrupt:
__EXCEPTION_RETURN
.align 5
.Li_ci_idepth: .long _C_LABEL(cpu... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/exception_vector.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/exception_vector.S | 521 | 546 |
NetBSD/src:sys/arch/sh3/sh3/lock_stubs.S:2 | /*
* LINTSTUB: Func: uintptr_t _lock_cas(volatile uintptr_t *ptr, uintptr_t old, uintptr_t new);
*
* Atomic compare-and-swap for kernel use. SuperH machines are
* uniprocessor, so we need to be atomic only w.r.t. interrupts.
* Implement this as (the only in-kernel) RAS, with restart check
* done on return from i... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/lock_stubs.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/lock_stubs.S | 41 | 100 |
NetBSD/src:sys/arch/sh3/sh3/lock_stubs.S:3 | STRONG_ALIAS(_atomic_cas_ptr_ni,_lock_cas)
STRONG_ALIAS(atomic_cas_ptr_ni,_lock_cas)
#if !defined(LOCKDEBUG)
/*
* LINTSTUB: Func: void mutex_enter(kmutex_t *mtx);
*/
ENTRY(mutex_enter)
sts pr, r7 ! depend on _lock_cas not clobbering r7
mov.l .L_curlwp, r6
mov #0, r5
bsr _lock_cas ! _lock_cas(&mtx->mtx_owner, 0... | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/lock_stubs.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/lock_stubs.S | 81 | 134 |
NetBSD/src:sys/arch/sh3/sh3/lock_stubs.S:4 | nop
!! depend on _lock_cas not clobbering mtx in r4
1: mov.l .L_mutex_vector_exit, r0
jmp @r0
nop
/* NOTREACHED */
.align 2
.L_curlwp: .long _C_LABEL(curlwp)
.L_mutex_vector_enter: .long _C_LABEL(mutex_vector_enter)
.L_mutex_vector_exit: .long _C_LABEL(mutex_vector_exit)
#endif /* !LOCKDEBUG */ | arm64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/lock_stubs.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/lock_stubs.S | 121 | 134 |
NetBSD/src:sys/arch/sh3/sh3/locore_subr.S:2 | #include <sh3/mmu_sh4.h>
__KERNEL_RCSID(0, "$NetBSD: locore_subr.S,v 1.61 2021/07/15 04:58:33 rin Exp $")
/*
* LINTSTUB: include <sys/types.h>
* LINTSTUB: include <sys/lwp.h>
* LINTSTUB: include <sh3/locore.h>
*/
/*
* Save processor state to pcb->pcb_sf switchframe.
* Note that offsetof(struct pcb, pcb_sf) i... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/locore_subr.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/locore_subr.S | 41 | 100 |
NetBSD/src:sys/arch/sh3/sh3/locore_subr.S:3 | /*
* LINTSTUB: Func: lwp_t *cpu_switchto(lwp_t *olwp, lwp_t *nlwp, bool returning)
* Switch from olwp to nlwp.
* If returning is true, we do the fast softint dance
* and can skip user-space related activities (pmap, ras, etc...)
* Return olwp (in the nlwp context).
*/
ENTRY(cpu_switchto)
!! save old lwp's conte... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/locore_subr.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/locore_subr.S | 81 | 140 |
NetBSD/src:sys/arch/sh3/sh3/locore_subr.S:4 | mov.l @(SF_R15, r10), r3 ! current kernel sp
!! while switching kernel stack, all exceptions must be disabled
__EXCEPTION_BLOCK(r1, r11) ! saves SR in r11
ldc r0, r7_bank
ldc r2, r6_bank
mov r3, r15
#if !defined(P1_STACK) && defined(SH4)
!! wire u-area in TLB
MOV (switch_resume, r0)
jsr @r0
mov r8, r4 ! nl... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/locore_subr.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/locore_subr.S | 121 | 180 |
NetBSD/src:sys/arch/sh3/sh3/locore_subr.S:5 | mov.l @r1+, r9
mov.l @r1+, r10
mov.l @r1+, r11
mov.l @r1+, r12
mov.l @r1+, r13
rts
mov.l @r1+, r14
.align 2
.L_curlwp: .long _C_LABEL(curlwp)
.L_curpcb: .long _C_LABEL(curpcb)
.L_cpu_switch_prepare: .long _C_LABEL(cpu_switch_prepare)
#ifdef SH4
FUNC_SYMBOL(switch_resume)
#endif
SET_ENTRY_SIZE(cpu_switchto)
... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/locore_subr.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/locore_subr.S | 161 | 220 |
NetBSD/src:sys/arch/sh3/sh3/locore_subr.S:6 | tst r0, r0
bt 2f
/* Save old ASID and set ASID to zero */
mov #0, r0
mov.l .L_4_PTEH, r2
mov.l @r2, r7
mov.l r0, @r2
mov.l .L_VPN_MASK, r6
mov.l .L_4_UTLB_AA_A, r5
/* TLB address array must be accessed via P2. Setup jump address. */
mova 1f, r0
mov.l .L_P2BASE, r1
or r1, r0
jmp @r0 ! run on P2
nop
... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/locore_subr.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/locore_subr.S | 201 | 260 |
NetBSD/src:sys/arch/sh3/sh3/locore_subr.S:7 | 2: rts ! to the caller in P1
nop
.align 2
.L_4_PTEH: .long SH4_PTEH
.L_4_UTLB_AA_A: .long (SH4_UTLB_AA | SH4_UTLB_A)
.L_VPN_MASK: .long 0xfffff000
.L_P2BASE: .long 0xa0000000
SET_ENTRY_SIZE(sh4_switch_resume)
#endif /* SH4 */
/*
* LINTSTUB: Func: int _cpu_intr_raise(int s)
* raise SR.IMASK to 's'. if cur... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/locore_subr.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/locore_subr.S | 241 | 300 |
NetBSD/src:sys/arch/sh3/sh3/locore_subr.S:8 | stc sr, r0 /* r0 = SR */
mov #0x78, r1
shll r1 /* r1 = 0x000000f0 */
mov r0, r2 /* r2 = SR */
or r1, r2 /* r2 |= 0x000000f0 */
ldc r2, sr /* SR = r2 */
rts
and r1, r0 /* r0 = SR & 0x000000f0 */
SET_ENTRY_SIZE(_cpu_intr_suspend)
/*
* LINTSTUB: Func: int _cpu_intr_resume(int s)
* Set 's' to SR.IMASK. Retur... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/locore_subr.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/locore_subr.S | 281 | 340 |
NetBSD/src:sys/arch/sh3/sh3/locore_subr.S:9 | or r1, r2 /* r2 |= PSL_BL */
ldc r2, sr /* SR = r2 */
rts /* return old SR */
nop
SET_ENTRY_SIZE(_cpu_exception_suspend)
/*
* LINTSTUB: Func: void _cpu_exception_resume(int s)
* restore 's' exception mask. (SR.BL)
*/
NENTRY(_cpu_exception_resume)
stc sr, r0 /* r0 = SR */
mov #0x10, r1 /* bswap32(PSL_BL... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/locore_subr.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/locore_subr.S | 321 | 380 |
NetBSD/src:sys/arch/sh3/sh3/locore_subr.S:10 | * nop IF ID EX MA - - WB
* bt IF ID EX . . MA
* [...]
*/
.align 5 /* align cache line size (32B) */
NENTRY(_cpu_spin)
1: nop /* 1 */
nop /* 2 */
nop /* 3 */
add #-1, r4 /* 4 */
nop /* 5 */
cmp/pl r4 /* 6 */
nop... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/locore_subr.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/locore_subr.S | 361 | 420 |
NetBSD/src:sys/arch/sh3/sh3/locore_subr.S:11 | jsr @r1
mov r10, r5 /* my struct lwp */
jsr @r12
mov r11, r4
__EXCEPTION_RETURN
/* NOTREACHED */
.align 2
.L_lwp_startup: .long _C_LABEL(lwp_startup)
SET_ENTRY_SIZE(lwp_trampoline)
#if defined(COMPAT_16) || defined(MODULAR)
/*
* LINTSTUB: Var: char sigcode[1]
* Signal trampoline. copied to top of user ... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/locore_subr.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/locore_subr.S | 401 | 460 |
NetBSD/src:sys/arch/sh3/sh3/locore_subr.S:12 | SET_ENTRY_SIZE(sigcode)
#endif /* COMPAT_16 || MODULAR */
/*
* LINTSTUB: Func: void savectx(struct pcb *pcb)
* Save CPU state in pcb->pcb_sf
*/
ENTRY(savectx)
SAVEPCB_AND_JUMP(r4, rts)
SET_ENTRY_SIZE(savectx)
/*
* LINTSTUB: Func: int copyout(const void *ksrc, void *udst, size_t len)
* Copy len bytes into the... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/locore_subr.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/locore_subr.S | 441 | 500 |
NetBSD/src:sys/arch/sh3/sh3/locore_subr.S:13 | mov #0, r0
1:
mov.l .L_copyout_curpcb, r1 /* clear fault handler */
mov.l @r1, r2
mov #0, r1
mov.l r1, @(PCB_ONFAULT,r2)
2:
mov r14, r15
lds.l @r15+, pr
rts
mov.l @r15+, r14
3:
bra 2b
mov #EFAULT, r0
.align 2
.L_copyout_onfault:
.long 1b
.L_copyout_VM_MAXUSER_ADDRESS:
.long VM_MAXUSER_ADDRESS
.L_copyou... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/locore_subr.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/locore_subr.S | 481 | 540 |
NetBSD/src:sys/arch/sh3/sh3/locore_subr.S:14 | add r6, r2
cmp/hs r3, r2 /* bomb if uaddr+len wraps */
bf 3f
mov.l .L_copyin_VM_MAXUSER_ADDRESS, r1
cmp/hi r1, r2 /* bomb if uaddr isn't in user space */
bt 3f
mov.l .L_copyin_curpcb, r1 /* set fault handler */
mov.l @r1, r2
mov.l .L_copyin_onfault, r1
mov.l r1, @(PCB_ONFAULT,r2)
mov.l .L_copyin_memcpy, r1... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/locore_subr.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/locore_subr.S | 521 | 580 |
NetBSD/src:sys/arch/sh3/sh3/locore_subr.S:15 | SET_ENTRY_SIZE(copyin)
/*
* LINTSTUB: Func: int copyoutstr(const void *ksrc, void *udst, size_t maxlen, size_t *lencopied)
* Copy a NUL-terminated string, at most maxlen characters long,
* into the user address space. Return the number of characters
* copied (including the NUL) in *lencopied. If the string is
... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/locore_subr.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/locore_subr.S | 561 | 620 |
NetBSD/src:sys/arch/sh3/sh3/locore_subr.S:16 | 2:
add #-1, r0
cmp/eq #-1, r0
bf 1b
cmp/hi r3, r5
bf 6f
mov #0, r0
3:
tst r7, r7 /* set lencopied if needed */
bt 4f
mov r4, r1
sub r8, r1
mov.l r1, @r7
4:
mov.l .L_copyoutstr_curpcb, r1 /* clear fault handler */
mov.l @r1, r2
mov #0, r1
mov.l r1, @(PCB_ONFAULT,r2)
rts
mov.l @r15+, r8
5:
bra 4b
... | x86_64 | gas-like | handwritten | NetBSD/src | sys/arch/sh3/sh3/locore_subr.S | BSD-2-Clause | 3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd | github | kernel | https://github.com/NetBSD/src/blob/3f1390c8cc18c3f67a4bd2632f8c7ad919cf86fd/sys/arch/sh3/sh3/locore_subr.S | 601 | 660 |
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