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line_start
int64
1
5.48k
line_end
int64
4
5.5k
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:21
};; { .mfi ldfe FR_Q1 = [GR_ad_q] // Load Q1 fnma.s1 FR_EE = FR_GG, FR_HH, FR_Half // e = 0.5 - g * h nop.i 0 };; { .mfi nop.m 0 fma.s1 FR_GG = FR_GG, FR_EE, FR_GG // g = g * e + g // 32 b...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
801
860
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:22
nop.i 0 } { .mfi nop.m 0 fma.s1 FR_XLog_Hi = FR_Arg, f1, FR_GG // bh = z + gh nop.i 0 };; { .mfi nop.m 0 fma.s1 FR_DD = FR_DD, f1, FR_M2L // add p2l: d = d + p2l nop.i 0 };; { .mfi getf.sig GR_signif = FR_XLog_Hi // Get significand of x+1 ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
841
900
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:23
ld4 GR_Z_1 = [GR_ad_z_1] // Load Z_1 nop.m 0 nop.i 0 };; { .mmi ldfps FR_G, FR_H = [GR_ad_tbl_1],8 // Load G_1, H_1 nop.m 0 nop.i 0 };; { .mfi nop.m 0 fms.s1 FR_XLog_Lo = FR_Arg, f1, FR_XLog_Hi // bl = x - bh pmpyshr2.u GR_X_1 ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
881
940
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:24
nop.m 0 nop.f 0 extr.u GR_Index2 = GR_X_1, 6, 4 // Extract bits 6-9 of X_1 };; { .mfi shladd GR_ad_tbl_2 = GR_Index2, 4, GR_ad_tbl_2 // Point to G_2 fma.s1 FR_XLog_Lo = FR_XLog_Lo, f1, FR_GG // bl = bl + gg mov GR_exp_2tom80 = 0x0ffaf // Exponent of...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
921
980
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:25
fma.s1 FR_XLog_Lo = FR_XLog_Lo, f1, FR_GL // bl = bl + gl nop.i 0 };; { .mfi nop.m 0 nop.f 0 nop.i 0 };; { .mfi nop.m 0 nop.f 0 nop.i 0 };; { .mfi nop.m 0 nop.f 0 extr.u GR_Index3 = GR_X_2, 1, 5 // Extract bits 1-5 of X_2 };; { .mfi ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
961
1,020
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:26
fmpy.s1 FR_G = FR_G, FR_G2 // G = G_1 * G_2 nop.i 0 } { .mfi nop.m 0 fadd.s1 FR_H = FR_H, FR_H2 // H = H_1 + H_2 nop.i 0 };; { .mfi nop.m 0 fadd.s1 FR_h = FR_h, FR_h2 // h = h_1 + h_2 nop.i 0 } { .mfi ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,001
1,060
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:27
nop.i 0 } { .mfi nop.m 0 fma.s1 FR_Y_hi = FR_float_N, FR_log2_hi, FR_H // Y_hi=N*log2_hi+H nop.i 0 };; { .mfi nop.m 0 fma.s1 FR_h = FR_float_N, FR_log2_lo, FR_h // h=N*log2_lo+h nop.i 0 } { .mfi nop.m 0 fma.s1 FR_r = FR_G, FR_S_lo, FR_r ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,041
1,100
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:28
{ .mfi nop.m 0 fma.s1 FR_poly_hi = FR_Q1, FR_rsq, FR_r // poly_hi = Q1*rsq + r nop.i 0 };; { .mfi nop.m 0 fma.s1 FR_poly_lo = FR_poly_lo, FR_rcub, FR_h//poly_lo=poly_lo*r^3+h nop.i 0 };; { .mfi nop.m 0 fadd.s0 FR_Y_lo = FR_poly_hi, FR_poly_lo ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,081
1,140
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:29
add GR_ad_z_2 = 0x140, GR_ad_z_1 // Point to Constants_Z_2 nop.f 0 add GR_ad_tbl_2 = 0x180, GR_ad_z_1 // Point to Constants_G_H_h2 };; { .mfi add GR_ad_tbl_3 = 0x280, GR_ad_z_1 // Point to Constants_G_H_h3 nop.f 0 extr.u GR_Index1 = GR_signif, 59,...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,121
1,180
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:30
{ .mfi ldfe FR_log2_hi = [GR_ad_q],16 // Load log2_hi nop.f 0 pmpyshr2.u GR_X_1 = GR_X_0,GR_Z_1,15 // Get bits 30-15 of X_0 * Z_1 };; { .mmi ldfe FR_log2_lo = [GR_ad_q],16 // Load log2_lo sub GR_N = GR_N, GR_Bias mov GR_exp_2tom8...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,161
1,220
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:31
};; { .mmi ldfps FR_G2, FR_H2 = [GR_ad_tbl_2],8 // Load G_2, H_2 nop.m 0 nop.i 0 };; { .mmf ldfd FR_h2 = [GR_ad_tbl_2] // Load h_2 setf.exp FR_2_to_minus_N = GR_minus_N // Form 2^(-N) nop.f 0 };; { .mfi nop.m 0 nop.f 0 pmpyshr2.u...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,201
1,260
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:32
};; { .mfi nop.m 0 nop.f 0 extr.u GR_Index3 = GR_X_2, 1, 5 // Extract bits 1-5 of X_2 };; { .mfi shladd GR_ad_tbl_3 = GR_Index3, 4, GR_ad_tbl_3 // Point to G_3 fcvt.xf FR_float_N = FR_float_N nop.i 0 };; { .mfi ldfps FR_G3, FR_H3 = [GR_ad_tbl_3],...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,241
1,300
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:33
nop.i 0 } { .mfi nop.m 0 fadd.s1 FR_H = FR_H, FR_H3 // H = (H_1 + H_2)+H_3 nop.i 0 };; { .mfi nop.m 0 fadd.s1 FR_h = FR_h, FR_h3 // h = (h_1 + h_2) + h_3 nop.i 0 };; { .mfi nop.m 0 fms.s1 FR_r = FR_G, FR_S_hi, f1...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,281
1,340
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:34
};; { .mfi nop.m 0 fma.s1 FR_poly_lo = FR_poly_lo, FR_r, FR_Q2 // poly_lo=poly_lo*r+Q2 nop.i 0 } { .mfi nop.m 0 fma.s1 FR_rcub = FR_rsq, FR_r, f0 // rcub = r^3 nop.i 0 };; { .mfi nop.m 0 fma.s1 FR_poly_hi = FR_Q1, FR_rsq, FR_r // poly_hi ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,321
1,380
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:35
frsqrta.s1 FR_Rcp, p0 = FR_2XM1 // Rcp = 1/x reciprocal appr. &SQRT& nop.i 0 };; { .mfi nop.m 0 fma.s1 FR_PV6 = FR_PP5, FR_XM1, FR_PP4 // pv6 = P5*xm1+P4 $POLY$ nop.i 0 } { .mfi nop.m 0 fma.s1 FR_QV6 = FR_QQ5, FR_XM1, FR_QQ4 // qv6 = Q5*xm1+Q4 $POLY$ nop.i 0...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,361
1,420
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:36
nop.i 0 };; { .mfi nop.m 0 fma.s1 FR_GG = FR_Rcp, FR_2XM1, f0 // g = Rcp * x &SQRT& nop.i 0 } { .mfi nop.m 0 fma.s1 FR_HH = FR_Half, FR_Rcp, f0 // h = 0.5 * Rcp &SQRT& nop.i 0 };; { .mfi nop.m 0 fma.s1 FR_PV3 = FR_XM12, FR_PV6, FR_PV4//pv3=p...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,401
1,460
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:37
fma.s1 FR_QQ = FR_XM12, FR_QV3, FR_QV2 //qq=qv3*xm1^2+qv2 $POLY$ nop.i 0 };; { .mfi nop.m 0 fma.s1 FR_GG = FR_GG, FR_EE, FR_GG // g = g * e + g &SQRT& nop.i 0 } { .mfi nop.m 0 fma.s1 FR_HH = FR_HH, FR_EE, FR_HH // h = h * e + h &SQRT& nop.i 0 ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,441
1,500
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:38
nop.i 0 } { .mfi nop.m 0 fma.s1 FR_HH = FR_HH, FR_EE, FR_HH // h = h * e + h &SQRT& nop.i 0 };; { .mfi nop.m 0 fma.s1 FR_E2 = FR_E0,FR_E0,FR_E0 // e2 = e+e^2 #DIV# nop.i 0 } { .mfi nop.m 0 fma.s1 FR_E1 = FR_E0,FR_E0,f0 // e1 = e^2 #DIV# ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,481
1,540
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:39
{ .mfi nop.m 0 fma.s1 FR_GG = FR_DD, FR_HH, FR_GG // g = d * h + g &SQRT& nop.i 0 } { .mfi nop.m 0 fma.s1 FR_HH = FR_HH, FR_EE, FR_HH // h = h * e + h &SQRT& nop.i 0 };; { .mfi nop.m 0 fma.s1 FR_Y2 = FR_Y1,FR_E3,FR_Y0 // y2 = y+y1*e3 #DIV...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,521
1,580
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:40
{ .mfi nop.m 0 fma.s1 FR_GL = FR_DD, FR_HH, f0 // gl = d * h &SQRT& nop.i 0 };; { .mfi nop.m 0 fma.s1 FR_Y3 = FR_Y2,FR_E4,FR_Y2 // y3 = y2+y2*e4 #DIV# nop.i 0 } { .mfi nop.m 0 fnma.s1 FR_R1 = FR_QQ,FR_X_Hi,FR_PP // r1 = a-b*x #DIV# ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,561
1,620
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:41
nop.m 0 fma.s1 FR_HL = FR_GG, FR_X_lo, f0 // hl = gg * x_lo nop.i 0 };; { .mfi nop.m 0 fms.s1 FR_Res = FR_GL, f1, FR_LL // res = gl + ll nop.i 0 };; { .mfi nop.m 0 fms.s1 FR_Res = FR_Res, f1, FR_LH // res = res + lh nop.i 0 };; { .mfi no...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,601
1,660
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:42
{ .mfi nop.m 0 fmerge.s FR_Arg_X = FR_Arg, FR_Arg nop.i 0 };; { .mfb mov GR_Parameter_TAG = 135 frcpa.s0 FR_Res,p0 = f0,f0 // get QNaN,and raise invalid br.cond.sptk __libm_error_region // exit if x < 1.0 };; GLOBAL_LIBM_END(acoshl) libm_alia...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,641
1,700
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:43
stfe [GR_Parameter_X] = FR_Arg_X // Parameter 1 to stack add GR_Parameter_RESULT = 0,GR_Parameter_Y // Parameter 3 address nop.b 0 } { .mib stfe [GR_Parameter_Y] = FR_Res // Parameter 3 to stack add GR_Parameter_Y = -16,GR_Parameter_Y b...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
3a327316ad615f7e4264d3e13d23052d9dc84694
github
libc
https://github.com/bminor/glibc/blob/3a327316ad615f7e4264d3e13d23052d9dc84694/sysdeps/ia64/fpu/e_acoshl.S
1,681
1,713
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:41
nop.m 0 fma.s1 FR_HL = FR_GG, FR_X_lo, f0 // hl = gg * x_lo nop.i 0 };; { .mfi nop.m 0 fms.s1 FR_Res = FR_GL, f1, FR_LL // res = gl + ll nop.i 0 };; { .mfi nop.m 0 fms.s1 FR_Res = FR_Res, f1, FR_LH // res = res + lh nop.i 0 };; { .mfi no...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
890b7a4b33d482b5c768ab47d70758b80227e9bc
github
libc
https://github.com/bminor/glibc/blob/890b7a4b33d482b5c768ab47d70758b80227e9bc/sysdeps/ia64/fpu/e_acoshl.S
1,601
1,660
bminor/glibc:sysdeps/ia64/fpu/e_acoshl.S:42
{ .mfi nop.m 0 fmerge.s FR_Arg_X = FR_Arg, FR_Arg nop.i 0 };; { .mfb mov GR_Parameter_TAG = 135 frcpa.s0 FR_Res,p0 = f0,f0 // get QNaN,and raise invalid br.cond.sptk __libm_error_region // exit if x < 1.0 };; GLOBAL_LIBM_END(acoshl) LOCAL_...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_acoshl.S
LGPL-2.1
890b7a4b33d482b5c768ab47d70758b80227e9bc
github
libc
https://github.com/bminor/glibc/blob/890b7a4b33d482b5c768ab47d70758b80227e9bc/sysdeps/ia64/fpu/e_acoshl.S
1,641
1,700
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:4
// Predicate registers used: // p0, p6 -> p14 // // Assembly macros //========================================= // integer registers used // scratch rTblAddr = r3 rPiBy2Ptr = r21 rTmpPtr3 = r22 rDenoBound = r23 rOne ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
121
180
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:5
fXQuadr = f9 f1pX = f10 f1mX = f11 f1pXRcp = f12 f1mXRcp = f13 fH = f14 fS = f15 // stacked fA3 = f32 fB1 ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
161
220
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:6
fSignedS = f51 fD = f52 fHalf = f53 fR = f54 fCloseTo1Pol = f55 fSignX = f56 fDenoBound = f57 fNormX = f58 fX8 = ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
201
260
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:7
data8 0xBEB83CAFE05EBAC9 //B11 data8 0x3F65FFB67B513644 //B4 data8 0x3F5032FBB86A4501 //B5 data8 0x3F392162276C7CBA //B6 data8 0x3F2435949FD98BDF //B7 data8 0xD93923D7FA08341C, 0x00003FF9 //B2 data8 0x3F802995B6D90BDB //B3 data8 0x3F10DF86B341A63F //B8 data8 0xC90FDAA22168C235, 0x00003FFF // Pi/2 data8 0x3EFA3EBD6B0ECB...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
241
300
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:8
fma.s1 f1pX = f1, f1, f8 adds rOne = 0x3FF, r0 } ;; { .mfi andcm rAbsXBits = rXBits, rSign // bits of |x| fmerge.s fSignX = f8, f1 // signum(x) shl r0625 = r0625, 48 // bits of DP representation of 0.625 } { .mfb setf.exp ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
281
340
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:9
} ;; { .mfi ldfe fB0 = [rTmpPtr1], 16 // B0 nop.f 0 nop.i 0 } { .mib adds rTmpPtr3 = 16, rTmpPtr2 // set p10 = 1 if |x| = 1.0 cmp.eq p10, p0 = rAbsXBits, rOne // branch on special path for |x| = 1.0 (p10) br.cond...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
321
380
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:10
{ .mfi ldfe fA5 = [rTmpPtr2], 48 // A5 or B2 // initial approximation of 1 / sqrt(1 + x) frsqrta.s1 f1pXRcp, p0 = f1pX nop.i 0 } { .mfi ldfpd fA21, fA23 = [rTmpPtr1], 16 // A21, A23 or B3, B8 fma.s1 fXQuadr = fXSqr, fXSqr, f...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
361
420
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:11
{ .mfi nop.m 0 (p8) fma.s1 fS = f1pX, f1pXRcp, f0 // S0 for x > 0 nop.i 0 } ;; { .mfi nop.m 0 fma.s1 fRQuadr = fRSqr, fRSqr, f0 // R^4 nop.i 0 } ;; { .mfi nop.m 0 fma.s1 fB11 ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
401
460
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:12
{ .mfi nop.m 0 fnma.s1 fD = fH, fS, fHalf // d0 = 1/2 - H0*S0 nop.i 0 } ;; { .mfi nop.m 0 fma.s1 fR8 = fRQuadr, fRQuadr, f0 // R^4 nop.i 0 } { .mfi nop.m 0 fma.s1 fB9 = fB9...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
441
500
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:13
nop.m 0 fma.s1 fS = fS, fD, fS // S1 = S0 + S0*d0 nop.i 0 } ;; {.mfi nop.m 0 fma.s1 fPiBy2 = fPiBy2, fSignX, f0 // signum(x)*Pi/2 nop.i 0 } ;; { .mfi nop.m 0 fma.s1 fB12 = fB12,...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
481
540
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:14
nop.m 0 fma.s1 fH = fH, fD, fH // H2 = H1 + H1*d1 nop.i 0 } { .mfi nop.m 0 fma.s1 fS = fS, fD, fS // S2 = S1 + S1*d1 nop.i 0 } ;; { .mfi nop.m 0 // -signum(x)* S2 = -signum(x)*(S1 + S1*d1) ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
521
580
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:15
// exit here for 0.625 <= |x| < 1 br.ret.sptk b0 } ;; // here if |x| < 0.625 .align 32 asin_base_range: { .mfi nop.m 0 fma.s1 fA33 = fA33, fXSqr, fA31 nop.i 0 } { .mfi nop.m 0 fma.s1 fA15 = fA15, fXSqr, fA13 ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
561
620
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:16
} ;; { .mfi nop.m 0 fma.s1 fA5 = fA5, fXSqr, fA3 nop.i 0 } ;; { .mfi nop.m 0 fma.s1 fA35 = fA35, fXQuadr, fA33 nop.i 0 } { .mfi nop.m 0 fma.s1 fA17 = fA17, fXQuadr, fA15 ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
601
660
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:17
} { .mfi nop.m 0 fma.s1 fA17 = fA17, fXSqr, fA11 nop.i 0 } ;; { .mfi nop.m 0 fma.s1 fX16 = fX8, fX8, f0 // x^16 nop.i 0 } ;; { .mfi nop.m 0 fma.s1 fA35 = fA35, fX8, fA25 ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
641
700
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:18
// asin(x) = sign(x) * Pi/2 .align 32 asin_abs_1: { .mfi ldfe fPiBy2 = [rPiBy2Ptr] // Pi/2 nop.f 0 nop.i 0 } ;; {.mfb nop.m 0 // result for |x| = 1.0 fma.d.s0 f8 = fPiBy2, fSignX, f0 // exit here for |x| = 1.0 ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
681
740
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:19
nop.m 0 fnorm.s1 fNormX = f8 nop.i 0 } ;; { .mfb // load smallest normal to FP reg setf.d fDenoBound = rDenoBound // answer if x is a NaN (p12) fma.d.s0 f8 = f8,f1,f0 // exit here if x is a NaN (p12) br.ret.spnt b0 } ;;...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
721
780
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:20
nop.m 0 (p14) fcmp.eq.s0 p6, p0 = f8, f0 // Set D flag if x unnormal nop.i 0 } { .mfb nop.m 0 // normalize unnormal input (p14) fnorm.s1 f8 = f8 // return to the main path (p14) br.cond.sptk asin_unnormal_back } ;; // if we stil...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
761
820
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:21
LOCAL_LIBM_ENTRY(__libm_error_region) .prologue { .mfi add GR_Parameter_Y=-32,sp // Parameter 2 value nop.f 0 .save ar.pfs,GR_SAVE_PFS mov GR_SAVE_PFS=ar.pfs // Save ar.pfs } { .mfi .fframe 64 add sp=-64,sp // Create new stack ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
801
854
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:22
ldfd f8 = [GR_Parameter_RESULT] // Get return result off stack .restore sp add sp = 64,sp // Restore stack pointer mov b0 = GR_SAVE_B0 // Restore return address };; { .mib mov gp = GR_SAVE_GP // Restore gp mov ar.pfs ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asin.S
841
854
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:4
// Predicate registers used: // p0, p6 -> p14 // // Assembly macros //========================================= // integer registers used // scratch rTblAddr = r3 rPiBy2Ptr = r21 rTmpPtr3 = r22 rDenoBound = r23 rOne ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
121
180
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:5
fXCube = f7 fXQuadr = f9 f1pX = f10 f1mX = f11 f1pXRcp = f12 f1mXRcp = f13 fH = f14 fS = f15 // stacked fA3 ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
161
220
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:6
fB0 = f50 fSignedS = f51 fD = f52 fHalf = f53 fR = f54 fCloseTo1Pol = f55 fSignX = f56 fDenoBound = f57 fNormX = ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
201
260
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:7
data8 0x3EF0DDA376D10FB3 //B10 data8 0xBEB83CAFE05EBAC9 //B11 data8 0x3F65FFB67B513644 //B4 data8 0x3F5032FBB86A4501 //B5 data8 0x3F392162276C7CBA //B6 data8 0x3F2435949FD98BDF //B7 data8 0xD93923D7FA08341C, 0x00003FF9 //B2 data8 0x3F802995B6D90BDB //B3 data8 0x3F10DF86B341A63F //B8 data8 0xC90FDAA22168C235, 0x00003FFF...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
241
300
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:8
// 1 + x = 1 - |x| for negative x fma.s1 f1pX = f1, f1, f8 adds rOne = 0x3FF, r0 } ;; { .mfi andcm rAbsXBits = rXBits, rSign // bits of |x| fmerge.s fSignX = f8, f1 // signum(x) shl r0625 = r0625, 48 // bits of DP representati...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
281
340
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:9
(p6) adds rTmpPtr2 = 48, rTblAddr } ;; { .mfi ldfe fB0 = [rTmpPtr1], 16 // B0 nop.f 0 nop.i 0 } { .mib adds rTmpPtr3 = 16, rTmpPtr2 // set p10 = 1 if |x| = 1.0 cmp.eq p10, p0 = rAbsXBits, rOne // b...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
321
380
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:10
;; { .mfi ldfe fA5 = [rTmpPtr2], 48 // A5 or B2 // initial approximation of 1 / sqrt(1 + x) frsqrta.s1 f1pXRcp, p0 = f1pX nop.i 0 } { .mfi ldfpd fA21, fA23 = [rTmpPtr1], 16 // A21, A23 or B3, B8 fma.s1 fXQuadr = fXSqr, fXSqr...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
361
420
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:11
} { .mfi nop.m 0 (p8) fma.s1 fS = f1pX, f1pXRcp, f0 // S0 for x > 0 nop.i 0 } ;; { .mfi nop.m 0 fma.s1 fRQuadr = fRSqr, fRSqr, f0 // R^4 nop.i 0 } ;; { .mfi nop.m 0 fma.s1 fB1...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
401
460
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:12
;; { .mfi nop.m 0 fnma.s1 fD = fH, fS, fHalf // d0 = 1/2 - H0*S0 nop.i 0 } ;; { .mfi nop.m 0 fma.s1 fR8 = fRQuadr, fRQuadr, f0 // R^4 nop.i 0 } { .mfi nop.m 0 fma.s1 fB9 = ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
441
500
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:13
{ .mfi nop.m 0 fma.s1 fS = fS, fD, fS // S1 = S0 + S0*d0 nop.i 0 } ;; {.mfi nop.m 0 fma.s1 fPiBy2 = fPiBy2, fSignX, f0 // signum(x)*Pi/2 nop.i 0 } ;; { .mfi nop.m 0 fma.s1 ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
481
540
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:14
{ .mfi nop.m 0 fma.s1 fH = fH, fD, fH // H2 = H1 + H1*d1 nop.i 0 } { .mfi nop.m 0 fma.s1 fS = fS, fD, fS // S2 = S1 + S1*d1 nop.i 0 } ;; { .mfi nop.m 0 // -signum(x)* S2 = -signum(x)*...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
521
580
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:15
fma.d.s0 f8 = fCloseTo1Pol, fD, fPiBy2 // exit here for 0.625 <= |x| < 1 br.ret.sptk b0 } ;; // here if |x| < 0.625 .align 32 asin_base_range: { .mfi nop.m 0 fma.s1 fA33 = fA33, fXSqr, fA31 nop.i 0 } { .mfi nop.m ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
561
620
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:16
nop.i 0 } ;; { .mfi nop.m 0 fma.s1 fA5 = fA5, fXSqr, fA3 nop.i 0 } ;; { .mfi nop.m 0 fma.s1 fA35 = fA35, fXQuadr, fA33 nop.i 0 } { .mfi nop.m 0 fma.s1 fA17 = ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
601
660
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:17
nop.i 0 } { .mfi nop.m 0 fma.s1 fA17 = fA17, fXSqr, fA11 nop.i 0 } ;; { .mfi nop.m 0 fma.s1 fX16 = fX8, fX8, f0 // x^16 nop.i 0 } ;; { .mfi nop.m 0 fma.s1 fA3...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
641
700
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:18
// here if |x| = 1 // asin(x) = sign(x) * Pi/2 .align 32 asin_abs_1: { .mfi ldfe fPiBy2 = [rPiBy2Ptr] // Pi/2 nop.f 0 nop.i 0 } ;; {.mfb nop.m 0 // result for |x| = 1.0 fma.d.s0 f8 = fPiBy2, fSignX, f0 // exit here ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
681
740
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:19
{ .mfi nop.m 0 fnorm.s1 fNormX = f8 nop.i 0 } ;; { .mfb // load smallest normal to FP reg setf.d fDenoBound = rDenoBound // answer if x is a NaN (p12) fma.d.s0 f8 = f8,f1,f0 // exit here if x is a NaN (p12) br.ret.spnt ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
721
780
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:20
{ .mfi nop.m 0 (p14) fcmp.eq.s0 p6, p0 = f8, f0 // Set D flag if x unnormal nop.i 0 } { .mfb nop.m 0 // normalize unnormal input (p14) fnorm.s1 f8 = f8 // return to the main path (p14) br.cond.sptk asin_unnormal_back } ;; ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
761
820
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:21
libm_alias_double_other (asin, asin) LOCAL_LIBM_ENTRY(__libm_error_region) .prologue { .mfi add GR_Parameter_Y=-32,sp // Parameter 2 value nop.f 0 .save ar.pfs,GR_SAVE_PFS mov GR_SAVE_PFS=ar.pfs // Save ar.pfs } { .mfi .fframe 64 add sp=-64,sp ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
0609ec0a74f6360ebfb45d048f071a75dfcbc6c7
github
libc
https://github.com/bminor/glibc/blob/0609ec0a74f6360ebfb45d048f071a75dfcbc6c7/sysdeps/ia64/fpu/e_asin.S
801
855
bminor/glibc:sysdeps/ia64/fpu/e_asin.S:20
{ .mfi nop.m 0 (p14) fcmp.eq.s0 p6, p0 = f8, f0 // Set D flag if x unnormal nop.i 0 } { .mfb nop.m 0 // normalize unnormal input (p14) fnorm.s1 f8 = f8 // return to the main path (p14) br.cond.sptk asin_unnormal_back } ;; ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asin.S
LGPL-2.1
890b7a4b33d482b5c768ab47d70758b80227e9bc
github
libc
https://github.com/bminor/glibc/blob/890b7a4b33d482b5c768ab47d70758b80227e9bc/sysdeps/ia64/fpu/e_asin.S
761
820
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:4
// answer2 = - sign(x) z P(t) + (sign(x) pi/2) // // Assembly macros //========================================= // predicate registers //asinf_pred_LEsqrt2by2 = p7 //asinf_pred_GTsqrt2by2 = p8 // integer registers ASINF_Addr1 = r33 ASINF_Addr2 = r34 ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asinf.S
121
180
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:5
asinf_coeff_P8 = f40 asinf_coeff_P1 = f41 asinf_coeff_P4 = f42 asinf_coeff_P5 = f43 asinf_coeff_P2 = f44 asinf_coeff_P7 = f45 asinf_coeff_P6 = f46 asinf_coeff_P9 = f47 asinf_...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asinf.S
161
220
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:6
asinf_Fz = f73 asinf_z = f74 asinf_sgnx_z = f75 asinf_t2 = f76 asinf_2poly_p4 = f77 asinf_2poly_p6 = f78 asinf_2poly_p1 = f79 asinf_2poly_p2 = f80 asinf_...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asinf.S
201
260
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:7
LOCAL_OBJECT_END(asinf_coeff_1_table) LOCAL_OBJECT_START(asinf_coeff_2_table) data8 0x3FA6F108E31EFBA6 // P3 data8 0xBFCA31BF175D82A0 // P8 data8 0x3FA30C0337F6418B // P5 data8 0x3FB332C9266CB1F9 // P2 data8 0x3ff921fb54442d18 // pi_by_2 LOCAL_OBJECT_END(asinf_coeff_2_table) .section .text GLOBAL_LIBM_ENTRY(asinf) ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asinf.S
241
300
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:8
{ .mfi setf.s asinf_1by2 = ASINF_GR_1by2 fmerge.s asinf_sgn_x = f8,f1 nop.i 999 } { .mfi ld8 ASINF_Addr2 = [ASINF_Addr2] nop.f 0 nop.i 999;; } { .mfi setf.s asinf_5by2 = ASINF_GR_5by2 f...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asinf.S
281
340
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:9
fclass.m.unc p10,p0 = f8, 0x07 //@zero nop.i 999 } { .mfi ldfpd asinf_coeff_P5,asinf_coeff_P2 = [ASINF_Addr2],16 fma.s1 asinf_x3 = f8,asinf_x2,f0 nop.i 999;; } { .mfi ldfd asinf_const_piby2...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asinf.S
321
380
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:10
nop.m 999 fma.s1 asinf_t4 = asinf_t2,asinf_t2,f0 (p6) br.cond.spnt ASINF_ABS_ONE ;; // Branch if |x|=1 } { .mfi nop.m 999 fma.s1 asinf_x5 = asinf_x2,asinf_x3,f0 nop.i 999 } { .mfb (p9) mov GR_Parameter_TAG = ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asinf.S
361
420
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:11
nop.m 999 fma.s1 asinf_poly_p3 = asinf_coeff_P4,asinf_x2,asinf_coeff_P3 nop.i 999 } { .mfi nop.m 999 fma.s1 asinf_2poly_p6 = asinf_coeff_P7,asinf_t,asinf_coeff_P6 nop.i 999;; } { .mfi ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asinf.S
401
460
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:12
nop.m 999 fnma.s1 asinf_dz = asinf_B2,asinf_yby2,asinf_1by2 nop.i 999;; } { .mfi nop.m 999 fma.s1 asinf_poly_p1a = asinf_x2,asinf_poly_p1,f8 nop.i 999 } { .mfi nop.m 999 ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asinf.S
441
500
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:13
nop.i 999;; } { .mfi nop.m 999 (p8) fma.s1 asinf_sgnx_t4 = asinf_sgn_x,asinf_t4,f0 nop.i 999 } { .mfi nop.m 999 (p8) fma.s1 asinf_2...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asinf.S
481
540
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:14
nop.m 999 (p7) fma.d.s1 asinf_poly_Bx = asinf_x4,asinf_poly_p7a,asinf_poly_p5 nop.i 999 } { .mfi nop.m 999 (p8) fma.s1 asinf_sgnx_2poly_p2 = asinf_sgn_x,asinf_2poly_p2a,f0 nop.i 999;; } { ....
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asinf.S
521
580
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:15
.pred.rel "mutex",p8,p7 //asinf_pred_GTsqrt2by2,asinf_pred_LEsqrt2by2 { .mfi nop.m 999 (p8) fnma.s.s0 f8 = asinf_z,asinf_Pt,asinf_sgn_x_piby2 nop.i 999 } { .mfb nop.m 999 (p7) fma.s.s0 f...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asinf.S
561
620
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:16
// Stack operations when calling error support. // (3) (call) (4) // psp -> + sp -> + // | | // R3 ->| <- GR_RESULT | -> f8 // | | // Y2 ->| <- GR_Y | // | ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asinf.S
601
660
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:17
nop.i 0 };; { .mib stfs [GR_Parameter_X] = f8 // Store Parameter 1 on stack add GR_Parameter_RESULT = 0,GR_Parameter_Y nop.b 0 // Parameter 3 address } { .mib stfs [GR_Parameter_Y] = f9 // Store Parameter 3 on stack add GR...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
65cc53fe7c6556b90159b8c3da1eb283792387db
github
libc
https://github.com/bminor/glibc/blob/65cc53fe7c6556b90159b8c3da1eb283792387db/sysdeps/ia64/fpu/e_asinf.S
641
675
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:5
asinf_coeff_P3 = f39 asinf_coeff_P8 = f40 asinf_coeff_P1 = f41 asinf_coeff_P4 = f42 asinf_coeff_P5 = f43 asinf_coeff_P2 = f44 asinf_coeff_P7 = f45 asinf_coeff_P6 = f46 asinf_...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
aa1142c593447b433208a79bd5a95095cd5dd892
github
libc
https://github.com/bminor/glibc/blob/aa1142c593447b433208a79bd5a95095cd5dd892/sysdeps/ia64/fpu/e_asinf.S
161
220
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:6
asinf_d2z = f72 asinf_Fz = f73 asinf_z = f74 asinf_sgnx_z = f75 asinf_t2 = f76 asinf_2poly_p4 = f77 asinf_2poly_p6 = f78 asinf_2poly_p1 = f79 asinf_2...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
aa1142c593447b433208a79bd5a95095cd5dd892
github
libc
https://github.com/bminor/glibc/blob/aa1142c593447b433208a79bd5a95095cd5dd892/sysdeps/ia64/fpu/e_asinf.S
201
260
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:7
data8 0x3fe6a09e667f3bcd // sqrt(2)/2 LOCAL_OBJECT_END(asinf_coeff_1_table) LOCAL_OBJECT_START(asinf_coeff_2_table) data8 0x3FA6F108E31EFBA6 // P3 data8 0xBFCA31BF175D82A0 // P8 data8 0x3FA30C0337F6418B // P5 data8 0x3FB332C9266CB1F9 // P2 data8 0x3ff921fb54442d18 // pi_by_2 LOCAL_OBJECT_END(asinf_coeff_2_table) .se...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
aa1142c593447b433208a79bd5a95095cd5dd892
github
libc
https://github.com/bminor/glibc/blob/aa1142c593447b433208a79bd5a95095cd5dd892/sysdeps/ia64/fpu/e_asinf.S
241
300
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:8
{ .mfi setf.s asinf_1by2 = ASINF_GR_1by2 fmerge.s asinf_sgn_x = f8,f1 nop.i 999 } { .mfi ld8 ASINF_Addr2 = [ASINF_Addr2] nop.f 0 nop.i 999;; } { .mfi setf.s asinf_5by2 = ASINF_GR_5by2 f...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
aa1142c593447b433208a79bd5a95095cd5dd892
github
libc
https://github.com/bminor/glibc/blob/aa1142c593447b433208a79bd5a95095cd5dd892/sysdeps/ia64/fpu/e_asinf.S
281
340
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:9
ldfpd asinf_coeff_P9,asinf_const_sqrt2by2 = [ASINF_Addr1] fclass.m.unc p10,p0 = f8, 0x07 //@zero nop.i 999 } { .mfi ldfpd asinf_coeff_P5,asinf_coeff_P2 = [ASINF_Addr2],16 fma.s1 asinf_x3 = f8,asinf_x2,f0 nop.i ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
aa1142c593447b433208a79bd5a95095cd5dd892
github
libc
https://github.com/bminor/glibc/blob/aa1142c593447b433208a79bd5a95095cd5dd892/sysdeps/ia64/fpu/e_asinf.S
321
380
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:10
{ .mfb nop.m 999 fma.s1 asinf_t4 = asinf_t2,asinf_t2,f0 (p6) br.cond.spnt ASINF_ABS_ONE ;; // Branch if |x|=1 } { .mfi nop.m 999 fma.s1 asinf_x5 = asinf_x2,asinf_x3,f0 nop.i 999 } { .mfb (p9) mov GR_...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
aa1142c593447b433208a79bd5a95095cd5dd892
github
libc
https://github.com/bminor/glibc/blob/aa1142c593447b433208a79bd5a95095cd5dd892/sysdeps/ia64/fpu/e_asinf.S
361
420
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:11
{ .mfi nop.m 999 fma.s1 asinf_poly_p3 = asinf_coeff_P4,asinf_x2,asinf_coeff_P3 nop.i 999 } { .mfi nop.m 999 fma.s1 asinf_2poly_p6 = asinf_coeff_P7,asinf_t,asinf_coeff_P6 nop.i 999;; } ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
aa1142c593447b433208a79bd5a95095cd5dd892
github
libc
https://github.com/bminor/glibc/blob/aa1142c593447b433208a79bd5a95095cd5dd892/sysdeps/ia64/fpu/e_asinf.S
401
460
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:12
{ .mfi nop.m 999 fnma.s1 asinf_dz = asinf_B2,asinf_yby2,asinf_1by2 nop.i 999;; } { .mfi nop.m 999 fma.s1 asinf_poly_p1a = asinf_x2,asinf_poly_p1,f8 nop.i 999 } { .mfi nop.m ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
aa1142c593447b433208a79bd5a95095cd5dd892
github
libc
https://github.com/bminor/glibc/blob/aa1142c593447b433208a79bd5a95095cd5dd892/sysdeps/ia64/fpu/e_asinf.S
441
500
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:13
fma.s1 asinf_2poly_p2a = asinf_2poly_p2,asinf_t2,asinf_2poly_p1 nop.i 999;; } { .mfi nop.m 999 (p8) fma.s1 asinf_sgnx_t4 = asinf_sgn_x,asinf_t4,f0 nop.i ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
aa1142c593447b433208a79bd5a95095cd5dd892
github
libc
https://github.com/bminor/glibc/blob/aa1142c593447b433208a79bd5a95095cd5dd892/sysdeps/ia64/fpu/e_asinf.S
481
540
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:14
{ .mfi nop.m 999 (p7) fma.d.s1 asinf_poly_Bx = asinf_x4,asinf_poly_p7a,asinf_poly_p5 nop.i 999 } { .mfi nop.m 999 (p8) fma.s1 asinf_sgnx_2poly_p2 = asinf_sgn_x,asinf_2poly_p2a,f0 nop.i ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
aa1142c593447b433208a79bd5a95095cd5dd892
github
libc
https://github.com/bminor/glibc/blob/aa1142c593447b433208a79bd5a95095cd5dd892/sysdeps/ia64/fpu/e_asinf.S
521
580
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:15
} .pred.rel "mutex",p8,p7 //asinf_pred_GTsqrt2by2,asinf_pred_LEsqrt2by2 { .mfi nop.m 999 (p8) fnma.s.s0 f8 = asinf_z,asinf_Pt,asinf_sgn_x_piby2 nop.i 999 } { .mfb nop.m 999 (p7) fma.s.s0 ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
aa1142c593447b433208a79bd5a95095cd5dd892
github
libc
https://github.com/bminor/glibc/blob/aa1142c593447b433208a79bd5a95095cd5dd892/sysdeps/ia64/fpu/e_asinf.S
561
620
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:16
// Stack operations when calling error support. // (3) (call) (4) // psp -> + sp -> + // | | // R3 ->| <- GR_RESULT | -> f8 // | | // Y2 ->| <- GR_Y | // | ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
aa1142c593447b433208a79bd5a95095cd5dd892
github
libc
https://github.com/bminor/glibc/blob/aa1142c593447b433208a79bd5a95095cd5dd892/sysdeps/ia64/fpu/e_asinf.S
601
660
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:17
frcpa.s0 f9,p0 = f0,f0 nop.i 0 };; { .mib stfs [GR_Parameter_X] = f8 // Store Parameter 1 on stack add GR_Parameter_RESULT = 0,GR_Parameter_Y nop.b 0 // Parameter 3 address } { .mib stfs [GR_Parameter_Y] = f9 // Store Parame...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
aa1142c593447b433208a79bd5a95095cd5dd892
github
libc
https://github.com/bminor/glibc/blob/aa1142c593447b433208a79bd5a95095cd5dd892/sysdeps/ia64/fpu/e_asinf.S
641
676
bminor/glibc:sysdeps/ia64/fpu/e_asinf.S:15
} .pred.rel "mutex",p8,p7 //asinf_pred_GTsqrt2by2,asinf_pred_LEsqrt2by2 { .mfi nop.m 999 (p8) fnma.s.s0 f8 = asinf_z,asinf_Pt,asinf_sgn_x_piby2 nop.i 999 } { .mfb nop.m 999 (p7) fma.s.s0 ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_asinf.S
LGPL-2.1
890b7a4b33d482b5c768ab47d70758b80227e9bc
github
libc
https://github.com/bminor/glibc/blob/890b7a4b33d482b5c768ab47d70758b80227e9bc/sysdeps/ia64/fpu/e_asinf.S
561
620
bminor/glibc:sysdeps/ia64/fpu/e_atan2.S:4
// +inf -inf +3pi/4 // -inf -inf -3pi/4 // // +1 +1 +pi/4 // -1 +1 -pi/4 // +1 -1 +3pi/4 // -1 -1 -3pi/4 // // ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_atan2.S
LGPL-2.1
30891f35fa7da832b66d80d0807610df361851f3
github
libc
https://github.com/bminor/glibc/blob/30891f35fa7da832b66d80d0807610df361851f3/sysdeps/ia64/fpu/e_atan2.S
121
180
bminor/glibc:sysdeps/ia64/fpu/e_atan2.S:5
// Assembly macros //============================================================== EXP_AD_P1 = r33 EXP_AD_P2 = r34 rsig_near_one = r35 GR_SAVE_B0 = r35 GR_SAVE_GP = r36 GR_SAVE_PFS = r37 GR_Parameter_X ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_atan2.S
LGPL-2.1
30891f35fa7da832b66d80d0807610df361851f3
github
libc
https://github.com/bminor/glibc/blob/30891f35fa7da832b66d80d0807610df361851f3/sysdeps/ia64/fpu/e_atan2.S
161
220
bminor/glibc:sysdeps/ia64/fpu/e_atan2.S:6
atan2_P2 = f48 atan2_P3 = f49 atan2_P4 = f50 atan2_P5 = f51 atan2_P6 = f52 atan2_P7 = f53 atan2_P8 = f54 atan2_P9 = f55 atan2_P10 = f56 ata...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_atan2.S
LGPL-2.1
30891f35fa7da832b66d80d0807610df361851f3
github
libc
https://github.com/bminor/glibc/blob/30891f35fa7da832b66d80d0807610df361851f3/sysdeps/ia64/fpu/e_atan2.S
201
260
bminor/glibc:sysdeps/ia64/fpu/e_atan2.S:7
atan2_W3 = f80 atan2_W4 = f81 atan2_V3 = f82 atan2_V4 = f83 atan2_F = f84 atan2_gV = f85 atan2_V10 = f86 atan2_zcub = f87 atan2_V6 = f88 ata...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_atan2.S
LGPL-2.1
30891f35fa7da832b66d80d0807610df361851f3
github
libc
https://github.com/bminor/glibc/blob/30891f35fa7da832b66d80d0807610df361851f3/sysdeps/ia64/fpu/e_atan2.S
241
300
bminor/glibc:sysdeps/ia64/fpu/e_atan2.S:8
atan2_A = f113 atan2_Pp = f114 atan2_sgnY = f115 atan2_sig_near_one = f116 atan2_near_one = f116 atan2_pi = f117 atan2_sgn_pi = f117 atan2_3pi_by_4 = f118 atan2_pi_by_4 = ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_atan2.S
LGPL-2.1
30891f35fa7da832b66d80d0807610df361851f3
github
libc
https://github.com/bminor/glibc/blob/30891f35fa7da832b66d80d0807610df361851f3/sysdeps/ia64/fpu/e_atan2.S
281
340
bminor/glibc:sysdeps/ia64/fpu/e_atan2.S:9
data8 0xF396268151CFB11C , 0x00003FF7 // P17 data8 0xD818B4BB43D84BF2 , 0x0000BFF8 // P16 data8 0xA2270D30A90AA220 , 0x00003FF9 // P15 data8 0xD5F4F2182E7A8725 , 0x0000BFF9 // P14 data8 0x80D601879218B53A , 0x00003FFA // P13 data8 0x9297B23CCFFB291F , 0x0000BFFA // P12 data8 0xFE7E52D2A89995B3 , 0x0000BFEC // P2...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_atan2.S
LGPL-2.1
30891f35fa7da832b66d80d0807610df361851f3
github
libc
https://github.com/bminor/glibc/blob/30891f35fa7da832b66d80d0807610df361851f3/sysdeps/ia64/fpu/e_atan2.S
321
380
bminor/glibc:sysdeps/ia64/fpu/e_atan2.S:10
} { .mfi nop.m 999 fclass.m p10,p0 = atan2_Y, 0xc3 // Test for y=nan nop.i 999 } { .mfi nop.m 999 fma.s1 atan2_ysq = atan2_Y,atan2_Y,f0 nop.i 999 } ;; { .mfi add EXP_AD_P2 = 0xd0,EXP_AD_P1 fclass.m p12,p0 = atan2_X, 0x...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_atan2.S
LGPL-2.1
30891f35fa7da832b66d80d0807610df361851f3
github
libc
https://github.com/bminor/glibc/blob/30891f35fa7da832b66d80d0807610df361851f3/sysdeps/ia64/fpu/e_atan2.S
361
420
bminor/glibc:sysdeps/ia64/fpu/e_atan2.S:11
} { .mfi ldfe atan2_P20 = [EXP_AD_P2],16 fnma.s1 atan2_B1X = atan2_u1_X, atan2_X, atan2_two nop.i 999 ;; } { .mfi ldfe atan2_P9 = [EXP_AD_P1],16 fma.s1 atan2_z1_Y = atan2_u1_Y, atan2_X, f0 nop.i 999 } { .mfi ldf...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_atan2.S
LGPL-2.1
30891f35fa7da832b66d80d0807610df361851f3
github
libc
https://github.com/bminor/glibc/blob/30891f35fa7da832b66d80d0807610df361851f3/sysdeps/ia64/fpu/e_atan2.S
401
460
bminor/glibc:sysdeps/ia64/fpu/e_atan2.S:12
ldfe atan2_P17 = [EXP_AD_P2],16 (p12) fma.d.s0 f8 = atan2_X,atan2_Y,f0 // If x nan, result quiet x (p12) br.ret.spnt b0 // Exit for x nan ;; } // p6 true if swap, means |y| > |x| or ysq > xsq // p7 true if no swap, means |x| >= |y| or xsq >= ysq { .mmf ...
x86_64
intel-like
handwritten
bminor/glibc
sysdeps/ia64/fpu/e_atan2.S
LGPL-2.1
30891f35fa7da832b66d80d0807610df361851f3
github
libc
https://github.com/bminor/glibc/blob/30891f35fa7da832b66d80d0807610df361851f3/sysdeps/ia64/fpu/e_atan2.S
441
500