text stringlengths 14 100k | source stringclasses 1
value | repo stringclasses 810
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<|fim_prefix|>/*
* Copyright (c) 2025 Würth Elektronik eiSos GmbH & Co. KG
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_SENSOR_WSEN_PADS_2511020213301_WSEN_PADS_2511020213301_H_
#define ZEPHYR_DRIVERS_SENSOR_WSEN_PADS_2511020213301_WSEN_PADS_2511020213301_H_
#include <zephyr/drivers/gpio.h>
#... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>s filter");
return -EIO;
}
return 0;
}
/* Get reference point from registers. */
int pads_2511020213301_reference_point_get(const struct device *dev,
struct sensor_value *reference_point)
{
struct pads_2511020213301_data *data = dev->data;
if (PADS_getReferencePressure(&data->sensor_inte... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Würth Elektronik eiSos GmbH & Co. KG
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT we_wsen_pdms_25131308xxx05
#include <zephyr/sys/__assert.h>
#include <zephyr/sys/byteorder.h>
#include <zephyr/logging/log.h>
#include <string.h>
#include "wsen_pdms_251313... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Würth Elektronik eiSos GmbH & Co. KG
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_SENSOR_WSEN_PDMS_25131308XXX05_H_
#define ZEPHYR_DRIVERS_SENSOR_WSEN_PDMS_25131308XXX05_H_
#include <stdbool.h>
#include <zephyr/drivers/sensor.h>
#include <platform.h>
#... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Würth Elektronik eiSos GmbH & Co. KG
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT we_wsen_pdus_25131308xxxxx
#include <stdlib.h>
#include <zephyr/sys/__assert.h>
#include <zephyr/sys/byteorder.h>
#include <zephyr/logging/log.h>
#include "wsen_pdus_251313... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Würth Elektronik eiSos GmbH & Co. KG
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_SENSOR_WSEN_PDUS_25131308XXXXX_WSEN_PDUS_25131308XXXXX_H_
#define ZEPHYR_DRIVERS_SENSOR_WSEN_PDUS_25131308XXXXX_WSEN_PDUS_25131308XXXXX_H_
#include <zephyr/drivers/gpio.h>
#... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2025 Würth Elektronik eiSos GmbH & Co. KG
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_SENSOR_WSEN_COMMON_H_
#define ZEPHYR_DRIVERS_SENSOR_WSEN_COMMON_H_
#include <stdint.h>
#include <stdbool.h>
#include <zephyr/drivers/sensor.h>
#define MAX_POLL_STEP_COUNT 10
static inli... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
.odr = (uint8_t)(DT_INST_ENUM_IDX(inst, odr)), \
COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, interrupt_gpios), \
(TIDS_2521020222501_CFG_IRQ(inst)), ())}; \
SENSOR_DEVICE_DT_INST_DEFINE(inst, t... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>2501_i2c_init(const struct device *dev);
#endif /* ZEPHYR_DRIVERS_SENSOR_WSEN_TIDS_2521020222501_WSEN_TIDS_2521020222501_H_ */
<|fim_prefix|>/*
* Copyright (c) 2025 Würth Elektronik eiSos GmbH & Co. KG
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_SENSOR_WSEN_TIDS_2521020222501_W... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>*data = dev->data;
int32_t thresh;
if (TIDS_getTempLowLimit(&data->sensor_interface, &thresh) != WE_SUCCESS) {
LOG_ERR("Failed to get low temperature threshold.");
return -EIO;
}
thresh_value->val1 = thresh / 1000;
thresh_value->val2 = (thresh % 1000) * (1000000 / 1000);
return 0;
}
int tids... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>onfig->i2c, XBR818_PIN_SETTINGS, 0x0C);
__ASSERT(ret == 0, "Error sending XBR818 defaults for XBR818_PIN_SETTINGS");
ret |= i2c_reg_write_byte_dt(&config->i2c, XBR818_I2C_OUT, 0x1);
__ASSERT(ret == 0, "Error sending XBR818 defaults for XBR818_I2C_OUT");
return ret;
}
static int xbr818_init(const st... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 MASSDRIVER EI (massdriver.space)
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_SENSOR_XBR818_XBR818_H_
#define ZEPHYR_DRIVERS_SENSOR_XBR818_XBR818_H_
#include <stdint.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/sensor.h>
#include <zephyr/k... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright 2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_s32_sent
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(nxp_s32_sent, CONFIG_SENT_LOG_LEVEL);
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018, Christian Taedcke, Diego Sueiro
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT silabs_gecko_leuart
#include <errno.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/irq.h>
#include <em_leuart.h>
#include <em_gpio.h>
#include <em_cmu.h>
#include <soc.h>
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>(lp_uart), tx_pin),
.rx_io_num = DT_PROP(DT_NODELABEL(lp_uart), rx_pin),
.rts_io_num = DT_PROP(DT_NODELABEL(lp_uart), rts_pin),
.cts_io_num = DT_PROP(DT_NODELABEL(lp_uart), cts_pin),
.baud_rate = DT_PROP(DT_NODELABEL(lp_uart), current_speed),
.data_bits = DT_PROP_OR(DT_NODELABEL(lp_uart), data_bits, ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Libre Solar Technologies GmbH
* Copyright (c) 2025 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT espressif_esp32_usb_serial
#include <hal/usb_serial_jtag_ll.h>
#include <zephyr/kernel.h>
#include <zephyr/device.h>
#i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> = read_buf;
data->read_size = read_size;
data->read_position = 0;
async_rx_run(dev);
return 0;
}
#endif /* CONFIG_UART_ASYNC_API */
static DEVICE_API(uart, serial_vnd_api) = {
.poll_in = serial_vnd_poll_in,
.poll_out = serial_vnd_poll_out,
.err_check = serial_vnd_err_check,
#ifdef CONFIG_UART_U... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* SPDX-FileCopyrightText: 2025 Aesc Silicon
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT aesc_uart
#include <errno.h>
#include <ip_identification.h>
#include <soc.h>
#include <zephyr/device.h>
#include <zephyr/devicetree.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>\
NULL, \
&uart_altera_dev_data_##n, \
&uart_altera_dev_cfg_##n, \
PRE_KERNEL_1, \
CONFIG_SERIAL_INIT_PRIORITY, ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017-2023 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief UART driver for Intel FPGA UART Core IP
* Reference : Embedded Peripherals IP User Guide : 12. JTAG UART Core
*
*/
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/drive... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>c.dma_rdy = false;
#ifdef CONFIG_UART_AMBIQ_HANDLE_CACHE
if (!buf_in_nocache((uintptr_t)buf, len)) {
/* Clean Dcache before DMA write */
sys_cache_data_flush_range((void *)buf, len);
}
#endif /* CONFIG_UART_AMBIQ_HANDLE_CACHE */
unsigned int key = irq_lock();
data->async.tx.buf = buf;
data->as... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>irq_rx_ready,
.irq_err_enable = loguart_ameba_irq_err_enable,
.irq_err_disable = loguart_ameba_irq_err_disable,
.irq_is_pending = loguart_ameba_irq_is_pending,
.irq_callback_set = loguart_ameba_irq_callback_set,
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
};
AMEBA_LOGUART_IRQ_HANDLER_DECL
AMEBA_LOGUART... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>0)
/* For APBUART implemented without FIFO */
#define APBUART_STATUS_HOLD_REGISTER_EMPTY (1 << 2)
struct apbuart_dev_cfg {
struct apbuart_regs *regs;
int interrupt;
};
struct apbuart_dev_data {
int usefifo;
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
uart_irq_callback_user_data_t cb;
void *cb_data;
#endif... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2023 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <string.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/serial/uart_async_rx.h>
static uint8_t inc(struct uart_async_rx *rx_data, uint8_t val)
{
return (val + 1) & (rx_data->config->buf_cnt - 1);
}
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>v)
{
struct uart_async_to_irq_data *data = get_data(dev);
bool ready = (data->flags & A2I_TX_IRQ_ENABLED) && !(data->flags & A2I_TX_BUSY);
/* async API handles arbitrary sizes */
return ready ? data->tx.len : 0;
}
/** Interrupt driven receiver enabling function */
void z_uart_async_to_irq_irq_rx_ena... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 Telink Semiconductor
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "analog.h"
#include "clock.h"
#include <zephyr/device.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/irq.h>
#include <zephyr/drivers/interrupt_controller/riscv_p... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 honglin leng <a909204013@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT brcm_bcm2711_aux_uart
/**
* @brief BCM2711 Miniuart Serial Driver
*
*/
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#include <stdbool.h>
#include <zephyr/sys/__... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2026, Realtek Semiconductor Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT realtek_bee_uart
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/sys/__assert.h>
#include <soc.h>
#include <zephyr/init.h>
#include <zephyr/linker/sect... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2021-2025 ATL Electronics
* Copyright (c) 2024-2025, MASSDRIVER EI (massdriver.space)
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT bflb_uart
/**
* @brief UART driver for Bouffalo Lab MCU family.
*/
#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/pinctrl.h>
#inc... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025 Joel Guittet
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT zephyr_uart_bitbang
#define LOG_LEVEL CONFIG_UART_LOG_LEVEL
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(uart_bitbang);
#include <zephyr/sys/ring_buffer.h>
#include <zephyr/sys/sys_io.h>
#inclu... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright 2025 Google LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/device.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/kernel.h>
#include <zephyr/logging/log.h>
#include <zephyr/sys/ring_buffer.h>
#include <zephyr/drivers/uart/uart_bridge.h>
#include <zephyr/pm/device.h>
#define DT... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>et,
};
static int uart_bt_workqueue_init(void)
{
k_work_queue_init(&nus_work_queue);
k_work_queue_start(&nus_work_queue, nus_work_queue_stack,
K_THREAD_STACK_SIZEOF(nus_work_queue_stack),
CONFIG_UART_BT_WORKQUEUE_PRIORITY, NULL);
k_thread_name_set(&nus_work_queue.thread, "uart_bt");
retu... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>_ready,
.irq_err_enable = uart_cc13xx_cc26xx_irq_err_enable,
.irq_err_disable = uart_cc13xx_cc26xx_irq_err_disable,
.irq_is_pending = uart_cc13xx_cc26xx_irq_is_pending,
.irq_callback_set = uart_cc13xx_cc26xx_irq_callback_set,
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
};
#ifdef CONFIG_PM
#define UART_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Texas Instruments Incorporated
* Copyright (c) 2024 BayLibre, SAS
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ti_cc23x0_uart
#include <zephyr/device.h>
#include <zephyr/drivers/dma.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/pinctrl.h>
#... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2016-2017, Texas Instruments Incorporated
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ti_cc32xx_uart
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/pinctrl.h>
/* Driverlib includes */
#include... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2022 Meta Platforms, Inc. and its affiliates.
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT cdns_uart
/**
* @brief Serial Driver for cadence UART IP6528
*/
#include "uart_cdns.h"
#define DEV_UART(dev) ((struct uart_cdns_regs *) \
((const struct uart_cdns_device_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>)
#define CDNS_PARTITY_MAP(parity) \
(parity == UART_CFG_PARITY_NONE) ? NO_PARITY_VAL \
: (parity == UART_CFG_PARITY_ODD) ? ODD_PARITY_VAL \
: (parity == UART_CFG_PARITY_MARK) ? MARK_PARITY_VAL \
: (parity == UART_CFG_PARITY_SPACE) ? SPACE_PARITY_VAL \
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021, Linaro Limited.
* Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT arm_cmsdk_uart
/**
* @brief Driver for UART on ARM CMSDK APB UART.
*
* UART has two wires for RX and TX, and d... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>t_efinix_sapphire_poll_in,
.poll_out = uart_efinix_sapphire_poll_out,
.err_check = NULL,
};
static const struct uart_efinix_sapphire_config uart_efinix_sapphire_cfg_0 = {
.baudrate = DT_INST_PROP(0, current_speed),
};
static int uart_efinix_sapphire_init(const struct device *dev)
{
ARG_UNUSED(dev);
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Fabian Blatz
* Copyright (c) 2024 grandcentrix GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT zephyr_uart_emul
#include <errno.h>
#include <zephyr/drivers/emul.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/serial/uart_emul.h>
#include <... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025-2026 ENE Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ene_kb106x_uart
#include <zephyr/kernel.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/sys/ring_buffer.h>
#include <reg/ser.h>
#include <zephyr/... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 ENE Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ene_kb1200_uart
#include <zephyr/kernel.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/pinctrl.h>
#include <reg/ser.h>
struct kb1200_uart_config {
#ifdef CONFIG_UART_INTERRUPT_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2019 Mohamed ElShahawi (extremegtx@hotmail.com)
* Copyright (c) 2023-2026 Espressif Systems (Shanghai) Co., Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT espressif_esp32_uart
/* Include esp-idf headers first to avoid redefining BIT() macro */
/* TODO: incl... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>lue = sys_read8(config->base + SCIFCR2_OFFSET);
value &= ~(SCIFCR2_RXORIE | SCIFCR2_RXFTOIE);
sys_write8(value, config->base + SCIFCR2_OFFSET);
}
/**
* @brief Check if interrupt is pending
*/
static int uart_ft9001_irq_is_pending(const struct device *dev)
{
const struct uart_ft9001_config *config = ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>(idx),
#else /* UART_GECKO_HW_FLOW_CONTROL */
#define GECKO_UART_RTS_CTS_PIN_LOCATIONS(idx)
#define VALIDATE_GECKO_UART_RTS_CTS_PIN_LOCATIONS(idx)
#define GECKO_UART_RTS_CTS_PINS(idx)
#endif /* UART_GECKO_HW_FLOW_CONTROL */
#define GECKO_UART_INIT(idx) \
VALIDATE_GECKO_UART_RX_TX_PIN_LOCATIONS(... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/drivers/uart.h>
#include <zephyr/internal/syscall_handler.h>
#define UART_SIMPLE(op_) \
static inline int z_vrfy_uart_##op_(const struct device *dev) \
{ \
K_OOPS(K_SYSCALL_DRIVER_UART(dev... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Synopsys Inc. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/drivers/uart.h>
#include <zephyr/kernel.h>
#include <zephyr/toolchain.h>
#include <string.h>
#define DT_DRV_COMPAT snps_hostlink_uart
/* Only supported by HW and nSIM targets */
BU... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 EPAM Systems
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/arch/arm64/hypercall.h>
#include <zephyr/xen/console.h>
#include <zephyr/xen/events.h>
#include <zephyr/xen/generic.h>
#include <zephyr/xen/hvm.h>
#include <zephyr/xen/public/io/console.h>
#include <zephy... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 EPAM Systems
*
* SPDX-License-Identifier: Apache-2.0
*
* This driver implements input/output API for Xen domain through the
* Xen consoleio interface. This should be used only for Zephyr as initial
* domain (Dom0<|fim_suffix|>evice *dev,
unsigned char *c)
{
int ret = 0;
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>#n##_data; \
\
static const struct imx_uart_config imx_uart_##n##_config; \
\
PINCTRL_DT_INST_DEFINE(n); \
\
DEVICE_DT_INST_DEFINE(n, uart_imx_init, NULL, \
&imx_uart_##n##_data, &imx_uart_##n##_config, \
PRE_KERNEL_1, \
CONFIG_SERIAL_INIT_PRIORITY, \
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Cypress Semiconductor Corporation (an Infineon company) or
* an affiliate of Cypress Semiconductor Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief UART driver for Infineon CAT1 MCU family.
*
*/
#define DT_DRV_COMPAT infineon_uart
#include <zephyr/driv... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>turn (result == CY_RSLT_SUCCESS) ? 0 : -ENOTSUP;
};
static int ifx_cat1_uart_config_get(const struct device *dev, struct uart_config *cfg)
{
ARG_UNUSED(dev);
struct ifx_cat1_uart_data *const data = dev->data;
if (cfg == NULL) {
return -EINVAL;
}
*cfg = data->cfg;
return 0;
}
#ifdef CONFIG_UAR... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief UART driver for Intel FPGA UART Core IP
* Reference : Embedded Peripherals IP User Guide (22.3 and above): 55.
* Lightweight UART Core
*/
#define DT_DRV_COMPAT intel_lw_uart
#include <zephyr/kerne... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> configuring
* UART Rx interrupt as a wakeup source. When the interrupt of UART
* Rx falling, EC will be woken.
*/
irq_connect_dynamic(config->irq, 0, it51xxx_uart_wui_isr, dev, 0);
return 0;
}
#define UART_ITE_IT51XXX_INIT(inst) \
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2021 ITE Corporation. All Rights Reserved.
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ite_it8xxx2_uart
#include <zephyr/device.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/kernel.h>
... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2018 - 2019 Antmicro <www.antmicro.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT litex_uart
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/init.h>
#include <zephyr/irq.h>
#include <zephyr/device.h>
#include <zephyr/drivers/uart.h>
#include <zeph... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2020, Seagate Technology LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_lpc11u6x_uart
#include <cmsis_core.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/irq.h>
#include "uart_lpc11u6x.h"
#if DT_NODE_HAS_S... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2020, Seagate Technology LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_SERIAL_UART_LPC11U6X_H_
#define ZEPHYR_DRIVERS_SERIAL_UART_LPC11U6X_H_
#include <zephyr/drivers/pinctrl.h>
#define LPC11U6X_UART0_CLK 14745600
#define LPC11U6X_UART0_LCR_WLS_5BITS 0
#def... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
IF_ENABLED(MAX32_UART_USE_IRQ, \
(static void uart_max32_irq_init_##_num(const struct device *dev) \
{ \
IRQ_CONNECT(DT_INST_IRQN(_num), DT_INST_IRQ(_num, priori... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (C) 2025-2026 Microchip Technology Inc. and its subsidiaries
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* @file uart_mchp_dbgu_g1.c
* @brief UART driver implementation for Microchip<|fim_suffix|>
{
const struct mchp_dbgu_dev_cfg *config = dev->config;
dbgu_registers_t *dbgu = (d... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2025-2026 Microchip Technology Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file uart_mchp_sercom_g1.c
* @brief UART driver implementation for Microchip devices.
*/
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <zephyr/sys/__assert.h>
#include <soc.h>
#... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> (iid == XEC_UART_IIR_INTID_RXTM)) {
ret = 1;
}
k_spin_unlock(&dev_data->lock, key);
return ret;
}
/* Enable error interrupt in IER
* params: dev UART device struct
*/
static void uart_xec_irq_err_enable(const struct device *dev)
{
const struct uart_xec_device_config *const dev_cfg = dev->confi... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2017, 2024 NXP
* Copyright (c) 2020 PHYTEC Messtechnik GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_kinetis_uart
#include <errno.h>
#include <zephyr/device.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/irq.... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright 2017, 2022-2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_lpc_usart
/** @file
* @brief UART driver for MCUX Flexcomm USART.
*/
#include <errno.h>
#include <zephyr/device.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>UX_IRQ_CFG_FUNC_INIT)
#endif
#define IUART_MCUX_DECLARE_CFG(n, IRQ_FUNC_INIT) \
static const struct mcux_iuart_config mcux_iuart_##n##_config = { \
DEVICE_MMIO_ROM_INIT(DT_DRV_INST(n)), \
.clock_dev = DEVICE_DT_GET(DT_INST_CLOCKS_CTLR(n)), \
.clock_subsys = (clock_control_subsys_t)DT_INST_CLOCKS... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017, NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_kinetis_lpsci
#include <errno.h>
#include <zephyr/device.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/pinctrl.h>
#include <fsl_lpsci.h>
#include... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright 2017,2021,2023-2026 NXP
* Copyright (c) 2020 Softube
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_lpuart
#define LPUART_ASYNC_ENABLE \
IS_ENABLED(CONFIG_UART_ASYNC_API) && IS_ENABLED(CONFIG_UART_NXP_LPUART_ASYNC_API_SUPPORT)
#include <errno.h>
#include <zephyr/device.h>
#... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>2_PARITY_EN_MASK 0x02
#define CTRL2_PARITY_EN_SHIFT 1
/* Odd/even parity configuration */
#define CTRL2_ODD_EVEN_OFFSET 0xC
#define CTRL2_ODD_EVEN_MASK 0x04
#define CTRL2_ODD_EVEN_SHIFT 2
/* Baud value higher 5 bits */
#define CTRL2_BAUDVALUE_OFFSET 0xC
#define CTRL2_BAUDVALUE... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2017, Linaro Ltd
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ti_msp432p4xx_uart
/* See www.ti.com/lit/pdf/slau356f, Chapter 22, for MSP432P4XX UART info. */
/* include driverlib/gpio.h (from the msp432p4xx SDK) before Z's uart.h so
* that the definition of B... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2025-2026 Texas Instruments
* Copyright (c) 2025 Linumiz
* Copyright (c) 2025 Bang & Olufsen A/S, Denmark
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT ti_mspm0_uart
/* Zephyr includes */
#include <zephyr/kernel.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2018, Oticon A/S
* Copyright (c) 2025, Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT zephyr_native_pty_uart
#include <stdbool.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/kernel.h>
#include <zephyr/sys/atomic.h>
#include <cmdline.h> /* native... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ill be used instead
*/
static void attach_to_pty(const char *slave_pty, const char *auto_attach_cmd)
{
char command[strlen(auto_attach_cmd) + strlen(slave_pty) + 1];
sprintf(command, auto_attach_cmd, slave_pty);
int ret = system(command);
if (ret != 0) {
WARN("Could not attach to the UART with \... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2023, Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*
* "Bottom" of native PTY UART driver
* When built with the native_simulator this will be built in the runner context,
* that is, with the host C library, and with the host include paths.
*/
#ifndef DRIVERS_SERIAL_UART_N... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
"set in the devicetree.", \
},
/**
* @brief Adds command line options for setting serial port and baud rate for each uart
* device.
*/
static void native_tty_add_serial_options(void)
{
static struct args_struct_t opts[] = {
DT_INST_FOREACH_STATUS_OKAY(NATIVE_TTY_COMMAND_LINE_OPTS... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/**
* @brief "Bottom" of native tty uart driver
*
* Copyright (c) 2023 Marko Sagadin
* SPDX-License-Identifier: Apache-2.0
*/
#include "uart_native_tty_bottom.h"
#include <errno.h>
#include <stdio.h>
#include <string.h>
#include <fcntl.h>
#include <poll.h>
#include <termios.h>
#include <unistd.h>
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>o the native tty driver.
*/
/**
* @brief Check for available input on tty file descriptor
*
* @param fd
*
* @retval 1 if data is available
* @retval 0 if data is not available
* @retval <0 on error
*/
int native_tty_poll_bottom(int fd);
/**
* @brief Opens tty port on the given pathname
*
* R... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ATA_RTX;
}
return count;
}
static void neorv32_uart_irq_tx_enable(const struct device *dev)
{
struct neorv32_uart_data *data = dev->data;
k_spinlock_key_t key;
uint32_t ctrl;
key = k_spin_lock(&data->lock);
ctrl = neorv32_uart_read_ctrl(dev);
ctrl |= NEORV32_UART_CTRL_IRQ_TX_EMPTY;
neorv32_ua... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>nvert), \
.rx_invert = DT_INST_PROP(i, rx_invert), \
)) \
NPCX_UART_IRQ_CONFIG_FUNC_INIT(i) \
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2016-2019 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @brief Driver for Nordic Semiconductor nRF5X UART
*/
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/pm/device.h>
#include <zephyr/irq.h>
#include <soc.h>
#i... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>CE_PCIE_INIT(n) \
UART_NS16550_PCIE_IRQ_FUNC_DECLARE(n); \
DEVICE_PCIE_INST_DECLARE(n); \
IF_ENABLED(CONFIG_PINCTRL, (PINCTRL_DT_INST_DEFINE(n))); \
sta... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2023 Nuvoton Technology Corporation.
*/
#define DT_DRV_COMPAT nuvoton_numaker_uart
#include <string.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/reset.h>
#include <zephyr/irq.h>
#include <zephyr/logging/log.h>
#include <zeph... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* SPDX-License-Identifier: Apache-2.0
*
* Copyright (c) 2020 Linumiz
* Author: Saravanan Sekar <saravanan@linumiz.com>
* Copyright (c) 2026 Fiona Behrens <me@kloenk.dev>
*/
#define DT_DRV_COMPAT nuvoton_numicro_uart
#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/reset.h>
#include <ze... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright 2022-2025 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT nxp_s32_linflexd
#include <soc.h>
#include <zephyr/irq.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/pinctrl.h>
#include <zephyr/drivers/clock_control.h>
#include <Linflexd_Uart_Ip.h>
#inclu... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>;
uart_irq_callback_user_data_t callback;
void *cb_data;
};
#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
extern Linflexd_Uart_Ip_StateStructureType
Linflexd_Uart_Ip_apStateStructure[LINFLEXD_UART_IP_NUMBER_OF_INSTANCES];
#endif /* ZEPHYR_DRIVERS_SERIAL_UART_S32_LINFLEXD_H_ */
<|fim_prefix|>/*
* Copyrigh... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 by Rivos Inc.
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/kernel.h>
#include <zephyr/arch/cpu.h>
#include <zephyr/drivers/uart.h>
#include <zephyr/irq.h>
/* Register offsets within the UART device register space. */
#define UART_INTR_STATE_REG_OFFSET 0x0
#defi... | fim | zephyrproject-rtos/zephyr | c |
/** @file
* @brief Pipe UART driver
*
* A pipe UART driver allowing application to handle all aspects of received
* protocol data.
*/
/*
* Copyright (c) 2015 Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(uart_pipe);
#include <zephyr/kernel.h... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>
COND_CODE_1(CONFIG_UART_INTERRUPT_DRIVEN, (DT_INST_NODE_HAS_PROP(n, interrupts)), (0))
#define PL011_DEVICE_API(n) \
COND_CODE_1(CONFIG_UART_INTERRUPT_DRIVEN, \
(COND_CODE_1(DT... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2023 Antmicro <www.antmicro.com>
* Copyright (c) 2025 Linumiz GmbH
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_SERIAL_UART_PL011_AMBIQ_H_
#define ZEPHYR_DRIVERS_SERIAL_UART_PL011_AMBIQ_H_
#include <zephyr/device.h>
#include <zephyr/kernel.h>
#include <zephyr... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>st struct device *dev, uint32_t clk)
{
return 0;
}
#endif /* ZEPHYR_DRIVERS_SERIAL_UART_PL011_RASPBERRYPI_PICO_H_ */
<|fim_prefix|>/*
* Copyright (c) 2024 TOKITA Hiroshi <tokita.hiroshi@gmail.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_SERIAL_UART_PL011_RASPBERRYPI_PICO_H... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018 Linaro Limited
* Copyright (c) 2022 Arm Limited (or its affiliates). All rights reserved.
* Copyright (c) 2023 Antmicro <www.antmicro.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_DRIVERS_SERIAL_UART_PL011_REGISTERS_H_
#define ZEPHYR_DRIVERS_SERIAL_UART_PL01... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2018 Cypress
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT cypress_psoc6_uart
/** @file
* @brief UART driver for Cypress PSOC 6 MCU family.
*
* Note:
* - Error handling is not implemented.
* - The driver works only in polling mode, interrupt mode is not implem... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2022 Antmicro <www.antmicro.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT quicklogic_usbserialport_s3b
#include <zephyr/kernel.h>
#include <zephyr/drivers/uart.h>
#include <eoss3_dev.h>
#include "uart_ql_usbserialport_s3b.h"
/*
* code is a modified versi... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>1 Room for at least 1 */
struct fpga_usbserial_regs {
uint32_t device_id;
uint32_t rev_num;
uint16_t scratch_reg;
uint16_t reserved1;
uint32_t clock_select;
uint32_t usbpid;
uint32_t reserved2[11];
unsigned u2m_fifo_flags : 4;
unsigned reserved3 : 28;
unsigned rdata : 8;
unsigned reserved4 : 2... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.fifo_fill = uart_rcar_fifo_fill,
.fifo_read = uart_rcar_fifo_read,
.irq_tx_enable = uart_rcar_irq_tx_enable,
.irq_tx_disable = uart_rcar_irq_tx_disable,
.irq_tx_ready = uart_rcar_irq_tx_ready,
.irq_rx_enable = uart_rcar_irq_rx_enable,
.irq_rx_disable = uart_rca... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
.state_entry = uart_rts5912_##n##_pm_entry, \
.state_exit = uart_rts5912_##n##_pm_exit, \
},
#else
#define UART_REALTEK_RTS5912_PM_HANDLES_DEFINE(n)
#define UART_REALTEK_RTS5912_PM_HANDLES_BIND(n)
#endif
#define UART_... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>PRV_IELS_ENUM(CONCAT(EVENT_SCI, channel, _RXI))
#define EVENT_SCI_TXI(channel) BSP_PRV_IELS_ENUM(CONCAT(EVENT_SCI, channel, _TXI))
#define EVENT_SCI_TEI(channel) BSP_PRV_IELS_ENUM(CONCAT(EVENT_SCI, channel, _TEI))
#define EVENT_SCI_ERI(channel) BSP_PRV_IELS_ENUM(CONCAT(EVENT_SCI, channel, _ERI))
#define ... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|> \
.operation_clock = RENESAS_RA_SAU_UART_OPERATION_CLOCK(idx), \
}, \
.fsp_extend_cfg = \
... | fim | zephyrproject-rtos/zephyr | c |
<|fim_suffix|>ct uart_ra_sci_data *data = dev->data;
const struct uart_ra_sci_config *cfg = dev->config;
#if CONFIG_UART_RA_SCI_UART_FIFO_ENABLE
if (data->sci.fifo_depth != 0) {
cfg->regs->SSR_FIFO &= (uint8_t) ~(SCI_UART_SSR_FIFO_DR_RDF);
} else
#endif
{
cfg->regs->SSR_b.RDRF = 0U;
}
cfg->regs->SCR_b.RIE = ... | fim | zephyrproject-rtos/zephyr | c |
/*
* Copyright (c) 2024-2025 Renesas Electronics Corporation
* Copyright (c) 2024-2025 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT renesas_rx_uart_sci
#include <zephyr/drivers/uart.h>
#include <zephyr/drivers/clock_control.h>
#include <zephyr/drivers/pinctrl.h... | fim | zephyrproject-rtos/zephyr | c |
<|fim_prefix|>/*
* Copyright (c) 2024 Renesas Electronics Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#define DT_DRV_COMPAT renesas_rx_uart_sci_qemu
#include <zephyr/drivers/uart.h>
#include <soc.h>
#include <zephyr/logging/log.h>
LOG_MODULE_REGISTER(renesas_rx_uart_sci_qemu, CONFIG_UART_LOG_LEVEL);
... | fim | zephyrproject-rtos/zephyr | c |
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