system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void combine_im_kernel(const float *A, const float *B, float *C, int numElements)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
/*
combines images for a joint histogram computation with the formula:
comb_im = B1*(im1 + im2*(B2-1))/(B1*B2 - 1)
for a joint histogram of 256: B1*B2 must ... | code for sm_80
Function : _Z17combine_im_kernelPKfS0_Pfi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void combine_im_kernel(const float *A, const float *B, float *C, int numElements)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
/*
combines images for a joint histogram computation with the formula:
comb_im = B1*(im1 + im2*(B2-1))/(B1*B2 - 1)
for a joint histogram of 256: B1*B2 must ... | .file "tmpxft_00052e3f_00000000-6_combine_im_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void combine_im_kernel(const float *A, const float *B, float *C, int numElements)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
/*
combines images for a joint histogram computation with the formula:
comb_im = B1*(im1 + im2*(B2-1))/(B1*B2 - 1)
for a joint histogram of 256: B1*B2 must ... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void combine_im_kernel(const float *A, const float *B, float *C, int numElements)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
/*
combines images for a joint histogram computation with the formula:
comb_im = B1*(im1 + im2*(B2-1))/(B1*B2 - 1)
for a joint ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void combine_im_kernel(const float *A, const float *B, float *C, int numElements)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
/*
combines images for a joint histogram computation with the formula:
comb_im = B1*(im1 + im2*(B2-1))/(B1*B2 - 1)
for a joint ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17combine_im_kernelPKfS0_Pfi
.globl _Z17combine_im_kernelPKfS0_Pfi
.p2align 8
.type _Z17combine_im_kernelPKfS0_Pfi,@function
_Z17combine_im_kernelPKfS0_Pfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void combine_im_kernel(const float *A, const float *B, float *C, int numElements)
{
int i = blockDim.x * blockIdx.x + threadIdx.x;
/*
combines images for a joint histogram computation with the formula:
comb_im = B1*(im1 + im2*(B2-1))/(B1*B2 - 1)
for a joint ... | .text
.file "combine_im_kernel.hip"
.globl _Z32__device_stub__combine_im_kernelPKfS0_Pfi # -- Begin function _Z32__device_stub__combine_im_kernelPKfS0_Pfi
.p2align 4, 0x90
.type _Z32__device_stub__combine_im_kernelPKfS0_Pfi,@function
_Z32__device_stub__combine_im_kernelPKfS0_Pfi: # @_Z32__device_stub__combine_im_kernel... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z17combine_im_kernelPKfS0_Pfi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17combine_im_kernelPKfS0_Pfi
.globl _Z17combine_im_kernelPKfS0_Pfi
.p2align 8
.type _Z17combine_im_kernelPKfS0_Pfi,@function
_Z17combine_im_kernelPKfS0_Pfi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
s_waitcnt lgkmcnt(0)
... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00052e3f_00000000-6_combine_im_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq... | .text
.file "combine_im_kernel.hip"
.globl _Z32__device_stub__combine_im_kernelPKfS0_Pfi # -- Begin function _Z32__device_stub__combine_im_kernelPKfS0_Pfi
.p2align 4, 0x90
.type _Z32__device_stub__combine_im_kernelPKfS0_Pfi,@function
_Z32__device_stub__combine_im_kernelPKfS0_Pfi: # @_Z32__device_stub__combine_im_kernel... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #define CONV_SOBEL_SIZE 3
#define CONV_GAUSSIAN_SIZE 5
__constant__ char SOBELX[CONV_SOBEL_SIZE*CONV_SOBEL_SIZE] = {-1,0,1,-2,0,2,-1,0,1};
__constant__ char SOBELY[CONV_SOBEL_SIZE*CONV_SOBEL_SIZE] = {1,2,1,0,0,0,-1,-2,-1};
__constant__ char GAUSSIAN[CONV_GAUSSIAN_SIZE*CONV_GAUSSIAN_SIZE] = {1,4,6,4,1,4,16,24,16,4,6,24,... | .file "tmpxft_000b696f_00000000-6_cudaKernels.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #define CONV_SOBEL_SIZE 3
#define CONV_GAUSSIAN_SIZE 5
__constant__ char SOBELX[CONV_SOBEL_SIZE*CONV_SOBEL_SIZE] = {-1,0,1,-2,0,2,-1,0,1};
__constant__ char SOBELY[CONV_SOBEL_SIZE*CONV_SOBEL_SIZE] = {1,2,1,0,0,0,-1,-2,-1};
__constant__ char GAUSSIAN[CONV_GAUSSIAN_SIZE*CONV_GAUSSIAN_SIZE] = {1,4,6,4,1,4,16,24,16,4,6,24,... | #include <hip/hip_runtime.h>
#define CONV_SOBEL_SIZE 3
#define CONV_GAUSSIAN_SIZE 5
__constant__ char SOBELX[CONV_SOBEL_SIZE*CONV_SOBEL_SIZE] = {-1,0,1,-2,0,2,-1,0,1};
__constant__ char SOBELY[CONV_SOBEL_SIZE*CONV_SOBEL_SIZE] = {1,2,1,0,0,0,-1,-2,-1};
__constant__ char GAUSSIAN[CONV_GAUSSIAN_SIZE*CONV_GAUSSIAN_SIZE] = ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#define CONV_SOBEL_SIZE 3
#define CONV_GAUSSIAN_SIZE 5
__constant__ char SOBELX[CONV_SOBEL_SIZE*CONV_SOBEL_SIZE] = {-1,0,1,-2,0,2,-1,0,1};
__constant__ char SOBELY[CONV_SOBEL_SIZE*CONV_SOBEL_SIZE] = {1,2,1,0,0,0,-1,-2,-1};
__constant__ char GAUSSIAN[CONV_GAUSSIAN_SIZE*CONV_GAUSSIAN_SIZE] = ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16rgb_to_grayscalePhS_iiii
.globl _Z16rgb_to_grayscalePhS_iiii
.p2align 8
.type _Z16rgb_to_grayscalePhS_iiii,@function
_Z16rgb_to_grayscalePhS_iiii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x2c
s_load_b64 s[2:3], s[0:1], 0x10
v_and_b32_e32 v2, 0x3ff... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#define CONV_SOBEL_SIZE 3
#define CONV_GAUSSIAN_SIZE 5
__constant__ char SOBELX[CONV_SOBEL_SIZE*CONV_SOBEL_SIZE] = {-1,0,1,-2,0,2,-1,0,1};
__constant__ char SOBELY[CONV_SOBEL_SIZE*CONV_SOBEL_SIZE] = {1,2,1,0,0,0,-1,-2,-1};
__constant__ char GAUSSIAN[CONV_GAUSSIAN_SIZE*CONV_GAUSSIAN_SIZE] = ... | .text
.file "cudaKernels.hip"
.globl _Z31__device_stub__rgb_to_grayscalePhS_iiii # -- Begin function _Z31__device_stub__rgb_to_grayscalePhS_iiii
.p2align 4, 0x90
.type _Z31__device_stub__rgb_to_grayscalePhS_iiii,@function
_Z31__device_stub__rgb_to_grayscalePhS_iiii: # @_Z31__device_stub__rgb_to_grayscalePhS_iiii
.cfi_s... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000b696f_00000000-6_cudaKernels.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2033:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... | .text
.file "cudaKernels.hip"
.globl _Z31__device_stub__rgb_to_grayscalePhS_iiii # -- Begin function _Z31__device_stub__rgb_to_grayscalePhS_iiii
.p2align 4, 0x90
.type _Z31__device_stub__rgb_to_grayscalePhS_iiii,@function
_Z31__device_stub__rgb_to_grayscalePhS_iiii: # @_Z31__device_stub__rgb_to_grayscalePhS_iiii
.cfi_s... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #define RED 0
#define GREEN 1
#define BLUE 2
void call_kernel(char * cuda_frame_in, int height, int width);
__global__ void kernel_grey(char * frame, int height, int width)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;
int red, green, blue;
for(; i<width * height; i+= ( gridDim.x * blockDim.x))
{
red = frame[i*3 + ... | code for sm_80
Function : _Z11kernel_greyPcii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #define RED 0
#define GREEN 1
#define BLUE 2
void call_kernel(char * cuda_frame_in, int height, int width);
__global__ void kernel_grey(char * frame, int height, int width)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;
int red, green, blue;
for(; i<width * height; i+= ( gridDim.x * blockDim.x))
{
red = frame[i*3 + ... | .file "tmpxft_000981b0_00000000-6_kernel_q2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #define RED 0
#define GREEN 1
#define BLUE 2
void call_kernel(char * cuda_frame_in, int height, int width);
__global__ void kernel_grey(char * frame, int height, int width)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;
int red, green, blue;
for(; i<width * height; i+= ( gridDim.x * blockDim.x))
{
red = frame[i*3 + ... | #include <hip/hip_runtime.h>
#define RED 0
#define GREEN 1
#define BLUE 2
void call_kernel(char * cuda_frame_in, int height, int width);
__global__ void kernel_grey(char * frame, int height, int width)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;
int red, green, blue;
for(; i<width * height; i+= ( gridDim.x * bloc... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#define RED 0
#define GREEN 1
#define BLUE 2
void call_kernel(char * cuda_frame_in, int height, int width);
__global__ void kernel_grey(char * frame, int height, int width)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;
int red, green, blue;
for(; i<width * height; i+= ( gridDim.x * bloc... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11kernel_greyPcii
.globl _Z11kernel_greyPcii
.p2align 8
.type _Z11kernel_greyPcii,@function
_Z11kernel_greyPcii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b64 s[6:7], s[0:1], 0x8
s_add_u32 s2, s0, 16
s_addc_u32 s3, s1, 0
s_mov... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#define RED 0
#define GREEN 1
#define BLUE 2
void call_kernel(char * cuda_frame_in, int height, int width);
__global__ void kernel_grey(char * frame, int height, int width)
{
int i = blockIdx.x * blockDim.x + threadIdx.x;
int red, green, blue;
for(; i<width * height; i+= ( gridDim.x * bloc... | .text
.file "kernel_q2.hip"
.globl _Z26__device_stub__kernel_greyPcii # -- Begin function _Z26__device_stub__kernel_greyPcii
.p2align 4, 0x90
.type _Z26__device_stub__kernel_greyPcii,@function
_Z26__device_stub__kernel_greyPcii: # @_Z26__device_stub__kernel_greyPcii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_c... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11kernel_greyPcii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e220... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11kernel_greyPcii
.globl _Z11kernel_greyPcii
.p2align 8
.type _Z11kernel_greyPcii,@function
_Z11kernel_greyPcii:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_load_b64 s[6:7], s[0:1], 0x8
s_add_u32 s2, s0, 16
s_addc_u32 s3, s1, 0
s_mov... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000981b0_00000000-6_kernel_q2.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... | .text
.file "kernel_q2.hip"
.globl _Z26__device_stub__kernel_greyPcii # -- Begin function _Z26__device_stub__kernel_greyPcii
.p2align 4, 0x90
.type _Z26__device_stub__kernel_greyPcii,@function
_Z26__device_stub__kernel_greyPcii: # @_Z26__device_stub__kernel_greyPcii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_c... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | //https://devblogs.nvidia.com/easy-introduction-cuda-c-and-c/
#include <stdio.h>
#include <cuda.h>
int main(void)
{
int runtimeVersion = -1;
cudaError_t error_id = cudaRuntimeGetVersion(&runtimeVersion);
printf("Runtime version %d; Cuda error: %x (%s)\n", runtimeVersion, error_id, cudaGetErrorString(error_id));
int dri... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | //https://devblogs.nvidia.com/easy-introduction-cuda-c-and-c/
#include <stdio.h>
#include <cuda.h>
int main(void)
{
int runtimeVersion = -1;
cudaError_t error_id = cudaRuntimeGetVersion(&runtimeVersion);
printf("Runtime version %d; Cuda error: %x (%s)\n", runtimeVersion, error_id, cudaGetErrorString(error_id));
int dri... | .file "tmpxft_000a2802_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //https://devblogs.nvidia.com/easy-introduction-cuda-c-and-c/
#include <stdio.h>
#include <cuda.h>
int main(void)
{
int runtimeVersion = -1;
cudaError_t error_id = cudaRuntimeGetVersion(&runtimeVersion);
printf("Runtime version %d; Cuda error: %x (%s)\n", runtimeVersion, error_id, cudaGetErrorString(error_id));
int dri... | //https://devblogs.nvidia.com/easy-introduction-cuda-c-and-c/
#include <stdio.h>
#include <hip/hip_runtime.h>
int main(void)
{
int runtimeVersion = -1;
hipError_t error_id = hipRuntimeGetVersion(&runtimeVersion);
printf("Runtime version %d; Cuda error: %x (%s)\n", runtimeVersion, error_id, hipGetErrorString(error_id));... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | //https://devblogs.nvidia.com/easy-introduction-cuda-c-and-c/
#include <stdio.h>
#include <hip/hip_runtime.h>
int main(void)
{
int runtimeVersion = -1;
hipError_t error_id = hipRuntimeGetVersion(&runtimeVersion);
printf("Runtime version %d; Cuda error: %x (%s)\n", runtimeVersion, error_id, hipGetErrorString(error_id));... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | //https://devblogs.nvidia.com/easy-introduction-cuda-c-and-c/
#include <stdio.h>
#include <hip/hip_runtime.h>
int main(void)
{
int runtimeVersion = -1;
hipError_t error_id = hipRuntimeGetVersion(&runtimeVersion);
printf("Runtime version %d; Cuda error: %x (%s)\n", runtimeVersion, error_id, hipGetErrorString(error_id));... | .text
.file "main.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $24, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx,... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000a2802_00000000-6_main.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... | .text
.file "main.hip"
.globl main # -- Begin function main
.p2align 4, 0x90
.type main,@function
main: # @main
.cfi_startproc
# %bb.0:
pushq %rbp
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $24, %rsp
.cfi_def_cfa_offset 48
.cfi_offset %rbx,... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
#define PI 3.1415926535897932
#define MAXEQNS 10 // maximum number of differential equations in the system
const int itermax10 = 2; // number of iterations to use for rk10
const int itermax12 = 1; // number of additional iterations to use for rk12
const int neqns = 2; // number of differential equ... | code for sm_80
Function : _Z11guessKernelPdS_S_d
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 */
/*0... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
#define PI 3.1415926535897932
#define MAXEQNS 10 // maximum number of differential equations in the system
const int itermax10 = 2; // number of iterations to use for rk10
const int itermax12 = 1; // number of additional iterations to use for rk12
const int neqns = 2; // number of differential equ... | .file "tmpxft_0012ed2f_00000000-6_guessKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
#define PI 3.1415926535897932
#define MAXEQNS 10 // maximum number of differential equations in the system
const int itermax10 = 2; // number of iterations to use for rk10
const int itermax12 = 1; // number of additional iterations to use for rk12
const int neqns = 2; // number of differential equ... | #include <hip/hip_runtime.h>
#include "includes.h"
#define PI 3.1415926535897932
#define MAXEQNS 10 // maximum number of differential equations in the system
const int itermax10 = 2; // number of iterations to use for rk10
const int itermax12 = 1; // number of additional iterations to use for rk12
const int neqns = 2; ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
#define PI 3.1415926535897932
#define MAXEQNS 10 // maximum number of differential equations in the system
const int itermax10 = 2; // number of iterations to use for rk10
const int itermax12 = 1; // number of additional iterations to use for rk12
const int neqns = 2; ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11guessKernelPdS_S_d
.globl _Z11guessKernelPdS_S_d
.p2align 8
.type _Z11guessKernelPdS_S_d,@function
_Z11guessKernelPdS_S_d:
s_load_b256 s[0:7], s[0:1], 0x0
v_lshlrev_b32_e32 v6, 3, v0
s_getpc_b64 s[8:9]
s_add_u32 s8, s8, a1@rel32@lo+4
s_... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z11guessKernelPdS_S_d
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e220000002100 */
/*0... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11guessKernelPdS_S_d
.globl _Z11guessKernelPdS_S_d
.p2align 8
.type _Z11guessKernelPdS_S_d,@function
_Z11guessKernelPdS_S_d:
s_load_b256 s[0:7], s[0:1], 0x0
v_lshlrev_b32_e32 v6, 3, v0
s_getpc_b64 s[8:9]
s_add_u32 s8, s8, a1@rel32@lo+4
s_... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<stdio.h>
#include<cuda.h>
__global__ void HeatEq(float* d_a, float* d_b, double s)
{
int i = threadIdx.x;
d_b[i+1] = d_a[i+1]+s*(d_a[i+2]+d_a[i]-2*d_a[i+1]);
}
int main(int argc, char** argv)
{
const int n = 16;
const int BYTES = n * sizeof(float);
float h_a[n];
float h_b[n];
double s = 0.25;
for (int i=0; i <... | code for sm_80
Function : _Z6HeatEqPfS_d
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e220000002100 */
/*0020*/ HF... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<stdio.h>
#include<cuda.h>
__global__ void HeatEq(float* d_a, float* d_b, double s)
{
int i = threadIdx.x;
d_b[i+1] = d_a[i+1]+s*(d_a[i+2]+d_a[i]-2*d_a[i+1]);
}
int main(int argc, char** argv)
{
const int n = 16;
const int BYTES = n * sizeof(float);
float h_a[n];
float h_b[n];
double s = 0.25;
for (int i=0; i <... | .file "tmpxft_00070340_00000000-6_onedimheateq.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<stdio.h>
#include<cuda.h>
__global__ void HeatEq(float* d_a, float* d_b, double s)
{
int i = threadIdx.x;
d_b[i+1] = d_a[i+1]+s*(d_a[i+2]+d_a[i]-2*d_a[i+1]);
}
int main(int argc, char** argv)
{
const int n = 16;
const int BYTES = n * sizeof(float);
float h_a[n];
float h_b[n];
double s = 0.25;
for (int i=0; i <... | #include<stdio.h>
#include<hip/hip_runtime.h>
__global__ void HeatEq(float* d_a, float* d_b, double s)
{
int i = threadIdx.x;
d_b[i+1] = d_a[i+1]+s*(d_a[i+2]+d_a[i]-2*d_a[i+1]);
}
int main(int argc, char** argv)
{
const int n = 16;
const int BYTES = n * sizeof(float);
float h_a[n];
float h_b[n];
double s = 0.25;
for (i... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include<stdio.h>
#include<hip/hip_runtime.h>
__global__ void HeatEq(float* d_a, float* d_b, double s)
{
int i = threadIdx.x;
d_b[i+1] = d_a[i+1]+s*(d_a[i+2]+d_a[i]-2*d_a[i+1]);
}
int main(int argc, char** argv)
{
const int n = 16;
const int BYTES = n * sizeof(float);
float h_a[n];
float h_b[n];
double s = 0.25;
for (i... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6HeatEqPfS_d
.globl _Z6HeatEqPfS_d
.p2align 8
.type _Z6HeatEqPfS_d,@function
_Z6HeatEqPfS_d:
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1)
v_add... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include<stdio.h>
#include<hip/hip_runtime.h>
__global__ void HeatEq(float* d_a, float* d_b, double s)
{
int i = threadIdx.x;
d_b[i+1] = d_a[i+1]+s*(d_a[i+2]+d_a[i]-2*d_a[i+1]);
}
int main(int argc, char** argv)
{
const int n = 16;
const int BYTES = n * sizeof(float);
float h_a[n];
float h_b[n];
double s = 0.25;
for (i... | .text
.file "onedimheateq.hip"
.globl _Z21__device_stub__HeatEqPfS_d # -- Begin function _Z21__device_stub__HeatEqPfS_d
.p2align 4, 0x90
.type _Z21__device_stub__HeatEqPfS_d,@function
_Z21__device_stub__HeatEqPfS_d: # @_Z21__device_stub__HeatEqPfS_d
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 1... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6HeatEqPfS_d
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R9, SR_TID.X ; /* 0x0000000000097919 */
/* 0x000e220000002100 */
/*0020*/ HF... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6HeatEqPfS_d
.globl _Z6HeatEqPfS_d
.p2align 8
.type _Z6HeatEqPfS_d,@function
_Z6HeatEqPfS_d:
s_load_b128 s[4:7], s[0:1], 0x0
v_lshlrev_b32_e32 v0, 2, v0
s_load_b64 s[0:1], s[0:1], 0x10
s_delay_alu instid0(VALU_DEP_1)
v_add... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00070340_00000000-6_onedimheateq.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... | .text
.file "onedimheateq.hip"
.globl _Z21__device_stub__HeatEqPfS_d # -- Begin function _Z21__device_stub__HeatEqPfS_d
.p2align 4, 0x90
.type _Z21__device_stub__HeatEqPfS_d,@function
_Z21__device_stub__HeatEqPfS_d: # @_Z21__device_stub__HeatEqPfS_d
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 1... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <curand_kernel.h>
__device__ float generate(
curandState * globalState,
int idx )
{
idx = threadIdx.x + blockIdx.x * blockDim.x;
curandState localState = globalState[ idx ];
float RANDOM = curand_uniform( &localState );
globalState[ idx ] = localState;
return RANDOM;
}
__global__ void setup_kernel(
curandSta... | .file "tmpxft_000c150c_00000000-6_kernels_heat2D.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2244:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <curand_kernel.h>
__device__ float generate(
curandState * globalState,
int idx )
{
idx = threadIdx.x + blockIdx.x * blockDim.x;
curandState localState = globalState[ idx ];
float RANDOM = curand_uniform( &localState );
globalState[ idx ] = localState;
return RANDOM;
}
__global__ void setup_kernel(
curandSta... | #include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>
__device__ float generate(
hiprandState * globalState,
int idx )
{
idx = threadIdx.x + blockIdx.x * blockDim.x;
hiprandState localState = globalState[ idx ];
float RANDOM = hiprand_uniform( &localState );
globalState[ idx ] = localState;
return RANDOM;
}... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <hiprand/hiprand_kernel.h>
__device__ float generate(
hiprandState * globalState,
int idx )
{
idx = threadIdx.x + blockIdx.x * blockDim.x;
hiprandState localState = globalState[ idx ];
float RANDOM = hiprand_uniform( &localState );
globalState[ idx ] = localState;
return RANDOM;
}... | .text
.file "kernels_heat2D.hip"
.globl _Z27__device_stub__setup_kernelP12hiprandStatem # -- Begin function _Z27__device_stub__setup_kernelP12hiprandStatem
.p2align 4, 0x90
.type _Z27__device_stub__setup_kernelP12hiprandStatem,@function
_Z27__device_stub__setup_kernelP12hiprandStatem: # @_Z27__device_stub__setup_kernel... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000c150c_00000000-6_kernels_heat2D.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2244:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8... | .text
.file "kernels_heat2D.hip"
.globl _Z27__device_stub__setup_kernelP12hiprandStatem # -- Begin function _Z27__device_stub__setup_kernelP12hiprandStatem
.p2align 4, 0x90
.type _Z27__device_stub__setup_kernelP12hiprandStatem,@function
_Z27__device_stub__setup_kernelP12hiprandStatem: # @_Z27__device_stub__setup_kernel... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <iostream>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <cuda_runtime_api.h>
//Copied from NVidia
__device__ void sum_reduction(int *data, int *out) {
unsigned int id = threadIdx.x;
for (unsigned int s=blockDim.x/2; s>0; s>>=1) {
if (id < s) {
data[id] += data[id ... | .file "tmpxft_0019a28a_00000000-6_utils.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3678:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnre... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <iostream>
#include <stdlib.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <cuda_runtime_api.h>
//Copied from NVidia
__device__ void sum_reduction(int *data, int *out) {
unsigned int id = threadIdx.x;
for (unsigned int s=blockDim.x/2; s>0; s>>=1) {
if (id < s) {
data[id] += data[id ... | #include <stdio.h>
#include <iostream>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
//Copied from NVidia
__device__ void sum_reduction(int *data, int *out) {
unsigned int id = threadIdx.x;
for (unsigned int s=blockDim.x/2; s>0; s>>=1) {
if (id < s) {
data[id] += data[id + s];
}
__sy... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <iostream>
#include <stdlib.h>
#include <hip/hip_runtime.h>
#include <hip/hip_runtime_api.h>
//Copied from NVidia
__device__ void sum_reduction(int *data, int *out) {
unsigned int id = threadIdx.x;
for (unsigned int s=blockDim.x/2; s>0; s>>=1) {
if (id < s) {
data[id] += data[id + s];
}
__sy... | .text
.file "utils.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z26__device_stub__test_kernelPiPs # -- Begin function _Z26__device_stub__test_kernelPiPs
.p2align 4,... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0019a28a_00000000-6_utils.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3678:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnre... | .text
.file "utils.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z26__device_stub__test_kernelPiPs # -- Begin function _Z26__device_stub__test_kernelPiPs
.p2align 4,... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "stdio.h"
#include <cuda_runtime.h>
bool InitCuda(void)
{
// Get cuda device count
int iCount;
cudaGetDeviceCount(&iCount);
if(0 == iCount)
{
printf("There is no cuda device\n");
return false;
}
// Find the first suitable device
int i;
for (i = 0; i < iCount; i++)
{
cudaDeviceProp prop;
if(cudaGetDeviceProper... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "stdio.h"
#include <cuda_runtime.h>
bool InitCuda(void)
{
// Get cuda device count
int iCount;
cudaGetDeviceCount(&iCount);
if(0 == iCount)
{
printf("There is no cuda device\n");
return false;
}
// Find the first suitable device
int i;
for (i = 0; i < iCount; i++)
{
cudaDeviceProp prop;
if(cudaGetDeviceProper... | .file "tmpxft_00063971_00000000-6_InitCuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "stdio.h"
#include <cuda_runtime.h>
bool InitCuda(void)
{
// Get cuda device count
int iCount;
cudaGetDeviceCount(&iCount);
if(0 == iCount)
{
printf("There is no cuda device\n");
return false;
}
// Find the first suitable device
int i;
for (i = 0; i < iCount; i++)
{
cudaDeviceProp prop;
if(cudaGetDeviceProper... | #include "stdio.h"
#include <hip/hip_runtime.h>
bool InitCuda(void)
{
// Get cuda device count
int iCount;
hipGetDeviceCount(&iCount);
if(0 == iCount)
{
printf("There is no cuda device\n");
return false;
}
// Find the first suitable device
int i;
for (i = 0; i < iCount; i++)
{
hipDeviceProp_t prop;
if(hipGetDeviceProp... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "stdio.h"
#include <hip/hip_runtime.h>
bool InitCuda(void)
{
// Get cuda device count
int iCount;
hipGetDeviceCount(&iCount);
if(0 == iCount)
{
printf("There is no cuda device\n");
return false;
}
// Find the first suitable device
int i;
for (i = 0; i < iCount; i++)
{
hipDeviceProp_t prop;
if(hipGetDeviceProp... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "stdio.h"
#include <hip/hip_runtime.h>
bool InitCuda(void)
{
// Get cuda device count
int iCount;
hipGetDeviceCount(&iCount);
if(0 == iCount)
{
printf("There is no cuda device\n");
return false;
}
// Find the first suitable device
int i;
for (i = 0; i < iCount; i++)
{
hipDeviceProp_t prop;
if(hipGetDeviceProp... | .text
.file "InitCuda.hip"
.globl _Z8InitCudav # -- Begin function _Z8InitCudav
.p2align 4, 0x90
.type _Z8InitCudav,@function
_Z8InitCudav: # @_Z8InitCudav
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $1480, %rsp ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00063971_00000000-6_InitCuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "InitCuda.hip"
.globl _Z8InitCudav # -- Begin function _Z8InitCudav
.p2align 4, 0x90
.type _Z8InitCudav,@function
_Z8InitCudav: # @_Z8InitCudav
.cfi_startproc
# %bb.0:
pushq %r14
.cfi_def_cfa_offset 16
pushq %rbx
.cfi_def_cfa_offset 24
subq $1480, %rsp ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include<stdio.h>
#include<cuda.h>
#include<math.h>
#define imin(a,b) (a<b?a:b)
const int N = 33 * 1024;
const int threadsPerBlock =256;
const int blocksPerGrid =
imin( 32, (N+threadsPerBlock-1) /threadsPerBlock );
__global__ void dot( float *a, float *b, float *c){
__shared__ float cache[threadsPerBlock];
int tid = th... | code for sm_80
Function : _Z3dotPfS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R7, SR_CTAID.X ; /* 0x0000000000077919 */
/* 0x000e2200000025... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include<stdio.h>
#include<cuda.h>
#include<math.h>
#define imin(a,b) (a<b?a:b)
const int N = 33 * 1024;
const int threadsPerBlock =256;
const int blocksPerGrid =
imin( 32, (N+threadsPerBlock-1) /threadsPerBlock );
__global__ void dot( float *a, float *b, float *c){
__shared__ float cache[threadsPerBlock];
int tid = th... | .file "tmpxft_00097be7_00000000-6_page85_vector-dot-product.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include<stdio.h>
#include<cuda.h>
#include<math.h>
#define imin(a,b) (a<b?a:b)
const int N = 33 * 1024;
const int threadsPerBlock =256;
const int blocksPerGrid =
imin( 32, (N+threadsPerBlock-1) /threadsPerBlock );
__global__ void dot( float *a, float *b, float *c){
__shared__ float cache[threadsPerBlock];
int tid = th... | #include<stdio.h>
#include<hip/hip_runtime.h>
#include<math.h>
#define imin(a,b) (a<b?a:b)
const int N = 33 * 1024;
const int threadsPerBlock =256;
const int blocksPerGrid =
imin( 32, (N+threadsPerBlock-1) /threadsPerBlock );
__global__ void dot( float *a, float *b, float *c){
__shared__ float cache[threadsPerBlock];
i... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include<stdio.h>
#include<hip/hip_runtime.h>
#include<math.h>
#define imin(a,b) (a<b?a:b)
const int N = 33 * 1024;
const int threadsPerBlock =256;
const int blocksPerGrid =
imin( 32, (N+threadsPerBlock-1) /threadsPerBlock );
__global__ void dot( float *a, float *b, float *c){
__shared__ float cache[threadsPerBlock];
i... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3dotPfS_S_
.globl _Z3dotPfS_S_
.p2align 8
.type _Z3dotPfS_S_,@function
_Z3dotPfS_S_:
s_load_b32 s3, s[0:1], 0x24
s_add_u32 s4, s0, 24
s_mov_b32 s2, s15
s_addc_u32 s5, s1, 0
v_mov_b32_e32 v3, 0
s_mov_b32 s8, exec_lo
s_w... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include<stdio.h>
#include<hip/hip_runtime.h>
#include<math.h>
#define imin(a,b) (a<b?a:b)
const int N = 33 * 1024;
const int threadsPerBlock =256;
const int blocksPerGrid =
imin( 32, (N+threadsPerBlock-1) /threadsPerBlock );
__global__ void dot( float *a, float *b, float *c){
__shared__ float cache[threadsPerBlock];
i... | .text
.file "page85_vector-dot-product.hip"
.globl _Z18__device_stub__dotPfS_S_ # -- Begin function _Z18__device_stub__dotPfS_S_
.p2align 4, 0x90
.type _Z18__device_stub__dotPfS_S_,@function
_Z18__device_stub__dotPfS_S_: # @_Z18__device_stub__dotPfS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_o... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3dotPfS_S_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R7, SR_CTAID.X ; /* 0x0000000000077919 */
/* 0x000e2200000025... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3dotPfS_S_
.globl _Z3dotPfS_S_
.p2align 8
.type _Z3dotPfS_S_,@function
_Z3dotPfS_S_:
s_load_b32 s3, s[0:1], 0x24
s_add_u32 s4, s0, 24
s_mov_b32 s2, s15
s_addc_u32 s5, s1, 0
v_mov_b32_e32 v3, 0
s_mov_b32 s8, exec_lo
s_w... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00097be7_00000000-6_page85_vector-dot-product.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@... | .text
.file "page85_vector-dot-product.hip"
.globl _Z18__device_stub__dotPfS_S_ # -- Begin function _Z18__device_stub__dotPfS_S_
.p2align 4, 0x90
.type _Z18__device_stub__dotPfS_S_,@function
_Z18__device_stub__dotPfS_S_: # @_Z18__device_stub__dotPfS_S_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_o... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // matrix vector multiplecation
#include <chrono>
#include <cstdlib>
#include <iostream>
#include <vector>
using namespace std::chrono;
#define NUM_THREADS_PERBLOCK 128
// the macro to check the cudaAPI return code
#define cudaCheck(error) \
if (error != cudaSuccess) { \
printf("Fatal error: %s at %s:%d\n", cudaGetErro... | code for sm_80
Function : _Z6MVfuncPfS_S_mm
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e22000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // matrix vector multiplecation
#include <chrono>
#include <cstdlib>
#include <iostream>
#include <vector>
using namespace std::chrono;
#define NUM_THREADS_PERBLOCK 128
// the macro to check the cudaAPI return code
#define cudaCheck(error) \
if (error != cudaSuccess) { \
printf("Fatal error: %s at %s:%d\n", cudaGetErro... | .file "tmpxft_0018212a_00000000-6_main_warp.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB4158:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cuda... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // matrix vector multiplecation
#include <chrono>
#include <cstdlib>
#include <iostream>
#include <vector>
using namespace std::chrono;
#define NUM_THREADS_PERBLOCK 128
// the macro to check the cudaAPI return code
#define cudaCheck(error) \
if (error != cudaSuccess) { \
printf("Fatal error: %s at %s:%d\n", cudaGetErro... | // matrix vector multiplecation
#include <hip/hip_runtime.h>
#include <chrono>
#include <cstdlib>
#include <iostream>
#include <vector>
using namespace std::chrono;
#define NUM_THREADS_PERBLOCK 128
// the macro to check the cudaAPI return code
#define cudaCheck(error) \
if (error != hipSuccess) { \
printf("Fatal error:... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // matrix vector multiplecation
#include <hip/hip_runtime.h>
#include <chrono>
#include <cstdlib>
#include <iostream>
#include <vector>
using namespace std::chrono;
#define NUM_THREADS_PERBLOCK 128
// the macro to check the cudaAPI return code
#define cudaCheck(error) \
if (error != hipSuccess) { \
printf("Fatal error:... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6MVfuncPfS_S_mm
.globl _Z6MVfuncPfS_S_mm
.p2align 8
.type _Z6MVfuncPfS_S_mm,@function
_Z6MVfuncPfS_S_mm:
s_clause 0x3
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b32 s12, s[0:1], 0x34
s_load_b64 s[2:3], s[0:1], 0x20
s_load_b32 s0, s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // matrix vector multiplecation
#include <hip/hip_runtime.h>
#include <chrono>
#include <cstdlib>
#include <iostream>
#include <vector>
using namespace std::chrono;
#define NUM_THREADS_PERBLOCK 128
// the macro to check the cudaAPI return code
#define cudaCheck(error) \
if (error != hipSuccess) { \
printf("Fatal error:... | .text
.file "main_warp.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z21__device_stub__MVfuncPfS_S_mm # -- Begin function _Z21__device_stub__MVfuncPfS_S_mm
.p2align ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z6MVfuncPfS_S_mm
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e22000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6MVfuncPfS_S_mm
.globl _Z6MVfuncPfS_S_mm
.p2align 8
.type _Z6MVfuncPfS_S_mm,@function
_Z6MVfuncPfS_S_mm:
s_clause 0x3
s_load_b256 s[4:11], s[0:1], 0x0
s_load_b32 s12, s[0:1], 0x34
s_load_b64 s[2:3], s[0:1], 0x20
s_load_b32 s0, s... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
using namespace std;
#define BLOCKSIZE 32
//test code
__global__ void nmfw(float *a, int r, int c, int k, float *w, float *h, float *wcp)//must be block synchronized!!!
{
int row = blockIdx.y*blockDim.y + threadIdx.y;
int col = blockIdx.x*blockDim.x + threadIdx.x;
//compute W
if (col < k && row < ... | .file "tmpxft_0004c1a4_00000000-6_nmfw.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
using namespace std;
#define BLOCKSIZE 32
//test code
__global__ void nmfw(float *a, int r, int c, int k, float *w, float *h, float *wcp)//must be block synchronized!!!
{
int row = blockIdx.y*blockDim.y + threadIdx.y;
int col = blockIdx.x*blockDim.x + threadIdx.x;
//compute W
if (col < k && row < ... | #include <hip/hip_runtime.h>
#include "includes.h"
using namespace std;
#define BLOCKSIZE 32
//test code
__global__ void nmfw(float *a, int r, int c, int k, float *w, float *h, float *wcp)//must be block synchronized!!!
{
int row = blockIdx.y*blockDim.y + threadIdx.y;
int col = blockIdx.x*blockDim.x + threadIdx.x;
//co... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
using namespace std;
#define BLOCKSIZE 32
//test code
__global__ void nmfw(float *a, int r, int c, int k, float *w, float *h, float *wcp)//must be block synchronized!!!
{
int row = blockIdx.y*blockDim.y + threadIdx.y;
int col = blockIdx.x*blockDim.x + threadIdx.x;
//co... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4nmfwPfiiiS_S_S_
.globl _Z4nmfwPfiiiS_S_S_
.p2align 8
.type _Z4nmfwPfiiiS_S_S_,@function
_Z4nmfwPfiiiS_S_S_:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x3c
s_load_b32 s6, s[0:1], 0x10
s_load_b32 s3, s[0:1], 0x8
v_and_b32_e32 v1, 0x3ff, ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
using namespace std;
#define BLOCKSIZE 32
//test code
__global__ void nmfw(float *a, int r, int c, int k, float *w, float *h, float *wcp)//must be block synchronized!!!
{
int row = blockIdx.y*blockDim.y + threadIdx.y;
int col = blockIdx.x*blockDim.x + threadIdx.x;
//co... | .text
.file "nmfw.hip"
.globl _Z19__device_stub__nmfwPfiiiS_S_S_ # -- Begin function _Z19__device_stub__nmfwPfiiiS_S_S_
.p2align 4, 0x90
.type _Z19__device_stub__nmfwPfiiiS_S_S_,@function
_Z19__device_stub__nmfwPfiiiS_S_S_: # @_Z19__device_stub__nmfwPfiiiS_S_S_
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_o... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0004c1a4_00000000-6_nmfw.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... | .text
.file "nmfw.hip"
.globl _Z19__device_stub__nmfwPfiiiS_S_S_ # -- Begin function _Z19__device_stub__nmfwPfiiiS_S_S_
.p2align 4, 0x90
.type _Z19__device_stub__nmfwPfiiiS_S_S_,@function
_Z19__device_stub__nmfwPfiiiS_S_S_: # @_Z19__device_stub__nmfwPfiiiS_S_S_
.cfi_startproc
# %bb.0:
subq $152, %rsp
.cfi_def_cfa_o... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // MyCudafy.CudafyFilter
extern "C" __global__ void SelectNhBytes( unsigned char* color, int colorLen0, unsigned char* bytes, int bytesLen0, int index, int itemSize, int itemsCount, int width, int height, int n, int nh);
// MyCudafy.CudafyFilter
extern "C" __global__ void SelectColorBytes( unsigned char* bytes, int byt... | .file "tmpxft_000be6d4_00000000-6_CUDAFYSOURCETEMP.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // MyCudafy.CudafyFilter
extern "C" __global__ void SelectNhBytes( unsigned char* color, int colorLen0, unsigned char* bytes, int bytesLen0, int index, int itemSize, int itemsCount, int width, int height, int n, int nh);
// MyCudafy.CudafyFilter
extern "C" __global__ void SelectColorBytes( unsigned char* bytes, int byt... | #include <hip/hip_runtime.h>
// MyCudafy.CudafyFilter
extern "C" __global__ void SelectNhBytes( unsigned char* color, int colorLen0, unsigned char* bytes, int bytesLen0, int index, int itemSize, int itemsCount, int width, int height, int n, int nh);
// MyCudafy.CudafyFilter
extern "C" __global__ void SelectColorBytes( ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
// MyCudafy.CudafyFilter
extern "C" __global__ void SelectNhBytes( unsigned char* color, int colorLen0, unsigned char* bytes, int bytesLen0, int index, int itemSize, int itemsCount, int width, int height, int n, int nh);
// MyCudafy.CudafyFilter
extern "C" __global__ void SelectColorBytes( ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected SelectNhBytes
.globl SelectNhBytes
.p2align 8
.type SelectNhBytes,@function
SelectNhBytes:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x44
s_load_b32 s6, s[0:1], 0x24
s_add_u32 s2, s0, 56
s_addc_u32 s3, s1, 0
s_waitcnt lgkmcnt(0)... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
// MyCudafy.CudafyFilter
extern "C" __global__ void SelectNhBytes( unsigned char* color, int colorLen0, unsigned char* bytes, int bytesLen0, int index, int itemSize, int itemsCount, int width, int height, int n, int nh);
// MyCudafy.CudafyFilter
extern "C" __global__ void SelectColorBytes( ... | .text
.file "CUDAFYSOURCETEMP.hip"
.globl __device_stub__SelectNhBytes # -- Begin function __device_stub__SelectNhBytes
.p2align 4, 0x90
.type __device_stub__SelectNhBytes,@function
__device_stub__SelectNhBytes: # @__device_stub__SelectNhBytes
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000be6d4_00000000-6_CUDAFYSOURCETEMP.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq ... | .text
.file "CUDAFYSOURCETEMP.hip"
.globl __device_stub__SelectNhBytes # -- Begin function __device_stub__SelectNhBytes
.p2align 4, 0x90
.type __device_stub__SelectNhBytes,@function
__device_stub__SelectNhBytes: # @__device_stub__SelectNhBytes
.cfi_startproc
# %bb.0:
subq $168, %rsp
.cfi_def_cfa_offset 176... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #define BLOCK_WIDTH 32
#define BLOCK_HEIGHT 32
#define TILE_WIDTH 30
#define TILE_HEIGHT 30
#define NODATA -9999
#define FILTER_RADIUS 1
// -------------------------------------------------Neighbours access order is // 1 2 3
__constant__ int off_x[8] = {-1, 0, 1,1,1,0,-1,-1}; // 8 4
__constant__ int off_y[8] = {-1,-1,-... | code for sm_80
Function : _Z12kernel_sobelPsPfii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R5, SR_TID.X ; /* 0x0000000000057919 */
/* 0x000e22... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #define BLOCK_WIDTH 32
#define BLOCK_HEIGHT 32
#define TILE_WIDTH 30
#define TILE_HEIGHT 30
#define NODATA -9999
#define FILTER_RADIUS 1
// -------------------------------------------------Neighbours access order is // 1 2 3
__constant__ int off_x[8] = {-1, 0, 1,1,1,0,-1,-1}; // 8 4
__constant__ int off_y[8] = {-1,-1,-... | .file "tmpxft_000fc6b8_00000000-6_kernel_dip.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #define BLOCK_WIDTH 32
#define BLOCK_HEIGHT 32
#define TILE_WIDTH 30
#define TILE_HEIGHT 30
#define NODATA -9999
#define FILTER_RADIUS 1
// -------------------------------------------------Neighbours access order is // 1 2 3
__constant__ int off_x[8] = {-1, 0, 1,1,1,0,-1,-1}; // 8 4
__constant__ int off_y[8] = {-1,-1,-... | #include <hip/hip_runtime.h>
#define BLOCK_WIDTH 32
#define BLOCK_HEIGHT 32
#define TILE_WIDTH 30
#define TILE_HEIGHT 30
#define NODATA -9999
#define FILTER_RADIUS 1
// -------------------------------------------------Neighbours access order is // 1 2 3
__constant__ int off_x[8] = {-1, 0, 1,1,1,0,-1,-1}; // 8 4
__const... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#define BLOCK_WIDTH 32
#define BLOCK_HEIGHT 32
#define TILE_WIDTH 30
#define TILE_HEIGHT 30
#define NODATA -9999
#define FILTER_RADIUS 1
// -------------------------------------------------Neighbours access order is // 1 2 3
__constant__ int off_x[8] = {-1, 0, 1,1,1,0,-1,-1}; // 8 4
__const... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11kernel_ndviPsS_S_ii
.globl _Z11kernel_ndviPsS_S_ii
.p2align 8
.type _Z11kernel_ndviPsS_S_ii,@function
_Z11kernel_ndviPsS_S_ii:
s_clause 0x1
s_load_b64 s[2:3], s[0:1], 0x18
s_load_b128 s[4:7], s[0:1], 0x0
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#define BLOCK_WIDTH 32
#define BLOCK_HEIGHT 32
#define TILE_WIDTH 30
#define TILE_HEIGHT 30
#define NODATA -9999
#define FILTER_RADIUS 1
// -------------------------------------------------Neighbours access order is // 1 2 3
__constant__ int off_x[8] = {-1, 0, 1,1,1,0,-1,-1}; // 8 4
__const... | .text
.file "kernel_dip.hip"
.globl _Z26__device_stub__kernel_ndviPsS_S_ii # -- Begin function _Z26__device_stub__kernel_ndviPsS_S_ii
.p2align 4, 0x90
.type _Z26__device_stub__kernel_ndviPsS_S_ii,@function
_Z26__device_stub__kernel_ndviPsS_S_ii: # @_Z26__device_stub__kernel_ndviPsS_S_ii
.cfi_startproc
# %bb.0:
subq $12... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000fc6b8_00000000-6_kernel_dip.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %r... | .text
.file "kernel_dip.hip"
.globl _Z26__device_stub__kernel_ndviPsS_S_ii # -- Begin function _Z26__device_stub__kernel_ndviPsS_S_ii
.p2align 4, 0x90
.type _Z26__device_stub__kernel_ndviPsS_S_ii,@function
_Z26__device_stub__kernel_ndviPsS_S_ii: # @_Z26__device_stub__kernel_ndviPsS_S_ii
.cfi_startproc
# %bb.0:
subq $12... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
#define HILOS 16
__global__ void vecAddKernel(flo... | code for sm_80
Function : _Z12vecAddKernelPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2UR UR5, SR_CTAID.X ; /* 0x00000000000579c3 */
/* 0x000e220000002500 *... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
#define HILOS 16
__global__ void vecAddKernel(flo... | .file "tmpxft_001bbf56_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
#define HILOS 16
__global__ void vecAddKernel(flo... | #include <hip/hip_runtime.h>
/******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
#define HILOS 16
__g... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
/******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
#define HILOS 16
__g... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12vecAddKernelPfS_S_i
.globl _Z12vecAddKernelPfS_S_i
.p2align 8
.type _Z12vecAddKernelPfS_S_i,@function
_Z12vecAddKernelPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
/******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
#define HILOS 16
__g... | .text
.file "kernel.hip"
.globl _Z27__device_stub__vecAddKernelPfS_S_i # -- Begin function _Z27__device_stub__vecAddKernelPfS_S_i
.p2align 4, 0x90
.type _Z27__device_stub__vecAddKernelPfS_S_i,@function
_Z27__device_stub__vecAddKernelPfS_S_i: # @_Z27__device_stub__vecAddKernelPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12vecAddKernelPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2UR UR5, SR_CTAID.X ; /* 0x00000000000579c3 */
/* 0x000e220000002500 *... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12vecAddKernelPfS_S_i
.globl _Z12vecAddKernelPfS_S_i
.p2align 8
.type _Z12vecAddKernelPfS_S_i,@function
_Z12vecAddKernelPfS_S_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b32 s3, s[0:1], 0x18
v_and_b32_e32 v1, 0x3ff, v0
v_bfe_u32 v0, ... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001bbf56_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "kernel.hip"
.globl _Z27__device_stub__vecAddKernelPfS_S_i # -- Begin function _Z27__device_stub__vecAddKernelPfS_S_i
.p2align 4, 0x90
.type _Z27__device_stub__vecAddKernelPfS_S_i,@function
_Z27__device_stub__vecAddKernelPfS_S_i: # @_Z27__device_stub__vecAddKernelPfS_S_i
.cfi_startproc
# %bb.0:
subq $120, %... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void matrixKernel(float* d_in, float* d_out) {
// Block index
int bx = blockIdx.x;
int by = blockIdx.y;
// Thread index (current coefficient)
int tx = threadIdx.x;
int ty = threadIdx.y;
float dividend =
d_in[(by * BLOCK_SIZE + 0) * STRIDE + (bx * BLOCK_SIZE + 0)];
float divisor =
d_in[(... | code for sm_80
Function : _Z12matrixKernelPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */
/* 0x000e... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void matrixKernel(float* d_in, float* d_out) {
// Block index
int bx = blockIdx.x;
int by = blockIdx.y;
// Thread index (current coefficient)
int tx = threadIdx.x;
int ty = threadIdx.y;
float dividend =
d_in[(by * BLOCK_SIZE + 0) * STRIDE + (bx * BLOCK_SIZE + 0)];
float divisor =
d_in[(... | .file "tmpxft_001614bc_00000000-6_matrixKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void matrixKernel(float* d_in, float* d_out) {
// Block index
int bx = blockIdx.x;
int by = blockIdx.y;
// Thread index (current coefficient)
int tx = threadIdx.x;
int ty = threadIdx.y;
float dividend =
d_in[(by * BLOCK_SIZE + 0) * STRIDE + (bx * BLOCK_SIZE + 0)];
float divisor =
d_in[(... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void matrixKernel(float* d_in, float* d_out) {
// Block index
int bx = blockIdx.x;
int by = blockIdx.y;
// Thread index (current coefficient)
int tx = threadIdx.x;
int ty = threadIdx.y;
float dividend =
d_in[(by * BLOCK_SIZE + 0) * STRIDE + (bx * BLOCK_SIZE ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void matrixKernel(float* d_in, float* d_out) {
// Block index
int bx = blockIdx.x;
int by = blockIdx.y;
// Thread index (current coefficient)
int tx = threadIdx.x;
int ty = threadIdx.y;
float dividend =
d_in[(by * BLOCK_SIZE + 0) * STRIDE + (bx * BLOCK_SIZE ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12matrixKernelPfS_
.globl _Z12matrixKernelPfS_
.p2align 8
.type _Z12matrixKernelPfS_,@function
_Z12matrixKernelPfS_:
v_lshrrev_b32_e32 v1, 8, v0
v_and_b32_e32 v0, 0x3ff, v0
s_load_b128 s[0:3], s[0:1], 0x0
s_lshl_b32 s4, s15, 3
s_lshl_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void matrixKernel(float* d_in, float* d_out) {
// Block index
int bx = blockIdx.x;
int by = blockIdx.y;
// Thread index (current coefficient)
int tx = threadIdx.x;
int ty = threadIdx.y;
float dividend =
d_in[(by * BLOCK_SIZE + 0) * STRIDE + (bx * BLOCK_SIZE ... | .text
.file "matrixKernel.hip"
.globl _Z27__device_stub__matrixKernelPfS_ # -- Begin function _Z27__device_stub__matrixKernelPfS_
.p2align 4, 0x90
.type _Z27__device_stub__matrixKernelPfS_,@function
_Z27__device_stub__matrixKernelPfS_: # @_Z27__device_stub__matrixKernelPfS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cf... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12matrixKernelPfS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2UR UR4, SR_CTAID.X ; /* 0x00000000000479c3 */
/* 0x000e... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12matrixKernelPfS_
.globl _Z12matrixKernelPfS_
.p2align 8
.type _Z12matrixKernelPfS_,@function
_Z12matrixKernelPfS_:
v_lshrrev_b32_e32 v1, 8, v0
v_and_b32_e32 v0, 0x3ff, v0
s_load_b128 s[0:3], s[0:1], 0x0
s_lshl_b32 s4, s15, 3
s_lshl_... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_001614bc_00000000-6_matrixKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, ... | .text
.file "matrixKernel.hip"
.globl _Z27__device_stub__matrixKernelPfS_ # -- Begin function _Z27__device_stub__matrixKernelPfS_
.p2align 4, 0x90
.type _Z27__device_stub__matrixKernelPfS_,@function
_Z27__device_stub__matrixKernelPfS_: # @_Z27__device_stub__matrixKernelPfS_
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | __global__ void
naiveKernel(float *A,float *A_out,const int n){
//First make a function that works for the input size 2*2
extern __shared__ float sdata[];
int tid = threadIdx.x;
int i = blockDim.x*blockIdx.x + threadIdx.x;
sdata[tid] = 0;
if(i<n)
sdata[tid] = A[i];
for(unsigned int s=4;s<blockDim.x;s*=2){
if(tid%(2*s... | .file "tmpxft_0004e1ff_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | __global__ void
naiveKernel(float *A,float *A_out,const int n){
//First make a function that works for the input size 2*2
extern __shared__ float sdata[];
int tid = threadIdx.x;
int i = blockDim.x*blockIdx.x + threadIdx.x;
sdata[tid] = 0;
if(i<n)
sdata[tid] = A[i];
for(unsigned int s=4;s<blockDim.x;s*=2){
if(tid%(2*s... | #include <hip/hip_runtime.h>
__global__ void
naiveKernel(float *A,float *A_out,const int n){
//First make a function that works for the input size 2*2
extern __shared__ float sdata[];
int tid = threadIdx.x;
int i = blockDim.x*blockIdx.x + threadIdx.x;
sdata[tid] = 0;
if(i<n)
sdata[tid] = A[i];
for(unsigned int s=4;s<... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
__global__ void
naiveKernel(float *A,float *A_out,const int n){
//First make a function that works for the input size 2*2
extern __shared__ float sdata[];
int tid = threadIdx.x;
int i = blockDim.x*blockIdx.x + threadIdx.x;
sdata[tid] = 0;
if(i<n)
sdata[tid] = A[i];
for(unsigned int s=4;s<... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11naiveKernelPfS_i
.globl _Z11naiveKernelPfS_i
.p2align 8
.type _Z11naiveKernelPfS_i,@function
_Z11naiveKernelPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s4, s[0:1], 0x10
v_lshl_add_u32 v3, v0, 2, 0
s_waitcnt lgkmcnt(0)... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
__global__ void
naiveKernel(float *A,float *A_out,const int n){
//First make a function that works for the input size 2*2
extern __shared__ float sdata[];
int tid = threadIdx.x;
int i = blockDim.x*blockIdx.x + threadIdx.x;
sdata[tid] = 0;
if(i<n)
sdata[tid] = A[i];
for(unsigned int s=4;s<... | .text
.file "kernel.hip"
.globl _Z26__device_stub__naiveKernelPfS_i # -- Begin function _Z26__device_stub__naiveKernelPfS_i
.p2align 4, 0x90
.type _Z26__device_stub__naiveKernelPfS_i,@function
_Z26__device_stub__naiveKernelPfS_i: # @_Z26__device_stub__naiveKernelPfS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def... |
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