system stringclasses 7
values | input stringlengths 10 94.5k | output stringlengths 14 55.5k |
|---|---|---|
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
#define DOUBLE
#ifdef DOUBLE
#define Complex cufftDoubleComplex
#define Real double
#define Transform CUFFT_Z2Z
#define TransformExec cufftExecZ2Z
#else
#define Complex cufftComplex
#define Real float
#define Transform CUFFT_C2C
#define TransformExec cufftExecC2C
#endif
#define TILE_DIM 8
// synch... | code for sm_80
Function : _Z4zeroiiiPd
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0xc] ; /* 0x00000300ff007624 */
/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
#define DOUBLE
#ifdef DOUBLE
#define Complex cufftDoubleComplex
#define Real double
#define Transform CUFFT_Z2Z
#define TransformExec cufftExecZ2Z
#else
#define Complex cufftComplex
#define Real float
#define Transform CUFFT_C2C
#define TransformExec cufftExecC2C
#endif
#define TILE_DIM 8
// synch... | .file "tmpxft_000c273b_00000000-6_zero.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
#define DOUBLE
#ifdef DOUBLE
#define Complex cufftDoubleComplex
#define Real double
#define Transform CUFFT_Z2Z
#define TransformExec cufftExecZ2Z
#else
#define Complex cufftComplex
#define Real float
#define Transform CUFFT_C2C
#define TransformExec cufftExecC2C
#endif
#define TILE_DIM 8
// synch... | #include <hip/hip_runtime.h>
#include "includes.h"
#define DOUBLE
#ifdef DOUBLE
#define Complex hipfftDoubleComplex
#define Real double
#define Transform HIPFFT_Z2Z
#define TransformExec hipfftExecZ2Z
#else
#define Complex hipfftComplex
#define Real float
#define Transform HIPFFT_C2C
#define TransformExec hipfftExecC2C... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
#define DOUBLE
#ifdef DOUBLE
#define Complex hipfftDoubleComplex
#define Real double
#define Transform HIPFFT_Z2Z
#define TransformExec hipfftExecZ2Z
#else
#define Complex hipfftComplex
#define Real float
#define Transform HIPFFT_C2C
#define TransformExec hipfftExecC2C... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4zeroiiiPd
.globl _Z4zeroiiiPd
.p2align 8
.type _Z4zeroiiiPd,@function
_Z4zeroiiiPd:
s_clause 0x3
s_load_b64 s[2:3], s[0:1], 0x18
s_load_b32 s6, s[0:1], 0x24
s_load_b64 s[4:5], s[0:1], 0x0
s_load_b32 s8, s[0:1], 0x8
s_... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
#define DOUBLE
#ifdef DOUBLE
#define Complex hipfftDoubleComplex
#define Real double
#define Transform HIPFFT_Z2Z
#define TransformExec hipfftExecZ2Z
#else
#define Complex hipfftComplex
#define Real float
#define Transform HIPFFT_C2C
#define TransformExec hipfftExecC2C... | .text
.file "zero.hip"
.globl _Z19__device_stub__zeroiiiPd # -- Begin function _Z19__device_stub__zeroiiiPd
.p2align 4, 0x90
.type _Z19__device_stub__zeroiiiPd,@function
_Z19__device_stub__zeroiiiPd: # @_Z19__device_stub__zeroiiiPd
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movl %edi, ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z4zeroiiiPd
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0xc] ; /* 0x00000300ff007624 */
/... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4zeroiiiPd
.globl _Z4zeroiiiPd
.p2align 8
.type _Z4zeroiiiPd,@function
_Z4zeroiiiPd:
s_clause 0x3
s_load_b64 s[2:3], s[0:1], 0x18
s_load_b32 s6, s[0:1], 0x24
s_load_b64 s[4:5], s[0:1], 0x0
s_load_b32 s8, s[0:1], 0x8
s_... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000c273b_00000000-6_zero.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cf... | .text
.file "zero.hip"
.globl _Z19__device_stub__zeroiiiPd # -- Begin function _Z19__device_stub__zeroiiiPd
.p2align 4, 0x90
.type _Z19__device_stub__zeroiiiPd,@function
_Z19__device_stub__zeroiiiPd: # @_Z19__device_stub__zeroiiiPd
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_cfa_offset 128
movl %edi, ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cstdio>
#include <iostream>
#include <cmath>
#define SIZE 3
#define BLOCK_SIZE 2
__global__ void matrix_multiplication(float* d_prod, float* d_m, float* d_n, int size) {
int col = threadIdx.x + blockDim.x*blockIdx.x;
int row = threadIdx.y + blockDim.y*blockIdx.y;
if(row < size && col < size) {
float val = 0... | code for sm_80
Function : _Z21matrix_multiplicationPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e2800000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cstdio>
#include <iostream>
#include <cmath>
#define SIZE 3
#define BLOCK_SIZE 2
__global__ void matrix_multiplication(float* d_prod, float* d_m, float* d_n, int size) {
int col = threadIdx.x + blockDim.x*blockIdx.x;
int row = threadIdx.y + blockDim.y*blockIdx.y;
if(row < size && col < size) {
float val = 0... | .file "tmpxft_000c91c7_00000000-6_matrix_multiplication.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cstdio>
#include <iostream>
#include <cmath>
#define SIZE 3
#define BLOCK_SIZE 2
__global__ void matrix_multiplication(float* d_prod, float* d_m, float* d_n, int size) {
int col = threadIdx.x + blockDim.x*blockIdx.x;
int row = threadIdx.y + blockDim.y*blockIdx.y;
if(row < size && col < size) {
float val = 0... | #include <hip/hip_runtime.h>
#include <cstdio>
#include <iostream>
#include <cmath>
#define SIZE 3
#define BLOCK_SIZE 2
__global__ void matrix_multiplication(float* d_prod, float* d_m, float* d_n, int size) {
int col = threadIdx.x + blockDim.x*blockIdx.x;
int row = threadIdx.y + blockDim.y*blockIdx.y;
if(row < size &... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <cstdio>
#include <iostream>
#include <cmath>
#define SIZE 3
#define BLOCK_SIZE 2
__global__ void matrix_multiplication(float* d_prod, float* d_m, float* d_n, int size) {
int col = threadIdx.x + blockDim.x*blockIdx.x;
int row = threadIdx.y + blockDim.y*blockIdx.y;
if(row < size &... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21matrix_multiplicationPfS_S_i
.globl _Z21matrix_multiplicationPfS_S_i
.p2align 8
.type _Z21matrix_multiplicationPfS_S_i,@function
_Z21matrix_multiplicationPfS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <cstdio>
#include <iostream>
#include <cmath>
#define SIZE 3
#define BLOCK_SIZE 2
__global__ void matrix_multiplication(float* d_prod, float* d_m, float* d_n, int size) {
int col = threadIdx.x + blockDim.x*blockIdx.x;
int row = threadIdx.y + blockDim.y*blockIdx.y;
if(row < size &... | .text
.file "matrix_multiplication.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z36__device_stub__matrix_multiplicationPfS_S_i # -- Begin function _Z36__device_stub... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z21matrix_multiplicationPfS_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e2800000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21matrix_multiplicationPfS_S_i
.globl _Z21matrix_multiplicationPfS_S_i
.p2align 8
.type _Z21matrix_multiplicationPfS_S_i,@function
_Z21matrix_multiplicationPfS_S_i:
s_clause 0x1
s_load_b32 s3, s[0:1], 0x2c
s_load_b32 s2, s[0:1], 0x18
v_and_b32_e32 v... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000c91c7_00000000-6_matrix_multiplication.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3672:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi... | .text
.file "matrix_multiplication.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z36__device_stub__matrix_multiplicationPfS_S_i # -- Begin function _Z36__device_stub... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <cuda_runtime.h>
#include <iostream>
#include <exception>
void cuda_error(cudaError_t e, int code_line) {
if(e != cudaSuccess) {
std::cerr << "CUDA execution error: " << e << " at line " << code_line << std::endl;
std::exit(EXIT_FAILURE);
}
}
#define HANDLE_ERROR(e) (cuda_error(e, __LINE__))
// Function to gat... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <cuda_runtime.h>
#include <iostream>
#include <exception>
void cuda_error(cudaError_t e, int code_line) {
if(e != cudaSuccess) {
std::cerr << "CUDA execution error: " << e << " at line " << code_line << std::endl;
std::exit(EXIT_FAILURE);
}
}
#define HANDLE_ERROR(e) (cuda_error(e, __LINE__))
// Function to gat... | .file "tmpxft_00117929_00000000-6_gpuquery.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB3674:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaU... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <cuda_runtime.h>
#include <iostream>
#include <exception>
void cuda_error(cudaError_t e, int code_line) {
if(e != cudaSuccess) {
std::cerr << "CUDA execution error: " << e << " at line " << code_line << std::endl;
std::exit(EXIT_FAILURE);
}
}
#define HANDLE_ERROR(e) (cuda_error(e, __LINE__))
// Function to gat... | #include <hip/hip_runtime.h>
#include <iostream>
#include <exception>
void cuda_error(hipError_t e, int code_line) {
if(e != hipSuccess) {
std::cerr << "CUDA execution error: " << e << " at line " << code_line << std::endl;
std::exit(EXIT_FAILURE);
}
}
#define HANDLE_ERROR(e) (cuda_error(e, __LINE__))
// Function to ga... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <exception>
void cuda_error(hipError_t e, int code_line) {
if(e != hipSuccess) {
std::cerr << "CUDA execution error: " << e << " at line " << code_line << std::endl;
std::exit(EXIT_FAILURE);
}
}
#define HANDLE_ERROR(e) (cuda_error(e, __LINE__))
// Function to ga... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <iostream>
#include <exception>
void cuda_error(hipError_t e, int code_line) {
if(e != hipSuccess) {
std::cerr << "CUDA execution error: " << e << " at line " << code_line << std::endl;
std::exit(EXIT_FAILURE);
}
}
#define HANDLE_ERROR(e) (cuda_error(e, __LINE__))
// Function to ga... | .text
.file "gpuquery.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z10cuda_error10hipError_ti # -- Begin function _Z10cuda_error10hipError_ti
.p2align 4, 0x90
.... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
__global__ void initFun(int *nf) {
int n = threadIdx.x + blockIdx.x * blockDim.x;
nf[n] *= 10;
}
int main(int argc, char* argv[]) {
if (argc < 2) {
fprintf(stderr, "USAGE: main <num_of_devices> "
"<device_indices>\n");
return -1;
}
int *info_devs = (int *) calloc(argc - 2, sizeof(int));
info_devs[0]... | code for sm_80
Function : _Z7initFunPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e220000002100 */
/*0020*/ HFMA... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
__global__ void initFun(int *nf) {
int n = threadIdx.x + blockIdx.x * blockDim.x;
nf[n] *= 10;
}
int main(int argc, char* argv[]) {
if (argc < 2) {
fprintf(stderr, "USAGE: main <num_of_devices> "
"<device_indices>\n");
return -1;
}
int *info_devs = (int *) calloc(argc - 2, sizeof(int));
info_devs[0]... | .file "tmpxft_000e8a52_00000000-6_lab7_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
__global__ void initFun(int *nf) {
int n = threadIdx.x + blockIdx.x * blockDim.x;
nf[n] *= 10;
}
int main(int argc, char* argv[]) {
if (argc < 2) {
fprintf(stderr, "USAGE: main <num_of_devices> "
"<device_indices>\n");
return -1;
}
int *info_devs = (int *) calloc(argc - 2, sizeof(int));
info_devs[0]... | #include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void initFun(int *nf) {
int n = threadIdx.x + blockIdx.x * blockDim.x;
nf[n] *= 10;
}
int main(int argc, char* argv[]) {
if (argc < 2) {
fprintf(stderr, "USAGE: main <num_of_devices> "
"<device_indices>\n");
return -1;
}
int *info_devs = (int *) calloc(argc - ... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void initFun(int *nf) {
int n = threadIdx.x + blockIdx.x * blockDim.x;
nf[n] *= 10;
}
int main(int argc, char* argv[]) {
if (argc < 2) {
fprintf(stderr, "USAGE: main <num_of_devices> "
"<device_indices>\n");
return -1;
}
int *info_devs = (int *) calloc(argc - ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7initFunPi
.globl _Z7initFunPi
.p2align 8
.type _Z7initFunPi,@function
_Z7initFunPi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu ins... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include <stdio.h>
__global__ void initFun(int *nf) {
int n = threadIdx.x + blockIdx.x * blockDim.x;
nf[n] *= 10;
}
int main(int argc, char* argv[]) {
if (argc < 2) {
fprintf(stderr, "USAGE: main <num_of_devices> "
"<device_indices>\n");
return -1;
}
int *info_devs = (int *) calloc(argc - ... | .text
.file "lab7_cuda.hip"
.globl _Z22__device_stub__initFunPi # -- Begin function _Z22__device_stub__initFunPi
.p2align 4, 0x90
.type _Z22__device_stub__initFunPi,@function
_Z22__device_stub__initFunPi: # @_Z22__device_stub__initFunPi
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rd... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z7initFunPi
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e220000002100 */
/*0020*/ HFMA... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7initFunPi
.globl _Z7initFunPi
.p2align 8
.type _Z7initFunPi,@function
_Z7initFunPi:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x14
s_load_b64 s[0:1], s[0:1], 0x0
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu ins... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000e8a52_00000000-6_lab7_cuda.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2060:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rs... | .text
.file "lab7_cuda.hip"
.globl _Z22__device_stub__initFunPi # -- Begin function _Z22__device_stub__initFunPi
.p2align 4, 0x90
.type _Z22__device_stub__initFunPi,@function
_Z22__device_stub__initFunPi: # @_Z22__device_stub__initFunPi
.cfi_startproc
# %bb.0:
subq $72, %rsp
.cfi_def_cfa_offset 80
movq %rd... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
cudaError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size);
__global__ void addKernel(int *c, const int *a, const int *b)
{
int i = threadIdx.x;
c[i] = a[i] + b[i];
}
__device__ void idxToCoords(co... | code for sm_80
Function : _Z12conwayThreadPcS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
cudaError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size);
__global__ void addKernel(int *c, const int *a, const int *b)
{
int i = threadIdx.x;
c[i] = a[i] + b[i];
}
__device__ void idxToCoords(co... | .file "tmpxft_00181954_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2064:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
cudaError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size);
__global__ void addKernel(int *c, const int *a, const int *b)
{
int i = threadIdx.x;
c[i] = a[i] + b[i];
}
__device__ void idxToCoords(co... | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
hipError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size);
__global__ void addKernel(int *c, const int *a, const int *b)
{
int i = threadIdx.x;
c[i] = a[i] + b[i];
}
__device__ void idxToCoords(const int idx, int *row, int *col, int... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
hipError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size);
__global__ void addKernel(int *c, const int *a, const int *b)
{
int i = threadIdx.x;
c[i] = a[i] + b[i];
}
__device__ void idxToCoords(const int idx, int *row, int *col, int... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9addKernelPiPKiS1_
.globl _Z9addKernelPiPKiS1_
.p2align 8
.type _Z9addKernelPiPKiS1_,@function
_Z9addKernelPiPKiS1_:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lg... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
hipError_t addWithCuda(int *c, const int *a, const int *b, unsigned int size);
__global__ void addKernel(int *c, const int *a, const int *b)
{
int i = threadIdx.x;
c[i] = a[i] + b[i];
}
__device__ void idxToCoords(const int idx, int *row, int *col, int... | .text
.file "kernel.hip"
.globl _Z24__device_stub__addKernelPiPKiS1_ # -- Begin function _Z24__device_stub__addKernelPiPKiS1_
.p2align 4, 0x90
.type _Z24__device_stub__addKernelPiPKiS1_,@function
_Z24__device_stub__addKernelPiPKiS1_: # @_Z24__device_stub__addKernelPiPKiS1_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12conwayThreadPcS_ii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9addKernelPiPKiS1_
.globl _Z9addKernelPiPKiS1_
.p2align 8
.type _Z9addKernelPiPKiS1_,@function
_Z9addKernelPiPKiS1_:
s_clause 0x1
s_load_b128 s[4:7], s[0:1], 0x0
s_load_b64 s[0:1], s[0:1], 0x10
v_lshlrev_b32_e32 v0, 2, v0
s_waitcnt lg... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00181954_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2064:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "kernel.hip"
.globl _Z24__device_stub__addKernelPiPKiS1_ # -- Begin function _Z24__device_stub__addKernelPiPKiS1_
.p2align 4, 0x90
.type _Z24__device_stub__addKernelPiPKiS1_,@function
_Z24__device_stub__addKernelPiPKiS1_: # @_Z24__device_stub__addKernelPiPKiS1_
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | //
// Created by smallflyfly on 2021/5/18.
//
#include <stdio.h>
#include <cuda_runtime.h>
int main(int argc, char **argv) {
int deviceCount = 0;
cudaError_t errorId = cudaGetDeviceCount(&deviceCount);
if (errorId != cudaSuccess) {
printf("cudaDeviceCount returned %d\n -> %s\n", (int)errorId, cudaGetErrorString(errorId... | code for sm_80 |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | //
// Created by smallflyfly on 2021/5/18.
//
#include <stdio.h>
#include <cuda_runtime.h>
int main(int argc, char **argv) {
int deviceCount = 0;
cudaError_t errorId = cudaGetDeviceCount(&deviceCount);
if (errorId != cudaSuccess) {
printf("cudaDeviceCount returned %d\n -> %s\n", (int)errorId, cudaGetErrorString(errorId... | .file "tmpxft_0003b08d_00000000-6_device_information.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | //
// Created by smallflyfly on 2021/5/18.
//
#include <stdio.h>
#include <cuda_runtime.h>
int main(int argc, char **argv) {
int deviceCount = 0;
cudaError_t errorId = cudaGetDeviceCount(&deviceCount);
if (errorId != cudaSuccess) {
printf("cudaDeviceCount returned %d\n -> %s\n", (int)errorId, cudaGetErrorString(errorId... | //
// Created by smallflyfly on 2021/5/18.
//
#include <stdio.h>
#include <hip/hip_runtime.h>
int main(int argc, char **argv) {
int deviceCount = 0;
hipError_t errorId = hipGetDeviceCount(&deviceCount);
if (errorId != hipSuccess) {
printf("cudaDeviceCount returned %d\n -> %s\n", (int)errorId, hipGetErrorString(errorId)... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | //
// Created by smallflyfly on 2021/5/18.
//
#include <stdio.h>
#include <hip/hip_runtime.h>
int main(int argc, char **argv) {
int deviceCount = 0;
hipError_t errorId = hipGetDeviceCount(&deviceCount);
if (errorId != hipSuccess) {
printf("cudaDeviceCount returned %d\n -> %s\n", (int)errorId, hipGetErrorString(errorId)... | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | //
// Created by smallflyfly on 2021/5/18.
//
#include <stdio.h>
#include <hip/hip_runtime.h>
int main(int argc, char **argv) {
int deviceCount = 0;
hipError_t errorId = hipGetDeviceCount(&deviceCount);
if (errorId != hipSuccess) {
printf("cudaDeviceCount returned %d\n -> %s\n", (int)errorId, hipGetErrorString(errorId)... | .text
.file "device_information.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI0_0:
.quad 0x3e10000000000000 # double 9.3132257461547852E-10
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0
.LCPI0_1:
.long 0x3a83126f ... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80 | .text
.p2alignl 7, 3214868480
.fill 96, 4, 3214868480
.type __hip_cuid_,@object
.section .bss,"aw",@nobits
.globl __hip_cuid_
__hip_cuid_:
.byte 0
.size __hip_cuid_, 1
.ident "AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.2 25012 e5bf7... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0003b08d_00000000-6_device_information.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
add... | .text
.file "device_information.hip"
.section .rodata.cst8,"aM",@progbits,8
.p2align 3, 0x0 # -- Begin function main
.LCPI0_0:
.quad 0x3e10000000000000 # double 9.3132257461547852E-10
.section .rodata.cst4,"aM",@progbits,4
.p2align 2, 0x0
.LCPI0_1:
.long 0x3a83126f ... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void cpy(float *a, float *b, int n) {
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i < n)
a[i] = b[i];
} | code for sm_80
Function : _Z3cpyPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e280000002500 */
/*0020*/ S2R... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void cpy(float *a, float *b, int n) {
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i < n)
a[i] = b[i];
} | .file "tmpxft_00048032_00000000-6_cpy.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void cpy(float *a, float *b, int n) {
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i < n)
a[i] = b[i];
} | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void cpy(float *a, float *b, int n) {
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i < n)
a[i] = b[i];
} |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void cpy(float *a, float *b, int n) {
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i < n)
a[i] = b[i];
} | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3cpyPfS_i
.globl _Z3cpyPfS_i
.p2align 8
.type _Z3cpyPfS_i,@function
_Z3cpyPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void cpy(float *a, float *b, int n) {
unsigned int i = blockIdx.x * blockDim.x + threadIdx.x;
if (i < n)
a[i] = b[i];
} | .text
.file "cpy.hip"
.globl _Z18__device_stub__cpyPfS_i # -- Begin function _Z18__device_stub__cpyPfS_i
.p2align 4, 0x90
.type _Z18__device_stub__cpyPfS_i,@function
_Z18__device_stub__cpyPfS_i: # @_Z18__device_stub__cpyPfS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z3cpyPfS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R4, SR_CTAID.X ; /* 0x0000000000047919 */
/* 0x000e280000002500 */
/*0020*/ S2R... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3cpyPfS_i
.globl _Z3cpyPfS_i
.p2align 8
.type _Z3cpyPfS_i,@function
_Z3cpyPfS_i:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:1], 0x10
s_waitcnt lgkmcnt(0)
s_and_b32 s2, s2, 0xffff
s_delay_alu instid0(... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00048032_00000000-6_cpy.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.cfi... | .text
.file "cpy.hip"
.globl _Z18__device_stub__cpyPfS_i # -- Begin function _Z18__device_stub__cpyPfS_i
.p2align 4, 0x90
.type _Z18__device_stub__cpyPfS_i,@function
_Z18__device_stub__cpyPfS_i: # @_Z18__device_stub__cpyPfS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq %rdi, 72(%... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "includes.h"
__global__ void rgb2gray(float *grayImage, float *rgbImage, int channels, int width, int height) {
int x = threadIdx.x + blockIdx.x * blockDim.x;
int y = threadIdx.y + blockIdx.y * blockDim.y;
if (x < width && y < height) {
// get 1D coordinate for the grayscale image
int grayOffset = y * width + ... | code for sm_80
Function : _Z8rgb2grayPfS_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002600 */
/*002... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void rgb2gray(float *grayImage, float *rgbImage, int channels, int width, int height) {
int x = threadIdx.x + blockIdx.x * blockDim.x;
int y = threadIdx.y + blockIdx.y * blockDim.y;
if (x < width && y < height) {
// get 1D coordinate for the grayscale image
int grayOffset = y * width + ... | .file "tmpxft_0001fa6e_00000000-6_rgb2gray.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void rgb2gray(float *grayImage, float *rgbImage, int channels, int width, int height) {
int x = threadIdx.x + blockIdx.x * blockDim.x;
int y = threadIdx.y + blockIdx.y * blockDim.y;
if (x < width && y < height) {
// get 1D coordinate for the grayscale image
int grayOffset = y * width + ... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void rgb2gray(float *grayImage, float *rgbImage, int channels, int width, int height) {
int x = threadIdx.x + blockIdx.x * blockDim.x;
int y = threadIdx.y + blockIdx.y * blockDim.y;
if (x < width && y < height) {
// get 1D coordinate for the grayscale image
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void rgb2gray(float *grayImage, float *rgbImage, int channels, int width, int height) {
int x = threadIdx.x + blockIdx.x * blockDim.x;
int y = threadIdx.y + blockIdx.y * blockDim.y;
if (x < width && y < height) {
// get 1D coordinate for the grayscale image
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8rgb2grayPfS_iii
.globl _Z8rgb2grayPfS_iii
.p2align 8
.type _Z8rgb2grayPfS_iii,@function
_Z8rgb2grayPfS_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x14
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void rgb2gray(float *grayImage, float *rgbImage, int channels, int width, int height) {
int x = threadIdx.x + blockIdx.x * blockDim.x;
int y = threadIdx.y + blockIdx.y * blockDim.y;
if (x < width && y < height) {
// get 1D coordinate for the grayscale image
... | .text
.file "rgb2gray.hip"
.globl _Z23__device_stub__rgb2grayPfS_iii # -- Begin function _Z23__device_stub__rgb2grayPfS_iii
.p2align 4, 0x90
.type _Z23__device_stub__rgb2grayPfS_iii,@function
_Z23__device_stub__rgb2grayPfS_iii: # @_Z23__device_stub__rgb2grayPfS_iii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_c... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z8rgb2grayPfS_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R3, SR_CTAID.Y ; /* 0x0000000000037919 */
/* 0x000e280000002600 */
/*002... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z8rgb2grayPfS_iii
.globl _Z8rgb2grayPfS_iii
.p2align 8
.type _Z8rgb2grayPfS_iii,@function
_Z8rgb2grayPfS_iii:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x2c
s_load_b64 s[4:5], s[0:1], 0x14
v_and_b32_e32 v2, 0x3ff, v0
v_bfe_u32 v3, v0, 10... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0001fa6e_00000000-6_rgb2gray.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp... | .text
.file "rgb2gray.hip"
.globl _Z23__device_stub__rgb2grayPfS_iii # -- Begin function _Z23__device_stub__rgb2grayPfS_iii
.p2align 4, 0x90
.type _Z23__device_stub__rgb2grayPfS_iii,@function
_Z23__device_stub__rgb2grayPfS_iii: # @_Z23__device_stub__rgb2grayPfS_iii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_def_c... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <stdio.h>
#include <chrono>
#include <algorithm>
#include <cuda.h>
#include <iostream>
__global__ void spmvCSRKernel(float *out, int *matCols, int *matRows,
float *matData, float *vec, int dim) {
//@@ insert spmv kernel for csr format
}
__global__ void spmvJDSKernel(float *out, int *matColStart, int *matCols,
... | code for sm_80
Function : _Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <stdio.h>
#include <chrono>
#include <algorithm>
#include <cuda.h>
#include <iostream>
__global__ void spmvCSRKernel(float *out, int *matCols, int *matRows,
float *matData, float *vec, int dim) {
//@@ insert spmv kernel for csr format
}
__global__ void spmvJDSKernel(float *out, int *matColStart, int *matCols,
... | .file "tmpxft_000aa202_00000000-6_template.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL4sortPiS_ii, @function
_ZL4sortPiS_ii:
.LFB4024:
.cfi_startproc
cmpl %edx, %ecx
jle .L15
pushq %r15
.cfi_def_cfa_offset 16
.cfi_offset 15, -16
pushq %r14
.cfi_def_cfa_offset 24
.cfi_offset 14, -24
pus... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <stdio.h>
#include <chrono>
#include <algorithm>
#include <cuda.h>
#include <iostream>
__global__ void spmvCSRKernel(float *out, int *matCols, int *matRows,
float *matData, float *vec, int dim) {
//@@ insert spmv kernel for csr format
}
__global__ void spmvJDSKernel(float *out, int *matColStart, int *matCols,
... | #include <stdio.h>
#include <chrono>
#include <algorithm>
#include <hip/hip_runtime.h>
#include <iostream>
__global__ void spmvCSRKernel(float *out, int *matCols, int *matRows,
float *matData, float *vec, int dim) {
//@@ insert spmv kernel for csr format
}
__global__ void spmvJDSKernel(float *out, int *matColStart, int... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <stdio.h>
#include <chrono>
#include <algorithm>
#include <hip/hip_runtime.h>
#include <iostream>
__global__ void spmvCSRKernel(float *out, int *matCols, int *matRows,
float *matData, float *vec, int dim) {
//@@ insert spmv kernel for csr format
}
__global__ void spmvJDSKernel(float *out, int *matColStart, int... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13spmvCSRKernelPfPiS0_S_S_i
.globl _Z13spmvCSRKernelPfPiS0_S_S_i
.p2align 8
.type _Z13spmvCSRKernelPfPiS0_S_S_i,@function
_Z13spmvCSRKernelPfPiS0_S_S_i:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z13spmvCSRKernelPfPiS... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <stdio.h>
#include <chrono>
#include <algorithm>
#include <hip/hip_runtime.h>
#include <iostream>
__global__ void spmvCSRKernel(float *out, int *matCols, int *matRows,
float *matData, float *vec, int dim) {
//@@ insert spmv kernel for csr format
}
__global__ void spmvJDSKernel(float *out, int *matColStart, int... | .text
.file "template.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z28__device_stub__spmvCSRKernelPfPiS0_S_S_i # -- Begin function _Z28__device_stub__spmvCSRKernelP... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z13spmvJDSKernelPfPiS0_S0_S0_S_S_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13spmvCSRKernelPfPiS0_S_S_i
.globl _Z13spmvCSRKernelPfPiS0_S_S_i
.p2align 8
.type _Z13spmvCSRKernelPfPiS0_S_S_i,@function
_Z13spmvCSRKernelPfPiS0_S_S_i:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z13spmvCSRKernelPfPiS... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // dynamic alloc
__global__ void sharedMemoryDemo1( )
{
extern __shared__ float shared_data_dynamic[];
float *data = (float*)shared_data_dynamic;
int id = threadIdx.x;
data[id] = 0.0f; // initialization
}
// static alloc
__global__ void sharedMemoryDemo2( )
{
__shared__ int shared_data_static[16];
int id = threadIdx... | code for sm_80
Function : _Z17sharedMemoryDemo2v
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // dynamic alloc
__global__ void sharedMemoryDemo1( )
{
extern __shared__ float shared_data_dynamic[];
float *data = (float*)shared_data_dynamic;
int id = threadIdx.x;
data[id] = 0.0f; // initialization
}
// static alloc
__global__ void sharedMemoryDemo2( )
{
__shared__ int shared_data_static[16];
int id = threadIdx... | .file "tmpxft_000bfc99_00000000-6_sharedMemoryExample1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // dynamic alloc
__global__ void sharedMemoryDemo1( )
{
extern __shared__ float shared_data_dynamic[];
float *data = (float*)shared_data_dynamic;
int id = threadIdx.x;
data[id] = 0.0f; // initialization
}
// static alloc
__global__ void sharedMemoryDemo2( )
{
__shared__ int shared_data_static[16];
int id = threadIdx... | #include <hip/hip_runtime.h>
// dynamic alloc
__global__ void sharedMemoryDemo1( )
{
extern __shared__ float shared_data_dynamic[];
float *data = (float*)shared_data_dynamic;
int id = threadIdx.x;
data[id] = 0.0f; // initialization
}
// static alloc
__global__ void sharedMemoryDemo2( )
{
__shared__ int shared_data_st... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
// dynamic alloc
__global__ void sharedMemoryDemo1( )
{
extern __shared__ float shared_data_dynamic[];
float *data = (float*)shared_data_dynamic;
int id = threadIdx.x;
data[id] = 0.0f; // initialization
}
// static alloc
__global__ void sharedMemoryDemo2( )
{
__shared__ int shared_data_st... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17sharedMemoryDemo1v
.globl _Z17sharedMemoryDemo1v
.p2align 8
.type _Z17sharedMemoryDemo1v,@function
_Z17sharedMemoryDemo1v:
v_lshl_add_u32 v0, v0, 2, 0
v_mov_b32_e32 v1, 0
ds_store_b32 v0, v1
s_endpgm
.section .rodata,"a",@progbits
.p2al... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
// dynamic alloc
__global__ void sharedMemoryDemo1( )
{
extern __shared__ float shared_data_dynamic[];
float *data = (float*)shared_data_dynamic;
int id = threadIdx.x;
data[id] = 0.0f; // initialization
}
// static alloc
__global__ void sharedMemoryDemo2( )
{
__shared__ int shared_data_st... | .text
.file "sharedMemoryExample1.hip"
.globl _Z32__device_stub__sharedMemoryDemo1v # -- Begin function _Z32__device_stub__sharedMemoryDemo1v
.p2align 4, 0x90
.type _Z32__device_stub__sharedMemoryDemo1v,@function
_Z32__device_stub__sharedMemoryDemo1v: # @_Z32__device_stub__sharedMemoryDemo1v
.cfi_startproc
# %bb.0:
su... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z17sharedMemoryDemo2v
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ EXIT ; /* 0x000000000000794d */
/* 0x000fea0003800000 */
/*0020*/ BRA 0x... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17sharedMemoryDemo1v
.globl _Z17sharedMemoryDemo1v
.p2align 8
.type _Z17sharedMemoryDemo1v,@function
_Z17sharedMemoryDemo1v:
v_lshl_add_u32 v0, v0, 2, 0
v_mov_b32_e32 v1, 0
ds_store_b32 v0, v1
s_endpgm
.section .rodata,"a",@progbits
.p2al... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000bfc99_00000000-6_sharedMemoryExample1.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
a... | .text
.file "sharedMemoryExample1.hip"
.globl _Z32__device_stub__sharedMemoryDemo1v # -- Begin function _Z32__device_stub__sharedMemoryDemo1v
.p2align 4, 0x90
.type _Z32__device_stub__sharedMemoryDemo1v,@function
_Z32__device_stub__sharedMemoryDemo1v: # @_Z32__device_stub__sharedMemoryDemo1v
.cfi_startproc
# %bb.0:
su... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | // Jin Pyo Jeon
// Assign 7
#include <cuda.h>
#include <stdlib.h>
#include <time.h>
#include <stdio.h>
#include <math.h>
#include <assert.h>
#define T 1024 // Shared needs to be known at compile time??
#define B 65536
#define TB (B / T)
#define N (134217728)
// Times for Reduced and non-reduced dot product
// N Reduced... | code for sm_80
Function : _Z14apply_partialsPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e280000002500 */
/... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | // Jin Pyo Jeon
// Assign 7
#include <cuda.h>
#include <stdlib.h>
#include <time.h>
#include <stdio.h>
#include <math.h>
#include <assert.h>
#define T 1024 // Shared needs to be known at compile time??
#define B 65536
#define TB (B / T)
#define N (134217728)
// Times for Reduced and non-reduced dot product
// N Reduced... | .file "tmpxft_00182c67_00000000-6_hpscan.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2066:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | // Jin Pyo Jeon
// Assign 7
#include <cuda.h>
#include <stdlib.h>
#include <time.h>
#include <stdio.h>
#include <math.h>
#include <assert.h>
#define T 1024 // Shared needs to be known at compile time??
#define B 65536
#define TB (B / T)
#define N (134217728)
// Times for Reduced and non-reduced dot product
// N Reduced... | // Jin Pyo Jeon
// Assign 7
#include <hip/hip_runtime.h>
#include <stdlib.h>
#include <time.h>
#include <stdio.h>
#include <math.h>
#include <assert.h>
#define T 1024 // Shared needs to be known at compile time??
#define B 65536
#define TB (B / T)
#define N (134217728)
// Times for Reduced and non-reduced dot product
/... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | // Jin Pyo Jeon
// Assign 7
#include <hip/hip_runtime.h>
#include <stdlib.h>
#include <time.h>
#include <stdio.h>
#include <math.h>
#include <assert.h>
#define T 1024 // Shared needs to be known at compile time??
#define B 65536
#define TB (B / T)
#define N (134217728)
// Times for Reduced and non-reduced dot product
/... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17generate_partialsPiS_S_
.globl _Z17generate_partialsPiS_S_
.p2align 8
.type _Z17generate_partialsPiS_S_,@function
_Z17generate_partialsPiS_S_:
s_load_b32 s2, s[0:1], 0x24
s_mov_b32 s4, s15
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_delay... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | // Jin Pyo Jeon
// Assign 7
#include <hip/hip_runtime.h>
#include <stdlib.h>
#include <time.h>
#include <stdio.h>
#include <math.h>
#include <assert.h>
#define T 1024 // Shared needs to be known at compile time??
#define B 65536
#define TB (B / T)
#define N (134217728)
// Times for Reduced and non-reduced dot product
/... | .text
.file "hpscan.hip"
.globl _Z32__device_stub__generate_partialsPiS_S_ # -- Begin function _Z32__device_stub__generate_partialsPiS_S_
.p2align 4, 0x90
.type _Z32__device_stub__generate_partialsPiS_S_,@function
_Z32__device_stub__generate_partialsPiS_S_: # @_Z32__device_stub__generate_partialsPiS_S_
.cfi_startproc
#... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z14apply_partialsPiS_
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R2, SR_CTAID.X ; /* 0x0000000000027919 */
/* 0x000e280000002500 */
/... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17generate_partialsPiS_S_
.globl _Z17generate_partialsPiS_S_
.p2align 8
.type _Z17generate_partialsPiS_S_,@function
_Z17generate_partialsPiS_S_:
s_load_b32 s2, s[0:1], 0x24
s_mov_b32 s4, s15
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0xffff
s_delay... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00182c67_00000000-6_hpscan.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2066:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "hpscan.hip"
.globl _Z32__device_stub__generate_partialsPiS_S_ # -- Begin function _Z32__device_stub__generate_partialsPiS_S_
.p2align 4, 0x90
.type _Z32__device_stub__generate_partialsPiS_S_,@function
_Z32__device_stub__generate_partialsPiS_S_: # @_Z32__device_stub__generate_partialsPiS_S_
.cfi_startproc
#... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include <bits/stdc++.h>
#include <cuda_runtime.h>
using namespace std;
void initialize(int *A, int N) {
for (int i = 0; i < N; i++)
A[i] = (rand()%10 + 1);
}
__global__ void get_stats(int *A, int *min, int *max, int *sum, int *square_sum, int N) {
int index = threadIdx.x;
if (index < N) {
atomicMin(min, A[index]);
ato... | code for sm_80
Function : _Z7get_maxPiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e240000002... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include <bits/stdc++.h>
#include <cuda_runtime.h>
using namespace std;
void initialize(int *A, int N) {
for (int i = 0; i < N; i++)
A[i] = (rand()%10 + 1);
}
__global__ void get_stats(int *A, int *min, int *max, int *sum, int *square_sum, int N) {
int index = threadIdx.x;
if (index < N) {
atomicMin(min, A[index]);
ato... | .file "tmpxft_0015caca_00000000-6_problem-5.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10863:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cud... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include <bits/stdc++.h>
#include <cuda_runtime.h>
using namespace std;
void initialize(int *A, int N) {
for (int i = 0; i < N; i++)
A[i] = (rand()%10 + 1);
}
__global__ void get_stats(int *A, int *min, int *max, int *sum, int *square_sum, int N) {
int index = threadIdx.x;
if (index < N) {
atomicMin(min, A[index]);
ato... | #include <bits/stdc++.h>
#include <hip/hip_runtime.h>
using namespace std;
void initialize(int *A, int N) {
for (int i = 0; i < N; i++)
A[i] = (rand()%10 + 1);
}
__global__ void get_stats(int *A, int *min, int *max, int *sum, int *square_sum, int N) {
int index = threadIdx.x;
if (index < N) {
atomicMin(min, A[index]);
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <bits/stdc++.h>
#include <hip/hip_runtime.h>
using namespace std;
void initialize(int *A, int N) {
for (int i = 0; i < N; i++)
A[i] = (rand()%10 + 1);
}
__global__ void get_stats(int *A, int *min, int *max, int *sum, int *square_sum, int N) {
int index = threadIdx.x;
if (index < N) {
atomicMin(min, A[index]);
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9get_statsPiS_S_S_S_i
.globl _Z9get_statsPiS_S_S_S_i
.p2align 8
.type _Z9get_statsPiS_S_S_S_i,@function
_Z9get_statsPiS_S_S_S_i:
s_load_b32 s2, s[0:1], 0x28
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <bits/stdc++.h>
#include <hip/hip_runtime.h>
using namespace std;
void initialize(int *A, int N) {
for (int i = 0; i < N; i++)
A[i] = (rand()%10 + 1);
}
__global__ void get_stats(int *A, int *min, int *max, int *sum, int *square_sum, int N) {
int index = threadIdx.x;
if (index < N) {
atomicMin(min, A[index]);
... | .text
.file "problem-5.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z10initializePii # -- Begin function _Z10initializePii
.p2align 4, 0x90
.type _Z10... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z7get_maxPiS_i
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R2, SR_TID.X ; /* 0x0000000000027919 */
/* 0x000e240000002... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9get_statsPiS_S_S_S_i
.globl _Z9get_statsPiS_S_S_S_i
.p2align 8
.type _Z9get_statsPiS_S_S_S_i,@function
_Z9get_statsPiS_S_S_S_i:
s_load_b32 s2, s[0:1], 0x28
s_waitcnt lgkmcnt(0)
v_cmp_gt_i32_e32 vcc_lo, s2, v0
s_and_saveexec_b32 s2, vcc_lo
... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_0015caca_00000000-6_problem-5.cudafe1.cpp"
.text
#APP
.globl _ZSt21ios_base_library_initv
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB10863:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cud... | .text
.file "problem-5.hip"
# Start of file scope inline assembly
.globl _ZSt21ios_base_library_initv
# End of file scope inline assembly
.globl _Z10initializePii # -- Begin function _Z10initializePii
.p2align 4, 0x90
.type _Z10... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "includes.h"
__global__ void TgvUpdateDualVariablesTGVKernel(float* u_, float2 *v_, float alpha0, float alpha1, float sigma, float eta_p, float eta_q, float* a, float* b, float*c, float4* grad_v, float2* p, float4* q, int width, int height, int stride)
{
int iy = blockIdx.y * blockDim.y + threadIdx.y; // curre... | .file "tmpxft_00047457_00000000-6_TgvUpdateDualVariablesTGVKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatB... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "includes.h"
__global__ void TgvUpdateDualVariablesTGVKernel(float* u_, float2 *v_, float alpha0, float alpha1, float sigma, float eta_p, float eta_q, float* a, float* b, float*c, float4* grad_v, float2* p, float4* q, int width, int height, int stride)
{
int iy = blockIdx.y * blockDim.y + threadIdx.y; // curre... | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void TgvUpdateDualVariablesTGVKernel(float* u_, float2 *v_, float alpha0, float alpha1, float sigma, float eta_p, float eta_q, float* a, float* b, float*c, float4* grad_v, float2* p, float4* q, int width, int height, int stride)
{
int iy = blockIdx.y * block... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void TgvUpdateDualVariablesTGVKernel(float* u_, float2 *v_, float alpha0, float alpha1, float sigma, float eta_p, float eta_q, float* a, float* b, float*c, float4* grad_v, float2* p, float4* q, int width, int height, int stride)
{
int iy = blockIdx.y * block... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z31TgvUpdateDualVariablesTGVKernelPfP15HIP_vector_typeIfLj2EEfffffS_S_S_PS0_IfLj4EES2_S4_iii
.globl _Z31TgvUpdateDualVariablesTGVKernelPfP15HIP_vector_typeIfLj2EEfffffS_S_S_PS0_IfLj4EES2_S4_iii
.p2align 8
.type _Z31TgvUpdateDualVariablesTGVKernelPfP15HIP_ve... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
#include "includes.h"
__global__ void TgvUpdateDualVariablesTGVKernel(float* u_, float2 *v_, float alpha0, float alpha1, float sigma, float eta_p, float eta_q, float* a, float* b, float*c, float4* grad_v, float2* p, float4* q, int width, int height, int stride)
{
int iy = blockIdx.y * block... | .text
.file "TgvUpdateDualVariablesTGVKernel.hip"
.globl _Z46__device_stub__TgvUpdateDualVariablesTGVKernelPfP15HIP_vector_typeIfLj2EEfffffS_S_S_PS0_IfLj4EES2_S4_iii # -- Begin function _Z46__device_stub__TgvUpdateDualVariablesTGVKernelPfP15HIP_vector_typeIfLj2EEfffffS_S_S_PS0_IfLj4EES2_S4_iii
.p2align 4, 0x90
.type _Z... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_00047457_00000000-6_TgvUpdateDualVariablesTGVKernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2029:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatB... | .text
.file "TgvUpdateDualVariablesTGVKernel.hip"
.globl _Z46__device_stub__TgvUpdateDualVariablesTGVKernelPfP15HIP_vector_typeIfLj2EEfffffS_S_S_PS0_IfLj4EES2_S4_iii # -- Begin function _Z46__device_stub__TgvUpdateDualVariablesTGVKernelPfP15HIP_vector_typeIfLj2EEfffffS_S_S_PS0_IfLj4EES2_S4_iii
.p2align 4, 0x90
.type _Z... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | /******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
// Define your kernels in this file you may use m... | code for sm_80
Function : _Z12Histo_KernelPjS_jj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e22... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | /******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
// Define your kernels in this file you may use m... | .file "tmpxft_000fa554_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | /******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
// Define your kernels in this file you may use m... | #include <hip/hip_runtime.h>
/******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
// Define your kerne... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include <hip/hip_runtime.h>
/******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
// Define your kerne... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12Histo_KernelPjS_jj
.globl _Z12Histo_KernelPjS_jj
.p2align 8
.type _Z12Histo_KernelPjS_jj,@function
_Z12Histo_KernelPjS_jj:
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x14
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include <hip/hip_runtime.h>
/******************************************************************************
*cr
*cr (C) Copyright 2010 The Board of Trustees of the
*cr University of Illinois
*cr All Rights Reserved
*cr
******************************************************************************/
// Define your kerne... | .text
.file "kernel.hip"
.globl _Z27__device_stub__Histo_KernelPjS_jj # -- Begin function _Z27__device_stub__Histo_KernelPjS_jj
.p2align 4, 0x90
.type _Z27__device_stub__Histo_KernelPjS_jj,@function
_Z27__device_stub__Histo_KernelPjS_jj: # @_Z27__device_stub__Histo_KernelPjS_jj
.cfi_startproc
# %bb.0:
subq $120, %rsp
... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z12Histo_KernelPjS_jj
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ; /* 0x00000a00ff017624 */
/* 0x000fe400078e00ff */
/*0010*/ S2R R0, SR_TID.X ; /* 0x0000000000007919 */
/* 0x000e22... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12Histo_KernelPjS_jj
.globl _Z12Histo_KernelPjS_jj
.p2align 8
.type _Z12Histo_KernelPjS_jj,@function
_Z12Histo_KernelPjS_jj:
s_clause 0x1
s_load_b64 s[4:5], s[0:1], 0x14
s_load_b32 s2, s[0:1], 0x24
s_waitcnt lgkmcnt(0)
s_and_b32 s3, s2, 0... |
You are a helpful coding assistant specialized in converting from CUDA host assembly to AMD host assembly. | .file "tmpxft_000fa554_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2030:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... | .text
.file "kernel.hip"
.globl _Z27__device_stub__Histo_KernelPjS_jj # -- Begin function _Z27__device_stub__Histo_KernelPjS_jj
.p2align 4, 0x90
.type _Z27__device_stub__Histo_KernelPjS_jj,@function
_Z27__device_stub__Histo_KernelPjS_jj: # @_Z27__device_stub__Histo_KernelPjS_jj
.cfi_startproc
# %bb.0:
subq $120, %rsp
... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA device assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
const int iTileSize = 2;
__global__ void matrixMultiplyKernel(float *A, float *B, float *C,
int m, int n, int k)
{
int Row = threadIdx.y + blockDim.y * blockIdx.y;
int Col = threadIdx.x + blockDim.x * blockIdx.x;
if(R... | code for sm_80
Function : _Z20matrixMultiplyKernelPfS_S_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000... |
You are a helpful coding assistant specialized in converting CUDA source code to CUDA host assembly. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
const int iTileSize = 2;
__global__ void matrixMultiplyKernel(float *A, float *B, float *C,
int m, int n, int k)
{
int Row = threadIdx.y + blockDim.y * blockIdx.y;
int Col = threadIdx.x + blockDim.x * blockIdx.x;
if(R... | .file "tmpxft_0018159c_00000000-6_kernel.cudafe1.cpp"
.text
#APP
#NO_APP
.type _ZL26__cudaUnregisterBinaryUtilv, @function
_ZL26__cudaUnregisterBinaryUtilv:
.LFB2061:
.cfi_startproc
endbr64
subq $8, %rsp
.cfi_def_cfa_offset 16
movq _ZL20__cudaFatCubinHandle(%rip), %rdi
call __cudaUnregisterFatBinary@PLT
addq $8, %rsp
.... |
You are a helpful coding assistant specialized in converting CUDA source code to HIP/AMD source code. | #include "cuda_runtime.h"
#include "device_launch_parameters.h"
#include <stdio.h>
#include <stdlib.h>
const int iTileSize = 2;
__global__ void matrixMultiplyKernel(float *A, float *B, float *C,
int m, int n, int k)
{
int Row = threadIdx.y + blockDim.y * blockIdx.y;
int Col = threadIdx.x + blockDim.x * blockIdx.x;
if(R... | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
const int iTileSize = 2;
__global__ void matrixMultiplyKernel(float *A, float *B, float *C,
int m, int n, int k)
{
int Row = threadIdx.y + blockDim.y * blockIdx.y;
int Col = threadIdx.x + blockDim.x * blockIdx.x;
if(Row <m && Col <k){
float CValue = 0.... |
You are a helpful coding assistant specialized in converting HIP source code to AMD device assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
const int iTileSize = 2;
__global__ void matrixMultiplyKernel(float *A, float *B, float *C,
int m, int n, int k)
{
int Row = threadIdx.y + blockDim.y * blockIdx.y;
int Col = threadIdx.x + blockDim.x * blockIdx.x;
if(Row <m && Col <k){
float CValue = 0.... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20matrixMultiplyKernelPfS_S_iii
.globl _Z20matrixMultiplyKernelPfS_S_iii
.p2align 8
.type _Z20matrixMultiplyKernelPfS_S_iii,@function
_Z20matrixMultiplyKernelPfS_S_iii:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x34
s_load_b32 s4, s[0:1], 0x18
s_load_b32 s... |
You are a helpful coding assistant specialized in converting HIP source code to AMD host assembly. | #include "hip/hip_runtime.h"
#include <stdio.h>
#include <stdlib.h>
const int iTileSize = 2;
__global__ void matrixMultiplyKernel(float *A, float *B, float *C,
int m, int n, int k)
{
int Row = threadIdx.y + blockDim.y * blockIdx.y;
int Col = threadIdx.x + blockDim.x * blockIdx.x;
if(Row <m && Col <k){
float CValue = 0.... | .text
.file "kernel.hip"
.globl _Z35__device_stub__matrixMultiplyKernelPfS_S_iii # -- Begin function _Z35__device_stub__matrixMultiplyKernelPfS_S_iii
.p2align 4, 0x90
.type _Z35__device_stub__matrixMultiplyKernelPfS_S_iii,@function
_Z35__device_stub__matrixMultiplyKernelPfS_S_iii: # @_Z35__device_stub__matrixMultiplyKe... |
You are a helpful coding assistant specialized in converting from CUDA device assembly to AMD device assembly. | code for sm_80
Function : _Z20matrixMultiplyKernelPfS_S_iii
.headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM80 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM80)"
/*0000*/ MOV R1, c[0x0][0x28] ; /* 0x00000a0000017a02 */
/* 0x000fe40000000f00 */
/*0010*/ S2R R0, SR_CTAID.X ; /* 0x0000000000007919 */
/* 0x000e280000... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20matrixMultiplyKernelPfS_S_iii
.globl _Z20matrixMultiplyKernelPfS_S_iii
.p2align 8
.type _Z20matrixMultiplyKernelPfS_S_iii,@function
_Z20matrixMultiplyKernelPfS_S_iii:
s_clause 0x2
s_load_b32 s2, s[0:1], 0x34
s_load_b32 s4, s[0:1], 0x18
s_load_b32 s... |
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