code stringlengths 35 6.69k | score float64 6.5 11.5 |
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module sky130_fd_sc_hdll__a211o (
X,
A1,
A2,
B1,
C1
);
// Module ports
output X;
input A1;
input A2;
input B1;
input C1;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire and0_out;
wire or0_out_X;
// Name Output Oth... | 7.212805 |
module sky130_fd_sc_hdll__a211o (
X,
A1,
A2,
B1,
C1
);
output X;
input A1;
input A2;
input B1;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a211o (
X,
A1,
A2,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A1;
input A2;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out;
wire or0_out_X;
wire pwrgood_pp0_... | 7.212805 |
module sky130_fd_sc_hdll__a211o (
X,
A1,
A2,
B1,
C1
);
// Module ports
output X;
input A1;
input A2;
input B1;
input C1;
// Local signals
wire and0_out;
wire or0_out_X;
// Name Output Other arguments
and and0 (and0_out, A1, A2);
or or0 (or0_out_X, and0_out, C1, B1);
... | 7.212805 |
module sky130_fd_sc_hdll__a211o (
X,
A1,
A2,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a211o (
//# {{data|Data Signals}}
input A1,
input A2,
input B1,
input C1,
output X,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a211o (
//# {{data|Data Signals}}
input A1,
input A2,
input B1,
input C1,
output X
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a211oi (
Y,
A1,
A2,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out;
wire nor0_out_Y;
wire pwrgood_pp... | 7.212805 |
module sky130_fd_sc_hdll__a211oi (
Y,
A1,
A2,
B1,
C1
);
// Module ports
output Y;
input A1;
input A2;
input B1;
input C1;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire and0_out;
wire nor0_out_Y;
// Name Output ... | 7.212805 |
module sky130_fd_sc_hdll__a211oi (
Y,
A1,
A2,
B1,
C1
);
output Y;
input A1;
input A2;
input B1;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a211oi (
Y,
A1,
A2,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out;
wire nor0_out_Y;
wire pwrgood_pp... | 7.212805 |
module sky130_fd_sc_hdll__a211oi (
Y,
A1,
A2,
B1,
C1
);
// Module ports
output Y;
input A1;
input A2;
input B1;
input C1;
// Local signals
wire and0_out;
wire nor0_out_Y;
// Name Output Other arguments
and and0 (and0_out, A1, A2);
nor nor0 (nor0_out_Y, and0_out, B1,... | 7.212805 |
module sky130_fd_sc_hdll__a211oi (
Y,
A1,
A2,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a211oi (
//# {{data|Data Signals}}
input A1,
input A2,
input B1,
input C1,
output Y,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a211oi (
//# {{data|Data Signals}}
input A1,
input A2,
input B1,
input C1,
output Y
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a211oi_1 (
Y,
A1,
A2,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a211oi base (
.Y(Y),
.A1(A1),
.A2(A2),
.B1(B... | 7.212805 |
module sky130_fd_sc_hdll__a211oi_1 (
Y,
A1,
A2,
B1,
C1
);
output Y;
input A1;
input A2;
input B1;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a211oi base (
.Y (Y),
.A1(A1),
.A2(A2),
.B1(... | 7.212805 |
module sky130_fd_sc_hdll__a211oi_2 (
Y,
A1,
A2,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a211oi base (
.Y(Y),
.A1(A1),
.A2(A2),
.B1(B... | 7.212805 |
module sky130_fd_sc_hdll__a211oi_2 (
Y,
A1,
A2,
B1,
C1
);
output Y;
input A1;
input A2;
input B1;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a211oi base (
.Y (Y),
.A1(A1),
.A2(A2),
.B1(... | 7.212805 |
module sky130_fd_sc_hdll__a211oi_4 (
Y,
A1,
A2,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a211oi base (
.Y(Y),
.A1(A1),
.A2(A2),
.B1(B... | 7.212805 |
module sky130_fd_sc_hdll__a211oi_4 (
Y,
A1,
A2,
B1,
C1
);
output Y;
input A1;
input A2;
input B1;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a211oi base (
.Y (Y),
.A1(A1),
.A2(A2),
.B1(... | 7.212805 |
module sky130_fd_sc_hdll__a211o_1 (
X,
A1,
A2,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a211o base (
.X(X),
.A1(A1),
.A2(A2),
.B1(B1)... | 7.212805 |
module sky130_fd_sc_hdll__a211o_1 (
X,
A1,
A2,
B1,
C1
);
output X;
input A1;
input A2;
input B1;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a211o base (
.X (X),
.A1(A1),
.A2(A2),
.B1(B1... | 7.212805 |
module sky130_fd_sc_hdll__a211o_2 (
X,
A1,
A2,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a211o base (
.X(X),
.A1(A1),
.A2(A2),
.B1(B1)... | 7.212805 |
module sky130_fd_sc_hdll__a211o_2 (
X,
A1,
A2,
B1,
C1
);
output X;
input A1;
input A2;
input B1;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a211o base (
.X (X),
.A1(A1),
.A2(A2),
.B1(B1... | 7.212805 |
module sky130_fd_sc_hdll__a211o_4 (
X,
A1,
A2,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a211o base (
.X(X),
.A1(A1),
.A2(A2),
.B1(B1)... | 7.212805 |
module sky130_fd_sc_hdll__a211o_4 (
X,
A1,
A2,
B1,
C1
);
output X;
input A1;
input A2;
input B1;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a211o base (
.X (X),
.A1(A1),
.A2(A2),
.B1(B1... | 7.212805 |
module sky130_fd_sc_hdll__a21bo (
X,
A1,
A2,
B1_N,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A1;
input A2;
input B1_N;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire nand0_out;
wire nand1_out_X;
wire pwrgood_pp0_out_X;
// ... | 7.212805 |
module sky130_fd_sc_hdll__a21bo (
X,
A1,
A2,
B1_N
);
// Module ports
output X;
input A1;
input A2;
input B1_N;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire nand0_out;
wire nand1_out_X;
// Name Output Other argume... | 7.212805 |
module sky130_fd_sc_hdll__a21bo (
X,
A1,
A2,
B1_N
);
output X;
input A1;
input A2;
input B1_N;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21bo (
X,
A1,
A2,
B1_N,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A1;
input A2;
input B1_N;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire nand0_out;
wire nand1_out_X;
wire pwrgood_pp0_out_X;
// ... | 7.212805 |
module sky130_fd_sc_hdll__a21bo (
X,
A1,
A2,
B1_N
);
// Module ports
output X;
input A1;
input A2;
input B1_N;
// Local signals
wire nand0_out;
wire nand1_out_X;
// Name Output Other arguments
nand nand0 (nand0_out, A2, A1);
nand nand1 (nand1_out_X, B1_N, nand0_out);
... | 7.212805 |
module sky130_fd_sc_hdll__a21bo (
X,
A1,
A2,
B1_N,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input B1_N;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21bo (
//# {{data|Data Signals}}
input A1,
input A2,
input B1_N,
output X,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21bo (
//# {{data|Data Signals}}
input A1,
input A2,
input B1_N,
output X
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21boi (
Y,
A1,
A2,
B1_N,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input B1_N;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire b;
wire and0_out;
wire nor0_out_Y;
wire pwrgood_pp0_out_... | 7.212805 |
module sky130_fd_sc_hdll__a21boi (
Y,
A1,
A2,
B1_N
);
// Module ports
output Y;
input A1;
input A2;
input B1_N;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire b;
wire and0_out;
wire nor0_out_Y;
// Name Output ... | 7.212805 |
module sky130_fd_sc_hdll__a21boi (
Y,
A1,
A2,
B1_N
);
output Y;
input A1;
input A2;
input B1_N;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21boi (
Y,
A1,
A2,
B1_N,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input B1_N;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire b;
wire and0_out;
wire nor0_out_Y;
wire pwrgood_pp0_out_... | 7.212805 |
module sky130_fd_sc_hdll__a21boi (
Y,
A1,
A2,
B1_N
);
// Module ports
output Y;
input A1;
input A2;
input B1_N;
// Local signals
wire b;
wire and0_out;
wire nor0_out_Y;
// Name Output Other arguments
not not0 (b, B1_N);
and and0 (and0_out, A1, A2);
nor nor0 (nor0_out_... | 7.212805 |
module sky130_fd_sc_hdll__a21boi (
Y,
A1,
A2,
B1_N,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input B1_N;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21boi (
//# {{data|Data Signals}}
input A1,
input A2,
input B1_N,
output Y,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21boi (
//# {{data|Data Signals}}
input A1,
input A2,
input B1_N,
output Y
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21boi_1 (
Y,
A1,
A2,
B1_N,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input B1_N;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a21boi base (
.Y(Y),
.A1(A1),
.A2(A2),
.B1_N(B1_N),
.V... | 7.212805 |
module sky130_fd_sc_hdll__a21boi_1 (
Y,
A1,
A2,
B1_N
);
output Y;
input A1;
input A2;
input B1_N;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a21boi base (
.Y(Y),
.A1(A1),
.A2(A2),
.B1_N(B1_N)
);
end... | 7.212805 |
module sky130_fd_sc_hdll__a21boi_2 (
Y,
A1,
A2,
B1_N,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input B1_N;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a21boi base (
.Y(Y),
.A1(A1),
.A2(A2),
.B1_N(B1_N),
.V... | 7.212805 |
module sky130_fd_sc_hdll__a21boi_2 (
Y,
A1,
A2,
B1_N
);
output Y;
input A1;
input A2;
input B1_N;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a21boi base (
.Y(Y),
.A1(A1),
.A2(A2),
.B1_N(B1_N)
);
end... | 7.212805 |
module sky130_fd_sc_hdll__a21boi_4 (
Y,
A1,
A2,
B1_N,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input B1_N;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a21boi base (
.Y(Y),
.A1(A1),
.A2(A2),
.B1_N(B1_N),
.V... | 7.212805 |
module sky130_fd_sc_hdll__a21boi_4 (
Y,
A1,
A2,
B1_N
);
output Y;
input A1;
input A2;
input B1_N;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a21boi base (
.Y(Y),
.A1(A1),
.A2(A2),
.B1_N(B1_N)
);
end... | 7.212805 |
module sky130_fd_sc_hdll__a21bo_1 (
X,
A1,
A2,
B1_N,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input B1_N;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a21bo base (
.X(X),
.A1(A1),
.A2(A2),
.B1_N(B1_N),
.VPW... | 7.212805 |
module sky130_fd_sc_hdll__a21bo_1 (
X,
A1,
A2,
B1_N
);
output X;
input A1;
input A2;
input B1_N;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a21bo base (
.X(X),
.A1(A1),
.A2(A2),
.B1_N(B1_N)
);
endmo... | 7.212805 |
module sky130_fd_sc_hdll__a21bo_2 (
X,
A1,
A2,
B1_N,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input B1_N;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a21bo base (
.X(X),
.A1(A1),
.A2(A2),
.B1_N(B1_N),
.VPW... | 7.212805 |
module sky130_fd_sc_hdll__a21bo_2 (
X,
A1,
A2,
B1_N
);
output X;
input A1;
input A2;
input B1_N;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a21bo base (
.X(X),
.A1(A1),
.A2(A2),
.B1_N(B1_N)
);
endmo... | 7.212805 |
module sky130_fd_sc_hdll__a21bo_4 (
X,
A1,
A2,
B1_N,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input B1_N;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a21bo base (
.X(X),
.A1(A1),
.A2(A2),
.B1_N(B1_N),
.VPW... | 7.212805 |
module sky130_fd_sc_hdll__a21bo_4 (
X,
A1,
A2,
B1_N
);
output X;
input A1;
input A2;
input B1_N;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a21bo base (
.X(X),
.A1(A1),
.A2(A2),
.B1_N(B1_N)
);
endmo... | 7.212805 |
module sky130_fd_sc_hdll__a21o (
X,
A1,
A2,
B1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A1;
input A2;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out;
wire or0_out_X;
wire pwrgood_pp0_out_X;
// ... | 7.212805 |
module sky130_fd_sc_hdll__a21o (
X,
A1,
A2,
B1
);
// Module ports
output X;
input A1;
input A2;
input B1;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire and0_out;
wire or0_out_X;
// Name Output Other arguments
and an... | 7.212805 |
module sky130_fd_sc_hdll__a21o (
X,
A1,
A2,
B1
);
output X;
input A1;
input A2;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21o (
X,
A1,
A2,
B1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A1;
input A2;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out;
wire or0_out_X;
wire pwrgood_pp0_out_X;
// ... | 7.212805 |
module sky130_fd_sc_hdll__a21o (
X,
A1,
A2,
B1
);
// Module ports
output X;
input A1;
input A2;
input B1;
// Local signals
wire and0_out;
wire or0_out_X;
// Name Output Other arguments
and and0 (and0_out, A1, A2);
or or0 (or0_out_X, and0_out, B1);
buf buf0 (X, or0_out_X)... | 7.212805 |
module sky130_fd_sc_hdll__a21o (
X,
A1,
A2,
B1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21o (
//# {{data|Data Signals}}
input A1,
input A2,
input B1,
output X,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21o (
//# {{data|Data Signals}}
input A1,
input A2,
input B1,
output X
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21oi (
Y,
A1,
A2,
B1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out;
wire nor0_out_Y;
wire pwrgood_pp0_out_Y;
// ... | 7.212805 |
module sky130_fd_sc_hdll__a21oi (
Y,
A1,
A2,
B1
);
// Module ports
output Y;
input A1;
input A2;
input B1;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire and0_out;
wire nor0_out_Y;
// Name Output Other arguments
and... | 7.212805 |
module sky130_fd_sc_hdll__a21oi (
Y,
A1,
A2,
B1
);
output Y;
input A1;
input A2;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21oi (
Y,
A1,
A2,
B1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out;
wire nor0_out_Y;
wire pwrgood_pp0_out_Y;
// ... | 7.212805 |
module sky130_fd_sc_hdll__a21oi (
Y,
A1,
A2,
B1
);
// Module ports
output Y;
input A1;
input A2;
input B1;
// Local signals
wire and0_out;
wire nor0_out_Y;
// Name Output Other arguments
and and0 (and0_out, A1, A2);
nor nor0 (nor0_out_Y, B1, and0_out);
buf buf0 (Y, nor0... | 7.212805 |
module sky130_fd_sc_hdll__a21oi (
Y,
A1,
A2,
B1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21oi (
//# {{data|Data Signals}}
input A1,
input A2,
input B1,
output Y,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21oi (
//# {{data|Data Signals}}
input A1,
input A2,
input B1,
output Y
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21oi_1 (
Y,
A1,
A2,
B1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a21oi base (
.Y(Y),
.A1(A1),
.A2(A2),
.B1(B1),
.VPWR(VPWR),... | 7.212805 |
module sky130_fd_sc_hdll__a21oi_1 (
Y,
A1,
A2,
B1
);
output Y;
input A1;
input A2;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a21oi base (
.Y (Y),
.A1(A1),
.A2(A2),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21oi_2 (
Y,
A1,
A2,
B1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a21oi base (
.Y(Y),
.A1(A1),
.A2(A2),
.B1(B1),
.VPWR(VPWR),... | 7.212805 |
module sky130_fd_sc_hdll__a21oi_2 (
Y,
A1,
A2,
B1
);
output Y;
input A1;
input A2;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a21oi base (
.Y (Y),
.A1(A1),
.A2(A2),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21oi_4 (
Y,
A1,
A2,
B1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a21oi base (
.Y(Y),
.A1(A1),
.A2(A2),
.B1(B1),
.VPWR(VPWR),... | 7.212805 |
module sky130_fd_sc_hdll__a21oi_4 (
Y,
A1,
A2,
B1
);
output Y;
input A1;
input A2;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a21oi base (
.Y (Y),
.A1(A1),
.A2(A2),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21o_1 (
X,
A1,
A2,
B1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a21o base (
.X(X),
.A1(A1),
.A2(A2),
.B1(B1),
.VPWR(VPWR),
... | 7.212805 |
module sky130_fd_sc_hdll__a21o_1 (
X,
A1,
A2,
B1
);
output X;
input A1;
input A2;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a21o base (
.X (X),
.A1(A1),
.A2(A2),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21o_2 (
X,
A1,
A2,
B1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a21o base (
.X(X),
.A1(A1),
.A2(A2),
.B1(B1),
.VPWR(VPWR),
... | 7.212805 |
module sky130_fd_sc_hdll__a21o_2 (
X,
A1,
A2,
B1
);
output X;
input A1;
input A2;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a21o base (
.X (X),
.A1(A1),
.A2(A2),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21o_4 (
X,
A1,
A2,
B1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a21o base (
.X(X),
.A1(A1),
.A2(A2),
.B1(B1),
.VPWR(VPWR),
... | 7.212805 |
module sky130_fd_sc_hdll__a21o_4 (
X,
A1,
A2,
B1
);
output X;
input A1;
input A2;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a21o base (
.X (X),
.A1(A1),
.A2(A2),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21o_6 (
X,
A1,
A2,
B1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a21o base (
.X(X),
.A1(A1),
.A2(A2),
.B1(B1),
.VPWR(VPWR),
... | 7.212805 |
module sky130_fd_sc_hdll__a21o_6 (
X,
A1,
A2,
B1
);
output X;
input A1;
input A2;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a21o base (
.X (X),
.A1(A1),
.A2(A2),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a21o_8 (
X,
A1,
A2,
B1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a21o base (
.X(X),
.A1(A1),
.A2(A2),
.B1(B1),
.VPWR(VPWR),
... | 7.212805 |
module sky130_fd_sc_hdll__a21o_8 (
X,
A1,
A2,
B1
);
output X;
input A1;
input A2;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a21o base (
.X (X),
.A1(A1),
.A2(A2),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a221oi (
Y,
A1,
A2,
B1,
B2,
C1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input B1;
input B2;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out;
wire and1_out;... | 7.212805 |
module sky130_fd_sc_hdll__a221oi (
Y,
A1,
A2,
B1,
B2,
C1
);
// Module ports
output Y;
input A1;
input A2;
input B1;
input B2;
input C1;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire and0_out;
wire and1_out;
wire ... | 7.212805 |
module sky130_fd_sc_hdll__a221oi (
Y,
A1,
A2,
B1,
B2,
C1
);
output Y;
input A1;
input A2;
input B1;
input B2;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a221oi (
Y,
A1,
A2,
B1,
B2,
C1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input B1;
input B2;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire and0_out;
wire and1_out;... | 7.212805 |
module sky130_fd_sc_hdll__a221oi (
Y,
A1,
A2,
B1,
B2,
C1
);
// Module ports
output Y;
input A1;
input A2;
input B1;
input B2;
input C1;
// Local signals
wire and0_out;
wire and1_out;
wire nor0_out_Y;
// Name Output Other arguments
and and0 (and0_out, B1, B2);
... | 7.212805 |
module sky130_fd_sc_hdll__a221oi (
Y,
A1,
A2,
B1,
B2,
C1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input B1;
input B2;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a221oi (
//# {{data|Data Signals}}
input A1,
input A2,
input B1,
input B2,
input C1,
output Y,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a221oi (
//# {{data|Data Signals}}
input A1,
input A2,
input B1,
input B2,
input C1,
output Y
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hdll__a221oi_1 (
Y,
A1,
A2,
B1,
B2,
C1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input B1;
input B2;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a221oi base (
.Y(Y),
.A1(A1),
... | 7.212805 |
module sky130_fd_sc_hdll__a221oi_1 (
Y,
A1,
A2,
B1,
B2,
C1
);
output Y;
input A1;
input A2;
input B1;
input B2;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a221oi base (
.Y (Y),
.A1(A1),
... | 7.212805 |
module sky130_fd_sc_hdll__a221oi_2 (
Y,
A1,
A2,
B1,
B2,
C1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input B1;
input B2;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a221oi base (
.Y(Y),
.A1(A1),
... | 7.212805 |
module sky130_fd_sc_hdll__a221oi_2 (
Y,
A1,
A2,
B1,
B2,
C1
);
output Y;
input A1;
input A2;
input B1;
input B2;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hdll__a221oi base (
.Y (Y),
.A1(A1),
... | 7.212805 |
module sky130_fd_sc_hdll__a221oi_4 (
Y,
A1,
A2,
B1,
B2,
C1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input B1;
input B2;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hdll__a221oi base (
.Y(Y),
.A1(A1),
... | 7.212805 |
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