code stringlengths 35 6.69k | score float64 6.5 11.5 |
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module sky130_fd_sc_hd__o311a (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input B1,
input C1,
output X,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311a (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input B1,
input C1,
output X
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311ai (
Y,
A1,
A2,
A3,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire or0_out;
wire nand0_out_Y;
wire pwrgood_pp0_out_Y;
// Name Output Other arguments
or or0 (or0_out, A2, A1, A3);
nand nand0 (nand0_out_Y, C1, or0_out, B1);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_Y,
nand0_out_Y,
VPWR,
VGND
);
buf buf0 (Y, pwrgood_pp0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311ai (
Y,
A1,
A2,
A3,
B1,
C1
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input B1;
input C1;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire or0_out;
wire nand0_out_Y;
// Name Output Other arguments
or or0 (or0_out, A2, A1, A3);
nand nand0 (nand0_out_Y, C1, or0_out, B1);
buf buf0 (Y, nand0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311ai (
Y,
A1,
A2,
A3,
B1,
C1
);
output Y;
input A1;
input A2;
input A3;
input B1;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311ai (
Y,
A1,
A2,
A3,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire or0_out;
wire nand0_out_Y;
wire pwrgood_pp0_out_Y;
// Name Output Other arguments
or or0 (or0_out, A2, A1, A3);
nand nand0 (nand0_out_Y, C1, or0_out, B1);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_Y,
nand0_out_Y,
VPWR,
VGND
);
buf buf0 (Y, pwrgood_pp0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311ai (
Y,
A1,
A2,
A3,
B1,
C1
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input B1;
input C1;
// Local signals
wire or0_out;
wire nand0_out_Y;
// Name Output Other arguments
or or0 (or0_out, A2, A1, A3);
nand nand0 (nand0_out_Y, C1, or0_out, B1);
buf buf0 (Y, nand0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311ai (
Y,
A1,
A2,
A3,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311ai (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input B1,
input C1,
output Y,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311ai (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input B1,
input C1,
output Y
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311ai_0 (
Y,
A1,
A2,
A3,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o311ai base (
.Y(Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.C1(C1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311ai_0 (
Y,
A1,
A2,
A3,
B1,
C1
);
output Y;
input A1;
input A2;
input A3;
input B1;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o311ai base (
.Y (Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.C1(C1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311ai_1 (
Y,
A1,
A2,
A3,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o311ai base (
.Y(Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.C1(C1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311ai_1 (
Y,
A1,
A2,
A3,
B1,
C1
);
output Y;
input A1;
input A2;
input A3;
input B1;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o311ai base (
.Y (Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.C1(C1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311ai_2 (
Y,
A1,
A2,
A3,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o311ai base (
.Y(Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.C1(C1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311ai_2 (
Y,
A1,
A2,
A3,
B1,
C1
);
output Y;
input A1;
input A2;
input A3;
input B1;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o311ai base (
.Y (Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.C1(C1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311ai_4 (
Y,
A1,
A2,
A3,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o311ai base (
.Y(Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.C1(C1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311ai_4 (
Y,
A1,
A2,
A3,
B1,
C1
);
output Y;
input A1;
input A2;
input A3;
input B1;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o311ai base (
.Y (Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.C1(C1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311a_1 (
X,
A1,
A2,
A3,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input A3;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o311a base (
.X(X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.C1(C1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311a_1 (
X,
A1,
A2,
A3,
B1,
C1
);
output X;
input A1;
input A2;
input A3;
input B1;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o311a base (
.X (X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.C1(C1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311a_2 (
X,
A1,
A2,
A3,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input A3;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o311a base (
.X(X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.C1(C1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311a_2 (
X,
A1,
A2,
A3,
B1,
C1
);
output X;
input A1;
input A2;
input A3;
input B1;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o311a base (
.X (X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.C1(C1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311a_4 (
X,
A1,
A2,
A3,
B1,
C1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input A3;
input B1;
input C1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o311a base (
.X(X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.C1(C1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o311a_4 (
X,
A1,
A2,
A3,
B1,
C1
);
output X;
input A1;
input A2;
input A3;
input B1;
input C1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o311a base (
.X (X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.C1(C1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31a (
X,
A1,
A2,
A3,
B1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A1;
input A2;
input A3;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire or0_out;
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
or or0 (or0_out, A2, A1, A3);
and and0 (and0_out_X, or0_out, B1);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31a (
X,
A1,
A2,
A3,
B1
);
// Module ports
output X;
input A1;
input A2;
input A3;
input B1;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB ;
supply0 VNB ;
// Local signals
wire or0_out ;
wire and0_out_X;
// Name Output Other arguments
or or0 (or0_out, A2, A1, A3);
and and0 (and0_out_X, or0_out, B1);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31a (
X,
A1,
A2,
A3,
B1
);
output X;
input A1;
input A2;
input A3;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31a (
X,
A1,
A2,
A3,
B1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A1;
input A2;
input A3;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire or0_out;
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
or or0 (or0_out, A2, A1, A3);
and and0 (and0_out_X, or0_out, B1);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31a (
X,
A1,
A2,
A3,
B1
);
// Module ports
output X;
input A1;
input A2;
input A3;
input B1;
// Local signals
wire or0_out;
wire and0_out_X;
// Name Output Other arguments
or or0 (or0_out, A2, A1, A3);
and and0 (and0_out_X, or0_out, B1);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31a (
X,
A1,
A2,
A3,
B1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input A3;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31a (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input B1,
output X,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31a (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input B1,
output X
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31ai (
Y,
A1,
A2,
A3,
B1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire or0_out;
wire nand0_out_Y;
wire pwrgood_pp0_out_Y;
// Name Output Other arguments
or or0 (or0_out, A2, A1, A3);
nand nand0 (nand0_out_Y, B1, or0_out);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_Y,
nand0_out_Y,
VPWR,
VGND
);
buf buf0 (Y, pwrgood_pp0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31ai (
Y,
A1,
A2,
A3,
B1
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input B1;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire or0_out;
wire nand0_out_Y;
// Name Output Other arguments
or or0 (or0_out, A2, A1, A3);
nand nand0 (nand0_out_Y, B1, or0_out);
buf buf0 (Y, nand0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31ai (
Y,
A1,
A2,
A3,
B1
);
output Y;
input A1;
input A2;
input A3;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31ai (
Y,
A1,
A2,
A3,
B1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire or0_out;
wire nand0_out_Y;
wire pwrgood_pp0_out_Y;
// Name Output Other arguments
or or0 (or0_out, A2, A1, A3);
nand nand0 (nand0_out_Y, B1, or0_out);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_Y,
nand0_out_Y,
VPWR,
VGND
);
buf buf0 (Y, pwrgood_pp0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31ai (
Y,
A1,
A2,
A3,
B1
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input B1;
// Local signals
wire or0_out;
wire nand0_out_Y;
// Name Output Other arguments
or or0 (or0_out, A2, A1, A3);
nand nand0 (nand0_out_Y, B1, or0_out);
buf buf0 (Y, nand0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31ai (
Y,
A1,
A2,
A3,
B1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31ai (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input B1,
output Y,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31ai (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input B1,
output Y
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31ai_1 (
Y,
A1,
A2,
A3,
B1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o31ai base (
.Y(Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31ai_1 (
Y,
A1,
A2,
A3,
B1
);
output Y;
input A1;
input A2;
input A3;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o31ai base (
.Y (Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31ai_2 (
Y,
A1,
A2,
A3,
B1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o31ai base (
.Y(Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31ai_2 (
Y,
A1,
A2,
A3,
B1
);
output Y;
input A1;
input A2;
input A3;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o31ai base (
.Y (Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31ai_4 (
Y,
A1,
A2,
A3,
B1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o31ai base (
.Y(Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31ai_4 (
Y,
A1,
A2,
A3,
B1
);
output Y;
input A1;
input A2;
input A3;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o31ai base (
.Y (Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31a_1 (
X,
A1,
A2,
A3,
B1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input A3;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o31a base (
.X(X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31a_1 (
X,
A1,
A2,
A3,
B1
);
output X;
input A1;
input A2;
input A3;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o31a base (
.X (X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31a_2 (
X,
A1,
A2,
A3,
B1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input A3;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o31a base (
.X(X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31a_2 (
X,
A1,
A2,
A3,
B1
);
output X;
input A1;
input A2;
input A3;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o31a base (
.X (X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31a_4 (
X,
A1,
A2,
A3,
B1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input A3;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o31a base (
.X(X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o31a_4 (
X,
A1,
A2,
A3,
B1
);
output X;
input A1;
input A2;
input A3;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o31a base (
.X (X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32a (
X,
A1,
A2,
A3,
B1,
B2,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A1;
input A2;
input A3;
input B1;
input B2;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire or0_out;
wire or1_out;
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
or or0 (or0_out, A2, A1, A3);
or or1 (or1_out, B2, B1);
and and0 (and0_out_X, or0_out, or1_out);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32a (
X,
A1,
A2,
A3,
B1,
B2
);
// Module ports
output X;
input A1;
input A2;
input A3;
input B1;
input B2;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB ;
supply0 VNB ;
// Local signals
wire or0_out ;
wire or1_out ;
wire and0_out_X;
// Name Output Other arguments
or or0 (or0_out, A2, A1, A3);
or or1 (or1_out, B2, B1);
and and0 (and0_out_X, or0_out, or1_out);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32a (
X,
A1,
A2,
A3,
B1,
B2
);
output X;
input A1;
input A2;
input A3;
input B1;
input B2;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32a (
X,
A1,
A2,
A3,
B1,
B2,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A1;
input A2;
input A3;
input B1;
input B2;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire or0_out;
wire or1_out;
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
or or0 (or0_out, A2, A1, A3);
or or1 (or1_out, B2, B1);
and and0 (and0_out_X, or0_out, or1_out);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32a (
X,
A1,
A2,
A3,
B1,
B2
);
// Module ports
output X;
input A1;
input A2;
input A3;
input B1;
input B2;
// Local signals
wire or0_out;
wire or1_out;
wire and0_out_X;
// Name Output Other arguments
or or0 (or0_out, A2, A1, A3);
or or1 (or1_out, B2, B1);
and and0 (and0_out_X, or0_out, or1_out);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32a (
X,
A1,
A2,
A3,
B1,
B2,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input A3;
input B1;
input B2;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32a (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input B1,
input B2,
output X,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32a (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input B1,
input B2,
output X
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32ai (
Y,
A1,
A2,
A3,
B1,
B2,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input B1;
input B2;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire nor0_out;
wire nor1_out;
wire or0_out_Y;
wire pwrgood_pp0_out_Y;
// Name Output Other arguments
nor nor0 (nor0_out, A3, A1, A2);
nor nor1 (nor1_out, B1, B2);
or or0 (or0_out_Y, nor1_out, nor0_out);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_Y,
or0_out_Y,
VPWR,
VGND
);
buf buf0 (Y, pwrgood_pp0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32ai (
Y,
A1,
A2,
A3,
B1,
B2
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input B1;
input B2;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire nor0_out;
wire nor1_out;
wire or0_out_Y;
// Name Output Other arguments
nor nor0 (nor0_out, A3, A1, A2);
nor nor1 (nor1_out, B1, B2);
or or0 (or0_out_Y, nor1_out, nor0_out);
buf buf0 (Y, or0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32ai (
Y,
A1,
A2,
A3,
B1,
B2
);
output Y;
input A1;
input A2;
input A3;
input B1;
input B2;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32ai (
Y,
A1,
A2,
A3,
B1,
B2,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input B1;
input B2;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire nor0_out;
wire nor1_out;
wire or0_out_Y;
wire pwrgood_pp0_out_Y;
// Name Output Other arguments
nor nor0 (nor0_out, A3, A1, A2);
nor nor1 (nor1_out, B1, B2);
or or0 (or0_out_Y, nor1_out, nor0_out);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_Y,
or0_out_Y,
VPWR,
VGND
);
buf buf0 (Y, pwrgood_pp0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32ai (
Y,
A1,
A2,
A3,
B1,
B2
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input B1;
input B2;
// Local signals
wire nor0_out;
wire nor1_out;
wire or0_out_Y;
// Name Output Other arguments
nor nor0 (nor0_out, A3, A1, A2);
nor nor1 (nor1_out, B1, B2);
or or0 (or0_out_Y, nor1_out, nor0_out);
buf buf0 (Y, or0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32ai (
Y,
A1,
A2,
A3,
B1,
B2,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input B1;
input B2;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32ai (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input B1,
input B2,
output Y,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32ai (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input B1,
input B2,
output Y
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32ai_1 (
Y,
A1,
A2,
A3,
B1,
B2,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input B1;
input B2;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o32ai base (
.Y(Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.B2(B2),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32ai_1 (
Y,
A1,
A2,
A3,
B1,
B2
);
output Y;
input A1;
input A2;
input A3;
input B1;
input B2;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o32ai base (
.Y (Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.B2(B2)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32ai_2 (
Y,
A1,
A2,
A3,
B1,
B2,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input B1;
input B2;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o32ai base (
.Y(Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.B2(B2),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32ai_2 (
Y,
A1,
A2,
A3,
B1,
B2
);
output Y;
input A1;
input A2;
input A3;
input B1;
input B2;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o32ai base (
.Y (Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.B2(B2)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32ai_4 (
Y,
A1,
A2,
A3,
B1,
B2,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input B1;
input B2;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o32ai base (
.Y(Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.B2(B2),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32ai_4 (
Y,
A1,
A2,
A3,
B1,
B2
);
output Y;
input A1;
input A2;
input A3;
input B1;
input B2;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o32ai base (
.Y (Y),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.B2(B2)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32a_1 (
X,
A1,
A2,
A3,
B1,
B2,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input A3;
input B1;
input B2;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o32a base (
.X(X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.B2(B2),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32a_1 (
X,
A1,
A2,
A3,
B1,
B2
);
output X;
input A1;
input A2;
input A3;
input B1;
input B2;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o32a base (
.X (X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.B2(B2)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32a_2 (
X,
A1,
A2,
A3,
B1,
B2,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input A3;
input B1;
input B2;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o32a base (
.X(X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.B2(B2),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32a_2 (
X,
A1,
A2,
A3,
B1,
B2
);
output X;
input A1;
input A2;
input A3;
input B1;
input B2;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o32a base (
.X (X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.B2(B2)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32a_4 (
X,
A1,
A2,
A3,
B1,
B2,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input A3;
input B1;
input B2;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o32a base (
.X(X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.B2(B2),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o32a_4 (
X,
A1,
A2,
A3,
B1,
B2
);
output X;
input A1;
input A2;
input A3;
input B1;
input B2;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o32a base (
.X (X),
.A1(A1),
.A2(A2),
.A3(A3),
.B1(B1),
.B2(B2)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41a (
X,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire or0_out;
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
or or0 (or0_out, A4, A3, A2, A1);
and and0 (and0_out_X, or0_out, B1);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41a (
X,
A1,
A2,
A3,
A4,
B1
);
// Module ports
output X;
input A1;
input A2;
input A3;
input A4;
input B1;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB ;
supply0 VNB ;
// Local signals
wire or0_out ;
wire and0_out_X;
// Name Output Other arguments
or or0 (or0_out, A4, A3, A2, A1);
and and0 (and0_out_X, or0_out, B1);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41a (
X,
A1,
A2,
A3,
A4,
B1
);
output X;
input A1;
input A2;
input A3;
input A4;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41a (
X,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output X;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire or0_out;
wire and0_out_X;
wire pwrgood_pp0_out_X;
// Name Output Other arguments
or or0 (or0_out, A4, A3, A2, A1);
and and0 (and0_out_X, or0_out, B1);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_X,
and0_out_X,
VPWR,
VGND
);
buf buf0 (X, pwrgood_pp0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41a (
X,
A1,
A2,
A3,
A4,
B1
);
// Module ports
output X;
input A1;
input A2;
input A3;
input A4;
input B1;
// Local signals
wire or0_out;
wire and0_out_X;
// Name Output Other arguments
or or0 (or0_out, A4, A3, A2, A1);
and and0 (and0_out_X, or0_out, B1);
buf buf0 (X, and0_out_X);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41a (
X,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
output X;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41a (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input A4,
input B1,
output X,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41a (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input A4,
input B1,
output X
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41ai (
Y,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire or0_out;
wire nand0_out_Y;
wire pwrgood_pp0_out_Y;
// Name Output Other arguments
or or0 (or0_out, A4, A3, A2, A1);
nand nand0 (nand0_out_Y, B1, or0_out);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_Y,
nand0_out_Y,
VPWR,
VGND
);
buf buf0 (Y, pwrgood_pp0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41ai (
Y,
A1,
A2,
A3,
A4,
B1
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
// Module supplies
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
// Local signals
wire or0_out;
wire nand0_out_Y;
// Name Output Other arguments
or or0 (or0_out, A4, A3, A2, A1);
nand nand0 (nand0_out_Y, B1, or0_out);
buf buf0 (Y, nand0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41ai (
Y,
A1,
A2,
A3,
A4,
B1
);
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41ai (
Y,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
// Local signals
wire or0_out;
wire nand0_out_Y;
wire pwrgood_pp0_out_Y;
// Name Output Other arguments
or or0 (or0_out, A4, A3, A2, A1);
nand nand0 (nand0_out_Y, B1, or0_out);
sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 (
pwrgood_pp0_out_Y,
nand0_out_Y,
VPWR,
VGND
);
buf buf0 (Y, pwrgood_pp0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41ai (
Y,
A1,
A2,
A3,
A4,
B1
);
// Module ports
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
// Local signals
wire or0_out;
wire nand0_out_Y;
// Name Output Other arguments
or or0 (or0_out, A4, A3, A2, A1);
nand nand0 (nand0_out_Y, B1, or0_out);
buf buf0 (Y, nand0_out_Y);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41ai (
Y,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41ai (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input A4,
input B1,
output Y,
//# {{power|Power}}
input VPB,
input VPWR,
input VGND,
input VNB
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41ai (
//# {{data|Data Signals}}
input A1,
input A2,
input A3,
input A4,
input B1,
output Y
);
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41ai_1 (
Y,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o41ai base (
.Y(Y),
.A1(A1),
.A2(A2),
.A3(A3),
.A4(A4),
.B1(B1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41ai_1 (
Y,
A1,
A2,
A3,
A4,
B1
);
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o41ai base (
.Y (Y),
.A1(A1),
.A2(A2),
.A3(A3),
.A4(A4),
.B1(B1)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41ai_2 (
Y,
A1,
A2,
A3,
A4,
B1,
VPWR,
VGND,
VPB,
VNB
);
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
input VPWR;
input VGND;
input VPB;
input VNB;
sky130_fd_sc_hd__o41ai base (
.Y(Y),
.A1(A1),
.A2(A2),
.A3(A3),
.A4(A4),
.B1(B1),
.VPWR(VPWR),
.VGND(VGND),
.VPB(VPB),
.VNB(VNB)
);
endmodule
| 7.212805 |
module sky130_fd_sc_hd__o41ai_2 (
Y,
A1,
A2,
A3,
A4,
B1
);
output Y;
input A1;
input A2;
input A3;
input A4;
input B1;
// Voltage supply signals
supply1 VPWR;
supply0 VGND;
supply1 VPB;
supply0 VNB;
sky130_fd_sc_hd__o41ai base (
.Y (Y),
.A1(A1),
.A2(A2),
.A3(A3),
.A4(A4),
.B1(B1)
);
endmodule
| 7.212805 |
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