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module sky130_fd_sc_hd__xor2 ( //# {{data|Data Signals}} input A, input B, output X, //# {{power|Power}} input VPB, input VPWR, input VGND, input VNB ); endmodule
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module sky130_fd_sc_hd__xor2 ( //# {{data|Data Signals}} input A, input B, output X ); // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; endmodule
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module sky130_fd_sc_hd__xor2_1 ( X, A, B, VPWR, VGND, VPB, VNB ); output X; input A; input B; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hd__xor2 base ( .X(X), .A(A), .B(B), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); endmodule
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module sky130_fd_sc_hd__xor2_1 ( X, A, B ); output X; input A; input B; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hd__xor2 base ( .X(X), .A(A), .B(B) ); endmodule
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module sky130_fd_sc_hd__xor2_2 ( X, A, B, VPWR, VGND, VPB, VNB ); output X; input A; input B; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hd__xor2 base ( .X(X), .A(A), .B(B), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); endmodule
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module sky130_fd_sc_hd__xor2_2 ( X, A, B ); output X; input A; input B; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hd__xor2 base ( .X(X), .A(A), .B(B) ); endmodule
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module sky130_fd_sc_hd__xor2_4 ( X, A, B, VPWR, VGND, VPB, VNB ); output X; input A; input B; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hd__xor2 base ( .X(X), .A(A), .B(B), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); endmodule
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module sky130_fd_sc_hd__xor2_4 ( X, A, B ); output X; input A; input B; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hd__xor2 base ( .X(X), .A(A), .B(B) ); endmodule
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module sky130_fd_sc_hd__xor3 ( X, A, B, C, VPWR, VGND, VPB, VNB ); // Module ports output X; input A; input B; input C; input VPWR; input VGND; input VPB; input VNB; // Local signals wire xor0_out_X; wire pwrgood_pp0_out_X; // Name Output Other arguments xor xor0 (xor0_out_X, A, B, C); sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 ( pwrgood_pp0_out_X, xor0_out_X, VPWR, VGND ); buf buf0 (X, pwrgood_pp0_out_X); endmodule
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module sky130_fd_sc_hd__xor3 ( X, A, B, C ); // Module ports output X; input A; input B; input C; // Module supplies supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; // Local signals wire xor0_out_X; // Name Output Other arguments xor xor0 (xor0_out_X, A, B, C); buf buf0 (X, xor0_out_X); endmodule
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module sky130_fd_sc_hd__xor3 ( X, A, B, C ); output X; input A; input B; input C; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; endmodule
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module sky130_fd_sc_hd__xor3 ( X, A, B, C, VPWR, VGND, VPB, VNB ); // Module ports output X; input A; input B; input C; input VPWR; input VGND; input VPB; input VNB; // Local signals wire xor0_out_X; wire pwrgood_pp0_out_X; // Name Output Other arguments xor xor0 (xor0_out_X, A, B, C); sky130_fd_sc_hd__udp_pwrgood_pp$PG pwrgood_pp0 ( pwrgood_pp0_out_X, xor0_out_X, VPWR, VGND ); buf buf0 (X, pwrgood_pp0_out_X); endmodule
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module sky130_fd_sc_hd__xor3 ( X, A, B, C ); // Module ports output X; input A; input B; input C; // Local signals wire xor0_out_X; // Name Output Other arguments xor xor0 (xor0_out_X, A, B, C); buf buf0 (X, xor0_out_X); endmodule
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module sky130_fd_sc_hd__xor3 ( X, A, B, C, VPWR, VGND, VPB, VNB ); output X; input A; input B; input C; input VPWR; input VGND; input VPB; input VNB; endmodule
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module sky130_fd_sc_hd__xor3 ( //# {{data|Data Signals}} input A, input B, input C, output X, //# {{power|Power}} input VPB, input VPWR, input VGND, input VNB ); endmodule
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module sky130_fd_sc_hd__xor3 ( //# {{data|Data Signals}} input A, input B, input C, output X ); // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; endmodule
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module sky130_fd_sc_hd__xor3_1 ( X, A, B, C, VPWR, VGND, VPB, VNB ); output X; input A; input B; input C; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hd__xor3 base ( .X(X), .A(A), .B(B), .C(C), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); endmodule
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module sky130_fd_sc_hd__xor3_1 ( X, A, B, C ); output X; input A; input B; input C; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hd__xor3 base ( .X(X), .A(A), .B(B), .C(C) ); endmodule
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module sky130_fd_sc_hd__xor3_2 ( X, A, B, C, VPWR, VGND, VPB, VNB ); output X; input A; input B; input C; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hd__xor3 base ( .X(X), .A(A), .B(B), .C(C), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); endmodule
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module sky130_fd_sc_hd__xor3_2 ( X, A, B, C ); output X; input A; input B; input C; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hd__xor3 base ( .X(X), .A(A), .B(B), .C(C) ); endmodule
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module sky130_fd_sc_hd__xor3_4 ( X, A, B, C, VPWR, VGND, VPB, VNB ); output X; input A; input B; input C; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hd__xor3 base ( .X(X), .A(A), .B(B), .C(C), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); endmodule
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module sky130_fd_sc_hd__xor3_4 ( X, A, B, C ); output X; input A; input B; input C; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hd__xor3 base ( .X(X), .A(A), .B(B), .C(C) ); endmodule
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module sky130_fd_sc_hs__dlclkp_1 ( input GATE, input CLK, output GCLK ); endmodule
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module sky130_fd_sc_hs__dlclkp_2 ( input GATE, input CLK, output GCLK ); endmodule
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module sky130_fd_sc_hs__dlclkp_4 ( input GATE, input CLK, output GCLK ); endmodule
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module \$adffe (ARST, CLK, D, EN, Q); parameter ARST_POLARITY =1'b1; parameter ARST_VALUE =1'b0; parameter CLK_POLARITY =1'b1; parameter EN_POLARITY =1'b1; parameter WIDTH =1; input ARST, CLK, EN; input [WIDTH -1 :0] D; output [WIDTH -1 :0] Q; wire GCLK; generate if (WIDTH < 5) begin sky130_fd_sc_hs__dlclkp_1 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); end else if (WIDTH < 17) begin sky130_fd_sc_hs__dlclkp_2 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); end else begin sky130_fd_sc_hs__dlclkp_4 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); end endgenerate $adff #( .WIDTH(WIDTH), .CLK_POLARITY(CLK_POLARITY), .ARST_VALUE(ARST_VALUE) , .ARST_POLARITY (ARST_POLARITY) ) flipflop( .CLK(GCLK), .ARST(ARST), .D(D), .Q(Q) ); endmodule
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module \$dffe ( CLK, D, EN, Q); parameter CLK_POLARITY =1'b1; parameter EN_POLARITY =1'b1; parameter WIDTH =1; input CLK, EN; input [WIDTH -1:0] D; output [WIDTH -1:0] Q; wire GCLK; generate if (WIDTH < 5) begin sky130_fd_sc_hs__dlclkp_1 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); end else if (WIDTH < 17) begin sky130_fd_sc_hs__dlclkp_2 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); end else begin sky130_fd_sc_hs__dlclkp_4 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); end endgenerate $dff #( .WIDTH(WIDTH), .CLK_POLARITY(CLK_POLARITY), ) flipflop( .CLK(GCLK), .D(D), .Q(Q) ); endmodule
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module \$dffsre ( CLK, EN, CLR, SET, D, Q); parameter CLK_POLARITY =1'b1; parameter EN_POLARITY =1'b1; parameter CLR_POLARITY =1'b1; parameter SET_POLARITY =1'b1; parameter WIDTH =1; input CLK, EN, CLR, SET; input [WIDTH -1:0] D; output [WIDTH -1:0] Q; wire GCLK; generate if (WIDTH < 5) begin sky130_fd_sc_hs__dlclkp_1 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); end else if (WIDTH < 17) begin sky130_fd_sc_hs__dlclkp_2 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); end else begin sky130_fd_sc_hs__dlclkp_4 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); end endgenerate $dffsr #( .WIDTH(WIDTH), .CLK_POLARITY(CLK_POLARITY), .CLR_POLARITY(CLR_POLARITY), .SET_POLARITY(SET_POLARITY) ) flipflop( .CLK(GCLK), .CLR(CLR), .SET(SET), .D(D), .Q(Q) ); endmodule
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module \$aldffe ( CLK, EN, ALOAD, AD, D, Q); parameter CLK_POLARITY =1'b1; parameter EN_POLARITY =1'b1; parameter ALOAD_POLARITY =1'b1; parameter WIDTH =1; input CLK, EN, ALOAD; input [WIDTH -1:0] D; input [WIDTH-1:0] AD; output [WIDTH -1:0] Q; wire GCLK; generate if (WIDTH < 5) begin sky130_fd_sc_hs__dlclkp_1 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); end else if (WIDTH < 17) begin sky130_fd_sc_hs__dlclkp_2 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); end else begin sky130_fd_sc_hs__dlclkp_4 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); end endgenerate $aldff #( .WIDTH(WIDTH), .CLK_POLARITY(CLK_POLARITY), .ALOAD_POLARITY(ALOAD_POLARITY), ) flipflop( .CLK(GCLK), .D(D), .AD(AD), .Q(Q) ); endmodule
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module \$sdffe ( CLK, EN, SRST, D, Q); // parameter CLK_POLARITY =1'b1; // parameter EN_POLARITY =1'b1; // parameter SRST_POLARITY =1'b1; // parameter SRST_VALUE =1'b1; // parameter WIDTH =1; // input CLK, EN, SRST; // input [WIDTH -1:0] D; // output [WIDTH -1:0] Q; // wire GCLK; // generate // if (WIDTH < 5) begin // sky130_fd_sc_hs__dlclkp_1 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); // end // else if (WIDTH < 17) begin // sky130_fd_sc_hs__dlclkp_2 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); // end // else begin // sky130_fd_sc_hs__dlclkp_4 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); // end // endgenerate // $sdff #( // .WIDTH(WIDTH), // .CLK_POLARITY(CLK_POLARITY), // .SRST_POLARITY(SRST_POLARITY), // .SRST_VALUE(SRST_VALUE) // ) // flipflop( // .CLK(GCLK), // .SRST(SRST), // .D(D), // .Q(Q) // ); //endmodule
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module \$sdffce ( CLK, EN, SRST, D, Q); parameter CLK_POLARITY =1'b1; parameter EN_POLARITY =1'b1; parameter SRST_POLARITY =1'b1; parameter SRST_VALUE =1'b1; parameter WIDTH =1; input CLK, EN, SRST; input [WIDTH -1:0] D; output [WIDTH -1:0] Q; wire GCLK; generate if (WIDTH < 5) begin sky130_fd_sc_hs__dlclkp_1 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); end else if (WIDTH < 17) begin sky130_fd_sc_hs__dlclkp_2 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); end else begin sky130_fd_sc_hs__dlclkp_4 clk_gate ( .GCLK(GCLK), .CLK(CLK), .GATE(EN) ); end endgenerate $sdff #( .WIDTH(WIDTH), .CLK_POLARITY(CLK_POLARITY), .SRST_POLARITY(SRST_POLARITY), .SRST_VALUE(SRST_VALUE) ) flipflop( .CLK(GCLK), .SRST(SRST), .D(D), .Q(Q) ); endmodule
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module buffer ( Y, A ); output Y; input A; sky130_fd_sc_hs__buf_1 buffer ( .X(Y), .A(A) ); endmodule
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module nand2 ( Y, A, B ); output Y; input A, B; sky130_fd_sc_hs__nand2_1 nand2 ( .Y(Y), .A(A), .B(B) ); endmodule
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module nor2 ( Y, A, B ); output Y; input A, B; sky130_fd_sc_hs__nor2_1 nor2 ( .Y(Y), .A(A), .B(B) ); endmodule
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module and2 ( Y, A, B ); output Y; input A, B; sky130_fd_sc_hs__and2_1 and2 ( .X(Y), .A(A), .B(B) ); endmodule
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module or2 ( Y, A, B ); output Y; input A, B; sky130_fd_sc_hs__or2_1 or2 ( .X(Y), .A(A), .B(B) ); endmodule
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module nand3 ( Y, A, B, C ); output Y; input A, B, C; sky130_fd_sc_hs__nand3_1 nand3 ( .Y(Y), .A(A), .B(B), .C(C) ); endmodule
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module nor3 ( Y, A, B, C ); output Y; input A, B, C; sky130_fd_sc_hs__nor3_1 nor3 ( .Y(Y), .A(A), .B(B), .C(C) ); endmodule
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module and3 ( Y, A, B, C ); output Y; input A, B, C; sky130_fd_sc_hs__and3_1 and3 ( .X(Y), .A(A), .B(B), .C(C) ); endmodule
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module or3 ( Y, A, B, C ); output Y; input A, B, C; sky130_fd_sc_hs__or3_1 or3 ( .X(Y), .A(A), .B(B), .C(C) ); endmodule
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module nand4 ( Y, A, B, C, D ); output Y; input A, B, C, D; sky130_fd_sc_hs__nand4_1 nand4 ( .Y(Y), .A(A), .B(B), .C(C), .D(D) ); endmodule
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module nor4 ( Y, A, B, C, D ); output Y; input A, B, C, D; sky130_fd_sc_hs__nor4_1 nor4 ( .Y(Y), .A(A), .B(B), .C(C), .D(D) ); endmodule
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module and4 ( Y, A, B, C, D ); output Y; input A, B, C, D; sky130_fd_sc_hs__and4_1 and4 ( .X(Y), .A(A), .B(B), .C(C), .D(D) ); endmodule
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module or4 ( Y, A, B, C, D ); output Y; input A, B, C, D; sky130_fd_sc_hs__or4_1 or4 ( .X(Y), .A(A), .B(B), .C(C), .D(D) ); endmodule
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module nand2b ( Y, A, B ); output Y; input A, B; sky130_fd_sc_hs__nand2b_1 nand2b ( .Y (Y), .A_N(A), .B (B) ); endmodule
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module nor2b ( Y, A, B ); output Y; input A, B; sky130_fd_sc_hs__nor2b_1 nor2b ( .Y (Y), .A (B), .B_N(A) ); endmodule
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module aoi21 ( Y, A0, A1, B0 ); output Y; input A0, A1, B0; sky130_fd_sc_hs__a21oi_1 aoi21 ( .Y (Y), .A1(A0), .A2(A1), .B1(B0) ); endmodule
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module oai21 ( Y, A0, A1, B0 ); output Y; input A0, A1, B0; sky130_fd_sc_hs__o21ai_1 oai21 ( .X (Y), .A1(A0), .A2(A1), .B1(B0) ); endmodule
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module aoi22 ( Y, A0, A1, B0, B1 ); output Y; input A0, A1, B0, B1; sky130_fd_sc_hs__a22oi_1 aoi22 ( .Y (Y), .A1(A0), .A2(A1), .B1(B0), .B2(B1) ); endmodule
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module oai22 ( Y, A0, A1, B0, B1 ); output Y; input A0, A1, B0, B1; sky130_fd_sc_hs__o22ai_1 oai22 ( .Y (Y), .A1(A0), .A2(A1), .B1(B0), .B2(B1) ); endmodule
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module xor2 ( Y, A, B ); output Y; input A, B; sky130_fd_sc_hs__xor2_1 xor2 ( .X(Y), .A(A), .B(B) ); endmodule
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module xnor2 ( Y, A, B ); output Y; input A, B; sky130_fd_sc_hs__xnor2_1 xnor2 ( .Y(Y), .A(A), .B(B) ); endmodule
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module mux2 ( Y, S, A, B ); output Y; input S, A, B; sky130_fd_sc_hs__mux2_1 mux2 ( .X (Y), .S (S), .A0(A), .A1(B) ); endmodule
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module muxi2 ( Y, S, A, B ); output Y; input S, A, B; sky130_fd_sc_hs__mux2i_1 muxi2 ( .Y (Y), .S (S), .A0(A), .A1(B) ); endmodule
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module sky130_fd_sc_hvl__a21o ( X, A1, A2, B1, VPWR, VGND, VPB, VNB ); // Module ports output X; input A1; input A2; input B1; input VPWR; input VGND; input VPB; input VNB; // Local signals wire and0_out; wire or0_out_X; wire pwrgood_pp0_out_X; // Name Output Other arguments and and0 (and0_out, A1, A2); or or0 (or0_out_X, and0_out, B1); sky130_fd_sc_hvl__udp_pwrgood_pp$PG pwrgood_pp0 ( pwrgood_pp0_out_X, or0_out_X, VPWR, VGND ); buf buf0 (X, pwrgood_pp0_out_X); endmodule
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module sky130_fd_sc_hvl__a21o ( X, A1, A2, B1 ); // Module ports output X; input A1; input A2; input B1; // Local signals wire and0_out; wire or0_out_X; // Name Output Other arguments and and0 (and0_out, A1, A2); or or0 (or0_out_X, and0_out, B1); buf buf0 (X, or0_out_X); endmodule
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module sky130_fd_sc_hvl__a21o ( X, A1, A2, B1 ); // Module ports output X; input A1; input A2; input B1; // Module supplies supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; // Local signals wire and0_out; wire or0_out_X; // Name Output Other arguments and and0 (and0_out, A1, A2); or or0 (or0_out_X, and0_out, B1); buf buf0 (X, or0_out_X); endmodule
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module sky130_fd_sc_hvl__a21o_1 ( X, A1, A2, B1, VPWR, VGND, VPB, VNB ); output X; input A1; input A2; input B1; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hvl__a21o base ( .X(X), .A1(A1), .A2(A2), .B1(B1), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify (A1 + => X) = (0: 0: 0, 0: 0: 0); (A2 + => X) = (0: 0: 0, 0: 0: 0); if ((!A1 & !A2)) (B1 + => X) = (0: 0: 0, 0: 0: 0); if ((!A1 & A2)) (B1 + => X) = (0: 0: 0, 0: 0: 0); if ((A1 & !A2)) (B1 + => X) = (0: 0: 0, 0: 0: 0); endspecify `endif endmodule
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module sky130_fd_sc_hvl__a21o_1 ( X, A1, A2, B1 ); output X; input A1; input A2; input B1; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hvl__a21o base ( .X (X), .A1(A1), .A2(A2), .B1(B1) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify (A1 + => X) = (0: 0: 0, 0: 0: 0); (A2 + => X) = (0: 0: 0, 0: 0: 0); if ((!A1 & !A2)) (B1 + => X) = (0: 0: 0, 0: 0: 0); if ((!A1 & A2)) (B1 + => X) = (0: 0: 0, 0: 0: 0); if ((A1 & !A2)) (B1 + => X) = (0: 0: 0, 0: 0: 0); endspecify `endif endmodule
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module sky130_fd_sc_hvl__a21oi ( Y, A1, A2, B1, VPWR, VGND, VPB, VNB ); // Module ports output Y; input A1; input A2; input B1; input VPWR; input VGND; input VPB; input VNB; // Local signals wire and0_out; wire nor0_out_Y; wire pwrgood_pp0_out_Y; // Name Output Other arguments and and0 (and0_out, A1, A2); nor nor0 (nor0_out_Y, B1, and0_out); sky130_fd_sc_hvl__udp_pwrgood_pp$PG pwrgood_pp0 ( pwrgood_pp0_out_Y, nor0_out_Y, VPWR, VGND ); buf buf0 (Y, pwrgood_pp0_out_Y); endmodule
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module sky130_fd_sc_hvl__a21oi ( Y, A1, A2, B1 ); // Module ports output Y; input A1; input A2; input B1; // Local signals wire and0_out; wire nor0_out_Y; // Name Output Other arguments and and0 (and0_out, A1, A2); nor nor0 (nor0_out_Y, B1, and0_out); buf buf0 (Y, nor0_out_Y); endmodule
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module sky130_fd_sc_hvl__a21oi ( Y, A1, A2, B1 ); // Module ports output Y; input A1; input A2; input B1; // Module supplies supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; // Local signals wire and0_out; wire nor0_out_Y; // Name Output Other arguments and and0 (and0_out, A1, A2); nor nor0 (nor0_out_Y, B1, and0_out); buf buf0 (Y, nor0_out_Y); endmodule
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module sky130_fd_sc_hvl__a21oi_1 ( Y, A1, A2, B1, VPWR, VGND, VPB, VNB ); output Y; input A1; input A2; input B1; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hvl__a21oi base ( .Y(Y), .A1(A1), .A2(A2), .B1(B1), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify (A1 - => Y) = (0: 0: 0, 0: 0: 0); (A2 - => Y) = (0: 0: 0, 0: 0: 0); if ((!A1 & !A2)) (B1 - => Y) = (0: 0: 0, 0: 0: 0); if ((!A1 & A2)) (B1 - => Y) = (0: 0: 0, 0: 0: 0); if ((A1 & !A2)) (B1 - => Y) = (0: 0: 0, 0: 0: 0); endspecify `endif endmodule
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module sky130_fd_sc_hvl__a21oi_1 ( Y, A1, A2, B1 ); output Y; input A1; input A2; input B1; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hvl__a21oi base ( .Y (Y), .A1(A1), .A2(A2), .B1(B1) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify (A1 - => Y) = (0: 0: 0, 0: 0: 0); (A2 - => Y) = (0: 0: 0, 0: 0: 0); if ((!A1 & !A2)) (B1 - => Y) = (0: 0: 0, 0: 0: 0); if ((!A1 & A2)) (B1 - => Y) = (0: 0: 0, 0: 0: 0); if ((A1 & !A2)) (B1 - => Y) = (0: 0: 0, 0: 0: 0); endspecify `endif endmodule
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module sky130_fd_sc_hvl__a22o ( X, A1, A2, B1, B2, VPWR, VGND, VPB, VNB ); // Module ports output X; input A1; input A2; input B1; input B2; input VPWR; input VGND; input VPB; input VNB; // Local signals wire and0_out; wire and1_out; wire or0_out_X; wire pwrgood_pp0_out_X; // Name Output Other arguments and and0 (and0_out, B1, B2); and and1 (and1_out, A1, A2); or or0 (or0_out_X, and1_out, and0_out); sky130_fd_sc_hvl__udp_pwrgood_pp$PG pwrgood_pp0 ( pwrgood_pp0_out_X, or0_out_X, VPWR, VGND ); buf buf0 (X, pwrgood_pp0_out_X); endmodule
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module sky130_fd_sc_hvl__a22o ( X, A1, A2, B1, B2 ); // Module ports output X; input A1; input A2; input B1; input B2; // Local signals wire and0_out; wire and1_out; wire or0_out_X; // Name Output Other arguments and and0 (and0_out, B1, B2); and and1 (and1_out, A1, A2); or or0 (or0_out_X, and1_out, and0_out); buf buf0 (X, or0_out_X); endmodule
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module sky130_fd_sc_hvl__a22o ( X, A1, A2, B1, B2 ); // Module ports output X; input A1; input A2; input B1; input B2; // Module supplies supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; // Local signals wire and0_out; wire and1_out; wire or0_out_X; // Name Output Other arguments and and0 (and0_out, B1, B2); and and1 (and1_out, A1, A2); or or0 (or0_out_X, and1_out, and0_out); buf buf0 (X, or0_out_X); endmodule
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module sky130_fd_sc_hvl__a22o_1 ( X, A1, A2, B1, B2, VPWR, VGND, VPB, VNB ); output X; input A1; input A2; input B1; input B2; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hvl__a22o base ( .X(X), .A1(A1), .A2(A2), .B1(B1), .B2(B2), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify if ((A2 & !B1 & !B2)) (A1 + => X) = (0: 0: 0, 0: 0: 0); if ((A2 & !B1 & B2)) (A1 + => X) = (0: 0: 0, 0: 0: 0); if ((A2 & B1 & !B2)) (A1 + => X) = (0: 0: 0, 0: 0: 0); if ((A1 & !B1 & !B2)) (A2 + => X) = (0: 0: 0, 0: 0: 0); if ((A1 & !B1 & B2)) (A2 + => X) = (0: 0: 0, 0: 0: 0); if ((A1 & B1 & !B2)) (A2 + => X) = (0: 0: 0, 0: 0: 0); if ((!A1 & !A2 & B2)) (B1 + => X) = (0: 0: 0, 0: 0: 0); if ((!A1 & A2 & B2)) (B1 + => X) = (0: 0: 0, 0: 0: 0); if ((A1 & !A2 & B2)) (B1 + => X) = (0: 0: 0, 0: 0: 0); if ((!A1 & !A2 & B1)) (B2 + => X) = (0: 0: 0, 0: 0: 0); if ((!A1 & A2 & B1)) (B2 + => X) = (0: 0: 0, 0: 0: 0); if ((A1 & !A2 & B1)) (B2 + => X) = (0: 0: 0, 0: 0: 0); endspecify `endif endmodule
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module sky130_fd_sc_hvl__a22o_1 ( X, A1, A2, B1, B2 ); output X; input A1; input A2; input B1; input B2; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hvl__a22o base ( .X (X), .A1(A1), .A2(A2), .B1(B1), .B2(B2) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify if ((A2 & !B1 & !B2)) (A1 + => X) = (0: 0: 0, 0: 0: 0); if ((A2 & !B1 & B2)) (A1 + => X) = (0: 0: 0, 0: 0: 0); if ((A2 & B1 & !B2)) (A1 + => X) = (0: 0: 0, 0: 0: 0); if ((A1 & !B1 & !B2)) (A2 + => X) = (0: 0: 0, 0: 0: 0); if ((A1 & !B1 & B2)) (A2 + => X) = (0: 0: 0, 0: 0: 0); if ((A1 & B1 & !B2)) (A2 + => X) = (0: 0: 0, 0: 0: 0); if ((!A1 & !A2 & B2)) (B1 + => X) = (0: 0: 0, 0: 0: 0); if ((!A1 & A2 & B2)) (B1 + => X) = (0: 0: 0, 0: 0: 0); if ((A1 & !A2 & B2)) (B1 + => X) = (0: 0: 0, 0: 0: 0); if ((!A1 & !A2 & B1)) (B2 + => X) = (0: 0: 0, 0: 0: 0); if ((!A1 & A2 & B1)) (B2 + => X) = (0: 0: 0, 0: 0: 0); if ((A1 & !A2 & B1)) (B2 + => X) = (0: 0: 0, 0: 0: 0); endspecify `endif endmodule
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module sky130_fd_sc_hvl__a22oi ( Y, A1, A2, B1, B2, VPWR, VGND, VPB, VNB ); // Module ports output Y; input A1; input A2; input B1; input B2; input VPWR; input VGND; input VPB; input VNB; // Local signals wire nand0_out; wire nand1_out; wire and0_out_Y; wire pwrgood_pp0_out_Y; // Name Output Other arguments nand nand0 (nand0_out, A2, A1); nand nand1 (nand1_out, B2, B1); and and0 (and0_out_Y, nand0_out, nand1_out); sky130_fd_sc_hvl__udp_pwrgood_pp$PG pwrgood_pp0 ( pwrgood_pp0_out_Y, and0_out_Y, VPWR, VGND ); buf buf0 (Y, pwrgood_pp0_out_Y); endmodule
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module sky130_fd_sc_hvl__a22oi ( Y, A1, A2, B1, B2 ); // Module ports output Y; input A1; input A2; input B1; input B2; // Local signals wire nand0_out; wire nand1_out; wire and0_out_Y; // Name Output Other arguments nand nand0 (nand0_out, A2, A1); nand nand1 (nand1_out, B2, B1); and and0 (and0_out_Y, nand0_out, nand1_out); buf buf0 (Y, and0_out_Y); endmodule
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module sky130_fd_sc_hvl__a22oi ( Y, A1, A2, B1, B2 ); // Module ports output Y; input A1; input A2; input B1; input B2; // Module supplies supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; // Local signals wire nand0_out; wire nand1_out; wire and0_out_Y; // Name Output Other arguments nand nand0 (nand0_out, A2, A1); nand nand1 (nand1_out, B2, B1); and and0 (and0_out_Y, nand0_out, nand1_out); buf buf0 (Y, and0_out_Y); endmodule
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module sky130_fd_sc_hvl__a22oi_1 ( Y, A1, A2, B1, B2, VPWR, VGND, VPB, VNB ); output Y; input A1; input A2; input B1; input B2; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hvl__a22oi base ( .Y(Y), .A1(A1), .A2(A2), .B1(B1), .B2(B2), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify if ((A2 & !B1 & !B2)) (A1 - => Y) = (0: 0: 0, 0: 0: 0); if ((A2 & !B1 & B2)) (A1 - => Y) = (0: 0: 0, 0: 0: 0); if ((A2 & B1 & !B2)) (A1 - => Y) = (0: 0: 0, 0: 0: 0); if ((A1 & !B1 & !B2)) (A2 - => Y) = (0: 0: 0, 0: 0: 0); if ((A1 & !B1 & B2)) (A2 - => Y) = (0: 0: 0, 0: 0: 0); if ((A1 & B1 & !B2)) (A2 - => Y) = (0: 0: 0, 0: 0: 0); if ((!A1 & !A2 & B2)) (B1 - => Y) = (0: 0: 0, 0: 0: 0); if ((!A1 & A2 & B2)) (B1 - => Y) = (0: 0: 0, 0: 0: 0); if ((A1 & !A2 & B2)) (B1 - => Y) = (0: 0: 0, 0: 0: 0); if ((!A1 & !A2 & B1)) (B2 - => Y) = (0: 0: 0, 0: 0: 0); if ((!A1 & A2 & B1)) (B2 - => Y) = (0: 0: 0, 0: 0: 0); if ((A1 & !A2 & B1)) (B2 - => Y) = (0: 0: 0, 0: 0: 0); endspecify `endif endmodule
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module sky130_fd_sc_hvl__a22oi_1 ( Y, A1, A2, B1, B2 ); output Y; input A1; input A2; input B1; input B2; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hvl__a22oi base ( .Y (Y), .A1(A1), .A2(A2), .B1(B1), .B2(B2) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify if ((A2 & !B1 & !B2)) (A1 - => Y) = (0: 0: 0, 0: 0: 0); if ((A2 & !B1 & B2)) (A1 - => Y) = (0: 0: 0, 0: 0: 0); if ((A2 & B1 & !B2)) (A1 - => Y) = (0: 0: 0, 0: 0: 0); if ((A1 & !B1 & !B2)) (A2 - => Y) = (0: 0: 0, 0: 0: 0); if ((A1 & !B1 & B2)) (A2 - => Y) = (0: 0: 0, 0: 0: 0); if ((A1 & B1 & !B2)) (A2 - => Y) = (0: 0: 0, 0: 0: 0); if ((!A1 & !A2 & B2)) (B1 - => Y) = (0: 0: 0, 0: 0: 0); if ((!A1 & A2 & B2)) (B1 - => Y) = (0: 0: 0, 0: 0: 0); if ((A1 & !A2 & B2)) (B1 - => Y) = (0: 0: 0, 0: 0: 0); if ((!A1 & !A2 & B1)) (B2 - => Y) = (0: 0: 0, 0: 0: 0); if ((!A1 & A2 & B1)) (B2 - => Y) = (0: 0: 0, 0: 0: 0); if ((A1 & !A2 & B1)) (B2 - => Y) = (0: 0: 0, 0: 0: 0); endspecify `endif endmodule
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module sky130_fd_sc_hvl__and2 ( X, A, B, VPWR, VGND, VPB, VNB ); // Module ports output X; input A; input B; input VPWR; input VGND; input VPB; input VNB; // Local signals wire and0_out_X; wire pwrgood_pp0_out_X; // Name Output Other arguments and and0 (and0_out_X, A, B); sky130_fd_sc_hvl__udp_pwrgood_pp$PG pwrgood_pp0 ( pwrgood_pp0_out_X, and0_out_X, VPWR, VGND ); buf buf0 (X, pwrgood_pp0_out_X); endmodule
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module sky130_fd_sc_hvl__and2 ( X, A, B ); // Module ports output X; input A; input B; // Local signals wire and0_out_X; // Name Output Other arguments and and0 (and0_out_X, A, B); buf buf0 (X, and0_out_X); endmodule
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module sky130_fd_sc_hvl__and2 ( X, A, B ); // Module ports output X; input A; input B; // Module supplies supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; // Local signals wire and0_out_X; // Name Output Other arguments and and0 (and0_out_X, A, B); buf buf0 (X, and0_out_X); endmodule
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module sky130_fd_sc_hvl__and2_1 ( X, A, B, VPWR, VGND, VPB, VNB ); output X; input A; input B; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hvl__and2 base ( .X(X), .A(A), .B(B), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify if ((B)) (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall ifnone (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall if ((A)) (B + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall ifnone (B + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall endspecify `endif endmodule
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module sky130_fd_sc_hvl__and2_1 ( X, A, B ); output X; input A; input B; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hvl__and2 base ( .X(X), .A(A), .B(B) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify if ((B)) (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall ifnone (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall if ((A)) (B + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall ifnone (B + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall endspecify `endif endmodule
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module sky130_fd_sc_hvl__and3 ( X, A, B, C, VPWR, VGND, VPB, VNB ); // Module ports output X; input A; input B; input C; input VPWR; input VGND; input VPB; input VNB; // Local signals wire and0_out_X; wire pwrgood_pp0_out_X; // Name Output Other arguments and and0 (and0_out_X, C, A, B); sky130_fd_sc_hvl__udp_pwrgood_pp$PG pwrgood_pp0 ( pwrgood_pp0_out_X, and0_out_X, VPWR, VGND ); buf buf0 (X, pwrgood_pp0_out_X); endmodule
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module sky130_fd_sc_hvl__and3 ( X, A, B, C ); // Module ports output X; input A; input B; input C; // Local signals wire and0_out_X; // Name Output Other arguments and and0 (and0_out_X, C, A, B); buf buf0 (X, and0_out_X); endmodule
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module sky130_fd_sc_hvl__and3 ( X, A, B, C ); // Module ports output X; input A; input B; input C; // Module supplies supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; // Local signals wire and0_out_X; // Name Output Other arguments and and0 (and0_out_X, C, A, B); buf buf0 (X, and0_out_X); endmodule
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module sky130_fd_sc_hvl__and3_1 ( X, A, B, C, VPWR, VGND, VPB, VNB ); output X; input A; input B; input C; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hvl__and3 base ( .X(X), .A(A), .B(B), .C(C), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify if ((B & C)) (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall ifnone (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall if ((A & C)) (B + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall ifnone (B + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall if ((A & B)) (C + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall ifnone (C + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall endspecify `endif endmodule
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module sky130_fd_sc_hvl__and3_1 ( X, A, B, C ); output X; input A; input B; input C; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hvl__and3 base ( .X(X), .A(A), .B(B), .C(C) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify if ((B & C)) (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall ifnone (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall if ((A & C)) (B + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall ifnone (B + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall if ((A & B)) (C + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall ifnone (C + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall endspecify `endif endmodule
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module sky130_fd_sc_hvl__buf ( X, A, VPWR, VGND, VPB, VNB ); // Module ports output X; input A; input VPWR; input VGND; input VPB; input VNB; // Local signals wire buf0_out_X; wire pwrgood_pp0_out_X; // Name Output Other arguments buf buf0 (buf0_out_X, A); sky130_fd_sc_hvl__udp_pwrgood_pp$PG pwrgood_pp0 ( pwrgood_pp0_out_X, buf0_out_X, VPWR, VGND ); buf buf1 (X, pwrgood_pp0_out_X); endmodule
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module sky130_fd_sc_hvl__buf ( X, A ); // Module ports output X; input A; // Local signals wire buf0_out_X; // Name Output Other arguments buf buf0 (buf0_out_X, A); buf buf1 (X, buf0_out_X); endmodule
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module sky130_fd_sc_hvl__buf ( X, A ); // Module ports output X; input A; // Module supplies supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; // Local signals wire buf0_out_X; // Name Output Other arguments buf buf0 (buf0_out_X, A); buf buf1 (X, buf0_out_X); endmodule
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module sky130_fd_sc_hvl__buf_1 ( X, A, VPWR, VGND, VPB, VNB ); output X; input A; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hvl__buf base ( .X(X), .A(A), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall endspecify `endif endmodule
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module sky130_fd_sc_hvl__buf_1 ( X, A ); output X; input A; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hvl__buf base ( .X(X), .A(A) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall endspecify `endif endmodule
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module sky130_fd_sc_hvl__buf_2 ( X, A, VPWR, VGND, VPB, VNB ); output X; input A; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hvl__buf base ( .X(X), .A(A), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall endspecify `endif endmodule
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module sky130_fd_sc_hvl__buf_2 ( X, A ); output X; input A; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hvl__buf base ( .X(X), .A(A) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall endspecify `endif endmodule
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module sky130_fd_sc_hvl__buf_4 ( X, A, VPWR, VGND, VPB, VNB ); output X; input A; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hvl__buf base ( .X(X), .A(A), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall endspecify `endif endmodule
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module sky130_fd_sc_hvl__buf_4 ( X, A ); output X; input A; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hvl__buf base ( .X(X), .A(A) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall endspecify `endif endmodule
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module sky130_fd_sc_hvl__buf_8 ( X, A, VPWR, VGND, VPB, VNB ); output X; input A; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hvl__buf base ( .X(X), .A(A), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall endspecify `endif endmodule
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module sky130_fd_sc_hvl__buf_8 ( X, A ); output X; input A; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hvl__buf base ( .X(X), .A(A) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall endspecify `endif endmodule
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module sky130_fd_sc_hvl__buf_16 ( X, A, VPWR, VGND, VPB, VNB ); output X; input A; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hvl__buf base ( .X(X), .A(A), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall endspecify `endif endmodule
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module sky130_fd_sc_hvl__buf_16 ( X, A ); output X; input A; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hvl__buf base ( .X(X), .A(A) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall endspecify `endif endmodule
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module sky130_fd_sc_hvl__buf_32 ( X, A, VPWR, VGND, VPB, VNB ); output X; input A; input VPWR; input VGND; input VPB; input VNB; sky130_fd_sc_hvl__buf base ( .X(X), .A(A), .VPWR(VPWR), .VGND(VGND), .VPB(VPB), .VNB(VNB) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall endspecify `endif endmodule
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module sky130_fd_sc_hvl__buf_32 ( X, A ); output X; input A; // Voltage supply signals supply1 VPWR; supply0 VGND; supply1 VPB; supply0 VNB; sky130_fd_sc_hvl__buf base ( .X(X), .A(A) ); `ifdef FUNCTIONAL /* * Copyright 2020 The SkyWater PDK Authors * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at * * https://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. * * SPDX-License-Identifier: Apache-2.0 */ specify (A + => X) = (0: 0: 0, 0: 0: 0); // delays are tris,tfall endspecify `endif endmodule
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module sky130_fd_sc_hvl__conb ( HI, LO, VPWR, VGND, VPB, VNB ); // Module ports output HI; output LO; input VPWR; input VGND; input VPB; input VNB; // Local signals wire pullup0_out_HI; wire pulldown0_out_LO; // Name Output Other arguments pullup pullup0 (pullup0_out_HI); sky130_fd_sc_hvl__udp_pwrgood_pp$P pwrgood_pp0 ( HI, pullup0_out_HI, VPWR ); pulldown pulldown0 (pulldown0_out_LO); sky130_fd_sc_hvl__udp_pwrgood_pp$G pwrgood_pp1 ( LO, pulldown0_out_LO, VGND ); endmodule
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