text stringlengths 9 39.2M | dir stringlengths 25 226 | lang stringclasses 163 values | created_date timestamp[s] | updated_date timestamp[s] | repo_name stringclasses 751 values | repo_full_name stringclasses 752 values | star int64 1.01k 183k | len_tokens int64 1 18.5M |
|---|---|---|---|---|---|---|---|---|
```unknown
CONFIG_ARM_MPU=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=38400000
CONFIG_CMU_HFCLK_HFXO=y
CONFIG_SOC_GECKO_EMU_DCDC=y
CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4161a/slwrb4161a_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 74 |
```unknown
# EFR32 radio board
if BOARD_SLWRB4161A
config CMU_HFXO_FREQ
default 38400000
config CMU_LFXO_FREQ
default 32768
config FLASH_BASE_ADDRESS
hex
default 0x0
config LOG_BACKEND_SWO_FREQ_HZ
default 875000
depends on LOG_BACKEND_SWO
if SOC_GECKO_USE_RAIL
config FPU
default n
endif # SOC_GECKO_USE_RAIL
if BT
config FPU
default y
config COMMON_LIBC_MALLOC_ARENA_SIZE
default 8192
config MAIN_STACK_SIZE
default 3072 if PM
default 2304
endif # BT
endif # BOARD_SLWRB4161A
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4161a/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 162 |
```yaml
identifier: slwrb4161a
name: EFR32MG12 2.4 GHz 19 dBm Radio Board (SLWRB4161A)
type: mcu
arch: arm
ram: 256
flash: 1024
toolchain:
- zephyr
- gnuarmemb
supported:
- counter
- gpio
- nvs
- spi
- uart
- watchdog
testing:
ignore_tags:
- net
- bluetooth
vendor: silabs
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4161a/slwrb4161a.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 118 |
```ini
if {[info exists env(OPENOCD_INTERFACE)]} {
set INTERFACE $env(OPENOCD_INTERFACE)
} else {
# By default connect over Debug USB port using the J-Link interface
set INTERFACE "jlink"
}
source [find interface/$INTERFACE.cfg]
transport select swd
set CHIPNAME efr32
source [find target/efm32.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4161a/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 134 |
```restructuredtext
.. _slwrb4104a:
EFR32BG13 2.4 GHz 10 dBm (SLWRB4104A)
#####################################
Overview
********
The EFR32BG13 Blue Gecko Bluetooth Low Energy Radio Board is one of the two
radio boards delivered with `SLWSTK6020B Bluetooth SoC Starter Kit`_. It
contains a Wireless System-On-Chip from the EFR32BG13 family built on an
ARM Cortex-M4F processor with excellent low power capabilities.
.. figure:: efr32bg13-slwrb4104a.jpg
:align: center
:alt: SLWRB4104A Blue Gecko Bluetooth Low Energy Radio Board
SLWRB4104A (image courtesy of Silicon Labs)
The BRD4104A a.k.a. SLWRB4104A radio board plugs into the Wireless Starter Kit
Mainboard BRD4001A and is supported as one of :ref:`silabs_radio_boards`.
Hardware
********
- EFR32BG13P632F512GM48 Blue Gecko SoC
- CPU core: ARM Cortex-M4 with FPU
- Flash memory: 512 kB
- RAM: 64 kB
- Transmit power: up to +10 dBm
- Operation frequency: 2.4 GHz
- 8Mbit SPI NOR Flash
- Crystals for LFXO (32.768 kHz) and HFXO (38.4 MHz).
For more information about the EFR32BG13 SoC and BRD4104A board, refer to these
documents:
- `EFR32BG13 Website`_
- `EFR32BG13 Datasheet`_
- `EFR32xG13 Reference Manual`_
- `SLWSTK6020B Bluetooth SoC Starter Kit`_
- `BRD4104A User Guide`_
- `BRD4104A Reference Manual`_
- `EFR32BG13-BRD4104A Schematics`_
Supported Features
==================
The board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| MPU | on-chip | memory protection unit |
+-----------+------------+-------------------------------------+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtcc |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| SPI(M) | on-chip | spi port-polling |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/silabs/radio_boards/slwrb4104a/slwrb4104a_defconfig`
Connections and IOs
===================
In the following table, the column **Pin** contains Pin names. For example, PA2
means Pin number 2 on PORTA, as used in the board's datasheets and manuals.
+-------+-------------+-------------------------------------+
| Pin | Function | Usage |
+=======+=============+=====================================+
| PF4 | GPIO | LED0 |
+-------+-------------+-------------------------------------+
| PF5 | GPIO | LED1 |
+-------+-------------+-------------------------------------+
| PF6 | GPIO | Push Button PB0 |
+-------+-------------+-------------------------------------+
| PF7 | GPIO | Push Button PB1 |
+-------+-------------+-------------------------------------+
| PA5 | GPIO | Board Controller Enable |
| | | VCOM_ENABLE |
+-------+-------------+-------------------------------------+
| PA0 | USART0_TX | UART Console VCOM_TX US0_TX #0 |
+-------+-------------+-------------------------------------+
| PA1 | USART0_RX | UART Console VCOM_RX US0_RX #0 |
+-------+-------------+-------------------------------------+
| PC6 | SPI_MOSI | Flash MOSI US1_TX #11 |
+-------+-------------+-------------------------------------+
| PC7 | SPI_MISO | Flash MISO US1_RX #11 |
+-------+-------------+-------------------------------------+
| PC8 | SPI_SCLK | Flash SCLK US1_CLK #11 |
+-------+-------------+-------------------------------------+
| PA4 | SPI_CS | Flash Chip Select (GPIO) |
+-------+-------------+-------------------------------------+
System Clock
============
The EFR32BG13P SoC is configured to use the 38.4 MHz external oscillator on the
board.
Serial Port
===========
The EFR32BG13P SoC has three USARTs and one Low Energy UARTs (LEUART).
USART0 is connected to the board controller and is used for the console.
Programming and Debugging
*************************
Flashing
========
Connect the BRD4001A board with a mounted BRD4104A radio module to your host
computer using the USB port.
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: slwrb4104a
:goals: flash
Open a serial terminal (minicom, putty, etc.) with the following settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Reset the board and you should see the following message in the terminal:
.. code-block:: console
Hello World! slwrb4161a
.. _EFR32BG13 Website:
path_to_url
.. _EFR32BG13 Datasheet:
path_to_url
.. _EFR32xG13 Reference Manual:
path_to_url
.. _SLWSTK6020B Bluetooth SoC Starter Kit:
path_to_url
.. _BRD4104A User Guide:
path_to_url
.. _BRD4104A Reference Manual:
path_to_url
.. _EFR32BG13-BRD4104A Schematics:
path_to_url
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4104a/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,427 |
```unknown
/*
*
*/
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include "efr32-series1-common-pinctrl.dtsi"
/ {
chosen {
zephyr,console = &usart0;
zephyr,shell-uart = &usart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
led1 = &led1;
sw0 = &button0;
sw1 = &button1;
watchdog0 = &wdog0;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpiof 4 0>;
label = "LED 0";
};
led1: led_1 {
gpios = <&gpiof 5 0>;
label = "LED 1";
};
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
/* gpio flags need validation */
gpios = <&gpiof 6 GPIO_ACTIVE_LOW>;
label = "User Push Button 0";
zephyr,code = <INPUT_KEY_0>;
};
button1: button_1 {
/* gpio flags need validation */
gpios = <&gpiof 7 GPIO_ACTIVE_LOW>;
label = "User Push Button 1";
zephyr,code = <INPUT_KEY_1>;
};
};
};
&usart0 {
current-speed = <115200>;
pinctrl-0 = <&usart0_default>;
pinctrl-names = "default";
status = "okay";
};
&usart1 {
compatible = "silabs,gecko-spi-usart";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&usart1_default>;
pinctrl-names = "default";
cs-gpios = <&gpioa 4 GPIO_ACTIVE_LOW>;
status = "okay";
mx25r80: mx25r8035f@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <33000000>;
size = <0x800000>;
jedec-id = [c2 28 14];
};
};
&rtcc0 {
prescaler = <1>;
status = "okay";
};
&gpio {
location-swo = <0>;
status = "okay";
};
&gpioa {
status = "okay";
board-controller-enable {
gpio-hog;
gpios = <5 GPIO_ACTIVE_HIGH>;
output-high;
};
};
&gpiob {
status = "okay";
};
&gpioc {
status = "okay";
};
&gpiod {
status = "okay";
};
&gpiof {
status = "okay";
};
&wdog0 {
status = "okay";
};
``` | /content/code_sandbox/boards/silabs/radio_boards/common/efr32-series1-common.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 681 |
```unknown
/*
*
*/
#include <dt-bindings/pinctrl/gecko-pinctrl-s1.h>
&pinctrl {
/* configuration for usart0 device, default state - operating as UART */
usart0_default: usart0_default {
group1 {
psels = <GECKO_PSEL(UART_TX, A, 0)>,
<GECKO_PSEL(UART_RX, A, 1)>,
<GECKO_LOC(UART_TX, 0)>,
<GECKO_LOC(UART_RX, 0)>;
};
};
usart1_default: usart1_default {
group1 {
psels = <GECKO_PSEL(SPIM_SCK, C, 8)>,
<GECKO_PSEL(SPIM_MISO, C, 7)>,
<GECKO_PSEL(SPIM_MOSI, C, 6)>,
<GECKO_LOC(SPI_SCK, 11)>,
<GECKO_LOC(SPI_MISO, 11)>,
<GECKO_LOC(SPI_MOSI, 11)>;
};
};
usart2_default: usart2_default {
group1 {
psels = <GECKO_PSEL(SPIM_SCK, A, 8)>,
<GECKO_PSEL(SPIM_MISO, A, 7)>,
<GECKO_PSEL(SPIM_MOSI, A, 6)>,
<GECKO_LOC(SPI_SCK, 1)>,
<GECKO_LOC(SPI_MISO, 1)>,
<GECKO_LOC(SPI_MOSI, 1)>;
};
};
};
``` | /content/code_sandbox/boards/silabs/radio_boards/common/efr32-series1-common-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 385 |
```unknown
/*
*
*/
/dts-v1/;
#include <silabs/efr32fg1p133f256gm48.dtsi>
#include <silabs/efr32xg1p-pinctrl.dtsi>
#include "../common/efr32-series1-common.dtsi"
/ {
model = "Silicon Labs BRD4250B (Flex Gecko 1 Radio Board)";
compatible = "silabs,slwrb4250b", "silabs,efr32fg1p";
pwmleds {
compatible = "pwm-leds";
status = "okay";
pwm_led0: pwm_led0 {
pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
};
};
aliases {
pwm-led0 = &pwm_led0;
};
};
&cpu0 {
clock-frequency = <38400000>;
};
&timer0 {
status = "okay";
pwm0: pwm {
status = "okay";
pin-location = <GECKO_LOCATION(28) GECKO_PORT_F GECKO_PIN(4)>;
prescaler = <1024>;
};
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 32 kB for the bootloader */
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x0 0x00008000>;
read-only;
};
/* Reserve 94 kB for the application in slot 0 */
slot0_partition: partition@8000 {
label = "image-0";
reg = <0x00008000 0x00017800>;
};
/* Reserve 94 kB for the application in slot 1 */
slot1_partition: partition@1f800 {
label = "image-1";
reg = <0x0001f800 0x00017800>;
};
/* Reserve 30 kB for the scratch partition */
scratch_partition: partition@37000 {
label = "image-scratch";
reg = <0x00037000 0x00007800>;
};
/* Set 6Kb of storage at the end of the 256Kb of flash */
storage_partition: partition@3e800 {
label = "storage";
reg = <0x0003e800 0x00001800>;
};
};
};
&usart0 {
current-speed = <115200>;
pinctrl-0 = <&usart0_default>;
pinctrl-names = "default";
status = "okay";
};
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4250b/slwrb4250b.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 598 |
```restructuredtext
.. _slwrb4161a:
EFR32MG12 2.4 GHz 19 dBm (SLWRB4161A)
#####################################
Overview
********
The EFR32MG12 Mighty Gecko Radio Board contains a Wireless System-On-Chip
from the EFR32MG12 family built on an ARM Cortex-M4F processor with excellent
low power capabilities.
.. figure:: efr32mg12-slwrb4161a.jpeg
:align: center
:alt: SLWRB4161A Mighty Gecko Radio Board
SLWRB4161A (image courtesy of Silicon Labs)
The BRD4161A a.k.a. SLWRB4161A radio board plugs into the Wireless Starter Kit
Mainboard BRD4001A and is supported as one of :ref:`silabs_radio_boards`.
Hardware
********
- EFR32MG12P432F1024GL125 Mighty Gecko SoC
- CPU core: ARM Cortex-M4 with FPU
- Flash memory: 1024 kB
- RAM: 256 kB
- Transmit power: up to +19 dBm
- Operation frequency: 2.4 GHz and Sub-Ghz
- Crystals for LFXO (32.768 kHz) and HFXO (38.4 MHz).
For more information about the EFR32MG12 SoC and BRD4170A board, refer to these
documents:
- `EFR32MG12 Website`_
- `EFR32MG12 Datasheet`_
- `EFR32xG12 Reference Manual`_
- `BRD4161A User Guide`_
Supported Features
==================
The board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| MPU | on-chip | memory protection unit |
+-----------+------------+-------------------------------------+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtcc |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| SPI(M) | on-chip | spi port-polling |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/silabs/radio_boards/slwrb4161a/slwrb4161a_defconfig`
Connections and IOs
===================
In the following table, the column **Pin** contains Pin names. For example, PA2
means Pin number 2 on PORTA, as used in the board's datasheets and manuals.
+-------+-------------+-------------------------------------+
| Pin | Function | Usage |
+=======+=============+=====================================+
| PF4 | GPIO | LED0 |
+-------+-------------+-------------------------------------+
| PF5 | GPIO | LED1 |
+-------+-------------+-------------------------------------+
| PF6 | GPIO | Push Button PB0 |
+-------+-------------+-------------------------------------+
| PF7 | GPIO | Push Button PB1 |
+-------+-------------+-------------------------------------+
| PA5 | GPIO | Board Controller Enable VCOM_ENABLE |
+-------+-------------+-------------------------------------+
| PA0 | USART0_TX | UART Console VCOM_TX US0_TX #0 |
+-------+-------------+-------------------------------------+
| PA1 | USART0_RX | UART Console VCOM_RX US0_RX #0 |
+-------+-------------+-------------------------------------+
| PC6 | SPI_MOSI | Flash MOSI US1_TX #11 |
+-------+-------------+-------------------------------------+
| PC7 | SPI_MISO | Flash MISO US1_RX #11 |
+-------+-------------+-------------------------------------+
| PC8 | SPI_SCLK | Flash SCLK US1_CLK #11 |
+-------+-------------+-------------------------------------+
| PA4 | SPI_CS | Flash Chip Select (GPIO) |
+-------+-------------+-------------------------------------+
System Clock
============
The EFR32MG12P SoC is configured to use the 38.4 MHz external oscillator on the
board.
Serial Port
===========
The EFR32MG12P SoC has four USARTs and one Low Energy UARTs (LEUART).
USART0 is connected to the board controller and is used for the console.
Programming and Debugging
*************************
Flashing
========
Connect the BRD4001A board with a mounted BRD4161A radio module to your host
computer using the USB port.
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: slwrb4161a
:goals: flash
Open a serial terminal (minicom, putty, etc.) with the following settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Reset the board and you should see the following message in the terminal:
.. code-block:: console
Hello World! slwrb4161a
.. _EFR32MG12 Website:
path_to_url
.. _EFR32MG12 Datasheet:
path_to_url
.. _EFR32xG12 Reference Manual:
path_to_url
.. _BRD4161A User Guide:
path_to_url
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4161a/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,286 |
```unknown
# EFR32FG1P BRD4250B
config BOARD_SLWRB4250B
select SOC_PART_NUMBER_EFR32FG1P133F256GM48
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4250b/Kconfig.slwrb4250b | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 39 |
```cmake
board_runner_args(openocd)
board_runner_args(jlink "--device=EFR32FG1PxxxF256")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4250b/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 59 |
```cmake
# SPI is implemented via usart so node name isn't spi@...
list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4250b/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```yaml
boards:
- name: slwrb4250b
socs:
- name: efr32fg1p133f256gm48
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4250b/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
CONFIG_ARM_MPU=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=38400000
CONFIG_CMU_HFCLK_HFXO=y
CONFIG_SOC_GECKO_EMU_DCDC=y
CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4250b/slwrb4250b_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 74 |
```unknown
# EFR32 radio board
if BOARD_SLWRB4250B
config CMU_HFXO_FREQ
default 38400000
config CMU_LFXO_FREQ
default 32768
config FLASH_BASE_ADDRESS
hex
default 0x0
config LOG_BACKEND_SWO_FREQ_HZ
default 875000
depends on LOG_BACKEND_SWO
if SOC_GECKO_USE_RAIL
config FPU
default n
endif # SOC_GECKO_USE_RAIL
if BT
config FPU
default y
config COMMON_LIBC_MALLOC_ARENA_SIZE
default 8192
config MAIN_STACK_SIZE
default 3072 if PM
default 2304
endif # BT
endif # BOARD_SLWRB4250B
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4250b/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 162 |
```ini
if {[info exists env(OPENOCD_INTERFACE)]} {
set INTERFACE $env(OPENOCD_INTERFACE)
} else {
# By default connect over Debug USB port using the J-Link interface
set INTERFACE "jlink"
}
source [find interface/$INTERFACE.cfg]
transport select swd
set CHIPNAME efr32
source [find target/efm32.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4250b/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 134 |
```yaml
identifier: slwrb4250b
name: EFR32FG 2400/868 MHz 13 dBm Dual Band Radio Board (SLWRB4250B)
type: mcu
arch: arm
ram: 32
flash: 256
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- counter
- gpio
- nvs
- spi
- uart
- watchdog
testing:
ignore_tags:
- net
- bluetooth
vendor: silabs
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4250b/slwrb4250b.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 124 |
```unknown
# EFR32MG12 BRD4170A
config BOARD_SLWRB4170A
select SOC_PART_NUMBER_EFR32MG12P433F1024GM68
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4170a/Kconfig.slwrb4170a | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 39 |
```cmake
board_runner_args(openocd)
board_runner_args(jlink "--device=EFR32MG12PxxxF1024")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4170a/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 60 |
```unknown
CONFIG_ARM_MPU=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=38400000
CONFIG_CMU_HFCLK_HFXO=y
CONFIG_SOC_GECKO_EMU_DCDC=y
CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4170a/slwrb4170a_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 74 |
```unknown
/*
*
*/
/dts-v1/;
#include <silabs/efr32mg12p433f1024gm68.dtsi>
#include "../common/efr32-series1-common.dtsi"
/ {
model = "Silicon Labs BRD4170A (Mighty Gecko 12 Radio Board)";
compatible = "silabs,slwrb4170a", "silabs,efr32mg12p";
chosen {
zephyr,bt-hci = &bt_hci_silabs;
};
};
&cpu0 {
clock-frequency = <38400000>;
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 32 kB for the bootloader */
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x0 0x00008000>;
read-only;
};
/* Reserve 220 kB for the application in slot 0 */
slot0_partition: partition@8000 {
label = "image-0";
reg = <0x00008000 0x00037000>;
};
/* Reserve 220 kB for the application in slot 1 */
slot1_partition: partition@3f000 {
label = "image-1";
reg = <0x0003f000 0x00037000>;
};
/* Reserve 32 kB for the scratch partition */
scratch_partition: partition@76000 {
label = "image-scratch";
reg = <0x00076000 0x00008000>;
};
/* Set 8Kb of storage at the end of the 512KB of flash */
storage_partition: partition@7e000 {
label = "storage";
reg = <0x0007e000 0x00002000>;
};
};
};
&bt_hci_silabs {
status = "okay";
};
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4170a/slwrb4170a.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 443 |
```cmake
# SPI is implemented via usart so node name isn't spi@...
list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4170a/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```yaml
boards:
- name: slwrb4170a
socs:
- name: efr32mg12p433f1024gm68
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4170a/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 35 |
```unknown
# EFR32 radio board
if BOARD_SLWRB4170A
config CMU_HFXO_FREQ
default 38400000
config CMU_LFXO_FREQ
default 32768
config FLASH_BASE_ADDRESS
hex
default 0x0
config LOG_BACKEND_SWO_FREQ_HZ
default 875000
depends on LOG_BACKEND_SWO
if SOC_GECKO_USE_RAIL
config FPU
default n
endif # SOC_GECKO_USE_RAIL
if BT
config FPU
default y
config COMMON_LIBC_MALLOC_ARENA_SIZE
default 8192
config MAIN_STACK_SIZE
default 3072 if PM
default 2304
endif # BT
endif # BOARD_SLWRB4170A
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4170a/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 162 |
```yaml
identifier: slwrb4170a
name: EFR32MG12 2400/868-915 MHz 19 dBm Dual Band Radio Board (SLWRB4170A)
type: mcu
arch: arm
ram: 256
flash: 1024
toolchain:
- zephyr
- gnuarmemb
supported:
- counter
- gpio
- nvs
- spi
- uart
- watchdog
testing:
ignore_tags:
- net
- bluetooth
vendor: silabs
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4170a/slwrb4170a.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 123 |
```ini
if {[info exists env(OPENOCD_INTERFACE)]} {
set INTERFACE $env(OPENOCD_INTERFACE)
} else {
# By default connect over Debug USB port using the J-Link interface
set INTERFACE "jlink"
}
source [find interface/$INTERFACE.cfg]
transport select swd
set CHIPNAME efr32
source [find target/efm32.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4170a/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 134 |
```restructuredtext
.. _slwrb4250b:
EFR32FG1 2400/868 MHz 13 dBm Dual Band (SLWRB4250B)
###################################################
Overview
********
The EFR32FG1 Flex Gecko 2.4 GHz and 868 MHz Radio Board is delivered as part of
`SLWSTK6061B Proprietary Wireless Starter Kit`_. It contains a EFR32FG1 Wireless
SoC built on an ARM Cortex-M4F processor with excellent low power capabilities.
.. figure:: efr32fg1-slwrb4250b.jpg
:align: center
:alt: SLWRB4250B Flex Gecko 2.4 GHz and 868 MHz Radio Board
SLWRB4250B (image courtesy of Silicon Labs)
The BRD4250B a.k.a. SLWRB4250B radio board plugs into the Wireless Starter Kit
Mainboard BRD4001A and is supported as one of :ref:`silabs_radio_boards`.
Hardware
********
- EFR32FG1P133F256GM48 Flex Gecko SoC
- CPU core: ARM Cortex-M4 with FPU
- Flash memory: 256 kB
- RAM: 32 kB
- Transmit power: up to +13 dBm
- Operation frequency: 2.4 GHz, 868 MHz
- 8Mbit SPI NOR Flash
- Crystals for LFXO (32.768 kHz) and HFXO (38.4 MHz).
For more information about the EFR32FG1 SoC and BRD4250B board, refer to these
documents:
- `EFR32FG1 Website`_
- `EFR32FG1 Datasheet`_
- `EFR32xG1 Reference Manual`_
- `SLWSTK6061B Proprietary Wireless Starter Kit`_
- `BRD4250B User Guide`_
- `BRD4250B Reference Manual`_
- `EFR32FG1-BRD4250B Schematics`_
Supported Features
==================
The board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| MPU | on-chip | memory protection unit |
+-----------+------------+-------------------------------------+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtcc |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| SPI(M) | on-chip | spi port-polling |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/silabs/radio_boards/slwrb4250b/slwrb4250b_defconfig`
Connections and IOs
===================
In the following table, the column **Pin** contains Pin names. For example, PA2
means Pin number 2 on PORTA, as used in the board's datasheets and manuals.
+-------+-------------+-------------------------------------+
| Pin | Function | Usage |
+=======+=============+=====================================+
| PF4 | GPIO | LED0 |
+-------+-------------+-------------------------------------+
| PF5 | GPIO | LED1 |
+-------+-------------+-------------------------------------+
| PF6 | GPIO | Push Button PB0 |
+-------+-------------+-------------------------------------+
| PF7 | GPIO | Push Button PB1 |
+-------+-------------+-------------------------------------+
| PA5 | GPIO | Board Controller Enable VCOM_ENABLE |
+-------+-------------+-------------------------------------+
| PA0 | USART0_TX | UART Console VCOM_TX US0_TX #0 |
+-------+-------------+-------------------------------------+
| PA1 | USART0_RX | UART Console VCOM_RX US0_RX #0 |
+-------+-------------+-------------------------------------+
| PC6 | SPI_MOSI | Flash MOSI US1_TX #11 |
+-------+-------------+-------------------------------------+
| PC7 | SPI_MISO | Flash MISO US1_RX #11 |
+-------+-------------+-------------------------------------+
| PC8 | SPI_SCLK | Flash SCLK US1_CLK #11 |
+-------+-------------+-------------------------------------+
| PA4 | SPI_CS | Flash Chip Select (GPIO) |
+-------+-------------+-------------------------------------+
System Clock
============
The EFR32FG1P SoC is configured to use the 38.4 MHz external oscillator on the
board.
Serial Port
===========
The EFR32FG1P SoC has two USARTs and one Low Energy UARTs (LEUART).
USART0 is connected to the board controller and is used for the console.
Programming and Debugging
*************************
Flashing
========
Connect the BRD4001A board with a mounted BRD4250B radio module to your host
computer using the USB port.
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: slwrb4250b
:goals: flash
Open a serial terminal (minicom, putty, etc.) with the following settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Reset the board and you should see the following message in the terminal:
.. code-block:: console
Hello World! slwrb4250b
.. _EFR32FG1 Website:
path_to_url
.. _EFR32FG1 Datasheet:
path_to_url
.. _EFR32xG1 Reference Manual:
path_to_url
.. _SLWSTK6061B Proprietary Wireless Starter Kit:
path_to_url
.. _BRD4250B User Guide:
path_to_url
.. _BRD4250B Reference Manual:
path_to_url
.. _EFR32FG1-BRD4250B Schematics:
path_to_url
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4250b/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,430 |
```unknown
/*
*
*/
#include <dt-bindings/pinctrl/gecko-pinctrl-s1.h>
&pinctrl {
/* configuration for usart0 device, default state - operating as UART */
usart0_default: usart0_default {
group1 {
psels = <GECKO_PSEL(UART_TX, A, 0)>,
<GECKO_PSEL(UART_RX, A, 1)>,
<GECKO_LOC(UART_TX, 0)>,
<GECKO_LOC(UART_RX, 0)>;
};
};
i2c0_default: i2c0_default {
group1 {
psels = <GECKO_PSEL(I2C_SDA, A, 0)>,
<GECKO_PSEL(I2C_SCL, A, 1)>,
<GECKO_LOC(I2C_SDA, 4)>,
<GECKO_LOC(I2C_SCL, 4)>;
};
};
i2c1_default: i2c1_default {
group1 {
psels = <GECKO_PSEL(I2C_SDA, B, 11)>,
<GECKO_PSEL(I2C_SCL, B, 12)>,
<GECKO_LOC(I2C_SDA, 1)>,
<GECKO_LOC(I2C_SCL, 1)>;
};
};
};
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4321a/slwrb4321a-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 319 |
```cmake
board_runner_args(jlink "--device=EFM32GG11B820F2048")
board_runner_args(openocd)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4321a/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 61 |
```unknown
/*
*
*/
/dts-v1/;
#include <silabs/efm32gg11b820f2048gl192.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include "slwrb4321a-pinctrl.dtsi"
/ {
model = "Silicon Labs EFM32GG SLWSTK6121A board";
compatible = "silabs,slwrb4321a", "silabs,efm32gg11b";
chosen {
zephyr,console = &usart0;
zephyr,shell-uart = &usart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
led1 = &led1;
sw0 = &button0;
sw1 = &button1;
watchdog0 = &wdog0;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpioa 4 0>;
label = "LED 0";
};
led1: led_1 {
gpios = <&gpioa 5 0>;
label = "LED 1";
};
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
/* gpio flags need validation */
gpios = <&gpiod 6 GPIO_ACTIVE_LOW>;
label = "User Push Button 0";
zephyr,code = <INPUT_KEY_0>;
};
button1: button_1 {
/* gpio flags need validation */
gpios = <&gpiod 8 GPIO_ACTIVE_LOW>;
label = "User Push Button 1";
zephyr,code = <INPUT_KEY_1>;
};
};
};
/* Connected to the WSTK VCOM */
&usart0 {
current-speed = <115200>;
pinctrl-0 = <&usart0_default>;
pinctrl-names = "default";
status = "okay";
};
/* i2c unit 0 is not used on the board, but must be defined for i2c unit 1
* to work properly.
*/
&i2c0 {
pinctrl-0 = <&i2c0_default>;
pinctrl-names = "default";
status = "okay";
};
/* Connected to Si7021 sensor on WSTK */
&i2c1 {
pinctrl-0 = <&i2c1_default>;
pinctrl-names = "default";
status = "okay";
};
&rtcc0 {
prescaler = <1>;
status = "okay";
};
&gpio {
location-swo = <0>;
status = "okay";
};
&gpioa {
status = "okay";
};
&gpiob {
status = "okay";
};
&gpioc {
status = "okay";
};
&gpiod {
status = "okay";
};
&gpioe {
status = "okay";
};
&gpiof {
status = "okay";
};
ð0 {
/* PHY address = 0 */
phy-address = <0>;
/* PHY management pins */
location-mdio = <GECKO_LOCATION(3)>;
location-phy_mdc = <GECKO_LOCATION(3) GECKO_PORT_A GECKO_PIN(6)>;
location-phy_mdio = <GECKO_LOCATION(3) GECKO_PORT_A GECKO_PIN(15)>;
/* RMII interface pins */
location-rmii = <GECKO_LOCATION(0)>;
location-rmii_refclk = <GECKO_LOCATION(0) GECKO_PORT_A GECKO_PIN(3)>;
location-rmii_crs_dv = <GECKO_LOCATION(0) GECKO_PORT_A GECKO_PIN(4)>;
location-rmii_txd0 = <GECKO_LOCATION(0) GECKO_PORT_E GECKO_PIN(15)>;
location-rmii_txd1 = <GECKO_LOCATION(0) GECKO_PORT_E GECKO_PIN(14)>;
location-rmii_tx_en = <GECKO_LOCATION(0) GECKO_PORT_A GECKO_PIN(0)>;
location-rmii_rxd0 = <GECKO_LOCATION(0) GECKO_PORT_A GECKO_PIN(2)>;
location-rmii_rxd1 = <GECKO_LOCATION(0) GECKO_PORT_A GECKO_PIN(1)>;
location-rmii_rx_er = <GECKO_LOCATION(0) GECKO_PORT_A GECKO_PIN(5)>;
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Set 12Kb of storage at the end of the 2048Kb of flash */
storage_partition: partition@1fd000 {
label = "storage";
reg = <0x001fd000 0x00003000>;
};
};
};
&wdog0 {
status = "okay";
};
&trng0 {
status = "okay";
};
&cpu0 {
clock-frequency = <72000000>;
};
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4321a/slwrb4321a.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,180 |
```restructuredtext
.. _slwrb4170a:
EFR32MG12 2400/868-915 MHz 19 dBm Dual Band (SLWRB4170A)
########################################################
Overview
********
The EFR32MG12 Mighty Gecko Radio Board contains a Wireless System-On-Chip
from the EFR32MG12 family built on an ARM Cortex-M4F processor with excellent
low power capabilities.
.. figure:: efr32mg12-slwrb4170a.jpg
:align: center
:alt: SLWRB4170A Mighty Gecko Radio Board
SLWRB4170A (image courtesy of Silicon Labs)
The BRD4170A a.k.a. SLWRB4170A radio board plugs into the Wireless Starter Kit
Mainboard BRD4001A and is supported as one of :ref:`silabs_radio_boards`.
Hardware
********
- EFR32MG12P433F1024GM68 Mighty Gecko SoC
- CPU core: ARM Cortex-M4 with FPU
- Flash memory: 1024 kB
- RAM: 256 kB
- Transmit power: up to +19 dBm
- Operation frequency: 2.4 GHz and Sub-Ghz
- Crystals for LFXO (32.768 kHz) and HFXO (38.4 MHz).
For more information about the EFR32MG12 SoC and BRD4170A board, refer to these
documents:
- `EFR32MG12 Website`_
- `EFR32MG12 Datasheet`_
- `EFR32xG12 Reference Manual`_
- `BRD4170A User Guide`_
Supported Features
==================
The board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| MPU | on-chip | memory protection unit |
+-----------+------------+-------------------------------------+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtcc |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| SPI(M) | on-chip | spi port-polling |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/silabs/radio_boards/slwrb4170a/slwrb4170a_defconfig`
Connections and IOs
===================
In the following table, the column **Pin** contains Pin names. For example, PA2
means Pin number 2 on PORTA, as used in the board's datasheets and manuals.
+-------+-------------+-------------------------------------+
| Pin | Function | Usage |
+=======+=============+=====================================+
| PF4 | GPIO | LED0 |
+-------+-------------+-------------------------------------+
| PF5 | GPIO | LED1 |
+-------+-------------+-------------------------------------+
| PF6 | GPIO | Push Button PB0 |
+-------+-------------+-------------------------------------+
| PF7 | GPIO | Push Button PB1 |
+-------+-------------+-------------------------------------+
| PA5 | GPIO | Board Controller Enable VCOM_ENABLE |
+-------+-------------+-------------------------------------+
| PA0 | USART0_TX | UART Console VCOM_TX US0_TX #0 |
+-------+-------------+-------------------------------------+
| PA1 | USART0_RX | UART Console VCOM_RX US0_RX #0 |
+-------+-------------+-------------------------------------+
| PC6 | SPI_MOSI | Flash MOSI US1_TX #11 |
+-------+-------------+-------------------------------------+
| PC7 | SPI_MISO | Flash MISO US1_RX #11 |
+-------+-------------+-------------------------------------+
| PC8 | SPI_SCLK | Flash SCLK US1_CLK #11 |
+-------+-------------+-------------------------------------+
| PA4 | SPI_CS | Flash Chip Select (GPIO) |
+-------+-------------+-------------------------------------+
System Clock
============
The EFR32MG12P SoC is configured to use the 38.4 MHz external oscillator on the
board.
Serial Port
===========
The EFR32MG12P SoC has four USARTs and one Low Energy UARTs (LEUART).
USART0 is connected to the board controller and is used for the console.
Programming and Debugging
*************************
Flashing
========
Connect the BRD4001A board with a mounted BRD4170A radio module to your host
computer using the USB port.
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: slwrb4170a
:goals: flash
Open a serial terminal (minicom, putty, etc.) with the following settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Reset the board and you should see the following message in the terminal:
.. code-block:: console
Hello World! slwrb4170a
.. _EFR32MG12 Website:
path_to_url
.. _EFR32MG12 Datasheet:
path_to_url
.. _EFR32xG12 Reference Manual:
path_to_url
.. _BRD4170A User Guide:
path_to_url
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4170a/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,290 |
```unknown
CONFIG_ARM_MPU=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000
CONFIG_CMU_HFCLK_HFRCO=y
CONFIG_SOC_GECKO_EMU_DCDC=y
CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4321a/slwrb4321a_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 75 |
```c
/*
*
*/
#include <zephyr/init.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/sys/printk.h>
#include "em_cmu.h"
#include "board.h"
static int efm32gg_slwstk6121a_init(void)
{
const struct device *cur_dev;
/* Configure ethernet reference clock */
cur_dev = DEVICE_DT_GET(ETH_REF_CLK_GPIO_NODE);
if (!device_is_ready(cur_dev)) {
printk("Ethernet reference clock gpio port is not ready!\n");
return -ENODEV;
}
gpio_pin_configure(cur_dev, ETH_REF_CLK_GPIO_PIN, GPIO_OUTPUT);
gpio_pin_set(cur_dev, ETH_REF_CLK_GPIO_PIN, 0);
CMU_OscillatorEnable(cmuOsc_HFXO, true, true);
/* enable CMU_CLK2 as RMII reference clock */
CMU->CTRL |= CMU_CTRL_CLKOUTSEL2_HFXO;
CMU->ROUTELOC0 = (CMU->ROUTELOC0 & ~_CMU_ROUTELOC0_CLKOUT2LOC_MASK) |
(ETH_REF_CLK_LOCATION << _CMU_ROUTELOC0_CLKOUT2LOC_SHIFT);
CMU->ROUTEPEN |= CMU_ROUTEPEN_CLKOUT2PEN;
return 0;
}
/* needs to be done after GPIO driver init and device tree available */
SYS_INIT(efm32gg_slwstk6121a_init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE);
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4321a/board.c | c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 302 |
```yaml
board:
name: slwrb4321a
vendor: silabs
socs:
- name: efm32gg11b820f2048gm64
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4321a/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 40 |
```yaml
identifier: slwrb4321a
name: WGM160P Wi-Fi Module Radio Board (SLWRB4321A)
type: mcu
arch: arm
ram: 512
flash: 2048
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- counter
- i2c
- gpio
- netif:eth
- nvs
- uart
testing:
ignore_tags:
- bluetooth
vendor: silabs
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4321a/slwrb4321a.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 117 |
```unknown
# EFM32GG11 SLWRB4321A board configuration
config BOARD_SLWRB4321A
select SOC_PART_NUMBER_EFM32GG11B820F2048GM64
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4321a/Kconfig.slwrb4321a | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 42 |
```objective-c
/*
*
*/
#ifndef __INC_BOARD_H
#define __INC_BOARD_H
/* Ethernet specific pins */
#define ETH_REF_CLK_GPIO_NODE DT_NODELABEL(gpioa)
#define ETH_REF_CLK_GPIO_PIN DT_PROP_BY_IDX(DT_INST(0, silabs_gecko_ethernet), location_rmii_refclk, 2)
/* The driver ties CMU_CLK2 to the refclk, and pin A3 is CMU_CLK2 #1 */
#define ETH_REF_CLK_LOCATION 1
#endif /* __INC_BOARD_H */
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4321a/board.h | objective-c | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 110 |
```unknown
# EFM32GG SLWSTK6121A default board configuration
if BOARD_SLWRB4321A
config CMU_HFXO_FREQ
default 50000000
config CMU_HFRCO_FREQ
default 72000000
config CMU_LFXO_FREQ
default 32768
config LOG_BACKEND_SWO_FREQ_HZ
default 875000
depends on LOG_BACKEND_SWO
if NETWORKING
config NET_L2_ETHERNET
default y
endif # NETWORKING
endif # BOARD_SLWRB4321A
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4321a/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 120 |
```ini
if {[info exists env(OPENOCD_INTERFACE)]} {
set INTERFACE $env(OPENOCD_INTERFACE)
} else {
# By default connect over Debug USB port using the J-Link interface
set INTERFACE "jlink"
}
source [find interface/$INTERFACE.cfg]
transport select swd
set CHIPNAME efm32
source [find target/efm32.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
$_TARGETNAME configure -rtos auto
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4321a/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 143 |
```cmake
board_runner_args(openocd)
board_runner_args(jlink "--device=EFR32FG13PxxxF512")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4255a/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 59 |
```unknown
/*
*
*/
/dts-v1/;
#include <silabs/efr32fg13p233f512gm48.dtsi>
#include <silabs/efr32xg13p-pinctrl.dtsi>
#include "../common/efr32-series1-common.dtsi"
/ {
model = "Silicon Labs BRD4255A (Flex Gecko Radio Board)";
compatible = "silabs,slwrb4255a", "silabs,efr32fg13p";
};
&cpu0 {
clock-frequency = <38400000>;
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 32 kB for the bootloader */
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x0 0x00008000>;
read-only;
};
/* Reserve 220 kB for the application in slot 0 */
slot0_partition: partition@8000 {
label = "image-0";
reg = <0x00008000 0x00037000>;
};
/* Reserve 220 kB for the application in slot 1 */
slot1_partition: partition@3f000 {
label = "image-1";
reg = <0x0003f000 0x00037000>;
};
/* Reserve 32 kB for the scratch partition */
scratch_partition: partition@76000 {
label = "image-scratch";
reg = <0x00076000 0x00008000>;
};
/* Set 8Kb of storage at the end of the 512KB of flash */
storage_partition: partition@7e000 {
label = "storage";
reg = <0x0007e000 0x00002000>;
};
};
};
&usart0 {
current-speed = <115200>;
pinctrl-0 = <&usart0_default>;
pinctrl-names = "default";
status = "okay";
};
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4255a/slwrb4255a.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 460 |
```unknown
# EFR32FG13P BRD4255A board
config BOARD_SLWRB4255A
select SOC_PART_NUMBER_EFR32FG13P233F512GM48
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4255a/Kconfig.slwrb4255a | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 40 |
```cmake
# SPI is implemented via usart so node name isn't spi@...
list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4255a/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```yaml
boards:
- name: slwrb4255a
socs:
- name: efr32fg13p233f512gm48
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4255a/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
# EFR32 radio board
if BOARD_SLWRB4255A
config CMU_HFXO_FREQ
default 38400000
config CMU_LFXO_FREQ
default 32768
config FLASH_BASE_ADDRESS
hex
default 0x0
config LOG_BACKEND_SWO_FREQ_HZ
default 875000
depends on LOG_BACKEND_SWO
if SOC_GECKO_USE_RAIL
config FPU
default n
endif # SOC_GECKO_USE_RAIL
if BT
config FPU
default y
config COMMON_LIBC_MALLOC_ARENA_SIZE
default 8192
config MAIN_STACK_SIZE
default 3072 if PM
default 2304
endif # BT
endif # BOARD_SLWRB4255A
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4255a/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 162 |
```yaml
identifier: slwrb4255a
name: EFR32FG13 2400/915 MHz 19 dBm Dual Band Radio Board (SLWRB4255A)
type: mcu
arch: arm
ram: 64
flash: 512
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- counter
- gpio
- nvs
- spi
- uart
- watchdog
testing:
ignore_tags:
- net
- bluetooth
vendor: silabs
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4255a/slwrb4255a.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 125 |
```unknown
CONFIG_ARM_MPU=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=38400000
CONFIG_CMU_HFCLK_HFXO=y
CONFIG_SOC_GECKO_EMU_DCDC=y
CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4255a/slwrb4255a_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 74 |
```ini
if {[info exists env(OPENOCD_INTERFACE)]} {
set INTERFACE $env(OPENOCD_INTERFACE)
} else {
# By default connect over Debug USB port using the J-Link interface
set INTERFACE "jlink"
}
source [find interface/$INTERFACE.cfg]
transport select swd
set CHIPNAME efr32
source [find target/efm32.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4255a/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 134 |
```restructuredtext
.. _slwrb4321a:
WGM160P Wi-Fi Module (SLWRB4321A)
#################################
Overview
********
The WGM160P Starter Kit SLWSTK6121A comes with the BRD4321A radio board.
This radio boards contains a WGM160P module, which combines the WF200 Wi-Fi
transceiver with an EFM32GG11 microcontroller.
.. figure:: wgm160p-starter-kit.jpg
:align: center
:alt: SLWSTK6121A
SLWSTK6121A (image courtesy of Silicon Labs)
Hardware
********
- Advanced Energy Monitoring provides real-time information about the energy
consumption of an application or prototype design.
- Ultra low power 128x128 pixel color Memory-LCD
- 2 user buttons and 2 LEDs
- Si7021 Humidity and Temperature Sensor
- On-board Segger J-Link USB and Ethernet debugger
- 10/100Base-TX ethernet PHY and RJ-45 jack (on included expansion board)
- MicroSD card slot
- USB Micro-AB connector
For more information about the WGM160P and SLWSTK6121A board:
- `WGM160P Website`_
- `WGM160P Datasheet`_
- `SLWSTK6121A Website`_
- `SLWSTK6121A User Guide`_
- `EFM32GG11 Datasheet`_
- `EFM32GG11 Reference Manual`_
- `WF200 Datasheet`_
Supported Features
==================
The slwrb4321a board configuration supports the following hardware
features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| MPU | on-chip | memory protection unit |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtcc |
+-----------+------------+-------------------------------------+
| ETHERNET | on-chip | ethernet |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c port-polling |
+-----------+------------+-------------------------------------+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/silabs/slwrb4321a/slwrb4321a_defconfig`
Other hardware features, including the WF200 WiFi transceiver, are
currently not supported by the port.
Connections and IOs
===================
The WGM160P's EFM32GG11 SoC has six GPIO controllers (PORTA to PORTF), all of which are
currently enabled for the SLWSTK6121A board.
In the following table, the column **Name** contains pin names. For example, PE1
means pin number 1 on PORTE, as used in the board's datasheets and manuals.
+-------+-------------+-------------------------------------+
| Name | Function | Usage |
+=======+=============+=====================================+
| PA4 | GPIO | LED0 |
+-------+-------------+-------------------------------------+
| PA5 | GPIO | LED1 |
+-------+-------------+-------------------------------------+
| PD6 | GPIO | Push Button PB0 |
+-------+-------------+-------------------------------------+
| PD8 | GPIO | Push Button PB1 |
+-------+-------------+-------------------------------------+
| PE7 | UART_TX | UART TX Console VCOM_TX US0_TX #1 |
+-------+-------------+-------------------------------------+
| PE6 | UART_RX | UART RX Console VCOM_RX US0_RX #1 |
+-------+-------------+-------------------------------------+
| PB11 | I2C_SDA | SENSOR_I2C_SDA I2C1_SDA #1 |
+-------+-------------+-------------------------------------+
| PB12 | I2C_SCL | SENSOR_I2C_SCL I2C1_SCL #1 |
+-------+-------------+-------------------------------------+
System Clock
============
The EFM32GG11 SoC is configured to use the 50 MHz external oscillator on the
board.
Serial Port
===========
The EFM32GG11 SoC has four USARTs, two UARTs and two Low Energy UARTs (LEUART).
USART0 is connected to the board controller and is used for the console.
Programming and Debugging
*************************
.. note::
Before using the kit the first time, you should update the J-Link firmware
from `J-Link-Downloads`_
Flashing
========
The SLWSTK6121A includes an `J-Link`_ serial and debug adaptor built into the
board. The adaptor provides:
- A USB connection to the host computer
- A physical UART connection which is relayed over interface USB serial port.
Flashing an application to SLWSTK6121A
--------------------------------------
Connect the SLWSTK6121A to your host computer using the USB port.
Here is an example to build and flash the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: slwrb4321a
:goals: flash
Open a serial terminal (minicom, putty, etc.) with the following settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Reset the board and you'll see the following message on the corresponding serial port
terminal session:
.. code-block:: console
Hello World! slwrb4321a
.. _WGM160P Website:
path_to_url
.. _WGM160P Datasheet:
path_to_url
.. _SLWSTK6121A Website:
path_to_url
.. _SLWSTK6121A User Guide:
path_to_url
.. _EFM32GG11 Datasheet:
path_to_url
.. _EFM32GG11 Reference Manual:
path_to_url
.. _WF200 Datasheet:
path_to_url
.. _J-Link:
path_to_url
.. _J-Link-Downloads:
path_to_url
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4321a/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,451 |
```unknown
/*
*
*/
/dts-v1/;
#include <silabs/efr32mg21a020f1024im32.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include "slwrb4180a-pinctrl.dtsi"
/ {
model = "Silicon Labs BRD4180A (Mighty Gecko 21 Radio Board)";
compatible = "silabs,slwrb4180a", "silabs,efr32mg21";
chosen {
zephyr,console = &usart0;
zephyr,shell-uart = &usart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
led1 = &led1;
sw0 = &button0;
sw1 = &button1;
watchdog0 = &wdog0;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpiob 0 0>;
label = "LED 0";
};
led1: led_1 {
gpios = <&gpiob 1 0>;
label = "LED 1";
};
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
/* gpio flags need validation */
gpios = <&gpiod 2 GPIO_ACTIVE_LOW>;
label = "User Push Button 0";
zephyr,code = <INPUT_KEY_0>;
};
button1: button_1 {
/* gpio flags need validation */
gpios = <&gpiod 3 GPIO_ACTIVE_LOW>;
label = "User Push Button 1";
zephyr,code = <INPUT_KEY_1>;
};
};
};
&cpu0 {
clock-frequency = <38400000>;
};
&usart0 {
current-speed = <115200>;
pinctrl-0 = <&usart0_default>;
pinctrl-names = "default";
status = "okay";
};
&rtcc0 {
prescaler = <1>;
status = "okay";
};
&gpio {
status = "okay";
};
&gpioa {
status = "okay";
};
&gpiob {
status = "okay";
};
&gpioc {
status = "okay";
};
&gpiod {
status = "okay";
board-controller-enable {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
output-high;
};
};
&wdog0 {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 48 kB for the bootloader */
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x0 0x0000c000>;
read-only;
};
/* Reserve 464 kB for the application in slot 0 */
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000c000 0x00074000>;
};
/* Reserve 464 kB for the application in slot 1 */
slot1_partition: partition@80000 {
label = "image-1";
reg = <0x00080000 0x00074000>;
};
/* Reserve 32 kB for the scratch partition */
scratch_partition: partition@f4000 {
label = "image-scratch";
reg = <0x000f4000 0x00008000>;
};
/* Set 16Kb of storage at the end of the 1024Kb of flash */
storage_partition: partition@fc000 {
label = "storage";
reg = <0x000fc000 0x00004000>;
};
};
};
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4180a/slwrb4180a.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 907 |
```yaml
identifier: slwrb4180a
name: EFR32xG21 2.4 GHz 20 dBm Radio Board (SLWRB4180A)
type: mcu
arch: arm
ram: 96
flash: 1024
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- counter
- gpio
- nvs
- uart
- watchdog
testing:
ignore_tags:
- net
- bluetooth
vendor: silabs
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4180a/slwrb4180a.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 120 |
```cmake
board_runner_args(openocd)
board_runner_args(jlink "--device=EFR32MG21AxxxF1024")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4180a/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 60 |
```unknown
/*
*
*/
#include <arm/silabs/gpio_gecko.h>
#include <dt-bindings/pinctrl/gecko-pinctrl.h>
&pinctrl {
usart0_default: usart0_default {
group1 {
psels = <GECKO_PSEL(UART_TX, A, 5)>,
<GECKO_PSEL(UART_RX, A, 6)>,
<GECKO_LOC(UART, 0)>;
};
};
};
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4180a/slwrb4180a-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 106 |
```cmake
# SPI is implemented via usart so node name isn't spi@...
list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4180a/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```restructuredtext
.. _slwrb4255a:
EFR32FG13 2400/915 MHz 19 dBm Dual Band (SLWRB4255A)
####################################################
Overview
********
The EFR32FG13P Flex Gecko 2.4 GHz and 915 MHz Radio Board is delivered as a
`standalone Proprietary Wireless radio board`_. It contains a EFR32FG13P Wireless
SoC built on an ARM Cortex-M4F processor with excellent low power capabilities.
.. figure:: efr32fg13-slwrb4255a.jpg
:align: center
:alt: SLWRB4255A Flex Gecko 2.4 GHz and 915 MHz Radio Board
SLWRB4255A (image courtesy of Silicon Labs)
The BRD4255A a.k.a. SLWRB4255A radio board plugs into the Wireless Starter Kit
Mainboard BRD4001A and is supported as one of :ref:`silabs_radio_boards`.
Hardware
********
- EFR32FG13P233F512GM48 Flex Gecko SoC
- CPU core: ARM Cortex-M4 with FPU
- Flash memory: 512 kB
- RAM: 64 kB
- Transmit power: up to 19 dBm
- Operation frequency: 2.4 GHz, 915 MHz
- Crystals for LFXO (32.768 kHz) and HFXO (38.4 MHz).
For more information about the EFR32FG13 SoC and BRD4255A board, refer to these
documents:
- `EFR32FG13 Website`_
- `EFR32FG13 Datasheet`_
- `EFR32xG13 Reference Manual`_
- `BRD4255A Reference Manual`_
Supported Features
==================
The board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| MPU | on-chip | memory protection unit |
+-----------+------------+-------------------------------------+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtcc |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| SPI(M) | on-chip | spi port-polling |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/silabs/radio_boards/slwrb4255/slwrb4255_defconfig`
Connections and IOs
===================
In the following table, the column **Pin** contains Pin names. For example, PA2
means Pin number 2 on PORTA, as used in the board's datasheets and manuals.
+-------+-------------+-------------------------------------+
| Pin | Function | Usage |
+=======+=============+=====================================+
| PF4 | GPIO | LED0 |
+-------+-------------+-------------------------------------+
| PF5 | GPIO | LED1 |
+-------+-------------+-------------------------------------+
| PF6 | GPIO | Push Button PB0 |
+-------+-------------+-------------------------------------+
| PF7 | GPIO | Push Button PB1 |
+-------+-------------+-------------------------------------+
| PA5 | GPIO | Board Controller Enable VCOM_ENABLE |
+-------+-------------+-------------------------------------+
| PA0 | USART0_TX | UART Console VCOM_TX US0_TX #0 |
+-------+-------------+-------------------------------------+
| PA1 | USART0_RX | UART Console VCOM_RX US0_RX #0 |
+-------+-------------+-------------------------------------+
| PC6 | SPI_MOSI | Flash MOSI US1_TX #11 |
+-------+-------------+-------------------------------------+
| PC7 | SPI_MISO | Flash MISO US1_RX #11 |
+-------+-------------+-------------------------------------+
| PC8 | SPI_SCLK | Flash SCLK US1_CLK #11 |
+-------+-------------+-------------------------------------+
| PA4 | SPI_CS | Flash Chip Select (GPIO) |
+-------+-------------+-------------------------------------+
System Clock
============
The EFR32FG13P SoC is configured to use the 38.4 MHz external oscillator on the
board.
Serial Port
===========
The EFR32FG13P SoC has three USARTs and one Low Energy UARTs (LEUART).
USART0 is connected to the board controller and is used for the console.
Programming and Debugging
*************************
Flashing
========
Connect the BRD4001A board with a mounted BRD4255A radio module to your host
computer using the USB port.
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: slwrb4255a
:goals: flash
Open a serial terminal (minicom, putty, etc.) with the following settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Reset the board and you should see the following message in the terminal:
.. code-block:: console
Hello World! slwrb4255a
.. _EFR32FG13 Website:
path_to_url
.. _EFR32FG13 Datasheet:
path_to_url
.. _EFR32xG13 Reference Manual:
path_to_url
.. _standalone Proprietary Wireless radio board:
path_to_url
.. _BRD4255A Reference Manual:
path_to_url
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4255a/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,332 |
```unknown
CONFIG_ARM_MPU=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=38400000
CONFIG_CMU_HFCLK_HFXO=y
CONFIG_PINCTRL=y
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4180a/slwrb4180a_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 55 |
```yaml
boards:
- name: slwrb4180a
socs:
- name: efr32mg21a020f1024im32
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4180a/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 35 |
```unknown
# EFR32 radio board
if BOARD_SLWRB4180A
config CMU_HFXO_FREQ
default 38400000
config CMU_LFXO_FREQ
default 32768
config FLASH_BASE_ADDRESS
hex
default 0x0
config LOG_BACKEND_SWO_FREQ_HZ
default 875000
depends on LOG_BACKEND_SWO
if SOC_GECKO_USE_RAIL
config FPU
default y
endif # SOC_GECKO_USE_RAIL
if BT
config FPU
default y
config COMMON_LIBC_MALLOC_ARENA_SIZE
default 8192
config MAIN_STACK_SIZE
default 3072 if PM
default 2304
endif # BT
endif # BOARD_SLWRB4180A
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4180a/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 162 |
```unknown
# EFR32MG21 BRD4180A
config BOARD_SLWRB4180A
select SOC_PART_NUMBER_EFR32MG21A020F1024IM32
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4180a/Kconfig.slwrb4180a | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 39 |
```ini
if {[info exists env(OPENOCD_INTERFACE)]} {
set INTERFACE $env(OPENOCD_INTERFACE)
} else {
# By default connect over Debug USB port using the J-Link interface
set INTERFACE "jlink"
}
source [find interface/$INTERFACE.cfg]
transport select swd
set CHIPNAME efr32
source [find target/efm32.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4180a/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 134 |
```cmake
board_runner_args(openocd)
board_runner_args(jlink "--device=EFR32MG24BxxxF1536")
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
``` | /content/code_sandbox/boards/silabs/radio_boards/xg24_rb4187c/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 60 |
```yaml
identifier: xg24_rb4187c
name: EFR32xG24 2.4 GHz 20 dBm Radio Board (xG24-RB4187C)
type: mcu
arch: arm
ram: 256
flash: 1536
toolchain:
- zephyr
- gnuarmemb
- xtools
supported:
- gpio
- uart
- watchdog
testing:
ignore_tags:
- net
- bluetooth
- pm
- hwinfo
vendor: silabs
``` | /content/code_sandbox/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 123 |
```unknown
/*
*
*/
#include <arm/silabs/gpio_gecko.h>
#include <dt-bindings/pinctrl/gecko-pinctrl.h>
&pinctrl {
usart0_default: usart0_default {
group1 {
psels = <GECKO_PSEL(UART_TX, A, 8)>,
<GECKO_PSEL(UART_RX, A, 9)>,
<GECKO_LOC(UART, 0)>;
};
};
};
``` | /content/code_sandbox/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 106 |
```unknown
CONFIG_ARM_MPU=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_GPIO=y
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=78000000
CONFIG_SOC_GECKO_EMU_DCDC=y
CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y
CONFIG_PINCTRL=y
# Use BURTC as system clock source
CONFIG_GECKO_BURTC_TIMER=y
CONFIG_CMU_BURTCCLK_LFXO=y
CONFIG_SYS_CLOCK_TICKS_PER_SEC=1024
``` | /content/code_sandbox/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 111 |
```cmake
# SPI is implemented via usart so node name isn't spi@...
list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")
``` | /content/code_sandbox/boards/silabs/radio_boards/xg24_rb4187c/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 32 |
```yaml
boards:
- name: xg24_rb4187c
socs:
- name: efr32mg24b220f1536im48
``` | /content/code_sandbox/boards/silabs/radio_boards/xg24_rb4187c/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 36 |
```unknown
# EFR32 radio board
if BOARD_XG24_RB4187C
config CMU_HFXO_FREQ
default 39000000
config CMU_LFXO_FREQ
default 32768
config FLASH_BASE_ADDRESS
hex
default 0x08000000
config LOG_BACKEND_SWO_FREQ_HZ
default 875000
depends on LOG_BACKEND_SWO
if SOC_GECKO_USE_RAIL
config FPU
default y
endif # SOC_GECKO_USE_RAIL
if BT
config FPU
default y
config COMMON_LIBC_MALLOC_ARENA_SIZE
default 8192
config MAIN_STACK_SIZE
default 3072 if PM
default 2304
endif # BT
endif # BOARD_XG24_RB4187C
``` | /content/code_sandbox/boards/silabs/radio_boards/xg24_rb4187c/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 166 |
```restructuredtext
.. _slwrb4180a:
EFR32xG21 2.4 GHz 20 dBm (SLWRB4180A)
#####################################
Overview
********
The EFR32MG21 Mighty Gecko Radio Board is one of the two
radio boards delivered with `EFR32-SLWSTK6006A Website`_. It contains
a Wireless System-On-Chip from the EFR32MG21 family built on an
ARM Cortex-M33F processor with excellent low power capabilities.
.. figure:: efr32mg21-slwrb4180a.jpg
:align: center
:alt: SLWRB4180A Mighty Gecko Radio Board
SLWRB4180A (image courtesy of Silicon Labs)
The BRD4180A a.k.a. SLWRB4180A radio board plugs into the Wireless Starter Kit
Mainboard BRD4001A and is supported as one of :ref:`silabs_radio_boards`.
Hardware
********
- EFR32MG21A020F1024IM32 Mighty Gecko SoC
- CPU core: ARM Cortex-M33 with FPU
- Flash memory: 1024 kB
- RAM: 96 kB
- Transmit power: up to +20 dBm
- Operation frequency: 2.4 GHz
- Crystals for LFXO (32.768 kHz) and HFXO (38.4 MHz).
For more information about the EFR32MG21 SoC and BRD4180A board, refer to these
documents:
- `EFR32MG21 Website`_
- `EFR32MG21 Datasheet`_
- `EFR32xG21 Reference Manual`_
- `EFR32-SLWSTK6006A Website`_
- `BRD4180A User Guide`_
Supported Features
==================
The board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| MPU | on-chip | memory protection unit |
+-----------+------------+-------------------------------------+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | rtcc |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c port-polling |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
Other hardware features are currently not supported by the port.
Connections and IOs
===================
In the following table, the column **Name** contains Pin names. For example, PA2
means Pin number 2 on PORTA, as used in the board's datasheets and manuals.
+-------+-------------+-------------------------------------+
| Name | Function | Usage |
+=======+=============+=====================================+
| PB0 | GPIO | LED0 |
+-------+-------------+-------------------------------------+
| PB1 | GPIO | LED1 |
+-------+-------------+-------------------------------------+
| PD2 | GPIO | Push Button PB0 |
+-------+-------------+-------------------------------------+
| PD3 | GPIO | Push Button PB1 |
+-------+-------------+-------------------------------------+
| PD4 | GPIO | Board Controller Enable |
| | | EFM_BC_EN |
+-------+-------------+-------------------------------------+
| PA5 | USART1_TX | UART Console EFM_BC_TX US1_TX |
+-------+-------------+-------------------------------------+
| PA6 | USART1_RX | UART Console EFM_BC_RX US1_RX |
+-------+-------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/silabs/radio_boards/slwrb4180a/slwrb4180a_defconfig`
System Clock
============
The EFR32MG21 SoC is configured to use the 38.4 MHz external oscillator on the
board.
Serial Port
===========
The EFR32MG21 SoC has three USARTs.
USART0 is connected to the board controller and is used for the console.
Programming and Debugging
*************************
Flashing
========
Connect the BRD4001A board with a mounted BRD4180A radio module to your host
computer using the USB port.
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: slwrb4180a
:goals: flash
Open a serial terminal (minicom, putty, etc.) with the following settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Reset the board and you should see the following message in the terminal:
.. code-block:: console
Hello World! slwrb4180a
.. _EFR32-SLWSTK6006A Website:
path_to_url
.. _BRD4180A User Guide:
path_to_url
.. _EFR32MG21 Website:
path_to_url
.. _EFR32MG21 Datasheet:
path_to_url
.. _EFR32xG21 Reference Manual:
path_to_url
``` | /content/code_sandbox/boards/silabs/radio_boards/slwrb4180a/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,241 |
```unknown
# EFR32MG24 BRD4187C
config BOARD_XG24_RB4187C
select SOC_PART_NUMBER_EFR32MG24B220F1536IM48
``` | /content/code_sandbox/boards/silabs/radio_boards/xg24_rb4187c/Kconfig.xg24_rb4187c | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 40 |
```ini
if {[info exists env(OPENOCD_INTERFACE)]} {
set INTERFACE $env(OPENOCD_INTERFACE)
} else {
# By default connect over Debug USB port using the J-Link interface
set INTERFACE "jlink"
}
source [find interface/$INTERFACE.cfg]
transport select swd
set CHIPNAME efr32
source [find target/efm32.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/silabs/radio_boards/xg24_rb4187c/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 134 |
```unknown
/*
*
*/
/dts-v1/;
#include <silabs/efr32mg24b220f1536im48.dtsi>
#include <zephyr/dt-bindings/input/input-event-codes.h>
#include "xg24_rb4187c-pinctrl.dtsi"
/ {
model = "Silicon Labs BRD4187C (Mighty Gecko 24 Radio Board)";
compatible = "silabs,xg24_rb4187c", "silabs,efr32mg24";
chosen {
zephyr,console = &usart0;
zephyr,shell-uart = &usart0;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
zephyr,bt-hci = &bt_hci_silabs;
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
led1 = &led1;
sw0 = &button0;
sw1 = &button1;
watchdog0 = &wdog0;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&gpiob GECKO_PIN(2) GPIO_ACTIVE_HIGH>;
label = "LED 0";
};
led1: led_1 {
gpios = <&gpiob GECKO_PIN(4) GPIO_ACTIVE_HIGH>;
label = "LED 1";
};
};
buttons {
compatible = "gpio-keys";
button0: button_0 {
gpios = <&gpiob GECKO_PIN(1) GPIO_ACTIVE_LOW>;
label = "User Push Button 0";
zephyr,code = <INPUT_KEY_0>;
};
button1: button_1 {
gpios = <&gpiob GECKO_PIN(3) GPIO_ACTIVE_LOW>;
label = "User Push Button 1";
zephyr,code = <INPUT_KEY_1>;
};
};
};
&cpu0 {
clock-frequency = <39000000>;
};
&pstate_em3 {
status = "disabled";
};
&usart0 {
current-speed = <115200>;
pinctrl-0 = <&usart0_default>;
pinctrl-names = "default";
status = "okay";
};
&gpio {
location-swo = <0>;
status = "okay";
};
&gpioa {
status = "okay";
};
&gpiob {
status = "okay";
board-controller-enable {
gpio-hog;
gpios = <0 GPIO_ACTIVE_HIGH>;
output-high;
};
};
&gpioc {
status = "okay";
};
&gpiod {
status = "okay";
};
&wdog0 {
status = "okay";
};
&burtc0 {
status = "okay";
};
&stimer0 {
status = "okay";
};
&se {
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* Reserve 48 kB for the bootloader */
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x0 DT_SIZE_K(48)>;
read-only;
};
/* Reserve 720 kB for the application in slot 0 */
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000c000 0x000B4000>;
};
/* Reserve 720 kB for the application in slot 1 */
slot1_partition: partition@C0000 {
label = "image-1";
reg = <0x000C0000 0x000B4000>;
};
/* Reserve 32 kB for the scratch partition */
scratch_partition: partition@174000 {
label = "image-scratch";
reg = <0x00174000 DT_SIZE_K(32)>;
};
/* Set 16 kB of storage at the end of the 1536 kB of flash */
storage_partition: partition@17c000 {
label = "storage";
reg = <0x0017c000 DT_SIZE_K(16)>;
};
};
};
&bt_hci_silabs {
status = "okay";
};
``` | /content/code_sandbox/boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 978 |
```restructuredtext
.. _boards-atmel:
Atmel Corporation
#################
.. toctree::
:maxdepth: 1
:glob:
**/*
``` | /content/code_sandbox/boards/atmel/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```cmake
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/atmel/sam0/samc21n_xpro/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 19 |
```restructuredtext
.. _xg24_rb4187c:
EFR32xG24 2.4 GHz 20 dBm (xG24-RB4187C)
#######################################
Overview
********
The EFR32MG24 Mighty Gecko Radio Board is one of the two
radio boards delivered with `xG24-PK6010A Website`_. It contains
a Wireless System-On-Chip from the EFR32MG24 family built on an
ARM Cortex-M33F processor with excellent low power capabilities.
.. figure:: efr32mg24-xg24-rb4187c.jpg
:align: center
:alt: xG24-RB4187C Mighty Gecko Radio Board
xG24-RB4187C (image courtesy of Silicon Labs)
The BRD4187C a.k.a. xG24-RB4187C radio board plugs into the Wireless Pro Kit
Mainboard BRD4002A and is supported as one of :ref:`silabs_radio_boards`.
Hardware
********
- EFR32MG24B220F1536IM48 Mighty Gecko SoC
- CPU core: ARM Cortex-M33 with FPU
- Flash memory: 1536 kB
- RAM: 256 kB
- Transmit power: up to +20 dBm
- Operation frequency: 2.4 GHz
- Crystals for LFXO (32.768 kHz) and HFXO (39 MHz).
For more information about the EFR32MG24 SoC and BRD4187C board, refer to these
documents:
- `EFR32MG24 Website`_
- `EFR32MG24 Datasheet`_
- `EFR32xG24 Reference Manual`_
- `xG24-PK6010A Website`_
- `BRD4187C User Guide`_
Supported Features
==================
The board configuration supports the following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| MPU | on-chip | memory protection unit |
+-----------+------------+-------------------------------------+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| SYSTICK | on-chip | systick |
+-----------+------------+-------------------------------------+
| COUNTER | on-chip | stimer |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| TRNG | on-chip | semailbox |
+-----------+------------+-------------------------------------+
| WATCHDOG | on-chip | watchdog |
+-----------+------------+-------------------------------------+
Other hardware features are currently not supported by the port.
Connections and IOs
===================
In the following table, the column **Name** contains Pin names. For example, PA2
means Pin number 2 on PORTA, as used in the board's datasheets and manuals.
+-------+-------------+-------------------------------------+
| Name | Function | Usage |
+=======+=============+=====================================+
| PB2 | GPIO | LED0 |
+-------+-------------+-------------------------------------+
| PB4 | GPIO | LED1 |
+-------+-------------+-------------------------------------+
| PB1 | GPIO | Push Button 0 |
+-------+-------------+-------------------------------------+
| PB3 | GPIO | Push Button 1 |
+-------+-------------+-------------------------------------+
| PB0 | GPIO | Board Controller Enable |
| | | VCOM_ENABLE |
+-------+-------------+-------------------------------------+
| PA8 | USART0_TX | UART Console VCOM_TX US0_TX |
+-------+-------------+-------------------------------------+
| PA9 | USART0_RX | UART Console VCOM_RX US0_RX |
+-------+-------------+-------------------------------------+
The default configuration can be found in
:zephyr_file:`boards/silabs/radio_boards/xg24_rb4187c/xg24_rb4187c_defconfig`
System Clock
============
The EFR32MG24 SoC is configured to use the 39 MHz external oscillator on the
board.
Serial Port
===========
The EFR32MG24 SoC has one USART and two EUSARTs.
USART0 is connected to the board controller and is used for the console.
Programming and Debugging
*************************
Flashing
========
Connect the BRD4002A board with a mounted BRD4187C radio module to your host
computer using the USB port.
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: xg24_rb4187c
:goals: flash
Open a serial terminal (minicom, putty, etc.) with the following settings:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
Reset the board and you should see the following message in the terminal:
.. code-block:: console
Hello World! xg24_rb4187c
.. _xG24-PK6010A Website:
path_to_url
.. _BRD4187C User Guide:
path_to_url
.. _EFR32MG24 Website:
path_to_url
.. _EFR32MG24 Datasheet:
path_to_url
.. _EFR32xG24 Reference Manual:
path_to_url
``` | /content/code_sandbox/boards/silabs/radio_boards/xg24_rb4187c/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,250 |
```yaml
identifier: samc21n_xpro
name: SAM C21N Xplained Pro
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
flash: 256
ram: 32
supported:
- adc
- can
- dma
- gpio
- i2c
- pwm
- spi
- uart
vendor: atmel
``` | /content/code_sandbox/boards/atmel/sam0/samc21n_xpro/samc21n_xpro.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 102 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - /soc/pinmux@41004400 & /soc/gpio@41004400
# - /soc/pinmux@41004480 & /soc/gpio@41004480
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/atmel/sam0/samc21n_xpro/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 74 |
```unknown
/*
*
*/
/dts-v1/;
#include <atmel/samc21.dtsi>
#include <atmel/samx2xx18.dtsi>
#include "samc21n_xpro-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "SAM C21N Xplained Pro";
compatible = "samc21n,xpro", "atmel,samc21n18a", "atmel,samc21";
chosen {
zephyr,console = &sercom4;
zephyr,shell-uart = &sercom4;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,canbus = &can0;
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
pwm-led0 = &pwm_led0;
sw0 = &user_button;
i2c-0 = &sercom1;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&portc 05 GPIO_ACTIVE_LOW>;
label = "Yellow LED";
};
};
pwmleds {
compatible = "pwm-leds";
pwm_led0: pwm_led_0 {
pwms = <&tcc2 1 PWM_MSEC(20)>;
};
};
buttons {
compatible = "gpio-keys";
user_button: button_0 {
gpios = <&portb 19 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "User Button";
zephyr,code = <INPUT_KEY_0>;
};
};
};
&cpu0 {
clock-frequency = <48000000>;
};
&adc0 {
status = "okay";
pinctrl-0 = <&adc0_default>;
pinctrl-names = "default";
};
&adc1 {
pinctrl-0 = <&adc1_default>;
pinctrl-names = "default";
};
&tcc2 {
status = "okay";
compatible = "atmel,sam0-tcc-pwm";
prescaler = <256>;
#pwm-cells = <2>;
pinctrl-0 = <&pwm_default>;
pinctrl-names = "default";
};
&sercom0 {
status = "okay";
compatible = "atmel,sam0-uart";
current-speed = <9600>;
rxpo = <1>;
txpo = <0>;
pinctrl-0 = <&sercom0_uart_default>;
pinctrl-names = "default";
};
&sercom1 {
status = "okay";
compatible = "atmel,sam0-i2c";
clock-frequency = <I2C_BITRATE_FAST>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sercom1_i2c_default>;
pinctrl-names = "default";
};
&sercom2 {
status = "okay";
compatible = "atmel,sam0-uart";
current-speed = <115200>;
rxpo = <1>;
txpo = <0>;
pinctrl-0 = <&sercom2_uart_default>;
pinctrl-names = "default";
};
&sercom4 {
status = "okay";
compatible = "atmel,sam0-uart";
current-speed = <115200>;
rxpo = <3>;
txpo = <1>;
pinctrl-0 = <&sercom4_uart_default>;
pinctrl-names = "default";
};
&sercom5 {
status = "okay";
compatible = "atmel,sam0-spi";
dipo = <0>;
dopo = <2>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sercom5_spi_default>;
pinctrl-names = "default";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/*
* The final 16 KiB is reserved for the application.
* Storage partition will be used by FCB/LittleFS/NVS
* if enabled.
*/
storage_partition: partition@3c000 {
label = "storage";
reg = <0x0003c000 0x00004000>;
};
};
};
&can0 {
status = "okay";
pinctrl-0 = <&can0_default>;
pinctrl-names = "default";
can-transceiver {
max-bitrate = <5000000>;
};
};
&can1 {
pinctrl-0 = <&can1_default>;
pinctrl-names = "default";
can-transceiver {
max-bitrate = <5000000>;
};
};
``` | /content/code_sandbox/boards/atmel/sam0/samc21n_xpro/samc21n_xpro.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,074 |
```yaml
board:
name: samc21n_xpro
vendor: atmel
socs:
- name: samc21n18a
``` | /content/code_sandbox/boards/atmel/sam0/samc21n_xpro/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 34 |
```unknown
CONFIG_BUILD_OUTPUT_HEX=y
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_UART_INTERRUPT_DRIVEN=y
``` | /content/code_sandbox/boards/atmel/sam0/samc21n_xpro/samc21n_xpro_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 28 |
```unknown
config BOARD_SAMC21N_XPRO
select SOC_SAMC21N18A
``` | /content/code_sandbox/boards/atmel/sam0/samc21n_xpro/Kconfig.samc21n_xpro | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 22 |
```ini
source [find interface/cmsis-dap.cfg]
transport select swd
# chip name
set CHIPNAME at91samc21n18a
set ENDIAN little
set CPUTAPID 0x0bc11477
source [find target/at91samdXX.cfg]
reset_config trst_and_srst separate
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/atmel/sam0/samc21n_xpro/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 124 |
```unknown
/*
*/
#include <dt-bindings/pinctrl/samc21n-pinctrl.h>
&pinctrl {
pwm_default: pwm_default {
group1 {
pinmux = <PC5F_TCC2_WO1>;
};
};
adc0_default: adc0_default {
group1 {
pinmux = <PB9B_ADC0_AIN3>;
};
};
adc1_default: adc1_default {
group1 {
pinmux = <PA8B_ADC1_AIN10>;
};
};
can0_default: can0_default {
group1 {
pinmux = <PA25G_CAN0_RX>,
<PA24G_CAN0_TX>;
};
};
can1_default: can1_default {
group1 {
pinmux = <PB15G_CAN1_RX>,
<PB14G_CAN1_TX>;
};
};
sercom0_uart_default: sercom0_uart_default {
group1 {
pinmux = <PB25C_SERCOM0_PAD1>,
<PB24C_SERCOM0_PAD0>;
};
};
sercom1_i2c_default: sercom1_i2c_default {
group1 {
pinmux = <PA16C_SERCOM1_PAD0>,
<PA17C_SERCOM1_PAD1>;
};
};
sercom2_uart_default: sercom1_uart_default {
group1 {
pinmux = <PA13C_SERCOM2_PAD1>,
<PA12C_SERCOM2_PAD0>;
};
};
sercom4_uart_default: sercom4_uart_default {
group1 {
pinmux = <PB11D_SERCOM4_PAD3>,
<PB10D_SERCOM4_PAD2>;
};
};
sercom5_spi_default: sercom5_spi_default {
group1 {
pinmux = <PB0D_SERCOM5_PAD2>,
<PB2D_SERCOM5_PAD0>,
<PB1D_SERCOM5_PAD3>;
};
};
};
``` | /content/code_sandbox/boards/atmel/sam0/samc21n_xpro/samc21n_xpro-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 457 |
```unknown
CONFIG_SOC_ATMEL_SAMD_XOSC32K=y
CONFIG_SOC_ATMEL_SAMD_XOSC32K_AS_MAIN=y
CONFIG_BUILD_OUTPUT_HEX=y
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_UART_INTERRUPT_DRIVEN=y
``` | /content/code_sandbox/boards/atmel/sam0/samd21_xpro/samd21_xpro_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 56 |
```cmake
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/atmel/sam0/samd21_xpro/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 19 |
```unknown
config BOARD_SAMD21_XPRO
select SOC_SAMD21J18A
``` | /content/code_sandbox/boards/atmel/sam0/samd21_xpro/Kconfig.samd21_xpro | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 19 |
```unknown
/*
*
*/
/dts-v1/;
#include <freq.h>
#include <atmel/samd21.dtsi>
#include <atmel/samx2xx18.dtsi>
#include "samd21_xpro-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "SAM D21 Xplained Pro";
compatible = "samd21,xpro", "atmel,samd21j18a", "atmel,samd21";
chosen {
zephyr,console = &sercom3;
zephyr,shell-uart = &sercom3;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
};
/* These aliases are provided for compatibility with samples */
aliases {
led0 = &led0;
pwm-led0 = &pwm_led0;
sw0 = &user_button;
i2c-0 = &sercom2;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
gpios = <&portb 30 GPIO_ACTIVE_LOW>;
label = "Yellow LED";
};
};
pwmleds {
compatible = "pwm-leds";
pwm_led0: pwm_led_0 {
pwms = <&tcc0 0 PWM_MSEC(20)>;
};
};
buttons {
compatible = "gpio-keys";
user_button: button_0 {
gpios = <&porta 15 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "SW0";
zephyr,code = <INPUT_KEY_0>;
};
};
};
&cpu0 {
clock-frequency = <DT_FREQ_M(48)>;
};
&tcc0 {
status = "okay";
compatible = "atmel,sam0-tcc-pwm";
/* Gives a maximum period of 1.4s */
prescaler = <4>;
#pwm-cells = <2>;
pinctrl-0 = <&pwm_default>;
pinctrl-names = "default";
};
&sercom0 {
status = "okay";
compatible = "atmel,sam0-uart";
current-speed = <9600>;
rxpo = <3>;
txpo = <1>;
pinctrl-0 = <&sercom0_uart_default>;
pinctrl-names = "default";
};
&sercom1 {
status = "okay";
compatible = "atmel,sam0-uart";
current-speed = <115200>;
rxpo = <3>;
txpo = <0>;
pinctrl-0 = <&sercom1_uart_default>;
pinctrl-names = "default";
};
&sercom2 {
status = "okay";
compatible = "atmel,sam0-i2c";
clock-frequency = <I2C_BITRATE_FAST>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sercom2_i2c_default>;
pinctrl-names = "default";
};
&sercom3 {
status = "okay";
compatible = "atmel,sam0-uart";
current-speed = <115200>;
rxpo = <1>;
txpo = <0>;
pinctrl-0 = <&sercom3_uart_default>;
pinctrl-names = "default";
};
&sercom5 {
status = "okay";
compatible = "atmel,sam0-spi";
dipo = <0>;
dopo = <2>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&sercom5_spi_default>;
pinctrl-names = "default";
};
zephyr_udc0: &usb0 {
status = "okay";
pinctrl-0 = <&usb_dc_default>;
pinctrl-names = "default";
};
``` | /content/code_sandbox/boards/atmel/sam0/samd21_xpro/samd21_xpro.dts | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 855 |
```cmake
# SPI is implemented via sercom so node name isn't spi@...
list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge")
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - /soc/pinmux@41004400 & /soc/gpio@41004400
# - /soc/pinmux@41004480 & /soc/gpio@41004480
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/atmel/sam0/samd21_xpro/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 104 |
```yaml
board:
name: samd21_xpro
vendor: atmel
socs:
- name: samd21j18a
``` | /content/code_sandbox/boards/atmel/sam0/samd21_xpro/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 33 |
```yaml
identifier: samd21_xpro
name: SAM D21 Xplained Pro
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
flash: 256
ram: 32
supported:
- adc
- counter
- dma
- gpio
- i2c
- pwm
- spi
- uart
- usb_device
- watchdog
vendor: atmel
``` | /content/code_sandbox/boards/atmel/sam0/samd21_xpro/samd21_xpro.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 109 |
```restructuredtext
.. _samc21n_xpro:
SAM C21N Xplained Pro Evaluation Kit
####################################
Overview
********
The SAM C21N Xplained Pro evaluation kit is ideal for evaluation and
prototyping with the SAM C21N Cortex-M0+ processor-based
microcontrollers. The kit includes Atmels Embedded Debugger (EDBG),
which provides a full debug interface without the need for additional
hardware.
.. image:: img/atsamc21n_xpro.jpg
:align: center
:alt: SAMC21N-XPRO
Hardware
********
- SAMC21N18A ARM Cortex-M0+ processor at 48 MHz
- 32.768 kHz crystal oscillator
- 256 KiB flash memory, 32 KiB of RAM, 8KB RRW flash
- One yellow user LED
- One mechanical user push button
- One reset button
- One QTouch button
- On-board USB based EDBG unit with serial console
- Two CAN transceivers
Supported Features
==================
The samc21n_xpro board configuration supports the following hardware
features:
.. list-table::
:header-rows: 1
* - Interface
- Controller
- Driver / Component
* - NVIC
- on-chip
- nested vector interrupt controller
* - Flash
- on-chip
- Can be used with LittleFS to store files
* - SYSTICK
- on-chip
- systick
* - WDT
- on-chip
- Watchdog
* - ADC
- on-chip
- Analog to Digital Converter
* - GPIO
- on-chip
- I/O ports
* - PWM
- on-chip
- Pulse Width Modulation
* - USART
- on-chip
- Serial ports
* - I2C
- on-chip
- I2C ports
* - SPI
- on-chip
- Serial Peripheral Interface ports
* - CAN
- on-chip
- CAN ports
Other hardware features are not currently supported by Zephyr.
The default configuration can be found in the Kconfig
:zephyr_file:`boards/atmel/sam0/samc21n_xpro/samc21n_xpro_defconfig`.
Pin Mapping
===========
The SAM C21N Xplained Pro evaluation kit has 4 GPIO controllers. These
controllers are responsible for pin muxing, input/output, pull-up, etc.
For more details please refer to `SAM C21 Family Datasheet`_ and the `SAM C21N
Xplained Pro Schematic`_.
Default Zephyr Peripheral Mapping:
----------------------------------
- ADC0 : PB09
- ADC1 : PA08
- CAN0 TX : PA24
- CAN0 RX : PA25
- CAN1 TX : PB14
- CAN1 RX : PB15
- SERCOM0 USART TX : PB24
- SERCOM0 USART RX : PB25
- SERCOM1 I2C SDA : PA16
- SERCOM1 I2C SCL : PA17
- SERCOM2 USART TX : PA12
- SERCOM2 USART RX : PA13
- SERCOM4 USART TX : PB10
- SERCOM4 USART RX : PB11
- SERCOM5 SPI MISO : PB00
- SERCOM5 SPI MOSI : PB02
- SERCOM5 SPI SCK : PB01
- GPIO/PWM LED0 : PC05
System Clock
============
The SAMC21 MCU is configured to use the 32.768 kHz internal oscillator
with the on-chip internal oscillator generating the 48 MHz system clock.
Serial Port
===========
The SAMC21 MCU has eight SERCOM based USARTs with three configured as USARTs in
this BSP. SERCOM4 is the default Zephyr console.
- SERCOM0 9600 8n1
- SERCOM2 115200 8n1
- SERCOM4 115200 8n1 connected to the onboard Atmel Embedded Debugger (EDBG)
PWM
===
The SAMC21 MCU has 3 TCC based PWM units with up to 4 outputs each and a period
of 24 bits or 16 bits. If :code:`CONFIG_PWM_SAM0_TCC` is enabled then LED0 is
driven by TCC2 instead of by GPIO.
Programming and Debugging
*************************
The SAM C21N Xplained Pro comes with a Atmel Embedded Debugger (EDBG). This
provides a debug interface to the SAMC21 chip and is supported by
OpenOCD.
Flashing
========
#. Build the Zephyr kernel and the ``hello_world`` sample application:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: samc21n_xpro
:goals: build
:compact:
#. Connect the SAM C21N Xplained Pro to your host computer using the USB debug
port.
#. Run your favorite terminal program to listen for output. Under Linux the
terminal should be :code:`/dev/ttyACM0`. For example:
.. code-block:: console
$ minicom -D /dev/ttyACM0 -o
The -o option tells minicom not to send the modem initialization
string. Connection should be configured as follows:
- Speed: 115200
- Data: 8 bits
- Parity: None
- Stop bits: 1
#. To flash an image:
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: samc21n_xpro
:goals: flash
:compact:
You should see "Hello World! samc21n_xpro" in your terminal.
References
**********
.. target-notes::
.. _Microchip website:
path_to_url
.. _SAM C21 Family Datasheet:
path_to_url
.. _SAM C21N Xplained Pro Schematic:
path_to_url
``` | /content/code_sandbox/boards/atmel/sam0/samc21n_xpro/doc/index.rst | restructuredtext | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 1,340 |
```ini
source [find interface/cmsis-dap.cfg]
transport select swd
# chip name
set CHIPNAME at91samd21j18a
set ENDIAN little
set CPUTAPID 0x0bc11477
source [find target/at91samdXX.cfg]
reset_config trst_and_srst separate
$_TARGETNAME configure -event gdb-attach {
echo "Debugger attaching: halting execution"
reset halt
gdb_breakpoint_override hard
}
$_TARGETNAME configure -event gdb-detach {
echo "Debugger detaching: resuming execution"
resume
}
``` | /content/code_sandbox/boards/atmel/sam0/samd21_xpro/support/openocd.cfg | ini | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 124 |
```unknown
/*
*/
#include <dt-bindings/pinctrl/samd21-da1jXabcd-pinctrl.h>
&pinctrl {
pwm_default: pwm_default {
group1 {
pinmux = <PB30E_TCC0_WO0>;
};
};
sercom2_i2c_default: sercom2_i2c_default {
group1 {
pinmux = <PA8D_SERCOM2_PAD0>,
<PA9D_SERCOM2_PAD1>;
};
};
sercom5_spi_default: sercom5_spi_default {
group1 {
pinmux = <PB2D_SERCOM5_PAD0>,
<PB22D_SERCOM5_PAD2>,
<PB23D_SERCOM5_PAD3>;
};
};
sercom0_uart_default: sercom0_uart_default {
group1 {
pinmux = <PA11C_SERCOM0_PAD3>,
<PA10C_SERCOM0_PAD2>;
};
};
sercom1_uart_default: sercom1_uart_default {
group1 {
pinmux = <PA19C_SERCOM1_PAD3>,
<PA16C_SERCOM1_PAD0>;
};
};
sercom3_uart_default: sercom3_uart_default {
group1 {
pinmux = <PA23C_SERCOM3_PAD1>,
<PA22C_SERCOM3_PAD0>;
};
};
usb_dc_default: usb_dc_default {
group1 {
pinmux = <PA25G_USB_DP>,
<PA24G_USB_DM>;
};
};
};
``` | /content/code_sandbox/boards/atmel/sam0/samd21_xpro/samd21_xpro-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 354 |
```cmake
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
``` | /content/code_sandbox/boards/atmel/sam0/same54_xpro/board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 19 |
```unknown
CONFIG_SOC_ATMEL_SAMD5X_XOSC32K=y
CONFIG_SOC_ATMEL_SAMD5X_XOSC32K_AS_MAIN=y
CONFIG_BUILD_OUTPUT_HEX=y
CONFIG_ARM_MPU=y
CONFIG_HW_STACK_PROTECTION=y
CONFIG_CONSOLE=y
CONFIG_SERIAL=y
CONFIG_UART_CONSOLE=y
CONFIG_UART_INTERRUPT_DRIVEN=y
``` | /content/code_sandbox/boards/atmel/sam0/same54_xpro/same54_xpro_defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 73 |
```yaml
identifier: same54_xpro
name: SAM E54 Xplained Pro
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
flash: 1024
ram: 256
supported:
- adc
- flash
- gpio
- i2c
- netif:eth
- pwm
- spi
- uart
- usb_device
vendor: atmel
``` | /content/code_sandbox/boards/atmel/sam0/same54_xpro/same54_xpro.yaml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 108 |
```cmake
# Suppress "unique_unit_address_if_enabled" to handle the following overlaps:
# - /soc/pinmux@41004400 & /soc/gpio@41004400
# - /soc/pinmux@41004480 & /soc/gpio@41004480
list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled")
``` | /content/code_sandbox/boards/atmel/sam0/same54_xpro/pre_dt_board.cmake | cmake | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 74 |
```unknown
config BOARD_SAME54_XPRO
select SOC_SAME54P20A
``` | /content/code_sandbox/boards/atmel/sam0/same54_xpro/Kconfig.same54_xpro | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 19 |
```yaml
board:
name: same54_xpro
vendor: atmel
socs:
- name: same54p20a
``` | /content/code_sandbox/boards/atmel/sam0/same54_xpro/board.yml | yaml | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 31 |
```unknown
/*
*/
#include <dt-bindings/pinctrl/same54p-pinctrl.h>
&pinctrl {
pwm_default: pwm_default {
group1 {
pinmux = <PC18F_TCC0_WO2>;
};
};
gmac_rmii: gmac_rmii {
group1 {
pinmux = <PA14L_GMAC_GTXCK>,
<PA17L_GMAC_GTXEN>,
<PA18L_GMAC_GTX0>,
<PA19L_GMAC_GTX1>,
<PC20L_GMAC_GRXDV>,
<PA13L_GMAC_GRX0>,
<PA12L_GMAC_GRX1>,
<PA15L_GMAC_GRXER>;
};
};
mdio_default: mdio_default {
group1 {
pinmux = <PC11L_GMAC_GMDC>,
<PC12L_GMAC_GMDIO>;
};
};
sercom7_i2c_default: sercom7_i2c_default {
group1 {
pinmux = <PD8C_SERCOM7_PAD0>,
<PD9C_SERCOM7_PAD1>;
};
};
sercom4_spi_default: sercom4_spi_default {
group1 {
pinmux = <PB26D_SERCOM4_PAD1>,
<PB27D_SERCOM4_PAD0>,
<PB29D_SERCOM4_PAD3>;
};
};
sercom2_uart_default: sercom2_uart_default {
group1 {
pinmux = <PB25D_SERCOM2_PAD0>,
<PB24D_SERCOM2_PAD1>;
};
};
usb_dc_default: usb_dc_default {
group1 {
pinmux = <PA25H_USB_DP>,
<PA24H_USB_DM>;
};
};
};
``` | /content/code_sandbox/boards/atmel/sam0/same54_xpro/same54_xpro-pinctrl.dtsi | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 408 |
```unknown
# SAM E54 Xplained Pro board configuration
#
if ETH_SAM_GMAC
# Read MAC address from AT24MAC402 EEPROM
config ETH_SAM_GMAC_MAC_I2C_INT_ADDRESS
default 0x9A
config ETH_SAM_GMAC_MAC_I2C_INT_ADDRESS_SIZE
default 1
config ETH_SAM_GMAC_MAC_I2C_EEPROM
default y
select I2C
endif # ETH_SAM_GMAC
if NETWORKING
config NET_L2_ETHERNET
default y
endif # NETWORKING
``` | /content/code_sandbox/boards/atmel/sam0/same54_xpro/Kconfig.defconfig | unknown | 2016-05-26T17:54:19 | 2024-08-16T18:09:06 | zephyr | zephyrproject-rtos/zephyr | 10,307 | 118 |
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