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```unknown # Sercan Erat <sercanerat@gmail.com> CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y ```
/content/code_sandbox/boards/rak/rak11720/rak11720_defconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
35
```unknown /* * Sercan Erat <sercanerat@gmail.com> */ #include <dt-bindings/pinctrl/ambiq-apollo3-pinctrl.h> &pinctrl { uart0_default: uart0_default { group1 { pinmux = <UART0TX_P39>; }; group2 { pinmux = <UART0RX_P40>; input-enable; }; }; i2c0_default: i2c0_default { group1 { pinmux = <M0SCL_P5>, <M0SDAWIR3_P6>; drive-open-drain; drive-strength = "0.5"; bias-pull-up; }; }; i2c1_default: i2c1_default { group1 { pinmux = <M1SCL_P8>, <M1SDAWIR3_P9>; drive-open-drain; drive-strength = "0.5"; bias-pull-up; }; }; i2c2_default: i2c2_default { group1 { pinmux = <M2SCL_P27>, <M2SDAWIR3_P25>; drive-open-drain; drive-strength = "0.5"; bias-pull-up; }; }; i2c3_default: i2c3_default { group1 { pinmux = <M3SCL_P42>, <M3SDAWIR3_P43>; drive-open-drain; drive-strength = "0.5"; bias-pull-up; }; }; i2c4_default: i2c4_default { group1 { pinmux = <M4SCL_P39>, <M4SDAWIR3_P40>; drive-open-drain; drive-strength = "0.5"; bias-pull-up; }; }; i2c5_default: i2c5_default { group1 { pinmux = <M5SCL_P48>, <M5SDAWIR3_P49>; drive-open-drain; drive-strength = "0.5"; bias-pull-up; }; }; spi0_default: spi0_default { group1 { pinmux = <M0SCK_P5>, <M0MISO_P6>, <M0MOSI_P7>; }; group2 { pinmux = <NCE1_P1>; drive-push-pull; ambiq,iom-nce-module = <0>; ambiq,iom-num = <0>; }; }; spi1_default: spi1_default { group1 { pinmux = <M1SCK_P8>, <M1MISO_P9>, <M1MOSI_P10>; }; group2 { pinmux = <NCE11_P11>; drive-push-pull; ambiq,iom-nce-module = <1>; ambiq,iom-num = <1>; }; }; spi2_default: spi2_default { group1 { pinmux = <M2SCK_P27>, <M2MISO_P25>, <M2MOSI_P28>; }; group2 { pinmux = <NCE15_P15>; drive-push-pull; ambiq,iom-nce-module = <3>; ambiq,iom-num = <2>; }; }; spi3_default: spi3_default { group1 { pinmux = <M3SCK_P42>, <M3MISO_P43>, <M3MOSI_P38>; }; group2 { pinmux = <NCE12_P12>; drive-push-pull; ambiq,iom-nce-module = <0>; ambiq,iom-num = <3>; }; }; spi4_default: spi4_default { group1 { pinmux = <M4SCK_P39>, <M4MISO_P40>, <M4MOSI_P44>; }; group2 { pinmux = <NCE13_P13>; drive-push-pull; ambiq,iom-nce-module = <1>; ambiq,iom-num = <4>; }; }; spi5_default: spi5_default { group1 { pinmux = <M5SCK_P48>, <M5MISO_P49>, <M5MOSI_P47>; }; group2 { pinmux = <NCE16_P16>; drive-push-pull; ambiq,iom-nce-module = <0>; ambiq,iom-num = <5>; }; }; mspi0_default: mspi0_default{ group1 { pinmux = <MSPI0_0_P22>, <MSPI0_1_P26>, <MSPI0_2_P4>, <MSPI0_3_P23>, <MSPI0_8_P24>; }; group2 { pinmux = <NCE19_P19>; drive-push-pull; drive-strength = "0.5"; ambiq,iom-nce-module = <0>; ambiq,iom-num = <6>; }; }; bleif_default: bleif_default{ group1 { pinmux = <BLEIF_SCK_P30>, <BLEIF_MISO_P31>, <BLEIF_MOSI_P32>, <BLEIF_CSN_P33>, <BLEIF_STATUS_P35>, <BLEIF_IRQ_P41>; }; }; }; ```
/content/code_sandbox/boards/rak/rak11720/rak11720_apollo3-pinctrl.dtsi
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
1,305
```cmake board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000") board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000") include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake) ```
/content/code_sandbox/boards/rak/rak4631/board.cmake
cmake
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
113
```unknown # Enable MPU CONFIG_ARM_MPU=y # Enable hardware stack protection CONFIG_HW_STACK_PROTECTION=y # Enable RTT CONFIG_USE_SEGGER_RTT=y # enable GPIO CONFIG_GPIO=y # enable uart driver CONFIG_SERIAL=y # enable console CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y ```
/content/code_sandbox/boards/rak/rak4631/rak4631_nrf52840_defconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
68
```unknown # RAKWIRELESS RAK4631 selection config BOARD_RAK4631 select SOC_NRF52840_QIAA ```
/content/code_sandbox/boards/rak/rak4631/Kconfig.rak4631
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
30
```cmake # Suppress "unique_unit_address_if_enabled" to handle the following overlaps: # - power@40000000 & clock@40000000 & bprot@40000000 # - acl@4001e000 & flash-controller@4001e000 list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled") ```
/content/code_sandbox/boards/rak/rak4631/pre_dt_board.cmake
cmake
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
72
```yaml board: name: rak4631 vendor: rakwireless socs: - name: nrf52840 ```
/content/code_sandbox/boards/rak/rak4631/board.yml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
30
```yaml identifier: rak4631/nrf52840 name: RAK4631-NRF52840 type: mcu arch: arm flash: 1024 ram: 256 toolchain: - zephyr - gnuarmemb - xtools supported: - adc - ble - counter - gpio - i2c - pwm - usb_device - watchdog - lora vendor: rak ```
/content/code_sandbox/boards/rak/rak4631/rak4631_nrf52840.yaml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
109
```restructuredtext .. _rak11720: RAK11720 ######## The RAK11720 is a WisBlock Core module for RAK WisBlock. It is based on the powerful ultra-low power Apollo3 Blue SoC (AMA3B1KK-KBR-B0) from Ambiq together with a Semtech SX1262 LoRa transceiver. The AMA3B1KK-KBR-B0 has an integrated Bluetooth Low Energy transceiver that enhances the communication capabilities. The RAK11720 stamp module comes in the same size and footprint as our RAK3172 module which gives you the opportunity to enhance your existing designs with BLE without designing a new PCB. .. image:: img/rak11720.webp :align: center :alt: RAK11720 Hardware ******** The easiset way to use a RAK11720, is the WisBlock Modular system. A WisBlock Base board (RAK19007) which provides the power supply and programming/debug interface is the base to plug a RAK11722 (WisBlock Core module with the RAK11720) in. - Apollo3 Blue SoC with up to 96 MHz operating frequency - ARM Cortex M4F core - 16 kB 2-way Associative/Direct-Mapped Cache per core - Up to 1 MB of flash memory for code/data - Up to 384 KB of low leakage / low power RAM for code/data - Integrated Bluetooth 5 Low-energy controller - Semtech SX1262 low power high range LoRa transceiver - iPEX connectors for the LORA antenna and BLE antenna. - 2 user LEDs on RAK19007 WisBlock Base board - Powered by either Micro USB, 3.7V rechargeable battery or a 5V Solar Panel Port For more information about the RAK11720 stamp module: - `WisDuo RAK11720 Website`_ - `WisBlock RAK11722 Website`_ Supported Features ================== The RAK11720 module configuration supports the following hardware features: +-----------+------------+----------------------+ | Interface | Controller | Driver/Component | +===========+============+======================+ | MPU | on-chip | arch/arm | +-----------+------------+----------------------+ | NVIC | on-chip | arch/arm | +-----------+------------+----------------------+ | SYSTICK | on-chip | systick | +-----------+------------+----------------------+ | STIMER | on-chip | stimer | +-----------+------------+----------------------+ | GPIO | on-chip | gpio | +-----------+------------+----------------------+ | UART | on-chip | serial | +-----------+------------+----------------------+ | WDT | on-chip | watchdog | +-----------+------------+----------------------+ | RADIO | on-chip | bluetooth | +-----------+------------+----------------------+ | RADIO | on-board | LoRa (SX1262) | +-----------+------------+----------------------+ The default configuration can be found in the defconfig file: ``boards/rak/rak11720/rak11720_defconfig``. Programming and Debugging ========================= The RAK11720 board shall be connected to a Segger Embedded Debugger Unit `J-Link OB <path_to_url`_. This provides a debug interface to the Apollo3 Blue chip. You can use JLink to communicate with the Apollo3 Blue. Flashing an application ----------------------- Connect your device to your host computer using the JLINK USB port. The sample application :ref:`hello_world` is used for this example. Build the Zephyr kernel and application, then flash it to the device: .. zephyr-app-commands:: :zephyr-app: samples/hello_world :board: rak11720 :goals: flash .. note:: `west flash` requires `SEGGER J-Link software`_ and `pylink`_ Python module to be installed on you host computer. Open a serial terminal (minicom, putty, etc.) with the following settings: - Speed: 115200 - Data: 8 bits - Parity: None - Stop bits: 1 Reset the board and you should be able to see on the corresponding Serial Port the following message: .. code-block:: console Hello World! rak11720/apollo3_blue .. _WisDuo RAK11720 Website: path_to_url#product-description .. _WisBlock RAK11722 Website: path_to_url#product-description .. _SEGGER J-Link software: path_to_url .. _pylink: path_to_url ```
/content/code_sandbox/boards/rak/rak11720/doc/index.rst
restructuredtext
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
1,011
```unknown /* * */ /dts-v1/; #include <nordic/nrf52840_qiaa.dtsi> #include <zephyr/dt-bindings/lora/sx126x.h> #include "rak4631_nrf52840-pinctrl.dtsi" / { model = "RAKWireless RAK4631 WisBlock LPWAN Module with a Nordic NRF52840 SoC"; compatible = "nordic,rak4631_nrf52840"; chosen { zephyr,console = &uart1; zephyr,shell-uart = &uart1; zephyr,uart-mcumgr = &uart1; zephyr,bt-mon-uart = &uart1; zephyr,bt-c2h-uart = &uart1; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; }; leds { compatible = "gpio-leds"; blue_led: led_2 { gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; label = "Blue LED"; }; green_led: led_1 { gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; label = "Green LED"; }; }; /* Declaration of aliases */ aliases { led0 = &blue_led; lora0 = &lora; watchdog0 = &wdt0; }; }; &reg0 { status = "okay"; }; &reg1 { regulator-initial-mode = <NRF5X_REG_MODE_DCDC>; }; &adc { status = "okay"; }; &uicr { gpio-as-nreset; }; &gpiote { status = "okay"; }; &gpio0 { status = "okay"; }; &gpio1 { status = "okay"; }; &uart0 { compatible = "nordic,nrf-uart"; status = "okay"; current-speed = <115200>; pinctrl-0 = <&uart0_default>; pinctrl-1 = <&uart0_sleep>; pinctrl-names = "default", "sleep"; }; &uart1 { compatible = "nordic,nrf-uarte"; current-speed = <115200>; status = "okay"; pinctrl-0 = <&uart1_default>; pinctrl-1 = <&uart1_sleep>; pinctrl-names = "default", "sleep"; }; &i2c0 { compatible = "nordic,nrf-twi"; status = "okay"; pinctrl-0 = <&i2c0_default>; pinctrl-1 = <&i2c0_sleep>; pinctrl-names = "default", "sleep"; }; &i2c1 { compatible = "nordic,nrf-twi"; /* Cannot be used together with spi1. */ /* status = "okay"; */ pinctrl-0 = <&i2c1_default>; pinctrl-1 = <&i2c1_sleep>; pinctrl-names = "default", "sleep"; }; &spi1 { compatible = "nordic,nrf-spi"; status = "okay"; cs-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; pinctrl-0 = <&spi1_default>; pinctrl-1 = <&spi1_sleep>; pinctrl-names = "default", "sleep"; lora: lora@0 { compatible = "semtech,sx1262"; reg = <0>; reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; busy-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; tx-enable-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; rx-enable-gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; dio1-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>; dio2-tx-enable; dio3-tcxo-voltage = <SX126X_DIO3_TCXO_3V3>; tcxo-power-startup-delay-ms = <5>; spi-max-frequency = <1000000>; }; }; &qspi { status = "okay"; pinctrl-0 = <&qspi_default>; pinctrl-1 = <&qspi_sleep>; pinctrl-names = "default", "sleep"; }; &flash0 { partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; boot_partition: partition@0 { label = "mcuboot"; reg = <0x00000000 0x0000C000>; }; slot0_partition: partition@c000 { label = "image-0"; reg = <0x0000C000 0x00067000>; }; slot1_partition: partition@73000 { label = "image-1"; reg = <0x00073000 0x00067000>; }; scratch_partition: partition@da000 { label = "image-scratch"; reg = <0x000da000 0x0001e000>; }; /* * The flash starting at 0x000f8000 and ending at * 0x000fffff is reserved for use by the application. */ /* * Storage partition will be used by FCB/LittleFS/NVS * if enabled. */ storage_partition: partition@f8000 { label = "storage"; reg = <0x000f8000 0x00008000>; }; }; }; zephyr_udc0: &usbd { compatible = "nordic,nrf-usbd"; status = "okay"; }; ```
/content/code_sandbox/boards/rak/rak4631/rak4631_nrf52840.dts
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
1,282
```unknown # RAKWIRELESS RAK4631 Board configuration if BOARD_RAK4631 config BT_CTLR default BT endif # BOARD_RAK4631 ```
/content/code_sandbox/boards/rak/rak4631/Kconfig.defconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
37
```unknown /* */ &pinctrl { uart0_default: uart0_default { group1 { psels = <NRF_PSEL(UART_TX, 0, 20)>, <NRF_PSEL(UART_RX, 0, 19)>; }; }; uart0_sleep: uart0_sleep { group1 { psels = <NRF_PSEL(UART_TX, 0, 20)>, <NRF_PSEL(UART_RX, 0, 19)>; low-power-enable; }; }; uart1_default: uart1_default { group1 { psels = <NRF_PSEL(UART_TX, 0, 16)>, <NRF_PSEL(UART_RX, 0, 15)>; }; }; uart1_sleep: uart1_sleep { group1 { psels = <NRF_PSEL(UART_TX, 0, 16)>, <NRF_PSEL(UART_RX, 0, 15)>; low-power-enable; }; }; i2c0_default: i2c0_default { group1 { psels = <NRF_PSEL(TWIM_SDA, 0, 13)>, <NRF_PSEL(TWIM_SCL, 0, 14)>; }; }; i2c0_sleep: i2c0_sleep { group1 { psels = <NRF_PSEL(TWIM_SDA, 0, 13)>, <NRF_PSEL(TWIM_SCL, 0, 14)>; low-power-enable; }; }; i2c1_default: i2c1_default { group1 { psels = <NRF_PSEL(TWIM_SDA, 0, 24)>, <NRF_PSEL(TWIM_SCL, 0, 25)>; }; }; i2c1_sleep: i2c1_sleep { group1 { psels = <NRF_PSEL(TWIM_SDA, 0, 24)>, <NRF_PSEL(TWIM_SCL, 0, 25)>; low-power-enable; }; }; spi1_default: spi1_default { group1 { psels = <NRF_PSEL(SPIM_SCK, 1, 11)>, <NRF_PSEL(SPIM_MOSI, 1, 12)>, <NRF_PSEL(SPIM_MISO, 1, 13)>; }; }; spi1_sleep: spi1_sleep { group1 { psels = <NRF_PSEL(SPIM_SCK, 1, 11)>, <NRF_PSEL(SPIM_MOSI, 1, 12)>, <NRF_PSEL(SPIM_MISO, 1, 13)>; low-power-enable; }; }; qspi_default: qspi_default { group1 { psels = <NRF_PSEL(QSPI_SCK, 0, 3)>, <NRF_PSEL(QSPI_IO0, 0, 30)>, <NRF_PSEL(QSPI_IO1, 0, 29)>, <NRF_PSEL(QSPI_IO2, 0, 28)>, <NRF_PSEL(QSPI_IO3, 0, 2)>, <NRF_PSEL(QSPI_CSN, 0, 26)>; }; }; qspi_sleep: qspi_sleep { group1 { psels = <NRF_PSEL(QSPI_SCK, 0, 3)>, <NRF_PSEL(QSPI_IO0, 0, 30)>, <NRF_PSEL(QSPI_IO1, 0, 29)>, <NRF_PSEL(QSPI_IO2, 0, 28)>, <NRF_PSEL(QSPI_IO3, 0, 2)>, <NRF_PSEL(QSPI_CSN, 0, 26)>; low-power-enable; }; }; }; ```
/content/code_sandbox/boards/rak/rak4631/rak4631_nrf52840-pinctrl.dtsi
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
916
```restructuredtext .. _rak4631_nrf52840: RAK4631 ####### Overview ******** RAK4631 is a WisBlock Core module for RAK WisBlock. It extends the WisBlock series with a powerful Nordic nRF52840 MCU that supports Bluetooth 5.0 (Bluetooth Low Energy) and the newest LoRa transceiver from Semtech, the SX1262. The Semtech SX1262 has compared to the older SX127x series a lower power consumption at the same TX power. This makes the RAK4631 an ultra-low power communication solution. RAK4631 can be comfortably programmed with ZephyrRTOS. .. image:: img/rak4631-front-parts.jpg :align: center :alt: RAK4631-NRF52840 Hardware ******** To use a RAK4631, you need at least a WisBlock Base to plug the module in. WisBlock Base is the power supply for the RAK4631 module and has the programming/debug interface. - nRF52840 ARM Cortex-M4F Processor - 64 MHz CPU clock - 1 Micro-AB USB OTG host/device - Semtech SX1262 low power high range LoRa transceiver - iPEX connectors for the LORA antenna and BLE antenna. - Multiple interfaces, I2C, UART, GPIO, ADC - 2 user LEDs on RAK5005 mother Board - Powered by either Micro USB, 3.7V rechargeable battery or a 5V Solar Panel Port Supported Features ================== The ``rak4631/nrf52840`` board configuration supports the following hardware features: +-----------+------------+----------------------+ | Interface | Controller | Driver/Component | +===========+============+======================+ | ADC | on-chip | adc | +-----------+------------+----------------------+ | CLOCK | on-chip | clock_control | +-----------+------------+----------------------+ | FLASH | on-chip | flash | +-----------+------------+----------------------+ | GPIO | on-chip | gpio | +-----------+------------+----------------------+ | I2C(M) | on-chip | i2c | +-----------+------------+----------------------+ | MPU | on-chip | arch/arm | +-----------+------------+----------------------+ | NVIC | on-chip | arch/arm | +-----------+------------+----------------------+ | PWM | on-chip | pwm | +-----------+------------+----------------------+ | RADIO | on-chip | Bluetooth, | | | | ieee802154 | +-----------+------------+----------------------+ | RADIO | on-board | LoRa (SX1262) | +-----------+------------+----------------------+ | RTC | on-chip | system clock | +-----------+------------+----------------------+ | SPI(M/S) | on-chip | spi | +-----------+------------+----------------------+ | UART | on-chip | serial | +-----------+------------+----------------------+ | USB | on-chip | usb | +-----------+------------+----------------------+ | WDT | on-chip | watchdog | +-----------+------------+----------------------+ The default board configuration can be found in :zephyr_file:`boards/rak/rak4631/rak4631_nrf52840_defconfig` Connections and IOs =================== LED --- * LED1 (green) = P1.3 * LED2 (blue) = P1.4 Programming and Debugging ************************* The RAK4631 board shall be connected to a Segger Embedded Debugger Unit `J-Link OB <path_to_url`_. This provides a debug interface to the NRF52840 chip. You can use JLink to communicate with the NRF52840. Flashing ======== #. Download JLink from the Segger `JLink Downloads Page`_. Go to the section "J-Link Software and Documentation Pack" and install the "J-Link Software and Documentation pack for Linux". The application JLinkExe needs to be accessible from your path. #. Run your favorite terminal program to listen for output. Under Linux the terminal should be :code:`/dev/ttyACM0`. For example: .. code-block:: console $ minicom -D /dev/ttyACM0 -o The -o option tells minicom not to send the modem initialization string. Connection should be configured as follows: - Speed: 115200 - Data: 8 bits - Parity: None - Stop bits: 1 #. Connect the RAK4631 board to your host computer using the USB debug port. Then build and flash the :ref:`hello_world` application. .. zephyr-app-commands:: :zephyr-app: samples/hello_world :board: rak4631/nrf52840 :goals: build flash You should see "Hello World! rak4631_nrf52840" in your terminal. Debugging ========= You can debug an application in the usual way. Here is an example for the :ref:`hello_world` application. .. zephyr-app-commands:: :zephyr-app: samples/hello_world :board: rak4631/nrf52840 :maybe-skip-config: :goals: debug References ********** .. target-notes:: .. _RAK4631 Product Description: path_to_url#overview .. _JLink Downloads Page: path_to_url ```
/content/code_sandbox/boards/rak/rak4631/doc/index.rst
restructuredtext
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
1,230
```cmake board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000") board_runner_args(pyocd "--target=nrf52840" "--frequency=4000000") include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake) include(${ZEPHYR_BASE}/boards/common/blackmagicprobe.board.cmake) ```
/content/code_sandbox/boards/rak/rak5010/board.cmake
cmake
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
130
```unknown # Enable MPU CONFIG_ARM_MPU=y # Enable hardware stack protection CONFIG_HW_STACK_PROTECTION=y # Enable RTT CONFIG_USE_SEGGER_RTT=y # enable GPIO CONFIG_GPIO=y # enable uart driver CONFIG_SERIAL=y # enable console CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y ```
/content/code_sandbox/boards/rak/rak5010/rak5010_nrf52840_defconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
68
```yaml board: name: rak5010 vendor: rakwireless socs: - name: nrf52840 ```
/content/code_sandbox/boards/rak/rak5010/board.yml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
30
```unknown # RAKWIRELESS RAK5010 selection config BOARD_RAK5010 select SOC_NRF52840_QIAA ```
/content/code_sandbox/boards/rak/rak5010/Kconfig.rak5010
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
30
```yaml identifier: rak5010/nrf52840 name: RAK5010-NRF52840 type: mcu arch: arm flash: 1024 ram: 256 toolchain: - zephyr - gnuarmemb - xtools supported: - adc - ble - counter - gpio - i2c - pwm - usb_device - watchdog vendor: rak ```
/content/code_sandbox/boards/rak/rak5010/rak5010_nrf52840.yaml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
104
```cmake # Suppress "unique_unit_address_if_enabled" to handle the following overlaps: # - power@40000000 & clock@40000000 & bprot@40000000 # - acl@4001e000 & flash-controller@4001e000 list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled") ```
/content/code_sandbox/boards/rak/rak5010/pre_dt_board.cmake
cmake
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
72
```unknown # RAKWIRELESS RAK5010 Board configuration if BOARD_RAK5010 config BT_CTLR default BT endif # BOARD_RAK5010 ```
/content/code_sandbox/boards/rak/rak5010/Kconfig.defconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
37
```unknown /* */ &pinctrl { uart0_default: uart0_default { group1 { psels = <NRF_PSEL(UART_TX, 0, 6)>, <NRF_PSEL(UART_RX, 0, 8)>, <NRF_PSEL(UART_RTS, 0, 7)>, <NRF_PSEL(UART_CTS, 0, 11)>; }; }; uart0_sleep: uart0_sleep { group1 { psels = <NRF_PSEL(UART_TX, 0, 6)>, <NRF_PSEL(UART_RX, 0, 8)>, <NRF_PSEL(UART_RTS, 0, 7)>, <NRF_PSEL(UART_CTS, 0, 11)>; low-power-enable; }; }; uart1_default: uart1_default { group1 { psels = <NRF_PSEL(UART_TX, 1, 1)>, <NRF_PSEL(UART_RX, 1, 2)>; }; }; uart1_sleep: uart1_sleep { group1 { psels = <NRF_PSEL(UART_TX, 1, 1)>, <NRF_PSEL(UART_RX, 1, 2)>; low-power-enable; }; }; i2c1_default: i2c1_default { group1 { psels = <NRF_PSEL(TWIM_SDA, 0, 14)>, <NRF_PSEL(TWIM_SCL, 0, 13)>; }; }; i2c1_sleep: i2c1_sleep { group1 { psels = <NRF_PSEL(TWIM_SDA, 0, 14)>, <NRF_PSEL(TWIM_SCL, 0, 13)>; low-power-enable; }; }; qspi_default: qspi_default { group1 { psels = <NRF_PSEL(QSPI_SCK, 1, 11)>, <NRF_PSEL(QSPI_IO0, 1, 15)>, <NRF_PSEL(QSPI_IO1, 1, 14)>, <NRF_PSEL(QSPI_IO2, 1, 13)>, <NRF_PSEL(QSPI_IO3, 1, 12)>, <NRF_PSEL(QSPI_CSN, 1, 10)>; }; }; qspi_sleep: qspi_sleep { group1 { psels = <NRF_PSEL(QSPI_SCK, 1, 11)>, <NRF_PSEL(QSPI_IO0, 1, 15)>, <NRF_PSEL(QSPI_IO1, 1, 14)>, <NRF_PSEL(QSPI_IO2, 1, 13)>, <NRF_PSEL(QSPI_IO3, 1, 12)>, <NRF_PSEL(QSPI_CSN, 1, 10)>; low-power-enable; }; }; }; ```
/content/code_sandbox/boards/rak/rak5010/rak5010_nrf52840-pinctrl.dtsi
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
702
```unknown /* * */ /dts-v1/; #include <nordic/nrf52840_qiaa.dtsi> #include "rak5010_nrf52840-pinctrl.dtsi" / { model = "RAKWireless RAK5010 Wistrio Board with a Nordic NRF52840 SoC"; compatible = "nordic,rak5010_nrf52840"; chosen { zephyr,console = &uart1; zephyr,shell-uart = &uart1; zephyr,uart-mcumgr = &uart1; zephyr,bt-mon-uart = &uart1; zephyr,bt-c2h-uart = &uart1; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; }; leds { compatible = "gpio-leds"; led0: led_0 { gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; label = "Green LED 0"; }; }; /* Declaration of aliases */ aliases { led0 = &led0; watchdog0 = &wdt0; accel0 = &lis3dh; modem-uart = &uart0; modem = &modem; }; }; &adc { status = "okay"; }; &gpiote { status = "okay"; }; &gpio0 { status = "okay"; }; &gpio1 { status = "okay"; }; &uart0 { compatible = "nordic,nrf-uarte"; status = "okay"; current-speed = <115200>; pinctrl-0 = <&uart0_default>; pinctrl-1 = <&uart0_sleep>; pinctrl-names = "default", "sleep"; modem: modem { compatible = "quectel,bg95"; mdm-power-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; status = "okay"; }; }; &uart1 { current-speed = <115200>; status = "okay"; pinctrl-0 = <&uart1_default>; pinctrl-1 = <&uart1_sleep>; pinctrl-names = "default", "sleep"; }; &i2c1 { compatible = "nordic,nrf-twi"; status = "okay"; /* TI OPT3001 light sensor */ pinctrl-0 = <&i2c1_default>; pinctrl-1 = <&i2c1_sleep>; pinctrl-names = "default", "sleep"; opt3001@44 { compatible = "ti,opt3001"; reg = <0x44>; }; /* ST Microelectronics LIS3DH motion sensor */ lis3dh: lis3dh@19 { compatible = "st,lis3dh", "st,lis2dh"; reg = <0x19>; irq-gpios = <&gpio0 16 0>; }; /* ST Microelectronics LPS22HB pressure sensor */ lps22hb-press@5c { compatible = "st,lps22hb-press"; reg = <0x5c>; }; }; &qspi { status = "okay"; pinctrl-0 = <&qspi_default>; pinctrl-1 = <&qspi_sleep>; pinctrl-names = "default", "sleep"; is25wp064a: is25wp064a@0 { compatible = "nordic,qspi-nor"; reg = <0>; writeoc = "pp4o"; readoc = "read4io"; sck-frequency = <32000000>; jedec-id = [9d 70 17]; size = <67108864>; has-dpd; t-enter-dpd = <3000>; t-exit-dpd = <5000>; }; }; &flash0 { partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; boot_partition: partition@0 { label = "mcuboot"; reg = <0x00000000 0x0000C000>; }; slot0_partition: partition@c000 { label = "image-0"; reg = <0x0000C000 0x00067000>; }; slot1_partition: partition@73000 { label = "image-1"; reg = <0x00073000 0x00067000>; }; scratch_partition: partition@da000 { label = "image-scratch"; reg = <0x000da000 0x0001e000>; }; /* * The flash starting at 0x000f8000 and ending at * 0x000fffff is reserved for use by the application. */ /* * Storage partition will be used by FCB/LittleFS/NVS * if enabled. */ storage_partition: partition@f8000 { label = "storage"; reg = <0x000f8000 0x00008000>; }; }; }; zephyr_udc0: &usbd { compatible = "nordic,nrf-usbd"; status = "okay"; }; ```
/content/code_sandbox/boards/rak/rak5010/rak5010_nrf52840.dts
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
1,183
```restructuredtext .. _boards-quicklogic: QuickLogic Corp. ################ .. toctree:: :maxdepth: 1 :glob: **/* ```
/content/code_sandbox/boards/quicklogic/index.rst
restructuredtext
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
34
```unknown # Quick Feather board config BOARD_QUICK_FEATHER select SOC_EOS_S3 ```
/content/code_sandbox/boards/quicklogic/quick_feather/Kconfig.quick_feather
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
20
```unknown CONFIG_ARM_MPU=n # System clock CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=61440000 # Console CONFIG_SERIAL=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y # EOS S3 Configuration Manager copies software from external flash to MCU # memory using preconfigured DMA and execute it there. # Thus we do not use flash directly. CONFIG_XIP=n CONFIG_FLASH=n CONFIG_FLASH_SIZE=0 CONFIG_FLASH_BASE_ADDRESS=0x0 # GPIO CONFIG_GPIO=y ```
/content/code_sandbox/boards/quicklogic/quick_feather/quick_feather_defconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
107
```restructuredtext .. _rak5010_nrf52840: RAK5010 ####### Overview ******** WisTrio NB-IoT Tracker Pro (RAK5010) is a tracker with integrated LTE CAT M1 & NB1, GPS, BLE, and sensors. It is built on the Quectel BG96 LTE CAT M1 & NB1 module, which has an integrated GPS receiver. The MCU running the board is a Nordic nRF52840 controller. As it has both GPS and BLE it can be used for outdoor and indoor scenarios, where location-based services need be present. The built-in sensors for RAK5010 are temperature and humidity sensor, motion sensor, pressure sensor, and light sensor. The extension IOs allow adding more sensors in addition to the on-board ones. This board is particularly suitable to be used as a quick testing and prototyping tool for applications requiring NB-IoT connectivity. Application development supports the GCC environment. .. image:: img/rak5010-front-parts.jpg :align: center :alt: RAK5010-NRF52840 Hardware ******** - nRF52840 ARM Cortex-M4F Processor - 32.768 kHz crystal oscillator - 1 Micro-AB USB OTG host/device - Quectel BG96, with LTE CAT M1, LTE NB1, and GNSS - iPEX connectors for the LTE and GPS antenna and an on-board ceramic antenna for the BLE. - nano-SIM and ESIM options. - Multiple interfaces, I2C, UART, GPIO, ADC - 1 user LED - 1 SHTC3 Humidity and Temperature Sensor - 1 OPT3001DNPR Ambient Light Sensor - 1 LPS22HB Pressure Sensor - 1 LIS3DH Motion Sensor - Powered by either Micro USB, 3.7V rechargeable battery or a 5V Solar Panel Port Supported Features ================== The ``rak5010/nrf52840`` board configuration supports the following hardware features: +-----------+------------+----------------------+ | Interface | Controller | Driver/Component | +===========+============+======================+ | ADC | on-chip | adc | +-----------+------------+----------------------+ | CLOCK | on-chip | clock_control | +-----------+------------+----------------------+ | FLASH | on-chip | flash | +-----------+------------+----------------------+ | GPIO | on-chip | gpio | +-----------+------------+----------------------+ | I2C(M) | on-chip | i2c | +-----------+------------+----------------------+ | MPU | on-chip | arch/arm | +-----------+------------+----------------------+ | NVIC | on-chip | arch/arm | +-----------+------------+----------------------+ | PWM | on-chip | pwm | +-----------+------------+----------------------+ | RADIO | on-chip | Bluetooth, | | | | ieee802154 | +-----------+------------+----------------------+ | RTC | on-chip | system clock | +-----------+------------+----------------------+ | SPI(M/S) | on-chip | spi | +-----------+------------+----------------------+ | UART | on-chip | serial | +-----------+------------+----------------------+ | USB | on-chip | usb | +-----------+------------+----------------------+ | WDT | on-chip | watchdog | +-----------+------------+----------------------+ Other hardware features have not been enabled yet for this board. Connections and IOs =================== LED --- * LED0 (green) = P0.12 Programming and Debugging ************************* The RAK5010 board shall be connected to a Segger Embedded Debugger Unit `J-Link OB <path_to_url`_. This provides a debug interface to the NRF52840 chip. You can use JLink to communicate with the NRF52840. Flashing ======== #. Download JLink from the Segger `JLink Downloads Page`_. Go to the section "J-Link Software and Documentation Pack" and install the "J-Link Software and Documentation pack for Linux". The application JLinkExe needs to be accessible from your path. #. Run your favorite terminal program to listen for output. Under Linux the terminal should be :code:`/dev/ttyACM0`. For example: .. code-block:: console $ minicom -D /dev/ttyACM0 -o The -o option tells minicom not to send the modem initialization string. Connection should be configured as follows: - Speed: 115200 - Data: 8 bits - Parity: None - Stop bits: 1 #. Connect the RAK5010 board to your host computer using the USB debug port. Then build and flash the :ref:`hello_world` application. .. zephyr-app-commands:: :zephyr-app: samples/hello_world :board: rak5010/nrf52840 :goals: build flash You should see "Hello World! rak5010_nrf52840" in your terminal. Debugging ========= You can debug an application in the usual way. Here is an example for the :ref:`hello_world` application. .. zephyr-app-commands:: :zephyr-app: samples/hello_world :board: rak5010/nrf52840 :maybe-skip-config: :goals: debug References ********** .. target-notes:: .. _RAK5010 Product Description: path_to_url .. _JLink Downloads Page: path_to_url ```
/content/code_sandbox/boards/rak/rak5010/doc/index.rst
restructuredtext
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
1,244
```yaml board: name: quick_feather vendor: quicklogic socs: - name: quicklogic_eos_s3 ```
/content/code_sandbox/boards/quicklogic/quick_feather/board.yml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
31
```unknown # Quick Feather board config BOARD_INIT_PRIORITY int default KERNEL_INIT_PRIORITY_DEFAULT help Board initialization priority. ```
/content/code_sandbox/boards/quicklogic/quick_feather/Kconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
26
```yaml identifier: quick_feather name: QuickLogic Quick Feather type: mcu arch: arm toolchain: - zephyr - gnuarmemb - xtools testing: ignore_tags: - net - bluetooth vendor: quicklogic ```
/content/code_sandbox/boards/quicklogic/quick_feather/quick_feather.yaml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
63
```unknown /* * */ /dts-v1/; #include <quicklogic/quicklogic_eos_s3.dtsi> #include <zephyr/dt-bindings/pinctrl/quicklogic-eos-s3-pinctrl.h> #include <zephyr/dt-bindings/input/input-event-codes.h> / { model = "QuickLogic Quick Feather board"; compatible = "quicklogic,eos_s3"; chosen { zephyr,sram = &sram0; zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,uart-pipe = &uart0; }; aliases { led0 = &blue_led; led1 = &green_led; led2 = &red_led; sw0 = &button0; }; leds { compatible = "gpio-leds"; blue_led: led_0 { gpios = <&gpio 4 GPIO_ACTIVE_HIGH>; label = "LED 0"; }; green_led: led_1 { gpios = <&gpio 5 GPIO_ACTIVE_HIGH>; label = "LED 1"; }; red_led: led_2 { gpios = <&gpio 6 GPIO_ACTIVE_HIGH>; label = "LED 2"; }; }; buttons { compatible = "gpio-keys"; button0: button_0 { gpios = <&gpio 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "User Push Button 0"; zephyr,code = <INPUT_KEY_0>; }; }; fpga0: fpga { status = "okay"; }; }; &pinctrl { uart_rx_default: uart_rx_default { pinmux = <UART_RX_PAD45>; input-enable; }; uart_tx_default: uart_tx_default { pinmux = <UART_TX_PAD44>; output-enable; }; }; &cpu0 { clock-frequency = <61440000>; }; &gpio { status = "okay"; }; &uart0 { status = "okay"; current-speed = <115200>; pinctrl-0 = <&uart_rx_default &uart_tx_default>; pinctrl-names = "default"; }; ```
/content/code_sandbox/boards/quicklogic/quick_feather/quick_feather.dts
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
495
```restructuredtext .. _quickfeather: QuickFeather ############ Overview ******** The QuickFeather development board is a platform with an on-board QuickLogic EOS S3 Sensor Processing Platform. .. figure:: img/feather-board.jpg :align: center :alt: QuickFeather QuickFeather (Credit: QuickLogic) Hardware ******** - QuickLogic EOS S3 MCU Platform - mCube MC3635 accelerometer - Infineon DPS310 pressure sensor - Infineon IM69D130 MEMS microphone - 16 Mbit of on-board flash memory - User button - RGB LED - Integrated battery charger Detailed information about the board can be found in a `QuickFeather repository`_. Supported Features ================== The QuickFeather configuration supports the following hardware features: +-----------+------------+-------------------------------------+ | Interface | Controller | Driver/Component | +===========+============+=====================================+ | UART | on-chip | serial port | +-----------+------------+-------------------------------------+ | GPIO | on-chip | gpio | +-----------+------------+-------------------------------------+ The default configuration can be found in :zephyr_file:`boards/quicklogic/quick_feather/quick_feather_defconfig`. Connections and IOs =================== Detailed information about pinouts is available in the `schematics document`_. Programming and Debugging ************************* Flashing ======== The QuickFeather platform by default boots from flash. Currently the Zephyr port only enables loading the program directly to SRAM using either OpenOCD and a SWD programmer or SEGGER JLink. OpenOCD ------- In order to connect to the target a SWD programmer supported in OpenOCD is needed. To connect to the board run: .. code-block:: console openocd -f /path/to/swd-programmer.cfg -f tcl/board/quicklogic_quickfeather.cfg -c "init" -c "reset halt" `The QuickFeather OpenOCD config`_ can be found in the OpenOCD mainline repository. JLink ----- To connect to the QuickFeather board with JLink please follow instructions in the `QuickFeather User Guide`_. Debugging ========= To debug the QuickFeather board please connect to the target with either OpenOCD or JLink and use GDB distributed in Zephyr's SDK in *arm-zephyr-eabi/bin* directory. To load basic sample via GDB: - Build the sample in an usual way: .. zephyr-app-commands:: :zephyr-app: samples/hello_world :board: quick_feather :goals: build - Connect to the target using either OpenOCD or JLink - Connect via GDB and load an ELF file: .. code-block:: console /path/to/zephyr-sdk/arm-zephyr-eabi/bin/arm-zephyr-eabi-gdb target remote <port_number> file </path/to/zephyr.elf> load continue References ********** .. target-notes:: .. _QuickFeather repository: path_to_url .. _schematics document: path_to_url .. _The QuickFeather OpenOCD config: path_to_url .. _QuickFeather User Guide: path_to_url ```
/content/code_sandbox/boards/quicklogic/quick_feather/doc/index.rst
restructuredtext
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
721
```unknown /* * */ /dts-v1/; #include <quicklogic/quicklogic_eos_s3.dtsi> #include <zephyr/dt-bindings/pinctrl/quicklogic-eos-s3-pinctrl.h> #include <zephyr/dt-bindings/input/input-event-codes.h> / { model = "QuickLogic Qomu board"; compatible = "quicklogic,eos_s3"; chosen { zephyr,sram = &sram0; zephyr,console = &uart1; zephyr,shell-uart = &uart1; zephyr,uart-pipe = &uart1; }; aliases { led0 = &blue_led; led1 = &green_led; led2 = &red_led; sw0 = &button0; }; leds { compatible = "gpio-leds"; blue_led: led_0 { gpios = <&gpio 3 GPIO_ACTIVE_HIGH>; label = "LED 0"; }; green_led: led_1 { gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; label = "LED 1"; }; red_led: led_2 { gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; label = "LED 2"; }; }; buttons { compatible = "gpio-keys"; button0: button_0 { gpios = <&gpio 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "User Push Button 0"; zephyr,code = <INPUT_KEY_0>; }; }; fpga0: fpga { status = "okay"; }; }; &pinctrl { uart1_rx_default: uart1_rx_default { pinmux = <UART_RX_PAD45>; input-enable; }; uart1_tx_default: uart1_tx_default { pinmux = <UART_TX_PAD44>; output-enable; }; usb_pu_default: usb_pu_default { pinmux = <USB_PU_CTRL_PAD23>; bias-high-impedance; quicklogic,control-selection = "fabric"; output-enable; }; usb_dn_default: usb_dn_default { pinmux = <USB_DN_PAD28>; bias-high-impedance; quicklogic,control-selection = "fabric"; output-enable; }; usb_dp_default: usb_dp_default { pinmux = <USB_DP_PAD31>; bias-high-impedance; quicklogic,control-selection = "fabric"; output-enable; }; }; &cpu0 { clock-frequency = <61440000>; }; &gpio { status = "okay"; }; &uart0 { status = "disabled"; }; &uart1 { status = "okay"; current-speed = <115200>; pinctrl-0 = <&uart1_rx_default &uart1_tx_default &usb_pu_default &usb_dn_default &usb_dp_default>; pinctrl-names = "default"; }; ```
/content/code_sandbox/boards/quicklogic/qomu/qomu.dts
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
669
```yaml board: name: qomu vendor: quicklogic socs: - name: quicklogic_eos_s3 ```
/content/code_sandbox/boards/quicklogic/qomu/board.yml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
30
```yaml identifier: qomu name: QuickLogic Qomu type: mcu arch: arm toolchain: - zephyr - gnuarmemb - xtools testing: ignore_tags: - net - bluetooth vendor: quicklogic ```
/content/code_sandbox/boards/quicklogic/qomu/qomu.yaml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
62
```unknown CONFIG_ARM_MPU=n # System clock CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=61440000 CONFIG_CORTEX_M_SYSTICK=y # Console CONFIG_SERIAL=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y # EOS S3 Configuration Manager copies software from external flash to MCU # memory using preconfigured DMA and execute it there. # Thus we do not use flash directly. CONFIG_XIP=n CONFIG_FLASH=n CONFIG_FLASH_SIZE=0 CONFIG_FLASH_BASE_ADDRESS=0x0 # GPIO CONFIG_GPIO=y ```
/content/code_sandbox/boards/quicklogic/qomu/qomu_defconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
116
```unknown # QuickLogic Qomu board config BOARD_QOMU select SOC_EOS_S3 ```
/content/code_sandbox/boards/quicklogic/qomu/Kconfig.qomu
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
21
```unknown # QuickLogic Qomu board config BOARD_INIT_PRIORITY int default KERNEL_INIT_PRIORITY_DEFAULT help Board initialization priority. ```
/content/code_sandbox/boards/quicklogic/qomu/Kconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
28
```restructuredtext .. _boards-blue-clover: Blue Clover Devices ################### .. toctree:: :maxdepth: 1 :glob: **/* ```
/content/code_sandbox/boards/bcdevices/index.rst
restructuredtext
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
34
```yaml identifier: blueclover_plt_demo_v2/nrf52832 name: Blue Clover PLT Demo Board V2 type: mcu arch: arm toolchain: - zephyr - gnuarmemb - xtools ram: 64 flash: 512 supported: - ble - counter - nvs - i2c - pwm - spi - watchdog vendor: blueclover ```
/content/code_sandbox/boards/bcdevices/plt_demo_v2/blueclover_plt_demo_v2_nrf52832.yaml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
106
```cmake set(OPENOCD_NRF5_SUBFAMILY "nrf52") board_runner_args(nrfjprog "--nrf-family=NRF52") board_runner_args(jlink "--device=nRF52832_xxAA" "--speed=4000") board_runner_args(pyocd "--target=nrf52832" "--frequency=4000000") include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake) ```
/content/code_sandbox/boards/bcdevices/plt_demo_v2/board.cmake
cmake
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
144
```restructuredtext .. _qomu: Qomu #### Overview ******** The Qomu board is a platform with an on-board QuickLogic EOS S3 Sensor Processing Platform. .. figure:: img/qomu-board.png :align: center :alt: Qomu Qomu (Credit: QuickLogic) Hardware ******** - QuickLogic EOS S3 MCU Platform - 16 Mbit of on-board flash memory - Touchpads (4) - RGB LED - Powered from USB Detailed information about the board can be found in a `Qomu repository`_ and `Qomu User Guide`_. Connections and IOs =================== Detailed information about pinouts is available in the `schematics document`_. Programming *********** The Qomu platform by default boots from flash. Below are steps to run Qomu sample application: #. Build the sample in an usual way: .. zephyr-app-commands:: :zephyr-app: samples/boards/qomu :board: qomu :goals: build #. Remove Qomu board from USB port. #. Insert Qomu board to USB port. #. While the blue LED is blinking (for 5 seconds), touch the touch-pads with your finger. On success, the green led will start flashing. #. Use TinyFpgaProgrammer application to load the target application: .. code-block:: console python3 /path/to/TinyFPGA-Programmer-Application/tinyfpga-programmer-gui.py --mode m4 --m4app build/zephyr/zephyr.bin --reset Refer to `TinyFPGA Programmer Application repo`_ for detailed information on installation and program usage. References ********** .. target-notes:: .. _Qomu repository: path_to_url .. _Qomu User Guide: path_to_url .. _schematics document: path_to_url .. _TinyFPGA Programmer Application repo: path_to_url ```
/content/code_sandbox/boards/quicklogic/qomu/doc/index.rst
restructuredtext
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
418
```cmake # Suppress "unique_unit_address_if_enabled" to handle the following overlaps: # - power@40000000 & clock@40000000 & bprot@40000000 # - acl@4001e000 & flash-controller@4001e000 list(APPEND EXTRA_DTC_FLAGS "-Wno-unique_unit_address_if_enabled") ```
/content/code_sandbox/boards/bcdevices/plt_demo_v2/pre_dt_board.cmake
cmake
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
72
```unknown # Kconfig - Blue Clover PLT Demo V2 Configuration # # # Enable MPU CONFIG_ARM_MPU=y # Enable RTT CONFIG_USE_SEGGER_RTT=y # enable GPIO CONFIG_GPIO=y # enable uart driver CONFIG_SERIAL=y # enable console CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y ```
/content/code_sandbox/boards/bcdevices/plt_demo_v2/blueclover_plt_demo_v2_nrf52832_defconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
69
```yaml board: name: blueclover_plt_demo_v2 vendor: bcdevices socs: - name: nrf52832 ```
/content/code_sandbox/boards/bcdevices/plt_demo_v2/board.yml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
34
```unknown /* */ &pinctrl { uart0_default: uart0_default { group1 { psels = <NRF_PSEL(UART_TX, 0, 6)>, <NRF_PSEL(UART_RX, 0, 8)>; }; }; uart0_sleep: uart0_sleep { group1 { psels = <NRF_PSEL(UART_TX, 0, 6)>, <NRF_PSEL(UART_RX, 0, 8)>; low-power-enable; }; }; i2c0_default: i2c0_default { group1 { psels = <NRF_PSEL(TWIM_SDA, 0, 12)>, <NRF_PSEL(TWIM_SCL, 0, 14)>; }; }; i2c0_sleep: i2c0_sleep { group1 { psels = <NRF_PSEL(TWIM_SDA, 0, 12)>, <NRF_PSEL(TWIM_SCL, 0, 14)>; low-power-enable; }; }; pwm0_default: pwm0_default { group1 { psels = <NRF_PSEL(PWM_OUT0, 0, 22)>; nordic,invert; }; }; pwm0_sleep: pwm0_sleep { group1 { psels = <NRF_PSEL(PWM_OUT0, 0, 22)>; low-power-enable; }; }; spi1_default: spi1_default { group1 { psels = <NRF_PSEL(SPIM_SCK, 0, 2)>, <NRF_PSEL(SPIM_MOSI, 0, 3)>, <NRF_PSEL(SPIM_MISO, 0, 27)>; }; }; spi1_sleep: spi1_sleep { group1 { psels = <NRF_PSEL(SPIM_SCK, 0, 2)>, <NRF_PSEL(SPIM_MOSI, 0, 3)>, <NRF_PSEL(SPIM_MISO, 0, 27)>; low-power-enable; }; }; }; ```
/content/code_sandbox/boards/bcdevices/plt_demo_v2/blueclover_plt_demo_v2_nrf52832-pinctrl.dtsi
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
501
```unknown # Blue Clover PLT Demo V2 Configuration if BOARD_BLUECLOVER_PLT_DEMO_V2_NRF52832 config BT_CTLR default BT config I2C default SENSOR endif # BOARD_BLUECLOVER_PLT_DEMO_V2_NRF52832 ```
/content/code_sandbox/boards/bcdevices/plt_demo_v2/Kconfig.defconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
62
```unknown # Blue Clover PLT Demo V2 Configuration config BOARD_BLUECLOVER_PLT_DEMO_V2 select SOC_NRF52832_QFAA ```
/content/code_sandbox/boards/bcdevices/plt_demo_v2/Kconfig.blueclover_plt_demo_v2
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
34
```unknown /* */ /dts-v1/; #include <nordic/nrf52832_qfaa.dtsi> #include "blueclover_plt_demo_v2_nrf52832-pinctrl.dtsi" #include <zephyr/dt-bindings/input/input-event-codes.h> #include <zephyr/dt-bindings/led/led.h> / { model = "Blue Clover PLT Demo Board V2"; compatible = "nordic,blueclover-plt-demo-v2-nrf52832"; chosen { zephyr,console = &uart0; zephyr,shell-uart = &uart0; zephyr,uart-mcumgr = &uart0; zephyr,bt-mon-uart = &uart0; zephyr,bt-c2h-uart = &uart0; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,code-partition = &slot0_partition; }; buttons { compatible = "gpio-keys"; button0: button_0 { gpios = <&gpio0 26 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 0"; zephyr,code = <INPUT_KEY_0>; }; button1: button_1 { gpios = <&gpio0 21 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; label = "Push button switch 1"; zephyr,code = <INPUT_KEY_1>; }; }; /* These aliases are provided for compatibility with samples */ aliases { sw0 = &button0; sw1 = &button1; pwm-buzzer = &pwm0; watchdog0 = &wdt0; accel0 = &bmi270; led-strip = &apa102; }; }; &reg { regulator-initial-mode = <NRF5X_REG_MODE_DCDC>; }; &uicr { gpio-as-nreset; }; &gpiote { status ="okay"; }; &gpio0 { status ="okay"; }; &uart0 { status = "okay"; compatible = "nordic,nrf-uart"; current-speed = <115200>; pinctrl-0 = <&uart0_default>; pinctrl-1 = <&uart0_sleep>; pinctrl-names = "default", "sleep"; }; &i2c0 { compatible = "nordic,nrf-twi"; status = "okay"; pinctrl-0 = <&i2c0_default>; pinctrl-1 = <&i2c0_sleep>; pinctrl-names = "default", "sleep"; sht3xd@44 { compatible = "sensirion,sht3xd"; reg = <0x44>; }; bmi270: bmi270@68 { compatible = "bosch,bmi270"; reg = <0x68>; }; }; &pwm0 { /* buzzer */ status = "okay"; pinctrl-0 = <&pwm0_default>; pinctrl-1 = <&pwm0_sleep>; pinctrl-names = "default", "sleep"; }; &spi1 { compatible = "nordic,nrf-spi"; status = "okay"; pinctrl-0 = <&spi1_default>; pinctrl-1 = <&spi1_sleep>; pinctrl-names = "default", "sleep"; apa102: apa102@0 { compatible = "apa,apa102"; reg = <0>; spi-max-frequency = <5250000>; chain-length = <4>; color-mapping = <LED_COLOR_ID_BLUE LED_COLOR_ID_GREEN LED_COLOR_ID_RED>; }; }; &flash0 { partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; boot_partition: partition@0 { label = "mcuboot"; reg = <0x00000000 0xc000>; }; slot0_partition: partition@c000 { label = "image-0"; reg = <0x0000C000 0x32000>; }; slot1_partition: partition@3e000 { label = "image-1"; reg = <0x0003E000 0x32000>; }; scratch_partition: partition@70000 { label = "image-scratch"; reg = <0x00070000 0xa000>; }; storage_partition: partition@7a000 { label = "storage"; reg = <0x0007a000 0x00006000>; }; }; }; ```
/content/code_sandbox/boards/bcdevices/plt_demo_v2/blueclover_plt_demo_v2_nrf52832.dts
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
1,050
```restructuredtext .. _boards-google: Google, Inc. ############ .. toctree:: :maxdepth: 1 :glob: **/* ```
/content/code_sandbox/boards/google/index.rst
restructuredtext
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
32
```cmake board_runner_args(dfu-util "--pid=0483:df11" "--alt=0" "--dfuse") board_runner_args(stm32cubeprogrammer "--port=swd" "--reset=hw") board_runner_args(jlink "--device=STM32G0B1RE" "--speed=4000") include(${ZEPHYR_BASE}/boards/common/dfu-util.board.cmake) include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) ```
/content/code_sandbox/boards/google/twinkie_v2/board.cmake
cmake
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
126
```yaml identifier: google_twinkie_v2 name: Google Twinkie V2 type: mcu arch: arm toolchain: - zephyr - gnuarmemb - xtools ram: 144 flash: 512 testing: ignore_tags: - net - bluetooth vendor: google ```
/content/code_sandbox/boards/google/twinkie_v2/google_twinkie_v2.yaml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
77
```restructuredtext .. _blueclover_plt_demo_v2_nrf52832: Blue Clover PLT Demo V2 nRF52832 ################################ Overview ******** The Blue Clover PLT Demo V2 is an open source (OSWHA certified) hardware product, featuring the Nordic Semiconductor nRF52832 ARM Cortex-M4F MCU and several useful external peripherals. The Nordic Semiconductor nRF52832 ARM Cortex-M4F MCU features the following: * :abbr:`ADC (Analog to Digital Converter)` * CLOCK * FLASH * :abbr:`GPIO (General Purpose Input Output)` * :abbr:`I2C (Inter-Integrated Circuit)` * :abbr:`MPU (Memory Protection Unit)` * :abbr:`NVIC (Nested Vectored Interrupt Controller)` * :abbr:`PWM (Pulse Width Modulation)` * RADIO (Bluetooth Low Energy) * :abbr:`RTC (nRF RTC System Clock)` * Segger RTT (RTT Console) * :abbr:`SPI (Serial Peripheral Interface)` * :abbr:`UART (Universal asynchronous receiver-transmitter)` * :abbr:`WDT (Watchdog Timer)` .. figure:: img/blueclover_plt_demo_v2.jpg :align: center :alt: Blue Clover PLT Demo V2 nRF52832 Hardware ******** - nRF52832 ARM Cortex-M4F processor at 64 MHz - 512 KB flash memory and 64 KB of SRAM - Bosch BMI270 IMU - Sensiron SHT30 Humidity and Temperature sensor - Murata PKLCS1212E4001R1 Piezo Buzzer - Battery connector and charger for 3.7 V lithium polymer batteries - 4 APA102C Addressable LEDs - Reset button (can be configured as user button) - 1 User button - Tag-Connect TC2030-FP 6-pin Debug Connector Supported Features ================== The Blue Clover PLT Demo V2 board configuration supports the following hardware features: +-----------+------------+----------------------+ | Interface | Controller | Driver/Component | +===========+============+======================+ | ADC | on-chip | adc | +-----------+------------+----------------------+ | CLOCK | on-chip | clock_control | +-----------+------------+----------------------+ | FLASH | on-chip | flash | +-----------+------------+----------------------+ | GPIO | on-chip | gpio | +-----------+------------+----------------------+ | I2C(M) | on-chip | i2c | +-----------+------------+----------------------+ | MPU | on-chip | arch/arm | +-----------+------------+----------------------+ | NVIC | on-chip | arch/arm | +-----------+------------+----------------------+ | PWM | on-chip | pwm | +-----------+------------+----------------------+ | RADIO | on-chip | Bluetooth | +-----------+------------+----------------------+ | RTC | on-chip | system clock | +-----------+------------+----------------------+ | RTT | Segger | console | +-----------+------------+----------------------+ | SPI(M/S) | on-chip | spi | +-----------+------------+----------------------+ | UART | on-chip | serial | +-----------+------------+----------------------+ | WDT | on-chip | watchdog | +-----------+------------+----------------------+ Connections and IOs =================== Push buttons ------------ * RESET = P0.21 * STATUS = P0.26 UART ---- * TXD = P0.06 * RXD = P0.08 Power ----- * USB-C Connector * JST-PH Battery Connector NFC --- * U.FL Connector, on NFC1/P0.09, NFC2/P0.10 Programming and Debugging ************************* Applications for the ``blueclover_plt_demo_v2/nrf52832`` board configuration can be built and flashed in the usual way (see :ref:`build_an_application` and :ref:`application_run` for more details). Flashing ======== Flashing Zephyr onto the ``blueclover_plt_demo_v2/nrf52832`` board requires an external programmer. The programmer is attached to the SWD header. Build the Zephyr kernel and the :zephyr:code-sample:`led-strip` sample application. .. zephyr-app-commands:: :zephyr-app: samples/drivers/led_apa102 :board: blueclover_plt_demo_v2/nrf52832 :goals: build :compact: Flash the image. .. zephyr-app-commands:: :zephyr-app: samples/drivers/led_apa102 :board: blueclover_plt_demo_v2/nrf52832 :goals: flash :compact: References ********** .. target-notes:: .. _Blue Clover PLT Demo V2 Product site: path_to_url .. _Blue Clover PLT Demo V2 OSWHA Certification: path_to_url .. _Schematic, layout, and gerbers: path_to_url ```
/content/code_sandbox/boards/bcdevices/plt_demo_v2/doc/index.rst
restructuredtext
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
1,120
```unknown config BOARD_GOOGLE_TWINKIE_V2 select SOC_STM32G0B1XX ```
/content/code_sandbox/boards/google/twinkie_v2/Kconfig.google_twinkie_v2
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
23
```unknown # # GPIO Controller CONFIG_GPIO=y # Enable Clocks CONFIG_CLOCK_CONTROL=y # enable pin controller CONFIG_PINCTRL=y # Enable MPU CONFIG_ARM_MPU=y ```
/content/code_sandbox/boards/google/twinkie_v2/google_twinkie_v2_defconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
40
```yaml board: name: google_twinkie_v2 vendor: google socs: - name: stm32g0b1xx ```
/content/code_sandbox/boards/google/twinkie_v2/board.yml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
34
```restructuredtext .. _google_twinkie_v2_board: Google Twinkie V2 ################# Overview ******** Google Twinkie V2 is a reference board for the google power delivery analyzer (PDA) Twinkie V2. Hardware ******** - STM32G0B1REI6 Supported Features ================== The following features are supported: +-----------+------------+-------------------------------------+ | Interface | Controller | Driver/Component | +===========+============+=====================================+ | PINMUX | on-chip | pinmux | +-----------+------------+-------------------------------------+ | GPIO | on-chip | gpio | +-----------+------------+-------------------------------------+ | CLOCK | on-chip | reset and clock control | +-----------+------------+-------------------------------------+ | FLASH | on-chip | flash memory | +-----------+------------+-------------------------------------+ The default configuration can be found in the defconfig file: :zephyr_file:`boards/google/twinkie_v2/google_twinkie_v2_defconfig` Pin Mapping =========== Default Zephyr Peripheral Mapping: ---------------------------------- - CC1_BUF : PA1 - CC2_BUF : PA3 - VBUS_READ_BUF : PB11 - CSA_VBUS : PC4 - CSA_CC2 : PC5 Programming and Debugging ************************* Build application as usual for the ``google_twinkie_v2`` board, and flash using dfu-util or J-Link. Debugging ========= Use SWD with a J-Link or ST-Link. ```
/content/code_sandbox/boards/google/twinkie_v2/doc/index.rst
restructuredtext
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
332
```cmake board_runner_args(jlink "--device=STM32F412CG" "--speed=4000") include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) ```
/content/code_sandbox/boards/google/dragonclaw/board.cmake
cmake
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
55
```unknown # Serial Drivers CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y # Console CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y # GPIO Controller CONFIG_GPIO=y # Clock Controller CONFIG_CLOCK_CONTROL=y # Pin Controller CONFIG_PINCTRL=y # Enable MPU and HW stack protection CONFIG_ARM_MPU=y CONFIG_HW_STACK_PROTECTION=y ```
/content/code_sandbox/boards/google/dragonclaw/google_dragonclaw_defconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
76
```unknown config BOARD_GOOGLE_DRAGONCLAW select SOC_STM32F412CX ```
/content/code_sandbox/boards/google/dragonclaw/Kconfig.google_dragonclaw
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
20
```unknown /* * */ /dts-v1/; #include <st/g0/stm32g0b1Xe.dtsi> #include <st/g0/stm32g0b1r(b-c-e)ixn-pinctrl.dtsi> #include <zephyr/dt-bindings/input/input-event-codes.h> / { model = "Google Twinkie V2"; compatible = "google,twinkie-v2"; chosen { zephyr,sram = &sram0; zephyr,flash = &flash0; }; leds { compatible = "gpio-leds"; red_led_0: led0 { gpios = <&gpioc 8 GPIO_ACTIVE_LOW>; }; green_led_1: led1 { gpios = <&gpiob 6 GPIO_ACTIVE_LOW>; }; blue_led_2: led2 { gpios = <&gpiob 7 GPIO_ACTIVE_LOW>; }; }; gpio_keys { compatible = "gpio-keys"; /* does not go to an actual button in current hardware. * short TP5 to TP6 to activate. */ dfu_detect: dfudetect { gpios = <&gpioa 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; zephyr,code = <INPUT_KEY_0>; }; }; cc1_buf: cc1buf { compatible = "voltage-divider"; io-channels = <&adc1 1>; output-ohms = <2000000000>; }; cc2_buf: cc2buf { compatible = "voltage-divider"; io-channels = <&adc1 3>; output-ohms = <2000000000>; }; vbus_read_buf: vbusv { compatible = "voltage-divider"; io-channels = <&adc1 15>; output-ohms = <68000>; full-ohms = <(2000000 + 68000)>; }; csa_vbus: vbusc { compatible = "current-sense-amplifier"; io-channels = <&adc1 17>; sense-resistor-micro-ohms = <3000>; sense-gain-mult = <100>; }; csa_cc2: vconc { compatible = "current-sense-amplifier"; io-channels = <&adc1 18>; sense-resistor-micro-ohms = <10000>; sense-gain-mult = <25>; }; aliases { led0 = &red_led_0; led1 = &green_led_1; led2 = &blue_led_2; bootloader-led0 = &blue_led_2; vcc1 = &cc1_buf; vcc2 = &cc2_buf; vbus = &vbus_read_buf; cbus = &csa_vbus; ccon = &csa_cc2; }; }; &adc1 { #address-cells = <1>; #size-cells = <0>; pinctrl-0 = <&adc1_in1_pa1 /* CC1_BUF */ &adc1_in3_pa3 /* CC2_BUF */ &adc1_in15_pb11 /* VBUS_READ_BUF */ &adc1_in17_pc4 /* CSA_VBUS */ &adc1_in18_pc5 /* CSA_CC2 */ >; pinctrl-names = "default"; st,adc-clock-source = <SYNC>; st,adc-prescaler = <4>; status = "okay"; channel@1 { reg = <1>; zephyr,gain = "ADC_GAIN_1"; zephyr,reference = "ADC_REF_INTERNAL"; zephyr,vref-mv = <3300>; zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>; zephyr,resolution = <12>; }; channel@3 { reg = <3>; zephyr,gain = "ADC_GAIN_1"; zephyr,reference = "ADC_REF_INTERNAL"; zephyr,vref-mv = <3300>; zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>; zephyr,resolution = <12>; }; channel@15 { reg = <15>; zephyr,gain = "ADC_GAIN_1"; zephyr,reference = "ADC_REF_INTERNAL"; zephyr,vref-mv = <3300>; zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>; zephyr,resolution = <12>; }; channel@17 { reg = <17>; zephyr,gain = "ADC_GAIN_1"; zephyr,reference = "ADC_REF_INTERNAL"; zephyr,vref-mv = <3300>; zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>; zephyr,resolution = <12>; }; channel@18 { reg = <18>; zephyr,gain = "ADC_GAIN_1"; zephyr,reference = "ADC_REF_INTERNAL"; zephyr,vref-mv = <3300>; zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>; zephyr,resolution = <12>; }; }; &clk_hsi { status = "okay"; }; &pll { div-m = <1>; mul-n = <8>; div-p = <2>; div-q = <2>; div-r = <2>; clocks = <&clk_hsi>; status = "okay"; }; &rcc { clocks = <&pll>; clock-frequency = <DT_FREQ_M(64)>; ahb-prescaler = <1>; apb1-prescaler = <1>; }; &iwdg { status = "okay"; }; &ucpd1 { status = "okay"; psc-ucpdclk = <1>; hbitclkdiv = <27>; pinctrl-0 = <&ucpd1_cc1_pa8 &ucpd1_cc2_pb15>; pinctrl-names = "default"; }; ```
/content/code_sandbox/boards/google/twinkie_v2/google_twinkie_v2.dts
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
1,361
```yaml identifier: google_dragonclaw name: Google Dragonclaw Development Board type: mcu arch: arm toolchain: - zephyr - gnuarmemb - xtools ram: 256 flash: 1024 vendor: google supported: - counter - dma - gpio - i2c - spi - pwm - rtc ```
/content/code_sandbox/boards/google/dragonclaw/google_dragonclaw.yaml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
95
```yaml board: name: google_dragonclaw vendor: google socs: - name: stm32f412cx ```
/content/code_sandbox/boards/google/dragonclaw/board.yml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
31
```restructuredtext .. _google_dragonclaw_board: Google Dragonclaw Development Board ################################### Overview ******** Dragonclaw is a board created by Google for fingerprint-related functionality development. See the `Dragonclaw Schematics`_ for board schematics, layout and BOM. Board has connectors for fingerprint sensors. Console is exposed over Servo connector. MCU can be flashed using Servo or SWD. Hardware ******** - STM32F412CGU6 UFQFPN48 package Peripherial Mapping =================== - USART_1 TX/RX : PA9/PA10 - USART_2 TX/RX : PA2/PA3 - SPI_1 CS/CLK/MISO/MOSI : PA4/PA5/PA6/PA7 - SPI_2 CS/CLK/MISO/MOSI : PB12/PB13/PB14/PB15 Programming and Debugging ************************* Build application as usual for the ``dragonclaw`` board, and flash using Servo or an external J-Link connected to J4. If Servo is used, please follow the `Chromium EC Flashing Documentation`_. Debugging ========= Use SWD with a J-Link or ST-Link. Remember that SW2 must be set to CORESIGHT. References ********** .. target-notes:: .. _Dragonclaw Schematics: path_to_url .. _Chromium EC Flashing Documentation: path_to_url#Flashing-via-the-servo-debug-board ```
/content/code_sandbox/boards/google/dragonclaw/doc/index.rst
restructuredtext
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
326
```unknown /* * */ /dts-v1/; #include <st/f0/stm32f098Xc.dtsi> #include <st/f0/stm32f098rchx-pinctrl.dtsi> / { model = "Google Kukui EC"; compatible = "google,kukui-ec", "st,stm32f098"; chosen { zephyr,console = &usart1; zephyr,shell-uart = &usart1; zephyr,sram = &sram0; zephyr,flash = &flash0; }; }; &clk_hsi { status = "okay"; }; &rcc { clocks = <&clk_hsi>; clock-frequency = <DT_FREQ_M(8)>; ahb-prescaler = <1>; apb1-prescaler = <1>; }; &usart1 { pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>; pinctrl-names = "default"; current-speed = <115200>; status = "okay"; }; &flash0 { partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; /* Set 6Kb of storage at the end of the 256Kb of flash */ storage_partition: partition@3e800 { label = "storage"; reg = <0x0003e800 DT_SIZE_K(6)>; }; }; }; &i2c1 { pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>; pinctrl-names = "default"; status = "okay"; clock-frequency = <I2C_BITRATE_FAST>; }; &i2c2 { pinctrl-0 = <&i2c2_scl_pa11 &i2c2_sda_pa12>; pinctrl-names = "default"; status = "okay"; clock-frequency = <I2C_BITRATE_FAST>; }; ```
/content/code_sandbox/boards/google/kukui/google_kukui.dts
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
442
```cmake ```
/content/code_sandbox/boards/google/kukui/board.cmake
cmake
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
1
```yaml identifier: google_kukui name: Google Kukui EC type: mcu arch: arm toolchain: - zephyr - gnuarmemb - xtools ram: 32 flash: 256 testing: ignore_tags: - net - bluetooth vendor: google ```
/content/code_sandbox/boards/google/kukui/google_kukui.yaml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
74
```unknown config BOARD_GOOGLE_KUKUI select SOC_STM32F098XX ```
/content/code_sandbox/boards/google/kukui/Kconfig.google_kukui
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
19
```yaml board: name: google_kukui vendor: google socs: - name: stm32f098xx ```
/content/code_sandbox/boards/google/kukui/board.yml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
30
```unknown # Serial Drivers CONFIG_SERIAL=y CONFIG_UART_INTERRUPT_DRIVEN=y # Enable console CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y # GPIO Controller CONFIG_GPIO=y # Enable Clocks CONFIG_CLOCK_CONTROL=y # enable pin controller CONFIG_PINCTRL=y ```
/content/code_sandbox/boards/google/kukui/google_kukui_defconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
58
```unknown /* * */ /dts-v1/; #include <st/f4/stm32f412Xg.dtsi> #include <st/f4/stm32f412c(e-g)ux-pinctrl.dtsi> / { model = "Google Dragonclaw development board"; compatible = "google,dragonclaw-fpmcu"; chosen { zephyr,console = &usart2; zephyr,shell-uart = &usart2; zephyr,sram = &sram0; zephyr,flash = &flash0; zephyr,flash-controller = &flash; }; }; &clk_hsi { /* HSI clock frequency is 16MHz */ status = "okay"; }; &clk_lsi { /* LSI clock frequency is 32768kHz */ status = "okay"; }; &pll { div-m = <8>; mul-n = <192>; /* 16MHz * 192/8 = 384MHz VCO clock */ div-p = <4>; /* 96MHz PLL general clock output */ div-q = <8>; /* 48MHz PLL output for USB, SDIO, RNG */ div-r = <7>; /* I2S - lowest possible frequency to save power */ clocks = <&clk_hsi>; status = "okay"; }; &rcc { clocks = <&pll>; /* Select PLL as SYSCLK source (96MHz) */ ahb-prescaler = <1>; /* SYSCLK not divided */ clock-frequency = <DT_FREQ_M(96)>; /* AHB frequency */ apb1-prescaler = <2>; /* AHB clock divided by 2 */ apb2-prescaler = <2>; /* AHB clock divided by 2 */ }; /* USART1: AP UART (Host Commands and MKBP) */ &usart1 { pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>; pinctrl-names = "default"; current-speed = <115200>; status = "okay"; }; /* USART2: Servo UART (console) */ &usart2 { pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>; pinctrl-names = "default"; current-speed = <115200>; status = "okay"; }; /* SPI1: communication with the AP */ &spi1 { pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>; pinctrl-names = "default"; status = "okay"; }; /* SPI2: communication with the fingerprint sensor */ &spi2 { pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13 &spi2_miso_pb14 &spi2_mosi_pb15>; pinctrl-names = "default"; status = "okay"; }; &rtc { clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, <&rcc STM32_SRC_LSI RTC_SEL(2)>; status = "okay"; backup_regs { status = "okay"; }; }; &rng { status = "okay"; }; /* * Set flags of unused pins as GPIO_ACTIVE_HIGH (0 << 0), which will be * interpreted by GPIO driver as GPIO_DISCONNECTED, without setting the gpio as * either input or output. The STM32 GPIO driver will set these pins as analog * to reduce power consumption. */ &gpiob { unused { gpio-hog; gpios = <2 GPIO_ACTIVE_HIGH>, <5 GPIO_ACTIVE_HIGH>; }; }; &gpioc { unused { gpio-hog; gpios = <13 GPIO_ACTIVE_HIGH>, <14 GPIO_ACTIVE_HIGH>, <15 GPIO_ACTIVE_HIGH>; }; }; &gpioh { unused { gpio-hog; gpios = <0 GPIO_ACTIVE_HIGH>, <1 GPIO_ACTIVE_HIGH>; }; }; /* * The board uses STM32F412CG in UFQFPN48 package in which gpio[d-g] is not * exposed, so disable it. */ &gpiod {status = "disabled";}; &gpioe {status = "disabled";}; &gpiof {status = "disabled";}; &gpiog {status = "disabled";}; ```
/content/code_sandbox/boards/google/dragonclaw/google_dragonclaw.dts
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
934
```restructuredtext .. _google_kukui_board: Google Kukui EC ############### Overview ******** Kukui is a reference board for Chromium OS-based devices Krane and Kodama. These are known as the Lenovo Chromebook Duet and 10e Chromebook Tablet, respectively. Zephyr has support for the STM32-based embedded controller (EC) on-board. Hardware ******** - STM32F098RCH6 - MT6370 battery charger - BMM150 compass - BMM160 gyroscope - Connections to the MediaTek AP Supported Features ================== The following features are supported: +-----------+------------+-------------------------------------+ | Interface | Controller | Driver/Component | +===========+============+=====================================+ | NVIC | on-chip | nested vector interrupt controller | +-----------+------------+-------------------------------------+ | UART | on-chip | serial port-polling; | | | | serial port-interrupt | +-----------+------------+-------------------------------------+ | PINMUX | on-chip | pinmux | +-----------+------------+-------------------------------------+ | GPIO | on-chip | gpio | +-----------+------------+-------------------------------------+ | CLOCK | on-chip | reset and clock control | +-----------+------------+-------------------------------------+ | FLASH | on-chip | flash memory | +-----------+------------+-------------------------------------+ | WATCHDOG | on-chip | independent watchdog | +-----------+------------+-------------------------------------+ Other features (such as I2C) are not available in Zephyr. The default configuration can be found in :zephyr_file:`boards/google/kukui/google_kukui_defconfig` Connections and IOs =================== Each of the GPIO pins can be configured by software as output (push-pull or open-drain), as input (with or without pull-up or pull-down), or as peripheral alternate function. Default Zephyr Peripheral Mapping: ---------------------------------- - UART_1 TX/RX : PA10/PA9 - I2C_1 SCL/SDA : PB8/PB9 - I2C_2 SCL/SDA : PA11/PA12 - Volume down : GPIOB pin 11 - Volume up : GPIOB pin 10 - Power : GPIOA pin 0 Programming and Debugging ************************* Build application as usual for the ``google_kukui`` board, and flash using Servo V2, Servo, or Servo V4 (CCD). See the `Chromium EC Flashing Documentation`_ for more information. Debugging ========= Use SWD with a J-Link or ST-Link. References ********** .. target-notes:: .. _Chromium EC Flashing Documentation: path_to_url#Flashing-via-the-servo-debug-board ```
/content/code_sandbox/boards/google/kukui/doc/index.rst
restructuredtext
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
613
```restructuredtext .. _dev_kits: Dev Kits and Thunderboards ########################## .. toctree:: :maxdepth: 1 :glob: **/* ```
/content/code_sandbox/boards/silabs/dev_kits/index.rst
restructuredtext
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
35
```cmake # # board_runner_args(jlink "--device=EFR32MG12PxxxF1024") include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) ```
/content/code_sandbox/boards/silabs/dev_kits/sltb004a/board.cmake
cmake
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
37
```restructuredtext .. _boards-silabs: Silicon Labs ############ .. toctree:: :maxdepth: 2 :titlesonly: :glob: */* Silicon Labs development hardware is represented in Zephyr by mapping Silicon Labs *kits* to Zephyr *boards*. The name used is the orderable product number (OPN) of the kit, as found on the packaging and on the Silicon Labs website. The board name in Zephyr is created by normalizing the OPN to lowercase and replacing dashes with underscores. You may find multiple other number and letter sequences silk-screened or lasered onto Silicon Labs boards, including a PCB* number and a BRD* number. In most cases, the digits of these sequences correspond to the numerical part of the kit OPN. For instance, the kit ``xg24_dk2601b``, which is a Dev Kit for the EFR32xG24 SoC, uses board BRD2601B, which again uses PCB2601A. It is possible to use the ``west boards`` command to search for board names if you have a PCB and you don't know what board name to use: .. code-block:: console west boards -n 2601 ```
/content/code_sandbox/boards/silabs/index.rst
restructuredtext
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
273
```unknown CONFIG_ARM_MPU=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y CONFIG_SERIAL=y CONFIG_GPIO=y CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=38400000 CONFIG_CMU_HFCLK_HFXO=y CONFIG_SOC_GECKO_EMU_DCDC=y CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y ```
/content/code_sandbox/boards/silabs/dev_kits/sltb004a/sltb004a_defconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
74
```cmake # SPI is implemented via usart so node name isn't spi@... list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge") ```
/content/code_sandbox/boards/silabs/dev_kits/sltb004a/pre_dt_board.cmake
cmake
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
32
```c /* * */ #include <zephyr/init.h> #include <zephyr/drivers/gpio.h> #include <zephyr/sys/printk.h> struct supply_cfg { const struct device *gpio; gpio_pin_t pin; gpio_dt_flags_t flags; }; static int enable_supply(const struct supply_cfg *cfg) { int rv = -ENODEV; if (device_is_ready(cfg->gpio)) { gpio_pin_configure(cfg->gpio, cfg->pin, GPIO_OUTPUT | cfg->flags); gpio_pin_set(cfg->gpio, cfg->pin, 1); rv = 0; } return rv; } static int efr32mg_sltb004a_init(void) { struct supply_cfg cfg; int rc = 0; (void)cfg; #define CCS811 DT_NODELABEL(ccs811) #if DT_NODE_HAS_STATUS(CCS811, okay) cfg = (struct supply_cfg){ .gpio = DEVICE_DT_GET(DT_GPIO_CTLR(CCS811, supply_gpios)), .pin = DT_GPIO_PIN(CCS811, supply_gpios), .flags = DT_GPIO_FLAGS(CCS811, supply_gpios), }; /* Enable the CCS811 power */ rc = enable_supply(&cfg); if (rc < 0) { printk("CCS811 supply not enabled: %d\n", rc); } #endif return rc; } /* needs to be done after GPIO driver init */ SYS_INIT(efr32mg_sltb004a_init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE); ```
/content/code_sandbox/boards/silabs/dev_kits/sltb004a/board.c
c
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
322
```yaml board: name: sltb004a vendor: silabs socs: - name: efr32mg12p332f1024gl125 ```
/content/code_sandbox/boards/silabs/dev_kits/sltb004a/board.yml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
38
```unknown /* * */ #include <dt-bindings/pinctrl/gecko-pinctrl-s1.h> &pinctrl { /* configuration for uart0 device, default state */ usart0_default: usart0_default { group1 { /* configure PA.1 as UART_RX */ psels = <GECKO_PSEL(UART_RX, A, 1)>, <GECKO_LOC(UART_RX, 0)>; }; group2 { /* configure PA.0 as UART_TX */ psels = <GECKO_PSEL(UART_TX, A, 0)>, <GECKO_LOC(UART_TX, 0)>; }; }; }; ```
/content/code_sandbox/boards/silabs/dev_kits/sltb004a/sltb004a-pinctrl.dtsi
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
155
```unknown # EFR32MG SLTB004A board if BOARD_SLTB004A config CMU_HFXO_FREQ default 40000000 config CMU_LFXO_FREQ default 32768 endif # BOARD_SLTB004A ```
/content/code_sandbox/boards/silabs/dev_kits/sltb004a/Kconfig.defconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
54
```yaml identifier: sltb004a name: Thunderboard Sense 2 (SLTB004A, BRD4166A) type: mcu arch: arm ram: 256 flash: 1024 toolchain: - zephyr - gnuarmemb - xtools supported: - gpio - i2c - nvs - spi - watchdog testing: ignore_tags: - net - bluetooth vendor: silabs ```
/content/code_sandbox/boards/silabs/dev_kits/sltb004a/sltb004a.yaml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
112
```unknown # EFR32MG SLTB004A board config BOARD_SLTB004A select SOC_PART_NUMBER_EFR32MG12P332F1024GL125 ```
/content/code_sandbox/boards/silabs/dev_kits/sltb004a/Kconfig.sltb004a
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
36
```unknown /* * */ /dts-v1/; #include <silabs/efr32mg12p332f1024gl125.dtsi> #include "sltb004a-pinctrl.dtsi" #include <zephyr/dt-bindings/input/input-event-codes.h> / { model = "Silabs EFR32MG12 SLTB004A board (aka Thunderboard Sense 2)"; compatible = "silabs,sltb004a", "silabs,efr32mg"; /* These aliases are provided for compatibility with samples */ aliases { led0 = &led0; led1 = &led1; pwm-led0 = &pwm_led0; sw0 = &button0; sw1 = &button1; watchdog0 = &wdog0; watchdog1 = &wdog1; }; chosen { zephyr,console = &usart0; zephyr,shell-uart = &usart0; zephyr,sram = &sram0; zephyr,flash = &flash0; }; leds { compatible = "gpio-leds"; led0: led_0 { gpios = <&gpiod 8 0>; label = "LED 0"; }; led1: led_1 { gpios = <&gpiod 9 0>; label = "LED 1"; }; }; buttons { compatible = "gpio-keys"; button0: button_0 { /* gpio flags need validation */ gpios = <&gpiod 14 GPIO_ACTIVE_LOW>; label = "User Push Button 0"; zephyr,code = <INPUT_KEY_0>; }; button1: button_1 { /* gpio flags need validation */ gpios = <&gpiod 15 GPIO_ACTIVE_LOW>; label = "User Push Button 1"; zephyr,code = <INPUT_KEY_1>; }; }; pwmleds { compatible = "pwm-leds"; status = "okay"; pwm_led0: pwm_led0 { pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>; }; }; }; &cpu0 { clock-frequency = <38400000>; }; &usart0 { current-speed = <115200>; pinctrl-0 = <&usart0_default>; pinctrl-names = "default"; status = "okay"; }; &usart2 { compatible = "silabs,gecko-spi-usart"; #address-cells = <1>; #size-cells = <0>; location-rx = <GECKO_LOCATION(30) GECKO_PORT_K GECKO_PIN(2)>; location-tx = <GECKO_LOCATION(29) GECKO_PORT_K GECKO_PIN(0)>; location-clk = <GECKO_LOCATION(18) GECKO_PORT_F GECKO_PIN(7)>; cs-gpios = <&gpiok 1 GPIO_ACTIVE_LOW>; status = "okay"; mx25r80: mx25r8035f@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <80000000>; size = <0x800000>; jedec-id = [c2 28 14]; sfdp-bfp = [ e5 20 f1 ff ff ff 7f 00 44 eb 08 6b 08 3b 04 bb ee ff ff ff ff ff 00 ff ff ff 00 ff 0c 20 0f 52 10 d8 00 ff 23 72 f5 00 82 ed 04 b7 44 83 38 44 30 b0 30 b0 f7 c4 d5 5c 00 be 29 ff f0 d0 ff ff ]; }; }; &leuart0 { current-speed = <9600>; location-rx = <GECKO_LOCATION(27) GECKO_PORT_F GECKO_PIN(4)>; location-tx = <GECKO_LOCATION(27) GECKO_PORT_F GECKO_PIN(3)>; status = "okay"; }; &pinctrl { i2c0_default: i2c0_default { group1 { psels = <GECKO_PSEL(I2C_SDA, C, 10)>, <GECKO_PSEL(I2C_SCL, C, 11)>, <GECKO_LOC(I2C_SDA, 15)>, <GECKO_LOC(I2C_SCL, 15)>; }; }; i2c1_default: i2c1_default { group1 { psels = <GECKO_PSEL(I2C_SDA, B, 6)>, <GECKO_PSEL(I2C_SCL, B, 7)>, <GECKO_LOC(I2C_SDA, 6)>, <GECKO_LOC(I2C_SCL, 6)>; }; }; }; &i2c0 { pinctrl-0 = <&i2c0_default>; pinctrl-names = "default"; status = "okay"; }; &i2c1 { /* This set selects for CCS811_I2C supporting CCS811 */ pinctrl-0 = <&i2c1_default>; pinctrl-names = "default"; status = "okay"; ccs811: ccs811@5a { compatible = "ams,ccs811"; reg = <0x5a>; supply-gpios = <&gpiof 14 GPIO_ACTIVE_HIGH>; irq-gpios = <&gpiof 13 GPIO_ACTIVE_LOW>; wake-gpios = <&gpiof 15 GPIO_ACTIVE_LOW>; }; /* This set selects for ENV_I2C supporting Si7021, Si11330, BMP280 */ /* location-sda = <GECKO_LOCATION(17) GECKO_PORT_C GECKO_PIN(4)>; location-scl = <GECKO_LOCATION(17) GECKO_PORT_C GECKO_PIN(5)>; */ /* This set selects for HALL_I2C supporting Si7210 */ /* location-sda = <GECKO_LOCATION(8) GECKO_PORT_B GECKO_PIN(8)>; location-scl = <GECKO_LOCATION(8) GECKO_PORT_B GECKO_PIN(9)>; */ }; &rtcc0 { prescaler = <1>; status = "okay"; }; &timer0 { status = "okay"; pwm0: pwm { status = "okay"; pin-location = <GECKO_LOCATION(17) GECKO_PORT_D GECKO_PIN(9)>; prescaler = <1024>; }; }; &gpio { location-swo = <0>; status = "okay"; }; &gpioa { status = "okay"; }; &gpiod { status = "okay"; }; &gpiof { status = "okay"; }; &gpiok { status = "okay"; }; &wdog0 { status = "okay"; }; &wdog1 { status = "okay"; }; &flash0 { partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; /* Set 6Kb of storage at the end of the 1024Kb of flash */ storage_partition: partition@fe800 { label = "storage"; reg = <0x000fe800 0x00001800>; }; }; }; &trng0 { status = "okay"; }; ```
/content/code_sandbox/boards/silabs/dev_kits/sltb004a/sltb004a.dts
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
1,749
```cmake board_runner_args(jlink "--device=EFR32BG27CxxxF768" "--reset-after-load") include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) board_runner_args(silabs_commander "--device=EFR32BG27C140F768IM40") include(${ZEPHYR_BASE}/boards/common/silabs_commander.board.cmake) ```
/content/code_sandbox/boards/silabs/dev_kits/xg27_dk2602a/board.cmake
cmake
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
81
```unknown # EFR32BG SLTB010A board config BOARD_XG27_DK2602A select SOC_PART_NUMBER_EFR32BG27C140F768IM40 ```
/content/code_sandbox/boards/silabs/dev_kits/xg27_dk2602a/Kconfig.xg27_dk2602a
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
39
```unknown /* * */ /dts-v1/; #include <silabs/efr32bg27.dtsi> #include <silabs/efr32bg2x-pinctrl.dtsi> #include "thunderboard.dtsi" / { model = "Silicon Labs xG27-DK2602A Dev Kit"; compatible = "silabs,efr32bg27c140f768im40", "silabs,xg27_dk2602a", "silabs,efr32bg27"; /* These aliases are provided for compatibility with samples */ aliases { led0 = &led0; sw0 = &button0; spi0 = &usart0; watchdog0 = &wdog0; /* If enabled, MCUboot uses this for recovery mode entrance */ mcuboot-led0 = &led0; mcuboot-button0 = &button0; }; chosen { zephyr,code-partition = &slot0_partition; zephyr,bt-hci = &bt_hci_silabs; }; }; &flash0 { partitions { /* Reserve 48 KiB for the bootloader */ boot_partition: partition@0 { label = "mcuboot"; reg = <0x00000000 0x0000c000>; read-only; }; /* Reserve 328 KiB for the application in slot 0 */ slot0_partition: partition@c000 { label = "image-0"; reg = <0x0000c000 0x00052000>; }; /* Reserve 328 KiB for the application in slot 1 */ slot1_partition: partition@5e000 { label = "image-1"; reg = <0x0005e000 0x00052000>; }; /* Set 64 KiB of storage at the end of the 768 KiB of flash */ storage_partition: partition@b0000 { label = "storage"; reg = <0x000b0000 0x00010000>; }; }; }; &led0 { gpios = <&gpioa GECKO_PIN(4) GPIO_ACTIVE_HIGH>; }; &sw_sensor_enable { enable-gpios = <&gpioc GECKO_PIN(6) GPIO_ACTIVE_HIGH>; }; &sw_mic_enable { enable-gpios = <&gpioc GECKO_PIN(7) GPIO_ACTIVE_HIGH>; }; &sw_imu_enable { enable-gpios = <&gpiob GECKO_PIN(4) GPIO_ACTIVE_HIGH>; }; &button0 { gpios = <&gpiob GECKO_PIN(3) GPIO_ACTIVE_LOW>; }; &bt_hci_silabs { status = "okay"; }; ```
/content/code_sandbox/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a.dts
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
614
```cmake # SPI is implemented via usart so node name isn't spi@... list(APPEND EXTRA_DTC_FLAGS "-Wno-spi_bus_bridge") ```
/content/code_sandbox/boards/silabs/dev_kits/xg27_dk2602a/pre_dt_board.cmake
cmake
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
32
```restructuredtext .. _sltb004a: EFR32MG12 Thunderboard (SLTB004A) ################################# Overview ******** The EFR32MG12 Thunderboard (a.k.a Thunderboard Sense 2) contains an MCU from the EFR32MG12 family built on ARM Cortex-M4F processor with low power capabilities. .. image:: sltb004a.jpg :align: center :alt: EFR32MG12 SLTB004A Hardware ******** - EFR32MG12 Mighty Gecko Wireless SoC with 38.4 MHz operating frequency - ARM Cortex M4 core with 256 kB RAM and 1024 kB Flash - Macronix ultra low power 8-Mbit SPI flash (MX25R8035F) - 2.4 GHz ceramic antenna for wireless transmission - Silicon Labs Si7021 relative humidity and temperature sensor - Silicon Labs Si1133 UV index and ambient light sensor - Silicon Labs Si7210 hall effect sensor - Bosch Sensortec BMP280 barometric pressure sensor - ams CCS811 indoor air quality gas sensor - TDK InvenSense ICM-20648 6-axis inertial sensor - TDK InvenSense ICS-43434 MEMS microphone - Four high brightness RGB LEDs from Broadcom Limited (ASMT-YTB7-0AA02) - One bi-color LED and two push buttons - Power enable signals for fine grained power-control - On-board SEGGER J-Link debugger for easy programming and debugging, which includes a USB virtual COM port - Mini Simplicity connector for access to energy profiling and advanced wireless network debugging - Breakout pads for GPIO access and connection to external hardware - Reset button - Automatic switch-over between USB and battery power - CR2032 coin cell holder and external battery connector For more information about the EFR32MG12 SoC and Thunderboard Sense 2 board: - `EFR32MG12 Datasheet`_ - `EFR32MG12 Reference Manual`_ - `SLTB004A User Guide`_ - `SLTB004A Schematics`_ Supported Features ================== The sltb004a board configuration supports the following hardware features: +-----------+------------+-------------------------------------+ | Interface | Controller | Driver/Component | +===========+============+=====================================+ | MPU | on-chip | memory protection unit | +-----------+------------+-------------------------------------+ | NVIC | on-chip | nested vector interrupt controller | +-----------+------------+-------------------------------------+ | SYSTICK | on-chip | systick | +-----------+------------+-------------------------------------+ | COUNTER | on-chip | rtcc | +-----------+------------+-------------------------------------+ | FLASH | on-chip | flash memory | +-----------+------------+-------------------------------------+ | GPIO | on-chip | gpio | +-----------+------------+-------------------------------------+ | UART | on-chip | serial port-polling; | | | | serial port-interrupt | +-----------+------------+-------------------------------------+ | I2C | on-chip | i2c port-polling | +-----------+------------+-------------------------------------+ | SPI(M) | on-chip | spi port-polling | +-----------+------------+-------------------------------------+ | WATCHDOG | on-chip | watchdog | +-----------+------------+-------------------------------------+ | TRNG | on-chip | true random number generator | +-----------+------------+-------------------------------------+ The default configuration can be found in :zephyr_file:`boards/silabs/dev_kits/sltb004a/sltb004a_defconfig` Other hardware features are currently not supported by the port. Connections and IOs =================== The EFR32MG12 SoC has eight gpio controllers (PORTA, PORTB, PORTC, PORTD, PORTF, PORTI, PORTJ and PORTK). In the following table, the column Name contains Pin names. For example, PE2 means Pin number 2 on PORTE and #27 represents the location bitfield , as used in the board's and microcontroller's datasheets and manuals. +------+-------------+-----------------------------------+ | Name | Function | Usage | +======+=============+===================================+ | PD8 | GPIO | LED0 (RED) | +------+-------------+-----------------------------------+ | PD9 | GPIO | LED1 (GREEN) | +------+-------------+-----------------------------------+ | PD14 | GPIO | SW0 Push Button PB0 | +------+-------------+-----------------------------------+ | PD15 | GPIO | Push Button PB1 | +------+-------------+-----------------------------------+ | PA0 | UART_TX | UART TX Console VCOM_TX US0_TX #0 | +------+-------------+-----------------------------------+ | PA1 | UART_RX | UART RX Console VCOM_RX US0_RX #0 | +------+-------------+-----------------------------------+ | PF3 | UART_TX | EXP12_UART_TX LEU0_TX #27 | +------+-------------+-----------------------------------+ | PF4 | UART_RX | EXP14_UART_RX LEU0_RX #27 | +------+-------------+-----------------------------------+ | PC10 | I2C_SDA | EXP16_I2C_SDA I2C0_SDA #15 | +------+-------------+-----------------------------------+ | PC11 | I2C_SCL | EXP15_I2C_SCL I2C0_SCL #15 | +------+-------------+-----------------------------------+ | PB6 | I2C_SDA | CCS811_I2C_SDA I2C1_SDA #6 | +------+-------------+-----------------------------------+ | PB7 | I2C_SCL | CCS811_I2C_SCL I2C1_SCL #6 | +------+-------------+-----------------------------------+ | PK0 | SPI_MOSI | Flash MOSI US2_TX #29 | +------+-------------+-----------------------------------+ | PK2 | SPI_MISO | Flash MISO US2_RX #30 | +------+-------------+-----------------------------------+ | PF7 | SPI_SCLK | Flash SCLK US2_CLK #18 | +------+-------------+-----------------------------------+ | PK1 | SPI_CS | Flash Chip Select (GPIO) | +------+-------------+-----------------------------------+ System Clock ============ The EFR32MG12 SoC is configured to use the 38.4 MHz external oscillator on the board. Serial Port =========== The EFR32MG12 SoC has four USARTs and one Low Energy UARTs (LEUART with 9600 maximum baudrate). USART0 is configured as the Zephyr console and is connected to the On-Board J-Link Debugger that presents a virtual COM port for general purpose application serial data transfer with this interface. Programming and Debugging ************************* .. note:: Before using the kit the first time, you should update the J-Link firmware from `J-Link-Downloads`_ Flashing ======== The SLTB004A includes an `J-Link`_ serial and debug adaptor built into the board. The adaptor provides: - A USB connection to the host computer, which exposes a Mass Storage and a USB Serial Port. - A Serial Flash device, which implements the USB flash disk file storage. - A physical UART connection which is relayed over interface USB Serial port. Flashing an application to SLTB004A ----------------------------------- The sample application :ref:`hello_world` is used for this example. Build the Zephyr kernel and application: .. zephyr-app-commands:: :zephyr-app: samples/hello_world :board: sltb004a :goals: build Connect the SLTB004A to your host computer using the USB port and you should see a USB connection which exposes a Mass Storage (TB004) and a USB Serial Port. Copy the generated zephyr.bin in the SLTB004A drive. Open a serial terminal (minicom, putty, etc.) with the following settings: - Speed: 115200 - Data: 8 bits - Parity: None - Stop bits: 1 Reset the board and you should be able to see on the corresponding Serial Port the following message: .. code-block:: console Hello World! sltb004a .. _SLTB004A User Guide: path_to_url .. _SLTB004A Schematics: path_to_url .. _EFR32MG12 Datasheet: path_to_url .. _EFR32MG12 Reference Manual: path_to_url .. _J-Link: path_to_url .. _J-Link-Downloads: path_to_url ```
/content/code_sandbox/boards/silabs/dev_kits/sltb004a/doc/index.rst
restructuredtext
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
1,880
```c /* * */ #include <zephyr/drivers/gpio.h> #include <zephyr/init.h> #include <zephyr/logging/log.h> #ifdef CONFIG_SOC_GECKO_DEV_INIT #include "em_cmu.h" #endif LOG_MODULE_REGISTER(dev_kit, CONFIG_BOARD_XG27_DK2602A_LOG_LEVEL); static int dev_kit_init_clocks(void); static int dev_kit_init(void) { int ret; #ifdef CONFIG_SOC_GECKO_DEV_INIT dev_kit_init_clocks(); #endif static struct gpio_dt_spec wake_up_gpio_dev = GPIO_DT_SPEC_GET(DT_NODELABEL(wake_up_trigger), gpios); if (!gpio_is_ready_dt(&wake_up_gpio_dev)) { LOG_ERR("Wake-up GPIO device was not found!\n"); return -ENODEV; } ret = gpio_pin_configure_dt(&wake_up_gpio_dev, GPIO_OUTPUT_ACTIVE); if (ret < 0) { return ret; } return 0; } #ifdef CONFIG_SOC_GECKO_DEV_INIT static int dev_kit_init_clocks(void) { CMU_ClockSelectSet(cmuClock_SYSCLK, cmuSelect_HFRCODPLL); #if defined(_CMU_EM01GRPACLKCTRL_MASK) CMU_ClockSelectSet(cmuClock_EM01GRPACLK, cmuSelect_HFRCODPLL); #endif #if defined(_CMU_EM01GRPBCLKCTRL_MASK) CMU_ClockSelectSet(cmuClock_EM01GRPBCLK, cmuSelect_HFRCODPLL); #endif CMU_ClockSelectSet(cmuClock_EM23GRPACLK, cmuSelect_LFRCO); #if defined(RTCC_PRESENT) CMU_ClockSelectSet(cmuClock_RTCC, cmuSelect_LFRCO); #endif CMU_ClockSelectSet(cmuClock_WDOG0, cmuSelect_LFRCO); return 0; } #endif /* needs to be done after GPIO driver init */ SYS_INIT(dev_kit_init, POST_KERNEL, CONFIG_KERNEL_INIT_PRIORITY_DEVICE); ```
/content/code_sandbox/boards/silabs/dev_kits/xg27_dk2602a/board.c
c
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
430
```yaml identifier: xg27_dk2602a name: xG27 Dev Kit (xG27-DK2602A, BRD2602A) type: mcu arch: arm ram: 64 flash: 768 toolchain: - zephyr - gnuarmemb - xtools supported: - counter - gpio - uart testing: ignore_tags: - net - bluetooth vendor: silabs ```
/content/code_sandbox/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a.yaml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
108
```yaml boards: - name: xg27_dk2602a vendor: silabs socs: - name: efr32bg27c140f768im40 ```
/content/code_sandbox/boards/silabs/dev_kits/xg27_dk2602a/board.yml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
42
```unknown /* * */ #include <zephyr/dt-bindings/input/input-event-codes.h> #include <silabs/gpio_gecko.h> / { chosen { zephyr,bt-c2h-uart = &usart1; zephyr,console = &usart1; zephyr,shell-uart = &usart1; zephyr,sram = &sram0; zephyr,flash = &flash0; }; leds { compatible = "gpio-leds"; led0: led_0 { gpios = <&gpiob GECKO_PIN(0) GPIO_ACTIVE_HIGH>; label = "LED 0"; }; }; buttons { compatible = "gpio-keys"; button0: button_0 { gpios = <&gpiob GECKO_PIN(1) GPIO_ACTIVE_LOW>; label = "User Push Button 0"; zephyr,code = <INPUT_KEY_0>; }; }; wake_up_trigger: gpio-wake-up { compatible = "silabs,gecko-wake-up-trigger"; gpios = <&gpioa GECKO_PIN(5) GPIO_ACTIVE_LOW>; }; /* GPIOs that power up different sensors */ sw_sensor_enable: gpio_switch_0 { compatible = "regulator-fixed"; status = "okay"; regulator-name = "sw_sensor_enable"; startup-delay-us = <100000>; /* Always on since sensor drivers won't enable it automatically */ regulator-always-on; }; sw_mic_enable: gpio_switch_1 { compatible = "regulator-fixed"; status = "okay"; regulator-name = "sw_mic_enable"; startup-delay-us = <100000>; }; sw_imu_enable: gpio_switch_2 { compatible = "regulator-fixed"; status = "okay"; regulator-name = "sw_imu_enable"; startup-delay-us = <100000>; }; }; &cpu0 { clock-frequency = <76800000>; }; &pstate_em3 { status = "disabled"; }; &usart0 { status = "okay"; pinctrl-0 = <&usart0_default>; pinctrl-names = "default"; cs-gpios = <&gpioc 3 GPIO_ACTIVE_LOW>; mx25r80: mx25r8035f@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <80000000>; size = <0x800000>; jedec-id = [c2 28 14]; sfdp-bfp = [ e5 20 f1 ff ff ff 7f 00 44 eb 08 6b 08 3b 04 bb ee ff ff ff ff ff 00 ff ff ff 00 ff 0c 20 0f 52 10 d8 00 ff 23 72 f5 00 82 ed 04 b7 44 83 38 44 30 b0 30 b0 f7 c4 d5 5c 00 be 29 ff f0 d0 ff ff ]; }; }; &usart1 { current-speed = <115200>; status = "okay"; pinctrl-0 = <&usart1_default>; pinctrl-names = "default"; }; &wdog0 { status = "okay"; }; &flash0 { partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; }; }; &gpio { location-swo = <0>; status = "okay"; }; &gpioa { status = "okay"; }; &gpiob { status = "okay"; }; &gpioc { status = "okay"; }; &burtc0 { status = "okay"; }; &stimer0 { status = "okay"; }; &trng { status = "okay"; }; &pinctrl { i2c0_default: i2c0_default { group1 { psels = <GECKO_PSEL(I2C_SDA, D, 2)>, <GECKO_PSEL(I2C_SCL, D, 3)>, <GECKO_LOC(I2C_SDA, 3)>, <GECKO_LOC(I2C_SCL, 3)>; }; }; }; &i2c0 { pinctrl-0 = <&i2c0_default>; pinctrl-names = "default"; status = "okay"; si7210@30 { compatible = "silabs,si7210"; status = "okay"; reg = <0x30>; }; }; &adc0 { status = "okay"; }; ```
/content/code_sandbox/boards/silabs/dev_kits/xg27_dk2602a/thunderboard.dtsi
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
1,077
```unknown CONFIG_ARM_MPU=y CONFIG_CONSOLE=y CONFIG_UART_CONSOLE=y CONFIG_SERIAL=y CONFIG_GPIO=y CONFIG_SOC_GECKO_EMU_DCDC=y CONFIG_SOC_GECKO_EMU_DCDC_MODE_ON=y CONFIG_HW_STACK_PROTECTION=y CONFIG_PINCTRL=y # Used if SysTick is enabled, ignored for BURTC # (BURTC uses TIMER_READS_ITS_FREQUENCY_AT_RUNTIME) CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=76800000 # Use BURTC as system clock source CONFIG_GECKO_BURTC_TIMER=y CONFIG_CMU_BURTCCLK_LFXO=y CONFIG_SYS_CLOCK_TICKS_PER_SEC=1024 ```
/content/code_sandbox/boards/silabs/dev_kits/xg27_dk2602a/xg27_dk2602a_defconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
146
```unknown # EFR32 Thunderboard-style boards module = BOARD_XG27_DK2602A module-str = Board Control source "subsys/logging/Kconfig.template.log_config" ```
/content/code_sandbox/boards/silabs/dev_kits/xg27_dk2602a/Kconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
39
```unknown config CMU_HFXO_FREQ default 38400000 config CMU_LFXO_FREQ default 32768 if SOC_GECKO_USE_RAIL config FPU default y endif # SOC_GECKO_USE_RAIL if BT config FPU default y config COMMON_LIBC_MALLOC_ARENA_SIZE default 8192 config MAIN_STACK_SIZE default 3072 if PM default 2304 endif # BT config REGULATOR default y if SI7210 ```
/content/code_sandbox/boards/silabs/dev_kits/xg27_dk2602a/Kconfig.defconfig
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
112
```yaml description: GPIO Wake Up Trigger for EFR32BG22/EFR32BG27 compatible: "silabs,gecko-wake-up-trigger" include: base.yaml properties: gpios: type: phandle-array required: true description: | GPIO used as wake up trigger from EM4 sleep ```
/content/code_sandbox/boards/silabs/dev_kits/xg27_dk2602a/dts/bindings/silabs,gecko-wake-up-triggers.yaml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
72
```unknown /* * */ /dts-v1/; #include <silabs/efm32gg12b810f1024gm64.dtsi> #include <zephyr/dt-bindings/input/input-event-codes.h> #include "sltb009a-pinctrl.dtsi" / { model = "Silicon Labs EFM32GG12 SLTB009A board"; compatible = "silabs,sltb009a"; chosen { zephyr,console = &usart0; zephyr,shell-uart = &usart0; zephyr,sram = &sram0; zephyr,flash = &flash0; }; /* These aliases are provided for compatibility with samples */ aliases { led0 = &led0; led1 = &led1; sw0 = &button0; sw1 = &button1; watchdog0 = &wdog0; }; leds { compatible = "gpio-leds"; led0: led_0 { gpios = <&gpioe 12 GPIO_ACTIVE_HIGH>; label = "LED 0"; }; led1: led_1 { gpios = <&gpioa 13 GPIO_ACTIVE_HIGH>; label = "LED 1"; }; }; buttons { compatible = "gpio-keys"; button0: button_0 { gpios = <&gpiod 5 GPIO_ACTIVE_HIGH>; label = "User Push Button 0"; zephyr,code = <INPUT_KEY_0>; }; button1: button_1 { gpios = <&gpiod 8 GPIO_ACTIVE_HIGH>; label = "User Push Button 1"; zephyr,code = <INPUT_KEY_1>; }; }; }; &usart0 { current-speed = <115200>; pinctrl-0 = <&usart0_default>; pinctrl-names = "default"; status = "okay"; }; &usart4 { current-speed = <115200>; location-rx = <GECKO_LOCATION(0) GECKO_PORT_B GECKO_PIN(8)>; location-tx = <GECKO_LOCATION(0) GECKO_PORT_B GECKO_PIN(7)>; status = "okay"; }; &leuart0 { current-speed = <9600>; location-rx = <GECKO_LOCATION(1) GECKO_PORT_B GECKO_PIN(14)>; location-tx = <GECKO_LOCATION(1) GECKO_PORT_B GECKO_PIN(13)>; status = "okay"; }; &i2c0 { pinctrl-0 = <&i2c0_default>; pinctrl-names = "default"; status = "okay"; }; &i2c1 { pinctrl-0 = <&i2c1_default>; pinctrl-names = "default"; status = "okay"; }; &rtcc0 { prescaler = <1>; status = "okay"; }; &gpioa { status = "okay"; board-controller-enable { // VCOM Isolation. Set PA15 to HIGH to enable VCOM_{RX,TX}. gpio-hog; gpios = <15 GPIO_ACTIVE_HIGH>; output-high; }; }; &gpio { location-swo = <0>; status = "okay"; }; &gpiob { status = "okay"; }; &gpioc { status = "okay"; }; &gpiod { status = "okay"; }; &gpioe { status = "okay"; }; &gpiof { status = "okay"; }; &flash0 { partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; /* Set 12Kb of storage at the end of the 2048Kb of flash */ storage_partition: partition@1fd000 { label = "storage"; reg = <0x001fd000 0x00003000>; }; }; }; &wdog0 { status = "okay"; }; &trng0 { status = "okay"; }; &cpu0 { clock-frequency = <72000000>; }; ```
/content/code_sandbox/boards/silabs/dev_kits/sltb009a/sltb009a.dts
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
919
```cmake board_runner_args(jlink "--device=EFM32GG12B810F1024") include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake) ```
/content/code_sandbox/boards/silabs/dev_kits/sltb009a/board.cmake
cmake
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
37
```unknown /* * */ #include <dt-bindings/pinctrl/gecko-pinctrl-s1.h> &pinctrl { /* configuration for usart0 device, default state - operating as UART */ usart0_default: usart0_default { group1 { psels = <GECKO_PSEL(UART_TX, E, 0)>, <GECKO_PSEL(UART_RX, E, 1)>, <GECKO_LOC(UART_TX, 7)>, <GECKO_LOC(UART_RX, 6)>; }; }; i2c0_default: i2c0_default { group1 { psels = <GECKO_PSEL(I2C_SDA, C, 0)>, <GECKO_PSEL(I2C_SCL, C, 1)>, <GECKO_LOC(I2C_SDA, 4)>, <GECKO_LOC(I2C_SCL, 4)>; }; }; i2c1_default: i2c1_default { group1 { psels = <GECKO_PSEL(I2C_SDA, C, 4)>, <GECKO_PSEL(I2C_SCL, C, 5)>, <GECKO_LOC(I2C_SDA, 0)>, <GECKO_LOC(I2C_SCL, 0)>; }; }; }; ```
/content/code_sandbox/boards/silabs/dev_kits/sltb009a/sltb009a-pinctrl.dtsi
unknown
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
319
```yaml identifier: sltb009a name: Thunderboard EFM32GG12 (SLTB009A, BRD2207A) type: mcu arch: arm ram: 192 flash: 1024 toolchain: - zephyr supported: - i2c - gpio - nvs testing: ignore_tags: - bluetooth vendor: silabs ```
/content/code_sandbox/boards/silabs/dev_kits/sltb009a/sltb009a.yaml
yaml
2016-05-26T17:54:19
2024-08-16T18:09:06
zephyr
zephyrproject-rtos/zephyr
10,307
90